Design and characterization of the PREC (Prototype Readout Electronics for Counting particles)
NASA Astrophysics Data System (ADS)
Assis, P.; Brogueira, P.; Ferreira, M.; Luz, R.; Mendes, L.
2016-08-01
The design, tests and performance of a novel, low noise, acquisition system—the PREC (Prototype Readout Electronics for Counting particles) is presented in this article. PREC is a system developed using discrete electronics for particle counting applications using RPCs (Resistive Plate Chamber) detectors. PREC can, however, be used with other kind of detectors that present fast pulses, e.g. Silicon Photomultipliers. The PREC system consists in several Front-End boards that transmit data to a purely digital Motherboard. The amplification and discrimination of the signal is performed in the Front-End boards, making them the critical component of the system. In this paper, the Front-End was tested extensively by measuring the gain, noise level, crosstalk, trigger efficiency, propagation time and power consumption. The gain shows a decrease with the working temperature and an increase with the power supply voltage. The Front-End board shows a low noise level (<= 1.6 mV at 3σ level) and no crosstalk is detected above this level. The s-curve of the trigger efficiency is characterized by a 3 mV gap from the region where most of the signals are triggered to almost no signal is triggered. The signal transit time between the Front-End input and the digital Motherboard is estimated to be 5.82 ns. The maximum power consumption is 3.372 W for the Motherboard and 3.576 W and 1.443 W for each Front-End analogue circuitry and digital part, respectively.
Upgraded Readout Electronics for the ATLAS Liquid Argon Calorimeters at the High Luminosity LHC
NASA Astrophysics Data System (ADS)
Andeen, Timothy R.; ATLAS Liquid Argon Calorimeter Group
2012-12-01
The ATLAS liquid-argon calorimeters produce a total of 182,486 signals which are digitized and processed by the front-end and back-end electronics at every triggered event. In addition, the front-end electronics sum analog signals to provide coarsely grained energy sums, called trigger towers, to the first-level trigger system, which is optimized for nominal LHC luminosities. However, the pile-up background expected during the high luminosity phases of the LHC will be increased by factors of 3 to 7. An improved spatial granularity of the trigger primitives is therefore proposed in order to improve the identification performance for trigger signatures, like electrons or photons, at high background rejection rates. For the first upgrade phase in 2018, new Liquid Argon Trigger Digitizer Boards are being designed to receive higher granularity signals, digitize them on detector and send them via fast optical links to a new, off-detector digital processing system. The digital processing system applies digital filtering and identifies significant energy depositions. The refined trigger primitives are then transmitted to the first level trigger system to extract improved trigger signatures. The general concept of the upgraded liquid-argon calorimeter readout together with the various electronics components to be developed for such a complex system is presented. The research activities and architectural studies undertaken by the ATLAS Liquid Argon Calorimeter Group are described, particularly details of the on-going design of mixed-signal front-end electronics, of radiation tolerant optical-links, and of the high-speed off-detector digital processing system.
Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array
NASA Astrophysics Data System (ADS)
Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; González, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C. A.; Valiente-Dobón, J. J.
2015-12-01
In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.530/00 at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs.
The DIRC front-end electronics chain for BaBar
NASA Astrophysics Data System (ADS)
Bailly, P.; Beigbeder, C.; Bernier, R.; Breton, D.; Bonneaud, G.; Caceres, T.; Chase, R.; Chauveau, J.; Del Buono, L.; Dohou, F.; Ducorps, A.; Gastaldi, F.; Genat, J. F.; Hrisoho, A.; Imbert, P.; Lebbolo, H.; Matricon, P.; Oxoby, G.; Renard, C.; Roos, L.; Sen, S.; Thiebaux, C.; Truong, K.; Tocut, V.; Vasileiadis, G.; Va'Vra, J.; Verderi, M.; Warner, D.; Wilson, R. J.; Wormser, G.; Zhang, B.; Zomer, F.
2000-12-01
Recent results from the Front-End electronics of the Detector of Internally Reflected Cerenkov light (DIRC) for the BaBar experiment at SLAC (Stanford, USA) are presented. It measures to better than 1 ns the arrival time of Cerenkov photoelectrons detected in a 11000 phototubes array and their amplitude spectra. It mainly comprises 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom digital time to digital chips (TDC) for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected front up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test results of the pre-production chips are presented, as well as system tests.
Fast front-end electronics for semiconductor tracking detectors: Trends and perspectives
NASA Astrophysics Data System (ADS)
Rivetti, Angelo
2014-11-01
In the past few years, extensive research efforts pursued by both the industry and the academia have lead to major improvements in the performance of Analog to Digital Converters (ADCs) and Time to Digital Converters (TDCs). ADCs achieving 8-10 bit resolution, 50-100 MHz conversion frequency and less than 1 mW power consumption are the today's standard, while TDCs have reached sub-picosecond time resolution. These results have been made possible by architectural upgrades combined with the use of ultra deep submicron CMOS technologies with minimum feature size of 130 nm or smaller. Front-end ASICs in which a prompt digitization is followed by signal conditioning in the digital domain can now be envisaged also within the tight power budget typically available in high density tracking systems. Furthermore, tracking detectors embedding high resolution timing capabilities are gaining interest. In the paper, ADC's and TDC's developments which are of particular relevance for the design front-end electronics for semiconductor trackers are discussed along with the benefits and challenges of exploiting such high performance building blocks in implementing the next generation of ASICs for high granularity particle detectors.
Test of ATLAS RPCs Front-End electronics
NASA Astrophysics Data System (ADS)
Aielli, G.; Camarri, P.; Cardarelli, R.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Paoloni, A.; Pastori, E.; Santonico, R.
2003-08-01
The Front-End Electronics performing the ATLAS RPCs readout is a full custom 8 channels GaAs circuit, which integrates in a single die both the analog and digital signal processing. The die is bonded on the Front-End board which is completely closed inside the detector Faraday cage. About 50 000 FE boards are foreseen for the experiment. The complete functionality of the FE boards will be certificated before the detector assembly. We describe here the systematic test devoted to check the dynamic functionality of each single channel and the selection criteria applied. It measures and registers all relevant electronics parameters to build up a complete database for the experiment. The statistical results from more than 1100 channels are presented.
FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry
NASA Astrophysics Data System (ADS)
Alexanian, H.; Appelquist, G.; Bailly, P.; Benetta, R.; Berglund, S.; Bezamat, J.; Blouzon, F.; Bohm, C.; Breveglieri, L.; Brigati, S.; Cattaneo, P. W.; Dadda, L.; David, J.; Engström, M.; Genat, J. F.; Givoletti, M.; Goggi, V. G.; Gong, S.; Grieco, G. M.; Hansen, M.; Hentzell, H.; Holmberg, T.; Höglund, I.; Inkinen, S. J.; Kerek, A.; Landi, C.; Ledortz, O.; Lippi, M.; Lofstedt, B.; Lund-Jensen, B.; Maloberti, F.; Mutz, S.; Nayman, P.; Piuri, V.; Polesello, G.; Sami, M.; Savoy-Navarro, A.; Schwemling, P.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Ödmark, A.; Fermi Collaboration
1995-02-01
We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed {A}/{D} converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design.
A digital front-end and readout microsystem for calorimetry at LHC
NASA Astrophysics Data System (ADS)
Alippi, C.; Appelquist, G.; Berglund, S.; Bohm, C.; Breveglieri, L.; Brigati, S.; Carlson, P.; Cattaneo, P.; Dadda, L.; David, J.; Del Buono, L.; Dell'Acqua, A.; Engström, M.; Fumagalli, G.; Gatti, U.; Genat, J. F.; Goggi, G.; Hansen, M.; Hentzell, H.; Höglund, I.; Inkinen, S.; Kerek, A.; Lebbolo, H.; LeDortz, O.; Lofstedt, B.; Maloberti, F.; Nayman, P.; Persson, S.-T.; Piuri, V.; Salice, F.; Sami, M.; Savoy-Navarro, A.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Zitoun, R.
1994-04-01
A digital solution to the front-end electronics for calorimetric detectors at future supercolliders is presented. The solution is based on high speed {A}/{D} converters, a fully programmable pipeline/digital filter chain and local intelligence. Questions of error correction, fault-tolerance and system redundancy are also being considered. A system integration of a multichannel device in a multichip, Silicon-on-Silicon Microsystem hybrid, is used. This solution allows a new level of integration of complex analogue and digital functions, with an excellent flexibility in mixing technologies for the different functional blocks. It also allows a high degree of programmability at both the function and the system level, and offers the possibility of customising the microsystem with detector-specific functions.
Readout ASICs and Electronics for the 144-channel HAPDs for the Aerogel RICH at Belle II
NASA Astrophysics Data System (ADS)
Nishida, S.; Adachi, I.; Ikeda, H.; Hara, K.; Iijima, T.; Iwata, S.; Korpar, S.; Križan, P.; Kuroda, E.; Pestotnik, R.; Seljak, A.; Sumiyoshi, T.; Takagaki, H.
The particle identification (PID) device in the endcap of the Belle detector will be upgraded to a ring imaging Cherenkov counter (RICH) using aerogel as a radiator at the Belle II experiment. We develop the electronics to read out the 70,000 channels of hit information from the 144-channel hybrid avalanche photodetectors (HAPD), of the aerogel RICH detector. A readout ASIC is developed to digitize the HAPD signals, and was used in a beam test with the prototype detector. The performance and plan of the ASIC is reported in this study. We have also designed the readout electronics for the aerogel RICH, which consist of front-end boards with the ASICs merger boards to collect data from the front-end boards. A front-end board that fits in the actual available space for the aerogel RICH electronics was produced.
NASA Astrophysics Data System (ADS)
Cicuttin, Andres; Colavita, Alberto; Cerdeira, Alberto; Fratnik, Fabio; Vacchi, Andrea
1997-02-01
In this report we describe a mixed analog-digital integrated circuit (IC) designed as the front-end electronics for silicon strip-detectors for space applications. In space power consumption, compactness and robustness become critical constraints for a pre-amplifier design. The IC is a prototype with 32 complete channels, and it is intended for a large area particle tracker of a new generation of gamma ray telescopes. Each channel contains a charge sensitive amplifier, a pulse shaper, a discriminator and two digital buffers. The reference trip point of the discriminator is adjustable. This chip also has a custom PMOSFET transistor per channel, included in order to provide the high dynamic resistance needed to reverse-bias the strip diode. The digital part of the chip is used to store and serially shift out the state of the channels. There is also a storage buffer that allows the disabling of non-functioning channels if it is required by the data acquisition system. An input capacitance of 30 pF introduced at the input of the front-end produces less than 1000 electrons of RMS equivalent noise charge (ENC), for a total power dissipation of only 60 μW per channel. The chip was made using Orbit's 1.2 μm double poly, double metal n-well low noise CMOS process. The dimensions of the IC are 2400 μm × 8840 μm.
Loran digital phase-locked loop and RF front-end system error analysis
NASA Technical Reports Server (NTRS)
Mccall, D. L.
1979-01-01
An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.
A front-end readout Detector Board for the OpenPET electronics system
NASA Astrophysics Data System (ADS)
Choong, W.-S.; Abu-Nimeh, F.; Moses, W. W.; Peng, Q.; Vu, C. Q.; Wu, J.-Y.
2015-08-01
We present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is ``time stamped'' by a time-to-digital converter (TDC) implemented inside the FPGA . This digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.
A front-end readout Detector Board for the OpenPET electronics system
Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.; ...
2015-08-12
Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, whichmore » allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.« less
Status of the photomultiplier-based FlashCam camera for the Cherenkov Telescope Array
NASA Astrophysics Data System (ADS)
Pühlhofer, G.; Bauer, C.; Eisenkolb, F.; Florin, D.; Föhr, C.; Gadola, A.; Garrecht, F.; Hermann, G.; Jung, I.; Kalekin, O.; Kalkuhl, C.; Kasperek, J.; Kihm, T.; Koziol, J.; Lahmann, R.; Manalaysay, A.; Marszalek, A.; Rajda, P. J.; Reimer, O.; Romaszkan, W.; Rupinski, M.; Schanz, T.; Schwab, T.; Steiner, S.; Straumann, U.; Tenzer, C.; Vollhardt, A.; Weitzel, Q.; Winiarski, K.; Zietara, K.
2014-07-01
The FlashCam project is preparing a camera prototype around a fully digital FADC-based readout system, for the medium sized telescopes (MST) of the Cherenkov Telescope Array (CTA). The FlashCam design is the first fully digital readout system for Cherenkov cameras, based on commercial FADCs and FPGAs as key components for digitization and triggering, and a high performance camera server as back end. It provides the option to easily implement different types of trigger algorithms as well as digitization and readout scenarios using identical hardware, by simply changing the firmware on the FPGAs. The readout of the front end modules into the camera server is Ethernet-based using standard Ethernet switches and a custom, raw Ethernet protocol. In the current implementation of the system, data transfer and back end processing rates of 3.8 GB/s and 2.4 GB/s have been achieved, respectively. Together with the dead-time-free front end event buffering on the FPGAs, this permits the cameras to operate at trigger rates of up to several ten kHz. In the horizontal architecture of FlashCam, the photon detector plane (PDP), consisting of photon detectors, preamplifiers, high voltage-, control-, and monitoring systems, is a self-contained unit, mechanically detached from the front end modules. It interfaces to the digital readout system via analogue signal transmission. The horizontal integration of FlashCam is expected not only to be more cost efficient, it also allows PDPs with different types of photon detectors to be adapted to the FlashCam readout system. By now, a 144-pixel mini-camera" setup, fully equipped with photomultipliers, PDP electronics, and digitization/ trigger electronics, has been realized and extensively tested. Preparations for a full-scale, 1764 pixel camera mechanics and a cooling system are ongoing. The paper describes the status of the project.
The phase 1 upgrade of the CMS Pixel Front-End Driver
NASA Astrophysics Data System (ADS)
Friedl, M.; Pernicka, M.; Steininger, H.
2010-12-01
The pixel detector of the CMS experiment at the LHC is read out by analog optical links, sending the data to 9U VME Front-End Driver (FED) boards located in the electronics cavern. There are plans for the phase 1 upgrade of the pixel detector (2016) to add one more layer, while significantly cutting down the overall material budget. At the same time, the optical data transmission will be replaced by a serialized digital scheme. A plug-in board solution with a high-speed digital optical receiver has been developed for the Pixel-FED readout boards and will be presented along with first tests of the future optical link.
The OPERA muon spectrometer tracking electronics
NASA Astrophysics Data System (ADS)
Ambrosio, M.; Barichello, G.; Brugnera, R.; Carrara, E.; Consiglio, L.; Corradi, A.; Dal Corso, F.; Dusini, S.; Felici, G.; Garfagnini, A.; Manea, C.; Masone, V.; Paoloni, A.; Paoluzzi, G.; Papalino, G.; Parascandolo, P.; Sorrentino, G.; Spinetti, M.; Stanco, L.; Terranova, F.; Votano, L.
2004-11-01
The document describes the front-end electronics that instrument the spectrometer of the OPERA experiment. The spectrometer is made of two separate modules. Each module consists of 22 RPC planes equipped with horizontal and vertical strips readout for a total amount of about 25,000 digital channels. The front end electronics is self-triggered and has single plane readout capability. It is made of three different stages: the Front End Boards (FEBs) system, the Controller Boards (CBs) system and the Timing Boards (TBs) system. The FEB system provides discrimination of the strip incoming signals; a FAST OR output of the input signals is also available for trigger plane signal generation. FEBs discriminated signals are acquired by the CBs system that manages also the communication to the experiment DAQ and Slow Control interface. A Trigger Board allows to operate in both self-trigger (the FEB FAST OR signal starts the plane acquisition) or external-trigger (different conditions can be set on the OR signals generated from different planes) modes.
VLBI2010 Receiver Back End Comparison
NASA Technical Reports Server (NTRS)
Petrachenko, Bill
2013-01-01
VLBI2010 requires a receiver back-end to convert analog RF signals from the receiver front end into channelized digital data streams to be recorded or transmitted electronically. The back end functions are typically performed in two steps: conversion of analog RF inputs into IF bands (see Table 2), and conversion of IF bands into channelized digital data streams (see Tables 1a, 1b and 1c). The latter IF systems are now completely digital and generically referred to as digital back ends (DBEs). In Table 2 two RF conversion systems are compared, and in Tables 1a, 1b, and 1c nine DBE systems are compared. Since DBE designs are advancing rapidly, the data in these tables are only guaranteed to be current near the update date of this document.
The new front-end electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade
NASA Astrophysics Data System (ADS)
Gomes, A.
2016-02-01
We present the plans, design, and performance results to date for the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increased luminosity at the HL-LHC around 2025, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector. The new on-detector electronics contains five main parts: the front-end boards that connect directly to the photomultiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low voltage power supply. There are different options for implementing these subcomponents, which will be described. The new system contains new features that in the current version include power system redundancy, data collection redundancy, data transmission redundancy with 2 QSFP optical transceivers and Kintex-7 FPGAs with firmware enhanced scheme for single event upset mitigation. To date, we have built a Demonstrator—a fully functional prototype of the new system. Performance results and plans are presented.
AN INTERNET RACK MONITOR-CONTROLLER FOR APS LINAC RF ELECTRONICS UPGRADE
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ma, Hengjie; Smith, Terry; Nassiri, Alireza
To support the research and development in APS LINAC area, the existing LINAC rf control performance needs to be much improved, and thus an upgrade of the legacy LINAC rf electronics becomes necessary. The proposed upgrade plan centers on the concept of using a modern, network-attached, rackmount digital electronics platform –Internet Rack Monitor-Controller (or IRMC) to achieve the goal of modernizing the rf electronics at a lower cost. The system model of the envisioned IRMC is basically a 3-tier stack with a high-performance DSP in the mid-layer to perform the core tasks of real-time rf data processing and controls. Themore » Digital Front-End (DFE) attachment layer at bottom bridges the applicationspecific rf front-ends to the DSP. A network communication gateway, together with an embedded event receiver (EVR) in the top layer merges the Internet Rack MonitorController node into the networks of the accelerator controls infrastructure. Although the concept is very much in trend with today’s Internet-of-Things (IoT), this implementation has actually been used in the accelerators for over two decades.« less
Web-based DAQ systems: connecting the user and electronics front-ends
NASA Astrophysics Data System (ADS)
Lenzi, Thomas
2016-12-01
Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.
Digital front end electronics design for the EUSO photon detector
NASA Astrophysics Data System (ADS)
Musico, P.; Pallavicini, M.; Petrolini, A.; Pratolongo, F.
2003-09-01
In this paper we will present the design status of the Digital Front End Electronic system (DFEE), that will be used for the EUSO photon detector. The DFEE is able to count the single photoelectrons coming form the detector for a given time period, store the numbers in a memory buffer and read them out after a trigger, using a serial communication line. Because of space, mass and power consumption constraints, the system will be implemented in an ASIC using a deep submicron technology. The actual design follows the original ideas of the system, though adding several new functionalities. A fully functional prototype chip has been submitted for fabrication in fall 2002. Extensive tests will be performed on it both with bench instrumentations and with the real sensor (the multi anode photomultiplier Hamamatsu R7600-M64), expecting significant results by early Summer 2003. Future work is needed to convert the design into a more robust RAD-hard technology, suitable for space applications and to include in the final die an additional circuit used to optimize the performances at high photons rates: the Analog Front End Electronics (AFEE). Moreover the base board used to house the multi anode photomultipliers is presented: it is the back-bone of the microcell and will be the basic block used to build up the EUSO focal surface.
NASA Astrophysics Data System (ADS)
Liu, Wei; Wei, Tingcun; Li, Bo; Yang, Lifeng; Xue, Feifei; Hu, Yongcai
2016-05-01
This paper presents a 12-bit 1 MS/s successive approximation register-analog to digital converter (SAR-ADC) for the 32-channel front-end electronics of CZT-based PET imaging system. To reduce the capacitance mismatch, instead of the fractional capacitor, the unit capacitor is used as the bridge capacitor in the split-capacitor digital to analog converter (DAC) circuit. In addition, in order to eliminate the periodical DNL errors of -1 LSB which often exists in the SAR-ADC using the charge-redistributed DAC, a calibration algorithm is proposed and verified by the experiments. The proposed 12-bit 1 MS/s SAR-ADC is designed and implemented using a 0.35 μm CMOS technology, it occupies only an active area of 986×956 μm2. The measurement results show that, at the power supply of 3.3/5.0 V and the sampling rate of 1 MS/s, the ADC with calibration has a signal-to-noise-and-distortion ratio (SINAD) of 67.98 dB, the power dissipation of 5 mW, and a figure of merit (FOM) of 2.44 pJ/conv.-step. This ADC is with the features of high accuracy, low power and small layout area, it is especially suitable to the one-chip integration of the front-end readout electronics.
A Front-End electronics board for single photo-electron timing and charge from MaPMT
NASA Astrophysics Data System (ADS)
Giordano, F.; Breton, D.; Beigbeder, C.; De Robertis, G.; Fusco, P.; Gargano, F.; Liuzzi, R.; Loparco, F.; Mazziotta, M. N.; Rizzi, V.; Tocut, V.
2013-08-01
A Front-End (FE) design based on commercial operational amplifiers has been developed to read-out signals from a Multianode PhotoMultiplier Tube (MaPMT). The overall design has been optimised for single photo-electron signal from the Hamamatsu H8500. The signal is collected by a current sensitive preamplifier and then it is fed into both a ECL fast discriminator and a shaper for analog output readout in differential mode. The analog signal and the digital gates are then registered on VME ADC and TDC modules respectively. Performances in terms of linearity, gain and timing resolution will be discussed, presenting results obtained on a test bench with differentiated step voltage inputs and also with a prototype electronic board plugged into the H8500 PMT illuminated by a picosecond laser.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dam, P.; Nielsen, B.S.; Formenti, F.
1992-10-01
In this paper the Front End Readout electronics chain of the Forward Ring Imaging CHerenkov (FRICH) Detector used at the Delphi experiment of the Large Electron Positron (LEP) collider is presented. The system incorporates a wide band low noise preamplifier, mounted in the proximity of the MultiWire Proportional Chamber, an Amplifying-Discriminating-Multiple-xing FASTBUS unit for further signal amplification, discrimination and channel reduction and a LEP Time Digitizer FASTBUS unit for time digitization. The paper gives a general view of the detector and its electronics with particular emphasis on the novel characteristics and capabilities of the system.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zimmerman, T.
1997-12-01
This paper is distilled from a talk given at the 3rd International Meeting on Front End Electronics in Taos, N.M. on Nov. 7,1997. It is based on experience gained by designing and testing the SVX3 128 channel silicon strip detector readout chip. The SVX3 chip organization is shown in Fig. 1. The Front End section consists of an integrator and analog pipeline designed at Fermilab, and the Back End section is an ADC plus sparsification and readout logic designed at LBL. SVX3 is a deadtimeless readout chip, which means that the front end is acquiring low level analog signals whilemore » the back end is digitizing and reading out digital signals. It is thus a true mixed signal chip, and demands close attention to avoid disastrous coupling from the digital to the analog sections. SVX3 is designed in a bulk CMOS process (i.e., the circuits sit in a silicon substrate). In such a process, the substrate becomes a potential coupling path. This paper discusses the effect of the substrate resistivity on coupling, and also goes into a more general discussion of grounding and referencing in mixed signal designs and how low resistivity substrates can be used to advantage. Finally, an alternative power supply current conduction method for ASICs is presented as an additional advantage which can be obtained with low resistivity substrates. 1 ref., 13 figs., 1 tab.« less
NASA Astrophysics Data System (ADS)
Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Wang, Xinxin; Geng, Tianru; Yang, Hang; Liu, Shengquan; Han, Liang; Jin, Ge
2017-06-01
A front-end electronics prototype for the ATLAS small-strip Thin Gap Chamber (sTGC) based on gigabit Ethernet has been developed. The prototype is designed to read out signals of pads, wires, and strips of the sTGC detector. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 field-programmable gate array (FPGA) used for the VMM2 configuration and the events storage, and a gigabit Ethernet transceiver PHY chip for interfacing with a computer. The VMM2 chip is designed for the readout of the Micromegas detector and sTGC detector, which is composed of 64 linear front-end channels. Each channel integrates a charge-sensitive amplifier, a shaper, several analog-to-digital converters, and other digital functions. For a bunch-crossing interval of 25 ns, events are continuously read out by the FPGA and forwarded to the computer. The interface between the computer and the prototype has been measured to reach an error-free rate of 900 Mb/s, therefore making a very effective use of the available bandwidth. Additionally, the computer can control several prototypes of this kind simultaneously via the Ethernet interface. At present, the prototype will be used for the sTGC performance test. The features of the prototype are described in detail.
The electronics and data acquisition system for the DarkSide-50 veto detectors
NASA Astrophysics Data System (ADS)
Agnes, P.; Agostino, L.; Albuquerque, I. F. M.; Alexander, T.; Alton, A. K.; Arisaka, K.; Back, H. O.; Baldin, B.; Biery, K.; Bonfini, G.; Bossa, M.; Bottino, B.; Brigatti, A.; Brodsky, J.; Budano, F.; Bussino, S.; Cadeddu, M.; Cadoni, M.; Calaprice, F.; Canci, N.; Candela, A.; Cao, H.; Cariello, M.; Carlini, M.; Catalanotti, S.; Cavalcante, P.; Chepurnov, A.; Cocco, A. G.; Covone, G.; Crippa, L.; D'Angelo, D.; D'Incecco, M.; Davini, S.; De Cecco, S.; De Deo, M.; De Vincenzi, M.; Derbin, A.; Devoto, A.; Di Eusanio, F.; Di Pietro, G.; Edkins, E.; Empl, A.; Fan, A.; Fiorillo, G.; Fomenko, K.; Foster, G.; Franco, D.; Gabriele, F.; Galbiati, C.; Giganti, C.; Goretti, A. M.; Granato, F.; Grandi, L.; Gromov, M.; Guan, M.; Guardincerri, Y.; Hackett, B. R.; Herner, K. R.; Hungerford, E. V.; Ianni, Aldo; Ianni, Andrea; James, I.; Jollet, C.; Keeter, K.; Kendziora, C. L.; Kobychev, V.; Koh, G.; Korablev, D.; Korga, G.; Kubankin, A.; Li, X.; Lissia, M.; Lombardi, P.; Luitz, S.; Ma, Y.; Machulin, I. N.; Mandarano, A.; Mari, S. M.; Maricic, J.; Marini, L.; Martoff, C. J.; Meregaglia, A.; Meyers, P. D.; Miletic, T.; Milincic, R.; Montanari, D.; Monte, A.; Montuschi, M.; Monzani, M. E.; Mosteiro, P.; Mount, B. J.; Muratova, V. N.; Musico, P.; Napolitano, J.; Nelson, A.; Odrowski, S.; Orsini, M.; Ortica, F.; Pagani, L.; Pallavicini, M.; Pantic, E.; Parmeggiano, S.; Pelczar, K.; Pelliccia, N.; Pocar, A.; Pordes, S.; Pugachev, D. A.; Qian, H.; Randle, K.; Ranucci, G.; Razeto, A.; Reinhold, B.; Renshaw, A. L.; Riffard, Q.; Romani, A.; Rossi, B.; Rossi, N.; Rountree, S. D.; Sablone, D.; Saggese, P.; Saldanha, R.; Sands, W.; Sangiorgio, S.; Savarese, C.; Segreto, E.; Semenov, D. A.; Shields, E.; Singh, P. N.; Skorokhvatov, M. D.; Smirnov, O.; Sotnikov, A.; Stanford, C.; Suvorov, Y.; Tartaglia, R.; Tatarowicz, J.; Testera, G.; Tonazzo, A.; Trinchese, P.; Unzhakov, E. V.; Vishneva, A.; Vogelaar, R. B.; Wada, M.; Walker, S.; Wang, H.; Wang, Y.; Watson, A. W.; Westerdale, S.; Wilhelmi, J.; Wojcik, M. M.; Xiang, X.; Xu, J.; Yang, C.; Yoo, J.; Zavatarelli, S.; Zec, A.; Zhong, W.; Zhu, C.; Zuzel, G.
2016-12-01
DarkSide-50 is a detector for dark matter candidates in the form of weakly interacting massive particles. It utilizes a liquid argon time projection chamber for the inner main detector, surrounded by a liquid scintillator veto (LSV) and a water Cherenkov veto detector (WCV). The LSV and WCV act as the neutron and cosmogenic muon veto detectors for DarkSide-50. This paper describes the electronics and data acquisition system used for these two detectors. The system is made of a custom built front end electronics and commercial National Instruments high speed digitizers. The front end electronics, the DAQ, and the trigger system have been used to acquire data in the form of zero-suppressed waveform samples from the 110 PMTs of the LSV and the 80 PMTs of the WCV. The veto DAQ system has proven its performance and reliability. This electronics and DAQ system can be scaled and used as it is for the veto of the next generation DarkSide-20k detector.
Tests with beam setup of the TileCal phase-II upgrade electronics
NASA Astrophysics Data System (ADS)
Reward Hlaluku, Dingane
2017-09-01
The LHC has planned a series of upgrades culminating in the High Luminosity LHC which will have an average luminosity 5-7 times larger than the nominal Run-2 value. The ATLAS Tile calorimeter plans to introduce a new readout architecture by completely replacing the back-end and front-end electronics for the High Luminosity LHC. The photomultiplier signals will be fully digitized and transferred for every bunch crossing to the off-detector Tile PreProcessor. The Tile PreProcessor will further provide preprocessed digital data to the first level of trigger with improved spatial granularity and energy resolution in contrast to the current analog trigger signals. A single super-drawer module commissioned with the phase-II upgrade electronics is to be inserted into the real detector to evaluate and qualify the new readout and trigger concepts in the overall ATLAS data acquisition system. This new super-drawer, so-called hybrid Demonstrator, must provide analog trigger signals for backward compatibility with the current system. This Demonstrator drawer has been inserted into a Tile calorimeter module prototype to evaluate the performance in the lab. In parallel, one more module has been instrumented with two other front-end electronics options based on custom ASICs (QIE and FATALIC) which are under evaluation. These two modules together with three other modules composed of the current system electronics were exposed to different particles and energies in three test-beam campaigns during 2015 and 2016.
NASA Astrophysics Data System (ADS)
Li, H.; Wong, Wai-Hoi; Zhang, N.; Wang, J.; Uribe, J.; Baghaei, H.; Yokoyama, S.
1999-06-01
Electronics for a prototype high-resolution PET camera with eight position-sensitive detector modules has been developed. Each module has 16 BGO (Bi/sub 4/Ge/sub 3/O/sub 12/) blocks (each block is composed of 49 crystals). The design goals are component and space reduction. The electronics is composed of five parts: front-end analog processing, digital position decoding, fast timing, coincidence processing and master data acquisition. The front-end analog circuit is a zone-based structure (each zone has 3/spl times/3 PMTs). Nine ADCs digitize integration signals of an active zone identified by eight trigger clusters; each cluster is composed of six photomultiplier tubes (PMTs). A trigger corresponding to a gamma ray is sent to a fast timing board to obtain a time-mark, and the nine digitized signals are passed to the position decoding board, where a real block (four PMTs) can be picked out from the zone for position decoding. Lookup tables are used for energy discrimination and to identify the gamma-hit crystal location. The coincidence board opens a 70-ns initial timing window, followed by two 20-ns true/accidental time-mark lookup table windows. The data output from the coincidence board can be acquired either in sinogram mode or in list mode with a Motorola/IRONICS VME-based system.
NASA Astrophysics Data System (ADS)
Epstein, A.; Briquet-Laugier, F.; Sheldon, S.; Boulin, C.
2000-04-01
Most of the X-ray multi-wire gas detectors used at the EMBL Hamburg outstation for time-resolved studies of biological samples are readout, using the delay line method. The main disadvantage of such readout systems is their event rate limitation introduced by the delay line and the required time to digital conversion step. They also lack the possibility to deal with multiple events. To overcome these limitations, a new approach for the complete readout system was introduced. The new linear detection system is based on the wire per wire approach where each individual wire is associated to preamplifier/discriminator/counter electronics channel. High-density, front-end electronics were designed around a fast current sensitive preamplifier. An eight-channel board was designed to include the preamplifiers-discriminators and the differential ECL drivers output stages. The detector front-end consists of 25 boards directly mounted inside the detector assembly. To achieve a time framing resolution as short as 10 /spl mu/s, very fast histogramming is required. The only way to implement this for a high number of channels (200 in our case) is by using a distributed system. The digital part of the system consists of a crate controller, up to 16 acquisition boards (capable of handling fast histogramming for up to 32-channels each) and an optical-link board (based on the Cypress "Hot-Link" chip set). Both the crate controller and the acquisition boards are based on a standard RISC microcontroller (IDT R3081) plug-in board. At present, a dedicated CAMAC module which we developed is used to interface the digital front-end acquisition crate to the host via the optical link.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Agnes, P.; Agostino, L.; Albuquerque, I. F. M.
DarkSide-50 is a detector for dark matter candidates in the form of weakly interacting massive particles. It utilizes a liquid argon time projection chamber for the inner main detector, surrounded by a liquid scintillator veto (LSV) and a water Cherenkov veto detector (WCV). The LSV and WCV act as the neutron and cosmogenic muon veto detectors for DarkSide-50. This paper describes the electronics and data acquisition system used for these two detectors. The system is made of a custom built front end electronics and commercial National Instruments high speed digitizers. The front end electronics, the DAQ, and the trigger systemmore » have been used to acquire data in the form of zero-suppressed waveform samples from the 110 PMTs of the LSV and the 80 PMTs of the WCV. The veto DAQ system has proven its performance and reliability. This electronics and DAQ system can be scaled and used as it is for the veto of the next generation DarkSide-20k detector. Abstract (arXiv)« less
NASA Astrophysics Data System (ADS)
Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.
2016-03-01
The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.
GET: A generic electronics system for TPCs and nuclear physics instrumentation
NASA Astrophysics Data System (ADS)
Pollacco, E. C.; Grinyer, G. F.; Abu-Nimeh, F.; Ahn, T.; Anvar, S.; Arokiaraj, A.; Ayyad, Y.; Baba, H.; Babo, M.; Baron, P.; Bazin, D.; Beceiro-Novo, S.; Belkhiria, C.; Blaizot, M.; Blank, B.; Bradt, J.; Cardella, G.; Carpenter, L.; Ceruti, S.; De Filippo, E.; Delagnes, E.; De Luca, S.; De Witte, H.; Druillole, F.; Duclos, B.; Favela, F.; Fritsch, A.; Giovinazzo, J.; Gueye, C.; Isobe, T.; Hellmuth, P.; Huss, C.; Lachacinski, B.; Laffoley, A. T.; Lebertre, G.; Legeard, L.; Lynch, W. G.; Marchi, T.; Martina, L.; Maugeais, C.; Mittig, W.; Nalpas, L.; Pagano, E. V.; Pancin, J.; Poleshchuk, O.; Pedroza, J. L.; Pibernat, J.; Primault, S.; Raabe, R.; Raine, B.; Rebii, A.; Renaud, M.; Roger, T.; Roussel-Chomaz, P.; Russotto, P.; Saccà, G.; Saillant, F.; Sizun, P.; Suzuki, D.; Swartz, J. A.; Tizon, A.; Usher, N.; Wittwer, G.; Yang, J. C.
2018-04-01
General Electronics for TPCs (GET) is a generic, reconfigurable and comprehensive electronics and data-acquisition system for nuclear physics instrumentation of up to 33792 channels. The system consists of a custom-designed ASIC for signal processing, front-end cards that each house 4 ASIC chips and digitize the data in parallel through 12-bit ADCs, concentration boards to read and process the digital data from up to 16 ASICs, a 3-level trigger and master clock module to trigger the system and synchronize the data, as well as all of the associated firmware, communication and data-acquisition software. An overview of the system including its specifications and measured performances are presented.
Design and Development of the SMAP Microwave Radiometer Electronics
NASA Technical Reports Server (NTRS)
Piepmeier, Jeffrey R.; Medeiros, James J.; Horgan, Kevin A.; Brambora, Clifford K.; Estep, Robert H.
2014-01-01
The SMAP microwave radiometer will measure land surface brightness temperature at L-band (1413 MHz) in the presence of radio frequency interference (RFI) for soil moisture remote sensing. The radiometer design was driven by the requirements to incorporate internal calibration, to operate synchronously with the SMAP radar, and to mitigate the deleterious effects of RFI. The system design includes a highly linear super-heterodyne microwave receiver with internal reference loads and noise sources for calibration and an innovative digital signal processor and detection system. The front-end comprises a coaxial cable-based feed network, with a pair of diplexers and a coupled noise source, and radiometer front-end (RFE) box. Internal calibration is provided by reference switches and a common noise source inside the RFE. The RF back-end (RBE) downconverts the 1413 MHz channel to an intermediate frequency (IF) of 120 MHz. The IF signals are then sampled and quantized by high-speed analog-to-digital converters in the radiometer digital electronics (RDE) box. The RBE local oscillator and RDE sampling clocks are phase-locked to a common reference to ensure coherency between the signals. The RDE performs additional filtering, sub-band channelization, cross-correlation for measuring third and fourth Stokes parameters, and detection and integration of the first four raw moments of the signals. These data are packetized and sent to the ground for calibration and further processing. Here we discuss the novel features of the radiometer hardware particularly those influenced by the need to mitigate RFI.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Gao, W.; Yin, J.; Li, C.
This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by amore » FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)« less
The Mobile Internet -The Next Big Thing. Electrons & Photons: You Need Both! (BRIEFING CHARTS)
2007-03-05
Links Network Centric Warfighting Comms Wired & Wireless Links 20th Century 21th Century The Military Comms Problem Network Centric Operationst t i ti...Small Unit Operations TEL Underwater Vehicles & Towed Arrays RC-135V Rivet Joint Tier II+ UAV Global Hawk E-2C Hawkeye Networked Manned and Unmanned...RF Front-End Solutions ● >20 DARPA/MTO RF Programs across the spectrum - RF & Mixed Signal Electronics - Analog & Digital Photonics Enables Network
An RFID tag system-on-chip with wireless ECG monitoring for intelligent healthcare systems.
Wang, Cheng-Pin; Lee, Shuenn-Yuh; Lai, Wei-Chih
2013-01-01
This paper presents a low-power wireless ECG acquisition system-on-chip (SoC), including an RF front-end circuit, a power unit, an analog front-end circuit, and a digital circuitry. The proposed RF front-end circuit can provide the amplitude shift keying demodulation and distance to digital conversion to accurately receive the data from the reader. The received data will wake up the power unit to provide the required supply voltages of analog front-end (AFE) and digital circuitry. The AFE, including a pre-amplifier, an analog filter, a post-amplifier, and an analog-to-digital converter, is used for the ECG acquisition. Moreover, the EPC Class I Gen 2 UHF standard is employed in the digital circuitry for the handshaking of communication and the control of the system. The proposed SoC has been implemented in 0.18-µm standard CMOS process and the measured results reveal the communication is compatible to the RFID protocol. The average power consumption for the operating chip is 12 µW. Using a Sony PR44 battery to the supply power (605mAh@1.4V), the RFID tag SoC operates continuously for about 50,000 hours (>5 years), which is appropriate for wireless wearable ECG monitoring systems.
NASA Astrophysics Data System (ADS)
Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.
2018-01-01
Gotthard-II is a 1-D microstrip detector specifically developed for the European X-ray Free-Electron Laser. It will not only be used in energy dispersive experiments but also as a beam diagnostic tool with additional logic to generate veto signals for the other 2-D detectors. Gotthard-II makes use of a silicon microstrip sensor with a pitch of either 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to adaptive gain switching readout chips. Built-in analog-to-digital converters and digital memories will be implemented in the readout chip for a continuous conversion and storage of frames for all bunches in the bunch train. The performance of analogue front-end prototypes of Gotthard has been investigated in this work. The results in terms of noise, conversion gain, dynamic range, obtained by means of infrared laser and X-rays, will be shown. In particular, the effects of the strip-to-strip coupling are studied in detail and it is found that the reduction of the coupling effects is one of the key factors for the development of the analogue front-end of Gotthard-II.
Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments
NASA Astrophysics Data System (ADS)
Prele, D.
2015-08-01
As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.
The Phase-2 electronics upgrade of the ATLAS liquid argon calorimeter system
NASA Astrophysics Data System (ADS)
Vachon, B.
2018-03-01
The LHC high-luminosity upgrade in 2024-2026 requires the associated detectors to operate at luminosities about 5-7 times larger than assumed in their original design. The pile-up is expected to increase to up to 200 events per proton bunch-crossing. The current readout of the ATLAS liquid argon calorimeters does not provide sufficient buffering and bandwidth capabilities to accommodate the hardware triggers requirements imposed by these harsh conditions. Furthermore, the expected total radiation doses are beyond the qualification range of the current front-end electronics. For these reasons an almost complete replacement of the front-end and off-detector readout system is foreseen for the 182,468 readout channels. The new readout system will be based on a free-running architecture, where calorimeter signals are amplified, shaped and digitized by on-detector electronics, then sent at 40 MHz to the off-detector electronics for further processing. Results from the design studies on the performance of the components of the readout system are presented, as well as the results of the tests of the first prototypes.
Optimizing read-out of the NECTAr front-end electronics
NASA Astrophysics Data System (ADS)
Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.
2012-12-01
We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.
A new data acquisition system for the CMS Phase 1 pixel detector
NASA Astrophysics Data System (ADS)
Kornmayer, A.
2016-12-01
A new pixel detector will be installed in the CMS experiment during the extended technical stop of the LHC at the beginning of 2017. The new pixel detector, built from four layers in the barrel region and three layers on each end of the forward region, is equipped with upgraded front-end readout electronics, specifically designed to handle the high particle hit rates created in the LHC environment. The DAQ back-end was entirely redesigned to handle the increased number of readout channels, the higher data rates per channel and the new digital data format. Based entirely on the microTCA standard, new front-end controller (FEC) and front-end driver (FED) cards have been developed, prototyped and produced with custom optical link mezzanines mounted on the FC7 AMC and custom firmware. At the same time as the new detector is being assembled, the DAQ system is set up and its integration into the CMS central DAQ system tested by running the pilot blade detector already installed in CMS. This work describes the DAQ system, integration tests and gives an outline for the activities up to commissioning the final system at CMS in 2017.
The DIRC front-end electronics chain for BaBar
NASA Astrophysics Data System (ADS)
Bailly, P.; Chauveau, J.; Del Buono, L.; Genat, J. F.; Lebbolo, H.; Roos, L.; Zhang, B.; Beigbeder, C.; Bernier, R.; Breton, D.; Caceres, T.; Chase, R.; Ducorps, A.; Hrisoho, A.; Imbert, P.; Sen, S.; Tocut, V.; Truong, K.; Wormser, G.; Zomer, F.; Bonneaud, G.; Dohou, F.; Gastaldi, F.; Matricon, P.; Renard, C.; Thiebaux, C.; Vasileiadis, G.; Verderi, M.; Oxoby, G.; Va'Vra, J.; Warner, D.; Wilson, R. J.
1999-08-01
The detector of Internally Reflected Cherenkov light (DIRC) of the BaBar detector (SLAC Stanford, USA) measures better than 1 ns the arrival time of Cherenkov photoelectrons, detected in a 11 000 phototubes array and their amplitude spectra. It mainly comprises of 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom Analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom Digital TDC chips for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected from up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test of the pre-production chips have been performed as well as system tests.
Real-time multiplicity counter
Rowland, Mark S [Alamo, CA; Alvarez, Raymond A [Berkeley, CA
2010-07-13
A neutron multi-detector array feeds pulses in parallel to individual inputs that are tied to individual bits in a digital word. Data is collected by loading a word at the individual bit level in parallel. The word is read at regular intervals, all bits simultaneously, to minimize latency. The electronics then pass the word to a number of storage locations for subsequent processing, thereby removing the front-end problem of pulse pileup.
Depth Of Modulation And Spot Size Selection In Bar-Code Laser Scanners
NASA Astrophysics Data System (ADS)
Barkan, Eric; Swartz, Jerome
1982-04-01
Many optical and electronic considerations enter into the selection of optical spot size in flying spot laser scanners of the type used in modern industrial and commerical environments. These include: the scale of the symbols to be read, optical background noise present in the symbol substrate, and factors relating to the characteristics of the signal processor. Many 'front ends' consist of a linear signal conditioner followed by nonlinear conditioning and digitizing circuitry. Although the nonlinear portions of the circuit can be difficult to characterize mathematically, it is frequently possible to at least give a minimum depth of modulation measure to yield a worst-case guarantee of adequate performance with respect to digitization accuracy. Depth of modulation actually delivered to the nonlinear circuitry will depend on scale, contrast, and noise content of the scanned symbol, as well as the characteristics of the linear conditioning circuitry (eg. transfer function and electronic noise). Time and frequency domain techniques are applied in order to estimate the effects of these factors in selecting a spot size for a given system environment. Results obtained include estimates of the effects of the linear front end transfer function on effective spot size and asymmetries which can affect digitization accuracy. Plots of convolution-computed modulation patterns and other important system properties are presented. Considerations are limited primarily to Gaussian spot profiles but also apply to more general cases. Attention is paid to realistic symbol models and to implications with respect to printing tolerances.
Front-end electronics for the Muon Portal project
NASA Astrophysics Data System (ADS)
Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M. C.; Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D. G.; Fallica, G.; Valvo, G.
2016-10-01
The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.
Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development
NASA Astrophysics Data System (ADS)
Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.
2017-12-01
Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.
Electronic readout system for the Belle II imaging Time-Of-Propagation detector
NASA Astrophysics Data System (ADS)
Kotchetkov, Dmitri
2017-07-01
The imaging Time-Of-Propagation (iTOP) detector, constructed for the Belle II experiment at the SuperKEKB e+e- collider, is an 8192-channel high precision Cherenkov particle identification detector with timing resolution below 50 ps. To acquire data from the iTOP, a novel front-end electronic readout system was designed, built, and integrated. Switched-capacitor array application-specific integrated circuits are used to sample analog signals. Triggering, digitization, readout, and data transfer are controlled by Xilinx Zynq-7000 system on a chip devices.
Testing of Front End Electronics for 10ps Time of Flight Detectors
NASA Astrophysics Data System (ADS)
Kimball, Matthew; EIC PID Consortium Collaboration
2016-09-01
To fully achieve the physics goals of the future Electron Ion Collider (EIC), continued development of the detectors involved is needed. One area of research involves improving the timing resolution of Time of Flight (ToF) detectors from 100ps to 10ps. When the timing resolution of these ToF detectors is improved, better particle identification can be achieved. In addition, as ToF detectors are being constructed with ever improving timing resolution, the need to improve the high speed performance of the fast electronics used in their front-end electronics (FEE) increases. A series of careful measurements has been performed to investigate the performance and efficiency of each element in the FEE chain. The focus of these tests lies on the amplitude transmission efficiency of the high speed signals as a function of frequency, also known as the bandwidth. The components tested include balanced to unbalanced (balun) boards, signal pre-amps, and waveform digitizers. These tests were performed on individual components and with all elements connected over a frequency range of 1MHz to 1GHz. The results of these tests will be presented. This research was supported by US DOE MENP Grant DE-FG02-03ER41243.
Front-end electronics development for TPC detector in the MPD/NICA project
NASA Astrophysics Data System (ADS)
Cheremukhina, G.; Movchan, S.; Vereschagin, S.; Zaporozhets, S.
2017-06-01
The article is aimed at describing the development status, measuring results and design changes of the TPC front-end electronics. The TPC is placed in the middle of Multi-Purpose Detector (MPD) and provides tracing and identifying of charged particles in the pseudorapidity range |η| < 1.2. The readout system is one of the most complex parts of the TPC. The electronics of each readout chamber is an independent system. The whole system contains 95232 channels, 1488 64-channel—front-end cards (FEC), 24 readout control units (RCU). The front-end electronics (FEE) is based on ASICs, FPGAs and high-speed serial links. The concept of the TPC front-end electronics has been motivated from one side—by the requirements concerning the NICA accelerator complex which will operate at the luminosity up to 1027 cm-2 s-1 for Au79+ ions over the energy range of 4 < √SNN < 11 GeV with the trigger rate up to 7 kHz and from the other side—by the requirements of the 4-π geometry to minimize the substance on the end-caps of the TPC.
Integration of the GET electronics for the CHIMERA and FARCOS devices
NASA Astrophysics Data System (ADS)
De Filippo, E.; Acosta, L.; Auditore, L.; Boiano, C.; Cardella, G.; Castoldi, A.; D’Andrea, M.; De Luca, S.; Favela, F.; Fichera, F.; Giudice, N.; Gnoffo, B.; Grimaldi, A.; Guazzoni, C.; Lanzalone, G.; Librizzi, F.; Litrico, P.; Maiolino, C.; Maffesanti, S.; Martorana, NS; Pagano, A.; Pagano, EV; Papa, M.; Parsani, T.; Passaro, G.; Pirrone, S.; Politi, G.; Previdi, F.; Quattrocchi, L.; Rizzo, F.; Russotto, P.; Saccà, G.; Salemi, G.; Sciliberto, D.; Trifirò, A.; Trimarchi, M.
2018-05-01
A new front-end based on digital GET electronics has been adopted for the readout of the CsI(Tl) detectors of the CHIMERA 4π multi-detector and for the new modular Femtoscopy Array for Correlation and Spectroscopy (FARCOS). It is expected that the coupling of CHIMERA with the FARCOS array, featuring high angular and energy resolution, and the adoption of the new digital electronics will be well suited for improving specific future data analysis, with the full shape storage of the signals, in the field of heavy ion reactions with stable and exotic beams around the Fermi energies domain. Integration of the GET electronics with CHIMERA and FARCOS devices and with the local analog data acquisition will be briefly discussed. We present some results from previous experimental tests and from the first in-beam experiment (Hoyle-Gamma) with the coupled GET+CHIMERA data acquisition.
A custom readout electronics for the BESIII CGEM detector
NASA Astrophysics Data System (ADS)
Da Rocha Rolo, M.; Alexeev, M.; Amoroso, A.; Baldini Ferroli, R.; Bertani, M.; Bettoni, D.; Bianchi, F.; Bugalho, R.; Calcaterra, A.; Canale, N.; Capodiferro, M.; Carassiti, V.; Cerioni, S.; Chai, J. Y.; Chiozzi, S.; Cibinetto, G.; Cossio, F.; Cotta Ramusino, A.; De Mori, F.; Destefanis, M.; Di Francesco, A.; Dong, J.; Evangelisti, F.; Farinelli, R.; Fava, L.; Felici, G.; Fioravanti, E.; Garzia, I.; Gatta, M.; Greco, M.; Lavezzi, L.; Leng, C. Y.; Li, H.; Maggiora, M.; Malaguti, R.; Marcello, S.; Marciniewski, P.; Melchiorri, M.; Mezzadri, G.; Mignone, M.; Morello, G.; Pacetti, S.; Patteri, P.; Pellegrino, J.; Pelosi, A.; Rivetti, A.; Savrié, M.; Scodeggio, M.; Soldani, E.; Sosio, S.; Spataro, S.; Tskhadadze, E.; Varela, J.; Verma, S.; Wheadon, R.; Yan, L.
2017-07-01
For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under development. The analogue readout of the CGEM enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 μm while loosening the pitch strip to 650 μm, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, providing a time and charge measurement and featuring a fully-digital output. The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates in excess of 60 kHz per channel. The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a CSA and a two-stage complex conjugated pole shapers, dominate the channel intrinsic time jitter, which is less than 5 ns r.m.s. The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad. Event data is collected by an off-detector motherboard, where each GEM-ROC readout card handles 4 ASIC carrier FEBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data collector cards are managed by bi-directional fibre optical links. This paper covers the design of a custom front-end electronics for the readout of the new inner tracker of the BESIII experiment, addressing the relevant design aspects of the detector electronics and the front-end ASIC for the CGEM readout, and reviewing the first silicon results of the chip prototype.
Recent advances in the front-end sources of the LMJ fusion laser
NASA Astrophysics Data System (ADS)
Gleyze, Jean-François; Hares, Jonathan; Vidal, Sebastien; Beck, Nicolas; Dubertrand, Jerome; Perrin, Arnaud
2011-03-01
LMJ is typical of lasers used for inertial confinement fusion and requires a laser of programmable parameters for injection into the main amplifier. For several years, the CEA has developed front end fiber sources, based on telecommunications fiber optics technologies. These sources meet the needs but as the technology evolves we can expect improved efficiency and reductions in size and cost. We give an up-to-date description of some present development issues, particularly in the field of temporal shaping with the use of digital system. The synchronization of such electronics has been challenging however we now obtain system jitter of less then 7ps rms. Secondly, we will present recent advance in the use of fiber based pre-comp system to avoid parasitic amplitude modulation from phase modulation used for spectral broadening.
Conceptual design of front ends for the advanced photon source multi-bend achromats upgrade
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jaski, Y., E-mail: jaskiy@aps.anl.gov; Westferro, F., E-mail: westferr@aps.anl.gov; Lee, S. H., E-mail: shlee@aps.anl.gov
2016-07-27
The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less
Conceptual Design of Front Ends for the Advanced Photon Source Multi-bend Achromats Upgrade
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jaski, Y.; Westferro, F.; Lee, S. H.
2016-07-27
The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less
Onboard calibration circuit for the DAMPE BGO calorimeter front-end electronics
NASA Astrophysics Data System (ADS)
Zhang, De-Liang; Feng, Chang-Qing; Zhang, Jun-Bin; Wang, Qi; Ma, Si-Yuan; Shen, Zhong-Tao; Jiang, Di; Gao, Shan-Shan; Zhang, Yun-Long; Guo, Jian-Hua; Liu, Shu-Bin; An, Qi
2016-05-01
DAMPE (DArk Matter Particle Explorer) is a scientific satellite which is mainly aimed at indirectly searching for dark matter in space. One critical sub-detector of the DAMPE payload is the BGO (bismuth germanium oxide) calorimeter, which contains 1848 PMT (photomultiplier tube) dynodes and 16 FEE (Front-End Electronics) boards. VA160 and VATA160, two 32-channel low power ASICs (Application Specific Integrated Circuits), are adopted as the key components on the FEEs to perform charge measurement for the PMT signals. In order to monitor the parameter drift which may be caused by temperature variation, aging, or other environmental factors, an onboard calibration circuit is designed for the VA160 and VATA160 ASICs. It is mainly composed of a 12-bit DAC (Digital to Analog Converter), an operational amplifier and an analog switch. Test results showed that a dynamic range of 0-30 pC with a precision of 5 fC (Root Meam Square, RMS) was achieved, which covers the VA160’s input range. It can be used to compensate for the temperature drift and test the trigger function of the FEEs. The calibration circuit has been implemented for the front-end electronics of the BGO Calorimeter and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite was launched at the end of 2015 and the calibration circuit will operate periodically in space. Supported by Strategic Priority Research Program on Space Science of Chinese Academy of Sciences (XDA04040202-4), and National Basic Research Program (973 Program) of China (2010CB833002) and National Natural Science Foundation of China (11273070)
Wang, Yulin; Tian, Xuelong
2014-08-01
In order to improve the speech quality and auditory perceptiveness of electronic cochlear implant under strong noise background, a speech enhancement system used for electronic cochlear implant front-end was constructed. Taking digital signal processing (DSP) as the core, the system combines its multi-channel buffered serial port (McBSP) data transmission channel with extended audio interface chip TLV320AIC10, so speech signal acquisition and output with high speed are realized. Meanwhile, due to the traditional speech enhancement method which has the problems as bad adaptability, slow convergence speed and big steady-state error, versiera function and de-correlation principle were used to improve the existing adaptive filtering algorithm, which effectively enhanced the quality of voice communications. Test results verified the stability of the system and the de-noising performance of the algorithm, and it also proved that they could provide clearer speech signals for the deaf or tinnitus patients.
Kong, Wei; Huang, Jian; Rollins, Dennis L; Ideker, Raymond E; Smith, William M
2007-03-01
We have developed an eight-channel telemetry system for studying experimental models of chronic cardiovascular disease. The system is an extension of a previous device that has been miniaturized, reduced in power consumption and provided with increased functionality. We added sensors for ventricular dimension, and coronary artery blood flow and arterial blood pressure that are suitable for use with the system. The telemetry system consists of a front end, a backpack and a host PC. The front end is a watertight stainless steel case with all sensor electronics sealed inside; it acquires dimension, flow, pressure and five cardiac electrograms from selected locations on the heart. The backpack includes a control unit, Bluetooth radio, and batteries. The control unit digitizes eight channels of data from the front end and forwards them to the host PC via Bluetooth link. The host PC has a receiving Bluetooth radio and Labview programs to store and display data. The whole system was successfully tested on the bench and in an animal model. This telemetry system will greatly enhance the ability to study events leading to spontaneous sudden cardiac arrest.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.
Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, whichmore » allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.« less
Proof of concept of an imaging system demonstrator for PET applications with SiPM
NASA Astrophysics Data System (ADS)
Morrocchi, Matteo; Marcatili, Sara; Belcari, Nicola; Giuseppina Bisogni, Maria; Collazuol, Gianmaria; Ambrosi, Giovanni; Santoni, Cristiano; Corsi, Francesco; Foresta, Maurizio; Marzocca, Cristoforo; Matarrese, Gianvito; Sportelli, Giancarlo; Guerra, Pedro; Santos, Andres; Del Guerra, Alberto
2013-08-01
A PET imaging system demonstrator based on LYSO crystal arrays coupled to SiPM matrices is under construction at the University and INFN of Pisa. Two SiPM matrices, composed of 8×8 SiPM pixels, and 1,5 mm pitch, have been coupled one to one to a LYSO crystals array and read out by a custom electronics system. front-end ASICs were used to read 8 channels of each matrix. Data from each front-end were multiplexed and sent to a DAQ board for the digital conversion; a motherboard collects the data and communicates with a host computer through a USB port for the storage and off-line data processing. In this paper we show the first preliminary tomographic image of a point-like radioactive source acquired with part of the two detection heads in time coincidence.
Solid-State Photomultiplier with Integrated Front End Electronics
NASA Astrophysics Data System (ADS)
Christian, James; Stapels, Christopher; Johnson, Erik; Mukhopadhyay, Sharmistha; Jie Chen, Xiao; Miskimen, Rory
2009-10-01
The instrumentation cost of physics experiments has been reduced per channel, by the use of solid-state detectors, but these cost-effective techniques have not been translated to scintillation-based detectors. When considering photodetectors, the cost per channel is determined by the use of high-voltage, analog-to-digital converters, BNC cables, and any other ancillary devices. The overhead associated with device operation limits the number of channels for the detector system, while potentially limiting the scope of physics that can be explored. The PRIMEX experiment at JLab, which is being designed to measure the radiative widths of the η and η' pseudo-scalar mesons for a more comprehensive understanding of QCD at low energies, is an example where CMOS solid-state photomultipliers (SSPMs) can be implemented. The ubiquitous nature of CMOS allows for on-chip signal processing to provide front-end electronics within the detector package. We present the results of the device development for the PRIMEX calorimeter, discussing the characteristics of SSPMs, the potential cost savings, and experimental results of on-chip signal processing.
A configurable electronics system for the ESS-Bilbao beam position monitors
NASA Astrophysics Data System (ADS)
Muguira, L.; Belver, D.; Etxebarria, V.; Varnasseri, S.; Arredondo, I.; del Campo, M.; Echevarria, P.; Garmendia, N.; Feuchtwanger, J.; Jugo, J.; Portilla, J.
2013-09-01
A versatile and configurable system has been developed in order to monitorize the beam position and to meet all the requirements of the future ESS-Bilbao Linac. At the same time the design has been conceived to be open and configurable so that it could eventually be used in different kinds of accelerators, independent of the charged particle, with minimal change. The design of the Beam Position Monitors (BPMs) system includes a test bench both for button-type pick-ups (PU) and striplines (SL), the electronic units and the control system. The electronic units consist of two main parts. The first part is an Analog Front-End (AFE) unit where the RF signals are filtered, conditioned and converted to base-band. The second part is a Digital Front-End (DFE) unit which is based on an FPGA board where the base-band signals are sampled in order to calculate the beam position, the amplitude and the phase. To manage the system a Multipurpose Controller (MC) developed at ESSB has been used. It includes the FPGA management, the EPICS integration and Archiver Instances. A description of the system and a comparison between the performance of both PU and SL BPM designs measured with this electronics system are fully described and discussed.
Smart Antenna UKM Testbed for Digital Beamforming System
NASA Astrophysics Data System (ADS)
Islam, Mohammad Tariqul; Misran, Norbahiah; Yatim, Baharudin
2009-12-01
A new design of smart antenna testbed developed at UKM for digital beamforming purpose is proposed. The smart antenna UKM testbed developed based on modular design employing two novel designs of L-probe fed inverted hybrid E-H (LIEH) array antenna and software reconfigurable digital beamforming system (DBS). The antenna is developed based on using the novel LIEH microstrip patch element design arranged into [InlineEquation not available: see fulltext.] uniform linear array antenna. An interface board is designed to interface to the ADC board with the RF front-end receiver. The modular concept of the system provides the capability to test the antenna hardware, beamforming unit, and beamforming algorithm in an independent manner, thus allowing the smart antenna system to be developed and tested in parallel, hence reduces the design time. The DBS was developed using a high-performance [InlineEquation not available: see fulltext.] floating-point DSP board and a 4-channel RF front-end receiver developed in-house. An interface board is designed to interface to the ADC board with the RF front-end receiver. A four-element receiving array testbed at 1.88-2.22 GHz frequency is constructed, and digital beamforming on this testbed is successfully demonstrated.
Front-end electronics of the Belle II drift chamber
NASA Astrophysics Data System (ADS)
Shimazaki, Shoichi; Taniguchi, Takashi; Uchida, Tomohisa; Ikeno, Masahiro; Taniguchi, Nanae; Tanaka, Manobu M.
2014-01-01
This paper describes the performance of the Belle II central drift chamber (CDC) front-end electronics. The front-end electronics consists of a current sensitive preamplifier, a 1/t cancellation circuit, baseline restorers, a comparator for timing measurement and an analog buffer for the dE/dx measurement on a CDC readout card. The CDC readout card is located on the endplate of the CDC. Mass production will be completed after the performance of the chip is verified. The electrical performance and results of a neutron/gamma-ray irradiation test are reported here.
Noise propagation effects in power supply distribution systems for high-energy physics experiments
NASA Astrophysics Data System (ADS)
Arteche, F.; Rivetta, C.; Iglesias, M.; Echeverria, I.; Pradas, A.; Arcega, F. J.
2017-12-01
High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. This paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.
Noise propagation effects in power supply distribution systems for high-energy physics experiments
Arteche, F.; Rivetta, C.; Iglesias, M.; ...
2017-12-05
High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. Here, this paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. Lastly, this analysis is part of the electromagnetic compatibility based design focused onmore » functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less
Noise propagation effects in power supply distribution systems for high-energy physics experiments
DOE Office of Scientific and Technical Information (OSTI.GOV)
Arteche, F.; Rivetta, C.; Iglesias, M.
High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. Here, this paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. Lastly, this analysis is part of the electromagnetic compatibility based design focused onmore » functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less
Plastic Scintillator Based Detector for Observations of Terrestrial Gamma-ray Flashes.
NASA Astrophysics Data System (ADS)
Barghi, M. R., Sr.; Delaney, N.; Forouzani, A.; Wells, E.; Parab, A.; Smith, D.; Martinez, F.; Bowers, G. S.; Sample, J.
2017-12-01
We present an overview of the concept and design of the Light and Fast TGF Recorder (LAFTR), a balloon borne gamma-ray detector designed to observe Terrestrial Gamma-Ray Flashes (TGFs). Terrestrial Gamma-Ray Flashes (TGFs) are extremely bright, sub-millisecond bursts of gamma-rays observed to originate inside thunderclouds coincident with lightning. LAFTR is joint institutional project built by undergraduates at the University of California Santa Cruz and Montana State University. It consists of a detector system fed into analog front-end electronics and digital processing. The presentation focuses specifically on the UCSC components, which consists of the detector system and analog front-end electronics. Because of the extremely high count rates observed during TGFs, speed is essential for both the detector and electronics of the instrument. The detector employs a fast plastic scintillator (BC-408) read out by a SensL Silicon Photomultiplier (SiPM). BC-408 is chosen for its speed ( 4 ns decay time) and low cost and availability. Furthermore, GEANT3 simulations confirm the scintillator is sensitive to 500 counts at 7 km horizontal distance from the TGF source (for a 13 km source altitude and 26 km balloon altitude) and to 5 counts out to 20 km. The signal from the SiPM has a long exponential decay tail and is sent to a custom shaping circuit board that amplifies and shapes the signal into a semi-Gaussian pulse with a 40 ns FWHM. The signal is then input to a 6-channel discriminator board that clamps the signal and outputs a Low Voltage Differential Signal (LVDS) for processing by the digital electronics.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Evans, David Edward
A description of the development of the mc_runjob software package used to manage large scale computing tasks for the D0 Experiment at Fermilab is presented, along with a review of the Digital Front End Trigger electronics and the software used to control them. A tracking study is performed on detector data to determine that the D0 Experiment can detect charged B mesons, and that these results are in accordance with current results. B mesons are found by searching for the decay channel B ± → J / Ψ K ± .
Embedded electronics for a 64-channel wireless brain implant
NASA Astrophysics Data System (ADS)
Burgert, Johann D.; Malasek, Jan; Martel, Sylvain M.; Wiseman, Colette; Fofonoff, Timothy; Dyer, Robert; Hunter, Ian W.; Hatsopoulos, Nicholas; Donoghue, John
2001-10-01
The Telemetric Electrode Array System (TEAS) is a surgically implantable device for the study of neural activity in the brain. An 8x8 array of electrodes collects intra-cortical neural signals and connects them to an analog front end. The front end amplifies and digitizes these microvolt-level signals with 12 bits of resolution and at 31KHz per channel. Peak detection is used to extract the information carrying features of these signals, which are transmitted over a Bluetooth-based radio link at 725 Kbit/sec. The electrode array is made up of 1mm tall, 60-micron square electrodes spaced 500 microns tip-to-tip. A flex circuit connector provides mechanical isolation between the brain and the electronics, which are mounted to the cranium. Power consumption and management is a critical aspect of the design. The entire system must operate off a surgically implantable battery. With this power source, the system must provide the functionality of a wireless, 64-channel oscilloscope for several hours. The system also provides a low-power sleep mode during which the battery can be inductively charged. Power dissipation and biocompatibility issues also affect the design of the electronics for the probe. The electronics system must fit between the skull and the skin of the test subject. Thus, circuit miniaturization and microassembly techniques are essential to construct the probe's electronics.
USSR and Eastern Europe Scientific Abstracts, Electronics and Electrical Engineering, Number 24.
1976-11-12
GERMANY DUMMER, Joachim, graduate mathematician, and KLEIN, Richard, graduate engineer, Radio Works Combine State Enterprise, Erfurt DIGITAL FRONT PANEL ...operation, performance, and applications of a digital front panel display instrument was described and illustrated with circuit diagrams, block diagrams...technics, various digital and alphabetic panels , holography, and possibly the screens of cathode-ray tubes. One of the chief merits of "ftiros" is the
A New Statistics-Based Online Baseline Restorer for a High Count-Rate Fully Digital System.
Li, Hongdi; Wang, Chao; Baghaei, Hossain; Zhang, Yuxuan; Ramirez, Rocio; Liu, Shitao; An, Shaohui; Wong, Wai-Hoi
2010-04-01
The goal of this work is to develop a novel, accurate, real-time digital baseline restorer using online statistical processing for a high count-rate digital system such as positron emission tomography (PET). In high count-rate nuclear instrumentation applications, analog signals are DC-coupled for better performance. However, the detectors, pre-amplifiers and other front-end electronics would cause a signal baseline drift in a DC-coupling system, which will degrade the performance of energy resolution and positioning accuracy. Event pileups normally exist in a high-count rate system and the baseline drift will create errors in the event pileup-correction. Hence, a baseline restorer (BLR) is required in a high count-rate system to remove the DC drift ahead of the pileup correction. Many methods have been reported for BLR from classic analog methods to digital filter solutions. However a single channel BLR with analog method can only work under 500 kcps count-rate, and normally an analog front-end application-specific integrated circuits (ASIC) is required for the application involved hundreds BLR such as a PET camera. We have developed a simple statistics-based online baseline restorer (SOBLR) for a high count-rate fully digital system. In this method, we acquire additional samples, excluding the real gamma pulses, from the existing free-running ADC in the digital system, and perform online statistical processing to generate a baseline value. This baseline value will be subtracted from the digitized waveform to retrieve its original pulse with zero-baseline drift. This method can self-track the baseline without a micro-controller involved. The circuit consists of two digital counter/timers, one comparator, one register and one subtraction unit. Simulation shows a single channel works at 30 Mcps count-rate with pileup condition. 336 baseline restorer circuits have been implemented into 12 field-programmable-gate-arrays (FPGA) for our new fully digital PET system.
MICROROC: MICRO-mesh gaseous structure Read-Out Chip
NASA Astrophysics Data System (ADS)
Adloff, C.; Blaha, J.; Chefdeville, M.; Dalmaz, A.; Drancourt, C.; Dulucq, F.; Espargilière, A.; Gaglione, R.; Geffroy, N.; Jacquemier, J.; Karyotakis, Y.; Martin-Chassard, G.; Prast, J.; Seguin-Moreau, N.; de La Taille, Ch; Vouters, G.
2012-01-01
MICRO MEsh GAseous Structure (MICROMEGAS) and Gas Electron Multipliers (GEM) detectors are two candidates for the active medium of a Digital Hadronic CALorimeter (DHCAL) as part of a high energy physics experiment at a future linear collider (ILC/CLIC). Physics requirements lead to a highly granular hadronic calorimeter with up to thirty million channels with probably only hit information (digital readout calorimeter). To validate the concept of digital hadronic calorimetry with such small cell size, the construction and test of a cubic meter technological prototype, made of 40 planes of one square meter each, is necessary. This technological prototype would contain about 400 000 electronic channels, thus requiring the development of front-end ASIC. Based on the experience gained with previous ASIC that were mounted on detectors and tested in particle beams, a new ASIC called MICROROC has been developped. This paper summarizes the caracterisation campaign that was conducted on this new chip as well as its integration into a large area Micromegas chamber of one square meter.
NASA Astrophysics Data System (ADS)
Barros Marin, M.; Boccardi, A.; Donat Godichal, C.; Gonzalez, J. L.; Lefevre, T.; Levens, T.; Szuk, B.
2016-02-01
The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multi-purpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.
Low-noise front-end electronics for detection of intermediate-frequency weak light signals
NASA Astrophysics Data System (ADS)
Lin, Cunbao; Yan, Shuhua; Du, Zhiguang; Wei, Chunhua; Wang, Guochao
2015-02-01
A novel low-noise front-end electronics was proposed for detection of light signals with intensity about 10 μW and frequency above 2.7 MHz. The direct current (DC) power supply, pre-amplifier and main-amplifier were first designed, simulated and then realized. Small-size components were used to make the power supply small, and the pre-amplifier and main-amplifier were the least capacitors to avoid the phase shift of the signals. The performance of the developed front-end electronics was verified in cross-grating diffraction experiments. The results indicated that the output peak-topeak noise of the +/-5 V DC power supply was about 2 mV, and the total output current was 1.25 A. The signal-to-noise ratio (SNR) of the output signal of the pre-amplifier was about 50 dB, and it increased to nearly 60 dB after the mainamplifier, which means this front-end electronics was especially suitable for using in the phase-sensitive and integrated precision measurement systems.
Performances of the Front-End Electronics for the HADES RPC TOF wall on a 12C beam
NASA Astrophysics Data System (ADS)
Belver, D.; Cabanelas, P.; Castro, E.; Díaz, J.; Garzón, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.; Zapata, M.
2009-05-01
A Front-End Electronics (FEE) chain for timing accurate measurements has been developed for the RPC wall upgrade of the High-Acceptance DiElectron Spectrometer (HADES). The wall will cover an area of around 8 m with 1122 RPC cells (2244 electronic channels). The FEE chain consists of two boards: a four-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a discriminator. The time and the charge information are encoded in the leading and the trailing edge (by a charge to width method) of an LVDS signal. Each MBO houses up to eight DBOs providing them regulated voltage supply, threshold values via DACs, test signals and collection of their trigger outputs. The MBO delivers LVDS signals to a time-to-digital converter readout board (TRB) based on HPTDC for data acquisition. In this work, we present the performance of the FEE measured using: (a) narrow electronic test pulses and (b) real signals read out in a fully instrumented RPC sextant installed in its final position at the HADES. The detector was exposed to particles coming from reactions of a 12C beam on Be and Nb targets at 2 GeV/A kinetic energy. Results for the whole electronic chain (DBO+MBO+TRB) show a timing jitter of around 40 ps/channel for pulses above 100 fC and 80 ps/channel for beam data taken with the RPC.
Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan
DOE Office of Scientific and Technical Information (OSTI.GOV)
Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.
2015-09-16
The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.
Multi sensor satellite imagers for commercial remote sensing
NASA Astrophysics Data System (ADS)
Cronje, T.; Burger, H.; Du Plessis, J.; Du Toit, J. F.; Marais, L.; Strumpfer, F.
2005-10-01
This paper will discuss and compare recent refractive and catodioptric imager designs developed and manufactured at SunSpace for Multi Sensor Satellite Imagers with Panchromatic, Multi-spectral, Area and Hyperspectral sensors on a single Focal Plane Array (FPA). These satellite optical systems were designed with applications to monitor food supplies, crop yield and disaster monitoring in mind. The aim of these imagers is to achieve medium to high resolution (2.5m to 15m) spatial sampling, wide swaths (up to 45km) and noise equivalent reflectance (NER) values of less than 0.5%. State-of-the-art FPA designs are discussed and address the choice of detectors to achieve these performances. Special attention is given to thermal robustness and compactness, the use of folding prisms to place multiple detectors in a large FPA and a specially developed process to customize the spectral selection with the need to minimize mass, power and cost. A refractive imager with up to 6 spectral bands (6.25m GSD) and a catodioptric imager with panchromatic (2.7m GSD), multi-spectral (6 bands, 4.6m GSD), hyperspectral (400nm to 2.35μm, 200 bands, 15m GSD) sensors on the same FPA will be discussed. Both of these imagers are also equipped with real time video view finding capabilities. The electronic units could be subdivided into the Front-End Electronics and Control Electronics with analogue and digital signal processing. A dedicated Analogue Front-End is used for Correlated Double Sampling (CDS), black level correction, variable gain and up to 12-bit digitizing and high speed LVDS data link to a mass memory unit.
Analog Signal Correlating Using an Analog-Based Signal Conditioning Front End
NASA Technical Reports Server (NTRS)
Prokop, Norman; Krasowski, Michael
2013-01-01
This innovation is capable of correlating two analog signals by using an analog-based signal conditioning front end to hard-limit the analog signals through adaptive thresholding into a binary bit stream, then performing the correlation using a Hamming "similarity" calculator function embedded in a one-bit digital correlator (OBDC). By converting the analog signal into a bit stream, the calculation of the correlation function is simplified, and less hardware resources are needed. This binary representation allows the hardware to move from a DSP where instructions are performed serially, into digital logic where calculations can be performed in parallel, greatly speeding up calculations.
A multichannel EEG acquisition scheme based on single ended amplifiers and digital DRL.
Haberman, Marcelo Alejandro; Spinelli, Enrique Mario
2012-12-01
Single ended (SE) amplifiers allow implementing biopotential front-ends with a reduced number of parts, being well suited for preamplified electrodes or compact EEG headboxes. On the other hand, given that each channel has independent gain; mismatching between these gains results in poor common-mode rejection ratios (CMRRs) (about 30 dB considering 1% tolerance components). This work proposes a scheme for multichannel EEG acquisition systems based on SE amplifiers and a novel digital driven right leg (DDRL) circuit, which overcome the poor CMRR of the front-end stage providing a high common mode reduction at power line frequency (up to 80 dB). A functional prototype was built and tested showing the feasibility of the proposed technique. It provided EEG records with negligible power line interference, even in very aggressive EMI environments.
DOE Office of Scientific and Technical Information (OSTI.GOV)
De Geronimo, G.; Li, S.; D'Andragora, A.
We present a front-end application-specific integrated circuit (ASIC) for a wire based time-projection-chamber (TPC) operating in liquid Argon (LAr). The LAr TPC will be used for long baseline neutrino oscillation experiments. The ASIC must provide a low-noise readout of the signals induced on the TPC wires, digitization of those signals at 2 MSamples/s, compression, buffering and multiplexing. A resolution of better than 1000 rms electrons at 200 pF input capacitance for an input range of 300 fC is required, along with low power and operation in LAr (at 87 K). We include the characterization of a commercial technology for operationmore » in the cryogenic environment and the first experimental results on the analog front end. The results demonstrate that complementary metal-oxide semiconductor transistors have lower noise and much improved dc characteristics at LAr temperature. Finally, we introduce the concept of '1/f equivalent' to model the low-frequency component of the noise spectral density, for use in the input metal-oxide semiconductor field-effect transistor optimization.« less
Design of an integrated sensor system for the detection of traces of different molecules in the air
NASA Astrophysics Data System (ADS)
Strle, D.; Muševič, I.
2015-04-01
This article presents the design of a miniature detection system and its associated signal processing electronics, which can detect and selectively recognize vapor traces of different materials in the air - including explosives. It is based on the array of surface-functionalized COMB capacitive sensors and extremely low noise, analog, integrated electronic circuit, hardwired digital signal processing hardware and additional software running on a PC. The instrument is sensitive and selective, consumes a minimum amount of energy, is very small (few mm3) and cheap to produce in large quantities, and is insensitive to mechanical influences. Using an electronic detection system built of low noise analog front-end and hard-wired digital signal processing, it is possible to detect less than 0.3ppt of TNT molecules in the atmosphere (3 TNT molecules in 1013 molecules of the air) at 25°C on a 1 Hz bandwidth using very small volume and approx. 10 mA current from a 5V supply voltage. The sensors are implemented in a modified MEMS process and analog electronics in 0.18 um CMOS technology.
SYRMEP front-end and read-out electronics
NASA Astrophysics Data System (ADS)
Arfelli, F.; Bonvicini, V.; Bravin, A.; Cantatore, G.; Castelli, E.; Cristaudo, P.; Di Michiel, M.; Longo, R.; Olivo, A.; Pani, S.; Pontoni, D.; Poropat, P.; Prest, M.; Rashevsky, A.; Tomasini, F.; Tromba, G.; Vacchi, A.; Vallazza, E.
1998-02-01
The SYRMEP approach to digital mammography implies the use of a monochromatic X-ray beam from a synchrotron source and a slot of superimposed silicon microstrip detectors as a scanning image receptor. The microstrips are read by 32-channel chips mounted on 7-layer hybrid circuits which receive control signals and operating voltages from a MASTER-SLAVE configuration of cards. The MASTER card is driven by the CIRM, a dedicated CAMAC module whose timing function can be easily excluded to obtain data-storage-only units connected to different MASTERs: this second-level modular expansion capability fully achieves the tasks of an electronics system able to follow the SYRMEP detector growth till the final size of seven thousands of channels.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Johnson, C.S.; af Ekenstam, G.; Sallstrom, M.
1995-07-01
The Swedish Nuclear Power Inspectorate (SKI) and the US Department of Energy (DOE) sponsored work on a Remote Monitoring System (RMS) that was installed in August 1994 at the Barseback Works north of Malmo, Sweden. The RMS was designed to test the front end detection concept that would be used for unattended remote monitoring activities. Front end detection reduces the number of video images recorded and provides additional sensor verification of facility operations. The function of any safeguards Containment and Surveillance (C/S) system is to collect information which primarily is images that verify the operations at a nuclear facility. Barsebackmore » is ideal to test the concept of front end detection since most activities of safeguards interest is movement of spent fuel which occurs once a year. The RMS at Barseback uses a network of nodes to collect data from microwave motion detectors placed to detect the entrance and exit of spent fuel casks through a hatch. A video system using digital compression collects digital images and stores them on a hard drive and a digital optical disk. Data and images from the storage area are remotely monitored via telephone from Stockholm, Sweden and Albuquerque, NM, USA. These remote monitoring stations operated by SKI and SNL respectively, can retrieve data and images from the RMS computer at the Barseback Facility. The data and images are encrypted before transmission. This paper presents details of the RMS and test results of this approach to front end detection of safeguard activities.« less
Upgrade of the ATLAS Tile Calorimeter Electronics
NASA Astrophysics Data System (ADS)
Moreno, Pablo; ATLAS Tile Calorimeter System
2016-04-01
The Tile Calorimeter (TileCal) is the hadronic calorimeter covering the central region of the ATLAS experiment at LHC. The TileCal readout consists of 9852 channels. The bulk of its upgrade will occur for the High Luminosity LHC phase (Phase II) where the peak luminosity will increase 5× compared to the design luminosity (1034 cm-2s-1) at center of mass energy of 14 TeV. The TileCal upgrade aims at replacing the majority of the on- and off-detector electronics to the extent that all calorimeter signals will be digitized and sent to the off-detector electronics in the counting room. To achieve the required reliability, redundancy has been introduced at different levels. Three different options are presently being investigated for the front-end electronic upgrade. Extensive test beam studies will determine which option will be selected. 10.24 Gbps optical links are used to read out all digitized data to the counting room while 4.8 Gbps down-links are used for synchronization, configuration and detector control. For the off-detector electronics a pre-processor (sROD) is being developed, which takes care of the initial trigger processing while temporarily storing the main data flow in pipeline and de-randomizer memories. Field Programmable Gate Arrays are extensively used for the logic functions off- and on-detector. One demonstrator prototype module with the new calorimeter module electronics, but still compatible with the present system, is planned to be inserted in ATLAS at the end of 2015.
Components Qualification for a Possible use in the Mu2e Calorimeter Waveform Digitizer
DOE Office of Scientific and Technical Information (OSTI.GOV)
Di Falco, S.; Donati, S.; Morescalchi, L.
2017-03-30
The Mu2e experiment at Fermilab searches for the charged flavor violating conversion of a muon into an electron in the Coulomb field of a nucleus. The detector consists of a straw tube tracker and a CSI crystal electromagnetic calorimeter, both housed in a superconducting solenoid. Both the front-end and the digital electronics, located inside the cryostat, will be operated in vacuum under a 1 T magnetic field, having to sustain the high flux of neutrons and ionizing particles coming from the muons stopping target. These harsh experimental conditions make the design of the calorimeter waveform digitizer quite challenging. All themore » selected commercial devices must be tested individually and qualified for radiation hardness and operation in high magnetic field. At the moment the expected particles flux and spectra at the digitizers location are not completely simulated and we are using initial rough estimates to select the components for the first prototype. We are gaining experience in the qualification procedures using the selected components but the choice will be frozen only when dose and neutron flux simulations will be completed. The experimental results of the first qualification campaign are presented.« less
NASA Astrophysics Data System (ADS)
Gabrielli, Alessandro; Loddo, Flavio; Ranieri, Antonio; De Robertis, Giuseppe
2008-10-01
This work is aimed at defining the architecture of a new digital ASIC, namely Slow-Control Adapter (SCA), which will be designed in a commercial 130-nm CMOS technology. This chip will be embedded within a high-speed data acquisition optical link (GBT) to control and monitor the front-end electronics in future high-energy physics experiments. The GBT link provides a transparent transport layer between the SCA and control electronics in the counting room. The proposed SCA supports a variety of common bus protocols to interface with end-user general-purpose electronics. Between the GBT and the SCA a standard 100 Mb/s IEEE-802.3 compatible protocol will be implemented. This standard protocol allows off-line tests of the prototypes using commercial components that support the same standard. The project is justified because embedded applications in modern large HEP experiments require particular care to assure the lowest possible power consumption, still offering the highest reliability demanded by very large particle detectors.
NASA Astrophysics Data System (ADS)
Anderson, J.; Bauer, K.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Dönszelmann, M.; Francis, D.; Guest, D.; Gorini, B.; Joos, M.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Panduro Vazquez, W.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Whiteson, D.; Wu, W.; Zhang, J.
2016-12-01
The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.
Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat
NASA Astrophysics Data System (ADS)
Turqueti, Marcos; Prestemon, Soren; Albright, Robert
LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal-oxide-semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signals captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.
Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat
Turqueti, Marcos; Prestemon, Soren; Albright, Robert
2015-07-15
LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal–oxide–semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signalsmore » captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chen, K.; Chen, H.; Wu, W.
We present that in the upgrade of ATLAS experiment, the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, themore » GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system is used to interface the front end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. Finally, the system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.« less
Optimization on fixed low latency implementation of the GBT core in FPGA
Chen, K.; Chen, H.; Wu, W.; ...
2017-07-11
We present that in the upgrade of ATLAS experiment, the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, themore » GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system is used to interface the front end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. Finally, the system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.« less
Optimization on fixed low latency implementation of the GBT core in FPGA
NASA Astrophysics Data System (ADS)
Chen, K.; Chen, H.; Wu, W.; Xu, H.; Yao, L.
2017-07-01
In the upgrade of ATLAS experiment [1], the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link [2]. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, the GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA [3]. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system [4, 5] is used to interface the front-end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. The system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.
Integrated circuits for volumetric ultrasound imaging with 2-D CMUT arrays.
Bhuyan, Anshuman; Choe, Jung Woo; Lee, Byung Chul; Wygant, Ira O; Nikoozadeh, Amin; Oralkan, Ömer; Khuri-Yakub, Butrus T
2013-12-01
Real-time volumetric ultrasound imaging systems require transmit and receive circuitry to generate ultrasound beams and process received echo signals. The complexity of building such a system is high due to requirement of the front-end electronics needing to be very close to the transducer. A large number of elements also need to be interfaced to the back-end system and image processing of a large dataset could affect the imaging volume rate. In this work, we present a 3-D imaging system using capacitive micromachined ultrasonic transducer (CMUT) technology that addresses many of the challenges in building such a system. We demonstrate two approaches in integrating the transducer and the front-end electronics. The transducer is a 5-MHz CMUT array with an 8 mm × 8 mm aperture size. The aperture consists of 1024 elements (32 × 32) with an element pitch of 250 μm. An integrated circuit (IC) consists of a transmit beamformer and receive circuitry to improve the noise performance of the overall system. The assembly was interfaced with an FPGA and a back-end system (comprising of a data acquisition system and PC). The FPGA provided the digital I/O signals for the IC and the back-end system was used to process the received RF echo data (from the IC) and reconstruct the volume image using a phased array imaging approach. Imaging experiments were performed using wire and spring targets, a ventricle model and a human prostrate. Real-time volumetric images were captured at 5 volumes per second and are presented in this paper.
NASA Astrophysics Data System (ADS)
Inoue, Tomoyasu; Hamasaki, Toshihiko
1987-04-01
A high-speed movie technique was used to investigate the growth front movement during electron beam recrystallization of thin silicon layers on insulating material. In a laterally epitaxial growth process, it was clearly observed that the molten zone shape dramatically changes across a seed opening, which is due to nonuniformity in heat dissipation toward the substrate in the vicinity of the seed opening. The molten zone width and velocities of the melt front and growth front were quantitatively analyzed using digital film motion analysis. The growth front velocity was found to drastically change by ˜30% across the seed opening.
Upgrade of Tile Calorimeter of the ATLAS Detector for the High Luminosity LHC.
NASA Astrophysics Data System (ADS)
Valdes Santurio, Eduardo; Tile Calorimeter System, ATLAS
2017-11-01
The Tile Calorimeter (TileCal) is the hadronic calorimeter of ATLAS covering the central region of the ATLAS experiment. TileCal is a sampling calorimeter with steel as absorber and scintillators as active medium. The scintillators are read out by wavelength shifting fibers coupled to photomultiplier tubes (PMT). The analogue signals from the PMTs are amplified, shaped and digitized by sampling the signal every 25 ns. The High Luminosity Large Hadron Collider (HL-LHC) will have a peak luminosity of 5 × 1034 cm -2 s -1, five times higher than the design luminosity of the LHC. TileCal will undergo a major replacement of its on- and off-detector electronics for the high luminosity programme of the LHC in 2026. The calorimeter signals will be digitized and sent directly to the off-detector electronics, where the signals are reconstructed and shipped to the first level of trigger at a rate of 40 MHz. This will provide a better precision of the calorimeter signals used by the trigger system and will allow the development of more complex trigger algorithms. Three different options are presently being investigated for the front-end electronic upgrade. Extensive test beam studies will determine which option will be selected. Field Programmable Gate Arrays (FPGAs) are extensively used for the logic functions of the off- and on-detector electronics. One hybrid demonstrator prototype module with the new calorimeter module electronics, but still compatible with the present system, may be inserted in ATLAS at the end of 2016.
Digital correlation detector for low-cost Omega navigation
NASA Technical Reports Server (NTRS)
Chamberlin, K. A.
1976-01-01
Techniques to lower the cost of using the Omega global navigation network with phase-locked loops (PLL) were developed. The technique that was accepted as being "optimal" is called the memory-aided phase-locked loop (MAPLL) since it allows operation on all eight Omega time slots with one PLL through the implementation of a random access memory. The receiver front-end and the signals that it transmits to the PLL were first described. A brief statistical analysis of these signals was then made to allow a rough comparison between the front-end presented in this work and a commercially available front-end to be made. The hardware and theory of application of the MAPLL were described, ending with an analysis of data taken with the MAPLL. Some conclusions and recommendations were also given.
Electro-optical detector for use in a wide mass range mass spectrometer
NASA Technical Reports Server (NTRS)
Giffin, Charles E. (Inventor)
1976-01-01
An electro-optical detector is disclosed for use in a wide mass range mass spectrometer (MS), in the latter the focal plane is at or very near the exit end of the magnetic analyzer, so that a strong magnetic field of the order of 1000G or more is present at the focal plane location. The novel detector includes a microchannel electron multiplier array (MCA) which is positioned at the focal plane to convert ion beams which are focused by the MS at the focal plane into corresponding electron beams which are then accelerated to form visual images on a conductive phosphored surface. These visual images are then converted into images on the target of a vidicon camera or the like for electronic processing. Due to the strong magnetic field at the focal plane, in one embodiment of the invention, the MCA with front and back parallel ends is placed so that its front end forms an angle of not less than several degrees, preferably on the order of 10.degree.-20.degree., with respect to the focal plane, with the center line of the front end preferably located in the focal plane. In another embodiment the MCA is wedge-shaped, with its back end at an angle of about 10.degree.-20.degree. with respect to the front end. In this embodiment the MCA is placed so that its front end is located at the focal plane.
Development of a statewide Landsat digital data base for forest insect damage assessment
NASA Technical Reports Server (NTRS)
Williams, D. L.; Dottavio, C. L.; Nelson, R. F.
1983-01-01
A Joint Research Project (JRP) invlving NASA/Goddard Space Flight Center and the Pennsylvania Bureau of Forestry/Division of Forest Pest Management demonstrates the utility of Landsat data for assessing forest insect damage. A major effort within the project has been the creation of map-registered, statewide Landsat digital data base for Pennsylvania. The data base, developed and stored on computers at the Pennsylvania State University Computation Center, contains Landsat imagery, a Landsat-derived forest resource map, and digitized data layers depicting Forest Pest Management District boundaries and county boundaries. A data management front-end system was also developed to provide an interface between the various layers of information within the data base and image analysis software. This front-end system insures than an automated assessment of defoliation damage can be conducted and summarized by geographic area or jurisdiction of interest.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Anderson, J.; Bauer, K.; Borga, A.
The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less
Anderson, J.; Bauer, K.; Borga, A.; ...
2016-12-13
The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less
Programming time-multiplexed reconfigurable hardware using a scalable neuromorphic compiler.
Minkovich, Kirill; Srinivasa, Narayan; Cruz-Albrecht, Jose M; Cho, Youngkwan; Nogin, Aleksey
2012-06-01
Scalability and connectivity are two key challenges in designing neuromorphic hardware that can match biological levels. In this paper, we describe a neuromorphic system architecture design that addresses an approach to meet these challenges using traditional complementary metal-oxide-semiconductor (CMOS) hardware. A key requirement in realizing such neural architectures in hardware is the ability to automatically configure the hardware to emulate any neural architecture or model. The focus for this paper is to describe the details of such a programmable front-end. This programmable front-end is composed of a neuromorphic compiler and a digital memory, and is designed based on the concept of synaptic time-multiplexing (STM). The neuromorphic compiler automatically translates any given neural architecture to hardware switch states and these states are stored in digital memory to enable desired neural architectures. STM enables our proposed architecture to address scalability and connectivity using traditional CMOS hardware. We describe the details of the proposed design and the programmable front-end, and provide examples to illustrate its capabilities. We also provide perspectives for future extensions and potential applications.
Online readout and control unit for high-speed/high resolution readout of silicon tracking detectors
NASA Astrophysics Data System (ADS)
Bürger, J.; Hansen, K.; Lange, W.; Nowak, T.; Prell, S.; Zimmermann, W.
1997-02-01
We are describing a high speed VME readout and control module developed and presently working at the H1 experiment at DESY in Hamburg. It has the capability to read out 4 × 2048 analogue data channels at sampling rates up to 10 MHz with a dynamic input range of 1 V. The nominal resolution of the A/D converters can be adjusted between 8 and 12 bit. At the latter resolution we obtain signal-to-noise ratio better than 61.4 dB at a conversion rate of 5 MSps. At this data rate all 8192 detector channels can be read out to the internal raw data memory and VME interface within about 410 μs and 510 μs, respectively. The pedestal subtracted signals can be analyzed on-line. At a raw data hit occupation of 10%, the VME readout time is 50 μs per module. Each module provides four complementary CMOS signals to control the front-end electronics and four independent sets of power supplies for analogue and digital voltages (10 V, 100 mA) to drive the front-end electronics and for the bias voltage (100 V, 1.2 mA) to assure the full functionality of the detectors and the readout.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Demaria, N.
This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaborationmore » is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.« less
Central Drift Chamber for Belle-II
NASA Astrophysics Data System (ADS)
Taniguchi, N.
2017-06-01
The Central Drift Chamber (CDC) is the main device for tracking and identification of charged particles for Belle-II experiment. The Belle-II CDC is cylindrical wire chamber with 14336 sense wires, 2.3 m-length and 2.2 m-diameter. The wire chamber and readout electronics have been completely replaced from the Belle CDC. The new readout electronics system must handle higher trigger rate of 30 kHz with less dead time at the design luminosity of 8 × 1035 cm-2s-1. The front-end electronics are located close to detector and send digitized signal through optical fibers. The Amp-Shaper-Discriminator chips, FADC and FPGA are assembled on a single board. Belle-II CDC with readout electronics has been installed successfully in Belle structure in October 2016. We will present overview of the Belle-II CDC and status of commissioning with cosmic ray.
Upgrading the ATLAS Tile Calorimeter Electronics
NASA Astrophysics Data System (ADS)
Carrió, Fernando
2013-11-01
This work summarizes the status of the on-detector and off-detector electronics developments for the Phase 2 Upgrade of the ATLAS Tile Calorimeter at the LHC scheduled around 2022. A demonstrator prototype for a slice of the calorimeter including most of the new electronics is planned to be installed in ATLAS in the middle of 2014 during the first Long Shutdown. For the on-detector readout, three different front-end boards (FEB) alternatives are being studied: a new version of the 3-in-1 card, the QIE chip and a dedicated ASIC called FATALIC. The Main Board will provide communication and control to the FEBs and the Daughter Board will transmit the digitized data to the off-detector electronics in the counting room, where the super Read-Out Driver (sROD) will perform processing tasks on them and will be the interface to the trigger levels 0, 1 and 2.
Compact, Miniature MMIC Receiver Modules for an MMIC Array Spectrograph
NASA Technical Reports Server (NTRS)
Kangaslahti, Pekka P.; Gaier, Todd C.; Cooperrider, Joelle T.; Samoska, Lorene A.; Soria, Mary M.; ODwyer, Ian J.; Weinreb, Sander; Custodero, Brian; Owen, Heahter; Grainge, Keith;
2009-01-01
A single-pixel prototype of a W-band detector module with a digital back-end was developed to serve as a building block for large focal-plane arrays of monolithic millimeter-wave integrated circuit (MMIC) detectors. The module uses low-noise amplifiers, diode-based mixers, and a WR10 waveguide input with a coaxial local oscillator. State-of-the-art InP HEMT (high electron mobility transistor) MMIC amplifiers at the front end provide approximately 40 dB of gain. The measured noise temperature of the module, at an ambient temperature of 300 K, was found to be as low as 450 K at 95 GHz. The modules will be used to develop multiple instruments for astrophysics radio telescopes, both on the ground and in space. The prototype is being used by Stanford University to characterize noise performance at cryogenic temperatures. The goal is to achieve a 30-50 K noise temperature around 90 GHz when cooled to a 20 K ambient temperature. Further developments include characterization of the IF in-phase (I) and quadrature (Q) signals as a function of frequency to check amplitude and phase; replacing the InP low-noise amplifiers with state-of-the-art 35-nm-gate-length NGC low-noise amplifiers; interfacing the front-end module with a digital back-end spectrometer; and developing a scheme for local oscillator and IF distribution in a future array. While this MMIC is being developed for use in radio astronomy, it has the potential for use in other industries. Applications include automotive radar (both transmitters and receivers), communication links, radar systems for collision avoidance, production monitors, ground-penetrating sensors, and wireless personal networks.
NASA Technical Reports Server (NTRS)
Nguyen, T. M.; Yeh, H.-G.
1993-01-01
The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.
A miniaturized neuroprosthesis suitable for implantation into the brain
NASA Technical Reports Server (NTRS)
Mojarradi, Mohammad; Binkley, David; Blalock, Benjamin; Andersen, Richard; Ulshoefer, Norbert; Johnson, Travis; Del Castillo, Linda
2003-01-01
This paper presents current research on a miniaturized neuroprosthesis suitable for implantation into the brain. The prosthesis is a heterogeneous integration of a 100-element microelectromechanical system (MEMS) electrode array, front-end complementary metal-oxide-semiconductor (CMOS) integrated circuit for neural signal preamplification, filtering, multiplexing and analog-to-digital conversion, and a second CMOS integrated circuit for wireless transmission of neural data and conditioning of wireless power. The prosthesis is intended for applications where neural signals are processed and decoded to permit the control of artificial or paralyzed limbs. This research, if successful, will allow implantation of the electronics into the brain, or subcutaneously on the skull, and eliminate all external signal and power wiring. The neuroprosthetic system design has strict size and power constraints with each of the front-end preamplifier channels fitting within the 400 x 400-microm pitch of the 100-element MEMS electrode array and power dissipation resulting in less than a 1 degree C temperature rise for the surrounding brain tissue. We describe the measured performance of initial micropower low-noise CMOS preamplifiers for the neuroprosthetic.
Digital beacon receiver for ionospheric TEC measurement developed with GNU Radio
NASA Astrophysics Data System (ADS)
Yamamoto, M.
2008-11-01
A simple digital receiver named GNU Radio Beacon Receiver (GRBR) was developed for the satellite-ground beacon experiment to measure the ionospheric total electron content (TEC). The open-source software toolkit for the software defined radio, GNU Radio, is utilized to realize the basic function of the receiver and perform fast signal processing. The software is written in Python for a LINUX PC. The open-source hardware called Universal Software Radio Peripheral (USRP), which best matches the GNU Radio, is used as a front-end to acquire the satellite beacon signals of 150 and 400 MHz. The first experiment was successful as results from GRBR showed very good agreement to those from the co-located analog beacon receiver. Detailed design information and software codes are open at the URL http://www.rish.kyoto-u.ac.jp/digitalbeacon/.
SAMPA Chip: the New 32 Channels ASIC for the ALICE TPC and MCH Upgrades
NASA Astrophysics Data System (ADS)
Adolfsson, J.; Ayala Pabon, A.; Bregant, M.; Britton, C.; Brulin, G.; Carvalho, D.; Chambert, V.; Chinellato, D.; Espagnon, B.; Hernandez Herrera, H. D.; Ljubicic, T.; Mahmood, S. M.; Mjörnmark, U.; Moraes, D.; Munhoz, M. G.; Noël, G.; Oskarsson, A.; Osterman, L.; Pilyar, A.; Read, K.; Ruette, A.; Russo, P.; Sanches, B. C. S.; Severo, L.; Silvermyr, D.; Suire, C.; Tambave, G. J.; Tun-Lanoë, K. M. M.; van Noije, W.; Velure, A.; Vereschagin, S.; Wanlin, E.; Weber, T. O.; Zaporozhets, S.
2017-04-01
This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25 V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip.
NASA Technical Reports Server (NTRS)
McLinden, Matthew; Piepmeier, Jeffrey
2013-01-01
The conventional method for integrating a radiometer into radar hardware is to share the RF front end between the instruments, and to have separate IF receivers that take data at separate times. Alternatively, the radar and radiometer could share the antenna through the use of a diplexer, but have completely independent receivers. This novel method shares the radar's RF electronics and digital receiver with the radiometer, while allowing for simultaneous operation of the radar and radiometer. Radars and radiometers, while often having near-identical RF receivers, generally have substantially different IF and baseband receivers. Operation of the two instruments simultaneously is difficult, since airborne radars will pulse at a rate of hundreds of microseconds. Radiometer integration time is typically 10s or 100s of milliseconds. The bandwidth of radar may be 1 to 25 MHz, while a radiometer will have an RF bandwidth of up to a GHz. As such, the conventional method of integrating radar and radiometer hardware is to share the highfrequency RF receiver, but to have separate IF subsystems and digitizers. To avoid corruption of the radiometer data, the radar is turned off during the radiometer dwell time. This method utilizes a modern radar digital receiver to allow simultaneous operation of a radiometer and radar with a shared RF front end and digital receiver. The radiometer signal is coupled out after the first down-conversion stage. From there, the radar transmit frequencies are heavily filtered, and the bands outside the transmit filter are amplified and passed to a detector diode. This diode produces a DC output proportional to the input power. For a conventional radiometer, this level would be digitized. By taking this DC output and mixing it with a system oscillator at 10 MHz, the signal can instead be digitized by a second channel on the radar digital receiver (which typically do not accept DC inputs), and can be down-converted to a DC level again digitally. This unintuitive step allows the digital receiver to sample both the radiometer and radar data at a rapid, synchronized data rate (greater than 1 MHz bandwidth). Once both signals are sampled by the same digital receiver, high-speed quality control can be performed on the radiometer data to allow it to take data simultaneously with the radar. The radiometer data can be blanked during radar transmit, or when the radar return is of a power level high enough to corrupt the radiometer data. Additionally, the receiver protection switches in the RF front end can double as radiometer calibration sources, the short (four-microsecond level) switching periods integrated over many seconds to estimate the radiometer offset. The major benefit of this innovation is that there is minimal impact on the radar performance due to the integration of the radiometer, and the radiometer performance is similarly minimally affected by the radar. As the radar and radiometer are able to operate simultaneously, there is no extended period of integration time loss for the radiometer (maximizing sensitivity), and the radar is able to maintain its full number of pulses (increasing sensitivity and decreasing measurement uncertainty).
Passive front-ends for wideband millimeter wave electronic warfare
NASA Astrophysics Data System (ADS)
Jastram, Nathan Joseph
This thesis presents the analysis, design and measurements of novel passive front ends of interest to millimeter wave electronic warfare systems. However, emerging threats in the millimeter waves (18 GHz and above) has led to a push for new systems capable of addressing these threats. At these frequencies, traditional techniques of design and fabrication are challenging due to small size, limited bandwidth and losses. The use of surface micromachining technology for wideband direction finding with multiple element antenna arrays for electronic support is demonstrated. A wideband tapered slot antenna is first designed and measured as an array element for the subsequent arrays. Both 18--36 GHz and 75--110 GHz amplitude only and amplitude/phase two element direction finding front ends are designed and measured. The design of arrays using Butler matrix and Rotman lens beamformers for greater than two element direction finding over W band and beyond using is also presented. The design of a dual polarized high power capable front end for electronic attack over an 18--45 GHz band is presented. To combine two polarizations into the same radiating aperture, an orthomode transducer (OMT) based upon a new double ridge waveguide cross section is developed. To provide greater flexibility in needed performance characteristics, several different turnstile junction matching sections are tested. A modular horn section is proposed to address flexible and ever changing operational requirements, and is designed for performance criteria such as constant gain, beamwidth, etc. A multi-section branch guide coupler and low loss Rotman lens based upon the proposed cross section are also developed. Prototyping methods for the herein designed millimeter wave electronic warfare front ends are investigated. Specifically, both printed circuit board (PCB) prototyping of micromachined systems and 3D printing of conventionally machined horns are presented. A 4--8 GHz two element array with integrated beamformer fabricated using the stacking of PCB boards is shown, and measured results compare favorably with the micromachined front ends. A 3D printed small aperture horn is compared with a conventionally machined horn, and measured results show similar performance with a ten-fold reduction in cost and weight.
Development of Γ-ray tracking detectors
Lieder, R. M.; Gast, W.; Jäger, H. M.; ...
2001-12-01
The next generation of 4π arrays for high-precision γ-ray spectroscopy AGATA will consist of γ-ray tracking detectors. They represent high-fold segmented Ge detectors and a front-end electronics, based on digital signal processing techniques, which allows to extract energy, timing and spatial information on the interactions of a γ-ray in the Ge detector by pulse shape analysis of its signals. Utilizing the information on the positions of the interaction points and the energies released at each point the tracks of the γ-rays in a Ge shell can be reconstructed in three dimensions on the basis of the Compton-scattering formula.
Overview of recent trends and developments for BPM systems
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wendt, M.; /Fermilab
2011-08-01
Beam position monitoring (BPM) systems are the workhorse of beam diagnostics for almost any kind of charged particle accelerator: linear, circular or transport-lines, operating with leptons, hadrons or heavy ions. BPMs are essential for beam commissioning, accelerator fault analysis and trouble shooting, machine optics, as well as lattice measurements, and finally, for accelerator optimization, in order to achieve the ultimate beam quality. This presentation summarizes the efforts of the beam instrumentation community on recent developments and advances on BPM technologies, i.e. BPM pickup monitors and front-end electronics (analog and digital). Principles, examples, and state-of-the-art status on various BPM techniques, servingmore » hadron and heavy ion machines, sync light synchrotron's, as well as electron linacs for FEL or HEP applications are outlined.« less
Toward an image compression algorithm for the high-resolution electronic still camera
NASA Technical Reports Server (NTRS)
Nerheim, Rosalee
1989-01-01
Taking pictures with a camera that uses a digital recording medium instead of film has the advantage of recording and transmitting images without the use of a darkroom or a courier. However, high-resolution images contain an enormous amount of information and strain data-storage systems. Image compression will allow multiple images to be stored in the High-Resolution Electronic Still Camera. The camera is under development at Johnson Space Center. Fidelity of the reproduced image and compression speed are of tantamount importance. Lossless compression algorithms are fast and faithfully reproduce the image, but their compression ratios will be unacceptably low due to noise in the front end of the camera. Future efforts will include exploring methods that will reduce the noise in the image and increase the compression ratio.
Real Time Optimal Control of Supercapacitor Operation for Frequency Response
DOE Office of Scientific and Technical Information (OSTI.GOV)
Luo, Yusheng; Panwar, Mayank; Mohanpurkar, Manish
2016-07-01
Supercapacitors are gaining wider applications in power systems due to fast dynamic response. Utilizing supercapacitors by means of power electronics interfaces for power compensation is a proven effective technique. For applications such as requency restoration if the cost of supercapacitors maintenance as well as the energy loss on the power electronics interfaces are addressed. It is infeasible to use traditional optimization control methods to mitigate the impacts of frequent cycling. This paper proposes a Front End Controller (FEC) using Generalized Predictive Control featuring real time receding optimization. The optimization constraints are based on cost and thermal management to enhance tomore » the utilization efficiency of supercapacitors. A rigorous mathematical derivation is conducted and test results acquired from Digital Real Time Simulator are provided to demonstrate effectiveness.« less
All-Dielectric Photonic-Assisted Radio Front-End Technology
NASA Astrophysics Data System (ADS)
Ayazi, Hossein Ali
The threats to civil society posed by high-power electromagnetic weapons are viewed as a grim but real possibility in the world after 11 September 2001. These weapons produce a power surge capable of destroying or damaging sensitive circuitry in electronic systems. Unfortunately, the trend towards circuits with smaller sizes and voltages renders modern electronics highly susceptible to such damage. Radiofrequency communication systems are particularly vulnerable, because the antenna provides a direct port of entry for electromagnetic radiation. In this work, we present a novel type of radiofrequency receiver front end featuring a complete absence of electronic circuitry and metal interconnects, the traditional 'soft spots' of a conventional radiofrequency receiver. The device exploits a dielectric resonator antenna to capture and deliver the radiofrequency signal onto a whispering-gallery mode electro-optic field sensor. The dielectric approach has an added benefit in that it reduces the physical size of the front end, an important benefit in mobile applications.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Milic, A.
The high luminosities of L > 10{sup 34} cm{sup -2}s{sup -1} at the Large Hadron Collider (LHC) at CERN produce an intense radiation environment that the detectors and their electronics must withstand. The ATLAS detector is a multi-purpose apparatus constructed to explore the new particle physics regime opened by the LHC. Of the many decay particles observed by the ATLAS detector, the energy of the created electrons and photons is measured by a sampling calorimeter technique that uses Liquid Argon (LAr) as its active medium. The front end (FE) electronic readout of the ATLAS LAr calorimeter located on the detectormore » itself consists of a combined analog and digital processing system. In order to exploit the higher luminosity while keeping the same trigger bandwidth of 100 kHz, higher transverse granularity, higher resolution and longitudinal shower shape information will be provided from the LAr calorimeter to the Level-l trigger processors. New trigger readout electronics have been designed for this purpose, which will withstand the radiation dose levels expected for an integrated luminosity of 3000 fb{sup -1} during the high luminosity LHC (HL-LHC), which is well above the original LHC design qualifications. (authors)« less
An ultra low-power front-end IC for wearable health monitoring system.
Yu-Pin Hsu; Zemin Liu; Hella, Mona M
2016-08-01
This paper presents a low-power front-end IC for wearable health monitoring systems. The IC, designed in a standard 0.13μm CMOS technology, fully integrates a low-noise analog front-end (AFE) to process the weak bio-signals, followed by an analog-to-digital converter (ADC) to digitize the extracted signals. An AC-coupled driving buffer, that interfaces between the AFE and the ADC is introduced to scale down the power supply of the ADC. The power consumption decreases by 50% compared to the case without power supply scaling. The AFE passes signals from 0.5Hz to 280Hz and from 0.7Hz to 160Hz with a simulated input referred noise of 1.6μVrms and achieves a maximum gain of 35dB/41dB respectively, with a noise-efficiency factor (NEF) of the AFE is 1. The 8-bit ADC achieves a simulated 7.96-bit resolution at 10KS/s sampling rate under 0.5V supply voltage. The overall system consumes only 0.86μW at dual supply voltages of 1V (AFE) and 0.5 V (ADC).
High-performance electronics for time-of-flight PET systems
NASA Astrophysics Data System (ADS)
Choong, W.-S.; Peng, Q.; Vu, C. Q.; Turko, B. T.; Moses, W. W.
2013-01-01
We have designed and built a high-performance readout electronics system for time-of-flight positron emission tomography (TOF PET) cameras. The electronics architecture is based on the electronics for a commercial whole-body PET camera (Siemens/CPS Cardinal electronics), modified to improve the timing performance. The fundamental contributions in the electronics that can limit the timing resolution include the constant fraction discriminator (CFD), which converts the analog electrical signal from the photo-detector to a digital signal whose leading edge is time-correlated with the input signal, and the time-to-digital converter (TDC), which provides a time stamp for the CFD output. Coincident events are identified by digitally comparing the values of the time stamps. In the Cardinal electronics, the front-end processing electronics are performed by an Analog subsection board, which has two application-specific integrated circuits (ASICs), each servicing a PET block detector module. The ASIC has a built-in CFD and TDC. We found that a significant degradation in the timing resolution comes from the ASIC's CFD and TDC. Therefore, we have designed and built an improved Analog subsection board that replaces the ASIC's CFD and TDC with a high-performance CFD (made with discrete components) and TDC (using the CERN high-performance TDC ASIC). The improved Analog subsection board is used in a custom single-ring LSO-based TOF PET camera. The electronics system achieves a timing resolution of 60 ps FWHM. Prototype TOF detector modules are read out with the electronics system and give coincidence timing resolutions of 259 ps FWHM and 156 ps FWHM for detector modules coupled to LSO and LaBr3 crystals respectively.
High-performance electronics for time-of-flight PET systems.
Choong, W-S; Peng, Q; Vu, C Q; Turko, B T; Moses, W W
2013-01-01
We have designed and built a high-performance readout electronics system for time-of-flight positron emission tomography (TOF PET) cameras. The electronics architecture is based on the electronics for a commercial whole-body PET camera (Siemens/CPS Cardinal electronics), modified to improve the timing performance. The fundamental contributions in the electronics that can limit the timing resolution include the constant fraction discriminator (CFD), which converts the analog electrical signal from the photo-detector to a digital signal whose leading edge is time-correlated with the input signal, and the time-to-digital converter (TDC), which provides a time stamp for the CFD output. Coincident events are identified by digitally comparing the values of the time stamps. In the Cardinal electronics, the front-end processing electronics are performed by an Analog subsection board, which has two application-specific integrated circuits (ASICs), each servicing a PET block detector module. The ASIC has a built-in CFD and TDC. We found that a significant degradation in the timing resolution comes from the ASIC's CFD and TDC. Therefore, we have designed and built an improved Analog subsection board that replaces the ASIC's CFD and TDC with a high-performance CFD (made with discrete components) and TDC (using the CERN high-performance TDC ASIC). The improved Analog subsection board is used in a custom single-ring LSO-based TOF PET camera. The electronics system achieves a timing resolution of 60 ps FWHM. Prototype TOF detector modules are read out with the electronics system and give coincidence timing resolutions of 259 ps FWHM and 156 ps FWHM for detector modules coupled to LSO and LaBr 3 crystals respectively.
Modeling and analysis of hybrid pixel detector deficiencies for scientific applications
NASA Astrophysics Data System (ADS)
Fahim, Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman
2015-08-01
Semiconductor hybrid pixel detectors often consist of a pixellated sensor layer bump bonded to a matching pixelated readout integrated circuit (ROIC). The sensor can range from high resistivity Si to III-V materials, whereas a Si CMOS process is typically used to manufacture the ROIC. Independent, device physics and electronic design automation (EDA) tools are used to determine sensor characteristics and verify functional performance of ROICs respectively with significantly different solvers. Some physics solvers provide the capability of transferring data to the EDA tool. However, single pixel transient simulations are either not feasible due to convergence difficulties or are prohibitively long. A simplified sensor model, which includes a current pulse in parallel with detector equivalent capacitor, is often used; even then, spice type top-level (entire array) simulations range from days to weeks. In order to analyze detector deficiencies for a particular scientific application, accurately defined transient behavioral models of all the functional blocks are required. Furthermore, various simulations, such as transient, noise, Monte Carlo, inter-pixel effects, etc. of the entire array need to be performed within a reasonable time frame without trading off accuracy. The sensor and the analog front-end can be modeling using a real number modeling language, as complex mathematical functions or detailed data can be saved to text files, for further top-level digital simulations. Parasitically aware digital timing is extracted in a standard delay format (sdf) from the pixel digital back-end layout as well as the periphery of the ROIC. For any given input, detector level worst-case and best-case simulations are performed using a Verilog simulation environment to determine the output. Each top-level transient simulation takes no more than 10-15 minutes. The impact of changing key parameters such as sensor Poissonian shot noise, analog front-end bandwidth, jitter due to clock distribution etc. can be accurately analyzed to determine ROIC architectural viability and bottlenecks. Hence the impact of the detector parameters on the scientific application can be studied.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Fahim, Farah; Deptuch, Grzegorz W.; Hoff, James R.
Semiconductor hybrid pixel detectors often consist of a pixellated sensor layer bump bonded to a matching pixelated readout integrated circuit (ROIC). The sensor can range from high resistivity Si to III-V materials, whereas a Si CMOS process is typically used to manufacture the ROIC. Independent, device physics and electronic design automation (EDA) tools are used to determine sensor characteristics and verify functional performance of ROICs respectively with significantly different solvers. Some physics solvers provide the capability of transferring data to the EDA tool. However, single pixel transient simulations are either not feasible due to convergence difficulties or are prohibitively long.more » A simplified sensor model, which includes a current pulse in parallel with detector equivalent capacitor, is often used; even then, spice type top-level (entire array) simulations range from days to weeks. In order to analyze detector deficiencies for a particular scientific application, accurately defined transient behavioral models of all the functional blocks are required. Furthermore, various simulations, such as transient, noise, Monte Carlo, inter-pixel effects, etc. of the entire array need to be performed within a reasonable time frame without trading off accuracy. The sensor and the analog front-end can be modeling using a real number modeling language, as complex mathematical functions or detailed data can be saved to text files, for further top-level digital simulations. Parasitically aware digital timing is extracted in a standard delay format (sdf) from the pixel digital back-end layout as well as the periphery of the ROIC. For any given input, detector level worst-case and best-case simulations are performed using a Verilog simulation environment to determine the output. Each top-level transient simulation takes no more than 10-15 minutes. The impact of changing key parameters such as sensor Poissonian shot noise, analog front-end bandwidth, jitter due to clock distribution etc. can be accurately analyzed to determine ROIC architectural viability and bottlenecks. Hence the impact of the detector parameters on the scientific application can be studied.« less
Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Gaioni, L.; Braga, D.; Christian, D.
This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided
Photodetectors and front-end electronics for the LHCb RICH upgrade
NASA Astrophysics Data System (ADS)
Cassina, L.; LHCb RICH
2017-12-01
The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.
Design of an Intelligent Front-End Signal Conditioning Circuit for IR Sensors
NASA Astrophysics Data System (ADS)
de Arcas, G.; Ruiz, M.; Lopez, J. M.; Gutierrez, R.; Villamayor, V.; Gomez, L.; Montojo, Mª. T.
2008-02-01
This paper presents the design of an intelligent front-end signal conditioning system for IR sensors. The system has been developed as an interface between a PbSe IR sensor matrix and a TMS320C67x digital signal processor. The system architecture ensures its scalability so it can be used for sensors with different matrix sizes. It includes an integrator based signal conditioning circuit, a data acquisition converter block, and a FPGA based advanced control block that permits including high level image preprocessing routines such as faulty pixel detection and sensor calibration in the signal conditioning front-end. During the design phase virtual instrumentation technologies proved to be a very valuable tool for prototyping when choosing the best A/D converter type for the application. Development time was significantly reduced due to the use of this technology.
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC
Demaria, N.
2016-12-21
This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaborationmore » is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.« less
NASA Astrophysics Data System (ADS)
Ratti, Lodovico; Manghisoni, Massimo; Re, Valerio; Speziali, Valeria
2001-12-01
This study is concerned with the simulation and design of low-noise front-end electronics monolithically integrated on the same high-resistivity substrate as multielectrode silicon detectors, in a process made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST) of Trento, Italy. The integrated front-end solutions described in this paper use N-channel JFETs as basic elements. The first one is based upon an all-NJFET charge preamplifier designed to match detector capacitances of a few picofarads and available in both a resistive and a non resistive feedback configuration. In the second solution, a single NJFET in the source-follower configuration is connected to the detector, while its source is wired to an external readout channel through an integrated capacitor.
Architecture of PAU survey camera readout electronics
NASA Astrophysics Data System (ADS)
Castilla, Javier; Cardiel-Sas, Laia; De Vicente, Juan; Illa, Joseph; Jimenez, Jorge; Maiorino, Marino; Martinez, Gustavo
2012-07-01
PAUCam is a new camera for studying the physics of the accelerating universe. The camera will consist of eighteen 2Kx4K HPK CCDs: sixteen for science and two for guiding. The camera will be installed at the prime focus of the WHT (William Herschel Telescope). In this contribution, the architecture of the readout electronics system is presented. Back- End and Front-End electronics are described. Back-End consists of clock, bias and video processing boards, mounted on Monsoon crates. The Front-End is based on patch panel boards. These boards are plugged outside the camera feed-through panel for signal distribution. Inside the camera, individual preamplifier boards plus kapton cable completes the path to connect to each CCD. The overall signal distribution and grounding scheme is shown in this paper.
Digital Front End for Wide-Band VLBI Science Receiver
NASA Technical Reports Server (NTRS)
Jongeling, Andre; Sigman, Elliott; Navarro, Robert; Goodhart, Charles; Rogstad, Steve; Chandra, Kumar; Finley, Sue; Trinh, Joseph; Soriano, Melissa; White, Les;
2006-01-01
An upgrade to the very-long-baseline-interferometry (VLBI) science receiver (VSR) a radio receiver used in NASA's Deep Space Network (DSN) is currently being implemented. The current VSR samples standard DSN intermediate- frequency (IF) signals at 256 MHz and after digital down-conversion records data from up to four 16-MHz baseband channels. Currently, IF signals are limited to the 265-to-375-MHz range, and recording rates are limited to less than 80 Mbps. The new digital front end, denoted the Wideband VSR, provides improvements to enable the receiver to process wider bandwidth signals and accommodate more data channels for recording. The Wideband VSR utilizes state-of-the-art commercial analog-to-digital converter and field-programmable gate array (FPGA) integrated circuits, and fiber-optic connections in a custom architecture. It accepts IF signals from 100 to 600 MHz, sampling the signal at 1.28 GHz. The sample data are sent to a digital processing module, using a fiber-optic link for isolation. The digital processing module includes boards designed around an Advanced Telecom Computing Architecture (ATCA) industry-standard backplane. Digital signal processing implemented in FPGAs down-convert the data signals in up to 16 baseband channels with programmable bandwidths from 1 kHz to 16 MHz. Baseband samples are transmitted to a computer via multiple Ethernet connections allowing recording to disk at rates of up to 1 Gbps.
FBI Fingerprint Image Capture System High-Speed-Front-End throughput modeling
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rathke, P.M.
1993-09-01
The Federal Bureau of Investigation (FBI) has undertaken a major modernization effort called the Integrated Automated Fingerprint Identification System (IAFISS). This system will provide centralized identification services using automated fingerprint, subject descriptor, mugshot, and document processing. A high-speed Fingerprint Image Capture System (FICS) is under development as part of the IAFIS program. The FICS will capture digital and microfilm images of FBI fingerprint cards for input into a central database. One FICS design supports two front-end scanning subsystems, known as the High-Speed-Front-End (HSFE) and Low-Speed-Front-End, to supply image data to a common data processing subsystem. The production rate of themore » HSFE is critical to meeting the FBI`s fingerprint card processing schedule. A model of the HSFE has been developed to help identify the issues driving the production rate, assist in the development of component specifications, and guide the evolution of an operations plan. A description of the model development is given, the assumptions are presented, and some HSFE throughput analysis is performed.« less
A system for the automated data-acquisition of fast transient signals in excitable membranes.
Bustamante, J O
1988-01-01
This paper provides a description of a system for the acquisition of fast transient currents flowing across excitable membranes. The front end of the system consists of a CAMAC crate with plug-in modules. The modules provide control of CAMAC operations, analog to digital conversion, electronic memory storage and timing of events. The signals are transferred under direct memory access to an IBM PC microcomputer through a special-purpose interface. Voltage levels from a digital to analog board in the microcomputer are passed through multiplexers to produce the desired voltage pulse patterns to elicit the transmembrane currents. The dead time between consecutive excitatory voltage pulses is limited only by the computer data bus and the software characteristics. The dead time between data transfers can be reduced to the order of milliseconds, which is sufficient for most experiments with transmembrane ionic currents.
Single-Chip CMUT-on-CMOS Front-End System for Real-Time Volumetric IVUS and ICE Imaging
Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F. Levent
2014-01-01
Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of CMUT arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-µm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single-chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex-vivo chicken heart sample. The measured axial and lateral point resolutions are 92 µm and 251 µm, respectively. We successfully acquired volumetric imaging data from the ex-vivo chicken heart with 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce real-time volumetric images with image quality and speed suitable for catheter based clinical applications. PMID:24474131
Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.
Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent
2014-02-01
Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.
Evaluation of commercial ADC radiation tolerance for accelerator experiments
Chen, K.; Chen, H.; Kierstead, J.; ...
2015-08-17
Electronic components used in high energy physics experiments are subjected to a radiation background composed of high energy hadrons, mesons and photons. These particles can induce permanent and transient effects that affect the normal device operation. Ionizing dose and displacement damage can cause chronic damage which disable the device permanently. Transient effects or single event effects are in general recoverable with time intervals that depend on the nature of the failure. The magnitude of these effects is technology dependent with feature size being one of the key parameters. Analog to digital converters are components that are frequently used in detectormore » front end electronics, generally placed as close as possible to the sensing elements to maximize signal fidelity. We report on radiation effects tests conducted on 17 commercially available analog to digital converters and extensive single event effect measurements on specific twelve and fourteen bit ADCs that presented high tolerance to ionizing dose. We discuss mitigation strategies for single event effects (SEE) for their use in the large hadron collider environment.« less
Advanced Wireless Sensor Nodes - MSFC
NASA Technical Reports Server (NTRS)
Varnavas, Kosta; Richeson, Jeff
2017-01-01
NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.
IMAPS Device Packaging Conference 2017 - Engineered Micro Systems & Devices Track
NASA Technical Reports Server (NTRS)
Varnavas, Kosta
2017-01-01
NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.
Low-power low-noise mixed-mode VLSI ASIC for infinite dynamic range imaging applications
NASA Astrophysics Data System (ADS)
Turchetta, Renato; Hu, Y.; Zinzius, Y.; Colledani, C.; Loge, A.
1998-11-01
Solid state solutions for imaging are mainly represented by CCDs and, more recently, by CMOS imagers. Both devices are based on the integration of the total charge generated by the impinging radiation, with no processing of the single photon information. The dynamic range of these devices is intrinsically limited by the finite value of noise. Here we present the design of an architecture which allows efficient, in-pixel, noise reduction to a practically zero level, thus allowing infinite dynamic range imaging. A detailed calculation of the dynamic range is worked out, showing that noise is efficiently suppressed. This architecture is based on the concept of single-photon counting. In each pixel, we integrate both the front-end, low-noise, low-power analog part and the digital part. The former consists of a charge preamplifier, an active filter for optimal noise bandwidth reduction, a buffer and a threshold comparator, and the latter is simply a counter, which can be programmed to act as a normal shift register for the readout of the counters' contents. Two different ASIC's based on this concept have been designed for different applications. The first one has been optimized for silicon edge-on microstrips detectors, used in a digital mammography R and D project. It is a 32-channel circuit, with a 16-bit binary static counter.It has been optimized for a relatively large detector capacitance of 5 pF. Noise has been measured to be equal to 100 + 7*Cd (pF) electron rms with the digital part, showing no degradation of the noise performances with respect to the design values. The power consumption is 3.8mW/channel for a peaking time of about 1 microsecond(s) . The second circuit is a prototype for pixel imaging. The total active area is about (250 micrometers )**2. The main differences of the electronic architecture with respect to the first prototype are: i) different optimization of the analog front-end part for low-capacitance detectors, ii) in- pixel 4-bit comparator-offset compensation, iii) 15-bit pseudo-random counter. The power consumption is 255 (mu) W/channel for a peaking time of 300 ns and an equivalent noise charge of 185 + 97*Cd electrons rms. Simulation and experimental result as well as imaging results will be presented.
A front-end electronic system for large arrays of bolometers
NASA Astrophysics Data System (ADS)
Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.
2018-02-01
CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.
Signal-processing theory for the TurboRogue receiver
NASA Technical Reports Server (NTRS)
Thomas, J. B.
1995-01-01
Signal-processing theory for the TurboRogue receiver is presented. The signal form is traced from its formation at the GPS satellite, to the receiver antenna, and then through the various stages of the receiver, including extraction of phase and delay. The analysis treats the effects of ionosphere, troposphere, signal quantization, receiver components, and system noise, covering processing in both the 'code mode' when the P code is not encrypted and in the 'P-codeless mode' when the P code is encrypted. As a possible future improvement to the current analog front end, an example of a highly digital front end is analyzed.
High Dynamic Range Cognitive Radio Front Ends: Architecture to Evaluation
NASA Astrophysics Data System (ADS)
Ashok, Arun; Subbiah, Iyappan; Varga, Gabor; Schrey, Moritz; Heinen, Stefan
2016-07-01
Advent of TV white space digitization has released frequencies from 470 MHz to 790 MHz to be utilized opportunistically. The secondary user can utilize these so called TV spaces in the absence of primary users. The most important challenge for this coexistence is mutual interference. While the strong TV stations can completely saturate the receiver of the cognitive radio (CR), the cognitive radio spurious tones can disturb other primary users and white space devices. The aim of this paper is to address the challenges for enabling cognitive radio applications in WLAN and LTE. In this process, architectural considerations for the design of cognitive radio front ends are discussed. With high-IF converters, faster and flexible implementation of CR enabled WLAN and LTE are shown. The effectiveness of the architecture is shown by evaluating the CR front ends for compliance of standards namely 802.11b/g (WLAN) and 3GPP TS 36.101 (LTE).
Instruction manual, optical effects module electronic controller and processor, model OEMCP
NASA Technical Reports Server (NTRS)
1975-01-01
The OEM-1 electronic module is discussed; it is comprised of four subsystems: the signal processing and display; the stepper motor controls; the chopper controls; and the dc-dc invertor. The OEM-1 module controls the sample wheel so that the relative transmittance of the samples can be compared to the clear aperture position. The 3-1/2 digit digital voltmeter displays the clear aperture signal level as well as the ratio of the remaining sample positions relative to the clear aperture position. The sample wheel position is decoded so that the signals and ratios can be correlated to the data. The OEM is automatically reset to the I sub o on initial turn-on and can be reset to the '0' position by actuating a front panel switch. The sample wheel can be interrupted to change samples or induce a longer integration time if desired by a front panel command. Integration times from 1 - 50 seconds are provided at the front panel, and BCD data for external interfacing is provided.
Readout, first- and second-level triggers of the new Belle silicon vertex detector
NASA Astrophysics Data System (ADS)
Friedl, M.; Abe, R.; Abe, T.; Aihara, H.; Asano, Y.; Aso, T.; Bakich, A.; Browder, T.; Chang, M. C.; Chao, Y.; Chen, K. F.; Chidzik, S.; Dalseno, J.; Dowd, R.; Dragic, J.; Everton, C. W.; Fernholz, R.; Fujii, H.; Gao, Z. W.; Gordon, A.; Guo, Y. N.; Haba, J.; Hara, K.; Hara, T.; Harada, Y.; Haruyama, T.; Hasuko, K.; Hayashi, K.; Hazumi, M.; Heenan, E. M.; Higuchi, T.; Hirai, H.; Hitomi, N.; Igarashi, A.; Igarashi, Y.; Ikeda, H.; Ishino, H.; Itoh, K.; Iwaida, S.; Kaneko, J.; Kapusta, P.; Karawatzki, R.; Kasami, K.; Kawai, H.; Kawasaki, T.; Kibayashi, A.; Koike, S.; Korpar, S.; Križan, P.; Kurashiro, H.; Kusaka, A.; Lesiak, T.; Limosani, A.; Lin, W. C.; Marlow, D.; Matsumoto, H.; Mikami, Y.; Miyake, H.; Moloney, G. R.; Mori, T.; Nakadaira, T.; Nakano, Y.; Natkaniec, Z.; Nozaki, S.; Ohkubo, R.; Ohno, F.; Okuno, S.; Onuki, Y.; Ostrowicz, W.; Ozaki, H.; Peak, L.; Pernicka, M.; Rosen, M.; Rozanska, M.; Sato, N.; Schmid, S.; Shibata, T.; Stamen, R.; Stanič, S.; Steininger, H.; Sumisawa, K.; Suzuki, J.; Tajima, H.; Tajima, O.; Takahashi, K.; Takasaki, F.; Tamura, N.; Tanaka, M.; Taylor, G. N.; Terazaki, H.; Tomura, T.; Trabelsi, K.; Trischuk, W.; Tsuboyama, T.; Uchida, K.; Ueno, K.; Ueno, K.; Uozaki, N.; Ushiroda, Y.; Vahsen, S.; Varner, G.; Varvell, K.; Velikzhanin, Y. S.; Wang, C. C.; Wang, M. Z.; Watanabe, M.; Watanabe, Y.; Yamada, Y.; Yamamoto, H.; Yamashita, Y.; Yamashita, Y.; Yamauchi, M.; Yanai, H.; Yang, R.; Yasu, Y.; Yokoyama, M.; Ziegler, T.; Žontar, D.
2004-12-01
A major upgrade of the Silicon Vertex Detector (SVD 2.0) of the Belle experiment at the KEKB factory was installed along with new front-end and back-end electronics systems during the summer shutdown period in 2003 to cope with higher particle rates, improve the track resolution and meet the increasing requirements of radiation tolerance. The SVD 2.0 detector modules are read out by VA1TA chips which provide "fast or" (hit) signals that are combined by the back-end FADCTF modules to coarse, but immediate level 0 track trigger signals at rates of several tens of a kHz. Moreover, the digitized detector signals are compared to threshold lookup tables in the FADCTFs to pass on hit information on a single strip basis to the subsequent level 1.5 trigger system, which reduces the rate below the kHz range. Both FADCTF and level 1.5 electronics make use of parallel real-time processing in Field Programmable Gate Arrays (FPGAs), while further data acquisition and event building is done by PC farms running Linux. The new readout system hardware is described and the first results obtained with cosmics are shown.
Digital Baseband Architecture For Transponder
NASA Technical Reports Server (NTRS)
Nguyen, Tien M.; Yeh, Hen-Geul
1995-01-01
Proposed advanced transponder for long-distance radio communication system with turnaround ranging contains carrier-signal-tracking loop including baseband digital "front end." For reduced cost, transponder includes analog intermediate-frequency (IF) section and analog automatic gain control (AGC) loop at first of two IF mixers. However, second IF mixer redesigned to ease digitization of baseband functions. To conserve power and provide for simpler and smaller transponder hardware, baseband digital signal-processing circuits designed to implement undersampling scheme. Furthermore, sampling scheme and sampling frequency chosen so redesign involves minimum modification of command-detector unit (CDU).
45 Gb/s low complexity optical front-end for soft-decision LDPC decoders.
Sakib, Meer Nazmus; Moayedi, Monireh; Gross, Warren J; Liboiron-Ladouceur, Odile
2012-07-30
In this paper a low complexity and energy efficient 45 Gb/s soft-decision optical front-end to be used with soft-decision low-density parity-check (LDPC) decoders is demonstrated. The results show that the optical front-end exhibits a net coding gain of 7.06 and 9.62 dB for post forward error correction bit error rate of 10(-7) and 10(-12) for long block length LDPC(32768,26803) code. The performance over a hard decision front-end is 1.9 dB for this code. It is shown that the soft-decision circuit can also be used as a 2-bit flash type analog-to-digital converter (ADC), in conjunction with equalization schemes. At bit rate of 15 Gb/s using RS(255,239), LDPC(672,336), (672, 504), (672, 588), and (1440, 1344) used with a 6-tap finite impulse response (FIR) equalizer will result in optical power savings of 3, 5, 7, 9.5 and 10.5 dB, respectively. The 2-bit flash ADC consumes only 2.71 W at 32 GSamples/s. At 45 GSamples/s the power consumption is estimated to be 4.95 W.
A precise clock distribution network for MRPC-based experiments
NASA Astrophysics Data System (ADS)
Wang, S.; Cao, P.; Shang, L.; An, Q.
2016-06-01
In high energy physics experiments, the MRPC (Multi-Gap Resistive Plate Chamber) detectors are widely used recently which can provide higher-resolution measurement for particle identification. However, the application of MRPC detectors leads to a series of challenges in electronics design with large number of front-end electronic channels, especially for distributing clock precisely. To deal with these challenges, this paper presents a universal scheme of clock transmission network for MRPC-based experiments with advantages of both precise clock distribution and global command synchronization. For precise clock distributing, the clock network is designed into a tree architecture with two stages: the first one has a point-to-multipoint long range bidirectional distribution with optical channels and the second one has a fan-out structure with copper link inside readout crates. To guarantee the precision of clock frequency or phase, the r-PTP (reduced Precision Time Protocol) and the DDMTD (digital Dual Mixer Time Difference) methods are used for frequency synthesis, phase measurement and adjustment, which is implemented by FPGA (Field Programmable Gate Array) in real-time. In addition, to synchronize global command execution, based upon this clock distribution network, synchronous signals are coded with clock for transmission. With technique of encoding/decoding and clock data recovery, signals such as global triggers or system control commands, can be distributed to all front-end channels synchronously, which greatly simplifies the system design. The experimental results show that both the clock jitter (RMS) and the clock skew can be less than 100 ps.
NASA Astrophysics Data System (ADS)
Gómez-Galán, J. A.; Sánchez-Rodríguez, T.; Sánchez-Raya, M.; Martel, I.; López-Martín, A.; Carvajal, R. G.; Ramírez-Angulo, J.
2014-06-01
This paper evaluates the design of front-end electronics in modern technologies to be used in a new generation of heavy ion detectors—HYDE (FAIR, Germany)—proposing novel architectures to achieve high gain in a low voltage environment. As conventional topologies of operational amplifiers in modern CMOS processes show limitations in terms of gain, novel approaches must be raised. The work addresses the design using transistors with channel length of no more than double the feature size and a supply voltage as low as 1.2 V. A front-end system has been fabricated in a 90 nm process including gain boosting techniques based on regulated cascode circuits. The analog channel has been optimized to match a detector capacitance of 5 pF and exhibits a good performance in terms of gain, speed, linearity and power consumption.
Development of a front end controller/heap manager for PHENIX
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ericson, M.N.; Allen, M.D.; Musrock, M.S.
1996-12-31
A controller/heap manager has been designed for applicability to all detector subsystem types of PHENIX. the heap manager performs all functions associated with front end electronics control including ADC and analog memory control, data collection, command interpretation and execution, and data packet forming and communication. Interfaces to the unit consist of a timing and control bus, a serial bus, a parallel data bus, and a trigger interface. The topology developed is modular so that many functional blocks are identical for a number of subsystem types. Programmability is maximized through the use of flexible modular functions and implementation using field programmablemore » gate arrays (FPGAs). Details of unit design and functionality will be discussed with particular detail given to subsystems having analog memory-based front end electronics. In addition, mode control, serial functions, and FPGA implementation details will be presented.« less
Front-end electronics and DAQ for the EURITRACK tagged neutron inspection system
NASA Astrophysics Data System (ADS)
Lunardon, M.; Bottosso, C.; Fabris, D.; Moretto, S.; Nebbia, G.; Pesente, S.; Viesti, G.; Bigongiari, A.; Colonna, A.; Tintori, C.; Valkovic, V.; Sudac, D.; Peerani, P.; Sequeira, V.; Salvato, M.
2007-08-01
The EURopean Illicit TRAfficing Countermeasures Kit (EURITRACK) Front-End and Data Acquisition System is a compact set of VME boards interfaced with a standard PC. The system is part of a cargo container inspection portal based on the tagged neutrons technique. The front-end processes all detector signals and checks coincidences between any of the 64 pixels of the alpha particle detector and any gamma-ray signals in 22 NaI(Tl) scintillators. The system is capable of handling the data flow at neutron flux up to the portal limiting value of 108 neutrons/second. Some typical applications are presented.
calorimeter, Shower Max., Preshower, Crack Chambers (1979-present) Run II Upgrade: Front end electronics (QIE , Preshower electronics and DAQ Support for Level-2 electron and photon triggers (RECES and ISO) Deputy Head
A front-end readout mixed chip for high-efficiency small animal PET imaging
NASA Astrophysics Data System (ADS)
Ollivier-Henry, N.; Berst, J. D.; Colledani, C.; Hu-Guo, Ch.; Mbow, N. A.; Staub, D.; Guyonnet, J. L.; Hu, Y.
2007-02-01
Today, the main challenge of Positron Emission Tomography (PET) systems dedicated to small animal imaging is to obtain high detection efficiency and a highly accurate localization of radioisotopes. If we focus only on the PET characteristics such as the spatial resolution, its accuracy depends on the design of detector and on the electronics readout system as well. In this paper, we present a new design of such readout system with full custom submicrometer CMOS implementation. The front end chip consists of two main blocks from which the energy information and the time stamp with subnanosecond resolution can be obtained. In our A Multi-Modality Imaging System for Small Animal (AMISSA) PET system design, a matrix of LYSO crystals has to be read at each end by a 64 channels multianode photomultiplier tube. A specific readout electronic has been developed at the Hubert Curien Multidisciplinary Institute (IPHC, France). The architecture of this readout for the energy information detection is composed of a low-noise preamplifier, a CR-RC shaper and an analogue memory. In order to obtain the required dynamic range from 15 to 650 photoelectrons with good linearity, a current mode approach has been chosen for the preamplifier. To detect the signal with a temporal resolution of 1 ns, a comparator with a very low threshold (˜0.3 photoelectron) has been implemented. It gives the time reference of arrival signal coming from the detector. In order to obtain the time coincidence with a temporal resolution of 1 ns, a Time-to-Digital Converter (TDC) based on a Delay-Locked-Loop (DLL) has been designed. The chip is fabricated with AMS 0.35 μm process. The ASIC architecture and some simulation results will be presented in the paper.
Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation
DOE Office of Scientific and Technical Information (OSTI.GOV)
Conrad, Ryan C.; Keller, Daniel T.; Morris, Scott J.
2015-07-01
The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, amore » technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.« less
Newman, D M; Hawley, R W; Goeckel, D L; Crawford, R D; Abraham, S; Gallagher, N C
1993-05-10
An efficient storage format was developed for computer-generated holograms for use in electron-beam lithography. This method employs run-length encoding and Lempel-Ziv-Welch compression and succeeds in exposing holograms that were previously infeasible owing to the hologram's tremendous pattern-data file size. These holograms also require significant computation; thus the algorithm was implemented on a parallel computer, which improved performance by 2 orders of magnitude. The decompression algorithm was integrated into the Cambridge electron-beam machine's front-end processor.Although this provides much-needed ability, some hardware enhancements will be required in the future to overcome inadequacies in the current front-end processor that result in a lengthy exposure time.
NASA Astrophysics Data System (ADS)
Kasinski, K.; Koczon, P.; Ayet, S.; Löchner, S.; Schmidt, C. J.
2017-03-01
New fixed target experiments using high intensity beams with energy up to 10 AGeV from the SIS100 synchrotron presently being constructed at FAIR/GSI are under preparation. Most of the readout electronics and power supplies are expected to be exposed to a very high flux of nuclear reaction products and have to be radiation tolerant up to 3 MRad (TID) and sustain up to 1014/cm2 of 1 MeV neutron equivalent in their life time. Moreover, the mostly minimum ionising particles under investigation leave very little signal in the sensors. Therefore very low noise level amplitude measurements are required by the front-end electronics for effective tracking. Sensor and interconnecting micro-cable capacitance and series resistance in conjunction with intrinsic noise of the charge sensitive amplifier are dominant noise sources in the system. However, the single-ended architecture of the amplifiers employed for the charge processing channels implies a potential problem with noise contributions from power supply sources. Strict system-level constraints leave very little freedom in selecting a power supply structure optimal with respect to: power efficiency, cooling capabilities and power density on modules, but also noise injection to the front-end via the power supply lines. Design of the power supply and distribution system of the Silicon Tracking System in the CBM experiment together with details on the front-end ASICs (STS -XYTER2) and measurement results of power supply and conditioning electronics (selected DC/DC converter and LDO regulators) are presented.
Method of multi-channel data readout and acquisition
Degtiarenko, Pavel V.; Popov, Vladimir E.
2010-06-15
A method for dealing with the problem of simultaneous continuous readout of large number of data channels from the set of multiple sensors in instances where the use of multiple amplitude-to-digital converters is not practical or causes undesirable extra noise and distortion in the data. The new method uses sensor front-end s and subsequent electronics to transform the analog input signals and encode them into a series of short pulses that can be transmitted to a long distance via a high frequency transmission line without information loss. Upon arrival at a destination data decoder and analyzer device, the series of short pulses can be decoded and transformed back, to obtain, store, and utilize the sensor information with the required accuracy.
Front-end electronics for the LZ experiment
NASA Astrophysics Data System (ADS)
Morad, James; LZ Collaboration
2016-03-01
LZ is a second generation direct dark matter detection experiment with 5.6 tonnes of liquid xenon active target, which will be instrumented as a two-phase time projection chamber (TPC). The peripheral xenon outside the active TPC (``skin'') will also be instrumented. In addition, there will be a liquid scintillator based outer veto surrounding the main cryostat. All of these systems will be read out using photomultiplier tubes. I will present the designs for front-end electronics for all these systems, which have been optimized for shaping times, gains, and low noise. Preliminary results from prototype boards will also be presented.
Sun, Xishan; Lan, Allan K.; Bircher, Chad; Deng, Zhi; Liu, Yinong; Shao, Yiping
2011-01-01
A new signal processing method for PET application has been developed, with discrete circuit components to measure energy and timing of a gamma interaction based solely on digital timing processing without using an amplitude-to-digital convertor (ADC) or a constant fraction discriminator (CFD). A single channel discrete component time-based readout (TBR) circuit was implemented in a PC board. Initial circuit functionality and performance evaluations have been conducted. Accuracy and linearity of signal amplitude measurement were excellent, as measured with test pulses. The measured timing accuracy from test pulses reached to less than 300 ps, a value limited mainly by the timing jitter of the prototype electronics circuit. Both suitable energy and coincidence timing resolutions (~18% and ~1.0 ns) have been achieved with 3 × 3 × 20 mm3 LYSO scintillator and photomultiplier tube-based detectors. With its relatively simple circuit and low cost, TBR is expected to be a suitable front-end signal readout electronics for compact PET or other radiation detectors requiring the reading of a large number of detector channels and demanding high performance for energy and timing measurement. PMID:21743761
NASA Astrophysics Data System (ADS)
Maroto, Oscar; Diez-Merino, Laura; Carbonell, Jordi; Tomàs, Albert; Reyes, Marcos; Joven-Alvarez, Enrique; Martín, Yolanda; Morales de los Ríos, J. A.; del Peral, Luis; Rodríguez-Frías, M. D.
2014-07-01
The Japanese Experiment Module (JEM) Extreme Universe Space Observatory (EUSO) will be launched and attached to the Japanese module of the International Space Station (ISS). Its aim is to observe UV photon tracks produced by ultra-high energy cosmic rays developing in the atmosphere and producing extensive air showers. The key element of the instrument is a very wide-field, very fast, large-lense telescope that can detect extreme energy particles with energy above 1019 eV. The Atmospheric Monitoring System (AMS), comprising, among others, the Infrared Camera (IRCAM), which is the Spanish contribution, plays a fundamental role in the understanding of the atmospheric conditions in the Field of View (FoV) of the telescope. It is used to detect the temperature of clouds and to obtain the cloud coverage and cloud top altitude during the observation period of the JEM-EUSO main instrument. SENER is responsible for the preliminary design of the Front End Electronics (FEE) of the Infrared Camera, based on an uncooled microbolometer, and the manufacturing and verification of the prototype model. This paper describes the flight design drivers and key factors to achieve the target features, namely, detector biasing with electrical noise better than 100μV from 1Hz to 10MHz, temperature control of the microbolometer, from 10°C to 40°C with stability better than 10mK over 4.8hours, low noise high bandwidth amplifier adaptation of the microbolometer output to differential input before analog to digital conversion, housekeeping generation, microbolometer control, and image accumulation for noise reduction. It also shows the modifications implemented in the FEE prototype design to perform a trade-off of different technologies, such as the convenience of using linear or switched regulation for the temperature control, the possibility to check the camera performances when both microbolometer and analog electronics are moved further away from the power and digital electronics, and the addition of switching regulators to demonstrate the design is immune to the electrical noise the switching converters introduce. Finally, the results obtained during the verification phase are presented: FEE limitations, verification results, including FEE noise for each channel and its equivalent NETD and microbolometer temperature stability achieved, technologies trade-off, lessons learnt, and design improvement to implement in future project phases.
Readout Strategy of an Electro-optical Coupled PET Detector for Time-of-Flight PET/MRI
Bieniosek, M F; Olcott, P D; Levin, C S
2013-01-01
Combining PET with MRI in a single system provides clinicians with complementary molecular and anatomical information. However, existing integrated PET/MRI systems do not have time-of-flight PET capabilities. This work describes an MRI-compatible front-end electronic system with ToF capabilities. The approach employs a fast arrival-time pickoff comparator to digitize the timing information, and a laser diode to drive a 10m fiber-optic cable to optically transmit asynchronous timing information to a photodiode receiver readout system. The comparator and this electo-optical link show a combined 11.5ps fwhm jitter in response to a fast digital pulse. When configured with LYSO scintillation crystals and Hamamatsu MPPC silicon photo-multipliers the comparator and electro-optical link achieved a 511keV coincidence time resolution of 254.7ps +/− 8.0ps fwhm with 3×3×20mm crystals and 166.5 +/− 2.5ps fwhm with 3×3×5mm crystals. PMID:24061218
NASA Astrophysics Data System (ADS)
Xie, Yiwei; Geng, Zihan; Zhuang, Leimeng; Burla, Maurizio; Taddei, Caterina; Hoekman, Marcel; Leinse, Arne; Roeloffzen, Chris G. H.; Boller, Klaus-J.; Lowery, Arthur J.
2017-12-01
Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF) filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP)-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.
Fermilab Recycler Ring BPM Upgrade Based on Digital Receiver Technology
NASA Astrophysics Data System (ADS)
Webber, R.; Crisp, J.; Prieto, P.; Voy, D.; Briegel, C.; McClure, C.; West, R.; Pordes, S.; Mengel, M.
2004-11-01
Electronics for the 237 BPMs in the Fermilab Recycler Ring have been upgraded from a log-amplifier based system to a commercially produced digitizer-digital down converter based system. The hardware consists of a pre-amplifier connected to a split-plate BPM, an analog differential receiver-filter module and an 8-channel 80-MHz digital down converter VME board. The system produces position and intensity with a dynamic range of 30 dB and a resolution of ±10 microns. The position measurements are made on 2.5-MHz bunched beam and barrier buckets of the un-bunched beam. The digital receiver system operates in one of six different signal processing modes that include 2.5-MHz average, 2.5-MHz bunch-by-bunch, 2.5-MHz narrow band, unbunched average, un-bunched head/tail and 89-kHz narrow band. Receiver data is acquired on any of up to sixteen clock events related to Recycler beam transfers and other machine activities. Data from the digital receiver board are transferred to the front-end CPU for position and intensity computation on an on-demand basis through the VME bus. Data buffers are maintained for each of the acquisition events and support flash, closed orbit and turn-by-turn measurements. A calibration system provides evaluation of the BPM signal path and application programs.
A Test Apparatus for the MAJORANA DEMONSTRATOR Front-end Electronics
NASA Astrophysics Data System (ADS)
Singh, Harjit; Loach, James; Poon, Alan
2012-10-01
One of the most important experimental programs in neutrino physics is the search for neutrinoless double-beta decay. The MAJORANA collaboration is searching for this rare nuclear process in the Ge-76 isotope using HPGe detectors. Each detector is instrumented with high-performance electronics to read out and amplify the signals. The part of the electronics close to the detectors, consisting of a novel front-end circuit, cables and connectors, is made of radio-pure materials and is exceedingly delicate. In this work a dedicated test apparatus was created to benchmark the performance of the electronics before installation in the experiment. The apparatus was designed for cleanroom use, with fixtures to hold the components without contaminating them, and included the electronics necessary for power and readout. In addition to testing, the station will find longer term use in development of future versions of the electronics.
ERIC Educational Resources Information Center
Dessy, Raymond E., Ed.
1986-01-01
Discusses topics involved in the selection of an analog-to-digital (ADC) converter and associated front-end signal conditioning hardware. Reviews what types of ADC's are available, best type for particular application, conversion rates, amplification, filtering, noise, and compatibility issues. Suggests purchase strategy and supplies names and…
S-Band POSIX Device Drivers for RTEMS
NASA Technical Reports Server (NTRS)
Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.
2011-01-01
This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).
Geostationary payload concepts for personal satellite communications
NASA Technical Reports Server (NTRS)
Benedicto, J.; Rinous, P.; Roberts, I.; Roederer, A.; Stojkovic, I.
1993-01-01
This paper reviews candidate satellite payload architectures for systems providing world-wide communication services to mobile users equipped with hand-held terminals based on large geostationary satellites. There are a number of problems related to the payload architecture, on-board routing and beamforming, and the design of the S-band Tx and L-band Rx antenna and front ends. A number of solutions are outlined, based on trade-offs with respect to the most significant performance parameters such as capacity, G/T, flexibility of routing traffic to beams and re-configuration of the spot-beam coverage, and payload mass and power. Candidate antenna and front-end configurations were studied, in particular direct radiating arrays, arrays magnified by a reflector and active focused reflectors with overlapping feed clusters for both transmit (multimax) and receive (beam synthesis). Regarding the on-board routing and beamforming sub-systems, analog techniques based on banks of SAW filters, FET or CMOS switches and cross-bar fixed and variable beamforming are compared with a hybrid analog/digital approach based on Chirp Fourier Transform (CFT) demultiplexer combined with digital beamforming or a fully digital processor implementation, also based on CFT demultiplexing.
NASA Astrophysics Data System (ADS)
Meng, Xiangting; Chapman, John; Levin, Daniel; Dai, Tiesheng; Zhu, Junjie; Zhou, Bing; Um Atlas Group Team
2016-03-01
The ATLAS Muon Spectrometer Phase-I (and Phase-II) upgrade includes the BIS78 muon trigger detector project: two sets of eight very thin Resistive Place Chambers (tRPCs) combined with small Monitored Drift Tube (MDT) chambers in the pseudorapidity region 1<| η|<1.3. The tRPCs will be comprised of triplet readout layer in each of the eta and azimuthal phi coordinates, with about 400 readout strips per layer. The anticipated hit rate is 100-200 kHz per strip. Digitization of the strip signals will be done by 32-channel CERN HPTDC chips. The HPTDC is a highly configurable ASIC designed by the CERN Microelectronics group. It can work in both trigger and trigger-less modes, be readout in parallel or serially. For Phase-I operation, a stringent latency requirement of 43 bunch crossings (1075 ns) is imposed. The latency budget for the front end digitization must be kept to a minimal value, ideally less than 350 ns. We conducted detailed HPTDC latency simulations using the Behavioral Verilog code from the CERN group. We will report the results of these simulations run for the anticipated detector operating environment and for various HPTDC configurations.
Picosecond Resolution Time-to-Digital Converter Using Gm-C Integrator and SAR-ADC
NASA Astrophysics Data System (ADS)
Xu, Zule; Miyahara, Masaya; Matsuzawa, Akira
2014-04-01
A picosecond resolution time-to-digital converter (TDC) is presented. The resolution of a conventional delay chain TDC is limited by the delay of a logic buffer. Various types of recent TDCs are successful in breaking this limitation, but they require a significant calibration effort to achieve picosecond resolution with a sufficient linear range. To address these issues, we propose a simple method to break the resolution limitation without any calibration: a Gm-C integrator followed by a successive approximation register analog-to-digital converter (SAR-ADC). This translates the time interval into charge, and then the charge is quantized. A prototype chip was fabricated in 90 nm CMOS. The measurement results reveal a 1 ps resolution, a -0.6/0.7 LSB differential nonlinearity (DNL), a -1.1/2.3 LSB integral nonlinearity (INL), and a 9-bit range. The measured 11.74 ps single-shot precision is caused by the noise of the integrator. We analyze the noise of the integrator and propose an improved front-end circuit to reduce this noise. The proposal is verified by simulations showing the maximum single-shot precision is less than 1 ps. The proposed front-end circuit can also diminish the mismatch effects.
PMF: The front end electronic of the ALFA detector
NASA Astrophysics Data System (ADS)
Barrillon, P.; Blin, S.; Cheikali, C.; Cuisy, D.; Gaspard, M.; Fournier, D.; Heller, M.; Iwanski, W.; Lavigne, B.; De la Taille, C.; Puzo, P.; Socha, J.-L.
2010-11-01
The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.
The HADES-RICH upgrade using Hamamatsu H12700 MAPMTs with DiRICH FEE + Readout
NASA Astrophysics Data System (ADS)
Patel, V.; Traxler, M.
2018-03-01
The High Acceptance Di-Electron Spectrometer (HADES) is operational since the year 2000 and uses a hadron blind RICH detector for electron identification. The RICH photon detector is currently replaced by Hamamatsu H12700 MAPMTs with a readout system based on the DiRICH front-end module. The electronic readout chain is being developed as a joint effort of the HADES-, CBM- and PANDA collaborations and will also be used in the photon detectors for the upcoming Compressed Baryonic Matter (CBM) and PANDA experiments at FAIR . This article gives a brief overview on the photomultipliers and their quality assurance test measurements, as well as first measurements of the new DiRICH front-end module in final configurations.
A 14-bit 40-MHz analog front end for CCD application
NASA Astrophysics Data System (ADS)
Jingyu, Wang; Zhangming, Zhu; Shubin, Liu
2016-06-01
A 14-bit, 40-MHz analog front end (AFE) for CCD scanners is analyzed and designed. The proposed system incorporates a digitally controlled wideband variable gain amplifier (VGA) with nearly 42 dB gain range, a correlated double sampler (CDS) with programmable gain functionality, a 14-bit analog-to-digital converter and a programmable timing core. To achieve the maximum dynamic range, the VGA proposed here can linearly amplify the input signal in a gain range from -1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth. A novel CDS takes image information out of noise, and further amplifies the signal accurately in a gain range from 0 to 18 dB in 0.035 dB step. A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity. An internal timing core can provide flexible timing for CCD arrays, CDS and ADC. The proposed AFE was fabricated in SMIC 0.18 μm CMOS process. The whole circuit occupied an active area of 2.8 × 4.8 mm2 and consumed 360 mW. When the frequency of input signal is 6.069 MHz, and the sampling frequency is 40 MHz, the signal to noise and distortion (SNDR) is 70.3 dB, the effective number of bits is 11.39 bit. Project supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044, 61376033), the National High-Tech Program of China (No. 2013AA014103), and the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory (No. ZHD201302).
Compact pulse width modulation circuitry for silicon photomultiplier readout.
Bieniosek, M F; Olcott, P D; Levin, C S
2013-08-07
The adoption of solid-state photodetectors for positron emission tomography (PET) system design and the interest in 3D interaction information from PET detectors has lead to an increasing number of readout channels in PET systems. To handle these additional readout channels, PET readout electronics should be simplified to reduce the power consumption, cost, and size of the electronics for a single channel. Pulse-width modulation (PWM), where detector pulses are converted to digital pulses with width proportional to the detected photon energy, promises to simplify PET readout by converting the signals to digital form at the beginning of the processing chain, and allowing a single time-to-digital converter to perform the data acquisition for many channels rather than routing many analogue channels and digitizing in the back end. Integrator based PWM systems, also known as charge-to-time converters (QTCs), are especially compact, reducing the front-end electronics to an op-amp integrator with a resistor discharge, and a comparator. QTCs, however, have a long dead-time during which dark count noise is integrated, reducing the output signal-to-noise ratio. This work presents a QTC based PWM circuit with a gated integrator that shows performance improvements over existing QTC based PWM. By opening and closing an analogue switch on the input of the integrator, the circuit can be controlled to integrate only the portions of the signal with a high signal-to-noise ratio. It also allows for multiplexing different detectors into the same PWM circuit while avoiding uncorrelated noise propagation between photodetector channels. Four gated integrator PWM circuits were built to readout the spatial channels of two position sensitive solid-state photomultiplier (PS-SSPM). Results show a 4 × 4 array 0.9 mm × 0.9 mm × 15 mm of LYSO crystals being identified on the 5 mm × 5 mm PS-SSPM at room temperature with no degradation for twofold multiplexing. In principle, much larger multiplexing ratios are possible, limited only by count rate issues.
Efficient audio signal processing for embedded systems
NASA Astrophysics Data System (ADS)
Chiu, Leung Kin
As mobile platforms continue to pack on more computational power, electronics manufacturers start to differentiate their products by enhancing the audio features. However, consumers also demand smaller devices that could operate for longer time, hence imposing design constraints. In this research, we investigate two design strategies that would allow us to efficiently process audio signals on embedded systems such as mobile phones and portable electronics. In the first strategy, we exploit properties of the human auditory system to process audio signals. We designed a sound enhancement algorithm to make piezoelectric loudspeakers sound ”richer" and "fuller." Piezoelectric speakers have a small form factor but exhibit poor response in the low-frequency region. In the algorithm, we combine psychoacoustic bass extension and dynamic range compression to improve the perceived bass coming out from the tiny speakers. We also developed an audio energy reduction algorithm for loudspeaker power management. The perceptually transparent algorithm extends the battery life of mobile devices and prevents thermal damage in speakers. This method is similar to audio compression algorithms, which encode audio signals in such a ways that the compression artifacts are not easily perceivable. Instead of reducing the storage space, however, we suppress the audio contents that are below the hearing threshold, therefore reducing the signal energy. In the second strategy, we use low-power analog circuits to process the signal before digitizing it. We designed an analog front-end for sound detection and implemented it on a field programmable analog array (FPAA). The system is an example of an analog-to-information converter. The sound classifier front-end can be used in a wide range of applications because programmable floating-gate transistors are employed to store classifier weights. Moreover, we incorporated a feature selection algorithm to simplify the analog front-end. A machine learning algorithm AdaBoost is used to select the most relevant features for a particular sound detection application. In this classifier architecture, we combine simple "base" analog classifiers to form a strong one. We also designed the circuits to implement the AdaBoost-based analog classifier.
Integrated input protection against discharges for Micro Pattern Gas Detectors readout ASICs
NASA Astrophysics Data System (ADS)
Fiutowski, T.; Dąbrowski, W.; Koperny, S.; Wiącek, P.
2017-02-01
Immunity against possible random discharges inside active detector volume of MPGDs is one of the key aspects that should be addressed in the design of the front-end electronics. This issue becomes particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies, for which the breakdown voltages are in the range of a few Volts. The paper presents the design of various input protection structures integrated in the ASIC manufactured in a 350 nm CMOS process and test results using an electrical circuit to mimic discharges in the detectors.
The Majorana Low-noise Low-background Front-end Electronics
NASA Astrophysics Data System (ADS)
Abgrall, N.; Aguayo, E.; Avignone, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y.-D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, D. G.; Poon, A. W. P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G. H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C.-H.; Yumatov, V.
The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope 76Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low- background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.
The Majorana low-noise low-background front-end electronics
Abgrall, N.; Aguayo, E.; Avignone, III, F. T.; ...
2015-03-24
The Majorana Demonstrator will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope ⁷⁶Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the Majorana Demonstrator is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the ⁷⁶Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low-background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the Majorana Demonstrator. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less
VHDL implementation of feature-extraction algorithm for the PANDA electromagnetic calorimeter
NASA Astrophysics Data System (ADS)
Guliyev, E.; Kavatsyuk, M.; Lemmens, P. J. J.; Tambave, G.; Löhner, H.; Panda Collaboration
2012-02-01
A simple, efficient, and robust feature-extraction algorithm, developed for the digital front-end electronics of the electromagnetic calorimeter of the PANDA spectrometer at FAIR, Darmstadt, is implemented in VHDL for a commercial 16 bit 100 MHz sampling ADC. The source-code is available as an open-source project and is adaptable for other projects and sampling ADCs. Best performance with different types of signal sources can be achieved through flexible parameter selection. The on-line data-processing in FPGA enables to construct an almost dead-time free data acquisition system which is successfully evaluated as a first step towards building a complete trigger-less readout chain. Prototype setups are studied to determine the dead-time of the implemented algorithm, the rate of false triggering, timing performance, and event correlations.
Digital analyzer for point processes based on first-in-first-out memories
NASA Astrophysics Data System (ADS)
Basano, Lorenzo; Ottonello, Pasquale; Schiavi, Enore
1992-06-01
We present an entirely new version of a multipurpose instrument designed for the statistical analysis of point processes, especially those characterized by high bunching. A long sequence of pulses can be recorded in the RAM bank of a personal computer via a suitably designed front end which employs a pair of first-in-first-out (FIFO) memories; these allow one to build an analyzer that, besides being simpler from the electronic point of view, is capable of sustaining much higher intensity fluctuations of the point process. The overflow risk of the device is evaluated by treating the FIFO pair as a queueing system. The apparatus was tested using both a deterministic signal and a sequence of photoelectrons obtained from laser light scattered by random surfaces.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wah, Yau Wai
2012-12-06
The goal of the J-PARC neutral kaon experiment (E14/KOTO) is to discover and measure the rate of the kaon rare decay to pi-zero and two neutrinos. This flavor changing neutral current decay proceeds through second-order weak interactions. Other, as yet undiscovered particles, which can mediate the decay could provide an enhancement (or depletion) to the branching ratio which in the Standard Model is accurately predicted within a few percent to be 2.8x10-11. The experiment is designed to observe more than 100 events at the Standard Model branching. It is a follow-up of the KEK E391a experiment and has stage-2 approvalmore » by J-PARC PAC in 2007. E14/KOTO has collaborators from Japan (Kyoto, Osaka, Yamagata, Saga), US (Arizona State, Chicago, Michigan Ann Arbor), Taiwan (National Taiwan), Korea, and Russia (Dubna). The experiment exploits the 300kW 30-50 GeV proton delivery of the J-PARC accelerator with a hermetic high acceptance detector with a fine grained Cesium Iodide (CsI) crystal calorimeter, and state of the art electronic front end and data acquisition system. With the recovery of the tsunami disaster on March 11th 2011, E14 is scheduled to start collecting data in December 2012. During the detector construction phase, Chicago focuses on the front end electronics readout of the entire detector system, particularly the CsI calorimeter. The CsI crystals together with its photomultipliers were previously used at the Fermilab KTeV experiment (E832/E799), and were loaned to E14 via this Chicago DOE support. The new readout electronics includes an innovative 10-pole pulse-shaping technique coupled with high speed digitization (14-bit 125MHz and 12-bit 500MHz). This new instrument enables us to measure both energy and timing, particularly with timing resolution better than 100 psec. Besides the cost saving by elimination of the standard time to digital converters, it is now possible to measure the momenta of the final state photons for additional background suppression. Chicago also designed and built several technically difficult hardware items including the vacuum cable feed-through (for a total of 3500 channels); special 50 ohm single-ended signal to 100 ohm differential signal converters; and last but not least, the recommendations on the selection of the differential signal cables for all detector elements to eliminate ground loops while maintaining signal fidelity.« less
Citterio, M.; Camplani, A.; Cannon, M.; ...
2015-11-19
SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less
AFEII Analog Front End Board Design Specifications
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rubinov, Paul; /Fermilab
2005-04-01
This document describes the design of the 2nd iteration of the Analog Front End Board (AFEII), which has the function of receiving charge signals from the Central Fiber Tracker (CFT) and providing digital hit pattern and charge amplitude information from those charge signals. This second iteration is intended to address limitations of the current AFE (referred to as AFEI in this document). These limitations become increasingly deleterious to the performance of the Central Fiber Tracker as instantaneous luminosity increases. The limitations are inherent in the design of the key front end chips on the AFEI board (the SVXIIe and themore » SIFT) and the architecture of the board itself. The key limitations of the AFEI are: (1) SVX saturation; (2) Discriminator to analog readout cross talk; (3) Tick to tick pedestal variation; and (4) Channel to channel pedestal variation. The new version of the AFE board, AFEII, addresses these limitations by use of a new chip, the TriP-t and by architectural changes, while retaining the well understood and desirable features of the AFEI board.« less
Development of ground-based ELF/VLF receiver system in Wuhan and its first results
NASA Astrophysics Data System (ADS)
Chen, Yanping; Yang, Guobin; Ni, Binbin; Zhao, Zhengyu; Gu, Xudong; Zhou, Chen; Wang, Feng
2016-05-01
A new digital low-frequency receiver system has been developed at Wuhan University for sensitive reception of low-latitude broadband Extremely Low Frequency (ELF) and Very Low Frequency (VLF) radio waves originating from either natural or artificial sources. These low-frequency radio waves are useful for ionospheric remote sensing, geospace environment monitoring, and submarine communications. This paper presents the principle and architecture of the system framework, including magnetic loop antenna design, low-noise analog front-end and digital receiver with data sampling and transmission. A new structure is adopted in the analog front end to provide high common-mode rejection and to reduce interference. On basis of field programmable gate array (FPGA) device and Universal Serial Bus (USB) architecture, the digital receiver is developed along with time keeping and synchronization module. The validity and feasibility of the self-developed ground-based ELF/VLF receiver system is evaluated by first results of experimental data that show the temporal variation of broadband ELF/VLF wave spectral intensity in Wuhan (30.54 °N, 114.37 °E). In addition to the acquisition of VLF transmitter signals at various frequencies, tweek atmospherics are also clearly captured to occur at multiple modes up to n = 6.
Gravitational Reference Sensor Front-End Electronics Simulator for LISA
NASA Astrophysics Data System (ADS)
Meshksar, Neda; Ferraioli, Luigi; Mance, Davor; ten Pierick, Jan; Zweifel, Peter; Giardini, Domenico; ">LISA Pathfinder colaboration,
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jones, M.
Configuration and calibration of the front-end electronics typical of many silicon detector configurations were investigated in a lab activity based on a pair of strip sensors interfaced with FSSR2 read-out chips and an FPGA. This simple hardware configuration, originally developed for a telescope at the Fermilab Test Beam Facility, was used to measure thresholds and noise on individual readout channels and to study the influence that different configurations of the front-end electronics had on the observed levels of noise in the system. An understanding of the calibration and operation of this small detector system provided an opportunity to explore themore » architecture of larger systems such as those currently in use at LHC experiments.« less
TDC-based readout electronics for real-time acquisition of high resolution PET bio-images
NASA Astrophysics Data System (ADS)
Marino, N.; Saponara, S.; Ambrosi, G.; Baronti, F.; Bisogni, M. G.; Cerello, P.,; Ciciriello, F.; Corsi, F.; Fanucci, L.; Ionica, M.; Licciulli, F.; Marzocca, C.; Morrocchi, M.; Pennazio, F.; Roncella, R.; Santoni, C.; Wheadon, R.; Del Guerra, A.
2013-02-01
Positron emission tomography (PET) is a clinical and research tool for in vivo metabolic imaging. The demand for better image quality entails continuous research to improve PET instrumentation. In clinical applications, PET image quality benefits from the time of flight (TOF) feature. Indeed, by measuring the photons arrival time on the detectors with a resolution less than 100 ps, the annihilation point can be estimated with centimeter resolution. This leads to better noise level, contrast and clarity of detail in the images either using analytical or iterative reconstruction algorithms. This work discusses a silicon photomultiplier (SiPM)-based magnetic-field compatible TOF-PET module with depth of interaction (DOI) correction. The detector features a 3D architecture with two tiles of SiPMs coupled to a single LYSO scintillator on both its faces. The real-time front-end electronics is based on a current-mode ASIC where a low input impedance, fast current buffer allows achieving the required time resolution. A pipelined time to digital converter (TDC) measures and digitizes the arrival time and the energy of the events with a timestamp of 100 ps and 400 ps, respectively. An FPGA clusters the data and evaluates the DOI, with a simulated z resolution of the PET image of 1.4 mm FWHM.
NASA Astrophysics Data System (ADS)
Arteche, F.; Rivetta, C.; Iglesias, M.; Echeverria, I.
2016-05-01
Silicon detectors have been used in astrophysics satellites and particle detectors for high energy physics (HEP) experiments. For HEP applications, EMC studies have been conducted in silicon detectors to characterize the impact of external noise on the system. They have shown that problems associated with the new generation of silicon detectors are related with interferences generated by the power supplies and auxiliary equipment connected to the device. Characterization of these interferences along with the coupling and their propagation into the susceptible front-end circuits is required for a successful integration of these systems. This paper presents the analysis of the sensitivity curves and coupling mechanisms between the noise and the front-end electronics that have been observed during the characterization of two silicon detector prototypes: the CMS-Silicon tracker detector (CMS-ST) and Silicon Vertex Detector (Belle II-SVD). As a result of these studies, it is possible to identify critical elements in prototypes to take corrective actions in the design and improve the front-end electronics performance.
Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit
NASA Technical Reports Server (NTRS)
Baranauskas, Gytis (Inventor); Lim, Boon H. (Inventor); Baranauskas, Dalius (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor)
2017-01-01
According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.
A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications
NASA Astrophysics Data System (ADS)
Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.
2017-11-01
A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.
Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications
NASA Astrophysics Data System (ADS)
Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.
2003-04-01
This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.
Music and hearing aids--an introduction.
Chasin, Marshall
2012-09-01
Modern digital hearing aids have provided improved fidelity over those of earlier decades for speech. The same however cannot be said for music. Most modern hearing aids have a limitation of their "front end," which comprises the analog-to-digital (A/D) converter. For a number of reasons, the spectral nature of music as an input to a hearing aid is beyond the optimal operating conditions of the "front end" components. Amplified music tends to be of rather poor fidelity. Once the music signal is distorted, no amount of software manipulation that occurs later in the circuitry can improve things. The solution is not a software issue. Some characteristics of music that make it difficult to be transduced without significant distortion include an increased sound level relative to that of speech, and the crest factor- the difference in dB between the instantaneous peak of a signal and its RMS value. Clinical strategies and technical innovations have helped to improve the fidelity of amplified music and these include a reduction of the level of the input that is presented to the A/D converter.
Status of the design of the ITER ECE diagnostic
Taylor, G.; Austin, M. E.; Beno, J. H.; ...
2015-03-12
In this study, the baseline design for the ITER electron cyclotron emission (ECE) diagnostic has entered the detailed preliminary design phase. Two plasma views are planned, a radial view and an oblique view that is sensitive to distortions in the electron momentum distribution near the average thermal momentum. Both views provide high spatial resolution electron temperature profiles when the momentum distribution remains Maxwellian. The ECE diagnostic system consists of the front-end optics, including two 1000 K calibration sources, in equatorial port plug EP9, the 70-1000 GHz transmission system from the front-end to the diagnostics hall, and the ECE instrumentation inmore » the diagnostics hall. The baseline ECE instrumentation will include two Michelson interferometers that can simultaneously measure ordinary and extraordinary mode ECE from 70 to 1000 GHz, and two heterodyne radiometer systems, covering 122-230 GHz and 244-355 GHz. Significant design challenges include 1) developing highly-reliable 1000 K calibration sources and the associated shutters/mirrors, 2) providing compliant couplings between the front-end optics and the polarization splitter box that accommodate displacements of the vacuum vessel during plasma operations and bake out, 3) protecting components from damage due to stray ECH radiation and other intense millimeter wave emission and 4) providing the low-loss broadband transmission system.« less
A front end readout electronics ASIC chip for position sensitive solid state detectors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kravis, S.D.; Tuemer, T.O.; Visser, G.J.
1998-12-31
A mixed signal Application Specific Integrated Circuit (ASIC) chip for front end readout electronics of position sensitive solid state detectors has been manufactured. It is called RENA (Readout Electronics for Nuclear Applications). This chip can be used for both medical and industrial imaging of X-rays and gamma rays. The RENA chip is a monolithic integrated circuit and has 32 channels with low noise high input impedance charge sensitive amplifiers. It works in pulse counting mode with good energy resolution. It also has a self triggering output which is essential for nuclear applications when the incident radiation arrives at random. Different,more » externally selectable, operational modes that includes a sparse readout mode is available to increase data throughput. It also has externally selectable shaping (peaking) times.« less
IMOTEPAD: A mixed-signal 64-channel front-end ASIC for small-animal PET imaging
NASA Astrophysics Data System (ADS)
Fang, Xiaochao; Ollivier-Henry, Nicolas; Gao, Wu; Hu-Guo, Christine; Colledani, Claude; Humbert, Bernard; Brasse, David; Hu, Yann
2011-04-01
This paper presents the design and characteristics of a mixed-signal 64-channel front-end readout ASIC called IMOTEPAD dedicated to multi-channel plate (MCP) photodetector coupled to LYSO scintillating crystals for small-animal PET imaging. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. As a result, both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. This dedicated ASIC IMOTEPAD comprises two parts: the analog part IMOTEPA and the digital part IMOTEPD. The IMOTEPA is dedicated to energy measurement. And the timing information is digitized by the IMOTEPD in which the key principal element is a time-to-digital converter (TDC) based on a delay-locked loop (DLL) with 32 delay cells. The chip is designed and fabricated in 0.35 μm CMOS process. The measurements show that for the analog part IMOTEPA, the energy gain is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The SNR is 39 dB and the RMS noise is 300 μV. The nonlinearity is less than 3%. The crosstalk is less than 0.2%. For the IMOTEPD, the bin size of the TDC is 625 ps with a reference clock of 50 MHz. The RMS jitter of the DLL is less than 42 ps. The DNL of the TDC is equal to about 0.17 LSB and the INL is equal to 0.31 LSB. The power dissipation of each channel is less than 16.8 mW. The design of the ASIC, especially for TDC and the measurement results of the IMOTEPAD will be presented and discussed in this paper.
Noise Characterization and Filtering in the MicroBooNE Liquid Argon TPC
NASA Astrophysics Data System (ADS)
Acciarri, R.; Adams, C.; An, R.; Anthony, J.; Asaadi, J.; Auger, M.; Bagby, L.; Balasubramanian, S.; Baller, B.; Barnes, C.; Barr, G.; Bass, M.; Bay, F.; Bishai, M.; Blake, A.; Bolton, T.; Bullard, B.; Camilleri, L.; Caratelli, D.; Carls, B.; Castillo Fernandez, R.; Cavanna, F.; Chen, H.; Church, E.; Cianci, D.; Cohen, E.; Collin, G. H.; Conrad, J. M.; Convery, M.; Crespo-Anadón, J. I.; De Geronimo, G.; Del Tutto, M.; Devitt, D.; Dytman, S.; Eberly, B.; Ereditato, A.; Escudero Sanchez, L.; Esquivel, J.; Fadeeva, A. A.; Fleming, B. T.; Foreman, W.; Furmanski, A. P.; Garcia-Gamez, D.; Garvey, G. T.; Genty, V.; Goeldi, D.; Gollapinni, S.; Graf, N.; Gramellini, E.; Greenlee, H.; Grosso, R.; Guenette, R.; Hackenburg, A.; Hamilton, P.; Hen, O.; Hewes, J.; Hill, C.; Ho, J.; Horton-Smith, G.; Hourlier, A.; Huang, E.-C.; James, C.; de Vries, J. Jan; Jen, C.-M.; Jiang, L.; Johnson, R. A.; Joshi, J.; Jostlein, H.; Kaleko, D.; Karagiorgi, G.; Ketchum, W.; Kirby, B.; Kirby, M.; Kobilarcik, T.; Kreslo, I.; Laube, A.; Li, S.; Li, Y.; Lister, A.; Littlejohn, B. R.; Lockwitz, S.; Lorca, D.; Louis, W. C.; Luethi, M.; Lundberg, B.; Luo, X.; Marchionni, A.; Mariani, C.; Marshall, J.; Martinez Caicedo, D. A.; Meddage, V.; Miceli, T.; Mills, G. B.; Moon, J.; Mooney, M.; Moore, C. D.; Mousseau, J.; Murrells, R.; Naples, D.; Nienaber, P.; Nowak, J.; Palamara, O.; Paolone, V.; Papavassiliou, V.; Pate, S. F.; Pavlovic, Z.; Piasetzky, E.; Porzio, D.; Pulliam, G.; Qian, X.; Raaf, J. L.; Radeka, V.; Rafique, A.; Rescia, S.; Rochester, L.; von Rohr, C. Rudolf; Russell, B.; Schmitz, D. W.; Schukraft, A.; Seligman, W.; Shaevitz, M. H.; Sinclair, J.; Smith, A.; Snider, E. L.; Soderberg, M.; Söldner-Rembold, S.; Soleti, S. R.; Spentzouris, P.; Spitz, J.; St. John, J.; Strauss, T.; Szelc, A. M.; Tagg, N.; Terao, K.; Thomson, M.; Thorn, C.; Toups, M.; Tsai, Y.-T.; Tufanli, S.; Usher, T.; Van De Pontseele, W.; Van de Water, R. G.; Viren, B.; Weber, M.; Wickremasinghe, D. A.; Wolbers, S.; Wongjirad, T.; Woodruff, K.; Yang, T.; Yates, L.; Yu, B.; Zeller, G. P.; Zennamo, J.; Zhang, C.
2017-08-01
The low-noise operation of readout electronics in a liquid argon time projection chamber (LArTPC) is critical to properly extract the distribution of ionization charge deposited on the wire planes of the TPC, especially for the induction planes. This paper describes the characteristics and mitigation of the observed noise in the MicroBooNE detector. The MicroBooNE's single-phase LArTPC comprises two induction planes and one collection sense wire plane with a total of 8256 wires. Current induced on each TPC wire is amplified and shaped by custom low-power, low-noise ASICs immersed in the liquid argon. The digitization of the signal waveform occurs outside the cryostat. Using data from the first year of MicroBooNE operations, several excess noise sources in the TPC were identified and mitigated. The residual equivalent noise charge (ENC) after noise filtering varies with wire length and is found to be below 400 electrons for the longest wires (4.7 m). The response is consistent with the cold electronics design expectations and is found to be stable with time and uniform over the functioning channels. This noise level is significantly lower than previous experiments utilizing warm front-end electronics.
Intelligent FPGA Data Acquisition Framework
NASA Astrophysics Data System (ADS)
Bai, Yunpeng; Gaisbauer, Dominic; Huber, Stefan; Konorov, Igor; Levit, Dmytro; Steffen, Dominik; Paul, Stephan
2017-06-01
In this paper, we present the field programmable gate arrays (FPGA)-based framework intelligent FPGA data acquisition (IFDAQ), which is used for the development of DAQ systems for detectors in high-energy physics. The framework supports Xilinx FPGA and provides a collection of IP cores written in very high speed integrated circuit hardware description language, which use the common interconnect interface. The IP core library offers functionality required for the development of the full DAQ chain. The library consists of Serializer/Deserializer (SERDES)-based time-to-digital conversion channels, an interface to a multichannel 80-MS/s 10-b analog-digital conversion, data transmission, and synchronization protocol between FPGAs, event builder, and slow control. The functionality is distributed among FPGA modules built in the AMC form factor: front end and data concentrator. This modular design also helps to scale and adapt the DAQ system to the needs of the particular experiment. The first application of the IFDAQ framework is the upgrade of the read-out electronics for the drift chambers and the electromagnetic calorimeters (ECALs) of the COMPASS experiment at CERN. The framework will be presented and discussed in the context of this paper.
A solid-state digital temperature recorder for space use
NASA Technical Reports Server (NTRS)
Westbrook, R. M.; Bennett, L. D.; Steinhaver, R. A.; Deboo, G. J.
1981-01-01
A solid-state, digital, temperature recorder has been developed for use in space experiments. The recorder is completely self-contained and includes a temperature sensor; all necessary electronics for signal conditioning, processing, storing, control and timing; and a battery power supply. No electrical interfacing with the particular spacecraft on which the unit is used is required. The recorder is small, light, and sturdy, and has no moving parts. It uses only biocompatible materials and has passed vibration and shock spaceflight qualification tests. The unit is capable of storing 2048, -10 to +45 C, 8-bit temperature measurements taken at intervals selectable by factors of 2 from 1.875 to 240 min; data can be retained for at least 6 months. The basic recorder can be simplified to accommodate a variety of applications by adding memory to allow more data to be recorded, by changing the front end to permit measurements other than temperature to be made, and by using different batteries to realize various operating periods. Stored flight data are read out from the recorder by means of a ground read-out unit.
The Zero-Degree Detector System
NASA Technical Reports Server (NTRS)
Adams, James H.; Christl, Mark J.; Howell, Leonard W.; Kouznetsov, Evgueni
2006-01-01
We will report on a detector system used for accelerator measurement of nuclear fragmentation cross sections. This system consists of two detector planes, each carrying a ring of 8 detectors. Each detector has 64 pads. These two detector planes are arranged facing each other so that the matching detector pads on each plane form a two element charged particle telescope. Each of these telescopes is capable of determining the elemental identity of nuclear fragments passing through it. The system is used to measure light fragment production in the presence of heavier fragments. We will present a detailed discussion of the 64-pad detector design, the substrate design. The front-end electronics used to read out the signals is based on a custom VLSI chip developed for the Advanced Thin Ionization Calorimeter experiment which has been flown successfully twice in Antarctica. Each of these chips has 16 channels and each channel consists of a charge-sensitive preamplifier followed by a shaping amplifier and a track-and-hold circuit. The track-and-hold circuits are connected via a multiplexer to an output line driver. This allows the held signals to be presented, one-by-one via a common data line to a analog-to-digital converter. Because the output line driver can be placed in a high input impedance state when not in use, it is possible to daisy-change many chips on the same common data line. The front-end electronics and data readout scheme will be discussed in detail. The Zero Degree Detector has been used in several accelerator experiments conducted at the NASA Space Radiation Laboratory and the Alternating Gradient Synchrotron at Brookhaven National Laboratory as well as at the HIMAC accelerator in Japan. We will show examples of data taken at these accelerator runs to demonstrate how the system works.
Reviewed approach to defining the Active Interlock Envelope for Front End ray tracing
DOE Office of Scientific and Technical Information (OSTI.GOV)
Seletskiy, S.; Shaftan, T.
To protect the NSLS-II Storage Ring (SR) components from damage from synchrotron radiation produced by insertion devices (IDs) the Active Interlock (AI) keeps electron beam within some safe envelope (a.k.a Active Interlock Envelope or AIE) in the transverse phase space. The beamline Front Ends (FEs) are designed under assumption that above certain beam current (typically 2 mA) the ID synchrotron radiation (IDSR) fan is produced by the interlocked e-beam. These assumptions also define how the ray tracing for FE is done. To simplify the FE ray tracing for typical uncanted ID it was decided to provide the Mechanical Engineering groupmore » with a single set of numbers (x,x’,y,y’) for the AIE at the center of the long (or short) ID straight section. Such unified approach to the design of the beamline Front Ends will accelerate the design process and save valuable human resources. In this paper we describe our new approach to defining the AI envelope and provide the resulting numbers required for design of the typical Front End.« less
NASA Astrophysics Data System (ADS)
Kullmann, Joachim; Bykov, Iouri; Heinzel, Gerhard; Danzmann, Karsten
The phasemeter is an essentiel component in the measuring chain of the spaceborne gravita-tional wave detector LISA. √ Our goal is to achieve a phasemeter sensitivity of 1 pm/ Hz below 1 Hz with respect to optical signals within a beatnote frequency range of 2 -20 MHz. To get there, several noise sources have to be eliminated. By choosing appropriate filters and adjusting loop gains digital operations of the FPGA-based phase lock loop do not limit the phasemeter sensitivity. One of the main front-end noise sources, the so called ADC time-jitter, is already successfully suppressed by correcting the signal of in-terest by means of a 48 MHz calibration tone. Noise hunting with respect to the analog front-end, currently the most demanding task, is on-going. Recent results will be presented.
Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology
NASA Astrophysics Data System (ADS)
Kleczek, Rafal
2016-12-01
The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e- for a detector capacitance CDET = 160 fF.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Citterio, M.; Camplani, A.; Cannon, M.
SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less
The upgrade of the CMS hadron calorimeter with silicon photomultipliers
Strobbe, N.
2017-01-26
The upgrade of the hadron calorimeter of the CMS experiment at the CERN Large Hadron Collider is currently underway. The endcap sections will be upgraded in the winter of 2016–2017 and the barrel sections during the second LHC long shutdown in 2019. The existing photosensors will be replaced with about 16 000 new silicon photomultipliers (SiPMs), resulting in the first large installation of SiPMs in a radiation environment. All associated front-end electronics will also be upgraded. Here, this paper discusses the motivation for the upgrade and provides a description 17 of the new system, including the SiPMs with associated controlmore » electronics and the front-end readout cards.« less
New electronics for the Cherenkov Telescope Array (NECTAr)
NASA Astrophysics Data System (ADS)
Naumann, C. L.; Delagnes, E.; Bolmont, J.; Corona, P.; Dzahini, D.; Feinstein, F.; Gascón, D.; Glicenstein, J.-F.; Guilloux, F.; Nayman, P.; Rarbi, F.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.; Vorobiov, S.
2012-12-01
The international CTA consortium has recently entered into its preparatory phase towards the construction of the next-generation Cherenkov Telescope Array CTA. This experiment will be a successor, and based on the return of experience from the three major current-generation arrays H.E.S.S., MAGIC and VERITAS, and aims to significantly improve upon the sensitivity as well as the energy range of its highly successful predecessors. Construction is planned to begin by 2013, and when finished, CTA will be able to explore the highest-energy gamma ray sky in unprecedented detail. To achieve this increase in sensitivity and energy range, CTA will employ the order of 100 telescopes of three different sizes on two sites, with around 1000-4000 channels per camera, depending on the telescope size. To equip and reliably operate the order of 100000 channels of photodetectors (compared to 6000 of the H.E.S.S. array), a new kind of flexible and powerful yet inexpensive front-end hardware will be required. One possible solution is pursued by the NECTAr (New Electronics for the Cherenkov Telescope Array) project. Its main feature is the integration of as much as possible of the front-end electronics (amplifiers, fast analogue samplers, memory and ADCs) into a single ASIC, which will allow very fast readout performances while significantly reducing the cost and the power consumption per channel. Also included is a low-cost FPGA for digital treatment and online data processing, as well as an Ethernet connection. Other priorities of NECTAr are the modularity of the system, a high degree of flexibility in the trigger system as well as the possibility of flexible readout modes to optimise the signal-to-noise ratio while at the same time allowing a significant reduction of data rates, both of which could improve the sensitivity of CTA compared to current detection systems. This paper gives an overview over the development work for the Nectar system, with particular focus on its main component, the NECTAr ASIC.
Front-end electronics for PWO-based PHOS calorimeter of ALICE
NASA Astrophysics Data System (ADS)
Muller, Hans; Budnikov, Dmitry; Ippolitov, Mikhail; Li, Qingxia; Manko, Vladislav; Pimenta, Rui; Rohrich, Dieter; Sibiryak, Iouri; Skaali, Bernhard; Vinogradov, Alexandre
2006-11-01
The electromagnetic Photon Spectrometer (PHOS) of ALICE consists of five modules with 56×64 PWO crystals, operated at -25 °C. Glued to each crystal are APD diodes which amplify a lightyield of 4.4 photoelectrons/MeV, followed by charge-sensitive pre-amplifiers with a charge conversion gain of ca. 1 V/pC. We describe our new 32-channel shaper/digitizer and readout electronics for gain-programmable photodiodes. These Front-End Electronics (FEE) cards are installed below the crystals in an isolated warm volume in geometrical correspondence to 2×16 crystal rows per card. With a total detector capacitance of 100 pF and a noise level of 3 MeV, the FEEs cover a 14 bit dynamic range from 5 MeV to 80 GeV. The low noise level is achieved by operating the APDs and preamplifiers at low temperature and by applying a relatively long shaping time of 1 μs. The offline timing resolution, obtained via a Gamma-2 fit is less than 2 ns. The second-order, dual-gain shapers produce semi-Gaussian output for 10 bit ADCs with embedded multi-event buffers. A Readout Control Unit (RCU) masters data readout with address-mapped access to the event-buffers and controls registers via a custom bus which interconnects up to 14 FEE cards. Programmable bias voltage controllers on the FEE cards allow for very precise gain adjustment of each individual APD. Being co-designed with the TRU trigger cards, each FEE card generates eight fast signal sums (2×2 crystals) as input to the TRU. FPGA-based algorithms generate level-0 and level-1 trigger decisions at 40 MHz and allow PHOS also to operate in self-triggered mode. Inside each PHOS module there are 112 FEE and 8 TRU cards which dissipate ca. 1 kW heat which is extracted via a water cooling system.
Guidoni in front of Node 1/Unity hatch
2001-04-27
ISS002-E-6128 (27 April 2001) --- Umberto Guidoni of the European Space Agency (ESA), STS-100 mission specialist, poses for a photograph in Unity Node 1 as the hatch to the Multipurpose Logistics Module (MPLM) Raphaello is being closed near the end of the STS-100 mission. The image was taken with a digital still camera.
Translations on Telecommunications Policy, Research and Development, Number 28
1978-02-09
digital electronics technology — is confident that the 12-watt I’KP (Peak En- velope Tower) single side band radio will perform better and be...PRODUCED WITH FUJITSU TECHNOLOGY, EQUIPMENT Rio de Janeiro 0 GLOBO in Portuguese 21 Dec 77 p 21 [Text] Porto Alegre (0 GLOBO). EDISA [ Digital ...10042 CSO: 5500 25 PERU TELEPHONE SERVICE TO UNDERGO COSTLY EXPANSION Plan To Add Lines Approved Lima EL COMERCIO in Spanish 1? Nov 77 Front
7 CFR 1717.852 - Financing purposes.
Code of Federal Regulations, 2014 CFR
2014-01-01
... the borrower: water and waste disposal systems, solid waste disposal systems, telecommunication and other electronic communications systems, and natural gas distribution systems; (4) Front-end costs, when...
The Front-End System For MARE In Milano
NASA Astrophysics Data System (ADS)
Arnaboldi, Claudio; Pessina, Gianluigi
2009-12-01
The first phase of MARE consists of 72 μ-bolometers composed each of a crystal of AgReO4 readout by Si thermistors. The spread in the thermistor characteristics and bolometer thermal coupling leads to different energy conversion gains and optimum operating points of the detectors. Detector biasing levels and voltage gains are completely remote-adjustable by the front end system developed, the subject of this paper, achieving the same signal range at the input of the DAQ system. The front end consists of a cold buffer stage, a second pseudo differential stage followed by a gain stage, an antialiasing filter, and a battery powered detector biasing set up. The DAQ system can be used to set all necessary parameters of the electronics remotely, by writing to a μ-controller located on each board. Fiber optics are used for the serial communication between the DAQ and the front end. To suppress interference noise during normal operation, the clocked devices of the front end are maintained in sleep-mode, except during the set-up phase of the experiment. An automatic DC detector characterization procedure is used to establish the optimum operating point of every detector of the array. A very low noise level has been achieved: about 3nV/□Hz at 1 Hz and 1 nV/□Hz for the white component, high frequencies.
FELIX: The new detector readout system for the ATLAS experiment
NASA Astrophysics Data System (ADS)
Ryu, Soo; ATLAS TDAQ Collaboration
2017-10-01
After the Phase-I upgrades (2019) of the ATLAS experiment, the Front-End Link eXchange (FELIX) system will be the interface between the data acquisition system and the detector front-end and trigger electronics. FELIX will function as a router between custom serial links and a commodity switch network using standard technologies (Ethernet or Infiniband) to communicate with commercial data collecting and processing components. The system architecture of FELIX will be described and the status of the firmware implementation and hardware development currently in progress will be presented.
Non-Electronic Radio Front-End (NERF)
2007-04-01
electro - optic field sensor. The absence of metallic interconnects and the charge isolation provided by the optics removes the soft spots in a traditional receiver. In the proof-of concept experiment, detection of C band electromagnetic signals at 7.38 GHz with a sensitivity of 4.3x10 -3 V/m.Hz(exp 1/2) is demonstrated. The dielectric approach has an added benefit: it reduces physical size of the front end an important benefit in mobile applications. DIELECTRIC RESONATOR ANTENNA, PHOTONICALLY ISOLATED ANTENNA RECEIVER, ELECTRO - OPTIC DIELECTRIC ANTENNA,
A compact dual-band RF front-end and board design for vehicular platforms
NASA Astrophysics Data System (ADS)
Sharawi, Mohammad S.; Aloi, Daniel N.
2012-03-01
Modern vehicular platforms include several wireless systems that provide navigation, entertainment and road side assistance, among other services. These systems operate at different frequency bands and thus careful system-level design should be followed to minimise the interference between them. In this study, we present a compact dual-band RF front-end module for global positioning system (GPS) operating in the L1-band (1574.42-1576.42 MHz) and satellite digital audio radio system (SDARS) operating in the S-band (2320-2345 MHz). The module provides more than 26 dB of measured gain in both bands and low noise figure values of 0.9 and 1.2 dB in SDARS and GPS bands, respectively. The front-end has interference suppression capability from the advanced mobile phone system and personal communication service cellular bands. The module is designed on a low-cost FR-4 substrate material and occupies a small size of 62 × 29 × 1.3 mm3. It dissipates 235 mW in the SDARS section and 100 mW in the GPS section. Three prototypes have been built to verify a repeatable performance.
Market trends in the projection display industry
NASA Astrophysics Data System (ADS)
Dash, Sweta
2001-03-01
The projection display industry represents a multibillion- dollar market that includes four distinct technologies. High-volume consumer products and high-value business products drive the market, with different technologies being used in different application markets. The consumer market is dominated by rear CRT technology, especially in the projection TV segment. Rear LCD (liquid crystal display), MEMS/DLP (or Digital Light Processing TM) and LCOS (Liquid-crystal-on-silicon) TVs are slowly emerging as future competitors to rear CRT projectors. Front CRT projectors are also facing challenges from LCD and DLP technology for the home theater market while the business market is completely dominated by front LCD and DLP technology. Three-chip DLP projectors have replaced liquid crystal light valves in large venue applications where projectors have higher light output requirements. In recent years front LCD and LCOS projectors have been increasingly competing with 3-chip DLP projectors especially at the low end of the large venue application market. Within the next five years the projection market will experience very fast growth. Sales and presentation applications, which are the fastest growing applications in the business market, will continue to be the major driving force for the growth for front projectors, and the shift in the consumer market to digital and HDTV products will drive the rear projection market.
The front-end data conversion and readout electronics for the CMS ECAL upgrade
NASA Astrophysics Data System (ADS)
Mazza, G.; Cometti, S.
2018-03-01
The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with a 13 bits resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring a fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.
A front-end read out chip for the OPERA scintillator tracker
NASA Astrophysics Data System (ADS)
Lucotte, A.; Bondil, S.; Borer, K.; Campagne, J. E.; Cazes, A.; Hess, M.; de La Taille, C.; Martin-Chassard, G.; Raux, L.; Repellin, J. P.
2004-04-01
Multi-anode photomultipliers H7546 are used to readout signal from the OPERA Scintillator Tracker (CERN/SPSC 2000-028, SPSC/P318, LNGSP 25/2000; CERN/SPSC 2001-025, SPSC/M668, LNGS-EXP30/2001). A 32-channel front-end Read Out Chip prototype accommodating the H7546 has been designed at LAL. This device features a low-noise, variable gain preamplifier to correct for multi-anode non-uniformity, an auto-trigger capability 100% efficient at a 0.3 photo-electron, and a charge measurement extending over a large dynamic range [0-100] photo-electrons. In this article we describe the ASIC architecture that is being implemented for the Target Tracker in OPERA, with a special emphasis put on the designs and the measured performance.
Distributed micro-radar system for detection and tracking of low-profile, low-altitude targets
NASA Astrophysics Data System (ADS)
Gorwara, Ashok; Molchanov, Pavlo
2016-05-01
Proposed airborne surveillance radar system can detect, locate, track, and classify low-profile, low-altitude targets: from traditional fixed and rotary wing aircraft to non-traditional targets like unmanned aircraft systems (drones) and even small projectiles. Distributed micro-radar system is the next step in the development of passive monopulse direction finder proposed by Stephen E. Lipsky in the 80s. To extend high frequency limit and provide high sensitivity over the broadband of frequencies, multiple angularly spaced directional antennas are coupled with front end circuits and separately connected to a direction finder processor by a digital interface. Integration of antennas with front end circuits allows to exclude waveguide lines which limits system bandwidth and creates frequency dependent phase errors. Digitizing of received signals proximate to antennas allows loose distribution of antennas and dramatically decrease phase errors connected with waveguides. Accuracy of direction finding in proposed micro-radar in this case will be determined by time accuracy of digital processor and sampling frequency. Multi-band, multi-functional antennas can be distributed around the perimeter of a Unmanned Aircraft System (UAS) and connected to the processor by digital interface or can be distributed between swarm/formation of mini/micro UAS and connected wirelessly. Expendable micro-radars can be distributed by perimeter of defense object and create multi-static radar network. Low-profile, lowaltitude, high speed targets, like small projectiles, create a Doppler shift in a narrow frequency band. This signal can be effectively filtrated and detected with high probability. Proposed micro-radar can work in passive, monostatic or bistatic regime.
A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS.
Jha, Pankaj; Patra, Pravanjan; Naik, Jairaj; Acharya, Amit; Rajalakshmi, P; Singh, Shiv Govind; Dutta, Ashudeb
2015-08-01
This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable ΣΔ ADC. The full system is designed in UMC 0.18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides 2(nd) order noise-shaping while using single integrator and an ENOB of ~11 bits with 5μW power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.
Validation of a highly integrated SiPM readout system with a TOF-PET demonstrator
NASA Astrophysics Data System (ADS)
Niknejad, T.; Setayeshi, S.; Tavernier, S.; Bugalho, R.; Ferramacho, L.; Di Francesco, A.; Leong, C.; Rolo, M. D.; Shamshirsaz, M.; Silva, J. C.; Silva, R.; Silveira, M.; Zorraquino, C.; Varela, J.
2016-12-01
We have developed a highly integrated, fast and compact readout electronics for Silicon Photomultiplier (SiPM) based Time of Flight Positron Emission Tomography (TOF-PET) scanners. The readout is based on the use of TOP-PET Application Specific Integrated Circuit (PETsys TOFPET1 ASIC) with 64 channels, each with its amplifier, discriminator, Time to Digital Converter (TDC) and amplitude determination using Time Over Threshold (TOT). The ASIC has 25 ps r.m.s. intrinsic time resolution and fully digital output. The system is optimised for high rates, good timing, low power consumption and low cost. For validating the readout electronics, we have built a technical PET scanner, hereafter called ``demonstrator'', with 2'048 SiPM channels. The PET demonstrator has 16 compact Detector Modules (DM). Each DM has two ASICs reading 128 SiPM pixels in one-to-one coupling to 128 Lutetium Yttrium Orthosilicate (LYSO) crystals measuring 3.1 × 3.1 × 15 mm3 each. The data acquisition system for the demonstrator has two Front End Boards type D (FEB/D), each collecting the data of 1'024 channels (8 DMs), and transmitting assembled data frames through a serial link (4.8 Gbps), to a single Data Acquisition (DAQ) board plugged into the Peripheral Component Interconnect Express (PCIe) bus of the data acquisition PC. Results obtained with this PET demonstrator are presented.
Development of COTS ADC SEE Test System for the ATLAS LArCalorimeter Upgrade
Hu, Xue -Ye; Chen, Hu -Cheng; Chen, Kai; ...
2014-12-01
Radiation-tolerant, high speed, high density and low power commercial off-the-shelf (COTS) analog-to-digital converters (ADCs) are planned to be used in the upgrade to the Liquid Argon (LAr) calorimeter front end (FE) trigger readout electronics. Total ionization dose (TID) and single event effect (SEE) are two important radiation effects which need to be characterized on COTS ADCs. In our initial TID test, Texas Instruments (TI) ADS5272 was identified to be the top performer after screening a total 17 COTS ADCs from different manufacturers with dynamic range and sampling rate meeting the requirements of the FE electronics. Another interesting feature of ADS5272more » is its 6.5 clock cycles latency, which is the shortest among the 17 candidates. Based on the TID performance, we have designed a SEE evaluation system for ADS5272, which allows us to further assess its radiation tolerance. In this paper, we present a detailed design of ADS5272 SEE evaluation system and show the effectiveness of this system while evaluating ADS5272 SEE characteristics in multiple irradiation tests. According to TID and SEE test results, ADS5272 was chosen to be implemented in the full-size LAr Trigger Digitizer Board (LTDB) demonstrator, which will be installed on ATLAS calorimeter during the 2014 Long Shutdown 1 (LS1).« less
Tolbert, Jeremy R; Kabali, Pratik; Brar, Simeranjit; Mukhopadhyay, Saibal
2009-01-01
We present a digital system for adaptive data compression for low power wireless transmission of Electroencephalography (EEG) data. The proposed system acts as a base-band processor between the EEG analog-to-digital front-end and RF transceiver. It performs a real-time accuracy energy trade-off for multi-channel EEG signal transmission by controlling the volume of transmitted data. We propose a multi-core digital signal processor for on-chip processing of EEG signals, to detect signal information of each channel and perform real-time adaptive compression. Our analysis shows that the proposed approach can provide significant savings in transmitter power with minimal impact on the overall signal accuracy.
Wireless monitoring of highways
NASA Astrophysics Data System (ADS)
Bennett, Richard; Hayes-Gill, Barrie; Crowe, John A.; Armitage, Robert; Rodgers, Dale; Hendroff, Adrian
1999-05-01
Electronic hardware has been developed to telemetrically transmit temperature and strain measurements from within a public highway in the UK. These measurements provide an important health check for monitoring fatigue damage in pavements. Previous attempts at measuring strain and temperature have required lengths of cable to be installed in the highway. The installation of these cables is both expensive and damaging to the pavement and provides potentially unreliable electrical connections. The new systems consist of a retrofitted instrumented asphalt core which is bonded into the pavement structure. The core contains all the electronics necessary to record two temperatures and two strains. An analogue front end provides signal conditioning which is digitized and passed to microcontroller for endcoding. From there the data is transmitted via a low power radio link to a receiver and data logger positioned by the side of the road. The system has an in-situ operating life of 6 months on AA alkaline batteries. Results are presented of power management and fault tolerant radio protocol techniques, long term temperature variations, dynamic strain measurements within the highway, and RF transmission capabilities through a layer of asphalt.
Algorithm for fast event parameters estimation on GEM acquired data
NASA Astrophysics Data System (ADS)
Linczuk, Paweł; Krawczyk, Rafał D.; Poźniak, Krzysztof T.; Kasprowicz, Grzegorz; Wojeński, Andrzej; Chernyshova, Maryna; Czarski, Tomasz
2016-09-01
We present study of a software-hardware environment for developing fast computation with high throughput and low latency methods, which can be used as back-end in High Energy Physics (HEP) and other High Performance Computing (HPC) systems, based on high amount of input from electronic sensor based front-end. There is a parallelization possibilities discussion and testing on Intel HPC solutions with consideration of applications with Gas Electron Multiplier (GEM) measurement systems presented in this paper.
Noise Characterization and Filtering in the MicroBooNE Liquid Argon TPC
DOE Office of Scientific and Technical Information (OSTI.GOV)
Acciarri, R.; et al.
The low-noise operation of readout electronics in a liquid argon time projection chamber (LArTPC) is critical to properly extract the distribution of ionization charge deposited on the wire planes of the TPC, especially for the induction planes. This paper describes the characteristics and mitigation of the observed noise in the MicroBooNE detector. The MicroBooNE's single-phase LArTPC comprises two induction planes and one collection sense wire plane with a total of 8256 wires. Current induced on each TPC wire is amplified and shaped by custom low-power, low-noise ASICs immersed in the liquid argon. The digitization of the signal waveform occurs outsidemore » the cryostat. Using data from the first year of MicroBooNE operations, several excess noise sources in the TPC were identified and mitigated. The residual equivalent noise charge (ENC) after noise filtering varies with wire length and is found to be below 400 electrons for the longest wires (4.7 m). The response is consistent with the cold electronics design expectations and is found to be stable with time and uniform over the functioning channels. This noise level is significantly lower than previous experiments utilizing warm front-end electronics.« less
Noise Characterization and Filtering in the MicroBooNE Liquid Argon TPC
DOE Office of Scientific and Technical Information (OSTI.GOV)
Acciarri, R.; Adams, C.; An, R.
The low-noise operation of readout electronics in a liquid argon time projection chamber (LArTPC) is critical to properly extract the distribution of ionization charge deposited on the wire planes of the TPC, especially for the induction planes. This paper describes the characteristics and mitigation of the observed noise in the MicroBooNE detector. The MicroBooNE's single-phase LArTPC comprises two induction planes and one collection sense wire plane with a total of 8256 wires. Current induced on each TPC wire is amplified and shaped by custom low-power, low-noise ASICs immersed in the liquid argon. The digitization of the signal waveform occurs outsidemore » the cryostat. Using data from the first year of MicroBooNE operations, several excess noise sources in the TPC were identified and mitigated. The residual equivalent noise charge (ENC) after noise filtering varies with wire length and is found to be below 400 electrons for the longest wires (4.7 m). The response is consistent with the cold electronics design expectations and is found to be stable with time and uniform over the functioning channels. In conclusion, this noise level is significantly lower than previous experiments utilizing warm front-end electronics.« less
Readout electronics for CBM-TOF super module quality evaluation based on 10 Gbps ethernet
NASA Astrophysics Data System (ADS)
Jiang, D.; Cao, P.; Huang, X.; Zheng, J.; Wang, Q.; Li, B.; Li, J.; Liu, S.; An, Q.
2017-07-01
The Compressed Baryonic Matter-Time of Flight (CBM-TOF) wall uses high performance of Multi-gap Resistive Plate Chambers (MRPC) assembled in super modules to identify charged particles with high channel density and high measurement precision at high event rate. Electronics meet the challenge for reading data out from a super module at high speed of about 6 Gbps in real time. In this paper, the readout electronics for CBM-TOF super module quality evaluation is proposed based on 10 Gigabit Ethernet. The digitized TOF data from one super module will be concentrated at the front-end electronics residing on the side of the super module and transmitted to an extreme speed readout module (XSRM) housed in the backend crate through the PCI Express (PCIe) protocol via optic channels. Eventually, the XSRM transmits data to the data acquisition (DAQ) system through four 10 Gbps Ethernet ports in real time. This readout structure has advantages of high performance and expansibility. Furthermore, it is easy to operate. Test results on the prototype show that the overall data readout performance for each XSRM can reach up to 28.8 Gbps, which means XSRM can meet the requirement of reading data out from 4 super modules with 1280 channels in real time.
Noise Characterization and Filtering in the MicroBooNE Liquid Argon TPC
Acciarri, R.; Adams, C.; An, R.; ...
2017-08-04
The low-noise operation of readout electronics in a liquid argon time projection chamber (LArTPC) is critical to properly extract the distribution of ionization charge deposited on the wire planes of the TPC, especially for the induction planes. This paper describes the characteristics and mitigation of the observed noise in the MicroBooNE detector. The MicroBooNE's single-phase LArTPC comprises two induction planes and one collection sense wire plane with a total of 8256 wires. Current induced on each TPC wire is amplified and shaped by custom low-power, low-noise ASICs immersed in the liquid argon. The digitization of the signal waveform occurs outsidemore » the cryostat. Using data from the first year of MicroBooNE operations, several excess noise sources in the TPC were identified and mitigated. The residual equivalent noise charge (ENC) after noise filtering varies with wire length and is found to be below 400 electrons for the longest wires (4.7 m). The response is consistent with the cold electronics design expectations and is found to be stable with time and uniform over the functioning channels. In conclusion, this noise level is significantly lower than previous experiments utilizing warm front-end electronics.« less
Upgrade of the ATLAS Hadronic Tile Calorimeter for the High Luminosity LHC
NASA Astrophysics Data System (ADS)
Tortajada, Ignacio Asensi
2018-01-01
The Large Hadron Collider (LHC) has envisaged a series of upgrades towards a High Luminosity LHC (HL-LHC) delivering five times the LHC nominal instantaneous luminosity. The ATLAS Phase II upgrade, in 2024, will accommodate the upgrade of the detector and data acquisition system for the HL-LHC. The Tile Calorimeter (TileCal) will undergo a major replacement of its on- and off-detector electronics. In the new architecture, all signals will be digitized and then transferred directly to the off-detector electronics, where the signals will be reconstructed, stored, and sent to the first level of trigger at the rate of 40 MHz. This will provide better precision of the calorimeter signals used by the trigger system and will allow the development of more complex trigger algorithms. Changes to the electronics will also contribute to the reliability and redundancy of the system. Three different front-end options are presently being investigated for the upgrade, two of them based on ASICs, and a final solution will be chosen after extensive laboratory and test beam studies that are in progress. A hybrid demonstrator module is being developed using the new electronics while conserving compatibility with the current system. The status of the developments will be presented, including results from the several tests with particle beams.
NASA Astrophysics Data System (ADS)
Cortes-Medellin, German; Parshley, Stephen; Campbell, Donald B.; Warnick, Karl F.; Jeffs, Brian D.; Ganesh, Rajagopalan
2016-08-01
This paper presents the current concept design for ALPACA (Advanced L-Band Phased Array Camera for Arecibo) an L-Band cryo-phased array instrument proposed for the 305 m radio telescope of Arecibo. It includes the cryogenically cooled front-end with 160 low noise amplifiers, a RF-over-fiber signal transport and a digital beam former with an instantaneous bandwidth of 312.5 MHz per channel. The camera will digitally form 40 simultaneous beams inside the available field of view of the Arecibo telescope optics, with an expected system temperature goal of 30 K.
Electronic drive and acquisition system for mass spectrometry
NASA Technical Reports Server (NTRS)
Schaefer, Rembrandt Thomas (Inventor); Chutjian, Ara (Inventor); Tran, Tuan (Inventor); Madzunkov, Stojan M. (Inventor); Thomas, John L. (Inventor); Mojarradi, Mohammad (Inventor); MacAskill, John (Inventor); Blaes, Brent R. (Inventor); Darrach, Murray R. (Inventor); Burke, Gary R. (Inventor)
2010-01-01
The present invention discloses a mixed signal RF drive electronics board that offers small, low power, reliable, and customizable method for driving and generating mass spectra from a mass spectrometer, and for control of other functions such as electron ionizer, ion focusing, single-ion detection, multi-channel data accumulation and, if desired, front-end interfaces such as pumps, valves, heaters, and columns.
Electronics and triggering challenges for the CMS High Granularity Calorimeter
NASA Astrophysics Data System (ADS)
Lobanov, A.
2018-02-01
The High Granularity Calorimeter (HGCAL), presently being designed by the CMS collaboration to replace the CMS endcap calorimeters for the High Luminosity phase of LHC, will feature six million channels distributed over 52 longitudinal layers. The requirements for the front-end electronics are extremely challenging, including high dynamic range (0.2 fC-10 pC), low noise (~2000 e- to be able to calibrate on single minimum ionising particles throughout the detector lifetime) and low power consumption (~20 mW/channel), as well as the need to select and transmit trigger information with a high granularity. Exploiting the intrinsic precision-timing capabilities of silicon sensors also requires careful design of the front-end electronics as well as the whole system, particularly clock distribution. The harsh radiation environment and requirement to keep the whole detector as dense as possible will require novel solutions to the on-detector electronics layout. Processing the data from the HGCAL imposes equally large challenges on the off-detector electronics, both for the hardware and incorporated algorithms. We present an overview of the complete electronics architecture, as well as the performance of prototype components and algorithms.
Binary processing and display concepts for low-cost Omega receivers. [airborne systems simulation
NASA Technical Reports Server (NTRS)
Lilley, R. W.
1974-01-01
A description is given of concepts related to plans for developing a low-cost, all-digital Omega receiver capable of offering to the small-aircraft pilot a reliable and accurate navigation aid. The receiver base considered includes a receiver front-end module, a receiver control module, a memory-aided phase-locked loop module, a housekeeping timer module, and a synthesizer module.
Actuation stability test of the LISA pathfinder inertial sensor front-end electronics
NASA Astrophysics Data System (ADS)
Mance, Davor; Gan, Li; Weber, Bill; Weber, Franz; Zweifel, Peter
In order to limit the residual stray forces on the inertial sensor test mass in LISA pathfinder, √ it is required that the fluctuation of the test mass actuation voltage is within 2ppm/ Hz. The actuation voltage stability test on the flight hardware of the inertial sensor front-end electronics (IS FEE) is presented in this paper. This test is completed during the inertial sensor integration at EADS Astrium Friedrichshafen, Germany. The standard measurement method using voltmeter is not sufficient for verification, since the instrument low frequency √ fluctuation is higher than the 2ppm/ Hz requirement. In this test, by using the differential measurement method and the lock-in amplifier, the actuation stability performance is verified and the quality of the IS FEE hardware is confirmed by the test results.
NASA Astrophysics Data System (ADS)
Tekwani, P. N.; Shah, M. T.
2017-10-01
This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.
A high-throughput, multi-channel photon-counting detector with picosecond timing
NASA Astrophysics Data System (ADS)
Lapington, J. S.; Fraser, G. W.; Miller, G. M.; Ashton, T. J. R.; Jarron, P.; Despeisse, M.; Powolny, F.; Howorth, J.; Milnes, J.
2009-06-01
High-throughput photon counting with high time resolution is a niche application area where vacuum tubes can still outperform solid-state devices. Applications in the life sciences utilizing time-resolved spectroscopies, particularly in the growing field of proteomics, will benefit greatly from performance enhancements in event timing and detector throughput. The HiContent project is a collaboration between the University of Leicester Space Research Centre, the Microelectronics Group at CERN, Photek Ltd., and end-users at the Gray Cancer Institute and the University of Manchester. The goal is to develop a detector system specifically designed for optical proteomics, capable of high content (multi-parametric) analysis at high throughput. The HiContent detector system is being developed to exploit this niche market. It combines multi-channel, high time resolution photon counting in a single miniaturized detector system with integrated electronics. The combination of enabling technologies; small pore microchannel plate devices with very high time resolution, and high-speed multi-channel ASIC electronics developed for the LHC at CERN, provides the necessary building blocks for a high-throughput detector system with up to 1024 parallel counting channels and 20 ps time resolution. We describe the detector and electronic design, discuss the current status of the HiContent project and present the results from a 64-channel prototype system. In the absence of an operational detector, we present measurements of the electronics performance using a pulse generator to simulate detector events. Event timing results from the NINO high-speed front-end ASIC captured using a fast digital oscilloscope are compared with data taken with the proposed electronic configuration which uses the multi-channel HPTDC timing ASIC.
Sittig, Dean F; Ash, Joan S; Feblowitz, Joshua; Meltzer, Seth; McMullen, Carmit; Guappone, Ken; Carpenter, Jim; Richardson, Joshua; Simonaitis, Linas; Evans, R Scott; Nichol, W Paul; Middleton, Blackford
2011-01-01
Background Clinical decision support (CDS) is a valuable tool for improving healthcare quality and lowering costs. However, there is no comprehensive taxonomy of types of CDS and there has been limited research on the availability of various CDS tools across current electronic health record (EHR) systems. Objective To develop and validate a taxonomy of front-end CDS tools and to assess support for these tools in major commercial and internally developed EHRs. Study design and methods We used a modified Delphi approach with a panel of 11 decision support experts to develop a taxonomy of 53 front-end CDS tools. Based on this taxonomy, a survey on CDS tools was sent to a purposive sample of commercial EHR vendors (n=9) and leading healthcare institutions with internally developed state-of-the-art EHRs (n=4). Results Responses were received from all healthcare institutions and 7 of 9 EHR vendors (response rate: 85%). All 53 types of CDS tools identified in the taxonomy were found in at least one surveyed EHR system, but only 8 functions were present in all EHRs. Medication dosing support and order facilitators were the most commonly available classes of decision support, while expert systems (eg, diagnostic decision support, ventilator management suggestions) were the least common. Conclusion We developed and validated a comprehensive taxonomy of front-end CDS tools. A subsequent survey of commercial EHR vendors and leading healthcare institutions revealed a small core set of common CDS tools, but identified significant variability in the remainder of clinical decision support content. PMID:21415065
Double-differential recording and AGC using microcontrolled variable gain ASIC.
Rieger, Robert; Deng, Shin-Liang
2013-01-01
Low-power wearable recording of biopotentials requires acquisition front-ends with high common-mode rejection for interference suppression and adjustable gain to provide an optimum signal range to a cascading analogue-to-digital stage. A microcontroller operated double-differential (DD) recording setup and automatic gain control circuit (AGC) are discussed which reject common-mode interference and provide tunable gain, thus compensating for imbalance and variation in electrode interface impedance. Custom-designed variable gain amplifiers (ASIC) are used as part of the recording setup. The circuit gain and balance is set by the timing of microcontroller generated clock signals. Measured results are presented which confirm that improved common-mode rejection is achieved compared to a single differential amplifier in the presence of input network imbalance. Practical measured examples further validate gain control suitable for biopotential recording and power-line rejection for wearable ECG and EMG recording. The prototype front-end consumes 318 μW including amplifiers and microcontroller.
NASA Astrophysics Data System (ADS)
Bugiel, Sz.; Dasgupta, R.; Firlej, M.; Fiutowski, T.; Idzik, M.; Kuczynska, M.; Moron, J.; Swientek, K.; Szumlak, T.
2016-02-01
The Upstream Tracker (UT) silicon strip detector, one of the central parts of the tracker system of the modernised LHCb experiment, will use a new 128-channel readout ASIC called SALT. It will extract and digitise analogue signals from the UT sensors, perform digital signal processing and transmit a serial output data. The SALT is being designed in CMOS 130 nm process and uses a novel architecture comprising of analog front-end and fast (40 MSps) ultra-low power (<0.5 mW) 6-bit ADC in each channel. The prototype ASICs of important functional blocks, like analogue front-end, 6-bit SAR ADC, PLL, and DLL, were designed, fabricated and tested. A prototype of an 8-channel version of the SALT chip, comprising all important functionalities was also designed and fabricated. The architecture and design of the SALT, together with the selected preliminary tests results, are presented.
MATLAB/Simulink Pulse-Echo Ultrasound System Simulator Based on Experimentally Validated Models.
Kim, Taehoon; Shin, Sangmin; Lee, Hyongmin; Lee, Hyunsook; Kim, Heewon; Shin, Eunhee; Kim, Suhwan
2016-02-01
A flexible clinical ultrasound system must operate with different transducers, which have characteristic impulse responses and widely varying impedances. The impulse response determines the shape of the high-voltage pulse that is transmitted and the specifications of the front-end electronics that receive the echo; the impedance determines the specification of the matching network through which the transducer is connected. System-level optimization of these subsystems requires accurate modeling of pulse-echo (two-way) response, which in turn demands a unified simulation of the ultrasonics and electronics. In this paper, this is realized by combining MATLAB/Simulink models of the high-voltage transmitter, the transmission interface, the acoustic subsystem which includes wave propagation and reflection, the receiving interface, and the front-end receiver. To demonstrate the effectiveness of our simulator, the models are experimentally validated by comparing the simulation results with the measured data from a commercial ultrasound system. This simulator could be used to quickly provide system-level feedback for an optimized tuning of electronic design parameters.
The New APD Based Readout for the Crystal Barrel Calorimeter
NASA Astrophysics Data System (ADS)
Urban, M.; Honisch, Ch; Steinacher, M.; CBELSA/TAPS Collaboration
2015-02-01
The CBELSA/TAPS experiment at ELSA measures double polarization observables in meson photoproduction off protons and neutrons. To be able to measure purely neutral reactions off polarized neutrons with high efficiency, the main calorimeter has to be integrated into the first level trigger. This requires to exchange the existing PIN photo diode by a new avalanche photo diode (APD) readout. The newly developed readout electronics will provide an energy resolution compatible to the previous set-up and a fast trigger signal down to 10 MeV energy deposit per crystal. After the successful final tests with a 3x3 CsI crystal matrix in Bonn at ELSA and in Mainz at MAMI all front-end electronics were produced in fall 2013. Automated test routines for the front-end electronics were developed and the characterization measurements of all APDs were successfully accomplished in Bonn. The project is supported by the Deutsche Forschungsgemeinschaft (SFB/TR16) and Schweizerischer Nationalfonds.
NECTAR: New electronics for the Cherenkov Telescope Array
NASA Astrophysics Data System (ADS)
Naumann, Christopher Lindsay; Bolmont, J.; Corona, P.; Delagnes, E.; Dzahini, D.; Feinstein, F.; Gascon, D.; Glicenstein, J.-F.; Nayman, P.; Rarbi, F.; Ribo, M.; Sanuy, A.; Siero, X.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.; Vorobiov, S.
2012-12-01
The international CTA consortium is currently in the preparatory phase for the development of the next-generation Cherenkov Telescope Array (CTA [1]), based on the return of experience from the three major current-generation arrays H.E.S.S., MAGIC and VERITAS. To achieve an unprecedented sensitivity and energy range for TeV gamma rays, a new kind of flexible and powerful yet inexpensive front-end hardware will be required for the order of 105 channels of photodetectors in up to 100 telescopes. One possible solution is the NECTAr (New Electronics for the Cherenkov Telescope Array) system, based on the integration of as much as possible of the front-end electronics (amplifiers, fast analogue samplers, memory and ADCs) into a single ASIC for very fast readout performance and a significant reduction of the cost and the lower consumption per channel, while offering a high degree of flexibility both for the triggering and the readout of the telescope. The current status of its development is presented, along with newest results from measurements and simulation studies.
Market trends in the projection display industry
NASA Astrophysics Data System (ADS)
Dash, Sweta
2000-04-01
The projection display industry represents a multibillion- dollar market that includes four distinct technologies. High-volume consumer products and high-value business products drive the market, with different technologies being used in different application markets. The consumer market is dominated by rear CRT technology, especially in the projection television segment. But rear LCD (liquid crystal display) and rear reflective (DLP, or Digital Light ProcessingTM) televisions are slowly emerging as future competitors to rear CRT projectors. Front CRT projectors are still popular in the high-end home theater market. Front LCD technology and front DLP technology dominate the business market. Traditional light valve technology was the only solution for applications requiring high light outputs, but new three-chip DLP projectors meet the higher light output requirements at a lower price. In the last few years the strongest growth has been in the business market for multimedia presentation applications. This growth was due to the continued increase in display pixel formats, the continued reduction in projector weight, and the improved price/performance ratio. The projection display market will grow at a significant rate during the next five years, driven by the growth in ultraportable (< 10 pound) projectors and the shift in the consumer market to digital and HDTV products.
Low-power analog integrated circuits for wireless ECG acquisition systems.
Tsai, Tsung-Heng; Hong, Jia-Hua; Wang, Liang-Hung; Lee, Shuenn-Yuh
2012-09-01
This paper presents low-power analog ICs for wireless ECG acquisition systems. Considering the power-efficient communication in the body sensor network, the required low-power analog ICs are developed for a healthcare system through miniaturization and system integration. To acquire the ECG signal, a low-power analog front-end system, including an ECG signal acquisition board, an on-chip low-pass filter, and an on-chip successive-approximation analog-to-digital converter for portable ECG detection devices is presented. A quadrature CMOS voltage-controlled oscillator and a 2.4 GHz direct-conversion transmitter with a power amplifier and upconversion mixer are also developed to transmit the ECG signal through wireless communication. In the receiver, a 2.4 GHz fully integrated CMOS RF front end with a low-noise amplifier, differential power splitter, and quadrature mixer based on current-reused folded architecture is proposed. The circuits have been implemented to meet the specifications of the IEEE 802.15.4 2.4 GHz standard. The low-power ICs of the wireless ECG acquisition systems have been fabricated using a 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS standard process. The measured results on the human body reveal that ECG signals can be acquired effectively by the proposed low-power analog front-end ICs.
Developing Electronic Performance Support Systems for Professionals.
ERIC Educational Resources Information Center
Law, Michael P.; And Others
This paper discusses a variety of development strategies and issues involved in the development of electronic performance support systems (EPSS) for professionals. The topics of front-end analysis, development, and evaluation are explored in the context of a case study involving the development of an EPSS to support teachers in the use of…
Development of a 3D CZT detector prototype for Laue Lens telescope
NASA Astrophysics Data System (ADS)
Caroli, Ezio; Auricchio, Natalia; Del Sordo, Stefano; Abbene, Leonardo; Budtz-Jørgensen, Carl; Casini, Fabio; Curado da Silva, Rui M.; Kuvvetlli, Irfan; Milano, Luciano; Natalucci, Lorenzo; Quadrini, Egidio M.; Stephen, John B.; Ubertini, Pietro; Zanichelli, Massimiliano; Zappettini, Andrea
2010-07-01
We report on the development of a 3D position sensitive prototype suitable as focal plane detector for Laue lens telescope. The basic sensitive unit is a drift strip detector based on a CZT crystal, (~19×8 mm2 area, 2.4 mm thick), irradiated transversally to the electric field direction. The anode side is segmented in 64 strips, that divide the crystal in 8 independent sensor (pixel), each composed by one collecting strip and 7 (one in common) adjacent drift strips. The drift strips are biased by a voltage divider, whereas the anode strips are held at ground. Furthermore, the cathode is divided in 4 horizontal strips for the reconstruction of the third interaction position coordinate. The 3D prototype will be made by packing 8 linear modules, each composed by one basic sensitive unit, bonded on a ceramic layer. The linear modules readout is provided by a custom front end electronics implementing a set of three RENA-3 for a total of 128 channels. The front-end electronics and the operating logics (in particular coincidence logics for polarisation measurements) are handled by a versatile and modular multi-parametric back end electronics developed using FPGA technology.
MO-F-CAMPUS-J-03: Development of a Human Brain PET for On-Line Proton Beam-Range Verification
DOE Office of Scientific and Technical Information (OSTI.GOV)
Shao, Yiping
Purpose: To develop a prototype PET for verifying proton beam-range before each fractionated therapy that will enable on-line re-planning proton therapy. Methods: Latest “edge-less” silicon photomultiplier arrays and customized ASIC readout electronics were used to develop PET detectors with depth-of-interaction (DOI) measurement capability. Each detector consists of one LYSO array with each end coupled to a SiPM array. Multiple detectors can be seamlessly tiled together to form a large detector panel. Detectors with 1.5×1.5 and 2.0×2.0 mm crystals at 20 or 30 mm lengths were studied. Readout of individual SiPM or signal multiplexing was used to transfer 3D interaction position-codedmore » analog signals through flexible-print-circuit cables or PCB board to dedicated ASIC front-end electronics to output digital timing pulses that encode interaction information. These digital pulses can be transferred to, through standard LVDS cables, and decoded by a FPGA-based data acquisition of coincidence events and data transfer. The modular detector and scalable electronics/data acquisition will enable flexible PET system configuration for different imaging geometry. Results: Initial detector performance measurement shows excellent crystal identification even with 30 mm long crystals, ∼18% and 2.8 ns energy and timing resolutions, and around 2–3 mm DOI resolution. A small prototype PET scanner with one detector ring has been built and evaluated, validating the technology and design. A large size detector panel has been fabricated by scaling up from modular detectors. Different designs of resistor and capacitor based signal multiplexing boards were tested and selected based on optimal crystal identification and timing performance. Stackable readout electronics boards and FPGA-based data acquisition boards were developed and tested. A brain PET is under construction. Conclusion: Technology of large-size DOI detector based on SiPM array and advanced readout has been developed. PET imaging performance and initial phantom studies of on-line proton beam-range measurement will be conducted and reported. NIH grant R21CA187717; Cancer Prevention and Research Institute of Texas grant RP120326.« less
Analog front-end design of the STS/MUCH-XYTER2—full size prototype ASIC for the CBM experiment
NASA Astrophysics Data System (ADS)
Kleczek, Rafal
2017-01-01
The design of the analog front-end of the STS/MUCH-XYTER2 ASIC, a full-size prototype chip for the Silicon Tracking System (STS, based on double-sided silicon strip sensors) and Muon Chamber (MUCH, based on gas sensors) detectors is presented. The ASIC contains 128 charge processing channels, each built of a charge sensitive amplifier, a polarity selection circuit and two pulse shaping amplifiers forming two parallel signal paths. The first path is used for timing measurement with a fast discriminator. The second path allows low-noise amplitude measurement with a 5-bit continuous-time flash ADC. Different operating conditions and constraints posed by two target detectors' applications require front-end electronics flexibility to meet extended system-wise requirements. The presented circuit implements switchable shaper peaking time, gain switching and trimming, input amplifier pulsed reset circuit, fail-safe measures. The power consumption is scalable (for the STS and the MUCH modes), but limited to 10 mW/channel.
NASA Astrophysics Data System (ADS)
Herrero, Vicente; Colom, Ricardo; Gadea, Rafael; Lerche, Christoph W.; Cerdá, Joaquín; Sebastiá, Ángel; Benlloch, José M.
2007-06-01
Silicon Photomultipliers, though still under development for mass production, may be an alternative to traditional Vacuum Photomultipliers Tubes (VPMT). As a consequence, electronic front-ends initially designed for VPMT will need to be modified. In this simulation, an improved architecture is presented which is able to obtain impact position and depth of interaction of a gamma ray within a continuous scintillation crystal, using either kind of PM. A current sensitive preamplifier stage with individual gain adjustment interfaces the multi-anode PM outputs with a current division resistor network. The preamplifier stage allows to improve front-end processing delay and temporal resolution behavior as well as to increase impact position calculation resolution. Depth of interaction (DOI) is calculated from the width of the scintillation light distribution, which is related to the sum of voltages in resistor network input nodes. This operation is done by means of a high-speed current mode scheme.
Fully Integrated Passive UHF RFID Tag for Hash-Based Mutual Authentication Protocol.
Mikami, Shugo; Watanabe, Dai; Li, Yang; Sakiyama, Kazuo
2015-01-01
Passive radio-frequency identification (RFID) tag has been used in many applications. While the RFID market is expected to grow, concerns about security and privacy of the RFID tag should be overcome for the future use. To overcome these issues, privacy-preserving authentication protocols based on cryptographic algorithms have been designed. However, to the best of our knowledge, evaluation of the whole tag, which includes an antenna, an analog front end, and a digital processing block, that runs authentication protocols has not been studied. In this paper, we present an implementation and evaluation of a fully integrated passive UHF RFID tag that runs a privacy-preserving mutual authentication protocol based on a hash function. We design a single chip including the analog front end and the digital processing block. We select a lightweight hash function supporting 80-bit security strength and a standard hash function supporting 128-bit security strength. We show that when the lightweight hash function is used, the tag completes the protocol with a reader-tag distance of 10 cm. Similarly, when the standard hash function is used, the tag completes the protocol with the distance of 8.5 cm. We discuss the impact of the peak power consumption of the tag on the distance of the tag due to the hash function.
A low power, low noise Programmable Analog Front End (PAFE) for biopotential measurements.
Adimulam, Mahesh Kumar; Divya, A; Tejaswi, K; Srinivas, M B
2017-07-01
A low power Programmable Analog Front End (PAFE) for biopotential measurements is presented in this paper. The PAFE circuit processes electrocardiogram (ECG), electromyography (EMG) and electroencephalogram (EEG) signals with higher accuracy. It consists mainly of improved transconductance programmable gain instrumentational amplifier (PGIA), programmable high pass filter (PHPF), and second order low pass filter (SLPF). A 15-bit programmable 5-stage successive approximation analog-to-digital converter (SAR-ADC) is implemented for improving the performance, whose power consumption is reduced due to multiple stages and by OTA/Comparator sharing technique between the stages. The power consumption is further reduced by operating the analog portion of PAFE on 0.5V supply voltage and digital portion on 0.3V supply voltage generated internally through a voltage regulator. The proposed low power PAFE has been fabricated in 180nm standard CMOS process. The performance parameters of PAFE in 15-bit mode are found to be, gain of 31-70 dB, input referred noise of 1.15 μVrms, CMRR of 110 dB, PSRR of 104 dB, and signal-to-noise distortion ratio (SNDR) of 83.5dB. The power consumption of the design is 1.1 μW @ 0.5 V supply voltage and it occupies a core silicon area of 1.2 mm 2 .
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kong, Xiangliang; Chen, Yao; Feng, Shiwei
2015-01-10
Two solar type II radio bursts, separated by ∼24 hr in time, are examined together. Both events are associated with coronal mass ejections (CMEs) erupting from the same active region (NOAA 11176) beneath a well-observed helmet streamer. We find that the type II emissions in both events ended once the CME/shock fronts passed the white-light streamer tip, which is presumably the magnetic cusp of the streamer. This leads us to conjecture that the closed magnetic arcades of the streamer may play a role in electron acceleration and type II excitation at coronal shocks. To examine such a conjecture, we conduct a test-particle simulationmore » for electron dynamics within a large-scale partially closed streamer magnetic configuration swept by a coronal shock. We find that the closed field lines play the role of an electron trap via which the electrons are sent back to the shock front multiple times and therefore accelerated to high energies by the shock. Electrons with an initial energy of 300 eV can be accelerated to tens of keV concentrating at the loop apex close to the shock front with a counter-streaming distribution at most locations. These electrons are energetic enough to excite Langmuir waves and radio bursts. Considering the fact that most solar eruptions originate from closed field regions, we suggest that the scenario may be important for the generation of more metric type IIs. This study also provides an explanation of the general ending frequencies of metric type IIs at or above 20-30 MHz and the disconnection issue between metric and interplanetary type IIs.« less
Noise propagation issues in Belle II pixel detector power cable
NASA Astrophysics Data System (ADS)
Iglesias, M.; Arteche, F.; Echeverria, I.; Pradas, A.; Rivetta, C.; Moser, H.-G.; Kiesling, C.; Rummel, S.; Arcega, F. J.
2018-04-01
The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This paper presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impact on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.
High Bandwidth, Multi-Purpose Passive Radar Receiver Design For Aerospace and Geoscience Targets
NASA Astrophysics Data System (ADS)
Vertatschitsch, Laura
Passive radar permits inexpensive and stealthy detection and tracking of aerospace and geoscience targets. Transmitters of opportunity such as commercial FM broadcast, DTV broadcast, and cell phone towers are already illuminating many populated areas with continuous power. Passive radar receivers can be located at a distance from the transmitter, and can sense this direct transmission as well as any reflections from ground clutter, aircraft, ionospheric turbulence and meteor trails. The 100% duty cycle allows for long coherent integration, increasing the sensitivity of these instruments greatly. Traditional radar receivers employ analog front end downconverters to translate the radio frequency spectrum to an intermediate frequency (IF) for sampling and signal processing. Such downconverters limit the spectrum available for study, and can introduce nonlinearities which limit the detectability of weak signals in the presence of strong signals. With suitably fast digitizers one can bypass the downconversion stage completely. Very fast digitizers may have relatively few bits, but precision is recovered in subsequent signal processing. We present a new passive radar receiver designed to utilize a broad spectrum of commercial transmitters without the use of a front end analog downconverter. The receiver centers around a Reconfigurable Open Architecture Computing Hardware (ROACH) board developed by the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) group. Fast sampling rates (8-bit samples as fast as 3 GSps) combined with 640 multiply/addition operations on the Virtex-5 FPGA centered on the ROACH allows for coherent processing of broad spectrum and dynamic decision-making on one device all while sharing a single front end, putting this device on the cutting edge of wideband receiver technology. The radar is also designed to support mobile operation. It fits within a 19'' rack, it is equipped with solid state hard drives, and can run off an uninterruptible power supply (UPS) for up to 1 hour of continuous operation. In this document we provide technical details of the hardware, firmware, and software of the system and design strategies and decisions. We cover the topic of coherent processing for passive radar, specifically an overview of the cross-ambiguity function as a detection mechanism. While the applications of a system like this are incredibly broad, the initial validation and performance analysis was applied specifically to detection of aircraft using Digital Television (DTV) broadcast as an illuminator. We present results of both stationary and mobile operation. In stationary operation, the same helicopter has been detected using two different DTV transmissions. Early mobile operation results show the Doppler-spread ground clutter and possible detection of aircraft. In addition to the fully-functional aircraft detection signal chain, alternative FPGA designs are presented with modes for fast sampling on two antennas or four antennas, with access to an aggregate 240 MHz of spectrum, with 8-bit samples. At these extremely high data rates, moderate data loss occurs while saving this data to disk, but as detailed within this document, it can be accounted for and the effects minimalized, still allowing for detection of aircraft. With these modes, FM transmission and DTV transmission can be captured synchronously from a single antenna and digitizer feed, an exciting result that offers promise for both aerospace and geoscience applications.
ICFA Instrumentation Bulletin, Volume 20, Spring 2000 Issue (SLAC-J-ICFA-020)
DOE Office of Scientific and Technical Information (OSTI.GOV)
Va'Vra, J.
2003-10-20
Recent years have seen much dedicated work on front end electronics for hadron colliders, with a strong emphasis on radiation hardness and low cost. This has been challenging for a number of reasons, some of which are discussed further. The developments also suggest opportunities and constraints for the development of such electronics in the future.
Liang, Zhen; Li, Bin; Huang, Mo; Zheng, Yanqi; Ye, Hui; Xu, Ken; Deng, Fangming
2017-04-19
In this work, a low cost Bluetooth Low Energy (BLE) transceiver for wireless sensor network (WSN) applications, with a receiver (RX)-matching network-reusing power amplifier (PA) load inductor, is presented. In order to decrease the die area, only two inductors were used in this work. Besides the one used in the voltage control oscillator (VCO), the PA load inductor was reused as the RX impedance matching component in the front-end. Proper controls have been applied to achieve high transmitter (TX) input impedance when the transceiver is in the receiving mode, and vice versa. This allows the TRX-switch/matching network integration without significant performance degradation. The RX adopted a low-IF structure and integrated a single-ended low noise amplifier (LNA), a current bleeding mixer, a 4th complex filter and a delta-sigma continuous time (CT) analog-to-digital converter (ADC). The TX employed a two-point PLL-based architecture with a non-linear PA. The RX achieved a sensitivity of -93 dBm and consumes 9.7 mW, while the TX achieved a 2.97% error vector magnitude (EVM) with 9.4 mW at 0 dBm output power. This design was fabricated in a 0.11 μm complementary metal oxide semiconductor (CMOS) technology and the front-end circuit only occupies 0.24 mm². The measurement results verify the effectiveness and applicability of the proposed BLE transceiver for WSN applications.
The aerogel Ring Imaging Cherenkov system at the Belle II spectrometer
NASA Astrophysics Data System (ADS)
Pestotnik, R.; Adachi, I.; Dolenec, R.; Hataya, K.; Iori, S.; Iwata, S.; Kakuno, H.; Kataura, R.; Kawai, H.; Kindo, H.; Kobayashi, T.; Korpar, S.; Križan, P.; Kumita, T.; Mrvar, M.; Nishida, S.; Ogawa, K.; Ogawa, S.; Šantelj, L.; Sumiyoshi, T.; Tabata, M.; Yonenaga, M.; Yusa, Y.
2017-12-01
In the forward end-cap of the Belle II spectrometer, a proximity focusing Ring Imaging Cherenkov counter with an aerogel radiator will be installed. The detector will occupy a limited space inside solenoid magnet with longitudinal field of 1.5 T. It will consist of a double layer aerogel radiator, an expansion volume and a photon detector. 420 Hamamatsu hybrid avalanche photo sensors with 144 channels each will be used to read out single Cherenkov photons with high efficiency. More than 60,000 analog signals will be digitized and processed in the front end electronics and send to the unified experiment data acquisition system. The detector components have been successfully produced and are now being installed in the spectrometer. Tested before on the bench, they are currently being installed in the mechanical frame. Part of the detector have been commissioned and connected to the acquisition system to register the cosmic ray particles. The first preliminary results are in accordance with previous expectations. We expect an excellent performance of the device which will allow at least a 4σ separation of pions from kaons in the experiment kinematic region from 0.5 GeV/c to 4 GeV/c.
Experimental Results of Site Calibration and Sensitivity Measurements in OTR for UWB Systems
NASA Astrophysics Data System (ADS)
Viswanadham, Chandana; Rao, P. Mallikrajuna
2017-06-01
System calibration and parameter accuracy measurement of electronic support measures (ESM) systems is a major activity, carried out by electronic warfare (EW) engineers. These activities are very critical and needs good understanding in the field of microwaves, antennas, wave propagation, digital and communication domains. EW systems are broad band, built with state-of-the art electronic hardware, installed on different varieties of military platforms to guard country's security from time to time. EW systems operate in wide frequency ranges, typically in the order of thousands of MHz, hence these are ultra wide band (UWB) systems. Few calibration activities are carried within the system and in the test sites, to meet the accuracies of final specifications. After calibration, parameters are measured for their accuracies either in feed mode by injecting the RF signals into the front end or in radiation mode by transmitting the RF signals on to system antenna. To carry out these activities in radiation mode, a calibrated open test range (OTR) is necessary in the frequency band of interest. Thus site calibration of OTR is necessary to be carried out before taking up system calibration and parameter measurements. This paper presents the experimental results of OTR site calibration and sensitivity measurements of UWB systems in radiation mode.
NASA Astrophysics Data System (ADS)
Jones, S.; Paschalidis, N.; Rodriguez, M.; Sittler, E. C., Jr.; Chornay, D. J.; Uribe, P.; Cameron, T.
2017-12-01
A compact Ion and Neutral Mass Spectrometer (INMS) has been developed for GSFC's Dellingr mission, using the 6U CubeSat platform. Dellingr is expected to deploy into ISS orbit in October 2017 to measure the dynamics of the ionosphere-thermosphere-mesosphere and to determine the steady state background atmospheric conditions at this altitude. The INMS makes in situ measurements of ionized and neutral H, He, N, O, N2, O2 densities with M/dM of approximately 10-12 for thermal particles. The INMS is based on particle acceleration, electronically gated time of flight (TOF), electrostatic analyzer, and CEM detectors. The compact instrument has a dual symmetric configuration with ion and neutral sensor heads on opposite sides of the shared electronics. The neutral front-end includes thermionic ionization and ion-blocking grids. The electronics include fast preamplifiers, electric gating, and TOF measurements and processing, C&DH digital electronics for commands, data storage and back-end I/O, and HVPS for detector and sensor biases. The data package includes 400 bins of mass spectra per ion and neutral sensor and key housekeeping and calibration data, in a single time tagged data frame of 14kbits uncompressed. The nominal data sampling is 1 sec corresponding to 7.5km spatial resolution in LEO orbits. This miniaturized instrument occupies a 1.1U volume, weighs only 570g and nominally operates at 1.2W. This presentation will include preliminary flight data of ions and neutrals from the Dellingr mission and outlines improvements incorporated into the design for the Dellingr (Oct 2017), ExoCube2 (Dec 2017) and petitSat (2020) CubeSat missions.
Integration of the instrument control electronics for the ESPRESSO spectrograph at ESO-VLT
NASA Astrophysics Data System (ADS)
Baldini, V.; Calderone, G.; Cirami, R.; Coretti, I.; Cristiani, S.; Di Marcantonio, P.; Mégevand, D.; Riva, M.; Santin, P.
2016-07-01
ESPRESSO, the Echelle SPectrograph for Rocky Exoplanet and Stable Spectroscopic Observations of the ESO - Very Large Telescope site, is now in its integration phase. The large number of functions of this complex instrument are fully controlled by a Beckhoff PLC based control electronics architecture. Four small and one large cabinets host the main electronic parts to control all the sensors, motorized stages and other analogue and digital functions of ESPRESSO. The Instrument Control Electronics (ICE) is built following the latest ESO standards and requirements. Two main PLC CPUs are used and are programmed through the TwinCAT Beckhoff dedicated software. The assembly, integration and verification phase of ESPRESSO, due to its distributed nature and different geographical locations of the consortium partners, is quite challenging. After the preliminary assembling and test of the electronic components at the Astronomical Observatory of Trieste and the test of some electronics and software parts at ESO (Garching), the complete system for the control of the four Front End Unit (FEU) arms of ESPRESSO has been fully assembled and tested in Merate (Italy) at the beginning of 2016. After these first tests, the system will be located at the Geneva Observatory (Switzerland) until the Preliminary Acceptance Europe (PAE) and finally shipped to Chile for the commissioning. This paper describes the integration strategy of the ICE workpackage of ESPRESSO, the hardware and software tests that have been performed, with an overall view of the experience gained during these project's phases.
Lean-driven improvements slash wait times, drive up patient satisfaction scores.
2012-07-01
Administrators at LifePoint Hospitals, based in Brentwood, TN, used lean manufacturing techniques to slash wait times by as much as 30 minutes and achieve double-digit increases in patient satisfaction scores in the EDs at three hospitals. In each case, front-line workers took the lead on identifying opportunities for improvement and redesigning the patient-flow process. As a result of the new efficiencies, patient volume is up by about 25% at all three hospitals. At each hospital, the improvement process began with Kaizen, a lean process that involves bringing personnel together to flow-chart the current system, identify problem areas, and redesign the process. Improvement teams found big opportunities for improvement at the front end of the flow process. Key to the approach was having a plan up front to deal with non-compliance. To sustain improvements, administrators gather and disseminate key metrics on a daily basis.
Beam Position Monitoring in the CSU Accelerator Facility
NASA Astrophysics Data System (ADS)
Einstein, Joshua; Vankeuren, Max; Watras, Stephen
2014-03-01
A Beam Position Monitoring (BPM) system is an integral part of an accelerator beamline, and modern accelerators can take advantage of newer technologies and designs when creating a BPM system. The Colorado State University (CSU) Accelerator Facility will include four stripline detectors mounted around the beamline, a low-noise analog front-end, and digitization and interface circuitry. The design will support a sampling rate greater than 10 Hz and sub-100 μm accuracy.
A digitalized silicon microgyroscope based on embedded FPGA.
Xia, Dunzhu; Yu, Cheng; Wang, Yuliang
2012-09-27
This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system.
A Digitalized Silicon Microgyroscope Based on Embedded FPGA
Xia, Dunzhu; Yu, Cheng; Wang, Yuliang
2012-01-01
This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system. PMID:23201990
An undulator based soft x-ray source for microscopy on the Duke electron storage ring
NASA Astrophysics Data System (ADS)
Johnson, Lewis Elgin
1998-09-01
This dissertation describes the design, development, and installation of an undulator-based soft x-ray source on the Duke Free Electron Laser laboratory electron storage ring. Insertion device and soft x-ray beamline physics and technology are all discussed in detail. The Duke/NIST undulator is a 3.64-m long hybrid design constructed by the Brobeck Division of Maxwell Laboratories. Originally built for an FEL project at the National Institute of Standards and Technology, the undulator was acquired by Duke in 1992 for use as a soft x-ray source for the FEL laboratory. Initial Hall probe measurements on the magnetic field distribution of the undulator revealed field errors of more than 0.80%. Initial phase errors for the device were more than 11 degrees. Through a series of in situ and off-line measurements and modifications we have re-tuned the magnet field structure of the device to produce strong spectral characteristics through the 5th harmonic. A low operating K has served to reduce the effects of magnetic field errors on the harmonic spectral content. Although rms field errors remained at 0.75%, we succeeded in reducing phase errors to less than 5 degrees. Using trajectory simulations from magnetic field data, we have computed the spectral output given the interaction of the Duke storage ring electron beam and the NIST undulator. Driven by a series of concerns and constraints over maximum utility, personnel safety and funding, we have also constructed a unique front end beamline for the undulator. The front end has been designed for maximum throughput of the 1st harmonic around 40A in its standard mode of operation. The front end has an alternative mode of operation which transmits the 3rd and 5th harmonics. This compact system also allows for the extraction of some of the bend magnet produced synchrotron and transition radiation from the storage ring. As with any well designed front end system, it also provides excellent protection to personnel and to the storage ring. A diagnostic beamline consisting of a transmission grating spectrometer and scanning wire beam profile monitor was constructed to measure the spatial and spectral characteristics of the undulator radiation. Test of the system with a circulating electron beam has confirmed the magnetic and focusing properties of the undulator, and verified that it can be used without perturbing the orbit of the beam.
Improving Spectral Image Classification through Band-Ratio Optimization and Pixel Clustering
NASA Astrophysics Data System (ADS)
O'Neill, M.; Burt, C.; McKenna, I.; Kimblin, C.
2017-12-01
The Underground Nuclear Explosion Signatures Experiment (UNESE) seeks to characterize non-prompt observables from underground nuclear explosions (UNE). As part of this effort, we evaluated the ability of DigitalGlobe's WorldView-3 (WV3) to detect and map UNE signatures. WV3 is the current state-of-the-art, commercial, multispectral imaging satellite; however, it has relatively limited spectral and spatial resolutions. These limitations impede image classifiers from detecting targets that are spatially small and lack distinct spectral features. In order to improve classification results, we developed custom algorithms to reduce false positive rates while increasing true positive rates via a band-ratio optimization and pixel clustering front-end. The clusters resulting from these algorithms were processed with standard spectral image classifiers such as Mixture-Tuned Matched Filter (MTMF) and Adaptive Coherence Estimator (ACE). WV3 and AVIRIS data of Cuprite, Nevada, were used as a validation data set. These data were processed with a standard classification approach using MTMF and ACE algorithms. They were also processed using the custom front-end prior to the standard approach. A comparison of the results shows that the custom front-end significantly increases the true positive rate and decreases the false positive rate.This work was done by National Security Technologies, LLC, under Contract No. DE-AC52-06NA25946 with the U.S. Department of Energy. DOE/NV/25946-3283.
Electronics design of the RPC system for the OPERA muon spectrometer
NASA Astrophysics Data System (ADS)
Acquafredda, R.; Ambrosio, M.; Balsamo, E.; Barichello, G.; Bergnoli, A.; Consiglio, L.; Corradi, G.; dal Corso, F.; Felici, G.; Manea, C.; Masone, V.; Parascandolo, P.; Sorrentino, G.
2004-09-01
The present document describes the front-end electronics of the RPC system that instruments the magnet muon spectrometer of the OPERA experiment. The main task of the OPERA spectrometer is to provide particle tracking information for muon identification and simplify the matching between the Precision Trackers. As no trigger has been foreseen for the experiment, the spectrometer electronics must be self-triggered with single-plane readout capability. Moreover, precision time information must be added within each event frame for off-line reconstruction. The read-out electronics is made of three different stages: the Front-End Boards (FEBs) system, the Controller Boards (CBs) system and the Trigger Boards (TBs) system. The FEB system provides discrimination of the strip incoming signals; a FAST-OR output of the input signals is also available for trigger plane signal generation. FEB signals are acquired by the CB system that provides the zero suppression and manages the communication to the DAQ and Slow Control. A Trigger Board allows to operate in both self-trigger mode (the FEB's FAST-OR signal starts the plane acquisition) or in external-trigger mode (different conditions can be set on the FAST-OR signals generated from different planes).
Chan, U Fai; Chan, Wai Wong; Pun, Sio Hang; Vai, Mang I; Mak, Peng Un
2007-01-01
Traditional/Current electronic circuits for Telemedicine have significant performance on certain bioelectric signal detection. However, it is rarely seen that can handle multiple signals without changing of hardware. This paper introduces a general front-end amplifier for various bioelectric signals based on Field Programmable Analogy Array (FPAA) Technology. Employing FPAA technology, the implemented amplifier can be adapted for various bioelectric signals without alternating the circuitry while its compact size (core parts < 2 cm2) provides an alternative solution for miniaturized Telemedicine system and Wearable Devices. The proposed design implementation has demonstrated, through successfully ECG and EMG signal extractions, a quick way to miniaturize analog biomedical circuit in a convenient and cost effective way.
Design and implementation of the ATLAS TRT front end electronics
NASA Astrophysics Data System (ADS)
Newcomer, Mitch; Atlas TRT Collaboration
2006-07-01
The ATLAS TRT subsystem is comprised of 380,000 4 mm straw tube sensors ranging in length from 30 to 80 cm. Polypropelene plastic layers between straws and a xenon-based gas mixture in the straws allow the straws to be used for both tracking and transition radiation detection. Detector-mounted electronics with data sparsification was chosen to minimize the cable plant inside the super-conducting solenoid of the ATLAS inner tracker. The "on detector" environment required a small footprint, low noise, low power and radiation-tolerant readout capable of triggering at rates up to 20 MHz with an analog signal dynamic range of >300 times the discriminator setting. For tracking, a position resolution better than 150 μm requires leading edge trigger timing with ˜1 ns precision and for transition radiation detection, a charge collection time long enough to integrate the direct and reflected signal from the unterminated straw tube is needed for position-independent energy measurement. These goals have been achieved employing two custom Application-specific integrated circuits (ASICS) and board design techniques that successfully separate analog and digital functionality while providing an integral part of the straw tube shielding.
Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology
NASA Astrophysics Data System (ADS)
Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.
2015-06-01
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.
ePix: a class of architectures for second generation LCLS cameras
Dragone, A.; Caragiulo, P.; Markovic, B.; ...
2014-03-31
ePix is a novel class of ASIC architectures, based on a common platform, optimized to build modular scalable detectors for LCLS. The platform architecture is composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog-to-digital converters per column. It also implements a dedicated control interface and all the required support electronics to perform configuration, calibration and readout of the matrix. Based on this platform a class of front-end ASICs and several camera modules, meeting different requirements, can be developed by designing specific pixel architectures. This approach reduces development time andmore » expands the possibility of integration of detector modules with different size, shape or functionality in the same camera. The ePix platform is currently under development together with the first two integrating pixel architectures: ePix100 dedicated to ultra low noise applications and ePix10k for high dynamic range applications.« less
The TOFp/pVPD time-of-flight system for STAR
NASA Astrophysics Data System (ADS)
Llope, W. J.; Geurts, F.; Mitchell, J. W.; Liu, Z.; Adams, N.; Eppley, G.; Keane, D.; Li, J.; Liu, F.; Liu, L.; Mutchler, G. S.; Nussbaum, T.; Bonner, B.; Sappenfield, P.; Zhang, B.; Zhang, W.-M.
2004-04-01
A time-of-flight system was constructed for the STAR Experiment for the direct identification of hadrons produced in 197Au+ 197Au collisions at RHIC. The system consists of two separate detector subsystems, one called the Pseudo Vertex Position Detector (pVPD, the "start" detector) and the other called the Time of Flight Patch (TOFp, the "stop" detector). Each detector is based on conventional scintillator/phototube technology and includes custom high-performance front-end electronics and a common CAMAC-based digitization and read-out. The design of the system and its performance during the 2001 RHIC run will be described. The start resolution attained by the pVPD was 24 ps, implying a pVPD single-detector resolution of 58 ps. The total time resolution of the system averaged over all detector channels was 87 ps, allowing direct π/ K/ p discrimination for momenta up to ˜1.8 GeV/ c, and direct ( π+ K)/ p discrimination up to ˜3 GeV/ c.
The upgrade system of BESIII ETOF with MRPC technology
NASA Astrophysics Data System (ADS)
Wang, X. Z.; Sun, Y. J.; Li, C.; Heng, Y. K.; Wu, Z.; Cao, P.; Dai, H. L.; Ji, X. L.; Gong, W. X.; Liu, Z.; Luo, X. L.; Sun, W. J.; Wang, S. Y.; Wang, Y.; Yang, R. X.; Ye, M.; Zhao, J. L.
2016-08-01
An upgrade, based on Multigap Resistive Plate Chamber (MRPC) technology, of the endcap Time-Of-Flight (ETOF) detector of the Beijing Spectrometer III (BESIII) has been proposed for the replacement of the current scintillator + PMT based ETOF, with the aim of improving the time resolution down to 80 ps sigma. This improvement will enhance the particle identification capability to meet the higher precision requirements of physics. The ETOF system including MRPC modules, Front End Electronics (FEE), CLOCK module, fast control boards and Time to Digital modules (TDIG), has been designed, constructed and parts of the ETOF system have seperately tested. Aiming at examining the quality of entire ETOF system and training the operation of all participated instruments, a cosmic ray test system was built and tested in the laboratory for about three months to guarantee the performance. In this paper the results of the test are presented indicating that the entire ETOF system works well and satisfies the requirements of the upgrade.
Novel active signal compression in low-noise analog readout at future X-ray FEL facilities
NASA Astrophysics Data System (ADS)
Manghisoni, M.; Comotti, D.; Gaioni, L.; Lodola, L.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.
2015-04-01
This work presents the design of a low-noise front-end implementing a novel active signal compression technique. This feature can be exploited in the design of analog readout channels for application to the next generation free electron laser (FEL) experiments. The readout architecture includes the low-noise charge sensitive amplifier (CSA) with dynamic signal compression, a time variant shaper used to process the signal at the preamplifier output and a 10-bit successive approximation register (SAR) analog-to-digital converter (ADC). The channel will be operated in such a way to cope with the high frame rate (exceeding 1 MHz) foreseen for future XFEL machines. The choice of a 65 nm CMOS technology has been made in order to include all the building blocks in the target pixel pitch of 100 μm. This work has been carried out in the frame of the PixFEL Project funded by the Istituto Nazionale di Fisica Nucleare (INFN), Italy.
Beam dynamics performances and applications of a low-energy electron-beam magnetic bunch compressor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Prokop, C. R.; Piot, P.; Carlsten, B. E.
2013-08-01
Many front-end applications of electron linear accelerators rely on the production of temporally compressed bunches. The shortening of electron bunches is often realized with magnetic bunch compressors located in high-energy sections of accelerators. Magnetic compression is subject to collective effects including space charge and self interaction via coherent synchrotron radiation. In this paper we explore the application of magnetic compression to low-energy (~40MeV), high-charge (nC) electron bunches with low normalized transverse emittances (<5@mm).
Performance optimization of detector electronics for millimeter laser ranging
NASA Technical Reports Server (NTRS)
Cova, Sergio; Lacaita, A.; Ripamonti, Giancarlo
1993-01-01
The front-end electronic circuitry plays a fundamental role in determining the performance actually obtained from ultrafast and highly sensitive photodetectors. We deal here with electronic problems met working with microchannel plate photomultipliers (MCP-PMTs) and single photon avalanche diodes (SPADs) for detecting single optical photons and measuring their arrival time with picosecond resolution. The performance of available fast circuits is critically analyzed. Criteria for selecting the most suitable electronics are derived and solutions for exploiting the detector performance are presented and discussed.
A low-cost, scalable, current-sensing digital headstage for high channel count μECoG.
Trumpis, Michael; Insanally, Michele; Zou, Jialin; Elsharif, Ashraf; Ghomashchi, Ali; Sertac Artan, N; Froemke, Robert C; Viventi, Jonathan
2017-04-01
High channel count electrode arrays allow for the monitoring of large-scale neural activity at high spatial resolution. Implantable arrays featuring many recording sites require compact, high bandwidth front-end electronics. In the present study, we investigated the use of a small, light weight, and low cost digital current-sensing integrated circuit for acquiring cortical surface signals from a 61-channel micro-electrocorticographic (μECoG) array. We recorded both acute and chronic μECoG signal from rat auditory cortex using our novel digital current-sensing headstage. For direct comparison, separate recordings were made in the same anesthetized preparations using an analog voltage headstage. A model of electrode impedance explained the transformation between current- and voltage-sensed signals, and was used to reconstruct cortical potential. We evaluated the digital headstage using several metrics of the baseline and response signals. The digital current headstage recorded neural signal with similar spatiotemporal statistics and auditory frequency tuning compared to the voltage signal. The signal-to-noise ratio of auditory evoked responses (AERs) was significantly stronger in the current signal. Stimulus decoding based on true and reconstructed voltage signals were not significantly different. Recordings from an implanted system showed AERs that were detectable and decodable for 52 d. The reconstruction filter mitigated the thermal current noise of the electrode impedance and enhanced overall SNR. We developed and validated a novel approach to headstage acquisition that used current-input circuits to independently digitize 61 channels of μECoG measurements of the cortical field. These low-cost circuits, intended to measure photo-currents in digital imaging, not only provided a signal representing the local cortical field with virtually the same sensitivity and specificity as a traditional voltage headstage but also resulted in a small, light headstage that can easily be scaled to record from hundreds of channels.
A low-cost, scalable, current-sensing digital headstage for high channel count μECoG
NASA Astrophysics Data System (ADS)
Trumpis, Michael; Insanally, Michele; Zou, Jialin; Elsharif, Ashraf; Ghomashchi, Ali; Sertac Artan, N.; Froemke, Robert C.; Viventi, Jonathan
2017-04-01
Objective. High channel count electrode arrays allow for the monitoring of large-scale neural activity at high spatial resolution. Implantable arrays featuring many recording sites require compact, high bandwidth front-end electronics. In the present study, we investigated the use of a small, light weight, and low cost digital current-sensing integrated circuit for acquiring cortical surface signals from a 61-channel micro-electrocorticographic (μECoG) array. Approach. We recorded both acute and chronic μECoG signal from rat auditory cortex using our novel digital current-sensing headstage. For direct comparison, separate recordings were made in the same anesthetized preparations using an analog voltage headstage. A model of electrode impedance explained the transformation between current- and voltage-sensed signals, and was used to reconstruct cortical potential. We evaluated the digital headstage using several metrics of the baseline and response signals. Main results. The digital current headstage recorded neural signal with similar spatiotemporal statistics and auditory frequency tuning compared to the voltage signal. The signal-to-noise ratio of auditory evoked responses (AERs) was significantly stronger in the current signal. Stimulus decoding based on true and reconstructed voltage signals were not significantly different. Recordings from an implanted system showed AERs that were detectable and decodable for 52 d. The reconstruction filter mitigated the thermal current noise of the electrode impedance and enhanced overall SNR. Significance. We developed and validated a novel approach to headstage acquisition that used current-input circuits to independently digitize 61 channels of μECoG measurements of the cortical field. These low-cost circuits, intended to measure photo-currents in digital imaging, not only provided a signal representing the local cortical field with virtually the same sensitivity and specificity as a traditional voltage headstage but also resulted in a small, light headstage that can easily be scaled to record from hundreds of channels.
A low-cost, scalable, current-sensing digital headstage for high channel count μECoG
Trumpis, Michael; Insanally, Michele; Zou, Jialin; Elsharif, Ashraf; Ghomashchi, Ali; Artan, N. Sertac; Froemke, Robert C.; Viventi, Jonathan
2017-01-01
Objective High channel count electrode arrays allow for the monitoring of large-scale neural activity at high spatial resolution. Implantable arrays featuring many recording sites require compact, high bandwidth front-end electronics. In the present study, we investigated the use of a small, light weight, and low cost digital current-sensing integrated circuit for acquiring cortical surface signals from a 61-channel micro-electrocorticographic (μECoG) array. Approach We recorded both acute and chronic μECoG signal from rat auditory cortex using our novel digital current-sensing headstage. For direct comparison, separate recordings were made in the same anesthetized preparations using an analog voltage headstage. A model of electrode impedance explained the transformation between current- and voltage-sensed signals, and was used to reconstruct cortical potential. We evaluated the digital headstage using several metrics of the baseline and response signals. Main results The digital current headstage recorded neural signal with similar spatiotemporal statistics and auditory frequency tuning compared to the voltage signal. The signal-to-noise ratio of auditory evoked responses (AERs) was significantly stronger in the current signal. Stimulus decoding based on true and reconstructed voltage signals were not significantly different. Recordings from an implanted system showed AERs that were detectable and decodable for 52 days. The reconstruction filter mitigated the thermal current noise of the electrode impedance and enhanced overall SNR. Significance We developed and validated a novel approach to headstage acquisition that used current-input circuits to independently digitize 61 channels of μECoG measurements of the cortical field. These low-cost circuits, intended to measure photo-currents in digital imaging, not only provided a signal representing the local cortical field with virtually the same sensitivity and specificity as a traditional voltage headstage but also resulted in a small, light headstage that can easily be scaled to record from hundreds of channels. PMID:28102827
Development of BPM Electronics at the JLAB FEL
NASA Astrophysics Data System (ADS)
Sexton, D.; Evtushenko, P.; Jordan, K.; Yan, J.; Dutton, S.; Moore, W.; Evans, R.; Coleman, J.
2006-11-01
A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with a 74.85 MHz micropulse frequency. For diagnostic reasons and for machine tune up, the micropulse frequency can be reduced to 1.17 MHz, which corresponds to about 160 μA of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 μm is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.
Development of BPM Electronics at the JLAB FEL
DOE Office of Scientific and Technical Information (OSTI.GOV)
Sexton, D.; Evtushenko, P.; Jordan, K.
2006-11-20
A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with a 74.85 MHz micropulse frequency. For diagnostic reasons and for machine tune up, the micropulse frequency can be reducedmore » to 1.17 MHz, which corresponds to about 160 {mu}A of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 {mu}m is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.« less
Development of BPM Electronics at the JLAB FEL
DOE Office of Scientific and Technical Information (OSTI.GOV)
Daniel Sexton; Pavel Evtushenko; Kevin Jordan
2006-05-01
A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with the micropulse up to 74.85 MHz. For diagnostic reasons and for the machine tune up, the micropulse frequency canmore » be reduced to 1.17 MHz, which corresponds to about 160 ?A of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 ?m is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.« less
A Digital Backend for the Low Frequency All Sky Monitor
NASA Astrophysics Data System (ADS)
Dartez, L. P.
2014-04-01
The Low Frequency All Sky Monitor (LoFASM) is a distributed array of dipole antennas that are sensitive to radio frequencies from 10 to 88 MHz. The primary science goals of LoFASM are the detection and study of low-frequency radio transients, a high priority science goal as deemed by the National Research Council's decadal survey. LoFASM consists of antennas and front-end electronics that were originally developed for the Long Wavelength Array (LWA) by the U.S. Naval Research Lab, the University of New Mexico, Virginia Tech, and the Jet Propulsion Laboratory. LoFASM, funded by the U.S. Department of Defense, will initially consist of four stations, each consisting of 12 dual-polarization dipole antennas. In a single station, RF signals from each of the individual LoFASM dipoles are combined in phase in order to synthesize LoFASM's beam. The LoFASM RF signals are phased up so that the resulting beam is sensitive to radio emission that originates from the zenith and RF signals approaching from the horizon are attenuated. Digitally, this is achieved using a full Stokes 100MHz correlating spectrometer constructed using field programmable gate array (FPGA) technology. In this thesis I will describe the design and usage of the LoFASM Correlator.
A Universal Intelligent System-on-Chip Based Sensor Interface
Mattoli, Virgilio; Mondini, Alessio; Mazzolai, Barbara; Ferri, Gabriele; Dario, Paolo
2010-01-01
The need for real-time/reliable/low-maintenance distributed monitoring systems, e.g., wireless sensor networks, has been becoming more and more evident in many applications in the environmental, agro-alimentary, medical, and industrial fields. The growing interest in technologies related to sensors is an important indicator of these new needs. The design and the realization of complex and/or distributed monitoring systems is often difficult due to the multitude of different electronic interfaces presented by the sensors available on the market. To address these issues the authors propose the concept of a Universal Intelligent Sensor Interface (UISI), a new low-cost system based on a single commercial chip able to convert a generic transducer into an intelligent sensor with multiple standardized interfaces. The device presented offers a flexible analog and/or digital front-end, able to interface different transducer typologies (such as conditioned, unconditioned, resistive, current output, capacitive and digital transducers). The device also provides enhanced processing and storage capabilities, as well as a configurable multi-standard output interface (including plug-and-play interface based on IEEE 1451.3). In this work the general concept of UISI and the design of reconfigurable hardware are presented, together with experimental test results validating the proposed device. PMID:22163624
Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B
2015-07-01
We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.
Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.
Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa
2005-12-01
Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.
REACH: a high-performance wireless base station front end
NASA Astrophysics Data System (ADS)
Nettleton, Ray W.
1996-01-01
The link budget determines the relationships between range, capacity and transmitted power for any wireless technology. In every case it is a key determinant of the system's performance from both an engineering and an economic point of view. Unfortunately, the new 1.9 GHz PCS systems will begin life with an inherent 7 dB disadvantage over the 800 MHz cellular due to propagation differences. Additionally, system wiring and electronics often degrade performance by a further 5 to 10 dB due to long coaxial runs and noisy front end amplification, both of which are harder issues to deal with at 1.9 GHz than at 800 MHz. SCT's REACHTM products address these shortcomings by packaging critical components--front end amplification, filtering, etc.--in a compact cryoelectronic package intended for mounting near the antennas of the base station. In a recent trial with Qualcomm in San Diego, this package improved the CDMA uplink budget by 6 dB--enough to halve the number of base stations that are needed in most areas. This paper examines the technical and economic ramifications of the REACHTM product.
Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; ...
2015-07-28
We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm 3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readoutmore » electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less
Rafferty, Sharon A.; Arnold, L.R.; Char, Stephen J.
2002-01-01
The U.S. Geological Survey developed this dataset as part of the Colorado Front Range Infrastructure Resources Project (FRIRP). One goal of the FRIRP was to provide information on the availability of those hydrogeologic resources that are either critical to maintaining infrastructure along the northern Front Range or that may become less available because of urban expansion in the northern Front Range. This dataset extends from the Boulder-Jefferson County line on the south, to the middle of Larimer and Weld Counties on the North. On the west, this dataset is bounded by the approximate mountain front of the Front Range of the Rocky Mountains; on the east, by an arbitrary north-south line extending through a point about 6.5 kilometers east of Greeley. This digital geospatial dataset consists of digitized contours of unconsolidated-sediment thickness (depth to bedrock).
DOE Office of Scientific and Technical Information (OSTI.GOV)
Szadkowski, Zbigniew
2015-07-01
The paper presents the first results from the trigger based on the Discrete Cosine Transform (DCT) operating in the new Front-End Boards with Cyclone V FPGA deployed in 8 test surface detectors in the Pierre Auger Engineering Array. The patterns of the ADC traces generated by very inclined showers were obtained from the Auger database and from the CORSIKA simulation package supported next by Offline reconstruction Auger platform which gives a predicted digitized signal profiles. Simulations for many variants of the initial angle of shower, initialization depth in the atmosphere, type of particle and its initial energy gave a boundarymore » of the DCT coefficients used next for the on-line pattern recognition in the FPGA. Preliminary results have proven a right approach. We registered several showers triggered by the DCT for 120 MSps and 160 MSps. (authors)« less
PCI/iRMX-Based Front-End Data Acquisition for the HT-7U Experiment
NASA Astrophysics Data System (ADS)
Shu, Yantai; Luo, Jiarong; Yan, Jianbing; Zhao, Feng; Zhang, Liang
2004-06-01
A PCI/iRMX-based front-end system is being designed to serve as data acquisition (DAQ) subsystem for the HT-7U superconducting tokamak. The diagnostic instruments are connected to four analog-to-digital converter (ADC) boards that are directly plugged into the peripheral component interconnect (PCI) bus of a personal computer (PC) running the iRMX real-time operating system. Each ADC board has eight channels. The sampling rate of each channel can be up to 125 K samples per second. The acquired data are directly transferred from the ADC board into the memory of the PC, and then transferred to servers through the network. As a testbed, one PCI/iRMX subsystem has been built and has acquired data from the existing HT-7 tokamak. The DAQ can easily support a wide range of pulse lengths, even matching extremely long pulse and steady-state operation. This paper describes the system design and performance evaluation in detail.
Qiu, Robert; Guo, Nan; Li, Husheng; Wu, Zhiqiang; Chakravarthy, Vasu; Song, Yu; Hu, Zhen; Zhang, Peng; Chen, Zhe
2009-01-01
Dynamic spectrum access is a must-have ingredient for future sensors that are ideally cognitive. The goal of this paper is a tutorial treatment of wideband cognitive radio and radar—a convergence of (1) algorithms survey, (2) hardware platforms survey, (3) challenges for multi-function (radar/communications) multi-GHz front end, (4) compressed sensing for multi-GHz waveforms—revolutionary A/D, (5) machine learning for cognitive radio/radar, (6) quickest detection, and (7) overlay/underlay cognitive radio waveforms. One focus of this paper is to address the multi-GHz front end, which is the challenge for the next-generation cognitive sensors. The unifying theme of this paper is to spell out the convergence for cognitive radio, radar, and anti-jamming. Moore’s law drives the system functions into digital parts. From a system viewpoint, this paper gives the first comprehensive treatment for the functions and the challenges of this multi-function (wideband) system. This paper brings together the inter-disciplinary knowledge. PMID:22454598
The DCU: the detector control unit of the SAFARI instrument onboard SPICA
NASA Astrophysics Data System (ADS)
Clénet, A.; Ravera, L.; Bertrand, B.; Cros, A.; Hou, R.; Jackson, B. D.; van Leeuwen, B. J.; Van Loon, D.; Parot, Y.; Pointecouteau, E.; Sournac, A.; Ta, N.
2012-09-01
The SpicA FAR infrared Instrument (SAFARI) is a European instrument for the infrared domain telescope SPICA, a JAXA space mission. The SAFARI detectors are Transistor Edge Sensors (TES) arranged in 3 matrixes. The TES front end electronic is based on Superconducting Quantum Interference Devices (SQUIDs) and it does the readout of the 3500 detectors with Frequency Division Multiplexing (FDM) type architecture. The Detector Control Unit (DCU), contributed by IRAP, manages the readout of the TES by computing and providing the AC-bias signals (1 - 3 MHz) to the TES and by computing the demodulation of the returning signals. The SQUID being highly non-linear, the DCU has also to provide a feedback signal to increase the SQUID dynamic. Because of the propagation delay in the cables and the processing time, a classic feedback will not be stable for AC-bias frequencies up to 3 MHz. The DCU uses a specific technique to compensate for those delays: the BaseBand FeedBack (BBFB). This digital data processing is done for the 3500 pixels in parallel. Thus, to keep the DCU power budget within its allocation we have to specifically optimize the architecture of the digital circuit with respect to the power consumption. In this paper we will mainly present the DCU architecture. We will particularly focus on the BBFB technique used to linearize the SQUID and on the optimization done to reduce the power consumption of the digital processing circuit.
Comparative Study of Nonlinear Time Warping Techniques in Isolated Word Speech Recognition Systems
1981-06-17
all modules are loaded under a flexible research oriented supervisor, " Cicada ". Cicada allows for the integration of experimental ideas, extensions...evaluate alternate recognition methods. More detailed information about Cicada can be found in7 . In the following we limit our discussion to the design of...43.70 37.78 32.47 44.44 44.32 38 8. Figures Cicada - a flexible research oriented supervisor ReferenceSTernpl ates Front End Matching Digital Signal
Fully Integrated Passive UHF RFID Tag for Hash-Based Mutual Authentication Protocol
Mikami, Shugo; Watanabe, Dai; Li, Yang; Sakiyama, Kazuo
2015-01-01
Passive radio-frequency identification (RFID) tag has been used in many applications. While the RFID market is expected to grow, concerns about security and privacy of the RFID tag should be overcome for the future use. To overcome these issues, privacy-preserving authentication protocols based on cryptographic algorithms have been designed. However, to the best of our knowledge, evaluation of the whole tag, which includes an antenna, an analog front end, and a digital processing block, that runs authentication protocols has not been studied. In this paper, we present an implementation and evaluation of a fully integrated passive UHF RFID tag that runs a privacy-preserving mutual authentication protocol based on a hash function. We design a single chip including the analog front end and the digital processing block. We select a lightweight hash function supporting 80-bit security strength and a standard hash function supporting 128-bit security strength. We show that when the lightweight hash function is used, the tag completes the protocol with a reader-tag distance of 10 cm. Similarly, when the standard hash function is used, the tag completes the protocol with the distance of 8.5 cm. We discuss the impact of the peak power consumption of the tag on the distance of the tag due to the hash function. PMID:26491714
A miniature bidirectional telemetry system for in-vivo gastric slow wave recordings
Farajidavar, Aydin; O’Grady, Gregory; Rao, Smitha M.N.; Cheng, Leo K; Abell, Thomas; Chiao, J.-C.
2012-01-01
Stomach contractions are initiated and coordinated by an underlying electrical activity (slow waves), and electrical dysrhythmias accompany motility diseases. Electrical recordings taken directly from the stomach provide the most valuable data, but face technical constraints. Serosal or mucosal electrodes have cables that traverse the abdominal wall, or a natural orifice, causing discomfort and possible infection, and restricting mobility. These problems motivated the development of a wireless system. The bidirectional telemetric system constitutes a front-end transponder, a back-end receiver and a graphical user interface. The front-end module conditions the analog signals, then digitizes and loads the data into a radio for transmission. Data receipt at the back-end is acknowledged via a transceiver function. The system was validated in a bench-top study, then validated in-vivo using serosal electrodes connected simultaneously to a commercial wired system. The front-end module was 35×35×27 mm3 and weighed 20 g. Bench-top tests demonstrated reliable communication within a distance range of 30 m, power consumption of 13.5 mW, and 124-hour operation when utilizing a 560-mAh, 3-V battery. In-vivo, slow wave frequencies were recorded identically with the wireless and wired reference systems (2.4 cycles/min), automated activation time detection was modestly better for the wireless system (5% vs 14% false positive rate), and signal amplitudes were modestly higher via the wireless system (462 vs 386 μV; p<0.001). This telemetric system for slow wave acquisition is reliable, power efficient, readily portable and potentially implantable. The device will enable chronic monitoring and evaluation of slow wave patterns in animals and patients. PMID:22635054
NASA Technical Reports Server (NTRS)
2004-01-01
[figure removed for brevity, see original site] [figure removed for brevity, see original site] Figure 1Figure 2
This digital elevation map shows the topography of the 'Columbia Hills,' just in front of the Mars Exploration Rover Spirit's current position. Rover planners have plotted the safest route for Spirit to climb to the front hill, called 'West Spur.' The black line in the middle of the image represents the rover's traverse path, which starts at 'Hank's Hollow' and ends at the top of 'West Spur.' Scientists are sending Spirit up the hill to investigate the interesting rock outcrops visible in images taken by the rover. Data from the Mars Orbital Camera on the orbiting Mars Global Surveyor were used to create this 3-D map. In figure 1, the digital map shows the slopes of the 'Columbia Hills,' just in front of the Mars Exploration Rover Spirit's current position. Colors indicate the slopes of the hills, with red areas being the gentlest and blue the steepest. Rover planners have plotted the safest route for Spirit to climb the front hill, called 'West Spur.' The path is indicated here with a curved black line. Stereo images from the Mars Orbital Camera on the orbiting Mars Global Surveyor were used to create this 3-D map. In figure 2, the map shows the north-facing slopes of the 'Columbia Hills,' just in front of the Mars Exploration Rover Spirit's current position. Bright areas indicate surfaces sloping more toward the north than dark areas. To reach the rock outcrop at the top of the hill, engineers will aim to drive the rover around the dark areas, which would yield less solar power. The curved black line in the middle represents the rover's planned traverse path.Progress on the upgrade of the CMS Hadron Calorimeter Front-End electronics
DOE Office of Scientific and Technical Information (OSTI.GOV)
Anderson, Jake; Whitmore, Juliana; /Fermilab
2011-11-01
We present a scheme to upgrade the CMS HCAL front-end electronics in the second long shutdown to upgrade the LHC (LS2), which is expected to occur around 2018. The HCAL electronics upgrade is required to handle the major instantaneous luminosity increase (up to 5 * 10{sup 34} cm{sup -2} s{sup -1}) and an expected integrated luminosity of {approx}3000 fb{sup -1}. A key aspect of the HCAL upgrade is to read out longitudinal segmentation information to improve background rejection, energy resolution, and electron isolation at the L1 trigger. This paper focuses on the requirements for the new electronics and on themore » proposed solutions. The requirements include increased channel count, additional timing capabilities, and additional redundancy. The electronics are required to operate in a harsh environment and are constrained by the existing infrastructure. The proposed solutions span from chip level to system level. They include the development of a new ASIC ADC, the design and testing of higher speed transmitters to handle the increased data volume, the evaluation and use of circuits from other developments, evaluation of commercial FPGAs, better thermal design, and improvements in the overall readout architecture. We will report on the progress of the designs for these upgraded systems, along with performance requirements and initial design studies.« less
Vortex Generators to Control Boundary Layer Interactions
NASA Technical Reports Server (NTRS)
Babinsky, Holger (Inventor); Loth, Eric (Inventor); Lee, Sang (Inventor)
2014-01-01
Devices for generating streamwise vorticity in a boundary includes various forms of vortex generators. One form of a split-ramp vortex generator includes a first ramp element and a second ramp element with front ends and back ends, ramp surfaces extending between the front ends and the back ends, and vertical surfaces extending between the front ends and the back ends adjacent the ramp surfaces. A flow channel is between the first ramp element and the second ramp element. The back ends of the ramp elements have a height greater than a height of the front ends, and the front ends of the ramp elements have a width greater than a width of the back ends.
DOE Office of Scientific and Technical Information (OSTI.GOV)
DE GERONIMO,G.; FRIED, J.; FROST, E.
We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detectormore » process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.« less
Noise propagation issues in Belle II pixel detector power cable
Iglesias, M.; Arteche, F.; Echeverria, I.; ...
2018-04-26
The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This article presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impactmore » on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less
Noise propagation issues in Belle II pixel detector power cable
DOE Office of Scientific and Technical Information (OSTI.GOV)
Iglesias, M.; Arteche, F.; Echeverria, I.
The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This article presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impactmore » on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.
Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves themore » development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.« less
CMOS Rad-Hard Front-End Electronics for Precise Sensors Measurements
NASA Astrophysics Data System (ADS)
Sordo-Ibáñez, Samuel; Piñero-García, Blanca; Muñoz-Díaz, Manuel; Ragel-Morales, Antonio; Ceballos-Cáceres, Joaquín; Carranza-González, Luis; Espejo-Meana, Servando; Arias-Drake, Alberto; Ramos-Martos, Juan; Mora-Gutiérrez, José Miguel; Lagos-Florido, Miguel Angel
2016-08-01
This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35μm CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between -25 and 125 °C) and a total dose beyond 300 krad.
Development of 3He LPSDs and read-out system for the SANS spectrometer at CPHS
NASA Astrophysics Data System (ADS)
Huang, T. C.; Gong, H.; Shao, B. B.; Wang, X. W.; Zhang, Y.; Pang, B. B.
2014-01-01
The Compact Pulsed Hadron Source (CPHS) is a 13-MeV proton-linac-driven neutron source under construction in Tsinghua University. Time-of-flight (TOF) small-angle neutron scattering (SANS) spectrometer is one of the first instruments to be built. It is designed to use linear position-sensitive detectors (LPSDs) of 3He gas proportional counters to cover a 1 m×1 m area. Prototypical LPSDs (Φ = 12 mm, L=1 m) have been made and read-out system is developed based on charge division. This work describes the in-house fabrication of the prototypical LPSDs and design of the read-out system including front-end electronics and data acquisition (DAQ) system. Key factors of the front-end electronics are studied and optimized with PSPICE simulation. DAQ system is designed based on VME bus architecture and FPGA Mezzanine Card (FMC) standard with high flexibility and extendibility. Preliminary experiments are carried out and the results are present and discussed.
Music and Hearing Aids—An Introduction
2012-01-01
Modern digital hearing aids have provided improved fidelity over those of earlier decades for speech. The same however cannot be said for music. Most modern hearing aids have a limitation of their “front end,” which comprises the analog-to-digital (A/D) converter. For a number of reasons, the spectral nature of music as an input to a hearing aid is beyond the optimal operating conditions of the “front end” components. Amplified music tends to be of rather poor fidelity. Once the music signal is distorted, no amount of software manipulation that occurs later in the circuitry can improve things. The solution is not a software issue. Some characteristics of music that make it difficult to be transduced without significant distortion include an increased sound level relative to that of speech, and the crest factor- the difference in dB between the instantaneous peak of a signal and its RMS value. Clinical strategies and technical innovations have helped to improve the fidelity of amplified music and these include a reduction of the level of the input that is presented to the A/D converter. PMID:23258616
Schlyer, David; Woody, Craig L.; Rooney, William; Vaska, Paul; Stoll, Sean; Pratte, Jean-Francois; O'Connor, Paul
2007-10-23
A combined PET/MRI scanner generally includes a magnet for producing a magnetic field suitable for magnetic resonance imaging, a radiofrequency (RF) coil disposed within the magnetic field produced by the magnet and a ring tomograph disposed within the magnetic field produced by the magnet. The ring tomograph includes a scintillator layer for outputting at least one photon in response to an annihilation event, a detection array coupled to the scintillator layer for detecting the at least one photon outputted by the scintillator layer and for outputting a detection signal in response to the detected photon and a front-end electronic array coupled to the detection array for receiving the detection signal, wherein the front-end array has a preamplifier and a shaper network for conditioning the detection signal.
Ionization Readout Electronics for SuperCDMS SNOLAB Employing a HEMT Front-End
NASA Astrophysics Data System (ADS)
Partridge, R.
2014-09-01
The SuperCDMS SNOLAB experiment seeks to deploy 200 kg of cryogenic Ge detectors employing phonon and ionization readout to identify dark matter interactions. One of the design challenges for the experiment is to provide amplification of the high impedance ionization signal while minimizing power dissipation and noise. This paper describes the design and expected performance of the ionization readout being developed for an engineering model of the SuperCDMS SNOLAB Ge Tower System. The readout features the use of a low-noise HEMT front end transistor operating at 4 K to achieve a power dissipation of 100 W per channel, local grounding to minimize noise injection, and biasing circuitry that allows precise control of the HEMT operating point.
NASA Technical Reports Server (NTRS)
Carreno, V. A.
1984-01-01
An approach to predict the susceptibility of digital systems to signal disturbances is described. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, electromagnetic interference (EMI), and electromagnetic pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload brings the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The super-sceptre (system for circuit evaluation of transient radiation effects) programs was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.
Federal Register 2010, 2011, 2012, 2013, 2014
2010-11-18
... Division of CareNetwork, Inc., Front End Operations and Account Installation-Product Testing Groups, De... a Division of Carenetwork, Inc. Front End Operations and Account Installation-Product Testing Groups..., a Division of CareNetwork, Inc., Front End Operations and Account Installation- Product Testing...
The Eye Catching Property of Digital-Signage with Scent and a Scent-Emitting Video Display System
NASA Astrophysics Data System (ADS)
Tomono, Akira; Otake, Syunya
In this paper, the effective method of inducing a glance aimed at the digital signage by emitting a scent is described. The simulation experiment was done using the immersive VR System because there were a lot of restrictions to the experiment in an actual passageway. In order to investigate the eye catching property of the digital signage, the passer-by's eye movement was analyzed. Through the experiment, they were clarified that the digital signage with the scent was paid to attention, and the strong impression remained in the memory. Next, a scent-emitting video display system applying to the digital signage is described. To this end, a scent-emitting device that is able to quickly change the scents it is releasing, and present them from a distance (by the non-contact method), thus maintaining a relationship between the scent and the image, must be developed. We propose a new method where a device that can release pressurized gases is placed behind the display screen filled with tiny pores. Scents are then ejected from this device, traveling through the pores to the front side of the screen. An excellent scent delivery characteristic was obtained because the distance to the user is close and the scent is presented from the front. We also present a method for inducing viewer reactions using on-screen images, thereby enabling scent release to coincide precisely with viewer inhalations. We anticipate that the simultaneous presentation of scents and video images will deepen viewers' comprehension of these images.
Mollazadeh, Mohsen; Murari, Kartikeya; Cauwenberghs, Gert; Thakor, Nitish
2009-01-01
Electrical activity in the brain spans a wide range of spatial and temporal scales, requiring simultaneous recording of multiple modalities of neurophysiological signals in order to capture various aspects of brain state dynamics. Here, we present a 16-channel neural interface integrated circuit fabricated in a 0.5 μm 3M2P CMOS process for selective digital acquisition of biopotentials across the spectrum of neural signal modalities in the brain, ranging from single spike action potentials to local field potentials (LFP), electrocorticograms (ECoG), and electroencephalograms (EEG). Each channel is composed of a tunable bandwidth, fixed gain front-end amplifier and a programmable gain/resolution continuous-time incremental ΔΣ analog-to-digital converter (ADC). A two-stage topology for the front-end voltage amplifier with capacitive feedback offers independent tuning of the amplifier bandpass frequency corners, and attains a noise efficiency factor (NEF) of 2.9 at 8.2 kHz bandwidth for spike recording, and a NEF of 3.2 at 140 Hz bandwidth for EEG recording. The amplifier has a measured midband gain of 39.6 dB, frequency response from 0.2 Hz to 8.2 kHz, and an input-referred noise of 1.94 μVrms while drawing 12.2 μA of current from a 3.3 V supply. The lower and higher cutoff frequencies of the bandpass filter are adjustable from 0.2 to 94 Hz and 140 Hz to 8.2 kHz, respectively. At 10-bit resolution, the ADC has an SNDR of 56 dB while consuming 76 μW power. Time-modulation feedback in the ADC offers programmable digital gain (1–4096) for auto-ranging, further improving the dynamic range and linearity of the ADC. Experimental recordings with the system show spike signals in rat somatosensory cortex as well as alpha EEG activity in a human subject. PMID:20046962
The AD and ELENA orbit, trajectory and intensity measurement systems
NASA Astrophysics Data System (ADS)
Marco-Hernández, R.; Alves, D.; Angoletta, M. E.; Marqversen, O.; Molendijk, J.; Oponowicz, E.; Ruffieux, R.; Sánchez-Quesada, J.; SØby, L.
2017-07-01
This paper describes the new Antiproton Decelerator (AD) orbit measurement system and the Extra Low ENergy Antiproton ring (ELENA) orbit, trajectory and intensity measurement system. The AD machine at European Organization for Nuclear Research (CERN) is presently being used to decelerate antiprotons from 3.57 GeV/c to 100 MeV/c for matter vs anti-matter comparative studies. The ELENA machine, presently under commissioning, has been designed to provide an extra deceleration stage down to 13.7 MeV/c. The AD orbit system is based on 32 horizontal and 27 vertical electrostatic Beam Position Monitor (BPM) fitted with existing low noise front-end amplifiers while the ELENA system consists of 24 \\gls{BPM}s equipped with new low-noise head amplifiers. In both systems the front-end amplifiers generate a difference (delta) and a sum (sigma) signal which are sent to the digital acquisition system, placed tens of meters away from the AD or ELENA rings, where they are digitized and further processed. The beam position is calculated by dividing the difference signal by the sum signal either using directly the raw digitized data for measuring the turn-by-turn trajectory in the ELENA system or after down-mixing the signals to baseband for the orbit measurement in both machines. The digitized sigma signal will be used in the ELENA system to calculate the bunched beam intensity and the Schottky parameters with coasting beam after passing through different signal processing chain. The digital acquisition arrangement for both systems is based on the same hardware, also used in the ELENA Low Level Radio Frequency (LLRF) system, which follows the VME Switched Serial (VXS) enhancement of the Versa Module Eurocard 64x extension (VME64x) standard and includes VITA 57 standard Field Programmable Gate Array Mezzanine Card (FMC). The digital acquisition Field Programmable Gate Array (FPGA) and Digital Signal Processor (DSP) firmware shares many common functionalities with the LLRF system but has been tailored for this measurement application in particular. Specific control and acquisition software has been developed for these systems. Both systems are installed in AD and ELENA. The AD orbit system currently measures the orbit in AD while the ELENA system is being used in the commissioning of the ELENA ring.
Balasubramanian, Viswanathan; Ruedi, Pierre-Francois; Temiz, Yuksel; Ferretti, Anna; Guiducci, Carlotta; Enz
2013-10-01
This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mode electrochemical biosensing applications. In this paper, we discuss the architecture of this canceling based front-end and the optimization methods followed for achieving low noise, low distortion performance at minimum current consumption are presented. To validate the employed canceling based front-end, it has been realized in a 0.18 μm CMOS process and the characterization results are presented. The front-end has also been tested as part of a complete wireless sensing system and the cyclic voltammetry (CV) test results from electrochemical sensors are provided. Overall current consumption in the front-end is 50 μA while operating on a 1.8 V supply.
40 CFR 63.487 - Batch front-end process vents-reference control technology.
Code of Federal Regulations, 2010 CFR
2010-07-01
... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY...
MEDIPIX: a VLSI chip for a GaAs pixel detector for digital radiology
NASA Astrophysics Data System (ADS)
Amendolia, S. R.; Bertolucci, E.; Bisogni, M. G.; Bottigli, U.; Ceccopieri, A.; Ciocci, M. A.; Conti, M.; Delogu, P.; Fantacci, M. E.; Maestro, P.; Marzulli, V.; Pernigotti, E.; Romeo, N.; Rosso, V.; Rosso, P.; Stefanini, A.; Stumbo, S.
1999-02-01
A GaAs pixel detector designed for digital mammography, equipped with a 36-channel single photon counting discrete read-out electronics, was tested using a test object developed for quality control purposes in mammography. Each pixel was 200×200 μm 2 large, and 200 μm deep. The choice of GaAs with respect to silicon (largely used in other applications and with a more established technique) has been made because of the much better detection efficiency at mammographic energies, combined with a very good charge collection efficiency achieved thanks to new ohmic contacts. This GaAs detector is able to perform a measurement of low-contrast details, with minimum contrast lower (nearly a factor two) than that typically achievable with standard mammographic film+screen systems in the same conditions of clinical routine. This should allow for an earlier diagnosis of breast tumour masses. Due to these encouraging results, the next step in the evolution of our imaging system based on GaAs detectors has been the development of a VLSI front-end prototype chip (MEDIPIX ) in order to cover a much larger diagnostic area. The chip reads 64×64 channels in single photon counting mode, each one 170 μm wide. Each channel contains also a test input where a signal can be simulated, injecting a known charge through a 16 f F capacitor. Fake signals have been injected via the test input measuring and equalizing minimum thresholds for all the channels. On an average, in most of the performing chips available up to now, we have found that it is possible to set a threshold as low as 1800 electrons with an RMS of 150 electrons (10 standard deviations lower than the 20 keV photon signal roughly equivalent to 4500 electrons). The detector, bump-bonded to the chip, will be tested and a ladder of detectors will be prepared to be able to scan large surface objects.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lombigit, L., E-mail: lojius@nm.gov.my; Rahman, Nur Aira Abd; Mohamad, Glam Hadzir Patai
A radioisotope identifier device based on large volume Co-planar grid CZT detector is current under development at Malaysian Nuclear Agency. This device is planned to be used for in-situ identification of radioisotopes based on their unique energies. This work reports on electronics testing performed on the front-end electronics (FEE) analog section comprising charge sensitive preamplifier-pulse shaping amplifier chain. This test involves measurement of charge sensitivity, pulse parameters and electronics noise. This report also present some preliminary results on the spectral measurement obtained from gamma emitting radioisotopes.
Development And Test of A Digitally Steered Antenna Array for The Navigator GPS Receiver
NASA Technical Reports Server (NTRS)
Pinto, Heitor David; Valdez, Jennifer E.; Winternitz, Luke M. B.; Hassouneh, Munther A.; Price, Samuel R.
2012-01-01
Global Positioning System (GPS)-based navigation has become common for low-Earth orbit spacecraft as the signal environment is similar to that on the Earth s surface. The situation changes abruptly, however, for spacecraft whose orbital altitudes exceed that of the GPS constellation. Visibility is dramatically reduced and signals that are present may be very weak and more susceptible to interference. GPS receivers effective at these altitudes require increased sensitivity, which often requires a high-gain antenna. Pointing such an antenna can pose a challenge. One efficient approach to mitigate these problems is the use of a digitally steered antenna array. Such an antenna can optimally allocate gain toward desired signal sources and away from interferers. This paper presents preliminary results in the development and test of a digitally steered antenna array for the Navigator GPS research program at NASA s Goddard Space Flight Center. In particular, this paper highlights the development of an array and front-end electronics, the development and test of a real-time software GPS receiver, and implementation of three beamforming methods for combining the signals from the array. Additionally, this paper discusses the development of a GPS signal simulator which produces digital samples of the GPS L1C/A signals as they would be received by an arbitrary antenna array configuration. The simulator models transmitter and receiver dynamics, near-far and multipath interference, and has been a critical component in both the development and test of the GPS receiver. The GPS receiver system was tested with real and simulated GPS signals. Preliminary results show that performance improvement was achieved in both the weak signal and interference environments, matching analytical predictions. This paper summarizes our initial findings and discusses the advantages and limitations of the antenna array and the various beamforming methods.
Electronic hardware design of electrical capacitance tomography systems.
Saied, I; Meribout, M
2016-06-28
Electrical tomography techniques for process imaging are very prominent for industrial applications, such as the oil and gas industry and chemical refineries, owing to their ability to provide the flow regime of a flowing fluid within a relatively high throughput. Among the various techniques, electrical capacitance tomography (ECT) is gaining popularity due to its non-invasive nature and its capability to differentiate between different phases based on their permittivity distribution. In recent years, several hardware designs have been provided for ECT systems that have improved its resolution of measurements to be around attofarads (aF, 10(-18) F), or the number of channels, that is required to be large for some applications that require a significant amount of data. In terms of image acquisition time, some recent systems could achieve a throughput of a few hundred frames per second, while data processing time could be achieved in only a few milliseconds per frame. This paper outlines the concept and main features of the most recent front-end and back-end electronic circuits dedicated for ECT systems. In this paper, multiple-excitation capacitance polling, a front-end electronic technique, shows promising results for ECT systems to acquire fast data acquisition speeds. A highly parallel field-programmable gate array (FPGA) based architecture for a fast reconstruction algorithm is also described. This article is part of the themed issue 'Supersensing through industrial process tomography'. © 2016 The Author(s).
Semantic Expression and Execution of B2B Contracts on Multimedia Content
NASA Astrophysics Data System (ADS)
Rodríguez-Doncel, Víctor; Delgado, Jaime
Business to business commerce of audiovisual material can be governed by electronic contracts, in the same way as digital licenses govern business to consumer transactions. The digital licenses for end users have been expressed either in proprietary formats or in standard Rights Expression Languages and they can be seen as the electronic replacement of distribution contracts and end user licenses. However, these languages fail to replace the rest of the contracts agreed along the complete Intellectual Property value chain. To represent their corresponding electronic counterpart licenses, a schema based on the standard eContracts and the Media Value Chain Ontology is presented here. It has been conceived to deal with a broader set of parties, to handle typical clauses found in the audiovisual market contracts, and to govern every transaction performed on IP objects.
Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.
Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M
2012-07-01
There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.
The front-end electronics of the LSPE-SWIPE experiment
NASA Astrophysics Data System (ADS)
Fontanelli, F.; Biasotti, M.; Bevilacqua, A.; Siccardi, F.
2016-07-01
The SWIPE detector of the Ballon Borne Mission LSPE (see e.g. the contribution of P. de Bernardis et al. in this conference) intends to measure the primordial 'B-mode' polarization of the Cosmic Microwave Background (CMB). For this scope microwave telescopes need sensitive cryogenic bolometers with an overall equivalent noise temperature in the nK range. The detector is a spiderweb bolometer based on transition edge sensor and followed by a SQUID to perform the signal readout. This contribution will concentrate on the design, description and first tests on the front-end electronics which processes the squid output (and controls it). The squid output is first amplified by a very low noise preamplifier based on a discrete JFET input differential architecture followed by a low noise CMOS operational amplifier. Equivalent input noise density is 0.6 nV/Hz and bandwidth extends up to at least 2 MHz. Both devices (JFET and CMOS amplifier) have been tested at liquid nitrogen. The second part of the contribution will discuss design and results of the control electronics, both the flux locked loop for the squid and the slow control chain to monitor and set up the system will be reviewed.
FPGA-Based Front-End Electronics for Positron Emission Tomography
Haselman, Michael; DeWitt, Don; McDougald, Wendy; Lewellen, Thomas K.; Miyaoka, Robert; Hauck, Scott
2010-01-01
Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for positron emission tomography (PET) scanners. Our laboratory is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this next generation scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilizes to add significant signal processing power to produce higher resolution images. In this paper two such processes, sub-clock rate pulse timing and event localization, will be discussed in detail. We show that timing performed in the FPGA can achieve a resolution that is suitable for small-animal scanners, and will outperform the analog version given a low enough sampling period for the ADC. We will also show that the position of events in the scanner can be determined in real time using a statistical positioning based algorithm. PMID:21961085
NECTAr: New electronics for the Cherenkov Telescope Array
NASA Astrophysics Data System (ADS)
Vorobiov, S.; Bolmont, J.; Corona, P.; Delagnes, E.; Feinstein, F.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Sanuy, A.; Toussenel, F.; Vincent, P.
2011-05-01
The European astroparticle physics community aims to design and build the next generation array of Imaging Atmospheric Cherenkov Telescopes (IACTs), that will benefit from the experience of the existing H.E.S.S. and MAGIC detectors, and further expand the very-high energy astronomy domain. In order to gain an order of magnitude in sensitivity in the 10 GeV to >100TeV range, the Cherenkov Telescope Array (CTA) will employ 50-100 mirrors of various sizes equipped with 1000-4000 channels per camera, to be compared with the 6000 channels of the final H.E.S.S. array. A 3-year program, started in 2009, aims to build and test a demonstrator module of a generic CTA camera. We present here the NECTAr design of front-end electronics for the CTA, adapted to the trigger and data acquisition of a large IACTs array, with simple production and maintenance. Cost and camera performances are optimized by maximizing integration of the front-end electronics (amplifiers, fast analog samplers, ADCs) in an ASIC, achieving several GS/s and a few μs readout dead-time. We present preliminary results and extrapolated performances from Monte Carlo simulations.
Position sensitive and energy dispersive x-ray detector based on silicon strip detector technology
NASA Astrophysics Data System (ADS)
Wiącek, P.; Dąbrowski, W.; Fink, J.; Fiutowski, T.; Krane, H.-G.; Loyer, F.; Schwamberger, A.; Świentek, K.; Venanzi, C.
2015-04-01
A new position sensitive detector with a global energy resolution for the entire detector of about 380 eV FWHM for 8.04 keV line at ambient temperature is presented. The measured global energy resolution is defined by the energy spectra summed over all strips of the detector, and thus it includes electronic noise of the front-end electronics, charge sharing effects, matching of parameters across the channels and other system noise sources. The target energy resolution has been achieved by segmentation of the strips to reduce their capacitance and by careful optimization of the front-end electronics. The key design aspects and parameters of the detector are discussed briefly in the paper. Excellent noise and matching performance of the readout ASIC and negligible system noise allow us to operate the detector with a discrimination threshold as low as 1 keV and to measure fluorescence radiation lines of light elements, down to Al Kα of 1.49 keV, simultaneously with measurements of the diffraction patterns. The measurement results that demonstrate the spectrometric and count rate performance of the developed detector are presented and discussed in the paper.
Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall
NASA Astrophysics Data System (ADS)
Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.
2010-10-01
A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m2, divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade .
NASA Astrophysics Data System (ADS)
Jain, S.
2017-03-01
The High Granularity Calorimeter (HGCAL) is the technology choice of the CMS collaboration for the endcap calorimetry upgrade planned to cope with the harsh radiation and pileup environment at the High Luminosity-LHC . The HGCAL is realized as a sampling calorimeter, including an electromagnetic compartment comprising 28 layers of silicon pad detectors with pad areas of 0.5-01. cm2 interspersed with absorbers made from tungsten and copper to form a highly compact and granular device. Prototype modules, based on hexagonal silicon pad sensors, with 128 channels, have been constructed and tested in beams at FNAL and at CERN. The modules include many of the features required for this challenging detector, including a PCB glued directly to the sensor, using through-hole wire-bonding for signal readout and 5 mm spacing between layers—including the front-end electronics and all services. Tests in 2016 have used an existing front-end chip —Skiroc2 (designed for the CALICE experiment for ILC). We present results from first tests of these modules both in the laboratory and with beams of electrons, pions and protons, including noise performance, calibration with mips and electron signals.
Performance of GEM Detectors in the DarkLight Experiment at LERF
NASA Astrophysics Data System (ADS)
Mohammed Prem Nazeer, Sahara Jesmin; DarkLight Collaboration
2017-01-01
The DarkLight experiment has been proposed to search for a heavy photon A' in the mass range of 10-100 MeV/c2 produced in electron-proton collisions. Phase-I of DarkLight has started to take place in 2016 at the Low Energy Recirculator Facility (LERF) at Jefferson Lab. LERF delivered a 100 MeV electron beam onto a windowless hydrogen gas target. The phase-I detector tracks leptons inside the DarkLight solenoid with a set of Gas Electron Multiplier (GEM) detectors, combined with segmented scintillators for triggering. The GEM telescope consists of four 10 × 10 cm2 triple layer GEM chambers with 2D readout strips, mounted in a slightly angled fixed frame about 12 cm tall. The GEM data are read out with analog pipeline front-end cards (APV-25) each of which can process 128 readout channels. Each GEM chamber has 250 channels for each coordinate axis, read out with two APVs on each side, resulting in 2000 readout channels for the GEM stack, processed by 16 APVs. One Multi Purpose Digitizer (MPD) module is used to read out all of the 16 APV-25 cards. The current run status of DarkLight experiment and the performance of GEMs in the experiment will be discussed. This work has been supported by NSF PHY-1436680 and PHY-1505934.
Baby MIND: A Magnetized Segmented Neutrino Detector for the WAGASCI Experiment
DOE Office of Scientific and Technical Information (OSTI.GOV)
Antonova, M.; et al.
T2K (Tokai-to-Kamioka) is a long-baseline neutrino experiment in Japan designed to study various parameters of neutrino oscillations. A near detector complex (ND280) is located 280 m downstream of the production target and measures neutrino beam parameters before any oscillations occur. ND280's measurements are used to predict the number and spectra of neutrinos in the Super-Kamiokande detector at the distance of 295 km. The difference in the target material between the far (water) and near (scintillator, hydrocarbon) detectors leads to the main non-cancelling systematic uncertainty for the oscillation analysis. In order to reduce this uncertainty a new WAter-Grid-And-SCintillator detector (WAGASCI) hasmore » been developed. A magnetized iron neutrino detector (Baby MIND) will be used to measure momentum and charge identification of the outgoing muons from charged current interactions. The Baby MIND modules are composed of magnetized iron plates and long plastic scintillator bars read out at the both ends with wavelength shifting fibers and silicon photomultipliers. The front-end electronics board has been developed to perform the readout and digitization of the signals from the scintillator bars. Detector elements were tested with cosmic rays and in the PS beam at CERN. The obtained results are presented in this paper.« less
Baby MIND: a magnetized segmented neutrino detector for the WAGASCI experiment
NASA Astrophysics Data System (ADS)
Antonova, M.; Asfandiyarov, R.; Bayes, R.; Benoit, P.; Blondel, A.; Bogomilov, M.; Bross, A.; Cadoux, F.; Cervera, A.; Chikuma, N.; Dudarev, A.; Ekelöf, T.; Favre, Y.; Fedotov, S.; Hallsjö, S.-P.; Izmaylov, A.; Karadzhov, Y.; Khabibullin, M.; Khotyantsev, A.; Kleymenova, A.; Koga, T.; Kostin, A.; Kudenko, Y.; Likhacheva, V.; Martinez, B.; Matev, R.; Medvedeva, M.; Mefodiev, A.; Minamino, A.; Mineev, O.; Nessi, M.; Nicola, L.; Noah, E.; Ovsiannikova, T.; Pais Da Silva, H.; Parsa, S.; Rayner, M.; Rolando, G.; Shaykhiev, A.; Simion, P.; Soler, F. J. P.; Suvorov, S.; Tsenov, R.; Ten Kate, H.; Vankova-Kirilova, G.; Yershov, N.
2017-07-01
T2K (Tokai-to-Kamioka) is a long-baseline neutrino experiment in Japan designed to study various parameters of neutrino oscillations. A near detector complex (ND280) is located 280 m downstream of the production target and measures neutrino beam parameters before any oscillations occur. ND280's measurements are used to predict the number and spectra of neutrinos in the Super-Kamiokande detector at the distance of 295 km. The difference in the target material between the far (water) and near (scintillator, hydrocarbon) detectors leads to the main non-cancelling systematic uncertainty for the oscillation analysis. In order to reduce this uncertainty a new WAter-Grid-And-SCintillator detector (WAGASCI) has been developed. A magnetized iron neutrino detector (Baby MIND) will be used to measure momentum and charge identification of the outgoing muons from charged current interactions. The Baby MIND modules are composed of magnetized iron plates and long plastic scintillator bars read out at the both ends with wavelength shifting fibers and silicon photomultipliers. The front-end electronics board has been developed to perform the readout and digitization of the signals from the scintillator bars. Detector elements were tested with cosmic rays and in the PS beam at CERN. The obtained results are presented in this paper.
Systems Librarian and Automation Review.
ERIC Educational Resources Information Center
Schuyler, Michael
1992-01-01
Discusses software sharing on computer networks and the need for proper bandwidth; and describes the technology behind FidoNet, a computer network made up of electronic bulletin boards. Network features highlighted include front-end mailers, Zone Mail Hour, Nodelist, NetMail, EchoMail, computer conferences, tosser and scanner programs, and host…
End-Users, Front Ends and Librarians.
ERIC Educational Resources Information Center
Bourne, Donna E.
1989-01-01
The increase in end-user searching, the advantages and limitations of front ends, and the role of the librarian in end-user searching are discussed. It is argued that librarians need to recognize that front ends can be of benefit to themselves and patrons, and to assume the role of advisors and educators for end-users. (37 references) (CLB)
Holographic Waveguide Array Rollable Display.
1997-04-01
scale lithography for fabrication. Projection systems offer large images, in the range of 40 - 60 inches diagonal, and both front-view and rear-view...Boulder, CO, and a l-D array of digital micromirrors ( DMD ) from Texas Instruments. The linear format permits simple driving electronics and high...TI’s DMD , or a CMOS-SLM. A collimated laser beaming (combine three colors) or a collimated white light beam from a high intensity halogen lamp can be
First results of the front-end ASIC for the strip detector of the PANDA MVD
NASA Astrophysics Data System (ADS)
Quagli, T.; Brinkmann, K.-T.; Calvo, D.; Di Pietro, V.; Lai, A.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Wheadon, R.; Zambanini, A.
2017-03-01
PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.
A miniature bidirectional telemetry system for in vivo gastric slow wave recordings.
Farajidavar, Aydin; O'Grady, Gregory; Rao, Smitha M N; Cheng, Leo K; Abell, Thomas; Chiao, J-C
2012-06-01
Stomach contractions are initiated and coordinated by an underlying electrical activity (slow waves), and electrical dysrhythmias accompany motility diseases. Electrical recordings taken directly from the stomach provide the most valuable data, but face technical constraints. Serosal or mucosal electrodes have cables that traverse the abdominal wall, or a natural orifice, causing discomfort and possible infection, and restricting mobility. These problems motivated the development of a wireless system. The bidirectional telemetric system constitutes a front-end transponder, a back-end receiver and a graphical userinter face. The front-end module conditions the analogue signals, then digitizes and loads the data into a radio for transmission. Data receipt at the backend is acknowledged via a transceiver function. The system was validated in a bench-top study, then validated in vivo using serosal electrodes connected simultaneously to a commercial wired system. The front-end module was 35 × 35 × 27 mm3 and weighed 20 g. Bench-top tests demonstrated reliable communication within a distance range of 30 m, power consumption of 13.5 mW, and 124 h operation when utilizing a 560 mAh, 3 V battery. In vivo,slow wave frequencies were recorded identically with the wireless and wired reference systems (2.4 cycles min−1), automated activation time detection was modestly better for the wireless system (5% versus 14% FP rate), and signal amplitudes were modestly higher via the wireless system (462 versus 3 86μV; p<0.001). This telemetric system for slow wave acquisition is reliable,power efficient, readily portable and potentially implantable. The device will enable chronic monitoring and evaluation of slow wave patterns in animals and patients.0967-3334/
Kozak, M; Karaman, M
2001-07-01
Digital beamforming based on oversampled delta-sigma (delta sigma) analog-to-digital (A/D) conversion can reduce the overall cost, size, and power consumption of phased array front-end processing. The signal resampling involved in dynamic delta sigma beamforming, however, disrupts synchronization between the modulators and demodulator, causing significant degradation in the signal-to-noise ratio. As a solution to this, we have explored a new digital beamforming approach based on non-uniform oversampling delta sigma A/D conversion. Using this approach, the echo signals received by the transducer array are sampled at time instants determined by the beamforming timing and then digitized by single-bit delta sigma A/D conversion prior to the coherent beam summation. The timing information involves a non-uniform sampling scheme employing different clocks at each array channel. The delta sigma coded beamsums obtained by adding the delayed 1-bit coded RF echo signals are then processed through a decimation filter to produce final beamforming outputs. The performance and validity of the proposed beamforming approach are assessed by means of emulations using experimental raw RF data.
Upset susceptibility study employing circuit analysis and digital simulation
NASA Technical Reports Server (NTRS)
Carreno, V. A.
1984-01-01
This paper describes an approach to predicting the susceptibility of digital systems to signal disturbances. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, Electromagnetic Interference (EMI) and Electromagnetic Pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload will bring the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The Super-Sceptre (system for circuit evaluation of transient radiation effects) Program was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.
NASA Astrophysics Data System (ADS)
Magazzù, G.; Borgese, G.; Costantino, N.; Fanucci, L.; Incandela, J.; Saponara, S.
2013-02-01
In many research fields as high energy physics (HEP), astrophysics, nuclear medicine or space engineering with harsh operating conditions, the use of fast and flexible digital communication protocols is becoming more and more important. The possibility to have a smart and tested top-down design flow for the design of a new protocol for control/readout of front-end electronics is very useful. To this aim, and to reduce development time, costs and risks, this paper describes an innovative design/verification flow applied as example case study to a new communication protocol called FF-LYNX. After the description of the main FF-LYNX features, the paper presents: the definition of a parametric SystemC-based Integrated Simulation Environment (ISE) for high-level protocol definition and validation; the set up of figure of merits to drive the design space exploration; the use of ISE for early analysis of the achievable performances when adopting the new communication protocol and its interfaces for a new (or upgraded) physics experiment; the design of VHDL IP cores for the TX and RX protocol interfaces; their implementation on a FPGA-based emulator for functional verification and finally the modification of the FPGA-based emulator for testing the ASIC chipset which implements the rad-tolerant protocol interfaces. For every step, significant results will be shown to underline the usefulness of this design and verification approach that can be applied to any new digital protocol development for smart detectors in physics experiments.
A Binary Offset Effect in CCD Readout and Its Impact on Astronomical Data
NASA Astrophysics Data System (ADS)
Boone, K.; Aldering, G.; Copin, Y.; Dixon, S.; Domagalski, R. S.; Gangler, E.; Pecontal, E.; Perlmutter, S.
2018-06-01
We have discovered an anomalous behavior of CCD readout electronics that affects their use in many astronomical applications. An offset in the digitization of the CCD output voltage that depends on the binary encoding of one pixel is added to pixels that are read out one, two, and/or three pixels later. One result of this effect is the introduction of a differential offset in the background when comparing regions with and without flux from science targets. Conventional data reduction methods do not correct for this offset. We find this effect in 16 of 22 instruments investigated, covering a variety of telescopes and many different front-end electronics systems. The affected instruments include LRIS and DEIMOS on the Keck telescopes, WFC3 UVIS and STIS on HST, MegaCam on CFHT, SNIFS on the UH88 telescope, GMOS on the Gemini telescopes, HSC on Subaru, and FORS on VLT. The amplitude of the introduced offset is up to 4.5 ADU per pixel, and it is not directly proportional to the measured ADU level. We have developed a model that can be used to detect this “binary offset effect” in data, and correct for it. Understanding how data are affected and applying a correction for the effect is essential for precise astronomical measurements.
Development of a portable Linux-based ECG measurement and monitoring system.
Tan, Tan-Hsu; Chang, Ching-Su; Huang, Yung-Fa; Chen, Yung-Fu; Lee, Cheng
2011-08-01
This work presents a portable Linux-based electrocardiogram (ECG) signals measurement and monitoring system. The proposed system consists of an ECG front end and an embedded Linux platform (ELP). The ECG front end digitizes 12-lead ECG signals acquired from electrodes and then delivers them to the ELP via a universal serial bus (USB) interface for storage, signal processing, and graphic display. The proposed system can be installed anywhere (e.g., offices, homes, healthcare centers and ambulances) to allow people to self-monitor their health conditions at any time. The proposed system also enables remote diagnosis via Internet. Additionally, the system has a 7-in. interactive TFT-LCD touch screen that enables users to execute various functions, such as scaling a single-lead or multiple-lead ECG waveforms. The effectiveness of the proposed system was verified by using a commercial 12-lead ECG signal simulator and in vivo experiments. In addition to its portability, the proposed system is license-free as Linux, an open-source code, is utilized during software development. The cost-effectiveness of the system significantly enhances its practical application for personal healthcare.
Design of portable electrocardiogram device using DSO138
NASA Astrophysics Data System (ADS)
Abuzairi, Tomy; Matondang, Josef Stevanus; Purnamaningsih, Retno Wigajatri; Basari, Ratnasari, Anita
2018-02-01
Cardiovascular disease has been one of the leading causes of sudden cardiac deaths in many countries, covering Indonesia. Electrocardiogram (ECG) is a medical test to detect cardiac abnormalities by measuring the electrical activity generated by the heart, as the heart contracts. By using ECG, we can observe anomaly at the time of heart abnormalities. In this paper, design of portable ECG device is presented. The portable ECG device was designed to easily use in the village clinic or houses, due to the small size device and other benefits. The device was designed by using four units: (1) ECG electrode; (2) ECG analog front-end; (3) DSO138; and (4) battery. To create a simple electrode system in the portable ECG, 1-lead ECG with two electrodes were applied. The analog front-end circuitry consists of three integrated circuits, an instrumentation amplifier AD820AN, a low noise operational amplifier OPA134, and a low offset operational amplifier TL082. Digital ECG data were transformed to graphical data on DSO138. The results show that the portable ECG is successfully read the signal from 1-lead ECG system.
JFET front-end circuits integrated in a detector-grade silicon substrate
NASA Astrophysics Data System (ADS)
Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.; Dalla Betta, G. F.; Boscardin, M.; Batignani, G.; Giorgi, M.; Bosisio, L.
2003-08-01
This paper presents the design and experimental results relevant to front-end circuits integrated on detector-grade high resistivity silicon. The fabrication technology is made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy and allows using a common substrate for different kinds of active devices, such as N-channel JFETs and MOSFETs, and for pixel, microstrip, and PIN detectors. This research activity is being carried out in the framework of a project aiming at the fabrication of a multichannel mixed analog-digital chip for the readout of solid-state detectors integrated in the same substrate. Possible applications are in the field of medical and industrial imaging and space and high energy physics experiments. An all-JFET charge sensitive amplifier, which can use either a resistive or a nonresistive feedback network, has been characterized. The two configurations have been compared to each other, paying particular attention to noise performances, in view of the design of the complete readout channel. Operation capability in harsh radiation environment has been evaluated through exposure to /spl gamma/-rays from a /sup 60/Co source.
NASA Astrophysics Data System (ADS)
Ito, Keita; Uno, Shoma; Goto, Tatsuya; Takezawa, Yoshiki; Harashima, Takuya; Morikawa, Takumi; Nishino, Satoru; Kino, Hisashi; Kiyoyama, Koji; Tanaka, Tetsu
2017-04-01
For safe electrical stimulation with body-implanted devices, the degradation of stimulus electrodes must be considered because it causes the unexpected electrolysis of water and the destruction of tissues. To monitor the charge injection property (CIP) of stimulus electrodes while these devices are implanted, we have proposed a charge injection monitoring system (CIMS). CIMS can safely read out voltages produced by a biphasic current pulse to a stimulus electrode and CIP is calculated from waveforms of the acquired voltages. In this paper, we describe a wide-range and low-power analog front-end (AFE) for CIMS that has variable gain-frequency characteristics and low-power analog-to-digital (A/D) conversion to adjust to the degradation of stimulus electrodes. The designed AFE was fabricated with 0.18 µm CMOS technology and achieved a valuable gain of 20-60 dB, an upper cutoff frequency of 0.2-10 kHz, and low-power interleaving A/D conversion. In addition, we successfully measured the CIP of stimulus electrodes for body-implanted devices using CIMS.
Guermandi, Marco; Bigucci, Alessandro; Franchi Scarselli, Eleonora; Guerrieri, Roberto
2015-01-01
We present a system for the acquisition of EEG signals based on active electrodes and implementing a Driving Right Leg circuit (DgRL). DgRL allows for single-ended amplification and analog-to-digital conversion, still guaranteeing a common mode rejection in excess of 110 dB. This allows the system to acquire high-quality EEG signals essentially removing network interference for both wet and dry-contact electrodes. The front-end amplification stage is integrated on the electrode, minimizing the system's sensitivity to electrode contact quality, cable movement and common mode interference. The A/D conversion stage can be either integrated in the remote back-end or placed on the head as well, allowing for an all-digital communication to the back-end. Noise integrated in the band from 0.5 to 100 Hz is comprised between 0.62 and 1.3 μV, depending on the configuration. Current consumption for the amplification and A/D conversion of one channel is 390 μA. Thanks to its low noise, the high level of interference suppression and its quick setup capabilities, the system is particularly suitable for use outside clinical environments, such as in home care, brain-computer interfaces or consumer-oriented applications.
The Air Force Geophysics Laboratory Standalone Data Acquisition System: A Functional Description.
1980-10-09
the board are a buffer for the RUN/HALT front panel switch and a retriggerable oneshot multivibrator. This latter circuit senses the SRUN pulse train...recording on the data tapes, and providing the master timing source for data acquisition. An Electronic Research Company (ERC) model 2446 digital...the computer is fed to a retriggerable oneshot multivibrator on the board. (SRUN consists of a pulse train that is present when the computer is running
A compact, low-loss, tunable phase shifter on defect mitigated dielectrics up to 40 GHz
NASA Astrophysics Data System (ADS)
Orloff, Nathan; Long, Christian; Lu, Xifeng; Nair, Hari; Dawley, Natalie; Schlom, Darrell; Booth, James
With the emergence of the internet-of-things and increased connectivity of modern commerce, consumers have driven demand for wireless spectrum beyond current capacity and infrastructure capabilities. One way the telecommunications industry is addressing this problem is by pushing front-end electronics to higher frequencies, introducing carrier aggregation schemes, and developing spectrum-sharing techniques. Some of these solutions require frequency agile components that are vastly different from what is in today's marketplace. Perhaps the most basic and ubiquitous component in front-end electronics is the phase shifter. Phase shifters are particularly important for compact beam-forming antennas that may soon appear in commercial technology. Here, we demonstrate a compact, tunable phase shifter with very low insertion loss up to 40 GHz on a defect mitigated tunable dielectric. We demonstrate performance compared to barium-doped strontium titanate phase shifters. Such phase shifters could potentially meet the stringent size and performance characteristics demanded by telecommunications industry, readily facilitating massive multiple-input multiple-output antennas in the next-generation of mobile handsets.
Gauss-Seidel Iterative Method as a Real-Time Pile-Up Solver of Scintillation Pulses
NASA Astrophysics Data System (ADS)
Novak, Roman; Vencelj, Matja¿
2009-12-01
The pile-up rejection in nuclear spectroscopy has been confronted recently by several pile-up correction schemes that compensate for distortions of the signal and subsequent energy spectra artifacts as the counting rate increases. We study here a real-time capability of the event-by-event correction method, which at the core translates to solving many sets of linear equations. Tight time limits and constrained front-end electronics resources make well-known direct solvers inappropriate. We propose a novel approach based on the Gauss-Seidel iterative method, which turns out to be a stable and cost-efficient solution to improve spectroscopic resolution in the front-end electronics. We show the method convergence properties for a class of matrices that emerge in calorimetric processing of scintillation detector signals and demonstrate the ability of the method to support the relevant resolutions. The sole iteration-based error component can be brought below the sliding window induced errors in a reasonable number of iteration steps, thus allowing real-time operation. An area-efficient hardware implementation is proposed that fully utilizes the method's inherent parallelism.
Front End Software for Online Database Searching. Part 2: The Marketplace.
ERIC Educational Resources Information Center
Levy, Louise R.; Hawkins, Donald T.
1986-01-01
This article analyzes the front end software marketplace and discusses some of the complex forces influencing it. Discussion covers intermediary market; end users (library customers, scientific and technical professionals, corporate business specialists, consumers); marketing strategies; a British front end development firm; competitive pressures;…
A parallel unbalanced digitization architecture to reduce the dynamic range of multiple signals
NASA Astrophysics Data System (ADS)
Vallérian, Mathieu; HuÅ£u, Florin; Villemaud, Guillaume; Miscopein, Benoît; Risset, Tanguy
2016-05-01
Technologies employed in urban sensor networks are permanently evolving, and thus the gateways employed to collect data in such kind of networks have to be very flexible in order to be compliant with the new communication standards. A convenient way to do that is to digitize all the received signals in one shot and then to digitally perform the signal processing, as it is done in software-defined radio (SDR). All signals can be emitted with very different features (bandwidth, modulation type, and power level) in order to respond to the various propagation conditions. Their difference in terms of power levels is a problem when digitizing them together, as no current commercial analog-to-digital converter (ADC) can provide a fine enough resolution to digitize this high dynamic range between the weakest possible signal in the presence of a stronger signal. This paper presents an RF front end receiver architecture capable of handling this problem by using two ADCs of lower resolutions. The architecture is validated through a set of simulations using Keysight's ADS software. The main validation criterion is the bit error rate comparison with a classical receiver.
EARS: Electronic Access to Reference Service.
Weise, F O; Borgendale, M
1986-01-01
Electronic Access to Reference Service (EARS) is a front end to the Health Sciences Library's electronic mail system, with links to the online public catalog. EARS, which became operational in September 1984, is accessed by users at remote sites with either a terminal or microcomputer. It is menu-driven, allowing users to request: a computerized literature search, reference information, a photocopy of a journal article, or a book. This paper traces the history of EARS and discusses its use, its impact on library staff and services, and factors that influence the diffusion of new technology. PMID:3779167
EARS: Electronic Access to Reference Service.
Weise, F O; Borgendale, M
1986-10-01
Electronic Access to Reference Service (EARS) is a front end to the Health Sciences Library's electronic mail system, with links to the online public catalog. EARS, which became operational in September 1984, is accessed by users at remote sites with either a terminal or microcomputer. It is menu-driven, allowing users to request: a computerized literature search, reference information, a photocopy of a journal article, or a book. This paper traces the history of EARS and discusses its use, its impact on library staff and services, and factors that influence the diffusion of new technology.
NASA Astrophysics Data System (ADS)
Park, Sungkyung; Park, Chester Sungchung
2018-03-01
A composite radio receiver back-end and digital front-end, made up of a delta-sigma analogue-to-digital converter (ADC) with a high-speed low-noise sampling clock generator, and a fractional sample rate converter (FSRC), is proposed and designed for a multi-mode reconfigurable radio. The proposed radio receiver architecture contributes to saving the chip area and thus lowering the design cost. To enable inter-radio access technology handover and ultimately software-defined radio reception, a reconfigurable radio receiver consisting of a multi-rate ADC with its sampling clock derived from a local oscillator, followed by a rate-adjustable FSRC for decimation, is designed. Clock phase noise and timing jitter are examined to support the effectiveness of the proposed radio receiver. A FSRC is modelled and simulated with a cubic polynomial interpolator based on Lagrange method, and its spectral-domain view is examined in order to verify its effect on aliasing, nonlinearity and signal-to-noise ratio, giving insight into the design of the decimation chain. The sampling clock path and the radio receiver back-end data path are designed in a 90-nm CMOS process technology with 1.2V supply.
Leccardi, Matteo; Decarli, Massimiliano; Lorenzelli, Leandro; Milani, Paolo; Mettala, Petteri; Orava, Risto; Barborini, Emanuele
2012-01-01
We have fabricated and tested in long-term field operating conditions a wireless unit for outdoor air quality monitoring. The unit is equipped with two multiparametric sensors, one miniaturized thermo-hygrometer, front-end analogical and digital electronics, and an IEEE 802.15.4 based module for wireless data transmission. Micromachined platforms were functionalized with nanoporous metal-oxides to obtain multiparametric sensors, hosting gas-sensitive, anemometric and temperature transducers. Nanoporous metal-oxide layer was directly deposited on gas sensing regions of micromachined platform batches by hard-mask patterned supersonic cluster beam deposition. An outdoor, roadside experiment was arranged in downtown Milan (Italy), where one wireless sensing unit was continuously operated side by side with standard gas chromatographic instrumentation for air quality measurements. By means of a router PC, data from sensing unit and other instrumentation were collected, merged, and sent to a remote data storage server, through an UMTS device. The whole-system robustness as well as sensor dataset characteristics were continuously characterized over a run-time period of 18 months. PMID:22969394
NASA Astrophysics Data System (ADS)
Ammendola, R.; Biagioni, A.; Frezza, O.; Lo Cicero, F.; Martinelli, M.; Paolucci, P. S.; Pontisso, L.; Simula, F.; Vicini, P.; Ameli, F.; Nicolau, C. A.; Pastorelli, E.; Simeone, F.; Tosoratto, L.; Lonardo, A.
2016-04-01
The KM3NeT-Italia underwater neutrino detection unit, the tower, consists of 14 floors. Each floor supports 6 Optical Modules containing front-end electronics needed to digitize the PMT signal, format and transmit the data and 2 hydrophones that reconstruct in real-time the position of Optical Modules, for a maximum tower throughput of more than 600 MB/s. All floor data are collected by the Floor Control Module (FCM) board and transmitted by optical bidirectional virtual point-to-point connections to the on-shore laboratory, each FCM needing an on-shore counterpart as communication endpoint. In this contribution we present NaNet3, an on-shore readout board based on Altera Stratix V GX FPGA able to manage multiple FCM data channels with a capability of 800 Mbps each. The design is a NaNet customization for the KM3NeT-Italia experiment, adding support in its I/O interface for a synchronous link protocol with deterministic latency at physical level and for a Time Division Multiplexing protocol at data level.
The data acquisition system of the Latin American Giant Observatory (LAGO)
NASA Astrophysics Data System (ADS)
Sofo Haro, M.; Arnaldi, L. H.; Alvarez, W.; Alvarez, C.; Araujo, C.; Areso, O.; Arnaldi, H.; Asorey, H.; Audelo, M.; Barros, H.; Bertou, X.; Bonnett, M.; Calderon, R.; Calderon, M.; Campos-Fauth, A.; Carramiñana, A.; Carrasco, E.; Carrera, E.; Cazar, D.; Cifuentes, E.; Cogollo, D.; Conde, R.; Cotzomi, J.; Dasso, S.; De Castro, A.; De La Torre, J.; De León, R.; Estupiñan, A.; Galindo, A.; Garcia, L.; Gómez Berisso, M.; González, M.; Guevara, W.; Gulisano, A. M.; Hernández, H.; Jaimes, A.; López, J.; Mantilla, C.; Martín, R.; Martinez-Mendez, A.; Martínez, O.; Martins, E.; Masías-Meza, J. J.; Mayo-García, R.; Melo, T.; Mendoza, J.; Miranda, P.; Montes, E.; Morales, E.; Morales, I.; Moreno, E.; Murrugarra, C.; Nina, C.; Núñez, L. A.; Núñez-Castiñeyra, A.; Otiniano, L.; Peña-Rodríguez, J.; Perenguez, J.; Pérez, H.; Perez, Y.; Perez, G.; Pinilla-Velandia, S.; Ponce, E.; Quishpe, R.; Quispe, F.; Reyes, K.; Rivera, H.; Rodriguez, J.; Rodríguez-Pascual, M.; Romero, M.; Rubio-Montero, A. J.; Salazar, H.; Salinas, J.; Sarmiento-Cano, C.; Sidelnik, I.; Haro, M. Sofo; Suárez-Durán, M.; Subieta, M.; Tello, J.; Ticona, R.; Torres, I.; Torres-Niño, L.; Truyenque, J.; Valencia-Otero, M.; Vargas, S.; Vásquez, N.; Villasenor, L.; Zamalloa, M.; Zavala, L.
2016-06-01
LAGO is an extended cosmic ray observatory composed of water-Cherenkov detectors (WCD) placed throughout Latin America. It is dedicated to the study of various issues related to astrophysics, space weather and atmospheric physics at the regional scale. In this paper we present the design and implementation of the front-end electronics and the data acquisition system for readout of the WCDs of LAGO. The system consists of preamplifiers and a digital board sending data to a computer via an USB interface. The analog signals are acquired from three independent channels at a maximum rate of ~1.2×105 pulses per second and a sampling rate of 40 MHz. To avoid false trigger due to baseline fluctuations, we present in this work a baseline correction algorithm that makes it possible to use WCDs to study variations of the environmental radiation. A data logging software has been designed to format the received data. It also enables an easy access to the data for an off-line analysis, together with the operational conditions and environmental information. The system is currently used at different sites of LAGO.
Internal monitoring of GBTx emulator using IPbus for CBM experiment
NASA Astrophysics Data System (ADS)
Mandal, Swagata; Zabolotny, Wojciech; Sau, Suman; Chkrabarti, Amlan; Saini, Jogender; Chattopadhyay, Subhasis; Pal, Sushanta Kumar
2015-09-01
The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at GSI. In CBM experiment a precisely time synchronized fault tolerant self-triggered electronics is required for Data Acquisition (DAQ) system in CBM experiments which can support high data rate (up to several TB/s). As a part of the implementation of the DAQ system of Muon Chamber (MUCH) which is one of the important detectors in CBM experiment, a FPGA based Gigabit Transceiver (GBTx) emulator is implemented. Readout chain for MUCH consists of XYTER chips (Front end electronics) which will be directly connected to detector, GBTx emulator, Data Processing Board (DPB) and First level event selector board (FLIB) with backend software interface. GBTx emulator will be connected with the XYTER emulator through LVDS (Low Voltage Differential Signalling) line in the front end and in the back end it is connected with DPB through 4.8 Gbps optical link. IPBus over Ethernet is used for internal monitoring of the registers within the GBTx. In IPbus implementation User Datagram Protocol (UDP) stack is used in transport layer of OSI model so that GBTx can be controlled remotely. A Python script is used at computer side to drive IPbus controller.
Observational evidence for thermal wave fronts in solar flares
NASA Technical Reports Server (NTRS)
Rust, D. M.; Simnett, G. M.; Smith, D. F.
1985-01-01
Images in 3.5-30 keV X-rays obtained during the first few minutes of seven solar flares show rapid motions. In each case X-ray emission first appeared at one end of a magnetic field structure, and then propagated along the field at a velocity between 800 and 1700 km/s. The observed X-ray structures were 45,000-230,000 km long. Simultaneous H-alpha images were available in three cases; they showed brightenings when the fast-moving fronts arrived at the chromosphere. The fast-moving fronts are interpreted as electron thermal conduction fronts since their velocities are consistent with conduction at the observed temperatures of 1-3 x 10 to the 7th K. The inferred conductive heat flux of up to 10-billion ergs/s sq cm accounts for most of the energy released in the flares, implying that the flares were primarily thermal phenomena.
NASA Astrophysics Data System (ADS)
Konana, Prabhudev; Gupta, Alok; Whinston, Andrew B.
1997-01-01
A pure 'technological' solution to network quality problems is incomplete since any benefits from new technologies are offset by the demand from exponentially growing electronic commerce ad data-intensive applications. SInce an economic paradigm is implicit in electronic commerce, we propose a 'market-system' approach to improve quality of service. Quality of service for digital products takes on a different meaning since users view quality of service differently and value information differently. We propose a framework for electronic commerce that is based on an economic paradigm and mass-customization, and works as a wide-area distributed management system. In our framework, surrogate-servers act as intermediaries between information provides and end- users, and arrange for consistent and predictable information delivery through 'digital contracts.' These contracts are negotiated and priced based on economic principles. Surrogate servers pre-fetched, through replication, information from many different servers and consolidate based on demand expectations. In order to recognize users' requirements and process requests accordingly, real-time databases are central to our framework. We also propose that multimedia information be separated into slowly changing and rapidly changing data streams to improve response time requirements. Surrogate- servers perform the tasks of integration of these data streams that is transparent to end-users.
A Fully Implantable, NFC Enabled, Continuous Interstitial Glucose Monitor
Anabtawi, Nijad; Freeman, Sabrina; Ferzli, Rony
2017-01-01
This work presents an integrated system-on-chip (SoC) that forms the core of a long-term, fully implantable, battery assisted, passive continuous glucose monitor. It integrates an amperometric glucose sensor interface, a near field communication (NFC) wireless front-end and a fully digital switched mode power management unit for supply regulation and on board battery charging. It uses 13.56 MHz (ISM) band to harvest energy and backscatter data to an NFC reader. System was implemented in 14nm CMOS technology and validated with post layout simulations. PMID:28702512
A Fully Implantable, NFC Enabled, Continuous Interstitial Glucose Monitor.
Anabtawi, Nijad; Freeman, Sabrina; Ferzli, Rony
2016-02-01
This work presents an integrated system-on-chip (SoC) that forms the core of a long-term, fully implantable, battery assisted, passive continuous glucose monitor. It integrates an amperometric glucose sensor interface, a near field communication (NFC) wireless front-end and a fully digital switched mode power management unit for supply regulation and on board battery charging. It uses 13.56 MHz (ISM) band to harvest energy and backscatter data to an NFC reader. System was implemented in 14nm CMOS technology and validated with post layout simulations.
Are anesthesia start and end times randomly distributed? The influence of electronic records.
Deal, Litisha G; Nyland, Michael E; Gravenstein, Nikolaus; Tighe, Patrick
2014-06-01
To perform a frequency analysis of start minute digits (SMD) and end minute digits (EMD) taken from the electronic, computer-assisted, and manual anesthesia billing-record systems. Retrospective cross-sectional review. University medical center. This cross-sectional review was conducted on billing records from a single healthcare institution over a 15-month period. A total of 30,738 cases were analyzed. For each record, the start time and end time were recorded. Distributions of SMD and EMD were tested against the null hypothesis of a frequency distribution equivalently spread between zero and nine. SMD and EMD aggregate distributions each differed from equivalency (P < 0.0001). When stratified by type of anesthetic record, no differences were found between the recorded and expected equivalent distribution patterns for electronic anesthesia records for start minute (P < 0.98) or end minute (P < 0.55). Manual and computer-assisted records maintained nonequivalent distribution patterns for SMD and EMD (P < 0.0001 for each comparison). Comparison of cumulative distributions between SMD and EMD distributions suggested a significant difference between the two patterns (P < 0.0001). An electronic anesthesia record system, with automated time capture of events verified by the user, produces a more unified distribution of billing times than do more traditional methods of entering billing times. Copyright © 2014 Elsevier Inc. All rights reserved.
Two-Stage Variable Sample-Rate Conversion System
NASA Technical Reports Server (NTRS)
Tkacenko, Andre
2009-01-01
A two-stage variable sample-rate conversion (SRC) system has been pro posed as part of a digital signal-processing system in a digital com munication radio receiver that utilizes a variety of data rates. The proposed system would be used as an interface between (1) an analog- todigital converter used in the front end of the receiver to sample an intermediatefrequency signal at a fixed input rate and (2) digita lly implemented tracking loops in subsequent stages that operate at v arious sample rates that are generally lower than the input sample r ate. This Two-Stage System would be capable of converting from an input sample rate to a desired lower output sample rate that could be var iable and not necessarily a rational fraction of the input rate.
NASA Astrophysics Data System (ADS)
Marchisone, Massimiliano
2017-09-01
ALICE is the LHC experiment dedicated to the study of heavy-ion collisions. At forward rapidity a muon spectrometer detects muons from low mass mesons, quarkonia (c\\bar{c} and b\\bar{b} mesons), open heavy-flavor hadrons (D and B mesons) as well as from weak bosons. A muon selection based on transverse momentum is made by a trigger system composed of 72 Resistive Plate Chambers (RPCs). For the LHC Run 1 and the ongoing Run 2 the RPCs have been equipped with a non-amplified Front-End Electronics (FEE) called ADULT. However, in view of an increase in luminosity expected for Run 3 (foreseen to start in 2021) the possibility to use an amplified FEE has been explored in order to improve the counting rate limitation and to prevent the aging of the detector by reducing the charge per hit. A prototype of this new electronics (FEERIC) has been developed and tested first with cosmic rays before equipping one RPC in the ALICE cavern with it. In this proceeding the most important performance indicators (such as efficiency, dark current, dark rate, cluster size, total charge and charge per hit) of the RPC equipped with this new FEE will be reviewed and compared to the others read out with ADULT.
Charge-sensitive front-end electronics with operational amplifiers for CdZnTe detectors
NASA Astrophysics Data System (ADS)
Födisch, P.; Berthel, M.; Lange, B.; Kirschke, T.; Enghardt, W.; Kaever, P.
2016-09-01
Cadmium zinc telluride (CdZnTe, CZT) radiation detectors are suitable for a variety of applications, due to their high spatial resolution and spectroscopic energy performance at room temperature. However, state-of-the-art detector systems require high-performance readout electronics. Though an application-specific integrated circuit (ASIC) is an adequate solution for the readout, requirements of high dynamic range and high throughput are not available in any commercial circuit. Consequently, the present study develops the analog front-end electronics with operational amplifiers for an 8×8 pixelated CZT detector. For this purpose, we modeled an electrical equivalent circuit of the CZT detector with the associated charge-sensitive amplifier (CSA). Based on a detailed network analysis, the circuit design is completed by numerical values for various features such as ballistic deficit, charge-to-voltage gain, rise time, and noise level. A verification of the performance is carried out by synthetic detector signals and a pixel detector. The experimental results with the pixel detector assembly and a 22Na radioactive source emphasize the depth dependence of the measured energy. After pulse processing with depth correction based on the fit of the weighting potential, the energy resolution is 2.2% (FWHM) for the 511 keV photopeak.
Sonorous images through digital holographic images
NASA Astrophysics Data System (ADS)
Azevedo, Isabel; Sandford-Richardson, Elizabeth
2017-03-01
The art of the last fifty years has significantly surrounded the presence of the body, the relationship between human and interactive technologies. Today in interactive art, there are not only representations that speak of the body but actions and behaviours that involve the body. In holography, the image appears and disappears from the observer's vision field; because the holographic image is light, we can see multidimensional spaces, shapes and colours existing on the same time, presence and absence of the image on the holographic plate. And the image can be flowing in front of the plate that sometimes people try touching it with his hands. That means, to the viewer will be interactive events, with no beginning or end that can be perceived in any direction, forward or backward, depending on the relative position and the time the viewer spends in front of the hologram. To explore that feature we are proposing an installation with four holograms, and several sources of different kind of sounds connected with each hologram. When viewers will move in front of each hologram they will activate different sources of sound. The search is not only about the images in the holograms, but also the looking for different types of sounds that this demand will require. The digital holograms were produced using the HoloCam Portable Light System with the 35 mm camera Canon 700D to capture image information, it was then edited on computer using the Motion 5 and Final Cut Pro X programs.
Characteristics of a multichannel low-noise front-end ASIC for CZT-based small animal PET imaging
NASA Astrophysics Data System (ADS)
Gao, W.; Liu, H.; Gan, B.; Hu, Y.
2014-05-01
In this paper, we present the design and characteristics of a novel low-noise front-end readout application-specific integrated circuit dedicated to CdZnTe (CZT) detectors for a small animal PET imaging system. A low-noise readout method based on the charge integration and the delayed peak detection is proposed. An eight-channel front-end readout prototype chip is designed and implemented in a 0.35 μm CMOS process. The die size is 2.3 mm ×2.3 mm. The prototype chip is tested in different methods including electronic test, energy spectrum test and irradiation test. The input range of the ASIC is from 2000e- to 180,000e-, reflecting the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC at the shaping time of 1 μs. The best test result of the equivalent noise charge (ENC) is 58.9 e- at zero farad plus 5.4 e- per picofarad. The nonlinearity and the crosstalk are less than 3% and less than 2%, respectively, at the room temperature. The static power dissipation is about 3 mW/channel.
ERIC Educational Resources Information Center
Academic Library Association of Ohio.
Abstracts of 14 papers presented at the conference are provided here. Titles are: "Electronic Information Terraforming: Designing and Implementing a Front-end System Using World-Wide Web Technology" (Abbie Basile; And Others); "Characteristics of Generation X and Implications for Reference and Instructional Services" (Catherine…
Consumer protection act for digital products
NASA Astrophysics Data System (ADS)
Hampel, Viktor E.
1996-03-01
This report proposes a `Consumer Protection Act for Digital Products' to support electronic commerce and to control the increasing abuse and lack of security on the national information highways. Patterned after the `Food and Drug Act of 1906 (21 USC)' and subsequent legislation, a new agency similar to that of the FDA would have the authority `to develop administrative policy with regard to the safety, effectiveness, and labeling of digital products and their communications for human use, and to review and evaluate new applications of such products.' Specifically, it is proposed that standards, originally developed by the defense industry for the labeling, enveloping, and authentication of digital products delivered to the Government, be extended to promote global electronic commerce by protecting the intellectual property rights of producers, establishing their liability for the end-use of digital products, and give consumers means for informed decision making and purchase.
Digital health for the End TB Strategy: developing priority products and making them work
Timimi, Hazim; Kurosinski, Pascal; Migliori, Giovanni Battista; Van Gemert, Wayne; Denkinger, Claudia; Isaacs, Chris; Story, Alistair; Garfein, Richard S.; do Valle Bastos, Luis Gustavo; Yassin, Mohammed A.; Rusovich, Valiantsin; Skrahina, Alena; Van Hoi, Le; Broger, Tobias; Abubakar, Ibrahim; Hayward, Andrew; Thomas, Bruce V.; Temesgen, Zelalem; Quraishi, Subhi; von Delft, Dalene; Jaramillo, Ernesto; Weyer, Karin; Raviglione, Mario C.
2016-01-01
In 2014, the World Health Organization (WHO) developed the End TB Strategy in response to a World Health Assembly Resolution requesting Member States to end the worldwide epidemic of tuberculosis (TB) by 2035. For the strategy's objectives to be realised, the next 20 years will need novel solutions to address the challenges posed by TB to health professionals, and to affected people and communities. Information and communication technology presents opportunities for innovative approaches to support TB efforts in patient care, surveillance, programme management and electronic learning. The effective application of digital health products at a large scale and their continued development need the engagement of TB patients and their caregivers, innovators, funders, policy-makers, advocacy groups, and affected communities. In April 2015, WHO established its Global Task Force on Digital Health for TB to advocate and support the development of digital health innovations in global efforts to improve TB care and prevention. We outline the group's approach to stewarding this process in alignment with the three pillars of the End TB Strategy. The supplementary material of this article includes target product profiles, as developed by early 2016, defining nine priority digital health concepts and products that are strategically positioned to enhance TB action at the country level. PMID:27230443
The MiniPET: a didactic PET system
NASA Astrophysics Data System (ADS)
Pedro, R.; Silva, J.; Gurriana, L.; Silva, J. M.; Maio, A.; Soares Augusto, J.
2013-03-01
The MiniPET project aims to design and build a small PET system. It consists of two 4 × 4 matrices of 16 LYSO scintillator crystals and two PMTs with 16 channels resulting in a low cost system with the essential functionality of a clinical PET instrument. It is designed to illustrate the physics of the PET technique and to provide a didactic platform for the training of students and nuclear imaging professionals as well as for scientific outreach. The PET modules can be configured to test for the coincidence of 511 keV gamma rays. The model has a flexible mechanical setup [1] and can simulate 14 diferent ring geometries, from a configuration with as few as 18 detectors per ring (ring radius phi=51 mm), up to a geometry with 70 detectors per ring (phi=200 mm). A second version of the electronic system [2] allowed measurement and recording of the energy deposited in 4 detector channels by photons from a 137Cs radioactive source and by photons resulting of the annihilation of positrons from a 22Na radioactive source. These energy spectra are used for detector performance studies, as well as angular dependency studies. In this paper, the mechanical setup, the front-end high-speed analog electronics, the digital acquisition and control electronics implemented in a FPGA, as well as the data-transfer interface between the FPGA board and a host PC are described. Recent preliminary results obtained with the 4 active channels in the prototype are also presented.
Direct-phase and amplitude digitalization based on free-space interferometry
NASA Astrophysics Data System (ADS)
Kleiner, Vladimir; Rudnitsky, Arkady; Zalevsky, Zeev
2017-12-01
A novel ADC configuration that can be characterized as a photonic-domain flash analog-to-digital convertor operating based upon free-space interferometry is proposed and analysed. The structure can be used as the front-end of a coherent receiver as well as for other applications. Two configurations are considered: the first, ‘direct free-space interference’, allows simultaneous measuring of the optical phase and amplitude; the second, ‘extraction of the ac component of interference by means of pixel-by-pixel balanced photodetection’, allows only phase digitization but with significantly higher sensitivity. For both proposed configurations, we present Monte Carlo estimations of the performance limitations, due to optical noise and photo-current noise, at sampling rates of 60 giga-samples per second. In terms of bit resolution, we simulated multiple cases with growing complexity of up to 4 bits for the amplitude and up to 6 bits for the phase. The simulations show that the digitization errors in the optical domain can be reduced to levels close to the quantization noise limits. Preliminary experimental results validate the fundamentals of the proposed idea.
NASA Astrophysics Data System (ADS)
Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.
2018-01-01
The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.
Development of digital sideband separating down-conversion for Yuan-Tseh Lee Array
NASA Astrophysics Data System (ADS)
Li, Chao-Te; Kubo, Derek; Cheng, Jen-Chieh; Kuroda, John; Srinivasan, Ranjani; Ho, Solomon; Guzzino, Kim; Chen, Ming-Tang
2016-07-01
This report presents a down-conversion method involving digital sideband separation for the Yuan-Tseh Lee Array (YTLA) to double the processing bandwidth. The receiver consists of a MMIC HEMT LNA front end operating at a wavelength of 3 mm, and sub-harmonic mixers that output signals at intermediate frequencies (IFs) of 2-18 GHz. The sideband separation scheme involves an analog 90° hybrid followed by two mixers that provide down-conversion of the IF signal to a pair of in-phase (I) and quadrature (Q) signals in baseband. The I and Q baseband signals are digitized using 5 Giga sample per second (Gsps) analog-to-digital converters (ADCs). A second hybrid is digitally implemented using field-programmable gate arrays (FPGAs) to produce two sidebands, each with a bandwidth of 1.6 GHz. The 2 x 1.6 GHz band can be tuned to cover any 3.6 GHz window within the aforementioned IF range of the array. Sideband rejection ratios (SRRs) above 20 dB can be obtained across the 3.6 GHz bandwidth by equalizing the power and delay between the I and Q baseband signals. Furthermore, SRRs above 30 dB can be achieved when calibration is applied.
Readout Electronics for the ATLAS LAr Calorimeter at HL-LHC
NASA Astrophysics Data System (ADS)
Chen, Hucheng; ATLAS Liquid Argon Calorimeter Group
The ATLAS Liquid Argon (LAr) calorimeters are high precision, high sensitivity and high granularity detectors designed to provide precision measurements of electrons, photons, jets and missing transverse energy. ATLAS and its LAr calorimeters have been operating and collecting proton-proton collisions at LHC since 2009. The current front-end electronics of the LAr calorimeters need to be upgraded to sustain the higher radiation levels and data rates expected at the upgraded high luminosity LHC machine (HL-LHC), which will have 5 times more luminosity than the LHC in its ultimate configuration. The complexity of the present electronics and the obsolescence of some of components of which it is made, will not allow a partial replacement of the system. A completely new readout architecture scheme is under study and many components are being developed in various R&D programs of the LAr Calorimeter Group.The new front-end readout electronics will send data continuously at each bunch crossing through high speed radiation resistant optical links. The data will be processed real-time with the possibility of implementing trigger algorithms for clusters and electron/photon identification at a higher granularity than that which is currently implemented. The new architecture will eliminate the intrinsic limitation presently existing on Level-1 trigger acceptance. This article is an overview of the R&D activities which covers architectural design aspects of the new electronics as well as some detailed progress on the development of several ASICs needed, and preliminary studies with FPGAs to cover the backend functions including part of the Level-1 trigger requirements. A recently proposed staged upgrade with hybrid Tower Builder Board (TBB) is also described.
A web system of virtual morphometric globes for Mars and the Moon
NASA Astrophysics Data System (ADS)
Florinsky, I. V.; Garov, A. S.; Karachevtseva, I. P.
2018-09-01
We developed a web system of virtual morphometric globes for Mars and the Moon. As the initial data, we used 15-arc-minutes gridded global digital elevation models (DEMs) extracted from the Mars Orbiter Laser Altimeter (MOLA) and the Lunar Orbiter Laser Altimeter (LOLA) gridded archives. We derived global digital models of sixteen morphometric variables including horizontal, vertical, minimal, and maximal curvatures, as well as catchment area and topographic index. The morphometric models were integrated into the web system developed as a distributed application consisting of a client front-end and a server back-end. The following main functions are implemented in the system: (1) selection of a morphometric variable; (2) two-dimensional visualization of a calculated global morphometric model; (3) 3D visualization of a calculated global morphometric model on the sphere surface; (4) change of a globe scale; and (5) globe rotation by an arbitrary angle. Free, real-time web access to the system is provided. The web system of virtual morphometric globes can be used for geological and geomorphological studies of Mars and the Moon at the global, continental, and regional scales.
Towards a Chemiresistive Sensor-Integrated Electronic Nose: A Review
Chiu, Shih-Wen; Tang, Kea-Tiong
2013-01-01
Electronic noses have potential applications in daily life, but are restricted by their bulky size and high price. This review focuses on the use of chemiresistive gas sensors, metal-oxide semiconductor gas sensors and conductive polymer gas sensors in an electronic nose for system integration to reduce size and cost. The review covers the system design considerations and the complementary metal-oxide-semiconductor integrated technology for a chemiresistive gas sensor electronic nose, including the integrated sensor array, its readout interface, and pattern recognition hardware. In addition, the state-of-the-art technology integrated in the electronic nose is also presented, such as the sensing front-end chip, electronic nose signal processing chip, and the electronic nose system-on-chip. PMID:24152879
40 CFR 63.487 - Batch front-end process vents-reference control technology.
Code of Federal Regulations, 2012 CFR
2012-07-01
...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...
40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.
Code of Federal Regulations, 2014 CFR
2014-07-01
... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...
40 CFR 63.487 - Batch front-end process vents-reference control technology.
Code of Federal Regulations, 2011 CFR
2011-07-01
... control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents...
40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.
Code of Federal Regulations, 2013 CFR
2013-07-01
... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...
40 CFR 63.487 - Batch front-end process vents-reference control technology.
Code of Federal Regulations, 2013 CFR
2013-07-01
...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...
40 CFR 63.487 - Batch front-end process vents-reference control technology.
Code of Federal Regulations, 2014 CFR
2014-07-01
...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...
40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.
Code of Federal Regulations, 2012 CFR
2012-07-01
... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...
40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.
Code of Federal Regulations, 2011 CFR
2011-07-01
... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...
The Parkes front-end controller and noise-adding radiometer
NASA Technical Reports Server (NTRS)
Brunzie, T. J.
1990-01-01
A new front-end controller (FEC) was installed on the 64-m antenna in Parkes, Australia, to support the 1989 Voyager 2 Neptune encounter. The FEC was added to automate operation of the front-end microwave hardware as part of the Deep Space Network's Parkes-Canberra Telemetry Array. Much of the front-end hardware was refurbished and reimplemented from a front-end system installed in 1985 by the European Space Agency for the Uranus encounter; however, the FEC and its associated noise-adding radiometer (NAR) were new Jet Propulsion Laboratory (JPL) designs. Project requirements and other factors led to the development of capabilities not found in standard Deep Space Network (DSN) controllers and radiometers. The Parkes FEC/NAR performed satisfactorily throughout the Neptune encounter and was removed in October 1989.
NASA Astrophysics Data System (ADS)
Takeda, Sawako; Tashiro, Makoto S.; Ishisaki, Yoshitaka; Tsujimoto, Masahiro; Seta, Hiromi; Shimoda, Yuya; Yamaguchi, Sunao; Uehara, Sho; Terada, Yukikatsu; Fujimoto, Ryuichi; Mitsuda, Kazuhisa
2014-07-01
The soft X-ray spectrometer (SXS) aboard ASTRO-H is equipped with dedicated digital signal processing units called pulse shape processors (PSPs). The X-ray microcalorimeter system SXS has 36 sensor pixels, which are operated at 50 mK to measure heat input of X-ray photons and realize an energy resolution of 7 eV FWHM in the range 0.3-12.0 keV. Front-end signal processing electronics are used to filter and amplify the electrical pulse output from the sensor and for analog-to-digital conversion. The digitized pulses from the 36 pixels are multiplexed and are sent to the PSP over low-voltage differential signaling lines. Each of two identical PSP units consists of an FPGA board, which assists the hardware logic, and two CPU boards, which assist the onboard software. The FPGA board triggers at every pixel event and stores the triggering information as a pulse waveform in the installed memory. The CPU boards read the event data to evaluate pulse heights by an optimal filtering algorithm. The evaluated X-ray photon data (including the pixel ID, energy, and arrival time information) are transferred to the satellite data recorder along with event quality information. The PSP units have been developed and tested with the engineering model (EM) and the flight model. Utilizing the EM PSP, we successfully verified the entire hardware system and the basic software design of the PSPs, including their communication capability and signal processing performance. In this paper, we show the key metrics of the EM test, such as accuracy and synchronicity of sampling clocks, event grading capability, and resultant energy resolution.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bolotnikov, A. E., E-mail: bolotnik@bnl.gov; Ackley, K.; Camarda, G. S.
We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We presentmore » the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.
We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm 3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readoutmore » electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less
Pseudo-differential CMOS analog front-end circuit for wide-bandwidth optical probe current sensor
NASA Astrophysics Data System (ADS)
Uekura, Takaharu; Oyanagi, Kousuke; Sonehara, Makoto; Sato, Toshiro; Miyaji, Kousuke
2018-04-01
In this paper, we present a pseudo-differential analog front-end (AFE) circuit for a novel optical probe current sensor (OPCS) aimed for high-frequency power electronics. It employs a regulated cascode transimpedance amplifier (RGC-TIA) to achieve a high gain and a large bandwidth without using an extremely high performance operational amplifier. The AFE circuit is designed in a 0.18 µm standard CMOS technology achieving a high transimpedance gain of 120 dB Ω and high cut off frequency of 16 MHz. The measured slew rate is 70 V/µs and the input referred current noise is 1.02 pA/\\sqrt{\\text{Hz}} . The magnetic resolution and bandwidth of OPCS are estimated to be 1.29 mTrms and 16 MHz, respectively; the bandwidth is higher than that of the reported Hall effect current sensor.
Development of FEB Test Platform for ATLAS New Small Wheel Upgrade
NASA Astrophysics Data System (ADS)
Lu, Houbing; Hu, Kun; Wang, Xu; Li, Feng; Han, Liang; Jin, Ge
2016-10-01
This concept of test platform is based on the test requirements of the front-end board (FEB) which is developed for the phase I upgrade of the small Thin Gap Chamber(sTGC) detector on New Small Wheel(NSW) of ATLAS. The front-end electronics system of sTGC consists of 1,536 FEBs with about 322,000 readout of strips, wires and pads in total. A test platform for FEB with up to 256 channels has been designed to keep the testing efficiency at a controllable level. We present the circuit model architecture of the platform, and its functions and implementation as well. The firmware based on Field Programmable Gate Array (FPGA) and the software based on PC have been developed, and basic test methods have been established. FEB readout measurements have been performed in analog injection from the test platform, which will provide a fast and efficient test method for the production of FEB.
Front-end ASICs for high-energy astrophysics in space
NASA Astrophysics Data System (ADS)
Gevin, O.; Limousin, O.; Meuris, A.
2016-07-01
In most of embedded imaging systems for space applications, high granularity and increasing size of focal planes justify an almost systematic use of integrated circuits. . To fulfill challenging requirements for excellent spatial and energy resolution, integrated circuits must fit the sensors perfectly and interface the system such a way to optimize simultaneously noise, geometry and architecture. Moreover, very low power consumption and radiation tolerance are mandatory to envision a use onboard a payload in space. Consequently, being part of an optimized detection system for space, the integrated circuit is specifically designed for each application and becomes an Application Specific Integrated Circuits (ASIC). The paper focuses on mixed analog and digital signal ASICs for spectro-imaging systems in the keVMeV energy band. The first part of the paper summarizes the main advantages conferred by the use of front-end ASICs for highenergy astrophysics instruments in space mission. Space qualification of ASICs requires the chip to be radiation hard. The paper will shortly describe some of the typical hardening techniques and give some guidelines that an ASIC designer should follow to choose the most efficient technology for his project. The first task of the front-end electronics is to convert the charge coming from the detector into a voltage. For most of the Silicon detectors (CCD, DEPFET, SDD) this is conversion happens in the detector itself. For other sensor materials, charge preamplifiers operate the conversion. The paper shortly describes the different key parameters of charge preamplifiers and the binding parameters for the design. Filtering is generally mandatory in order to increase the signal to noise ratio or to reduce the duration of the signal. After a brief review on the main noise sources, the paper reviews noise-filtering techniques that are commonly used in Integrated circuits designs. The way sensors and ASICs are interconnected together plays a major role in the noise performances of the detection systems. The geometry of a sensor is therefore critical and drives the ASIC design. The second part of the paper takes the geometry of the detector as a story line to explore different kinds of ASIC structures and architectures. From the simple single-channel ASIC for CCDs to the most advanced 3D ASIC prototypes used to build dead-zone free imaging systems, the paper reports on different families of circuits for spectro-imaging systems. It emphasizes a variety of designer choices, all around the word, in different space missions.
Semantic Repositories for eGovernment Initiatives: Integrating Knowledge and Services
NASA Astrophysics Data System (ADS)
Palmonari, Matteo; Viscusi, Gianluigi
In recent years, public sector investments in eGovernment initiatives have depended on making more reliable existing governmental ICT systems and infrastructures. Furthermore, we assist at a change in the focus of public sector management, from the disaggregation, competition and performance measurements typical of the New Public Management (NPM), to new models of governance, aiming for the reintegration of services under a new perspective in bureaucracy, namely a holistic approach to policy making which exploits the extensive digitalization of administrative operations. In this scenario, major challenges are related to support effective access to information both at the front-end level, by means of highly modular and customizable content provision, and at the back-end level, by means of information integration initiatives. Repositories of information about data and services that exploit semantic models and technologies can support these goals by bridging the gap between the data-level representations and the human-level knowledge involved in accessing information and in searching for services. Moreover, semantic repository technologies can reach a new level of automation for different tasks involved in interoperability programs, both related to data integration techniques and service-oriented computing approaches. In this chapter, we discuss the above topics by referring to techniques and experiences where repositories based on conceptual models and ontologies are used at different levels in eGovernment initiatives: at the back-end level to produce a comprehensive view of the information managed in the public administrations' (PA) information systems, and at the front-end level to support effective service delivery.
Scott, Ian A; Sullivan, Clair; Staib, Andrew
2018-05-24
Objective In an era of rapid digitisation of Australian hospitals, practical guidance is needed in how to successfully implement electronic medical records (EMRs) as both a technical innovation and a major transformative change in clinical care. The aim of the present study was to develop a checklist that clearly and comprehensively defines the steps that best prepare hospitals for EMR implementation and digital transformation. Methods The checklist was developed using a formal methodological framework comprised of: literature reviews of relevant issues; an interactive workshop involving a multidisciplinary group of digital leads from Queensland hospitals; a draft document based on literature and workshop proceedings; and a review and feedback from senior clinical leads. Results The final checklist comprised 19 questions, 13 related to EMR implementation and six to digital transformation. Questions related to the former included organisational considerations (leadership, governance, change leaders, implementation plan), technical considerations (vendor choice, information technology and project management teams, system and hardware alignment with clinician workflows, interoperability with legacy systems) and training (user training, post-go-live contingency plans, roll-out sequence, staff support at point of care). Questions related to digital transformation included cultural considerations (clinically focused vision statement and communication strategy, readiness for change surveys), management of digital disruption syndromes and plans for further improvement in patient care (post-go-live optimisation of digital system, quality and benefit evaluation, ongoing digital innovation). Conclusion This evidence-based, field-tested checklist provides guidance to hospitals planning EMR implementation and separates readiness for EMR from readiness for digital transformation. What is known about the topic? Many hospitals throughout Australia have implemented, or are planning to implement, hospital wide electronic medical records (EMRs) with varying degrees of functionality. Few hospitals have implemented a complete end-to-end digital system with the ability to bring about major transformation in clinical care. Although the many challenges in implementing EMRs have been well documented, they have not been incorporated into an evidence-based, field-tested checklist that can practically assist hospitals in preparing for EMR implementation as both a technical innovation and a vehicle for major digital transformation of care. What does this paper add? This paper outlines a 19-question checklist that was developed using a formal methodological framework comprising literature review of relevant issues, proceedings from an interactive workshop involving a multidisciplinary group of digital leads from hospitals throughout Queensland, including three hospitals undertaking EMR implementation and one hospital with complete end-to-end EMR, and review of a draft checklist by senior clinical leads within a statewide digital healthcare improvement network. The checklist distinguishes between issues pertaining to EMR as a technical innovation and EMR as a vehicle for digital transformation of patient care. What are the implications for practitioners? Successful implementation of a hospital-wide EMR requires senior managers, clinical leads, information technology teams and project management teams to fully address key operational and strategic issues. Using an issues checklist may help prevent any one issue being inadvertently overlooked or underemphasised in the planning and implementation stages, and ensure the EMR is fully adopted and optimally used by clinician users in an ongoing digital transformation of care.
A system-level view of optimizing high-channel-count wireless biosignal telemetry.
Chandler, Rodney J; Gibson, Sarah; Karkare, Vaibhav; Farshchi, Shahin; Marković, Dejan; Judy, Jack W
2009-01-01
In this paper we perform a system-level analysis of a wireless biosignal telemetry system. We perform an analysis of each major system component (e.g., analog front end, analog-to-digital converter, digital signal processor, and wireless link), in which we consider physical, algorithmic, and design limitations. Since there are a wide range applications for wireless biosignal telemetry systems, each with their own unique set of requirements for key parameters (e.g., channel count, power dissipation, noise level, number of bits, etc.), our analysis is equally broad. The net result is a set of plots, in which the power dissipation for each component and as the system as a whole, are plotted as a function of the number of channels for different architectural strategies. These results are also compared to existing implementations of complete wireless biosignal telemetry systems.
A dual slope charge sampling analog front-end for a wireless neural recording system.
Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit; Ghovanloo, Maysam
2014-01-01
This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.
NASA Technical Reports Server (NTRS)
Thomas, Jr., Jess Brooks (Inventor)
1999-01-01
The front end in GPS receivers has the functions of amplifying, down-converting, filtering and sampling the received signals. In the preferred embodiment, only two operations, A/D conversion and a sum, bring the signal from RF to filtered quadrature baseband samples. After amplification and filtering at RF, the L1 and L2 signals are each sampled at RF at a high selected subharmonic rate. The subharmonic sample rates are approximately 900 MHz for L1 and 982 MHz for L2. With the selected subharmonic sampling, the A/D conversion effectively down-converts the signal from RF to quadrature components at baseband. The resulting sample streams for L1 and L2 are each reduced to a lower rate with a digital filter, which becomes a straight sum in the simplest embodiment. The frequency subsystem can be very simple, only requiring the generation of a single reference frequency (e.g. 20.46 MHz minus a small offset) and the simple multiplication of this reference up to the subharmonic sample rates for L1 and L2. The small offset in the reference frequency serves the dual purpose of providing an advantageous offset in the down-converted carrier frequency and in the final baseband sample rate.
Reconstructing the calibrated strain signal in the Advanced LIGO detectors
NASA Astrophysics Data System (ADS)
Viets, A. D.; Wade, M.; Urban, A. L.; Kandhasamy, S.; Betzwieser, J.; Brown, Duncan A.; Burguet-Castell, J.; Cahillane, C.; Goetz, E.; Izumi, K.; Karki, S.; Kissel, J. S.; Mendell, G.; Savage, R. L.; Siemens, X.; Tuyenbayev, D.; Weinstein, A. J.
2018-05-01
Advanced LIGO’s raw detector output needs to be calibrated to compute dimensionless strain h(t) . Calibrated strain data is produced in the time domain using both a low-latency, online procedure and a high-latency, offline procedure. The low-latency h(t) data stream is produced in two stages, the first of which is performed on the same computers that operate the detector’s feedback control system. This stage, referred to as the front-end calibration, uses infinite impulse response (IIR) filtering and performs all operations at a 16 384 Hz digital sampling rate. Due to several limitations, this procedure currently introduces certain systematic errors in the calibrated strain data, motivating the second stage of the low-latency procedure, known as the low-latency gstlal calibration pipeline. The gstlal calibration pipeline uses finite impulse response (FIR) filtering to apply corrections to the output of the front-end calibration. It applies time-dependent correction factors to the sensing and actuation components of the calibrated strain to reduce systematic errors. The gstlal calibration pipeline is also used in high latency to recalibrate the data, which is necessary due mainly to online dropouts in the calibrated data and identified improvements to the calibration models or filters.
A Dual Slope Charge Sampling Analog Front-End for a Wireless Neural Recording System
Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit
2015-01-01
This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-µm CMOS process, occupying 2.4 × 2.1 mm2 and consuming 255 µW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 µVrms in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 µW. PMID:25570655
Kumar Thakur, Rupak; Anoop, C S
2015-08-01
Cardio-vascular health monitoring has gained considerable attention in the recent years. Principle of non-contact capacitive electrocardiograph (ECG) and its applicability as a valuable, low-cost, easy-to-use scheme for cardio-vascular health monitoring has been demonstrated in some recent research papers. In this paper, we develop a complete non-contact ECG system using a suitable front-end electronic circuit and a heart-rate (HR) measurement unit using enhanced Fourier interpolation technique. The front-end electronic circuit is realized using low-cost, readily available components and the proposed HR measurement unit is designed to achieve fairly accurate results. The entire system has been extensively tested to verify its efficacy and test results show that the developed system can estimate HR with an accuracy of ±2 beats. Detailed tests have been conducted to validate the performance of the system for different cloth thicknesses of the subject. Some basic tests which illustrate the application of the proposed system for heart-rate variability estimation has been conducted and results reported. The developed system can be used as a portable, reliable, long-term cardiac health monitoring device and can be extended to human drowsiness detection.
Parameter Extraction Method for the Electrical Model of a Silicon Photomultiplier
NASA Astrophysics Data System (ADS)
Licciulli, Francesco; Marzocca, Cristoforo
2016-10-01
The availability of an effective electrical model, able to accurately reproduce the signals generated by a Silicon Photo-Multiplier coupled to the front-end electronics, is mandatory when the performance of a detection system based on this kind of detector has to be evaluated by means of reliable simulations. We propose a complete extraction procedure able to provide the whole set of the parameters involved in a well-known model of the detector, which includes the substrate ohmic resistance. The technique allows achieving very good quality of the fit between simulation results provided by the model and experimental data, thanks to accurate discrimination between the quenching and substrate resistances, which results in a realistic set of extracted parameters. The extraction procedure has been applied to a commercial device considering a wide range of different conditions in terms of input resistance of the front-end electronics and interconnection parasitics. In all the considered situations, very good correspondence has been found between simulations and measurements, especially for what concerns the leading edge of the current pulses generated by the detector, which strongly affects the timing performance of the detection system, thus confirming the effectiveness of the model and the associated parameter extraction technique.
Verification of the Sentinel-4 focal plane subsystem
NASA Astrophysics Data System (ADS)
Williges, Christian; Uhlig, Mathias; Hilbert, Stefan; Rossmann, Hannes; Buchwinkler, Kevin; Babben, Steffen; Sebastian, Ilse; Hohn, Rüdiger; Reulke, Ralf
2017-09-01
The Sentinel-4 payload is a multi-spectral camera system, designed to monitor atmospheric conditions over Europe from a geostationary orbit. The German Aerospace Center, DLR Berlin, conducted the verification campaign of the Focal Plane Subsystem (FPS) during the second half of 2016. The FPS consists, of two Focal Plane Assemblies (FPAs), two Front End Electronics (FEEs), one Front End Support Electronic (FSE) and one Instrument Control Unit (ICU). The FPAs are designed for two spectral ranges: UV-VIS (305 nm - 500 nm) and NIR (750 nm - 775 nm). In this publication, we will present in detail the set-up of the verification campaign of the Sentinel-4 Qualification Model (QM). This set up will also be used for the upcoming Flight Model (FM) verification, planned for early 2018. The FPAs have to be operated at 215 K +/- 5 K, making it necessary to exploit a thermal vacuum chamber (TVC) for the test accomplishment. The test campaign consists mainly of radiometric tests. This publication focuses on the challenge to remotely illuminate both Sentinel-4 detectors as well as a reference detector homogeneously over a distance of approximately 1 m from outside the TVC. Selected test analyses and results will be presented.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Abgrall, N.; Aguayo, Estanislao; Avignone, F. T.
The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ʋ) of the isotope 76Ge with a mixed array of enriched and natural Germanium detectors. In view of the next generation of tonne-scale germanium-based (ββ(0ʋ)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge (ββ(0ʋ)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Smith, Leon E.; Conrad, Ryan C.; Keller, Daniel T.
The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, amore » technical evaluation of a candidate FEUM device produced by a commercial vendor is being performed. This evaluation is assessing the device against the IAEA’s original technical specifications and a broad range of important parameters that included sensor types, cable types, and industrial electromagnetic noise that can degrade signals from remotely located detectors. Testing has been performed in a laboratory and also in environments representative of IAEA deployments. The results are expected to inform the IAEA about where and how FEUM devices might be implemented in the field. Data and preliminary findings from the testing performed to date are presented.« less
Commissioning of the CMS Hadron Forward Calorimeters Phase I Upgrade
NASA Astrophysics Data System (ADS)
Bilki, B.; Onel, Y.
2018-03-01
The final phase of the CMS Hadron Forward Calorimeters Phase I Upgrade was performed during the Extended Year End Technical Stop of 2016-2017. In the framework of the upgrade, the PMT boxes were reworked to implement two channel readout in order to exploit the benefits of the multi-anode PMTs in background tagging and signal recovery. The front-end electronics were also upgraded to QIE10-based electronics which implement larger dynamic range and a 6-bit TDC. Following this major upgrade, the Hadron Forward Calorimeters were commissioned for operation readiness in 2017. Here we describe the details and the components of the upgrade, and discuss the operational experience and results obtained during the upgrade and commissioning.
Tevatron beam position monitor upgrade
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wolbers, Stephen; Banerjee, B.; Barker, B.
2005-05-01
The Tevatron Beam Position Monitor (BPM) readout electronics and software have been upgraded to improve measurement precision, functionality and reliability. The original system, designed and built in the early 1980's, became inadequate for current and future operations of the Tevatron. The upgraded system consists of 960 channels of new electronics to process analog signals from 240 BPMs, new front-end software, new online and controls software, and modified applications to take advantage of the improved measurements and support the new functionality. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiprotonmore » position measurements. Measurements using the new system are presented that demonstrate its improved resolution and overall performance.« less
The Multifrequency Siberian Radioheliograph
NASA Astrophysics Data System (ADS)
Lesovoi, S. V.; Altyntsev, A. T.; Ivanov, E. F.; Gubin, A. V.
2012-10-01
The ten-antenna prototype of the multifrequency Siberian radioheliograph is described. The prototype consists of four parts: antennas with broadband front-ends, analog back-ends, digital receivers and a correlator. The prototype antennas are mounted on the outermost stations of the Siberian Solar Radio Telescope (SSRT) array. A signal from each antenna is transmitted to a workroom by an analog fiber optical link, laid in an underground tunnel. After mixing, all signals are digitized and processed by digital receivers before the data are transmitted to the correlator. The digital receivers and the correlator are accessible by the Local Area Network (LAN). The frequency range of the prototype is from 4 to 8 GHz. Currently the frequency switching observing mode is used. The prototype data include both circular polarizations at a number of frequencies given by a list. This prototype is the first stage of the multifrequency Siberian radioheliograph development. It is assumed that the radioheliograph will consist of 96 antennas and will occupy stations of the West-East-South subarray of the SSRT. The radioheliograph will be fully constructed in the autumn of 2012. We plan to reach the brightness temperature sensitivity of about 100 K for the snapshot image, a spatial resolution up to 13 arcseconds at 8 GHz and a polarization measurement accuracy about a few percent. First results with the ten-antenna prototype are presented of observations of solar microwave bursts. The prototype's abilities to estimate source size and locations at different frequencies are discussed.
Cryogenic readout techniques for germanium detectors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Benato, G.; Cattadori, C.; Di Vacri, A.
High Purity Germanium detectors are used in many applications, from nuclear and astro-particle physics, to homeland security or environment protection. Although quite standard configurations are often used, with cryostats, charge sensitive amplifiers and analog or digital acquisition systems all commercially available, it might be the case that a few specific applications, e.g. satellites, portable devices, cryogenic physics experiments, etc. also require the development of a few additional or complementary techniques. An interesting case is for sure GERDA, the Germanium Detector Array experiment, searching for neutrino-less double beta decay of {sup 76}Ge at the Gran Sasso National Laboratory of INFN -more » Italy. In GERDA the entire detector array, composed of semi-coaxial and BEGe naked crystals, is operated suspended inside a cryostat filled with liquid argon, that acts not only as cooling medium and but also as an active shield, thanks to its scintillation properties. These peculiar circumstances, together with the additional requirement of a very low radioactive background from all the materials adjacent to the detectors, clearly introduce significant constraints on the design of the Ge front-end readout electronics. All the Ge readout solutions developed within the framework of the GERDA collaboration, for both Phase I and Phase II, will be briefly reviewed, with their relative strength and weakness compared together and with respect to ideal Ge readout. Finally, the digital processing techniques developed by the GERDA collaboration for energy estimation of Ge detector signals will be recalled. (authors)« less
FPGA-Based Pulse Pile-Up Correction With Energy and Timing Recovery.
Haselman, M D; Pasko, J; Hauck, S; Lewellen, T K; Miyaoka, R S
2012-10-01
Modern field programmable gate arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates well above 100 MHz. This, combined with FPGA's low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for a positron emission tomography (PET) scanner. The University of Washington is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilized to add significant signal processing power to produce higher quality images. In this paper we report on an all-digital pulse pile-up correction algorithm that has been developed for the FPGA. The pile-up mitigation algorithm will allow the scanner to run at higher count rates without incurring large data losses due to the overlapping of scintillation signals. This correction technique utilizes a reference pulse to extract timing and energy information for most pile-up events. Using pulses acquired from a Zecotech Photonics MAPD-N with an LFS-3 scintillator, we show that good timing and energy information can be achieved in the presence of pile-up utilizing a moderate amount of FPGA resources.
STIC3 - Silicon Photomultiplier Timing Chip with picosecond resolution
NASA Astrophysics Data System (ADS)
Stankova, Vera; Shen, Wei; Briggl, Konrad; Chen, Huangshan; Fischer, Peter; Gil, Alejandro; Harion, Tobias; Kiworra, Volker; Munwes, Yonathan; Ritzert, Michael; Schultz-Coulon, Hans-Christian
2015-07-01
The diagnostic of pancreas and prostate cancer is a challenging task due to the background noise coming from the closer organs. The EndoToFPET-US project aims to combine the synergy between metabolic and anatomical (ultrasound) image in order to improve the precision in the tumor localization. The goal of the project is to develop a Positron Emission Tomography (PET) system that provides a time-of-flight resolution of 200 ps FWHM for improving the signal to noise ratio and further to improve the medical image quality. In order to achieve this purpose an ASIC has been designed for very high timing resolution in time-of-flight (ToF) applications. In this paper we present the ASIC performance and the first characterization measurements with the 64-channels prototype version (STiC3). Measurements are performed with LYSO scintillator crystal and a Multi Pixel Photon Counter (MPPC). Measurements with the chip show an analog-front-end stage jitter of 35 ps for the first photo-electron equivalent charge and reach 18 ps for the third photo-electron. Coincidence time resolution (CTR) of 240 ps FWHM is measured with 3.1×3.1×15 mm3 LYSO crystal and 50 μm pixel pitch MPPC. Further optimization including the Time-to-Digital Converter (TDC) non-linearity corrections and setup fine tuning are ongoing for achieving the desired CTR of 200 ps FWHM.
Management and development of local area network upgrade prototype
NASA Technical Reports Server (NTRS)
Fouser, T. J.
1981-01-01
Given the situation of having management and development users accessing a central computing facility and given the fact that these same users have the need for local computation and storage, the utilization of a commercially available networking system such as CP/NET from Digital Research provides the building blocks for communicating intelligent microsystems to file and print services. The major problems to be overcome in the implementation of such a network are the dearth of intelligent communication front-ends for the microcomputers and the lack of a rich set of management and software development tools.
Digital Audio Radio Field Tests
NASA Technical Reports Server (NTRS)
Hollansworth, James E.
1997-01-01
Radio history continues to be made at the NASA Lewis Research Center with the beginning of phase two of Digital Audio Radio testing conducted by the Consumer Electronic Manufacturers Association (a sector of the Electronic Industries Association and the National Radio Systems Committee) and cosponsored by the Electronic Industries Association and the National Association of Broadcasters. The bulk of the field testing of the four systems should be complete by the end of October 1996, with results available soon thereafter. Lewis hosted phase one of the testing process, which included laboratory testing of seven proposed digital audio radio systems and modes (see the following table). Two of the proposed systems operate in two modes, thus making a total of nine systems for testing. These nine systems are divided into the following types of transmission: in-band on channel (IBOC), in-band adjacent channel (IBAC), and new bands - the L-band (1452 to 1492 MHz) and the S-band (2310 to 2360 MHz).
Dorrer, C.; Consentino, A.; Cuffney, R.; ...
2017-10-18
Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dorrer, C.; Consentino, A.; Cuffney, R.
Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less
NASA Technical Reports Server (NTRS)
Harrington, R. F.
1980-01-01
The design, development, application, and capabilities of a variable frequency microwave radiometer are described. This radiometer demonstrated the versatility, accuracy, and stability required to provide contributions to the geophysical understanding of ocean and ice processes. A closed-loop feedback method was used, whereby noise pulses were added to the received electromagnetic radiation to achieve a null balance in a Dicke switched radiometer. Stability was achieved through the use of a constant temperature enclosure around the low loss microwave front end. The Dicke reference temperature was maintained to an absolute accuracy of 0.1 K using a closed-loop proportional temperature controller. A microprocessor based digital controller operates the radiometer and records the data on computer compatible tapes. This radiometer exhibits an absolute accuracy of better than 0.5 K when the sensitivity is 0.1 K. The sensitivity varies between 0.0125 K and 1.25 K depending upon the bandwidth and integration time selected by the digital controller. Remote sensing experiments were conducted from an aircraft platform and the first radiometeric mapping of an ocean polar front; exploratory experiments to measure the thickness of lake ice; first discrimination between first year and multiyear ice below 10 GHz; and the first known measurements of frequency sensitive characteristics of sea ice.
A wideband dual-antenna receiver for wireless recording from animals behaving in large arenas.
Lee, Seung Bae; Yin, Ming; Manns, Joseph R; Ghovanloo, Maysam
2013-07-01
A low-noise wideband receiver (Rx) is presented for a multichannel wireless implantable neural recording (WINeR) system that utilizes time-division multiplexing of pulse width modulated (PWM) samples. The WINeR-6 Rx consists of four parts: 1) RF front end; 2) signal conditioning; 3) analog output (AO); and 4) field-programmable gate array (FPGA) back end. The RF front end receives RF-modulated neural signals in the 403-490 MHz band with a wide bandwidth of 18 MHz. The frequency-shift keying (FSK) PWM demodulator in the FPGA is a time-to-digital converter with 304 ps resolution, which converts the analog pulse width information to 16-bit digital samples. Automated frequency tracking has been implemented in the Rx to lock onto the free-running voltage-controlled oscillator in the transmitter (Tx). Two antennas and two parallel RF paths are used to increase the wireless coverage area. BCI-2000 graphical user interface has been adopted and modified to acquire, visualize, and record the recovered neural signals in real time. The AO module picks three demultiplexed channels and converts them into analog signals for direct observation on an oscilloscope. One of these signals is further amplified to generate an audio output, offering users the ability to listen to ongoing neural activity. Bench-top testing of the Rx performance with a 32-channel WINeR-6 Tx showed that the input referred noise of the entire system at a Tx-Rx distance of 1.5 m was 4.58 μV rms with 8-bit resolution at 640 kSps. In an in vivo experiment, location-specific receptive fields of hippocampal place cells were mapped during a behavioral experiment in which a rat completed 40 laps in a large circular track. Results were compared against those acquired from the same animal and the same set of electrodes by a commercial hardwired recording system to validate the wirelessly recorded signals.
A Wideband Dual-Antenna Receiver for Wireless Recording From Animals Behaving in Large Arenas
Lee, Seung Bae; Yin, Ming; Manns, Joseph R.
2014-01-01
A low-noise wideband receiver (Rx) is presented for a multichannel wireless implantable neural recording (WINeR) system that utilizes time-division multiplexing of pulse width modulated (PWM) samples. The WINeR-6 Rx consists of four parts: 1) RF front end; 2) signal conditioning; 3) analog output (AO); and 4) field-programmable gate array (FPGA) back end. The RF front end receives RF-modulated neural signals in the 403–490 MHz band with a wide bandwidth of 18 MHz. The frequency-shift keying (FSK) PWM demodulator in the FPGA is a time-to-digital converter with 304 ps resolution, which converts the analog pulse width information to 16-bit digital samples. Automated frequency tracking has been implemented in the Rx to lock onto the free-running voltage-controlled oscillator in the transmitter (Tx). Two antennas and two parallel RF paths are used to increase the wireless coverage area. BCI-2000 graphical user interface has been adopted and modified to acquire, visualize, and record the recovered neural signals in real time. The AO module picks three demultiplexed channels and converts them into analog signals for direct observation on an oscilloscope. One of these signals is further amplified to generate an audio output, offering users the ability to listen to ongoing neural activity. Bench-top testing of the Rx performance with a 32-channel WINeR-6 Tx showed that the input referred noise of the entire system at a Tx–Rx distance of 1.5 m was 4.58 μVrms with 8-bit resolution at 640 kSps. In an in vivo experiment, location-specific receptive fields of hippocampal place cells were mapped during a behavioral experiment in which a rat completed 40 laps in a large circular track. Results were compared against those acquired from the same animal and the same set of electrodes by a commercial hardwired recording system to validate the wirelessly recorded signals. PMID:23428612
Digital health for the End TB Strategy: developing priority products and making them work.
Falzon, Dennis; Timimi, Hazim; Kurosinski, Pascal; Migliori, Giovanni Battista; Van Gemert, Wayne; Denkinger, Claudia; Isaacs, Chris; Story, Alistair; Garfein, Richard S; do Valle Bastos, Luis Gustavo; Yassin, Mohammed A; Rusovich, Valiantsin; Skrahina, Alena; Van Hoi, Le; Broger, Tobias; Abubakar, Ibrahim; Hayward, Andrew; Thomas, Bruce V; Temesgen, Zelalem; Quraishi, Subhi; von Delft, Dalene; Jaramillo, Ernesto; Weyer, Karin; Raviglione, Mario C
2016-07-01
In 2014, the World Health Organization (WHO) developed the End TB Strategy in response to a World Health Assembly Resolution requesting Member States to end the worldwide epidemic of tuberculosis (TB) by 2035. For the strategy's objectives to be realised, the next 20 years will need novel solutions to address the challenges posed by TB to health professionals, and to affected people and communities. Information and communication technology presents opportunities for innovative approaches to support TB efforts in patient care, surveillance, programme management and electronic learning. The effective application of digital health products at a large scale and their continued development need the engagement of TB patients and their caregivers, innovators, funders, policy-makers, advocacy groups, and affected communities.In April 2015, WHO established its Global Task Force on Digital Health for TB to advocate and support the development of digital health innovations in global efforts to improve TB care and prevention. We outline the group's approach to stewarding this process in alignment with the three pillars of the End TB Strategy. The supplementary material of this article includes target product profiles, as developed by early 2016, defining nine priority digital health concepts and products that are strategically positioned to enhance TB action at the country level. The content of this work is ©the authors or their employers. Design and branding are ©ERS 2016.
ERIC Educational Resources Information Center
Hawkins, Donald T.; Levy, Louise R.
1985-01-01
This initial article in series of three discusses barriers inhibiting use of current online retrieval systems by novice users and notes reasons for front end and gateway online retrieval systems. Definitions, front end features, user interface, location (personal computer, host mainframe), evaluation, and strengths and weaknesses are covered. (16…
Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter
NASA Astrophysics Data System (ADS)
Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi
2016-01-01
The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)
NASA Astrophysics Data System (ADS)
Palo, Scott; Vaudrin, Cody
Defined by a minimal RF front-end followed by an analog-to-digital converter (ADC) and con-trolled by a reconfigurable logic device (FPGA), the digital receiver will replace conventional heterodyning analog receivers currently in use by the COBRA meteor radar. A basic hardware overview touches on the major digital receiver components, theory of operation and data han-dling strategies. We address concerns within the community regarding the implementation of digital receivers in small-scale scientific radars, and outline the numerous benefits with a focus on reconfigurability. From a remote sensing viewpoint, having complete visibility into a band of the EM spectrum allows an experiment designer to focus on parameter estimation rather than hardware limitations. Finally, we show some basic multistatic receiver configurations enabled through GPS time synchronization. Currently, the digital receiver is configured to facilitate range and radial velocity determination of meteors in the MLT region for use with the COBRA meteor radar. Initial measurements from data acquired at Platteville, Colorado and Tierra Del Fuego in Argentina will be presented. We show an improvement in detection rates compared to conventional analog systems. Scientific justification for a digital receiver is clearly made by the presentation of RTI plots created using data acquired from the receiver. These plots reveal an interesting phenomenon concerning vacillating power structures in a select number of meteor trails.
Multiphysical FE-analysis of a front-end bending phenomenon in a hot strip mill
NASA Astrophysics Data System (ADS)
Ilmola, Joonas; Seppälä, Oskari; Leinonen, Olli; Pohjonen, Aarne; Larkiola, Jari; Jokisaari, Juha; Putaansuu, Eero
2018-05-01
In hot steel rolling processes, a slab is generally rolled to a transfer bar in a roughing process and to a strip in a hot strip rolling process. Over several rolling passes the front-end may bend upward or downward due to asymmetrical rolling conditions causing entry problems in the next rolling pass. Many different factors may affect the front-end bending phenomenon and are very challenging to measure. Thus, a customized finite element model is designed and built to simulate the front-end bending phenomenon in a hot strip rolling process. To simulate the functioning of the hot strip mill precisely, automated controlling logic of the mill must be considered. In this paper we studied the effect of roll bite friction conditions and amount of reduction on the front-end bending phenomenon in a hot strip rolling process.
E-Books in Higher Education: Nearing the End of the Era of Hype?
ERIC Educational Resources Information Center
Nelson, Mark R.
2008-01-01
This article looks at some of the hype and the reality of e-books in higher education. An e-book is an electronic book that can be read digitally on a computer screen, a special e-book reader, a personal digital assistant (PDA), or even a mobile phone. In other words, e-books are consumed on a screen rather than on paper. However, underlying this…
Qualification and Reliability for MEMS and IC Packages
NASA Technical Reports Server (NTRS)
Ghaffarian, Reza
2004-01-01
Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface
An 8.4-GHz dual-maser front-end system for Parkes reimplementation
NASA Technical Reports Server (NTRS)
Trowbridge, D. L.; Loreman, J. R.; Brunzie, T. J.; Quinn, R.
1990-01-01
An 8.4-GHz front-end system consisting of a feedhorn, a waveguide feed assembly, dual masers, and downconverters was reimplemented at Parkes as part of the Parkes Canberra Telemetry Array for the Voyager Neptune encounter. The front-end system was originally assembled by the European Space Agency and installed on the Parkes antenna for the Giotto project. It was also used on a time-sharing basis by the Deep Space Network as part of the Parkes Canberra Telemetry Array to enhance the data return from the Voyager Uranus encounter. At the conclusion of these projects in 1986, part of the system was then shipped to JPL on loan for reimplementation at Parkes for the Voyager Neptune encounter. New design and implementation required to make the system operable at Parkes included new microwave front-end control cabinets, closed-cycle refrigeration monitor system, noise-adding radiometer system, front-end controller assembly, X81 local oscillator multiplier, and refurbishment of the original dual 8.4-GHz traveling-wave masers and waveguide feed system. The front-end system met all requirements during the encounter and was disassembled in October 1989 and returned to JPL.
A hybrid single-end-access MZI and Φ-OTDR vibration sensing system with high frequency response
NASA Astrophysics Data System (ADS)
Zhang, Yixin; Xia, Lan; Cao, Chunqi; Sun, Zhenhong; Li, Yanting; Zhang, Xuping
2017-01-01
A hybrid single-end-access Mach-Zehnder interferometer (MZI) and phase sensitive OTDR (Φ-OTDR) vibration sensing system is proposed and demonstrated experimentally. In our system, the narrow optical pulses and the continuous wave are injected into the fiber through the front end of the fiber at the same time. And at the rear end of the fiber, a frequency-shift-mirror (FSM) is designed to back propagate the continuous wave modulated by the external vibration. Thus the Rayleigh backscattering signals (RBS) and the back propagated continuous wave interfere with the reference light at the same end of the sensing fiber and a single-end-access configuration is achieved. The RBS can be successfully separated from the interference signal (IS) through digital signal process due to their different intermediate frequency based on frequency division multiplexing technique. There is no influence between these two schemes. The experimental results show 10 m spatial resolution and up to 1.2 MHz frequency response along a 6.35 km long fiber. This newly designed single-end-access setup can achieve vibration events locating and high frequency events response, which can be widely used in health monitoring for civil infrastructures and transportation.
Management of information in distributed biomedical collaboratories.
Keator, David B
2009-01-01
Organizing and annotating biomedical data in structured ways has gained much interest and focus in the last 30 years. Driven by decreases in digital storage costs and advances in genetics sequencing, imaging, electronic data collection, and microarray technologies, data is being collected at an alarming rate. The specialization of fields in biology and medicine demonstrates the need for somewhat different structures for storage and retrieval of data. For biologists, the need for structured information and integration across a number of domains drives development. For clinical researchers and hospitals, the need for a structured medical record accessible to, ideally, any medical practitioner who might require it during the course of research or patient treatment, patient confidentiality, and security are the driving developmental factors. Scientific data management systems generally consist of a few core services: a backend database system, a front-end graphical user interface, and an export/import mechanism or data interchange format to both get data into and out of the database and share data with collaborators. The chapter introduces some existing databases, distributed file systems, and interchange languages used within the biomedical research and clinical communities for scientific data management and exchange.
NASA Astrophysics Data System (ADS)
Briggl, K.; Dorn, M.; Hagdorn, R.; Harion, T.; Schultz-Coulon, H. C.; Shen, W.
2014-02-01
KLauS is an ASIC produced in the AMS 0.35 μm SiGe process to read out the charge signals from silicon photomultipliers. Developed as an analog front-end for future calorimeters with high granularity as pursued by the AHCAL concept in the CALICE collaboration, the ASIC is designed to measure the charge signal of the sensors in a large dynamic range and with low electronic noise contributions. In order to tune the operation voltage of each sensor individually, an 8-bit DAC to tune the voltage at the input terminal within a range of 2V is implemented. Using an integrated fast comparator with low jitter, the time information can be measured with sub-nanosecond resolution. The low power consumption of the ASIC can be further decreased using power gating techniques. Future versions of KLauS are under development and will incorporate an ADC with a resolution of up to 12-bits and blocks for digital data transmission. The chip is used in a setup for mass testing and characterization of scintillator tiles for the AHCAL test beam program.
Wu, Chung-Yu; Cheng, Cheng-Hsiang; Chen, Zhi-Xin
2018-06-01
In this paper, a 16-channel analog front-end (AFE) electrocorticography signal acquisition circuit for a closed-loop seizure control system is presented. It is composed of 16 input protection circuits, 16 auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIA) with bandpass filters, 16 programmable transconductance gain amplifiers, a multiplexer, a transimpedance amplifier, and a 128-kS/s 10-bit delta-modulated successive-approximation-register analog-to-digital converter (SAR ADC). In closed-loop seizure control system applications, the stimulator shares the same electrode with the AFE amplifier for effective suppression of epileptic seizures. To prevent from overstress in MOS devices caused by high stimulation voltage, an input protection circuit with a high-voltage-tolerant switch is proposed for the AFE amplifier. Moreover, low input-referred noise is achieved by using the chopper modulation technique in the AR-CSCCIA. To reduce the undesired effects of chopper modulation, an improved offset reduction loop is proposed to reduce the output offset generated by input chopper mismatches. The digital ripple reduction loop is also used to reduce the chopper ripple. The fabricated AFE amplifier has 49.1-/59.4-/67.9-dB programmable gain and 2.02-μVrms input referred noise in a bandwidth of 0.59-117 Hz. The measured power consumption of the AFE amplifier is 3.26 μW per channel, and the noise efficiency factor is 3.36. The in vivo animal test has been successfully performed to verify the functions. It is shown that the proposed AFE acquisition circuit is suitable for implantable closed-loop seizure control systems.
Li, Kan; Príncipe, José C.
2018-01-01
This paper presents a novel real-time dynamic framework for quantifying time-series structure in spoken words using spikes. Audio signals are converted into multi-channel spike trains using a biologically-inspired leaky integrate-and-fire (LIF) spike generator. These spike trains are mapped into a function space of infinite dimension, i.e., a Reproducing Kernel Hilbert Space (RKHS) using point-process kernels, where a state-space model learns the dynamics of the multidimensional spike input using gradient descent learning. This kernelized recurrent system is very parsimonious and achieves the necessary memory depth via feedback of its internal states when trained discriminatively, utilizing the full context of the phoneme sequence. A main advantage of modeling nonlinear dynamics using state-space trajectories in the RKHS is that it imposes no restriction on the relationship between the exogenous input and its internal state. We are free to choose the input representation with an appropriate kernel, and changing the kernel does not impact the system nor the learning algorithm. Moreover, we show that this novel framework can outperform both traditional hidden Markov model (HMM) speech processing as well as neuromorphic implementations based on spiking neural network (SNN), yielding accurate and ultra-low power word spotters. As a proof of concept, we demonstrate its capabilities using the benchmark TI-46 digit corpus for isolated-word automatic speech recognition (ASR) or keyword spotting. Compared to HMM using Mel-frequency cepstral coefficient (MFCC) front-end without time-derivatives, our MFCC-KAARMA offered improved performance. For spike-train front-end, spike-KAARMA also outperformed state-of-the-art SNN solutions. Furthermore, compared to MFCCs, spike trains provided enhanced noise robustness in certain low signal-to-noise ratio (SNR) regime. PMID:29666568
NASA Astrophysics Data System (ADS)
Ceresa, D.; Marchioro, A.; Kloukinas, K.; Kaplon, J.; Bialas, W.; Re, V.; Traversi, G.; Gaioni, L.; Ratti, L.
2014-11-01
The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level 1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720 pixels and 1920 strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method is presented with particular attention on the cluster reduction, position encoding and momentum discrimination logic. Concerning the architectural studies, a software test bench capable of reading physics Monte-Carlo generated events has been developed and used to validate the MPA design and to evaluate the MPA performance. The MPA-Light is scheduled to be submitted for fabrication this year and will include the full analog functions and a part of the digital logic of the final version in order to qualify the chosen VLSI technology for the analog front-end, the module assembly and the low voltage digital supply.
Li, Kan; Príncipe, José C
2018-01-01
This paper presents a novel real-time dynamic framework for quantifying time-series structure in spoken words using spikes. Audio signals are converted into multi-channel spike trains using a biologically-inspired leaky integrate-and-fire (LIF) spike generator. These spike trains are mapped into a function space of infinite dimension, i.e., a Reproducing Kernel Hilbert Space (RKHS) using point-process kernels, where a state-space model learns the dynamics of the multidimensional spike input using gradient descent learning. This kernelized recurrent system is very parsimonious and achieves the necessary memory depth via feedback of its internal states when trained discriminatively, utilizing the full context of the phoneme sequence. A main advantage of modeling nonlinear dynamics using state-space trajectories in the RKHS is that it imposes no restriction on the relationship between the exogenous input and its internal state. We are free to choose the input representation with an appropriate kernel, and changing the kernel does not impact the system nor the learning algorithm. Moreover, we show that this novel framework can outperform both traditional hidden Markov model (HMM) speech processing as well as neuromorphic implementations based on spiking neural network (SNN), yielding accurate and ultra-low power word spotters. As a proof of concept, we demonstrate its capabilities using the benchmark TI-46 digit corpus for isolated-word automatic speech recognition (ASR) or keyword spotting. Compared to HMM using Mel-frequency cepstral coefficient (MFCC) front-end without time-derivatives, our MFCC-KAARMA offered improved performance. For spike-train front-end, spike-KAARMA also outperformed state-of-the-art SNN solutions. Furthermore, compared to MFCCs, spike trains provided enhanced noise robustness in certain low signal-to-noise ratio (SNR) regime.
Percussive arc welding apparatus
Hollar, Jr., Donald L.
2002-01-01
A percussive arc welding apparatus includes a generally cylindrical actuator body having front and rear end portions and defining an internal recess. The front end of the body includes an opening. A solenoid assembly is provided in the rear end portion in the internal recess of the body, and an actuator shaft assembly is provided in the front end portion in the internal recess of the actuator body. The actuator shaft assembly includes a generally cylindrical actuator block having first and second end portions, and an actuator shaft having a front end extending through the opening in the actuator body, and the rear end connected to the first end portion of the actuator block. The second end portion of the actuator block is in operational engagement with the solenoid shaft by a non-rigid connection to reduce the adverse rebound effects of the actuator shaft. A generally transversely extending pin is rigidly secured to the rear end of the shaft. One end of the pin is received in a slot in the nose housing sleeve to prevent rotation of the actuator shaft during operation of the apparatus.
NASA Astrophysics Data System (ADS)
Szadkowski, Zbigniew
2015-06-01
The surface detector (SD) array of the Pierre Auger Observatory needs an upgrade which allows space for more complex triggers with higher bandwidth and greater dynamic range. To this end this paper presents a front-end board (FEB) with the largest Cyclone V E FPGA 5CEFA9F31I7N. It supports eight channels sampled with max. 250 MSps@14-bit resolution. Considered sampling for the SD is 120 MSps; however, the FEB has been developed with external anti-aliasing filters to retain maximal flexibility. Six channels are targeted at the SD, two are reserved for other experiments like: Auger Engineering Radio Array and additional muon counters. The FEB is an intermediate design plugged into a unified board communicating with a micro-controller at 40 MHz; however, it provides 250 MSPs sampling with an 18-bit dynamic range, is equipped with a virtual NIOS processor and supports 256 MB of SDRAM as well as an implemented spectral trigger based on the discrete cosine transform for detection of very inclined “old” showers. The FEB can also support neural network development for detection of “young” showers, potentially generated by neutrinos. A single FEB was already tested in the Auger surface detector in Malargüe (Argentina) for 120 and 160 MSps. Preliminary tests showed perfect stability of data acquisition for sampling frequency three or four times greater. They allowed optimization of the design before deployment of seven or eight FEBs for several months of continuous tests in the engineering array.
NASA Technical Reports Server (NTRS)
Zemba, Michael J.; Nessel, James A.; Morabito, David D.
2017-01-01
NASA Glenn Research Center (GRC) and the Jet Propulsion Laboratory (JPL) have jointly developed an atmospheric propagation terminal to measure and characterize propagation phenomena at 40 GHz at the Madrid Deep Space Communications Complex (MDSCC) in Robledo de Chavela, Spain. The hybrid Q-band system combines a 40 GHz beacon receiver and digital radiometer into the same RF front-end and observes the 39.402 GHz beacon of the European Space Agencys Alphasat Aldo Paraboni TDP5 experiment. The goals of these measurements are to assist MDSCC mission operations as well as to contribute to the development and improvement of International Telecommunications Union (ITU) models for prediction of communications systems performance within the Q-band. Herein, we provide an overview of the system design, characterization, and plan of operations to commence at the MDSCC beginning in March 2017.
A fully integrated direct-conversion digital satellite tuner in 0.18 μm CMOS
NASA Astrophysics Data System (ADS)
Si, Chen; Zengwang, Yang; Mingliang, Gu
2011-04-01
A fully integrated direct-conversion digital satellite tuner for DVB-S/S2 and ABS-S applications is presented. A broadband noise-canceling Balun-LNA and passive quadrature mixers provided a high-linearity low noise RF front-end, while the synthesizer integrated the loop filter to reduce the solution cost and system debug time. Fabricated in 0.18 μm CMOS, the chip achieves a less than 7.6 dB noise figure over a 900-2150 MHz L-band, while the measured sensitivity for 4.42 MS/s QPSK-3/4 mode is -91 dBm at the PCB connector. The fully integrated integer-N synthesizer operating from 2150 to 4350 MHz achieves less than 1 °C integrated phase error. The chip consumes about 145 mA at a 3.3 V supply with internal integrated LDOs.
NASA Astrophysics Data System (ADS)
Chen, H.; Briggl, K.; Eckert, P.; Harion, T.; Munwes, Y.; Shen, W.; Stankova, V.; Schultz-Coulon, H. C.
2017-01-01
MuTRiG is a mixed signal Silicon Photomultiplier readout ASIC designed in UMC 180 nm CMOS technology for precise timing and high event rate applications in high energy physics experiments and medical imaging. It is dedicated to the readout of the scintillating fiber detector and the scintillating tile detector of the Mu3e experiment. The MuTRiG chip extends the excellent timing performance of the STiCv3 chip with a fast digital readout for high rate applications. The high timing performance of the fully differential SiPM readout channels and 50 ps time binning TDCs are complemented by an upgraded digital readout logic and a 1.28 Gbps LVDS serial data link. The design of the chip and the characterization results of the analog front-end, TDC and the LVDS data link are presented.
Digital synthetic impedance for application in vibration damping.
Nečásek, J; Václavík, J; Marton, P
2016-02-01
In this work we present construction details of a precision, standalone, and compact digital synthetic impedance for application in the field of vibration damping. The presented device is based on an embedded ARM microcontroller with external AD and DA converters and a special analog front-end. The performance of the device is tested by comparing the actually synthesized impedance with several prescribed impedances and shows very good match. Fine-tuning ability of the device, which is crucial for the considered application, is also demonstrated and reaches as small step as 0.1% for the most complicated impedance structure and drops below the level of direct measurability with less complex structures. The real application in vibration damping is demonstrated on a simple and well understood case of a one-dimensional vibrating spring-mass system with piezoelectric actuator embedded as the interface between source of vibrations and vibrating mass.
Choi, Subin; Park, Kyeonghwan; Lee, Seungwook; Lim, Yeongjin; Oh, Byungjoo; Chae, Hee Young; Park, Chan Sam; Shin, Heugjoo; Kim, Jae Joon
2018-03-02
This paper presents a resolution-reconfigurable wide-range resistive sensor readout interface for wireless multi-gas monitoring applications that displays results on a smartphone. Three types of sensing resolutions were selected to minimize processing power consumption, and a dual-mode front-end structure was proposed to support the detection of a variety of hazardous gases with wide range of characteristic resistance. The readout integrated circuit (ROIC) was fabricated in a 0.18 μm CMOS process to provide three reconfigurable data conversions that correspond to a low-power resistance-to-digital converter (RDC), a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC), and a 16-bit delta-sigma modulator. For functional feasibility, a wireless sensor system prototype that included in-house microelectromechanical (MEMS) sensing devices and commercial device products was manufactured and experimentally verified to detect a variety of hazardous gases.
Digital synthetic impedance for application in vibration damping
NASA Astrophysics Data System (ADS)
Nečásek, J.; Václavík, J.; Marton, P.
2016-02-01
In this work we present construction details of a precision, standalone, and compact digital synthetic impedance for application in the field of vibration damping. The presented device is based on an embedded ARM microcontroller with external AD and DA converters and a special analog front-end. The performance of the device is tested by comparing the actually synthesized impedance with several prescribed impedances and shows very good match. Fine-tuning ability of the device, which is crucial for the considered application, is also demonstrated and reaches as small step as 0.1% for the most complicated impedance structure and drops below the level of direct measurability with less complex structures. The real application in vibration damping is demonstrated on a simple and well understood case of a one-dimensional vibrating spring-mass system with piezoelectric actuator embedded as the interface between source of vibrations and vibrating mass.
Security and Privacy Improvements for the Belgian eID Technology
NASA Astrophysics Data System (ADS)
Verhaeghe, Pieter; Lapon, Jorn; de Decker, Bart; Naessens, Vincent; Verslype, Kristof
The Belgian Electronic Identity Card enables Belgian citizens to prove their identity digitally and to sign electronic documents. At the end of 2009, every Belgian citizen older than 12 years will have such an eID card. In the future, usage of the eID card may be mandatory. However, irresponsible use of the card may cause harm to individuals.
Microbolometer characterization with the electronics prototype of the IRCAM for the JEM-EUSO mission
NASA Astrophysics Data System (ADS)
Martín, Yolanda; Joven, Enrique; Reyes, Marcos; Licandro, Javier; Maroto, Oscar; Díez-Merino, Laura; Tomas, Albert; Carbonell, Jordi; Morales de los Ríos, J. A.; del Peral, Luis; Rodríguez-Frías, M. D.
2014-08-01
JEM-EUSO is a space observatory that will be attached to the Japanese module of the International Space Station (ISS) to observe the UV photon tracks produced by Ultra High Energy Cosmic Rays (UHECR) interacting with atmospheric nuclei. The observatory comprises an Atmospheric Monitoring System (AMS) to gather data about the status of the atmosphere, including an infrared camera (IRCAM) for cloud coverage and cloud top height detection. This paper describes the design and characterization tests of IRCAM, which is the responsibility of the Spanish JEM-EUSO Consortium. The core of IRCAM is a 640x480 microbolometer array, the ULIS 04171, sensitive to radiation in the range 7 to 14 microns. The microbolometer array has been tested using the Front End Electronics Prototype (FEEP). This custom designed electronics corresponds to the Breadboard Model, a design built to verify the camera requirements in the laboratory. The FEEP controls the configuration of the microbolometer, digitizes the detector output, sends data to the Instrument Control Unit (ICU), and controls the microbolometer temperature to a 10 mK stability. Furthermore, the FEEP allows IRCAM to preprocess images by the addition of a powerful FPGA. This prototype has been characterized in the laboratories of Instituto de Astrofisica de Canarias (IAC). Main results, including detector response as a function of the scene temperature, NETD and Non-Uniformity Correction (NUC) are shown. Results about thermal resolution meet the system requirements with a NETD lower than 1K including the narrow band filters which allow us to retrieve the clouds temperature using stereovision algorithms.
NASA Astrophysics Data System (ADS)
Lugmayr, Artur R.; Mailaparampil, Anurag; Tico, Florina; Kalli, Seppo; Creutzburg, Reiner
2003-01-01
Digital television (digiTV) is an additional multimedia environment, where metadata is one key element for the description of arbitrary content. This implies adequate structures for content description, which is provided by XML metadata schemes (e.g. MPEG-7, MPEG-21). Content and metadata management is the task of a multimedia repository, from which digiTV clients - equipped with an Internet connection - can access rich additional multimedia types over an "All-HTTP" protocol layer. Within this research work, we focus on conceptual design issues of a metadata repository for the storage of metadata, accessible from the feedback channel of a local set-top box. Our concept describes the whole heterogeneous life-cycle chain of XML metadata from the service provider to the digiTV equipment, device independent representation of content, accessing and querying the metadata repository, management of metadata related to digiTV, and interconnection of basic system components (http front-end, relational database system, and servlet container). We present our conceptual test configuration of a metadata repository that is aimed at a real-world deployment, done within the scope of the future interaction (fiTV) project at the Digital Media Institute (DMI) Tampere (www.futureinteraction.tv).
NASA Astrophysics Data System (ADS)
Meng, X. T.; Levin, D. S.; Chapman, J. W.; Zhou, B.
2016-09-01
The ATLAS Muon Spectrometer endcap thin-Resistive Plate Chamber trigger project compliments the New Small Wheel endcap Phase-1 upgrade for higher luminosity LHC operation. These new trigger chambers, located in a high rate region of ATLAS, will improve overall trigger acceptance and reduce the fake muon trigger incidence. These chambers must generate a low level muon trigger to be delivered to a remote high level processor within a stringent latency requirement of 43 bunch crossings (1075 ns). To help meet this requirement the High Performance Time to Digital Converter (HPTDC), a multi-channel ASIC designed by CERN Microelectronics group, has been proposed for the digitization of the fast front end detector signals. This paper investigates the HPTDC performance in the context of the overall muon trigger latency, employing detailed behavioral Verilog simulations in which the latency in triggerless mode is measured for a range of configurations and under realistic hit rate conditions. The simulation results show that various HPTDC operational configurations, including leading edge and pair measurement modes can provide high efficiency (>98%) to capture and digitize hits within a time interval satisfying the Phase-1 latency tolerance.
Phase-dependence of elbow muscle coactivation in front crawl swimming.
Lauer, Jessy; Figueiredo, Pedro; Vilas-Boas, João Paulo; Fernandes, Ricardo J; Rouard, Annie Hélène
2013-08-01
Propulsion in swimming is achieved by complex sculling movements with elbow quasi-fixed on the antero-posterior axis to transmit forces from the hand and the forearm to the body. The purpose of this study was to investigate how elbow muscle coactivation was influenced by the front crawl stroke phases. Ten international level male swimmers performed a 200-m front crawl race-pace bout. Sagittal views were digitized frame by frame to determine the stroke phases (aquatic elbow flexion and extension, aerial elbow flexion and extension). Surface electromyograms (EMG) of the right biceps brachii and triceps brachii were recorded and processed using the integrated EMG to calculate a coactivation index (CI) for each phase. A significant effect of the phases on the CI was revealed with highest levels of coactivation during the aquatic elbow flexion and the aerial elbow extension. Swimmers stabilize the elbow joint to overcome drag during the aquatic phase, and act as a brake at the end of the recovery to replace the arm for the next stroke. The CI can provide insight into the magnitude of mechanical constraints supported by a given joint, in particular during a complex movement. Copyright © 2013 Elsevier Ltd. All rights reserved.
Digital information management: a progress report on the National Digital Mammography Archive
NASA Astrophysics Data System (ADS)
Beckerman, Barbara G.; Schnall, Mitchell D.
2002-05-01
Digital mammography creates very large images, which require new approaches to storage, retrieval, management, and security. The National Digital Mammography Archive (NDMA) project, funded by the National Library of Medicine (NLM), is developing a limited testbed that demonstrates the feasibility of a national breast imaging archive, with access to prior exams; patient information; computer aids for image processing, teaching, and testing tools; and security components to ensure confidentiality of patient information. There will be significant benefits to patients and clinicians in terms of accessible data with which to make a diagnosis and to researchers performing studies on breast cancer. Mammography was chosen for the project, because standards were already available for digital images, report formats, and structures. New standards have been created for communications protocols between devices, front- end portal and archive. NDMA is a distributed computing concept that provides for sharing and access across corporate entities. Privacy, auditing, and patient consent are all integrated into the system. Five sites, Universities of Pennsylvania, Chicago, North Carolina and Toronto, and BWXT Y12, are connected through high-speed networks to demonstrate functionality. We will review progress, including technical challenges, innovative research and development activities, standards and protocols being implemented, and potential benefits to healthcare systems.
Code of Federal Regulations, 2013 CFR
2013-10-01
... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...
Code of Federal Regulations, 2012 CFR
2012-10-01
... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...
Code of Federal Regulations, 2011 CFR
2011-10-01
... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...
Code of Federal Regulations, 2014 CFR
2014-10-01
... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...
Code of Federal Regulations, 2010 CFR
2010-10-01
... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b... and allow for the application of dynamic performance criteria to cab cars and MU locomotives as an...
Millimeter-wave imaging diagnostics systems on the EAST tokamak (invited)
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zhu, Y. L.; Xie, J. L., E-mail: jlxie@ustc.edu.cn; Yu, C. X.
2016-11-15
Millimeter-wave imaging diagnostics, with large poloidal span and wide radial range, have been developed on the EAST tokamak for visualization of 2D electron temperature and density fluctuations. A 384 channel (24 poloidal × 16 radial) Electron Cyclotron Emission Imaging (ECEI) system in F-band (90-140 GHz) was installed on the EAST tokamak in 2012 to provide 2D electron temperature fluctuation images with high spatial and temporal resolution. A co-located Microwave Imaging Reflectometry (MIR) will be installed for imaging of density fluctuations by December 2016. This “4th generation” MIR system has eight independent frequency illumination beams in W-band (75-110 GHz) driven bymore » fast tuning synthesizers and active multipliers. Both of these advanced millimeter-wave imaging diagnostic systems have applied the latest techniques. A novel design philosophy “general optics structure” has been employed for the design of the ECEI and MIR receiver optics with large aperture. The extended radial and poloidal coverage of ECEI on EAST is made possible by innovations in the design of front-end optics. The front-end optical structures of the two imaging diagnostics, ECEI and MIR, have been integrated into a compact system, including the ECEI receiver and MIR transmitter and receiver. Two imaging systems share the same mid-plane port for simultaneous, co-located 2D fluctuation measurements of electron density and temperature. An intelligent remote-control is utilized in the MIR electronics systems to maintain focusing at the desired radial region even with density variations by remotely tuning the probe frequencies in about 200 μs. A similar intelligent technique has also been applied on the ECEI IF system, with remote configuration of the attenuations for each channel.« less
Millimeter-wave imaging diagnostics systems on the EAST tokamak (invited)
NASA Astrophysics Data System (ADS)
Zhu, Y. L.; Xie, J. L.; Yu, C. X.; Zhao, Z. L.; Gao, B. X.; Chen, D. X.; Liu, W. D.; Liao, W.; Qu, C. M.; Luo, C.; Hu, X.; Spear, A. G.; Luhmann, N. C.; Domier, C. W.; Chen, M.; Ren, X.; Tobias, B. J.
2016-11-01
Millimeter-wave imaging diagnostics, with large poloidal span and wide radial range, have been developed on the EAST tokamak for visualization of 2D electron temperature and density fluctuations. A 384 channel (24 poloidal × 16 radial) Electron Cyclotron Emission Imaging (ECEI) system in F-band (90-140 GHz) was installed on the EAST tokamak in 2012 to provide 2D electron temperature fluctuation images with high spatial and temporal resolution. A co-located Microwave Imaging Reflectometry (MIR) will be installed for imaging of density fluctuations by December 2016. This "4th generation" MIR system has eight independent frequency illumination beams in W-band (75-110 GHz) driven by fast tuning synthesizers and active multipliers. Both of these advanced millimeter-wave imaging diagnostic systems have applied the latest techniques. A novel design philosophy "general optics structure" has been employed for the design of the ECEI and MIR receiver optics with large aperture. The extended radial and poloidal coverage of ECEI on EAST is made possible by innovations in the design of front-end optics. The front-end optical structures of the two imaging diagnostics, ECEI and MIR, have been integrated into a compact system, including the ECEI receiver and MIR transmitter and receiver. Two imaging systems share the same mid-plane port for simultaneous, co-located 2D fluctuation measurements of electron density and temperature. An intelligent remote-control is utilized in the MIR electronics systems to maintain focusing at the desired radial region even with density variations by remotely tuning the probe frequencies in about 200 μs. A similar intelligent technique has also been applied on the ECEI IF system, with remote configuration of the attenuations for each channel.
NASA Astrophysics Data System (ADS)
Aguilar, J. A.; Bilnik, W.; Borkowski, J.; Cadoux, F.; Christov, A.; della Volpe, D.; Favre, Y.; Heller, M.; Kasperek, J.; Lyard, E.; Marszałek, A.; Moderski, R.; Montaruli, T.; Porcelli, A.; Prandini, E.; Rajda, P.; Rameez, M.; Schioppa, E.; Troyano Pujadas, I.; Ziȩtara, K.; Błocki, J.; Bogacz, L.; Bulik, T.; Curyło, M.; Dyrda, M.; Frankowski, A.; Grudniki, Ł.; Grudzińska, M.; Idźkowski, B.; Jamrozy, M.; Janiak, M.; Lalik, K.; Mach, E.; Mandat, D.; Michałowski, J.; Neronov, A.; Niemiec, J.; Ostrowski, M.; Paśsko, P.; Pech, M.; Schovanek, P.; Seweryn, K.; Skowron, K.; Sliusar, V.; Sowiński, M.; Stawarz, Ł.; Stodulska, M.; Stodulski, M.; Toscano, S.; Walter, R.; Wiȩcek, M.; Zagdański, A.; Żychowski, P.
2016-09-01
The single mirror Small Size Telescope (SST-1M) is one of the proposed designs for the smallest type of telescopes, SSTs that will compose the Cherenkov Telescope Array (CTA). The SST-1M camera will use Silicon PhotoMultipliers (SiPM) which are nowadays commonly used in High Energy Physics experiments and many imaging applications. However the unique pixel shape and size have required a dedicated development by the University of Geneva and Hamamatsu. The resulting sensor has a surface of ∼94 mm2 and a total capacitance of ∼3.4 nF. These unique characteristics, combined with the stringent requirements of the CTA project on timing and charge resolution have led the University of Geneva to develop custom front-end electronics. The preamplifier stage has been tailored in order to optimize the signal shape using measurement campaigns and electronic simulation of the sensor. A dedicated trans-impedance pre-amplifier topology is used resulting in a power consumption of 400 mW per pixel and a pulse width < 30 ns. The measurements that have led to the choice of the different components and the resulting performance are detailed in this paper. The slow control electronics was designed to provide the bias voltage with 6.7 mV precision and to correct for temperature variation with a forward feedback compensation with 0.17 °C resolution. It is fully configurable and can be monitored using CANbus interface. The architecture and the characterization of the various elements are presented.
Digital off-axis holographic interferometry with simulated wavefront.
Belashov, A V; Petrov, N V; Semenova, I V
2014-11-17
The paper presents a novel algorithm based on digital holographic interferometry and being promising for evaluation of phase variations from highly noisy or modulated by speckle-structures digital holograms. The suggested algorithm simulates an interferogram in finite width fringes, by analogy with classical double exposure holographic interferometry. Thus obtained interferogram is then processed as a digital hologram. The advantages of the suggested approach are demonstrated in numerical experiments on calculations of differences in phase distributions of wave fronts modulated by speckle structure, as well as in a physical experiment on the analysis of laser-induced heating dynamics of an aqueous solution of a photosensitizer. It is shown that owing to the inherent capability of the approach to perform adjustable smoothing of compared wave fronts, the resulting difference undergoes noise filtering. This capability of adjustable smoothing may be used to minimize losses in spatial resolution. Since the method allows to vary an observation angle of compared wave fields, an opportunity to compensate misalignment of optical axes of these wave fronts arises. This feature can be required, for example, when using two different setups in comparative digital holography or for compensation of recording system displacements during a set of exposures in studies of dynamic processes.
Tangible display systems: bringing virtual surfaces into the real world
NASA Astrophysics Data System (ADS)
Ferwerda, James A.
2012-03-01
We are developing tangible display systems that enable natural interaction with virtual surfaces. Tangible display systems are based on modern mobile devices that incorporate electronic image displays, graphics hardware, tracking systems, and digital cameras. Custom software allows the orientation of a device and the position of the observer to be tracked in real-time. Using this information, realistic images of surfaces with complex textures and material properties illuminated by environment-mapped lighting, can be rendered to the screen at interactive rates. Tilting or moving in front of the device produces realistic changes in surface lighting and material appearance. In this way, tangible displays allow virtual surfaces to be observed and manipulated as naturally as real ones, with the added benefit that surface geometry and material properties can be modified in real-time. We demonstrate the utility of tangible display systems in four application areas: material appearance research; computer-aided appearance design; enhanced access to digital library and museum collections; and new tools for digital artists.
NASA Astrophysics Data System (ADS)
Antsiferov, S. I.; Eltsov, M. Iu; Khakhalev, P. A.
2018-03-01
This paper considers a newly designed electronic digital model of a robotic complex for implementing full-scale additive technologies, funded under a Federal Target Program. The electronic and digital model was used to solve the problem of simulating the movement of a robotic complex using the NX CAD/CAM/CAE system. The virtual mechanism was built and the main assemblies, joints, and drives were identified as part of solving the problem. In addition, the maximum allowed printable area size was identified for the robotic complex, and a simulation of printing a rectangular-shaped article was carried out.
A straw chambers' tracker for the high rate experiment 835 at the Fermilab accumulator
NASA Astrophysics Data System (ADS)
Bagnasco, S.; Dughera, G.; Giraudo, G.; Govi, G.; Marchetto, F.; Menichetti, E.; Pastrone, N.; Rumerio, P.; Trapani, P. P.
1998-02-01
Two layers of proportional drift tubes (aluminum mylar straws) are staggered in two cylindrical light chambers to measure charged particles' azimuthal angle. To stand the high rates (˜10 kHz/ cm2) and minimize the pile-up of the high luminosity experiment 835 at FNAL, a fast ASIC Amplifier-Shaper-Discriminator (ASD-8B) was chosen. The front-end electronics, designed exclusively with SMD components, was mounted on the downstream end plug of each chamber to avoid oscillations and noise. Design, construction and operational performances of these detectors are presented.
The modification at CSNS ion source
NASA Astrophysics Data System (ADS)
Liu, S.; Ouyang, H.; Huang, T.; Xiao, Y.; Cao, X.; Lv, Y.; Xue, K.; Chen, W.
2017-08-01
The commissioning of CSNS front end has been finished. Above 15 mA beam intensity is obtained at the end of RFQ. For CSNS ion source, it is a type of penning surface plasma ion source, similar to ISIS ion source. To improve the operation stability and reduce spark rate, some modifications have been performed, including Penning field, extraction optics and post acceleration. PBGUNS is applied to optimize beam extraction. The co-extraction electrons are considered at PBGUNS simulation and various extracted structure are simulated aiming to make the beam through the extracted electrode without loss. The stability of ion source is improved further.
A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver
NASA Astrophysics Data System (ADS)
Riyan, Wang; Jiwei, Huang; Zhengping, Li; Weifeng, Zhang; Longyue, Zeng
2012-03-01
A CMOS RF front-end for the long-term evolution (LTE) direct conversion receiver is presented. With a low noise transconductance amplifier (LNA), current commutating passive mixer and transimpedance operational amplifier (TIA), the RF front-end structure enables high-integration, high linearity and simple frequency planning for LTE multi-band applications. Large variable gain is achieved using current-steering transconductance stages. A current commutating passive mixer with 25% duty-cycle LO improves gain, noise and linearity. A direct coupled current-input filter (DCF) is employed to suppress the out-of-band interferer. Fabricated in a 0.13-μm CMOS process, the RF front-end achieves a 45 dB conversion voltage gain, 2.7 dB NF, -7 dBm IIP3, and +60 dBm IIP2 with calibration from 2.3 to 2.7 GHz. The total RF front end with divider draws 40 mA from a single 1.2-V supply.
Advanced RF Front End Technology
NASA Technical Reports Server (NTRS)
Herman, M. I.; Valas, S.; Katehi, L. P. B.
2001-01-01
The ability to achieve low-mass low-cost micro/nanospacecraft for Deep Space exploration requires extensive miniaturization of all subsystems. The front end of the Telecommunication subsystem is an area in which major mass (factor of 10) and volume (factor of 100) reduction can be achieved via the development of new silicon based micromachined technology and devices. Major components that make up the front end include single-pole and double-throw switches, diplexer, and solid state power amplifier. JPL's Center For Space Microsystems - System On A Chip (SOAC) Program has addressed the challenges of front end miniaturization (switches and diplexers). Our objectives were to develop the main components that comprise a communication front end and enable integration in a single module that we refer to as a 'cube'. In this paper we will provide the latest status of our Microelectromechanical System (MEMS) switches and surface micromachined filter development. Based on the significant progress achieved we can begin to provide guidelines of the proper system insertion for these emerging technologies. Additional information is contained in the original extended abstract.
Miniature L-Band Radar Transceiver
NASA Technical Reports Server (NTRS)
McWatters, Dalia; Price, Douglas; Edelstein, Wendy
2007-01-01
A miniature L-band transceiver that operates at a carrier frequency of 1.25 GHz has been developed as part of a generic radar electronics module (REM) that would constitute one unit in an array of many identical units in a very-large-aperture phased-array antenna. NASA and the Department of Defense are considering the deployment of such antennas in outer space; the underlying principles of operation, and some of those of design, also are applicable on Earth. The large dimensions of the antennas make it advantageous to distribute radio-frequency electronic circuitry into elements of the arrays. The design of the REM is intended to implement the distribution. The design also reflects a requirement to minimize the size and weight of the circuitry in order to minimize the weight of any such antenna. Other requirements include making the transceiver robust and radiation-hard and minimizing power demand. Figure 1 depicts the functional blocks of the REM, including the L-band transceiver. The key functions of the REM include signal generation, frequency translation, amplification, detection, handling of data, and radar control and timing. An arbitrary-waveform generator that includes logic circuitry and a digital-to-analog converter (DAC) generates a linear-frequency-modulation chirp waveform. A frequency synthesizer produces local-oscillator signals used for frequency conversion and clock signals for the arbitrary-waveform generator, for a digitizer [that is, an analog-to-digital converter (ADC)], and for a control and timing unit. Digital functions include command, timing, telemetry, filtering, and high-rate framing and serialization of data for a high-speed scientific-data interface. The aforementioned digital implementation of filtering is a key feature of the REM architecture. Digital filters, in contradistinction to analog ones, provide consistent and temperature-independent performance, which is particularly important when REMs are distributed throughout a large array. Digital filtering also enables selection among multiple filter parameters as required for different radar operating modes. After digital filtering, data are decimated appropriately in order to minimize the data rate out of an antenna panel. The L-band transceiver (see Figure 2) includes a radio-frequency (RF)-to-baseband down-converter chain and an intermediate- frequency (IF)-to-RF up-converter chain. Transmit/receive (T/R) switches enable the use of a single feed to the antenna for both transmission and reception. The T/R switches also afford a built-in test capability by enabling injection of a calibration signal into the receiver chain. In order of decreasing priority, components of the transceiver were selected according to requirements of radiation hardness, then compactness, then low power. All of the RF components are radiation-hard. The noise figure (NF) was optimized to the extent that (1) a low-noise amplifier (LNA) (characterized by NF < 2 dB) was selected but (2) the receiver front-end T/R switches were selected for a high degree of isolation and acceptably low loss, regardless of the requirement to minimize noise.
Development and tests of MCP based timing and multiplicity detector for MIPs
NASA Astrophysics Data System (ADS)
Feofilov, G.; Kondratev, V.; Stolyarov, O.; Tulina, T.; Valiev, F.; Vinogradov, L.
2017-01-01
We present summary of technological developments and tests of the MCP based large area detector aimed at precise timing and charged particles multiplicity measurements. Results obtained in course of these developments of isochronous (simultaneity) precise signal readout, passive summation of 1 ns signals, fast (1 GHz) front-end electronics, miniature vacuum systems, etc. could be potentially interesting for a number of future applications in different fields.
An NFC-Enabled CMOS IC for a Wireless Fully Implantable Glucose Sensor.
DeHennis, Andrew; Getzlaff, Stefan; Grice, David; Mailand, Marko
2016-01-01
This paper presents an integrated circuit (IC) that merges integrated optical and temperature transducers, optical interface circuitry, and a near-field communication (NFC)-enabled digital, wireless readout for a fully passive implantable sensor platform to measure glucose in people with diabetes. A flip-chip mounted LED and monolithically integrated photodiodes serve as the transduction front-end to enable fluorescence readout. A wide-range programmable transimpedance amplifier adapts the sensor signals to the input of an 11-bit analog-to-digital converter digitizing the measurements. Measurement readout is enabled by means of wireless backscatter modulation to a remote NFC reader. The system is able to resolve current levels of less than 10 pA with a single fluorescent measurement energy consumption of less than 1 μJ. The wireless IC is fabricated in a 0.6-μm-CMOS process and utilizes a 13.56-MHz-based ISO15693 for passive wireless readout through a NFC interface. The IC is utilized as the core interface to a fluorescent, glucose transducer to enable a fully implantable sensor-based continuous glucose monitoring system.
A minimalist approach to receiver architecture
NASA Technical Reports Server (NTRS)
Collins, O.
1991-01-01
New signal processing techniques are described for Deep Space Network radios and a proposed receiver architecture is presented, as well as experimental results on this new receiver's analog front end. The receiver's design employs direct downconversion rather than high speed digitization, and it is just as suitable for use as a space based probe relay receiver as it is for installation at a ground antenna. The advantages of having an inexpensive, shoe box size receiver, which could be carried around to antennas of opportunity, used for spacecraft testing or installed in the base of every antenna in a large array are the force behind this project.
Rabani, Amir
2016-01-01
The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications. PMID:27754324
Rabani, Amir
2016-10-12
The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications.
Digital signal processing the Tevatron BPM signals
DOE Office of Scientific and Technical Information (OSTI.GOV)
Cancelo, G.; James, E.; Wolbers, S.
2005-05-01
The Beam Position Monitor (TeV BPM) readout system at Fermilab's Tevatron has been updated and is currently being commissioned. The new BPMs use new analog and digital hardware to achieve better beam position measurement resolution. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiproton measurements. The signals provided by the two ends of the BPM pickups are processed by analog band-pass filters and sampled by 14-bit ADCs at 74.3MHz. A crucial part of this work has been the design of digital filters that process the signal. This paper describesmore » the digital processing and estimation techniques used to optimize the beam position measurement. The BPM electronics must operate in narrow-band and wide-band modes to enable measurements of closed-orbit and turn-by-turn positions. The filtering and timing conditions of the signals are tuned accordingly for the operational modes. The analysis and the optimized result for each mode are presented.« less
Dedicated multichannel readout ASIC coupled with single crystal diamond for dosimeter application
NASA Astrophysics Data System (ADS)
Fabbri, A.; Falco, M. D.; De Notaristefani, F.; Galasso, M.; Marinelli, M.; Orsolini Cencelli, V.; Tortora, L.; Verona, C.; Verona Rinati, G.
2013-02-01
This paper reports on the tests of a low-noise, multi-channel readout integrated circuit used as a readout electronic front-end for a diamond multi-pixel dosimeter. The system is developed for dose distribution measurement in radiotherapy applications. The first 10-channel prototype chip was designed and fabricated in a 0.18 um CMOS process. Every channel includes a charge integrator with a 10 pF capacitor and a double slope A/D converter. The diamond multi-pixel detector, based on CVD synthetic single crystal diamond Schottky diodes, is made by a 3 × 3 sensor matrix. The overall device has been tested under irradiation with 6 MeV radio therapeutic photon beams at the Policlinico ``Tor Vergata'' (PTV) hospital. Measurements show a 20 fA RMS leakage current from the front-end input stage and a negligible dark current from the diamond detector, a stable temporal response and a good linear behaviour as a function of both dose and dose rate. These characteristics were common to each tested channel.
Kuzay, Tuncer M.; Shu, Deming
1995-01-01
A photon beam position monitor for use in the front end of a beamline of a high heat flux and high energy photon source such as a synchrotron radiation storage ring detects and measures the position and, when a pair of such monitors are used in tandem, the slope of a photon beam emanating from an insertion device such as a wiggler or an undulator inserted in the straight sections of the ring. The photon beam position monitor includes a plurality of spaced blades for precisely locating the photon beam, with each blade comprised of chemical vapor deposition (CVD) diamond with an outer metal coating of a photon sensitive metal such as tungsten, molybdenum, etc., which combination emits electrons when a high energy photon beam is incident upon the blade. Two such monitors are contemplated for use in the front end of the beamline, with the two monitors having vertically and horizontally offset detector blades to avoid blade "shadowing". Provision is made for aligning the detector blades with the photon beam and limiting detector blade temperature during operation.
New instrumentation for the 1.2m Southern Millimeter Wave Telescope (SMWT)
NASA Astrophysics Data System (ADS)
Vasquez, P.; Astudillo, P.; Rodriguez, R.; Monasterio, D.; Reyes, N.; Finger, R.; Mena, F. P.; Bronfman, L.
2016-07-01
Here we describe the status of the upgrade program that is being performed to modernize the Southern 1.2m Wave Telescope. The Telescope was built during early ´80 to complete the first Galactic survey of Molecular Clouds in the CO(1-0) line. After a fruitful operation in CTIO the telescope was relocated to the Universidad de Chile, Cerro Calán Observatory. The new site has an altitude of 850m and allows observations in the millimeter range throughout the year. The telescope was upgraded, including a new building to house operations, new control system, and new receiver and back-end technologies. The new front end is a sideband-separating receiver based on a HEMT amplifier and sub-harmonic mixers. It is cooled with Liquid Nitrogen to diminish its noise temperature. The back-end is a digital spectrometer, based on the Reconfigurable Open Architecture Computing Hardware (ROACH). The new spectrometer includes IF hybridization capabilities to avoid analog hybrids and, therefore, improve the sideband rejection ratio of the receiver.
NASA Astrophysics Data System (ADS)
Gao, W.; Gan, B.; Li, X.; Wei, T.; Gao, D.; Hu, Y.
2015-04-01
In this paper, we present the development and performances of a radiation-hardened front-end readout application-specific integrated circuit (ASIC) dedicated to CZT detectors for a hard X-ray imager in space applications. The readout channel consists of a charge sensitive amplifier (CSA), a CR-RC shaper, a fast shaper, a discriminator and a driving buffer. With the additional digital filtering, the readout channel can achieve very low noise performances and low power dissipation. An eight-channel prototype ASIC is designed and fabricated in 0.35 μm CMOS process. The energy range of the detected X-rays is evaluated as 1.45 keV to 281 keV. The gain is larger than 100 mV/fC. The equivalent noise charge (ENC) of the ASIC is 53 e- at zero farad plus 10 e- per picofarad. The power dissipation is less than 4.4 mW/channel. Through the measurement with a CZT detector, the energy resolution is less than 3.45 keV (FWHM) under the irradiation of the radioactive source 241Am. The radiation effect experiments indicate that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad (Si).
DOE Office of Scientific and Technical Information (OSTI.GOV)
Szadkowski, Zbigniew
2015-07-01
The paper presents the first results from the Front- End Board (FEB) with the biggest Cyclone{sup R} V E FPGA 5CEFA9F31I7N, supporting 8 channels sampled up to 250 MSps at 14-bit resolution. Considered sampling for the SD is 120 MSps, however, the FEB has been developed with external anti-aliasing filters to keep a maximal flexibility. Six channels are targeted to the SD, two the rest for other experiments like: Auger Engineering Radio Array and additional muon counters. More channels and higher sampling generate larger size of registered events. We used the standard radio channel for a radio transmission from themore » detectors to the Central Data Acquisition Station (CDAS) to avoid at present a significant modification of a software in both sides: the detector and the CDAS (planned in a future for a final design). Seven FEBs have been deployed in the test detectors on a dedicated Engineering Array in a hexagon. Several variants of the FPGA code were tested for 120, 160, 200 and even 240 MSps DAQ. Tests confirmed a stability and reliability of the FEB design in real pampas conditions with more than 40 deg. C daily temperature variation and a strong sun exposition with a limited power budget only from a single solar panel. (authors)« less
NASA Astrophysics Data System (ADS)
Jeevargi, Chetankumar; Lodhi, Anuj; Sateeshkumar, Allu; Elangovan, D.; Arunkumar, G.
2017-11-01
The need for Renewable Energy Sources (RES) is increasing due to increased demand for the supply of power and it is also environment friendly.In the recent few years, the cost of generation of the power from the RES has been decreased. This paper aims to design the front end power converter which is required for integrating the fuel cells and solar power sources to the micro grid. The simulation of the designed front end converter is carried out in the PSIM 9.1.1 software. The results show that the designed front end power converter is sufficient for integrating the micro grid with fuel cells and solar power sources.
Design and development progress of a LLRF control system for a 500 MHz superconducting cavity
NASA Astrophysics Data System (ADS)
Lee, Y. S.; Kim, H. W.; Song, H. S.; Lee, J. H.; Park, K. H.; Yu, I. H.; Chai, J. S.
2012-07-01
The LLRF (low-level radio-frequency) control system which regulates the amplitude and the phase of the accelerating voltage inside a RF cavity is essential to ensure the stable operation of charged particle accelerators. Recent advances in digital signal processors and data acquisition systems have allowed the LLRF control system to be implemented in digitally and have made it possible to meet the higher demands associated with the performance of LLRF control systems, such as stability, accuracy, etc. For this reason, many accelerator laboratories have completed or are completing the developments of digital LLRF control systems. The digital LLRF control system has advantages related with flexibility and fast reconfiguration. This paper describes the design of the FPGA (field programmable gate array) based LLRF control system and the status of development for this system. The proposed LLRF control system includes an analog front-end, a digital board (ADC (analog to digital converter), DAC (digital to analog converter), FPGA, etc.) and a RF & clock generation system. The control algorithms will be implemented by using the VHDL (VHSIC (very high speed integrated circuits) hardware description language), and the EPICS (experiment physics and industrial control system) will be ported to the host computer for the communication. In addition, the purpose of this system is to control a 500 MHz RF cavity, so the system will be applied to the superconducting cavity to be installed in the PLS storage ring, and its performance will be tested.
IF digitization receiver of wideband digital array radar test-bed
NASA Astrophysics Data System (ADS)
Li, Weixing; Zhang, Yue; Lin, Jianzhi; Chen, Zengping
2014-10-01
In this paper, an X-band, 8-element wideband digital array radar (DAR) test-bed is presented, which makes use of a novel digital backend coupled with highly-integrated, multi-channel intermediate frequency (IF) digital receiver. Radar returns are received by the broadband antenna and then down-converted to the IF of 0.6GHz-3.0GHz. Four band-pass filters are applied in the front-end to divide the IF returns into four frequency bands with the instantaneous bandwidth of 500MHz. Every four array elements utilize a digital receiver, which is focused in this paper. The digital receivers are designed in a compact and flexible manner to meet the demands of DAR system. Each receiver consists of a fourchannel ADC, a high-performance FPGA, four DDR3 chips and two optical transceivers. With the sampling rate of up to 1.2GHz each channel, the ADC is capable of directly sampling the IF returns of four array elements at 10bits. In addition to serving as FIFO and controller, the onboard FPGA is also utilized for the implementation of various real-time algorithms such as DDC and channel calibration. Data is converted to bit stream and transferred through two low overhead, high data rate and multi-channel optical transceivers. Key technologies such as channel calibration and wideband DOA are studied with the measured data which is obtained in the experiments to illustrate the functionality of the system.
All-digital radar architecture
NASA Astrophysics Data System (ADS)
Molchanov, Pavlo A.
2014-10-01
All digital radar architecture requires exclude mechanical scan system. The phase antenna array is necessarily large because the array elements must be co-located with very precise dimensions and will need high accuracy phase processing system for aggregate and distribute T/R modules data to/from antenna elements. Even phase array cannot provide wide field of view. New nature inspired all digital radar architecture proposed. The fly's eye consists of multiple angularly spaced sensors giving the fly simultaneously thee wide-area visual coverage it needs to detect and avoid the threats around him. Fly eye radar antenna array consist multiple directional antennas loose distributed along perimeter of ground vehicle or aircraft and coupled with receiving/transmitting front end modules connected by digital interface to central processor. Non-steering antenna array allows creating all-digital radar with extreme flexible architecture. Fly eye radar architecture provides wide possibility of digital modulation and different waveform generation. Simultaneous correlation and integration of thousands signals per second from each point of surveillance area allows not only detecting of low level signals ((low profile targets), but help to recognize and classify signals (targets) by using diversity signals, polarization modulation and intelligent processing. Proposed all digital radar architecture with distributed directional antenna array can provide a 3D space vector to the jammer by verification direction of arrival for signals sources and as result jam/spoof protection not only for radar systems, but for communication systems and any navigation constellation system, for both encrypted or unencrypted signals, for not limited number or close positioned jammers.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kapusta, P.; Kisielewski, B.
In this paper the overvoltage protection modules (OVP) for the power supply (PS) system of the Belle II pixel detector (PXD) are described. The aim of the OVP is to protect the detector and associated electronics against overvoltage conditions. Most critical in the system are voltages supplying the front-end ASICs. The PXD detector consists of the DEPFET sensor modules with integrated chips like the Drain Current Digitizer, the Switcher and the Data Handling Processor. These chips, implemented in modern sub-micron technologies, are quite vulnerable to variations in the supply voltages. The PXD will be placed in the Belle II experimentmore » as close as possible to the interaction point, where access during experiment is very limited or even impossible, thus the PS and OVP systems exploit the remote-sensing method. Overvoltage conditions are due to failures of the PS itself, wrong setting of the output voltages or transient voltages coming out of hard noisy environment of the experiment. The OVP modules are parts of the PS modules. For powering the PXD 40 PS modules are placed 15 m outside the Belle II spectrometer. Each one is equipped with the OVP board. All voltages (22) are grouped in 4 domains: Analog, Digital, Steering and Gate which have independent grounds. The OVP boards are designed from integrated circuits from Linear Technology. All configurations were simulated with the Spice program. The control electronics is designed in a Xilinx CPLD. Two types of integrated circuits were used. LT4356 surge stopper protects loads from high voltage transients. The output voltages are limited to a safe value and also protect loads against over current faults. For less critical voltages, the LTC2912 voltage monitors are used that detect under-voltage and overvoltage events. It has to be noted that the OVP system is working independently of any other protection of the PS system, which increases its overall reliability. (authors)« less
All-digital full waveform recording photon counting flash lidar
NASA Astrophysics Data System (ADS)
Grund, Christian J.; Harwit, Alex
2010-08-01
Current generation analog and photon counting flash lidar approaches suffer from limitation in waveform depth, dynamic range, sensitivity, false alarm rates, optical acceptance angle (f/#), optical and electronic cross talk, and pixel density. To address these issues Ball Aerospace is developing a new approach to flash lidar that employs direct coupling of a photocathode and microchannel plate front end to a high-speed, pipelined, all-digital Read Out Integrated Circuit (ROIC) to achieve photon-counting temporal waveform capture in each pixel on each laser return pulse. A unique characteristic is the absence of performance-limiting analog or mixed signal components. When implemented in 65nm CMOS technology, the Ball Intensified Imaging Photon Counting (I2PC) flash lidar FPA technology can record up to 300 photon arrivals in each pixel with 100 ps resolution on each photon return, with up to 6000 range bins in each pixel. The architecture supports near 100% fill factor and fast optical system designs (f/#<1), and array sizes to 3000×3000 pixels. Compared to existing technologies, >60 dB ultimate dynamic range improvement, and >104 reductions in false alarm rates are anticipated, while achieving single photon range precision better than 1cm. I2PC significantly extends long-range and low-power hard target imaging capabilities useful for autonomous hazard avoidance (ALHAT), navigation, imaging vibrometry, and inspection applications, and enables scannerless 3D imaging for distributed target applications such as range-resolved atmospheric remote sensing, vegetation canopies, and camouflage penetration from terrestrial, airborne, GEO, and LEO platforms. We discuss the I2PC architecture, development status, anticipated performance advantages, and limitations.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ianakiev, Kiril Dimitrov; Iliev, Metodi; Swinhoe, Martyn Thomas
The KM200 device is a versatile, configurable front-end electronics boards that can be used as a functional replacement for Canberra’s JAB-01 boards based on the Amptek A-111 hybrid chip, which continues to be the preferred choice of electronics for large number of the boards in junction boxes of multiplicity counters that process the signal from an array of 3He detectors. Unlike the A-111 chip’s fixed time constants and sensitivity range, the shaping time and sensitivity of the new KM200 can be optimized for demanding applications such as spent fuel, and thus could improve the safeguards measurements of existing systems wheremore » the A-111 or PDT electronics does not perform well.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ben-Zvi, I.
Various authors have previously studied the theory and practice of cavity testing, notably an extensive treatment by Powers [1] and Padamsee [2]. The advent of the digital Low Level RF (LLRF) electronics based on Field Programmable Logic Arrays (FPGA) provides various improvements over the rather complex systems used in the past as well as enabling new measurement techniques.In this document we reintroduce a technique that seems to have fallen out of practice in recent times, that is obtaining the coupling constant β through measurements from just one port, the reflected power port, of the directional coupler placed in front ofmore » the cavity.« less
The Muon Portal Double Tracker for the Inspection of Travelling Containers
NASA Astrophysics Data System (ADS)
Pugliatti, C.; Antonuccio, V.; Bandieramonte, M.; Becciani, U.; Belluomo, F.; Blancato, A.; Bonanno, G.; Costa, A.; Fallica, P. G.; Garozzo, S.; Grillo, A.; Indelicato, V.; La Rocca, P.; Leonora, E.; Longhitano, F.; Longo, S.; Lo Presti, D.; Marano, D.; Massimino, P.; Petta, C.; Pistagna, C.; Puglisi, M.; Randazzo, N.; Riggi, F.; Riggi, S.; Romeo, G.; Russo, G. V.; Santagati, G.; Timpanaro, M. C.; Valvo, G.; Vitello, F.; Zaia, A.
2015-12-01
The Muon Portal Project has as its goal the design and construction of a real-size working detector prototype in scale 1:1, to inspect the content of travelling containers by means of the secondary cosmic-ray muon radiation and to recognize high-Z hidden materials (i.e. U, Pu). The tomographic image is obtained by reconstructing the input and output trajectories of each muon when it crosses the container and, consequently, the scattering angle, making use of two trackers placed above and below the container. The scan is performed without adding any external radiation, in a reasonable time (few minutes) and with a good spatial and angular resolution. The detector consists of 8 planes each segmented in 6 identical modules. Each module is made of scintillating strips with two WaveLength Shifting fibers (WLS) inside, coupled to Silicon photomultipliers. The customized read-out electronics employs programmable boards. Thanks to a smart read-out system, the number of output channels is reduced by a factor 10. The signals from the front-end modules are sent to the read-out boards, in order to convert analog signals to digital ones, by comparison with a threshold. The data are pre-analyzed and stored into a data acquisition PC. After an intense measurement and simulation campaign to carefully characterize the detector components, the first detection modules ( 1 ×3 m2) have been already built. In this paper the detector architecture, particularly focusing on the used electronics and the main preliminary results will be presented.
The muon pretrigger system of the HERA-B experiment
NASA Astrophysics Data System (ADS)
Bocker, M.; Adams, M.; Bechtle, P.; Buchholz, P.; Cruse, C.; Husemann, U.; Klaus, E.; Koch, N.; Kolander, M.; Kolotaev, I.; Riege, H.; Schutt, J.; Schwenninger, B.; van Staa, R.; Wegener, D.
2001-08-01
One of the main goals of the HERA-B experiment at DESY in Hamburg, Germany, is to study the properties of B-mesons with the emphasis on CP violation. B-mesons are produced in hadronic interactions of a 920-GeV proton beam with an internal wire target. An effective bunch crossing rate of about 8.5 MHz leads to about 200 charged tracks per event. Therefore, a highly selective and efficient trigger system providing high suppression of background events is required. The HERA-B trigger system consists of four levels. A rate reduction factor of 200 is aimed at by the first-level trigger (FLT). The muon pretrigger system, as a part of the FLT, is a modular system consisting of about 100 large-size VME modules of three different types: the pretrigger link board (PLB), the pretrigger coincidence unit (PCU), and the pretrigger message generator (PMG). The data rate processed by the pretrigger system is about 19.5 GByte/s. The PLBs process digitized hit information in eight independent electronic channels in parallel. Every electronic channel handles 32 bits of hit information received from the front-end driver buffer system. Optical links operating at 800 Mb/s transmit the data after serialization to PCUs, which calculate coincidences using complex programmable logic devices. The PMGs transform this coincidence information into messages for the FLT processors. The concept and design as well as results of the muon pretrigger running at HERA-B are presented.
Watanabe, Satoshi; Terazawa, Koichi
2004-09-01
We reported an autopsy case in which an antemortem thorax roentgenograph and a postmortem photograph of thoracic vertebrae front were available for digital superimposed comparison of contour of the vertebral column and provided a positive identification by the characteristic osteophyte formation. In the elderly, the thorax roentgenograph is often stored in medical institution. Osteophyte formation of the vertebral column has individual features with the aging and formed characteristic profiles of the vertebral column. Photographing of a cadaver's thoracic vertebrae front after removing of the thoracic and abdominal organ should be carried out to make a material for future comparison examination in personal identification.
Physical Modeling Techniques for Missile and Other Protective Structures
1983-06-29
uniaxial load only. In general , axial thrust was applied with an: initial eccentricity of zero on the specimen end. Sixteen different combinations of Pa...conditioning electronics and cabling schemes is included. The techniques described generally represent current approaches at the Civil Engineering Research...at T- zero and stopping when a pulse is generated by the pi-ezoelectric disc on arrival of! the detonation wave front. All elapsed time data is stored
Investigation of broadband digital predistortion for broadband radio over fiber transmission systems
NASA Astrophysics Data System (ADS)
Zhang, Xiupu; Liu, Taijun; Shen, Dongya
2016-12-01
In future broadband cloud radio access networks (C-RAN), front-haul transmission systems play a significant role in performance and cost of C-RAN. Broadband and high linearity radio over fiber (RoF) transmission systems are considered a promising solution for the front-haul. Digital linearization is one possible solution for RoF front-haul. In this paper, we investigate RF domain digital predistortion (DPD) linearization for broadband RoF front-haul. The implemented DPD is first investigated in 2.4 GHz WiFi over fiber transmission systems at 36 Mb/s, and more than 8-dB and 5.6-dB improvements of error vector magnitude (EVM) are achieved in back to back (BTB) and after 10 km single mode fiber (SMF) transmission. Further, both WiFi and ultra wide band (UWB) wireless signals are transmitted together, in which the DPD has linearization bandwidth of 2.4 GHz. It is shown that the implemented DPD leads to EVM improvements of 4.5-dB (BTB) and 3.1-dB (10 km SMF) for the WiFi signal, and 4.6-dB (BTB) and 4-dB (10 km SMF) for the broadband UWB signal.
High Rate Digital Demodulator ASIC
NASA Technical Reports Server (NTRS)
Ghuman, Parminder; Sheikh, Salman; Koubek, Steve; Hoy, Scott; Gray, Andrew
1998-01-01
The architecture of High Rate (600 Mega-bits per second) Digital Demodulator (HRDD) ASIC capable of demodulating BPSK and QPSK modulated data is presented in this paper. The advantages of all-digital processing include increased flexibility and reliability with reduced reproduction costs. Conventional serial digital processing would require high processing rates necessitating a hardware implementation in other than CMOS technology such as Gallium Arsenide (GaAs) which has high cost and power requirements. It is more desirable to use CMOS technology with its lower power requirements and higher gate density. However, digital demodulation of high data rates in CMOS requires parallel algorithms to process the sampled data at a rate lower than the data rate. The parallel processing algorithms described here were developed jointly by NASA's Goddard Space Flight Center (GSFC) and the Jet Propulsion Laboratory (JPL). The resulting all-digital receiver has the capability to demodulate BPSK, QPSK, OQPSK, and DQPSK at data rates in excess of 300 Mega-bits per second (Mbps) per channel. This paper will provide an overview of the parallel architecture and features of the HRDR ASIC. In addition, this paper will provide an over-view of the implementation of the hardware architectures used to create flexibility over conventional high rate analog or hybrid receivers. This flexibility includes a wide range of data rates, modulation schemes, and operating environments. In conclusion it will be shown how this high rate digital demodulator can be used with an off-the-shelf A/D and a flexible analog front end, both of which are numerically computer controlled, to produce a very flexible, low cost high rate digital receiver.
NASA Astrophysics Data System (ADS)
Antony, Joby; Mathuria, D. S.; Chaudhary, Anup; Datta, T. S.; Maity, T.
2017-02-01
Cryogenic network for linear accelerator operations demand a large number of Cryogenic sensors, associated instruments and other control-instrumentation to measure, monitor and control different cryogenic parameters remotely. Here we describe an alternate approach of six types of newly designed integrated intelligent cryogenic instruments called device-servers which has the complete circuitry for various sensor-front-end analog instrumentation and the common digital back-end http-server built together, to make crateless PLC-free model of controls and data acquisition. These identified instruments each sensor-specific viz. LHe server, LN2 Server, Control output server, Pressure server, Vacuum server and Temperature server are completely deployed over LAN for the cryogenic operations of IUAC linac (Inter University Accelerator Centre linear Accelerator), New Delhi. This indigenous design gives certain salient features like global connectivity, low cost due to crateless model, easy signal processing due to integrated design, less cabling and device-interconnectivity etc.
Wide-Band Heterodyne Submillimetre Wave Spectrometer for Planetary Atmospheres
NASA Technical Reports Server (NTRS)
Schlecht, Erich
2010-01-01
We present calculations and measurements on a passive submillimetre wave spectroscopic sounder to gather data on the thermal structure, dynamics and composition of the upper atmosphere of a planet, e.g. the stratosphere of Jupiter, or the entire thickness of the atmosphere of Mars. The instrument will be capable of measuring wind speeds, temperature, pressure, and key constituent concentrations in the stratosphere of the target planet. This instrument consists of a Schottky diode based front end and a digital back-end spectrometer. It differs from previous space-based spectrometers in its combination of wide tunability (520-590 GHz), and rapid frequency switching between widely spaced lines within that range. This will enable near simultaneous observation of multiple lines, which is critical to the reconstruction of atmospheric pressure and density versus altitude profiles. At the same time frequency accuracy must be high to enable wind speeds to be determined directly by measurement of the line's Doppler shift.
Second-Generation Six-Limbed Experimental Robot
NASA Technical Reports Server (NTRS)
Kennedy, Brett; Okon, Avi; Aghazarian, Hrand; Robinson, Matthew; Garrett, Michael; Magnone, Lee
2004-01-01
The figure shows the LEMUR II - the second generation of the Limbed Excursion Mechanical Utility Robot (LEMUR), which was described in "Six-Legged Experimental Robot" (NPO-20897), NASA Tech Briefs, Vol. 25, No. 12 (December 2001), page 58. The LEMUR II incorporates a number of improvements, including new features, that extend its capabilities beyond those of its predecessor, which is now denoted the LEMUR I. To recapitulate: the LEMUR I was a six-limbed robot for demonstrating robotic capabilities for assembly, maintenance, and inspection. The LEMUR I was designed to be capable of walking autonomously along a truss structure toward a mechanical assembly at a prescribed location and to perform other operations. The LEMUR I was equipped with stereoscopic video cameras and image-data-processing circuitry for navigation and mechanical operations. It was also equipped with a wireless modem, through which it could be commanded remotely. Upon arrival at a mechanical assembly, the LEMUR I would perform simple mechanical operations with one or both of its front limbs. It could also transmit images to a host computer. Each of the six limbs of the LEMUR I was operated independently. Each of the four rear limbs had three degrees of freedom (DOFs), while each of the front two limbs had four DOFs. The front two limbs were designed to hold, operate, and/or be integrated with tools. The LEMUR I included an onboard computer equipped with an assortment of digital control circuits, digital input/output circuits, analog-to-digital converters for input, and digital-to-analog (D/A) converters for output. Feedback from optical encoders in the limb actuators was utilized for closed-loop microcomputer control of the positions and velocities of the actuators. The LEMUR II incorporates the following improvements over the LEMUR I: a) The drive trains for the joints of the LEMUR II are more sophisticated, providing greater torque and accuracy. b) The six limbs are arranged symmetrically about a hexagonal body platform instead of in straight lines along the sides. This symmetrical arrangement is more conducive to omnidirectional movement in a plane. c) The number of degrees of freedom of each of the rear four limbs has been increased by one. Now, every limb has four degrees of freedom: three at the hip (or shoulder, depending on one s perspective) and one at the knee (or elbow, depending on one s perspective). d) Now every limb (instead of only the two front limbs) can perform operations. For this purpose, each limb is tipped with an improved quick-release mechanism for swapping of end-effector tools. e) New end-effector tools have been developed. These include an instrumented rotary driver that accepts all tool bits that have 0.125-in. (3.175-mm)-diameter shanks, a charge-coupled-device video camera, a super bright light-emitting diode for illuminating the work area of the robot, and a generic collet tool that can be quickly and inexpensively modified to accept any cylindrical object up to 0.5 in. (12.7 mm) in diameter. f) The stereoscopic cameras are mounted on a carriage that moves along a circular track, thereby providing for omnidirectional machine vision. g) The control software has been augmented with software that implements innovations reported in two prior NASA Tech Briefs articles: the HIPS algorithm ["Hybrid Image-Plane/Stereo Manipulation" (NPO-30492), Vol. 28, No. 7 (July 2004), page 55] and the CAMPOUT architecture ["An Architecture for Controlling Multiple Robots" (NPO-30345), Vol. 28, No. 10 (October 2004), page 65].
Duregger, Katharina; Hayn, Dieter; Nitzlnader, Michael; Kropf, Martin; Falgenhauer, Markus; Ladenstein, Ruth; Schreier, Günter
2016-01-01
Electronic Patient Reported Outcomes (ePRO) gathered using telemonitoring solutions might be a valuable source of information in rare cancer research. The objective of this paper was to develop a concept and implement a prototype for introducing ePRO into the existing neuroblastoma research network by applying Near Field Communication and mobile technology. For physicians, an application was developed for registering patients within the research network and providing patients with an ID card and a PIN for authentication when transmitting telemonitoring data to the Electronic Data Capture system OpenClinica. For patients, a previously developed telemonitoring system was extended by a Simple Object Access Protocol (SOAP) interface for transmitting nine different health parameters and toxicities. The concept was fully implemented on the front-end side. The developed application for physicians was prototypically implemented and the mobile application of the telemonitoring system was successfully connected to OpenClinica. Future work will focus on the implementation of the back-end features.
Relativistic runaway ionization fronts.
Luque, A
2014-01-31
We investigate the first example of self-consistent impact ionization fronts propagating at relativistic speeds and involving interacting, high-energy electrons. These fronts, which we name relativistic runaway ionization fronts, show remarkable features such as a bulk speed within less than one percent of the speed of light and the stochastic selection of high-energy electrons for further acceleration, which leads to a power-law distribution of particle energies. A simplified model explains this selection in terms of the overrun of Coulomb-scattered electrons. Appearing as the electromagnetic interaction between electrons saturates the exponential growth of a relativistic runaway electron avalanche, relativistic runaway ionization fronts may occur in conjunction with terrestrial gamma-ray flashes and thus explain recent observations of long, power-law tails in the terrestrial gamma-ray flash energy spectrum.
Front-End Analysis Cornerstone of Logistics
NASA Technical Reports Server (NTRS)
Nager, Paul J.
2000-01-01
The presentation provides an overview of Front-End Logistics Support Analysis (FELSA), when it should be performed, benefits of performing FELSA and why it should be performed, how it is conducted, and examples.
Controlling front-end electronics boards using commercial solutions
NASA Astrophysics Data System (ADS)
Beneyton, R.; Gaspar, C.; Jost, B.; Schmeling, S.
2002-04-01
LHCb is a dedicated B-physics experiment under construction at CERN's large hadron collider (LHC) accelerator. This paper will describe the novel approach LHCb is taking toward controlling and monitoring of electronics boards. Instead of using the bus in a crate to exercise control over the boards, we use credit-card sized personal computers (CCPCs) connected via Ethernet to cheap control PCs. The CCPCs will provide a simple parallel, I2C, and JTAG buses toward the electronics board. Each board will be equipped with a CCPC and, hence, will be completely independently controlled. The advantages of this scheme versus the traditional bus-based scheme will be described. Also, the integration of the controls of the electronics boards into a commercial supervisory control and data acquisition (SCADA) system will be shown.
Reconfigurable signal processor designs for advanced digital array radar systems
NASA Astrophysics Data System (ADS)
Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining
2017-05-01
The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.
A single-board NMR spectrometer based on a software defined radio architecture
NASA Astrophysics Data System (ADS)
Tang, Weinan; Wang, Weimin
2011-01-01
A single-board software defined radio (SDR) spectrometer for nuclear magnetic resonance (NMR) is presented. The SDR-based architecture, realized by combining a single field programmable gate array (FPGA) and a digital signal processor (DSP) with peripheral radio frequency (RF) front-end circuits, makes the spectrometer compact and reconfigurable. The DSP, working as a pulse programmer, communicates with a personal computer via a USB interface and controls the FPGA through a parallel port. The FPGA accomplishes digital processing tasks such as a numerically controlled oscillator (NCO), digital down converter (DDC) and gradient waveform generator. The NCO, with agile control of phase, frequency and amplitude, is part of a direct digital synthesizer that is used to generate an RF pulse. The DDC performs quadrature demodulation, multistage low-pass filtering and gain adjustment to produce a bandpass signal (receiver bandwidth from 3.9 kHz to 10 MHz). The gradient waveform generator is capable of outputting shaped gradient pulse waveforms and supports eddy-current compensation. The spectrometer directly acquires an NMR signal up to 30 MHz in the case of baseband sampling and is suitable for low-field (<0.7 T) application. Due to the featured SDR architecture, this prototype has flexible add-on ability and is expected to be suitable for portable NMR systems.
Surface Profile and Stress Field Evaluation using Digital Gradient Sensing Method
Miao, C.; Sundaram, B. M.; Huang, L.; ...
2016-08-09
Shape and surface topography evaluation from measured orthogonal slope/gradient data is of considerable engineering significance since many full-field optical sensors and interferometers readily output accurate data of that kind. This has applications ranging from metrology of optical and electronic elements (lenses, silicon wafers, thin film coatings), surface profile estimation, wave front and shape reconstruction, to name a few. In this context, a new methodology for surface profile and stress field determination based on a recently introduced non-contact, full-field optical method called digital gradient sensing (DGS) capable of measuring small angular deflections of light rays coupled with a robust finite-difference-based least-squaresmore » integration (HFLI) scheme in the Southwell configuration is advanced here. The method is demonstrated by evaluating (a) surface profiles of mechanically warped silicon wafers and (b) stress gradients near growing cracks in planar phase objects.« less
NASA Astrophysics Data System (ADS)
Mantri, Archana
2014-05-01
The intent of the study presented in this paper is to show that the model of problem-based learning (PBL) can be made scalable by designing curriculum around a set of open-ended problems (OEPs). The detailed statistical analysis of the data collected to measure the effects of traditional and PBL instructions for three courses in Electronics and Communication Engineering, namely Analog Electronics, Digital Electronics and Pulse, Digital & Switching Circuits is presented here. It measures the effects of pedagogy, gender and cognitive styles on the knowledge, skill and attitude of the students. The study was conducted two times with content designed around same set of OEPs but with two different trained facilitators for all the three courses. The repeatability of results for effects of the independent parameters on dependent parameters is studied and inferences are drawn.
Readout Electronics for the Central Drift Chamber of the Belle-II Detector
NASA Astrophysics Data System (ADS)
Uchida, Tomohisa; Taniguchi, Takashi; Ikeno, Masahiro; Iwasaki, Yoshihito; Saito, Masatoshi; Shimazaki, Shoichi; Tanaka, Manobu M.; Taniguchi, Nanae; Uno, Shoji
2015-08-01
We have developed readout electronics for the central drift chamber (CDC) of the Belle-II detector. The space near the endplate of the CDC for installation of the electronics was limited by the detector structure. Due to the large amounts of data generated by the CDC, a high-speed data link, with a greater than one gigabit transfer rate, was required to transfer the data to a back-end computer. A new readout module was required to satisfy these requirements. This module processes 48 signals from the CDC, converts them to digital data and transfers it directly to the computer. All functions that transfer digital data via the high speed link were implemented on the single module. We have measured its electrical characteristics and confirmed that the results satisfy the requirements of the Belle-II experiment.
Concepts for a Muon Accelerator Front-End
DOE Office of Scientific and Technical Information (OSTI.GOV)
Stratakis, Diktys; Berg, Scott; Neuffer, David
2017-03-16
We present a muon capture front-end scheme for muon based applications. In this Front-End design, a proton bunch strikes a target and creates secondary pions that drift into a capture channel, decaying into muons. A series of rf cavities forms the resulting muon beams into a series of bunches of differerent energies, aligns the bunches to equal central energies, and initiates ionization cooling. We also discuss the design of a chicane system for the removal of unwanted secondary particles from the muon capture region and thus reduce activation of the machine. With the aid of numerical simulations we evaluate themore » performance of this Front-End scheme as well as study its sensitivity against key parameters such as the type of target, the number of rf cavities and the gas pressure of the channel.« less
NASA Astrophysics Data System (ADS)
Ahangarianabhari, Mahdi; Macera, Daniele; Bertuccio, Giuseppe; Malcovati, Piero; Grassi, Marco
2015-01-01
We present the design and the first experimental characterization of VEGA, an Application Specific Integrated Circuit (ASIC) designed to read out large area monolithic linear Silicon Drift Detectors (SDD's). VEGA consists of an analog and a digital/mixed-signal section to accomplish all the functionalities and specifications required for high resolution X-ray spectroscopy in the energy range between 500 eV and 50 keV. The analog section includes a charge sensitive preamplifier, a shaper with 3-bit digitally selectable shaping times from 1.6 μs to 6.6 μs and a peak stretcher/sample-and-hold stage. The digital/mixed-signal section includes an amplitude discriminator with coarse and fine threshold level setting, a peak discriminator and a logic circuit to fulfill pile-up rejection, signal sampling, trigger generation, channel reset and the preamplifier and discriminators disabling functionalities. A Serial Peripherical Interface (SPI) is integrated in VEGA for loading and storing all configuration parameters in an internal register within few microseconds. The VEGA ASIC has been designed and manufactured in 0.35 μm CMOS mixed-signal technology in single and 32 channel versions with dimensions of 200 μm×500 μm per channel. A minimum intrinsic Equivalent Noise Charge (ENC) of 12 electrons r.m.s. at 3.6 μs peaking time and room temperature is measured and the linearity error is between -0.9% and +0.6% in the whole input energy range. The total power consumption is 481 μW and 420 μW per channel for the single and 32 channels version, respectively. A comparison with other ASICs for X-ray SDD's shows that VEGA has a suitable low noise and offers high functionality as ADC-ready signal processing but at a power consumption that is a factor of four lower than other similar existing ASICs.
High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration
ERIC Educational Resources Information Center
Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.
2010-01-01
In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…
Ultra-low-power wearable biopotential sensor nodes.
Yazicioglu, R F; Torfs, T; Penders, J; Romero, I; Kim, H; Merken, P; Gyselinckx, B; Yoo, H J; Van Hoof, C
2009-01-01
This paper discusses ultra-low-power wireless sensor nodes intended for wearable biopotential monitoring. Specific attention is given to mixed-signal design approaches and their impact on the overall system power dissipation. Examples of trade-offs in power dissipation between analog front-ends and digital signal processing are also given. It is shown how signal filtering can further reduce the internal power consumption of a node. Such power saving approaches are indispensable as real-life tests of custom wireless ECG patches reveal the need for artifact detection and correction. The power consumption of such additional features has to come from power savings elsewhere in the system as the overall power budget cannot increase.
Digital Health Intervention for Asthma: Patient-Reported Value and Usability.
Merchant, Rajan; Inamdar, Rubina; Henderson, Kelly; Barrett, Meredith; Su, Jason G; Riley, Jesika; Van Sickle, David; Stempel, David
2018-06-04
Although digital health tools are increasingly recognized as effective in improving clinical outcomes such as asthma control and medication adherence, few studies have assessed patient experiences and perception of value. The aim of this study was to evaluate patient satisfaction, perception of usability and value, and desire to continue after 12 months of using a digital health intervention to support asthma management. Participants were enrolled in a randomized controlled study evaluating the impact of a digital health platform for asthma management. Participants used electronic inhaler sensors to track medication use and accessed their information in a digital health platform. Electronic surveys were administered to intervention arm participants aged 12 years and older after 12 months of use. The survey assessed asthma control, patient satisfaction with the sensor device, and perception of the usability and value of the digital health platform through closed-ended and open-ended questions. Logistic regression models were used to assess the impact of participants' characteristics on survey completion, satisfaction, and perception of value. Of the 207 intervention arm participants aged 12 years and older, 89 submitted survey responses (42.9% response rate). Of these 89 participants, 70 reported being very satisfied (79%, 70/89) or somewhat satisfied (20%, 18/89) with the inhaler sensor device. Moreover, 93% (83/89) expressed satisfaction with the reports, and 90% (80/89) found the information from the reports useful for learning about their asthma. In addition, 72% (64/89) of the participants reported that they were interested in continuing to use the sensor and platform beyond the study. There were no significant differences in satisfaction with the device or the platform across participants' characteristics, including device type, age, sex, insurance type, asthma control, or syncing history; however, participants with smartphones and longer participation were more likely to take the survey. Electronic sensors and a digital health platform were well received by participants who reported satisfaction and perceived value. These results were consistent across multiple participants' characteristics. These findings can add to a limited literature to keep improving digital health interventions and ensure the meaningful and enduring impact on patient outcomes. ©Rajan Merchant, Rubina Inamdar, Kelly Henderson, Meredith Barrett, Jason G Su, Jesika Riley, David Van Sickle, David Stempel. Originally published in JMIR Mhealth and Uhealth (http://mhealth.jmir.org), 04.06.2018.