Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2000-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

An 11-bit and 39 ps resolution time-to-digital converter for ADPLL in digital television

NASA Astrophysics Data System (ADS)

Liu, Wei; (Ruth) Li, Wei; Ren, P.; Lin, C. L.; Zhang, Shengdong; Wang, Yangyuan

2010-04-01

We propose and demonstrate an 11-bit time-to-digital converter (TDC) for all-digital phase-locked loops (ADPLLs) in digital television. The proposed TDC converts the width of the input pulse into digital output with the tap space of the outputs of a free-running ring oscillator (FRO) being the conversion resolution. The FRO is in a structure of coiled cell array and the TDC core is symmetrical in the input structure. This leads to equally spaced taps in the reference clocks and thereby a high TDC conversion linearity. The TDC is fabricated in 0.13 μm CMOS process and the chip area is 0.025 mm2. The measurement results show that the TDC has a conversion resolution of 39 ps at 1.2 V power supply and a 4.5 ns dead time in the 11-bits output case. Both the differential non-linearity (DNL) and integral non-linearity (INL) are below 0.5 LSB. The power consumption of the whole circuit is 4.2 mW.

High-Speed Binary-Output Image Sensor

NASA Technical Reports Server (NTRS)

Fossum, Eric; Panicacci, Roger A.; Kemeny, Sabrina E.; Jones, Peter D.

1996-01-01

Photodetector outputs digitized by circuitry on same integrated-circuit chip. Developmental special-purpose binary-output image sensor designed to capture up to 1,000 images per second, with resolution greater than 10 to the 6th power pixels per image. Lower-resolution but higher-frame-rate prototype of sensor contains 128 x 128 array of photodiodes on complementary metal oxide/semiconductor (CMOS) integrated-circuit chip. In application for which it is being developed, sensor used to examine helicopter oil to determine whether amount of metal and sand in oil sufficient to warrant replacement.

CMOS output buffer wave shaper

NASA Technical Reports Server (NTRS)

Albertson, L.; Whitaker, S.; Merrell, R.

1990-01-01

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

Optimal generalized multistep integration formulae for real-time digital simulation

NASA Technical Reports Server (NTRS)

Moerder, D. D.; Halyo, N.

1985-01-01

The problem of discretizing a dynamical system for real-time digital simulation is considered. Treating the system and its simulation as stochastic processes leads to a statistical characterization of simulator fidelity. A plant discretization procedure based on an efficient matrix generalization of explicit linear multistep discrete integration formulae is introduced, which minimizes a weighted sum of the mean squared steady-state and transient error between the system and simulator outputs.

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

PubMed

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Multi-speed multi-phase resolver converter

NASA Technical Reports Server (NTRS)

Alhorn, Dean (Inventor); Howard, David (Inventor)

1994-01-01

A multiphase converter circuit generates a plurality of sinusoidal outputs of displaced phase and given speed value from the output of an angular resolver system attachable to a motor excited by these multi-phase outputs, the resolver system having a lower speed value than that of the motor. The angular resolver system provides in parallel format sequential digital numbers indicative of the amount of rotation of the shaft of an angular position sensor associated with the angular resolver system. These numbers are used to excite simultaneously identical addresses of a plurality of addressable memory systems, each memory system having stored therein at sequential addresses sequential values of a sinusoidal wavetrain of a given number of sinusoids. The stored wavetrain values represent sinusoids displaced from each other in phase according to the number of output phases desired. A digital-to-analog converter associated with each memory system converts each accessed word to a corresponding analog value to generate attendant to rotation of the angular resolver a sinusoidal wave of proper phase at each of the plurality of outputs. By properly orienting the angular resolver system with respect to the rotor of the motor, essentially ripple-free torque is supplied to the rotor. The angular resolver system may employ an analog resolver feeding an integrated circuit resolver-to-digital converter to produce the requisite digital values serving as addresses. Alternative versions employing incremental or absolute encoders are also described.

Multi-speed multi-phase resolver converter

NASA Technical Reports Server (NTRS)

Alhorn, Dean C. (Inventor); Howard, David E. (Inventor)

1995-01-01

A multiphase converter circuit generates a plurality of sinusoidal outputs of displaced phase and given speed value from the output of an angular resolver system attachable to a motor excited by these multi-phase outputs, the resolver system having a lower speed value than that of the motor. The angular resolver system provides in parallel format sequential digital numbers indicative of the amount of rotation of the shaft of an angular position sensor associated with the angular resolver system. These numbers are used to excite simultaneously identical addresses of a plurality of addressable memory systems, each memory system having stored therein at sequential addresses sequential values of a sinusoidal wavetrain of a given number of sinusoids. The stored wavetrain values represent sinusoids displaced from each other in phase according to the number of output phases desired. A digital-to-analog converter associated with each memory system converts each accessed word to a corresponding analog value to generate attendant to rotation of the angular resolver a sinusoidal wave of proper phase at each of the plurality of outputs. By properly orienting the angular resolver system with respect to the rotor of the motor, essentially ripple-free torque is supplied to the rotor. The angular resolver system may employ an analog resolver feeding an integrated circuit resolver-to-digital converter to produce the requisite digital values serving as addresses. Alternative versions employing incremental or absolute encoders are also described.

Accelerometer Method and Apparatus for Integral Display and Control Functions

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1996-01-01

Method and apparatus for detecting mechanical vibrations and outputting a signal in response thereto. Art accelerometer package having integral display and control functions is suitable for mounting upon the machinery to be monitored. Display circuitry provides signals to a bar graph display which may be used to monitor machine conditions over a period of time. Control switches may be set which correspond to elements in the bar graph to provide an alert if vibration signals increase in amplitude over a selected trip point. The circuitry is shock mounted within the accelerometer housing. The method provides for outputting a broadband analog accelerometer signal, integrating this signal to produce a velocity signal, integrating and calibrating the velocity signal before application to a display driver, and selecting a trip point at which a digitally compatible output signal is generated.

Accelerometer Method and Apparatus for Integral Display and Control Functions

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1998-01-01

Method and apparatus for detecting mechanical vibrations and outputting a signal in response thereto is discussed. An accelerometer package having integral display and control functions is suitable for mounting upon the machinery to be monitored. Display circuitry provides signals to a bar graph display which may be used to monitor machine conditions over a period of time. Control switches may be set which correspond to elements in the bar graph to provide an alert if vibration signals increase in amplitude over a selected trip point. The circuitry is shock mounted within the accelerometer housing. The method provides for outputting a broadband analog accelerometer signal, integrating this signal to produce a velocity signal, integrating and calibrating the velocity signal before application to a display driver, and selecting a trip point at which a digitally compatible output signal is generated.

Durand Neighbourhood Heritage Inventory: Toward a Digital Citywide Survey Approach to Heritage Planning in Hamilton

NASA Astrophysics Data System (ADS)

Angel, V.; Garvey, A.; Sydor, M.

2017-08-01

In the face of changing economies and patterns of development, the definition of heritage is diversifying, and the role of inventories in local heritage planning is coming to the fore. The Durand neighbourhood is a layered and complex area located in inner-city Hamilton, Ontario, Canada, and the second subject area in a set of pilot inventory studies to develop a new city-wide inventory strategy for the City of Hamilton,. This paper presents an innovative digital workflow developed to undertake the Durand Built Heritage Inventory project. An online database was developed to be at the centre of all processes, including digital documentation, record management, analysis and variable outputs. Digital tools were employed for survey work in the field and analytical work in the office, resulting in a GIS-based dataset that can be integrated into Hamilton's larger municipal planning system. Together with digital mapping and digitized historical resources, the Durand database has been leveraged to produce both digital and static outputs to shape recommendations for the protection of Hamilton's heritage resources.

Analog/digital pH meter system I.C.

NASA Technical Reports Server (NTRS)

Vincent, Paul; Park, Jea

1992-01-01

The project utilizes design automation software tools to design, simulate, and fabricate a pH meter integrated circuit (IC) system including a successive approximation type seven-bit analog to digital converter circuits using a 1.25 micron N-Well CMOS MOSIS process. The input voltage ranges from 0.5 to 1.0 V derived from a special type pH sensor, and the output is a three-digit decimal number display of pH with one decimal point.

Through-the-earth radio

DOEpatents

Reagor, David [Los Alamos, NM; Vasquez-Dominguez, Jose [Los Alamos, NM

2006-05-09

A method and apparatus for effective through-the-earth communication involves a signal input device connected to a transmitter operating at a predetermined frequency sufficiently low to effectively penetrate useful distances through-the earth, and having an analog to digital converter receiving the signal input and passing the signal input to a data compression circuit that is connected to an encoding processor, the encoding processor output being provided to a digital to analog converter. An amplifier receives the analog output from the digital to analog converter for amplifying said analog output and outputting said analog output to an antenna. A receiver having an antenna receives the analog output passes the analog signal to a band pass filter whose output is connected to an analog to digital converter that provides a digital signal to a decoding processor whose output is connected to an data decompressor, the data decompressor providing a decompressed digital signal to a digital to analog converter. An audio output device receives the analog output form the digital to analog converter for producing audible output.

Neural Networks For Demodulation Of Phase-Modulated Signals

NASA Technical Reports Server (NTRS)

Altes, Richard A.

1995-01-01

Hopfield neural networks proposed for demodulating quadrature phase-shift-keyed (QPSK) signals carrying digital information. Networks solve nonlinear integral equations prior demodulation circuits cannot solve. Consists of set of N operational amplifiers connected in parallel, with weighted feedback from output terminal of each amplifier to input terminals of other amplifiers. Used to solve signal processing problems. Implemented as analog very-large-scale integrated circuit that achieves rapid convergence. Alternatively, implemented as digital simulation of such circuit. Also used to improve phase estimation performance over that of phase-locked loop.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

A 1024×768-12μm Digital ROIC for uncooled microbolometer FPAs

NASA Astrophysics Data System (ADS)

Eminoglu, Selim

2017-02-01

This paper reports the development of a new digital microbolometer Readout Integrated Circuit (D-ROIC), called MT10212BD. It has a format of 1024 × 768 (XGA) and a pixel pitch of 12μm. MT10212BD is Mikro Tasarim's second 12μm pitch microbolometer ROIC, which is developed specifically for surface micro machined microbolometer detector arrays with small pixel pitch using high-TCR pixel materials, such as VOx and a Si. MT10212BD has an alldigital system on-chip architecture, which generates programmable timing and biasing, and performs 14-bit analog to digital conversion (ADC). The signal processing chain in the ROIC is composed of pixel bias circuitry, integrator based programmable gain amplifier followed by column parallel ADC circuitry. MT10212BD has a serial programming interface that can be used to configure the programmable ROIC features and to load the Non-Uniformity-Correction (NUC) date to the ROIC. MT10212BD has a total of 8 high-speed serial digital video outputs, which can be programmed to operate in the 2, 4, and 8-output modes and can support frames rates above 60 fps. The high-speed serial digital outputs supports data rates as high as 400 Mega-bits/s, when operated at 50 MHz system clock frequency. There is an on-chip phase-locked-loop (PLL) based timing circuitry to generate the high speed clocks used in the ROIC. The ROIC is designed to support pixel resistance values ranging from 30KΩ to 90kΩ, with a nominal value of 60KΩ. The ROIC has a globally programmable gain in the column readout, which can be adjusted based on the detector resistance value.

Hardware synthesis from DDL description. [simulating a digital system for computerized design of large scale integrated circuits

NASA Technical Reports Server (NTRS)

Shiva, S. G.; Shah, A. M.

1980-01-01

The details of digital systems can be conveniently input into the design automation system by means of hardware description language (HDL). The computer aided design and test (CADAT) system at NASA MSFC is used for the LSI design. The digital design language (DDL) was selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. Problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system are addressed.

Digital redesign of anti-wind-up controller for cascaded analog system.

PubMed

Chen, Y S; Tsai, J S H; Shieh, L S; Moussighi, M M

2003-01-01

The cascaded conventional anti-wind-up (CAW) design method for integral controller is discussed. Then, the prediction-based digital redesign methodology is utilized to find the new pulse amplitude modulated (PAM) digital controller for effective digital control of the analog plant with input saturation constraint. The desired digital controller is determined from existing or pre-designed CAW analog controller. The proposed method provides a novel methodology for indirect digital design of a continuous-time unity output-feedback system with a cascaded analog controller as in the case of PID controllers for industrial control processes with the presence of actuator saturations. It enables us to implement an existing or pre-designed cascaded CAW analog controller via a digital controller effectively.

A Temperature-Hardened Sensor Interface with a 12-Bit Digital Output Using a Novel Pulse Width Modulation Technique

PubMed Central

Badets, Franck; Nouet, Pascal; Masmoudi, Mohamed

2018-01-01

A fully integrated sensor interface for a wide operational temperature range is presented. It translates the sensor signal into a pulse width modulated (PWM) signal that is then converted into a 12-bit digital output. The sensor interface is based on a pair of injection locked oscillators used to implement a differential time-domain architecture with low sensitivity to temperature variations. A prototype has been fabricated using a 180 nm partially depleted silicon-on-insulator (SOI) technology. Experimental results demonstrate a thermal stability as low as 65 ppm/°C over a large temperature range from −20 °C up to 220 °C. PMID:29621171

Operation and tests of a DDC101 A/D

NASA Astrophysics Data System (ADS)

Nguyen, H.

1994-11-01

For the KTeV PMT laser monitoring system, one needs a high resolution device with a large dynamic range to be used for digitizing PIN photodiodes. The dynamic range should be wider than or comparable to the KTeV digitizer (17-bits). The Burr-Brown DDC101 is a precision, wide dynamic range, charge digitizing A/D converter with 20-bit resolution, packaged in a 28-pin plastic, double-wide DP. Low level current output devices such as photosensors can be directly connected to its input. The digital output can be clocked-out serially from the pins. For typical operations, a relatively wide gate of 1 msec should be used. The full scale charge is 500 pC for unipolar mode. The bipolar mode scale is +/- 250 pC. The advertised integral nonlinearity is 0.003% of FSR. This document describes only the basic DDC101 operations since full detail can be found in the DDC101 manual. Tests results are given in section 3.

Digitally Controllable Current Amplifier and Current Conveyors in Practical Application of Controllable Frequency Filter

NASA Astrophysics Data System (ADS)

Polak, Josef; Jerabek, Jan; Langhammer, Lukas; Sotner, Roman; Dvorak, Jan; Panek, David

2016-07-01

This paper presents the simulations results in comparison with the measured results of the practical realization of the multifunctional second order frequency filter with a Digitally Adjustable Current Amplifier (DACA) and two Dual-Output Controllable Current Conveyors (CCCII +/-). This filter is designed for use in current mode. The filter was designed of the single input multiple outputs (SIMO) type, therefore it has only one input and three outputs with individual filtering functions. DACA element used in a newly proposed circuit is present in form of an integrated chip and the current conveyors are implemented using the Universal Current Conveyor (UCC) chip with designation UCC-N1B. Proposed frequency filter enables independent control of the pole frequency using parameters of two current conveyors and also independent control of the quality factor by change of a current gain of DACA.

Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

NASA Technical Reports Server (NTRS)

Wrigley, Christopher James (Inventor); Hancock, Bruce R. (Inventor); Cunningham, Thomas J. (Inventor); Newton, Kenneth W. (Inventor)

2014-01-01

An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

Digital phase-locked loop

NASA Technical Reports Server (NTRS)

Cliff, R. A. (Inventor)

1975-01-01

An digital phase-locked loop is provided for deriving a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.

A long time low drift integrator with temperature control

NASA Astrophysics Data System (ADS)

Zhang, Donglai; Yan, Xiaolan; Zhang, Enchao; Pan, Shimin

2016-10-01

The output of an operational amplifier always contains signals that could not have been predicted, even with knowledge of the input and an accurately determined closed-loop transfer function. These signals lead to integrator zero-drift over time. A new type of integrator system with a long-term low-drift characteristic has therefore been designed. The integrator system is composed of a temperature control module and an integrator module. The aluminum printed circuit board of the integrator is glued to a thermoelectric cooler to maintain the electronic components at a stable temperature. The integration drift is automatically compensated using an analog-to-digital converter/proportional integration/digital-to-analog converter control circuit. Performance testing in a standard magnet shows that the proposed integrator, which has an integration time constant of 10 ms, has a low integration drift (<5 mV) over 1000 s after repeated measurements. The integrator can be used for magnetic flux measurements in most tokamaks and in the wire rope nondestructive test.

A long time low drift integrator with temperature control.

PubMed

Zhang, Donglai; Yan, Xiaolan; Zhang, Enchao; Pan, Shimin

2016-10-01

The output of an operational amplifier always contains signals that could not have been predicted, even with knowledge of the input and an accurately determined closed-loop transfer function. These signals lead to integrator zero-drift over time. A new type of integrator system with a long-term low-drift characteristic has therefore been designed. The integrator system is composed of a temperature control module and an integrator module. The aluminum printed circuit board of the integrator is glued to a thermoelectric cooler to maintain the electronic components at a stable temperature. The integration drift is automatically compensated using an analog-to-digital converter/proportional integration/digital-to-analog converter control circuit. Performance testing in a standard magnet shows that the proposed integrator, which has an integration time constant of 10 ms, has a low integration drift (<5 mV) over 1000 s after repeated measurements. The integrator can be used for magnetic flux measurements in most tokamaks and in the wire rope nondestructive test.

Design of a Closed-Loop, Bidirectional Brain Machine Interface System With Energy Efficient Neural Feature Extraction and PID Control.

PubMed

Liu, Xilin; Zhang, Milin; Richardson, Andrew G; Lucas, Timothy H; Van der Spiegel, Jan

2017-08-01

This paper presents a bidirectional brain machine interface (BMI) microsystem designed for closed-loop neuroscience research, especially experiments in freely behaving animals. The system-on-chip (SoC) consists of 16-channel neural recording front-ends, neural feature extraction units, 16-channel programmable neural stimulator back-ends, in-channel programmable closed-loop controllers, global analog-digital converters (ADC), and peripheral circuits. The proposed neural feature extraction units includes 1) an ultra low-power neural energy extraction unit enabling a 64-step natural logarithmic domain frequency tuning, and 2) a current-mode action potential (AP) detection unit with time-amplitude window discriminator. A programmable proportional-integral-derivative (PID) controller has been integrated in each channel enabling a various of closed-loop operations. The implemented ADCs include a 10-bit voltage-mode successive approximation register (SAR) ADC for the digitization of the neural feature outputs and/or local field potential (LFP) outputs, and an 8-bit current-mode SAR ADC for the digitization of the action potential outputs. The multi-mode stimulator can be programmed to perform monopolar or bipolar, symmetrical or asymmetrical charge balanced stimulation with a maximum current of 4 mA in an arbitrary channel configuration. The chip has been fabricated in 0.18 μ m CMOS technology, occupying a silicon area of 3.7 mm 2 . The chip dissipates 56 μW/ch on average. General purpose low-power microcontroller with Bluetooth module are integrated in the system to provide wireless link and SoC configuration. Methods, circuit techniques and system topology proposed in this work can be used in a wide range of relevant neurophysiology research, especially closed-loop BMI experiments.

CMOS-compatible InP/InGaAs digital photoreceiver

DOEpatents

Lovejoy, Michael L.; Rose, Benny H.; Craft, David C.; Enquist, Paul M.; Slater, Jr., David B.

1997-01-01

A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1000 Mb/s or more.

CMOS-compatible InP/InGaAs digital photoreceiver

DOEpatents

Lovejoy, M.L.; Rose, B.H.; Craft, D.C.; Enquist, P.M.; Slater, D.B. Jr.

1997-11-04

A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1,000 Mb/s or more. 4 figs.

Active-Pixel Image Sensor With Analog-To-Digital Converters

NASA Technical Reports Server (NTRS)

Fossum, Eric R.; Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.

1995-01-01

Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

Characteristics of digital micromirror projection for 3D shape measurement at extreme speed

NASA Astrophysics Data System (ADS)

Höfling, Roland; Aswendt, Petra; Leischnig, Frank; Förster, Matthias

2015-03-01

3D shape measurement is one of the growing industrial applications of the Texas Instruments DLP® micro-mirror device. This paper presents investigations on precision and repeatability of that spatial light modulators output when it is driven up to its high-speed limit. The study concerns the basic switching behavior of the individual micro-mirror at different frame rates ranging over three orders of magnitude. The 3D shape measuring methodologies are focused on phase encoded triangulation, i.e. the projection of sinusoidal patterns. The DLP chip is a bi-stable device providing an on/off pattern at each certain moment in time, i.e. it has a native binary output. Sinusoidal patterns are the result of either a temporal integration of multiple on/off patterns or a spatial integration within one on/off pattern. Both approaches are studied experimentally with respect to precision and stability of the pattern output. The STAR-07 industrial projection unit, based upon the 0.7" DLP Discovery™4100 chipset, has been used for this work and the pattern frame rates cover the range from 225 frames per second (fps) to 50,000 fps. The STAR-07 output is detected by a photodiode, amplified, and analyzed in a Yokogawa digital storage oscilloscope. All results prove the very high precision and repeatability of the STAR-07 pattern projection, up to the extreme speed of 50,000 fps.

High-frame-rate infrared and visible cameras for test range instrumentation

NASA Astrophysics Data System (ADS)

Ambrose, Joseph G.; King, B.; Tower, John R.; Hughes, Gary W.; Levine, Peter A.; Villani, Thomas S.; Esposito, Benjamin J.; Davis, Timothy J.; O'Mara, K.; Sjursen, W.; McCaffrey, Nathaniel J.; Pantuso, Francis P.

1995-09-01

Field deployable, high frame rate camera systems have been developed to support the test and evaluation activities at the White Sands Missile Range. The infrared cameras employ a 640 by 480 format PtSi focal plane array (FPA). The visible cameras employ a 1024 by 1024 format backside illuminated CCD. The monolithic, MOS architecture of the PtSi FPA supports commandable frame rate, frame size, and integration time. The infrared cameras provide 3 - 5 micron thermal imaging in selectable modes from 30 Hz frame rate, 640 by 480 frame size, 33 ms integration time to 300 Hz frame rate, 133 by 142 frame size, 1 ms integration time. The infrared cameras employ a 500 mm, f/1.7 lens. Video outputs are 12-bit digital video and RS170 analog video with histogram-based contrast enhancement. The 1024 by 1024 format CCD has a 32-port, split-frame transfer architecture. The visible cameras exploit this architecture to provide selectable modes from 30 Hz frame rate, 1024 by 1024 frame size, 32 ms integration time to 300 Hz frame rate, 1024 by 1024 frame size (with 2:1 vertical binning), 0.5 ms integration time. The visible cameras employ a 500 mm, f/4 lens, with integration time controlled by an electro-optical shutter. Video outputs are RS170 analog video (512 by 480 pixels), and 12-bit digital video.

Spectroscopic analysis and control

DOEpatents

Tate; , James D.; Reed, Christopher J.; Domke, Christopher H.; Le, Linh; Seasholtz, Mary Beth; Weber, Andy; Lipp, Charles

2017-04-18

Apparatus for spectroscopic analysis which includes a tunable diode laser spectrometer having a digital output signal and a digital computer for receiving the digital output signal from the spectrometer, the digital computer programmed to process the digital output signal using a multivariate regression algorithm. In addition, a spectroscopic method of analysis using such apparatus. Finally, a method for controlling an ethylene cracker hydrogenator.

Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

NASA Technical Reports Server (NTRS)

Baranauskas, Gytis (Inventor); Lim, Boon H. (Inventor); Baranauskas, Dalius (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor)

2017-01-01

According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

Existing methods for improving the accuracy of digital-to-analog converters

NASA Astrophysics Data System (ADS)

Eielsen, Arnfinn A.; Fleming, Andrew J.

2017-09-01

The performance of digital-to-analog converters is principally limited by errors in the output voltage levels. Such errors are known as element mismatch and are quantified by the integral non-linearity. Element mismatch limits the achievable accuracy and resolution in high-precision applications as it causes gain and offset errors, as well as harmonic distortion. In this article, five existing methods for mitigating the effects of element mismatch are compared: physical level calibration, dynamic element matching, noise-shaping with digital calibration, large periodic high-frequency dithering, and large stochastic high-pass dithering. These methods are suitable for improving accuracy when using digital-to-analog converters that use multiple discrete output levels to reconstruct time-varying signals. The methods improve linearity and therefore reduce harmonic distortion and can be retrofitted to existing systems with minor hardware variations. The performance of each method is compared theoretically and confirmed by simulations and experiments. Experimental results demonstrate that three of the five methods provide significant improvements in the resolution and accuracy when applied to a general-purpose digital-to-analog converter. As such, these methods can directly improve performance in a wide range of applications including nanopositioning, metrology, and optics.

A flexible microcontroller-based data acquisition device.

PubMed

Hercog, Darko; Gergič, Bojan

2014-06-02

This paper presents a low-cost microcontroller-based data acquisition device. The key component of the presented solution is a configurable microcontroller-based device with an integrated USB transceiver and a 12-bit analogue-to-digital converter (ADC). The presented embedded DAQ device contains a preloaded program (firmware) that enables easy acquisition and generation of analogue and digital signals and data transfer between the device and the application running on a PC via USB bus. This device has been developed as a USB human interface device (HID). This USB class is natively supported by most of the operating systems and therefore any installation of additional USB drivers is unnecessary. The input/output peripheral of the presented device is not static but rather flexible, and could be easily configured to customised needs without changing the firmware. When using the developed configuration utility, a majority of chip pins can be configured as analogue input, digital input/output, PWM output or one of the SPI lines. In addition, LabVIEW drivers have been developed for this device. When using the developed drivers, data acquisition and signal processing algorithms as well as graphical user interface (GUI), can easily be developed using a well-known, industry proven, block oriented LabVIEW programming environment.

Fuzzy Logic Module of Convolutional Neural Network for Handwritten Digits Recognition

NASA Astrophysics Data System (ADS)

Popko, E. A.; Weinstein, I. A.

2016-08-01

Optical character recognition is one of the important issues in the field of pattern recognition. This paper presents a method for recognizing handwritten digits based on the modeling of convolutional neural network. The integrated fuzzy logic module based on a structural approach was developed. Used system architecture adjusted the output of the neural network to improve quality of symbol identification. It was shown that proposed algorithm was flexible and high recognition rate of 99.23% was achieved.

BAE Systems' 17μm LWIR camera core for civil, commercial, and military applications

NASA Astrophysics Data System (ADS)

Lee, Jeffrey; Rodriguez, Christian; Blackwell, Richard

2013-06-01

Seventeen (17) µm pixel Long Wave Infrared (LWIR) Sensors based on vanadium oxide (VOx) micro-bolometers have been in full rate production at BAE Systems' Night Vision Sensors facility in Lexington, MA for the past five years.[1] We introduce here a commercial camera core product, the Airia-MTM imaging module, in a VGA format that reads out in 30 and 60Hz progressive modes. The camera core is architected to conserve power with all digital interfaces from the readout integrated circuit through video output. The architecture enables a variety of input/output interfaces including Camera Link, USB 2.0, micro-display drivers and optional RS-170 analog output supporting legacy systems. The modular board architecture of the electronics facilitates hardware upgrades allow us to capitalize on the latest high performance low power electronics developed for the mobile phones. Software and firmware is field upgradeable through a USB 2.0 port. The USB port also gives users access to up to 100 digitally stored (lossless) images.

Design Of Combined Stochastic Feedforward/Feedback Control

NASA Technical Reports Server (NTRS)

Halyo, Nesim

1989-01-01

Methodology accommodates variety of control structures and design techniques. In methodology for combined stochastic feedforward/feedback control, main objectives of feedforward and feedback control laws seen clearly. Inclusion of error-integral feedback, dynamic compensation, rate-command control structure, and like integral element of methodology. Another advantage of methodology flexibility to develop variety of techniques for design of feedback control with arbitrary structures to obtain feedback controller: includes stochastic output feedback, multiconfiguration control, decentralized control, or frequency and classical control methods. Control modes of system include capture and tracking of localizer and glideslope, crab, decrab, and flare. By use of recommended incremental implementation, control laws simulated on digital computer and connected with nonlinear digital simulation of aircraft and its systems.

Integration of image capture and processing: beyond single-chip digital camera

NASA Astrophysics Data System (ADS)

Lim, SukHwan; El Gamal, Abbas

2001-05-01

An important trend in the design of digital cameras is the integration of capture and processing onto a single CMOS chip. Although integrating the components of a digital camera system onto a single chip significantly reduces system size and power, it does not fully exploit the potential advantages of integration. We argue that a key advantage of integration is the ability to exploit the high speed imaging capability of CMOS image senor to enable new applications such as multiple capture for enhancing dynamic range and to improve the performance of existing applications such as optical flow estimation. Conventional digital cameras operate at low frame rates and it would be too costly, if not infeasible, to operate their chips at high frame rates. Integration solves this problem. The idea is to capture images at much higher frame rates than he standard frame rate, process the high frame rate data on chip, and output the video sequence and the application specific data at standard frame rate. This idea is applied to optical flow estimation, where significant performance improvements are demonstrate over methods using standard frame rate sequences. We then investigate the constraints on memory size and processing power that can be integrated with a CMOS image sensor in a 0.18 micrometers process and below. We show that enough memory and processing power can be integrated to be able to not only perform the functions of a conventional camera system but also to perform applications such as real time optical flow estimation.

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

Engineering modular and orthogonal genetic logic gates for robust digital-like synthetic biology.

PubMed

Wang, Baojun; Kitney, Richard I; Joly, Nicolas; Buck, Martin

2011-10-18

Modular and orthogonal genetic logic gates are essential for building robust biologically based digital devices to customize cell signalling in synthetic biology. Here we constructed an orthogonal AND gate in Escherichia coli using a novel hetero-regulation module from Pseudomonas syringae. The device comprises two co-activating genes hrpR and hrpS controlled by separate promoter inputs, and a σ(54)-dependent hrpL promoter driving the output. The hrpL promoter is activated only when both genes are expressed, generating digital-like AND integration behaviour. The AND gate is demonstrated to be modular by applying new regulated promoters to the inputs, and connecting the output to a NOT gate module to produce a combinatorial NAND gate. The circuits were assembled using a parts-based engineering approach of quantitative characterization, modelling, followed by construction and testing. The results show that new genetic logic devices can be engineered predictably from novel native orthogonal biological control elements using quantitatively in-context characterized parts. © 2011 Macmillan Publishers Limited. All rights reserved.

Apparatus and Method for Effecting Data Transfer Between Data Systems

NASA Technical Reports Server (NTRS)

Kirkpatrick, Joey V. (Inventor); Grosz, Francis B., Jr. (Inventor); Lannes, Kenny (Inventor); Maniscalco, David G. (Inventor)

2001-01-01

An apparatus for effecting data transfer between data systems comprising a first transceiver and a second transceiver. The first transceiver has an input for receiving digital data from one of the data systems, an output for serially outputting digital data to one of the data systems, at least one transmitter for converting digital data received at the input into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the data output. The second transceiver has an input for receiving digital data from another one of the data systems, an output for serially outputting digital data to the another one of the data systems, at least one transmitter for serially converting digital data received at the input of the second transceiver into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the output of the second transceiver. The apparatus further comprises an optical link connecting the first and second transceivers. The optical link comprising a pair of optical fibers. One of the optical fibers optically links the transmitter of the first transceiver to the receiver of the second transceiver. The other optical fiber optically links the receiver of the first transceiver to the transmitter of the second transceiver.

Integrating a Microwave Radiometer into Radar Hardware for Simultaneous Data Collection Between the Instruments

NASA Technical Reports Server (NTRS)

McLinden, Matthew; Piepmeier, Jeffrey

2013-01-01

The conventional method for integrating a radiometer into radar hardware is to share the RF front end between the instruments, and to have separate IF receivers that take data at separate times. Alternatively, the radar and radiometer could share the antenna through the use of a diplexer, but have completely independent receivers. This novel method shares the radar's RF electronics and digital receiver with the radiometer, while allowing for simultaneous operation of the radar and radiometer. Radars and radiometers, while often having near-identical RF receivers, generally have substantially different IF and baseband receivers. Operation of the two instruments simultaneously is difficult, since airborne radars will pulse at a rate of hundreds of microseconds. Radiometer integration time is typically 10s or 100s of milliseconds. The bandwidth of radar may be 1 to 25 MHz, while a radiometer will have an RF bandwidth of up to a GHz. As such, the conventional method of integrating radar and radiometer hardware is to share the highfrequency RF receiver, but to have separate IF subsystems and digitizers. To avoid corruption of the radiometer data, the radar is turned off during the radiometer dwell time. This method utilizes a modern radar digital receiver to allow simultaneous operation of a radiometer and radar with a shared RF front end and digital receiver. The radiometer signal is coupled out after the first down-conversion stage. From there, the radar transmit frequencies are heavily filtered, and the bands outside the transmit filter are amplified and passed to a detector diode. This diode produces a DC output proportional to the input power. For a conventional radiometer, this level would be digitized. By taking this DC output and mixing it with a system oscillator at 10 MHz, the signal can instead be digitized by a second channel on the radar digital receiver (which typically do not accept DC inputs), and can be down-converted to a DC level again digitally. This unintuitive step allows the digital receiver to sample both the radiometer and radar data at a rapid, synchronized data rate (greater than 1 MHz bandwidth). Once both signals are sampled by the same digital receiver, high-speed quality control can be performed on the radiometer data to allow it to take data simultaneously with the radar. The radiometer data can be blanked during radar transmit, or when the radar return is of a power level high enough to corrupt the radiometer data. Additionally, the receiver protection switches in the RF front end can double as radiometer calibration sources, the short (four-microsecond level) switching periods integrated over many seconds to estimate the radiometer offset. The major benefit of this innovation is that there is minimal impact on the radar performance due to the integration of the radiometer, and the radiometer performance is similarly minimally affected by the radar. As the radar and radiometer are able to operate simultaneously, there is no extended period of integration time loss for the radiometer (maximizing sensitivity), and the radar is able to maintain its full number of pulses (increasing sensitivity and decreasing measurement uncertainty).

A digital output piezoelectric accelerometer using a Pb(Zr, Ti)O3 thin film array electrically connected in series

NASA Astrophysics Data System (ADS)

Kobayashi, T.; Okada, H.; Masuda, T.; Maeda, R.; Itoh, T.

2010-10-01

A digital output piezoelectric accelerometer is proposed to realize an ultra-low power consumption wireless sensor node. The accelerometer has patterned piezoelectric thin films (piezoelectric plates) electrically connected in series accompanied by CMOS switches at the end of some of the piezoelectric plates. The connected piezoelectric plates amplify the output voltage without the use of amplifiers. The CMOS switches turn on when the output voltage of the piezoelectric plates is higher than the CMOS threshold voltage. The piezoelectric accelerometer converts the acceleration into a number of on-state CMOS switches, which can be called the digital output. The proposed digital output piezoelectric accelerometer, using Pb(Zr, Ti)O3 (PZT) thin films as the piezoelectric material, was fabricated through a microelectromechanical system (MEMS) microfabrication process. The output voltage was found to be amplified by the number of connected piezoelectric plates. The DC output voltage obtained by using an AC to DC conversion circuit is proportional to the number of connections. The results show the potential for realizing the proposed digital output piezoelectric accelerometer.

MUSIC: An 8 channel readout ASIC for SiPM arrays

NASA Astrophysics Data System (ADS)

Gómez, Sergio; Gascón, David; Fernández, Gerard; Sanuy, Andreu; Mauricio, Joan; Graciani, Ricardo; Sanchez, David

2016-04-01

This paper presents an 8 channel ASIC for SiPM anode readout based on a novel low input impedance current conveyor (under patent1). This Multiple Use SiPM Integrated Circuit (MUSIC) has been designed to serve several purposes, including, for instance, the readout of SiPM arrays for some of the Cherenkov Telescope Array (CTA) cameras. The current division scheme at the very front end part of the circuit splits the input current into differently scaled copies which are connected to independent current mirrors. The circuit contains a tunable pole zero cancellation of the SiPM recovery time constant to deal with sensors from different manufacturers. Decay times up to 100 ns are supported covering most of the available SiPM devices in the market. MUSIC offers three main features: (1) differential output of the sum of the individual input channels; (2) 8 individual single ended analog outputs and; (3) 8 individual binary outputs. The digital outputs encode the amount of collected charge in the duration of the digital signal using a time over threshold technique. For each individual channel, the user must select the analog or digital output. Each functionality, the signal sum and the 8 A/D outputs, include a selectable dual-gain configuration. Moreover, the signal sum implements dual-gain output providing a 15 bit dynamic range. Full die simulation results of the MUSIC designed using AMS 0.35 µm SiGe technology are presented: total die size of 9 mm2, 500 MHz bandwidth for channel sum and 150 MHz bandwidth for A/D channels, low input impedance (≍32 Ω), single photon output pulse width at half maximum (FWHM) between 5 and 10 ns and with a power consumption of ≍ 30 mW/ch plus ≍ 200 mW for the 8 ch sum. Encapsulated prototype samples of the MUSIC are expected by March 2016.

Communications and control for electric power systems

NASA Technical Reports Server (NTRS)

Kirkham, H.

1992-01-01

A long-term strategy for the integration of new control technologies for power generation and delivery is proposed: the industry would benefit from an evolutionary approach that would adapt to its needs future technologies as well as those that it has so far not heeded. The integrated operation of the entire system, including the distribution system, was proposed as a future goal. The AbNET communication protocols are reviewed, and additions that were made in 1991 are described. In the original network, traffic was controlled by polling at the master station, located at the substation, and routed by a flooding algorithm. In a revised version, the polling and flooding are modified. The question of interfacing low-energy measurement transducers or instrument transformers is considered. There is presently little or no agreement on what the output of optical current transducers (CT's) should be. Appendices deal with the calibration of current transducers; with Delta modulation, a simple means of serially encoding the output of an OCT; and with noise shaping, a method of digital signal processing that trades off the number of bits in a digital sample for a higher number of samples.

Design of a Low-Light-Level Image Sensor with On-Chip Sigma-Delta Analog-to- Digital Conversion

NASA Technical Reports Server (NTRS)

Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.; Fossum, Eric R.

1993-01-01

The design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometer CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 x 128 array of active pixels at a 50 micrometer pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta (Sigma-Delta) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi-parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e^- rms noise performance.

Optical analog-to-digital converter

DOEpatents

Vawter, G Allen [Corrales, NM; Raring, James [Goleta, CA; Skogen, Erik J [Albuquerque, NM

2009-07-21

An optical analog-to-digital converter (ADC) is disclosed which converts an input optical analog signal to an output optical digital signal at a sampling rate defined by a sampling optical signal. Each bit of the digital representation is separately determined using an optical waveguide interferometer and an optical thresholding element. The interferometer uses the optical analog signal and the sampling optical signal to generate a sinusoidally-varying output signal using cross-phase-modulation (XPM) or a photocurrent generated from the optical analog signal. The sinusoidally-varying output signal is then digitized by the thresholding element, which includes a saturable absorber or at least one semiconductor optical amplifier, to form the optical digital signal which can be output either in parallel or serially.

Low-to-Medium Power Single Chip Digital Controlled DC-DC Regulator for Point-of-Load Applications

NASA Technical Reports Server (NTRS)

Adell, Philippe C. (Inventor); Bakkaloglu, Bertan (Inventor); Vermeire, Bert (Inventor); Liu, Tao (Inventor)

2015-01-01

A DC-DC converter for generating a DC output voltage includes: a digitally controlled pulse width modulator (DPWM) for controlling a switching power stage to supply a varying voltage to an inductor; and a digital voltage feedback circuit for controlling the DPWM in accordance with a feedback voltage corresponding to the DC output voltage, the digital voltage feedback circuit including: a first voltage controlled oscillator for converting the feedback voltage into a first frequency signal and to supply the first frequency signal to a first frequency discriminator; a second voltage controlled oscillator for converting a reference voltage into a second frequency signal and to supply the second frequency signal to a second frequency discriminator; a digital comparator for comparing digital outputs of the first and second frequency discriminators and for outputting a digital feedback signal; and a controller for controlling the DPWM in accordance with the digital feedback signal.

A Flexible Microcontroller-Based Data Acquisition Device

PubMed Central

Hercog, Darko; Gergič, Bojan

2014-01-01

This paper presents a low-cost microcontroller-based data acquisition device. The key component of the presented solution is a configurable microcontroller-based device with an integrated USB transceiver and a 12-bit analogue-to-digital converter (ADC). The presented embedded DAQ device contains a preloaded program (firmware) that enables easy acquisition and generation of analogue and digital signals and data transfer between the device and the application running on a PC via USB bus. This device has been developed as a USB human interface device (HID). This USB class is natively supported by most of the operating systems and therefore any installation of additional USB drivers is unnecessary. The input/output peripheral of the presented device is not static but rather flexible, and could be easily configured to customised needs without changing the firmware. When using the developed configuration utility, a majority of chip pins can be configured as analogue input, digital input/output, PWM output or one of the SPI lines. In addition, LabVIEW drivers have been developed for this device. When using the developed drivers, data acquisition and signal processing algorithms as well as graphical user interface (GUI), can easily be developed using a well-known, industry proven, block oriented LabVIEW programming environment. PMID:24892494

Differential temperature stress measurement employing array sensor with local offset

NASA Technical Reports Server (NTRS)

Lesniak, Jon R. (Inventor)

1993-01-01

The instrument has a focal plane array of infrared sensors of the integrating type such as a multiplexed device in which a charge is built up on a capacitor which is proportional to the total number of photons which that sensor is exposed to between read-out cycles. The infrared sensors of the array are manufactured as part of an overall array which is part of a micro-electronic device. The sensor achieves greater sensitivity by applying a local offset to the output of each sensor before it is converted into a digital word. The offset which is applied to each sensor will typically be the sensor's average value so that the digital signal which is periodically read from each sensor of the array corresponds to the portion of the signal which is varying in time. With proper synchronization between the cyclical loading of the test object and the frame rate of the infrared array the output of the A/D converted signal will correspond to the stress field induced temperature variations. A digital lock-in operation may be performed on the output of each sensor in the array. This results in a test instrument which can rapidly form a precise image of the thermoelastic stresses in an object.

Optical XOR gate

DOEpatents

Vawter, G. Allen

2013-11-12

An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

[Digital acoustic burglar alarm system using infrared radio remote control].

PubMed

Wang, Song-De; Zhao, Yan; Yao, Li-Ping; Zhang, Shuan-Ji

2009-03-01

Using butt emission infrared sensors, radio receiving and sending modules, double function integrated circuit with code and code translation, LED etc, a digital acoustic burglar alarm system using infrared radio to realize remote control was designed. It uses infrared ray invisible to eyes, composing area of radio distance. Once people and objects shelter the infrared ray, a testing signal will be output by the tester, and the sender will be triggered to work. The radio coding signal that sender sent is received by the receiver, then processed by a serial circuit. The control signal is output to trigger the sounder to give out an alarm signal, and the operator will be cued to notice this variation. At the same time, the digital display will be lighted and the alarm place will be watched. Digital coding technology is used, and a number of sub alarm circuits can joint the main receiver, so a lot of places can be monitored. The whole system features a module structure, with the property of easy alignment, stable operation, debug free and so on. The system offers an alarm range reaching 1 000 meters in all directions, and can be widely used in family, shop, storehouse, orchard and so on.

A gallium-arsenide digital phase shifter for clock and control signal distribution in high-speed digital systems

NASA Technical Reports Server (NTRS)

Fouts, Douglas J.

1992-01-01

The design, implementation, testing, and applications of a gallium-arsenide digital phase shifter and fan-out buffer are described. The integrated circuit provides a method for adjusting the phase of high-speed clock and control signals in digital systems, without the need for pruning cables, multiplexing between cables of different lengths, delay lines, or similar techniques. The phase of signals distributed with the described chip can be dynamically adjusted in eight different steps of approximately 60 ps per step. The IC also serves as a fan-out buffer and provides 12 in-phase outputs. The chip is useful for distributing high-speed clock and control signals in synchronous digital systems, especially if components are distributed over a large physical area or if there is a large number of components.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations

NASA Astrophysics Data System (ADS)

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-01

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations.

PubMed

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-15

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

The design of high dynamic range ROIC for IRFPAs

NASA Astrophysics Data System (ADS)

Jiang, Dazhao; Liang, Qinghua; Zhang, Qiwen; Chen, Honglei; Ding, Ruijun

2015-10-01

The charge packet readout integrated circuit (ROIC) technology for the IRFPAs is introduced, which can realize that every pixel achieves a very high capacity of the electrons storage, and it also improves the performance of the SNR and reduces the saturation possibility of the pixels. The ROIC for the LWIR requires ability that obtaining high capacity for storing electrons. For the conventional ROIC, the maximum charge capacity is determined by the integration capacitance and the operating voltage, it can achieve a high charge capacity through increasing the area of the integration capacitor or raising the operating voltage. And this paper would introduce a digital method of ROIC that can achieve a very high charge capacity. The circuit architecture of this approach includes the following parts, a preamplifier, a comparator, a counter, and memory arrays. And the maximum charge capacity of the pixel is determined by the counter bits. This new method can achieve a high charge capacity more than 1Ge- every pixel and output the digital signal directly, while that of conventional ROIC is less than 50Me- and output the analog signal from the pixel. In this new circuit, the comparator is a important module, as the integration voltage value need compare with threshold voltage through the comparator all the time during the integration period, and we will discuss the influence of the comparator. This work design the circuit with the CSMC 0.35um CMOS technology, and the simulation use the spectre model.

Integrated Cryogenic Electronics Testbed (ICE-T) for Evaluation of Superconductor and Cryo-Semiconductor Integrated Circuits

NASA Astrophysics Data System (ADS)

Dotsenko, V. V.; Sahu, A.; Chonigman, B.; Tang, J.; Lehmann, A. E.; Gupta, V.; Talalevskii, A.; Ruotolo, S.; Sarwana, S.; Webber, R. J.; Gupta, D.

2017-02-01

Research and development of cryogenic application-specific integrated circuits (ASICs), such as high-frequency (tens of GHz) semiconductor and superconductor mixed-signal circuits and large-scale (>10,000 Josephson Junctions) superconductor digital circuits, have long been hindered by the absence of specialized cryogenic test apparatus. During their iterative development phase, most ASICs require many additional input-output lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. We are developing a full suite of modular test apparatus based on cryocoolers that do not consume liquid helium, and support extensive electrical interfaces to standard and custom test equipment. Our design separates the cryogenics from electrical connections, allowing even inexperienced users to conduct testing by simply mounting their ASIC on a removable electrical insert. Thermal connections between the cold stages and the inserts are made with robust thermal links. ICE-T accommodates two independent electrical inserts at the same time. We have designed various inserts, such as universal ones with all 40 or 80 coaxial cables and those with customized wiring and temperature-controlled stages. ICE-T features fast thermal cycling for rapid testing, enables detailed testing over long periods (days to months, if necessary), and even supports automated testing of digital ICs with modular additions.

Method and apparatus for data sampling

DOEpatents

Odell, Daniel M. C.

1994-01-01

A method and apparatus for sampling radiation detector outputs and determining event data from the collected samples. The method uses high speed sampling of the detector output, the conversion of the samples to digital values, and the discrimination of the digital values so that digital values representing detected events are determined. The high speed sampling and digital conversion is performed by an A/D sampler that samples the detector output at a rate high enough to produce numerous digital samples for each detected event. The digital discrimination identifies those digital samples that are not representative of detected events. The sampling and discrimination also provides for temporary or permanent storage, either serially or in parallel, to a digital storage medium.

A low-noise low-power EEG acquisition node for scalable brain-machine interfaces

NASA Astrophysics Data System (ADS)

Sullivan, Thomas J.; Deiss, Stephen R.; Cauwenberghs, Gert; Jung, Tzyy-Ping

2007-05-01

Electroencephalograph (EEG) recording systems offer a versatile, noninvasive window on the brain's spatio-temporal activity for many neuroscience and clinical applications. Our research aims at improving the spatial resolution and mobility of EEG recording by reducing the form factor, power drain and signal fanout of the EEG acquisition node in a scalable sensor array architecture. We present such a node integrated onto a dimesized circuit board that contains a sensor's complete signal processing front-end, including amplifier, filters, and analog-to-digital conversion. A daisy-chain configuration between boards with bit-serial output reduces the wiring needed. The circuit's low power consumption of 423 μW supports EEG systems with hundreds of electrodes to operate from small batteries for many hours. Coupling between the bit-serial output and the highly sensitive analog input due to dense integration of analog and digital functions on the circuit board results in a deterministic noise component in the output, larger than the intrinsic sensor and circuit noise. With software correction of this noise contribution, the system achieves an input-referred noise of 0.277 μVrms in the signal band of 1 to 100 Hz, comparable to the best medical-grade systems in use. A chain of seven nodes using EEG dry electrodes created in micro-electrical-mechanical system (MEMS) technology is demonstrated in a real-world setting.

LSST camera readout chip ASPIC: test tools

NASA Astrophysics Data System (ADS)

Antilogus, P.; Bailly, Ph; Jeglot, J.; Juramy, C.; Lebbolo, H.; Martin, D.; Moniez, M.; Tocut, V.; Wicek, F.

2012-02-01

The LSST camera will have more than 3000 video-processing channels. The readout of this large focal plane requires a very compact readout chain. The correlated ''Double Sampling technique'', which is generally used for the signal readout of CCDs, is also adopted for this application and implemented with the so called ''Dual Slope integrator'' method. We have designed and implemented an ASIC for LSST: the Analog Signal Processing asIC (ASPIC). The goal is to amplify the signal close to the output, in order to maximize signal to noise ratio, and to send differential outputs to the digitization. Others requirements are that each chip should process the output of half a CCD, that is 8 channels and should operate at 173 K. A specific Back End board has been designed especially for lab test purposes. It manages the clock signals, digitizes the analog differentials outputs of ASPIC and stores data into a memory. It contains 8 ADCs (18 bits), 512 kwords memory and an USB interface. An FPGA manages all signals from/to all components on board and generates the timing sequence for ASPIC. Its firmware is written in Verilog and VHDL languages. Internals registers permit to define various tests parameters of the ASPIC. A Labview GUI allows to load or update these registers and to check a proper operation. Several series of tests, including linearity, noise and crosstalk, have been performed over the past year to characterize the ASPIC at room and cold temperature. At present, the ASPIC, Back-End board and CCD detectors are being integrated to perform a characterization of the whole readout chain.

Micro-fabricated flexible PZT cantilever using d33 mode for energy harvesting

NASA Astrophysics Data System (ADS)

Cho, Hyunok; Park, Jongcheol; Park, Jae Yeong

2017-12-01

This paper presents a micro-fabricated flexible and curled PZT [Pb(Zr0.52Ti0.48)O3] cantilever using d33 piezoelectric mode for vibration based energy harvesting applications. The proposed cantilever based energy harvester consists of polyimide, PZT thin film, and inter-digitated IrOx electrodes. The flexible cantilever was formed using bulk-micromachining on a silicon wafer to integrate it with ICs. The d33 piezoelectric mode was applied to achieve a large output voltage by using inter-digitated electrodes, and the PZT thin film on polyimide layer has a remnant polarization and coercive filed of approximately 2 P r = 47.9 μC/cm2 and 2 E c = 78.8 kV/cm, respectively. The relative dielectric constant was 900. The fabricated micro-electromechanical systems energy harvester generated output voltages of 1.2 V and output power of 117 nW at its optimal resistive load of 6.6 MΩ from its resonant frequency of 97.8 Hz with an acceleration of 5 m/s2.

Method and apparatus for data sampling

DOEpatents

Odell, D.M.C.

1994-04-19

A method and apparatus for sampling radiation detector outputs and determining event data from the collected samples is described. The method uses high speed sampling of the detector output, the conversion of the samples to digital values, and the discrimination of the digital values so that digital values representing detected events are determined. The high speed sampling and digital conversion is performed by an A/D sampler that samples the detector output at a rate high enough to produce numerous digital samples for each detected event. The digital discrimination identifies those digital samples that are not representative of detected events. The sampling and discrimination also provides for temporary or permanent storage, either serially or in parallel, to a digital storage medium. 6 figures.

Flexible, reconfigurable, power efficient transmitter and method

NASA Technical Reports Server (NTRS)

Bishop, James W. (Inventor); Zaki, Nazrul H. Mohd (Inventor); Newman, David Childress (Inventor); Bundick, Steven N. (Inventor)

2011-01-01

A flexible, reconfigurable, power efficient transmitter device and method is provided. In one embodiment, the method includes receiving outbound data and determining a mode of operation. When operating in a first mode the method may include modulation mapping the outbound data according a modulation scheme to provide first modulation mapped digital data, converting the first modulation mapped digital data to an analog signal that comprises an intermediate frequency (IF) analog signal, upconverting the IF analog signal to produce a first modulated radio frequency (RF) signal based on a local oscillator signal, amplifying the first RF modulated signal to produce a first RF output signal, and outputting the first RF output signal via an isolator. In a second mode of operation method may include modulation mapping the outbound data according a modulation scheme to provide second modulation mapped digital data, converting the second modulation mapped digital data to a first digital baseband signal, conditioning the first digital baseband signal to provide a first analog baseband signal, modulating one or more carriers with the first analog baseband signal to produce a second modulated RF signal based on a local oscillator signal, amplifying the second RF modulated signal to produce a second RF output signal, and outputting the second RF output signal via the isolator. The digital baseband signal may comprise an in-phase (I) digital baseband signal and a quadrature (Q) baseband signal.

Analysis of the Measurement and Modeling of a Digital Inverter Based on a Ferroelectric Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Sayyah, Rana; Ho, Fat D.

2009-01-01

The use of ferroelectric materials for digital memory devices is widely researched and implemented, but ferroelectric devices also possess unique characteristics that make them have interesting and useful properties in digital circuits. Because ferroelectric transistors possess the properties of hysteresis and nonlinearity, a digital inverter containing a FeFET has very different characteristics than one with a traditional FET. This paper characterizes the properties of the measurement and modeling of a FeFET based digital inverter. The circuit was set up using discrete FeFETs. The purpose of this circuit was not to produce a practical integrated circuit that could be inserted directly into existing digital circuits, but to explore the properties and characteristics of such a device and to look at possible future uses. Input and output characteristics are presented, as well as timing measurements. Comparisons are made between the ferroelectric device and the properties of a standard digital inverter. Potential benefits and possible uses of such a device are presented.

Research and development of a digital design system for hull structures

NASA Astrophysics Data System (ADS)

Zhan, Yi-Ting; Ji, Zhuo-Shang; Liu, Yin-Dong

2007-06-01

Methods used for digital ship design were studied and formed the basis of a proposed frame model suitable for ship construction modeling. Based on 3-D modeling software, a digital design system for hull structures was developed. Basic software systems for modeling, modifying, and assembly simulation were developed. The system has good compatibility, and models created by it can be saved in different 3-D file formats, and 2D engineering drawings can be output directly. The model can be modified dynamically, overcoming the necessity of repeated modifications during hull structural design. Through operations such as model construction, intervention inspection, and collision detection, problems can be identified and modified during the hull structural design stage. Technologies for centralized control of the system, database management, and 3-D digital design are integrated into this digital model in the preliminary design stage of shipbuilding.

Digital transmitter for data bus communications system

NASA Technical Reports Server (NTRS)

Proch, G. E.

1974-01-01

Digital transmitter designed for Manchester coded signals (and all signals with ac waveforms) generated at a rate of one megabit per second includes efficient output isolation circuit. Transmitter consists of logic control section, amplifier, and output isolation section. Output isolation circuit provides dynamic impedance at terminals as function of amplifier output level.

System for memorizing maximum values

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1992-01-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either linear or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

System for memorizing maximum values

NASA Astrophysics Data System (ADS)

Bozeman, Richard J., Jr.

1992-08-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either linear or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

System for Memorizing Maximum Values

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1996-01-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either liner or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

Space Tug Avionics Definition Study. Volume 5: Cost and Programmatics

NASA Technical Reports Server (NTRS)

1975-01-01

The baseline avionics system features a central digital computer that integrates the functions of all the space tug subsystems by means of a redundant digital data bus. The central computer consists of dual central processor units, dual input/output processors, and a fault tolerant memory, utilizing internal redundancy and error checking. Three electronically steerable phased arrays provide downlink transmission from any tug attitude directly to ground or via TDRS. Six laser gyros and six accelerometers in a dodecahedron configuration make up the inertial measurement unit. Both a scanning laser radar and a TV system, employing strobe lamps, are required as acquisition and docking sensors. Primary dc power at a nominal 28 volts is supplied from dual lightweight, thermally integrated fuel cells which operate from propellant grade reactants out of the main tanks.

Acousto-optic time- and space-integrating spotlight-mode SAR processor

NASA Astrophysics Data System (ADS)

Haney, Michael W.; Levy, James J.; Michael, Robert R., Jr.

1993-09-01

The technical approach and recent experimental results for the acousto-optic time- and space- integrating real-time SAR image formation processor program are reported. The concept overcomes the size and power consumption limitations of electronic approaches by using compact, rugged, and low-power analog optical signal processing techniques for the most computationally taxing portions of the SAR imaging problem. Flexibility and performance are maintained by the use of digital electronics for the critical low-complexity filter generation and output image processing functions. The results include a demonstration of the processor's ability to perform high-resolution spotlight-mode SAR imaging by simultaneously compensating for range migration and range/azimuth coupling in the analog optical domain, thereby avoiding a highly power-consuming digital interpolation or reformatting operation usually required in all-electronic approaches.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Riot, Vincent J.

The present disclosure provides a system and a method for measuring fluorescence of a sample. The sample may be a polymerase-chain-reaction (PCR) array, a loop-mediated-isothermal amplification array, etc. LEDs are used to excite the sample, and a photodiode is used to collect the sample's fluorescence. An electronic offset signal is used to reduce the effects of background fluorescence and the noises from the measurement system. An integrator integrates the difference between the output of the photodiode and the electronic offset signal over a given period of time. The resulting integral is then converted into digital domain for further processing andmore » storage.« less

Digital logic circuit based on two component molecular systems of BSA and salen

NASA Astrophysics Data System (ADS)

Hai-Bin, Lin; Feng, Chen; Hong-Xu, Guo

2018-02-01

A new fluorescent molecular probe 1 was designed and constructed by combining bovine serum albumin (BSA) and N,N‧-bis(salicylidene)ethylenediamine (salen). Stimulated by Zn2 +, tris, or EDTAH2Na2, the distance between BSA and salen was regulated, which was accompanied by an obvious change in the fluorescence intensity at 350 or 445 nm based on Förster resonance energy transfer. Moreover, based on the encoding binary digits in these inputs and outputs applying positive logic conventions, a monomolecular circuit integrating one OR, three NOT, and three YES gates, was successfully achieved.

Nano-Enriched and Autonomous Sensing Framework for Dissolved Oxygen.

PubMed

Shehata, Nader; Azab, Mohammed; Kandas, Ishac; Meehan, Kathleen

2015-08-14

This paper investigates a nano-enhanced wireless sensing framework for dissolved oxygen (DO). The system integrates a nanosensor that employs cerium oxide (ceria) nanoparticles to monitor the concentration of DO in aqueous media via optical fluorescence quenching. We propose a comprehensive sensing framework with the nanosensor equipped with a digital interface where the sensor output is digitized and dispatched wirelessly to a trustworthy data collection and analysis framework for consolidation and information extraction. The proposed system collects and processes the sensor readings to provide clear indications about the current or the anticipated dissolved oxygen levels in the aqueous media.

Development of high precision digital driver of acoustic-optical frequency shifter for ROG

NASA Astrophysics Data System (ADS)

Zhang, Rong; Kong, Mei; Xu, Yameng

2016-10-01

We develop a high precision digital driver of the acoustic-optical frequency shifter (AOFS) based on the parallel direct digital synthesizer (DDS) technology. We use an atomic clock as the phase-locked loop (PLL) reference clock, and the PLL is realized by a dual digital phase-locked loop. A DDS sampling clock up to 320 MHz with a frequency stability as low as 10-12 Hz is obtained. By constructing the RF signal measurement system, it is measured that the frequency output range of the AOFS-driver is 52-58 MHz, the center frequency of the band-pass filter is 55 MHz, the ripple in the band is less than 1 dB@3MHz, the single channel output power is up to 0.3 W, the frequency stability is 1 ppb (1 hour duration), and the frequency-shift precision is 0.1 Hz. The obtained frequency stability has two orders of improvement compared to that of the analog AOFS-drivers. For the designed binary frequency shift keying (2-FSK) and binary phase shift keying (2-PSK) modulation system, the demodulating frequency of the input TTL synchronous level signal is up to 10 kHz. The designed digital-bus coding/decoding system is compatible with many conventional digital bus protocols. It can interface with the ROG signal detecting software through the integrated drive electronics (IDE) and exchange data with the two DDS frequency-shift channels through the signal detecting software.

Data reduction complex analog-to-digital data processing requirements for onsite test facilities

NASA Technical Reports Server (NTRS)

Debbrecht, J. D.

1976-01-01

The analog to digital processing requirements of onsite test facilities are described. The source and medium of all input data to the Data Reduction Complex (DRC) and the destination and medium of all output products of the analog-to-digital processing are identified. Additionally, preliminary input and output data formats are presented along with the planned use of the output products.

Development of an Integrated Hydrologic Modeling System for Rainfall-Runoff Simulation

NASA Astrophysics Data System (ADS)

Lu, B.; Piasecki, M.

2008-12-01

This paper aims to present the development of an integrated hydrological model which involves functionalities of digital watershed processing, online data retrieval, hydrologic simulation and post-event analysis. The proposed system is intended to work as a back end to the CUAHSI HIS cyberinfrastructure developments. As a first step into developing this system, a physics-based distributed hydrologic model PIHM (Penn State Integrated Hydrologic Model) is wrapped into OpenMI(Open Modeling Interface and Environment ) environment so as to seamlessly interact with OpenMI compliant meteorological models. The graphical user interface is being developed from the openGIS application called MapWindows which permits functionality expansion through the addition of plug-ins. . Modules required to set up through the GUI workboard include those for retrieving meteorological data from existing database or meteorological prediction models, obtaining geospatial data from the output of digital watershed processing, and importing initial condition and boundary condition. They are connected to the OpenMI compliant PIHM to simulate rainfall-runoff processes and includes a module for automatically displaying output after the simulation. Online databases are accessed through the WaterOneFlow web services, and the retrieved data are either stored in an observation database(OD) following the schema of Observation Data Model(ODM) in case for time series support, or a grid based storage facility which may be a format like netCDF or a grid-based-data database schema . Specific development steps include the creation of a bridge to overcome interoperability issue between PIHM and the ODM, as well as the embedding of TauDEM (Terrain Analysis Using Digital Elevation Models) into the model. This module is responsible for developing watershed and stream network using digital elevation models. Visualizing and editing geospatial data is achieved by the usage of MapWinGIS, an ActiveX control developed by MapWindow team. After applying to the practical watershed, the performance of the model can be tested by the post-event analysis module.

Digital interface of electronic transformers based on embedded system

NASA Astrophysics Data System (ADS)

Shang, Qiufeng; Qi, Yincheng

2008-10-01

Benefited from digital interface of electronic transformers, information sharing and system integration in substation can be realized. An embedded system-based digital output scheme of electronic transformers is proposed. The digital interface is designed with S3C44B0X 32bit RISC microprocessor as the hardware platform. The μCLinux operation system (OS) is transplanted on ARM7 (S3C44B0X). Applying Ethernet technology as the communication mode in the substation automation system is a new trend. The network interface chip RTL8019AS is adopted. Data transmission is realized through the in-line TCP/IP protocol of uClinux embedded OS. The application result and character analysis show that the design can meet the real-time and reliability requirements of IEC60044-7/8 electronic voltage/current instrument transformer standards.

A comparison of digital zero-crossing and charge-comparison methods for neutron/γ-ray discrimination with liquid scintillation detectors

NASA Astrophysics Data System (ADS)

Nakhostin, M.

2015-10-01

In this paper, we have compared the performances of the digital zero-crossing and charge-comparison methods for n/γ discrimination with liquid scintillation detectors at low light outputs. The measurements were performed with a 2″×2″ cylindrical liquid scintillation detector of type BC501A whose outputs were sampled by means of a fast waveform digitizer with 10-bit resolution, 4 GS/s sampling rate and one volt input range. Different light output ranges were measured by operating the photomultiplier tube at different voltages and a new recursive algorithm was developed to implement the digital zero-crossing method. The results of our study demonstrate the superior performance of the digital zero-crossing method at low light outputs when a large dynamic range is measured. However, when the input range of the digitizer is used to measure a narrow range of light outputs, the charge-comparison method slightly outperforms the zero-crossing method. The results are discussed in regard to the effects of the quantization noise and the noise filtration performance of the zero-crossing filter.

Wearable knee health rehabilitation assessment using acoustical emissions

NASA Astrophysics Data System (ADS)

Teague, Caitlin N.; Hersek, Sinan; Conant, Jordan L.; Gilliland, Scott M.; Inan, Omer T.

2017-02-01

We have developed a novel, wearable sensing system based on miniature piezoelectric contact microphones for measuring the acoustical emissions from the knee during movement. The system consists of two contact microphones, positioned on the medial and lateral sides of the patella, connected to custom, analog pre-amplifier circuits and a microcontroller for digitization and data storage on a secure digital card. Tn addition to the acoustical sensing, the system includes two integrated inertial measurement sensors including accelerometer and gyroscope modalities to enable joint angle calculations; these sensors, with digital outputs, are connected directly to the same microcontroller. The system provides low noise, accurate joint acoustical emission and angle measurements in a wearable form factor and has several hours of battery life.

Investigation, development and application of optimal output feedback theory. Volume 2: Development of an optimal, limited state feedback outer-loop digital flight control system for 3-D terminal area operation

NASA Technical Reports Server (NTRS)

Broussard, J. R.; Halyo, N.

1984-01-01

This report contains the development of a digital outer-loop three dimensional radio navigation (3-D RNAV) flight control system for a small commercial jet transport. The outer-loop control system is designed using optimal stochastic limited state feedback techniques. Options investigated using the optimal limited state feedback approach include integrated versus hierarchical control loop designs, 20 samples per second versus 5 samples per second outer-loop operation and alternative Type 1 integration command errors. Command generator tracking techniques used in the digital control design enable the jet transport to automatically track arbitrary curved flight paths generated by waypoints. The performance of the design is demonstrated using detailed nonlinear aircraft simulations in the terminal area, frequency domain multi-input sigma plots, frequency domain single-input Bode plots and closed-loop poles. The response of the system to a severe wind shear during a landing approach is also presented.

Evaluating Multi-Input/Multi-Output Digital Control Systems

NASA Technical Reports Server (NTRS)

Pototzky, Anthony S.; Wieseman, Carol D.; Hoadley, Sherwood T.; Mukhopadhyay, Vivek

1994-01-01

Controller-performance-evaluation (CPE) methodology for multi-input/multi-output (MIMO) digital control systems developed. Procedures identify potentially destabilizing controllers and confirm satisfactory performance of stabilizing ones. Methodology generic and used in many types of multi-loop digital-controller applications, including digital flight-control systems, digitally controlled spacecraft structures, and actively controlled wind-tunnel models. Also applicable to other complex, highly dynamic digital controllers, such as those in high-performance robot systems.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, W.; Yin, J.; Li, C.

This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by amore » FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)« less

Low speed phaselock speed control system. [for brushless dc motor

NASA Technical Reports Server (NTRS)

Fulcher, R. W.; Sudey, J. (Inventor)

1975-01-01

A motor speed control system for an electronically commutated brushless dc motor is provided which includes a phaselock loop with bidirectional torque control for locking the frequency output of a high density encoder, responsive to actual speed conditions, to a reference frequency signal, corresponding to the desired speed. The system includes a phase comparator, which produces an output in accordance with the difference in phase between the reference and encoder frequency signals, and an integrator-digital-to-analog converter unit, which converts the comparator output into an analog error signal voltage. Compensation circuitry, including a biasing means, is provided to convert the analog error signal voltage to a bidirectional error signal voltage which is utilized by an absolute value amplifier, rotational decoder, power amplifier-commutators, and an arrangement of commutation circuitry.

Digitally programmable signal generator and method

DOEpatents

Priatko, G.J.; Kaskey, J.A.

1989-11-14

Disclosed is a digitally programmable waveform generator for generating completely arbitrary digital or analog waveforms from very low frequencies to frequencies in the gigasample per second range. A memory array with multiple parallel outputs is addressed; then the parallel output data is latched into buffer storage from which it is serially multiplexed out at a data rate many times faster than the access time of the memory array itself. While data is being multiplexed out serially, the memory array is accessed with the next required address and presents its data to the buffer storage before the serial multiplexing of the last group of data is completed, allowing this new data to then be latched into the buffer storage for smooth continuous serial data output. In a preferred implementation, a plurality of these serial data outputs are paralleled to form the input to a digital to analog converter, providing a programmable analog output. 6 figs.

Digitally programmable signal generator and method

DOEpatents

Priatko, Gordon J.; Kaskey, Jeffrey A.

1989-01-01

A digitally programmable waveform generator for generating completely arbitrary digital or analog waveforms from very low frequencies to frequencies in the gigasample per second range. A memory array with multiple parallel outputs is addressed; then the parallel output data is latched into buffer storage from which it is serially multiplexed out at a data rate many times faster than the access time of the memory array itself. While data is being multiplexed out serially, the memory array is accessed with the next required address and presents its data to the buffer storage before the serial multiplexing of the last group of data is completed, allowing this new data to then be latched into the buffer storage for smooth continuous serial data output. In a preferred implementation, a plurality of these serial data outputs are paralleled to form the input to a digital to analog converter, providing a programmable analog output.

Fast, High-Precision Readout Circuit for Detector Arrays

NASA Technical Reports Server (NTRS)

Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

2013-01-01

The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

NASA Astrophysics Data System (ADS)

Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

2015-06-01

We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

Feed-forward digital phase and amplitude correction system

DOEpatents

Yu, D.U.L.; Conway, P.H.

1994-11-15

Phase and amplitude modifications in repeatable RF pulses at the output of a high power pulsed microwave amplifier are made utilizing a digital feed-forward correction system. A controlled amount of the output power is coupled to a correction system for processing of phase and amplitude information. The correction system comprises circuitry to compare the detected phase and amplitude with the desired phase and amplitude, respectively, and a digitally programmable phase shifter and attenuator and digital logic circuitry to control the phase shifter and attenuator. The phase and amplitude of subsequent are modified by output signals from the correction system. 11 figs.

Feed-forward digital phase and amplitude correction system

DOEpatents

Yu, David U. L.; Conway, Patrick H.

1994-01-01

Phase and amplitude modifications in repeatable RF pulses at the output of a high power pulsed microwave amplifier are made utilizing a digital feed-forward correction system. A controlled amount of the output power is coupled to a correction system for processing of phase and amplitude information. The correction system comprises circuitry to compare the detected phase and amplitude with the desired phase and amplitude, respectively, and a digitally programmable phase shifter and attenuator and digital logic circuitry to control the phase shifter and attenuator. The Phase and amplitude of subsequent are modified by output signals from the correction system.

A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

NASA Astrophysics Data System (ADS)

Szplet, R.; Kalisz, J.; Jachna, Z.

2009-02-01

We present a time digitizer having 45 ps resolution, integrated in a field programmable gate array (FPGA) device. The time interval measurement is based on the two-stage interpolation method. A dual-edge two-phase interpolator is driven by the on-chip synthesized 250 MHz clock with precise phase adjustment. An improved dual-edge double synchronizer was developed to control the main counter. The nonlinearity of the digitizer's transfer characteristic is identified and utilized by the dedicated hardware code processor for the on-the-fly correction of the output data. Application of presented ideas has resulted in the measurement uncertainty of the digitizer below 70 ps RMS over the time interval ranging from 0 to 1 s. The use of the two-stage interpolation and a fast FIFO memory has allowed us to obtain the maximum measurement rate of five million measurements per second.

System and method for measuring fluorescence of a sample

DOEpatents

Riot, Vincent J

2015-03-24

The present disclosure provides a system and a method for measuring fluorescence of a sample. The sample may be a polymerase-chain-reaction (PCR) array, a loop-mediated-isothermal amplification array, etc. LEDs are used to excite the sample, and a photodiode is used to collect the sample's fluorescence. An electronic offset signal is used to reduce the effects of background fluorescence and the noises from the measurement system. An integrator integrates the difference between the output of the photodiode and the electronic offset signal over a given period of time. The resulting integral is then converted into digital domain for further processing and storage.

High-speed photonically assisted analog-to-digital conversion using a continuous wave multiwavelength source and phase modulation.

PubMed

Bortnik, Bartosz J; Fetterman, Harold R

2008-10-01

A more simple photonically assisted analog-to-digital conversion system utilizing a cw multiwavelength source and phase modulation instead of a mode-locked laser is presented. The output of the cw multiwavelength source is launched into a dispersive device (such as a single-mode fiber). This fiber creates a pulse train, where the central wavelength of each pulse corresponds to a spectral line of the optical source. The pulses can then be either dispersed again to perform discrete wavelength time stretching or demultiplexed for continuous time analog-to-digital conversion. We experimentally demonstrate the operation of both time stretched and interleaved systems at 38 GHz. The potential of integrating this type of system on a monolithic chip is discussed.

Integrated digital flight-control system for the space shuttle orbiter

NASA Technical Reports Server (NTRS)

1973-01-01

The integrated digital flight control system is presented which provides rotational and translational control of the space shuttle orbiter in all phases of flight: from launch ascent through orbit to entry and touchdown, and during powered horizontal flights. The program provides a versatile control system structure while maintaining uniform communications with other programs, sensors, and control effectors by using an executive routine/functional subroutine format. The program reads all external variables at a single point, copies them into its dedicated storage, and then calls the required subroutines in the proper sequence. As a result, the flight control program is largely independent of other programs in the GN&C computer complex and is equally insensitive to the characteristics of the processor configuration. The integrated structure of the control system and the DFCS executive routine which embodies that structure are described along with the input and output. The specific estimation and control algorithms used in the various mission phases are given.

I/O impedance controller

DOEpatents

Ruesch, Rodney; Jenkins, Philip N.; Ma, Nan

2004-03-09

There is disclosed apparatus and apparatus for impedance control to provide for controlling the impedance of a communication circuit using an all-digital impedance control circuit wherein one or more control bits are used to tune the output impedance. In one example embodiment, the impedance control circuit is fabricated using circuit components found in a standard macro library of a computer aided design system. According to another example embodiment, there is provided a control for an output driver on an integrated circuit ("IC") device to provide for forming a resistor divider network with the output driver and a resistor off the IC device so that the divider network produces an output voltage, comparing the output voltage of the divider network with a reference voltage, and adjusting the output impedance of the output driver to attempt to match the output voltage of the divider network and the reference voltage. Also disclosed is over-sampling the divider network voltage, storing the results of the over sampling, repeating the over-sampling and storing, averaging the results of multiple over sampling operations, controlling the impedance with a plurality of bits forming a word, and updating the value of the word by only one least significant bit at a time.

Ultralow-Power Digital Correlator for Microwave Polarimetry

NASA Technical Reports Server (NTRS)

Piepmeier, Jeffrey R.; Hass, K. Joseph

2004-01-01

A recently developed high-speed digital correlator is especially well suited for processing readings of a passive microwave polarimeter. This circuit computes the autocorrelations of, and the cross-correlations among, data in four digital input streams representing samples of in-phase (I) and quadrature (Q) components of two intermediate-frequency (IF) signals, denoted A and B, that are generated in heterodyne reception of two microwave signals. The IF signals arriving at the correlator input terminals have been digitized to three levels (-1,0,1) at a sampling rate up to 500 MHz. Two bits (representing sign and magnitude) are needed to represent the instantaneous datum in each input channel; hence, eight bits are needed to represent the four input signals during any given cycle of the sampling clock. The accumulation (integration) time for the correlation is programmable in increments of 2(exp 8) cycles of the sampling clock, up to a maximum of 2(exp 24) cycles. The basic functionality of the correlator is embodied in 16 correlation slices, each of which contains identical logic circuits and counters (see figure). The first stage of each correlation slice is a logic gate that computes one of the desired correlations (for example, the autocorrelation of the I component of A or the negative of the cross-correlation of the I component of A and the Q component of B). The sampling of the output of the logic gate output is controlled by the sampling-clock signal, and an 8-bit counter increments in every clock cycle when the logic gate generates output. The most significant bit of the 8-bit counter is sampled by a 16-bit counter with a clock signal at 2(exp 8) the frequency of the sampling clock. The 16-bit counter is incremented every time the 8-bit counter rolls over.

Development of Data Acquisition Card Driver for ICRH System on EAST

NASA Astrophysics Data System (ADS)

Liu, Daming; Luo, Jiarong; Zhao, Yanping; Qin, Chengming

2008-04-01

Presented in this paper is the development of the driver for the data acquisition card with a peripheral component interconnection (PCI) local bus on the ion cyclotron range of frequency heating (ICRH) system. The driver is mainly aimed at the embedded VxWorks system (real-time operating system) which is widely used in various fields of real-time systems. An efficient way is employed to develop this driver, which will advance the real-time control of the ICRH system on the experimental advanced superconductor tokamak (EAST). The driver is designed using the TORNADO integrated development environment (IDE), and implemented in C plus language. The details include the hardware configuration, analogue/digital (A/D) and digital/analogue (D/A) conversion, input and output (I/O) operation of the driver to support over five cards. The data acquisition card can be manipulated in a low-level program and meet the requirements of A/D conversion and D/A outputs.

Scenarios and performance measures for advanced ISDN satellite design and experiments

NASA Technical Reports Server (NTRS)

Pepin, Gerard R.

1991-01-01

Described here are the contemplated input and expected output for the Interim Service Integrated Services Digital Network (ISDN) Satellite (ISIS) and Full Service ISDN Satellite (FSIS) Models. The discrete event simulations of these models are presented with specific scenarios that stress ISDN satellite parameters. Performance measure criteria are presented for evaluating the advanced ISDN communication satellite designs of the NASA Satellite Communications Research (SCAR) Program.

Time of flight system on a chip

NASA Technical Reports Server (NTRS)

Paschalidis, Nicholas P. (Inventor)

2006-01-01

A CMOS time-of-flight TOF system-on-a-chip SoC for precise time interval measurement with low power consumption and high counting rate has been developed. The analog and digital TOF chip may include two Constant Fraction Discriminators CFDs and a Time-to-Digital Converter TDC. The CFDs can interface to start and stop anodes through two preamplifiers and perform signal processing for time walk compensation (110). The TDC digitizes the time difference with reference to an off-chip precise external clock (114). One TOF output is an 11-bit digital word and a valid event trigger output indicating a valid event on the 11-bit output bus (116).

Eight-Channel Digital Signal Processor and Universal Trigger Module

NASA Astrophysics Data System (ADS)

Skulski, Wojtek; Wolfs, Frank

2003-04-01

A 10-bit, 8-channel, 40 megasamples per second digital signal processor and waveform digitizer DDC-8 (nicknamed Universal Trigger Module) is presented. The digitizer features 8 analog inputs, 1 analog output for a reconstructed analog waveform, 16 NIM logic inputs, 8 NIM logic outputs, and a pool of 16 TTL logic lines which can be individually configured as either inputs or outputs. The first application of this device is to enhance the present trigger electronics for PHOBOS at RHIC. The status of the development and the first results are presented. Possible applications of the new device are discussed. Supported by the NSF grant PHY-0072204.

The CMOS integration of a power inverter

NASA Astrophysics Data System (ADS)

Mannarino, Eric Francis

Due to their falling costs, the use of renewable energy systems is expanding around the world. These systems require the conversion of DC power into grid-synchronous AC power. Currently, the inverters that carry out this task are built using discrete transistors. TowerJazz Semiconductor Corp. has created a commercial CMOS process that allows for blocking voltages of up to 700 V, effectively removing the barrier to integrating power inverters onto a single chip. This thesis explores this process using two topologies. The first is a cell-based switched-capacitor topology first presented by Ke Zou. The second is a novel topology that explores the advantage of using a bused input-output system, as in digital electronics. Simulations run on both topologies confirm the high-efficiency demonstrated in Zou’s process as well as the advantage the bus-based system has in output voltage levels.

Genetic programs constructed from layered logic gates in single cells

PubMed Central

Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

2014-01-01

Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

A class of systolizable IIR digital filters and its design for proper scaling and minimum output roundoff noise

NASA Technical Reports Server (NTRS)

Lei, Shaw-Min; Yao, Kung

1990-01-01

A class of infinite impulse response (IIR) digital filters with a systolizable structure is proposed and its synthesis is investigated. The systolizable structure consists of pipelineable regular modules with local connections and is suitable for VLSI implementation. It is capable of achieving high performance as well as high throughput. This class of filter structure provides certain degrees of freedom that can be used to obtain some desirable properties for the filter. Techniques of evaluating the internal signal powers and the output roundoff noise of the proposed filter structure are developed. Based upon these techniques, a well-scaled IIR digital filter with minimum output roundoff noise is designed using a local optimization approach. The internal signals of all the modes of this filter are scaled to unity in the l2-norm sense. Compared to the Rao-Kailath (1984) orthogonal digital filter and the Gray-Markel (1973) normalized-lattice digital filter, this filter has better scaling properties and lower output roundoff noise.

A generalised optimal linear quadratic tracker with universal applications. Part 2: discrete-time systems

NASA Astrophysics Data System (ADS)

Ebrahimzadeh, Faezeh; Tsai, Jason Sheng-Hong; Chung, Min-Ching; Liao, Ying Ting; Guo, Shu-Mei; Shieh, Leang-San; Wang, Li

2017-01-01

Contrastive to Part 1, Part 2 presents a generalised optimal linear quadratic digital tracker (LQDT) with universal applications for the discrete-time (DT) systems. This includes (1) a generalised optimal LQDT design for the system with the pre-specified trajectories of the output and the control input and additionally with both the input-to-output direct-feedthrough term and known/estimated system disturbances or extra input/output signals; (2) a new optimal filter-shaped proportional plus integral state-feedback LQDT design for non-square non-minimum phase DT systems to achieve a minimum-phase-like tracking performance; (3) a new approach for computing the control zeros of the given non-square DT systems; and (4) a one-learning-epoch input-constrained iterative learning LQDT design for the repetitive DT systems.

Analysis and design of digital output interface devices for gas turbine electronic controls

NASA Technical Reports Server (NTRS)

Newirth, D. M.; Koenig, E. W.

1976-01-01

A trade study was performed on twenty-one digital output interface schemes for gas turbine electronic controls to select the most promising scheme based on criteria of reliability, performance, cost, and sampling requirements. The most promising scheme, a digital effector with optical feedback of the fuel metering valve position, was designed.

Parallel-Processing Equalizers for Multi-Gbps Communications

NASA Technical Reports Server (NTRS)

Gray, Andrew; Ghuman, Parminder; Hoy, Scott; Satorius, Edgar H.

2004-01-01

Architectures have been proposed for the design of frequency-domain least-mean-square complex equalizers that would be integral parts of parallel- processing digital receivers of multi-gigahertz radio signals and other quadrature-phase-shift-keying (QPSK) or 16-quadrature-amplitude-modulation (16-QAM) of data signals at rates of multiple gigabits per second. Equalizers as used here denotes receiver subsystems that compensate for distortions in the phase and frequency responses of the broad-band radio-frequency channels typically used to convey such signals. The proposed architectures are suitable for realization in very-large-scale integrated (VLSI) circuitry and, in particular, complementary metal oxide semiconductor (CMOS) application- specific integrated circuits (ASICs) operating at frequencies lower than modulation symbol rates. A digital receiver of the type to which the proposed architecture applies (see Figure 1) would include an analog-to-digital converter (A/D) operating at a rate, fs, of 4 samples per symbol period. To obtain the high speed necessary for sampling, the A/D and a 1:16 demultiplexer immediately following it would be constructed as GaAs integrated circuits. The parallel-processing circuitry downstream of the demultiplexer, including a demodulator followed by an equalizer, would operate at a rate of only fs/16 (in other words, at 1/4 of the symbol rate). The output from the equalizer would be four parallel streams of in-phase (I) and quadrature (Q) samples.

Programmable pulse generator based on programmable logic and direct digital synthesis.

PubMed

Suchenek, M; Starecki, T

2012-12-01

The paper presents a new approach of pulse generation which results in both wide range tunability and high accuracy of the output pulses. The concept is based on the use of programmable logic and direct digital synthesis. The programmable logic works as a set of programmable counters, while direct digital synthesis (DDS) as the clock source. Use of DDS as the clock source results in stability of the output pulses comparable to the stability of crystal oscillators and quasi-continuous tuning of the output frequency.

Image sensor with high dynamic range linear output

NASA Technical Reports Server (NTRS)

Yadid-Pecht, Orly (Inventor); Fossum, Eric R. (Inventor)

2007-01-01

Designs and operational methods to increase the dynamic range of image sensors and APS devices in particular by achieving more than one integration times for each pixel thereof. An APS system with more than one column-parallel signal chains for readout are described for maintaining a high frame rate in readout. Each active pixel is sampled for multiple times during a single frame readout, thus resulting in multiple integration times. The operation methods can also be used to obtain multiple integration times for each pixel with an APS design having a single column-parallel signal chain for readout. Furthermore, analog-to-digital conversion of high speed and high resolution can be implemented.

Correction of I/Q channel errors without calibration

DOEpatents

Doerry, Armin W.; Tise, Bertice L.

2002-01-01

A method of providing a balanced demodular output for a signal such as a Doppler radar having an analog pulsed input; includes adding a variable phase shift as a function of time to the input signal, applying the phase shifted input signal to a demodulator; and generating a baseband signal from the input signal. The baseband signal is low-pass filtered and converted to a digital output signal. By removing the variable phase shift from the digital output signal, a complex data output is formed that is representative of the output of a balanced demodulator.

Active flutter suppression using optical output feedback digital controllers

NASA Technical Reports Server (NTRS)

1982-01-01

A method for synthesizing digital active flutter suppression controllers using the concept of optimal output feedback is presented. A convergent algorithm is employed to determine constrained control law parameters that minimize an infinite time discrete quadratic performance index. Low order compensator dynamics are included in the control law and the compensator parameters are computed along with the output feedback gain as part of the optimization process. An input noise adjustment procedure is used to improve the stability margins of the digital active flutter controller. Sample rate variation, prefilter pole variation, control structure variation and gain scheduling are discussed. A digital control law which accommodates computation delay can stabilize the wing with reasonable rms performance and adequate stability margins.

Two-dimensional radiant energy array computers and computing devices

NASA Technical Reports Server (NTRS)

Schaefer, D. H.; Strong, J. P., III (Inventor)

1976-01-01

Two dimensional digital computers and computer devices operate in parallel on rectangular arrays of digital radiant energy optical signal elements which are arranged in ordered rows and columns. Logic gate devices receive two input arrays and provide an output array having digital states dependent only on the digital states of the signal elements of the two input arrays at corresponding row and column positions. The logic devices include an array of photoconductors responsive to at least one of the input arrays for either selectively accelerating electrons to a phosphor output surface, applying potentials to an electroluminescent output layer, exciting an array of discrete radiant energy sources, or exciting a liquid crystal to influence crystal transparency or reflectivity.

Evaluating video digitizer errors

NASA Astrophysics Data System (ADS)

Peterson, C.

2016-01-01

Analog output video cameras remain popular for recording meteor data. Although these cameras uniformly employ electronic detectors with fixed pixel arrays, the digitization process requires resampling the horizontal lines as they are output in order to reconstruct the pixel data, usually resulting in a new data array of different horizontal dimensions than the native sensor. Pixel timing is not provided by the camera, and must be reconstructed based on line sync information embedded in the analog video signal. Using a technique based on hot pixels, I present evidence that jitter, sync detection, and other timing errors introduce both position and intensity errors which are not present in cameras which internally digitize their sensors and output the digital data directly.

As-built design specification for the digital derivation of daily and monthly data bases from synoptic observations of temperature and precipitation for the People's Republic of China

NASA Technical Reports Server (NTRS)

Jeun, B. H.; Barger, G. L.

1977-01-01

A data base of synoptic meteorological information was compiled for the People's Republic of China, as an integral part of the Large Area Crop Inventory Experiment. A system description is provided, including hardware and software specifications, computation algorithms and an evaluation of output validity. Operations are also outlined, with emphasis placed on least squares interpolation.

High-Voltage-Input Level Translator Using Standard CMOS

NASA Technical Reports Server (NTRS)

Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

2011-01-01

proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors, which, by virtue of being identical to the input transistors, would reproduce the input differential potential at the output

Low-Power Architecture for an Optical Life Gas Analyzer

NASA Technical Reports Server (NTRS)

Pilgrim, Jeffrey; Vakhtin, Andrei

2012-01-01

Analog and digital electronic control architecture has been combined with an operating methodology for an optical trace gas sensor platform that allows very low power consumption while providing four independent gas measurements in essentially real time, as well as a user interface and digital data storage and output. The implemented design eliminates the cross-talk between the measurement channels while maximizing the sensitivity, selectivity, and dynamic range for each measured gas. The combination provides for battery operation on a simple camcorder battery for as long as eight hours. The custom, compact, rugged, self-contained design specifically targets applications of optical major constituent and trace gas detection for multiple gases using multiple lasers and photodetectors in an integrated package.

Input-output characterization of an ultrasonic testing system by digital signal analysis

NASA Technical Reports Server (NTRS)

Williams, J. H., Jr.; Lee, S. S.; Karagulle, H.

1986-01-01

Ultrasonic test system input-output characteristics were investigated by directly coupling the transmitting and receiving transducers face to face without a test specimen. Some of the fundamentals of digital signal processing were summarized. Input and output signals were digitized by using a digital oscilloscope, and the digitized data were processed in a microcomputer by using digital signal-processing techniques. The continuous-time test system was modeled as a discrete-time, linear, shift-invariant system. In estimating the unit-sample response and frequency response of the discrete-time system, it was necessary to use digital filtering to remove low-amplitude noise, which interfered with deconvolution calculations. A digital bandpass filter constructed with the assistance of a Blackman window and a rectangular time window were used. Approximations of the impulse response and the frequency response of the continuous-time test system were obtained by linearly interpolating the defining points of the unit-sample response and the frequency response of the discrete-time system. The test system behaved as a linear-phase bandpass filter in the frequency range 0.6 to 2.3 MHz. These frequencies were selected in accordance with the criterion that they were 6 dB below the maximum peak of the amplitude of the frequency response. The output of the system to various inputs was predicted and the results were compared with the corresponding measurements on the system.

Fabrication and test of digital output interface devices for gas turbine electronic controls

NASA Technical Reports Server (NTRS)

Newirth, D. M.; Koenig, E. W.

1978-01-01

A program was conducted to develop an innovative digital output interface device, a digital effector with optical feedback of the fuel metering valve position, for future electronic controls for gas turbine engines. A digital effector (on-off solenoids driven directly by on-off signals from a digital electronic controller) with optical position feedback was fabricated, coupled with the fuel metering valve, and tested under simulated engine operating conditions. The testing indicated that a digital effector with optical position feedback is a suitable candidate, with proper development for future digital electronic gas turbine controls. The testing also identified several problem areas which would have to be overcome in a final production configuration.

An accurate system for onsite calibration of electronic transformers with digital output.

PubMed

Zhi, Zhang; Li, Hong-Bin

2012-06-01

Calibration systems with digital output are used to replace conventional calibration systems because of principle diversity and characteristics of digital output of electronic transformers. But precision and unpredictable stability limit their onsite application even development. So fully considering the factors influencing accuracy of calibration system and employing simple but reliable structure, an all-digital calibration system with digital output is proposed in this paper. In complicated calibration environments, precision and dynamic range are guaranteed by A/D converter with 24-bit resolution, synchronization error limit is nanosecond by using the novelty synchronization method. In addition, an error correction algorithm based on the differential method by using two-order Hanning convolution window has good inhibition of frequency fluctuation and inter-harmonics interference. To verify the effectiveness, error calibration was carried out in the State Grid Electric Power Research Institute of China and results show that the proposed system can reach the precision class up to 0.05. Actual onsite calibration shows that the system has high accuracy, and is easy to operate with satisfactory stability.

An accurate system for onsite calibration of electronic transformers with digital output

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhi Zhang; Li Hongbin; State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Wuhan 430074

Calibration systems with digital output are used to replace conventional calibration systems because of principle diversity and characteristics of digital output of electronic transformers. But precision and unpredictable stability limit their onsite application even development. So fully considering the factors influencing accuracy of calibration system and employing simple but reliable structure, an all-digital calibration system with digital output is proposed in this paper. In complicated calibration environments, precision and dynamic range are guaranteed by A/D converter with 24-bit resolution, synchronization error limit is nanosecond by using the novelty synchronization method. In addition, an error correction algorithm based on the differentialmore » method by using two-order Hanning convolution window has good inhibition of frequency fluctuation and inter-harmonics interference. To verify the effectiveness, error calibration was carried out in the State Grid Electric Power Research Institute of China and results show that the proposed system can reach the precision class up to 0.05. Actual onsite calibration shows that the system has high accuracy, and is easy to operate with satisfactory stability.« less

An accurate system for onsite calibration of electronic transformers with digital output

NASA Astrophysics Data System (ADS)

Zhi, Zhang; Li, Hong-Bin

2012-06-01

Calibration systems with digital output are used to replace conventional calibration systems because of principle diversity and characteristics of digital output of electronic transformers. But precision and unpredictable stability limit their onsite application even development. So fully considering the factors influencing accuracy of calibration system and employing simple but reliable structure, an all-digital calibration system with digital output is proposed in this paper. In complicated calibration environments, precision and dynamic range are guaranteed by A/D converter with 24-bit resolution, synchronization error limit is nanosecond by using the novelty synchronization method. In addition, an error correction algorithm based on the differential method by using two-order Hanning convolution window has good inhibition of frequency fluctuation and inter-harmonics interference. To verify the effectiveness, error calibration was carried out in the State Grid Electric Power Research Institute of China and results show that the proposed system can reach the precision class up to 0.05. Actual onsite calibration shows that the system has high accuracy, and is easy to operate with satisfactory stability.

Programmable Remapper with Single Flow Architecture

NASA Technical Reports Server (NTRS)

Fisher, Timothy E. (Inventor)

1993-01-01

An apparatus for image processing comprising a camera for receiving an original visual image and transforming the original visual image into an analog image, a first converter for transforming the analog image of the camera to a digital image, a processor having a single flow architecture for receiving the digital image and producing, with a single algorithm, an output image, a second converter for transforming the digital image of the processor to an analog image, and a viewer for receiving the analog image, transforming the analog image into a transformed visual image for observing the transformations applied to the original visual image. The processor comprises one or more subprocessors for the parallel reception of a digital image for producing an output matrix of the transformed visual image. More particularly, the processor comprises a plurality of subprocessors for receiving in parallel and transforming the digital image for producing a matrix of the transformed visual image, and an output interface means for receiving the respective portions of the transformed visual image from the respective subprocessor for producing an output matrix of the transformed visual image.

High performance digital read out integrated circuit (DROIC) for infrared imaging

NASA Astrophysics Data System (ADS)

Mizuno, Genki; Olah, Robert; Oduor, Patrick; Dutta, Achyut K.; Dhar, Nibir K.

2016-05-01

Banpil Photonics has developed a high-performance Digital Read-Out Integrated Circuit (DROIC) for image sensors and camera systems targeting various military, industrial and commercial Infrared (IR) imaging applications. The on-chip digitization of the pixel output eliminates the necessity for an external analog-to-digital converter (ADC), which not only cuts costs, but also enables miniaturization of packaging to achieve SWaP-C camera systems. In addition, the DROIC offers new opportunities for greater on-chip processing intelligence that are not possible in conventional analog ROICs prevalent today. Conventional ROICs, which typically can enhance only one high performance attribute such as frame rate, power consumption or noise level, fail when simultaneously targeting the most aggressive performance requirements demanded in imaging applications today. Additionally, scaling analog readout circuits to meet such requirements leads to expensive, high-power consumption with large and complex systems that are untenable in the trend towards SWaP-C. We present the implementation of a VGA format (640x512 pixels 15μm pitch) capacitivetransimpedance amplifier (CTIA) DROIC architecture that incorporates a 12-bit ADC at the pixel level. The CTIA pixel input circuitry has two gain modes with programmable full-well capacity values of 100K e- and 500K e-. The DROIC has been developed with a system-on-chip architecture in mind, where all the timing and biasing are generated internally without requiring any critical external inputs. The chip is configurable with many parameters programmable through a serial programmable interface (SPI). It features a global shutter, low power, and high frame rates programmable from 30 up 500 frames per second in full VGA format supported through 24 LVDS outputs. This DROIC, suitable for hybridization with focal plane arrays (FPA) is ideal for high-performance uncooled camera applications ranging from near IR (NIR) and shortwave IR (SWIR) to mid-wave IR (MWIR) and long-wave IR (LWIR) spectral bands.

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability. For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

Double closed-loop resonant micro optic gyro using hybrid digital phase modulation.

PubMed

Ma, Huilian; Zhang, Jianjie; Wang, Linglan; Jin, Zhonghe

2015-06-15

It is well-known that the closed-loop operation in optical gyros offers wider dynamic range and better linearity. By adding a stair-like digital serrodyne wave to a phase modulator can be used as a frequency shifter. The width of one stair in this stair-like digital serrodyne wave should be set equal to the optical transmission time in the resonator, which is relaxed in the hybrid digital phase modulation (HDPM) scheme. The physical mechanism for this relaxation is firstly indicated in this paper. Detailed theoretical and experimental investigations are presented for the HDPM. Simulation and experimental results show that the width of one stair is not restricted by the optical transmission time, however, it should be optimized according to the rise time of the output of the digital-to-analogue converter. Based on the optimum parameters of the HDPM, a bias stability of 0.05°/s for the integration time of 400 seconds in 1 h has been carried out in an RMOG with a waveguide ring resonator with a length of 7.9 cm and a diameter of 2.5 cm.

Ionospheric Research Using Digital Ionosondes.

DTIC Science & Technology

1983-07-01

HEIGHT ANALYSIS, ARTIST 96 7.0 CHEMICAL RELEASE EXPERIMENTS AT NATAL 105 8.0 IONOSPHERIC HEATING EXPERIMENTS AT ARECIBO 114 9.0 DIGISONDE 128...Jan 82 20:30 to 12 AST 89 67 Thule 82-022 92 68 Integrated Height Characteristic Thule 82-022 93 69 ARTIST Ionogram Print 103 70 Automatic Profiles...Where Manual and Automatic Scalings Fall Within Indicated Limits 97 6a ARTIST Initialization 99 6b ARTIST Initialization 100 6c ARTIST Output 101 N

Direct Digital Boiler Control Systems for the Navy Small Boiler Equipment.

DTIC Science & Technology

1983-02-01

Hardware. Each full-size ACU a 6 caculation modules 30 arrme, modufes sation for dead time lag contains input/output circuit a 16 control mo uies a...along with lather modules of the DCS-1000 family. ’The complete instrument consists of plug-in circuit boards that allow easy Teplacement of a...Maintenance-Most systems indicate trouble areas with diagnostic routines or integral LED indicators so that circuit boards can be replaced to correct

Data acquisition channel apparatus

NASA Astrophysics Data System (ADS)

Higgins, C. H.; Skipper, J. D.

1985-10-01

Dicussed is a hybrid integrated circuit data acquisition channel apparatus employing an operational amplifier fed by a low current differential bipolar transistor preamplifier having separate feedback gain and signal gain determining elements and providing an amplified signal output to a sample and hold and analog-to-digital converter circuits. The disclosed apparatus operates with low energy and small space requirements and is capable of operations without the sample and hold circuit where the nature of the applied input signal permits.

Dual-range linearized transimpedance amplifier system

DOEpatents

Wessendorf, Kurt O.

2010-11-02

A transimpedance amplifier system is disclosed which simultaneously generates a low-gain output signal and a high-gain output signal from an input current signal using a single transimpedance amplifier having two different feedback loops with different amplification factors to generate two different output voltage signals. One of the feedback loops includes a resistor, and the other feedback loop includes another resistor in series with one or more diodes. The transimpedance amplifier system includes a signal linearizer to linearize one or both of the low- and high-gain output signals by scaling and adding the two output voltage signals from the transimpedance amplifier. The signal linearizer can be formed either as an analog device using one or two summing amplifiers, or alternately can be formed as a digital device using two analog-to-digital converters and a digital signal processor (e.g. a microprocessor or a computer).

Integrated Digital Flight Control System for the Space Shuttle Orbiter

NASA Technical Reports Server (NTRS)

1973-01-01

The objectives of the integrated digital flight control system (DFCS) is to provide rotational and translational control of the space shuttle orbiter in all phases of flight: from launch ascent through orbit to entry and touchdown, and during powered horizontal flights. The program provides a versatile control system structure while maintaining uniform communications with other programs, sensors, and control effectors by using an executive routine/functional subroutine format. The program reads all external variables at a single point, copies them into its dedicated storage, and then calls the required subroutines in the proper sequence. As a result, the flight control program is largely independent of other programs in the computer complex and is equally insensitive to characteristics of the processor configuration. The integrated structure is described of the control system and the DFCS executive routine which embodies that structure. The input and output, including jet selection are included. Specific estimation and control algorithm are shown for the various mission phases: cruise (including horizontal powered flight), entry, on-orbit, and boost. Attitude maneuver routines that interface with the DFCS are included.

Thermal heat-balance mode flow-to-frequency converter

NASA Astrophysics Data System (ADS)

Pawlowski, Eligiusz

2016-11-01

This paper presents new type of thermal flow converter with the pulse frequency output. The integrating properties of the temperature sensor have been used, which allowed for realization of pulse frequency modulator with thermal feedback loop, stabilizing temperature of sensor placed in the flowing medium. The system assures balancing of heat amount supplied in impulses to the sensor and heat given up by the sensor in a continuous way to the flowing medium. Therefore the frequency of output impulses is proportional to the heat transfer coefficient from sensor to environment. According to the King's law, the frequency of those impulses is a function of medium flow velocity around the sensor. The special feature of presented solution is total integration of thermal sensor with the measurement signal conditioning system. Sensor and conditioning system are not the separate elements of the measurement circuit, but constitute a whole in form of thermal heat-balance mode flow-to-frequency converter. The advantage of such system is easiness of converting the frequency signal to the digital form, without using any additional analogue-to-digital converters. The frequency signal from the converter may be directly connected to the microprocessor input, which with use of standard built-in counters may convert the frequency into numerical value of high precision. Moreover, the frequency signal has higher resistance to interference than the voltage signal and may be transmitted to remote locations without the information loss.

Integration of an open interface PC scene generator using COTS DVI converter hardware

NASA Astrophysics Data System (ADS)

Nordland, Todd; Lyles, Patrick; Schultz, Bret

2006-05-01

Commercial-Off-The-Shelf (COTS) personal computer (PC) hardware is increasingly capable of computing high dynamic range (HDR) scenes for military sensor testing at high frame rates. New electro-optical and infrared (EO/IR) scene projectors feature electrical interfaces that can accept the DVI output of these PC systems. However, military Hardware-in-the-loop (HWIL) facilities such as those at the US Army Aviation and Missile Research Development and Engineering Center (AMRDEC) utilize a sizeable inventory of existing projection systems that were designed to use the Silicon Graphics Incorporated (SGI) digital video port (DVP, also known as DVP2 or DD02) interface. To mate the new DVI-based scene generation systems to these legacy projection systems, CG2 Inc., a Quantum3D Company (CG2), has developed a DVI-to-DVP converter called Delta DVP. This device takes progressive scan DVI input, converts it to digital parallel data, and combines and routes color components to derive a 16-bit wide luminance channel replicated on a DVP output interface. The HWIL Functional Area of AMRDEC has developed a suite of modular software to perform deterministic real-time, wave band-specific rendering of sensor scenes, leveraging the features of commodity graphics hardware and open source software. Together, these technologies enable sensor simulation and test facilities to integrate scene generation and projection components with diverse pedigrees.

Golden Ratio Versus Pi as Random Sequence Sources for Monte Carlo Integration

NASA Technical Reports Server (NTRS)

Sen, S. K.; Agarwal, Ravi P.; Shaykhian, Gholam Ali

2007-01-01

We discuss here the relative merits of these numbers as possible random sequence sources. The quality of these sequences is not judged directly based on the outcome of all known tests for the randomness of a sequence. Instead, it is determined implicitly by the accuracy of the Monte Carlo integration in a statistical sense. Since our main motive of using a random sequence is to solve real world problems, it is more desirable if we compare the quality of the sequences based on their performances for these problems in terms of quality/accuracy of the output. We also compare these sources against those generated by a popular pseudo-random generator, viz., the Matlab rand and the quasi-random generator ha/ton both in terms of error and time complexity. Our study demonstrates that consecutive blocks of digits of each of these numbers produce a good random sequence source. It is observed that randomly chosen blocks of digits do not have any remarkable advantage over consecutive blocks for the accuracy of the Monte Carlo integration. Also, it reveals that pi is a better source of a random sequence than theta when the accuracy of the integration is concerned.

EROIC: a BiCMOS pseudo-gaussian shaping amplifier for high-resolution X-ray spectroscopy

NASA Astrophysics Data System (ADS)

Buzzetti, Siro; Guazzoni, Chiara; Longoni, Antonio

2003-10-01

We present the design and complete characterization of a fifth-order pseudo-gaussian shaping amplifier with 1 μs shaping time. The circuit is optimized for the read-out of signals coming from Silicon Drift Detectors for high-resolution X-ray spectroscopy. The novelty of the designed chip stands in the use of a current feedback loop to place the poles in the desired position on the s-plane. The amplifier has been designed in 0.8 μm BiCMOS technology and fully tested. The EROIC chip comprises also the peak stretcher, the peak detector, the output buffer to drive the external ADC and the pile-up rejection system. The circuit needs a single +5 V power supply and the dissipated power is 5 mW per channel. The digital outputs can be directly coupled to standard digital CMOS ICs. The measured integral-non-linearity of the whole chip is below 0.05% and the achieved energy resolution at the Mn Kα line detected by a 5 mm 2 Peltier-cooled Silicon Drift Detector is 167 eV FWHM.

A read-in IC for infrared scene projectors with voltage drop compensation for improved uniformity of emitter current

NASA Astrophysics Data System (ADS)

Cho, Min Ji; Shin, Uisub; Lee, Hee Chul

2017-05-01

This paper proposes a read-in integrated circuit (RIIC) for infrared scene projectors, which compensates for the voltage drops in ground lines in order to improve the uniformity of the emitter current. A current output digital-to-analog converter is utilized to convert digital scene data into scene data currents. The unit cells in the array receive the scene data current and convert it into data voltage, which simultaneously self-adjusts to account for the voltage drop in the ground line in order to generate the desired emitter current independently of variations in the ground voltage. A 32 × 32 RIIC unit cell array was designed and fabricated using a 0.18-μm CMOS process. The experimental results demonstrate that the proposed RIIC can output a maximum emitter current of 150 μA and compensate for a voltage drop in the ground line of up to 500 mV under a 3.3-V supply. The uniformity of the emitter current is significantly improved compared to that of a conventional RIIC.

Fast, multi-channel real-time processing of signals with microsecond latency using graphics processing units.

PubMed

Rath, N; Kato, S; Levesque, J P; Mauel, M E; Navratil, G A; Peng, Q

2014-04-01

Fast, digital signal processing (DSP) has many applications. Typical hardware options for performing DSP are field-programmable gate arrays (FPGAs), application-specific integrated DSP chips, or general purpose personal computer systems. This paper presents a novel DSP platform that has been developed for feedback control on the HBT-EP tokamak device. The system runs all signal processing exclusively on a Graphics Processing Unit (GPU) to achieve real-time performance with latencies below 8 μs. Signals are transferred into and out of the GPU using PCI Express peer-to-peer direct-memory-access transfers without involvement of the central processing unit or host memory. Tests were performed on the feedback control system of the HBT-EP tokamak using forty 16-bit floating point inputs and outputs each and a sampling rate of up to 250 kHz. Signals were digitized by a D-TACQ ACQ196 module, processing done on an NVIDIA GTX 580 GPU programmed in CUDA, and analog output was generated by D-TACQ AO32CPCI modules.

A highly sensitive CMOS digital Hall sensor for low magnetic field applications.

PubMed

Xu, Yue; Pan, Hong-Bin; He, Shu-Zhuan; Li, Li

2012-01-01

Integrated CMOS Hall sensors have been widely used to measure magnetic fields. However, they are difficult to work with in a low magnetic field environment due to their low sensitivity and large offset. This paper describes a highly sensitive digital Hall sensor fabricated in 0.18 μm high voltage CMOS technology for low field applications. The sensor consists of a switched cross-shaped Hall plate and a novel signal conditioner. It effectively eliminates offset and low frequency 1/f noise by applying a dynamic quadrature offset cancellation technique. The measured results show the optimal Hall plate achieves a high current related sensitivity of about 310 V/AT. The whole sensor has a remarkable ability to measure a minimum ± 2 mT magnetic field and output a digital Hall signal in a wide temperature range from -40 °C to 120 °C.

A high-resolution time-to-digital converter using a three-level resolution

NASA Astrophysics Data System (ADS)

Dehghani, Asma; Saneei, Mohsen; Mahani, Ali

2016-08-01

In this article, a three-level resolution Vernier delay line time-to-digital converter (TDC) was proposed. The proposed TDC core was based on the pseudo-differential digital architecture that made it insensitive to nMOS and pMOS transistor mismatches. It also employed a Vernier delay line (VDL) in conjunction with an asynchronous read-out circuitry. The time interval resolution was equal to the difference of delay between buffers of upper and lower chains. Then, via the extra chain included in the lower delay line, resolution was controlled and power consumption was reduced. This method led to high resolution and low power consumption. The measurement results of TDC showed a resolution of 4.5 ps, 12-bit output dynamic range, and integral nonlinearity of 1.5 least significant bits. This TDC achieved the consumption of 68.43 µW from 1.1-V supply.

Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

NASA Astrophysics Data System (ADS)

Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

2018-03-01

This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

Frequency stabilization of quantum cascade laser for spectroscopic CO2 isotope analysis

NASA Astrophysics Data System (ADS)

Han, Luo; Xia, Hua; Pang, Tao; Zhang, Zhirong; Wu, Bian; Liu, Shuo; Sun, Pengshuai; Cui, Xiaojuan; Wang, Yu; Sigrist, Markus W.; Dong, Fengzhong

2018-06-01

Using off-axis integrated cavity output spectroscopy, named OA-ICOS, the absorption spectrum of CO2 at 4.32 μm is recorded by using a quantum cascade laser (QCL). The concentration of the three isotopologues 16O12C16O, 16O13C16O and 16O12C18O is detected simultaneously. The isotope abundance ratio of 13C and 18O in CO2 gas can be obtained, which is most useful for ecological research. Since the ambient temperature has a serious influence on the output wavelength of the laser, even small temperature variations seriously affect the stability and sensitivity of the system. In this paper, a wavelength locking technique for QCL is proposed. The output of a digital potentiometer integrated in the laser current driver control is modified by software, resulting in a correction of the driving current of the laser and thus of its wavelength. This method strongly reduces the influence of external factors on the wavelength drift of lasers and thus substantially improves the stability and performance of OA-ICOS as is demonstrated with long-time measurements on CO2 in laboratory air.

Extensions to PIFCGT: Multirate output feedback and optimal disturbance suppression

NASA Technical Reports Server (NTRS)

Broussard, J. R.

1986-01-01

New control synthesis procedures for digital flight control systems were developed. The theoretical developments are the solution to the problem of optimal disturbance suppression in the presence of windshear. Control synthesis is accomplished using a linear quadratic cost function, the command generator tracker for trajectory following and the proportional-integral-filter control structure for practical implementation. Extensions are made to the optimal output feedback algorithm for computing feedback gains so that the multirate and optimal disturbance control designs are computed and compared for the advanced transport operating system (ATOPS). The performance of the designs is demonstrated by closed-loop poles, frequency domain multiinput sigma and eigenvalue plots and detailed nonlinear 6-DOF aircraft simulations in the terminal area in the presence of windshear.

Pre-Flight Radiometric Model of Linear Imager on LAPAN-IPB Satellite

NASA Astrophysics Data System (ADS)

Hadi Syafrudin, A.; Salaswati, Sartika; Hasbi, Wahyudi

2018-05-01

LAPAN-IPB Satellite is Microsatellite class with mission of remote sensing experiment. This satellite carrying Multispectral Line Imager for captured of radiometric reflectance value from earth to space. Radiometric quality of image is important factor to classification object on remote sensing process. Before satellite launch in orbit or pre-flight, Line Imager have been tested by Monochromator and integrating sphere to get spectral and every pixel radiometric response characteristic. Pre-flight test data with variety setting of line imager instrument used to see correlation radiance input and digital number of images output. Output input correlation is described by the radiance conversion model with imager setting and radiometric characteristics. Modelling process from hardware level until normalize radiance formula are presented and discussed in this paper.

Input-output characterization of an ultrasonic testing system by digital signal analysis

NASA Technical Reports Server (NTRS)

Karaguelle, H.; Lee, S. S.; Williams, J., Jr.

1984-01-01

The input/output characteristics of an ultrasonic testing system used for stress wave factor measurements were studied. The fundamentals of digital signal processing are summarized. The inputs and outputs are digitized and processed in a microcomputer using digital signal processing techniques. The entire ultrasonic test system, including transducers and all electronic components, is modeled as a discrete-time linear shift-invariant system. Then the impulse response and frequency response of the continuous time ultrasonic test system are estimated by interpolating the defining points in the unit sample response and frequency response of the discrete time system. It is found that the ultrasonic test system behaves as a linear phase bandpass filter. Good results were obtained for rectangular pulse inputs of various amplitudes and durations and for tone burst inputs whose center frequencies are within the passband of the test system and for single cycle inputs of various amplitudes. The input/output limits on the linearity of the system are determined.

>100% output differential efficiency 1.55-μm VCSELs using submonolayer superlattices digital-alloy multiple-active-regions grown by MBE on InP

NASA Astrophysics Data System (ADS)

Wang, C. S.; Koda, R.; Huntington, A. S.; Gossard, A. C.; Coldren, L. A.

2005-04-01

High-quality InAlGaAs digital-alloy active regions using submonolayer superlattices were developed and employed in a 3-stage bipolar cascade multiple-active-region vertical cavity surface emitting laser (VCSEL) design. The photoluminescence intensity and linewidth of these active regions were optimized by varying the substrate temperature and digitization period. These active regions exhibit considerable improvement over previously developed digital-alloy active regions and are comparable to analog-alloy active regions. Multiple-active-region VCSELs, grown all-epitaxially by MBE on InP, demonstrate greater than 100% output differential efficiency at 1.55-μm emission. A record high 104% output differential efficiency was achieved for a 3-stage long-wavelength VCSEL.

Digital frequency synthesizer for radar astronomy

NASA Technical Reports Server (NTRS)

Sadr, R.; Satorius, E.; Robinett, L.; Olson, E.

1990-01-01

The digital frequency synthesizer (DFS) is an integral part of the programmable local oscillator (PLO) which is being developed for the NASA's Deep Space Network (DSN) and radar astronomy. Here, the theory of operation and the design of the DFS are discussed, and the design parameters in application for the Goldstone Solar System Radar (GSSR) are specified. The spectral purity of the DFS is evaluated by analytically evaluating the output spectrum of the DFS. A novel architecture is proposed for the design of the DFS with a frequency resolution of 1/2(exp 48) of the clock frequency (0.35 mu Hz at 100 MHz), a phase resolution of 0.0056 degrees (16 bits), and a frequency spur attenuation of -96 dBc.

A safety monitoring system for taxi based on CMOS imager

NASA Astrophysics Data System (ADS)

Liu, Zhi

2005-01-01

CMOS image sensors now become increasingly competitive with respect to their CCD counterparts, while adding advantages such as no blooming, simpler driving requirements and the potential of on-chip integration of sensor, analogue circuitry, and digital processing functions. A safety monitoring system for taxi based on cmos imager that can record field situation when unusual circumstance happened is described in this paper. The monitoring system is based on a CMOS imager (OV7120), which can output digital image data through parallel pixel data port. The system consists of a CMOS image sensor, a large capacity NAND FLASH ROM, a USB interface chip and a micro controller (AT90S8515). The structure of whole system and the test data is discussed and analyzed in detail.

MIRAGE: The data acquisition, analysis, and display system

NASA Technical Reports Server (NTRS)

Rosser, Robert S.; Rahman, Hasan H.

1993-01-01

Developed for the NASA Johnson Space Center and Life Sciences Directorate by GE Government Services, the Microcomputer Integrated Real-time Acquisition Ground Equipment (MIRAGE) system is a portable ground support system for Spacelab life sciences experiments. The MIRAGE system can acquire digital or analog data. Digital data may be NRZ-formatted telemetry packets of packets from a network interface. Analog signal are digitized and stored in experimental packet format. Data packets from any acquisition source are archived to a disk as they are received. Meta-parameters are generated from the data packet parameters by applying mathematical and logical operators. Parameters are displayed in text and graphical form or output to analog devices. Experiment data packets may be retransmitted through the network interface. Data stream definition, experiment parameter format, parameter displays, and other variables are configured using spreadsheet database. A database can be developed to support virtually any data packet format. The user interface provides menu- and icon-driven program control. The MIRAGE system can be integrated with other workstations to perform a variety of functions. The generic capabilities, adaptability and ease of use make the MIRAGE a cost-effective solution to many experimental data processing requirements.

Interacting With A Near Real-Time Urban Digital Watershed Using Emerging Geospatial Web Technologies

NASA Astrophysics Data System (ADS)

Liu, Y.; Fazio, D. J.; Abdelzaher, T.; Minsker, B.

2007-12-01

The value of real-time hydrologic data dissemination including river stage, streamflow, and precipitation for operational stormwater management efforts is particularly high for communities where flash flooding is common and costly. Ideally, such data would be presented within a watershed-scale geospatial context to portray a holistic view of the watershed. Local hydrologic sensor networks usually lack comprehensive integration with sensor networks managed by other agencies sharing the same watershed due to administrative, political, but mostly technical barriers. Recent efforts on providing unified access to hydrological data have concentrated on creating new SOAP-based web services and common data format (e.g. WaterML and Observation Data Model) for users to access the data (e.g. HIS and HydroSeek). Geospatial Web technology including OGC sensor web enablement (SWE), GeoRSS, Geo tags, Geospatial browsers such as Google Earth and Microsoft Virtual Earth and other location-based service tools provides possibilities for us to interact with a digital watershed in near-real-time. OGC SWE proposes a revolutionary concept towards a web-connected/controllable sensor networks. However, these efforts have not provided the capability to allow dynamic data integration/fusion among heterogeneous sources, data filtering and support for workflows or domain specific applications where both push and pull mode of retrieving data may be needed. We propose a light weight integration framework by extending SWE with open source Enterprise Service Bus (e.g., mule) as a backbone component to dynamically transform, transport, and integrate both heterogeneous sensor data sources and simulation model outputs. We will report our progress on building such framework where multi-agencies" sensor data and hydro-model outputs (with map layers) will be integrated and disseminated in a geospatial browser (e.g. Microsoft Virtual Earth). This is a collaborative project among NCSA, USGS Illinois Water Science Center, Computer Science Department at UIUC funded by the Adaptive Environmental Infrastructure Sensing and Information Systems initiative at UIUC.

Inertial Orientation Trackers with Drift Compensation

NASA Technical Reports Server (NTRS)

Foxlin, Eric M.

2008-01-01

A class of inertial-sensor systems with drift compensation has been invented for use in measuring the orientations of human heads (and perhaps other, similarly sized objects). These systems can be designed to overcome some of the limitations of prior orientation-measuring systems that are based, variously, on magnetic, optical, mechanical-linkage, and acoustical principles. The orientation signals generated by the systems of this invention could be used for diverse purposes, including controlling head-orientation-dependent virtual reality visual displays or enabling persons whose limbs are paralyzed to control machinery by means of head motions. The inventive concept admits to variations too numerous to describe here, making it necessary to limit this description to a typical system, the selected aspects of which are illustrated in the figure. A set of sensors is mounted on a bracket on a band or a cap that gently but firmly grips the wearer s head to be tracked. Among the sensors are three drift-sensitive rotationrate sensors (e.g., integrated-circuit angular- rate-measuring gyroscopes), which put out DC voltages nominally proportional to the rates of rotation about their sensory axes. These sensors are mounted in mutually orthogonal orientations for measuring rates of rotation about the roll, pitch, and yaw axes of the wearer s head. The outputs of these rate sensors are conditioned and digitized, and the resulting data are fed to an integrator module implemented in software in a digital computer. In the integrator module, the angular-rate signals are jointly integrated by any of several established methods to obtain a set of angles that represent approximately the orientation of the head in an external, inertial coordinate system. Because some drift is always present as a component of an angular position computed by integrating the outputs of angular-rate sensors, the orientation signal is processed further in a drift-compensator software module.

Thermal-Polarimetric and Visible Data Collection for Face Recognition

DTIC Science & Technology

2016-09-01

pixels • Spectral range: 7.5–13 μm • Analog image output: NTSC analog video • Digital image output: Firewire radiometric, 14-bit digital video to...PC The analog video was not used for this study. The radiometric, 14-bit digital data provided temperature measurement information for comparison...distribution unlimited. 18 9. References 1. Choi J, Hu S, Young SS, Davis LS. Thermal to visible face recognition. Proc. SPIE 8371, Sensing

Design and Implementation of a New Real-Time Frequency Sensor Used as Hardware Countermeasure

PubMed Central

Jiménez-Naharro, Raúl; Gómez-Galán, Juan Antonio; Sánchez-Raya, Manuel; Gómez-Bravo, Fernando; Pedro-Carrasco, Manuel

2013-01-01

A new digital countermeasure against attacks related to the clock frequency is –presented. This countermeasure, known as frequency sensor, consists of a local oscillator, a transition detector, a measurement element and an output block. The countermeasure has been designed using a full-custom technique implemented in an Application-Specific Integrated Circuit (ASIC), and the implementation has been verified and characterized with an integrated design using a 0.35 μm standard Complementary Metal Oxide Semiconductor (CMOS) technology (Very Large Scale Implementation—VLSI implementation). The proposed solution is configurable in resolution time and allowed range of period, achieving a minimum resolution time of only 1.91 ns and an initialization time of 5.84 ns. The proposed VLSI implementation shows better results than other solutions, such as digital ones based on semi-custom techniques and analog ones based on band pass filters, all design parameters considered. Finally, a counter has been used to verify the good performance of the countermeasure in avoiding the success of an attack. PMID:24008285

32 x 16 CMOS smart pixel array for optical interconnects

NASA Astrophysics Data System (ADS)

Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

2000-05-01

Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

Low-Cutoff, High-Pass Digital Filtering of Neural Signals

NASA Technical Reports Server (NTRS)

Mojarradi,Mohammad; Johnson, Travis; Ortiz, Monico; Cunningham, Thomas; Andersen, Richard

2004-01-01

The figure depicts the major functional blocks of a system, now undergoing development, for conditioning neural signals acquired by electrodes implanted in a brain. The overall functions to be performed by this system can be summarized as preamplification, multiplexing, digitization, and high-pass filtering. Other systems under development for recording neural signals typically contain resistor-capacitor analog low-pass filters characterized by cutoff frequencies in the vicinity of 100 Hz. In the application for which this system is being developed, there is a requirement for a cutoff frequency of 5 Hz. Because the resistors needed to obtain such a low cutoff frequency would be impractically large, it was decided to perform low-pass filtering by use of digital rather than analog circuitry. In addition, it was decided to timemultiplex the digitized signals from the multiple input channels into a single stream of data in a single output channel. The signal in each input channel is first processed by a preamplifier having a voltage gain of approximately 50. Embedded in each preamplifier is a low-pass anti-aliasing filter having a cutoff frequency of approximately 10 kHz. The anti-aliasing filters make it possible to couple the outputs of the preamplifiers to the input ports of a multiplexer. The output of the multiplexer is a single stream of time-multiplexed samples of analog signals. This stream is processed by a main differential amplifier, the output of which is sent to an analog-to-digital converter (ADC). The output of the ADC is sent to a digital signal processor (DSP).

Acquisition de donnees a haute resolution et faible latence dediee aux capteurs avioniques de position

NASA Astrophysics Data System (ADS)

Koubaa, Zied

The communication network and the detection mechanisms are two critical systems in a plane. Their performance has a direct impact on aircrafts. This is of particular interest for avionics designers, who have increasingly invested more and more in the development of these elements. As a part of a project in this domain, we introduce the design and the development of a smart interface for position sensors dedicated to flights (Smart Sensor Interface - SSI). This interface will serve to connect sensors of different technologies (electromagnetic, optical and MEMS) to the new communication network, AFDX. The role of this interface is to generate an appropriate excitation signal for certain types of sensors (R/LVDT), and to treat, demodulate, and digitize their output signals. The proposed interface is thus composed of a Signal Acquisition Path (SAP) and an Excitation Signal Generation (ESG). By adopting the Integrated Modular Avionics architecture (IMA), we can minimize the size of the classic interface, reduce its energy consumption and improve its reliability and its performance. The focus of our design is particularly on the Data Acquisition Path (DAP). An Architecture characterized by a high resolution (14 bits) and a low latency (1.2 ms) of this module is introduced and developed in this prestigious work. This architecture was developed after a wellconducted study of existing solutions found in literature work and a detailed analysis of the problems arise in the design and implementation of this system (DAP). The conversion of the sensor signal into a digital signal is the most important step in acquiring data, as it sets the resolution of the acquired information and generates the majority of its latency. This module can also affect the reliability and stability of the system. Among different models and architectures, the Delta-Sigma analog-to-digital converter (ADC) is preferred for this application (for better resolution). This converter is formed by an analog circuit (modulator) followed by digital filters. The complexity of the implementation, the processing delay and the output resolution are all susceptible to change depending on the architecture of these filters. Thus, the main problem while designing such a system arises in the opposing evolution of the resolution and latency parameters; the improvement or evolution of one, results in the destruction of the other. Therefore, our work aims to provide one or more method to optimize the latency caused by the CAN while maintaining the same resolution of the desired data (14 bits). This optimization takes into account the objective of integrating the DAP in modules of small size and low power consumption. This proposed solution was implemented in order to validate the design of the conception of the interface. We are also interested to achieve the proposed solution and validate our design. The obtained results will be evaluated after following the manufacturing strategy. The data acquisition unit is made up of two electronic components. The first component is an integrated circuit, which uses CMOS 0.13mum IBM technology and contains the analog part of CAN (SigmaDelta modulator). The second component is a Virtex-6 FPGA, which allows one to acquire the necessary digital processing required for the acquisition and conversion of the sensor signal. In the final version of the interface, our analog portion will be integrated with the analog portion of GSE in the same chip. The integrated digital logic in the (FPGA) role will thus provide digital data to the ESG module in order to generate the excitation signal.

Calibration of a speckle-based compressive sensing receiver

NASA Astrophysics Data System (ADS)

Sefler, George A.; Shaw, T. Justin; Stapleton, Andrew D.; Valley, George C.

2017-02-01

Optical speckle in a multimode waveguide has been proposed to perform the function of a compressive sensing (CS) measurement matrix (MM) in a receiver for GHz-band radio frequency (RF) signals. Unlike other devices used for the CS MM, e.g. the digital micromirror device (DMD) used in the single pixel camera, the elements of the speckle MM are not known before use and must be measured and calibrated. In our system, the RF signal is modulated on a repetitively pulsed chirped wavelength laser source, generated from mode-locked laser pulses that have been dispersed in time or from an electrically addressed distributed Bragg reflector laser. Next, the optical beam with RF propagates through a multimode fiber or waveguide, which applies different weights in wavelength (or equivalently time) and space and performs the function of the CS MM. The output of the guide is directed to or imaged on a bank of photodiodes with integration time set to the pulse length of the chirp waveform. The output of each photodiode is digitized by an analog-to-digital converter (ADC), and the data from these ADCs are used to form the CS measurement vector. Accurate recovery of the RF signal from CS measurements depends critically on knowledge of the weights in the MM. Here we present results using a stable wavelength laser source to probe the guide.

IDSP- INTERACTIVE DIGITAL SIGNAL PROCESSOR

NASA Technical Reports Server (NTRS)

Mish, W. H.

1994-01-01

The Interactive Digital Signal Processor, IDSP, consists of a set of time series analysis "operators" based on the various algorithms commonly used for digital signal analysis work. The processing of a digital time series to extract information is usually achieved by the application of a number of fairly standard operations. However, it is often desirable to "experiment" with various operations and combinations of operations to explore their effect on the results. IDSP is designed to provide an interactive and easy-to-use system for this type of digital time series analysis. The IDSP operators can be applied in any sensible order (even recursively), and can be applied to single time series or to simultaneous time series. IDSP is being used extensively to process data obtained from scientific instruments onboard spacecraft. It is also an excellent teaching tool for demonstrating the application of time series operators to artificially-generated signals. IDSP currently includes over 43 standard operators. Processing operators provide for Fourier transformation operations, design and application of digital filters, and Eigenvalue analysis. Additional support operators provide for data editing, display of information, graphical output, and batch operation. User-developed operators can be easily interfaced with the system to provide for expansion and experimentation. Each operator application generates one or more output files from an input file. The processing of a file can involve many operators in a complex application. IDSP maintains historical information as an integral part of each file so that the user can display the operator history of the file at any time during an interactive analysis. IDSP is written in VAX FORTRAN 77 for interactive or batch execution and has been implemented on a DEC VAX-11/780 operating under VMS. The IDSP system generates graphics output for a variety of graphics systems. The program requires the use of Versaplot and Template plotting routines and IMSL Math/Library routines. These software packages are not included in IDSP. The virtual memory requirement for the program is approximately 2.36 MB. The IDSP system was developed in 1982 and was last updated in 1986. Versaplot is a registered trademark of Versatec Inc. Template is a registered trademark of Template Graphics Software Inc. IMSL Math/Library is a registered trademark of IMSL Inc.

Forecast of Remote Underwater Sensing Technology.

DTIC Science & Technology

1980-07-01

hr T. MAGNETICS (2 Replies) Q. What will be sensitivities of fluxgate , proton, optical pump, SQUID (superconducting) magnetometers ? A. Fluxgate 0.1...ft Oujtpuit Analog, digital and B3CD Cost $65.K 227 Manu factu rer EG&G Geometric Unit G-806M System Marine Search Proton Magnetometer Sensitivity...optional) Depth Range 0 to 100 m or 6000 m Precision +0.15% FS Time Constant 60 ms Output Digital display, analog and digital BCD output Cost $13.K 243

YADCLAN: yet another digitally-controlled linear artificial neuron.

PubMed

Frenger, Paul

2003-01-01

This paper updates the author's 1999 RMBS presentation on digitally controlled linear artificial neuron design. Each neuron is based on a standard operational amplifier having excitatory and inhibitory inputs, variable gain, an amplified linear analog output and an adjustable threshold comparator for digital output. This design employs a 1-wire serial network of digitally controlled potentiometers and resistors whose resistance values are set and read back under microprocessor supervision. This system embodies several unique and useful features, including: enhanced neuronal stability, dynamic reconfigurability and network extensibility. This artificial neuronal is being employed for feature extraction and pattern recognition in an advanced robotic application.

47 CFR 73.9008 - Interim approval of authorized digital output protection technologies and authorized recording...

Code of Federal Regulations, 2010 CFR

2010-10-01

... certification pursuant to § 0.459 of this chapter. (b) Initial certification window. Following the effective... window for digital output protection technologies or recording methods. Within thirty (30) days after the... certification window, the Commission shall issue a public notice identifying the certifications received and...

A low jitter PLL clock used for phase change memory

NASA Astrophysics Data System (ADS)

Xiao, Hong; Houpeng, Chen; Zhitang, Song; Daolin, Cai; Xi, Li

2013-02-01

A fully integrated low-jitter, precise frequency CMOS phase-locked loop (PLL) clock for the phase change memory (PCM) drive circuit is presented. The design consists of a dynamic dual-reset phase frequency detector (PFD) with high frequency acquisition, a novel low jitter charge pump, a CMOS ring oscillator based voltage-controlled oscillator (VCO), a 2nd order passive loop filter, and a digital frequency divider. The design is fabricated in 0.35 μm CMOS technology and consumes 20 mW from a supply voltage of 5 V. In terms of the PCM's program operation requirement, the output frequency range is from 1 to 140 MHz. For the 140 MHz output frequency, the circuit features a cycle-to-cycle jitter of 28 ps RMS and 250 ps peak-to-peak.

A program to compute three-dimensional subsonic unsteady aerodynamic characteristics using the doublet lattice method, L216 (DUBFLEX). Volume 2: Supplemental system design and maintenance document

NASA Technical Reports Server (NTRS)

Harrison, B. A.; Richard, M.

1979-01-01

The information necessary for execution of the digital computer program L216 on the CDC 6600 is described. L216 characteristics are based on the doublet lattice method. Arbitrary aerodynamic configurations may be represented with combinations of nonplanar lifting surfaces composed of finite constant pressure panel elements, and axially summetric slender bodies composed of constant pressure line elements. Program input consists of configuration geometry, aerodynamic parameters, and modal data; output includes element geometry, pressure difference distributions, integrated aerodynamic coefficients, stability derivatives, generalized aerodynamic forces, and aerodynamic influence coefficient matrices. Optionally, modal data may be input on magnetic field (tape or disk), and certain geometric and aerodynamic output may be saved for subsequent use.

Digital Fingerprinting of Field Programmable Gate Arrays

DTIC Science & Technology

2008-03-01

48 vii Page Appendix B . Tranistional Sampling Outputs . . . . . . . . . . . . . . 49 Appendix C. VHDL Entities...cumulative sampling outputs by pin . . . . . . . . . . . 48 B .1. FPGA outputs for Sample 0, Clk 18 . . . . . . . . . . . . . . . 49 B .2. FPGA outputs for...Sample 0, Clk 19 . . . . . . . . . . . . . . . 49 B .3. FPGA outputs for Sample 0, Clk 21 . . . . . . . . . . . . . . . 50 B .4. FPGA outputs for Sample

Design and Implementation of a Discrete-Time Proportional Integral (PI) Controller for the Temperature Control of a Heating Pad.

PubMed

Khan, Pathan Fayaz; Sengottuvel, S; Patel, Rajesh; Gireesan, K; Baskaran, R; Mani, Awadhesh

2018-05-01

Contact heat evoked potentials (CHEPs) are recorded from the brain by giving thermal stimulations through heating pads kept on the surface of the skin. CHEP signals have crucial diagnostic implications in human pain activation studies. This work proposes a novel design of a digital proportional integral (PI) controller based on Arduino microcontroller with a view to explore the suitability of an electric heating pad for use as a thermode in a custom-made, cost-effective CHEP stimulator. The purpose of PI controller is to set, regulate, and deliver desired temperatures on the surface of the heating pad in a user-defined pattern. The transfer function of the heating system has been deduced using the parametric system identification method, and the design parameters of the controller have been identified using the root locus technique. The efficiency of the proposed PI controller in circumventing the well-known integrator windup problem (error in the integral term builds excessively, leading to large transients in the controller output) in tracking the reference input and the controller effort (CE) in rejecting output disturbances to maintain the set temperature of the heating pad have been found to be superior compared with the conventional PI controller and two of the existing anti-windup models.

Compact pulse width modulation circuitry for silicon photomultiplier readout.

PubMed

Bieniosek, M F; Olcott, P D; Levin, C S

2013-08-07

The adoption of solid-state photodetectors for positron emission tomography (PET) system design and the interest in 3D interaction information from PET detectors has lead to an increasing number of readout channels in PET systems. To handle these additional readout channels, PET readout electronics should be simplified to reduce the power consumption, cost, and size of the electronics for a single channel. Pulse-width modulation (PWM), where detector pulses are converted to digital pulses with width proportional to the detected photon energy, promises to simplify PET readout by converting the signals to digital form at the beginning of the processing chain, and allowing a single time-to-digital converter to perform the data acquisition for many channels rather than routing many analogue channels and digitizing in the back end. Integrator based PWM systems, also known as charge-to-time converters (QTCs), are especially compact, reducing the front-end electronics to an op-amp integrator with a resistor discharge, and a comparator. QTCs, however, have a long dead-time during which dark count noise is integrated, reducing the output signal-to-noise ratio. This work presents a QTC based PWM circuit with a gated integrator that shows performance improvements over existing QTC based PWM. By opening and closing an analogue switch on the input of the integrator, the circuit can be controlled to integrate only the portions of the signal with a high signal-to-noise ratio. It also allows for multiplexing different detectors into the same PWM circuit while avoiding uncorrelated noise propagation between photodetector channels. Four gated integrator PWM circuits were built to readout the spatial channels of two position sensitive solid-state photomultiplier (PS-SSPM). Results show a 4 × 4 array 0.9 mm × 0.9 mm × 15 mm of LYSO crystals being identified on the 5 mm × 5 mm PS-SSPM at room temperature with no degradation for twofold multiplexing. In principle, much larger multiplexing ratios are possible, limited only by count rate issues.

Sensing device and method for measuring emission time delay during irradiation of targeted samples

NASA Technical Reports Server (NTRS)

Danielson, J. D. Sheldon (Inventor)

2000-01-01

An apparatus for measuring emission time delay during irradiation of targeted samples by utilizing digital signal processing to determine the emission phase shift caused by the sample is disclosed. The apparatus includes a source of electromagnetic radiation adapted to irradiate a target sample. A mechanism generates first and second digital input signals of known frequencies with a known phase relationship, and a device then converts the first and second digital input signals to analog sinusoidal signals. An element is provided to direct the first input signal to the electromagnetic radiation source to modulate the source by the frequency thereof to irradiate the target sample and generate a target sample emission. A device detects the target sample emission and produces a corresponding first output signal having a phase shift relative to the phase of the first input signal, the phase shift being caused by the irradiation time delay in the sample. A member produces a known phase shift in the second input signal to create a second output signal. A mechanism is then provided for converting each of the first and second analog output signals to digital signals. A mixer receives the first and second digital output signals and compares the signal phase relationship therebetween to produce a signal indicative of the change in phase relationship between the first and second output signals caused by the target sample emission. Finally, a feedback arrangement alters the phase of the second input signal based on the mixer signal to ultimately place the first and second output signals in quadrature. Mechanisms for enhancing this phase comparison and adjustment technique are also disclosed.

Sensing device and method for measuring emission time delay during irradiation of targeted samples utilizing variable phase tracking

NASA Technical Reports Server (NTRS)

Danielson, J. D. Sheldon (Inventor)

2006-01-01

An apparatus for measuring emission time delay during irradiation of targeted samples by utilizing digital signal processing to determine the emission phase shift caused by the sample is disclosed. The apparatus includes a source of electromagnetic radiation adapted to irradiate a target sample. A mechanism generates first and second digital input signals of known frequencies with a known phase relationship, and a device then converts the first and second digital input signals to analog sinusoidal signals. An element is provided to direct the first input signal to the electromagnetic radiation source to modulate the source by the frequency thereof to irradiate the target sample and generate a target sample emission. A device detects the target sample emission and produces a corresponding first output signal having a phase shift relative to the phase of the first input signal, the phase shift being caused by the irradiation time delay in the sample. A member produces a known phase shift in the second input signal to create a second output signal. A mechanism is then provided for converting each of the first and second analog output signals to digital signals. A mixer receives the first and second digital output signals and compares the signal phase relationship therebetween to produce a signal indicative of the change in phase relationship between the first and second output signals caused by the target sample emission. Finally, a feedback arrangement alters the phase of the second input signal based on the mixer signal to ultimately place the first and second output signals in quadrature. Mechanisms for enhancing this phase comparison and adjustment technique are also disclosed.

Fiber optic accelerometer

NASA Technical Reports Server (NTRS)

August, R. R.

1981-01-01

Low-cost, rugged lightweight accelerometer has been developed that converts mechanical motion into digitized optical outputs and is immune to electromagnetic and electrostatic interferences. Instrument can be placed in hostile environment, such as engine under test, and output led out through miscellany of electrical fields, high temperatures, etc., by optic fiber cables to benign environment of test panel. There, digitized optical signals can be converted to electrical signals for use in standard electrical equipment or used directly in optical devices, such as optical digital computer.

Tunable terahertz wave generation through a bimodal laser diode and plasmonic photomixer.

PubMed

Yang, S-H; Watts, R; Li, X; Wang, N; Cojocaru, V; O'Gorman, J; Barry, L P; Jarrahi, M

2015-11-30

We demonstrate a compact, robust, and stable terahertz source based on a novel two section digital distributed feedback laser diode and plasmonic photomixer. Terahertz wave generation is achieved through difference frequency generation by pumping the plasmonic photomixer with two output optical beams of the two section digital distributed feedback laser diode. The laser is designed to offer an adjustable terahertz frequency difference between the emitted wavelengths by varying the applied currents to the laser sections. The plasmonic photomixer is comprised of an ultrafast photoconductor with plasmonic contact electrodes integrated with a logarithmic spiral antenna. We demonstrate terahertz wave generation with 0.15-3 THz frequency tunability, 2 MHz linewidth, and less than 5 MHz frequency stability over 1 minute, at useful power levels for practical imaging and sensing applications.

Optically-synchronized encoder and multiplexer scheme for interleaved photonics analog-to-digital conversion

NASA Astrophysics Data System (ADS)

Villa, Carlos; Kumavor, Patrick; Donkor, Eric

2008-04-01

Photonics Analog-to-Digital Converters (ADCs) utilize a train of optical pulses to sample an electrical input waveform applied to an electrooptic modulator or a reverse biased photodiode. In the former, the resulting train of amplitude-modulated optical pulses is detected (converter to electrical) and quantized using a conversional electronics ADC- as at present there are no practical, cost-effective optical quantizers available with performance that rival electronic quantizers. In the latter, the electrical samples are directly quantized by the electronics ADC. In both cases however, the sampling rate is limited by the speed with which the electronics ADC can quantize the electrical samples. One way to increase the sampling rate by a factor N is by using the time-interleaved technique which consists of a parallel array of N electrical ADC converters, which have the same sampling rate but different sampling phase. Each operating at a quantization rate of fs/N where fs is the aggregated sampling rate. In a system with no real-time operation, the N channels digital outputs are stored in memory, and then aggregated (multiplexed) to obtain the digital representation of the analog input waveform. Alternatively, for real-time operation systems the reduction of storing time in the multiplexing process is desired to improve the time response of the ADC. The complete elimination of memories come expenses of concurrent timing and synchronization in the aggregation of the digital signal that became critical for a good digital representation of the analog signal waveform. In this paper we propose and demonstrate a novel optically synchronized encoder and multiplexer scheme for interleaved photonics ADCs that utilize the N optical signals used to sample different phases of an analog input signal to synchronize the multiplexing of the resulting N digital output channels in a single digital output port. As a proof of concept, four 320 Megasamples/sec 12-bit of resolution digital signals were multiplexed to form an aggregated 1.28 Gigasamples/sec single digital output signal.

Multi-DSP and FPGA based Multi-channel Direct IF/RF Digital receiver for atmospheric radar

NASA Astrophysics Data System (ADS)

Yasodha, Polisetti; Jayaraman, Achuthan; Kamaraj, Pandian; Durga rao, Meka; Thriveni, A.

2016-07-01

Modern phased array radars depend highly on digital signal processing (DSP) to extract the echo signal information and to accomplish reliability along with programmability and flexibility. The advent of ASIC technology has made various digital signal processing steps to be realized in one DSP chip, which can be programmed as per the application and can handle high data rates, to be used in the radar receiver to process the received signal. Further, recent days field programmable gate array (FPGA) chips, which can be re-programmed, also present an opportunity to utilize them to process the radar signal. A multi-channel direct IF/RF digital receiver (MCDRx) is developed at NARL, taking the advantage of high speed ADCs and high performance DSP chips/FPGAs, to be used for atmospheric radars working in HF/VHF bands. Multiple channels facilitate the radar t be operated in multi-receiver modes and also to obtain the wind vector with improved time resolution, without switching the antenna beam. MCDRx has six channels, implemented on a custom built digital board, which is realized using six numbers of ADCs for simultaneous processing of the six input signals, Xilinx vertex5 FPGA and Spartan6 FPGA, and two ADSPTS201 DSP chips, each of which performs one phase of processing. MCDRx unit interfaces with the data storage/display computer via two gigabit ethernet (GbE) links. One of the six channels is used for Doppler beam swinging (DBS) mode and the other five channels are used for multi-receiver mode operations, dedicatedly. Each channel has (i) ADC block, to digitize RF/IF signal, (ii) DDC block for digital down conversion of the digitized signal, (iii) decoding block to decode the phase coded signal, and (iv) coherent integration block for integrating the data preserving phase intact. ADC block consists of Analog devices make AD9467 16-bit ADCs, to digitize the input signal at 80 MSPS. The output of ADC is centered around (80 MHz - input frequency). The digitized data is fed to DDC block, which down converts the data to base-band. The DDC block has NCO, mixer and two chains of Bessel filters (fifth order cascaded integration comb filter, two FIR filters, two half band filters and programmable FIR filters) for in-phase (I) and Quadrature phase (Q) channels. The NCO has 32 bits and is set to match the output frequency of ADC. Further, DDC down samples (decimation) the data and reduces the data rate to 16 MSPS. This data is further decimated and the data rate is reduced down to 4/2/1/0.5/0.25/0.125/0.0625 MSPS for baud lengths 0.25/0.5/1/2/4/8/16 μs respectively. The down sampled data is then fed to decoding block, which performs cross correlation to achieve pulse compression of the binary-phase coded data to obtain better range resolution with maximum possible height coverage. This step improves the signal power by a factor equal to the length of the code. Coherent integration block integrates the decoded data coherently for successive pulses, which improves the signal to noise ratio and reduces the data volume. DDC, decoding and coherent integration blocks are implemented in Xilinx vertex5 FPGA. Till this point, function of all six channels is same for DBS mode and multi-receiver modes. Data from vertex5 FPGA is transferred to PC via GbE-1 interface for multi-modes or to two Analog devices make ADSP-TS201 DSP chips (A and B), via link port for DBS mode. ADSP-TS201 chips perform the normalization, DC removal, windowing, FFT computation and spectral averaging on the data, which is transferred to storage/display PC via GbE-2 interface for real-time data display and data storing. Physical layer of GbE interface is implemented in an external chip (Marvel 88E1111) and MAC layer is implemented internal to vertex5 FPGA. The MCDRx has total 4 GB of DDR2 memory for data storage. Spartan6 FPGA is used for generating timing signals, required for basic operation of the radar and testing of the MCDRx.

Integration of a versatile bridge concept in a 34 GHz pulsed/CW EPR spectrometer

NASA Astrophysics Data System (ADS)

Band, Alan; Donohue, Matthew P.; Epel, Boris; Madhu, Shraeya; Szalai, Veronika A.

2018-03-01

We present a 34 GHz continuous wave (CW)/pulsed electron paramagnetic resonance (EPR) spectrometer capable of pulse-shaping that is based on a versatile microwave bridge design. The bridge radio frequency (RF)-in/RF-out design (500 MHz to 1 GHz input/output passband, 500 MHz instantaneous input/output bandwidth) creates a flexible platform with which to compare a variety of excitation and detection methods utilizing commercially available equipment external to the bridge. We use three sources of RF input to implement typical functions associated with CW and pulse EPR spectroscopic measurements. The bridge output is processed via high speed digitizer and an in-phase/quadrature (I/Q) demodulator for pulsed work or sent to a wideband, high dynamic range log detector for CW. Combining this bridge with additional commercial hardware and new acquisition and control electronics, we have designed and constructed an adaptable EPR spectrometer that builds upon previous work in the literature and is functionally comparable to other available systems.

A single-chip event sequencer and related microcontroller instrumentation for atomic physics research.

PubMed

Eyler, E E

2011-01-01

A 16-bit digital event sequencer with 50 ns resolution and 50 ns trigger jitter is implemented by using an internal 32-bit timer on a dsPIC30F4013 microcontroller, controlled by an easily modified program written in standard C. It can accommodate hundreds of output events, and adjacent events can be spaced as closely as 1.5 μs. The microcontroller has robust 5 V inputs and outputs, allowing a direct interface to common laboratory equipment and other electronics. A USB computer interface and a pair of analog ramp outputs can be added with just two additional chips. An optional display/keypad unit allows direct interaction with the sequencer without requiring an external computer. Minor additions also allow simple realizations of other complex instruments, including a precision high-voltage ramp generator for driving spectrum analyzers or piezoelectric positioners, and a low-cost proportional integral differential controller and lock-in amplifier for laser frequency stabilization with about 100 kHz bandwidth.

Design of Robust Controllers for a Multiple Input-Multiple Output Control System with Uncertain Parameters Application to the Lateral and Longitudinal Modes of the KC-135 Transport Aircraft

DTIC Science & Technology

1984-12-01

input/output relationship. These are obtained from the design specifications (10:68i-684). Note that the first digit of the subscript of bkj refers...to the output and the second digit to the input. Thus, bkj is.a function of the response requirements on the output, Yk’ due to the input, r.. 169 . A...NXPMAX pNYPMAX, IPLOT) C C C* LIBARY OF PLOT SUBR(OUTINES PSNTCT NLIEPRINTER ONLY~ C* C C C SUP’ LPLOTS C C C DIMENSION IXY(101,71)918UF(100) COMMON /HOPY

Digital slip frequency generator and method for determining the desired slip frequency

DOEpatents

Klein, Frederick F.

1989-01-01

The output frequency of an electric power generator is kept constant with variable rotor speed by automatic adjustment of the excitation slip frequency. The invention features a digital slip frequency generator which provides sine and cosine waveforms from a look-up table, which are combined with real and reactive power output of the power generator.

Digital Pitch-And-Roll Monitor

NASA Technical Reports Server (NTRS)

Finley, Tom D.; Brown, Jeff; Campbell, Ryland

1991-01-01

Highly accurate inclinometer developed. Monitors both pitch and roll simultaneously and provides printed output on demand. Includes three mutually perpendicular accelerometers and signal-conditioning circuitry converting outputs of sensors to digital values of pitch and roll. In addition to wind-tunnel applications, system useful in any application involving steady-state, precise sensing of angles, such as calibration of robotic devices and positioners.

An 8-PSK TDMA uplink modulation and coding system

NASA Technical Reports Server (NTRS)

Ames, S. A.

1992-01-01

The combination of 8-phase shift keying (8PSK) modulation and greater than 2 bits/sec/Hz drove the design of the Nyquist filter to one specified to have a rolloff factor of 0.2. This filter when built and tested was found to produce too much intersymbol interference and was abandoned for a design with a rolloff factor of 0.4. The preamble is limited to 100 bit periods of the uncoded bit period of 5 ns for a maximum preamble length of 500 ns or 40 8PSK symbol times at 12.5 ns per symbol. For 8PSK modulation, the required maximum degradation of 1 dB in -20 dB cochannel interference (CCI) drove the requirement for forward error correction coding. In this contract, the funding was not sufficient to develop the proposed codec so the codec was limited to a paper design during the preliminary design phase. The mechanization of the demodulator is digital, starting from the output of the analog to digital converters which quantize the outputs of the quadrature phase detectors. This approach is amenable to an application specific integrated circuit (ASIC) replacement in the next phase of development.

Quantitative color measurement of pH indicator paper using trichromatic LEDs and TCS230 color sensor

NASA Astrophysics Data System (ADS)

Ghorude, T. N.; Chaudhari, A. L.; Shaligram, A. D.

2008-11-01

Quantitative analysis of pH indicator paper color is needed in the various fields. An indigenously developed Tristimulus colorimeter is used in this work for pH Indicator paper color measurement. The colorimeter uses Trichromatic RGB LEDs and a programmable color light to frequency converter (TCS230), combining configurable silicon photodiodes and a current to frequency converter on a single monolithic CMOS integrated circuit. The output is a square wave (50% duty cycle) with frequency directly proportional to light intensity. Digital input and digital output allow directly to a microcontroller. The light to frequency converter reads an 8*8 array of photodiodes. Sixteen photodiodes have red filters, 16 photodiodes have green filters, 16 photodiodes have blue filters, and 16 photodiodes are clear with no filters. All 16 photodiodes of the same colors are connected in parallel and type of photodiode the device uses during operation is pin selectable. Solutions having different standard pH were prepared and indicator paper was dipped in solution, it shows change in color. Using the developed RGB colorimeter chromaticity coordinates were measured and compared with the chromaticity coordinates measured using Ocean Optics HR-4000 high resolution spectrophotometer.

Overview of the land analysis system (LAS)

USGS Publications Warehouse

Quirk, Bruce K.; Olseson, Lyndon R.

1987-01-01

The Land Analysis System (LAS) is a fully integrated digital analysis system designed to support remote sensing, image processing, and geographic information systems research. LAS is being developed through a cooperative effort between the National Aeronautics and Space Administration Goddard Space Flight Center and the U. S. Geological Survey Earth Resources Observation Systems (EROS) Data Center. LAS has over 275 analysis modules capable to performing input and output, radiometric correction, geometric registration, signal processing, logical operations, data transformation, classification, spatial analysis, nominal filtering, conversion between raster and vector data types, and display manipulation of image and ancillary data. LAS is currently implant using the Transportable Applications Executive (TAE). While TAE was designed primarily to be transportable, it still provides the necessary components for a standard user interface, terminal handling, input and output services, display management, and intersystem communications. With TAE the analyst uses the same interface to the processing modules regardless of the host computer or operating system. LAS was originally implemented at EROS on a Digital Equipment Corporation computer system under the Virtual Memorial System operating system with DeAnza displays and is presently being converted to run on a Gould Power Node and Sun workstation under the Berkeley System Distribution UNIX operating system.

Memory device for two-dimensional radiant energy array computers

NASA Technical Reports Server (NTRS)

Schaefer, D. H.; Strong, J. P., III (Inventor)

1977-01-01

A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

Development and testing of controller performance evaluation methodology for multi-input/multi-output digital control systems

NASA Technical Reports Server (NTRS)

Pototzky, Anthony; Wieseman, Carol; Hoadley, Sherwood Tiffany; Mukhopadhyay, Vivek

1991-01-01

Described here is the development and implementation of on-line, near real time controller performance evaluation (CPE) methods capability. Briefly discussed are the structure of data flow, the signal processing methods used to process the data, and the software developed to generate the transfer functions. This methodology is generic in nature and can be used in any type of multi-input/multi-output (MIMO) digital controller application, including digital flight control systems, digitally controlled spacecraft structures, and actively controlled wind tunnel models. Results of applying the CPE methodology to evaluate (in near real time) MIMO digital flutter suppression systems being tested on the Rockwell Active Flexible Wing (AFW) wind tunnel model are presented to demonstrate the CPE capability.

Direct-coupled microcomputer-based building emulator for building energy management and control systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lam, H.N.

1999-07-01

In this paper, the development and implementation of a direct-coupled building emulator for a building energy management and control system (EMCS) is presented. The building emulator consists of a microcomputer and a computer model of an air-conditioning system implemented in a modular dynamic simulation software package for direct-coupling to an EMCS, without using analog-to-digital and digital-to-analog converters. The building emulator can be used to simulate in real time the behavior of the air-conditioning system under a given operating environment and subject to a given usage pattern. Software modules for data communication, graphical display, dynamic data exchange, and synchronization of simulationmore » outputs with real time have been developed to achieve direct digital data transfer between the building emulator and a commercial EMCS. Based on the tests conducted, the validity of the building emulator has been established and the proportional-plus-integral control function of the EMCS assessed.« less

Pneumatic oscillator circuits for timing and control of integrated microfluidics.

PubMed

Duncan, Philip N; Nguyen, Transon V; Hui, Elliot E

2013-11-05

Frequency references are fundamental to most digital systems, providing the basis for process synchronization, timing of outputs, and waveform synthesis. Recently, there has been growing interest in digital logic systems that are constructed out of microfluidics rather than electronics, as a possible means toward fully integrated laboratory-on-a-chip systems that do not require any external control apparatus. However, the full realization of this goal has not been possible due to the lack of on-chip frequency references, thus requiring timing signals to be provided from off-chip. Although microfluidic oscillators have been demonstrated, there have been no reported efforts to characterize, model, or optimize timing accuracy, which is the fundamental metric of a clock. Here, we report pneumatic ring oscillator circuits built from microfluidic valves and channels. Further, we present a compressible-flow analysis that differs fundamentally from conventional circuit theory, and we show the utility of this physically based model for the optimization of oscillator stability. Finally, we leverage microfluidic clocks to demonstrate circuits for the generation of phase-shifted waveforms, self-driving peristaltic pumps, and frequency division. Thus, pneumatic oscillators can serve as on-chip frequency references for microfluidic digital logic circuits. On-chip clocks and pumps both constitute critical building blocks on the path toward achieving autonomous laboratory-on-a-chip devices.

High speed imager test station

DOEpatents

Yates, George J.; Albright, Kevin L.; Turko, Bojan T.

1995-01-01

A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard video format for display on conventional video equipment.

High speed imager test station

DOEpatents

Yates, G.J.; Albright, K.L.; Turko, B.T.

1995-11-14

A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard video format for display on conventional video equipment. 12 figs.

Hadamard multimode optical imaging transceiver

DOEpatents

Cooke, Bradly J; Guenther, David C; Tiee, Joe J; Kellum, Mervyn J; Olivas, Nicholas L; Weisse-Bernstein, Nina R; Judd, Stephen L; Braun, Thomas R

2012-10-30

Disclosed is a method and system for simultaneously acquiring and producing results for multiple image modes using a common sensor without optical filtering, scanning, or other moving parts. The system and method utilize the Walsh-Hadamard correlation detection process (e.g., functions/matrix) to provide an all-binary structure that permits seamless bridging between analog and digital domains. An embodiment may capture an incoming optical signal at an optical aperture, convert the optical signal to an electrical signal, pass the electrical signal through a Low-Noise Amplifier (LNA) to create an LNA signal, pass the LNA signal through one or more correlators where each correlator has a corresponding Walsh-Hadamard (WH) binary basis function, calculate a correlation output coefficient for each correlator as a function of the corresponding WH binary basis function in accordance with Walsh-Hadamard mathematical principles, digitize each of the correlation output coefficient by passing each correlation output coefficient through an Analog-to-Digital Converter (ADC), and performing image mode processing on the digitized correlation output coefficients as desired to produce one or more image modes. Some, but not all, potential image modes include: multi-channel access, temporal, range, three-dimensional, and synthetic aperture.

Eliminating Bias In Acousto-Optical Spectrum Analysis

NASA Technical Reports Server (NTRS)

Ansari, Homayoon; Lesh, James R.

1992-01-01

Scheme for digital processing of video signals in acousto-optical spectrum analyzer provides real-time correction for signal-dependent spectral bias. Spectrum analyzer described in "Two-Dimensional Acousto-Optical Spectrum Analyzer" (NPO-18092), related apparatus described in "Three-Dimensional Acousto-Optical Spectrum Analyzer" (NPO-18122). Essence of correction is to average over digitized outputs of pixels in each CCD row and to subtract this from the digitized output of each pixel in row. Signal processed electro-optically with reference-function signals to form two-dimensional spectral image in CCD camera.

A 1280×1024-15μm CTIA ROIC for SWIR FPAs

NASA Astrophysics Data System (ADS)

Eminoglu, Selim; Isikhan, Murat; Bayhan, Nusret; Gulden, M. A.; Incedere, O. S.; Soyer, S. T.; Kocak, Serhat; Yalcin, Cem; Ustundag, M. Cem B.; Turan, Ozge; Eksi, Umut; Akin, Tayfun

2015-06-01

This paper reports the development of a new SXGA format low-noise CTIA ROIC (MT12815CA-3G) suitable for mega-pixel SWIR InGaAs detector arrays for low-light imaging applications. MT12815CA-3G is the first mega-pixel standard ROIC product from Mikro-Tasarim, which is a fabless semiconductor company specialized in the development of ROICs and ASICs for visible and infrared hybrid imaging sensors. MT12815CA-3G is a low-noise snapshot mega-pixel CTIA ROIC, has a format of 1280 × 1024 (SXGA) and pixel pitch of 15 μm. MT12815CA-3G has been developed with the system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any special external inputs. MT12815CA-3G is a highly configurable ROIC, where many of its features can be programmed through a 3-wire serial interface allowing on-the-fly configuration of many ROIC features. It performs snapshot operation both using Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) modes. The CTIA type pixel input circuitry has 3 gain modes with programmable full-well-capacity (FWC) values of 10K e-, 20K e-, and 350K e- in the very high gain (VHG), high-gain (HG), and low-gain (LG) modes, respectively. MT12815CA-3G has an input referred noise level of less than 5 e- in the very high gain (VHG) mode, suitable for very low-noise SWIR imaging applications. MT12815CA-3G has 8 analog video outputs that can be programmed in 8, 4, or 2-output modes with a selectable analog reference for pseudo-differential operation. The ROIC runs at 10 MHz and supports frame rate values up to 55 fps in the 8-output mode. The integration time of the ROIC can be programmed up to 1s in steps of 0.1 μs. The ROIC uses 3.3 V and 1.8V supply voltages and dissipates less than 350 mW in the 4-output mode. MT12815CA-3G is fabricated using a modern mixed-signal CMOS process on 200 mm CMOS wafers, and there are 44 ROIC parts per wafer. The probe tests show that the die yield is higher than 70%, which corresponds to more than 30 working ROIC parts per wafer typically. MT12815CA-3G ROIC is available as tested wafers or dies, where a detailed test report and wafer map are provided for each wafer. A compact USB 3.0 based test camera and imaging software are also available for the customers to test and evaluate the imaging performance of SWIR sensors built using MT12815CA-3G ROICs. Mikro-Tasarim has also recently developed a programmable mixed-signal application specific integrated circuit (ASIC), called MTAS1410X8, which is designed to perform ROIC driving and digitization functions for ROICs with analog outputs, such as MT12815CA-3G and MT6415CA ROIC products of Mikro-Tasarim. MTAS1410X8 has 8 simultaneously working 14-bit analog-to-digital converters (ADCs) with integrated programmable gain amplifiers (PGAs), video input buffers, programmable controller, and high-speed digital video interface supporting various formats including Camera-Link. MT12815CA-3G ROIC together with MTAS1410X8 ASIC can be used to develop low-noise high-resolution SWIR imaging sensors with low power dissipation and reduced board area for the camera electronics.

Real-time classification and sensor fusion with a spiking deep belief network.

PubMed

O'Connor, Peter; Neil, Daniel; Liu, Shih-Chii; Delbruck, Tobi; Pfeiffer, Michael

2013-01-01

Deep Belief Networks (DBNs) have recently shown impressive performance on a broad range of classification problems. Their generative properties allow better understanding of the performance, and provide a simpler solution for sensor fusion tasks. However, because of their inherent need for feedback and parallel update of large numbers of units, DBNs are expensive to implement on serial computers. This paper proposes a method based on the Siegert approximation for Integrate-and-Fire neurons to map an offline-trained DBN onto an efficient event-driven spiking neural network suitable for hardware implementation. The method is demonstrated in simulation and by a real-time implementation of a 3-layer network with 2694 neurons used for visual classification of MNIST handwritten digits with input from a 128 × 128 Dynamic Vision Sensor (DVS) silicon retina, and sensory-fusion using additional input from a 64-channel AER-EAR silicon cochlea. The system is implemented through the open-source software in the jAER project and runs in real-time on a laptop computer. It is demonstrated that the system can recognize digits in the presence of distractions, noise, scaling, translation and rotation, and that the degradation of recognition performance by using an event-based approach is less than 1%. Recognition is achieved in an average of 5.8 ms after the onset of the presentation of a digit. By cue integration from both silicon retina and cochlea outputs we show that the system can be biased to select the correct digit from otherwise ambiguous input.

Adaptive detection of missed text areas in OCR outputs: application to the automatic assessment of OCR quality in mass digitization projects

NASA Astrophysics Data System (ADS)

Ben Salah, Ahmed; Ragot, Nicolas; Paquet, Thierry

2013-01-01

The French National Library (BnF*) has launched many mass digitization projects in order to give access to its collection. The indexation of digital documents on Gallica (digital library of the BnF) is done through their textual content obtained thanks to service providers that use Optical Character Recognition softwares (OCR). OCR softwares have become increasingly complex systems composed of several subsystems dedicated to the analysis and the recognition of the elements in a page. However, the reliability of these systems is always an issue at stake. Indeed, in some cases, we can find errors in OCR outputs that occur because of an accumulation of several errors at different levels in the OCR process. One of the frequent errors in OCR outputs is the missed text components. The presence of such errors may lead to severe defects in digital libraries. In this paper, we investigate the detection of missed text components to control the OCR results from the collections of the French National Library. Our verification approach uses local information inside the pages based on Radon transform descriptors and Local Binary Patterns descriptors (LBP) coupled with OCR results to control their consistency. The experimental results show that our method detects 84.15% of the missed textual components, by comparing the OCR ALTO files outputs (produced by the service providers) to the images of the document.

A novel CMOS transducer for giant magnetoresistance sensors.

PubMed

Luong, Van Su; Lu, Chih-Cheng; Yang, Jing-Wen; Jeng, Jen-Tzong

2017-02-01

In this work, an ASIC (application specific integrated circuits) transducer circuit for field modulated giant magnetoresistance (GMR) sensors was designed and fabricated using a 0.18-μm CMOS process. The transducer circuits consist of a frequency divider, a digital phase shifter, an instrument amplifier, and an analog mixer. These comprise a mix of analog and digital circuit techniques. The compact chip size of 1.5 mm × 1.5 mm for both analog and digital parts was achieved using the TSMC18 1P6M (1-polysilicon 6-metal) process design kit, and the characteristics of the system were simulated using an HSpice simulator. The output of the transducer circuit is the result of the first harmonic detection, which resolves the modulated field using a phase sensitive detection (PSD) technique and is proportional to the measured magnetic field. When the dual-bridge GMR sensor is driven by the transducer circuit with a current of 10 mA at 10 kHz, the observed sensitivity of the field sensor is 10.2 mV/V/Oe and the nonlinearity error was 3% in the linear range of ±1 Oe. The performance of the system was also verified by rotating the sensor system horizontally in earth's magnetic field and recording the sinusoidal output with respect to the azimuth angle, which exhibits an error of less than ±0.04 Oe. These results prove that the ASIC transducer is suitable for driving the AC field modulated GMR sensors applied to geomagnetic measurement.

High-Speed Edge-Detecting Line Scan Smart Camera

NASA Technical Reports Server (NTRS)

Prokop, Norman F.

2012-01-01

A high-speed edge-detecting line scan smart camera was developed. The camera is designed to operate as a component in a NASA Glenn Research Center developed inlet shock detection system. The inlet shock is detected by projecting a laser sheet through the airflow. The shock within the airflow is the densest part and refracts the laser sheet the most in its vicinity, leaving a dark spot or shadowgraph. These spots show up as a dip or negative peak within the pixel intensity profile of an image of the projected laser sheet. The smart camera acquires and processes in real-time the linear image containing the shock shadowgraph and outputting the shock location. Previously a high-speed camera and personal computer would perform the image capture and processing to determine the shock location. This innovation consists of a linear image sensor, analog signal processing circuit, and a digital circuit that provides a numerical digital output of the shock or negative edge location. The smart camera is capable of capturing and processing linear images at over 1,000 frames per second. The edges are identified as numeric pixel values within the linear array of pixels, and the edge location information can be sent out from the circuit in a variety of ways, such as by using a microcontroller and onboard or external digital interface to include serial data such as RS-232/485, USB, Ethernet, or CAN BUS; parallel digital data; or an analog signal. The smart camera system can be integrated into a small package with a relatively small number of parts, reducing size and increasing reliability over the previous imaging system..

System for adjusting frequency of electrical output pulses derived from an oscillator

DOEpatents

Bartholomew, David B.

2006-11-14

A system for setting and adjusting a frequency of electrical output pulses derived from an oscillator in a network is disclosed. The system comprises an accumulator module configured to receive pulses from an oscillator and to output an accumulated value. An adjustor module is configured to store an adjustor value used to correct local oscillator drift. A digital adder adds values from the accumulator module to values stored in the adjustor module and outputs their sums to the accumulator module, where they are stored. The digital adder also outputs an electrical pulse to a logic module. The logic module is in electrical communication with the adjustor module and the network. The logic module may change the value stored in the adjustor module to compensate for local oscillator drift or change the frequency of output pulses. The logic module may also keep time and calculate drift.

Thermal imagers: from ancient analog video output to state-of-the-art video streaming

NASA Astrophysics Data System (ADS)

Haan, Hubertus; Feuchter, Timo; Münzberg, Mario; Fritze, Jörg; Schlemmer, Harry

2013-06-01

The video output of thermal imagers stayed constant over almost two decades. When the famous Common Modules were employed a thermal image at first was presented to the observer in the eye piece only. In the early 1990s TV cameras were attached and the standard output was CCIR. In the civil camera market output standards changed to digital formats a decade ago with digital video streaming being nowadays state-of-the-art. The reasons why the output technique in the thermal world stayed unchanged over such a long time are: the very conservative view of the military community, long planning and turn-around times of programs and a slower growth of pixel number of TIs in comparison to consumer cameras. With megapixel detectors the CCIR output format is not sufficient any longer. The paper discusses the state-of-the-art compression and streaming solutions for TIs.

Digital plus analog output encoder

NASA Technical Reports Server (NTRS)

Hafle, R. S. (Inventor)

1976-01-01

The disclosed encoder is adapted to produce both digital and analog output signals corresponding to the angular position of a rotary shaft, or the position of any other movable member. The digital signals comprise a series of binary signals constituting a multidigit code word which defines the angular position of the shaft with a degree of resolution which depends upon the number of digits in the code word. The basic binary signals are produced by photocells actuated by a series of binary tracks on a code disc or member. The analog signals are in the form of a series of ramp signals which are related in length to the least significant bit of the digital code word. The analog signals are derived from sine and cosine tracks on the code disc.

A Model for Data Citation in Astronomical Research Using Digital Object Identifiers (DOIs)

NASA Astrophysics Data System (ADS)

Novacescu, Jenny; Peek, Joshua E. G.; Weissman, Sarah; Fleming, Scott W.; Levay, Karen; Fraser, Elizabeth

2018-05-01

Standardizing and incentivizing the use of digital object identifiers (DOIs) to aggregate and identify both data analyzed and data generated by a research project will advance the field of astronomy to match best practices in other research fields like geoscience and medicine. An increase in the use of DOIs will prepare the discipline for changing expectations among funding agencies and publishers, who increasingly expect accurate and thorough data citation to accompany scientific outputs. The use of DOIs ensures a robust, sustainable, and interoperable approach to data citation in which due credit is given to the researchers and institutions who produce and maintain the primary data. We describe in this work the advantages of DOIs for data citation and best practices for integrating a DOI service in an astronomical archive. We report on a pilot project carried out in collaboration with AAS journals. During the course of the 1.5-year long pilot, over 75% of submitting authors opted to use the integrated DOI service to clearly identify data analyzed during their research project when prompted at the time of paper submission.

A combined stochastic feedforward and feedback control design methodology with application to autoland design

NASA Technical Reports Server (NTRS)

Halyo, Nesim

1987-01-01

A combined stochastic feedforward and feedback control design methodology was developed. The objective of the feedforward control law is to track the commanded trajectory, whereas the feedback control law tries to maintain the plant state near the desired trajectory in the presence of disturbances and uncertainties about the plant. The feedforward control law design is formulated as a stochastic optimization problem and is embedded into the stochastic output feedback problem where the plant contains unstable and uncontrollable modes. An algorithm to compute the optimal feedforward is developed. In this approach, the use of error integral feedback, dynamic compensation, control rate command structures are an integral part of the methodology. An incremental implementation is recommended. Results on the eigenvalues of the implemented versus designed control laws are presented. The stochastic feedforward/feedback control methodology is used to design a digital automatic landing system for the ATOPS Research Vehicle, a Boeing 737-100 aircraft. The system control modes include localizer and glideslope capture and track, and flare to touchdown. Results of a detailed nonlinear simulation of the digital control laws, actuator systems, and aircraft aerodynamics are presented.

Seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery.

PubMed

Li, Xinying; Yu, Jianjun; Dong, Ze; Cao, Zizheng; Chi, Nan; Zhang, Junwen; Shao, Yufeng; Tao, Li

2012-10-22

We experimentally demonstrated the seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery adopting polarization-division-multiplexing quadrature-phase-shift-keying (PDM-QPSK) modulation with 400-km single-mode fiber-28 (SMF-28) transmission and 1-m wireless delivery. The X- and Y-polarization components of optical PDM-QPSK baseband signal are simultaneously up-converted to 100 GHz by optical polarization-diversity heterodyne beating, and then independently transmitted and received by two pairs of transmitter and receiver antennas, which make up a 2x2 multiple-input multiple-output (MIMO) wireless link based on microwave polarization multiplexing. At the wireless receiver, a two-stage down conversion is firstly done in analog domain based on balanced mixer and sinusoidal radio frequency (RF) signal, and then in digital domain based on digital signal processing (DSP). Polarization de-multiplexing is realized by constant modulus algorithm (CMA) based on DSP in heterodyne coherent detection. Our experimental results show that more taps are required for CMA when the X- and Y-polarization antennas have different wireless distance.

Signal processing and display interface studies. [performance tests - design analysis/equipment specifications

NASA Technical Reports Server (NTRS)

1975-01-01

Signal processing equipment specifications, operating and test procedures, and systems design and engineering are described. Five subdivisions of the overall circuitry are treated: (1) the spectrum analyzer; (2) the spectrum integrator; (3) the velocity discriminator; (4) the display interface; and (5) the formatter. They function in series: (1) first in analog form to provide frequency resolution, (2) then in digital form to achieve signal to noise improvement (video integration) and frequency discrimination, and (3) finally in analog form again for the purpose of real-time display of the significant velocity data. The formatter collects binary data from various points in the processor and provides a serial output for bi-phase recording. Block diagrams are used to illustrate the system.

Compact time- and space-integrating SAR processor: design and development status

NASA Astrophysics Data System (ADS)

Haney, Michael W.; Levy, James J.; Christensen, Marc P.; Michael, Robert R., Jr.; Mock, Michael M.

1994-06-01

Progress toward a flight demonstration of the acousto-optic time- and space- integrating real-time SAR image formation processor program is reported. The concept overcomes the size and power consumption limitations of electronic approaches by using compact, rugged, and low-power analog optical signal processing techniques for the most computationally taxing portions of the SAR imaging problem. Flexibility and performance are maintained by the use of digital electronics for the critical low-complexity filter generation and output image processing functions. The results reported include tests of a laboratory version of the concept, a description of the compact optical design that will be implemented, and an overview of the electronic interface and controller modules of the flight-test system.

Wireless sensor for temperature and humidity measurement

NASA Astrophysics Data System (ADS)

Drumea, Andrei; Svasta, Paul

2010-11-01

Temperature and humidity sensors have a broad range of applications, from heating and ventilation of houses to controlled drying of fruits, vegetables or meat in food industry. Modern sensors are integrated devices, usually MEMS, factory-calibrated and with digital output of measured parameters. They can have power down modes for reduced energy consumption. Such an integrated device allows the implementation of a battery powered wireless sensor when coupled with a low power microcontroller and a radio subsystem. A radio sensor can work independently or together with others in a radio network. Presented paper focuses mainly on measurement and construction aspects of sensors for temperature and humidity designed and implemented by authors; network aspects (communication between two or more sensors) are not analyzed.

Digital characterization of a neuromorphic IRFPA

NASA Astrophysics Data System (ADS)

Caulfield, John T.; Fisher, John; Zadnik, Jerome A.; Mak, Ernest S.; Scribner, Dean A.

1995-05-01

This paper reports on the performance of the Neuromorphic IRFPA, the first IRFPA designed and fabricated to conduct temporal and spatial processing on the focal plane. The Neuromorphic IRFPA's unique on-chip processing capability can perform retina-like functions such as lateral inhibition and contrast enhancement, spatial and temporal filtering, image compression and edge enhancement, and logarithmic response. Previously, all evaluations of the Neuromorphic IRFPA camera have been performed on the analog video output. In the work leading up to this paper, the Neuromorphic was integrated to a digital recorder to collect quantitative laboratory and field data. This paper describes the operation and characterization of specific on-chip processes such as spatial and temporal kernel size control. The use of Neuromorphic on-chip processing in future IRFPAs is analyzed as applied to improving SNR via adaptive nonuniformity, charge handling, and dynamic range problems.

A software to digital image processing to be used in the voxel phantom development.

PubMed

Vieira, J W; Lima, F R A

2009-11-15

Anthropomorphic models used in computational dosimetry, also denominated phantoms, are based on digital images recorded from scanning of real people by Computed Tomography (CT) or Magnetic Resonance Imaging (MRI). The voxel phantom construction requests computational processing for transformations of image formats, to compact two-dimensional (2-D) images forming of three-dimensional (3-D) matrices, image sampling and quantization, image enhancement, restoration and segmentation, among others. Hardly the researcher of computational dosimetry will find all these available abilities in single software, and almost always this difficulty presents as a result the decrease of the rhythm of his researches or the use, sometimes inadequate, of alternative tools. The need to integrate the several tasks mentioned above to obtain an image that can be used in an exposure computational model motivated the development of the Digital Image Processing (DIP) software, mainly to solve particular problems in Dissertations and Thesis developed by members of the Grupo de Pesquisa em Dosimetria Numérica (GDN/CNPq). Because of this particular objective, the software uses the Portuguese idiom in their implementations and interfaces. This paper presents the second version of the DIP, whose main changes are the more formal organization on menus and menu items, and menu for digital image segmentation. Currently, the DIP contains the menus Fundamentos, Visualizações, Domínio Espacial, Domínio de Frequências, Segmentações and Estudos. Each menu contains items and sub-items with functionalities that, usually, request an image as input and produce an image or an attribute in the output. The DIP reads edits and writes binary files containing the 3-D matrix corresponding to a stack of axial images from a given geometry that can be a human body or other volume of interest. It also can read any type of computational image and to make conversions. When the task involves only an output image, this is saved as a JPEG file in the Windows default; when it involves an image stack, the output binary file is denominated SGI (Simulações Gráficas Interativas (Interactive Graphic Simulations), an acronym already used in other publications of the GDN/CNPq.

Economical Implementation of a Filter Engine in an FPGA

NASA Technical Reports Server (NTRS)

Kowalski, James E.

2009-01-01

A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup.

Highly linear, sensitive analog-to-digital converter

NASA Technical Reports Server (NTRS)

Cox, J.; Finley, W. R.

1969-01-01

Analog-to-digital converter converts 10 volt full scale input signal into 13 bit digital output. Advantages include high sensitivity, linearity, low quantitizing error, high resistance to mechanical shock and vibration loads, and temporary data storage capabilities.

Analog quadrature signal to phase angle data conversion by a quadrature digitizer and quadrature counter

DOEpatents

Buchenauer, C.J.

1981-09-23

The quadrature phase angle phi (t) of a pair of quadrature signals S/sub 1/(t) and S/sub 2/(t) is digitally encoded on a real time basis by a quadrature digitizer for fractional phi (t) rotational excursions and by a quadrature up/down counter for full phi (t) rotations. The pair of quadrature signals are of the form S/sub 1/(t) = k(t) sin phi (t) and S/sub 2/(t) = k(t) cos phi (t) where k(t) is a signal common to both. The quadrature digitizer and the quadrature up/down counter may be used together or singularly as desired or required. Optionally, a digital-to-analog converter may follow the outputs of the quadrature digitizer and the quadrature up/down counter to provide an analog signal output of the quadrature phase angle phi (t).

Analog quadrature signal to phase angle data conversion by a quadrature digitizer and quadrature counter

DOEpatents

Buchenauer, C. Jerald

1984-01-01

The quadrature phase angle .phi.(t) of a pair of quadrature signals S.sub.1 (t) and S.sub.2 (t) is digitally encoded on a real time basis by a quadrature digitizer for fractional .phi.(t) rotational excursions and by a quadrature up/down counter for full .phi.(t) rotations. The pair of quadrature signals are of the form S.sub.1 (t)=k(t) sin .phi.(t) and S.sub.2 (t)=k(t) cos .phi.(t) where k(t) is a signal common to both. The quadrature digitizer and the quadrature up/down counter may be used together or singularly as desired or required. Optionally, a digital-to-analog converter may follow the outputs of the quadrature digitizer and the quadrature up/down counter to provide an analog signal output of the quadrature phase angle .phi.(t).

Particle identification using digital pulse shape discrimination in a nTD silicon detector with a 1 GHz sampling digitizer

NASA Astrophysics Data System (ADS)

Mahata, K.; Shrivastava, A.; Gore, J. A.; Pandit, S. K.; Parkar, V. V.; Ramachandran, K.; Kumar, A.; Gupta, S.; Patale, P.

2018-06-01

In beam test experiments have been carried out for particle identification using digital pulse shape analysis in a 500 μm thick Neutron Transmutation Doped (nTD) silicon detector with an indigenously developed FPGA based 12 bit resolution, 1 GHz sampling digitizer. The nTD Si detector was used in a low-field injection setup to detect light heavy-ions produced in reactions of ∼ 5 MeV/A 7Li and 12C beams on different targets. Pulse height, rise time and current maximum have been obtained from the digitized charge output of a high bandwidth charge and current sensitive pre-amplifier. Good isotopic separation have been achieved using only the digitized charge output in case of light heavy-ions. The setup can be used for charged particle spectroscopy in nuclear reactions involving light heavy-ions around the Coulomb barrier energies.

Artifacts in Digital Coincidence Timing

PubMed Central

Moses, W. W.; Peng, Q.

2014-01-01

Digital methods are becoming increasingly popular for measuring time differences, and are the de facto standard in PET cameras. These methods usually include a master system clock and a (digital) arrival time estimate for each detector that is obtained by comparing the detector output signal to some reference portion of this clock (such as the rising edge). Time differences between detector signals are then obtained by subtracting the digitized estimates from a detector pair. A number of different methods can be used to generate the digitized arrival time of the detector output, such as sending a discriminator output into a time to digital converter (TDC) or digitizing the waveform and applying a more sophisticated algorithm to extract a timing estimator. All measurement methods are subject to error, and one generally wants to minimize these errors and so optimize the timing resolution. A common method for optimizing timing methods is to measure the coincidence timing resolution between two timing signals whose time difference should be constant (such as detecting gammas from positron annihilation) and selecting the method that minimizes the width of the distribution (i.e., the timing resolution). Unfortunately, a common form of error (a nonlinear transfer function) leads to artifacts that artificially narrow this resolution, which can lead to erroneous selection of the “optimal” method. The purpose of this note is to demonstrate the origin of this artifact and suggest that caution should be used when optimizing time digitization systems solely on timing resolution minimization. PMID:25321885

Artifacts in digital coincidence timing

DOE PAGES

Moses, W. W.; Peng, Q.

2014-10-16

Digital methods are becoming increasingly popular for measuring time differences, and are the de facto standard in PET cameras. These methods usually include a master system clock and a (digital) arrival time estimate for each detector that is obtained by comparing the detector output signal to some reference portion of this clock (such as the rising edge). Time differences between detector signals are then obtained by subtracting the digitized estimates from a detector pair. A number of different methods can be used to generate the digitized arrival time of the detector output, such as sending a discriminator output into amore » time to digital converter (TDC) or digitizing the waveform and applying a more sophisticated algorithm to extract a timing estimator.All measurement methods are subject to error, and one generally wants to minimize these errors and so optimize the timing resolution. A common method for optimizing timing methods is to measure the coincidence timing resolution between two timing signals whose time difference should be constant (such as detecting gammas from positron annihilation) and selecting the method that minimizes the width of the distribution (i.e. the timing resolution). Unfortunately, a common form of error (a nonlinear transfer function) leads to artifacts that artificially narrow this resolution, which can lead to erroneous selection of the 'optimal' method. In conclusion, the purpose of this note is to demonstrate the origin of this artifact and suggest that caution should be used when optimizing time digitization systems solely on timing resolution minimization.« less

INSPECTION MEANS FOR INDUCTION MOTORS

DOEpatents

Williams, A.W.

1959-03-10

an appartus is descripbe for inspcting electric motors and more expecially an appartus for detecting falty end rings inn suqirrel cage inductio motors while the motor is running. In its broua aspects, the mer would around ce of reference tedtor means also itons in the phase ition of the An electronic circuit for conversion of excess-3 binary coded serial decimal numbers to straight binary coded serial decimal numbers is reported. The converter of the invention in its basic form generally coded pulse words of a type having an algebraic sign digit followed serially by a plurality of decimal digits in order of decreasing significance preceding a y algebraic sign digit followed serially by a plurality of decimal digits in order of decreasing significance. A switching martix is coupled to said input circuit and is internally connected to produce serial straight binary coded pulse groups indicative of the excess-3 coded input. A stepping circuit is coupled to the switching matrix and to a synchronous counter having a plurality of x decimal digit and plurality of y decimal digit indicator terminals. The stepping circuit steps the counter in synchornism with the serial binary pulse group output from the switching matrix to successively produce pulses at corresponding ones of the x and y decimal digit indicator terminals. The combinations of straight binary coded pulse groups and corresponding decimal digit indicator signals so produced comprise a basic output suitable for application to a variety of output apparatus.

Artifacts in digital coincidence timing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moses, W. W.; Peng, Q.

Digital methods are becoming increasingly popular for measuring time differences, and are the de facto standard in PET cameras. These methods usually include a master system clock and a (digital) arrival time estimate for each detector that is obtained by comparing the detector output signal to some reference portion of this clock (such as the rising edge). Time differences between detector signals are then obtained by subtracting the digitized estimates from a detector pair. A number of different methods can be used to generate the digitized arrival time of the detector output, such as sending a discriminator output into amore » time to digital converter (TDC) or digitizing the waveform and applying a more sophisticated algorithm to extract a timing estimator.All measurement methods are subject to error, and one generally wants to minimize these errors and so optimize the timing resolution. A common method for optimizing timing methods is to measure the coincidence timing resolution between two timing signals whose time difference should be constant (such as detecting gammas from positron annihilation) and selecting the method that minimizes the width of the distribution (i.e. the timing resolution). Unfortunately, a common form of error (a nonlinear transfer function) leads to artifacts that artificially narrow this resolution, which can lead to erroneous selection of the 'optimal' method. In conclusion, the purpose of this note is to demonstrate the origin of this artifact and suggest that caution should be used when optimizing time digitization systems solely on timing resolution minimization.« less

An Interactive Graphics Program for Investigating Digital Signal Processing.

ERIC Educational Resources Information Center

Miller, Billy K.; And Others

1983-01-01

Describes development of an interactive computer graphics program for use in teaching digital signal processing. The program allows students to interactively configure digital systems on a monitor display and observe their system's performance by means of digital plots on the system's outputs. A sample program run is included. (JN)

A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications.

PubMed

Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

2017-06-07

The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm², which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply.

A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications

PubMed Central

Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

2017-01-01

The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm2, which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply. PMID:28590425

A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application

NASA Astrophysics Data System (ADS)

Zheng, Hao; Zhu, Zhangming; Ma, Rui

2017-07-01

This paper presents a fully integrated CMOS filterless class D amplifier that can directly hook up lithium battery in mobile application The proposed amplifier embodies a 2-order feedback path architecture instead of direct feedback of output to input of the integrator to decrease the high frequency intermodulation distortion associated with direct feedback and eliminate the integrator input common mode disturbance from the output in ternary modulation. The prototype class D amplifier realized in 0.35 μm digital technology achieves a THD+N of 0.02% when delivering 400 mW to an 8 {{Ω }} load from {V}{DD}=3.6 {{V}}. The PSRR of the prototype class D amplifier is 80 dB at 217 Hz. Furthermore a filterless method that can eliminate the external LC filter is employed which offers great advantages of saving PCB space and lowering system cost. In addition the prototype class D amplifier can operate in large voltage range with V DD range from 2.5 to 4.2 V in mobile application. The total area of the amplifier is 1.7 mm2. Project supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044).

Analog and digital transport of RF channels over converged 5G wireless-optical networks

NASA Astrophysics Data System (ADS)

Binh, Le Nguyen

2016-02-01

Under the exponential increase demand by the emerging 5G wireless access networking and thus data-center based Internet, novel and economical transport of RF channels to and from wireless access systems. This paper presents the transport technologies of RF channels over the analog and digital domain so as to meet the demands of the transport capacity reaching multi-Tbps, in the followings: (i) The convergence of 5G broadband wireless and optical networks and its demands on capacity delivery and network structures; (ii) Analog optical technologies for delivery of both the information and RF carriers to and from multiple-input multiple-output (MIMO) antenna sites so as to control the beam steering of MIMO antenna in the mmW at either 28.6 GHz and 56.8 GHz RF carrier and delivery of channels of aggregate capacity reaching several Tbps; (ii) Transceiver employing advanced digital modulation formats and digital signal processing (DSP) so as to provide 100G and beyond transmission rate to meet the ultra-high capacity demands with flexible spectral grids, hence pay-on-demand services. The interplay between DSP-based and analog transport techniques is examined; (iii) Transport technologies for 5G cloud access networks and associate modulation and digital processing techniques for capacity efficiency; and (iv) Finally the integrated optic technologies with novel lasers, comb generators and simultaneous dual function photonic devices for both demultiplexing/multiplexing and modulation are proposed, hence a system on chip structure can be structured. Quantum dot lasers and matrixes of micro ring resonators are integrated on the same Si-on-Silica substrate are proposed and described.

Digital Plasma Control System for Alcator C-Mod

NASA Astrophysics Data System (ADS)

Ferrara, M.; Wolfe, S.; Stillerman, J.; Fredian, T.; Hutchinson, I.

2004-11-01

A digital plasma control system (DPCS) has been designed to replace the present C-Mod system, which is based on hybrid analog-digital computer. The initial implementation of DPCS comprises two 64 channel, 16 bit, low-latency cPCI digitizers, each with 16 analog outputs, controlled by a rack-mounted single-processor Linux server, which also serves as the compute engine. A prototype system employing three older 32 channel digitizers was tested during the 2003-04 campaign. The hybrid's linear PID feedback system was emulated by IDL code executing a synchronous loop, using the same target waveforms and control parameters. Reliable real-time operation was accomplished under a standard Linux OS (RH9) by locking memory and disabling interrupts during the plasma pulse. The DPCS-computed outputs agreed to within a few percent with those produced by the hybrid system, except for discrepancies due to offsets and non-ideal behavior of the hybrid circuitry. The system operated reliably, with no sample loss, at more than twice the 10kHz design specification, providing extra time for implementing more advanced control algorithms. The code is fault-tolerant and produces consistent output waveforms even with 10% sample loss.

A wide-band, high-resolution spectrum analyzer

NASA Technical Reports Server (NTRS)

Wilck, H. C.; Quirk, M. P.; Grimm, M. J.

1985-01-01

A million-channel, 20 MHz-bandwidth, digital spectrum analyzer under evelopment for use in the SETI Sky Survey and other applications in the Deep Space Network is described. The analyzer digitizes an analog input, performs a 2(20)-point Radix-2, Fast Fourier Transform, accumulates the output power, and normalizes the output to remove frequency-dependent gain. The effective speed of the real-time hardware is 2.2 GigaFLOPS.

Design and evaluation of a flow-to-frequency converter circuit with thermal feedback

NASA Astrophysics Data System (ADS)

Pawlowski, Eligiusz

2017-05-01

A novel thermal flow sensor with a frequency output is presented. The sensor provides a pulse-train output whose frequency is related to the fluid flow rate around a self-heating thermistor. The integrating properties of the temperature sensor have been used, which allowed for realization of the pulse frequency modulator with a thermal feedback loop, stabilizing the temperature of the sensor placed in the flowing medium. The system assures a balance of the amount of heat supplied in the impulses to the sensor and the heat given up by the sensor in a continuous way to the flowing medium. Therefore the frequency of output pulse-train is proportional to the medium flow velocity around the sensor. The special feature of the presented solution is the total integration of the thermal sensor with the measurement signal conditioning system. i.e. the sensor and conditioning system are not separate elements of the measurement circuit, but constitute a whole in the form of a thermal heat-balance mode flow-to-frequency converter. The frequency signal from the converter may be directly connected to the microprocessor digital input, which with use of the standard built-in counters may convert the frequency into a numerical value of high precision. The sensor has been experimentally characterized as a function of the average flow velocity of air at room temperature.

Self-tuning digital Mössbauer detection system

NASA Astrophysics Data System (ADS)

Veiga, A.; Grunfeld, C. M.; Pasquevich, G. A.; Mendoza Zélis, P.; Martínez, N.; Sánchez, F. H.

2014-01-01

Long term gamma spectroscopy experiments involving single-channel analyzer equipment depend upon thermal stability of the detector and its associated high-voltage supply. Assuming constant discrimination levels, a drift in the detector gain impacts the output rate, producing an effect on the output spectrum. In some cases (e.g. single-energy resonant absorption experiments) data of interest can be completely lost. We present a digital self-adapting discrimination strategy that tracks emission line shifts using statistical measurements on a predefined region-of-interest of the spectrum. It is developed in the form of a synthesizable module that can be intercalated in the digital processing chain. It requires a moderate to small amount of digital resources and can be easily activated and deactivated.

Evaluating digital libraries in the health sector. Part 1: measuring inputs and outputs.

PubMed

Cullen, Rowena

2003-12-01

This is the first part of a two-part paper which explores methods that can be used to evaluate digital libraries in the health sector. In this first part, some approaches to evaluation that have been proposed for mainstream digital information services are examined for their suitability to provide models for the health sector. The paper summarizes some major national and collaborative initiatives to develop measures for digital libraries, and analyses these approaches in terms of their relationship to traditional measures of library performance, which are focused on inputs and outputs, and their relevance to current debates among health information specialists. The second part* looks more specifically at evaluative models based on outcomes, and models being developed in the health sector.

Interactive digital signal processor

NASA Technical Reports Server (NTRS)

Mish, W. H.; Wenger, R. M.; Behannon, K. W.; Byrnes, J. B.

1982-01-01

The Interactive Digital Signal Processor (IDSP) is examined. It consists of a set of time series analysis Operators each of which operates on an input file to produce an output file. The operators can be executed in any order that makes sense and recursively, if desired. The operators are the various algorithms used in digital time series analysis work. User written operators can be easily interfaced to the sysatem. The system can be operated both interactively and in batch mode. In IDSP a file can consist of up to n (currently n=8) simultaneous time series. IDSP currently includes over thirty standard operators that range from Fourier transform operations, design and application of digital filters, eigenvalue analysis, to operators that provide graphical output, allow batch operation, editing and display information.

Delta Modulation Technique for Improving the Sensitivity of Monobit Subsamplers in Radar and Coherent Receiver Applications

DOE PAGES

Rodenbeck, Christopher T.; Tracey, Keith J.; Barkley, Keith R.; ...

2014-08-01

This paper introduces a technique for improving the sensitivity of RF subsamplers in radar and coherent receiver applications. The technique, referred to herein as “delta modulation” (DM), feeds the time-average output of a monobit analog-to-digital converter (ADC) back to the ADC input, but with opposite polarity. Assuming pseudo-stationary modulation statistics on the sampled RF waveform, the feedback signal corrects for aggregate DC offsets present in the ADC that otherwise degrade ADC sensitivity. Two RF integrated circuits (RFICs) are designed to demonstrate the approach. One uses analog DM to create the feedback signal; the other uses digital DM to achieve themore » same result. A series of tests validates the designs. The dynamic time-domain response confirms the feedback loop’s basic operation. Measured output quantization imbalance, under noise-only input drive, significantly improves with the use of the DM circuit, even for large, deliberately induced DC offsets and wide temperature variation from -55°C to +85 °C. Examination of the corrected vs. uncorrected baseband spectrum under swept input signal-tonoise ratio (SNR) conditions demonstrates the effectiveness of this approach for realistic radar and coherent receiver applications. In conclusion, two-tone testing shows no impact of the DM technique on ADC linearity.« less

A 16 channel discriminator VME board with enhanced triggering capabilities

NASA Astrophysics Data System (ADS)

Borsato, E.; Garfagnini, A.; Menon, G.

2012-08-01

Electronics and data acquisition systems used in small and large scale laboratories often have to handle analog signals with varying polarity, amplitude and duration which have to be digitized to be used as trigger signals to validate the acquired data. In the specific case of experiments dealing with ionizing radiation, ancillary particle detectors (for instance plastic scintillators or Resistive Plate Chambers) are used to trigger and select the impinging particles for the experiment. A novel approach using commercial LVDS line receivers as discriminator devices is presented. Such devices, with a proper calibration, can handle positive and negative analog signals in a wide dynamic range (from 20 mV to 800 mV signal amplitude). The clear advantages, with respect to conventional discriminator devices, are reduced costs, high reliability of a mature technology and the possibility of high integration scale. Moreover, commercial discriminator boards with positive input signal and a wide threshold swing are not available on the market. The present paper describes the design and characterization of a VME board capable to handle 16 differential or single-ended input channels. The output digital signals, available independently for each input, can be combined in the board into three independent trigger logic units which provide additional outputs for the end user.

Photonic integrated circuits based on sampled-grating distributed-Bragg-reflector lasers

NASA Astrophysics Data System (ADS)

Barton, Jonathon S.; Skogen, Erik J.; Masanovic, Milan L.; Raring, James; Sysak, Matt N.; Johansson, Leif; DenBaars, Steven P.; Coldren, Larry A.

2003-07-01

The Sampled-Grating Distributed-Bragg-Reflector laser(SGDBR) provides wide tunability (>40nm), and high output power (>10mW). Driven by the demand for network reconfigurability and ease of implementation, the SGDBR has moved from the research lab to be commercially viable in the marketplace. The SGDBR is most often implemented using an offset-quantum well epitaxial structure in which the quantum wells are etched off in the passive sections. Alternatively, quantum well intermixing has been used recently to achieve the same goal - resulting in improved optical gain and the potential for multiple bandgaps along the device structure. These epitaxial "platforms" provide the basis for more exotic opto-electronic device functionality exhibiting low chirp for digital applications and enhanced linearity for analog applications. This talk will cover state-of-the-art opto-electronic devices based on the SGDBR platform including: integrated Mach-Zehnder modulators, and integrated electro-absorption modulators.

Integration of a versatile bridge concept in a 34 GHz pulsed/CW EPR spectrometer.

PubMed

Band, Alan; Donohue, Matthew P; Epel, Boris; Madhu, Shraeya; Szalai, Veronika A

2018-03-01

We present a 34 GHz continuous wave (CW)/pulsed electron paramagnetic resonance (EPR) spectrometer capable of pulse-shaping that is based on a versatile microwave bridge design. The bridge radio frequency (RF)-in/RF-out design (500 MHz to 1 GHz input/output passband, 500 MHz instantaneous input/output bandwidth) creates a flexible platform with which to compare a variety of excitation and detection methods utilizing commercially available equipment external to the bridge. We use three sources of RF input to implement typical functions associated with CW and pulse EPR spectroscopic measurements. The bridge output is processed via high speed digitizer and an in-phase/quadrature (I/Q) demodulator for pulsed work or sent to a wideband, high dynamic range log detector for CW. Combining this bridge with additional commercial hardware and new acquisition and control electronics, we have designed and constructed an adaptable EPR spectrometer that builds upon previous work in the literature and is functionally comparable to other available systems. Published by Elsevier Inc.

A hybrid nanomemristor/transistor logic circuit capable of self-programming

PubMed Central

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A. A.; Wu, Wei; Stewart, Duncan R.; Williams, R. Stanley

2009-01-01

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing. PMID:19171903

A hybrid nanomemristor/transistor logic circuit capable of self-programming.

PubMed

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

2009-02-10

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

Angular Positioning Sensor for Space Mechanisms

NASA Astrophysics Data System (ADS)

Steiner, Nicolas; Chapuis, Dominique

2013-09-01

Angular position sensors are used on various rotating mechanisms such as solar array drive mechanisms, antenna pointing mechanisms, scientific instruments, motors or actuators.Now a days, potentiometers and encoders are mainly used for angular measurement purposes. Both of them have their own pros and cons.As alternative, Ruag Space Switzerland Nyon (RSSN) is developing and qualifying two innovative technologies of angular position sensors which offer easy implementation, medium to very high lifetime and high flexibility with regards to the output signal shape/type.The Brushed angular position sensor uses space qualified processes which are already flying on RSSN's sliprings for many years. A large variety of output signal shape can be implemented to fulfill customer requirements (digital, analog, customized, etc.).The contactless angular position sensor consists in a new radiation hard Application Specific Integrated Circuit (ASIC) based on the Hall effect and providing the angular position without complex processing algorithm.

Discrete time learning control in nonlinear systems

NASA Technical Reports Server (NTRS)

Longman, Richard W.; Chang, Chi-Kuang; Phan, Minh

1992-01-01

In this paper digital learning control methods are developed primarily for use in single-input, single-output nonlinear dynamic systems. Conditions for convergence of the basic form of learning control based on integral control concepts are given, and shown to be satisfied by a large class of nonlinear problems. It is shown that it is not the gross nonlinearities of the differential equations that matter in the convergence, but rather the much smaller nonlinearities that can manifest themselves during the short time interval of one sample time. New algorithms are developed that eliminate restrictions on the size of the learning gain, and on knowledge of the appropriate sign of the learning gain, for convergence to zero error in tracking a feasible desired output trajectory. It is shown that one of the new algorithms can give guaranteed convergence in the presence of actuator saturation constraints, and indicate when the requested trajectory is beyond the actuator capabilities.

We have "born digital" - now what about "born semantic"?

NASA Astrophysics Data System (ADS)

Leadbetter, Adam; Fredericks, Janet

2014-05-01

The phrase "born-digital" refers to those materials which originate in a digital form. In Earth and Space Sciences, this is now very much the norm for data: analogue to digital converters sit on instrument boards and produce a digital record of the observed environment. While much effort has been put in to creating and curating these digital data, there has been little work on using semantic mark up of data from the point of collection - what we term 'born semantic'. In this presentation we report on two efforts to expand this area: Qartod-to-OGC (Q2O) and SenseOCEAN. These projects have taken a common approach to 'born semantic': create or reuse appropriate controlled vocabularies, published to World Wide Web Commission (W3C) standards use standards from the Open Geospatial Consortium's Sensor Web Enablement (SWE) initiative to describe instrument setup, deployment and/or outputs using terms from those controlled vocabularies embed URLs from the controlled vocabularies within the SWE documents in a "Linked Data" conformant approach Q2O developed best practices examples of SensorML descriptions of Original Equipment Manufacturers' metadata (model characteristics, capabilities, manufacturer contact, etc ...) set-up and deployment SensorML files; and data centre process-lineage using registered vocabularies to describe terms (including input, output, processes, parameters, quality control flags) One Q2O use case, the Martha's Vineyard Coastal Observatory ADCP Waves instance, uses SensorML and registered vocabularies to fully describe the process of computing wave parameters from sensed properties, including quality control tests and associated results. The European Commission Framework Programme 7 project SenseOCEAN draws together world leading marine sensor developers to create a highly integrated multifunction and cost-effective in situ marine biogeochemical sensor system. This project will provide a quantum leap in the ability to measure crucial biogeochemical parameters. Innovations will be combined with state of the art sensor technology to produce a modular sensor system that can be deployed on many platforms. The sensor descriptions are being profiled in SensorML and the controlled vocabularies are being repurposed from those used within the European Commission SeaDataNet project and published on the community standard NERC Vocabulary Server.

Advanced Military Pay System Concepts. Evaluation of Opportunities through Information Technology.

DTIC Science & Technology

1980-07-01

trans- mdtter (UART) to interface with a modem . The main processor was then responsible for input and output between main memory and the UART...digital, "run-length" encoding scheme which is very effective in reducing the amount of data to be transmitted. Machines of this type include a modem ...Output control as well as data compression will be combined with appropriate modems or interfaces to digital transmission channels and microprocessor

Multiplexed chirp waveform synthesizer

DOEpatents

Dudley, Peter A.; Tise, Bert L.

2003-09-02

A synthesizer for generating a desired chirp signal has M parallel channels, where M is an integer greater than 1, each channel including a chirp waveform synthesizer generating at an output a portion of a digital representation of the desired chirp signal; and a multiplexer for multiplexing the M outputs to create a digital representation of the desired chirp signal. Preferably, each channel receives input information that is a function of information representing the desired chirp signal.

Creating a virtual community of learning predicated on medical student learning styles.

PubMed

McGowan, Julie; Abrams, Matthew; Frank, Mark; Bangert, Michael

2003-01-01

To create a virtual community of learning within the Indiana University School of Medicine, learning tools were developed within ANGEL to meet the learning needs and habits of the medical students. Determined by student feedback, the integration of digital audio recordings of class lectures into the course management content with several possible outputs was paramount. The other components included electronic enhancement of old exams and providing case-based tutorials within the ANGEL framework. Students are using the curriculum management system more. Faculty feel more secure about their intellectual property because of the authentication and security offered through the ANGEL system. The technology applications were comparatively easy to create and manage. The return on investment, particularly for the digital audio recording component, has been substantial. By considering student learning styles, extant curriculum management systems can be enhanced to facilitate student learning within an electronic environment.

Surface Profile and Stress Field Evaluation using Digital Gradient Sensing Method

DOE PAGES

Miao, C.; Sundaram, B. M.; Huang, L.; ...

2016-08-09

Shape and surface topography evaluation from measured orthogonal slope/gradient data is of considerable engineering significance since many full-field optical sensors and interferometers readily output accurate data of that kind. This has applications ranging from metrology of optical and electronic elements (lenses, silicon wafers, thin film coatings), surface profile estimation, wave front and shape reconstruction, to name a few. In this context, a new methodology for surface profile and stress field determination based on a recently introduced non-contact, full-field optical method called digital gradient sensing (DGS) capable of measuring small angular deflections of light rays coupled with a robust finite-difference-based least-squaresmore » integration (HFLI) scheme in the Southwell configuration is advanced here. The method is demonstrated by evaluating (a) surface profiles of mechanically warped silicon wafers and (b) stress gradients near growing cracks in planar phase objects.« less

Real-time classification and sensor fusion with a spiking deep belief network

PubMed Central

O'Connor, Peter; Neil, Daniel; Liu, Shih-Chii; Delbruck, Tobi; Pfeiffer, Michael

2013-01-01

Deep Belief Networks (DBNs) have recently shown impressive performance on a broad range of classification problems. Their generative properties allow better understanding of the performance, and provide a simpler solution for sensor fusion tasks. However, because of their inherent need for feedback and parallel update of large numbers of units, DBNs are expensive to implement on serial computers. This paper proposes a method based on the Siegert approximation for Integrate-and-Fire neurons to map an offline-trained DBN onto an efficient event-driven spiking neural network suitable for hardware implementation. The method is demonstrated in simulation and by a real-time implementation of a 3-layer network with 2694 neurons used for visual classification of MNIST handwritten digits with input from a 128 × 128 Dynamic Vision Sensor (DVS) silicon retina, and sensory-fusion using additional input from a 64-channel AER-EAR silicon cochlea. The system is implemented through the open-source software in the jAER project and runs in real-time on a laptop computer. It is demonstrated that the system can recognize digits in the presence of distractions, noise, scaling, translation and rotation, and that the degradation of recognition performance by using an event-based approach is less than 1%. Recognition is achieved in an average of 5.8 ms after the onset of the presentation of a digit. By cue integration from both silicon retina and cochlea outputs we show that the system can be biased to select the correct digit from otherwise ambiguous input. PMID:24115919

Manipulation based on sensor-directed control: An integrated end effector and touch sensing system

NASA Technical Reports Server (NTRS)

Hill, J. W.; Sword, A. J.

1973-01-01

A hand/touch sensing system is described that, when mounted on a position-controlled manipulator, greatly expands the kinds of automated manipulation tasks that can be undertaken. Because of the variety of coordinate conversions, control equations, and completion criteria, control is necessarily dependent upon a small digital computer. The sensing system is designed both to be rugged and to sense the necessary touch and force information required to execute a wide range of manipulation tasks. The system consists of a six-axis wrist sensor, external touch sensors, and a pair of matrix jaw sensors. Details of the construction of the particular sensors, the integration of the end effector into the sensor system, and the control algorithms for using the sensor outputs to perform manipulation tasks automatically are discussed.

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide

PubMed Central

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P. K. A.

2014-01-01

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W−1/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems. PMID:25417847

Pattern Generator for Bench Test of Digital Boards

NASA Technical Reports Server (NTRS)

Berkun, Andrew C.; Chu, Anhua J.

2012-01-01

All efforts to develop electronic equipment reach a stage where they need a board test station for each board. The SMAP digital system consists of three board types that interact with each other using interfaces with critical timing. Each board needs to be tested individually before combining into the integrated digital electronics system. Each board needs critical timing signals from the others to be able to operate. A bench test system was developed to support test of each board. The test system produces all the outputs of the control and timing unit, and is delivered much earlier than the timing unit. Timing signals are treated as data. A large file is generated containing the state of every timing signal at any instant. This file is streamed out to an IO card, which is wired directly to the device-under-test (DUT) input pins. This provides a flexible test environment that can be adapted to any of the boards required to test in a standalone configuration. The problem of generating the critical timing signals is then transferred from a hardware problem to a software problem where it is more easily dealt with.

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide.

PubMed

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P K A

2014-11-24

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W(-1)/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems.

Biomolecular logic systems: applications to biosensors and bioactuators

NASA Astrophysics Data System (ADS)

Katz, Evgeny

2014-05-01

The paper presents an overview of recent advances in biosensors and bioactuators based on the biocomputing concept. Novel biosensors digitally process multiple biochemical signals through Boolean logic networks of coupled biomolecular reactions and produce output in the form of YES/NO response. Compared to traditional single-analyte sensing devices, biocomputing approach enables a high-fidelity multi-analyte biosensing, particularly beneficial for biomedical applications. Multi-signal digital biosensors thus promise advances in rapid diagnosis and treatment of diseases by processing complex patterns of physiological biomarkers. Specifically, they can provide timely detection and alert to medical emergencies, along with an immediate therapeutic intervention. Application of the biocomputing concept has been successfully demonstrated for systems performing logic analysis of biomarkers corresponding to different injuries, particularly exemplified for liver injury. Wide-ranging applications of multi-analyte digital biosensors in medicine, environmental monitoring and homeland security are anticipated. "Smart" bioactuators, for example for signal-triggered drug release, were designed by interfacing switchable electrodes and biocomputing systems. Integration of novel biosensing and bioactuating systems with the biomolecular information processing systems keeps promise for further scientific advances and numerous practical applications.

Role of biomolecular logic systems in biosensors and bioactuators

NASA Astrophysics Data System (ADS)

Mailloux, Shay; Katz, Evgeny

2014-09-01

An overview of recent advances in biosensors and bioactuators based on biocomputing systems is presented. Biosensors digitally process multiple biochemical signals through Boolean logic networks of coupled biomolecular reactions and produce an output in the form of a YES/NO response. Compared to traditional single-analyte sensing devices, the biocomputing approach enables high-fidelity multianalyte biosensing, which is particularly beneficial for biomedical applications. Multisignal digital biosensors thus promise advances in rapid diagnosis and treatment of diseases by processing complex patterns of physiological biomarkers. Specifically, they can provide timely detection and alert medical personnel of medical emergencies together with immediate therapeutic intervention. Application of the biocomputing concept has been successfully demonstrated for systems performing logic analysis of biomarkers corresponding to different injuries, particularly as exemplified for liver injury. Wide-ranging applications of multianalyte digital biosensors in medicine, environmental monitoring, and homeland security are anticipated. "Smart" bioactuators, for signal-triggered drug release, for example, were designed by interfacing switchable electrodes with biocomputing systems. Integration of biosensing and bioactuating systems with biomolecular information processing systems advances the potential for further scientific innovations and various practical applications.

Digital Imprinting of RNA Recognition and Processing on a Self-Assembled Nucleic Acid Matrix

NASA Astrophysics Data System (ADS)

Redhu, Shiv K.; Castronovo, Matteo; Nicholson, Allen W.

2013-08-01

The accelerating progress of research in nanomedicine and nanobiotechnology has included initiatives to develop highly-sensitive, high-throughput methods to detect biomarkers at the single-cell level. Current sensing approaches, however, typically involve integrative instrumentation that necessarily must balance sensitivity with rapidity in optimizing biomarker detection quality. We show here that laterally-confined, self-assembled monolayers of a short, double-stranded(ds)[RNA-DNA] chimera enable permanent digital detection of dsRNA-specific inputs. The action of ribonuclease III and the binding of an inactive, dsRNA-binding mutant can be permanently recorded by the input-responsive action of a restriction endonuclease that cleaves an ancillary reporter site within the dsDNA segment. The resulting irreversible height change of the arrayed ds[RNA-DNA], as measured by atomic force microscopy, provides a distinct digital output for each dsRNA-specific input. These findings provide the basis for developing imprinting-based bio-nanosensors, and reveal the versatility of AFM as a tool for characterizing the behaviour of highly-crowded biomolecules at the nanoscale.

Digital Field Mapping with the British Geological Survey

NASA Astrophysics Data System (ADS)

Leslie, Graham; Smith, Nichola; Jordan, Colm

2014-05-01

The BGS•SIGMA project was initiated in 2001 in response to a major stakeholder review of onshore mapping within the British Geological Survey (BGS). That review proposed a significant change for BGS with the recommendation that digital methods should be implemented for field mapping and data compilation. The BGS•SIGMA project (System for Integrated Geoscience MApping) is an integrated workflow for geoscientific surveying and visualisation using digital methods for geological data visualisation, recording and interpretation, in both 2D and 3D. The project has defined and documented an underpinning framework of best practice for survey and information management, best practice that has then informed the design brief and specification for a toolkit to support this new methodology. The project has now delivered BGS•SIGMA2012. BGS•SIGMA2012 is a integrated toolkit which enables assembly and interrogation/visualisation of existing geological information; capture of, and integration with, new data and geological interpretations; and delivery of 3D digital products and services. From its early days as a system which used PocketGIS run on Husky Fex21 hardware, to the present day system which runs on ruggedized tablet PCs with integrated GPS units, the system has evolved into a complete digital mapping and compilation system. BGS•SIGMA2012 uses a highly customised version of ESRI's ArcGIS 10 and 10.1 with a fully relational Access 2007/2010 geodatabase. BGS•SIGMA2012 is the third external release of our award-winning digital field mapping toolkit. The first free external release of the award-winning digital field mapping toolkit was in 2009, with the third version (BGS-SIGMAmobile2012 v1.01) released on our website (http://www.bgs.ac.uk/research/sigma/home.html) in 2013. The BGS•SIGMAmobile toolkit formed the major part of the first two releases but this new version integrates the BGS•SIGMAdesktop functionality that BGS routinely uses to transform our field data into corporate standard geological models and derivative map outputs. BGS•SIGMA2012 is the default toolkit within BGS for bedrock and superficial geological mapping and other data acquisition projects across the UK, both onshore and offshore. It is used in mapping projects in Africa, the Middle East and the USA, and has been taken to Japan as part of the Tohoku tsunami damage assessment project. It is also successfully being used worldwide by other geological surveys e.g. Norway and Tanzania; by universities including Leicester, Keele and Kyoto, and by organisations such as Vale Mining in Brazil and the Montana Bureau of Mines and Geology. It is used globally, with over 2000 licenses downloaded worldwide to date and in use on all seven continents. Development of the system is still ongoing as a result of both user feedback and the changing face of technology. Investigations into the development of a BGS•SIGMA smartphone app are currently taking place alongside system developments such as a new and more streamlined data entry system.

Implementation of high-resolution time-to-digital converter in 8-bit microcontrollers.

PubMed

Bengtsson, Lars E

2012-04-01

This paper will demonstrate how a time-to-digital converter (TDC) with sub-nanosecond resolution can be implemented into an 8-bit microcontroller using so called "direct" methods. This means that a TDC is created using only five bidirectional digital input-output-pins of a microcontroller and a few passive components (two resistors, a capacitor, and a diode). We will demonstrate how a TDC for the range 1-10 μs is implemented with 0.17 ns resolution. This work will also show how to linearize the output by combining look-up tables and interpolation. © 2012 American Institute of Physics

A programmable, multichannel power supply for SIPMs with temperature compensation loop and Ethernet interface

NASA Astrophysics Data System (ADS)

Querol, M.; Rodríguez, J.; Toledo, J.; Esteve, R.; Álvarez, V.; Herrero, V.

2016-12-01

Among the different techniques available, the SiPM power supply described in this paper uses output voltage and sensor temperature feedback. A high-resolution ADC digitizes both the output voltage and an analog signal proportional to the SiPM temperature for each of its 16 independent outputs. The appropriate change in the bias voltage is computed in a micro-controller and this correction is applied via a high resolution DAC to the control input of a DC/DC module that produces the output voltage. This method allows a reduction in gain variations from typically 30% to only 0.5% in a 10 °C range. The power supply is housed in a 3U-height aluminum box. A 2.8'' touch screen on the front panel provides local access to the configuration and monitoring functions using a graphical interface. The unit has an Ethernet interface on its rear side to provide remote operation and integration in slow control systems using the encrypted and secure SSH protocol. A LabVIEW application with SSH interface has been designed to operate the power supply from a remote computer. The power supply has good characteristics, such as 85 V output range with 1 mV resolution and stability better than 2 mVP, excellent output load regulation and programmable rise and fall voltage ramps. Commercial power supplies from well-known manufacturers can show far better specifications though can also result in an over featured and over costly solution for typical applications.

Advances in a distributed approach for ocean model data interoperability

USGS Publications Warehouse

Signell, Richard P.; Snowden, Derrick P.

2014-01-01

An infrastructure for earth science data is emerging across the globe based on common data models and web services. As we evolve from custom file formats and web sites to standards-based web services and tools, data is becoming easier to distribute, find and retrieve, leaving more time for science. We describe recent advances that make it easier for ocean model providers to share their data, and for users to search, access, analyze and visualize ocean data using MATLAB® and Python®. These include a technique for modelers to create aggregated, Climate and Forecast (CF) metadata convention datasets from collections of non-standard Network Common Data Form (NetCDF) output files, the capability to remotely access data from CF-1.6-compliant NetCDF files using the Open Geospatial Consortium (OGC) Sensor Observation Service (SOS), a metadata standard for unstructured grid model output (UGRID), and tools that utilize both CF and UGRID standards to allow interoperable data search, browse and access. We use examples from the U.S. Integrated Ocean Observing System (IOOS®) Coastal and Ocean Modeling Testbed, a project in which modelers using both structured and unstructured grid model output needed to share their results, to compare their results with other models, and to compare models with observed data. The same techniques used here for ocean modeling output can be applied to atmospheric and climate model output, remote sensing data, digital terrain and bathymetric data.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kapusta, P.; Kisielewski, B.

In this paper the overvoltage protection modules (OVP) for the power supply (PS) system of the Belle II pixel detector (PXD) are described. The aim of the OVP is to protect the detector and associated electronics against overvoltage conditions. Most critical in the system are voltages supplying the front-end ASICs. The PXD detector consists of the DEPFET sensor modules with integrated chips like the Drain Current Digitizer, the Switcher and the Data Handling Processor. These chips, implemented in modern sub-micron technologies, are quite vulnerable to variations in the supply voltages. The PXD will be placed in the Belle II experimentmore » as close as possible to the interaction point, where access during experiment is very limited or even impossible, thus the PS and OVP systems exploit the remote-sensing method. Overvoltage conditions are due to failures of the PS itself, wrong setting of the output voltages or transient voltages coming out of hard noisy environment of the experiment. The OVP modules are parts of the PS modules. For powering the PXD 40 PS modules are placed 15 m outside the Belle II spectrometer. Each one is equipped with the OVP board. All voltages (22) are grouped in 4 domains: Analog, Digital, Steering and Gate which have independent grounds. The OVP boards are designed from integrated circuits from Linear Technology. All configurations were simulated with the Spice program. The control electronics is designed in a Xilinx CPLD. Two types of integrated circuits were used. LT4356 surge stopper protects loads from high voltage transients. The output voltages are limited to a safe value and also protect loads against over current faults. For less critical voltages, the LTC2912 voltage monitors are used that detect under-voltage and overvoltage events. It has to be noted that the OVP system is working independently of any other protection of the PS system, which increases its overall reliability. (authors)« less

Digital gate pulse generator for cycloconverter control

DOEpatents

Klein, Frederick F.; Mutone, Gioacchino A.

1989-01-01

The present invention provides a digital gate pulse generator which controls the output of a cycloconverter used for electrical power conversion applications by determining the timing and delivery of the firing pulses to the switching devices in the cycloconverter. Previous gate pulse generators have been built with largely analog or discrete digital circuitry which require many precision components and periodic adjustment. The gate pulse generator of the present invention utilizes digital techniques and a predetermined series of values to develop the necessary timing signals for firing the switching device. Each timing signal is compared with a reference signal to determine the exact firing time. The present invention is significantly more compact than previous gate pulse generators, responds quickly to changes in the output demand and requires only one precision component and no adjustments.

The dynamics of access to groups in working memory.

PubMed

Farrell, Simon; Lelièvre, Anna

2012-11-01

The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the temporal pattern at input merely suggesting a basis for the pattern of output buffering. Three experiments are presented here that disentangle input structure from output buffering in serial recall. In Experiment 1, participants were asked to recall a subset of visually presented digits from a temporally grouped list in their original order, where either within-group position or group position was kept constant. In Experiment 2, participants performed more standard serial recall of spoken digits, and input and output position were dissociated by asking participants to initiate recall from a post-cued position in the list. In Experiment 3, participants were asked to serially recall temporally grouped lists of visually presented digits where the grouping structure was unpredictable, under either articulatory suppression or silent conditions. The 3 experiments point to a tight linkage between implied memorial structures (i.e., the pattern of grouping at encoding) and the output structure implied by retrieval times and call into question a purely motoric account of the dynamics of recall.

Implantable digital hearing aid

NASA Technical Reports Server (NTRS)

Kissiah, A. M., Jr.

1979-01-01

Hearing aid converts analog output of microphone into digital pulses in about 10 channels of audiofrequencies. Each pulse band could be directly connected to portion of auditory nerve most sensitive to that range.

One output function: a misconception of students studying digital systems - a case study

NASA Astrophysics Data System (ADS)

Trotskovsky, E.; Sabag, N.

2015-05-01

Background:Learning processes are usually characterized by students' misunderstandings and misconceptions. Engineering educators intend to help their students overcome their misconceptions and achieve correct understanding of the concept. This paper describes a misconception in digital systems held by many students who believe that combinational logic circuits should have only one output. Purpose:The current study aims to investigate the roots of the misconception about one-output function and the pedagogical methods that can help students overcome the misconception. Sample:Three hundred and eighty-one students in the Departments of Electrical and Electronics and Mechanical Engineering at an academic engineering college, who learned the same topics of a digital combinational system, participated in the research. Design and method:In the initial research stage, students were taught according to traditional method - first to design a one-output combinational logic system, and then to implement a system with a number of output functions. In the main stage, an experimental group was taught using a new method whereby they were shown how to implement a system with several output functions, prior to learning about one-output systems. A control group was taught using the traditional method. In the replication stage (the third stage), an experimental group was taught using the new method. A mixed research methodology was used to examine the results of the new learning method. Results:Quantitative research showed that the new teaching approach resulted in a statistically significant decrease in student errors, and qualitative research revealed students' erroneous thinking patterns. Conclusions:It can be assumed that the traditional teaching method generates an incorrect mental model of the one-output function among students. The new pedagogical approach prevented the creation of an erroneous mental model and helped students develop the correct conceptual understanding.

DIGITAL Q METER

DOEpatents

Briscoe, W.L.

1962-02-13

A digital Q meter is described for measuring the Q of mechanical or electrical devices. The meter comprises in combination a transducer coupled to an input amplifier, and an upper and lower level discriminator coupled to the amplifier and having their outputs coupled to an anticoincidence gate. The output of the gate is connected to a scaler. The lower level discriminator is adjusted to a threshold level of 36.8 percent of the operating threshold level of the upper level discriminator. (AEC)

Spatio-Temporal Modelling of Dust Transport over Surface Mining Areas and Neighbouring Residential Zones.

PubMed

Matejicek, Lubos; Janour, Zbynek; Benes, Ludek; Bodnar, Tomas; Gulikova, Eva

2008-06-06

Projects focusing on spatio-temporal modelling of the living environment need to manage a wide range of terrain measurements, existing spatial data, time series, results of spatial analysis and inputs/outputs from numerical simulations. Thus, GISs are often used to manage data from remote sensors, to provide advanced spatial analysis and to integrate numerical models. In order to demonstrate the integration of spatial data, time series and methods in the framework of the GIS, we present a case study focused on the modelling of dust transport over a surface coal mining area, exploring spatial data from 3D laser scanners, GPS measurements, aerial images, time series of meteorological observations, inputs/outputs form numerical models and existing geographic resources. To achieve this, digital terrain models, layers including GPS thematic mapping, and scenes with simulation of wind flows are created to visualize and interpret coal dust transport over the mine area and a neighbouring residential zone. A temporary coal storage and sorting site, located near the residential zone, is one of the dominant sources of emissions. Using numerical simulations, the possible effects of wind flows are observed over the surface, modified by natural objects and man-made obstacles. The coal dust drifts with the wind in the direction of the residential zone and is partially deposited in this area. The simultaneous display of the digital map layers together with the location of the dominant emission source, wind flows and protected areas enables a risk assessment of the dust deposition in the area of interest to be performed. In order to obtain a more accurate simulation of wind flows over the temporary storage and sorting site, 3D laser scanning and GPS thematic mapping are used to create a more detailed digital terrain model. Thus, visualization of wind flows over the area of interest combined with 3D map layers enables the exploration of the processes of coal dust deposition at a local scale. In general, this project could be used as a template for dust-transport modelling which couples spatial data focused on the construction of digital terrain models and thematic mapping with data generated by numerical simulations based on Reynolds averaged Navier-Stokes equations.

Spatio-Temporal Modelling of Dust Transport over Surface Mining Areas and Neighbouring Residential Zones

PubMed Central

Matejicek, Lubos; Janour, Zbynek; Benes, Ludek; Bodnar, Tomas; Gulikova, Eva

2008-01-01

Projects focusing on spatio-temporal modelling of the living environment need to manage a wide range of terrain measurements, existing spatial data, time series, results of spatial analysis and inputs/outputs from numerical simulations. Thus, GISs are often used to manage data from remote sensors, to provide advanced spatial analysis and to integrate numerical models. In order to demonstrate the integration of spatial data, time series and methods in the framework of the GIS, we present a case study focused on the modelling of dust transport over a surface coal mining area, exploring spatial data from 3D laser scanners, GPS measurements, aerial images, time series of meteorological observations, inputs/outputs form numerical models and existing geographic resources. To achieve this, digital terrain models, layers including GPS thematic mapping, and scenes with simulation of wind flows are created to visualize and interpret coal dust transport over the mine area and a neighbouring residential zone. A temporary coal storage and sorting site, located near the residential zone, is one of the dominant sources of emissions. Using numerical simulations, the possible effects of wind flows are observed over the surface, modified by natural objects and man-made obstacles. The coal dust drifts with the wind in the direction of the residential zone and is partially deposited in this area. The simultaneous display of the digital map layers together with the location of the dominant emission source, wind flows and protected areas enables a risk assessment of the dust deposition in the area of interest to be performed. In order to obtain a more accurate simulation of wind flows over the temporary storage and sorting site, 3D laser scanning and GPS thematic mapping are used to create a more detailed digital terrain model. Thus, visualization of wind flows over the area of interest combined with 3D map layers enables the exploration of the processes of coal dust deposition at a local scale. In general, this project could be used as a template for dust-transport modelling which couples spatial data focused on the construction of digital terrain models and thematic mapping with data generated by numerical simulations based on Reynolds averaged Navier-Stokes equations. PMID:27879911

Low cost high efficiency GaAs monolithic RF module for SARSAT distress beacons

NASA Technical Reports Server (NTRS)

Petersen, W. C.; Siu, D. P.; Cook, H. F.

1991-01-01

Low cost high performance (5 Watts output) 406 MHz beacons are urgently needed to realize the maximum utilization of the Search and Rescue Satellite-Aided Tracking (SARSAT) system spearheaded in the U.S. by NASA. Although current technology can produce beacons meeting the output power requirement, power consumption is high due to the low efficiency of available transmitters. Field performance is currently unsatisfactory due to the lack of safe and reliable high density batteries capable of operation at -40 C. Low cost production is also a crucial but elusive requirement for the ultimate wide scale utilization of this system. Microwave Monolithics Incorporated (MMInc.) has proposed to make both the technical and cost goals for the SARSAT beacon attainable by developing a monolithic GaAs chip set for the RF module. This chip set consists of a high efficiency power amplifier and a bi-phase modulator. In addition to implementing the RF module in Monolithic Microwave Integrated Circuit (MMIC) form to minimize ultimate production costs, the power amplifier has a power-added efficiency nearly twice that attained with current commercial technology. A distress beacon built using this RF module chip set will be significantly smaller in size and lighter in weight due to a smaller battery requirement, since the 406 MHz signal source and the digital controller have far lower power consumption compared to the 5 watt power amplifier. All the program tasks have been successfully completed. The GaAs MMIC RF module chip set has been designed to be compatible with the present 406 MHz signal source and digital controller. A complete high performance low cost SARSAT beacon can be realized with only additional minor iteration and systems integration.

A Two-Color Fourier Transform Mm-Wave Spectrometer for Gas Analysis Operating from 260-295 GHZ

NASA Astrophysics Data System (ADS)

Steber, Amanda L.; Harris, Brent J.; Lehmann, Kevin K.; Pate, Brooks H.

2013-06-01

We have designed a two-color mm-wave spectrometer for Fourier transform mm-wave spectroscopy that uses consumer level components for the tunable synthesizers, digital control of the pulse modulators, and digitization of the coherent free induction decay (FID). The excitation pulses are generated using an x24 active multiplier chain (AMC) that produces a peak power of 30 mW. The microwave input to the AMC is generated in a frequency up conversion circuit that accepts a microwave input frequency from about 2-4 GHz. This circuit also generates the input to the mm-wave subhamonic mixer that creates the local oscillator from a separate 2-4 GHz microwave input. Excitation pulses at two independently tunable frequencies are generated using a dual-channel source based on a low-cost, wideband synthesizer integrated circuit (Valon Technology Model 5008). The outputs of the synthesizer are pulse modulated using a PIN diode switch that is driven using the arbitrary waveform generator (AWG) output of a USB-controlled high-speed digitizer / arbitrary waveform generator combination unit (Tie Pie HS-5 530 XM). The two pulses are combined using a Wilkinson power divider before input to the up conversion circuit. The FID frequency is down converted in a two-stage mixing process to 65 MHz. The two LO frequencies used in the receiver are provided by a second Valon 5008. The FID is digitized at 200 MSamples/s using the 12-bit Tie Pie digitizer. The digital oscilloscope (and its AWG channel) and the two synthesizers use a 10 MHz reference signal from a Rubidium clock to permit time-domain signal averaging. A key feature of the digital oscilloscope is its deep memory of 32 Mpts (complemented by the 64 Mpt memory in the 240 MS/s AWG). This makes it possible to perform several one- and two-color coherent measurements, including pulse echoes and double-resonance spectroscopy, in a single "readout" experiment to speed the analysis of mm-wave rotational spectra. The spectrometer sensitivity and frequency accuracy are illustrated by high-speed measurements of OCS rotational transitions for low-abundance isotopes. Examples of pulse echo measurements to determine the collisional relaxation rate and two-color double-resonance measurements to confirm the presence of a molecular species will be illustrated using OCS as the room-temperature gas sample.

Microfluidic Pneumatic Logic Circuits and Digital Pneumatic Microprocessors for Integrated Microfluidic Systems

PubMed Central

Rhee, Minsoung

2010-01-01

We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprecessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner. PMID:19823730

Doppler extraction with a digital VCO

NASA Technical Reports Server (NTRS)

Starner, E. R.; Nossen, E. J.

1977-01-01

Digitally controlled oscillator in phased-locked loop may be useful for data communications systems, or may be modified to serve as information extraction component of microwave or optical system for collision avoidance or automatic braking. Instrument is frequency-synthesizing device with output specified precisely by digital number programmed into frequency register.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Ormsby, John (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing (DSP) functions. Such capability also makes and FPGA a suitable platform for the digital implementation of closed loop controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance in a compact form-factor. Other researchers have presented the notion that a second order digital filter with proportional-integral-derivative (PID) control functionality can be implemented in an FPGA. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSF) devices. Our goal is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. Meeting our goals requires alternative compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching these goals.

Several considerations with respect to the future of digital photography and photographic printing

NASA Astrophysics Data System (ADS)

Tuijn, Chris; Mahy, Marc F.

2000-12-01

Digital cameras are no longer exotic gadgets being used by a privileged group of early adopters. More and more people realize that there are obvious advantages to the digital solution over the conventional film-based workflow. Claiming that prints on paper are no longer necessary in the digit workflow, however, would be similar to reviving the myth of the paperless office. Often, people still like to share their memories on paper and this for a variety of reasons. There are still some hurdles to be taken in order to make the digital dream com true. In this paper, we will give a survey of the different workflows in digital photography. The local, semi-local and Internet solutions will be discussed as well as the preferred output systems for each of these solutions. When discussing output system, we immediately think of appropriate color management solutions. In the second part of this paper, we will discuss the major color management issues appearing in digital photography. A clear separation between the image acquisition and the image rendering phases will be made. After a quick survey of the different image restoration and enhancement techniques, we will make some reflections on the ideal color exchange space; the enhanced image should be delivered in this exchange space and, from there, the standard color management transformations can be applied to transfer the image from this exchange space to the native color space of the output device. We will also discus some color gamut characteristics and color management problems of different types of photographic printers that can occur during this conversion process.

Integrated HIFU Drive System on a Chip for CMUT-Based Catheter Ablation System.

PubMed

Farhanieh, Omid; Sahafi, Ali; Bardhan Roy, Rupak; Ergun, Arif Sanli; Bozkurt, Ayhan

2017-06-01

Conventional High Intensity Focused Ultrasound (HIFU) is a therapeutic modality which is extracorporeally administered. In applications where a relatively small HIFU lesion is required, an intravascular HIFU probe can be deployed to the ablation site. In this paper, we demonstrate the design and implementation a fully integrated HIFU drive system on a chip to be placed on a 6 Fr catheter probe. An 8-element capacitive micromachined ultrasound transducer (CMUT) ring array of 2 mm diameter has been used as the ultrasound source. The driver chip is fabricated in 0.35 μm AMS high-voltage CMOS technology and comprises eight continuous-wave (CW) high-voltage CMUT drivers (10.9 ns and 9.4 ns rise and fall times at 20 V pp output into a 15 pF), an eight-channel digital beamformer (8-12 MHz output frequency with 11.25 ° phase accuracy) and a phase locked loop with an integrated VCO as a tunable clock source (128-192 MHz). The chip occupies 1.85 × 1.8 mm 2 area including input and output (I/O) pads. When the transducer array is immersed in sunflower oil and driven by the IC with eight 20 V pp CW pulses at 10 MHz, real-time thermal images of the HIFU beam indicate that the focal temperature rises by 16.8  ° C in 11 seconds. Each HV driver consumes around 67 mW of power when driving the CMUT array at 10 MHz, which adds up to 560 mW for the whole chip. FEM based analysis reveals that the outer surface temperature of the catheter is expected to remain below the 42  ° C tissue damage limit during therapy.

Digital computer simulation of inductor-energy-storage dc-to-dc converters with closed-loop regulators

NASA Technical Reports Server (NTRS)

Ohri, A. K.; Owen, H. A.; Wilson, T. G.; Rodriguez, G. E.

1974-01-01

The simulation of converter-controller combinations by means of a flexible digital computer program which produces output to a graphic display is discussed. The procedure is an alternative to mathematical analysis of converter systems. The types of computer programming involved in the simulation are described. Schematic diagrams, state equations, and output equations are displayed for four basic forms of inductor-energy-storage dc to dc converters. Mathematical models are developed to show the relationship of the parameters.

An integrated radar model solution for mission level performance and cost trades

NASA Astrophysics Data System (ADS)

Hodge, John; Duncan, Kerron; Zimmerman, Madeline; Drupp, Rob; Manno, Mike; Barrett, Donald; Smith, Amelia

2017-05-01

A fully integrated Mission-Level Radar model is in development as part of a multi-year effort under the Northrop Grumman Mission Systems (NGMS) sector's Model Based Engineering (MBE) initiative to digitally interconnect and unify previously separate performance and cost models. In 2016, an NGMS internal research and development (IR and D) funded multidisciplinary team integrated radio frequency (RF), power, control, size, weight, thermal, and cost models together using a commercial-off-the-shelf software, ModelCenter, for an Active Electronically Scanned Array (AESA) radar system. Each represented model was digitally connected with standard interfaces and unified to allow end-to-end mission system optimization and trade studies. The radar model was then linked to the Air Force's own mission modeling framework (AFSIM). The team first had to identify the necessary models, and with the aid of subject matter experts (SMEs) understand and document the inputs, outputs, and behaviors of the component models. This agile development process and collaboration enabled rapid integration of disparate models and the validation of their combined system performance. This MBE framework will allow NGMS to design systems more efficiently and affordably, optimize architectures, and provide increased value to the customer. The model integrates detailed component models that validate cost and performance at the physics level with high-level models that provide visualization of a platform mission. This connectivity of component to mission models allows hardware and software design solutions to be better optimized to meet mission needs, creating cost-optimal solutions for the customer, while reducing design cycle time through risk mitigation and early validation of design decisions.

Sliding-mode control of single input multiple output DC-DC converter

NASA Astrophysics Data System (ADS)

Zhang, Libo; Sun, Yihan; Luo, Tiejian; Wan, Qiyang

2016-10-01

Various voltage levels are required in the vehicle mounted power system. A conventional solution is to utilize an independent multiple output DC-DC converter whose cost is high and control scheme is complicated. In this paper, we design a novel SIMO DC-DC converter with sliding mode controller. The proposed converter can boost the voltage of a low-voltage input power source to a controllable high-voltage DC bus and middle-voltage output terminals, which endow the converter with characteristics of simple structure, low cost, and convenient control. In addition, the sliding mode control (SMC) technique applied in our converter can enhance the performances of a certain SIMO DC-DC converter topology. The high-voltage DC bus can be regarded as the main power source to the high-voltage facility of the vehicle mounted power system, and the middle-voltage output terminals can supply power to the low-voltage equipment on an automobile. In the respect of control algorithm, it is the first time to propose the SMC-PID (Proportion Integration Differentiation) control algorithm, in which the SMC algorithm is utilized and the PID control is attended to the conventional SMC algorithm. The PID control increases the dynamic ability of the SMC algorithm by establishing the corresponding SMC surface and introducing the attached integral of voltage error, which endow the sliding-control system with excellent dynamic performance. At last, we established the MATLAB/SIMULINK simulation model, tested performance of the system, and built the hardware prototype based on Digital Signal Processor (DSP). Results show that the sliding mode control is able to track a required trajectory, which has robustness against the uncertainties and disturbances.

Sliding-mode control of single input multiple output DC-DC converter.

PubMed

Zhang, Libo; Sun, Yihan; Luo, Tiejian; Wan, Qiyang

2016-10-01

Various voltage levels are required in the vehicle mounted power system. A conventional solution is to utilize an independent multiple output DC-DC converter whose cost is high and control scheme is complicated. In this paper, we design a novel SIMO DC-DC converter with sliding mode controller. The proposed converter can boost the voltage of a low-voltage input power source to a controllable high-voltage DC bus and middle-voltage output terminals, which endow the converter with characteristics of simple structure, low cost, and convenient control. In addition, the sliding mode control (SMC) technique applied in our converter can enhance the performances of a certain SIMO DC-DC converter topology. The high-voltage DC bus can be regarded as the main power source to the high-voltage facility of the vehicle mounted power system, and the middle-voltage output terminals can supply power to the low-voltage equipment on an automobile. In the respect of control algorithm, it is the first time to propose the SMC-PID (Proportion Integration Differentiation) control algorithm, in which the SMC algorithm is utilized and the PID control is attended to the conventional SMC algorithm. The PID control increases the dynamic ability of the SMC algorithm by establishing the corresponding SMC surface and introducing the attached integral of voltage error, which endow the sliding-control system with excellent dynamic performance. At last, we established the MATLAB/SIMULINK simulation model, tested performance of the system, and built the hardware prototype based on Digital Signal Processor (DSP). Results show that the sliding mode control is able to track a required trajectory, which has robustness against the uncertainties and disturbances.

Design and Experimental Verification of a 0.19 V 53 μW 65 nm CMOS Integrated Supply-Sensing Sensor With a Supply-Insensitive Temperature Sensor and an Inductive-Coupling Transmitter for a Self-Powered Bio-sensing System Using a Biofuel Cell.

PubMed

Kobayashi, Atsuki; Ikeda, Kei; Ogawa, Yudai; Kai, Hiroyuki; Nishizawa, Matsuhiko; Nakazato, Kazuo; Niitsu, Kiichi

2017-12-01

In this paper, we present a self-powered bio-sensing system with the capability of proximity inductive-coupling communication for supply sensing and temperature monitoring. The proposed bio-sensing system includes a biofuel cell as a power source and a sensing frontend that is associated with the CMOS integrated supply-sensing sensor. The sensor consists of a digital-based gate leakage timer, a supply-insensitive time-domain temperature sensor, and a current-driven inductive-coupling transmitter and achieves low-voltage operation. The timer converts the output voltage from a biofuel cell to frequency. The temperature sensor provides a pulse width modulation (PWM) output that is not dependent on the supply voltage, and the associated inductive-coupling transmitter enables proximity communication. A test chip was fabricated in 65 nm CMOS technology and consumed 53 μW with a supply voltage of 190 mV. The low-voltage-friendly design satisfied the performance targets of each integrated sensor without any trimming. The chips allowed us to successfully demonstrate proximity communication with an asynchronous receiver, and the measurement results show the potential for self-powered operation using biofuel cells. The analysis and experimental verification of the system confirmed their robustness.

Development of a computer program to obtain ordinates for NACA 4-digit, 4-digit modified, 5-digit, and 16 series airfoils

NASA Technical Reports Server (NTRS)

Ladson, C. L.; Brooks, Cuyler W., Jr.

1975-01-01

A computer program developed to calculate the ordinates and surface slopes of any thickness, symmetrical or cambered NACA airfoil of the 4-digit, 4-digit modified, 5-digit, and 16-series airfoil families is presented. The program produces plots of the airfoil nondimensional ordinates and a punch card output of ordinates in the input format of a readily available program for determining the pressure distributions of arbitrary airfoils in subsonic potential viscous flow.

A battery-free multichannel digital neural/EMG telemetry system for flying insects.

PubMed

Thomas, Stewart J; Harrison, Reid R; Leonardo, Anthony; Reynolds, Matthew S

2012-10-01

This paper presents a digital neural/EMG telemetry system small enough and lightweight enough to permit recording from insects in flight. It has a measured flight package mass of only 38 mg. This system includes a single-chip telemetry integrated circuit (IC) employing RF power harvesting for battery-free operation, with communication via modulated backscatter in the UHF (902-928 MHz) band. An on-chip 11-bit ADC digitizes 10 neural channels with a sampling rate of 26.1 kSps and 4 EMG channels at 1.63 kSps, and telemeters this data wirelessly to a base station. The companion base station transceiver includes an RF transmitter of +36 dBm (4 W) output power to wirelessly power the telemetry IC, and a digital receiver with a sensitivity of -70 dBm for 10⁻⁵ BER at 5.0 Mbps to receive the data stream from the telemetry IC. The telemetry chip was fabricated in a commercial 0.35 μ m 4M1P (4 metal, 1 poly) CMOS process. The die measures 2.36 × 1.88 mm, is 250 μm thick, and is wire bonded into a flex circuit assembly measuring 4.6 × 6.8 mm.

Portable sequential multicolor thermal imager based on a MCT 384 x 288 focal plane array

NASA Astrophysics Data System (ADS)

Breiter, Rainer; Cabanski, Wolfgang A.; Mauk, Karl-Heinz; Rode, Werner; Ziegler, Johann

2001-10-01

AIM has developed a sequential multicolor thermal imager to provide customers with a test system to realize real-time spectral selective thermal imaging. In contrast to existing PC based laboratory units, the system is miniaturized with integrated signal processing like non-uniformity correction and post processing functions such as image subtraction of different colors to allow field tests in military applications like detection of missile plumes or camouflaged targets as well as commercial applications like detection of chemical agents, pollution control, etc. The detection module used is a 384 X 288 mercury cadmium telluride (MCT) focal plane array (FPA) available in the mid wave (MWIR) or long wave spectral band LWIR). A compact command and control electronics (CCE) provides clock and voltage supply for the detector as well as 14 bit deep digital conversion of the analog detector output. A continuous rotating wheel with four facets for filters provides spectral selectivity. The customer can choose between various types of filter characteristics, e.g. a 4.2 micrometer bandpass filter for CO2 detection in the MWIR band. The rotating wheel can be synchronized to an external source giving the rotation speed, typical 25 l/s. A position sensor generates the four frame start signals for synchronous operation of the detector -- 100 Hz framerate for the four frames per rotation. The rotating wheel is exchangeable for different configurations and also plates for a microscanner operation to improve geometrical resolution are available instead of a multicolor operation. AIM's programmable MVIP image processing unit is used for signal processing like non- uniformity correction and controlling the detector parameters. The MVIP allows to output the four subsequent images as four quarters of the video screen to prior to any observation task set the integration time for each color individually for comparable performance in each spectral color and after that also to determine separate NUC coefficients for each filter position. This procedure allows to really evaluate the pay off of spectral selectivity in the IR. The display part of the MVIP allows linear look up tables (LUT) for dynamic reduction as well as histogram equalization for automatic LUT optimization. Parallel to the video output a digital interface is provided for digital recording of the 14 bit corrected detector data. The architecture of the thermal imager with its components is presented in this paper together with some aspects on multicolor thermal imaging.

Software Acquisition Manager’s Workstation (SAM/WS) System Design.

DTIC Science & Technology

1984-04-30

3. Tactical Digital System Requirements ..................... 31General...pspc t14 3. Tactical Digital System Requirements pspc-tiS 3.1 General pspc-t16 3.2 Program Description pspc-t17 3.2.1 General...pspc-t22 3.3.2 Digital Processor Input/Output Utilization Table pspc t23 3.3.3 Digital Processor Interface Block Diagram pspc-t24 3.3.4 Program

Validation of a highly integrated SiPM readout system with a TOF-PET demonstrator

NASA Astrophysics Data System (ADS)

Niknejad, T.; Setayeshi, S.; Tavernier, S.; Bugalho, R.; Ferramacho, L.; Di Francesco, A.; Leong, C.; Rolo, M. D.; Shamshirsaz, M.; Silva, J. C.; Silva, R.; Silveira, M.; Zorraquino, C.; Varela, J.

2016-12-01

We have developed a highly integrated, fast and compact readout electronics for Silicon Photomultiplier (SiPM) based Time of Flight Positron Emission Tomography (TOF-PET) scanners. The readout is based on the use of TOP-PET Application Specific Integrated Circuit (PETsys TOFPET1 ASIC) with 64 channels, each with its amplifier, discriminator, Time to Digital Converter (TDC) and amplitude determination using Time Over Threshold (TOT). The ASIC has 25 ps r.m.s. intrinsic time resolution and fully digital output. The system is optimised for high rates, good timing, low power consumption and low cost. For validating the readout electronics, we have built a technical PET scanner, hereafter called ``demonstrator'', with 2'048 SiPM channels. The PET demonstrator has 16 compact Detector Modules (DM). Each DM has two ASICs reading 128 SiPM pixels in one-to-one coupling to 128 Lutetium Yttrium Orthosilicate (LYSO) crystals measuring 3.1 × 3.1 × 15 mm3 each. The data acquisition system for the demonstrator has two Front End Boards type D (FEB/D), each collecting the data of 1'024 channels (8 DMs), and transmitting assembled data frames through a serial link (4.8 Gbps), to a single Data Acquisition (DAQ) board plugged into the Peripheral Component Interconnect Express (PCIe) bus of the data acquisition PC. Results obtained with this PET demonstrator are presented.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

RF digital-to-analog converter

DOEpatents

Conway, Patrick H.; Yu, David U. L.

1995-01-01

A digital-to analogue converter for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration.

The Mid-Infrared Instrument for the James Webb Space Telescope, VIII: The MIRI Focal Plane System

NASA Astrophysics Data System (ADS)

Ressler, M. E.; Sukhatme, K. G.; Franklin, B. R.; Mahoney, J. C.; Thelen, M. P.; Bouchet, P.; Colbert, J. W.; Cracraft, Misty; Dicken, D.; Gastaud, R.; Goodson, G. B.; Eccleston, Paul; Moreau, V.; Rieke, G. H.; Schneider, Analyn

2015-07-01

We describe the layout and unique features of the focal plane system for MIRI. We begin with the detector array and its readout integrated circuit (combining the amplifier unit cells and the multiplexer), the electronics, and the steps by which the data collection is controlled and the output signals are digitized and delivered to the JWST spacecraft electronics system. We then discuss the operation of this MIRI data system, including detector readout patterns, operation of subarrays, and data formats. Finally, we summarize the performance of the system, including remaining anomalies that need to be corrected in the data pipeline.

Single flux quantum voltage amplifiers

NASA Astrophysics Data System (ADS)

Golomidov, Vladimir; Kaplunenko, Vsevolod; Khabipov, Marat; Koshelets, Valery; Kaplunenko, Olga

The novel elements of the Rapid Single Flux Quantum (RSFQ) logic family — a Quasi Digital Voltage Parallel and Series Amplifiers (QDVA) have been computer simulated, designed and experimentally investigated. The Parallel QDVA consists of six stages and provides multiplication of the input voltage with factor five. The output resistance of the QDVA is five times larger than the input so this amplifier seems to be a good matching stage between RSFQL and usual semiconductor electronics. The series QDVA provides a gain factor four and involves two doublers connected by transmission line. The proposed parallel QDVA can be integrated on the same chip with a SQUID sensor.

Brief communication: Landslide motion from cross correlation of UAV-derived morphological attributes

NASA Astrophysics Data System (ADS)

Peppa, Maria V.; Mills, Jon P.; Moore, Phil; Miller, Pauline E.; Chambers, Jonathan E.

2017-12-01

Unmanned aerial vehicles (UAVs) can provide observations of high spatio-temporal resolution to enable operational landslide monitoring. In this research, the construction of digital elevation models (DEMs) and orthomosaics from UAV imagery is achieved using structure-from-motion (SfM) photogrammetric procedures. The study examines the additional value that the morphological attribute of openness, amongst others, can provide to surface deformation analysis. Image-cross-correlation functions and DEM subtraction techniques are applied to the SfM outputs. Through the proposed integrated analysis, the automated quantification of a landslide's motion over time is demonstrated, with implications for the wider interpretation of landslide kinematics via UAV surveys.

Method for acquiring, storing and analyzing crystal images

NASA Technical Reports Server (NTRS)

Gester, Thomas E. (Inventor); Rosenblum, William M. (Inventor); Christopher, Gayle K. (Inventor); Hamrick, David T. (Inventor); Delucas, Lawrence J. (Inventor); Tillotson, Brian (Inventor)

2003-01-01

A system utilizing a digital computer for acquiring, storing and evaluating crystal images. The system includes a video camera (12) which produces a digital output signal representative of a crystal specimen positioned within its focal window (16). The digitized output from the camera (12) is then stored on data storage media (32) together with other parameters inputted by a technician and relevant to the crystal specimen. Preferably, the digitized images are stored on removable media (32) while the parameters for different crystal specimens are maintained in a database (40) with indices to the digitized optical images on the other data storage media (32). Computer software is then utilized to identify not only the presence and number of crystals and the edges of the crystal specimens from the optical image, but to also rate the crystal specimens by various parameters, such as edge straightness, polygon formation, aspect ratio, surface clarity, crystal cracks and other defects or lack thereof, and other parameters relevant to the quality of the crystals.

Accelerometer method and apparatus for integral display and control functions

NASA Astrophysics Data System (ADS)

Bozeman, Richard J., Jr.

1992-06-01

Vibration analysis has been used for years to provide a determination of the proper functioning of different types of machinery, including rotating machinery and rocket engines. A determination of a malfunction, if detected at a relatively early stage in its development, will allow changes in operating mode or a sequenced shutdown of the machinery prior to a total failure. Such preventative measures result in less extensive and/or less expensive repairs, and can also prevent a sometimes catastrophic failure of equipment. Standard vibration analyzers are generally rather complex, expensive, and of limited portability. They also usually result in displays and controls being located remotely from the machinery being monitored. Consequently, a need exists for improvements in accelerometer electronic display and control functions which are more suitable for operation directly on machines and which are not so expensive and complex. The invention includes methods and apparatus for detecting mechanical vibrations and outputting a signal in response thereto. The apparatus includes an accelerometer package having integral display and control functions. The accelerometer package is suitable for mounting upon the machinery to be monitored. Display circuitry provides signals to a bar graph display which may be used to monitor machine condition over a period of time. Control switches may be set which correspond to elements in the bar graph to provide an alert if vibration signals increase over the selected trip point. The circuitry is shock mounted within the accelerometer housing. The method provides for outputting a broadband analog accelerometer signal, integrating this signal to produce a velocity signal, integrating and calibrating the velocity signal before application to a display driver, and selecting a trip point at which a digitally compatible output signal is generated. The benefits of a vibration recording and monitoring system with controls and displays readily mountable on the machinery being monitored and having capabilities described will be appreciated by those working in the art.

Accelerometer method and apparatus for integral display and control functions

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1992-01-01

Vibration analysis has been used for years to provide a determination of the proper functioning of different types of machinery, including rotating machinery and rocket engines. A determination of a malfunction, if detected at a relatively early stage in its development, will allow changes in operating mode or a sequenced shutdown of the machinery prior to a total failure. Such preventative measures result in less extensive and/or less expensive repairs, and can also prevent a sometimes catastrophic failure of equipment. Standard vibration analyzers are generally rather complex, expensive, and of limited portability. They also usually result in displays and controls being located remotely from the machinery being monitored. Consequently, a need exists for improvements in accelerometer electronic display and control functions which are more suitable for operation directly on machines and which are not so expensive and complex. The invention includes methods and apparatus for detecting mechanical vibrations and outputting a signal in response thereto. The apparatus includes an accelerometer package having integral display and control functions. The accelerometer package is suitable for mounting upon the machinery to be monitored. Display circuitry provides signals to a bar graph display which may be used to monitor machine condition over a period of time. Control switches may be set which correspond to elements in the bar graph to provide an alert if vibration signals increase over the selected trip point. The circuitry is shock mounted within the accelerometer housing. The method provides for outputting a broadband analog accelerometer signal, integrating this signal to produce a velocity signal, integrating and calibrating the velocity signal before application to a display driver, and selecting a trip point at which a digitally compatible output signal is generated. The benefits of a vibration recording and monitoring system with controls and displays readily mountable on the machinery being monitored and having capabilities described will be appreciated by those working in the art.

Interpolator for numerically controlled machine tools

DOEpatents

Bowers, Gary L.; Davenport, Clyde M.; Stephens, Albert E.

1976-01-01

A digital differential analyzer circuit is provided that depending on the embodiment chosen can carry out linear, parabolic, circular or cubic interpolation. In the embodiment for parabolic interpolations, the circuit provides pulse trains for the X and Y slide motors of a two-axis machine to effect tool motion along a parabolic path. The pulse trains are generated by the circuit in such a way that parabolic tool motion is obtained from information contained in only one block of binary input data. A part contour may be approximated by one or more parabolic arcs. Acceleration and initial velocity values from a data block are set in fixed bit size registers for each axis separately but simultaneously and the values are integrated to obtain the movement along the respective axis as a function of time. Integration is performed by continual addition at a specified rate of an integrand value stored in one register to the remainder temporarily stored in another identical size register. Overflows from the addition process are indicative of the integral. The overflow output pulses from the second integration may be applied to motors which position the respective machine slides according to a parabolic motion in time to produce a parabolic machine tool motion in space. An additional register for each axis is provided in the circuit to allow "floating" of the radix points of the integrand registers and the velocity increment to improve position accuracy and to reduce errors encountered when the acceleration integrand magnitudes are small when compared to the velocity integrands. A divider circuit is provided in the output of the circuit to smooth the output pulse spacing and prevent motor stall, because the overflow pulses produced in the binary addition process are spaced unevenly in time. The divider has the effect of passing only every nth motor drive pulse, with n being specifiable. The circuit inputs (integrands, rates, etc.) are scaled to give exactly n times the desired number of pulses out, in order to compensate for the divider.

3rd-generation MW/LWIR sensor engine for advanced tactical systems

NASA Astrophysics Data System (ADS)

King, Donald F.; Graham, Jason S.; Kennedy, Adam M.; Mullins, Richard N.; McQuitty, Jeffrey C.; Radford, William A.; Kostrzewa, Thomas J.; Patten, Elizabeth A.; McEwan, Thomas F.; Vodicka, James G.; Wootan, John J.

2008-04-01

Raytheon has developed a 3rd-Generation FLIR Sensor Engine (3GFSE) for advanced U.S. Army systems. The sensor engine is based around a compact, productized detector-dewar assembly incorporating a 640 x 480 staring dual-band (MW/LWIR) focal plane array (FPA) and a dual-aperture coldshield mechanism. The capability to switch the coldshield aperture and operate at either of two widely-varying f/#s will enable future multi-mode tactical systems to more fully exploit the many operational advantages offered by dual-band FPAs. RVS has previously demonstrated high-performance dual-band MW/LWIR FPAs in 640 x 480 and 1280 x 720 formats with 20 μm pitch. The 3GFSE includes compact electronics that operate the dual-band FPA and variable-aperture mechanism, and perform 14-bit analog-to-digital conversion of the FPA output video. Digital signal processing electronics perform "fixed" two-point non-uniformity correction (NUC) of the video from both bands and optional dynamic scene-based NUC; advanced enhancement processing of the output video is also supported. The dewar-electronics assembly measures approximately 4.75 x 2.25 x 1.75 inches. A compact, high-performance linear cooler and cooler electronics module provide the necessary FPA cooling over a military environmental temperature range. 3GFSE units are currently being assembled and integrated at RVS, with the first units planned for delivery to the US Army.

Demodulator electronics for laser vibrometry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dudzik, G.; Waz, A. T.; Kaczmarek, P. R.

2012-06-13

One of the most important parts of a fiber-laser vibrometer is demodulation electronic section. The distortion, nonlinearity, offset and added noise of measured signal come from electronic circuits and they have direct influence on finale measuring results. Two main parameters of an investigated vibrating object: velocity V(t) and displacement s(t), influence of detected beat signals. They are: the Doppler frequency deviation f(t) and phase shift {phi}(t), respectively. Because of wide range of deviations it is difficult to use just one demodulator. That is the reason why we use three different types of demodulators. The first one is the IQ demodulator,more » which is the most sensitive one and its output is proportional to the displacement. Each IQ channel is sampled simultaneously by an analog to digital converter (ADC) integrated in a digital signal processor (DSP). The output signals from the two FM demodulators are proportional to the frequency deviation of heterodyne signals. They are sensitive directly to the velocity of the object. The main disadvantage of scattered light interferometry system is a ''speckle effect'', appearing in relatively large amplitude fluctuation of a heterodyne signal. To minimize ''speckle effect'' influence on quality of beat signals we applied the automatic gain control (AGC) system. Data acquisition, further signal processing (e.g. vibration frequency spectra) and presentation of results is realized by PC via USB interface.« less

Anomalous TWTA output power spikes and their effect on a digital satellite communications system

NASA Technical Reports Server (NTRS)

May, Brian D.; Kerczewski, Robert J.; Svoboda, James S.

1992-01-01

Several 30 GHz, 60 W traveling wave tube amplifiers (TWTA) were manufactured for the NASA Lewis Research Center's High Burst Rate Link Evaluation Terminal Project. An unusual operating problem characterized by anomalous nonperiodic output power spikes, common to all of the TWTAs proved during testing to significantly affect the performance of a digitally-modulated data transmission test system. Modifications made to the TWTAs significantly curtailed the problem and allowed acceptable system performance to be obtained. This paper presents a discussion of the TWTA output power spike problem, possible causes of the problem, and the solutions implemented by the manufacturer which improved the TWTA performance to an acceptable level. The results of the testing done at NASA Lewis on the TWTAs both before and after the improvement made by Hughes are presented, and the effects of the output power spikes on the performance of the test system are discussed.

Effects of Speech Output on Maintenance of Requesting and Frequency of Vocalizations in Three Children with Developmental Disabilities.

PubMed

Sigafoos, Jeff; Didden, Robert; O'Reilly, Mark

2003-01-01

We evaluated the role of digitized speech output on the maintenance of requesting and frequency of vocalizations in three children with developmental disabilities. The children were taught to request access to preferred objects using an augmentative communication speech-generating device (SGD). Following acquisition, rates of requesting and vocalizations were compared across two conditions (speech output on versus speech output off) that were alternated on a session-by-session basis. There were no major or consistent differences across the two conditions for the three children, suggesting that access to preferred objects was the critical variable maintaining use of the SGDs. The results also suggest that feedback in the form of digitized speech from the SGD did not inhibit vocalizations. One child began to speak single words during the latter part of the study, suggesting that in some cases AAC intervention involving SGDs may facilitate speech.

A memory-mapped output interface: Omega navigation output data from the JOLT (TM) microcomputer

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1976-01-01

A hardware interface which allows both digital and analog data output from the JOLT microcomputer is described in the context of a software-based Omega Navigation receiver. The interface hardware described is designed for output of six (or eight with simple extensions) bits of binary output in response to a memory store command from the microcomputer. The interface was produced in breadboard form and is operational as an evaluation aid for the software Omega receiver.

Fast Offset Laser Phase-Locking System

NASA Technical Reports Server (NTRS)

Shaddock, Daniel; Ware, Brent

2008-01-01

Figure 1 shows a simplified block diagram of an improved optoelectronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications. The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in High-Accuracy, High-Dynamic-Range Phase-Measurement System (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output. The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode-output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.

Multifunction audio digitizer for communications systems

NASA Technical Reports Server (NTRS)

Monford, L. G., Jr.

1971-01-01

Digitizer accomplishes both N bit pulse code modulation /PCM/ and delta modulation, and provides modulation indicating variable signal gain and variable sidetone. Other features include - low package count, variable clock rate to optimize bandwidth, and easily expanded PCM output.

Data recording and playback on video tape--a multi-channel analog interface for a digital audio processor system.

PubMed

Blaettler, M; Bruegger, A; Forster, I C; Lehareinger, Y

1988-03-01

The design of an analog interface to a digital audio signal processor (DASP)-video cassette recorder (VCR) system is described. The complete system represents a low-cost alternative to both FM instrumentation tape recorders and multi-channel chart recorders. The interface or DASP input-output unit described in this paper enables the recording and playback of up to 12 analog channels with a maximum of 12 bit resolution and a bandwidth of 2 kHz per channel. Internal control and timing in the recording component of the interface is performed using ROMs which can be reprogrammed to suit different analog-to-digital converter hardware. Improvement in the bandwidth specifications is possible by connecting channels in parallel. A parallel 16 bit data output port is provided for direct transfer of the digitized data to a computer.

Life sciences flight experiments microcomputer

NASA Technical Reports Server (NTRS)

Bartram, Peter N.

1987-01-01

A promising microcomputer configuration for the Spacelab Life Sciences Lab. Equipment inventory consists of multiple processors. One processor's use is reserved, with additional processors dedicated to real time input and output operations. A simple form of such a configuration, with a processor board for analog to digital conversion and another processor board for digital to analog conversion, was studied. The system used digital parallel data lines between the boards, operating independently of the system bus. Good performance of individual components was demonstrated: the analog to digital converter was at over 10,000 samples per second. The combination of the data transfer between boards with the input or output functions on each board slowed performance, with a maximum throughput of 2800 to 2900 analog samples per second. Any of several techniques, such as use of the system bus for data transfer or the addition of direct memory access hardware to the processor boards, should give significantly improved performance.

Experimental demonstration of a real-time high-throughput digital DC blocker for compensating ADC imperfections in optical fast-OFDM receivers.

PubMed

Zhang, Lu; Ouyang, Xing; Shao, Xiaopeng; Zhao, Jian

2016-06-27

Performance degradation induced by the DC components at the output of real-time analogue-to-digital converter (ADC) is experimentally investigated for optical fast-OFDM receiver. To compensate this degradation, register transfer level (RTL) circuits for real-time digital DC blocker with 20GS/s throughput are proposed and implemented in field programmable gate array (FPGA). The performance of the proposed real-time digital DC blocker is experimentally investigated in a 15Gb/s optical fast-OFDM system with intensity modulation and direct detection over 40 km standard single-mode fibre. The results show that the fixed-point DC blocker has negligible performance penalty compared to the offline floating point one, and can overcome the error floor of the fast OFDM receiver caused by the DC components from the real-time ADC output.

Demodulator for carrier transducers

NASA Technical Reports Server (NTRS)

Roller, R. F. (Inventor)

1974-01-01

A carrier type transducer is supplied with a carrier wave via an audio amplifier, a filter, a frequency divider, and an oscillator. The carrier is modulated in accordance with the parameter being measured by the transducer and is fed to the input of a digital data system which may include a voltmeter. The output of the oscillator and the output of each stage of the divider are fed to an AND or a NAND gate and suitable variable and fixed delay circuits to the command input of the digital data system. With this arrangement, the digital data system is commanded to sample at the proper time so that the average voltage of the modulated carrier is measured. It may be utilized with ancillary circuitry for control of the parameter

RF digital-to-analog converter

DOEpatents

Conway, P.H.; Yu, D.U.L.

1995-02-28

A digital-to-analog converter is disclosed for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration. 18 figs.

Digital-Difference Processing For Collision Avoidance.

NASA Technical Reports Server (NTRS)

Shores, Paul; Lichtenberg, Chris; Kobayashi, Herbert S.; Cunningham, Allen R.

1988-01-01

Digital system for automotive crash avoidance measures and displays difference in frequency between two sinusoidal input signals of slightly different frequencies. Designed for use with Doppler radars. Characterized as digital mixer coupled to frequency counter measuring difference frequency in mixer output. Technique determines target path mathematically. Used for tracking cars, missiles, bullets, baseballs, and other fast-moving objects.

2017 Guralp Affinity Digitizer Evaluation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Merchant, Bion J.

Sandia National Laboratories has tested and evaluated two Guralp Affinity digitizers. The Affinity digitizers are intended to record sensor output for seismic and infrasound monitoring applications. The purpose of this digitizer evaluation is to measure the performance characteristics in such areas as power consumption, input impedance, sensitivity, full scale, self- noise, dynamic range, system noise, response, passband, and timing. The Affinity digitizers are being evaluated for potential use in the International Monitoring System (IMS) of the Comprehensive Nuclear Test-Ban-Treaty Organization (CTBTO).

Electro-optical imaging systems integration

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wight, R.

1987-01-01

Since the advent of high resolution, high data rate electronic sensors for military aircraft, the demands on their counterpart, the image generator hard copy output system, have increased dramatically. This has included support of direct overflight and standoff reconnaissance systems and often has required operation within a military shelter or van. The Tactical Laser Beam Recorder (TLBR) design has met the challenge each time. A third generation (TLBR) was designed and two units delivered to rapidly produce high quality wet process imagery on 5-inch film from a 5-sensor digital image signal input. A modular, in-line wet film processor is includedmore » in the total TLBR (W) system. The system features a rugged optical and transport package that requires virtually no alignment or maintenance. It has a ''Scan FIX'' capability which corrects for scanner fault errors and ''Scan LOC'' system which provides for complete phase synchronism isolation between scanner and digital image data input via strobed, 2-line digital buffers. Electronic gamma adjustment automatically compensates for variable film processing time as the film speed changes to track the sensor. This paper describes the fourth meeting of that challenge, the High Resolution Laser Beam Recorder (HRLBR) for Reconnaissance/Tactical applications.« less

Preparing images for publication: part 1.

PubMed

Devigus, Alessandro; Paul, Stefan

2006-04-01

Images play a vital role in the publication and presentation of clinical and scientific work. Within clinical photography, color reproduction has always been a contentious issue. With the development of new technologies, the variables affecting color reproduction have changed, and photographers have moved away from film-based to digital photographic imaging systems. To develop an understanding of color, knowledge about the basic principles of light and vision is important. An object's color is determined by which wavelengths of light it reflects. Colors of light and colors of pigment behave differently. Due to technical limitations, monitors and printers are unable to reproduce all the colors we can see with our eyes, also called the LAB color space. In order to optimize the output of digital clinical images, color management solutions need to be integrated in the photographic workflow; however, their use is still limited in the medical field. As described in part 2 of this article, calibrating your computer monitor and using an 18% gray background card are easy ways to enable more consistent color reproduction for publication. In addition, some basic information about the various camera settings is given to facilitate the use of this new digital equipment in daily practice.

Implement an adjustable delay time digital trigger for an NI data acquisition card in a high-speed demodulation system

NASA Astrophysics Data System (ADS)

Zhang, Hongtao; Fan, Lingling; Wang, Pengfei; Park, Seong-Wook

2012-06-01

A National Instruments (NI) DAQ card PCI 5105 is installed in a high-speed demodulation system based on Fiber Fabry-Pérot Tunable Filter. The instability of the spectra of Fiber Bragg Grating sensors caused by intrinsic drifts of FFP-TF needs an appropriate, flexible trigger. However, the driver of the DAQ card in the current development environment does not provide the functions of analog trigger but digital trigger type. Moreover, the high level of the trigger signal from the tuning voltage of FFP-TF is larger than the maximum input overload voltage of PCI 5105 card. To resolve this incompatibility, a novel converter to change an analog trigger signal into a digital trigger signal has been reported previously. However, the obvious delay time between input and output signals limits the function of demodulation system. Accordingly, we report an improved low-cost, small-size converter with an adjustable delay time. This new scheme can decline the delay time to or close to zero when the frequency of trigger signal is less than 3,000 Hz. This method might be employed to resolve similar problems or to be applied in semiconductor integrated circuits.

Scalable Multiprocessor for High-Speed Computing in Space

NASA Technical Reports Server (NTRS)

Lux, James; Lang, Minh; Nishimoto, Kouji; Clark, Douglas; Stosic, Dorothy; Bachmann, Alex; Wilkinson, William; Steffke, Richard

2004-01-01

A report discusses the continuing development of a scalable multiprocessor computing system for hard real-time applications aboard a spacecraft. "Hard realtime applications" signifies applications, like real-time radar signal processing, in which the data to be processed are generated at "hundreds" of pulses per second, each pulse "requiring" millions of arithmetic operations. In these applications, the digital processors must be tightly integrated with analog instrumentation (e.g., radar equipment), and data input/output must be synchronized with analog instrumentation, controlled to within fractions of a microsecond. The scalable multiprocessor is a cluster of identical commercial-off-the-shelf generic DSP (digital-signal-processing) computers plus generic interface circuits, including analog-to-digital converters, all controlled by software. The processors are computers interconnected by high-speed serial links. Performance can be increased by adding hardware modules and correspondingly modifying the software. Work is distributed among the processors in a parallel or pipeline fashion by means of a flexible master/slave control and timing scheme. Each processor operates under its own local clock; synchronization is achieved by broadcasting master time signals to all the processors, which compute offsets between the master clock and their local clocks.

A case study for the real-time experimental evaluation of the VIPER microprocessor

NASA Astrophysics Data System (ADS)

Carreno, Victor A.; Angellatta, Rob K.

1991-09-01

An experiment to evaluate the applicability of the Verifiable Integrated Processor for Enhanced Reliability (VIPER) microprocessor to real time control is described. The VIPER microprocessor was invented by the Royal Signals and Radar Establishment (RSRE), U.K., and is an example of the use of formal mathematical methods for developing electronic digital systems with a high degree of assurance on the system design and implementation correctness. The experiment consisted of selecting a control law, writing the control law algorithm for the VIPER processor, and providing real time, dynamic inputs into the processor and monitoring the outputs. The control law selected and coded for the VIPER processor was the yaw damper function of an automatic landing program for a 737 aircraft. The mechanisms for interfacing the VIPER Single Board Computer to the VAX host are described. Results include run time experiences, performance evaluation, and comparison of VIPER and FORTRAN yaw damper algorithm output for accuracy estimation.

A case study for the real-time experimental evaluation of the VIPER microprocessor

NASA Technical Reports Server (NTRS)

Carreno, Victor A.; Angellatta, Rob K.

1991-01-01

An experiment to evaluate the applicability of the Verifiable Integrated Processor for Enhanced Reliability (VIPER) microprocessor to real time control is described. The VIPER microprocessor was invented by the Royal Signals and Radar Establishment (RSRE), U.K., and is an example of the use of formal mathematical methods for developing electronic digital systems with a high degree of assurance on the system design and implementation correctness. The experiment consisted of selecting a control law, writing the control law algorithm for the VIPER processor, and providing real time, dynamic inputs into the processor and monitoring the outputs. The control law selected and coded for the VIPER processor was the yaw damper function of an automatic landing program for a 737 aircraft. The mechanisms for interfacing the VIPER Single Board Computer to the VAX host are described. Results include run time experiences, performance evaluation, and comparison of VIPER and FORTRAN yaw damper algorithm output for accuracy estimation.

BAO Plate Archive Project

NASA Astrophysics Data System (ADS)

Mickaelian, A. M.; Gigoyan, K. S.; Gyulzadyan, M. V.; Paronyan, G. M.; Abrahamyan, H. V.; Andreasyan, H. R.; Azatyan, N. M.; Kostandyan, G. R.; Samsonyan, A. L.; Mikayelyan, G. A.; Farmanyan, S. V.; Harutyunyan, V. L.

2017-12-01

We present the Byurakan Astrophysical Observatory (BAO) Plate Archive Project that is aimed at digitization, extraction and analysis of archival data and building an electronic database and interactive sky map. BAO Plate Archive consists of 37,500 photographic plates and films, obtained with 2.6m telescope, 1m and 0.5m Schmidt telescopes and other smaller ones during 1947-1991. The famous Markarian Survey (or the First Byurakan Survey, FBS) 2000 plates were digitized in 2002-2005 and the Digitized FBS (DFBS, www.aras.am/Dfbs/dfbs.html) was created. New science projects have been conducted based on this low-dispersion spectroscopic material. Several other smaller digitization projects have been carried out as well, such as part of Second Byurakan Survey (SBS) plates, photographic chain plates in Coma, where the blazar ON 231 is located and 2.6m film spectra of FBS Blue Stellar Objects. However, most of the plates and films are not digitized. In 2015, we have started a project on the whole BAO Plate Archive digitization, creation of electronic database and its scientific usage. Armenian Virtual Observatory (ArVO, www.aras.am/Arvo/arvo.htm) database will accommodate all new data. The project runs in collaboration with the Armenian Institute of Informatics and Automation Problems (IIAP) and will continues during 4 years in 2015-2018. The final result will be an Electronic Database and online Interactive Sky map to be used for further research projects. ArVO will provide all standards and tools for efficient usage of the scientific output and its integration in international databases.

A Channelization-Based DOA Estimation Method for Wideband Signals

PubMed Central

Guo, Rui; Zhang, Yue; Lin, Qianqiang; Chen, Zengping

2016-01-01

In this paper, we propose a novel direction of arrival (DOA) estimation method for wideband signals with sensor arrays. The proposed method splits the wideband array output into multiple frequency sub-channels and estimates the signal parameters using a digital channelization receiver. Based on the output sub-channels, a channelization-based incoherent signal subspace method (Channelization-ISM) and a channelization-based test of orthogonality of projected subspaces method (Channelization-TOPS) are proposed. Channelization-ISM applies narrowband signal subspace methods on each sub-channel independently. Then the arithmetic mean or geometric mean of the estimated DOAs from each sub-channel gives the final result. Channelization-TOPS measures the orthogonality between the signal and the noise subspaces of the output sub-channels to estimate DOAs. The proposed channelization-based method isolates signals in different bandwidths reasonably and improves the output SNR. It outperforms the conventional ISM and TOPS methods on estimation accuracy and dynamic range, especially in real environments. Besides, the parallel processing architecture makes it easy to implement on hardware. A wideband digital array radar (DAR) using direct wideband radio frequency (RF) digitization is presented. Experiments carried out in a microwave anechoic chamber with the wideband DAR are presented to demonstrate the performance. The results verify the effectiveness of the proposed method. PMID:27384566

Design of DSP-based high-power digital solar array simulator

NASA Astrophysics Data System (ADS)

Zhang, Yang; Liu, Zhilong; Tong, Weichao; Feng, Jian; Ji, Yibo

2013-12-01

To satisfy rigid performance specifications, a feedback control was presented for zoom optical lens plants. With the increasing of global energy consumption, research of the photovoltaic(PV) systems get more and more attention. Research of the digital high-power solar array simulator provides technical support for high-power grid-connected PV systems research.This paper introduces a design scheme of the high-power digital solar array simulator based on TMS320F28335. A DC-DC full-bridge topology was used in the system's main circuit. The switching frequency of IGBT is 25kHz.Maximum output voltage is 900V. Maximum output current is 20A. Simulator can be pre-stored solar panel IV curves.The curve is composed of 128 discrete points .When the system was running, the main circuit voltage and current values was feedback to the DSP by the voltage and current sensors in real-time. Through incremental PI,DSP control the simulator in the closed-loop control system. Experimental data show that Simulator output voltage and current follow a preset solar panels IV curve. In connection with the formation of high-power inverter, the system becomes gridconnected PV system. The inverter can find the simulator's maximum power point and the output power can be stabilized at the maximum power point (MPP).

Ku-band high efficiency GaAs MMIC power amplifiers

NASA Technical Reports Server (NTRS)

Tserng, H. Q.; Witkowski, L. C.; Wurtele, M.; Saunier, Paul

1988-01-01

The development of Ku-band high efficiency GaAs MMIC power amplifiers is examined. Three amplifier modules operating over the 13 to 15 GHz frequency range are to be developed. The first MMIC is a 1 W variable power amplifier (VPA) with 35 percent efficiency. On-chip digital gain control is to be provided. The second MMIC is a medium power amplifier (MPA) with an output power goal of 1 W and 40 percent power-added efficiency. The third MMIC is a high power amplifier (HPA) with 4 W output power goal and 40 percent power-added efficiency. An output power of 0.36 W/mm with 49 percent efficiency was obtained on an ion implanted single gate MESFET at 15 GHz. On a dual gate MESFET, an output power of 0.42 W/mm with 27 percent efficiency was obtained. A mask set was designed that includes single stage, two stage, and three stage single gate amplifiers. A single stage 600 micron amplifier produced 0.4 W/mm output power with 40 percent efficiency at 14 GHz. A four stage dual gate amplifier generated 500 mW of output power with 20 dB gain at 17 GHz. A four-bit digital-to-analog converter was designed and fabricated which has an output swing of -3 V to +/- 1 V.

FPGA-Based Optical Cavity Phase Stabilization for Coherent Pulse Stacking

DOE PAGES

Xu, Yilun; Wilcox, Russell; Byrd, John; ...

2017-11-20

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. We develop a robust, scalable, and distributed digital control system with firmware and software integration for algorithms, to support the CPS application. We model CPS as a digital filter in the Z domain and implement a pulse-pattern-based cavity phase detection algorithm on an field-programmable gate array (FPGA). A two-stage (2+1 cavities) 15-pulse stacking system achieves an 11.0 peak-power enhancement factor. Each optical cavity is fed back at 1.5kHz, and stabilized at anmore » individually-prescribed round-trip phase with 0.7deg and 2.1deg rms phase errors for Stages 1 and 2, respectively. Optical cavity phase control with nanometer accuracy ensures 1.2% intensity stability of the stacked pulse over 12 h. The FPGA-based feedback control system can be scaled to large numbers of optical cavities.« less

CMOS direct time interval measurement of long-lived luminescence lifetimes.

PubMed

Yao, Lei; Yung, Ka Yi; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

2011-01-01

We describe a Complementary Metal-Oxide Semiconductor (CMOS) Direct Time Interval Measurement (DTIM) Integrated Circuit (IC) to detect the decay (fall) time of the luminescence emission when analyte-sensitive luminophores are excited with an optical pulse. The CMOS DTIM IC includes 14 × 14 phototransistor array, transimpedance amplifier, regulated gain amplifier, fall time detector, and time-to-digital convertor. We examined the DTIM system to measure the emission lifetime of oxygen-sensitive luminophores tris(4,7-diphenyl-1, 10-phenanthroline) ruthenium(II) ([Ru(dpp)(3)](2+)) encapsulated in sol-gel derived xerogel thin-films. The DTIM system fabricated using TSMC 0.35 μm process functions to detect lifetimes from 4 μs to 14.4 μs but can be tuned to detect longer lifetimes. The system provides 8-bit digital output proportional to lifetimes and consumes 4.5 mW of power with 3.3 V DC supply. The CMOS system provides a useful platform for the development of reliable, robust, and miniaturized optical chemical sensors.

Emergency Control Aircraft System Using Thrust Modulation

NASA Technical Reports Server (NTRS)

Burken, John J. (Inventor); Burcham, Frank W., Jr. (Inventor)

2000-01-01

A digital longitudinal Aircraft Propulsion Control (APC system of a multiengine aircraft is provided by engine thrust modulation in response to comparing an input flightpath angle signal (gamma)c from a pilot thumbwheel. or an ILS system with a sensed flightpath angle y to produce an error signal (gamma)e that is then integrated (with reasonable limits) to generate a drift correction signal to be added to the error signal (gamma)e after first subtracting a lowpass filtered velocity signal Vel(sub f) for phugoid damping. The output error signal is multiplied by a constant to produce an aircraft thrust control signal ATC of suitable amplitude to drive a throttle servo for all engines. each of which includes its own full-authority digital engine control (FADEC) computer. An alternative APC system omits sensed flightpath angle feedback and instead controls the flightpath angle by feedback of the lowpass filtered velocity signal Vel(sub f) which also inherently provides phugoid damping. The feature of drift compensation is retained.

Development of a high-resolution automatic digital (urine/electrolytes) flow volume and rate measurement system of miniature size

NASA Technical Reports Server (NTRS)

Liu, F. F.

1975-01-01

To aid in the quantitative analysis of man's physiological rhythms, a flowmeter to measure circadian patterns of electrolyte excretion during various environmental stresses was developed. One initial flowmeter was designed and fabricated, the sensor of which is the approximate size of a wristwatch. The detector section includes a special type of dielectric integrating type sensor which automatically controls, activates, and deactivates the flow sensor data output by determining the presence or absence of fluid flow in the system, including operation under zero-G conditions. The detector also provides qualitative data on the composition of the fluid. A compact electronic system was developed to indicate flow rate as well as total volume per release or the cumulative volume of several releases in digital/analog forms suitable for readout or telemetry. A suitable data readout instrument is also provided. Calibration and statistical analyses of the performance functions required of the flowmeter were also conducted.

Time-to-digital converter card for multichannel time-resolved single-photon counting applications

NASA Astrophysics Data System (ADS)

Tamborini, Davide; Portaluppi, Davide; Tisa, Simone; Tosi, Alberto

2015-03-01

We present a high performance Time-to-Digital Converter (TDC) card that provides 10 ps timing resolution and 20 ps (rms) timing precision with a programmable full-scale-range from 160 ns to 10 μs. Differential Non-Linearity (DNL) is better than 1.3% LSB (rms) and Integral Non-Linearity (INL) is 5 ps rms. Thanks to the low power consumption (400 mW) and the compact size (78 mm x 28 mm x 10 mm), this card is the building block for developing compact multichannel time-resolved instrumentation for Time-Correlated Single-Photon Counting (TCSPC). The TDC-card outputs the time measurement results together with the rates of START and STOP signals and the number of valid TDC conversions. These additional information are needed by many TCSPC-based applications, such as: Fluorescence Lifetime Imaging (FLIM), Time-of-Flight (TOF) ranging measurements, time-resolved Positron Emission Tomography (PET), single-molecule spectroscopy, Fluorescence Correlation Spectroscopy (FCS), Diffuse Optical Tomography (DOT), Optical Time-Domain Reflectometry (OTDR), quantum optics, etc.

FPGA-Based Optical Cavity Phase Stabilization for Coherent Pulse Stacking

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu, Yilun; Wilcox, Russell; Byrd, John

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. We develop a robust, scalable, and distributed digital control system with firmware and software integration for algorithms, to support the CPS application. We model CPS as a digital filter in the Z domain and implement a pulse-pattern-based cavity phase detection algorithm on an field-programmable gate array (FPGA). A two-stage (2+1 cavities) 15-pulse stacking system achieves an 11.0 peak-power enhancement factor. Each optical cavity is fed back at 1.5kHz, and stabilized at anmore » individually-prescribed round-trip phase with 0.7deg and 2.1deg rms phase errors for Stages 1 and 2, respectively. Optical cavity phase control with nanometer accuracy ensures 1.2% intensity stability of the stacked pulse over 12 h. The FPGA-based feedback control system can be scaled to large numbers of optical cavities.« less

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Montenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of Field Programmable Gate Arrays (FPGA's) in the hardware implementation of fast digital signal processing functions. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used Proportional-Integral-Derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a Digital Signal Processor (DSP) device or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using DSP devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, Pulse Width Modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacemap. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive-control algorithm approaches. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Digital frequency offset-locked He–Ne laser system with high beat frequency stability, narrow optical linewidth and optical fibre output

NASA Astrophysics Data System (ADS)

Sternkopf, Christian; Manske, Eberhard

2018-06-01

We report on the enhancement of a previously-presented heterodyne laser source on the basis of two phase-locked loop (PLL) frequency coupled internal-mirror He–Ne lasers. Our new system consists of two digitally controlled He–Ne lasers with slightly different wavelengths, and offers high-frequency stability and very narrow optical linewidth. The digitally controlled system has been realized by using a FPGA controller and transconductance amplifiers. The light of both lasers was coupled into separate fibres for heterodyne interferometer applications. To enhance the laser performance we observed the sensitivity of both laser tubes to electromagnetic noise from various laser power supplies and frequency control systems. Furthermore, we describe how the linewidth of a frequency-controlled He–Ne laser can be reduced during precise frequency stabilisation. The digitally controlled laser source reaches a standard beat frequency deviation of less than 20 Hz (with 1 s gate time) and a spectral full width at half maximum (FWHM) of the beat signal less than 3 kHz. The laser source has enough optical output power to serve a fibre-coupled multi axis heterodyne interferometer. The system can be adjusted to output beat frequencies in the range of 0.1 MHz–20 MHz.

First-Order-hold interpolation digital-to-analog converter with application to aircraft simulation

NASA Technical Reports Server (NTRS)

Cleveland, W. B.

1976-01-01

Those who design piloted aircraft simulations must contend with the finite size and speed of the available digital computer and the requirement for simulation reality. With a fixed computational plant, the more complex the model, the more computing cycle time is required. While increasing the cycle time may not degrade the fidelity of the simulated aircraft dynamics, the larger steps in the pilot cue feedback variables (such as the visual scene cues), may be disconcerting to the pilot. The first-order-hold interpolation (FOHI) digital-to-analog converter (DAC) is presented as a device which offers smooth output, regardless of cycle time. The Laplace transforms of these three conversion types are developed and their frequency response characteristics and output smoothness are compared. The FOHI DAC exhibits a pure one-cycle delay. Whenever the FOHI DAC input comes from a second-order (or higher) system, a simple computer software technique can be used to compensate for the DAC phase lag. When so compensated, the FOHI DAC has (1) an output signal that is very smooth, (2) a flat frequency response in frequency ranges of interest, and (3) no phase error. When the input comes from a first-order system, software compensation may cause the FOHI DAC to perform as an FOHE DAC, which, although its output is not as smooth as that of the FOHI DAC, has a smoother output than that of the ZOH DAC.

Investigation of interference in multiple-input multiple-output wireless transmission at W band for an optical wireless integration system.

PubMed

Li, Xinying; Yu, Jianjun; Dong, Ze; Zhang, Junwen; Chi, Nan; Yu, Jianguo

2013-03-01

We experimentally investigate the interference in multiple-input multiple-output (MIMO) wireless transmission by adjusting the relative locations of horn antennas (HAs) in a 100 GHz optical wireless integration system, which can deliver a 50 Gb/s polarization-division-multiplexing quadrature-phase-shift-keying signal over 80 km single-mode fiber-28 and a 2×2 MIMO wireless link. For the parallel 2×2 MIMO wireless link, each receiver HA can only get wireless power from the corresponding transmitter HA, while for the crossover ones, the receiver HA can get wireless power from two transmitter HAs. At the wireless receiver, polarization demultiplexing is realized by the constant modulus algorithm (CMA) in the digital-signal-processing part. Compared to the parallel case, wireless interference causes about 2 dB optical signal-to-noise ratio penalty at a bit-error ratio (BER) of 3.8×10(-3) for the crossover cases if similar CMA taps are employed. The increase in CMA tap length can reduce wireless interference and improve BER performance. Furthermore, more CMA taps should be adopted to overcome the severe wireless interference when two pairs of transmitter and receiver HAs have different wireless distances.

Delivering integrated HAZUS-MH flood loss analyses and flood inundation maps over the Web.

PubMed

Hearn, Paul P; Longenecker, Herbert E; Aguinaldo, John J; Rahav, Ami N

2013-01-01

Catastrophic flooding is responsible for more loss of life and damages to property than any other natural hazard. Recently developed flood inundation mapping technologies make it possible to view the extent and depth of flooding on the land surface over the Internet; however, by themselves these technologies are unable to provide estimates of losses to property and infrastructure. The Federal Emergency Management Agency's (FEMA's) HAZUS-MH software is extensively used to conduct flood loss analyses in the United States, providing a nationwide database of population and infrastructure at risk. Unfortunately, HAZUS-MH requires a dedicated Geographic Information System (GIS) workstation and a trained operator, and analyses are not adapted for convenient delivery over the Web. This article describes a cooperative effort by the US Geological Survey (USGS) and FEMA to make HAZUS-MH output GIS and Web compatible and to integrate these data with digital flood inundation maps in USGS's newly developed Inundation Mapping Web Portal. By running the computationally intensive HAZUS-MH flood analyses offline and converting the output to a Web-GIS compatible format, detailed estimates of flood losses can now be delivered to anyone with Internet access, thus dramatically increasing the availability of these forecasts to local emergency planners and first responders.

Delivering integrated HAZUS-MH flood loss analyses and flood inundation maps over the Web

USGS Publications Warehouse

Hearn,, Paul P.; Longenecker, Herbert E.; Aguinaldo, John J.; Rahav, Ami N.

2013-01-01

Catastrophic flooding is responsible for more loss of life and damages to property than any other natural hazard. Recently developed flood inundation mapping technologies make it possible to view the extent and depth of flooding on the land surface over the Internet; however, by themselves these technologies are unable to provide estimates of losses to property and infrastructure. The Federal Emergency Management Agency’s (FEMA's) HAZUS-MH software is extensively used to conduct flood loss analyses in the United States, providing a nationwide database of population and infrastructure at risk. Unfortunately, HAZUS-MH requires a dedicated Geographic Information System (GIS) workstation and a trained operator, and analyses are not adapted for convenient delivery over the Web. This article describes a cooperative effort by the US Geological Survey (USGS) and FEMA to make HAZUS-MH output GIS and Web compatible and to integrate these data with digital flood inundation maps in USGS’s newly developed Inundation Mapping Web Portal. By running the computationally intensive HAZUS-MH flood analyses offline and converting the output to a Web-GIS compatible format, detailed estimates of flood losses can now be delivered to anyone with Internet access, thus dramatically increasing the availability of these forecasts to local emergency planners and first responders.

Signal Processing Equipment and Techniques for Use in Measuring Ocean Acoustic Multipath Structures

DTIC Science & Technology

1983-12-01

Demodulator 3.4 Digital Demodulator 3.4.1 Number of Bits in the Input A/D Converter Quantization Effects The Demodulator Output Filter Effects of... power caused by ignoring cross spectral term a) First order Butterworth filter b) Second order Butterworth filter 48 3.4 Ordering of e...spectrum 59 3.7 Multiplying D/A Converter input and output spectra a) Input b) Output 60 3.8 Demodulator output spectrum prior to filtering 63

Electronic photography at NASA Langley Research Center

NASA Technical Reports Server (NTRS)

Holm, Jack M.

1994-01-01

The field of photography began a metamorphosis several years ago which promises to fundamentally change how images are captured, transmitted, and output. At this time the metamorphosis is still in the early stages, but already new processes, hardware, and software are allowing many individuals and organizations to explore the entry of imaging into the information revolution. Exploration at this time is prerequisite to leading expertise in the future, and a number of branches at LaRC have ventured into electronic and digital imaging. Their progress until recently has been limited by two factors: the lack of an integrated approach and the lack of an electronic photographic capability. The purpose of the research conducted was to address these two items. In some respects, the lack of electronic photographs has prevented application of an integrated imaging approach. Since everything could not be electronic, the tendency was to work with hard copy. Over the summer, the Photographics Section has set up an Electronic Photography Laboratory. This laboratory now has the capability to scan film images, process the images, and output the images in a variety of forms. Future plans also include electronic capture capability. The current forms of image processing available include sharpening, noise reduction, dust removal, tone correction, color balancing, image editing, cropping, electronic separations, and halftoning. Output choices include customer specified electronic file formats which can be output on magnetic or optical disks or over the network, 4400 line photographic quality prints and transparencies to 8.5 by 11 inches, and 8000 line film negatives and transparencies to 4 by 5 inches. The problem of integrated imaging involves a number of branches at LaRC including Visual Imaging, Research Printing and Publishing, Data Visualization and Animation, Advanced Computing, and various research groups. These units must work together to develop common approaches to image processing and archiving. The ultimate goal is to be able to search for images using an on-line database and image catalog. These images could then be retrieved over the network as needed, along with information on the acquisition and processing prior to storage. For this goal to be realized, a number of standard processing protocols must be developed to allow the classification of images into categories. Standard series of processing algorithms can then be applied to each category (although many of these may be adaptive between images). Since the archived image files would be standardized, it should also be possible to develop standard output processing protocols for a number of output devices. If LaRC continues the research effort begun this summer, it may be one of the first organizations to develop an integrated approach to imaging. As such, it could serve as a model for other organizations in government and the private sector.

500 MHz Analog-to-Digital Converter Development Program

DTIC Science & Technology

1972-03-01

marginal level digital input signals. At these encoding speeds, quasi -stable non -digital voltage levels at their outputs still resulted. Further...OF COMMERCE SPRINGFIELD, VA. 22161 Radar Division AEROSPACE GROUP Hughes Aircraft Company * Culver City, California / .A CONTFNTS Page INTRODUCTION...sec. The experimental data also indicated that the short time stability of the timing reference generator caused most of the time jitter associated

Non-numeric computation for high eccentricity orbits. [Earth satellite orbit perturbation

NASA Technical Reports Server (NTRS)

Sridharan, R.; Renard, M. L.

1975-01-01

Geocentric orbits of large eccentricity (e = 0.9 to 0.95) are significantly perturbed in cislunar space by the sun and moon. The time-history of the height of perigee, subsequent to launch, is particularly critical. The determination of 'launch windows' is mostly concerned with preventing the height of perigee from falling below its low initial value before the mission lifetime has elapsed. Between the extremes of high accuracy digital integration of the equations of motion and of using an approximate, but very fast, stability criteria method, this paper is concerned with the developement of a method of intermediate complexity using non-numeric computation. The computer is used as the theory generator to generalize Lidov's theory using six osculating elements. Symbolic integration is completely automatized and the output is a set of condensed formulae well suited for repeated applications in launch window analysis. Examples of applications are given.

Tunable protease-activatable virus nanonodes.

PubMed

Judd, Justin; Ho, Michelle L; Tiwari, Abhinav; Gomez, Eric J; Dempsey, Christopher; Van Vliet, Kim; Igoshin, Oleg A; Silberg, Jonathan J; Agbandje-McKenna, Mavis; Suh, Junghae

2014-05-27

We explored the unique signal integration properties of the self-assembling 60-mer protein capsid of adeno-associated virus (AAV), a clinically proven human gene therapy vector, by engineering proteolytic regulation of virus-receptor interactions such that processing of the capsid by proteases is required for infection. We find the transfer function of our engineered protease-activatable viruses (PAVs), relating the degree of proteolysis (input) to PAV activity (output), is highly nonlinear, likely due to increased polyvalency. By exploiting this dynamic polyvalency, in combination with the self-assembly properties of the virus capsid, we show that mosaic PAVs can be constructed that operate under a digital AND gate regime, where two different protease inputs are required for virus activation. These results show viruses can be engineered as signal-integrating nanoscale nodes whose functional properties are regulated by multiple proteolytic signals with easily tunable and predictable response surfaces, a promising development toward advanced control of gene delivery.

Tunable Protease-Activatable Virus Nanonodes

PubMed Central

2015-01-01

We explored the unique signal integration properties of the self-assembling 60-mer protein capsid of adeno-associated virus (AAV), a clinically proven human gene therapy vector, by engineering proteolytic regulation of virus–receptor interactions such that processing of the capsid by proteases is required for infection. We find the transfer function of our engineered protease-activatable viruses (PAVs), relating the degree of proteolysis (input) to PAV activity (output), is highly nonlinear, likely due to increased polyvalency. By exploiting this dynamic polyvalency, in combination with the self-assembly properties of the virus capsid, we show that mosaic PAVs can be constructed that operate under a digital AND gate regime, where two different protease inputs are required for virus activation. These results show viruses can be engineered as signal-integrating nanoscale nodes whose functional properties are regulated by multiple proteolytic signals with easily tunable and predictable response surfaces, a promising development toward advanced control of gene delivery. PMID:24796495

Design details of Intelligent Instruments for PLC-free Cryogenic measurements, control and data acquisition

NASA Astrophysics Data System (ADS)

Antony, Joby; Mathuria, D. S.; Chaudhary, Anup; Datta, T. S.; Maity, T.

2017-02-01

Cryogenic network for linear accelerator operations demand a large number of Cryogenic sensors, associated instruments and other control-instrumentation to measure, monitor and control different cryogenic parameters remotely. Here we describe an alternate approach of six types of newly designed integrated intelligent cryogenic instruments called device-servers which has the complete circuitry for various sensor-front-end analog instrumentation and the common digital back-end http-server built together, to make crateless PLC-free model of controls and data acquisition. These identified instruments each sensor-specific viz. LHe server, LN2 Server, Control output server, Pressure server, Vacuum server and Temperature server are completely deployed over LAN for the cryogenic operations of IUAC linac (Inter University Accelerator Centre linear Accelerator), New Delhi. This indigenous design gives certain salient features like global connectivity, low cost due to crateless model, easy signal processing due to integrated design, less cabling and device-interconnectivity etc.

A rationale for human operator pulsive control behavior

NASA Technical Reports Server (NTRS)

Hess, R. A.

1979-01-01

When performing tracking tasks which involve demanding controlled elements such as those with K/s-squared dynamics, the human operator often develops discrete or pulsive control outputs. A dual-loop model of the human operator is discussed, the dominant adaptive feature of which is the explicit appearance of an internal model of the manipulator-controlled element dynamics in an inner feedback loop. Using this model, a rationale for pulsive control behavior is offered which is based upon the assumption that the human attempts to reduce the computational burden associated with time integration of sensory inputs. It is shown that such time integration is a natural consequence of having an internal representation of the K/s-squared-controlled element dynamics in the dual-loop model. A digital simulation is discussed in which a modified form of the dual-loop model is shown to be capable of producing pulsive control behavior qualitively comparable to that obtained in experiment.

Monolithically Integrated Dual-Wavelength Self-Sustained Pulsating Laser Diodes with Real Refractive Index Guided Self-Aligned Structure

NASA Astrophysics Data System (ADS)

Onishi, Toshikazu; Imafuji, Osamu; Fukuhisa, Toshiya; Mochida, Atsunori; Kobayashi, Yasuhiro; Yuri, Masaaki; Itoh, Kunio; Shimizu, Hirokazu

2001-11-01

Monolithically integrated 780-nm-band and 650-nm-band self-sustained pulsating (SSP) lasers, which are desirable for simplified optical pickups in digital versatile disk (DVD) systems, have been developed for the first time. The real refractive index guided self-aligned (RISA) waveguide structure is adapted to reduce absorption loss in the current blocking layers. In order to obtain stable SSP, a saturable absorber formed in the active layer outside the current stripe, and a saturable absorbing layer above the active layer are utilized for the 780-nm-band and 650-nm-band laser diodes (LDs), respectively. Relative intensity noise less than -130 dB/Hz is maintained at temperatures of up to 80°C at an output power of 7 mW for the 650 nm band and 10 mW for the 780 nm band, which suggests that stable SSP operations have been realized.

Configurable hardware integrate and fire neurons for sparse approximation.

PubMed

Shapero, Samuel; Rozell, Christopher; Hasler, Paul

2013-09-01

Sparse approximation is an important optimization problem in signal and image processing applications. A Hopfield-Network-like system of integrate and fire (IF) neurons is proposed as a solution, using the Locally Competitive Algorithm (LCA) to solve an overcomplete L1 sparse approximation problem. A scalable system architecture is described, including IF neurons with a nonlinear firing function, and current-based synapses to provide linear computation. A network of 18 neurons with 12 inputs is implemented on the RASP 2.9v chip, a Field Programmable Analog Array (FPAA) with directly programmable floating gate elements. Said system uses over 1400 floating gates, the largest system programmed on a FPAA to date. The circuit successfully reproduced the outputs of a digital optimization program, converging to within 4.8% RMS, and an objective cost only 1.7% higher on average. The active circuit consumed 559 μA of current at 2.4 V and converges on solutions in 25 μs, with measurement of the converged spike rate taking an additional 1 ms. Extrapolating the scaling trends to a N=1000 node system, the spiking LCA compares favorably with state-of-the-art digital solutions, and analog solutions using a non-spiking approach. Copyright © 2013 Elsevier Ltd. All rights reserved.

Electrical Characterization of Semiconductor Materials and Devices

NASA Astrophysics Data System (ADS)

Deen, M.; Pascal, Fabien

Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

Biological data integration: wrapping data and tools.

PubMed

Lacroix, Zoé

2002-06-01

Nowadays scientific data is inevitably digital and stored in a wide variety of formats in heterogeneous systems. Scientists need to access an integrated view of remote or local heterogeneous data sources with advanced data accessing, analyzing, and visualization tools. Building a digital library for scientific data requires accessing and manipulating data extracted from flat files or databases, documents retrieved from the Web as well as data generated by software. We present an approach to wrapping web data sources, databases, flat files, or data generated by tools through a database view mechanism. Generally, a wrapper has two tasks: it first sends a query to the source to retrieve data and, second builds the expected output with respect to the virtual structure. Our wrappers are composed of a retrieval component based on an intermediate object view mechanism called search views mapping the source capabilities to attributes, and an eXtensible Markup Language (XML) engine, respectively, to perform these two tasks. The originality of the approach consists of: 1) a generic view mechanism to access seamlessly data sources with limited capabilities and 2) the ability to wrap data sources as well as the useful specific tools they may provide. Our approach has been developed and demonstrated as part of the multidatabase system supporting queries via uniform object protocol model (OPM) interfaces.

Applications of Landsat data and the data base approach

USGS Publications Warehouse

Lauer, D.T.

1986-01-01

A generalized methodology for applying digital Landsat data to resource inventory and assessment tasks is currently being used by several bureaux and agencies within the US Department of the Interior. The methodology includes definition of project objectives and output, identification of source materials, construction of the digital data base, performance of computer-assisted analyses, and generation of output. The USGS, Bureau of Land Management, US Fish and Wildlife Service, Bureau of Indian Affairs, Bureau of Reclamation, and National Park Service have used this generalized methodology to assemble comprehensive digital data bases for resource management. Advanced information processing techniques have been applied to these data bases for making regional environmental surveys on millions of acres of public lands at costs ranging from $0.01 to $0.08 an acre.-Author

Reference-free direct digital lock-in method and apparatus

NASA Technical Reports Server (NTRS)

Henry, James E. (Inventor); Leonard, John A. (Inventor)

2000-01-01

A reference-free direct digital lock-in system (RDDL 10) has a first input coupled to a periodic electrical signal and an output for outputting an indication of a magnitude of a desired periodic signal component. The RDDL also has a second input for receiving a signal (9) that specifies a reference period value, and operates to autonomously generate a lock-in reference signal having a specified period and a phase that is adjusted to maximize a magnitude of the outputted desired periodic signal component. In an embodiment of a measurement system that includes the RDDL 10 an optical source provides a chopped light beam having wavelengths within a predetermined range of wavelengths, and the periodic electrical signal is generated by at least one photodetector that is illuminated by the chopped light beam. In this embodiment the measurement system characterizes, for at least one wavelength of light that is generated by the optical source, a spectral response of the at least one photodetector. The RDDL can operate in nonreal-time upon previously generated and stored digital equivalent values of the periodic electrical signal or signals.

Programmable noise bandwidth reduction by means of digital averaging

NASA Technical Reports Server (NTRS)

Poklemba, John J. (Inventor)

1993-01-01

Predetection noise bandwidth reduction is effected by a pre-averager capable of digitally averaging the samples of an input data signal over two or more symbols, the averaging interval being defined by the input sampling rate divided by the output sampling rate. As the averaged sample is clocked to a suitable detector at a much slower rate than the input signal sampling rate the noise bandwidth at the input to the detector is reduced, the input to the detector having an improved signal to noise ratio as a result of the averaging process, and the rate at which such subsequent processing must operate is correspondingly reduced. The pre-averager forms a data filter having an output sampling rate of one sample per symbol of received data. More specifically, selected ones of a plurality of samples accumulated over two or more symbol intervals are output in response to clock signals at a rate of one sample per symbol interval. The pre-averager includes circuitry for weighting digitized signal samples using stored finite impulse response (FIR) filter coefficients. A method according to the present invention is also disclosed.

Quarter-Rate Superconducting Modulator for Improved High Resolution Analog-to-Digital Converter

DTIC Science & Technology

2006-08-01

third pulse to Output B2, and the fourth to Output C2. The fifth pulse goes to Output B1 and the pattern continues. The inductances LQA , LQB, LQC...inductance LQA . Junction JL1A is now biased with the loop phase being equal to – π. In the bottom left demultiplexer, junctions JR1B and JL2B are

Faraday-effect polarimeter-interferometer system for current density measurement on EAST

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, H. Q.; Jie, Y. X., E-mail: yx-jie@ipp.ac.cn; Zou, Z. Y.

2014-11-15

A multichannel far-infrared laser-based POlarimeter-INTerferometer (POINT) system utilizing the three-wave technique is under development for current density and electron density profile measurements in the EAST tokamak. Novel molybdenum retro-reflectors are mounted in the inside wall for the double-pass optical arrangement. A Digital Phase Detector with 250 kHz bandwidth, which will provide real-time Faraday rotation angle and density phase shift output, have been developed for use on the POINT system. Initial calibration indicates the electron line-integrated density resolution is less than 5 × 10{sup 16} m{sup −2} (∼2°), and the Faraday rotation angle rms phase noise is <0.1°.

Low-cost data analysis systems for processing multispectral scanner data

NASA Technical Reports Server (NTRS)

Whitely, S. L.

1976-01-01

The basic hardware and software requirements are described for four low cost analysis systems for computer generated land use maps. The data analysis systems consist of an image display system, a small digital computer, and an output recording device. Software is described together with some of the display and recording devices, and typical costs are cited. Computer requirements are given, and two approaches are described for converting black-white film and electrostatic printer output to inexpensive color output products. Examples of output products are shown.

MT3825BA: a 384×288-25µm ROIC for uncooled microbolometer FPAs

NASA Astrophysics Data System (ADS)

Eminoglu, Selim; Gulden, M. Ali; Bayhan, Nusret; Incedere, O. Samet; Soyer, S. Tuncer; Ustundag, Cem M. B.; Isikhan, Murat; Kocak, Serhat; Turan, Ozge; Yalcin, Cem; Akin, Tayfun

2014-06-01

This paper reports the development of a new microbolometer Readout Integrated Circuit (ROIC) called MT3825BA. It has a format of 384 × 288 and a pixel pitch of 25μm. MT3825BA is Mikro-Tasarim's second microbolometer ROIC product, which is developed specifically for resistive surface micro-machined microbolometer detector arrays using high-TCR pixel materials, such as VOx and a-Si. MT3825BA has a system-on-chip architecture, where all the timing, biasing, and pixel non-uniformity correction (NUC) operations in the ROIC are applied using on-chip circuitry simplifying the use and system integration of this ROIC. The ROIC is designed to support pixel resistance values ranging from 30 KΩ to 100 KΩ. MT3825BA is operated using conventional row based readout method, where pixels in the array are read out in a row-by-row basis, where the applied bias for each pixel in a given row is updated at the beginning of each line period according to the applied line based NUC data. The NUC data is applied continuously in a row-by-row basis using the serial programming interface, which is also used to program user configurable features of the ROIC, such as readout gain, integration time, and number of analog video outputs. MT3825BA has a total of 4 analog video outputs and 2 analog reference outputs, placed at the top and bottom of the ROIC, which can be programmed to operate in the 1, 2, and 4-output modes, supporting frames rates well above 60 fps at a 3 MHz pixel output rate. The pixels in the array are read out with respect to reference pixels implemented above and below actual array pixels. The bias voltage of the pixels can be programmed over a 1.0 V range to compensate for the changes in the detector resistance values due to the variations coming from the manufacturing process or changes in the operating temperature. The ROIC has an on-chip integrated temperature sensor with a sensitivity of better than 5 mV / K, and the output of the temperature sensor can be read out the output as part of the analog video stream. MT3825BA can be used to build a microbolometer FPAs with an NETD value below 100 mK using a microbolometer detector array fabrication technology with a detector resistance value up to 100 KΩ, a high TCR value (< 2 % / K), and a sufficiently low pixel thermal conductance (Gth ≤ 20 nW / K). MT3825BA measures 13.0 mm × 13.5 mm and is fabricated on 200 mm CMOS wafers. The microbolometer ROIC wafers are engineered to have flat surface finish to simplify the wafer level detector fabrication and wafer level vacuum packaging (WLVP). The ROIC runs on 3.3 V analog and 1.8 V digital supplies, and dissipates less than 85 mW in the 2-output mode at 30 fps. Mikro-Tasarim provides tested ROIC wafers and offers compact test electronics and software for its ROIC customers to shorten their FPA and camera development cycles.

Sensitivity Analysis of Digital I&C Modules in Protection and Safety Systems

NASA Astrophysics Data System (ADS)

Khalil Ur, Rahman; Zubair, M.; Heo, G.

2013-12-01

This research is performed to examine the sensitivity of digital Instrumentation and Control (I&C) components and modules used in regulating and protection systems architectures of nuclear industry. Fault Tree Analysis (FTA) was performed for four configurations of RPS channel architecture. The channel unavailability has been calculated by using AIMS-PSA, which comes out 4.517E-03, 2.551E-03, 2.246E-03 and 2.7613-04 for architecture configuration I, II, III and IV respectively. It is observed that unavailability decreases by 43.5 % & 50.4% by inserting partial redundancy whereas maximum reduction of 93.9 % in unavailability happens when double redundancy is inserted in architecture. Coincidence module output failure and bi-stable output failures are identified as sensitive failures by Risk Reduction Worth (RRW) and Fussell-Vesely (FV) importance. RRW highlights that risk from coincidence processor output failure can reduced by 48.83 folds and FV indicates that BP output is sensitive by 0.9796 (on a scale of 1).

An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers

PubMed Central

Anabtawi, Nijad; Ferzli, Rony; Harmanani, Haidar M.

2017-01-01

This paper presents a step down, switched mode power converter for use in multi-standard envelope tracking radio frequency power amplifiers (RFPA). The converter is based on a programmable order sigma delta modulator that can be configured to operate with either 1st, 2nd, 3rd or 4th order loop filters, eliminating the need for a bulky passive output filter. Output ripple, sideband noise and spectral emission requirements of different wireless standards can be met by configuring the modulator’s filter order and converter’s sampling frequency. The proposed converter is entirely digital and is implemented in 14nm bulk CMOS process for post layout verification. For an input voltage of 3.3V, the converter’s output can be regulated to any voltage level from 0.5V to 2.5V, at a nominal switching frequency of 150MHz. It achieves a maximum efficiency of 94% at 1.5 W output power. PMID:28919657

Fast modal decomposition for optical fibers using digital holography.

PubMed

Lyu, Meng; Lin, Zhiquan; Li, Guowei; Situ, Guohai

2017-07-26

Eigenmode decomposition of the light field at the output end of optical fibers can provide fundamental insights into the nature of electromagnetic-wave propagation through the fibers. Here we present a fast and complete modal decomposition technique for step-index optical fibers. The proposed technique employs digital holography to measure the light field at the output end of the multimode optical fiber, and utilizes the modal orthonormal property of the basis modes to calculate the modal coefficients of each mode. Optical experiments were carried out to demonstrate the proposed decomposition technique, showing that this approach is fast, accurate and cost-effective.

A digital boxcar integrator for IMS spectra

NASA Technical Reports Server (NTRS)

Cohen, Martin J.; Stimac, Robert M.; Wernlund, Roger F.; Parker, Donald C.

1995-01-01

When trying to detect or quantify a signal at or near the limit of detectability, it is invariably embeded in the noise. This statement is true for nearly all detectors of any physical phenomena and the limit of detectability, hopefully, occurs at very low signal-to-noise levels. This is particularly true of IMS (Ion Mobility Spectrometers) spectra due to the low vapor pressure of several chemical compounds of great interest and the small currents associated with the ionic detection process. Gated Integrators and Boxcar Integrators or Averagers are designed to recover fast, repetitive analog signals. In a typical application, a time 'Gate' or 'Window' is generated, characterized by a set delay from a trigger or gate pulse and a certain width. A Gated Integrator amplifies and integrates the signal that is present during the time the gate is open, ignoring noise and interference that may be present at other times. Boxcar Integration refers to the practice of averaging the output of the Gated Integrator over many sweeps of the detector. Since any signal present during the gate will add linearly, while noise will add in a 'random walk' fashion as the square root of the number of sweeps, averaging N sweeps will improve the 'Signal-to-Noise Ratio' by a factor of the square root of N.

Remote sensing for industrial applications in the energy business: digital territorial data integration for planning of overhead power transmission lines (OHTLs)

NASA Astrophysics Data System (ADS)

Terrazzino, Alfonso; Volponi, Silvia; Borgogno Mondino, Enrico

2001-12-01

An investigation has been carried out, concerning remote sensing techniques, in order to assess their potential application to the energy system business: the most interesting results concern a new approach, based on digital data from remote sensing, to infrastructures with a large territorial distribution: in particular OverHead Transmission Lines, for the high voltage transmission and distribution of electricity on large distances. Remote sensing could in principle be applied to all the phases of the system lifetime, from planning to design, to construction, management, monitoring and maintenance. In this article, a remote sensing based approach is presented, targeted to the line planning: optimization of OHTLs path and layout, according to different parameters (technical, environmental and industrial). Planning new OHTLs is of particular interest in emerging markets, where typically the cartography is missing or available only on low accuracy scale (1:50.000 and lower), often not updated. Multi- spectral images can be used to generate thematic maps of the region of interest for the planning (soil coverage). Digital Elevation Models (DEMs), allow the planners to easily access the morphologic information of the surface. Other auxiliary information from local laws, environmental instances, international (IEC) standards can be integrated in order to perform an accurate optimized path choice and preliminary spotting of the OHTLs. This operation is carried out by an ABB proprietary optimization algorithm: the output is a preliminary path that bests fits the optimization parameters of the line in a life cycle approach.

The use of LANDSAT digital data and computer-implemented techniques for an agricultural application

NASA Technical Reports Server (NTRS)

Joyce, A. T.; Griffin, R. H., II

1978-01-01

Agricultural applications procedures are described for use of LANDSAT digital data and other digitalized data (e.g., soils). The results of having followed these procedures are shown in production estimates for cotton and soybeans in Washington County, Mississippi. Examples of output products in both line printer and map formats are included, and a product adequacy assessment is made.

40 CFR 60.5410 - How do I demonstrate initial compliance with the standards for my gas well affected facility, my...

Code of Federal Regulations, 2013 CFR

2013-07-01

... separately operating GIS device within the same digital picture, provided the latitude and longitude output of the GIS unit can be clearly read in the digital photograph. (b)(1) To achieve initial compliance...

The Microcomputer as an Educational Laboratory Workstation.

ERIC Educational Resources Information Center

Ciociolo, James M.

1983-01-01

Describes laboratory workstations which provide direct connection for monitoring and control of analytical instruments such as pH meters, spectrophotometers, temperature, and chromatographic instruments. This is accomplished through analog/digital and digital/analog converters for analog signals and input/output devices for on/off signals.…

Converting the Active Digital Controller for Use in Two Tests

NASA Technical Reports Server (NTRS)

Wright, Robert G.

1995-01-01

The Active Digital Controller is a system used to control the various functions of wind tunnel models. It has the capability of digitizing and saving of up to sixty-four channels of analog data. It can output up to 16 channels of analog command signals. In addition to its use as a general controller, it can run up to two distinct control laws. All of this is done at a regulated speed of two hundred hertz. The Active Digital Controller (ADC) was modified for use in the Actively Controlled Response of Buffet Affected Tails (ACROBAT) tests and for side-wall pressure data acquisition. The changes included general maintenance and updating of the controller as well as setting up special modes of operation. The ACROBAT tests required that two sets of output signals be available. The pressure data acquisition needed a sampling rate of four hundred hertz, twice the standard ADC rate. These modifications were carried out and the ADC was used during the ACROBAT wind tunnel entry.

Development Status of the NSTAR Ion Propulsion System Power Processor

NASA Technical Reports Server (NTRS)

Hamley, John A.; Pinero, Luis R.; Rawlin, Vincent K.; Miller, John R.; Cartier, Kevin C.; Bowers, Glen E.

1995-01-01

A 0.5-2.3 kW xenon ion propulsion system is presently being developed under the NASA Solar Electric Propulsion Technology Application Readiness (NSTAR) program. This propulsion system includes a 30 cm diameter xenon ion thruster, a Digital Control Interface Unit, a xenon feed system, and a power processing unit (PPU). The PPU consists of the power supply assemblies which operate the thruster neutralizer, main discharge chamber, and ion optics. Also included are recycle logic and a digital microcontroller. The neutralizer and discharge power supplies employ a dual use configuration which combines the functions of two power supplies into one, significantly simplifying the PPU. Further simplification was realized by implementing a single thruster control loop which regulates the beam current via the discharge current. Continuous throttling is possible over a 0.5-2.3 kW output power range. All three power supplies have been fabricated and tested with resistive loads, and have been combined into a single breadboard unit with the recycle logic and microcontroller. All line and load regulation test results show the power supplies to be within the NSTAR flight PPU specified power output of 1.98 kW. The overall efficiency of the PPU, calculated as the combined efficiencies of the power supplies and controller, at 2.3 kW delivered to resistive loads was 0.90. The component was 6.16 kg. Integration testing of the neutralizer and discharge power supplies with a functional model thruster revealed no issues with discharge ignition or steady state operation.

Compact LED based LCOS optical engine for mobile projection

NASA Astrophysics Data System (ADS)

Zhang, Wenzi; Li, Xiaoyan; Liu, Qinxiao; Yu, Feihong

2009-11-01

With the development of high power LED (light emitting diode) technology and color filter LCOS (liquid crystal on silicon) technology, the research on LED based micro optical engine for mobile projection has been a hot topic recently. In this paper one compact LED powered LCOS optical engine design is presented, which is intended to be embedded in cell phone, digital camera, and so on. Compared to DLP (digital light processor) and traditional color sequential LCOS technology, the color filter based LCOS panel is chosen for the compact optical engine, this is because only white LED is needed. To further decrease the size of the optical engine, only one specifically designed plastic free form lens is applied in the illumination part of the optical engine. This free form lens is designed so that it plays the roles of both condenser and integrator, by which the output light of LED is condensed and redistributed, and light illumination of high efficiency, high uniformity and small incident angle on LCOS is acquired. Besides PBS (polarization beam splitter), LCOS, and projection lens, the compact optical engine contains only this piece of free form plastic lens, which can be produced by plastic injection molding. Finally a white LED powered LCOS optical engine with a compact size of less than 6.6 cc can be acquired. With the ray tracing simulation result, the light efficiency analysis shows that the output flux is over 8.5 ANSI lumens and the ANSI uniformity of over 80%.

Fiber-wireless transmission system of 108  Gb/sdata over 80 km fiber and 2×2multiple-input multiple-output wireless links at 100 GHz W-band frequency.

PubMed

Li, Xinying; Dong, Ze; Yu, Jianjun; Chi, Nan; Shao, Yufeng; Chang, G K

2012-12-15

We experimentally demonstrate a seamlessly integrated fiber-wireless system that delivers a 108  Gb/s signal through 80 km fiber and 1 m wireless transport over free space at 100 GHz adopting polarization-division-multiplexing quadrature-phase-shift-keying (PDM-QPSK) modulation and heterodyning coherent detection. The X- and Y-polarization components of the optical PDM-QPSK baseband signal are simultaneously upconverted to 100 GHz wireless carrier by optical polarization-diversity heterodyne beating, and then independently transmitted and received by two pairs of transmitter and receiver antennas, which form a 2×2 multiple-input multiple-output wireless link. At the wireless receiver, two-stage downconversion is performed firstly in the analog domain based on balanced mixer and sinusoidal radio frequency signal, and then in the digital domain based on digital signal processing (DSP). Polarization demultiplexing is realized by the constant modulus algorithm in the DSP part at the receiver. The bit-error ratio for the 108  Gb/s PDM-QPSK signal is less than the pre-forward-error-correction threshold of 3.8×10(-3) after both 1 m wireless delivery at 100 GHz and 80 km single-mode fiber-28 transmission. To our knowledge, this is the first demonstration to realize 100  Gb/s signal delivery through both fiber and wireless links at 100 GHz.

An all-digital phase-locked loop demodulator based on FPGA

NASA Astrophysics Data System (ADS)

Gong, X. F.; Cui, Z. D.

2017-09-01

This paper studied the principle of analogue phase-locked loop demodulation and work process of digital phase-locked loop. It is found that the higher the reference signal frequency is, the smaller the duty ratio of the discriminator output signal is. Carrier detection is achieved by using this relationship. The experimental results indicate that the demodulator based on the principle could realize high-quality transmission of digital signals and could be an effective FM communication mode for studying wireless transmission of digital signals.

Digital pulse processing in Mössbauer spectroscopy

NASA Astrophysics Data System (ADS)

Veiga, A.; Grunfeld, C. M.

2014-04-01

In this work we present some advances towards full digitization of the detection subsystem of a Mössbauer transmission spectrometer. We show how, using adequate instrumentation, preamplifier output of a proportional counter can be digitized with no deterioration in spectrum quality, avoiding the need of a shaping amplifier. A pipelined architecture is proposed for a digital processor, which constitutes a versatile platform for the development of pulse processing techniques. Requirements for minimization of the analog processing are considered and experimental results are presented.

MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER

DOEpatents

Gallagher, J.D. et al.

1960-11-22

An apparatus is given for converting binary information into coded decimal form comprising means, in combination with a binary adder, a live memory and a source of bigit pulses, for synchronizing the bigit pulses and the adder output pulses; a source of digit pulses synchronized with every fourth bigit pulse; means for generating a conversion pulse in response to the time coincidence of the adder output pulse and a digit pulse: means having a delay equal to two bigit pulse periods coupling the adder output with the memory; means for promptly impressing said conversion pulse on the input of said memory: and means having a delay equal to one bigit pulse period for again impressing the conversion pulse on the input of the memory whereby a fourth bigit adder pulse results in the insertion into the memory of second, third and fourth bigits.

Natural Resource Information System. Volume 2: System operating procedures and instructions

NASA Technical Reports Server (NTRS)

1972-01-01

A total computer software system description is provided for the prototype Natural Resource Information System designed to store, process, and display data of maximum usefulness to land management decision making. Program modules are described, as are the computer file design, file updating methods, digitizing process, and paper tape conversion to magnetic tape. Operating instructions for the system, data output, printed output, and graphic output are also discussed.

An Active Z Gravity Compensation System

DTIC Science & Technology

1992-07-01

is necessary to convert the modified digital controller back into continuous time, assuming a zero -order hold for output, and using the Padd ...most likely higher frequency pole- zero pairs introduced by the motor and torque servo, these are generally non-oscillatory, and small in amplitude...on the output of the PI control. The detection scheme is the following: if the output of the fuzzy controller has remained zero (static system) for

Electronic Photography at the NASA Langley Research Center

NASA Technical Reports Server (NTRS)

Holm, Jack; Judge, Nancianne

1995-01-01

An electronic photography facility has been established in the Imaging & Photographic Technology Section, Visual Imaging Branch, at the NASA Langley Research Center (LaRC). The purpose of this facility is to provide the LaRC community with access to digital imaging technology. In particular, capabilities have been established for image scanning, direct image capture, optimized image processing for storage, image enhancement, and optimized device dependent image processing for output. Unique approaches include: evaluation and extraction of the entire film information content through scanning; standardization of image file tone reproduction characteristics for optimal bit utilization and viewing; education of digital imaging personnel on the effects of sampling and quantization to minimize image processing related information loss; investigation of the use of small kernel optimal filters for image restoration; characterization of a large array of output devices and development of image processing protocols for standardized output. Currently, the laboratory has a large collection of digital image files which contain essentially all the information present on the original films. These files are stored at 8-bits per color, but the initial image processing was done at higher bit depths and/or resolutions so that the full 8-bits are used in the stored files. The tone reproduction of these files has also been optimized so the available levels are distributed according to visual perceptibility. Look up tables are available which modify these files for standardized output on various devices, although color reproduction has been allowed to float to some extent to allow for full utilization of output device gamut.

Integrated inertial stellar attitude sensor

NASA Technical Reports Server (NTRS)

Brady, Tye M. (Inventor); Kourepenis, Anthony S. (Inventor); Wyman, Jr., William F. (Inventor)

2007-01-01

An integrated inertial stellar attitude sensor for an aerospace vehicle includes a star camera system, a gyroscope system, a controller system for synchronously integrating an output of said star camera system and an output of said gyroscope system into a stream of data, and a flight computer responsive to said stream of data for determining from the star camera system output and the gyroscope system output the attitude of the aerospace vehicle.

A system for automatic analysis of blood pressure data for digital computer entry

NASA Technical Reports Server (NTRS)

Miller, R. L.

1972-01-01

Operation of automatic blood pressure data system is described. Analog blood pressure signal is analyzed by three separate circuits, systolic, diastolic, and cycle defect. Digital computer output is displayed on teletype paper tape punch and video screen. Illustration of system is included.

Review of integrated digital systems: evolution and adoption

NASA Astrophysics Data System (ADS)

Fritz, Lawrence W.

The factors that are influencing the evolution of photogrammetric and remote sensing technology to transition into fully integrated digital systems are reviewed. These factors include societal pressures for new, more timely digital products from the Spatial Information Sciencesand the adoption of rapid technological advancements in digital processing hardware and software. Current major developments in leading government mapping agencies of the USA, such as the Digital Production System (DPS) modernization programme at the Defense Mapping Agency, and the Automated Nautical Charting System II (ANCS-II) programme and Integrated Digital Photogrammetric Facility (IDPF) at NOAA/National Ocean Service, illustrate the significant benefits to be realized. These programmes are examples of different levels of integrated systems that have been designed to produce digital products. They provide insights to the management complexities to be considered for very large integrated digital systems. In recognition of computer industry trends, a knowledge-based architecture for managing the complexity of the very large spatial information systems of the future is proposed.

Quantitative evaluation of the accuracy and variance of individual pixels in a scientific CMOS (sCMOS) camera for computational imaging

NASA Astrophysics Data System (ADS)

Watanabe, Shigeo; Takahashi, Teruo; Bennett, Keith

2017-02-01

The"scientific" CMOS (sCMOS) camera architecture fundamentally differs from CCD and EMCCD cameras. In digital CCD and EMCCD cameras, conversion from charge to the digital output is generally through a single electronic chain, and the read noise and the conversion factor from photoelectrons to digital outputs are highly uniform for all pixels, although quantum efficiency may spatially vary. In CMOS cameras, the charge to voltage conversion is separate for each pixel and each column has independent amplifiers and analog-to-digital converters, in addition to possible pixel-to-pixel variation in quantum efficiency. The "raw" output from the CMOS image sensor includes pixel-to-pixel variability in the read noise, electronic gain, offset and dark current. Scientific camera manufacturers digitally compensate the raw signal from the CMOS image sensors to provide usable images. Statistical noise in images, unless properly modeled, can introduce errors in methods such as fluctuation correlation spectroscopy or computational imaging, for example, localization microscopy using maximum likelihood estimation. We measured the distributions and spatial maps of individual pixel offset, dark current, read noise, linearity, photoresponse non-uniformity and variance distributions of individual pixels for standard, off-the-shelf Hamamatsu ORCA-Flash4.0 V3 sCMOS cameras using highly uniform and controlled illumination conditions, from dark conditions to multiple low light levels between 20 to 1,000 photons / pixel per frame to higher light conditions. We further show that using pixel variance for flat field correction leads to errors in cameras with good factory calibration.

From Zero to Sixty: Calibrating Real-Time Responses

ERIC Educational Resources Information Center

Koulis, Theodoro; Ramsay, James O.; Levitin, Daniel J.

2008-01-01

Recent advances in data recording technology have given researchers new ways of collecting on-line and continuous data for analyzing input-output systems. For example, continuous response digital interfaces are increasingly used in psychophysics. The statistical problem related to these input-output systems reduces to linking time-varying…

Research of high power and stable laser in portable Raman spectrometer based on SHINERS technology

NASA Astrophysics Data System (ADS)

Cui, Yongsheng; Yin, Yu; Wu, Yulin; Ni, Xuxiang; Zhang, Xiuda; Yan, Huimin

2013-08-01

The intensity of Raman light is very weak, which is only from 10-12 to 10-6 of the incident light. In order to obtain the required sensitivity, the traditional Raman spectrometer tends to be heavy weight and large volume, so it is often used as indoor test device. Based on the Shell-Isolated Nanoparticle-Enhanced Raman Spectroscopy (SHINERS) method, Raman optical spectrum signal can be enhanced significantly and the portable Raman spectrometer combined with SHINERS method will be widely used in various fields. The laser source must be stable enough and able to output monochromatic narrow band laser with stable power in the portable Raman spectrometer based on the SHINERS method. When the laser is working, the change of temperature can induce wavelength drift, thus the power stability of excitation light will be affected, so we need to strictly control the working temperature of the laser, In order to ensure the stability of laser power and output current, this paper adopts the WLD3343 laser constant current driver chip of Wavelength Electronics company and MCU P89LPC935 to drive LML - 785.0 BF - XX laser diode(LD). Using this scheme, the Raman spectrometer can be small in size and the drive current can be constant. At the same time, we can achieve functions such as slow start, over-current protection, over-voltage protection, etc. Continuous adjustable output can be realized under control, and the requirement of high power output can be satisfied. Max1968 chip is adopted to realize the accurate control of the laser's temperature. In this way, it can meet the demand of miniaturization. In term of temperature control, integral truncation effect of traditional PID algorithm is big, which is easy to cause static difference. Each output of incremental PID algorithm has nothing to do with the current position, and we can control the output coefficients to avoid full dose output and immoderate adjustment, then the speed of balance will be improved observably. Variable integral incremental digital PID algorithm is used in the TEC temperature control system. The experimental results show that comparing with other schemes, the output power of laser in our scheme is more stable and reliable, moreover the peak value is bigger, and the temperature can be precisely controlled in +/-0.1°C, then the volume of the device is smaller. Using this laser equipment, the ideal Raman spectra of materials can be obtained combined with SHINERS technology and spectrometer equipment.

Digital Authenticity and Integrity: Digital Cultural Heritage Documents as Research Resources

ERIC Educational Resources Information Center

Bradley; Rachael

2005-01-01

This article presents the results of a survey addressing methods of securing digital content and ensuring the content's authenticity and integrity, as well as the perceived importance of authenticity and integrity. The survey was sent to 40 digital repositories in the United States and Canada between June 30 and July 19, 2003. Twenty-two…

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rodenbeck, Christopher T.; Young, Derek; Chou, Tina

A combined radar and telemetry system is described. The combined radar and telemetry system includes a processing unit that executes instructions, where the instructions define a radar waveform and a telemetry waveform. The processor outputs a digital baseband signal based upon the instructions, where the digital baseband signal is based upon the radar waveform and the telemetry waveform. A radar and telemetry circuit transmits, simultaneously, a radar signal and telemetry signal based upon the digital baseband signal.

Accelerating Harmonization in Digital Health.

PubMed

Moore, Carolyn; Werner, Laurie; BenDor, Amanda Puckett; Bailey, Mike; Khan, Nighat

2017-01-01

Digital tools play an important role in supporting front-line health workers who deliver primary care. This paper explores the current state of efforts undertaken to move away from single-purpose applications of digital health towards integrated systems and solutions that align with national strategies. Through examples from health information systems, data and health worker training, this paper demonstrates how governments and stakeholders are working to integrate digital health services. We emphasize three factors as crucial for this integration: development and implementation of national digital health strategies; technical interoperability and collaborative approaches to ensure that digital health has an impact on the primary care level. Consolidation of technologies will enable an integrated, scaleable approach to the use of digital health to support health workers. As this edition explores a paradigm shift towards harmonization in primary healthcare systems, this paper explores complementary efforts undertaken to move away from single-purpose applications of digital health towards integrated systems and solutions that align with national strategies. It describes a paradigm shift towards integrated and interoperable systems that respond to health workers' needs in training, data and health information; and calls for the consolidation and integration of digital health tools and approaches across health areas, functions and levels of the health system. It then considers the critical factors that must be in place to support this paradigm shift. This paper aims not only to describe steps taken to move from fractured pilots to effective systems, but to propose a new perspective focused on consolidation and collaboration guided by national digital health strategies.

A digital transducer and digital microphone using an optical technique

NASA Astrophysics Data System (ADS)

Ghelmansarai, F. A.

1996-09-01

A transducer is devised to measure pressure, displacements or angles by optical means. This transducer delivers a digital output without relying on interferometry techniques or analogue-to-digital converters. This device is based on an optical scanner and an optical detector. An inter-digital photoconductive detector (IDPC) is employed that delivers a series of pulses, whose number depends on the scan length. A pre-objective scanning configuration is used that allows for the possibility of a flat image plane. The optical scanner provides scanning of IDPC and the generated scan length is proportional to the measurand.

Conversion of cardiac performance data in analog form for digital computer entry

NASA Technical Reports Server (NTRS)

Miller, R. L.

1972-01-01

A system is presented which will reduce analog cardiac performance data and convert the results to digital form for direct entry into a commercial time-shared computer. Circuits are discussed which perform the measurement and digital conversion of instantaneous systolic and diastolic parameters from the analog blood pressure waveform. Digital averaging over a selected number of heart cycles is performed on these measurements, as well as those of flow and heart rate. The determination of average cardiac output and peripheral resistance, including trends, is the end result after processing by digital computer.

One Output Function: A Misconception of Students Studying Digital Systems--A Case Study

ERIC Educational Resources Information Center

Trotskovsky, E.; Sabag, N.

2015-01-01

Background: Learning processes are usually characterized by students' misunderstandings and misconceptions. Engineering educators intend to help their students overcome their misconceptions and achieve correct understanding of the concept. This paper describes a misconception in digital systems held by many students who believe that combinational…

Generating nonlinear FM chirp radar signals by multiple integrations

DOEpatents

Doerry, Armin W [Albuquerque, NM

2011-02-01

A phase component of a nonlinear frequency modulated (NLFM) chirp radar pulse can be produced by performing digital integration operations over a time interval defined by the pulse width. Each digital integration operation includes applying to a respectively corresponding input parameter value a respectively corresponding number of instances of digital integration.

Signals and circuits in the purkinje neuron.

PubMed

Abrams, Zéev R; Zhang, Xiang

2011-01-01

Purkinje neurons (PN) in the cerebellum have over 100,000 inputs organized in an orthogonal geometry, and a single output channel. As the sole output of the cerebellar cortex layer, their complex firing pattern has been associated with motor control and learning. As such they have been extensively modeled and measured using tools ranging from electrophysiology and neuroanatomy, to dynamic systems and artificial intelligence methods. However, there is an alternative approach to analyze and describe the neuronal output of these cells using concepts from electrical engineering, particularly signal processing and digital/analog circuits. By viewing the PN as an unknown circuit to be reverse-engineered, we can use the tools that provide the foundations of today's integrated circuits and communication systems to analyze the Purkinje system at the circuit level. We use Fourier transforms to analyze and isolate the inherent frequency modes in the PN and define three unique frequency ranges associated with the cells' output. Comparing the PN to a signal generator that can be externally modulated adds an entire level of complexity to the functional role of these neurons both in terms of data analysis and information processing, relying on Fourier analysis methods in place of statistical ones. We also re-describe some of the recent literature in the field, using the nomenclature of signal processing. Furthermore, by comparing the experimental data of the past decade with basic electronic circuitry, we can resolve the outstanding controversy in the field, by recognizing that the PN can act as a multivibrator circuit.

Highly-Integrated CMOS Interface Circuits for SiPM-Based PET Imaging Systems.

PubMed

Dey, Samrat; Lewellen, Thomas K; Miyaoka, Robert S; Rudell, Jacques C

2012-01-01

Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. The increased detector density requires a proportionally larger number of channels to interface the SiPM array with the backend digital signal processing necessary for eventual image reconstruction. This work presents a CMOS ASIC design for signal reducing readout electronics in support of an 8×8 silicon photomultiplier array. The row/column/diagonal summation circuit significantly reduces the number of required channels, reducing the cost of subsequent digitizing electronics. Current amplifiers are used with a single input from each SiPM cathode. This approach helps to reduce the detector loading, while generating all the necessary row, column and diagonal addressing information. In addition, the single current amplifier used in our Pulse-Positioning architecture facilitates the extraction of pulse timing information. Other components under design at present include a current-mode comparator which enables threshold detection for dark noise current reduction, a transimpedance amplifier and a variable output impedance I/O driver which adapts to a wide range of loading conditions between the ASIC and lines with the off-chip Analog-to-Digital Converters (ADCs).

Highly-Integrated CMOS Interface Circuits for SiPM-Based PET Imaging Systems

PubMed Central

Dey, Samrat; Lewellen, Thomas K.; Miyaoka, Robert S.; Rudell, Jacques C.

2013-01-01

Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. The increased detector density requires a proportionally larger number of channels to interface the SiPM array with the backend digital signal processing necessary for eventual image reconstruction. This work presents a CMOS ASIC design for signal reducing readout electronics in support of an 8×8 silicon photomultiplier array. The row/column/diagonal summation circuit significantly reduces the number of required channels, reducing the cost of subsequent digitizing electronics. Current amplifiers are used with a single input from each SiPM cathode. This approach helps to reduce the detector loading, while generating all the necessary row, column and diagonal addressing information. In addition, the single current amplifier used in our Pulse-Positioning architecture facilitates the extraction of pulse timing information. Other components under design at present include a current-mode comparator which enables threshold detection for dark noise current reduction, a transimpedance amplifier and a variable output impedance I/O driver which adapts to a wide range of loading conditions between the ASIC and lines with the off-chip Analog-to-Digital Converters (ADCs). PMID:24301987

Real Time Digital Control of a Magnetostrictive Actuator

NASA Technical Reports Server (NTRS)

Zrostlik, Rick L.; Hall, David L.; Flatau, Alison B.

1996-01-01

The use of the magnetostrictive material Terfenol-D as a motion source in active vibration control (AVC) systems are being studied. Currently it is of limited use due to the nonlinear nature of the strain versus magnetization curve and the magnetic hysteresis in the Terfenol-D. One manifestation of these nonlinearities is waveform distortion in the output velocity of the transducer. For Terfenol-D to be used in ever greater numbers of AVC systems, these nonlinearities must be addressed. In this study the nonlinearities are treated as disturbances to a linear system. The acceleration output is used in simple analog and digital feedback control schemes to improve linearity of the transducer. In addition, the use of a Terfenol-D actuator in an AVC system is verified. Both analog and digital controllers are implemented and results compared. A cantilever beam system is considered for AVC applications. The second thrust of this presentation is the reduction of harmonic distortions. Two conclusions can be reached from this work. One, the linearization of Terfenol-D transducers is possible with the use of feedback controllers, both digital and analog. Second, Terfenol-D is a viable motion source in active vibration control systems utilizing either analog or digital controllers.

The mini-O, a digital superhet, or a truly low-cost Omega navigation receiver

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1975-01-01

A quartz tuning fork filter circuit and some unique CMOS clock logic methods provide a very simple OMEGA-VLF receiver with true hyperbolic station pair phase difference outputs. An experimental system was implemented on a single battery-operated circuit board requiring only an external antenna preamplifier, and LOP output recorder. A bench evaluation and preliminary navigation tests indicate the technique is viable and can provide very low-cost OMEGA measurement systems. The method is promising for marine use with small boats in the present form, but might be implemented in conjunction with digital microprocessors for airborne navigation aids.

RDBE Development and Progress

NASA Astrophysics Data System (ADS)

Neill, A.; Bark, M.; Beaudoin, C.; Brisken, W.; Ben Frej, H.; Doeleman, S.; Durand, S.; Guerra, Ml; Hinton, A.; Luce, M.; McWhirter, R.; Morris, K.; Peck, G.; Revnell, M.; Rogers, A.; Romney, J.; Ruszczyk, C; Taveniku, M.; Walker, R.; Whitney, A.

2010-12-01

A digital backend based on the ROACH board has been developed jointly by the National Radio Astronomy Observatory and MIT Haystack Observatory. The RDBE will have both Polyphase Filterbank and Digital Downconverter personalities. The initial configuration outputs sixteen 32-MHz channels, comprised of half the channels from the PFB processing of the two IF inputs, for use in the VLBI2010 geodetic system and in the VLBA sensitivity upgrade project. The output rate is 2x10^9 bits/second (1x10^9 bits/sec = 1 Gbps) over a 10 GigE connection to the Mark 5C with the data written in Mark 5B format on disk.

RDBE Development and Progress

NASA Technical Reports Server (NTRS)

Niell, A.; Bark, M.; Beaudoin, C.; Brisken, W.; Frej, H. Ben; Doeleman, S.; Durand, S.; Guerra, M.; Hinton, A.; Luce, M.;

A wideband, high-resolution spectrum analyzer

NASA Technical Reports Server (NTRS)

Quirk, M. P.; Wilck, H. C.; Garyantes, M. F.; Grimm, M. J.

1988-01-01

A two-million-channel, 40 MHz bandwidth, digital spectrum analyzer under development at the Jet Propulsion Laboratory is described. The analyzer system will serve as a prototype processor for the sky survey portion of NASA's Search for Extraterrestrial Intelligence program and for other applications in the Deep Space Network. The analyzer digitizes an analog input, performs a 2 (sup 21) point Discrete Fourier Transform, accumulates the output power, normalizes the output to remove frequency-dependent gain, and automates simple signal detection algorithms. Due to its built-in frequency-domain processing functions and configuration flexibility, the analyzer is a very powerful tool for real-time signal analysis.

A wide-band high-resolution spectrum analyzer

NASA Technical Reports Server (NTRS)

Quirk, Maureen P.; Garyantes, Michael F.; Wilck, Helmut C.; Grimm, Michael J.

1988-01-01

A two-million-channel, 40 MHz bandwidth, digital spectrum analyzer under development at the Jet Propulsion Laboratory is described. The analyzer system will serve as a prototype processor for the sky survey portion of NASA's Search for Extraterrestrial Intelligence program and for other applications in the Deep Space Network. The analyzer digitizes an analog input, performs a 2 (sup 21) point Discrete Fourier Transform, accumulates the output power, normalizes the output to remove frequency-dependent gain, and automates simple detection algorithms. Due to its built-in frequency-domain processing functions and configuration flexibility, the analyzer is a very powerful tool for real-time signal analysis.

A wide-band high-resolution spectrum analyzer.

PubMed

Quirk, M P; Garyantes, M F; Wilck, H C; Grimm, M J

1988-12-01

This paper describes a two-million-channel 40-MHz-bandwidth, digital spectrum analyzer under development at the Jet Propulsion Laboratory. The analyzer system will serve as a prototype processor for the sky survey portion of NASA's Search for Extraterrestrial Intelligence program and for other applications in the Deep Space Network. The analyzer digitizes an analog input, performs a 2(21)-point, Discrete Fourier Transform, accumulates the output power, normalizes the output to remove frequency-dependent gain, and automates simple signal detection algorithms. Due to its built-in frequency-domain processing functions and configuration flexibility, the analyzer is a very powerful tool for real-time signal analysis and detection.

Demonstration of multi-wavelength tunable fiber lasers based on a digital micromirror device processor.

PubMed

Ai, Qi; Chen, Xiao; Tian, Miao; Yan, Bin-bin; Zhang, Ying; Song, Fei-jun; Chen, Gen-xiang; Sang, Xin-zhu; Wang, Yi-quan; Xiao, Feng; Alameh, Kamal

2015-02-01

Based on a digital micromirror device (DMD) processor as the multi-wavelength narrow-band tunable filter, we demonstrate a multi-port tunable fiber laser through experiments. The key property of this laser is that any lasing wavelength channel from any arbitrary output port can be switched independently over the whole C-band, which is only driven by single DMD chip flexibly. All outputs display an excellent tuning capacity and high consistency in the whole C-band with a 0.02 nm linewidth, 0.055 nm wavelength tuning step, and side-mode suppression ratio greater than 60 dB. Due to the automatic power control and polarization design, the power uniformity of output lasers is less than 0.008 dB and the wavelength fluctuation is below 0.02 nm within 2 h at room temperature.

Memory-based frame synchronizer. [for digital communication systems

NASA Technical Reports Server (NTRS)

Stattel, R. J.; Niswander, J. K. (Inventor)

1981-01-01

A frame synchronizer for use in digital communications systems wherein data formats can be easily and dynamically changed is described. The use of memory array elements provide increased flexibility in format selection and sync word selection in addition to real time reconfiguration ability. The frame synchronizer comprises a serial-to-parallel converter which converts a serial input data stream to a constantly changing parallel data output. This parallel data output is supplied to programmable sync word recognizers each consisting of a multiplexer and a random access memory (RAM). The multiplexer is connected to both the parallel data output and an address bus which may be connected to a microprocessor or computer for purposes of programming the sync word recognizer. The RAM is used as an associative memory or decorder and is programmed to identify a specific sync word. Additional programmable RAMs are used as counter decoders to define word bit length, frame word length, and paragraph frame length.

Electrical Design and Evaluation of Asynchronous Serial Bus Communication Network of 48 Sensor Platform LSIs with Single-Ended I/O for Integrated MEMS-LSI Sensors.

PubMed

Shao, Chenzhong; Tanaka, Shuji; Nakayama, Takahiro; Hata, Yoshiyuki; Muroyama, Masanori

2018-01-15

For installing many sensors in a limited space with a limited computing resource, the digitization of the sensor output at the site of sensation has advantages such as a small amount of wiring, low signal interference and high scalability. For this purpose, we have developed a dedicated Complementary Metal-Oxide-Semiconductor (CMOS) Large-Scale Integration (LSI) (referred to as "sensor platform LSI") for bus-networked Micro-Electro-Mechanical-Systems (MEMS)-LSI integrated sensors. In this LSI, collision avoidance, adaptation and event-driven functions are simply implemented to relieve data collision and congestion in asynchronous serial bus communication. In this study, we developed a network system with 48 sensor platform LSIs based on Printed Circuit Board (PCB) in a backbone bus topology with the bus length being 2.4 m. We evaluated the serial communication performance when 48 LSIs operated simultaneously with the adaptation function. The number of data packets received from each LSI was almost identical, and the average sampling frequency of 384 capacitance channels (eight for each LSI) was 73.66 Hz.

Gigahertz frequency comb from a diode-pumped solid-state laser.

PubMed

Klenner, Alexander; Schilt, Stéphane; Südmeyer, Thomas; Keller, Ursula

2014-12-15

We present the first stabilization of the frequency comb offset from a diode-pumped gigahertz solid-state laser oscillator. No additional external amplification and/or compression of the output pulses is required. The laser is reliably modelocked using a SESAM and is based on a diode-pumped Yb:CALGO gain crystal. It generates 1.7-W average output power and pulse durations as short as 64 fs at a pulse repetition rate of 1 GHz. We generate an octave-spanning supercontinuum in a highly nonlinear fiber and use the standard f-to-2f carrier-envelope offset (CEO) frequency f_CEO detection method. As a pump source, we use a reliable and cost-efficient commercial diode laser. Its multi-spatial-mode beam profile leads to a relatively broad frequency comb offset beat signal, which nevertheless can be phase-locked by feedback to its current. Using improved electronics, we reached a feedback-loop-bandwidth of up to 300 kHz. A combination of digital and analog electronics is used to achieve a tight phase-lock of f_CEO to an external microwave reference with a low in-loop residual integrated phase-noise of 744 mrad in an integration bandwidth of [1 Hz, 5 MHz]. An analysis of the laser noise and response functions is presented which gives detailed insights into the CEO stabilization of this frequency comb.

Bio-inspired optical rotation sensor

NASA Astrophysics Data System (ADS)

O'Carroll, David C.; Shoemaker, Patrick A.; Brinkworth, Russell S. A.

2007-01-01

Traditional approaches to calculating self-motion from visual information in artificial devices have generally relied on object identification and/or correlation of image sections between successive frames. Such calculations are computationally expensive and real-time digital implementation requires powerful processors. In contrast flies arrive at essentially the same outcome, the estimation of self-motion, in a much smaller package using vastly less power. Despite the potential advantages and a few notable successes, few neuromorphic analog VLSI devices based on biological vision have been employed in practical applications to date. This paper describes a hardware implementation in aVLSI of our recently developed adaptive model for motion detection. The chip integrates motion over a linear array of local motion processors to give a single voltage output. Although the device lacks on-chip photodetectors, it includes bias circuits to use currents from external photodiodes, and we have integrated it with a ring-array of 40 photodiodes to form a visual rotation sensor. The ring configuration reduces pattern noise and combined with the pixel-wise adaptive characteristic of the underlying circuitry, permits a robust output that is proportional to image rotational velocity over a large range of speeds, and is largely independent of either mean luminance or the spatial structure of the image viewed. In principle, such devices could be used as an element of a velocity-based servo to replace or augment inertial guidance systems in applications such as mUAVs.

On-chip microsystems in silicon: opportunities and limitations

NASA Astrophysics Data System (ADS)

Wolffenbuttel, R. F.

1996-03-01

Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

An Economic Analysis of Two Groundwater Allocation Programs for the Salinas Valley

DTIC Science & Technology

1994-06-01

monitoring system would establish a definable and 17Each individual well would have a frequency generator, analog/ digital converter, microprocessor with...RTU). The cost for purchasing and installing the frequency generator is estimated to be $1,100. The RTU consists of an analog/ digital converter and a...programmable microprocessor that can accept up to eight inputs and one output. The unit can transmit and receive digital data via LAN network or

Development and testing of methodology for evaluating the performance of multi-input/multi-output digital control systems

NASA Technical Reports Server (NTRS)

Polotzky, Anthony S.; Wieseman, Carol; Hoadley, Sherwood Tiffany; Mukhopadhyay, Vivek

1990-01-01

The development of a controller performance evaluation (CPE) methodology for multiinput/multioutput digital control systems is described. The equations used to obtain the open-loop plant, controller transfer matrices, and return-difference matrices are given. Results of applying the CPE methodology to evaluate MIMO digital flutter suppression systems being tested on an active flexible wing wind-tunnel model are presented to demonstrate the CPE capability.

Nads FSK Modem, LEA 74-2248

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, K.R.

1976-01-12

The Nads FSK Modem is a compact unit designed to operate in conjunction with EIA standard interfacing and the data terminal equipment of the 1200 Baud digital communications network of the Nevada Automated Diagnostics System (NADS). The modem is constructed in a Nuclear Instrumentation Module System (NIMS) module for compatability with the NADS system. The modulator section of the modem accepts serial, digital signals at 1200 Baud which may be either standard TTL levels or bipolar signals meeting either the EIA RS-232C or RS-232B standards. The output of the modulator is a Frequency-Shift Keyed (FSK) signal having frequencies of 2.2more » kHz for Mark and 1.2 kHz for Space. The demodulator section accepts the above FSK signal as input, and outputs serial, digital signals at 1200 Baud at either TTL or EIA RS-232C levels. Specifications and operation and calibration instructions are given. (WHK)« less

Subranging technique using superconducting technology

DOEpatents

Gupta, Deepnarayan

2003-01-01

Subranging techniques using "digital SQUIDs" are used to design systems with large dynamic range, high resolution and large bandwidth. Analog-to-digital converters (ADCs) embodying the invention include a first SQUID based "coarse" resolution circuit and a second SQUID based "fine" resolution circuit to convert an analog input signal into "coarse" and "fine" digital signals for subsequent processing. In one embodiment, an ADC includes circuitry for supplying an analog input signal to an input coil having at least a first inductive section and a second inductive section. A first superconducting quantum interference device (SQUID) is coupled to the first inductive section and a second SQUID is coupled to the second inductive section. The first SQUID is designed to produce "coarse" (large amplitude, low resolution) output signals and the second SQUID is designed to produce "fine" (low amplitude, high resolution) output signals in response to the analog input signals.

Receiver-Coupling Schemes Based On Optimal-Estimation Theory

NASA Technical Reports Server (NTRS)

Kumar, Rajendra

1992-01-01

Two schemes for reception of weak radio signals conveying digital data via phase modulation provide for mutual coupling of multiple receivers, and coherent combination of outputs of receivers. In both schemes, optimal mutual-coupling weights computed according to Kalman-filter theory, but differ in manner of transmission and combination of outputs of receivers.

A compact perspiration meter system with capacitive humidity sensor for wearable health-care applications

NASA Astrophysics Data System (ADS)

Mitani, Yusuke; Miyaji, Kousuke; Kaneko, Satoshi; Uekura, Takaharu; Momose, Hideya; Johguchi, Koh

2018-04-01

This paper presents a compact wearable perspiration meter system using a 180-nm CMOS technology. With custom chip and board design, the proposed perspiration meter, which can measure a qualitative sweating rate, is integrated into 15 × 20 mm2. From the experimental results, the capacitances of the humidity sensors with analog-to-digital converter and band-gap reference circuits can operate accurately without hysteresis. In addition, a demonstration with simulated human skin is carried out to investigate the sensor’s performance under real environments. The proposed perspiration meter can output values equivalent to a conventional meter. As a result, it is verified that the proposed system can be used as a human sweat sensor for wearable application.

Diagnostic analysis of observed and numerically simulated cloud and precipitation structures during pre-ERICA

NASA Technical Reports Server (NTRS)

Perkey, Donald J.; Doty, Kevin G.; Robertson, Franklin R.

1989-01-01

A preliminary 140-km simulation of a rapid cyclogenesis, using the Limited Area Mesoscale Prediction System (LAMPS) is discussed. A three-dimensional version of LAMPS used in the simulation is described, along with a trajectory model utilizing the three-hourly output history files from the LAMPS model. Preliminary integrations of the LAMPS code as well as passive microwave digital data from SSM/I aboard the DMSP satellite are used for exploring the evolving baroclinic structure and moisture field of the cyclone event. A trajectory analysis of the model histories reveals a significant role for preconditioning of the low-level upstream air, which is then drawn into the ascending warm conveyor belt ahead of the storm.

The MAP program: building the digital terrain model.

Treesearch

R.H. Twito; R.W. Mifflin; R.J. McGaughey

1987-01-01

PLANS, a software package for integrated timber-harvest planning, uses digital terrain models to provide the topographic data needed to fit harvest and transportation designs to specific terrain. MAP, an integral program in the PLANS package, is used to construct the digital terrain models required by PLANS. MAP establishes digital terrain models using digitizer-traced...

Simple algorithms for digital pulse-shape discrimination with liquid scintillation detectors

NASA Astrophysics Data System (ADS)

Alharbi, T.

2015-01-01

The development of compact, battery-powered digital liquid scintillation neutron detection systems for field applications requires digital pulse processing (DPP) algorithms with minimum computational overhead. To meet this demand, two DPP algorithms for the discrimination of neutron and γ-rays with liquid scintillation detectors were developed and examined by using a NE213 liquid scintillation detector in a mixed radiation field. The first algorithm is based on the relation between the amplitude of a current pulse at the output of a photomultiplier tube and the amount of charge contained in the pulse. A figure-of-merit (FOM) value of 0.98 with 450 keVee (electron equivalent energy) energy threshold was achieved with this method when pulses were sampled at 250 MSample/s and with 8-bit resolution. Compared to the similar method of charge-comparison this method requires only a single integration window, thereby reducing the amount of computations by approximately 40%. The second approach is a digital version of the trailing-edge constant-fraction discrimination method. A FOM value of 0.84 with an energy threshold of 450 keVee was achieved with this method. In comparison with the similar method of rise-time discrimination this method requires a single time pick-off, thereby reducing the amount of computations by approximately 50%. The algorithms described in this work are useful for developing portable detection systems for applications such as homeland security, radiation dosimetry and environmental monitoring.

Multisensory integration in complete unawareness: evidence from audiovisual congruency priming.

PubMed

Faivre, Nathan; Mudrik, Liad; Schwartz, Naama; Koch, Christof

2014-11-01

Multisensory integration is thought to require conscious perception. Although previous studies have shown that an invisible stimulus could be integrated with an audible one, none have demonstrated integration of two subliminal stimuli of different modalities. Here, pairs of identical or different audiovisual target letters (the sound /b/ with the written letter "b" or "m," respectively) were preceded by pairs of masked identical or different audiovisual prime digits (the sound /6/ with the written digit "6" or "8," respectively). In three experiments, awareness of the audiovisual digit primes was manipulated, such that participants were either unaware of the visual digit, the auditory digit, or both. Priming of the semantic relations between the auditory and visual digits was found in all experiments. Moreover, a further experiment showed that unconscious multisensory integration was not obtained when participants did not undergo prior conscious training of the task. This suggests that following conscious learning, unconscious processing suffices for multisensory integration. © The Author(s) 2014.

Development of wide band digital receiver for atmospheric radars using COTS board based SDR

NASA Astrophysics Data System (ADS)

Yasodha, Polisetti; Jayaraman, Achuthan; Thriveni, A.

2016-07-01

Digital receiver extracts the received echo signal information, and is a potential subsystem for atmospheric radar, also referred to as wind profiling radar (WPR), which provides the vertical profiles of 3-dimensional wind vector in the atmosphere. This paper presents the development of digital receiver using COTS board based Software Defined Radio technique, which can be used for atmospheric radars. The developmental work is being carried out at National Atmospheric Research Laboratory (NARL), Gadanki. The digital receiver consists of a commercially available software defined radio (SDR) board called as universal software radio peripheral B210 (USRP B210) and a personal computer. USRP B210 operates over a wider frequency range from 70 MHz to 6 GHz and hence can be used for variety of radars like Doppler weather radars operating in S/C bands, in addition to wind profiling radars operating in VHF, UHF and L bands. Due to the flexibility and re-configurability of SDR, where the component functionalities are implemented in software, it is easy to modify the software to receive the echoes and process them as per the requirement suitable for the type of the radar intended. Hence, USRP B210 board along with the computer forms a versatile digital receiver from 70 MHz to 6 GHz. It has an inbuilt direct conversion transceiver with two transmit and two receive channels, which can be operated in fully coherent 2x2 MIMO fashion and thus it can be used as a two channel receiver. Multiple USRP B210 boards can be synchronized using the pulse per second (PPS) input provided on the board, to configure multi-channel digital receiver system. RF gain of the transceiver can be varied from 0 to 70 dB. The board can be controlled from the computer via USB 3.0 interface through USRP hardware driver (UHD), which is an open source cross platform driver. The USRP B210 board is connected to the personal computer through USB 3.0. Reference (10 MHz) clock signal from the radar master oscillator is used to lock the board, which is essential for deriving Doppler information. Input from the radar analog receiver is given to one channel of USRP B210, which is down converted to baseband. 12-bit ADC present on the board digitizes the signal and produces I (in-phase) and Q (quadrature-phase) data. The maximum sampling rate possible is about 61 MSPS. The I and Q (time series) data is sent to PC via USB 3.0, where the signal processing is carried out. The online processing steps include decimation, range gating, decoding, coherent integration and FFT computation (optional). The processed data is then stored in the hard disk. C++ programming language is used for developing the real time signal processing. Shared memory along with multi threading is used to collect and process data simultaneously. Before implementing the real time operation, stand alone test of the board was carried out through GNU radio software and the base band output data obtained is found satisfactory. Later the board is integrated with the existing Lower Atmospheric Wind Profiling radar at NARL. The radar receive IF output at 70 MHz is given to the board and the real-time radar data is collected. The data is processed off-line and the range-doppler spectrum is obtained. Online processing software is under progress.

47 CFR 74.795 - Digital low power TV and TV translator transmission system facilities.

Code of Federal Regulations, 2010 CFR

2010-10-01

... (CONTINUED) BROADCAST RADIO SERVICES EXPERIMENTAL RADIO, AUXILIARY, SPECIAL BROADCAST AND OTHER PROGRAM... transmitter shall be designed to produce digital television signals that can be satisfactorily viewed on...., average power over a 6 MHz channel) and shall be designed to prevent the power output from exceeding the...

47 CFR 74.795 - Digital low power TV and TV translator transmission system facilities.

Code of Federal Regulations, 2013 CFR

2013-10-01

... (CONTINUED) BROADCAST RADIO SERVICES EXPERIMENTAL RADIO, AUXILIARY, SPECIAL BROADCAST AND OTHER PROGRAM... transmitter shall be designed to produce digital television signals that can be satisfactorily viewed on...., average power over a 6 MHz channel) and shall be designed to prevent the power output from exceeding the...

47 CFR 74.795 - Digital low power TV and TV translator transmission system facilities.

Code of Federal Regulations, 2012 CFR

2012-10-01

... (CONTINUED) BROADCAST RADIO SERVICES EXPERIMENTAL RADIO, AUXILIARY, SPECIAL BROADCAST AND OTHER PROGRAM... transmitter shall be designed to produce digital television signals that can be satisfactorily viewed on...., average power over a 6 MHz channel) and shall be designed to prevent the power output from exceeding the...

47 CFR 74.795 - Digital low power TV and TV translator transmission system facilities.

Code of Federal Regulations, 2011 CFR

2011-10-01

... (CONTINUED) BROADCAST RADIO SERVICES EXPERIMENTAL RADIO, AUXILIARY, SPECIAL BROADCAST AND OTHER PROGRAM... transmitter shall be designed to produce digital television signals that can be satisfactorily viewed on...., average power over a 6 MHz channel) and shall be designed to prevent the power output from exceeding the...

47 CFR 74.795 - Digital low power TV and TV translator transmission system facilities.

Code of Federal Regulations, 2014 CFR

2014-10-01

... (CONTINUED) BROADCAST RADIO SERVICES EXPERIMENTAL RADIO, AUXILIARY, SPECIAL BROADCAST AND OTHER PROGRAM... transmitter shall be designed to produce digital television signals that can be satisfactorily viewed on...., average power over a 6 MHz channel) and shall be designed to prevent the power output from exceeding the...

Optical Disk for Digital Storage and Retrieval Systems.

ERIC Educational Resources Information Center

Rose, Denis A.

1983-01-01

Availability of low-cost digital optical disks will revolutionize storage and retrieval systems over next decade. Three major factors will effect this change: availability of disks and controllers at low-cost and in plentiful supply; availability of low-cost and better output means for system users; and more flexible, less expensive communication…

Rounding Technique for High-Speed Digital Signal Processing

NASA Technical Reports Server (NTRS)

Wechsler, E. R.

1983-01-01

Arithmetic technique facilitates high-speed rounding of 2's complement binary data. Conventional rounding of 2's complement numbers presents problems in high-speed digital circuits. Proposed technique consists of truncating K + 1 bits then attaching bit in least significant position. Mean output error is zero, eliminating introducing voltage offset at input.

Design of a hybrid receiver for the OLYMPUS spacecraft beacons

NASA Technical Reports Server (NTRS)

Sweeney, D. G.; Mckeeman, J. C.

1990-01-01

The theory and design of a hybrid analogue/digital receiver which acquires and monitors the OLYMPUS satellite beacons is presented. The analogue portion of this receiver uses a frequency locked loop for signal tracking. A digital sampling detector operating at IF is used to obtain the I and Q outputs.

Development of Software to Digitize Historic Hardcopy Seismograms from Nuclear Explosions

DTIC Science & Technology

2010-09-01

portion. As will be discussed below, this complicates the preparation of the image for subsequent digitization because background threshold values are...is the output image and  −1 < β ≤ 0 is a user selectable parameter. Global contrast enhancement uses a whitening transform to make a given image

A Digital Computer Simulation of Cardiovascular and Renal Physiology.

ERIC Educational Resources Information Center

Tidball, Charles S.

1979-01-01

Presents the physiological MACPEE, one of a family of digital computer simulations used in Canada and Great Britain. A general description of the model is provided, along with a sample of computer output format, options for making interventions, advanced capabilities, an evaluation, and technical information for running a MAC model. (MA)

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection.

PubMed

He, Diwei; Morgan, Stephen P; Trachanis, Dimitrios; van Hese, Jan; Drogoudis, Dimitris; Fummi, Franco; Stefanni, Francesco; Guarnieri, Valerio; Hayes-Gill, Barrie R

2015-07-14

Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1%) with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

PubMed Central

He, Diwei; Morgan, Stephen P.; Trachanis, Dimitrios; van Hese, Jan; Drogoudis, Dimitris; Fummi, Franco; Stefanni, Francesco; Guarnieri, Valerio; Hayes-Gill, Barrie R.

2015-01-01

Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1%) with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring. PMID:26184225

MP3 compression of Doppler ultrasound signals.

PubMed

Poepping, Tamie L; Gill, Jeremy; Fenster, Aaron; Holdsworth, David W

2003-01-01

The effect of lossy, MP3 compression on spectral parameters derived from Doppler ultrasound (US) signals was investigated. Compression was tested on signals acquired from two sources: 1. phase quadrature and 2. stereo audio directional output. A total of 11, 10-s acquisitions of Doppler US signal were collected from each source at three sites in a flow phantom. Doppler signals were digitized at 44.1 kHz and compressed using four grades of MP3 compression (in kilobits per second, kbps; compression ratios in brackets): 1400 kbps (uncompressed), 128 kbps (11:1), 64 kbps (22:1) and 32 kbps (44:1). Doppler spectra were characterized by peak velocity, mean velocity, spectral width, integrated power and ratio of spectral power between negative and positive velocities. The results suggest that MP3 compression on digital Doppler US signals is feasible at 128 kbps, with a resulting 11:1 compression ratio, without compromising clinically relevant information. Higher compression ratios led to significant differences for both signal sources when compared with the uncompressed signals. Copyright 2003 World Federation for Ultrasound in Medicine & Biology

A compact, multichannel, and low noise arbitrary waveform generator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Govorkov, S.; Ivanov, B. I.; Novosibirsk State Technical University, K.Marx-Ave. 20, Novosibirsk 630092

2014-05-15

A new type of high functionality, fast, compact, and easy programmable arbitrary waveform generator for low noise physical measurements is presented. The generator provides 7 fast differential waveform channels with a maximum bandwidth up to 200 MHz frequency. There are 6 fast pulse generators on the generator board with 78 ps time resolution in both duration and delay, 3 of them with amplitude control. The arbitrary waveform generator is additionally equipped with two auxiliary slow 16 bit analog-to-digital converters and four 16 bit digital-to-analog converters for low frequency applications. Electromagnetic shields are introduced to the power supply, digital, and analogmore » compartments and with a proper filter design perform more than 110 dB digital noise isolation to the output signals. All the output channels of the board have 50 Ω SubMiniature version A termination. The generator board is suitable for use as a part of a high sensitive physical equipment, e.g., fast read out and manipulation of nuclear magnetic resonance or superconducting quantum systems and any other application, which requires electromagnetic interference free fast pulse and arbitrary waveform generation.« less

Method and system for providing precise multi-function modulation

NASA Technical Reports Server (NTRS)

Davarian, Faramaz (Inventor); Sumida, Joe T. (Inventor)

1989-01-01

A method and system is disclosed which provides precise multi-function digitally implementable modulation for a communication system. The invention provides a modulation signal for a communication system in response to an input signal from a data source. A digitized time response is generated from samples of a time domain representation of a spectrum profile of a selected modulation scheme. The invention generates and stores coefficients for each input symbol in accordance with the selected modulation scheme. The output signal is provided by a plurality of samples, each sample being generated by summing the products of a predetermined number of the coefficients and a predetermined number of the samples of the digitized time response. In a specific illustrative implementation, the samples of the output signals are converted to analog signals, filtered and used to modulate a carrier in a conventional manner. The invention is versatile in that it allows for the storage of the digitized time responses and corresponding coefficient lookup table of a number of modulation schemes, any of which may then be selected for use in accordance with the teachings of the invention.

ATCA digital controller hardware for vertical stabilization of plasmas in tokamaks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Batista, A. J. N.; Sousa, J.; Varandas, C. A. F.

2006-10-15

The efficient vertical stabilization (VS) of plasmas in tokamaks requires a fast reaction of the VS controller, for example, after detection of edge localized modes (ELM). For controlling the effects of very large ELMs a new digital control hardware, based on the Advanced Telecommunications Computing Architecture trade mark sign (ATCA), is being developed aiming to reduce the VS digital control loop cycle (down to an optimal value of 10 {mu}s) and improve the algorithm performance. The system has 1 ATCA trade mark sign processor module and up to 12 ATCA trade mark sign control modules, each one with 32 analogmore » input channels (12 bit resolution), 4 analog output channels (12 bit resolution), and 8 digital input/output channels. The Aurora trade mark sign and PCI Express trade mark sign communication protocols will be used for data transport, between modules, with expected latencies below 2 {mu}s. Control algorithms are implemented on a ix86 based processor with 6 Gflops and on field programmable gate arrays with 80 GMACS, interconnected by serial gigabit links in a full mesh topology.« less

Simulation of continuously logical base cells (CL BC) with advanced functions for analog-to-digital converters and image processors

NASA Astrophysics Data System (ADS)

Krasilenko, Vladimir G.; Lazarev, Alexander A.; Nikitovich, Diana V.

2017-10-01

The paper considers results of design and modeling of continuously logical base cells (CL BC) based on current mirrors (CM) with functions of preliminary analogue and subsequent analogue-digital processing for creating sensor multichannel analog-to-digital converters (SMC ADCs) and image processors (IP). For such with vector or matrix parallel inputs-outputs IP and SMC ADCs it is needed active basic photosensitive cells with an extended electronic circuit, which are considered in paper. Such basic cells and ADCs based on them have a number of advantages: high speed and reliability, simplicity, small power consumption, high integration level for linear and matrix structures. We show design of the CL BC and ADC of photocurrents and their various possible implementations and its simulations. We consider CL BC for methods of selection and rank preprocessing and linear array of ADCs with conversion to binary codes and Gray codes. In contrast to our previous works here we will dwell more on analogue preprocessing schemes for signals of neighboring cells. Let us show how the introduction of simple nodes based on current mirrors extends the range of functions performed by the image processor. Each channel of the structure consists of several digital-analog cells (DC) on 15-35 CMOS. The amount of DC does not exceed the number of digits of the formed code, and for an iteration type, only one cell of DC, complemented by the device of selection and holding (SHD), is required. One channel of ADC with iteration is based on one DC-(G) and SHD, and it has only 35 CMOS transistors. In such ADCs easily parallel code can be realized and also serial-parallel output code. The circuits and simulation results of their design with OrCAD are shown. The supply voltage of the DC is 1.8÷3.3V, the range of an input photocurrent is 0.1÷24μA, the transformation time is 20÷30nS at 6-8 bit binary or Gray codes. The general power consumption of the ADC with iteration is only 50÷100μW, if the maximum input current is 4μA. Such simple structure of linear array of ADCs with low power consumption and supply voltage 3.3V, and at the same time with good dynamic characteristics (frequency of digitization even for 1.5μm CMOS-technologies is 40÷50 MHz, and can be increased up to 10 times) and accuracy characteristics are show. The SMC ADCs based on CL BC and CM opens new prospects for realization of linear and matrix IP and photo-electronic structures with matrix operands, which are necessary for neural networks, digital optoelectronic processors, neural-fuzzy controllers.

Hybridizing triboelectrification and electromagnetic induction effects for high-efficient mechanical energy harvesting.

PubMed

Hu, Youfan; Yang, Jin; Niu, Simiao; Wu, Wenzhuo; Wang, Zhong Lin

2014-07-22

The recently introduced triboelectric nanogenerator (TENG) and the traditional electromagnetic induction generator (EMIG) are coherently integrated in one structure for energy harvesting and vibration sensing/isolation. The suspended structure is based on two oppositely oriented magnets that are enclosed by hollow cubes surrounded with coils, which oscillates in response to external disturbance and harvests mechanical energy simultaneously from triboelectrification and electromagnetic induction. It extends the previous definition of hybrid cell to harvest the same type of energy with multiple approaches. Both the sliding-mode TENG and contact-mode TENG can be achieved in the same structure. In order to make the TENG and EMIG work together, transformers are used to match the output impedance between these two power sources with very different characteristics. The maximum output power of 7.7 and 1.9 mW on the same load of 5 kΩ was obtained for the TENG and EMIG, respectively, after impedance matching. Benefiting from the rational design, the output signal from the TENG and the EMIG are in phase. They can be added up directly to get an output voltage of 4.6 V and an output current of 2.2 mA in parallel connection. A power management circuit was connected to the hybrid cell, and a regulated voltage of 3.3 V with constant current was achieved. For the first time, a logic operation was carried out on a half-adder circuit by using the hybrid cell working as both the power source and the input digit signals. We also demonstrated that the hybrid cell can serve as a vibration isolator. Further applications as vibration dampers, triggers, and sensors are all promising.

Digital signal processing in the radio science stability analyzer

NASA Technical Reports Server (NTRS)

Greenhall, C. A.

1995-01-01

The Telecommunications Division has built a stability analyzer for testing Deep Space Network installations during flight radio science experiments. The low-frequency part of the analyzer operates by digitizing wave signals with bandwidths between 80 Hz and 45 kHz. Processed outputs include spectra of signal, phase, amplitude, and differential phase; time series of the same quantities; and Allan deviation of phase and differential phase. This article documents the digital signal-processing methods programmed into the analyzer.

Digital I and C system upgrade integration technique

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, H. W.; Shih, C.; Wang, J. R.

2012-07-01

This work developed an integration technique for digital I and C system upgrade, the utility can replace the I and C systems step by step systematically by this method. Inst. of Nuclear Energy Research (INER) developed a digital Instrumentation and Control (I and C) replacement integration technique on the basis of requirement of the three existing nuclear power plants (NPPs), which are Chin-Shan (CS) NPP, Kuo-Sheng (KS) NPP, and Maanshan (MS) NPP, in Taiwan, and also developed the related Critical Digital Review (CDR) Procedure. The digital I and C replacement integration technique includes: (I) Establishment of Nuclear Power Plant Digitalmore » Replacement Integration Guideline, (2) Preliminary Investigation on I and C System Digitalization, (3) Evaluation on I and C System Digitalization, and (4) Establishment of I and C System Digitalization Architectures. These works can be a reference for performing I and C system digital replacement integration of the three existing NPPs of Taiwan Power Company (TPC). A CDR is the review for a critical system digital I and C replacement. The major reference of this procedure is EPRI TR- 1011710 (2005) 'Handbook for Evaluating Critical Digital Equipment and Systems' which was published by the Electric Power Research Inst. (EPRI). With this document, INER developed a TPC-specific CDR procedure. Currently, CDR becomes one of the policies for digital I and C replacement in TPC. The contents of this CDR procedure include: Scope, Responsibility, Operation Procedure, Operation Flow Chart, CDR review items. The CDR review items include the comparison of the design change, Software Verification and Validation (SVandV), Failure Mode and Effects Analysis (FMEA), Evaluation of Diversity and Defense-in-depth (D3), Evaluation of Watchdog Timer, Evaluation of Electromagnetic Compatibility (EMC), Evaluation of Grounding for System/Component, Seismic Evaluation, Witness and Inspection, Lessons Learnt from the Digital I and C Failure Events. A solid review can assure the quality of the digital I and C system replacement. (authors)« less

Protecting Digital Evidence Integrity by Using Smart Cards

NASA Astrophysics Data System (ADS)

Saleem, Shahzad; Popov, Oliver

RFC 3227 provides general guidelines for digital evidence collection and archiving, while the International Organization on Computer Evidence offers guidelines for best practice in the digital forensic examination. In the light of these guidelines we will analyze integrity protection mechanism provided by EnCase and FTK which is mainly based on Message Digest Codes (MDCs). MDCs for integrity protection are not tamper proof, hence they can be forged. With the proposed model for protecting digital evidence integrity by using smart cards (PIDESC) that establishes a secure platform for digitally signing the MDC (in general for a whole range of cryptographic services) in combination with Public Key Cryptography (PKC), one can show that this weakness might be overcome.

Electro-optical processing of phased array data

NASA Technical Reports Server (NTRS)

Casasent, D.

1973-01-01

An on-line spatial light modulator for application as the input transducer for a real-time optical data processing system is described. The use of such a device in the analysis and processing of radar data in real time is reported. An interface from the optical processor to a control digital computer was designed, constructed, and tested. The input transducer, optical system, and computer interface have been operated in real time with real time radar data with the input data returns recorded on the input crystal, processed by the optical system, and the output plane pattern digitized, thresholded, and outputted to a display and storage in the computer memory. The correlation of theoretical and experimental results is discussed.

Digital output compensation for precise frequency transfer over commercial fiber link

NASA Astrophysics Data System (ADS)

Ci, Cheng; Wu, Hong; Tang, Ran; Liu, Bo; Chen, Xing; Zhang, Xue-song; Zhang, Yu; Zhao, Ying-xin

2018-03-01

An ultra-highly precise and long-term stable frequency transmission system over 120 km commercial fiber link has been proposed and experimentally demonstrated. This system is based on digital output compensation technique to suppress phase fluctuations during the frequency transmission process. A mode-locked erbium-doped fiber laser driven by a hydrogen maser serves as an optical transmitter. Moreover, a dense wavelength division multiplexing system is able to separate forward and backward signals with reflection effect excluded. The ultimate fractional frequency instabilities for the long-distance frequency distributed system are up to 3.14×10-15 at 1 s and 2.96×10-19 at 10 000 s, respectively.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Petersen, T.; Diamond, J.; Liu, N.

The readout electronics for the resonant beam position monitors (BPMs) in the Fermilab Switchyard (SY) have been upgraded, utilizing a low noise amplifier transition board and Fermilab designed digitizer boards. The stripline BPMs are estimated to have an average signal output of between -110 dBm and -80 dBm, with an estimated peak output of -70 dBm. The external resonant circuit is tuned to the SY machine frequency of 53.10348 MHz. Both the digitizer and transition boards have variable gain in order to accommodate the large dynamic range and irregularity of the resonant extraction spill. These BPMs will aid in auto-tuningmore » of the SY beamline as well as enabling operators to monitor beam position through the spill.« less

A real-time pulsed photon dosimeter

NASA Astrophysics Data System (ADS)

Brown, David; Olsher, Richard H.; Eisen, Yosef; Rodriguez, Joseph F.

1996-02-01

Radiation sources producing short pulses of photon radiation are now widespread. Such sources include electron and proton linear accelerators, betatrons, synchrotrons, and field-emission impulse generators. It is often desirable to measure leakage and skyshine radiation from such sources in real time, on a single-pulse basis as low as 8.7 nGy (1 μR) per pulse. This paper describes the design and performance of a prototype, real-time, pulsed photon dosimeter (PPD) capable of single-pulse dose measurements over the range from 3.5 nGy to 3.5 μGy (0.4 to 400 μR). The PPD may also be operated in a multiple-pulse mode that integrates the dose from a train of radiation pulses over a 3-s period. A pulse repetition rate of up to 300 Hz is accommodated. The design is eminently suitable for packaging as a lightweight, portable, survey meter. The PPD uses a CdWO 4 scintillator optically coupled to a photodiode to generate a charge at the diode output. A pulse amplifier converts the charge to a voltage pulse. A digitizer circuit generates a burst of logic pulses whose number is proportional to the peak value of the voltage pulse. The digitizer output is recorded by a pulse counter and suitably displayed. A prototype PPD was built for testing and evaluation purposes. The performance of the PPD was evaluated with a variety of pulsed photon sources. The dynamic range, energy response, and response to multiple pulses were characterized. The experimental data confirm the viability of the PPD for pulsed photon dosimetry.

Light-Gated Memristor with Integrated Logic and Memory Functions.

PubMed

Tan, Hongwei; Liu, Gang; Yang, Huali; Yi, Xiaohui; Pan, Liang; Shang, Jie; Long, Shibing; Liu, Ming; Wu, Yihong; Li, Run-Wei

2017-11-28

Memristive devices are able to store and process information, which offers several key advantages over the transistor-based architectures. However, most of the two-terminal memristive devices have fixed functions once made and cannot be reconfigured for other situations. Here, we propose and demonstrate a memristive device "memlogic" (memory logic) as a nonvolatile switch of logic operations integrated with memory function in a single light-gated memristor. Based on nonvolatile light-modulated memristive switching behavior, a single memlogic cell is able to achieve optical and electrical mixed basic Boolean logic of reconfigurable "AND", "OR", and "NOT" operations. Furthermore, the single memlogic cell is also capable of functioning as an optical adder and digital-to-analog converter. All the memlogic outputs are memristive for in situ data storage due to the nonvolatile resistive switching and persistent photoconductivity effects. Thus, as a memdevice, the memlogic has potential for not only simplifying the programmable logic circuits but also building memristive multifunctional optoelectronics.

An integrated control and readout circuit for implantable multi-target electrochemical biosensing.

PubMed

Ghoreishizadeh, Sara S; Baj-Rossi, Camilla; Cavallini, Andrea; Carrara, Sandro; De Micheli, Giovanni

2014-12-01

We describe an integrated biosensor capable of sensing multiple molecular targets using both cyclic voltammetry (CV) and chronoamperometry (CA). In particular, we present our custom IC to realize voltage control and current readout of the biosensors. A mixed-signal circuit block generates sub-Hertz triangular waveform for the biosensors by means of a direct-digital-synthesizer to control CV. A current to pulse-width converter is realized to output the data for CA measurement. The IC is fabricated in 0.18 μm technology. It consumes 220 μW from 1.8 V supply voltage, making it suitable for remotely-powered applications. Electrical measurements show excellent linearity in sub- μA current range. Electrochemical measurements including CA measurements of glucose and lactate and CV measurements of the anti-cancer drug Etoposide have been acquired with the fabricated IC and compared with a commercial equipment. The results obtained with the fabricated IC are in good agreement with those of the commercial equipment for both CV and CA measurements.

VMM - An ASIC for Micropattern Detectors

NASA Astrophysics Data System (ADS)

Iakovidis, George

2018-02-01

The VMM is a custom Application Specific Integrated Circuit (ASIC) that can be used in a variety of charge interpolating tracking detectors. It is designed to be used with the resistive strip micromegas and sTGC detectors in the New Small Wheel upgrade of the ATLAS Muon spectrometer. The ASIC is designed at Brookhaven National Laboratory and fabricated in the 130 nm Global Foundries 8RF-DM process. It is packaged in a Ball Grid Array with outline dimensions of 21×21 mm2. It integrates 64 channels, each providing charge amplification, discrimination, neighbour logic, amplitude and timing measurements, analog-to-digital conversions, and either direct output for trigger or multiplexed readout. The front-end amplifier can operate with a wide range of input capacitances, has adjustable polarity, gain and peaking time. The VMM1 and VMM2 are the first two versions of the VMM ASIC family fabricated in 2012 and 2014 respectively. The design, tests and qualification of the VMM1, VMM2 and roadmap to VMM3 are described.

Analysis and Preliminary Design of an Advanced Technology Transport Flight Control System

NASA Technical Reports Server (NTRS)

Frazzini, R.; Vaughn, D.

1975-01-01

The analysis and preliminary design of an advanced technology transport aircraft flight control system using avionics and flight control concepts appropriate to the 1980-1985 time period are discussed. Specifically, the techniques and requirements of the flight control system were established, a number of candidate configurations were defined, and an evaluation of these configurations was performed to establish a recommended approach. Candidate configurations based on redundant integration of various sensor types, computational methods, servo actuator arrangements and data-transfer techniques were defined to the functional module and piece-part level. Life-cycle costs, for the flight control configurations, as determined in an operational environment model for 200 aircraft over a 15-year service life, were the basis of the optimum configuration selection tradeoff. The recommended system concept is a quad digital computer configuration utilizing a small microprocessor for input/output control, a hexad skewed set of conventional sensors for body rate and body acceleration, and triple integrated actuators.

Compact time- and space-integrating SAR processor: performance analysis

NASA Astrophysics Data System (ADS)

Haney, Michael W.; Levy, James J.; Michael, Robert R., Jr.; Christensen, Marc P.

1995-06-01

Progress made during the previous 12 months toward the fabrication and test of a flight demonstration prototype of the acousto-optic time- and space-integrating real-time SAR image formation processor is reported. Compact, rugged, and low-power analog optical signal processing techniques are used for the most computationally taxing portions of the SAR imaging problem to overcome the size and power consumption limitations of electronic approaches. Flexibility and performance are maintained by the use of digital electronics for the critical low-complexity filter generation and output image processing functions. The results reported for this year include tests of a laboratory version of the RAPID SAR concept on phase history data generated from real SAR high-resolution imagery; a description of the new compact 2D acousto-optic scanner that has a 2D space bandwidth product approaching 106 sports, specified and procured for NEOS Technologies during the last year; and a design and layout of the optical module portion of the flight-worthy prototype.

Detection of Citrus Trees from Uav Dsms

NASA Astrophysics Data System (ADS)

Ok, A. O.; Ozdarici-Ok, A.

2017-05-01

This paper presents an automated approach to detect citrus trees from digitals surface models (DSMs) as a single source. The DSMs in this study are generated from Unmanned Aerial Vehicles (UAVs), and the proposed approach first considers the symmetric nature of the citrus trees, and it computes the orientation-based radial symmetry in an efficient way. The approach also takes into account the local maxima (LM) information to verify the output of the radial symmetry. Our contributions in this study are twofold: (i) Such an integrated approach (symmetry + LM) has not been tested to detect (citrus) trees (in orchards), and (ii) the validity of such an integrated approach has not been experienced for an input, e.g. a single DSM. Experiments are performed on five test patches. The results reveal that our approach is capable of counting most of the citrus trees without manual intervention. Comparison to the state-of-the-art reveals that the proposed approach provides notable detection performance by providing the best balance between precision and recall measures.

Non-synchronous control of self-oscillating resonant converters

DOEpatents

Glaser, John Stanley; Zane, Regan Andrew

2002-01-01

A self-oscillating switching power converter has a controllable reactance including an active device connected to a reactive element, wherein the effective reactance of the reactance and the active device is controlled such that the control waveform for the active device is binary digital and is not synchronized with the switching converter output frequency. The active device is turned completely on and off at a frequency that is substantially greater than the maximum frequency imposed on the output terminals of the active device. The effect is to vary the average resistance across the active device output terminals, and thus the effective output reactance, thereby providing converter output control, while maintaining the response speed of the converter.

Integrated optical XY coupler

DOEpatents

Vawter, G. Allen; Hadley, G. Ronald

1997-01-01

An integrated optical XY coupler having two converging input waveguide arms meeting in a central section and a central output waveguide arm and two diverging flanking output waveguide arms emanating from the central section. In-phase light from the input arms constructively interfers in the central section to produce a single mode output in the central output arm with the rest of the light being collected in the flanking output arms. Crosstalk between devices on a substrate is minimized by this collection of the out-of-phase light by the flanking output arms of the XY coupler.

Integrated optical XY coupler

DOEpatents

Vawter, G.A.; Hadley, G.R.

1997-05-06

An integrated optical XY coupler having two converging input waveguide arms meeting in a central section and a central output waveguide arm and two diverging flanking output waveguide arms emanating from the central section. In-phase light from the input arms constructively interferes in the central section to produce a single mode output in the central output arm with the rest of the light being collected in the flanking output arms. Crosstalk between devices on a substrate is minimized by this collection of the out-of-phase light by the flanking output arms of the XY coupler. 9 figs.

Technique for improving the quality of images from digital cameras using ink-jet printers and smoothed RGB transfer curves

NASA Astrophysics Data System (ADS)

Sampat, Nitin; Grim, John F.; O'Hara, James E.

1998-04-01

The digital camera market is growing at an explosive rate. At the same time, the quality of photographs printed on ink- jet printers continues to improve. Most of the consumer cameras are designed with the monitor as the target output device and ont the printer. When a user is printing his images from a camera, he/she needs to optimize the camera and printer combination in order to maximize image quality. We describe the details of one such method for improving image quality using a AGFA digital camera and an ink jet printer combination. Using Adobe PhotoShop, we generated optimum red, green and blue transfer curves that match the scene content to the printers output capabilities. Application of these curves to the original digital image resulted in a print with more shadow detail, no loss of highlight detail, a smoother tone scale, and more saturated colors. The image also exhibited an improved tonal scale and visually more pleasing images than those captured and printed without any 'correction'. While we report the results for one camera-printer combination we tested this technique on numbers digital cameras and printer combinations and in each case produced a better looking image. We also discuss the problems we encountered in implementing this technique.

The digital compensation technology system for automotive pressure sensor

NASA Astrophysics Data System (ADS)

Guo, Bin; Li, Quanling; Lu, Yi; Luo, Zai

2011-05-01

Piezoresistive pressure sensor be made of semiconductor silicon based on Piezoresistive phenomenon, has many characteristics. But since the temperature effect of semiconductor, the performance of silicon sensor is also changed by temperature, and the pressure sensor without temperature drift can not be produced at present. This paper briefly describe the principles of sensors, the function of pressure sensor and the various types of compensation method, design the detailed digital compensation program for automotive pressure sensor. Simulation-Digital mixed signal conditioning is used in this dissertation, adopt signal conditioning chip MAX1452. AVR singlechip ATMEGA128 and other apparatus; fulfill the design of digital pressure sensor hardware circuit and singlechip hardware circuit; simultaneously design the singlechip software; Digital pressure sensor hardware circuit is used to implementing the correction and compensation of sensor; singlechip hardware circuit is used to implementing to controll the correction and compensation of pressure sensor; singlechip software is used to implementing to fulfill compensation arithmetic. In the end, it implement to measure the output of sensor, and contrast to the data of non-compensation, the outcome indicates that the compensation precision of compensated sensor output is obviously better than non-compensation sensor, not only improving the compensation precision but also increasing the stabilization of pressure sensor.

Iterative learning-based decentralized adaptive tracker for large-scale systems: a digital redesign approach.

PubMed

Tsai, Jason Sheng-Hong; Du, Yan-Yi; Huang, Pei-Hsiang; Guo, Shu-Mei; Shieh, Leang-San; Chen, Yuhua

2011-07-01

In this paper, a digital redesign methodology of the iterative learning-based decentralized adaptive tracker is proposed to improve the dynamic performance of sampled-data linear large-scale control systems consisting of N interconnected multi-input multi-output subsystems, so that the system output will follow any trajectory which may not be presented by the analytic reference model initially. To overcome the interference of each sub-system and simplify the controller design, the proposed model reference decentralized adaptive control scheme constructs a decoupled well-designed reference model first. Then, according to the well-designed model, this paper develops a digital decentralized adaptive tracker based on the optimal analog control and prediction-based digital redesign technique for the sampled-data large-scale coupling system. In order to enhance the tracking performance of the digital tracker at specified sampling instants, we apply the iterative learning control (ILC) to train the control input via continual learning. As a result, the proposed iterative learning-based decentralized adaptive tracker not only has robust closed-loop decoupled property but also possesses good tracking performance at both transient and steady state. Besides, evolutionary programming is applied to search for a good learning gain to speed up the learning process of ILC. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

Application of digital control techniques for satellite medium power DC-DC converters

NASA Astrophysics Data System (ADS)

Skup, Konrad R.; Grudzinski, Pawel; Nowosielski, Witold; Orleanski, Piotr; Wawrzaszek, Roman

2010-09-01

The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter bases on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage mode stabilization that was implemented using VHDL. The described controllers are a classical digital PID controller and a bang-bang controller. The used converter for testing is a simple model of 5-20 W, 200 kHz buck power converter. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

FPGA-Based Filterbank Implementation for Parallel Digital Signal Processing

NASA Technical Reports Server (NTRS)

Berner, Stephan; DeLeon, Phillip

1999-01-01

One approach to parallel digital signal processing decomposes a high bandwidth signal into multiple lower bandwidth (rate) signals by an analysis bank. After processing, the subband signals are recombined into a fullband output signal by a synthesis bank. This paper describes an implementation of the analysis and synthesis banks using (Field Programmable Gate Arrays) FPGAs.

[Correlation of noises in the channels of digital X-ray receiver-transformer and the evaluation of registration's quant efficiency].

PubMed

Porosev, V V; Shekhtman, L I; Zelikman, M I; Blinov, N N

2004-01-01

Theoretical and experimental research results related with the influence of correlation of signals in neighboring elements of digital X-ray receiver-transformer produced on the evaluation of the output ratio noise/signal and, as a consequence, on the evaluation of quantum registration efficiency are described in the paper.

Digital Marketing: The Time for a New "Academic Major" Has Arrived

ERIC Educational Resources Information Center

Wymbs, Cliff

2011-01-01

The rapidly emerging digital economy is challenging the relevance of existing marketing practices, and a radical redesign of the marketing curriculum consistent with the emerging student and business needs of the 21st century is required. To remain relevant to our students and to the ultimate consumers of our output, businesses, the marketing…

Microsatellite Digital Magnetometer SMILE - Present State and Future Trends

NASA Astrophysics Data System (ADS)

Belyayev, Serhiy; Ivchenko, Nickolay

2010-05-01

The fluxgate magnetometers (FGM) are probably the most widespread instruments used onboard spacecrafts for both scientific and service purposes. The recent trend to decrease the weight and size of the spacecrafts requires creating as small as possible but enough sensitive FGM. A joint Swedish-Ukrainian team made the development of such a magnetometer and as the result the Small Magnetometer In Low mass Experiment (SMILE) - a digital fluxgate microsatellite magnetometer - was created [1]. Majority of electronic units of this FGM were combined in a digital integrated circuit - a Field Programmable Gate Array (FPGA). The FPGA provides full processing (determined by a digital correlation algorithm) of amplified and digitized fluxgate sensor output signals and provides both FGM output data and feedback signals. Such digital design makes the instrument very flexible, reduces power consumption and opens possibilities for customization of the operation modes. It allows miniaturizing the electronic unit and, together with the smallest in the world low noise three-component fluxgate sensor with the side dimension of 20 mm and weight about 20 grams only, the small but enough sensitive space qualified FGM is created. SMILE magnetometer was successfully flown onboard the NASA Cascades-2 sounding rocket, and is to fly in the LAPLander package onboard the ESA REXUS-8 student sounding rocket [2]. Unfortunately, such a design of electronic circuit does not allow us to realize all possibilities of the miniature sensor. The separate tests of the sensor with highest-class analog electronics showed that its noise level may be reduced to as low value as 10…15 picoTesla at 1 Hz. Also the use of volume compensation in the sensor provides high geometrical stability of the axes and improved performance compared to component compensated sensors. The measured parameters appear to be comparable or even better than these of best stationary FGM and, if realized in small enough volume and weight, such a sensitive but small FGM could be a good candidate for planned Lunar missions where the weight is the major restriction factor. This stimulated further research in the direction of the analysis and elimination of noise sources of digital design, as well as of the optimization of FGM electronic circuit structure. The description of the obtained results of the electronic unit upgrade and recent FGM model tests are given and future improvement directions are discussed. These works are partially supported by NSAU contract No. 1499. References: 1. Åke Forslund, Serhiy Belyayev, Nickolay Ivchenko, Göran Olsson, Terry Edberg and Andriy Marusenkov, Miniaturized digital fluxgate magnetometer for small spacecraft applications 2008 Meas. Sci. Technol. 19 2. T. Sundberg, N. Ivchenko, D. Borglund, P. Ahlen, M. Gustavsson, C. Jonsson, J. Juhlen, O. Neunet, J. Sandstrom, E. Sund, M. Wartelski, C. Westlund, L. Xin, Small Recoverable Payload for Deployable Sounding Rocket Experiments. ESA Special Publication SP671

Highly integrated digital electronic control: Digital flight control, aircraft model identification, and adaptive engine control

NASA Technical Reports Server (NTRS)

Baer-Riedhart, Jennifer L.; Landy, Robert J.

1987-01-01

The highly integrated digital electronic control (HIDEC) program at NASA Ames Research Center, Dryden Flight Research Facility is a multiphase flight research program to quantify the benefits of promising integrated control systems. McDonnell Aircraft Company is the prime contractor, with United Technologies Pratt and Whitney Aircraft, and Lear Siegler Incorporated as major subcontractors. The NASA F-15A testbed aircraft was modified by the HIDEC program by installing a digital electronic flight control system (DEFCS) and replacing the standard F100 (Arab 3) engines with F100 engine model derivative (EMD) engines equipped with digital electronic engine controls (DEEC), and integrating the DEEC's and DEFCS. The modified aircraft provides the capability for testing many integrated control modes involving the flight controls, engine controls, and inlet controls. This paper focuses on the first two phases of the HIDEC program, which are the digital flight control system/aircraft model identification (DEFCS/AMI) phase and the adaptive engine control system (ADECS) phase.

[Interface interconnection and data integration in implementing of digital operating room].

PubMed

Feng, Jingyi; Chen, Hua; Liu, Jiquan

2011-10-01

The digital operating-room, with highly integrated clinical information, is very important for rescuing lives of patients and improving quality of operations. Since equipments in domestic operating-rooms have diversified interface and nonstandard communication protocols, designing and implementing an integrated data sharing program for different kinds of diagnosing, monitoring, and treatment equipments become a key point in construction of digital operating room. This paper addresses interface interconnection and data integration for commonly used clinical equipments from aspects of hardware interface, interface connection and communication protocol, and offers a solution for interconnection and integration of clinical equipments in heterogeneous environment. Based on the solution, a case of an optimal digital operating-room is presented in this paper. Comparing with the international solution for digital operating-room, the solution proposed in this paper is more economical and effective. And finally, this paper provides a proposal for the platform construction of digital perating-room as well as a viewpoint for standardization of domestic clinical equipments.

Hardware realization of an SVM algorithm implemented in FPGAs

NASA Astrophysics Data System (ADS)

Wiśniewski, Remigiusz; Bazydło, Grzegorz; Szcześniak, Paweł

2017-08-01

The paper proposes a technique of hardware realization of a space vector modulation (SVM) of state function switching in matrix converter (MC), oriented on the implementation in a single field programmable gate array (FPGA). In MC the SVM method is based on the instantaneous space-vector representation of input currents and output voltages. The traditional computation algorithms usually involve digital signal processors (DSPs) which consumes the large number of power transistors (18 transistors and 18 independent PWM outputs) and "non-standard positions of control pulses" during the switching sequence. Recently, hardware implementations become popular since computed operations may be executed much faster and efficient due to nature of the digital devices (especially concurrency). In the paper, we propose a hardware algorithm of SVM computation. In opposite to the existing techniques, the presented solution applies COordinate Rotation DIgital Computer (CORDIC) method to solve the trigonometric operations. Furthermore, adequate arithmetic modules (that is, sub-devices) used for intermediate calculations, such as code converters or proper sectors selectors (for output voltages and input current) are presented in detail. The proposed technique has been implemented as a design described with the use of Verilog hardware description language. The preliminary results of logic implementation oriented on the Xilinx FPGA (particularly, low-cost device from Artix-7 family from Xilinx was used) are also presented.

Hardware synthesis from DDL. [Digital Design Language for computer aided design and test of LSI

NASA Technical Reports Server (NTRS)

Shah, A. M.; Shiva, S. G.

1981-01-01

The details of the digital systems can be conveniently input into the design automation system by means of Hardware Description Languages (HDL). The Computer Aided Design and Test (CADAT) system at NASA MSFC is used for the LSI design. The Digital Design Language (DDL) has been selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. This paper addresses problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system.

Estimates of emergency operating capacity in U.S. manufacturing industries: 1994--2005

DOE Office of Scientific and Technical Information (OSTI.GOV)

Belzer, D.B.

1997-02-01

To develop integrated policies for mobilization preparedness, planners require estimates and projections of available productive capacity during national emergency conditions. This report develops projections of national emergency operating capacity (EOC) for 458 US manufacturing industries at the 4-digit Standard Industrial Classification (SIC) level. These measures are intended for use in planning models that are designed to predict the demands for detailed industry sectors that would occur under conditions such as a military mobilization or a major national disaster. This report is part of an ongoing series of studies prepared by the Pacific Northwest National Laboratory to support mobilization planning studiesmore » of the Federal Emergency Planning Agency/US Department of Defense (FEMA/DOD). Earlier sets of EOC estimates were developed in 1985 and 1991. This study presents estimates of EOC through 2005. As in the 1991 study, projections of capacity were based upon extrapolations of equipment capital stocks. The methodology uses time series regression models based on industry data to obtain a response function of industry capital stock to levels of industrial output. The distributed lag coefficients of these response function are then used with projected outputs to extrapolate the 1994 level of EOC. Projections of industrial outputs were taken from the intermediate-term forecast of the US economy prepared by INFORUM (Interindustry Forecasting Model, University of Maryland) in the spring of 1996.« less

Quiet Clean Short-haul Experimental Engine (QCSEE) over-the-wing control system design report

NASA Technical Reports Server (NTRS)

1977-01-01

A control system incorporating a digital electronic control was designed for the over-the-wing engine. The digital electronic control serves as the primary controlling element for engine fuel flow and core compressor stator position. It also includes data monitoring capability, a unique failure indication and corrective action feature, and optional provisions for operating with a new type of servovalve designed to operate in response to a digital-type signal and to fail with its output device hydraulically locked into position.

An approach to the optical MSD adder

NASA Astrophysics Data System (ADS)

Takahashi, Hideya; Matsushita, Kenji; Shimizu, Eiji

1990-07-01

The intrinsic parallelism of optical elements for computation is presently taken fuller advantage of than heretofore possible through an optical implementation of the modified signed digit (MSD) number system, which yields carry-free addition and subtraction. In the present optical implementation of the MSD system, optical phase data are used to preclude negative value representation. Attention is given to an MSD adder array for addition operations on two n-digit trinary numbers; the output is composed of n + 1 trinary digits.

The novel application of Benford's second order analysis for monitoring radiation output in interventional radiology.

PubMed

Cournane, S; Sheehy, N; Cooke, J

2014-06-01

Benford's law is an empirical observation which predicts the expected frequency of digits in naturally occurring datasets spanning multiple orders of magnitude, with the law having been most successfully applied as an audit tool in accountancy. This study investigated the sensitivity of the technique in identifying system output changes using simulated changes in interventional radiology Dose-Area-Product (DAP) data, with any deviations from Benford's distribution identified using z-statistics. The radiation output for interventional radiology X-ray equipment is monitored annually during quality control testing; however, for a considerable portion of the year an increased output of the system, potentially caused by engineering adjustments or spontaneous system faults may go unnoticed, leading to a potential increase in the radiation dose to patients. In normal operation recorded examination radiation outputs vary over multiple orders of magnitude rendering the application of normal statistics ineffective for detecting systematic changes in the output. In this work, the annual DAP datasets complied with Benford's first order law for first, second and combinations of the first and second digits. Further, a continuous 'rolling' second order technique was devised for trending simulated changes over shorter timescales. This distribution analysis, the first employment of the method for radiation output trending, detected significant changes simulated on the original data, proving the technique useful in this case. The potential is demonstrated for implementation of this novel analysis for monitoring and identifying change in suitable datasets for the purpose of system process control. Copyright © 2013 Associazione Italiana di Fisica Medica. Published by Elsevier Ltd. All rights reserved.

Digitising legacy zoological taxonomic literature: Processes, products and using the output

PubMed Central

Lyal, Christopher H. C.

2016-01-01

Abstract By digitising legacy taxonomic literature using XML mark-up the contents become accessible to other taxonomic and nomenclatural information systems. Appropriate schemas need to be interoperable with other sectorial schemas, atomise to appropriate content elements and carry appropriate metadata to, for example, enable algorithmic assessment of availability of a name under the Code. Legacy (and new) literature delivered in this fashion will become part of a global taxonomic resource from which users can extract tailored content to meet their particular needs, be they nomenclatural, taxonomic, faunistic or other. To date, most digitisation of taxonomic literature has led to a more or less simple digital copy of a paper original – the output of the many efforts has effectively been an electronic copy of a traditional library. While this has increased accessibility of publications through internet access, the means by which many scientific papers are indexed and located is much the same as with traditional libraries. OCR and born-digital papers allow use of web search engines to locate instances of taxon names and other terms, but OCR efficiency in recognising taxonomic names is still relatively poor, people’s ability to use search engines effectively is mixed, and many papers cannot be searched directly. Instead of building digital analogues of traditional publications, we should consider what properties we require of future taxonomic information access. Ideally the content of each new digital publication should be accessible in the context of all previous published data, and the user able to retrieve nomenclatural, taxonomic and other data / information in the form required without having to scan all of the original papers and extract target content manually. This opens the door to dynamic linking of new content with extant systems: automatic population and updating of taxonomic catalogues, ZooBank and faunal lists, all descriptions of a taxon and its children instantly accessible with a single search, comparison of classifications used in different publications, and so on. A means to do this is through marking up content into XML, and the more atomised the mark-up the greater the possibilities for data retrieval and integration. Mark-up requires XML that accommodates the required content elements and is interoperable with other XML schemas, and there are now several written to do this, particularly TaxPub, taxonX and taXMLit, the last of these being the most atomised. We now need to automate this process as far as possible. Manual and automatic data and information retrieval is demonstrated by projects such as INOTAXA and Plazi. As we move to creating and using taxonomic products through the power of the internet, we need to ensure the output, while satisfying in its production the requirements of the Code, is fit for purpose in the future. PMID:26877659

Radiometer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Strickland, J. I.

1985-07-02

A radiometer of the switched type has an R.F. switch connecting a detector selectively either to an antenna whose temperature (in terms of noise energy) is to be determined, or to a reference temperature, i.e. a resistive termination. The detector output is passed through an amplifier whose gain is switched between positive and negative values (for example +1 and -1) synchronously with the R.F. switch. The output of the switched gain amplifier is integrated to produce a rising voltage when the gain is positive and a falling one when it is negative. When it is positive the detector is connectedmore » to the antenna. By means of a zero crossing detector, a counter is started when this voltage crosses zero. After a fixed period, the R.F. switch and switched gain amplifier are reversed by the counter to cause the voltage to fall in accordance with the temperature of the resistive termination. The zero crossing detector and a counter measure the time interval until the voltage again crosses zero, such time interval being compared to the fixed period to provide a comparison of the unknown and reference temperatures independent of the gain of the detector, which is a valuable improvement over prior radiometers. Also, by measuring time rather than voltage, the arrangement facilitates providing a digital output more suitable for storage and transmission of the data than the analog output of prior radiometers. The instrument, which is relatively simple, rugged and compact, lends itself well to unattended use in monitoring the effect of rain storms on transmission in the 11.7 to 12.2 GHz band employed for satelite communication.« less

Teachers' Beliefs about Integrating Digital Literacy into Classroom Practice: An Investigation Based on the Theory of Planned Behavior

ERIC Educational Resources Information Center

Sadaf, Ayesha; Johnson, Barbara L.

2017-01-01

This study explored teachers' behavioral, normative, and control beliefs related to digital literacy integration into their classrooms. Ajzen's Theory of Planned Behavior (TPB) was used as a theoretical framework to collect and analyze data. Findings revealed that teachers' integration of digital literacy were related to their behavioral beliefs…

RAPID: A random access picture digitizer, display, and memory system

NASA Technical Reports Server (NTRS)

Yakimovsky, Y.; Rayfield, M.; Eskenazi, R.

1976-01-01

RAPID is a system capable of providing convenient digital analysis of video data in real-time. It has two modes of operation. The first allows for continuous digitization of an EIA RS-170 video signal. Each frame in the video signal is digitized and written in 1/30 of a second into RAPID's internal memory. The second mode leaves the content of the internal memory independent of the current input video. In both modes of operation the image contained in the memory is used to generate an EIA RS-170 composite video output signal representing the digitized image in the memory so that it can be displayed on a monitor.

High density, multi-range analog output Versa Module Europa board for control system applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, Kundan, E-mail: kundan@iuac.res.in; Das, Ajit Lal

2014-01-15

A new VMEDAC64, 12-bit 64 channel digital-to-analog converter, a Versa Module Europa (VME) module, features 64 analog voltage outputs with user selectable multiple ranges, has been developed for control system applications at Inter University Accelerator Centre. The FPGA (Field Programmable Gate Array) is the module's core, i.e., it implements the DAC control logic and complexity of VMEbus slave interface logic. The VMEbus slave interface and DAC control logic are completely designed and implemented on a single FPGA chip to achieve high density of 64 channels in a single width VME module and will reduce the module count in the controlmore » system applications, and hence will reduce the power consumption and cost of overall system. One of our early design goals was to develop the VME interface such that it can be easily integrated with the peripheral devices and satisfy the timing specifications of VME standard. The modular design of this module reduces the amount of time required to develop other custom modules for control system. The VME slave interface is written as a single component inside FPGA which will be used as a basic building block for any VMEbus interface project. The module offers multiple output voltage ranges depending upon the requirement. The output voltage range can be reduced or expanded by writing range selection bits in the control register. The module has programmable refresh rate and by default hold capacitors in the sample and hold circuit for each channel are charged periodically every 7.040 ms (i.e., update frequency 284 Hz). Each channel has software controlled output switch which disconnects analog output from the field. The modularity in the firmware design on FPGA makes the debugging very easy. On-board DC/DC converters are incorporated for isolated power supply for the analog section of the board.« less

The Light-Emitting Diode as a Light Detector

ERIC Educational Resources Information Center

Baird, William H.; Hack, W. Nathan; Tran, Kiet; Vira, Zeeshan; Pickett, Matthew

2011-01-01

A light-emitting diode (LED) and operational amplifier can be used as an affordable method to provide a digital output indicating detection of an intense light source such as a laser beam or high-output LED. When coupled with a microcontroller, the combination can be used as a multiple photogate and timer for under $50. A similar circuit is used…

Input and Output Mechanisms and Devices. Phase I: Adding Voice Output to a Speaker-Independent Recognition System.

ERIC Educational Resources Information Center

Scott Instruments Corp., Denton, TX.

This project was designed to develop techniques for adding low-cost speech synthesis to educational software. Four tasks were identified for the study: (1) select a microcomputer with a built-in analog-to-digital converter that is currently being used in educational environments; (2) determine the feasibility of implementing expansion and playback…

High voltage electrical amplifier having a short rise time

DOEpatents

Christie, David J.; Dallum, Gregory E.

1991-01-01

A circuit, comprising an amplifier and a transformer is disclosed that produces a high power pulse having a fast response time, and that responds to a digital control signal applied through a digital-to-analog converter. The present invention is suitable for driving a component such as an electro-optic modulator with a voltage in the kilovolt range. The circuit is stable at high frequencies and during pulse transients, and its impedance matching circuit matches the load impedance with the output impedance. The preferred embodiment comprises an input stage compatible with high-speed semiconductor components for amplifying the voltage of the input control signal, a buffer for isolating the input stage from the output stage; and a plurality of current amplifiers connected to the buffer. Each current amplifier is connected to a field effect transistor (FET), which switches a high voltage power supply to a transformer which then provides an output terminal for driving a load. The transformer comprises a plurality of transmission lines connected to the FETs and the load. The transformer changes the impedance and voltage of the output. The preferred embodiment also comprises a low voltage power supply for biasing the FETs at or near an operational voltage.

Method for traceable measurement of LTE signals

NASA Astrophysics Data System (ADS)

Sunder Dash, Soumya; Pythoud, Frederic; Leuchtmann, Pascal; Leuthold, Juerg

2018-04-01

This contribution presents a reference setup to measure the power of the cell-specific resource elements present in downlink long term evolution (LTE) signals in a way that the measurements are traceable to the international system of units. This setup can be used to calibrate the LTE code-selective field probes that are used to measure the radiation of base stations for mobile telephony. It can also be used to calibrate LTE signal generators and receivers. The method is based on traceable scope measurements performed directly at the output of a measuring antenna. It implements offline digital signal processing demodulation algorithms that consider the digital down-conversion, timing synchronization, frequency synchronization, phase synchronization and robust LTE cell identification to produce the downlink time-frequency LTE grid. Experimental results on conducted test scenarios, both single-input-single-output and multiple-input-multiple-output antenna configuration, show promising results confirming measurement uncertainties of the order of 0.05 dB with a coverage factor of 2.

Integrated SeismoGeodetic Systsem with High-Resolution, Real-Time GNSS and Accelerometer Observation For Earthquake Early Warning Application.

NASA Astrophysics Data System (ADS)

Passmore, P. R.; Jackson, M.; Zimakov, L. G.; Raczka, J.; Davidson, P.

2014-12-01

The key requirements for Earthquake Early Warning and other Rapid Event Notification Systems are: Quick delivery of digital data from a field station to the acquisition and processing center; Data integrity for real-time earthquake notification in order to provide warning prior to significant ground shaking in the given target area. These two requirements are met in the recently developed Trimble SG160-09 SeismoGeodetic System, which integrates both GNSS and acceleration measurements using the Kalman filter algorithm to create a new high-rate (200 sps), real-time displacement with sufficient accuracy and very low latency for rapid delivery of the acquired data to a processing center. The data acquisition algorithm in the SG160-09 System provides output of both acceleration and displacement digital data with 0.2 sec delay. This is a significant reduction in the time interval required for real-time transmission compared to data delivery algorithms available in digitizers currently used in other Earthquake Early Warning networks. Both acceleration and displacement data are recorded and transmitted to the processing site in a specially developed Multiplexed Recording Format (MRF) that minimizes the bandwidth required for real-time data transmission. In addition, a built in algorithm calculates the τc and Pd once the event is declared. The SG160-09 System keeps track of what data has not been acknowledged and re-transmits the data giving priority to current data. Modified REF TEK Protocol Daemon (RTPD) receives the digital data and acknowledges data received without error. It forwards this "good" data to processing clients of various real-time data processing software including Earthworm and SeisComP3. The processing clients cache packets when a data gap occurs due to a dropped packet or network outage. The cache packet time is settable, but should not exceed 0.5 sec in the Earthquake Early Warning network configuration. The rapid data transmission algorithm was tested with different communication media, including Internet, DSL, Wi-Fi, GPRS, etc. The test results show that the data latency via most communication media do not exceed 0.5 sec nominal from a first sample in the data packet. Detailed acquisition algorithm and results of data transmission via different communication media are presented.

Electronics for a prototype variable field of view PET camera using the PMT-quadrant-sharing detector array

NASA Astrophysics Data System (ADS)

Li, H.; Wong, Wai-Hoi; Zhang, N.; Wang, J.; Uribe, J.; Baghaei, H.; Yokoyama, S.

1999-06-01

Electronics for a prototype high-resolution PET camera with eight position-sensitive detector modules has been developed. Each module has 16 BGO (Bi/sub 4/Ge/sub 3/O/sub 12/) blocks (each block is composed of 49 crystals). The design goals are component and space reduction. The electronics is composed of five parts: front-end analog processing, digital position decoding, fast timing, coincidence processing and master data acquisition. The front-end analog circuit is a zone-based structure (each zone has 3/spl times/3 PMTs). Nine ADCs digitize integration signals of an active zone identified by eight trigger clusters; each cluster is composed of six photomultiplier tubes (PMTs). A trigger corresponding to a gamma ray is sent to a fast timing board to obtain a time-mark, and the nine digitized signals are passed to the position decoding board, where a real block (four PMTs) can be picked out from the zone for position decoding. Lookup tables are used for energy discrimination and to identify the gamma-hit crystal location. The coincidence board opens a 70-ns initial timing window, followed by two 20-ns true/accidental time-mark lookup table windows. The data output from the coincidence board can be acquired either in sinogram mode or in list mode with a Motorola/IRONICS VME-based system.

Blood Glucose Meters and Accessibility to Blind and Visually Impaired People

PubMed Central

Burton, Darren M.; Enigk, Matthew G.; Lilly, John W.

2012-01-01

In 2007, five blood glucose meters (BGMs) were introduced with integrated speech output necessary for use by persons with vision loss. One of those five meters had fully integrated speech output, allowing a person with vision loss independence in accessing all features and functions of the meter. In comparison, 13 BGMs with integrated speech output were available in 2011. Accessibility attributes of these 11 meters were tabulated and product design features examined. All 13 meters were found to be usable by persons with vision loss to obtain a blood glucose measurement. However, only 4 of them featured the fully integrated speech output necessary for a person with vision loss to access all features and functions independently. PMID:22538131

Blood glucose meters and accessibility to blind and visually impaired people.

PubMed

Burton, Darren M; Enigk, Matthew G; Lilly, John W

2012-03-01

In 2007, five blood glucose meters (BGMs) were introduced with integrated speech output necessary for use by persons with vision loss. One of those five meters had fully integrated speech output, allowing a person with vision loss independence in accessing all features and functions of the meter. In comparison, 13 BGMs with integrated speech output were available in 2011. Accessibility attributes of these 11 meters were tabulated and product design features examined. All 13 meters were found to be usable by persons with vision loss to obtain a blood glucose measurement. However, only 4 of them featured the fully integrated speech output necessary for a person with vision loss to access all features and functions independently. © 2012 Diabetes Technology Society.

A method for the measurement and the statistical analysis of atmospheric turbulence

NASA Technical Reports Server (NTRS)

Tieleman, H. W.; Tavoularis, S. C.

1974-01-01

The instantaneous values of output voltages representing the wind velocity vector and the temperature at different elevations of the 250-foot meteorological tower located at NASA Wallops Flight Center are provided with the three dimensional split-film TSI Model 1080 anemometer system. The output voltages are sampled at a rate of one every 5 milliseconds, digitized and stored on digital magnetic tapes for a time period of approximately 40 minutes, with the use of a specially designed data acqusition system. A new calibration procedure permits the conversion of the digital voltages to the respective values of the temperature and the velocity components in a Cartesian coordinate system connected with the TSI probe with considerable accuracy. Power, cross, coincidence and quadrature spectra of the wind components and the temperature are obtained with the use of the fast Fourier transform. The cosine taper data window and ensemble and frequency smoothing techniques are used to provide smooth estimates of the spectral functions.

New Integrated Video and Graphics Technology: Digital Video Interactive.

ERIC Educational Resources Information Center

Optical Information Systems, 1987

1987-01-01

Describes digital video interactive (DVI), a new technology which combines the interactivity of the graphics capabilities in personal computers with the realism of high-quality motion video and multitrack audio in an all-digital integrated system. (MES)

Aircraft Digital Input Controlled Hydraulic Actuation and Control System.

DTIC Science & Technology

1981-03-01

the individual pistons in each motor which act against its rotating swash plate to drive...single piston during each of two equal rotations of the output shaft. In the high-displacement case, the swash plate is assumed to move through an angle...for their assistance in conducting laboratory tests of the digital electrohydraulic actuation system. Vii TABLE OF CONTENTS Section Page I

Telemetry Standards, RCC Standard 106-17. Chapter 8. Digital Data Bus Acquisition Formatting Standard

DTIC Science & Technology

2017-07-01

8-3 8.4.1 Characteristics of a Singular Composite Output Signal ...................................... 8-3 8.5 Single Bus Track Spread Recording ...Format .............................................................. 8-5 8.5.1 Single Bus Recording Technique Characteristics...check FCS frame check sequence HDDR high-density digital recording MIL-STD Military Standard msb most significant bit PCM pulse code modulation

Image display device in digital TV

DOEpatents

Choi, Seung Jong [Seoul, KR

2006-07-18

Disclosed is an image display device in a digital TV that is capable of carrying out the conversion into various kinds of resolution by using single bit map data in the digital TV. The image display device includes: a data processing part for executing bit map conversion, compression, restoration and format-conversion for text data; a memory for storing the bit map data obtained according to the bit map conversion and compression in the data processing part and image data inputted from an arbitrary receiving part, the receiving part receiving one of digital image data and analog image data; an image outputting part for reading the image data from the memory; and a display processing part for mixing the image data read from the image outputting part and the bit map data converted in format from the a data processing part. Therefore, the image display device according to the present invention can convert text data in such a manner as to correspond with various resolution, carry out the compression for bit map data, thereby reducing the memory space, and support text data of an HTML format, thereby providing the image with the text data of various shapes.

Estimation bias from using nonlinear Fourier plane correlators for sub-pixel image shift measurement and implications for the binary joint transform correlator

NASA Astrophysics Data System (ADS)

Grycewicz, Thomas J.; Florio, Christopher J.; Franz, Geoffrey A.; Robinson, Ross E.

2007-09-01

When using Fourier plane digital algorithms or an optical correlator to measure the correlation between digital images, interpolation by center-of-mass or quadratic estimation techniques can be used to estimate image displacement to the sub-pixel level. However, this can lead to a bias in the correlation measurement. This bias shifts the sub-pixel output measurement to be closer to the nearest pixel center than the actual location. The paper investigates the bias in the outputs of both digital and optical correlators, and proposes methods to minimize this effect. We use digital studies and optical implementations of the joint transform correlator to demonstrate optical registration with accuracies better than 0.1 pixels. We use both simulations of image shift and movies of a moving target as inputs. We demonstrate bias error for both center-of-mass and quadratic interpolation, and discuss the reasons that this bias is present. Finally, we suggest measures to reduce or eliminate the bias effects. We show that when sub-pixel bias is present, it can be eliminated by modifying the interpolation method. By removing the bias error, we improve registration accuracy by thirty percent.

Innovate Literacy Instruction with a Classroom Computer: A Solid Rationale for the Integration of Specific Digital Tools

ERIC Educational Resources Information Center

McAdams, Laurie

2013-01-01

The digital age has impacted education and how teachers prepare students to master 21st century literacies. Numerous national, state, and local entities have made the integration of technology into the literacy curriculum a priority, and teachers are becoming more proficient with their use of digital tools. However, integrating technology to…

All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application

NASA Astrophysics Data System (ADS)

Tsai, Chih-Wei; Lo, Yu-Lung; Chang, Chia-Chen; Liu, Han-Ying; Yang, Wei-Bin; Cheng, Kuo-Hsing

2017-04-01

A synchronous and highly accurate all-digital duty-cycle corrector (ADDCC), which uses simplified dual-loop architecture, is presented in this paper. To explain the operational principle, a detailed circuit description and formula derivation are provided. To verify the proposed design, a chip was fabricated through the 0.18-µm standard complementary metal oxide semiconductor process with a core area of 0.091 mm2. The measurement results indicate that the proposed ADDCC can operate between 300 and 600 MHz with an input duty-cycle range of 40-60%, and that the output duty-cycle error is less than 1% with a root-mean-square jitter of 3.86 ps.

Electronic voltage and current transformers testing device.

PubMed

Pan, Feng; Chen, Ruimin; Xiao, Yong; Sun, Weiming

2012-01-01

A method for testing electronic instrument transformers is described, including electronic voltage and current transformers (EVTs, ECTs) with both analog and digital outputs. A testing device prototype is developed. It is based on digital signal processing of the signals that are measured at the secondary outputs of the tested transformer and the reference transformer when the same excitation signal is fed to their primaries. The test that estimates the performance of the prototype has been carried out at the National Centre for High Voltage Measurement and the prototype is approved for testing transformers with precision class up to 0.2 at the industrial frequency (50 Hz or 60 Hz). The device is suitable for on-site testing due to its high accuracy, simple structure and low-cost hardware.

Research of digital controlled DC/DC converter based on STC12C5410AD

NASA Astrophysics Data System (ADS)

Chen, Dan-Jiang; Jin, Xin; Xiao, Zhi-Hong

2010-02-01

In order to study application of digital control technology on DC/DC converter, principle of increment mode PID control algorithm was analyzed in the paper. Then, a SCM named STC12C5410AD was introduced with its internal resources and characteristics. The PID control algorithm can be implemented easily based on it. The output of PID control was used to change the value of a variable that is 255 times than duty cycle, and this reduced the error of calculation. The valid of the presented algorithm was verified by an experiment for a BUCK DC/DC converter. The experimental results indicated that output voltage of the BUCK converter is stable with low ripple.

Digital intelligent booster for DCC miniature train networks

NASA Astrophysics Data System (ADS)

Ursu, M. P.; Condruz, D. A.

2017-08-01

Modern miniature trains are now driven by means of the DCC (Digital Command and Control) system, which allows the human operator or a personal computer to launch commands to each individual train or even to control different features of the same train. The digital command station encodes these commands and sends them to the trains by means of electrical pulses via the rails of the railway network. Due to the development of the miniature railway network, it may happen that the power requirement of the increasing number of digital locomotives, carriages and accessories exceeds the nominal output power of the digital command station. This digital intelligent booster relieves the digital command station from powering the entire railway network all by itself, and it automatically handles the multiple powered sections of the network. This electronic device is also able to detect and process short-circuits and overload conditions, without the intervention of the digital command station.

Teachers' Dispositions towards the Role of Digital Devices in Play-Based Pedagogy in Early Childhood Education

ERIC Educational Resources Information Center

Palaiologou, Ioanna

2016-01-01

A body of research is emerging on early childhood education teachers' views on the integration of digital technologies in their practice. Despite evidence of the digitalisation of homes in affluent societies and children's interactions in highly mediated digital environments, few teachers so far have integrated digital devices into a play-based…

Moving the Archivist Closer to the Creator: Implementing Integrated Archival Policies for Born Digital Photography at Colleges and Universities

ERIC Educational Resources Information Center

Keough, Brian; Wolfe, Mark

2012-01-01

This article discusses integrated approaches to the management and preservation of born digital photography. It examines the changing practices among photographers, and the needed relationships between the photographers using digital technology and the archivists responsible for acquiring their born digital images. Special consideration is given…

Social Justice through Literacy: Integrating Digital Video Cameras in Reading Summaries and Responses

ERIC Educational Resources Information Center

Liu, Rong; Unger, John A.; Scullion, Vicki A.

2014-01-01

Drawing data from an action-oriented research project for integrating digital video cameras into the reading process in pre-college courses, this study proposes using digital video cameras in reading summaries and responses to promote critical thinking and to teach social justice concepts. The digital video research project is founded on…

Digital Photography and Journals in a Kindergarten-First-Grade Classroom: Toward Meaningful Technology Integration in Early Childhood Education

ERIC Educational Resources Information Center

Ching, Cynthia Carter; Wang, X. Christine; Shih, Mei-Li; Kedem, Yore

2006-01-01

To explore meaningful and effective technology integration in early childhood education, we investigated how kindergarten-first-grade students created and employed digital photography journals to support social and cognitive reflection. These students used a digital camera to document their daily school activities and created digital photo…

Fast counting electronics for neutron coincidence counting

DOEpatents

Swansen, James E.

1987-01-01

An amplifier-discriminator is tailored to output a very short pulse upon an above-threshold input from a detector which may be a .sup.3 He detector. The short pulse output is stretched and energizes a light emitting diode (LED) to provide a visual output of operation and pulse detection. The short pulse is further fed to a digital section for processing and possible ORing with other like generated pulses. Finally, the output (or ORed output ) is fed to a derandomizing buffer which converts the rapidly and randomly occurring pulses into synchronized and periodically spaced-apart pulses for the accurate counting thereof. Provision is also made for the internal and external disabling of each individual channel of amplifier-discriminators in an ORed plurality of same.

Fast counting electronics for neutron coincidence counting

DOEpatents

Swansen, J.E.

1985-03-05

An amplifier-discriminator is tailored to output a very short pulse upon an above-threshold input from a detector which may be a /sup 3/He detector. The short pulse output is stretched and energizes a light emitting diode (LED) to provide a visual output of operation and pulse detection. The short pulse is further fed to a digital section for processing and possible ORing with other like generated pulses. Finally, the output (or ORed output) is fed to a derandomizing buffer which converts the rapidly and randomly occurring pulses into synchronized and periodically spaced-apart pulses for the accurate counting thereof. Provision is also made for the internal and external disabling of each individual channel of amplifier-discriminators in an ORed plurality of same.

Compact dewar and electronics for large-format infrared detectors

NASA Astrophysics Data System (ADS)

Manissadjian, A.; Magli, S.; Mallet, E.; Cassaigne, P.

2011-06-01

Infrared systems cameras trend is to require higher performance (thanks to higher resolution) and in parallel higher compactness for easier integration in systems. The latest developments at SOFRADIR / France on HgCdTe (Mercury Cadmium Telluride / MCT) cooled IR staring detectors do show constant improvements regarding detector performances and compactness, by reducing the pixel pitch and optimizing their encapsulation. Among the latest introduced detectors, the 15μm pixel pitch JUPITER HD-TV format (1280×1024) has to deal with challenging specifications regarding dewar compactness, low power consumption and reliability. Initially introduced four years ago in a large dewar with a more than 2kg split Stirling cooler compressor, it is now available in a new versatile compact dewar that is vacuum-maintenance-free over typical 18 years mission profiles, and that can be integrated with the different available Stirling coolers: K548 microcooler for light solution (less than 0.7 kg), K549 or LSF9548 for split cooler and/or higher reliability solution. The IDDCAs are also required with simplified electrical interface enabling to shorten the system development time and to standardize the electronic boards definition with smaller volumes. Sofradir is therefore introducing MEGALINK, the new compact Command & Control Electronics compatible with most of the Sofradir IDDCAs. MEGALINK provides all necessary input biases and clocks to the FPAs, and digitizes and multiplexes the video outputs to provide a 14 bit output signal through a cameralink interface, in a surface smaller than a business card.

VHDL Modeling and Simulation of a Digital Image Synthesizer for Countering ISAR

DTIC Science & Technology

2003-06-01

This thesis discusses VHDL modeling and simulation of a full custom Application Specific Integrated Circuit (ASIC) for a Digital Image Synthesizer...necessary for a given application . With such a digital method, it is possible for a small ship to appear as large as an aircraft carrier or any high...INTRODUCTION TO DIGITAL IMAGE SYNTHESIZER (DIS) A. BACKGROUND The Digital Image Synthesizer (DIS) is an Application Specific Integrated Circuit

Phenotypic integration mediated by hormones: associations among digit ratios, body size and testosterone during tadpole development.

PubMed

Lofeu, Leandro; Brandt, Renata; Kohlsdorf, Tiana

2017-08-02

Developmental associations often explain phenotypic integration. The intersected hormonal regulation of ontogenetic processes fosters predictions of steroid-mediated phenotypic integration among sexually dimorphic traits, a statement defied by associations between classical dimorphism predictors (e.g. body size) and traits that apparently lack sex-specific functions (e.g. ratios between the lengths of Digits II and IV - 2D:4D). Developmental bases of female-biased 2D:4D have been identified, but these remain unclear for taxa presenting male-biased 2D:4D (e.g. anura). Here we propose two alternative hypotheses to investigate evolution of male-biased 2D:4D associated with sexually dimorphic body size using Leptodactylus frogs: I)'hypothesis of sex-specific digit responses' - Digit IV would be reactive to testosterone but exhibit responses in the opposite direction of those observed in female-biased 2D:4D lineages, so that Digit IV turns shorter in males; II) 'hypothesis of identity of the dimorphic digit'- Digit II would be the dimorphic digit. We compiled the following databases using Leptodactylus frogs: 1) adults of two species from natural populations and 2) testosterone-treated L. fuscus at post-metamorphic stage. Studied traits seem monomorphic in L. fuscus; L. podicipinus exhibits male-biased 2D:4D. When present, 2D:4D dimorphism was male-biased and associated with dimorphic body size; sex differences resided on Digit II instead of IV, corroborating our 'hypothesis of identity of the dimorphic digit'. Developmental steroid roles were validated: testosterone-treated L. fuscus frogs were smaller and exhibited masculinized 2D:4D, and Digit II was the digit that responded to testosterone. We propose a model where evolution of sexual dimorphism in 2D:4D first originates from the advent, in a given digit, of increased tissue sensitivity to steroids. Phenotypic integration with other sexually dimorphic traits would then occur through multi-trait hormonal effects during development. Such process of phenotypic integration seems fitness-independent in its origin and might explain several cases of steroid-mediated integration among sexually dimorphic traits.

Technical note: Signal resolution increase and noise reduction in a CCD digitizer.

PubMed

González, A; Martínez, J A; Tobarra, B

2004-03-01

Increasing output resolution is assumed to improve noise characteristics of a CCD digitizer. In this work, however, we have found that as the quantization step becomes lower than the analog noise (present in the signal before its conversion to digital) the noise reduction becomes significantly lower than expected. That is the case for values of sigma(an)/delta larger than 0.6, where sigma(an) is the standard deviation of the analog noise and delta is the quantization step. The procedure is applied to a commercially available CCD digitizer, and noise reduction by means of signal resolution increase is compared to that obtained by low pass filtering.