An all-digital phase-locked loop demodulator based on FPGA

NASA Astrophysics Data System (ADS)

Gong, X. F.; Cui, Z. D.

2017-09-01

This paper studied the principle of analogue phase-locked loop demodulation and work process of digital phase-locked loop. It is found that the higher the reference signal frequency is, the smaller the duty ratio of the discriminator output signal is. Carrier detection is achieved by using this relationship. The experimental results indicate that the demodulator based on the principle could realize high-quality transmission of digital signals and could be an effective FM communication mode for studying wireless transmission of digital signals.

Digital phase-locked loop

NASA Technical Reports Server (NTRS)

Cliff, R. A. (Inventor)

1975-01-01

An digital phase-locked loop is provided for deriving a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.

Performance evaluation of digital phase-locked loops for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Hinedi, S. M.; Yeh, H.-G.; Kyriacou, C.

1994-01-01

The performances of the digital phase-locked loops (DPLL's) for the advanced deep-space transponders (ADT's) are investigated. DPLL's considered in this article are derived from the analog phase-locked loop, which is currently employed by the NASA standard deep space transponder, using S-domain to Z-domain mapping techniques. Three mappings are used to develop digital approximations of the standard deep space analog phase-locked loop, namely the bilinear transformation (BT), impulse invariant transformation (IIT), and step invariant transformation (SIT) techniques. The performance in terms of the closed loop phase and magnitude responses, carrier tracking jitter, and response of the loop to the phase offset (the difference between in incoming phase and reference phase) is evaluated for each digital approximation. Theoretical results of the carrier tracking jitter for command-on and command-off cases are then validated by computer simulation. Both theoretical and computer simulation results show that at high sampling frequency, the DPLL's approximated by all three transformations have the same tracking jitter. However, at low sampling frequency, the digital approximation using BT outperforms the others. The minimum sampling frequency for adequate tracking performance is determined for each digital approximation of the analog loop. In addition, computer simulation shows that the DPLL developed by BT provides faster response to the phase offset than IIT and SIT.

Loran digital phase-locked loop and RF front-end system error analysis

NASA Technical Reports Server (NTRS)

Mccall, D. L.

1979-01-01

An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.

Digital Phase-Locked Loop With Phase And Frequency Feedback

NASA Technical Reports Server (NTRS)

Thomas, J. Brooks

1991-01-01

Advanced design for digital phase-lock loop (DPLL) allows loop gains higher than those used in other designs. Divided into two major components: counterrotation processor and tracking processor. Notable features include use of both phase and rate-of-change-of-phase feedback instead of frequency feedback alone, normalized sine phase extractor, improved method for extracting measured phase, and improved method for "compressing" output rate.

FIR digital filter-based ZCDPLL for carrier recovery

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2016-04-01

The objective of this work is to analyse the performance of the newly proposed two-tap FIR digital filter-based first-order zero-crossing digital phase-locked loop (ZCDPLL) in the absence or presence of additive white Gaussian noise (AWGN). The introduction of the two-tap FIR digital filter widens the lock range of a ZCDPLL and improves the loop's operation in the presence of AWGN. The FIR digital filter tap coefficients affect the loop convergence behaviour and appropriate selection of those gains should be taken into consideration. The new proposed loop has wider locking range and faster acquisition time and reduces the phase error variations in the presence of noise.

An all digital phase locked loop for synchronization of a sinusoidal signal embedded in white Gaussian noise

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1973-01-01

An all digital phase locked loop which tracks the phase of the incoming sinusoidal signal once per carrier cycle is proposed. The different elements and their functions and the phase lock operation are explained in detail. The nonlinear difference equations which govern the operation of the digital loop when the incoming signal is embedded in white Gaussian noise are derived, and a suitable model is specified. The performance of the digital loop is considered for the synchronization of a sinusoidal signal. For this, the noise term is suitably modelled which allows specification of the output probabilities for the two level quantizer in the loop at any given phase error. The loop filter considered increases the probability of proper phase correction. The phase error states in modulo two-pi forms a finite state Markov chain which enables the calculation of steady state probabilities, RMS phase error, transient response and mean time for cycle skipping.

Controlled-Root Approach To Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A.; Thomas, J. Brooks

1995-01-01

Performance tailored more flexibly and directly to satisfy design requirements. Controlled-root approach improved method for analysis and design of digital phase-locked loops (DPLLs). Developed rigorously from first principles for fully digital loops, making DPLL theory and design simpler and more straightforward (particularly for third- or fourth-order DPLL) and controlling performance more accurately in case of high gain.

On the performance of digital phase locked loops in the threshold region

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

Extended Kalman filter algorithms are used to obtain a digital phase lock loop structure for demodulation of angle modulated signals. It is shown that the error variance equations obtained directly from this structure enable one to predict threshold if one retains higher frequency terms. This is in sharp contrast to the similar analysis of the analog phase lock loop, where the higher frequency terms are filtered out because of the low pass filter in the loop. Results are compared to actual simulation results and threshold region results obtained previously.

All-digital phase-locked loop with 50-cycle lock time suitable for high-performance microprocessors

NASA Astrophysics Data System (ADS)

Dunning, Jim; Garcia, Gerald; Lundberg, Jim; Nuckolls, Ed

1995-04-01

A frequency-synthesizing, all-digital phase-locked loop (ADPLL) is fully integrated with a 0.5 micron CMOS microprocessor. The ADPLL has a 50-cycle phase lock, has a gain mechanism independent of process, voltage, and temperature, and is immune to input jitter. A digitally-controlled oscillator (DCO) forms the core of the ADPLL and operates from 50 to 550 MHz, running at 4x the reference clock frequency. The DCO has 16 b of binarily weighted control and achieves LSB resolution under 500 fs.

Designing Estimator/Predictor Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1988-01-01

Signal delays in equipment compensated automatically. New approach to design of digital phase-locked loop (DPLL) incorporates concepts from estimation theory and involves decomposition of closed-loop transfer function into estimator and predictor. Estimator provides recursive estimates of phase, frequency, and higher order derivatives of phase with respect to time, while predictor compensates for delay, called "transport lag," caused by PLL equipment and by DPLL computations.

Digital phase-lock loop

NASA Technical Reports Server (NTRS)

Thomas, Jr., Jess B. (Inventor)

1991-01-01

An improved digital phase lock loop incorporates several distinctive features that attain better performance at high loop gain and better phase accuracy. These features include: phase feedback to a number-controlled oscillator in addition to phase rate; analytical tracking of phase (both integer and fractional cycles); an amplitude-insensitive phase extractor; a more accurate method for extracting measured phase; a method for changing loop gain during a track without loss of lock; and a method for avoiding loss of sampled data during computation delay, while maintaining excellent tracking performance. The advantages of using phase and phase-rate feedback are demonstrated by comparing performance with that of rate-only feedback. Extraction of phase by the method of modeling provides accurate phase measurements even when the number-controlled oscillator phase is discontinuously updated.

Digital multi-channel high resolution phase locked loop for surveillance radar systems

NASA Astrophysics Data System (ADS)

Rizk, Mohamed; Shaaban, Shawky; Abou-El-Nadar, Usama M.; Hafez, Alaa El-Din Sayed

This paper present a multi-channel, high resolution, fast lock phase locked loop (PLL) for surveillance radar applications. Phase detector based PLLs are simple to design, suffer no systematic phase error, and can run at the highest speed. Reducing loop gain can proportionally improve jitter performance, but also reduces locking time and pull-in range. The proposed system is based on digital process and control the error signal to the voltage controlled oscillator (VCO) adaptively to control its gain in order to achieve fast lock times while improving in lock jitter performance. Under certain circumstances the design also improves the frequency agility capability of the radar system. The results show a fast lock, high resolution PLL with transient time less than 10 µ sec which is suitable to radar applications.

A simple second-order digital phase-locked loop.

NASA Technical Reports Server (NTRS)

Tegnelia, C. R.

1972-01-01

A simple second-order digital phase-locked loop has been designed for the Viking Orbiter 1975 command system. Excluding analog-to-digital conversion, implementation of the loop requires only an adder/subtractor, two registers, and a correctable counter with control logic. The loop considers only the polarity of phase error and corrects system clocks according to a filtered sequence of this polarity. The loop is insensitive to input gain variation, and therefore offers the advantage of stable performance over long life. Predictable performance is guaranteed by extreme reliability of acquisition, yet in the steady state the loop produces only a slight degradation with respect to analog loop performance.

Digital phase shifter synchronizes local oscillators

NASA Technical Reports Server (NTRS)

Ali, S. M.

1978-01-01

Digital phase-shifting network is used as synchronous frequency multiplier for applications such as phase-locking two signals that may differ in frequency. Circuit has various phase-shift capability. Possible applications include data-communication systems and hybrid digital/analog phase-locked loops.

Analysis of a first order phase locked loop in the presence of Gaussian noise

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1977-01-01

A first-order digital phase locked loop is analyzed by application of a Markov chain model. Steady state loop error probabilities, phase standard deviation, and mean loop transient times are determined for various input signal to noise ratios. Results for direct loop simulation are presented for comparison.

The digital phase-locked loop as a near-optimum FM demodulator.

NASA Technical Reports Server (NTRS)

Kelly, C. N.; Gupta, S. C.

1972-01-01

This paper presents an approach to the optimum digital demodulation of a continuous-time FM signal using stochastic estimation theory. The primary result is a digital phase-locked loop realization possessing performance characteristics that approach those of the analog counterpart. Some practical considerations are presented and simulation results for a first-order message model are presented.

Behaviour of fractional loop delay zero crossing digital phase locked loop (FR-ZCDPLL)

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2018-01-01

This article analyses the performance of the first-order zero crossing digital phase locked loops (FR-ZCDPLL) when fractional loop delay is added to loop. The non-linear dynamics of the loop is presented, analysed and examined through bifurcation behaviour. Numerical simulation of the loop is conducted to proof the mathematical analysis of the loop operation. The results of the loop simulation show that the proposed FR-ZCDPLL has enhanced the performance compared to the conventional zero crossing DPLL in terms of wider lock range, captured range and stable operation region. In addition, extensive experimental simulation was conducted to find the optimum loop parameters for different loop environmental conditions. The addition of the fractional loop delay network in the conventional loop also reduces the phase jitter and its variance especially when the signal-to-noise ratio is low.

A digitally implemented phase-locked loop detection scheme for analysis of the phase and power stability of a calibration tone

NASA Technical Reports Server (NTRS)

Densmore, A. C.

1988-01-01

A digital phase-locked loop (PLL) scheme is described which detects the phase and power of a high SNR calibration tone. The digital PLL is implemented in software directly from the given description. It was used to evaluate the stability of the Goldstone Deep Space Station open loop receivers for Radio Science. Included is a derivative of the Allan variance sensitivity of the PLL imposed by additive white Gaussian noise; a lower limit is placed on the carrier frequency.

An all digital phase locked loop for FM demodulation.

NASA Technical Reports Server (NTRS)

Greco, J.; Garodnick, J.; Schilling, D. L.

1972-01-01

A phase-locked loop designed with all-digital circuitry which avoids certain problems, and a digital voltage controlled oscillator algorithm are described. The system operates synchronously and performs all required digital calculations within one sampling period, thereby performing as a real-time special-purpose computer. The SNR ratio is computed for frequency offsets and sinusoidal modulation, and experimental results verify the theoretical calculations.

Design and implementation of a hybrid digital phase-locked loop with a TMS320C25: An application to a transponder receiver breadboard

NASA Technical Reports Server (NTRS)

Yeh, H.-G.; Nguyen, T. M.

1994-01-01

Design, modeling, analysis, and simulation of a phase-locked loop (PLL) with a digital loop filter are presented in this article. A TMS320C25 digital signal processor (DSP) is used to implement this digital loop filter. In order to keep the compatibility, the main design goal was to replace the analog PLL (APLL) of the Deep-Space Transponder (DST) receiver breadboard's loop filter with a digital loop filter without changing anything else. This replacement results in a hybrid digital PLL (HDPLL). Both the original APLL and the designed HDPLL are Type I second-order systems. The real-time performance of the HDPLL and the receiver is provided and evaluated.

Frequency control circuit for all-digital phase-lock loops

NASA Technical Reports Server (NTRS)

Anderson, T. O.

1973-01-01

Phase-lock loop references all its operations to fixed high-frequency service clock operating at highest speed which digital circuits permit. Wide-range control circuit provides linear control of frequency of reference signal. It requires only two counters in combination with control circuit consisting only of flip-flop and gate.

Two AFC Loops For Low CNR And High Dynamics

NASA Technical Reports Server (NTRS)

Hinedi, Sami M.; Aguirre, Sergio

1992-01-01

Two alternative digital automatic-frequency-control (AFC) loops proposed to acquire (or reacquire) and track frequency of received carrier radio signal. Intended for use where carrier-to-noise ratios (CNR's) low and carrier frequency characterized by high Doppler shift and Doppler rate because of high relative speed and acceleration, respectively, between transmitter and receiver. Either AFC loops used in place of phase-locked loop. New loop concepts integrate ideas from classical spectrum-estimation, digital-phase-locked-loop, and Kalman-Filter theories.

Digital Filters for Digital Phase-locked Loops

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1985-01-01

An s/z hybrid model for a general phase locked loop is proposed. The impact of the loop filter on the stability, gain margin, noise equivalent bandwidth, steady state error and time response is investigated. A specific digital filter is selected which maximizes the overall gain margin of the loop. This filter can have any desired number of integrators. Three integrators are sufficient in order to track a phase jerk with zero steady state error at loop update instants. This filter has one zero near z = 1.0 for each integrator. The total number of poles of the filter is equal to the number of integrators plus two.

Fringe pattern demodulation with a two-frame digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-frame digital phase-locked loop for fringe pattern demodulation is presented. In this scheme, two fringe patterns with different spatial carrier frequencies are grabbed for an object. A digital phase-locked loop algorithm tracks and demodulates the phase difference between both fringe patterns by employing the wrapped phase components of one of the fringe patterns as a reference to demodulate the second fringe pattern. The desired phase information can be extracted from the demodulated phase difference. We tested the algorithm experimentally using real fringe patterns. The technique is shown to be suitable for noncontact measurement of objects with rapid surface variations, and it outperforms the Fourier fringe analysis technique in this aspect. Phase maps produced withthis algorithm are noisy in comparison with phase maps generated with the Fourier fringe analysis technique.

Digital Phase Meter for a Laser Heterodyne Interferometer

NASA Technical Reports Server (NTRS)

Loya, Frank

2008-01-01

The Digital Phase Meter is based on a modified phase-locked loop. When phase alignment between the reference input and the phase-shifted metrological input is achieved, the loop locks and the phase shift of the digital phase shifter equals the phase difference that one seeks to measure. This digital phase meter is being developed for incorporation into a laser heterodyne interferometer in a metrological apparatus, but could also be adapted to other uses. Relative to prior phase meters of similar capability, including digital ones, this digital phase meter is smaller, less complex, and less expensive. The phase meter has been constructed and tested in the form of a field-programmable gate array (FPGA).

A class of optimum digital phase locked loops

NASA Technical Reports Server (NTRS)

Kumar, R.; Hurd, W. J.

1986-01-01

This paper presents a class of optimum digital filters for digital phase locked loops, for the important case in which the maximum update rate of the loop filter and numerically controlled oscillator (NCO) is limited. This case is typical when the loop filter is implemented in a microprocessor. In these situations, pure delay is encountered in the loop transfer function and thus the stability and gain margin of the loop are of crucial interest. The optimum filters designed for such situations are evaluated in terms of their gain margin for stability, dynamic error, and steady-state error performance. For situations involving considerably high phase dynamics an adaptive and programmable implementation is also proposed to obtain an overall optimum strategy.

Near optimum digital phase locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1972-01-01

Near optimum digital phase locked loops are derived utilizing nonlinear estimation theory. Nonlinear approximations are employed to yield realizable loop structures. Baseband equivalent loop gains are derived which under high signal to noise ratio conditions may be calculated off-line. Additional simplifications are made which permit the application of the Kalman filter algorithms to determine the optimum loop filter. Performance is evaluated by a theoretical analysis and by simulation. Theoretical and simulated results are discussed and a comparison to analog results is made.

A second-order frequency-aided digital phase-locked loop for Doppler rate tracking

NASA Astrophysics Data System (ADS)

Chie, C. M.

1980-08-01

A second-order digital phase-locked loop (DPLL) has a finite lock range which is a function of the frequency of the incoming signal to be tracked. For this reason, it is not capable of tracking an input with Doppler rate for an indefinite period of time. In this correspondence, an analytical expression for the hold-in time is derived. In addition, an all-digital scheme to alleviate this problem is proposed based on the information obtained from estimating the input signal frequency.

Automatic NMR field-frequency lock-pulsed phase locked loop approach.

PubMed

Kan, S; Gonord, P; Fan, M; Sauzade, M; Courtieu, J

1978-06-01

A self-contained deuterium frequency-field lock scheme for a high-resolution NMR spectrometer is described. It is based on phase locked loop techniques in which the free induction decay signal behaves as a voltage-controlled oscillator. By pulsing the spins at an offset frequency of a few hundred hertz and using a digital phase-frequency discriminator this method not only eliminates the usual phase, rf power, offset adjustments needed in conventional lock systems but also possesses the automatic pull-in characteristics that dispense with the use of field sweeps to locate the NMR line prior to closure of the lock loop.

Response of an all digital phase-locked loop

NASA Technical Reports Server (NTRS)

Garodnick, J.; Greco, J.; Schilling, D. L.

1974-01-01

An all digital phase-locked loop (DPLL) is designed, analyzed, and tested. Three specific configurations are considered, generating first, second, and third order DPLL's; and it is found, using a computer simulation of a noise spike, and verified experimentally, that of these configurations the second-order system is optimum from the standpoint of threshold extension. This substantiates results obtained for analog PLL's.

Analysis and design of a second-order digital phase-locked loop

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1979-01-01

A specific second-order digital phase-locked loop (DPLL) was modeled as a first-order Markov chain with alternatives. From the matrix of transition probabilities of the Markov chain, the steady-state phase error of the DPLL was determined. In a similar manner the loop's response was calculated for a fading input. Additionally, a hardware DPLL was constructed and tested to provide a comparison to the results obtained from the Markov chain model. In all cases tested, good agreement was found between the theoretical predictions and the experimental data.

A second-order all-digital phase-locked loop

NASA Technical Reports Server (NTRS)

Holmes, J. K.; Tegnelia, C. R.

1974-01-01

A simple second-order digital phase-locked loop has been designed to synchronize itself to a square-wave subcarrier. Analysis and experimental performance are given for both acquisition behavior and steady-state phase error performance. In addition, the damping factor and the noise bandwidth are derived analytically. Although all the data are given for the square-wave subcarrier case, the results are applicable to arbitrary subcarriers that are odd symmetric about their transition region.

Detection of digital FSK using a phase-locked loop

NASA Technical Reports Server (NTRS)

Lindsey, W. C.; Simon, M. K.

1975-01-01

A theory is presented for the design of a digital FSK receiver which employs a phase-locked loop to set up the desired matched filter as the arriving signal frequency switches. The developed mathematical model makes it possible to establish the error probability performance of systems which employ a class of digital FM modulations. The noise mechanism which accounts for decision errors is modeled on the basis of the Meyr distribution and renewal Markov process theory.

Single-Event Upset Characterization of Common First- and Second-Order All-Digital Phase-Locked Loops

NASA Astrophysics Data System (ADS)

Chen, Y. P.; Massengill, L. W.; Kauppila, J. S.; Bhuva, B. L.; Holman, W. T.; Loveless, T. D.

2017-08-01

The single-event upset (SEU) vulnerability of common first- and second-order all-digital-phase-locked loops (ADPLLs) is investigated through field-programmable gate array-based fault injection experiments. SEUs in the highest order pole of the loop filter and fraction-based phase detectors (PDs) may result in the worst case error response, i.e., limit cycle errors, often requiring system restart. SEUs in integer-based linear PDs may result in loss-of-lock errors, while SEUs in bang-bang PDs only result in temporary-frequency errors. ADPLLs with the same frequency tuning range but fewer bits in the control word exhibit better overall SEU performance.

Digital-only PLL with adaptive search step

NASA Astrophysics Data System (ADS)

Lin, Ming-Lang; Huang, Shu-Chuan; Liu, Jie-Cherng

2014-06-01

In this paper, an all-digital phase-locked loop (PLL) with adaptively controlled up/down counter serves as the loop filter is presented, and it is implemented on a field-programmable gate array. The detailed circuit of the adaptive up/down counter implementing the adaptive search algorithm is also given, in which the search step for frequency acquisition is adaptively scaled down in half until it is reduced to zero. The phase jitter of the proposed PLL can be lowered, yet keeping with fast lock-in time. Thus, the dilemma between the low phase jitter and fast lock-in time of the traditional PLL can be resolved. Simulation results and circuit implementation show that the locked count, phase jitter and lock-in time of the proposed PLL are consistent with the theoretical predictions.

Method of Implementing Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, J. Brooks (Inventor)

1997-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, and root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (B(sub L)T approaches 0) and in a discrete-update formulation with arbitrary B(sub L)T. Deficiencies of the continuous-update approximation in large-B(sub L)T applications are avoided in the new discrete-update formulation.

Digital phase-locked-loop speed sensor for accuracy improvement in analog speed controls. [feedback control and integrated circuits

NASA Technical Reports Server (NTRS)

Birchenough, A. G.

1975-01-01

A digital speed control that can be combined with a proportional analog controller is described. The stability and transient response of the analog controller were retained and combined with the long-term accuracy of a crystal-controlled integral controller. A relatively simple circuit was developed by using phase-locked-loop techniques and total error storage. The integral digital controller will maintain speed control accuracy equal to that of the crystal reference oscillator.

On higher order discrete phase-locked loops.

NASA Technical Reports Server (NTRS)

Gill, G. S.; Gupta, S. C.

1972-01-01

An exact mathematical model is developed for a discrete loop of a general order particularly suitable for digital computation. The deterministic response of the loop to the phase step and the frequency step is investigated. The design of the digital filter for the second-order loop is considered. Use is made of the incremental phase plane to study the phase error behavior of the loop. The model of the noisy loop is derived and the optimization of the loop filter for minimum mean-square error is considered.

Phase-locked tracking loops for LORAN-C

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1978-01-01

Portable battery operated LORAN-C receivers were fabricated to evaluate simple envelope detector methods with hybrid analog to digital phase locked loop sensor processors. The receivers are used to evaluate LORAN-C in general aviation applications. Complete circuit details are given for the experimental sensor and readout system.

Phase-locked loops and their application

NASA Technical Reports Server (NTRS)

Lindsey, W. C. (Editor); Simon, M. K.

1978-01-01

A collection of papers is presented on the characteristics and capabilities of phase-locked loops (PLLs), along with some applications of interest. The discussion covers basic theory (linear and nonlinear); acquisition; threshold; stability; frequency demodulation and detection; tracking; cycle slipping and loss of lock; phase-locked oscillators; operation and performance in the presence of noise; AGC, AFC, and APC circuits and systems; digital PLL; and applications and miscellaneous. With the rapid development of IC technology, PLLs are expected to be used widely in consumer electronics.

Digital phase-locked loop speed control for a brushless dc motor

NASA Astrophysics Data System (ADS)

Wise, M. G.

1985-06-01

Speed control of d.c. motors by phase-locked loops (PLL) is becoming increasingly popular. Primary interest has been in employing PLL for constant speed control. This thesis investigates the theory and techniques of digital PLL to speed control of a brushless d.c. motor with a variable speed of operation. Addition of logic controlled count enable/disable to a synchronous up/down counter, used as a phase-frequency detector, is shown to improve the performance of previously proposed PLL control schemes.

Hidden attractors in dynamical models of phase-locked loop circuits: Limitations of simulation in MATLAB and SPICE

NASA Astrophysics Data System (ADS)

Kuznetsov, N. V.; Leonov, G. A.; Yuldashev, M. V.; Yuldashev, R. V.

2017-10-01

During recent years it has been shown that hidden oscillations, whose basin of attraction does not overlap with small neighborhoods of equilibria, may significantly complicate simulation of dynamical models, lead to unreliable results and wrong conclusions, and cause serious damage in drilling systems, aircrafts control systems, electromechanical systems, and other applications. This article provides a survey of various phase-locked loop based circuits (used in satellite navigation systems, optical, and digital communication), where such difficulties take place in MATLAB and SPICE. Considered examples can be used for testing other phase-locked loop based circuits and simulation tools, and motivate the development and application of rigorous analytical methods for the global analysis of phase-locked loop based circuits.

Digital accumulators in phase and frequency tracking loops

NASA Technical Reports Server (NTRS)

Hinedi, Sami; Statman, Joseph I.

1990-01-01

Results on the effects of digital accumulators in phase and frequency tracking loops are presented. Digital accumulators or summers are used extensively in digital signal processing to perform averaging or to reduce processing rates to acceptable levels. For tracking the Doppler of high-dynamic targets at low carrier-to-noise ratios, it is shown through simulation and experiment that digital accumulators can contribute an additional loss in operating threshold. This loss was not considered in any previous study and needs to be accounted for in performance prediction analysis. Simulation and measurement results are used to characterize the loss due to the digital summers for three different tracking loops: a digital phase-locked loop, a cross-product automatic frequency tracking loop, and an extended Kalman filter. The tracking algorithms are compared with respect to their frequency error performance and their ability to maintain lock during severe maneuvers at various carrier-to-noise ratios. It is shown that failure to account for the effect of accumulators can result in an inaccurate performance prediction, the extent of which depends highly on the algorithm used.

A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA

NASA Astrophysics Data System (ADS)

Zhujia, Chen; Haigang, Yang; Fei, Liu; Yu, Wang

2011-10-01

A fast-locking all-digital delay-locked loop (ADDLL) is proposed for the DDR SDRAM controller interface in a field programmable gate array (FPGA). The ADDLL performs a 90° phase-shift so that the data strobe (DQS) can enlarge the data valid window in order to minimize skew. In order to further reduce the locking time and to prevent the harmonic locking problem, a time-to-digital converter (TDC) is proposed. A duty cycle corrector (DCC) is also designed in the ADDLL to adjust the output duty cycle to 50%. The ADDLL, implemented in a commercial 0.13 μm CMOS process, occupies a total of 0.017 mm2 of active area. Measurement results show that the ADDLL has an operating frequency range of 75 to 350 MHz and a total delay resolution of 15 ps. The time interval error (TIE) of the proposed circuit is 60.7 ps.

Method of implementing digital phase-locked loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, Jess Brooks, Jr. (Inventor)

1993-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (BLT yields 0) and in a discrete-update formulation with arbitrary BLT. Deficiencies of the continuous-update approximation in large-BLT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops.

Real-time fringe pattern demodulation with a second-order digital phase-locked loop.

PubMed

Gdeisat, M A; Burton, D R; Lalor, M J

2000-10-10

The use of a second-order digital phase-locked loop (DPLL) to demodulate fringe patterns is presented. The second-order DPLL has better tracking ability and more noise immunity than the first-order loop. Consequently, the second-order DPLL is capable of demodulating a wider range of fringe patterns than the first-order DPLL. A basic analysis of the first- and the second-order loops is given, and a performance comparison between the first- and the second-order DPLL's in analyzing fringe patterns is presented. The implementation of the second-order loop in real time on a commercial parallel image processing system is described. Fringe patterns are grabbed and processed, and the resultant phase maps are displayed concurrently.

A method for reducing sampling jitter in digital control systems

NASA Technical Reports Server (NTRS)

Anderson, T. O.; HURBD W. J.; Hurd, W. J.

1969-01-01

Digital phase lock loop system is designed by smoothing the proportional control with a low pass filter. This method does not significantly affect the loop dynamics when the smoothing filter bandwidth is wide compared to loop bandwidth.

Multifrequency zero-jitter delay-locked loop

NASA Astrophysics Data System (ADS)

Efendovich, Avner; Afek, Yachin; Sella, Coby; Bikowsky, Zeev

1994-01-01

The approach of an all-digital phase locked loop is used in this delay-locked loop circuit. This design is designated to a system with two processing units, a master CPU and a slave system chip, that share the same bus. It allows maximum utilization of the bus, as the minimal skew between the clocks of the two components significantly reduces idle periods, and also set-up and hold times. Changes in the operating frequency are possible, without falling out of synchronization. Due to the special lead-lag phase detector, the jitter of the clock is zero, when the loop is locked, under any working conditions.

Performance improvement of a binary quantized all-digital phase-locked loop with a new aided-acquisition technique

NASA Astrophysics Data System (ADS)

Sandoz, J.-P.; Steenaart, W.

1984-12-01

The nonuniform sampling digital phase-locked loop (DPLL) with sequential loop filter, in which the correction sizes are controlled by the accumulated differences of two additional phase comparators, is graphically analyzed. In the absence of noise and frequency drift, the analysis gives some physical insight into the acquisition and tracking behavior. Taking noise into account, a mathematical model is derived and a random walk technique is applied to evaluate the rms phase error and the mean acquisition time. Experimental results confirm the appropriate simplifying hypotheses used in the numerical analysis. Two related performance measures defined in terms of the rms phase error and the acquisition time for a given SNR are used. These measures provide a common basis for comparing different digital loops and, to a limited extent, also with a first-order linear loop. Finally, the behavior of a modified DPLL under frequency deviation in the presence of Gaussian noise is tested experimentally and by computer simulation.

RFI in hybrid loops - Simulation and experimental results.

NASA Technical Reports Server (NTRS)

Ziemer, R. E.; Nelson, D. R.; Raghavan, H. R.

1972-01-01

A digital simulation of an imperfect second-order hybrid phase-locked loop (HPLL) operating in radio frequency interference (RFI) is described. Its performance is characterized in terms of phase error variance and phase error probability density function (PDF). Monte-Carlo simulation is used to show that the HPLL can be superior to the conventional phase-locked loops in RFI backgrounds when minimum phase error variance is the goodness criterion. Similar experimentally obtained data are given in support of the simulation data.

A digital optical phase-locked loop for diode lasers based on field programmable gate array.

PubMed

Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

2012-09-01

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382∕MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad(2) and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

A digital optical phase-locked loop for diode lasers based on field programmable gate array

NASA Astrophysics Data System (ADS)

Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

2012-09-01

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad2 and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

Digital simulation of hybrid loop operation in RFI backgrounds.

NASA Technical Reports Server (NTRS)

Ziemer, R. E.; Nelson, D. R.

1972-01-01

A digital computer model for Monte-Carlo simulation of an imperfect second-order hybrid phase-locked loop (PLL) operating in radio-frequency interference (RFI) and Gaussian noise backgrounds has been developed. Characterization of hybrid loop performance in terms of cycle slipping statistics and phase error variance, through computer simulation, indicates that the hybrid loop has desirable performance characteristics in RFI backgrounds over the conventional PLL or the costas loop.

Improved performance of a digital phase-locked loop combined with a frequency/frequency-rate estimator

NASA Technical Reports Server (NTRS)

Mileant, A.; Simon, M.

1986-01-01

When a digital phase-locked loop with a long loop update time tracks a signal with high Doppler, the demodualtion losses due to frequency mismatch can become very significant. One way of reducing these Doppler-related losses is to compensate for the Doppler effect using some kind of frequency-rate estimator. The performance of the fixed-window least-squares estimator and the Kalman filter is investigated; several Doppler compensating techniques are proposed. It is shown that the variance of the frequency estimator can be made as small as desired, and with this, the Doppler effect can be effectively compensated. The remaining demodulation losses due to phase jitter in the loop can be less than 0.1 dB.

A class of optimum digital phase locked loops for the DSN advanced receiver

NASA Technical Reports Server (NTRS)

Hurd, W. J.; Kumar, R.

1985-01-01

A class of optimum digital filters for digital phase locked loop of the deep space network advanced receiver is discussed. The filter minimizes a weighted combination of the variance of the random component of the phase error and the sum square of the deterministic dynamic component of phase error at the output of the numerically controlled oscillator (NCO). By varying the weighting coefficient over a suitable range of values, a wide set of filters are obtained such that, for any specified value of the equivalent loop-noise bandwidth, there corresponds a unique filter in this class. This filter thus has the property of having the best transient response over all possible filters of the same bandwidth and type. The optimum filters are also evaluated in terms of their gain margin for stability and their steady-state error performance.

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Highly integrated optical heterodyne phase-locked loop with phase/frequency detection.

PubMed

Lu, Mingzhi; Park, Hyunchul; Bloch, Eli; Sivananthan, Abirami; Bhardwaj, Ashish; Griffith, Zach; Johansson, Leif A; Rodwell, Mark J; Coldren, Larry A

2012-04-23

A highly-integrated optical phase-locked loop with a phase/frequency detector and a single-sideband mixer (SSBM) has been proposed and demonstrated for the first time. A photonic integrated circuit (PIC) has been designed, fabricated and tested, together with an electronic IC (EIC). The PIC integrates a widely-tunable sampled-grating distributed-Bragg-reflector laser, an optical 90 degree hybrid and four high-speed photodetectors on the InGaAsP/InP platform. The EIC adds a single-sideband mixer, and a digital phase/frequency detector, to provide single-sideband heterodyne locking from -9 GHz to 7.5 GHz. The loop bandwith is 400 MHz. © 2012 Optical Society of America

A low noise and ultra-narrow bandwidth frequency-locked loop based on the beat method.

PubMed

Gao, Wei; Sui, Jianping; Chen, Zhiyong; Yu, Fang; Sheng, Rongwu

2011-06-01

A novel frequency-locked loop (FLL) based on the beat method is proposed in this paper. Compared with other frequency feedback loops, this FLL is a digital loop with simple structure and very low noise. As shown in the experimental results, this FLL can be used to reduce close-in phase noise on atomic frequency standards, through which a composite frequency standard with ultra-low phase noise and low cost can be easily realized.

Costas loop lock detection in the advanced receiver

NASA Technical Reports Server (NTRS)

Mileant, A.; Hinedi, S.

1989-01-01

The advanced receiver currently being developed uses a Costas digital loop to demodulate the subcarrier. Previous analyses of lock detector algorithms for Costas loops have ignored the effects of the inherent correlation between the samples of the phase-error process. Accounting for this correlation is necessary to achieve the desired lock-detection probability for a given false-alarm rate. Both analysis and simulations are used to quantify the effects of phase correlation on lock detection for the square-law and the absolute-value type detectors. Results are obtained which depict the lock-detection probability as a function of loop signal-to-noise ratio for a given false-alarm rate. The mathematical model and computer simulation show that the square-law detector experiences less degradation due to phase jitter than the absolute-value detector and that the degradation in detector signal-to-noise ratio is more pronounced for square-wave than for sine-wave signals.

Optimal space communications techniques. [using digital and phase locked systems for signal processing

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1974-01-01

Digital multiplication of two waveforms using delta modulation (DM) is discussed. It is shown that while conventional multiplication of two N bit words requires N2 complexity, multiplication using DM requires complexity which increases linearly with N. Bounds on the signal-to-quantization noise ratio (SNR) resulting from this multiplication are determined and compared with the SNR obtained using standard multiplication techniques. The phase locked loop (PLL) system, consisting of a phase detector, voltage controlled oscillator, and a linear loop filter, is discussed in terms of its design and system advantages. Areas requiring further research are identified.

A digital optical phase-locked loop for diode lasers based on field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu Zhouxiang; Zhang Xian; Huang Kaikai

2012-09-15

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat notemore » line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.« less

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-06-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-11-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

All-digital GPS receiver mechanization

NASA Astrophysics Data System (ADS)

Ould, P. C.; van Wechel, R. J.

The paper describes the all-digital baseband correlation processing of GPS signals, which is characterized by (1) a potential for improved antijamming performance, (2) fast acquisition by a digital matched filter, (3) reduction of adjustment, (4) increased system reliability, and (5) provision of a basis for the realization of a high degree of VLSI potential for the development of small economical GPS sets. The basic technical approach consists of a broadband fix-tuned RF converter followed by a digitizer; digital-matched-filter acquisition section; phase- and delay-lock tracking via baseband digital correlation; software acquisition logic and loop filter implementation; and all-digital implementation of the feedback numerical controlled oscillators and code generator. Broadband in-phase and quadrature tracking is performed by an arctangent angle detector followed by a phase-unwrapping algorithm that eliminates false locks induced by sampling and data bit transitions, and yields a wide pull-in frequency range approaching one-fourth of the loop iteration frequency.

Receiver concepts for data transmission at 10 microns

NASA Astrophysics Data System (ADS)

Scholtz, A. L.; Philipp, H. K.; Leeb, W. R.

1984-05-01

Receivers for digitally modulated CO2 laser signals are compared. Incoherent heterodyne receivers and coherent homodyne setups, including the linear phase locked loop (PLL) receiver, the low intermediate frequency translation loop, and the Costas loop receiver were studied. Experiments covered the homodyne systems, emphasizing the linear PLL receiver. Reliable phase lock of the receiver is achieved at carrier levels as low as 3 nW. Reception of signals phase shift keyed with a data rate of up to 150 Mbit/sec is demonstrated at subnanowatt sideband power levels.

High-accuracy resolver-to-digital conversion via phase locked loop based on PID controller

NASA Astrophysics Data System (ADS)

Li, Yaoling; Wu, Zhong

2018-03-01

The problem of resolver-to-digital conversion (RDC) is transformed into the problem of angle tracking control, and a phase locked loop (PLL) method based on PID controller is proposed in this paper. This controller comprises a typical PI controller plus an incomplete differential which can avoid the amplification of higher-frequency noise components by filtering the phase detection error with a low-pass filter. Compared with conventional ones, the proposed PLL method makes the converter a system of type III and thus the conversion accuracy can be improved. Experimental results demonstrate the effectiveness of the proposed method.

A single chip 2 Gbit/s clock recovery subsystem for digital communications

NASA Astrophysics Data System (ADS)

Hickling, Ronald M.

A self-contained clock recovery/data resynchronizer phase locked loop (PLL) for use in microwave and fiber optic digital communications has been fabricated using GaAs integrated circuit technology. The IC contains the analog and digital components for the PLL: an edge-triggered phase detector based on a 1.2 GHz phase/frequency comparator, an op amp for creating the loop filter, and a VCO based on a differential source-coupled pair amplifier.

Fringe pattern demodulation with a two-dimensional digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-dimensional digital phase-locked loop (DPLL) for fringe pattern demodulation is presented. This algorithm is more suitable for demodulation of fringe patterns with varying phase in two directions than the existing DPLL techniques that assume that the phase of the fringe patterns varies only in one direction. The two-dimensional DPLL technique assumes that the phase of a fringe pattern is continuous in both directions and takes advantage of the phase continuity; consequently, the algorithm has better noise performance than the existing DPLL schemes. The two-dimensional DPLL algorithm is also suitable for demodulation of fringe patterns with low sampling rates, and it outperforms the Fourier fringe analysis technique in this aspect.

Optical phase locked loop for transparent inter-satellite communications.

PubMed

Herzog, F; Kudielka, K; Erni, D; Bächtold, W

2005-05-16

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180? 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ;-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 mum.

Optical phase locked loop for transparent inter-satellite communications

NASA Astrophysics Data System (ADS)

Herzog, F.; Kudielka, K.; Erni, D.; Bächtold, W.

2005-05-01

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180◦ 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ^-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 μm.

Computer program CORDET. [computerized simulation of digital phase-lock loop for Omega navigation receiver

NASA Technical Reports Server (NTRS)

Palkovic, R. A.

1974-01-01

A FORTRAN 4 computer program provides convenient simulation of an all-digital phase-lock loop (DPLL). The DPLL forms the heart of the Omega navigation receiver prototype. Through the DPLL, the phase of the 10.2 KHz Omega signal is estimated when the true signal phase is contaminated with noise. This investigation has provided a convenient means of evaluating loop performance in a variety of noise environments, and has proved to be a useful tool for evaluating design changes. The goals of the simulation are to: (1) analyze the circuit on a bit-by-bit level in order to evaluate the overall design; (2) see easily the effects of proposed design changes prior to actual breadboarding; and (3) determine the optimum integration time for the DPLL in an environment typical of general aviation conditions.

Quantizing and sampling considerations in digital phased-locked loops

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

The quantizer problem is first considered. The conditions under which the uniform white sequence model for the quantizer error is valid are established independent of the sampling rate. An equivalent spectral density is defined for the quantizer error resulting in an effective SNR value. This effective SNR may be used to determine quantized performance from infinitely fine quantized results. Attention is given to sampling rate considerations. Sampling rate characteristics of the digital phase-locked loop (DPLL) structure are investigated for the infinitely fine quantized system. The predicted phase error variance equation is examined as a function of the sampling rate. Simulation results are presented and a method is described which enables the minimum required sampling rate to be determined from the predicted phase error variance equations.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, Joseph I.; Hurd, William J.

1990-01-01

The design of digital phase locked loops (DPLL) using estimation theory concepts in the selection of a loop filter is presented. The key concept, that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor, is discussed. The estimator provides recursive estimates of phase, frequency, and higher-order derivatives, and the predictor compensates for the transport lag inherent in the loop.

All optical coherent receiver for self-homodyne detection of digitally phase modulated optical signals

NASA Astrophysics Data System (ADS)

Kiasaleh, Kamran

1994-02-01

A novel optical phase-locked loop (OPLL) system for the self-homodyne detection of digitally phase modulated optical signals is introduced. A Mach-Zehnder type interferometer is used to self-homodyne binary phase-modulated optical signals with an external phase modulator inserted in the control arm of the interferometer.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holes, J. K.; Carl, C.; Tegnelia, C. R. (Inventor)

1973-01-01

A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum.

An approach to the analysis of performance of quasi-optimum digital phase-locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1973-01-01

An approach to the analysis of performance of quasi-optimum digital phase-locked loops (DPLL's) is presented. An expression for the characteristic function of the prior error in the state estimate is derived, and from this expression an infinite dimensional equation for the prior error variance is obtained. The prior error-variance equation is a function of the communication system model and the DPLL gain and is independent of the method used to derive the DPLL gain. Two approximations are discussed for reducing the prior error-variance equation to finite dimension. The effectiveness of one approximation in analyzing DPLL performance is studied.

Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1986-01-01

The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop. Although the loop is entirely digital from an implementation standpoint, it operates at two extremely different sampling rates. In particular, the combination of a phase detector and an integrate-and-dump circuit operates at a very high rate whereas the loop update rate is very slow by comparison. Because of this dichotomy, the loop can be analyzed by hybrid analog/digital (s/z domain) techniques. The loop is modeled in such a general fashion that previous analyses of the Real-Time Combiner (RTC), Subcarrier Demodulator Assembly (SDA), and Symbol Synchronization Assembly (SSA) fall out as special cases.

One way Doppler Extractor. Volume 2: Digital VCO technique

NASA Technical Reports Server (NTRS)

Nossen, E. J.; Starner, E. R.

1974-01-01

A feasibility analysis and trade-offs for a one-way Doppler extractor using digital VCO techniques is presented. The method of Doppler measurement involves the use of a digital phase lock loop; once this loop is locked to the incoming signal, the precise frequency and hence the Doppler component can be determined directly from the contents of the digital control register. The only serious error source is due to internally generated noise. Techniques are presented for minimizing this error source and achieving an accuracy of 0.01 Hz in a one second averaging period. A number of digitally controlled oscillators were analyzed from a performance and complexity point of view. The most promising technique uses an arithmetic synthesizer as a digital waveform generator.

A digital, constant-frequency pulsed phase-locked-loop instrument for real-time, absolute ultrasonic phase measurements

NASA Astrophysics Data System (ADS)

Haldren, H. A.; Perey, D. F.; Yost, W. T.; Cramer, K. E.; Gupta, M. C.

2018-05-01

A digitally controlled instrument for conducting single-frequency and swept-frequency ultrasonic phase measurements has been developed based on a constant-frequency pulsed phase-locked-loop (CFPPLL) design. This instrument uses a pair of direct digital synthesizers to generate an ultrasonically transceived tone-burst and an internal reference wave for phase comparison. Real-time, constant-frequency phase tracking in an interrogated specimen is possible with a resolution of 0.000 38 rad (0.022°), and swept-frequency phase measurements can be obtained. Using phase measurements, an absolute thickness in borosilicate glass is presented to show the instrument's efficacy, and these results are compared to conventional ultrasonic pulse-echo time-of-flight (ToF) measurements. The newly developed instrument predicted the thickness with a mean error of -0.04 μm and a standard deviation of error of 1.35 μm. Additionally, the CFPPLL instrument shows a lower measured phase error in the absence of changing temperature and couplant thickness than high-resolution cross-correlation ToF measurements at a similar signal-to-noise ratio. By showing higher accuracy and precision than conventional pulse-echo ToF measurements and lower phase errors than cross-correlation ToF measurements, the new digitally controlled CFPPLL instrument provides high-resolution absolute ultrasonic velocity or path-length measurements in solids or liquids, as well as tracking of material property changes with high sensitivity. The ability to obtain absolute phase measurements allows for many new applications than possible with previous ultrasonic pulsed phase-locked loop instruments. In addition to improved resolution, swept-frequency phase measurements add useful capability in measuring properties of layered structures, such as bonded joints, or materials which exhibit non-linear frequency-dependent behavior, such as dispersive media.

Performance of the all-digital data-transition tracking loop in the advanced receiver

NASA Astrophysics Data System (ADS)

Cheng, U.; Hinedi, S.

1989-11-01

The performance of the all-digital data-transition tracking loop (DTTL) with coherent or noncoherent sampling is described. The effects of few samples per symbol and of noncommensurate sampling rates and symbol rates are addressed and analyzed. Their impacts on the loop phase-error variance and the mean time to lose lock (MTLL) are quantified through computer simulations. The analysis and preliminary simulations indicate that with three to four samples per symbol, the DTTL can track with negligible jitter because of the presence of earth Doppler rate. Furthermore, the MTLL is also expected to be large engough to maintain lock over a Deep Space Network track.

Frequency set on systems

NASA Astrophysics Data System (ADS)

Wilby, W. A.; Brett, A. R. H.

Frequency set on techniques used in ECM applications include repeater jammers, frequency memory loops (RF and optical), coherent digital RF memories, and closed loop VCO set on systems. Closed loop frequency set on systems using analog phase and frequency locking are considered to have a number of cost and performance advantages. Their performance is discussed in terms of frequency accuracy, bandwidth, locking time, stability, and simultaneous signals. Some experimental results are presented which show typical locking performance. Future ECM systems might require a response to very short pulses. Acoustooptic and fiber-optic pulse stretching techniques can be used to meet such requirements.

Design of a delay-locked-loop-based time-to-digital converter

NASA Astrophysics Data System (ADS)

Zhaoxin, Ma; Xuefei, Bai; Lu, Huang

2013-09-01

A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid “false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7 × 0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.

A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

NASA Astrophysics Data System (ADS)

Kim, Youbean; Kim, Kicheol; Kim, Incheol; Kang, Sungho

Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

Phase-locking and coherent power combining of broadband linearly chirped optical waves.

PubMed

Satyan, Naresh; Vasilyev, Arseny; Rakuljic, George; White, Jeffrey O; Yariv, Amnon

2012-11-05

We propose, analyze and demonstrate the optoelectronic phase-locking of optical waves whose frequencies are chirped continuously and rapidly with time. The optical waves are derived from a common optoelectronic swept-frequency laser based on a semiconductor laser in a negative feedback loop, with a precisely linear frequency chirp of 400 GHz in 2 ms. In contrast to monochromatic waves, a differential delay between two linearly chirped optical waves results in a mutual frequency difference, and an acoustooptic frequency shifter is therefore used to phase-lock the two waves. We demonstrate and characterize homodyne and heterodyne optical phase-locked loops with rapidly chirped waves, and show the ability to precisely control the phase of the chirped optical waveform using a digital electronic oscillator. A loop bandwidth of ~ 60 kHz, and a residual phase error variance of < 0.01 rad(2) between the chirped waves is obtained. Further, we demonstrate the simultaneous phase-locking of two optical paths to a common master waveform, and the ability to electronically control the resultant two-element optical phased array. The results of this work enable coherent power combining of high-power fiber amplifiers-where a rapidly chirping seed laser reduces stimulated Brillouin scattering-and electronic beam steering of chirped optical waves.

Phase-lock loop frequency control and the dropout problem

NASA Technical Reports Server (NTRS)

Attwood, S.; Kline, A. J.

1968-01-01

Technique automatically sets the frequency of narrow band phase-lock loops within automatic lock-in-range. It presets a phase-lock loop to a desired center frequency with a closed loop electronic frequency discriminator and holds the phase-lock loop to that center frequency until lock is achieved.

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy.

PubMed

Mehta, M M; Chandrasekhar, V

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy

NASA Astrophysics Data System (ADS)

Mehta, M. M.; Chandrasekhar, V.

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

Doppler extraction with a digital VCO

NASA Technical Reports Server (NTRS)

Starner, E. R.; Nossen, E. J.

1977-01-01

Digitally controlled oscillator in phased-locked loop may be useful for data communications systems, or may be modified to serve as information extraction component of microwave or optical system for collision avoidance or automatic braking. Instrument is frequency-synthesizing device with output specified precisely by digital number programmed into frequency register.

FPGA implementation of self organizing map with digital phase locked loops.

PubMed

Hikawa, Hiroomi

2005-01-01

The self-organizing map (SOM) has found applicability in a wide range of application areas. Recently new SOM hardware with phase modulated pulse signal and digital phase-locked loops (DPLLs) has been proposed (Hikawa, 2005). The system uses the DPLL as a computing element since the operation of the DPLL is very similar to that of SOM's computation. The system also uses square waveform phase to hold the value of the each input vector element. This paper discuss the hardware implementation of the DPLL SOM architecture. For effective hardware implementation, some components are redesigned to reduce the circuit size. The proposed SOM architecture is described in VHDL and implemented on field programmable gate array (FPGA). Its feasibility is verified by experiments. Results show that the proposed SOM implemented on the FPGA has a good quantization capability, and its circuit size very small.

Digital processing of RF signals from optical frequency combs

NASA Astrophysics Data System (ADS)

Cizek, Martin; Smid, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Cip, Ondřej

2013-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Secondly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique used for assessing the offset and repetition frequencies of the comb, resulting in digital servo-loop stabilization of the fs comb. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset frequency of the fs comb.

Digital processing of signals from femtosecond combs

NASA Astrophysics Data System (ADS)

Čížek, Martin; Šmíd, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Číp, Ondrej

2012-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique and with fully digital servo-loop stabilization of the fs comb. Secondly, we are using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset and repetition frequencies of the fs comb.

Digital approach to stabilizing optical frequency combs and beat notes of CW lasers

NASA Astrophysics Data System (ADS)

Čížek, Martin; Číp, Ondřej; Å míd, Radek; Hrabina, Jan; Mikel, Břetislav; Lazar, Josef

2013-10-01

In cases when it is necessary to lock optical frequencies generated by an optical frequency comb to a precise radio frequency (RF) standard (GPS-disciplined oscillator, H-maser, etc.) the usual practice is to implement phase and frequency-locked loops. Such system takes the signal generated by the RF standard (usually 10 MHz or 100 MHz) as a reference and stabilizes the repetition and offset frequencies of the comb contained in the RF output of the f-2f interferometer. These control loops are usually built around analog electronic circuits processing the output signals from photo detectors. This results in transferring the stability of the standard from RF to optical frequency domain. The presented work describes a different approach based on digital signal processing and software-defined radio algorithms used for processing the f-2f and beat-note signals. Several applications of digital phase and frequency locks to a RF standard are demonstrated: the repetition (frep) and offset frequency (fceo) of the comb, and the frequency of the beat note between a CW laser source and a single component of the optical frequency comb spectrum.

Hybrid Analog/Digital Receiver

NASA Technical Reports Server (NTRS)

Brown, D. H.; Hurd, W. J.

1989-01-01

Advanced hybrid analog/digital receiver processes intermediate-frequency (IF) signals carrying digital data in form of phase modulation. Uses IF sampling and digital phase-locked loops to track carrier and subcarrier signals and to synchronize data symbols. Consists of three modules: IF assembly, signal-processing assembly, and test-signal assembly. Intended for use in Deep Space Network, but presumably basic design modified for such terrestrial uses as communications or laboratory instrumentation where signals weak and/or noise strong.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop

NASA Astrophysics Data System (ADS)

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (˜100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop.

PubMed

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (~100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

Improving Estimates Of Phase Parameters When Amplitude Fluctuates

NASA Technical Reports Server (NTRS)

Vilnrotter, V. A.; Brown, D. H.; Hurd, W. J.

1989-01-01

Adaptive inverse filter applied to incoming signal and noise. Time-varying inverse-filtering technique developed to improve digital estimate of phase of received carrier signal. Intended for use where received signal fluctuates in amplitude as well as in phase and signal tracked by digital phase-locked loop that keeps its phase error much smaller than 1 radian. Useful in navigation systems, reception of time- and frequency-standard signals, and possibly spread-spectrum communication systems.

All-digital signal-processing open-loop fiber-optic gyroscope with enlarged dynamic range.

PubMed

Wang, Qin; Yang, Chuanchuan; Wang, Xinyue; Wang, Ziyu

2013-12-15

We propose and realize a new open-loop fiber-optic gyroscope (FOG) with an all-digital signal-processing (DSP) system where an all-digital phase-locked loop is employed for digital demodulation to eliminate the variation of the source intensity and suppress the bias drift. A Sagnac phase-shift tracking method is proposed to enlarge the dynamic range, and, with its aid, a new open-loop FOG, which can achieve a large dynamic range and high sensitivity at the same time, is realized. The experimental results show that compared with the conventional open-loop FOG with the same fiber coil and optical devices, the proposed FOG reduces the bias instability from 0.259 to 0.018 deg/h, and the angle random walk from 0.031 to 0.006 deg/h(1/2), moreover, enlarges the dynamic range to ±360 deg/s, exceeding the maximum dynamic range ±63 deg/s of the conventional open-loop FOG.

NASA GSFC Report on CCSDS Recommendations 2.1.8A B Minimum Earth Station Transmitter Frequency Resolution for Spacecraft Receiver Acquisition

NASA Technical Reports Server (NTRS)

Fong, Wai; Lee, Wing

2017-01-01

In Fall 2016, ESA presented paper SLS-RFM 16-10 documenting a possible issue with the frequency lock-in range specification in Recommendation 2.1.8A of typically 267 to 1067 Hz in considerings (b) from considerings (a) for loop bandwidths [2B(sub LO)] in the range of 200 to 800 Hz with a recommendation of 100 Hz step size for frequency sweeping. The paper calculated the lock-in range to be (+/-)266 to (+/-)1064 rad/s or (+/-)42 to (+/-)168 Hz. Also, Recommendation 2.1.8B has the same issue for considering (a) and (b), i.e. for 2B(sub LO) =10 Hz, a lock-in range of 13 Hz was specified and a recommendation of 5 Hz step size for frequency sweeping. ESA also provided test results from the Rosetta and Exomars transponders. The results were somewhat inconsistent since the tests to verify lock-in and pull-in range did not include acquisition time, which is vital to the definition of these performance measures. This paper will address these test results below. However, we first examine the rationale for Recommendation 2.1.8A/B and its consistency with the theory of 2nd order phase lock loop operations. Our approach is to design a digital phase locked loop (DPLL) from phase locked loop (PLL) requirements. All analysis will be performed with a DPLL.

Acquisition and Tracking Behavior of Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Viterbi, A. J.

1958-01-01

Phase-locked or APC loops have found increasing applications in recent years as tracking filters, synchronizing devices, and narrowband FM discriminators. Considerable work has been performed to determine the noise-squelching properties of the loop when it is operating in or near phase lock and is functioning as a linear coherent detector. However, insufficient consideration has been devoted to the non-linear behavior of the loop when it is out of lock and in the process of pulling in. Experimental evidence has indicated that there is a strong tendency for phase-locked loops to achieve lock under most circumstances. However, the analysis which has appeared in the literature iis limited to the acquisition of a constant frequency reference signal with only one phase-locked loop filter configuration. This work represents an investigation of frequency acquisition properties of phase-locked loops for a variety of reference-signal behavior and loop configurations

Spectral estimation of received phase in the presence of amplitude scintillation

NASA Technical Reports Server (NTRS)

Vilnrotter, V. A.; Brown, D. H.; Hurd, W. J.

1988-01-01

A technique is demonstrated for obtaining the spectral parameters of the received carrier phase in the presence of carrier amplitude scintillation, by means of a digital phased locked loop. Since the random amplitude fluctuations generate time-varying loop characteristics, straightforward processing of the phase detector output does not provide accurate results. The method developed here performs a time-varying inverse filtering operation on the corrupted observables, thus recovering the original phase process and enabling accurate estimation of its underlying parameters.

Electrical crosstalk-coupling measurement and analysis for digital closed loop fibre optic gyro

NASA Astrophysics Data System (ADS)

Jin, Jing; Tian, Hai-Ting; Pan, Xiong; Song, Ning-Fang

2010-03-01

The phase modulation and the closed-loop controller can generate electrical crosstalk-coupling in digital closed-loop fibre optic gyro. Four electrical cross-coupling paths are verified by the open-loop testing approach. It is found the variation of ramp amplitude will lead to the alternation of gyro bias. The amplitude and the phase parameters of the electrical crosstalk signal are measured by lock-in amplifier, and the variation of gyro bias is confirmed to be caused by the alternation of phase according to the amplitude of the ramp. A digital closed-loop fibre optic gyro electrical crosstalk-coupling model is built by approximating the electrical cross-coupling paths as a proportion and integration segment. The results of simulation and experiment show that the modulation signal electrical crosstalk-coupling can cause the dead zone of the gyro when a small angular velocity is inputted, and it could also lead to a periodic vibration of the bias error of the gyro when a large angular velocity is inputted.

Digital receiver study and implementation

NASA Technical Reports Server (NTRS)

Fogle, D. A.; Lee, G. M.; Massey, J. C.

1972-01-01

Computer software was developed which makes it possible to use any general purpose computer with A/D conversion capability as a PSK receiver for low data rate telemetry processing. Carrier tracking, bit synchronization, and matched filter detection are all performed digitally. To aid in the implementation of optimum computer processors, a study of general digital processing techniques was performed which emphasized various techniques for digitizing general analog systems. In particular, the phase-locked loop was extensively analyzed as a typical non-linear communication element. Bayesian estimation techniques for PSK demodulation were studied. A hardware implementation of the digital Costas loop was developed.

Analysis and optimisation of the convergence behaviour of the single channel digital tanlock loop

NASA Astrophysics Data System (ADS)

Al-Kharji Al-Ali, Omar; Anani, Nader; Al-Araji, Saleh; Al-Qutayri, Mahmoud

2013-09-01

The mathematical analysis of the convergence behaviour of the first-order single channel digital tanlock loop (SC-DTL) is presented. This article also describes a novel technique that allows controlling the convergence speed of the loop, i.e. the time taken by the phase-error to reach its steady-state value, by using a specialised controller unit. The controller is used to adjust the convergence speed so as to selectively optimise a given performance parameter of the loop. For instance, the controller may be used to speed up the convergence in order to increase the lock range and improve the acquisition speed. However, since increasing the lock range can degrade the noise immunity of the system, in a noisy environment the controller can slow down the convergence speed until locking is achieved. Once the system is in lock, the convergence speed can be increased to improve the acquisition speed. The performance of the SC-DTL system was assessed against similar arctan-based loops and the results demonstrate the success of the controller in optimising the performance of the SC-DTL loop. The results of the system testing using MATLAB/Simulink simulation are presented. A prototype of the proposed system was implemented using a field programmable gate array module and the practical results are in good agreement with those obtained by simulation.

High resolution angular sensor. [reducing ring laser gyro output quantization using phase locked loops

NASA Technical Reports Server (NTRS)

Gneses, M. I.; Berg, D. S.

1981-01-01

Specifications for the pointing stabilization system of the large space telescope were used in an investigation of the feasibility of reducing ring laser gyro output quantization to the sub-arc-second level by the use of phase locked loops and associated electronics. Systems analysis procedures are discussed and a multioscillator laser gyro model is presented along with data on the oscillator noise. It is shown that a second order closed loop can meet the measurement noise requirements when the loop gain and time constant of the loop filter are appropriately chosen. The preliminary electrical design is discussed from the standpoint of circuit tradeoff considerations. Analog, digital, and hybrid designs are given and their applicability to the high resolution sensor is examined. the electrical design choice of a system configuration is detailed. The design and operation of the various modules is considered and system block diagrams are included. Phase 1 and 2 test results using the multioscillator laser gyro are included.

Phase-locked Optical Signal Recovery

DTIC Science & Technology

2009-01-01

detection . However, implementing an optical phase lock loop ( OPLL ) to generate the synchronised carrier for the homodyne technique requires... Loop (OIPLL) in which a narrow bandwidth optical phase lock loop ( OPLL ) is used to control the free -running frequency of an optically injection...receiver uses an Optical Injection Phase Lock Loop (OIPLL) for carrier recovery,

Phase-locked Optical Signal Recovery

DTIC Science & Technology

2009-01-01

detection . However, implementing an optical phase lock loop ( OPLL ) to generate the synchronised carrier for the homodyne technique requires... Loop (OIPLL) in which a narrow bandwidth optical phase lock loop ( OPLL ) is used to control the free -running frequency of an optically injection...The receiver uses an Optical Injection Phase Lock Loop (OIPLL) for carrier

Optical frequency locked loop for long-term stabilization of broad-line DFB laser frequency difference

NASA Astrophysics Data System (ADS)

Lipka, Michał; Parniak, Michał; Wasilewski, Wojciech

2017-09-01

We present an experimental realization of the optical frequency locked loop applied to long-term frequency difference stabilization of broad-line DFB lasers along with a new independent method to characterize relative phase fluctuations of two lasers. The presented design is based on a fast photodiode matched with an integrated phase-frequency detector chip. The locking setup is digitally tunable in real time, insensitive to environmental perturbations and compatible with commercially available laser current control modules. We present a simple model and a quick method to optimize the loop for a given hardware relying exclusively on simple measurements in time domain. Step response of the system as well as phase characteristics closely agree with the theoretical model. Finally, frequency stabilization for offsets within 4-15 GHz working range achieving <0.1 Hz long-term stability of the beat note frequency for 500 s averaging time period is demonstrated. For these measurements we employ an I/Q mixer that allows us to precisely and independently measure the full phase trace of the beat note signal.

Optimal space communications techniques. [all digital phase locked loop for FM demodulation

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1973-01-01

The design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.

Phase-locked loop design with fast-digital-calibration charge pump

NASA Astrophysics Data System (ADS)

Wang, San-Fu; Hwang, Tsuen-Shiau; Wang, Jhen-Ji

2016-02-01

A fast-digital-calibration technique is proposed for reducing current mismatch in the charge pump (CP) of a phase-locked loop (PLL). The current mismatch in the CP generates fluctuations, which is transferred to the input of voltage-controlled oscillator (VCO). Therefore, the current mismatch increases the reference spur in the PLL. Improving current match of CP will reduce the reference spur and decrease the static phase offset of PLLs. Moreover, the settling time, ripple and power consumption of the PLL are also improved by the proposed technique. This study evaluated a 2.27-2.88 GHz frequency synthesiser fabricated in TSMC 0.18 μm CMOS 1.8 V process. The tuning range of proposed VCO is about 26%. By using the fast-digital-calibration technique, current mismatch is reduced to lower than 0.97%, and the operation range of the proposed CP is between 0.2 and 1.6 V. The proposed PLL has a total power consumption of 22.57 mW and a settling time of 10 μs or less.

Precision and Fast Wavelength Tuning of a Dynamically Phase-Locked Widely-Tunable Laser

NASA Technical Reports Server (NTRS)

Numata, Kenji; Chen, Jeffrey R.; Wu, Stewart T.

2012-01-01

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a 40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than 40 s upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

NASA Astrophysics Data System (ADS)

Prinzie, Jeffrey; Christiansen, Jorgen; Moreira, Paulo; Steyaert, Michiel; Leroux, Paul

2018-04-01

This work presents an introduction to radiation hardened Phase Locked Loops (PLLs) for nuclear and high-energy physics application. An experimental circuit has been fabricated and irradiated with Xrays up to 600 Mrad. Heavy ions with an LET between 3.2 and 69.2 MeV.cm2/mg were used to verify the SEU cross section of the devices. A Two-photon Absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. The presented circuit employs TMR in the digital logic and an asynchronous phase-frequency detector (PFD) is presented. The PLL has a ringand LC-oscillator to be compared experimentally. The circuit has been fabricated in a 65 nm CMOS technology.

Design and Measurement of a Digital Phase Locked BWO for Accurately Extracting the Quality Factors in a Biconcave Resonator System

NASA Astrophysics Data System (ADS)

Gao, Yuanci; Charles, Jones R.; Yu, Guofen; Jyotsna, Dutta M.

2012-03-01

A long loop phase locked backward-wave oscillator (BWO) for a high quality factor resonator system operating at D-band frequencies (130-170GHz) was described, the phase noise of the phased locked BWO was analyzed and measured at typical frequencies. When it used with a high quality factor open resonator for measuring the quality factor of simple harmonic resonators based on the magnitude transfer characteristic, this system has proven to be capable of accurate measuring the quality factor as high as 0.8 million with an uncertainty of less than 1.3% (Lorentzian fitting) at typical frequencies in the range of 130GHz-170GHz.

The Statistical Loop Analyzer (SLA)

NASA Technical Reports Server (NTRS)

Lindsey, W. C.

1985-01-01

The statistical loop analyzer (SLA) is designed to automatically measure the acquisition, tracking and frequency stability performance characteristics of symbol synchronizers, code synchronizers, carrier tracking loops, and coherent transponders. Automated phase lock and system level tests can also be made using the SLA. Standard baseband, carrier and spread spectrum modulation techniques can be accomodated. Through the SLA's phase error jitter and cycle slip measurements the acquisition and tracking thresholds of the unit under test are determined; any false phase and frequency lock events are statistically analyzed and reported in the SLA output in probabilistic terms. Automated signal drop out tests can be performed in order to trouble shoot algorithms and evaluate the reacquisition statistics of the unit under test. Cycle slip rates and cycle slip probabilities can be measured using the SLA. These measurements, combined with bit error probability measurements, are all that are needed to fully characterize the acquisition and tracking performance of a digital communication system.

Radiation-hardened-by-design clocking circuits in 0.13-μm CMOS technology

NASA Astrophysics Data System (ADS)

You, Y.; Huang, D.; Chen, J.; Gong, D.; Liu, T.; Ye, J.

2014-01-01

We present a single-event-hardened phase-locked loop for frequency generation applications and a digital delay-locked loop for DDR2 memory interface applications. The PLL covers a 12.5 MHz to 500 MHz frequency range with an RMS Jitter (RJ) of 4.70-pS. The DLL operates at 267 MHz and has a phase resolution of 60-pS. Designed in 0.13-μm CMOS technology, the PLL and the DLL are hardened against SEE for charge injection of 250 fC. The PLL and the DLL consume 17 mW and 22 mW of power under a 1.5 V power supply, respectively.

Performance Analysis of Digital Tracking Loops for Telemetry Ranging Applications

NASA Astrophysics Data System (ADS)

Vilnrotter, V.; Hamkins, J.; Xie, H.; Ashrafi, S.

2015-08-01

In this article, we analyze mathematical models of digital loops used to track the phase and timing of communications and navigation signals. The limits on the accuracy of phase and timing estimates play a critical role in the accuracy achievable in telemetry ranging applications. We describe in detail a practical algorithm to compute the loop parameters for discrete update (DU) and continuous update (CU) loop formulations, and we show that a simple power-series approximation to the DU model is valid over a large range of time-bandwidth product . Several numerical examples compare the estimation error variance of the DU and CU models to each other and to Cramer-Rao lower bounds. Finally, the results are applied to the problem of ranging, by evaluating the performance of a phase-locked loop designed to track a typical ambiguity-resolving pseudonoise (PN) code received and demodulated at the spacecraft on the uplink part of the two-way ranging link, and a data transition tracking loop (DTTL) on the downlink part.

A comparison of methods for DPLL loop filter design

NASA Technical Reports Server (NTRS)

Aguirre, S.; Hurd, W. J.; Kumar, R.; Statman, J.

1986-01-01

Four design methodologies for loop filters for a class of digital phase-locked loops (DPLLs) are presented. The first design maps an optimum analog filter into the digital domain; the second approach designs a filter that minimizes in discrete time weighted combination of the variance of the phase error due to noise and the sum square of the deterministic phase error component; the third method uses Kalman filter estimation theory to design a filter composed of a least squares fading memory estimator and a predictor. The last design relies on classical theory, including rules for the design of compensators. Linear analysis is used throughout the article to compare different designs, and includes stability, steady state performance and transient behavior of the loops. Design methodology is not critical when the loop update rate can be made high relative to loop bandwidth, as the performance approaches that of continuous time. For low update rates, however, the miminization method is significantly superior to the other methods.

An automatic tracking system for phase-noise measurement.

PubMed

Yuen, Chung Ming; Tsang, Kim Fung

2005-05-01

A low cost, automatic tracking system for phase noise measurement has been implemented successfully. The tracking system is accomplished by applying a charge pump phase-locked loop as an external reference source to a digital spectrum analyzer. Measurement of a 2.5 GHz, free-running, voltage-controlled oscillator demonstrated the tracking accuracy, thus verifying the feasibility of the system.

Synthesis and evaluation of phase detectors for active bit synchronizers

NASA Technical Reports Server (NTRS)

Mcbride, A. L.

1974-01-01

Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.

Precision and fast wavelength tuning of a dynamically phase-locked widely-tunable laser.

PubMed

Numata, Kenji; Chen, Jeffrey R; Wu, Stewart T

2012-06-18

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a ~40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than ~40 μs upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Hierarchical CAD Tools for Radiation Hardened Mixed Signal Electronic Circuits

DTIC Science & Technology

2005-01-28

11 Figure 3: Schematic of Analog and Digital Components 12 Figure 4: Dose Rate Syntax 14 Figure 5: Single Event Effects (SEE) Syntax 15 Figure 6...Harmony-AMS simulation of a Digital Phase Locked Loop 19 Figure 10: SEE results from DPLL Simulation 20 Figure 11: Published results used for validation...analog and digital circuitry. Combining the analog and digital elements onto a single chip has several advantages, but also creates unique challenges

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Yeh, H.-G.

1993-01-01

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

A fuzzy control design case: The fuzzy PLL

NASA Technical Reports Server (NTRS)

Teodorescu, H. N.; Bogdan, I.

1992-01-01

The aim of this paper is to present a typical fuzzy control design case. The analyzed controlled systems are the phase-locked loops (PLL's)--classic systems realized in both analogic and digital technology. The crisp PLL devices are well known.

Fractional-N phase-locked loop for split and direct automatic frequency control in A-GPS

NASA Astrophysics Data System (ADS)

Park, Chester Sungchung; Park, Sungkyung

2018-07-01

A low-power mixed-signal phase-locked loop (PLL) is modelled and designed for the DigRF interface between the RF chip and the modem chip. An assisted-GPS or A-GPS multi-standard system includes the DigRF interface and uses the split automatic frequency control (AFC) technique. The PLL circuitry uses the direct AFC technique and is based on the fractional-N architecture using a digital delta-sigma modulator along with a digital counter, fulfilling simple ultra-high-resolution AFC with robust digital circuitry and its timing. Relative to the output frequency, the measured AFC resolution or accuracy is <5 parts per billion (ppb) or on the order of a Hertz. The cycle-to-cycle rms jitter is <6 ps and the typical settling time is <30 μs. A spur reduction technique is adopted and implemented as well, demonstrating spur reduction without employing dithering. The proposed PLL includes a low-leakage phase-frequency detector, a low-drop-out regulator, power-on-reset circuitry and precharge circuitry. The PLL is implemented in a 90-nm CMOS process technology with 1.2 V single supply. The overall PLL draws about 1.1 mA from the supply.

Neural Networks For Demodulation Of Phase-Modulated Signals

NASA Technical Reports Server (NTRS)

Altes, Richard A.

1995-01-01

Hopfield neural networks proposed for demodulating quadrature phase-shift-keyed (QPSK) signals carrying digital information. Networks solve nonlinear integral equations prior demodulation circuits cannot solve. Consists of set of N operational amplifiers connected in parallel, with weighted feedback from output terminal of each amplifier to input terminals of other amplifiers. Used to solve signal processing problems. Implemented as analog very-large-scale integrated circuit that achieves rapid convergence. Alternatively, implemented as digital simulation of such circuit. Also used to improve phase estimation performance over that of phase-locked loop.

Homodyne Phase-Shift-Keying Systems: Past Challenges and Future Opportunities

NASA Astrophysics Data System (ADS)

Kazovsky, Leonid G.; Kalogerakis, Georgios; Shaw, Wei-Tao

2006-12-01

Homodyne phase-shift-keying systems can achieve the best receiver sensitivity and the longest transmission distance among all optical communication systems. This paper reviews recent research efforts in the field and examines future possibilities that might lead toward potential practical use of these systems. Additionally, phase estimation techniques based on feed-forward phase recovery and digital delay-lock loop approaches are examined, simulated, and compared.

Digital PCM bit synchronizer and detector

NASA Astrophysics Data System (ADS)

Moghazy, A. E.; Maral, G.; Blanchard, A.

1980-08-01

A theoretical analysis of a digital self-bit synchronizer and detector is presented and supported by the implementation of an experimental model that utilizes standard TTL logic circuits. This synchronizer is based on the generation of spectral line components by nonlinear filtering of the received bit stream, and extracting the line by a digital phase-locked loop (DPLL). The extracted reference signal instructs a digital matched filter (DMF) data detector. This realization features a short acquisition time and an all-digital structure.

Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation

NASA Astrophysics Data System (ADS)

Degaudenzi, Riccardo; Vanghi, Vieri

1994-02-01

In all-digital Trellis-Coded 8PSK (TC-8PSK) demodulator well suited for VLSI implementation, including maximum likelihood estimation decision-directed (MLE-DD) carrier phase and clock timing recovery, is introduced and analyzed. By simply removing the trellis decoder the demodulator can efficiently cope with uncoded 8PSK signals. The proposed MLE-DD synchronization algorithm requires one sample for the phase and two samples per symbol for the timing loop. The joint phase and timing discriminator characteristics are analytically derived and numerical results checked by means of computer simulations. An approximated expression for steady-state carrier phase and clock timing mean square error has been derived and successfully checked with simulation findings. Synchronizer deviation from the Cramer Rao bound is also discussed. Mean acquisition time for the digital synchronizer has also been computed and checked, using the Monte Carlo simulation technique. Finally, TC-8PSK digital demodulator performance in terms of bit error rate and mean time to lose lock, including digital interpolators and synchronization loops, is presented.

Low-cost, digital lock-in module with external reference for coating glass transmission/reflection spectrophotometer

NASA Astrophysics Data System (ADS)

Alonso, R.; Villuendas, F.; Borja, J.; Barragán, L. A.; Salinas, I.

2003-05-01

A versatile, low-cost, digital signal processor (DSP) based lock-in module with external reference is described. This module is used to implement an industrial spectrophotometer for measuring spectral transmission and reflection of automotive and architectonic coating glasses over the ultraviolet, visible and near-infrared wavelength range. The light beams are modulated with an optical chopper. A digital phase-locked loop (DPLL) is used to lock the lock-in to the chop frequency. The lock-in rejects the ambient radiation and permits the spectrophotometer to work in the presence of ambient light. The algorithm that implements the dual lock-in and the DPLL in the DSP56002 evaluation module from Motorola is described. The use of a DSP allows implementation of the lock-in and DPLL by software, which gives flexibility and programmability to the system. Lock-in module cost, under 300 euro, is an important parameter taking into account that two modules are used in the system. Besides, the algorithms implemented in this DSP can be directly implemented in the latest DSP generations. The DPLL performance and the spectrophotometer are characterized. Capture and lock DPLL ranges have been measured and checked to be greater than the chop frequency drifts. The lock-in measured frequency response shows that the lock-in performs as theoretically predicted.

Reconfigurable firmware-defined radios synthesized from standard digital logic cells

NASA Astrophysics Data System (ADS)

Faisal, Muhammad; Park, Youngmin; Wentzloff, David D.

2011-06-01

This paper presents recent work on reconfigurable all-digital radio architectures. We leverage the flexibility and scalability of synthesized digital cells to construct reconfigurable radio architectures that consume significantly less power than a software defined radio implementing similar architectures. We present two prototypes of such architectures that can receive and demodulate FM and FRS band signals. Moreover, a radio architecture based on a reconfigurable alldigital phase-locked loop for coherent demodulation is presented.

Self-organized synchronization of digital phase-locked loops with delayed coupling in theory and experiment

PubMed Central

Wetzel, Lucas; Jörg, David J.; Pollakis, Alexandros; Rave, Wolfgang; Fettweis, Gerhard; Jülicher, Frank

2017-01-01

Self-organized synchronization occurs in a variety of natural and technical systems but has so far only attracted limited attention as an engineering principle. In distributed electronic systems, such as antenna arrays and multi-core processors, a common time reference is key to coordinate signal transmission and processing. Here we show how the self-organized synchronization of mutually coupled digital phase-locked loops (DPLLs) can provide robust clocking in large-scale systems. We develop a nonlinear phase description of individual and coupled DPLLs that takes into account filter impulse responses and delayed signal transmission. Our phase model permits analytical expressions for the collective frequencies of synchronized states, the analysis of stability properties and the time scale of synchronization. In particular, we find that signal filtering introduces stability transitions that are not found in systems without filtering. To test our theoretical predictions, we designed and carried out experiments using networks of off-the-shelf DPLL integrated circuitry. We show that the phase model can quantitatively predict the existence, frequency, and stability of synchronized states. Our results demonstrate that mutually delay-coupled DPLLs can provide robust and self-organized synchronous clocking in electronic systems. PMID:28207779

Optical injection phase-lock loops

NASA Astrophysics Data System (ADS)

Bordonalli, Aldario Chrestani

Locking techniques have been widely applied for frequency synchronisation of semiconductor lasers used in coherent communication and microwave signal generation systems. Two main locking techniques, the optical phase-lock loop (OPLL) and optical injection locking (OIL) are analysed in this thesis. The principal limitations on OPLL performance result from the loop propagation delay, which makes difficult the implementation of high gain and wide bandwidth loops, leading to poor phase noise suppression performance and requiring the linewidths of the semiconductor laser sources to be less than a few megahertz for practical values of loop delay. The OIL phase noise suppression is controlled by the injected power. The principal limitations of the OIL implementation are the finite phase error under locked conditions and the narrow stable locking range the system provides at injected power levels required to reduce the phase noise output of semiconductor lasers significantly. This thesis demonstrates theoretically and experimentally that it is possible to overcome the limitations of OPLL and OIL systems by combining them, to form an optical injection phase-lock loop (OIPLL). The modelling of an OIPLL system is presented and compared with the equivalent OPLL and OIL results. Optical and electrical design of an homodyne OIPLL is detailed. Experimental results are given which verify the theoretical prediction that the OIPLL would keep the phase noise suppression as high as that of the OIL system over a much wider stable locking range, even with wide linewidth lasers and long loop delays. The experimental results for lasers with summed linewidth of 36 MHz and a loop delay of 15 ns showed measured phase error variances as low as 0.006 rad2 (500 MHz bandwidth) for locking bandwidths greater than 26 GHz, compared with the equivalent OPLL phase error variance of around 1 rad2 (500 MHz bandwidth) and the equivalent OIL locking bandwidth of less than 1.2 GHz.

Development of high precision digital driver of acoustic-optical frequency shifter for ROG

NASA Astrophysics Data System (ADS)

Zhang, Rong; Kong, Mei; Xu, Yameng

2016-10-01

We develop a high precision digital driver of the acoustic-optical frequency shifter (AOFS) based on the parallel direct digital synthesizer (DDS) technology. We use an atomic clock as the phase-locked loop (PLL) reference clock, and the PLL is realized by a dual digital phase-locked loop. A DDS sampling clock up to 320 MHz with a frequency stability as low as 10-12 Hz is obtained. By constructing the RF signal measurement system, it is measured that the frequency output range of the AOFS-driver is 52-58 MHz, the center frequency of the band-pass filter is 55 MHz, the ripple in the band is less than 1 dB@3MHz, the single channel output power is up to 0.3 W, the frequency stability is 1 ppb (1 hour duration), and the frequency-shift precision is 0.1 Hz. The obtained frequency stability has two orders of improvement compared to that of the analog AOFS-drivers. For the designed binary frequency shift keying (2-FSK) and binary phase shift keying (2-PSK) modulation system, the demodulating frequency of the input TTL synchronous level signal is up to 10 kHz. The designed digital-bus coding/decoding system is compatible with many conventional digital bus protocols. It can interface with the ROG signal detecting software through the integrated drive electronics (IDE) and exchange data with the two DDS frequency-shift channels through the signal detecting software.

Digital correlation detector for low-cost Omega navigation

NASA Technical Reports Server (NTRS)

Chamberlin, K. A.

1976-01-01

Techniques to lower the cost of using the Omega global navigation network with phase-locked loops (PLL) were developed. The technique that was accepted as being "optimal" is called the memory-aided phase-locked loop (MAPLL) since it allows operation on all eight Omega time slots with one PLL through the implementation of a random access memory. The receiver front-end and the signals that it transmits to the PLL were first described. A brief statistical analysis of these signals was then made to allow a rough comparison between the front-end presented in this work and a commercially available front-end to be made. The hardware and theory of application of the MAPLL were described, ending with an analysis of data taken with the MAPLL. Some conclusions and recommendations were also given.

Novel All Digital Ring Cavity Locking Servo

NASA Astrophysics Data System (ADS)

Baker, J.; Gallant, D.; Lucero, A.; Miller, H.; Stohs, J.

We plan to use this servo in the new 50W 589-nm sodium guidestar laser to be installed in the AMOS facility in July 2010. Though the basic design is unchanged from the successful Hillman/Denman design, numerous improvements are being implemented in order to bring the device even further out of the lab and into the field. The basic building block of the Hillman/Denman design are two low noise master oscillators that are injected into higher power slave oscillators that are locked to the frequencies of the master oscillator cavities. In the previous system a traditional analog Pound-Drever-Hall (PDH) loop was employed to provide the frequency locking. Analog servos work well, in general, but robust locking for a complex set of multiply-interconnected PDH servos in the guidestar source challenges existing analog approaches. One of the significant changes demonstrated thus far is the implementation of an all-digital servo using only COTS components and a fast CISC processing architecture for orchestrating the basic PDH loops active within system. Compared to the traditionally used analog servo loops, an all-digital servo is a not only an orders-of-magnitude simpler servo loop to implement but the control loop can be modified by merely changing the computer code. Field conditions are often different from laboratory conditions, requiring subtle algorithm changes, and physical accessibility in the field is generally limited and difficult. Remotely implemented, trimmer-less and solderless servo upgrades are a much welcomed improvement in the field installed guidestar system. Also, OEM replacement of usual benchtop components saves considerable space and weight as well in the locking system. We will report on the details of the servo system and recent experimental results locking a master-slave laser oscillator system using the all-digital Pound-Drever-Hall loop.

Phase-locked-loop interferometry applied to aspheric testing with a computer-stored compensator.

PubMed

Servin, M; Malacara, D; Rodriguez-Vera, R

1994-05-01

A recently developed technique for continuous-phase determination of interferograms with a digital phase-locked loop (PLL) is applied to the null testing of aspheres. Although this PLL demodulating scheme is also a synchronous or direct interferometric technique, the separate unwrapping process is not explicitly required. The unwrapping and the phase-detection processes are achieved simultaneously within the PLL. The proposed method uses a computer-generated holographic compensator. The holographic compensator does not need to be printed out by any means; it is calculated and used from the computer. This computer-stored compensator is used as the reference signal to phase demodulate a sample interferogram obtained from the asphere being tested. Consequently the demodulated phase contains information about the wave-front departures from the ideal computer-stored aspheric interferogram. Wave-front differences of ~ 1 λ are handled easily by the proposed PLL scheme. The maximum recorded frequency in the template's interferogram as well as in the sampled interferogram are assumed to be below the Nyquist frequency.

A decision directed detector for the phase incoherent Gaussian channel

NASA Technical Reports Server (NTRS)

Kazakos, D.

1975-01-01

A vector digital signalling scheme is proposed for simultaneous adaptive data transmission and phase estimation. The use of maximum likelihood estimation methods predicts a better performance than the phase-locked loop. The phase estimate is shown to converge to the true value, so that the adaptive nature of the detector effectively achieves phase acquisition and improvement in performance. No separate synchronization interval is required and phase fluctuations can be tracked simultaneously with the transmission of information.

Timing performance of phased-locked loops in optical pulse position modulation communication systems

NASA Technical Reports Server (NTRS)

Lafaw, D. A.; Gardner, C. S.

1984-01-01

An optical digital communication system requires that an accurate clock signal be available at the receiver for proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. Timing errors cause energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. A timing subsystem for a satellite-to-satellite optical PPM communication link is simulated. The receiver employs direct photodetection, preprocessing of the detected signal, and a phase-locked loop for timing synchronization. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical calculations.

Timing performance of phased-locked loops in optical pulse position modulation communication systems

NASA Astrophysics Data System (ADS)

Lafaw, D. A.; Gardner, C. S.

1984-08-01

An optical digital communication system requires that an accurate clock signal be available at the receiver for proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. Timing errors cause energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. A timing subsystem for a satellite-to-satellite optical PPM communication link is simulated. The receiver employs direct photodetection, preprocessing of the detected signal, and a phase-locked loop for timing synchronization. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical calculations.

Phase-locked-loop-based delay-line-free picosecond electro-optic sampling system

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2003-04-01

A delay-line-free, high-speed electro-optic sampling (EOS) system is proposed by employing a delay-time-controlled ultrafast laser diode as the optical probe. Versatile optoelectronic delay-time controllers (ODTCs) based on modified voltage-controlled phase-locked-loop phase-shifting technologies are designed for the laser. The integration of the ODTC circuit and the pulsed laser diode has replaced the traditional optomechanical delay-line module used in the conventional EOS system. This design essentially prevents sampling distortion from misalignment of the probe beam, and overcomes the difficulty in sampling free-running high-speed transients. The maximum tuning range, error, scanning speed, tuning responsivity, and resolution of the ODTC are 3.9π (700°), <5% deviation, 25-2405 ns/s, 0.557 ps/mV, and ˜1 ps, respectively. Free-running wave forms from the analog, digital, and pulsed microwave signals are sampled and compared with those measured by the commercial apparatus.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1986-01-01

An approach to the design of digital phase locked loops (DPLLs), using estimation theory concepts in the selection of a loop filter, is presented. The key concept is that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor. The estimator provides recursive estimates of phase, frequency, and higher order derivatives, while the predictor compensates for the transport lag inherent in the loop. This decomposition results in a straightforward loop filter design procedure, enabling use of techniques from optimal and sub-optimal estimation theory. A design example for a particular choice of estimator is presented, followed by analysis of the associated bandwidth, gain margin, and steady state errors caused by unmodeled dynamics. This approach is under consideration for the design of the Deep Space Network (DSN) Advanced Receiver Carrier DPLL.

Noise reduction and control in mode-locked semiconductor diode lasers for use in next-generation all-optical analog-to-digital converters

NASA Astrophysics Data System (ADS)

DePriest, Christopher M.; Abeles, Joseph H.; Braun, Alan; Delfyett, Peter J., Jr.

2000-07-01

External-cavity, actively-modelocked semiconductor diode lasers (SDLs) have proven to be attractive candidates for forming the backbone of next-generation analog-to-digital converters (ADCs), which are currently being developed to sample signals at repetition rates exceeding several GHz with up to 12 bits of digital resolution. Modelocked SDLs are capable of producing waveform-sampling pulse trains with very low temporal jitter (phase noise) and very small fluctuations in pulse height (amplitude noise)--two basic conditions that must be met in order for high-speed ADCs to achieve projected design goals. Single-wavelength modelocked operation (at nominal repetition frequencies of 400 MHz) has produced pulse trains with very low amplitude noise (approximately 0.08%), and the implementation of a phase- locked-loop has been effective in reducing the system's low- frequency phase noise (RMS timing jitter for offset frequencies between 10 Hz and 10 kHz has been reduced from 240 fs to 27 fs).

Advanced Optical Fiber Communications Systems

DTIC Science & Technology

1994-08-31

phase locking . The PZT port has a tuning coefficient of 3.4 MHz/V. The time constants of the optical phase - locked loop ( OPLL ) filter’s pole and zero are... with the PSK receiver optical phase -I-ocked loop ( OPLL ). As we increased nz in our experiments, the larger signal fluctuations made it increasingly... lasers , since a phase - locked loop is 114 I not required for the DPSK receiver (unlike

A digitalized silicon microgyroscope based on embedded FPGA.

PubMed

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-09-27

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system.

A Digitalized Silicon Microgyroscope Based on Embedded FPGA

PubMed Central

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-01-01

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system. PMID:23201990

Efficient dynamic coherence transfer relying on offset locking using optical phase-locked loop

NASA Astrophysics Data System (ADS)

Xie, Weilin; Dong, Yi; Bretenaker, Fabien; Shi, Hongxiao; Zhou, Qian; Xia, Zongyang; Qin, Jie; Zhang, Lin; Lin, Xi; Hu, Weisheng

2018-01-01

We design and experimentally demonstrate a highly efficient coherence transfer based on composite optical phaselocked loop comprising multiple feedback servo loops. The heterodyne offset-locking is achieved by conducting an acousto-optic frequency shifter in combination with the current tuning and the temperature controlling of the semiconductor laser. The adaptation of the composite optical phase-locked loop enables the tight coherence transfer from a frequency comb to a semiconductor laser in a fully dynamic manner.

A synchronization technique for the on-board master clock of a regenerative TDMA satellite communications system

NASA Astrophysics Data System (ADS)

Pattini, F.; Porzio Giusto, P.

The design criteria and performance of the master clock (MCK) generator and the unique word (UW) detector are examined. A narrow band phase lock loop is used for the onboard MCK generator and it is implemented with an all-digital scheme that employs a D-type flip flop as the phase detector. The performance of the MCK generator is analyzed with a computer program which considers phase offset of the digital phase comparator. The characteristics and capabilities of the UW detector which provides strobe signals for the MCK generator and synchronization signals for the onboard switching matrix are described.

Filter for third order phase locked loops

NASA Technical Reports Server (NTRS)

Crow, R. B.; Tausworthe, R. C. (Inventor)

1973-01-01

Filters for third-order phase-locked loops are used in receivers to acquire and track carrier signals, particularly signals subject to high doppler-rate changes in frequency. A loop filter with an open-loop transfer function and set of loop constants, setting the damping factor equal to unity are provided.

Digital Doppler measurement with spacecraft

NASA Technical Reports Server (NTRS)

Kinman, Peter W.; Hinedi, Sami M.; Labelle, Remi C.; Bevan, Roland P.; Del Castillo, Hector M.; Chong, Dwayne C.

1991-01-01

Digital and analog phase-locked loop (PLL) receivers were operated in parallel, each tracking the residual carrier from a spacecraft. The PLL tracked the downlink carrier and measured its instantaneous phase. This information, combined with a knowledge of the uplink carrier and the transponder ratio, permitted the computation of a Doppler observable. In this way, two separate Doppler measurements were obtained for one observation window. The two receivers agreed on the magnitude of the Doppler effect to within 1 mHz. There was less jitter on the data from the digital receiver. This was due to its smaller noise bandwidth. The demonstration and its results are described.

Simplified formula for mean cycle-slip time of phase-locked loops with steady-state phase error.

NASA Technical Reports Server (NTRS)

Tausworthe, R. C.

1972-01-01

Previous work shows that the mean time from lock to a slipped cycle of a phase-locked loop is given by a certain double integral. Accurate numerical evaluation of this formula for the second-order loop is extremely vexing because the difference between exponentially large quantities is involved. The presented article demonstrates a method in which a much-reduced precision program can be used to obtain the mean first-cycle slip time for a loop of arbitrary degree tracking at a specified SNR and steady-state phase error. It also presents a simple approximate formula that is asymptotically tight at higher loop SNR.

Ultra-low noise optical phase-locked loop

NASA Astrophysics Data System (ADS)

Ayotte, Simon; Babin, André; Costin, François

2014-03-01

The relative phase between two fiber lasers is controlled via a high performance optical phase-locked loop (OPLL). Two parameters are of particular importance for the design: the intrinsic phase noise of the laser (i.e. its linewidth) and a high-gain, low-noise electronic locking loop. In this work, one of the lowest phase noise fiber lasers commercially available was selected (i.e. NP Photonics Rock fiber laser module), with sub-kHz linewidth at 1550.12 nm. However, the fast tuning mechanism of such lasers is through stretching its cavity length with a piezoelectric transducer which has a few 10s kHz bandwidth. To further increase the locking loop bandwidth to several MHz, a second tuning mechanism is used by adding a Lithium Niobate phase modulator in the laser signal path. The OPLL is thus divided into two locking loops, a slow loop acting on the laser piezoelectric transducer and a fast loop acting on the phase modulator. The beat signal between the two phase-locked lasers yields a highly pure sine wave with an integrated phase error of 0.0012 rad. This is orders of magnitude lower than similar existing systems such as the Laser Synthesizer used for distribution of photonic local oscillator (LO) for the Atacama Large Millimeter Array radio telescope in Chile. Other applications for ultra-low noise OPLL include coherent power combining, Brillouin sensing, light detection and ranging (LIDAR), fiber optic gyroscopes, phased array antenna and beam steering, generation of LOs for next generation coherent communication systems, coherent analog optical links, terahertz generation and coherent spectroscopy.

Optically phase-locked electronic speckle pattern interferometer

NASA Astrophysics Data System (ADS)

Moran, Steven E.; Law, Robert; Craig, Peter N.; Goldberg, Warren M.

1987-02-01

The design, theory, operation, and characteristics of an optically phase-locked electronic speckle pattern interferometer (OPL-ESPI) are described. The OPL-ESPI system couples an optical phase-locked loop with an ESPI system to generate real-time equal Doppler speckle contours of moving objects from unstable sensor platforms. In addition, the optical phase-locked loop provides the basis for a new ESPI video signal processing technique which incorporates local oscillator phase shifting coupled with video sequential frame subtraction.

Closed-Loop Control of Vortex Formation in Separated Flows

NASA Technical Reports Server (NTRS)

Colonius, Tim; Joe, Won Tae; MacMynowski, Doug; Rowley, Clancy; Taira, Sam; Ahuja, Sunil

2010-01-01

In order to phase lock the flow at the desired shedding cycle, particularly at Phi,best, We designed a feedback compensator. (Even though the open-loop forcing at Wf below Wn can lead to phase-locked limit cycles with a high average lift,) This feedback controller resulted in the phase-locked limit cycles that the open-loop control could not achieve for alpha=30 and 40 Particularly for alpha=40, the feedback was able to stabilize the limit cycle that was not stable with any of the open-loop periodic forcing. This results in stable phase-locked limit cycles for a larger range of forcing frequencies than the open-loop control. Also, it was shown that the feedback achieved the high-lift unsteady flow states that open-loop control could not sustain even after the states have been achieved for a long period of time.

Field-programmable gate array-controlled sweep velocity-locked laser pulse generator

NASA Astrophysics Data System (ADS)

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-05-01

A field-programmable gate array (FPGA)-controlled sweep velocity-locked laser pulse generator (SV-LLPG) design based on an all-digital phase-locked loop (ADPLL) is proposed. A distributed feedback laser with modulated injection current was used as a swept-frequency laser source. An open-loop predistortion modulation waveform was calibrated using a feedback iteration method to initially improve frequency sweep linearity. An ADPLL control system was then implemented using an FPGA to lock the output of a Mach-Zehnder interferometer that was directly proportional to laser sweep velocity to an on-board system clock. Using this system, linearly chirped laser pulses with a sweep bandwidth of 111.16 GHz were demonstrated. Further testing evaluating the sensing utility of the system was conducted. In this test, the SV-LLPG served as the swept laser source of an optical frequency-domain reflectometry system used to interrogate a subterahertz range fiber structure (sub-THz-FS) array. A static strain test was then conducted and linear sensor results were observed.

Timing performance of phase-locked loops in optical pulse position modulation communication systems

NASA Astrophysics Data System (ADS)

Lafaw, D. A.

In an optical digital communication system, an accurate clock signal must be available at the receiver to provide proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. A timing error causes energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. This report simulates a timing subsystem for a satellite-to-satellite optical PPM communication link. The receiver employs direct photodetection, preprocessing of the optical signal, and a phase-locked loop for timing synchronization. The photodetector output is modeled as a filtered, doubly stochastic Poisson shot noise process. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical relations.

Ultrahigh-speed clock recovery with optical phase lock loop based on four-wave-mixing in a semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Kim, Dong Hwan; Kim, Sang Hyuck; Jo, Jae Cheol; Choi, Sang Sam

2000-08-01

A new phase lock loop (PLL) is proposed and demonstrated for clock recovery from 40 Gbps time-division-multiplexed (TDM) optical signal using simple optical phase lock loop circuit. The proposed clock recovery scheme improves the jitter effect in PLL circuit from the clock pulse laser of harmonically-mode locked fiber laser. The cross-correlation component between the optical signal and an optical clock pulse train is detected as a four-wave-mixing (FWM) signal generated in SOA. The lock-in frequency range of the clock recovery is found to be within 10 KHz.

Introduction of a new opto-electrical phase-locked loop in CMOS technology: the PMD-PLL

NASA Astrophysics Data System (ADS)

Ringbeck, Thorsten; Schwarte, Rudolf; Buxbaum, Bernd

1999-12-01

The huge and increasing need of information in the industrial world demands an enormous potential of bandwidth in telecommunication systems. Optical communication provides all participants with the whole spectrum of digital services like videophone, cable TV, video conferencing and online services. Especially fast and low cost opto-electrical receivers are badly needed in order to expand fiber networks to every home (FTTH--fiber to the home or FTTD--fiber to the desk, respectively). This paper proposes a new receiver structure which is designed to receiver optical data which are encoded by code division multiple access techniques (CDMA). For data recovery in such CDMA networks phase locked loops (PLL) are needed, which synchronize the local oscillator with the incoming clock. In optical code division multiple access networks these PLLs could be realized either with an electrical PLL after opto-electrical converting or directly in the optical path with a pure optical PLL.

Note: Low phase noise programmable phase-locked loop with high temperature stability.

PubMed

Michálek, Vojtěch; Procházka, Ivan

2017-03-01

The design and construction of low jitter programmable phase-locked loop with low temperature coefficient of phase are presented. It has been designed for demanding high precision timing applications, especially as a clock source for event timer with subpicosecond precision. The phase-locked loop itself has a jitter of few hundreds of femtoseconds. It produces square wave with programmable output frequency from 100 MHz to 500 MHz and programmable amplitude of 0.25 V to 1.2 V peak-to-peak, which is locked to 5 MHz or 10 MHz reference frequency common for disciplined oscillators and highly stable clocks such as hydrogen maser. Moreover, it comprises an on-board temperature compensated crystal oscillator for stand-alone usage. The device provides temperature coefficient of the phase lock of 0.9 ps/K near room temperature.

Low cost omega navigation receiver

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1974-01-01

The development of a low cost Omega navigation receiver is discussed. Emphasis is placed on the completion and testing of a modular, multipurpose Omega receiver which utilizes a digital memory-aided, phase-locked loop to provide phase measurement data to a variety of applications interfaces. The functional units contained in the prototype device are described. The receiver is capable of receiving and storing phase measurements for up to eight Omega signals and computes two switch-selectable lines of position, displaying this navigation data in chart-recorded form.

Effect of various features on the life cycle cost of the timing/synchronization subsystem of the DCS digital communications network

NASA Technical Reports Server (NTRS)

Kimsey, D. B.

1978-01-01

The effect on the life cycle cost of the timing subsystem was examined, when these optional features were included in various combinations. The features included mutual control, directed control, double-ended reference links, independence of clock error measurement and correction, phase reference combining, self-organization, smoothing for link and nodal dropouts, unequal reference weightings, and a master in a mutual control network. An overall design of a microprocessor-based timing subsystem was formulated. The microprocessor (8080) implements the digital filter portion of a digital phase locked loop, as well as other control functions such as organization of the network through communication with processors at neighboring nodes.

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Banerjee, Tanmoy, E-mail: tbanerjee@phys.buruniv.ac.in; Paul, Bishwajit; Sarkar, B. C.

2014-03-15

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strengthmore » the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.« less

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system.

PubMed

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B C

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

NASA Astrophysics Data System (ADS)

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B. C.

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

Study of Interpolated Timing Recovery Phase-Locked Loop with Linearly Constrained Adaptive Prefilter for Higher-Density Optical Disc

NASA Astrophysics Data System (ADS)

Kajiwara, Yoshiyuki; Shiraishi, Junya; Kobayashi, Shoei; Yamagami, Tamotsu

2009-03-01

A digital phase-locked loop (PLL) with a linearly constrained adaptive filter (LCAF) has been studied for higher-linear-density optical discs. LCAF has been implemented before an interpolated timing recovery (ITR) PLL unit in order to improve the quality of phase error calculation by using an adaptively equalized partial response (PR) signal. Coefficient update of an asynchronous sampled adaptive FIR filter with a least-mean-square (LMS) algorithm has been constrained by a projection matrix in order to suppress the phase shift of the tap coefficients of the adaptive filter. We have developed projection matrices that are suitable for Blu-ray disc (BD) drive systems by numerical simulation. Results have shown the properties of the projection matrices. Then, we have designed the read channel system of the ITR PLL with an LCAF model on the FPGA board for experiments. Results have shown that the LCAF improves the tilt margins of 30 gigabytes (GB) recordable BD (BD-R) and 33 GB BD read-only memory (BD-ROM) with a sufficient LMS adaptation stability.

Phase ambiguity resolution for offset QPSK modulation systems

NASA Technical Reports Server (NTRS)

Nguyen, Tien M. (Inventor)

1991-01-01

A demodulator for Offset Quaternary Phase Shift Keyed (OQPSK) signals modulated with two words resolves eight possible combinations of phase ambiguity which may produce data error by first processing received I(sub R) and Q(sub R) data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the words to not only reverse the received I(sub R) and Q(sub R) data channels, but to also invert (complement) the I(sub R) and/or Q(sub R) data, or to at least complement the I(sub R) and Q(sub R) data for systems using nontransparent codes that do not have rotation direction ambiguity.

Wideband digital frequency detector with subtraction-based phase comparator for frequency modulation atomic force microscopy.

PubMed

Mitani, Yuji; Kubo, Mamoru; Muramoto, Ken-ichiro; Fukuma, Takeshi

2009-08-01

We have developed a wideband digital frequency detector for high-speed frequency modulation atomic force microscopy (FM-AFM). We used a subtraction-based phase comparator (PC) in a phase-locked loop circuit instead of a commonly used multiplication-based PC, which has enhanced the detection bandwidth to 100 kHz. The quantitative analysis of the noise performance revealed that the internal noise from the developed detector is small enough to provide the theoretically limited noise performance in FM-AFM experiments in liquid. FM-AFM imaging of mica in liquid was performed with the developed detector, showing its stability and applicability to true atomic-resolution imaging in liquid.

Beat note stabilization of a 10-60 GHz dual-polarization microlaser through optical down conversion.

PubMed

Rolland, A; Brunel, M; Loas, G; Frein, L; Vallet, M; Alouini, M

2011-02-28

Down-conversion of a high-frequency beat note to an intermediate frequency is realized by a Mach-Zehnder intensity modulator. Optically-carried microwave signals in the 10-60 GHz range are synthesized by using a two-frequency solid-state microchip laser as a voltage-controlled oscillator inside a digital phase-locked loop. We report an in-loop relative frequency stability better than 2.5×10⁻¹¹. The principle is applicable to beat notes in the millimeter-wave range.

A frequency standard via spectrum analysis and direct digital synthesis

NASA Astrophysics Data System (ADS)

Li, Dawei; Shi, Daiting; Hu, Ermeng; Wang, Yigen; Tian, Lu; Zhao, Jianye; Wang, Zhong

2014-11-01

We demonstrated a frequency standard based on a detuned coherent population beating phenomenon. In this phenomenon, the beat frequency of the radio frequency for laser modulation and the hyperfine splitting can be obtained by digital signal processing technology. After analyzing the spectrum of the beat frequency, the fluctuation information is obtained and applied to compensate for the frequency shift to generate the standard frequency by the digital synthesis method. Frequency instability of 2.6 × 1012 at 1000 s is observed in our preliminary experiment. By eliminating the phase-locking loop, the method will enable us to achieve a full-digital frequency standard with remarkable stability.

Binary processing and display concepts for low-cost Omega receivers. [airborne systems simulation

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1974-01-01

A description is given of concepts related to plans for developing a low-cost, all-digital Omega receiver capable of offering to the small-aircraft pilot a reliable and accurate navigation aid. The receiver base considered includes a receiver front-end module, a receiver control module, a memory-aided phase-locked loop module, a housekeeping timer module, and a synthesizer module.

Stabilization and control of the carrier-envelope phase of high-power femtosecond laser pulses using the direct locking technique.

PubMed

Imran, Tayyab; Lee, Yong S; Nam, Chang H; Hong, Kyung-Han; Yu, Tae J; Sung, Jae H

2007-01-08

We have stabilized and electronically controlled the carrier-envelope phase (CEP) of high-power femtosecond laser pulses, generated in a grating-based chirped-pulse amplification kHz Ti:sapphire laser, using the direct locking technique [Opt. Express 13, 2969 (2005)] combined with a slow feedback loop. An f-2f spectral interferometer has shown the CEP stabilities of 1.2 rad with the direct locking loop applied to the oscillator and of 180 mrad with an additional slow feedback loop, respectively. The electronic CEP modulations that can be easily realized in the direct locking loop are also demonstrated with the amplified pulses.

A low jitter PLL clock used for phase change memory

NASA Astrophysics Data System (ADS)

Xiao, Hong; Houpeng, Chen; Zhitang, Song; Daolin, Cai; Xi, Li

2013-02-01

A fully integrated low-jitter, precise frequency CMOS phase-locked loop (PLL) clock for the phase change memory (PCM) drive circuit is presented. The design consists of a dynamic dual-reset phase frequency detector (PFD) with high frequency acquisition, a novel low jitter charge pump, a CMOS ring oscillator based voltage-controlled oscillator (VCO), a 2nd order passive loop filter, and a digital frequency divider. The design is fabricated in 0.35 μm CMOS technology and consumes 20 mW from a supply voltage of 5 V. In terms of the PCM's program operation requirement, the output frequency range is from 1 to 140 MHz. For the 140 MHz output frequency, the circuit features a cycle-to-cycle jitter of 28 ps RMS and 250 ps peak-to-peak.

Demodulation of messages received with low signal to noise ratio

NASA Astrophysics Data System (ADS)

Marguinaud, A.; Quignon, T.; Romann, B.

The implementation of this all-digital demodulator is derived from maximum likelihood considerations applied to an analytical representation of the received signal. Traditional adapted filters and phase lock loops are replaced by minimum variance estimators and hypothesis tests. These statistical tests become very simple when working on phase signal. These methods, combined with rigorous control data representation allow significant computation savings as compared to conventional realizations. Nominal operation has been verified down to energetic signal over noise of -3 dB upon a QPSK demodulator.

Integrated source and channel encoded digital communication system design study. [for space shuttles

NASA Technical Reports Server (NTRS)

Huth, G. K.

1976-01-01

The results of several studies Space Shuttle communication system are summarized. These tasks can be divided into the following categories: (1) phase multiplexing for two- and three-channel data transmission, (2) effects of phase noise on the performance of coherent communication links, (3) analysis of command system performance, (4) error correcting code tradeoffs, (5) signal detection and angular search procedure for the shuttle Ku-band communication system, and (6) false lock performance of Costas loop receivers.

New spatial diversity equalizer based on PLL

NASA Astrophysics Data System (ADS)

Rao, Wei

2011-10-01

A new Spatial Diversity Equalizer (SDE) based on phase-locked loop (PLL) is proposed to overcome the inter-symbol interference (ISI) and phase rotations simultaneously in the digital communication system. The proposed SDE consists of equal gain combining technique based on a famous blind equalization algorithm constant modulus algorithm (CMA) and a PLL. Compared with conventional SDE, the proposed SDE has not only faster convergence rate and lower residual error but also the ability to recover carrier phase rotation. The efficiency of the method is proved by computer simulation.

Binary phase lock loops for simplified OMEGA receivers

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1974-01-01

A sampled binary phase lock loop is proposed for periodically correcting OMEGA receiver internal clocks. The circuit is particularly simple to implement and provides a means of generating long range 3.4 KHz difference frequency lanes from simultaneous pair measurements.

Remotely manageable system for stabilizing femtosecond lasers

NASA Astrophysics Data System (ADS)

Cizek, Martin; Hucl, Vaclav; Smid, Radek; Mikel, Bretislav; Lazar, Josef; Cip, Ondrej

2014-05-01

In the field of precise measurement of optical frequencies, laser spectroscopy and interferometric distance surveying the optical frequency synthesizers (femtosecond combs) are used as optical frequency references. They generate thousands of narrow-linewidth coherent optical frequencies at the same time. The spacing of generated components equals to the repetition frequency of femtosecond pulses of the laser. The position of the comb spectrum has a frequency offset that is derived from carrier to envelope frequency difference. The repetition frequency and mentioned frequency offset belong to main controlled parameters of the optical frequency comb. If these frequencies are electronically locked an ultrastable frequency standard (i.e. H-maser, Cs- or Rb- clock), its relative stability is transferred to the optical frequency domain. We present a complete digitally controlled signal processing chain for phase-locked loop (PLL) control of the offset frequency. The setup is able to overcome some dropouts caused by the femtosecond laser non-stabilities (temperature drifts, ripple noise and electricity spikes). It is designed as a two-stage control loop, where controlled offset frequency is permanently monitored by digital signal processing. In case of dropouts of PLL, the frequency-locked loop keeps the controlled frequency in the required limits. The presented work gives the possibility of long-time operation of femtosecond combs which is necessary when the optical frequency stability measurement of ultra-stable lasers is required. The detailed description of the modern solution of the PLL with remote management is presented.

Heart-Rate and Breath-Rate Monitor

NASA Technical Reports Server (NTRS)

Cooper, T. G.

1983-01-01

Circuit requiring only four integrated circuits (IC's) measures both heart rate and breath rate. Phase-locked loops lock on heart-rate and respiration-rate input signals. Each loop IC contains two phase comparators. Positive-edge-triggered circuit used in making monitors insensitive to dutycycle variations.

Sample-Clock Phase-Control Feedback

NASA Technical Reports Server (NTRS)

Quirk, Kevin J.; Gin, Jonathan W.; Nguyen, Danh H.; Nguyen, Huy

2012-01-01

To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.

Optoelectronic frequency discriminated phase tuning technology and its applications

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2000-07-01

By using a phase-tunable optoelectronic phase-locked loop, we are able to continuously change the phase as well as the delay-time of optically distributed microwave clock signals or optical pulse train. The advantages of the proposed technique include such as wide-band operation up to 20GHz, wide-range tuning up to 640 degrees, high tuning resolution of <6x10-2 degree/mV, ultra-low short-term phase fluctuation and drive of 4.7x10-2 degree and 3.4x10- 3 degree/min, good linearity with acceptable deviations, and frequency-independent transferred function with slope of nearly 90 degrees/volt, etc. The novel optoelectronic phase shifter is performed by using a DC-voltage controlled, optoelectronic-mixer-based, frequency-down-converted digital phase-locked-loop. The maximum delay-time is continuously tunable up to 3.9 ns for optical pulses repeated at 500 MHz from a gain-switched laser diode. This corresponds to a delay responsivity of about 0.54 ps/mV. The using of the OEPS as being an optoelectronic delay-time controller for optical pulses is demonstrated with temporal resolution of <0.2 ps. Electro-optic sampling of high-frequency microwave signals by using the in-situ delay-time-tunable pulsed laser as a novel optical probe is primarily reported.

2.4-3.2 GHz robust self-injecting injection-locked phase-locked loop

NASA Astrophysics Data System (ADS)

Yang, Jincheng; Zhang, Zhao; Qi, Nan; Liu, Liyuan; Liu, Jian; Wu, Nanjian

2018-04-01

In this paper, we propose a robust self-injecting injection-locked phase-locked loop (SI-ILPLL). It adopts a phase alignment loop (PAL) based on a subsampling phase frequency detector to align the phase between the injected pulse and the voltage-controlled oscillator (VCO) output. With the proposed phase frequency detector, the PAL performs phase alignment and the pulse generator can self-inject pulses into the VCO for injection locking. The subsampling phase detection and self-injection locking techniques can suppress the phase noise of the SI-ILPLL. The SI-ILPLL shows excellent robustness to environmental interference. The SI-ILPLL is implemented in 65 nm CMOS technology. It occupies an active area of 0.7 mm2. The measured root-mean-square (RMS) jitters at 3.2 GHz output without and with injection locking are 216 and 131 fs, respectively. When the supply voltage varies from 1.17 to 1.23 V and the temperature varies from 0 to 80 °C, the maximum jitter variation of all the output frequencies is less than 50 fs. The measured results demonstrate that even when a large interference appears at the supply voltage and unlocks the SI-ILPLL, the SI-ILPLL can self-recover its injection-locked state rapidly after the disturbance disappears, whereas the conventional ILPLL cannot self-recover its locked state after losing it. The power consumption of the SI-ILPLL is 7.4 mW under a 1.2 V supply voltage. The SI-ILPLL achieves a figure of merit (FOM) of -249 dB.

Method to suppress DDFS spurious signals in a frequency-hopping synthesizer with DDFS-driven PLL architecture.

PubMed

Kwon, Kun-Sup; Yoon, Won-Sang

2010-01-01

In this paper we propose a method of removing from synthesizer output spurious signals due to quasi-amplitude modulation and superposition effect in a frequency-hopping synthesizer with direct digital frequency synthesizer (DDFS)-driven phase-locked loop (PLL) architecture, which has the advantages of high frequency resolution, fast transition time, and small size. There are spurious signals that depend on normalized frequency of DDFS. They can be dominant if they occur within the PLL loop bandwidth. We suggest that such signals can be eliminated by purposefully creating frequency errors in the developed synthesizer.

Performance Analysis of Digital Los Link, Manila Embassy - Santa Rita, Philippines.

DTIC Science & Technology

1981-12-01

Rate = 26 Mbs 17 17 • I, 102 99 PEETANT. HEIGHT AT SNART 505 103 99.99 RECEIVE EN ANTENN HEIGHT AT NL MAS MLMTR w I ,H IHT9 .9 the ratio of the...PF3DB COSGAM 0003031 loop 4O ?SP’ = ’,2 4.?D3F = ’,E12., 000001 C 000001 Dl = Dl /29;) . 0 01 D-7 = 𔃼 52q0.00000 ?STC OSIC* 18. ?1000001 FEE FEE_...and Level II, QPR, transmission and receiving can be accomplished with this model. Design parameters for filters, data rates, phase lock loops (PPL

Improved frequency/voltage converters for fast quartz crystal microbalance applications.

PubMed

Torres, R; García, J V; Arnau, A; Perrot, H; Kim, L To Thi; Gabrielli, C

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1 kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10 mVHz, for a frequency shift resolution of 0.1 Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5 to 10 MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

Improved frequency/voltage converters for fast quartz crystal microbalance applications

NASA Astrophysics Data System (ADS)

Torres, R.; García, J. V.; Arnau, A.; Perrot, H.; Kim, L. To Thi; Gabrielli, C.

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10mV/Hz, for a frequency shift resolution of 0.1Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5to10MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

A tunable, double-wavelength heterodyne detection interferometer with frequency-locked diode-pumped Nd:YAG sources for absolute measurements

NASA Astrophysics Data System (ADS)

Gelmini, E.; Minoni, U.; Docchio, F.

1995-08-01

A double heterodyne interferometric instrument using a tunable synthetic wavelength for the absolute measurements of distance and position is presented. The optical synthetic wavelength is generated by a pair of PZT-tunable diode-pumped Nd:YAG lasers operating at 1.064 μm. Based on a closed-loop scheme, a suitable electronic circuit has been developed to implement the frequency locking of the two lasers. A digital frequency comparator provides an error signal, used to control the slave laser, by comparing the laser beat frequency to a reference oscillator. Demodulation of the superheterodyne signals is obtained by a rf detector followed by low-pass filtering. Distance measurements are obtained by a digital phase meter gauging the phase difference between the demodulated signals from a measuring interferometer and from a reference interferometer. The paper presents the optical and the electronic layouts of the instrument as well as experimental results from a laboratory prototype.

Method for digital measurement of phase-frequency characteristics for a fixed-length ultrasonic spectrometer

NASA Astrophysics Data System (ADS)

Astashev, M. E.; Belosludtsev, K. N.; Kharakoz, D. P.

2014-05-01

One of the most accurate methods for measuring the compressibility of liquids is resonance measurement of sound velocity in a fixed-length interferometer. This method combines high sensitivity, accuracy, and small sample volume of the test liquid. The measuring principle is to study the resonance properties of a composite resonator that contains a test liquid sample. Ealier, the phase-locked loop (PLL) scheme was used for this. In this paper, we propose an alternative measurement scheme based on digital analysis of harmonic signals, describe the implementation of this scheme using commercially available data acquisition modules, and give examples of test measurements with accuracy evaluations of the results.

Torque control for electric motors

NASA Technical Reports Server (NTRS)

Bernard, C. A.

1980-01-01

Method for adjusting electric-motor torque output to accomodate various loads utilizes phase-lock loop to control relay connected to starting circuit. As load is imposed, motor slows down, and phase lock is lost. Phase-lock signal triggers relay to power starting coil and generate additional torque. Once phase lock is recoverd, relay restores starting circuit to its normal operating mode.

Digital multi-channel stabilization of four-mode phase-sensitive parametric multicasting.

PubMed

Liu, Lan; Tong, Zhi; Wiberg, Andreas O J; Kuo, Bill P P; Myslivets, Evgeny; Alic, Nikola; Radic, Stojan

2014-07-28

Stable four-mode phase-sensitive (4MPS) process was investigated as a means to enhance two-pump driven parametric multicasting conversion efficiency (CE) and signal to noise ratio (SNR). Instability of multi-beam, phase sensitive (PS) device that inherently behaves as an interferometer, with output subject to ambient induced fluctuations, was addressed theoretically and experimentally. A new stabilization technique that controls phases of three input waves of the 4MPS multicaster and maximizes CE was developed and described. Stabilization relies on digital phase-locked loop (DPLL) specifically was developed to control pump phases to guarantee stable 4MPS operation that is independent of environmental fluctuations. The technique also controls a single (signal) input phase to optimize the PS-induced improvement of the CE and SNR. The new, continuous-operation DPLL has allowed for fully stabilized PS parametric broadband multicasting, demonstrating CE improvement over 20 signal copies in excess of 10 dB.

Short Range 10 Gb/s THz Communications. Proof of Concept Phase 2

DTIC Science & Technology

2011-12-01

heterodyned are phase locked to spectral lines selected from the optical frequency comb generator (OFCG) using optical phase locked loops ( OPLLs ) or by...systems by optical heterodyne generation (OHG), in which the outputs of two phase - locked lasers are combined, and detection in a fast photodiode, such... Heterodyning of two CW optical signals, each phase locked to lines in an

Performance analysis of an all-digital BPSK direct sequence spread-spectrum IF receiver architecture

NASA Astrophysics Data System (ADS)

Chung, Bong-Young; Chien, Charles; Samueli, Henry; Jain, Rajeev

1993-09-01

A VLSI architecture for an all-digital binary phase shift keyed (BPSK) direct-sequence (DS) spread spectrum (SS) IF receiver is presented, and an in-depth performance analysis is given. The all-digital architecture incorporates a Costar loop for carrier recovery and a delay-locked loop for clock recovery. For the PN acquisition block, a robust energy detection scheme is proposed to reduce false PN locks over a broad range of signal-to-noise ratios. The proposed architecture is intended for use in the 902-928 MHz unlicensed spread spectrum radio band. A 100 kbs information rate and a 12.7 Mchips/second PN code rate are assumed. The IF center frequency is 12.7 MHz and the IF sampling rate is 50.8 Msamples/ second, which is the Nyquist rate for the 25.4 MHz bandwidth signal. Finite wordlength effects have been simulated to optimize the architecture, thereby minimizing the chip area, and results of the finite wordlength simulations demonstrate that the chip architecture achieves a bit error rate performance within 1 dB of theory in an additive white Gaussian noise channel. The probability of PN acquisition within 5 ms is approximately 56% at -17 dB IF input SNR and 82% at -11 dB IF input SNR.

Long-term stable coherent beam combination of independent femtosecond Yb-fiber lasers.

PubMed

Tian, Haochen; Song, Youjian; Meng, Fei; Fang, Zhanjun; Hu, Minglie; Wang, Chingyue

2016-11-15

We demonstrate coherent beam combination between independent femtosecond Yb-fiber lasers by using the active phase locking of relative pulse timing and the carrier envelope phase based on a balanced optical cross-correlator and extracavity acoustic optical frequency shifter, respectively. The broadband quantum noise of femtosecond fiber lasers is suppressed via precise cavity dispersion control, instead of complicated high-bandwidth phase-locked loop design. Because of reduced quantum noise and a simplified phase-locked loop, stable phase locking that lasts for 1 hour has been obtained, as verified via both spectral interferometry and far-field beam interferometry. The approach can be applied to coherent pulse synthesis, as well as to remote frequency comb connection, allowing a practical all-fiber configuration.

Demonstration of a low bandwidth 1.06-micron optical phase-locked loop for coherent homodyne communication

NASA Technical Reports Server (NTRS)

Day, T.; Farinas, A. D.; Byer, R. L.

1990-01-01

A type II 1.06-micron optical phase-locked loop (OPLL) for use in a coherent homodyne receiver is discussed. Diode-laser-pumped solid-state lasers are used for both the local oscillator and transmitter, because their phase noise is significantly lower than that of diode lasers. Closed-loop RMS phase noise of less than 12 mrad (0.69 deg) is achieved, and modulation-demodulation in bulk modulators at rates from 20 kHz to 20 MHz with less than 19 deg of modulation depth is demonstrated.

Injection Locking Techniques for Spectrum Analysis

NASA Astrophysics Data System (ADS)

Gathma, Timothy D.; Buckwalter, James F.

2011-04-01

Wideband spectrum analysis supports future communication systems that reconfigure and adapt to the capacity of the spectral environment. While test equipment manufacturers offer wideband spectrum analyzers with excellent sensitivity and resolution, these spectrum analyzers typically cannot offer acceptable size, weight, and power (SWAP). CMOS integrated circuits offer the potential to fully integrate spectrum analysis capability with analog front-end circuitry and digital signal processing on a single chip. Unfortunately, CMOS lacks high-Q passives and wideband resonator tunability that is necessary for heterodyne implementations of spectrum analyzers. As an alternative to the heterodyne receiver architectures, two nonlinear methods for performing wideband, low-power spectrum analysis are presented. The first method involves injecting the spectrum of interest into an array of injection-locked oscillators. The second method employs the closed loop dynamics of both injection locking and phase locking to independently estimate the injected frequency and power.

On the false lock behavior of polarity-type Costas loops with Manchester coded input. [for Space Shuttle Orbiter communication

NASA Technical Reports Server (NTRS)

Simon, M. K.

1977-01-01

A modification of a Costas loop is described, and the false lock behavior of this system is studied. The modified Costas loop hard limits the output of the in-phase channel, replaces the analog multiplier with a chopper-type device, and is equipped with single-pole arm filters in the loop. The false lock behavior associated with the use of Manchester coded data is investigated; the results can be applied to the assessment of the false lock margin on the Ku-band uplink to the Space Shuttle Orbiter through the TURSS.

Design and Implementation of an RTK-Based Vector Phase Locked Loop

PubMed Central

Shafaati, Ahmad; Lin, Tao; Broumandan, Ali; Lachapelle, Gérard

2018-01-01

This paper introduces a novel double-differential vector phase-locked loop (DD-VPLL) for Global Navigation Satellite Systems (GNSS) that leverages carrier phase position solutions as well as base station measurements in the estimation of rover tracking loop parameters. The use of double differencing alleviates the need for estimating receiver clock dynamics and atmospheric delays; therefore, the navigation filter consists of the baseline dynamic states only. It is shown that using vector processing for carrier phase tracking leads to a significant enhancement in the receiver sensitivity compared to using the conventional scalar-based tracking loop (STL) and vector frequency locked loop (VFLL). The sensitivity improvement of 8 to 10 dB compared to STL, and 7 to 8 dB compared to VFLL, is obtained based on the test cases reported in the paper. Also, an increased probability of ambiguity resolution in the proposed method results in better availability for real time kinematic (RTK) applications. PMID:29533994

Analog phase lock between two lasers at LISA power levels

NASA Astrophysics Data System (ADS)

Diekmann, Christian; Steier, Frank; Sheard, Benjamin; Heinzel, Gerhard; Danzmann, Karsten

2009-03-01

This paper presents the implementation of an analog optical phase-locked-loop with an offset frequency of about 20MHz between two lasers, where the detected light powers were of the order of 31 pW and 200 μW. The goal of this setup was the design and characterization of a photodiode transimpedance amplifier for application in LISA. By application of a transimpedance amplifier designed to have low noise and low power consumption, the phase noise between the two lasers was a factor of two above the shot noise limit down to 60mHz. The achievable phase sensitivity depends ultimately on the available power of the highly attenuated master laser and on the input current noise of the transimpedance amplifier of the photodetector. The limiting noise source below 60mHz was the analog phase measurement system that was used in this experiment. A digital phase measurement system that is currently under development at the AEI will be used in the near future. Its application should improve the sensitivity.

Improved polar display technique of the phase angle of optical interference

NASA Astrophysics Data System (ADS)

Umeda, N.; Shirai, H.; Takasaki, H.

1984-02-01

A technique which displays the fractional order of optical interference by the azimuthal angle of radial arm has been improved by using a digital electronic circuit such as phase-locked loop and D flip-flop. The phase quadrature reference signals of this system are derived by reforming a reference signal and shifting it by a quarter wavelength referring to its waveform. As the result the orthogonal phase relation of the two signals is not affected by the frequency of the signal. This system has been proven to operate properly over the frequency range of 200-600 kHz without readjusting the electric system.

On the effects of phase jitter on QPSK lock detection

NASA Technical Reports Server (NTRS)

Mileant, A.; Hinedi, S.

1993-01-01

The performance of a QPSK (quadrature phase-shift keying) lock detector is described, taking into account the degradation due to carrier phase jitter. Such an analysis is necessary for accurate performance prediction purposes in scenarios where both the loop SNR is low and the estimation period is short. The derived formulas are applicable to several QPSK loops and are verified using computer simulations.

A digital beacon receiver

NASA Technical Reports Server (NTRS)

Ransome, Peter D.

1988-01-01

A digital satellite beacon receiver is described which provides measurement information down to a carrier/noise density ratio approximately 15 dB below that required by a conventional (phase locked loop) design. When the beacon signal fades, accuracy degrades gracefully, and is restored immediately (without hysteresis) on signal recovery, even if the signal has faded into the noise. Benefits of the digital processing approach used include the minimization of operator adjustments, stability of the phase measuring circuits with time, repeatability between units, and compatibility with equipment not specifically designed for propagation measuring. The receiver has been developed for the European Olympus satellite which has continuous wave (CW) beacons at 12.5 and 29.7 GHz, and a switched polarization beacon at 19.8 GHz approximately, but the system can be reconfigured for CW and polarization-switched beacons at other frequencies.

An improved fast acquisition phase frequency detector for high speed phase-locked loops

NASA Astrophysics Data System (ADS)

Zhang, Lei; Wang, Zongmin; Zhang, Tieliang; Peng, Xinmang

2018-04-01

Phase-locked loops (PLL) have been widely applied in many high-speed designs, such as microprocessors or communication systems. In this paper, an improved fast acquisition phase frequency detector for high speed phase-locked loops is proposed. An improved structure based on dynamic latch is used to eliminate the non-ideal effect such as dead zone and blind zone. And frequency dividers are utilized to vastly extend the phase difference detection range and enhance the operation frequency of the PLL. Proposed PFD has been implemented in 65nm CMOS technology, which occupies an area of 0.0016mm2 and consumes 1.5mW only. Simulation results demonstrate that maximum operation frequency can be up to 5GHz. In addition, the acquisition time of PLL using proposed PFD is 1.0us which is 2.6 times faster than that of the PLL using latch-based PFD without divider.

Shear wave transducer for boreholes

DOEpatents

Mao, N.H.

1984-08-23

A technique and apparatus is provided for estimating in situ stresses by measuring stress-induced velocity anisotropy around a borehole. Two sets each of radially and tangentially polarized transducers are placed inside the hole with displacement directions either parallel or perpendicular to the principal stress directions. With this configuration, relative travel times are measured by both a pulsed phase-locked loop technique and a cross correlation of digitized waveforms. The biaxial velocity data are used to back-calculate the applied stress.

Shear wave transducer for stress measurements in boreholes

DOEpatents

Mao, Nai-Hsien

1987-01-01

A technique and apparatus for estimating in situ stresses by measuring stress-induced velocity anisotropy around a borehole. Two sets each of radially and tangentially polarized transducers are placed inside the hole with displacement directions either parallel or perpendicular to the principal stress directions. With this configuration, relative travel times are measured by both a pulsed phase-locked loop technique and a cross correlation of digitized waveforms. The biaxial velocity data is used to back-calculate the applied stress.

Photographic Video Disc Technology Assessment

DTIC Science & Technology

1976-09-27

by a universal type motor that is driven from the ac power lines using a triac . The triac is controlled by a phase locked loop control circuit that...Regardless of signal format, direct analogue or an A/D converted digital signal, it is recorded by modulated laser beam and can be read out by either...was made to record with frequency modulation (FM) because of its immunity to noise at low frequencies where much of the system noise is. The usual

Strain Insensitive Optical Phase Locked Loop

NASA Technical Reports Server (NTRS)

Egalon, Claudio Oliviera (Inventor); Rogowski, Robert S. (Inventor)

1996-01-01

An apparatus is provided to allow for quasi distributed sensing of strain within a test object. Strain insensitive fiber is used to deliver a light signal to a strain sensitive fiber in an optical phase locked loop sensor configuration. The use of strain insensitive delivery fiber allows for non-integrated measurements of strain without the use of expensive electronics such as those employed in ODTR techniques. The novelty of the present invention lies in the use of strain insensitive multimode fiber. The inventors had previously developed a similar sensor with strain insensitive fiber, however it was restricted to the use of single or few mode fibers. The use of an optical phase locked loop arrangement allows for the use of multimode strain insensitive fiber.

Solid State Research

DTIC Science & Technology

1985-08-15

Hz. The high-speed performance is consis- tent with the low stage delay observed in the ring-oscillator measurements , and the low - frequency ...Phase-Locked Loop 41 5-10 Phase-Locked-Loop Output Spectrum . Note that a 10-kHz Measure - ment Bandwidth Is Used. 42 5-11 Phase Error Response to an...the niobium. Reflections of bulk acoustic waves from optically generated holograms in Fe-doped LiNb03 have been observed and measured . Holographic

Frequency offset locking of AlGaAs semiconductor lasers

NASA Astrophysics Data System (ADS)

Kuboki, Katsuhiko; Ohtsu, Motoichi

1987-04-01

Frequency offset locking is proposed as a technique for tracking and sweeping of a semiconductor laser frequency to improve temporal coherence in semiconductor lasers. Experiments were carried out in which a frequency stabilized laser (of residual frequency fluctuation value of 140 Hz at the integration time between 100 ms and 100 s) was used as a master laser, using a digital phase comparator of a large dynamic range (2 pi x 10 to the 11th rad) in the feedback loop to reduce the phase fluctuations of the beat signal between the master laser and the slave laser. As a result, residual frequency fluctuations of the beat signal were as low as 11 Hz at the integration time of 100 s (i.e., the residual frequency fluctuations of the slave laser were almost equal to those of the master laser).

Digitally controlled chirped pulse laser for sub-terahertz-range fiber structure interrogation.

PubMed

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-03-01

This Letter reports a sweep velocity-locked laser pulse generator controlled using a digital phase-locked loop (DPLL) circuit. This design is used for the interrogation of sub-terahertz-range fiber structures for sensing applications that require real-time data collection with millimeter-level spatial resolution. A distributed feedback laser was employed to generate chirped laser pulses via injection current modulation. A DPLL circuit was developed to lock the optical frequency sweep velocity. A high-quality linearly chirped laser pulse with a frequency excursion of 117.69 GHz at an optical communication band was demonstrated. The system was further adopted to interrogate a continuously distributed sub-terahertz-range fiber structure (sub-THz-fs) for sensing applications. A strain test was conducted in which the sub-THz-fs showed a linear response to longitudinal strain change with predicted sensitivity. Additionally, temperature testing was conducted in which a heat source was used to generate a temperature distribution along the fiber structure to demonstrate its distributed sensing capability. A Gaussian temperature profile was measured using the described system and tracked in real time, as the heat source was moved.

LOCSET Phase Locking: Operation, Diagnostics, and Applications

NASA Astrophysics Data System (ADS)

Pulford, Benjamin N.

The aim of this dissertation is to discuss the theoretical and experimental work recently done with the Locking of Optical Coherence via Single-detector Electronic-frequency Tagging (LOCSET) phase locking technique developed and employed here are AFRL. The primary objectives of this effort are to detail the fundamental operation of the LOCSET phase locking technique, recognize the conditions in which the LOCSET control electronics optimally operate, demonstrate LOCSET phase locking with higher channel counts than ever before, and extend the LOCSET technique to correct for low order, atmospherically induced, phase aberrations introduced to the output of a tiled array of coherently combinable beams. The experimental work performed for this effort resulted in the coherent combination of 32 low power optical beams operating with unprecedented LOCSET phase error performance of lambda/71 RMS in a local loop beam combination configuration. The LOCSET phase locking technique was also successfully extended, for the first time, into an Object In the Loop (OIL) configuration by utilizing light scattered off of a remote object as the optical return signal for the LOCSET phase control electronics. Said LOCSET-OIL technique is capable of correcting for low order phase aberrations caused by atmospheric turbulence disturbances applied across a tiled array output.

Coherent receiver design based on digital signal processing in optical high-speed intersatellite links with M-phase-shift keying

NASA Astrophysics Data System (ADS)

Schaefer, Semjon; Gregory, Mark; Rosenkranz, Werner

2016-11-01

We present simulative and experimental investigations of different coherent receiver designs for high-speed optical intersatellite links. We focus on frequency offset (FO) compensation in homodyne and intradyne detection systems. The considered laser communication terminal uses an optical phase-locked loop (OPLL), which ensures stable homodyne detection. However, the hardware complexity increases with the modulation order. Therefore, we show that software-based intradyne detection is an attractive alternative for OPLL-based homodyne systems. Our approach is based on digital FO and phase noise compensation, in order to achieve a more flexible coherent detection scheme. Analytic results will further show the theoretical impact of the different detection schemes on the receiver sensitivity. Finally, we compare the schemes in terms of bit error ratio measurements and optimal receiver design.

a Low-Cost Chirped-Pulse Fourier Transform Microwave Spectrometer for Undergraduate Physical Chemistry Lab

NASA Astrophysics Data System (ADS)

Carroll, Brandon; Finneran, Ian; Blake, Geoffrey

2014-06-01

We present the design and construction of a simple and low-cost waveguide chirped pulse Fourier transform microwave (CP-FTMW) spectrometer suitable for gas-phase rotational spectroscopy experiments in undergraduate physical chemistry labs as well as graduate level research. The spectrometer operates with modest bandwidth, using phased locked loop (PLL) microwave sources and a direct digital synthesis (DDS) chirp source, making it an affordable for undergraduate labs. The performance of the instrument is benchmarked by acquiring the pure rotational spectrum of the J = 1 - 0 transition OCS and its isotopologues from 11-12.5 GHz.

Steady-state phase error for a phase-locked loop subjected to periodic Doppler inputs

NASA Technical Reports Server (NTRS)

Chen, C.-C.; Win, M. Z.

1991-01-01

The performance of a carrier phase locked loop (PLL) driven by a periodic Doppler input is studied. By expanding the Doppler input into a Fourier series and applying the linearized PLL approximations, it is easy to show that, for periodic frequency disturbances, the resulting steady state phase error is also periodic. Compared to the method of expanding frequency excursion into a power series, the Fourier expansion method can be used to predict the maximum phase error excursion for a periodic Doppler input. For systems with a large Doppler rate fluctuation, such as an optical transponder aboard an Earth orbiting spacecraft, the method can be applied to test whether a lower order tracking loop can provide satisfactory tracking and thereby save the effect of a higher order loop design.

Phase locked loop synchronization for direct detection optical PPM communication systems

NASA Technical Reports Server (NTRS)

Chen, C. C.; Gardner, C. S.

1985-01-01

Receiver timing synchronization of an optical pulse position modulation (PPM) communication system can be achieved using a phase locked loop (PLL) if the photodetector output is properly processed. The synchronization performance is shown to improve with increasing signal power and decreasing loop bandwidth. Bit error rate (BER) of the PLL synchronized PPM system is analyzed and compared to that for the perfectly synchronized system. It is shown that the increase in signal power needed to compensate for the imperfect synchronization is small (less than 0.1 dB) for loop bandwidths less than 0.1% of the slot frequency.

A simulation analysis of phase processing circuitry in the Ohio University Omega receiver prototype

NASA Technical Reports Server (NTRS)

Palkovic, R. A.

1975-01-01

A FORTRAN IV simulation study of the all-digital phase-processing circuitry is described. A digital phase-lock loop (DPLL) forms the heart of the Omega navigation receiver prototype, and through the DPLL, the phase of the 10.2 KHz Omega signal was estimated when the true signal phase is contaminated with noise. The DPLL uses a frequency synthesizer as the reference oscillator. The synthesizer is composed of synchronous rate multipliers (SRM's) driven by a temperature-compensated crystal oscillator, and the use of the SRM's in this application introduces phase jitter which degrades system performance. Simulation of the frequency synthesizer discussed was to analyze the circuits on a bit-by-bit level in order to evaluate the overall design, to see easily the effects of proposed design changes prior to actual breadboarding, to determine the optimum integration time for the DPLL in an environment typical of general aviation conditions, and to quantify the phase error introduced by the SRM synthesizer and examine its effect on the system.

Performance evaluation of the time delay digital tanlock loop architectures

NASA Astrophysics Data System (ADS)

Al-Kharji Al-Ali, Omar; Anani, Nader; Al-Qutayri, Mahmoud; Al-Araji, Saleh; Ponnapalli, Prasad

2016-01-01

This article presents the architectures, theoretical analyses and testing results of modified time delay digital tanlock loop (TDTLs) system. The modifications to the original TDTL architecture were introduced to overcome some of the limitations of the original TDTL and to enhance the overall performance of the particular systems. The limitations addressed in this article include the non-linearity of the phase detector, the restricted width of the locking range and the overall system acquisition speed. Each of the modified architectures was tested by subjecting the system to sudden positive and negative frequency steps and comparing its response with that of the original TDTL. In addition, the performance of all the architectures was evaluated under noise-free as well as noisy environments. The extensive simulation results using MATLAB/SIMULINK demonstrate that the new architectures overcome the limitations they addressed and the overall results confirmed significant improvements in performance compared to the conventional TDTL system.

Tanlock loop noise reduction using an optimised phase detector

NASA Astrophysics Data System (ADS)

Al-kharji Al-Ali, Omar; Anani, Nader; Al-Qutayri, Mahmoud; Al-Araji, Saleh

2013-06-01

This article proposes a time-delay digital tanlock loop (TDTL), which uses a new phase detector (PD) design that is optimised for noise reduction making it amenable for applications that require wide lock range without sacrificing the level of noise immunity. The proposed system uses an improved phase detector design which uses two phase detectors; one PD is used to optimise the noise immunity whilst the other is used to control the acquisition time of the TDTL system. Using the modified phase detector it is possible to reduce the second- and higher-order harmonics by at least 50% compared with the conventional TDTL system. The proposed system was simulated and tested using MATLAB/Simulink using frequency step inputs and inputs corrupted with varying levels of harmonic distortion. A hardware prototype of the system was implemented using a field programmable gate array (FPGA). The practical and simulation results indicate considerable improvement in the noise performance of the proposed system over the conventional TDTL architecture.

Target-in-the-loop high-power adaptive phase-locked fiber laser array using single-frequency dithering technique

NASA Astrophysics Data System (ADS)

Tao, R.; Ma, Y.; Si, L.; Dong, X.; Zhou, P.; Liu, Z.

2011-11-01

We present a theoretical and experimental study of a target-in-the-loop (TIL) high-power adaptive phase-locked fiber laser array. The system configuration of the TIL adaptive phase-locked fiber laser array is introduced, and the fundamental theory for TIL based on the single-dithering technique is deduced for the first time. Two 10-W-level high-power fiber amplifiers are set up and adaptive phase locking of the two fiber amplifiers is accomplished successfully by implementing a single-dithering algorithm on a signal processor. The experimental results demonstrate that the optical phase noise for each beam channel can be effectively compensated by the TIL adaptive optics system under high-power applications and the fringe contrast on a remotely located extended target is advanced from 12% to 74% for the two 10-W-level fiber amplifiers.

Learning the Art of Electronics

NASA Astrophysics Data System (ADS)

Hayes, Thomas C.; Horowitz, Paul

2016-03-01

1. DC circuits; 2. RC circuits; 3. Diode circuits; 4. Transistors I; 5. Transistors II; 6. Operational amplifiers I; 7. Operational amplifiers II: nice positive feedback; 8. Operational amplifiers III; 9. Operational amplifiers IV: nasty positive feedback; 10. Operational amplifiers V: PID motor control loop; 11. Voltage regulators; 12. MOSFET switches; 13. Group audio project; 14. Logic gates; 15. Logic compilers, sequential circuits, flip-flops; 16. Counters; 17. Memory: state machines; 18. Analog to digital: phase-locked loop; 19. Microcontrollers and microprocessors I: processor/controller; 20. I/O, first assembly language; 21. Bit operations; 22. Interrupt: ADC and DAC; 23. Moving pointers, serial buses; 24. Dallas Standalone Micro, SiLabs SPI RAM; 25. Toys in the attic; Appendices; Index.

Analog circuit for the measurement of phase difference between two noisy sine-wave signals

NASA Technical Reports Server (NTRS)

Shakkottai, P.; Kwack, E. Y.; Back, L. H.

1989-01-01

A simple circuit was designed to measure the phase difference between two noisy sine waves. It locks over a wide range of frequencies and produces an output proportional to the phase difference of rapidly varying signals. A square wave locked in frequency and phase to the first signal is produced by a phase-locked loop and is amplified by an operational amplifier.

Ultrastable laser array at 633 nm for real-time dimensional metrology

NASA Astrophysics Data System (ADS)

Lawall, John; Pedulla, J. Marc; Le Coq, Yann

2001-07-01

We describe a laser system for very-high-accuracy dimensional metrology. A sealed-cavity helium-neon laser is offset locked to an iodine-stabilized laser in order to realize a secondary standard with higher power and less phase noise. Synchronous averaging is employed to remove the effect of the frequency modulation present on the iodine-stabilized laser. Additional lasers are offset locked to the secondary standard for use in interferometry. All servo loops are implemented digitally. The offset-locked lasers have intrinsic linewidths of the order of 2.5 kHz and exhibit a rms deviation from the iodine-stabilized laser below 18 kHz. The amplitude noise is at the shot-noise limit for frequencies above 700 kHz. We describe and evaluate the system in detail, and include a discussion of the noise associated with various types of power supplies.

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications

NASA Astrophysics Data System (ADS)

Yuanxin, Zhao; Yuanpei, Gao; Wei, Li; Ning, Li; Junyan, Ren

2015-01-01

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications is successfully realized by the 130 nm CMOS process. A series of novel methods are proposed in this paper. Two band DCOs with high frequency resolution are utilized to cover the frequency band of interest, which is as wide as 2.5 to 5 GHz. An overflow counter is proposed to prevent the “pulse-swallowing” phenomenon so as to significantly reduce the locking time. A NTW-clamp digital module is also proposed to prevent the overflow of the loop control word. A modified programmable divider is presented to prevent the failure operation at the boundary. The measurement results show that the output frequency range of this frequency synthesizer is 0.8-4.2 GHz. The locking time achieves a reduction of 84% at 2.68 GHz. The best in-band and out-band phase noise performances have reached -100 dBc/Hz, and -125 dBc/Hz respectively. The lowest reference spur is -58 dBc.

Jitter and phase noise of ADPLL due to PSN with deterministic frequency

NASA Astrophysics Data System (ADS)

Deng, Xiaoying; Yang, Jun; Wu, Jianhui

2011-09-01

In this article, jitter and phase noise of all-digital phase-locked loop due to power supply noise (PSN) with deterministic frequency are analysed. It leads to the conclusion that jitter and phase noise heavily depend on the noise frequency. Compared with jitter, phase noise is much less affected by the deterministic PSN. Our method is utilised to study a CMOS ADPLL designed and simulated in SMIC 0.13 µm standard CMOS process. A comparison between the results obtained by our method and those obtained by simulation and measurement proves the accuracy of the predicted model. When the digital controlled oscillator was corrupted by PSN with 100 mVpk-pk, the measured jitters were 33.9 ps at the rate of fG = 192 MHz and 148.5 ps at the rate of fG = 40 MHz. However, the measured phase noise was exactly the same except for two impulses appearing at 192 and 40 MHz, respectively.

Laser Metrology Heterodyne Phase-Locked Loop

NASA Technical Reports Server (NTRS)

Loya, Frank; Halverson, Peter

2009-01-01

A method reduces sensitivity to noise in a signal from a laser heterodyne interferometer. The phase-locked loop (PLL) removes glitches that occur in a zero-crossing detector s output [that can happen if the signal-to-noise ratio (SNR) of the heterodyne signal is low] by the use of an internal oscillator that produces a square-wave signal at a frequency that is inherently close to the heterodyne frequency. It also contains phase-locking circuits that lock the phase of the oscillator to the output of the zero-crossing detector. Because the PLL output is an oscillator signal, it is glitch-free. This enables the ability to make accurate phase measurements in spite of low SNR, creates an immunity to phase error caused by shifts in the heterodyne frequency (i.e. if the target moves causing Doppler shift), and maintains a valid phase even when the signal drops out for brief periods of time, such as when the laser is blocked by a stray object.

Interferometric Phase-Locking of Two Electronic Oscillators Based on a Cascade Electro-Optic Modulator

NASA Astrophysics Data System (ADS)

Chien, Pie-Yau; Chao, Chen-Hsing

1993-03-01

An optical phase-locked loop system based on a triangular phase-modulated cascade Mach-Zehnder modulator is demonstrated. A reference oscillator of 10 MHz is multiplied such that it can be used to lock a target oscillator of 120 MHz. The phase error of \\varDeltaθe≤2.0× 10-4 rad/Hz1/2 has been implemented in this system.

Discriminator aided phase lock acquisition for suppressed carrier signals

NASA Technical Reports Server (NTRS)

Carson, L. M.; Krasin, F. E. (Inventor)

1982-01-01

A discriminator aided technique for acquisition of phase lock to a suppressed carrier signal utilizes a Costas loop which is initially operated open loop and control voltage for its VCXO is derived from a phase detector that compares the VCXO to a reference frequency thus establishing coarse frequency resolution with the received signal. Then the Costas loop is closed with the low-pass filter of the channel having a bandwidth much greater (by a factor of about 10) than in the I channel so that a frequency discriminator effect results to aid carrier resolution. Finally, after carrier acquisition, the Q-channel filter of the Costas loop is switched to a bandwidth substantially equal to that of the I-channel for carrier tracking.

A scheme for synchronizing clocks connected by a packet communication network

NASA Astrophysics Data System (ADS)

dos Santos, R. V.; Monteiro, L. H. A.

2012-07-01

Consider a communication system in which a transmitter equipment sends fixed-size packets of data at a uniform rate to a receiver equipment. Consider also that these equipments are connected by a packet-switched network, which introduces a random delay to each packet. Here we propose an adaptive clock recovery scheme able of synchronizing the frequencies and the phases of these devices, within specified limits of precision. This scheme for achieving frequency and phase synchronization is based on measurements of the packet arrival times at the receiver, which are used to control the dynamics of a digital phase-locked loop. The scheme performance is evaluated via numerical simulations performed by using realistic parameter values.

Interferometric phase locking of two electronic oscillators with a cascade electro-optic modulator

NASA Astrophysics Data System (ADS)

Chao, C. H.; Chien, P. Y.; Chang, L. W.; Juang, F. Y.; Hsia, C. H.; Chang, C. C.

1993-01-01

An optical-type electrical phase-locked-loop system based on a cascade electro-optic modulator has been demonstrated. By using this technique, a set of optical-type phase detectors, operating at any harmonic frequencies of two applied phase-modulation signals, has been implemented.

New design conception and development of the synchronizer/data buffer system in CDA station for China's GMS

NASA Astrophysics Data System (ADS)

Tong, Kai; Fan, Shiming; Gong, Derong; Lu, Zuming; Liu, Jian

The synchronizer/data buffer (SDB) in the command and data acquisition station for China's future Geostationary Meteorological Satellite is described. Several computers and special microprocessors are used in tandem with minimized hardware to fulfill all of the functions. The high-accuracy digital phase locked loop is operated by computer and by controlling the count value of the 20-MHz clock to acquire and track such signals as sun pulse, scan synchronization detection pulse, and earth pulse. Sun pulse and VISSR data are recorded precisely and economically by digitizing the time relation. The VISSR scan timing and equiangular control timing, and equal time sampling on satellite are also discussed.

A low-noise delta-sigma phase modulator for polar transmitters.

PubMed

Zhou, Bo

2014-01-01

A low-noise phase modulator, using finite-impulse-response (FIR) filtering embedded delta-sigma (ΔΣ) fractional-N phase-locked loop (PLL), is fabricated in 0.18 μ m CMOS for GSM/EDGE polar transmitters. A simplified digital compensation filter with inverse-FIR and -PLL features is proposed to trade off the transmitter noise and linearity. Experimental results show that the presented architecture performs RF phase modulation well with 20 mW power dissipation from 1.6 V supply and achieves the root-mean-square (rms) and peak phase errors of 4° and 8.5°, respectively. The measured and simulated phase noises of -104 dBc/Hz and -120 dBc/Hz at 400-kHz offset from 1.8-GHz carrier frequency are observed, respectively.

Efficient laser noise reduction method via actively stabilized optical delay line.

PubMed

Li, Dawei; Qian, Cheng; Li, Ye; Zhao, Jianye

2017-04-17

We report a fiber laser noise reduction method by locking it to an actively stabilized optical delay line, specifically a fiber-based Mach-Zehnder interferometer with a 10 km optical fiber spool. The fiber spool is used to achieve large arm imbalance. The heterodyne signal of the two arms converts the laser noise from the optical domain to several megahertz, and it is used in laser noise reduction by a phase-locked loop. An additional phase-locked loop is induced in the system to compensate the phase noise due to environmentally induced length fluctuations of the optical fiber spool. A major advantage of this structure is the efficient reduction of out-of-loop frequency noise, particularly at low Fourier frequency. The frequency noise reaches -30 dBc/Hz at 1 Hz, which is reduced by more than 90 dB compared with that of the laser in its free-running state.

Demonstration of digital phase-sensitive boosting to extend signal reach for long-haul WDM systems using optical phase-conjugated copy.

PubMed

Tian, Yue; Huang, Yue-Kai; Zhang, Shaoliang; Prucnal, Paul R; Wang, Ting

2013-02-25

We demonstrate a hybrid optical/digital phase-sensitive boosting (PSB) technique for long-haul wavelength division multiplexing (WDM) transmission systems. The approach uses four-wave mixing (FWM) to generate a phase-conjugated idler alongside the original signal. At the receiver, the signal and idler are jointly detected, and the phases of the idler symbols are conjugated and summed with the signal symbols to suppress noise and nonlinear phase distortion. The proposed hybrid PSB scheme is independent of modulation format and does not require an optical phase-locked loop to achieve phase matching required by conventional phase-sensitive amplifiers. Our simulation and experimental results of 112-Gb/s dual-polarization quadrature phase-shift-keying (DP-QPSK) transmission confirmed the principle of the PSB scheme, attaining a Q-factor improvement of 2.4 dB over conventional single-channel transmission after 4,800 km of dispersion-managed fiber (DMF) link at the expense of 50% reduction in spectral efficiency and extending the system reach by 60% to 7,680 km.

Precise and long-term stabilization of the carrier-envelope phase of femtosecond laser pulses using an enhanced direct locking technique.

PubMed

Yu, Tae Jun; Hong, Kyung-Han; Choi, Hyun-Gyug; Sung, Jae Hee; Choi, Il Woo; Ko, Do-Kyeong; Lee, Jongmin; Kim, Junwon; Kim, Dong Eon; Nam, Chang Hee

2007-06-25

We demonstrate a long-term operation with reduced phase noise in the carrier-envelope-phase (CEP) stabilization process by employing a double feedback loop and an improved signal detection in the direct locking technique [Opt. Express 13, 2969 (2005)]. A homodyne balanced detection method is employed for efficiently suppressing the dc noise in the f-2f beat signal, which is converted into the CEP noise in the direct locking loop working at around zero carrier-envelope offset frequency (f(ceo)). In order to enhance the long-term stability, we have used the double feedback scheme that modulates both the oscillator pump power for a fast control and the intracavity-prism insertion depth for a slow and high-dynamic-range control. As a result, the in-loop phase jitter is reduced from 50 mrad of the previous result to 29 mrad, corresponding to 13 as in time scale, and the long-term stable operation is achieved for more than 12 hours.

An adaptive narrow band frequency modulation voice communication system

NASA Technical Reports Server (NTRS)

Wishna, S.

1972-01-01

A narrow band frequency modulation communication system is described which provides for the reception of good quality voice at low carrier-to-noise ratios. The high level of performance is obtained by designing a limiter and phase lock loop combination as a demodulator, so that the bandwidth of the phase lock loop decreases as the carrier level decreases. The system was built for the position location and aircraft communication equipment experiment of the ATS 6 program.

Tracking performance and cycle slipping in the all-digital symbol synchronizer loop of the block 5 receiver

NASA Astrophysics Data System (ADS)

Aung, M.

1992-11-01

Computer simulated noise performance of the symbol synchronizer loop (SSL) in the Block 5 receiver is compared with the theoretical noise performance. Good agreement is seen at the higher loop SNR's (SNR(sub L)'s), with gradual degradation as the SNR(sub L) is decreased. For the different cases simulated, cycle slipping is observed (within the simulation time of 10(exp 4) seconds) at SNR(sub L)'s below different thresholds, ranging from 6 to 8.5 dB, comparable to that of a classical phase-locked loop. An important point, however, is that to achieve the desired loop SNR above the seemingly low threshold to avoid cycle slipping, a large data-to-loop-noise power ratio, P(sub D)/(N(sub 0)B(sub L)), is necessary (at least 13 dB larger than the desired SNR(sub L) in the optimum case and larger otherwise). This is due to the large squaring loss (greater than or equal to 13 dB) inherent in the SSL. For the special case of symbol rates approximately equaling the loop update rate, a more accurate equivalent model accounting for an extra loop update period delay (characteristic of the SSL phase detector design) is derived. This model results in a more accurate estimation of the noise-equivalent bandwidth of the loop.

Tracking performance and cycle slipping in the all-digital symbol synchronizer loop of the block 5 receiver

NASA Technical Reports Server (NTRS)

Aung, M.

1992-01-01

Computer simulated noise performance of the symbol synchronizer loop (SSL) in the Block 5 receiver is compared with the theoretical noise performance. Good agreement is seen at the higher loop SNR's (SNR(sub L)'s), with gradual degradation as the SNR(sub L) is decreased. For the different cases simulated, cycle slipping is observed (within the simulation time of 10(exp 4) seconds) at SNR(sub L)'s below different thresholds, ranging from 6 to 8.5 dB, comparable to that of a classical phase-locked loop. An important point, however, is that to achieve the desired loop SNR above the seemingly low threshold to avoid cycle slipping, a large data-to-loop-noise power ratio, P(sub D)/(N(sub 0)B(sub L)), is necessary (at least 13 dB larger than the desired SNR(sub L) in the optimum case and larger otherwise). This is due to the large squaring loss (greater than or equal to 13 dB) inherent in the SSL. For the special case of symbol rates approximately equaling the loop update rate, a more accurate equivalent model accounting for an extra loop update period delay (characteristic of the SSL phase detector design) is derived. This model results in a more accurate estimation of the noise-equivalent bandwidth of the loop.

A New Interferometer for Monitoring Atmospheric Phase Fluctuations

NASA Technical Reports Server (NTRS)

Lay, Oliver

2000-01-01

Water vapor in the Earth's troposphere introduces an extra electrical path in the propagation of radio signals through the atmosphere. The distribution of water vapor is irregular and distorts the wavefronts of incoming radio waves, limiting the angular resolution that can be achieved with ground-based telescopes. The level of fluctuations depends both on the location of the site ,and on the prevailing atmospheric conditions. The ability to measure the fluctuations is therefore important when choosing a site for a new instrument, and for scheduling observations of existing telescopes. Existing phase monitors are radio interferometers that monitor monochromatic beacon tones from geostationary communications satellites at a frequency of about 12 GHz. They have a classical heterodyne design based on two satellite receiving antennas; each has a front-end for amplifying and down-converting the incoming signals using a local oscillator that is phase-locked to a common reference frequency. In addition to multiple phase-locked loops these instruments require expensive phase-stable cabling to reduce the effects of thermal drift. The new system uses two consumer 18" digital satellite TV dishes to monitor satellite TV broadcast signals over a bandwidth of 500 MHz (12.2 to 12.7 GHz). The novel design eliminates the need for phase-locked loops and thermally stable components, and uses a pair of Gilbert Cell multipliers to perform the broadband correlation. A phase monitor has been been built and deployed at the site of the Berkeley-Illinois-Maryland Association Millimeter Array in Northern California, and has been operating successfully since June 1998, measuring the difference in electrical path length for parallel lines of sight to the satellite separated by a baseline of 100 m. With a hardware cost of approximately $4000, it is much cheaper than previous instruments, and the low power requirements and high reliability make the system suitable for site testing in remote locations.

Foundry fabricated photonic integrated circuit optical phase lock loop.

PubMed

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

Gigahertz frequency comb from a diode-pumped solid-state laser.

PubMed

Klenner, Alexander; Schilt, Stéphane; Südmeyer, Thomas; Keller, Ursula

2014-12-15

We present the first stabilization of the frequency comb offset from a diode-pumped gigahertz solid-state laser oscillator. No additional external amplification and/or compression of the output pulses is required. The laser is reliably modelocked using a SESAM and is based on a diode-pumped Yb:CALGO gain crystal. It generates 1.7-W average output power and pulse durations as short as 64 fs at a pulse repetition rate of 1 GHz. We generate an octave-spanning supercontinuum in a highly nonlinear fiber and use the standard f-to-2f carrier-envelope offset (CEO) frequency f_CEO detection method. As a pump source, we use a reliable and cost-efficient commercial diode laser. Its multi-spatial-mode beam profile leads to a relatively broad frequency comb offset beat signal, which nevertheless can be phase-locked by feedback to its current. Using improved electronics, we reached a feedback-loop-bandwidth of up to 300 kHz. A combination of digital and analog electronics is used to achieve a tight phase-lock of f_CEO to an external microwave reference with a low in-loop residual integrated phase-noise of 744 mrad in an integration bandwidth of [1 Hz, 5 MHz]. An analysis of the laser noise and response functions is presented which gives detailed insights into the CEO stabilization of this frequency comb.

Digital synchronization and communication techniques

NASA Technical Reports Server (NTRS)

Lindsey, William C.

1992-01-01

Information on digital synchronization and communication techniques is given in viewgraph form. Topics covered include phase shift keying, modems, characteristics of open loop digital synchronizers, an open loop phase and frequency estimator, and a digital receiver structure using an open loop estimator in a decision directed architecture.

A Low-Noise Delta-Sigma Phase Modulator for Polar Transmitters

PubMed Central

Zhou, Bo

2014-01-01

A low-noise phase modulator, using finite-impulse-response (FIR) filtering embedded delta-sigma (ΔΣ) fractional-N phase-locked loop (PLL), is fabricated in 0.18 μm CMOS for GSM/EDGE polar transmitters. A simplified digital compensation filter with inverse-FIR and -PLL features is proposed to trade off the transmitter noise and linearity. Experimental results show that the presented architecture performs RF phase modulation well with 20 mW power dissipation from 1.6 V supply and achieves the root-mean-square (rms) and peak phase errors of 4° and 8.5°, respectively. The measured and simulated phase noises of −104 dBc/Hz and −120 dBc/Hz at 400-kHz offset from 1.8-GHz carrier frequency are observed, respectively. PMID:24719578

A digital low-level radio-frequency system R&D for a 1.3 GHz nine-cell cavity

NASA Astrophysics Data System (ADS)

Qiu, Feng; Gao, Jie; Lin, Hai-Ying; Liu, Rong; Ma, Xin-Peng; Sha, Peng; Sun, Yi; Wang, Guang-Wei; Wang, Qun-Yao; Xu, Bo

2012-03-01

To test and verify the performance of the digital low-level radio-frequency (LLRF) and tuner system designed by the IHEP RF group, an experimental platform with a retired KEK 1.3 GHz nine-cell cavity is set up. A radio-frequency (RF) field is established successfully in the cavity and the frequency of the cavity is locked by the tuner in ±0.5° (about ±1.2 kHz) at room temperature. The digital LLRF system performs well in a five-hour experiment, and the results show that the system achieves field stability at amplitude <0.1% (peak to peak) and phase <0.1° (peak to peak). This index satisfies the requirements of the International Linear Collider (ILC), and this paper describes this closed-loop experiment of the LLRF system.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Digital frequency offset-locked He–Ne laser system with high beat frequency stability, narrow optical linewidth and optical fibre output

NASA Astrophysics Data System (ADS)

Sternkopf, Christian; Manske, Eberhard

2018-06-01

We report on the enhancement of a previously-presented heterodyne laser source on the basis of two phase-locked loop (PLL) frequency coupled internal-mirror He–Ne lasers. Our new system consists of two digitally controlled He–Ne lasers with slightly different wavelengths, and offers high-frequency stability and very narrow optical linewidth. The digitally controlled system has been realized by using a FPGA controller and transconductance amplifiers. The light of both lasers was coupled into separate fibres for heterodyne interferometer applications. To enhance the laser performance we observed the sensitivity of both laser tubes to electromagnetic noise from various laser power supplies and frequency control systems. Furthermore, we describe how the linewidth of a frequency-controlled He–Ne laser can be reduced during precise frequency stabilisation. The digitally controlled laser source reaches a standard beat frequency deviation of less than 20 Hz (with 1 s gate time) and a spectral full width at half maximum (FWHM) of the beat signal less than 3 kHz. The laser source has enough optical output power to serve a fibre-coupled multi axis heterodyne interferometer. The system can be adjusted to output beat frequencies in the range of 0.1 MHz–20 MHz.

Phase noise reduction by optical phase-locked loop for a coherent bichromatic laser based on the injection-locking technique.

PubMed

Wu, C F; Yan, X S; Huang, J Q; Zhang, J W; Wang, L J

2018-01-01

We present a coherent bichromatic laser system with low phase noise. An optical injection process is used to generate coherent laser beams with a frequency difference of 9.192 631 77 GHz using an electro-optical modulator. An optical phase-locked loop is then applied to reduce the phase noise. The phase noise of the beat note is -41, -81, -98, -83, and -95 dBrad 2 /Hz at the offset frequencies of 1 Hz, 100 Hz, 1 kHz, 10 kHz, and 1 MHz, respectively. Compared to a system that uses optical injection alone, the phase noise is reduced by up to 20-30 dB in the low-frequency range, and the intermodulation effect on the continuous atomic clock is reduced by an order of magnitude. This configuration can adjust the intensities and polarizations of the laser beams independently and reduce the phase noise caused by environmental disturbances and optical injection, which may be useful for application to atomic coherence experiments.

Phase noise reduction by optical phase-locked loop for a coherent bichromatic laser based on the injection-locking technique

NASA Astrophysics Data System (ADS)

Wu, C. F.; Yan, X. S.; Huang, J. Q.; Zhang, J. W.; Wang, L. J.

2018-01-01

We present a coherent bichromatic laser system with low phase noise. An optical injection process is used to generate coherent laser beams with a frequency difference of 9.192 631 77 GHz using an electro-optical modulator. An optical phase-locked loop is then applied to reduce the phase noise. The phase noise of the beat note is -41, -81, -98, -83, and -95 dBrad2/Hz at the offset frequencies of 1 Hz, 100 Hz, 1 kHz, 10 kHz, and 1 MHz, respectively. Compared to a system that uses optical injection alone, the phase noise is reduced by up to 20-30 dB in the low-frequency range, and the intermodulation effect on the continuous atomic clock is reduced by an order of magnitude. This configuration can adjust the intensities and polarizations of the laser beams independently and reduce the phase noise caused by environmental disturbances and optical injection, which may be useful for application to atomic coherence experiments.

Design of a hybrid receiver for the OLYMPUS spacecraft beacons

NASA Technical Reports Server (NTRS)

Sweeney, D. G.; Mckeeman, J. C.

1990-01-01

The theory and design of a hybrid analogue/digital receiver which acquires and monitors the OLYMPUS satellite beacons is presented. The analogue portion of this receiver uses a frequency locked loop for signal tracking. A digital sampling detector operating at IF is used to obtain the I and Q outputs.

LISA phasemeter development

NASA Astrophysics Data System (ADS)

Kullmann, Joachim; Bykov, Iouri; Heinzel, Gerhard; Danzmann, Karsten

The phasemeter is an essentiel component in the measuring chain of the spaceborne gravita-tional wave detector LISA. √ Our goal is to achieve a phasemeter sensitivity of 1 pm/ Hz below 1 Hz with respect to optical signals within a beatnote frequency range of 2 -20 MHz. To get there, several noise sources have to be eliminated. By choosing appropriate filters and adjusting loop gains digital operations of the FPGA-based phase lock loop do not limit the phasemeter sensitivity. One of the main front-end noise sources, the so called ADC time-jitter, is already successfully suppressed by correcting the signal of in-terest by means of a 48 MHz calibration tone. Noise hunting with respect to the analog front-end, currently the most demanding task, is on-going. Recent results will be presented.

Digital Hilbert transformation for separation measurement of thicknesses and refractive indices of layered objects by use of a wavelength-scanning heterodyne interference confocal microscope.

PubMed

Watanabe, Yuuki; Yamaguchi, Ichirou

2002-08-01

A wavelength-scanning heterodyne interference confocal microscope quickly accomplishes the simultaneous measurement of the thickness and the refractive index of a sample by detection of the amplitude and the phase of the interference signal during a sample scan. However, the measurement range of the optical path difference (OPD) that is obtained from the phase changes is limited by the time response of the phase-locked loop circuit in the FM demodulator. To overcome this limitation and to improve the accuracy of the separation measurement, we propose an OPD detection using digital signal processing with a Hilbert transform. The measurement range is extended approximately five times, and the resolution of the OPD is improved to 5.5 from 9 microm without the electrical noise of the FM demodulator circuit. By applying this method for simultaneous measurement of thickness and the refractive index, we can measure samples 20-30-microm thick with refractive indices between 1 and 1.5.

Digital Hilbert transformation for separation measurement of thicknesses and refractive indices of layered objects by use of a wavelength-scanning heterodyne interference confocal microscope

NASA Astrophysics Data System (ADS)

Watanabe, Yuuki; Yamaguchi, Ichirou

2002-08-01

A wavelength-scanning heterodyne interference confocal microscope quickly accomplishes the simultaneous measurement of the thickness and the refractive index of a sample by detection of the amplitude and the phase of the interference signal during a sample scan. However, the measurement range of the optical path difference (OPD) that is obtained from the phase changes is limited by the time response of the phase-locked loop circuit in the FM demodulator. To overcome this limitation and to improve the accuracy of the separation measurement, we propose an OPD detection using digital signal processing with a Hilbert transform. The measurement range is extended approximately five times, and the resolution of the OPD is improved to 5.5 from 9 mum without the electrical noise of the FM demodulator circuit. By applying this method for simultaneous measurement of thickness and the refractive index, we can measure samples 20-30-mum thick with refractive indices between 1 and 1.5.

Coherent Optical Communications: Historical Perspectives and Future Directions

NASA Astrophysics Data System (ADS)

Kikuchi, Kazuro

Coherent optical fiber communications were studied extensively in the 1980s mainly because high sensitivity of coherent receivers could elongate the unrepeated transmission distance; however, their research and development have been interrupted for nearly 20 years behind the rapid progress in high-capacity wavelength-division multiplexed (WDM) systems using erbium-doped fiber amplifiers (EDFAs). In 2005, the demonstration of digital carrier phase estimation in coherent receivers has stimulated a widespread interest in coherent optical communications again. This is due to the fact that the digital coherent receiver enables us to employ a variety of spectrally efficient modulation formats such as M-ary phase-shift keying (PSK) and quadrature amplitude modulation (QAM) without relying upon a rather complicated optical phase-locked loop. In addition, since the phase information is preserved after detection, we can realize electrical post-processing functions such as compensation for chromatic dispersion and polarization-mode dispersion in the digital domain. These advantages of the born-again coherent receiver have enormous potential for innovating existing optical communication systems. In this chapter, after reviewing the 20-year history of coherent optical communication systems, we describe the principle of operation of coherent detection, the concept of the digital coherent receiver, and its performance evaluation. Finally, challenges for the future are summarized.

Extremely Coherent Microwave Emission from Spin Torque Oscillator Stabilized by Phase Locked Loop

PubMed Central

Tamaru, Shingo; Kubota, Hitoshi; Yakushiji, Kay; Yuasa, Shinji; Fukushima, Akio

2015-01-01

Spin torque oscillator (STO) has been attracting a great deal of attention as a candidate for the next generation microwave signal sources for various modern electronics systems since its advent. However, the phase noise of STOs under free running oscillation is still too large to be used in practical microwave applications, thus an industrially viable means to stabilize its oscillation has been strongly sought. Here we demonstrate implementation of a phase locked loop using a STO as a voltage controlled oscillator (VCO) that generates a 7.344 GHz microwave signal stabilized by a 153 MHz reference signal. Spectrum measurement showed successful phase locking of the microwave signal to the reference signal, characterized by an extremely narrow oscillation peak with a linewidth of less than the measurement limit of 1 Hz. This demonstration should be a major breakthrough toward various practical applications of STOs. PMID:26658880

Modulator for tone and binary signals. [phase of modulation of tone and binary signals on carrier waves in communication systems

NASA Technical Reports Server (NTRS)

Mcchesney, J. R.; Lerner, T.; Fitch, E. J. (Inventor)

1975-01-01

Tones and binary information are transmitted as phase variations on a carrier wave of constant amplitude and frequency. The carrier and tones are applied to a balanced modulator for deriving an output signal including a pair of sidebands relative to the carrier. The carrier is phase modulated by a digital signal so that it is + or - 90 deg out of phase with the predetermined phase of the carrier. The carrier is combined in an algebraic summing device with the phase modulated signal and the balanced modulator output signal. The output of the algebraic summing device is hard limited to derive a constant amplitude and frequency signal having very narrow bandwidth requirements. At a receiver, the tones and binary data are detected with a phase locked loop having a voltage controlled oscillator driving a pair of orthogonal detection channels.

Heterodyne optical phase-locking of extended-cavity semiconductor lasers at 9 GHz

NASA Astrophysics Data System (ADS)

Santarelli, G.; Clairon, A.; Lea, S. N.; Tino, G. M.

1994-01-01

In order to stimulate atomic velocity-selective Raman transitions on the 852 nm caesium D 2 line in an atomic fountain clock, two extended-cavity diode lasers have been optically phase-locked at a frequency offset of 9.192 GHz. The measured linewidth (fwhm) of the free-running lasers is 50 kHz. The phase-locked loop bandwidth, evaluated by observing the frequency noise spectrum, is 3.7 MHz and the phase error variance is found to be no more than 4 × 10 -3 rad 2.

High-speed clock recovery with phase-locked-loop-based on LiNbO3 modulators

NASA Astrophysics Data System (ADS)

Zhu, Guanghao; Chen, Hongmin; Wang, Qiang; Dutta, Niloy K.

2003-08-01

In this paper, we present a scheme for recovering 10 GHz clock from 40 Gb/s and 80 Gb/s time division multiplexed (TDM) return to zero (RZ) data stream. The proposed clock recovery is successfully demonstrated using an electrical phase locked loop (PLL). The jitter of the recovered clock is estimated to be around 50 fs. The key part in the proposed clock recovery circuit is a LiNbO3 Mach-Zehnder modulator which is shown to be highly effective in optical to electrical down conversion.

Spatiotemporal Dynamics of a Network of Coupled Time-Delay Digital Tanlock Loops

NASA Astrophysics Data System (ADS)

Paul, Bishwajit; Banerjee, Tanmoy; Sarkar, B. C.

The time-delay digital tanlock loop (TDTLs) is an important class of phase-locked loop that is widely used in electronic communication systems. Although nonlinear dynamics of an isolated TDTL has been studied in the past but the collective behavior of TDTLs in a network is an important topic of research and deserves special attention as in practical communication systems separate entities are rarely isolated. In this paper, we carry out the detailed analysis and numerical simulations to explore the spatiotemporal dynamics of a network of a one-dimensional ring of coupled TDTLs with nearest neighbor coupling. The equation representing the network is derived and we carry out analytical calculations using the circulant matrix formalism to obtain the stability criteria. An extensive numerical simulation reveals that with the variation of gain parameter and coupling strength the network shows a variety of spatiotemporal dynamics such as frozen random pattern, pattern selection, spatiotemporal intermittency and fully developed spatiotemporal chaos. We map the distinct dynamical regions of the system in two-parameter space. Finally, we quantify the spatiotemporal dynamics by using quantitative measures like Lyapunov exponent and the average quadratic deviation of the full network.

A GPS Phase-Locked Loop Performance Metric Based on the Phase Discriminator Output

PubMed Central

Stevanovic, Stefan; Pervan, Boris

2018-01-01

We propose a novel GPS phase-lock loop (PLL) performance metric based on the standard deviation of tracking error (defined as the discriminator’s estimate of the true phase error), and explain its advantages over the popular phase jitter metric using theory, numerical simulation, and experimental results. We derive an augmented GPS phase-lock loop (PLL) linear model, which includes the effect of coherent averaging, to be used in conjunction with this proposed metric. The augmented linear model allows more accurate calculation of tracking error standard deviation in the presence of additive white Gaussian noise (AWGN) as compared to traditional linear models. The standard deviation of tracking error, with a threshold corresponding to half of the arctangent discriminator pull-in region, is shown to be a more reliable/robust measure of PLL performance under interference conditions than the phase jitter metric. In addition, the augmented linear model is shown to be valid up until this threshold, which facilitates efficient performance prediction, so that time-consuming direct simulations and costly experimental testing can be reserved for PLL designs that are much more likely to be successful. The effect of varying receiver reference oscillator quality on the tracking error metric is also considered. PMID:29351250

Spectral Narrowing of a Varactor-Integrated Resonant-Tunneling-Diode Terahertz Oscillator by Phase-Locked Loop

NASA Astrophysics Data System (ADS)

Ogino, Kota; Suzuki, Safumi; Asada, Masahiro

2017-12-01

Spectral narrowing of a resonant-tunneling-diode (RTD) terahertz oscillator, which is useful for various applications of terahertz frequency range, such as an accurate gas spectroscopy, a frequency reference in various communication systems, etc., was achieved with a phase-locked loop system. The oscillator is composed of an RTD, a slot antenna, and a varactor diode for electrical frequency tuning. The output of the RTD oscillating at 610 GHz was down-converted to 400 MHz by a heterodyne detection. The phase noise was transformed to amplitude noise by a balanced mixer and fed back into the varactor diode. The loop filter for a stable operation is discussed. The spectral linewidth of 18.6 MHz in free-running operation was reduced to less than 1 Hz by the feedback.

Receiver design and performance characteristics

NASA Technical Reports Server (NTRS)

Simon, M. K.; Yuen, J. H.

1982-01-01

The basic design, principles of operation, and characteristics of deep space communications receivers are examined. In particular, the basic fundamentals of phase-locked loop and Costas loop receivers used for synchronization, tracking, and demodulation of phase-coherent signals in residual carrier and suppressed carrier systems are addressed.

A Phase-Locked Loop Model of the Response of the Postural Control System to Periodic Platform Motion

PubMed Central

Schilling, Robert J.; Robinson, Charles J.

2010-01-01

A phase-locked loop (PLL) model of the response of the postural control system to periodic platform motion is proposed. The PLL model is based on the hypothesis that quiet standing (QS) postural sway can be characterized as a weak sinusoidal oscillation corrupted with noise. Because the signal to noise ratio is quite low, the characteristics of the QS oscillator are not measured directly from the QS sway, instead they are inferred from the response of the oscillator to periodic motion of the platform. When a sinusoidal stimulus is applied, the QS oscillator changes speed as needed until its frequency matches that of the platform, thus achieving phase lock in a manner consistent with a PLL control mechanism. The PLL model is highly effective in representing the frequency, amplitude, and phase shift of the sinusoidal component of the phase-locked response over a range of platform frequencies and amplitudes. Qualitative analysis of the PLL control mechanism indicates that there is a finite range of frequencies over which phase lock is possible, and that the size of this capture range decreases with decreasing platform amplitude. The PLL model was tested experimentally using nine healthy subjects and the results reveal good agreement with a mean phase shift error of 13.7° and a mean amplitude error of 0.8 mm. PMID:20378479

An all-digital receiver for satellite audio broadcasting signals using trellis coded quasi-orthogonal code-division multiplexing

NASA Astrophysics Data System (ADS)

Braun, Walter; Eglin, Peter; Abello, Ricard

1993-02-01

Spread Spectrum Code Division Multiplex is an attractive scheme for the transmission of multiple signals over a satellite transponder. By using orthogonal or quasi-orthogonal spreading codes the interference between the users can be virtually eliminated. However, the acquisition and tracking of the spreading code phase can not take advantage of the code orthogonality since sequential acquisition and Delay-Locked loop tracking depend on correlation with code phases other than the optimal despreading phase. Hence, synchronization is a critical issue in such a system. A demonstration hardware for the verification of the orthogonal CDM synchronization and data transmission concept is being designed and implemented. The system concept, the synchronization scheme, and the implementation are described. The performance of the system is discussed based on computer simulations.

Ring magnet firing angle control

DOEpatents

Knott, M.J.; Lewis, L.G.; Rabe, H.H.

1975-10-21

A device is provided for controlling the firing angles of thyratrons (rectifiers) in a ring magnet power supply. A phase lock loop develops a smooth ac signal of frequency equal to and in phase with the frequency of the voltage wave developed by the main generator of the power supply. A counter that counts from zero to a particular number each cycle of the main generator voltage wave is synchronized with the smooth AC signal of the phase lock loop. Gates compare the number in the counter with predetermined desired firing angles for each thyratron and with coincidence the proper thyratron is fired at the predetermined firing angle.

Phase error statistics of a phase-locked loop synchronized direct detection optical PPM communication system

NASA Technical Reports Server (NTRS)

Natarajan, Suresh; Gardner, C. S.

1987-01-01

Receiver timing synchronization of an optical Pulse-Position Modulation (PPM) communication system can be achieved using a phased-locked loop (PLL), provided the photodetector output is suitably processed. The magnitude of the PLL phase error is a good indicator of the timing error at the receiver decoder. The statistics of the phase error are investigated while varying several key system parameters such as PPM order, signal and background strengths, and PPL bandwidth. A practical optical communication system utilizing a laser diode transmitter and an avalanche photodiode in the receiver is described, and the sampled phase error data are presented. A linear regression analysis is applied to the data to obtain estimates of the relational constants involving the phase error variance and incident signal power.

Phase-locking dynamics in optoelectronic oscillator

NASA Astrophysics Data System (ADS)

Banerjee, Abhijit; Sarkar, Jayjeet; Das, NikhilRanjan; Biswas, Baidyanath

2018-05-01

This paper analyzes the phase-locking phenomenon in single-loop optoelectronic microwave oscillators considering weak and strong radio frequency (RF) signal injection. The analyses are made in terms of the lock-range, beat frequency and the spectral components of the unlocked-driven oscillator. The influence of RF injection signal on the frequency pulling of the unlocked-driven optoelectronic oscillator (OEO) is also studied. An approximate expression for the amplitude perturbation of the oscillator is derived and the influence of amplitude perturbation on the phase-locking dynamics is studied. It is shown that the analysis clearly reveals the phase-locking phenomenon and the associated frequency pulling mechanism starting from the fast-beat state through the quasi-locked state to the locked state of the pulled OEO. It is found that the unlocked-driven OEO output signal has a very non-symmetrical sideband distribution about the carrier. The simulation results are also given in partial support to the conclusions of the analysis.

Digitally controlled twelve-pulse firing generator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berde, D.; Ferrara, A.A.

1981-01-01

Control System Studies for the Tokamak Fusion Test Reactor (TFTR) indicate that accurate thyristor firing in the AC-to-DC conversion system is required in order to achieve good regulation of the various field currents. Rapid update and exact firing angle control are required to avoid instabilities, large eddy currents, or parasitic oscillations. The Prototype Firing Generator was designed to satisfy these requirements. To achieve the required /plus or minus/0.77/degree/firing accuracy, a three-phase-locked loop reference was designed; otherwise, the Firing Generator employs digital circuitry. The unit, housed in a standard CAMAC crate, operates under microcomputer control. Functions are performed under program control,more » which resides in nonvolatile read-only memory. Communication with CICADA control system is provided via an 11-bit parallel interface.« less

Phase locking of a 2.7 THz quantum cascade laser to a microwave reference.

PubMed

Khosropanah, P; Baryshev, A; Zhang, W; Jellema, W; Hovenier, J N; Gao, J R; Klapwijk, T M; Paveliev, D G; Williams, B S; Kumar, S; Hu, Q; Reno, J L; Klein, B; Hesler, J L

2009-10-01

We demonstrate the phase locking of a 2.7 THz metal-metal waveguide quantum cascade laser (QCL) to an external microwave signal. The reference is the 15th harmonic, generated by a semiconductor superlattice nonlinear device, of a signal at 182 GHz, which itself is generated by a multiplier chain (x12) from a microwave synthesizer at approximately 15 GHz. Both laser and reference radiations are coupled into a bolometer mixer, resulting in a beat signal, which is fed into a phase-lock loop. The spectral analysis of the beat signal confirms that the QCL is phase locked. This result opens the possibility to extend heterodyne interferometers into the far-infrared range.

Common mode frequency instability in internally phase-locked terahertz quantum cascade lasers.

PubMed

Wanke, M C; Grine, A D; Fuller, C T; Nordquist, C D; Cich, M J; Reno, J L; Lee, Mark

2011-11-21

Feedback from a diode mixer integrated into a 2.8 THz quantum cascade laser (QCL) was used to phase lock the difference frequencies (DFs) among the Fabry-Perot (F-P) longitudinal modes of a QCL. Approximately 40% of the DF power was phase locked, consistent with feedback loop bandwidth of 10 kHz and phase noise bandwidth ~0.5 MHz. While the locked DF signal has ≤ 1 Hz linewidth and negligible drift over ~30 min, mixing measurements between two QCLs and between a QCL and molecular gas laser show that the common mode frequency stability is no better than a free-running QCL. © 2011 Optical Society of America

Phase Locking of a 2.7 THz Quantum Cascade Laser to a Microwave Reference

NASA Technical Reports Server (NTRS)

Khosropanah, P.; Baryshev, A.; Zhang, W.; Jellema, W.; Hovenier, J. N.; Gao, J. R.; Klapwijk, T. M.; Paveliev, D. G.; Williams, B. S.; Hu, Q.;

DPLL implementation in carrier acquisition and tracking for burst DS-CDMA receivers.

PubMed

Guan, Yun-feng; Zhang, Zhao-yang; Lai, Li-feng

2003-01-01

This paper presents the architectures, algorithms, and implementation considerations of the digital phase locked loop (DPLL) used for burst-mode packet DS-CDMA receivers. As we know, carrier offset is a rather challenging problem in CDMA system. According to different applications, different DPLL forms should be adopted to correct different maximum carrier offset in CDMA systems. One classical DPLL and two novel DPLL forms are discussed in the paper. The acquisition range of carrier offset can be widened by using the two novel DPLL forms without any performance degradation such as longer acquisition time or larger variance of the phase error. The maximum acquisition range is 1/(4T), where T is the symbol period. The design can be implemented by FPGA directly.

A study of FM threshold extension techniques

NASA Technical Reports Server (NTRS)

Arndt, G. D.; Loch, F. J.

1972-01-01

The characteristics of three postdetection threshold extension techniques are evaluated with respect to the ability of such techniques to improve the performance of a phase lock loop demodulator. These techniques include impulse-noise elimination, signal correlation for the detection of impulse noise, and delta modulation signal processing. Experimental results from signal to noise ratio data and bit error rate data indicate that a 2- to 3-decibel threshold extension is readily achievable by using the various techniques. This threshold improvement is in addition to the threshold extension that is usually achieved through the use of a phase lock loop demodulator.

Optimization of A 2-Micron Laser Frequency Stabilization System for a Double-Pulse CO2 Differential Absorption Lidar

NASA Technical Reports Server (NTRS)

Chen, Songsheng; Yu, Jirong; Bai, Yingsin; Koch, Grady; Petros, Mulugeta; Trieu, Bo; Petzar, Paul; Singh, Upendra N.; Kavaya, Michael J.; Beyon, Jeffrey

2010-01-01

A carbon dioxide (CO2) Differential Absorption Lidar (DIAL) for accurate CO2 concentration measurement requires a frequency locking system to achieve high frequency locking precision and stability. We describe the frequency locking system utilizing Frequency Modulation (FM), Phase Sensitive Detection (PSD), and Proportional Integration Derivative (PID) feedback servo loop, and report the optimization of the sensitivity of the system for the feed back loop based on the characteristics of a variable path-length CO2 gas cell. The CO2 gas cell is characterized with HITRAN database (2004). The method can be applied for any other frequency locking systems referring to gas absorption line.

Robust GPS carrier tracking under ionospheric scintillation

NASA Astrophysics Data System (ADS)

Susi, M.; Andreotti, M.; Aquino, M. H.; Dodson, A.

2013-12-01

Small scale irregularities present in the ionosphere can induce fast and unpredictable fluctuations of Radio Frequency (RF) signal phase and amplitude. This phenomenon, known as scintillation, can degrade the performance of a GPS receiver leading to cycle slips, increasing the tracking error and also producing a complete loss of lock. In the most severe scenarios, if the tracking of multiple satellites links is prevented, outages in the GPS service can also occur. In order to render a GPS receiver more robust under scintillation, particular attention should be dedicated to the design of the carrier tracking stage, that is the receiver's part most sensitive to these types of phenomenon. This paper exploits the reconfigurability and flexibility of a GPS software receiver to develop a tracking algorithm that is more robust under ionospheric scintillation. For this purpose, first of all, the scintillation level is monitored in real time. Indeed the carrier phase and the post correlation terms obtained by the PLL (Phase Locked Loop) are used to estimate phi60 and S4 [1], the scintillation indices traditionally used to quantify the level of phase and amplitude scintillations, as well as p and T, the spectral parameters of the fluctuations PSD. The effectiveness of the scintillation parameter computation is confirmed by comparing the values obtained by the software receiver and the ones provided by a commercial scintillation monitoring, i.e. the Septentrio PolarxS receiver [2]. Then the above scintillation parameters and the signal carrier to noise density are exploited to tune the carrier tracking algorithm. In case of very weak signals the FLL (Frequency Locked Loop) scheme is selected in order to maintain the signal lock. Otherwise an adaptive bandwidth Phase Locked Loop (PLL) scheme is adopted. The optimum bandwidth for the specific scintillation scenario is evaluated in real time by exploiting the Conker formula [1] for the tracking jitter estimation. The performance of the proposed tracking scheme is assessed by using both simulated and real data. Real data have been collected in Vietnam by using a USRP (Universal Software Radio Peripheral) N210 front end connected to a rubidium oscillator. Selected events are exploited in order to challenge the algorithm with strong phase and amplitude variations. Moreover, simulated data have been collected by using the prototype of a digital front end developed by Novatel, namely the 'Firehose'. Since the latter includes a TCXO oscillator, the proposed tracking scheme is also opportunely modified to take in account the clock error contribution. References 1. R.S., Conker, M. B. El-Arini, C. J. Hegarty, and T. Hsiao, Modelling the effects of ionospheric scintillation on GPS/satellite-based augmentation system availability. Radio Sci., 38, 1, 1001, doi: 10.1029/2000RS002604, 2003. 2. B. Bougard et al, 'CIGALA: Challenging the Solar Maximum in Brazil with PolaRxS,' ION GNSS, Portland, Sept. 2011.

An 11-bit and 39 ps resolution time-to-digital converter for ADPLL in digital television

NASA Astrophysics Data System (ADS)

Liu, Wei; (Ruth) Li, Wei; Ren, P.; Lin, C. L.; Zhang, Shengdong; Wang, Yangyuan

2010-04-01

We propose and demonstrate an 11-bit time-to-digital converter (TDC) for all-digital phase-locked loops (ADPLLs) in digital television. The proposed TDC converts the width of the input pulse into digital output with the tap space of the outputs of a free-running ring oscillator (FRO) being the conversion resolution. The FRO is in a structure of coiled cell array and the TDC core is symmetrical in the input structure. This leads to equally spaced taps in the reference clocks and thereby a high TDC conversion linearity. The TDC is fabricated in 0.13 μm CMOS process and the chip area is 0.025 mm2. The measurement results show that the TDC has a conversion resolution of 39 ps at 1.2 V power supply and a 4.5 ns dead time in the 11-bits output case. Both the differential non-linearity (DNL) and integral non-linearity (INL) are below 0.5 LSB. The power consumption of the whole circuit is 4.2 mW.

Vortex spin-torque oscillator stabilized by phase locked loop using integrated circuits

NASA Astrophysics Data System (ADS)

Kreissig, Martin; Lebrun, R.; Protze, F.; Merazzo-Jaimes, K.; Hem, J.; Vila, L.; Ferreira, R.; Cyrille, M.-C.; Ellinger, F.; Cros, V.; Ebels, U.; Bortolotti, P.

2017-05-01

Spin-torque nano-oscillators (STO) are candidates for the next technological implementation of spintronic devices in commercial electronic systems. For use in microwave applications, improving the noise figures by efficient control of their phase dynamics is a mandatory requirement. In order to achieve this, we developed a compact phase locked loop (PLL) based on custom integrated circuits (ICs) and demonstrate that it represents an efficient way to reduce the phase noise level of a vortex based STO. The advantage of our approach to phase stabilize STOs is that our compact system is highly reconfigurable e.g. in terms of the frequency divider ratio N, RF gain and loop gain. This makes it robust against device to device variations and at the same time compatible with a large range of STOs. Moreover, by taking advantage of the natural highly non-isochronous nature of the STO, the STO frequency can be easily controlled by e.g. changing the divider ratio N.

SEU/SET Tolerant Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr.

2010-01-01

The phase-locked loop (PLL) is an old and widely used circuit for frequency and phase demodulation, carrier and clock recovery, and frequency synthesis [1]. Its implementations range from discrete components to fully integrated circuits and even to firmware or software. Often the PLL is a highly critical component of a system, as for example when it is used to derive the on-chip clock, but as of this writing no definitive single-event upset (SET)/single-event transient (SET) tolerant PLL circuit has been described. This chapter hopes to rectify that situation, at least in regard to PLLs that are used to generate clocks. Older literature on fault-tolerant PLLs deals with detection of a hard failure, which is recovered by replacement, repair, or manual restart of discrete component systems. Several patents exist along these lines (6349391, 6272647, and 7089442). A newer approach is to harden the parts of a PLL system, to one degree or another, such as by using a voltage-based charge pump or a triple modular redundant (TMR) voted voltage-controlled oscillator (VCO). A more comprehensive approach is to harden by triplication and voting (TMR) all the digital pieces (primarily the divider) of a frequency synthesis PLL, but this still leaves room for errors in the VCO and the loop filter. Instead of hardening or voting pieces of a system, such as a frequency synthesis system (i.e., clock multiplier), we will show how the entire system can be voted. There are two main ways of doing this, each with advantages and drawbacks. We will show how each has advantages in certain areas, depending on the lock acquisition and tracking characteristics of the PLL. Because of this dependency on PLL characteristics, we will briefly revisit the theory of PLLs. But first we will describe the characteristics of voters and their correct application, as some literature does not follow the voting procedure that guarantees elimination of errors. Additionally, we will find that voting clocks is a bit trickier than voting data where an infallible clock is assumed. It is our job here to produce (or recover) that assumed infallible clock!

Temperature feedback control for long-term carrier-envelope phase locking.

PubMed

Yun, Chenxia; Chen, Shouyuan; Wang, He; Chini, Michael; Chang, Zenghu

2009-09-20

We report a double feedback loop for the improvement of the carrier-envelope phase stabilization of a chirped mirror based femtosecond laser oscillator. By combining the control of the Ti:sapphire crystal temperature and the modulation of the pump power, the carrier envelope offset frequency, fCEO, was locked for close to 20 h, which is much longer than the typical phase stabilization time with only pump power modulation.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop.

PubMed

Liang, Yu-Rong; Duan, Hui-Zong; Xiao, Xin-Long; Wei, Bing-Bing; Yeh, Hsien-Chi

2015-01-01

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future's gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10(-8) Hz/Hz(1/2)@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.

Illumination-based synchronization of high-speed vision sensors.

PubMed

Hou, Lei; Kagami, Shingo; Hashimoto, Koichi

2010-01-01

To acquire images of dynamic scenes from multiple points of view simultaneously, the acquisition time of vision sensors should be synchronized. This paper describes an illumination-based synchronization method derived from the phase-locked loop (PLL) algorithm. Incident light to a vision sensor from an intensity-modulated illumination source serves as the reference signal for synchronization. Analog and digital computation within the vision sensor forms a PLL to regulate the output signal, which corresponds to the vision frame timing, to be synchronized with the reference. Simulated and experimental results show that a 1,000 Hz frame rate vision sensor was successfully synchronized with 32 μs jitters.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liang, Yu-Rong; Department of Electronics and Information Engineering, Huazhong University of Science and Technology, 1037 Luo Yu Road, Wuhan 430074; Duan, Hui-Zong

2015-01-15

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future’s gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10{sup −8} Hz/Hz{sup 1/2}@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop

NASA Astrophysics Data System (ADS)

Liang, Yu-Rong; Duan, Hui-Zong; Xiao, Xin-Long; Wei, Bing-Bing; Yeh, Hsien-Chi

2015-01-01

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future's gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10-8 Hz/Hz1/2@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.

Digital-data receiver synchronization

DOEpatents

Smith, Stephen F.; Turner, Gary W.

2005-08-02

Digital-data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals. A single master clock can be used to provide frequency signals. Advantages can include fast lock-up time in moderately to severely noisy conditions, greater tolerance to noise and jitter when locked, and improved tolerance to clock asymmetries.

Digital-data receiver synchronization method and apparatus

DOEpatents

Smith, Stephen F.; Turner, Gary W.

2005-12-06

Digital-data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals. A single master clock may be used to provide frequency signals. Advantages can include fast lock-up time in moderately to severely noisy conditions, greater tolerance to noise and jitter when locked, and improved tolerance to clock asymmetries.

Digital-data receiver synchronization method and apparatus

DOEpatents

Smith, Stephen F [Loudon, TN; Turner, Gary W [Clinton, TN

2009-09-08

Digital data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals. A single master clock can be used to provide frequency signals. Advantages can include fast lock-up time in moderately to severely noisy conditions, greater tolerance to noise and jitter when locked, and improved tolerance to clock asymmetries.

Phase-locking of a 2.7-THz Quantum Cascade Laser to a Microwave Reference

NASA Astrophysics Data System (ADS)

Baryshev, A. M.; Khosropanah, P.; Zhang, W.; Jellema, W.; Hovenier, J. N.; Gao, J. R.; Klapwijk, T. M.; Paveliev, D. G.; William, B. S.; Kumar, S.; Hu, Q.; Reno, J. L.; Klein, B.; Hesler, J. L.

2009-04-01

We demonstrate phase-locking of a 2.7-THz metal-metal waveguide quantum cascade laser (QCL) to an external microwave signal. The reference is the 15th harmonic, generated by a semiconductor superlattice nonlinear device, of a signal at 182 GHz, which itself is generated by a multiplier-chain (x2x3x2) from a microwave synthesizer at 15 GHz. Both laser and reference radiations are coupled into a hot electron bolometer mixer, resulting in a beat signal, which is fed into a phase-lock loop. Spectral analysis of the beat signal (see fig. 1) confirms that the QCL is phase locked. This result opens the possibility to extend heterodyne interferometers into the far-infrared range.

Digital lock-in amplifier based on soundcard interface for physics laboratory

NASA Astrophysics Data System (ADS)

Sinlapanuntakul, J.; Kijamnajsuk, P.; Jetjamnong, C.; Chotikaprakhan, S.

2017-09-01

The purpose of this paper is to develop a digital lock-in amplifier based on soundcard interface for undergraduate physics laboratory. Both series and parallel RLC circuit laboratory are tested because of its well-known, easy to understand and simple confirm. The sinusoidal signal at the frequency of 10 Hz - 15 kHz is generated to the circuits. The amplitude and phase of the voltage drop across the resistor, R are measured in 10 step decade. The signals from soundcard interface and lock-in amplifier are compared. The results give a good correlation. It indicates that the design digital lock-in amplifier is promising for undergraduate physic laboratory.

Critique of a Hughes shuttle Ku-band data sampler/bit synchronizer

NASA Technical Reports Server (NTRS)

Holmes, J. K.

1980-01-01

An alternative bit synchronizer proposed for shuttle was analyzed in a noise-free environment by considering the basic operation of the loop via timing diagrams and by linearizing the bit synchronizer as an equivalent, continuous, phased-lock loop (PLL). The loop is composed of a high-frequency phase-frequency detector which is capable of detecting both phase and frequency errors and is used to track the clock, and a bit transition detector which attempts to track the transitions of the data bits. It was determined that the basic approach was a good design which, with proper implementation of the accumulator, up/down counter and logic should provide accurate mid-bit sampling with symmetric bits. However, when bit asymmetry occurs, the bit synchronizer can lock up with a large timing error, yet be quasi-stable (timing will not change unless the clock and bit sequence drift). This will result in incorrectly detecting some bits.

Free-running waveform characterization using a delay-time tunable laser based delay-line-free electro-optic sampling oscilloscope

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru

2002-12-01

We develop a delay-line-free and frequency traceable electro-optic sampling oscilloscope by use of a digital phase-locked loop phase shifter (PLL-PS) controlled delay-time-tunable gain-switched laser diode (GSLD). The home-made voltage-controllable PLL-PS exhibits a linear transfer function with ultra-wide phase shifting range of ±350° and tuning error of <±5%, which benefits the advantages of frequency tracking to free-running signals with suppressed timing-jitter. The maximum delay-time of PLL-PS controlled GSLD is up to 1.95 periods by changing the controlling voltage ( VREF) from -3.5 to 3.5 V, which corresponds to 3.9 ns at repetition frequency of 500 MHz. The tuning responsivity and resolution are about 0.56 ns/V and 0.15˜0.2 ps, respectively. The maximum delay-time switching bandwidth of 100 Hz is determined under the control of a saw-tooth modulated VREF function. The waveform sampling of microwave PECL signals generated from a free-running digital frequency divider is performed with acceptable measuring deviation.

Phase-locked loop based on nanoelectromechanical resonant-body field effect transistor

NASA Astrophysics Data System (ADS)

Bartsch, S. T.; Rusu, A.; Ionescu, A. M.

2012-10-01

We demonstrate the room-temperature operation of a silicon nanoelectromechanical resonant-body field effect transistor (RB-FET) embedded into phase-locked loop (PLL). The very-high frequency resonator uses on-chip electrostatic actuation and transistor-based displacement detection. The heterodyne frequency down-conversion based on resistive FET mixing provides a loop feedback signal with high signal-to-noise ratio. We identify key parameters for PLL operation, and analyze the performance of the RB-FET at the system level. Used as resonant mass detector, the experimental frequency stability in the ppm-range translates into sub atto-gram (10-18 g) sensitivity in high vacuum. The feedback and control system are generic and may be extended to other mechanical resonators with transistor properties, such as graphene membranes and carbon nanotubes.

False lock performance in polarity-type Costas receivers in the presence of periodic data patterns

NASA Technical Reports Server (NTRS)

Wang, James June-Ming; Lai, Dennis Teng-Tsun; Heng, Veronica Siang-Gek; Godfrey, Robert D.

1987-01-01

The authors address the false-lock performance of receivers which use polarity-type Costas loops for the carrier recovery of unbalanced quadrature phase-shift keyed (QPSK), asynchronous QPSK or binary PSK (BPSK) signals in the presence of periodic data patterns. The potential false-lock frequencies are first identified. Expressions for both true-lock and false-lock components are also derived, thereby allowing numerical evaluation of various key parameters for cases of practical interest.

Geodetic Secor Satellite

DTIC Science & Technology

1974-06-01

retrans- minied modulation signals. A phase-lock loop was used to provide correlation detection, allowing automatic acquisition and phase tracking at...steel strips, 0.5-inch-wide by 0.009-inch-thick, and formed to a 0.75-inch radius. Each antenne -was plated with silver to imprive con- dutivity...Telemetry Requirements k. Phase Detector Output Requirements 1. Primary Power Requirements m. AM Suppression Requirements n. Data Feedback Loop Gain

42.8 Gb/s ASK homodyne receiver using standard DFB lasers

NASA Astrophysics Data System (ADS)

Becker, D.; Mohr, D.; Datta, S.; Wree, C.; Bhandare, S.; Joshi, A.

2009-05-01

Optical synchronous coherent detection is attracting greater attention within the defense and security community because it allows linear recovery both of the amplitude and phase of optical signals. Fiber-based transmission impairments such as chromatic dispersion and polarization mode dispersion can be compensated in the electrical domain. Additionally, synchronous detection offers the potential of improved receiver sensitivity and extended reach versus direct or interferometric detection schemes. 28 Gbaud/112 Gb/s and 42.8 Gbaud transmissions are now being considered in fiber networks worldwide. Due to the lack of broadband high frequency components centered at IF values of 56 GHz and 86 GHz, respectively, the coherent heterodyne approach is not viable for these baud rates. The homodyne approach remains one of the choices available to fully exploit the advantages of synchronous coherent detection at these transmission data rates. In order to implement the homodyne receiver, optical phase locking between the signal and local oscillator laser (LO) is required. Digital approaches for this task rely upon very complex, fast, and high power-consumption chips. A homodyne receiver using an analog approach for phase locking would allow for increased system simplicity at a lower cost. Use of commercial-off-the-shelf (COTS) DFB lasers embedded within the receiver would also increase system feasibility for defense applications. We demonstrate synchronous demodulation of a 42.8 Gbaud signal using an analog optical phase-locked loop. The homodyne system was optimized to use COTS DFB lasers having an aggregate linewidth of ~2 MHz. We also analyze the impact of uncompensated phase noise on receiver performance.

Time domain multiplexed spatial division multiplexing receiver.

PubMed

van Uden, Roy G H; Okonkwo, Chigo M; Chen, Haoshuo; de Waardt, Hugo; Koonen, Antonius M J

2014-05-19

A novel time domain multiplexed (TDM) spatial division multiplexing (SDM) receiver which allows for the reception of >1 dual polarization mode with a single coherent receiver, and corresponding 4-port oscilloscope, is experimentally demonstrated. Received by two coherent receivers and respective 4-port oscilloscopes, a 3 mode transmission of 28GBaud QPSK, 8, 16, and 32QAM over 41.7km of few-mode fiber demonstrates the performance of the TDM-SDM receiver with respect to back-to-back. In addition, by using carrier phase estimation employing one digital phase locked loop per output, the frequency offset between the transmitter laser and local oscillator is shown to perform similar to previous work which employs 3 coherent receivers and 4-port oscilloscopes which are dedicated to the reception of each the three modes.

Phasemeter core for intersatellite laser heterodyne interferometry: modelling, simulations and experiments

NASA Astrophysics Data System (ADS)

Gerberding, Oliver; Sheard, Benjamin; Bykov, Iouri; Kullmann, Joachim; Esteban Delgado, Juan Jose; Danzmann, Karsten; Heinzel, Gerhard

2013-12-01

Intersatellite laser interferometry is a central component of future space-borne gravity instruments like Laser Interferometer Space Antenna (LISA), evolved LISA, NGO and future geodesy missions. The inherently small laser wavelength allows us to measure distance variations with extremely high precision by interfering a reference beam with a measurement beam. The readout of such interferometers is often based on tracking phasemeters, which are able to measure the phase of an incoming beatnote with high precision over a wide range of frequencies. The implementation of such phasemeters is based on all digital phase-locked loops (ADPLL), hosted in FPGAs. Here, we present a precise model of an ADPLL that allows us to design such a readout algorithm and we support our analysis by numerical performance measurements and experiments with analogue signals.

Low speed phaselock speed control system. [for brushless dc motor

NASA Technical Reports Server (NTRS)

Fulcher, R. W.; Sudey, J. (Inventor)

1975-01-01

A motor speed control system for an electronically commutated brushless dc motor is provided which includes a phaselock loop with bidirectional torque control for locking the frequency output of a high density encoder, responsive to actual speed conditions, to a reference frequency signal, corresponding to the desired speed. The system includes a phase comparator, which produces an output in accordance with the difference in phase between the reference and encoder frequency signals, and an integrator-digital-to-analog converter unit, which converts the comparator output into an analog error signal voltage. Compensation circuitry, including a biasing means, is provided to convert the analog error signal voltage to a bidirectional error signal voltage which is utilized by an absolute value amplifier, rotational decoder, power amplifier-commutators, and an arrangement of commutation circuitry.

Electronic Circuit Experiments and SPICE Simulation of Double Covering Bifurcation of 2-Torus Quasi-Periodic Flow in Phase-Locked Loop Circuit

NASA Astrophysics Data System (ADS)

Kamiyama, Kyohei; Endo, Tetsuro; Imai, Isao; Komuro, Motomasa

2016-06-01

Double covering (DC) bifurcation of a 2-torus quasi-periodic flow in a phase-locked loop circuit was experimentally investigated using an electronic circuit and via SPICE simulation; in the circuit, the input radio-frequency signal was frequency modulated by the sum of two asynchronous sinusoidal baseband signals. We observed both DC and period-doubling bifurcations of a discrete map on two Poincaré sections, which were realized by changing the sample timing from one baseband sinusoidal signal to the other. The results confirm the DC bifurcation of the original flow.

A simplified digital lock-in amplifier for the scanning grating spectrometer.

PubMed

Wang, Jingru; Wang, Zhihong; Ji, Xufei; Liu, Jie; Liu, Guangda

2017-02-01

For the common measurement and control system of a scanning grating spectrometer, the use of an analog lock-in amplifier requires complex circuitry and sophisticated debugging, whereas the use of a digital lock-in amplifier places a high demand on the calculation capability and storage space. In this paper, a simplified digital lock-in amplifier based on averaging the absolute values within a complete period is presented and applied to a scanning grating spectrometer. The simplified digital lock-in amplifier was implemented on a low-cost microcontroller without multipliers, and got rid of the reference signal and specific configuration of the sampling frequency. Two positive zero-crossing detections were used to lock the phase of the measured signal. However, measurement method errors were introduced by the following factors: frequency fluctuation, sampling interval, and integer restriction of the sampling number. The theoretical calculation and experimental results of the signal-to-noise ratio of the proposed measurement method were 2055 and 2403, respectively.

A bibliography of the theory and application of the phase-lock principle

NASA Technical Reports Server (NTRS)

Lindsey, W. C.; Tausworthe, R. C.

1973-01-01

A literature search was conducted in an effort to collect and compile as many references on the phase-locked loop as possible. Although not all inclusive, a comprehensive listing of approximately 800 references covering the past two decades of work reported throughout the world are presented. The compilation is given in two parts: first by categories, and then alphabetically by authors.

Frequency-Domain Channel Estimation and Equalization for Single Carrier Underwater Acoustic Communications

DTIC Science & Technology

2007-01-01

synchronization ; vm(k) white Gaussian noise with average power σ2. If the Doppler shift f m,k is significant, then it causes the received signal ym(k) to be time ...intersymbol interference (ISI) to extend over 20-300 symbols at a data rate of 2-10 kilosymbols per second. Another obstacle is the time -varying Doppler... synchronization that employs a phase-locked loop (PLL) or delay-locked loop (DLL). However, the DFE and PLL/DLL have to interact in a nonlinear fashion

Investigation of new techniques for aircraft navigation using the omega navigation

NASA Technical Reports Server (NTRS)

Baxa, E. G., Jr.

1978-01-01

An OMEGA navigation receiver with a microprocessor as the computational component was investigated. A version of the INTEL 4004 microprocessor macroassembler suitable for use on the CDC-6600 system and development of a FORTRAN IV simulator program for the microprocessor was developed. Supporting studies included development and evaluation of navigation algorithms to generate relative position information from OMEGA VLF phase measurements. Simulation studies were used to evaluate assumptions made in developing a navigation equation in OMEGA Line of Position (LOP) coordinates. Included in the navigation algorithms was a procedure for calculating a position in latitude/longitude given an OMEGA LOP fix. Implementation of a digital phase locked loop (DPLL) was evaluated on the basic of phase response characteristics over a range of input phase variations. Included also is an analytical evaluation on the basis of error probability of an algorithm for automatic time synchronization of the receiver to the OMEGA broadcast format. The use of actual OMEGA phase data and published propagation prediction corrections to determine phase velocity estimates was discussed.

Optical Correlation Techniques In Fluid Dynamics

NASA Astrophysics Data System (ADS)

Schatzel, K.; Schulz-DuBois, E. O.; Vehrenkamp, R.

1981-05-01

Three flow measurement techniques make use of fast digital correlators. (1) Most widely spread is photon correlation velocimetry using crossed laser beams and detecting Doppler shifted light scattered by small particles in the flow. Depending on the processing of the photon correlogram, this technique yields mean velocity, turbulence level, or even the detailed probability distribution of one velocity component. An improved data processing scheme is demonstrated on laminar vortex flow in a curved channel. (2) Rate correlation based upon threshold crossings of a high pass filtered laser Doppler signal can he used to obtain velocity correlation functions. The most powerful setup developed in our laboratory uses a phase locked loop type tracker and a multibit correlator to analyse time-dependent Taylor vortex flow. With two optical systems and trackers, crosscorrelation functions reveal phase relations between different vortices. (3) Making use of refractive index fluctuations (e. g. in two phase flows) instead of scattering particles, interferometry with bidirectional fringe counting and digital correlation and probability analysis constitute a new quantitative technique related to classical Schlieren methods. Measurements on a mixing flow of heated and cold air contribute new ideas to the theory of turbulent random phase screens.

Optical correlation techniques in fluid dynamics

NASA Astrophysics Data System (ADS)

Schätzel, K.; Schulz-Dubois, E. O.; Vehrenkamp, R.

1981-04-01

Three flow measurement techniques make use of fast digital correlators. The most widely spread is photon correlation velocimetry using crossed laser beams, and detecting Doppler shifted light scattered by small particles in the flow. Depending on the processing of the photon correlation output, this technique yields mean velocity, turbulence level, and even the detailed probability distribution of one velocity component. An improved data processing scheme is demonstrated on laminar vortex flow in a curved channel. In the second method, rate correlation based upon threshold crossings of a high pass filtered laser Doppler signal can be used to obtain velocity correlation functions. The most powerful set-up developed in our laboratory uses a phase locked loop type tracker and a multibit correlator to analyze time-dependent Taylor vortex flow. With two optical systems and trackers, cross-correlation functions reveal phase relations between different vortices. The last method makes use of refractive index fluctuations (eg in two phase flows) instead of scattering particles. Interferometry with bidirectional counting, and digital correlation and probability analysis, constitutes a new quantitative technique related to classical Schlieren methods. Measurements on a mixing flow of heated and cold air contribute new ideas to the theory of turbulent random phase screens.

Phase noise mitigation of QPSK signal utilizing phase-locked multiplexing of signal harmonics and amplitude saturation.

PubMed

Mohajerin-Ariaei, Amirhossein; Ziyadi, Morteza; Chitgarha, Mohammad Reza; Almaiman, Ahmed; Cao, Yinwen; Shamee, Bishara; Yang, Jeng-Yuan; Akasaka, Youichi; Sekiya, Motoyoshi; Takasaka, Shigehiro; Sugizaki, Ryuichi; Touch, Joseph D; Tur, Moshe; Langrock, Carsten; Fejer, Martin M; Willner, Alan E

2015-07-15

We demonstrate an all-optical phase noise mitigation scheme based on the generation, delay, and coherent summation of higher order signal harmonics. The signal, its third-order harmonic, and their corresponding delayed variant conjugates create a staircase phase-transfer function that quantizes the phase of quadrature-phase-shift-keying (QPSK) signal to mitigate phase noise. The signal and the harmonics are automatically phase-locked multiplexed, avoiding the need for phase-based feedback loop and injection locking to maintain coherency. The residual phase noise converts to amplitude noise in the quantizer stage, which is suppressed by parametric amplification in the saturation regime. Phase noise reduction of ∼40% and OSNR-gain of ∼3  dB at BER 10(-3) are experimentally demonstrated for 20- and 30-Gbaud QPSK input signals.

Carrier-to-noise power estimation for the Block 5 Receiver

NASA Technical Reports Server (NTRS)

Monk, A. M.

1991-01-01

Two possible algorithms for the carrier to noise power (P sub c/N sub 0) estimation in the Block V Receiver are analyzed and their performances compared. The expected value and the variance of each estimator algorithm are derived. The two algorithms examined are known as the I arm estimator, which relies on samples from only the in-phase arm of the digital phase lock loop, and the IQ arm estimator, which uses both in-phase and quadrature-phase arm signals. The IQ arm algorithm is currently implemented in the Advanced Receiver II (ARX II). Both estimators are biased. The performance degradation due to phase jitter in the carrier tracking loop is taken into account. Curves of the expected value and the signal to noise ratio of the P sub c/N sub 0 estimators vs. actual P sub c/N sub 0 are shown. From this, it is clear that the I arm estimator performs better than the IQ arm estimator when the data to noise power ratio (P sub d/N sub 0) is high, i.e., at high P sub c/N sub 0 values and a significant modulation index. When P sub d/N sub 0 is low, the two estimators have essentially the same performance.

The evaluation of phasemeter prototype performance for the space gravitational waves detection.

PubMed

Liu, He-Shan; Dong, Yu-Hui; Li, Yu-Qiong; Luo, Zi-Ren; Jin, Gang

2014-02-01

Heterodyne laser interferometry is considered as the most promising readout scheme for future space gravitational wave detection missions, in which the gravitational wave signals disguise as small phase variances within the heterodyne beat note. This makes the phasemeter, which extracts the phase information from the beat note, the key device to this system. In this paper, a prototype of phasemeter based on digital phase-locked loop technology is developed, and the major noise sources which may contribute to the noise spectra density are analyzed in detail. Two experiments are also carried out to evaluate the performance of the phasemeter prototype. The results show that the sensitivity is achieved 2π μrad/√Hz in the frequency range of 0.04 Hz-10 Hz. Due to the effect of thermal drift, the noise obviously increases with the frequencies down to 0.1 mHz.

The evaluation of phasemeter prototype performance for the space gravitational waves detection

NASA Astrophysics Data System (ADS)

Liu, He-Shan; Dong, Yu-Hui; Li, Yu-Qiong; Luo, Zi-Ren; Jin, Gang

2014-02-01

Heterodyne laser interferometry is considered as the most promising readout scheme for future space gravitational wave detection missions, in which the gravitational wave signals disguise as small phase variances within the heterodyne beat note. This makes the phasemeter, which extracts the phase information from the beat note, the key device to this system. In this paper, a prototype of phasemeter based on digital phase-locked loop technology is developed, and the major noise sources which may contribute to the noise spectra density are analyzed in detail. Two experiments are also carried out to evaluate the performance of the phasemeter prototype. The results show that the sensitivity is achieved 2π μrad/√Hz in the frequency range of 0.04 Hz-10 Hz. Due to the effect of thermal drift, the noise obviously increases with the frequencies down to 0.1 mHz.

Fast flux locked loop

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-09-10

A flux locked loop for providing an electrical feedback signal, the flux locked loop employing radio-frequency components and technology to extend the flux modulation frequency and tracking loop bandwidth. The flux locked loop of the present invention has particularly useful application in read-out electronics for DC SQUID magnetic measurement systems, in which case the electrical signal output by the flux locked loop represents an unknown magnetic flux applied to the DC SQUID.

Constant frequency pulsed phase-locked-loop instrument for measurement of ultrasonic velocity

NASA Technical Reports Server (NTRS)

Yost, William T.; Cantrell, John H.; Kushnick, Peter W.

1991-01-01

A new instrument based on a constant-frequency pulsed phase-locked-loop (CFPPLL) concept has been developed to accurately measure the ultrasonic wave velocity in liquids and changes in ultrasonic wave velocity in solids and liquids. An analysis of the system shows that it is immune to many of the frequency-dependent effects that plague other techniques. Measurements of the sound velocity in ultrapure water are used to confirm the analysis. The results are in excellent agreement with values from the literature, and establish that the CFPPLL provides a reliable, accurate way to measure velocities, as well as for monitoring small changes in velocity without the sensitivity to frequency-dependent phase shifts common to other measurement systems. The estimated sensitivity to phase changes is better than a few parts in 10 to the 7th.

Phase-locked loop with controlled phase slippage

DOEpatents

Mestha, Lingappa K.

1994-01-01

A system for synchronizing a first subsystem controlled by a changing frequency sweeping from a first frequency to a second frequency, with a second subsystem operating at a steady state second frequency. Trip plan parameters are calculated in advance to determine the phase relationship between the frequencies of the first subsystem and second subsystem in order to obtain synchronism at the end of the frequency sweep of the first subsystem. During the time in which the frequency of the first subsystem is sweeping from the first frequency to the second frequency, the phase locked system compares the actual phase difference with the trip plan phase difference and incrementally changes the sweep frequency in a manner so that phase lock is achieved when the first subsystem reaches a frequency substantially identical to that of the second subsystem.

High frequency optoelectronic oscillators based on the optical feedback of semiconductor mode-locked laser diodes.

PubMed

Haji, Mohsin; Hou, Lianping; Kelly, Anthony E; Akbar, Jehan; Marsh, John H; Arnold, John M; Ironside, Charles N

2012-01-30

Optical self seeding feedback techniques can be used to improve the noise characteristics of passively mode-locked laser diodes. External cavities such as fiber optic cables can increase the memory of the phase and subsequently improve the timing jitter. In this work, an improved optical feedback architecture is proposed using an optical fiber loop delay as a cavity extension of the mode-locked laser. We investigate the effect of the noise reduction as a function of the loop length and feedback power. The well known composite cavity technique is also implemented for suppressing supermode noise artifacts presented due to harmonic mode locking effects. Using this method, we achieve a record low radio frequency linewidth of 192 Hz for any high frequency (>1 GHz) passively mode-locked laser to date (to the best of the authors' knowledge), making it promising for the development of high frequency optoelectronic oscillators.

Modeling and simulation of continuous wave velocity radar based on third-order DPLL

NASA Astrophysics Data System (ADS)

Di, Yan; Zhu, Chen; Hong, Ma

2015-02-01

Second-order digital phase-locked-loop (DPLL) is widely used in traditional Continuous wave (CW) velocity radar with poor performance in high dynamic conditions. Using the third-order DPLL can improve the performance. Firstly, the echo signal model of CW radar is given. Secondly, theoretical derivations of the tracking performance in different velocity conditions are given. Finally, simulation model of CW radar is established based on Simulink tool. Tracking performance of the two kinds of DPLL in different acceleration and jerk conditions is studied by this model. The results show that third-order PLL has better performance in high dynamic conditions. This model provides a platform for further research of CW radar.

A 2-to-48-MHz Phase-Locked Loop

NASA Technical Reports Server (NTRS)

Koudelka, Robert D.

2004-01-01

A 2-to-48-MHz phase-locked loop (PLL), developed for the U.S. space program, meets or exceeds all space shuttle clock electrical interface requirements by taking as its reference a 2-to-48-MHz clock signal and outputting a phaselocked clock signal set at the same frequency as the reference clock with transistor- transistor logic (TTL) voltage levels. Because it is more adaptable than other PLLs, the new PLL can be used in industries that employ signaling devices and as a tool in future space missions. A conventional PLL consists of a phase/frequency detector, loop filter, and voltage-controlled oscillator in which each component exists individually and is integrated into a single device. PLL components phase-lock to a single frequency or to a narrow bandwidth of frequencies. It is this design, however, that prohibits them from maintaining phase lock to a dynamically changing reference clock when a large bandwidth is required a deficiency the new PLL overcomes. Since most PLL components require their voltage-controlled oscillators to operate at greater than 2-MHz frequencies, conventional PLLs often cannot achieve the low-frequency phase lock allowed by the new PLL. The 2-to-48-MHz PLL is built on a wire-wrap board with pins wired to three position jumpers; this makes changing configurations easy. It responds to variations in voltage-controlled oscillator (VCO) ranges, duty cycle, signal-to-noise ratio (SNR), amplitude, and jitter, exceeding design specifications. A consensus state machine, implemented in a VCO range detector which assures the PLL continues to operate in the correct range, is the primary control state machine for the 2-to-48-MHz PLL circuit. By using seven overlapping frequency ranges with hysteresis, the PLL output sets the resulting phase-locked clock signal at a frequency that agrees with the reference clock with TTL voltage levels. As a space-shuttle tool, the new PLL circuit takes the noisy, degraded reference clock signals as input and outputs phase-locked clock signals of the same frequency but with a corrected wave shape. Since its configuration circuit can be easily changed, the new PLL can do the following: readily respond to variations in VCO ranges, duty cycle, SNR, amplitude, and jitter; continuously operate in the correct VCO range because of its consensus state machine; and use its range detector implements to overlap seven frequency ranges with hysteresis, thus giving the current design a flexibility that exceeds anything available at the time of this development. These features will benefit any industry in which safe and timely clock signals are vital to operation.

Generation of a CW local oscillator signal using a stabilized injection locked semiconductor laser

NASA Astrophysics Data System (ADS)

Pezeshki, Jonah Massih

In high speed-communications, it is desirable to be able to detect small signals while maintaining a low bit-error rate. Conventional receivers for high-speed fiber optic networks are Amplified Direct Detectors (ADDs) that use erbium-doped fiber amplifiers (EDFAs) before the detector to achieve a suitable sensitivity. In principle, a better method for obtaining the maximum possible signal to noise ratio is through the use of homodyne detection. The major difficulty in implementing a homodyne detection system is the generation of a suitable local oscillator signal. This local oscillator signal must be at the same frequency as the received data signal, as well as be phase coherent with it. To accomplish this, a variety of synchronization techniques have been explored, including Optical Phase-Lock Loops (OPLL), Optical Injection Locking (OIL) with both Fabry-Perot and DFB lasers, and an Optical Injection Phase-Lock Loop (OIPLL). For this project I have implemented a method for regenerating a local oscillator from a portion of the received optical signal. This regenerated local oscillator is at the same frequency, and is phase coherent with, the received optical signal. In addition, we show that the injection locking process can be electronically stabilized by using the modulation transfer ratio of the slave laser as a monitor, given either a DFB or Fabry-Perot slave laser. We show that this stabilization technique maintains injection lock (given a locking range of ˜1GHz) for laser drift much greater than what is expected in a typical transmission system. In addition, we explore the quality of the output of the slave laser, and analyze its suitability as a local oscillator signal for a homodyne receiver.

A miniaturized digital telemetry system for physiological data transmission

NASA Technical Reports Server (NTRS)

Portnoy, W. M.; Stotts, L. J.

1978-01-01

A physiological date telemetry system, consisting basically of a portable unit and a ground base station was designed, built, and tested. The portable unit to be worn by the subject is composed of a single crystal controlled transmitter with AM transmission of digital data and narrowband FM transmission of voice; a crystal controlled FM receiver; thirteen input channels follwed by a PCM encoder (three of these channels are designed for ECG data); a calibration unit; and a transponder control system. The ground base station consists of a standard telemetry reciever, a decoder, and an FM transmitter for transmission of voice and transponder signals to the portable unit. The ground base station has complete control of power to all subsystems in the portable unit. The phase-locked loop circuit which is used to decode the data, remains in operation even when the signal from the portable unit is interrupted.

New coherent laser communication detection scheme based on channel-switching method.

PubMed

Liu, Fuchuan; Sun, Jianfeng; Ma, Xiaoping; Hou, Peipei; Cai, Guangyu; Sun, Zhiwei; Lu, Zhiyong; Liu, Liren

2015-04-01

A new coherent laser communication detection scheme based on the channel-switching method is proposed. The detection front end of this scheme comprises a 90° optical hybrid and two balanced photodetectors which outputs the in-phase (I) channel and quadrature-phase (Q) channel signal current, respectively. With this method, the ultrahigh speed analog/digital transform of the signal of the I or Q channel is not required. The phase error between the signal and local lasers is obtained by simple analog circuit. Using the phase error signal, the signals of the I/Q channel are switched alternately. The principle of this detection scheme is presented. Moreover, the comparison of the sensitivity of this scheme with that of homodyne detection with an optical phase-locked loop is discussed. An experimental setup was constructed to verify the proposed detection scheme. The offline processing procedure and results are presented. This scheme could be realized through simple structure and has potential applications in cost-effective high-speed laser communication.

Optically stabilized Erbium fiber frequency comb with hybrid mode-locking and a broad tunable range of repetition rate.

PubMed

Yang, Honglei; Wu, Xuejian; Zhang, Hongyuan; Zhao, Shijie; Yang, Lijun; Wei, Haoyun; Li, Yan

2016-12-01

We present an optically stabilized Erbium fiber frequency comb with a broad repetition rate tuning range based on a hybrid mode-locked oscillator. We lock two comb modes to narrow-linewidth reference lasers in turn to investigate the best performance of control loops. The control bandwidth of fast and slow piezoelectric transducers reaches 70 kHz, while that of pump current modulation with phase-lead compensation is extended to 32 kHz, exceeding laser intrinsic response. Eventually, simultaneous lock of both loops is realized to totally phase-stabilize the comb, which will facilitate precision dual-comb spectroscopy, laser ranging, and timing distribution. In addition, a 1.8-MHz span of the repetition rate is achieved by an automatic optical delay line that is helpful in manufacturing a secondary comb with a similar repetition rate. The oscillator is housed in a homemade temperature-controlled box with an accuracy of ±0.02  K, which not only keeps high signal-to-noise ratio of the beat notes with reference lasers, but also guarantees self-starting at the same mode-locking every time.

Mid-infrared multiheterodyne spectroscopy with phase-locked quantum cascade lasers

NASA Astrophysics Data System (ADS)

Westberg, J.; Sterczewski, L. A.; Wysocki, G.

2017-04-01

Fabry-Pérot (FP) quantum cascade lasers (QCLs) provide purely electronically controlled monolithic sources for broadband mid-infrared (mid-IR) multiheterodyne spectroscopy (MHS), which benefits from the large gain bandwidth of the QCLs without sacrificing the narrowband properties commonly associated with the single mode distributed feedback variant. We demonstrate a FP-QCL based multiheterodyne spectrometer with a short-term noise-equivalent absorption of ˜3 × 10-4/ √{ H z } , a mid-IR spectral coverage of 25 cm-1, and very short acquisition time (10 μs) capability. The broadband potential is demonstrated by measuring the absorption spectra of ammonia and isobutane under atmospheric pressure conditions. The stability of the system is enhanced by a two-stage active frequency inter-locking procedure, where the two QCLs are pre-locked with a slow feedback loop based on an analog frequency discriminator, followed by a high bandwidth optical phase-locked loop. The locking system provides a relative frequency stability in the sub kHz range over seconds of integration time. The strength of the technique lies in the ability to acquire spectral information from all optical modes simultaneously and individually, which bodes for a versatile and cost effective spectrometer for mid-IR chemical gas sensing.

A Computer Model of a Phase Lock Loop

NASA Technical Reports Server (NTRS)

Shelton, Ralph Paul

1973-01-01

A computer model is reported of a PLL (phase-lock loop), preceded by a bandpass filter, which is valid when the bandwidth of the bandpass filter is of the same order of magnitude as the natural frequency of the PLL. New results for the PLL natural frequency equal to the bandpass filter bandwidth are presented for a second order PLL operating with carrier plus noise as the input. However, it is shown that extensions to higher order loops, and to the case of a modulated carrier are straightforward. The new results presented give the cycle skipping rate of the PLL as a function of the input carrier to noise ratio when the PLL natural frequency is equal to the bandpass filter bandwidth. Preliminary results showing the variation of the output noise power and cycle skipping rates of the PLL as a function of the loop damping ratio for the PLL natural frequency equal to the bandpass filter bandwidth are also included.

Word-Synchronous Optical Sampling of Periodically Repeated OTDM Data Words for True Waveform Visualization

NASA Astrophysics Data System (ADS)

Benkler, Erik; Telle, Harald R.

2007-06-01

An improved phase-locked loop (PLL) for versatile synchronization of a sampling pulse train to an optical data stream is presented. It enables optical sampling of the true waveform of repetitive high bit-rate optical time division multiplexed (OTDM) data words such as pseudorandom bit sequences. Visualization of the true waveform can reveal details, which cause systematic bit errors. Such errors cannot be inferred from eye diagrams and require word-synchronous sampling. The programmable direct-digital-synthesis circuit used in our novel PLL approach allows flexible adaption of virtually any problem-specific synchronization scenario, including those required for waveform sampling, for jitter measurements by slope detection, and for classical eye-diagrams. Phase comparison of the PLL is performed at 10-GHz OTDM base clock rate, leading to a residual synchronization jitter of less than 70 fs.

Integrated Photonic Comb Generation: Applications in Coherent Communication and Sensing

NASA Astrophysics Data System (ADS)

Parker, John S.

Integrated photonics combines many optical components including lasers, modulators, waveguides, and detectors in close proximity via homogeneous (monolithic) or heterogeneous (using multiple materials) integration. This improves stability for interferometers and lasers, reduces the occurrence of unwanted reflections, and it avoids coupling losses between different components as they are on the same chip. Thus, less power is needed to compensate for these added losses, and less heat needs to be removed due to these power savings. In addition, integration allows the many components that comprise a system to be fabricated together, thereby reducing the cost per system and allowing rapid scaling in production throughput. Integrated optical combs have many applications including: metrology, THz frequency generation, arbitrary waveform generation, optical clocks, photonic analog-to-digital converters, sensing (imaging), spectroscopy, and data communication. A comb is a set of optical sources evenly spaced in frequency. Several methods of comb generation including mode-locking and optical parametric oscillation produce phase-matched optical outputs with a fixed phase relationship between the frequency lines. When the absolute frequency of a single comb line is stabilized along with the frequency spacing between comb lines, absolute phase and frequency precision can be achieved over the entire comb bandwidth. This functionality provides tremendous benefits to many applications such as coherent communication and optical sensing. The goals for this work were achieving a broad comb bandwidth and noise reduction, i.e., frequency and phase stability. Integrated mode-locked lasers on the InGaAsP/InP material platform were chosen, as they could be monolithically integrated with the wide range of highly functional and versatile photonic integrated circuits (PICs) previously demonstrated on this platform at UCSB. Gain flattening filters were implemented to increase the comb bandwidths to 2.5 THz. Active mode-locking with an RF source was used to precisely set the frequency spacing between comb lines with better than 10 Hz accuracy. An integrated optical phase-locked loop (OPLL) for the comb was designed, built, and tested. The OPLL fixed a single comb line to a stable single linewidth laser, demonstrating a ˜430 Hz FWHM optical linewidth on the locked comb line and 20º RMS phase deviation between the comb and optical reference. The free-running linewidth is 50--100 MHz, demonstrating over 50 dB improvement in optical linewidth via locking. An integrated tunable laser (SG-DBR) with an OPLL was phase-locked to a comb source with a fixed offset frequency, thus showing the potential for using a comb with SG-DBRs as a compact frequency synthesizer.

Design and test of a regenerative satellite transmultiplexer

NASA Astrophysics Data System (ADS)

Hung, Kenny King-Ming

1993-05-01

In a multiple access scheme for regenerative satellite communications, the bulk frequency division multiple access (FDMA) uplink signal is demodulated on board the satellite and then remodulated for time division multiplexing (TDM) downlink transmission. Conversion from frequency to time division multiplex format requires that the uplink signal be frequency demultiplexed and each individual carrier be subsequently demodulated. For thin-route application which consists of a large number of channels with fixed data rate, multicarrier demodulation can be accomplished efficiently by a digital transmultiplexer (TMUX) using a fast Fourier transform processor followed by a bank of per-channel processors. A time domain description of the TMUX algorithm is derived which elucidates how the TMUX functions. The per-channel processor performs timing and carrier recovery for optimum and coherent data detection. Timing recovery is necessarily achieved asynchronously by a filter coefficient interpolation. Carrier recovery is performed using an all-digital phase-locked loop. The combination of both timing and carrier loops is investigated for a multi-user system. The performance of the overall system is assessed over a multi-user, additive white Gaussian noise channel for a bit energy to noise power spectral density ratio down to zero dB.

Phase-locked loop with controlled phase slippage

DOEpatents

Mestha, L.K.

1994-03-29

A system for synchronizing a first subsystem controlled by a changing frequency sweeping from a first frequency to a second frequency, with a second subsystem operating at a steady state second frequency is described. Trip plan parameters are calculated in advance to determine the phase relationship between the frequencies of the first subsystem and second subsystem in order to obtain synchronism at the end of the frequency sweep of the first subsystem. During the time in which the frequency of the first subsystem is sweeping from the first frequency to the second frequency, the phase locked system compares the actual phase difference with the trip plan phase difference and incrementally changes the sweep frequency in a manner so that phase lock is achieved when the first subsystem reaches a frequency substantially identical to that of the second subsystem. 10 figures.

Voltage-Controlled Oscillator

NASA Technical Reports Server (NTRS)

1995-01-01

Integrated Component Systems, Inc. incorporated information from a NASA Tech Briefs article into a voltage-controlled oscillator it designed for a customer. The company then applied the technology to its series of phase-locked loop synthesizers, which offer superior phase noise performance.

Ultrahigh-speed phaselocked-loop type clock recovery circuit using a travelling-wave laser diode amplifier as a 50 GHz phase detector

NASA Astrophysics Data System (ADS)

Kawanishi, S.; Takara, H.; Saruwatari, M.; Kitoh, T.

1993-09-01

Successful operation of a phase-locked loop is demonstrated using a traveling-wave laser-diode amplifier as a 50 GHz phase detector. Optical gain modulation in the laser diode amplifier and an all-optical clock multiplication technique using a silica-based guided-wave optical circuit are used to achieve the extremely high-speed operation. Also discussed is the possibility of more than 100 GHz operation.

Effect of GNSS receiver carrier phase tracking loops on earthquake monitoring performance

NASA Astrophysics Data System (ADS)

Clare, Adam; Lin, Tao; Lachapelle, Gérard

2017-06-01

This research focuses on the performance of GNSS receiver carrier phase tracking loops for early earthquake monitoring systems. An earthquake was simulated using a hardware simulator and position, velocity and acceleration displacements were obtained to recreate the dynamics of the 2011 Tohoku earthquake. Using a software defined receiver, GSNRx, tracking bandwidths of 5, 10, 15, 20, 30, 40 and 50 Hz along with integration times of 1, 5 and 10 ms were tested. Using the phase lock indicator, an adaptive tracking loop was designed and tested to maximize performance for this application.

A low power MICS band phase-locked loop for high resolution retinal prosthesis.

PubMed

Yang, Jiawei; Skafidas, Efstratios

2013-08-01

Ultra low power dissipation is essential in retinal prosthesis and many other biomedical implants. Extensive research has been undertaken in designing low power biomedical transceivers, however to date, most effort has been focused on low frequency inductive links. For higher frequency, more robust and more complex applications, such as Medical Implant Communication Service (MICS) band multichannel transceivers, power consumption remains high. This paper explores the design of micro-power data links at 400 MHz for a high resolution retinal prosthesis. By taking advantage of advanced small geometry CMOS technology and precise transistor-level modeling, we successfully utilized subthreshold FET operation, which has been historically limited to low frequency circuits due to the inadequate transistor operating speed in and near weak inversion; we have implemented a low power MICS transceiver. Particularly, a low power, MICS band multichannel phase-locked loop (PLL) that employs a subthreshold voltage controlled oscillator (VCO) and digital synchronous dividers has been implemented on a 65-nm CMOS. A design methodology is presented in detail with the demonstration of EKV model parameters extraction. This PLL provides 600- mVpp quadrature oscillations and exhibits a phase noise of -102 dBc/Hz at 200-kHz offset, while only consuming 430- μW from a 1-V supply. The VCO has a gain (KVCO) of 12 MHz/V and is designed to operate in the near-weak inversion region and consumes 220- μA DC current. The designed PLL has a core area of 0.54 mm(2). It satisfies all specifications of MICS band operation with the advantage of significant reduction in power which is crucial for high resolution retinal prosthesis.

Wide tracking range, auto ranging, low jitter phase lock loop for swept and fixed frequency systems

DOEpatents

Kerner, Thomas M.

2001-01-01

The present invention provides a wide tracking range phase locked loop (PLL) circuit that achieves minimal jitter in a recovered clock signal, regardless of the source of the jitter (i.e. whether it is in the source or the transmission media). The present invention PLL has automatic harmonic lockout detection circuitry via a novel lock and seek control logic in electrical communication with a programmable frequency discriminator and a code balance detector. (The frequency discriminator enables preset of a frequency window of upper and lower frequency limits to derive a programmable range within which signal acquisition is effected. The discriminator works in combination with the code balance detector circuit to minimize the sensitivity of the PLL circuit to random data in the data stream). In addition, the combination of a differential loop integrator with the lock and seek control logic obviates a code preamble and guarantees signal acquisition without harmonic lockup. An adaptive cable equalizer is desirably used in combination with the present invention PLL to recover encoded transmissions containing a clock and/or data. The equalizer automatically adapts to equalize short haul cable lengths of coaxial and twisted pair cables or wires and provides superior jitter performance itself. The combination of the equalizer with the present invention PLL is desirable in that such combination permits the use of short haul wires without significant jitter.

Zero-crossing sampling of Fourier-transform interferograms and spectrum reconstruction using the real-zero interpolation method.

PubMed

Minami, K; Kawata, S; Minami, S

1992-10-10

The real-zero interpolation method is applied to a Fourier-transformed infrared (FT-IR) interferogram. With this method an interferogram is reconstructed from its zero-crossing information only, without the use of a long-word analog-to-digital converter. We installed a phase-locked loop circuit into an FT-IR spectrometer for oversampling the interferogram. Infrared absorption spectra of polystyrene and Mylar films were measured as binary interferograms by the FT-IR spectrometer, which was equipped with the developed circuits, and their Fourier spectra were successfully reconstructed. The relationship of the oversampling ratio to the dynamic range of the reconstructed interferogram was evaluated through computer simulations. We also discuss the problems of this method for practical applications.

Photonic generation of phase-stable and wideband chirped microwave signals based on phase-locked dual optical frequency combs.

PubMed

Tong, Yitian; Zhou, Qian; Han, Daming; Li, Baiyu; Xie, Weilin; Liu, Zhangweiyi; Qin, Jie; Wang, Xiaocheng; Dong, Yi; Hu, Weisheng

2016-08-15

A photonics-based scheme is presented for generating wideband and phase-stable chirped microwave signals based on two phase-locked combs with fixed and agile repetition rates. By tuning the difference of the two combs' repetition rates and extracting different order comb tones, a wideband linearly frequency-chirped microwave signal with flexible carrier frequency and chirped range is obtained. Owing to the scheme of dual-heterodyne phase transfer and phase-locked loop, extrinsic phase drift and noise induced by the separated optical paths is detected and suppressed efficiently. Linearly frequency-chirped microwave signals from 5 to 15 GHz and 237 to 247 GHz with 30 ms duration are achieved, respectively, contributing to the time-bandwidth product of 3×10⁸. And less than 1.3×10^-5 linearity errors (RMS) are also obtained.

A Phase-Locked Loop Epilepsy Network Emulator.

PubMed

Watson, P D; Horecka, K M; Cohen, N J; Ratnam, R

2016-10-15

Most seizure forecasting employs statistical learning techniques that lack a representation of the network interactions that give rise to seizures. We present an epilepsy network emulator (ENE) that uses a network of interconnected phase-locked loops (PLLs) to model synchronous, circuit-level oscillations between electrocorticography (ECoG) electrodes. Using ECoG data from a canine-epilepsy model (Davis et al. 2011) and a physiological entropy measure (approximate entropy or ApEn, Pincus 1995), we demonstrate the entropy of the emulator phases increases dramatically during ictal periods across all ECoG recording sites and across all animals in the sample. Further, this increase precedes the observable voltage spikes that characterize seizure activity in the ECoG data. These results suggest that the ENE is sensitive to phase-domain information in the neural circuits measured by ECoG and that an increase in the entropy of this measure coincides with increasing likelihood of seizure activity. Understanding this unpredictable phase-domain electrical activity present in ECoG recordings may provide a target for seizure detection and feedback control.

Portable digital lock-in instrument to determine chemical constituents with single-color absorption measurements for Global Health Initiatives

NASA Astrophysics Data System (ADS)

Vacas-Jacques, Paulino; Linnes, Jacqueline; Young, Anna; Gerrard, Victoria; Gomez-Marquez, Jose

2014-03-01

Innovations in international health require the use of state-of-the-art technology to enable clinical chemistry for diagnostics of bodily fluids. We propose the implementation of a portable and affordable lock-in amplifier-based instrument that employs digital technology to perform biochemical diagnostics on blood, urine, and other fluids. The digital instrument is composed of light source and optoelectronic sensor, lock-in detection electronics, microcontroller unit, and user interface components working with either power supply or batteries. The instrument performs lock-in detection provided that three conditions are met. First, the optoelectronic signal of interest needs be encoded in the envelope of an amplitude-modulated waveform. Second, the reference signal required in the demodulation channel has to be frequency and phase locked with respect to the optoelectronic carrier signal. Third, the reference signal should be conditioned appropriately. We present three approaches to condition the signal appropriately: high-pass filtering the reference signal, precise offset tuning the reference level by low-pass filtering, and by using a voltage divider network. We assess the performance of the lock-in instrument by comparing it to a benchmark device and by determining protein concentration with single-color absorption measurements. We validate the concentration values obtained with the proposed instrument using chemical concentration measurements. Finally, we demonstrate that accurate retrieval of phase information can be achieved by using the same instrument.

Simple lock-in detection technique utilizing multiple harmonics for digital PGC demodulators.

PubMed

Duan, Fajie; Huang, Tingting; Jiang, Jiajia; Fu, Xiao; Ma, Ling

2017-06-01

A simple lock-in detection technique especially suited for digital phase-generated carrier (PGC) demodulators is proposed in this paper. It mixes the interference signal with rectangular waves whose Fourier expansions contain multiple odd or multiple even harmonics of the carrier to recover the quadrature components needed for interference phase demodulation. In this way, the use of a multiplier is avoided and the efficiency of the algorithm is improved. Noise performance with regard to light intensity variation and circuit noise is analyzed theoretically for both the proposed technique and the traditional lock-in technique, and results show that the former provides a better signal-to-noise ratio than the latter with proper modulation depth and average interference phase. Detailed simulations were conducted and the theoretical analysis was verified. A fiber-optic Michelson interferometer was constructed and the feasibility of the proposed technique is demonstrated.

Clock recovery PLL with gated PFD for NRZ ON-OFF Modulated Signals in a retinal implant system.

PubMed

Brendler, Christian; Aryan, Naser Pour; Rieger, Viola; Rothermel, Albrecht

2013-01-01

A Clock Recovery Phase Locked Loop with Gated Phase Frequency Detector (GPLL) for NRZ ON-OFF Modulated Signals with low data transmission rates for an inductively powered subretinal implant system is presented. Low data transmission rate leads to a long absence of inductive powering in the system when zeros are transmitted. Consequently there is no possibility to extract any clock in these pauses, thus the digital circuitry can not work any more. Compared to a commonly used PLL for clock extraction, no certain amount of data transitions is needed. This is achieved by having two operating modes. In one mode the GPLL tracks the HF input signal. In the other, the GPLL is an adjustable oscillator oscillating at the last used frequency. The proposed GPLL is fabricated and measured using a 350 nm High Voltage CMOS technology.

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

Efficient carrier-envelope offset frequency stabilization through gain modulation via stimulated emission.

PubMed

Karlen, Lauriane; Buchs, Gilles; Portuondo-Campa, Erwin; Lecomte, Steve

2016-01-15

A novel scheme for intracavity control of the carrier-envelope offset (CEO) frequency of a 100 MHz mode-locked Er:Yb:glass diode-pumped solid-state laser (DPSSL) based on the modulation of the laser gain via stimulated emission of the excited Er(3+) ions is demonstrated. This method allows us to bypass the ytterbium system few-kHz low-pass filter in the f(CEO) stabilization loop and thus to push the phase lock bandwidth up to a limit close to the relaxation oscillations frequency of the erbium system. A phase lock bandwidth above 70 kHz has been achieved with the fully stabilized laser, leading to an integrated phase noise [1 Hz-1 MHz] of 120 mrad.

Constant frequency pulsed phase-locked loop measuring device

NASA Technical Reports Server (NTRS)

Yost, William T. (Inventor); Kushnick, Peter W. (Inventor); Cantrell, John H. (Inventor)

1993-01-01

A measuring apparatus is presented that uses a fixed frequency oscillator to measure small changes in the phase velocity ultrasonic sound when a sample is exposed to environmental changes such as changes in pressure, temperature, etc. The invention automatically balances electrical phase shifts against the acoustical phase shifts in order to obtain an accurate measurement of electrical phase shifts.

Absolute distance measurement by dual-comb interferometry with multi-channel digital lock-in phase detection

NASA Astrophysics Data System (ADS)

Yang, Ruitao; Pollinger, Florian; Meiners-Hagen, Karl; Krystek, Michael; Tan, Jiubin; Bosse, Harald

2015-08-01

We present a dual-comb-based heterodyne multi-wavelength absolute interferometer capable of long distance measurements. The phase information of the various comb modes is extracted in parallel by a multi-channel digital lock-in phase detection scheme. Several synthetic wavelengths of the same order are constructed and the corresponding phases are averaged to deduce the absolute lengths with significantly reduced uncertainty. Comparison experiments with an incremental HeNe reference interferometer show a combined relative measurement uncertainty of 5.3 × 10-7 at a measurement distance of 20 m. Combining the advantage of synthetic wavelength interferometry and dual-comb interferometry, our compact and simple approach provides sufficient precision for many industrial applications.

Methods and apparatus for broadband frequency comb stabilization

DOEpatents

Cox, Jonathan A; Kaertner, Franz X

2015-03-17

Feedback loops can be used to shift and stabilize the carrier-envelope phase of a frequency comb from a mode-locked fibers laser or other optical source. Compared to other frequency shifting and stabilization techniques, feedback-based techniques provide a wideband closed-loop servo bandwidth without optical filtering, beam pointing errors, or group velocity dispersion. It also enables phase locking to a stable reference, such as a Ti:Sapphire laser, continuous-wave microwave or optical source, or self-referencing interferometer, e.g., to within 200 mrad rms from DC to 5 MHz. In addition, stabilized frequency combs can be coherently combined with other stable signals, including other stabilized frequency combs, to synthesize optical pulse trains with pulse durations of as little as a single optical cycle. Such a coherent combination can be achieved via orthogonal control, using balanced optical cross-correlation for timing stabilization and balanced homodyne detection for phase stabilization.

Hopf bifurcation and chaos in a third-order phase-locked loop

NASA Astrophysics Data System (ADS)

Piqueira, José Roberto C.

2017-01-01

Phase-locked loops (PLLs) are devices able to recover time signals in several engineering applications. The literature regarding their dynamical behavior is vast, specifically considering that the process of synchronization between the input signal, coming from a remote source, and the PLL local oscillation is robust. For high-frequency applications it is usual to increase the PLL order by increasing the order of the internal filter, for guarantying good transient responses; however local parameter variations imply structural instability, thus provoking a Hopf bifurcation and a route to chaos for the phase error. Here, one usual architecture for a third-order PLL is studied and a range of permitted parameters is derived, providing a rule of thumb for designers. Out of this range, a Hopf bifurcation appears and, by increasing parameters, the periodic solution originated by the Hopf bifurcation degenerates into a chaotic attractor, therefore, preventing synchronization.

Free-space laser communication technologies IV; Proceedings of the 4th Conference, Los Angeles, CA, Jan. 23, 24, 1992

NASA Technical Reports Server (NTRS)

Begley, David L. (Editor); Seery, Bernard D. (Editor)

1992-01-01

Papers included in this volume are grouped under topics of receivers; laser transmitters; components; system analysis, performance, and applications; and beam control (pointing, acquisition, and tracking). Papers are presented on an experimental determination of power penalty contributions in an optical Costas-type phase-locked loop receiver, a resonant laser receiver for free-space laser communications, a simple low-loss technique for frequency-locking lasers, direct phase modulation of laser diodes, and a silex beacon. Particular attention is given to experimental results on an optical array antenna for nonmechanical beam steering, a potassium Faraday anomalous dispersion optical filter, a 100-Mbps resonant cavity phase modulator for coherent optical communications, a numerical simulation of a 325-Mbit/s QPPM optical communication system, design options for an optical multiple-access data relay terminal, CCD-based optical tracking loop design trades, and an analysis of a spatial-tracking subsystem for optical communications.

Read-out electronics for DC squid magnetic measurements

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-01-01

Read-out electronics for DC SQUID sensor systems, the read-out electronics incorporating low Johnson noise radio-frequency flux-locked loop circuitry and digital signal processing algorithms in order to improve upon the prior art by a factor of at least ten, thereby alleviating problems caused by magnetic interference when operating DC SQUID sensor systems in magnetically unshielded environments.

Vector solitons with polarization instability and locked polarization in a fiber laser

NASA Astrophysics Data System (ADS)

Tang, Dingkang; Zhang, Jian-Guo; Liu, Yuanshan

2012-07-01

We investigate the characteristics of vector solitons with and without locked phase velocities of orthogonal polarization components in a specially-designed laser cavity which is formed by a bidirectional fiber loop together with a semiconductor saturable absorber mirror. The characteristics of the two states are compared in the temporal and spectrum domain, respectively. Both of the two states exhibit the characteristic of mode locking while the two orthogonal polarization components are not resolved. However, for the vector soliton with unlocked phase velocities, identical intensity varies after passing through a polarization beam splitter (PBS) outside the laser cavity. Contrary to the polarization rotation locked vector soliton, the intensity does not change periodically. For the polarization-locked vector soliton (PLVS), the identical pulse intensity is still obtained after passing through the PBS and can be observed on the oscilloscope screen after photodetection. A coupler instead of a circulator is integrated in the laser cavity and strong interaction on the polarization resolved spectra of the PLVS is observed. By comparing the two states, we conclude that interaction between the two orthogonal components contributes to the locked phase velocities.

Digital signal processing techniques for coherent optical communication

NASA Astrophysics Data System (ADS)

Goldfarb, Gilad

Coherent detection with subsequent digital signal processing (DSP) is developed, analyzed theoretically and numerically and experimentally demonstrated in various fiber-optic transmission scenarios. The use of DSP in conjunction with coherent detection unleashes the benefits of coherent detection which rely on the preservaton of full information of the incoming field. These benefits include high receiver sensitivity, the ability to achieve high spectral-efficiency and the use of advanced modulation formats. With the immense advancements in DSP speeds, many of the problems hindering the use of coherent detection in optical transmission systems have been eliminated. Most notably, DSP alleviates the need for hardware phase-locking and polarization tracking, which can now be achieved in the digital domain. The complexity previously associated with coherent detection is hence significantly diminished and coherent detection is once gain considered a feasible detection alternative. In this thesis, several aspects of coherent detection (with or without subsequent DSP) are addressed. Coherent detection is presented as a means to extend the dispersion limit of a duobinary signal using an analog decision-directed phase-lock loop. Analytical bit-error ratio estimation for quadrature phase-shift keying signals is derived. To validate the promise for high spectral efficiency, the orthogonal-wavelength-division multiplexing scheme is suggested. In this scheme the WDM channels are spaced at the symbol rate, thus achieving the spectral efficiency limit. Theory, simulation and experimental results demonstrate the feasibility of this approach. Infinite impulse response filtering is shown to be an efficient alternative to finite impulse response filtering for chromatic dispersion compensation. Theory, design considerations, simulation and experimental results relating to this topic are presented. Interaction between fiber dispersion and nonlinearity remains the last major challenge deterministic effects pose for long-haul optical data transmission. Experimental results which demonstrate the possibility to digitally mitigate both dispersion and nonlinearity are presented. Impairment compensation is achieved using backward propagation by implementing the split-step method. Efficient realizations of the dispersion compensation operator used in this implementation are considered. Infinite-impulse response and wavelet-based filtering are both investigated as a means to reduce the required computational load associated with signal backward-propagation. Possible future research directions conclude this dissertation.

A 4 GHz phase locked loop design in 65 nm CMOS for the Jiangmen Underground Neutrino Observatory detector

NASA Astrophysics Data System (ADS)

Parkalian, N.; Robens, M.; Grewing, C.; Christ, V.; Kruth, A.; Liebau, D.; Muralidharan, P.; Nielinger, D.; Roth, C.; Yegin, U.; Zambanini, A.; van Waasen, S.

2018-02-01

This paper presents a 4 GHz phase locked loop (PLL), which is implemented in a 65 nm standard CMOS process to provide low noise and high frequency sampling clocks for readout electronics to be used in the Jiangmen Underground Neutrino Observatory (JUNO) experiment. Based on the application requirements the target of the design is to find the best compromise between power consumption, area and phase noise for a highly reliable topology. The design implements a novel method for the charge pump that suppresses current mismatch when the PLL is locked. This reduces static phase offset at the inputs of the phase-frequency detector (PFD) that otherwise would introduce spurs at the PLL output. In addition, a technique of amplitude regulation for the voltage controlled oscillator (VCO) is presented to provide low noise and reliable operation. The combination of thin and thick oxide varactor transistors ensures optimum tuning range and linearity over process as well as temperature changes for the VCO without additional calibration steps. The current mismatch at the output of the charge pump for the control voltage at about half the 1 V supply voltage is below 0.3% and static phase offset down to 0.25% is reached. The total PLL consumes 18.5 mW power at 1.8 V supply for the VCO and 1 V supply for the other parts.

Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Arya, Sandeep K.; Pandey, Sujata

2012-03-01

Digital controlled oscillators (DCOs) are the core of all digital phase locked loop (ADPLL) circuits. Here, DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology. Three, four and five bit controlled DCO with NMOS, PMOS and NMOS & PMOS transistor switching networks are presented. A three-transistor XNOR gate has been used as the inverter which is used as the delay cell. Delay has been controlled digitally with a switch network of NMOS and PMOS transistors. The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591 μW. The four bit DCO with one NMOS network shows frequency variation of 1.6229-1.8868 GHz with varying power consumption of 251.9225-278.0740 μW. A six bit DCO with one NMOS switching network gave an output frequency of 1.7237-1.8962 GHz with power consumption of 251.928-278.998 μW. Output frequency and power consumption results for 4 & 6 bit DCO circuits with one PMOS and NMOS & PMOS switching network have also been presented. The phase noise parameter with an offset frequency of 1 MHz has also been reported for the proposed circuits. Comparisons with earlier reported circuits have been made and the present approach shows advantages over previous circuits.

A power scalable PLL frequency synthesizer for high-speed Δ—Σ ADC

NASA Astrophysics Data System (ADS)

Siyang, Han; Baoyong, Chi; Xinwang, Zhang; Zhihua, Wang

2014-08-01

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for Δ—Σ analog-to-digital converter (ADC) in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode (300-360 MHz) or in low-power mode (35-130 MHz) to satisfy the ADC's requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the frequency synthesizer achieves a phase-noise of -132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of -112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.

Optically Phase-Locked Electronic Speckle Pattern Interferometer (OPL-ESPI)

NASA Astrophysics Data System (ADS)

Moran, Steven E.; Law, Robert L.; Craig, Peter N.; Goldberg, Warren M.

1986-10-01

This report describes the design, theory, operation, and characteristics of the OPL-ESPI, which generates real time equal Doppler speckle contours of vibrating objects from unstable sensor platforms with a Doppler resolution of 30 Hz and a maximum tracking range of + or - 5 HMz. The optical phase locked loop compensates for the deleterious effects of ambient background vibration and provides the bases for a new ESPI video signal processing technique, which produces high contrast speckle contours. The OPL-ESPI system has local oscillator phase modulation capability, offering the potential for detection of vibrations with the amplitudes less than lambda/100.

Shot-noise-limited monitoring and phase locking of the motion of a single trapped ion.

PubMed

Bushev, P; Hétet, G; Slodička, L; Rotter, D; Wilson, M A; Schmidt-Kaler, F; Eschner, J; Blatt, R

2013-03-29

We perform a high-resolution real-time readout of the motion of a single trapped and laser-cooled Ba+ ion. By using an interferometric setup, we demonstrate a shot-noise-limited measurement of thermal oscillations with a resolution of 4 times the standard quantum limit. We apply the real-time monitoring for phase control of the ion motion through a feedback loop, suppressing the photon recoil-induced phase diffusion. Because of the spectral narrowing in the phase-locked mode, the coherent ion oscillation is measured with a resolution of about 0.3 times the standard quantum limit.

A novel photonic oscillator

NASA Technical Reports Server (NTRS)

Yao, X. S.; Maleki, L.

1995-01-01

We report a novel oscillator for photonic RF systems. This oscillator is capable of generating high-frequency signals up to 70 GHz in both electrical and optical domains and is a special voltage-controlled oscillator with an optical output port. It can be used to make a phase-locked loop (PLL) and perform all functions that a PLL is capable of for photonic systems. It can be synchronized to a reference source by means of optical injection locking, electrical injection locking, and PLL. It can also be self-phase locked and self-injection locked to generate a high-stability photonic RF reference. Its applications include high-frequency reference regeneration and distribution, high-gain frequency multiplication, comb-frequecy and square-wave generation, carrier recovery, and clock recovery. We anticipate that such photonic voltage-controlled oscillators (VCOs) will be as important to photonic RF systems as electrical VCOs are to electrical RF systems.

A reconfigurable cryogenic platform for the classical control of quantum processors

NASA Astrophysics Data System (ADS)

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

A reconfigurable cryogenic platform for the classical control of quantum processors.

PubMed

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

Improved PLL For FM Demodulator

NASA Technical Reports Server (NTRS)

Kirkham, Harold; Jackson, Shannon P.

1992-01-01

Phase-locked loop (PLL) for frequency demodulator contains improved frequency-to-voltage converter producing less ripple than conventional phase detector. In improved PLL, phase detector replaced by state estimator, implemented by ramp/sample-and-hold circuit. Intended to reduce noise in receiver of frequency-modulated (FM) telemetry link without sacrificing bandwidth. Also applicable to processing received FM signals.

An injection-locked OEO based frequency doubler independent of electrical doubler phase noise deteriorating rule

NASA Astrophysics Data System (ADS)

Xie, Zhengyang; Zheng, Xiaoping; Li, Shangyuan; Yan, Haozhe; Xiao, Xuedi; Xue, Xiaoxiao

2018-06-01

We propose an injection-locked optoelectronic oscillator (OEO) based wide-band frequency doubler, which is free from phase noise deterioration in electrical doubler, by using a dual-parallel Mach-Zehnder modulator (DPMZM). Through adjusting the optical phase shifts in different arms of the DPMZM, the doubling signal oscillates in the OEO loop while the fundamental signal takes on phase modulation over the light and vanishes at photo-detector (PD) output. By controlling power of fundamental signal the restriction of phase-noise deterioration rule in electrical doubler is totally canceled. Experimental results show that the doubler output has a better phase noise value of, for example, -117 dBc/Hz @ 10 kHz at 6 GHz with an improvement more than 17 dB and 23 dB compared with that of fundamental input and electrical doubler, respectively. Besides, the stability of this doubler output can reach to 1 . 5 × 10-14 at 1000 s averaging time. The frequency range of doubling signal is limited by the bandwidth of electrical amplifier in OEO loop.

Reduction of Phase Ambiguity in an Offset-QPSK Receiver

NASA Technical Reports Server (NTRS)

Berner, Jeff; Kinman, Peter

2004-01-01

Proposed modifications of an offset-quadri-phase-shift keying (offset-QPSK) transmitter and receiver would reduce the amount of signal processing that must be done in the receiver to resolve the QPSK fourfold phase ambiguity. Resolution of the phase ambiguity is necessary in order to synchronize, with the received carrier signal, the signal generated by a local oscillator in a carrier-tracking loop in the receiver. Without resolution of the fourfold phase ambiguity, the loop could lock to any of four possible phase points, only one of which has the proper phase relationship with the carrier. The proposal applies, more specifically, to an offset-QPSK receiver that contains a carrier-tracking loop like that shown in Figure 1. This carrier-tracking loop does not resolve or reduce the phase ambiguity. A carrier-tracking loop of a different design optimized for the reception of offset QPSK could reduce the phase ambiguity from fourfold to twofold, but would be more complex. Alternatively, one could resolve the fourfold phase ambiguity by use of differential coding in the transmitter, at a cost of reduced power efficiency. The proposed modifications would make it possible to reduce the fourfold phase ambiguity to twofold, with no loss in power efficiency and only relatively simple additional signal-processing steps in the transmitter and receiver. The twofold phase ambiguity would then be resolved by use of a unique synchronization word, as is commonly done in binary phase-shift keying (BPSK). Although the mathematical and signal-processing principles underlying the modifications are too complex to explain in detail here, the modifications themselves would be relatively simple and are best described with the help of simple block diagrams (see Figure 2). In the transmitter, one would add a unit that would periodically invert bits going into the QPSK modulator; in the receiver, one would add a unit that would effect different but corresponding inversions of bits coming out of the QPSK demodulator. The net effect of all the inversions would be that depending on which lock point the carrier-tracking loop had selected, all the output bits would be either inverted or non-inverted together; hence, the ambiguity would be reduced from fourfold to twofold, as desired.

Frequency multiplexed flux locked loop architecture providing an array of DC SQUIDS having both shared and unshared components

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-01-01

Architecture for frequency multiplexing multiple flux locked loops in a system comprising an array of DC SQUID sensors. The architecture involves dividing the traditional flux locked loop into multiple unshared components and a single shared component which, in operation, form a complete flux locked loop relative to each DC SQUID sensor. Each unshared flux locked loop component operates on a different flux modulation frequency. The architecture of the present invention allows a reduction from 2N to N+1 in the number of connections between the cryogenic DC SQUID sensors and their associated room temperature flux locked loops. Furthermore, the 1.times.N architecture of the present invention can be paralleled to form an M.times.N array architecture without increasing the required number of flux modulation frequencies.

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

NASA Pioneer: Venus reverse playback telemetry program TR 78-2

NASA Technical Reports Server (NTRS)

Modestino, J. W.; Daut, D. G.; Vickers, A. L.; Matis, K. R.

1978-01-01

During the entry of the Pioneer Venus Atmospheric Probes into the Venus atmosphere, there were several events (RF blackout and data rate changes) which caused the ground receiving equipment to lose lock on the signal. This caused periods of data loss immediately following each one of these disturbing events which lasted until all the ground receiving units (receiver, subcarrier demodulator, symbol synchronizer, and sequential decoder) acquired lock once more. A scheme to recover these data by off-line data processing was implemented. This scheme consisted of receiving the S band signals from the probes with an open loop reciever (requiring no lock up on the signal) in parallel with the closed loop receivers of the real time receiving equipment, down converting the signals to baseband, and recording them on an analog recorder. The off-line processing consisted of playing the analog recording in the reverse direction (starting with the end of the tape) up, converting the signal to S-band, feeding the signal into the "real time" receiving system and recording on digital tape, the soft decisions from the symbol synchronizer.

Phase-Locked Optical Generation of mmW/THz Signals

DTIC Science & Technology

2009-11-01

22 6.2. TIA (Trans-Impedance Amplifier ...24 6.3. Variable gain Amplifier ...loop architectures. Generate models including detector impulse response, feedback amplifier impulse response and laser current tuning response

Control System Damps Vibrations

NASA Technical Reports Server (NTRS)

Kopf, E. H., Jr.; Brown, T. K.; Marsh, E. L.

1983-01-01

New control system damps vibrations in rotating equipment with help of phase-locked-loop techniques. Vibrational modes are controlled by applying suitable currents to drive motor. Control signals are derived from sensors mounted on equipment.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seiya, K.; Drennan, C.; Pellico, W.

The extraction bucket position in the Fermilab Booster is controlled with a cogging process that involves the comparison of the Booster rf count and the Recycler Ring revolution marker. A one rf bucket jitter in the ex-traction bucket position results from the variability of the process that phase matches the Booster to the Recycler. However, the new slow phase lock process used to lock the frequency and phase of the Booster rf to the Recycler rf has been made digital and programmable and has been modified to correct the extraction notch position. The beam loss at the Recycler injection hasmore » been reduced by 20%. Beam studies and the phase lock system will be discussed in this paper.« less

A time-domain digitally controlled oscillator composed of a free running ring oscillator and flying-adder

NASA Astrophysics Data System (ADS)

Wei, Liu; Wei, Li; Peng, Ren; Qinglong, Lin; Shengdong, Zhang; Yangyuan, Wang

2009-09-01

A time-domain digitally controlled oscillator (DCO) is proposed. The DCO is composed of a free-running ring oscillator (FRO) and a two lap-selectors integrated flying-adder (FA). With a coiled cell array which allows uniform loading capacitances of the delay cells, the FRO produces 32 outputs with consistent tap spacing for the FA as reference clocks. The FA uses the outputs from the FRO to generate the output of the DCO according to the control number, resulting in a linear dependence of the output period, instead of the frequency on the digital controlling word input. Thus the proposed DCO ensures a good conversion linearity in a time-domain, and is suitable for time-domain all-digital phase locked loop applications. The DCO was implemented in a standard 0.13 μm digital logic CMOS process. The measurement results show that the DCO has a linear and monotonic tuning curve with gain variation of less than 10%, and a very low root mean square period jitter of 9.3 ps in the output clocks. The DCO works well at supply voltages ranging from 0.6 to 1.2 V, and consumes 4 mW of power with 500 MHz frequency output at 1.2 V supply voltage.

A clock steering method: using a third-order type 3 DPLL equivalent to a Kalman filter with a delay

NASA Astrophysics Data System (ADS)

Wu, Yiwei; Gong, Hang; Zhu, Xiangwei; Ou, Gang

2015-12-01

In this paper we propose a new clock steering method, which uses a third-order type 3 digital phase locked loop (DPLL) which is equivalent to a Kalman filter with a delay. A general overview of the theoretical framework is described in detail including the transfer functions, the structure and control values, the specifications, and the approach to choosing a parameter. Simulations show that the performance of the time and frequency steering errors and the frequency stability are quite desirable. Comparing with traditional clock steering methods, it is easier to work with just one parameter. The DPLL method satisfies the requirements of generating a local representation of universal time coordinated and the system time of a global navigation satellite system.

The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

NASA Astrophysics Data System (ADS)

Fu, Y.; Brezina, C.; Desch, K.; Poikela, T.; Llopart, X.; Campbell, M.; Massimiliano, D.; Gromov, V.; Kluit, R.; van Beauzekom, M.; Zappon, F.; Zivkovic, V.

2014-01-01

Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256 × 256 pixels organized in a square pixel-array with 55 μm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

A demonstration of the value of spacecraft computers

NASA Astrophysics Data System (ADS)

Jenkins, R. E.

1984-09-01

The Transit Improvement Program TIP satellites were designed to upgrade the navigation satellite system. One of the improvements made in connection with these satellites is related to the employment of a general-purpose minicomputer. A description is provided of the uses of the TIP/Nova flight computer to overcome some early failures in the spacecraft development which, although later corrected, could have jeopardized the entire program. The flight computer and its software is discussed, taking into account the delayed command program, and the telemetry storage program. The effect of the failures is considered along with the post-launch operations. Attention is given to power management, spin-up operations, the firing of the orbit adjust rocket, the tumble-thrust program, a digital phase-locked loop for de-tumble, and the generation of a tumble motion.

A New Tool for Industry

NASA Technical Reports Server (NTRS)

1981-01-01

Ultrasonic P2L2 bolt monitor is a new industrial tool, developed at Langley Research Laboratory, which is lightweight, portable, extremely accurate because it is not subject to friction error, and it is cost-competitive with the least expensive of other types of accurate strain monitors. P2L2 is an acronym for Pulse Phase Locked Loop. The ultrasound system which measures the stress that occurs when a bolt becomes elongated in the process of tightening, transmits sound waves to the bolt being fastened and receives a return signal indicating changes in bolt stress. Results are translated into a digital reading of the actual stress on the bolt. Device monitors the bolt tensioning process on mine roof bolts that provide increased safety within the mine. Also has utility in industrial applications.

Stabilization of self-mode-locked quantum dash lasers by symmetric dual-loop optical feedback

NASA Astrophysics Data System (ADS)

Asghar, Haroon; Wei, Wei; Kumar, Pramod; Sooudi, Ehsan; McInerney, John. G.

2018-02-01

We report experimental studies of the influence of symmetric dual-loop optical feedback on the RF linewidth and timing jitter of self-mode-locked two-section quantum dash lasers emitting at 1550 nm. Various feedback schemes were investigated and optimum levels determined for narrowest RF linewidth and low timing jitter, for single-loop and symmetric dual-loop feedback. Two symmetric dual-loop configurations, with balanced and unbalanced feedback ratios, were studied. We demonstrate that unbalanced symmetric dual loop feedback, with the inner cavity resonant and fine delay tuning of the outer loop, gives narrowest RF linewidth and reduced timing jitter over a wide range of delay, unlike single and balanced symmetric dual-loop configurations. This configuration with feedback lengths 80 and 140 m narrows the RF linewidth by 4-67x and 10-100x, respectively, across the widest delay range, compared to free-running. For symmetric dual-loop feedback, the influence of different power split ratios through the feedback loops was determined. Our results show that symmetric dual-loop feedback is markedly more effective than single-loop feedback in reducing RF linewidth and timing jitter, and is much less sensitive to delay phase, making this technique ideal for applications where robustness and alignment tolerance are essential.

A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications.

PubMed

Qi Zhang; Peng Feng; Zhiqing Geng; Xiaozhou Yan; Nanjian Wu

2011-02-01

A 2.4-GHz energy-efficient transmitter (TX) for wireless medical applications is presented in this paper. It consists of four blocks: a phase-locked loop (PLL) synthesizer with a direct frequency presetting technique, a class-B power amplifier, a digital processor, and nonvolatile memory (NVM). The frequency presetting technique can accurately preset the carrier frequency of the voltage-controlled oscillator and reduce the lock-in time of the PLL synthesizer, further increasing the data rate of communication with low power consumption. The digital processor automatically compensates preset frequency variation with process, voltage, and temperature. The NVM stores the presetting signals and calibration data so that the TX can avoid the repetitive calibration process and save the energy in practical applications. The design is implemented in 0.18- μm radio-frequency complementary metal-oxide semiconductor process and the active area is 1.3 mm (2). The TX achieves 0-dBm output power with a maximum data rate of 4 Mb/s/2 Mb/s and dissipates 2.7-mA/5.4-mA current from a 1.8-V power supply for on-off keying/frequency-shift keying modulation, respectively. The corresponding energy efficiency is 1.2 nJ/b·mW and 4.8 nJ/b· mW when normalized to the transmitting power.

A compact ADPLL based on symmetrical binary frequency searching with the same circuit

NASA Astrophysics Data System (ADS)

Li, Hangbiao; Zhang, Bo; Luo, Ping; Liao, Pengfei; Liu, Junjie; Li, Zhaoji

2015-03-01

A compact all-digital phase-locked loop (C-ADPLL) based on symmetrical binary frequency searching (BFS) with the same circuit is presented in this paper. The minimising relative frequency variation error Δη (MFE) rule is derived as guidance of design and is used to weigh the accuracy of the digitally controlled oscillator (DCO) clock frequency. The symmetrical BFS is used in the coarse-tuning process and the fine-tuning process of DCO clock frequency to achieve the minimum Δη of the locked DCO clock, which simplifies the circuit architecture and saves the die area. The C-ADPLL is implemented in a 0.13 μm one-poly-eight-metal (1P8M) CMOS process and the on-chip area is only 0.043 mm2, which is much smaller. The measurement results show that the peak-to-peak (Pk-Pk) jitter and the root-mean-square jitter of the DCO clock frequency are 270 ps at 72.3 MHz and 42 ps at 79.4 MHz, respectively, while the power consumption of the proposed ADPLL is only 2.7 mW (at 115.8 MHz) with a 1.2 V power supply. The measured Δη is not more than 1.14%. Compared with other ADPLLs, the proposed C-ADPLL has simpler architecture, smaller size and lower Pk-Pk jitter.

A Phase-Locked Loop Epilepsy Network Emulator

PubMed Central

Watson, P.D.; Horecka, K. M.; Cohen, N.J.; Ratnam, R.

2015-01-01

Most seizure forecasting employs statistical learning techniques that lack a representation of the network interactions that give rise to seizures. We present an epilepsy network emulator (ENE) that uses a network of interconnected phase-locked loops (PLLs) to model synchronous, circuit-level oscillations between electrocorticography (ECoG) electrodes. Using ECoG data from a canine-epilepsy model (Davis et al. 2011) and a physiological entropy measure (approximate entropy or ApEn, Pincus 1995), we demonstrate the entropy of the emulator phases increases dramatically during ictal periods across all ECoG recording sites and across all animals in the sample. Further, this increase precedes the observable voltage spikes that characterize seizure activity in the ECoG data. These results suggest that the ENE is sensitive to phase-domain information in the neural circuits measured by ECoG and that an increase in the entropy of this measure coincides with increasing likelihood of seizure activity. Understanding this unpredictable phase-domain electrical activity present in ECoG recordings may provide a target for seizure detection and feedback control. PMID:26664133

Coherent Optical Adaptive Techniques (COAT)

DTIC Science & Technology

1975-01-01

8217 neceeemry and Identity by block number) Laser Phased Array Adaptive Optics Atmospheric-Turbulence and Thermal Blooming Compensation 20...characteristics of an experimental, visible wavelength, eighteen-element, self-adaptive optical phased array. Measurements on a well-characterized...V LOCAL PHASING ■ LOOP OPTICAL DETECTOR’ LOCAL LOCK / ROOF TOP "^/PROPAGATION’ ^ GLINT ■lm FOCAL LENGTH LENS DETECTOR DMWI rh

Apparatus and Method to Enable Precision and Fast Laser Frequency Tuning

NASA Technical Reports Server (NTRS)

Chen, Jeffrey R. (Inventor); Numata, Kenji (Inventor); Wu, Stewart T. (Inventor); Yang, Guangning (Inventor)

2015-01-01

An apparatus and method is provided to enable precision and fast laser frequency tuning. For instance, a fast tunable slave laser may be dynamically offset-locked to a reference laser line using an optical phase-locked loop. The slave laser is heterodyned against a reference laser line to generate a beatnote that is subsequently frequency divided. The phase difference between the divided beatnote and a reference signal may be detected to generate an error signal proportional to the phase difference. The error signal is converted into appropriate feedback signals to phase lock the divided beatnote to the reference signal. The slave laser frequency target may be rapidly changed based on a combination of a dynamically changing frequency of the reference signal, the frequency dividing factor, and an effective polarity of the error signal. Feed-forward signals may be generated to accelerate the slave laser frequency switching through laser tuning ports.

Optical phase-locked loop (OPLL) for free-space laser communications with heterodyne detection

NASA Technical Reports Server (NTRS)

Win, Moe Z.; Chen, Chien-Chung; Scholtz, Robert A.

1991-01-01

Several advantages of coherent free-space optical communications are outlined. Theoretical analysis is formulated for an OPLL disturbed by shot noise, modulation noise, and frequency noise consisting of a white component, a 1/f component, and a 1/f-squared component. Each of the noise components is characterized by its associated power spectral density. It is shown that the effect of modulation depends only on the ratio of loop bandwidth and data rate, and is negligible for an OPLL with loop bandwidth smaller than one fourth the data rate. Total phase error variance as a function of loop bandwidth is displayed for several values of carrier signal to noise ratio. Optimal loop bandwidth is also calculated as a function of carrier signal to noise ratio. An OPLL experiment is performed, where it is shown that the measured phase error variance closely matches the theoretical predictions.

Fiber-optic projected-fringe digital interferometry

NASA Technical Reports Server (NTRS)

Mercer, Carolyn R.; Beheim, Glenn

1990-01-01

A phase-stepped projected-fringe interferometer was developed which uses a closed-loop fiber-optic phase-control system to make very accurate surface profile measurements. The closed-loop phase-control system greatly reduces phase-stepping error, which is frequently the dominant source of error in digital interferometers. Two beams emitted from a fiber-optic coupler are combined to form an interference fringe pattern on a diffusely reflecting object. Reflections off of the fibers' output faces are used to create a phase-indicating signal for the closed-loop optical phase controller. The controller steps the phase difference between the two beams by pi/2 radians in order to determine the object's surface profile using a solid-state camera and a computer. The system combines the ease of alignment and automated data reduction of phase-stepping projected-fringe interferometry with the greatly improved phase-stepping accuracy of our closed-loop phase-controller. The system is demonstrated by measuring the profile of a plate containing several convex surfaces whose heights range from 15 to 25 micron high.

A novel method to optimize the mode spectrum of the dynamic resonant magnetic perturbation on the J-TEXT tokamak.

PubMed

Yi, B; Rao, B; Ding, Y H; Li, M; Xu, H Y; Zhang, M; Zhuang, G; Pan, Y

2014-11-01

The dynamic resonant magnetic perturbation (DRMP) system has been developed for the J-TEXT tokamak to study the interaction between the rotating perturbation magnetic field and the plasma. When the DRMP coils are energized by two phase sinusoidal currents with the same frequency, a 2/1 rotating resonant magnetic perturbation component will be generated. But at the same time, a small perturbation component rotating in the opposite direction is also produced because of the control error of the currents. This small component has bad influence on the experiment investigations. Actually, the mode spectrum of the generated DRMP can be optimized with an accurate control of phase difference between the two currents. In this paper, a new phase control method based on a novel all-digital phase-locked loop (ADPLL) is proposed. The proposed method features accurate phase control and flexible phase adjustment. Modeling and analysis of the proposed ADPLL is presented to guide the design of the parameters of the phase controller in order to obtain a better performance. Testing results verify the effectiveness of the ADPLL and validity of the method applying to the DRMP system.

A novel method to optimize the mode spectrum of the dynamic resonant magnetic perturbation on the J-TEXT tokamak

NASA Astrophysics Data System (ADS)

Yi, B.; Rao, B.; Ding, Y. H.; Li, M.; Xu, H. Y.; Zhang, M.; Zhuang, G.; Pan, Y.

2014-11-01

The dynamic resonant magnetic perturbation (DRMP) system has been developed for the J-TEXT tokamak to study the interaction between the rotating perturbation magnetic field and the plasma. When the DRMP coils are energized by two phase sinusoidal currents with the same frequency, a 2/1 rotating resonant magnetic perturbation component will be generated. But at the same time, a small perturbation component rotating in the opposite direction is also produced because of the control error of the currents. This small component has bad influence on the experiment investigations. Actually, the mode spectrum of the generated DRMP can be optimized with an accurate control of phase difference between the two currents. In this paper, a new phase control method based on a novel all-digital phase-locked loop (ADPLL) is proposed. The proposed method features accurate phase control and flexible phase adjustment. Modeling and analysis of the proposed ADPLL is presented to guide the design of the parameters of the phase controller in order to obtain a better performance. Testing results verify the effectiveness of the ADPLL and validity of the method applying to the DRMP system.

A monolithic K-band phase-locked loop for microwave radar application

NASA Astrophysics Data System (ADS)

Zhou, Guangyao; Ma, Shunli; Li, Ning; Ye, Fan; Ren, Junyan

2017-02-01

A monolithic K-band phase-locked loop (PLL) for microwave radar application is proposed and implemented in this paper. By eliminating the tail transistor and using optimized high-Q LC-tank, the proposed voltage-controlled oscillator (VCO) achieves a tuning range of 18.4 to 23.3 GHz and reduced phase noise. Two cascaded current-mode logic (CML) divide-by-two frequency prescalers are implemented to bridge the frequency gap, in which inductor peaking technique is used in the first stage to further boost allowable input frequency. Six-stage TSPC divider chain is used to provide programmable division ratio from 64 to 127, and a second-order passive loop filter with 825 kHz bandwidth is also integrated on-chip to minimize required external components. The proposed PLL needs only approximately 18.2 μs settling time, and achieves a wide tuning range from 18.4 to 23.3 GHz, with a typical output power of ‑0.84 dBm and phase noise of ‑91.92 dBc/Hz @ 1 MHz. The chip is implemented in TSMC 65 nm CMOS process, and occupies an area of 0.56 mm2 without pads under a 1.2 V single voltage supply. Project supported by the National High-Tech Research and Development Program of China (No. 2013AA014101).

Wide-band doubler and sine wave quadrature generator

NASA Technical Reports Server (NTRS)

Crow, R. B.

1969-01-01

Phase-locked loop with photoresistive control, which provides both sine and cosine outputs for subcarrier demodulation, serves as a telemetry demodulator signal conditioner with a second harmonic signal for synchronization with the locally generated code.

The Block V Receiver fast acquisition algorithm for the Galileo S-band mission

NASA Technical Reports Server (NTRS)

Aung, M.; Hurd, W. J.; Buu, C. M.; Berner, J. B.; Stephens, S. A.; Gevargiz, J. M.

1994-01-01

A fast acquisition algorithm for the Galileo suppressed carrier, subcarrier, and data symbol signals under low data rate, signal-to-noise ratio (SNR) and high carrier phase-noise conditions has been developed. The algorithm employs a two-arm fast Fourier transform (FFT) method utilizing both the in-phase and quadrature-phase channels of the carrier. The use of both channels results in an improved SNR in the FFT acquisition, enabling the use of a shorter FFT period over which the carrier instability is expected to be less significant. The use of a two-arm FFT also enables subcarrier and symbol acquisition before carrier acquisition. With the subcarrier and symbol loops locked first, the carrier can be acquired from an even shorter FFT period. Two-arm tracking loops are employed to lock the subcarrier and symbol loops parameter modification to achieve the final (high) loop SNR in the shortest time possible. The fast acquisition algorithm is implemented in the Block V Receiver (BVR). This article describes the complete algorithm design, the extensive computer simulation work done for verification of the design and the analysis, implementation issues in the BVR, and the acquisition times of the algorithm. In the expected case of the Galileo spacecraft at Jupiter orbit insertion PD/No equals 14.6 dB-Hz, R(sym) equals 16 symbols per sec, and the predicted acquisition time of the algorithm (to attain a 0.2-dB degradation from each loop to the output symbol SNR) is 38 sec.

Interferometric phase measurement techniques for coherent beam combining

NASA Astrophysics Data System (ADS)

Antier, Marie; Bourderionnet, Jérôme; Larat, Christian; Lallier, Eric; Primot, Jérôme; Brignon, Arnaud

2015-03-01

Coherent beam combining of fiber amplifiers provides an attractive mean of reaching high power laser. In an interferometric phase measurement the beams issued for each fiber combined are imaged onto a sensor and interfere with a reference plane wave. This registration of interference patterns on a camera allows the measurement of the exact phase error of each fiber beam in a single shot. Therefore, this method is a promising candidate toward very large number of combined fibers. Based on this technique, several architectures can be proposed to coherently combine a high number of fibers. The first one based on digital holography transfers directly the image of the camera to spatial light modulator (SLM). The generated hologram is used to compensate the phase errors induced by the amplifiers. This architecture has therefore a collective phase measurement and correction. Unlike previous digital holography technique, the probe beams measuring the phase errors between the fibers are co-propagating with the phase-locked signal beams. This architecture is compatible with the use of multi-stage isolated amplifying fibers. In that case, only 20 pixels per fiber on the SLM are needed to obtain a residual phase shift error below λ/10rms. The second proposed architecture calculates the correction applied to each fiber channel by tracking the relative position of the interference finges. In this case, a phase modulator is placed on each channel. In that configuration, only 8 pixels per fiber on the camera is required for a stable close loop operation with a residual phase error of λ/20rms, which demonstrates the scalability of this concept.

A closed-loop system for frequency tracking of piezoresistive cantilever sensors

NASA Astrophysics Data System (ADS)

Wasisto, Hutomo Suryo; Zhang, Qing; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

2013-05-01

A closed loop circuit capable of tracking resonant frequencies for MEMS-based piezoresistive cantilever resonators is developed in this work. The proposed closed-loop system is mainly based on a phase locked loop (PLL) circuit. In order to lock onto the resonant frequency of the resonator, an actuation signal generated from a voltage-controlled oscillator (VCO) is locked to the phase of the input reference signal of the cantilever sensor. In addition to the PLL component, an instrumentation amplifier and an active low pass filter (LPF) are connected to the system for gaining the amplitude and reducing the noise of the cantilever output signals. The LPF can transform a rectangular signal into a sinusoidal signal with voltage amplitudes ranging from 5 to 10 V which are sufficient for a piezoactuator input (i.e., maintaining a large output signal of the cantilever sensor). To demonstrate the functionality of the system, a self-sensing silicon cantilever resonator with a built-in piezoresistive Wheatstone bridge is fabricated and integrated with the circuit. A piezoactuator is utilized for actuating the cantilever into resonance. Implementation of this closed loop system is used to track the resonant frequency of a silicon cantilever-based sensor resonating at 9.4 kHz under a cross-sensitivity test of ambient temperature. The changes of the resonant frequency are interpreted using a frequency counter connected to the system. From the experimental results, the temperature sensitivity and coefficient of the employed sensor are 0.3 Hz/°C and 32.8 ppm/°C, respectively. The frequency stability of the system can reach up to 0.08 Hz. The development of this system will enable real-time nanoparticle monitoring systems and provide a miniaturization of the instrumentation modules for cantilever-based nanoparticle detectors.

Compact silicon photonics-based multi laser module for sensing

NASA Astrophysics Data System (ADS)

Ayotte, S.; Costin, F.; Babin, A.; Paré-Olivier, G.; Morin, M.; Filion, B.; Bédard, K.; Chrétien, P.; Bilodeau, G.; Girard-Deschênes, E.; Perron, L.-P.; Davidson, C.-A.; D'Amato, D.; Laplante, M.; Blanchet-Létourneau, J.

2018-02-01

A compact three-laser source for optical sensing is presented. It is based on a low-noise implementation of the Pound Drever-Hall method and comprises high-bandwidth optical phase-locked loops. The outputs from three semiconductor distributed feedback lasers, mounted on thermo-electric coolers (TEC), are coupled with micro-lenses into a silicon photonics (SiP) chip that performs beat note detection and several other functions. The chip comprises phase modulators, variable optical attenuators, multi-mode-interference couplers, variable ratio tap couplers, integrated photodiodes and optical fiber butt-couplers. Electrical connections between a metallized ceramic and the TECs, lasers and SiP chip are achieved by wirebonds. All these components stand within a 35 mm by 35 mm package which is interfaced with 90 electrical pins and two fiber pigtails. One pigtail carries the signals from a master and slave lasers, while another carries that from a second slave laser. The pins are soldered to a printed circuit board featuring a micro-processor that controls and monitors the system to ensure stable operation over fluctuating environmental conditions. This highly adaptable multi-laser source can address various sensing applications requiring the tracking of up to three narrow spectral features with a high bandwidth. It is used to sense a fiber-based ring resonator emulating a resonant fiber optics gyroscope. The master laser is locked to the resonator with a loop bandwidth greater than 1 MHz. The slave lasers are offset frequency locked to the master laser with loop bandwidths greater than 100 MHz. This high performance source is compact, automated, robust, and remains locked for days.

Optical injection locking-based amplification in phase-coherent transfer of optical frequencies.

PubMed

Kim, Joonyoung; Schnatz, Harald; Wu, David S; Marra, Giuseppe; Richardson, David J; Slavík, Radan

2015-09-15

We demonstrate the use of an optical injection phase locked loop (OIPLL) as a regenerative amplifier for optical frequency transfer applications. The optical injection locking provides high gain within a narrow bandwidth (<100  MHz) and is capable of preserving the fractional frequency stability of the incoming carrier to better than 10(-18) at 1000 s. The OIPLL was tested in the field as a mid-span amplifier for the transfer of an ultrastable optical carrier, stabilized to an optical frequency standard, over a 292 km long installed dark fiber link. The transferred frequency at the remote end reached a fractional frequency instability of less than 1×10(-19) at averaging time of 3200 s.

Frequency stabilization of an Er-doped fiber laser with a collinear 2f-to-3f self-referencing interferometer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hitachi, K., E-mail: hitachi.kenichi@lab.ntt.co.jp; Ishizawa, A.; Mashiko, H.

2015-06-08

We report the stabilization of the carrier-envelope offset (CEO) frequency of an Er-doped fiber laser with a collinear 2f-to-3f self-referencing interferometer. The interferometer is implemented by a dual-pitch periodically poled lithium niobate ridge waveguide with two different quasi-phase matching pitch sizes. We obtain a 52-dB signal-to-noise ratio in the 100-kHz resolution bandwidth of a heterodyne beat signal, which is sufficient for frequency stabilization. We also demonstrate that the collinear geometry is robust against environmental perturbation by comparing in-loop and out-of-loop Allan deviations when the in-loop CEO frequency is stabilized with a phase-locked loop circuit.

Pulsed phase locked loop strain monitor

NASA Technical Reports Server (NTRS)

Froggatt, Mark E. (Inventor)

1995-01-01

A pulse phase locked loop system according to the present invention is described. A frequency generator such as a voltage controlled oscillator (VCO) generates an output signal and a reference signal having a frequency equal to that of the output signal. A transmitting gate gates the output frequency signal and this gated signal drives a transmitting transducer which transmits an acoustic wave through a material. A sample/hold samples a signal indicative of the transmitted wave which is received by a receiving transducer. Divide-by-n counters control these gating and sampling functions in response to the reference signal of the frequency generator. Specifically, the output signal is gated at a rate of F/h, wherein F is the frequency of the output signal and h is an integer; and the received signal is sampled at a delay of F/n wherein n is an integer.

Fast Offset Laser Phase-Locking System

NASA Technical Reports Server (NTRS)

Shaddock, Daniel; Ware, Brent

2008-01-01

Figure 1 shows a simplified block diagram of an improved optoelectronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications. The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in High-Accuracy, High-Dynamic-Range Phase-Measurement System (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output. The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode-output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.

Microcontroller-based locking in optics experiments.

PubMed

Huang, K; Le Jeannic, H; Ruaudel, J; Morin, O; Laurat, J

2014-12-01

Optics experiments critically require the stable and accurate locking of relative phases between light beams or the stabilization of Fabry-Perot cavity lengths. Here, we present a simple and inexpensive technique based on a stand-alone microcontroller unit to perform such tasks. Easily programmed in C language, this reconfigurable digital locking system also enables automatic relocking and sequential functioning. Different algorithms are detailed and applied to fringe locking and to low- and high-finesse optical cavity stabilization, without the need of external modulations or error signals. This technique can readily replace a number of analog locking systems advantageously in a variety of optical experiments.

Analysis and experimental demonstration of conformal adaptive phase-locked fiber array for laser communications and beam projection applications

NASA Astrophysics Data System (ADS)

Liu, Ling

The primary goal of this research is the analysis, development, and experimental demonstration of an adaptive phase-locked fiber array system for free-space optical communications and laser beam projection applications. To our knowledge, the developed adaptive phase-locked system composed of three fiber collimators (subapertures) with tip-tilt wavefront phase control at each subaperture represents the first reported fiber array system that implements both phase-locking control and adaptive wavefront tip-tilt control capabilities. This research has also resulted in the following innovations: (a) The first experimental demonstration of a phase-locked fiber array with tip-tilt wave-front aberration compensation at each fiber collimator; (b) Development and demonstration of the fastest currently reported stochastic parallel gradient descent (SPGD) system capable of operation at 180,000 iterations per second; (c) The first experimental demonstration of a laser communication link based on a phase-locked fiber array; (d) The first successful experimental demonstration of turbulence and jitter-induced phase distortion compensation in a phase-locked fiber array optical system; (e) The first demonstration of laser beam projection onto an extended target with a randomly rough surface using a conformal adaptive fiber array system. Fiber array optical systems, the subject of this study, can overcome some of the draw-backs of conventional monolithic large-aperture transmitter/receiver optical systems that are usually heavy, bulky, and expensive. The primary experimental challenges in the development of the adaptive phased-locked fiber-array included precise (<5 microrad) alignment of the fiber collimators and development of fast (100kHz-class) phase-locking and wavefront tip-tilt control systems. The precise alignment of the fiber collimator array is achieved through a specially developed initial coarse alignment tool based on high precision piezoelectric picomotors and a dynamic fine alignment mechanism implemented with specially designed and manufactured piezoelectric fiber positioners. Phase-locking of the fiber collimators is performed by controlling the phases of the output beams (beamlets) using integrated polarization-maintaining (PM) fiber-coupled LiNbO3 phase shifters. The developed phase-locking controllers are based on either the SPGD algorithm or the multi-dithering technique. Subaperture wavefront phase tip-tilt control is realized using piezoelectric fiber positioners that are controlled using a computer-based SPGD controller. Both coherent (phase-locked) and incoherent beam combining in the fiber array system are analyzed theoretically and experimentally. Two special fiber-based beam-combining testbeds have been built to demonstrate the technical feasibility of phase-locking compensation prior to free-space operation. In addition, the reciprocity of counter-propagating beams in a phase-locked fiber array system has been investigated. Coherent beam combining in a phase-locking system with wavefront phase tip-tilt compensation at each subaperture is successfully demonstrated when laboratory-simulated turbulence and wavefront jitters are present in the propagation path of the beamlets. In addition, coherent beam combining with a non-cooperative extended target in the control loop is successfully demonstrated.

Resonant fiber optic gyro based on a sinusoidal wave modulation and square wave demodulation technique.

PubMed

Wang, Linglan; Yan, Yuchao; Ma, Huilian; Jin, Zhonghe

2016-04-20

New developments are made in the resonant fiber optic gyro (RFOG), which is an optical sensor for the measurement of rotation rate. The digital signal processing system based on the phase modulation technique is capable of detecting the weak frequency difference induced by the Sagnac effect and suppressing the reciprocal noise in the circuit, which determines the detection sensitivity of the RFOG. A new technique based on the sinusoidal wave modulation and square wave demodulation is implemented, and the demodulation curve of the system is simulated and measured. Compared with the past technique using sinusoidal modulation and demodulation, it increases the slope of the demodulation curve by a factor of 1.56, improves the spectrum efficiency of the modulated signal, and reduces the occupancy of the field-programmable gate array resource. On the basis of this new phase modulation technique, the loop is successfully locked and achieves a short-term bias stability of 1.08°/h, which is improved by a factor of 1.47.

On-Wafer Measurement of a Silicon-Based CMOS VCO at 324 GHz

NASA Technical Reports Server (NTRS)

Samoska, Lorene; Man Fung, King; Gaier, Todd; Huang, Daquan; Larocca, Tim; Chang, M. F.; Campbell, Richard; Andrews, Michael

2008-01-01

The world s first silicon-based complementary metal oxide/semiconductor (CMOS) integrated-circuit voltage-controlled oscillator (VCO) operating in a frequency range around 324 GHz has been built and tested. Concomitantly, equipment for measuring the performance of this oscillator has been built and tested. These accomplishments are intermediate steps in a continuing effort to develop low-power-consumption, low-phase-noise, electronically tunable signal generators as local oscillators for heterodyne receivers in submillimeter-wavelength (frequency > 300 GHz) scientific instruments and imaging systems. Submillimeter-wavelength imaging systems are of special interest for military and law-enforcement use because they could, potentially, be used to detect weapons hidden behind clothing and other opaque dielectric materials. In comparison with prior submillimeter- wavelength signal generators, CMOS VCOs offer significant potential advantages, including great reductions in power consumption, mass, size, and complexity. In addition, there is potential for on-chip integration of CMOS VCOs with other CMOS integrated circuitry, including phase-lock loops, analog- to-digital converters, and advanced microprocessors.

[Absorption spectrum of Quasi-continuous laser modulation demodulation method].

PubMed

Shao, Xin; Liu, Fu-Gui; Du, Zhen-Hui; Wang, Wei

2014-05-01

A software phase-locked amplifier demodulation method is proposed in order to demodulate the second harmonic (2f) signal of quasi-continuous laser wavelength modulation spectroscopy (WMS) properly, based on the analysis of its signal characteristics. By judging the effectiveness of the measurement data, filter, phase-sensitive detection, digital filtering and other processing, the method can achieve the sensitive detection of quasi-continuous signal The method was verified by using carbon dioxide detection experiments. The WMS-2f signal obtained by the software phase-locked amplifier and the high-performance phase-locked amplifier (SR844) were compared simultaneously. The results show that the Allan variance of WMS-2f signal demodulated by the software phase-locked amplifier is one order of magnitude smaller than that demodulated by SR844, corresponding two order of magnitude lower of detection limit. And it is able to solve the unlocked problem caused by the small duty cycle of quasi-continuous modulation signal, with a small signal waveform distortion.

Radiation hard programmable delay line for LHCb calorimeter upgrade

NASA Astrophysics Data System (ADS)

Mauricio, J.; Gascón, D.; Vilasís, X.; Picatoste, E.; Machefert, F.; Lefrancois, J.; Duarte, O.; Beigbeder, C.

2014-01-01

This paper describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with less than 5 ps jitter and 23 ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter front-end analog signal processing ASIC in the near future. The stringent noise requirements on the ASIC imply minimizing the noise contribution of digital components. This is accomplished by implementing the DLL in differential mode. To achieve the required radiation tolerance several techniques are applied: double guard rings between PMOS and NMOS transistors as well as glitch suppressors and TMR Registers. This 5.7 mm2 chip has been implemented in CMOS 0.35 μm technology.

Adaptive adjustment of reference constellation for demodulating 16QAM signal with intrinsic distortion due to imperfect modulation.

PubMed

Inoue, Takashi; Namiki, Shu

2013-12-02

We find that an adaptive equalizer and a phase-locked loop operating with decision-directed mode exhibit degraded performances when they are used in a digital coherent receiver to demodulate a 16QAM signal with intrinsically distorted constellation, and that the degradation is more significant for the dual-polarization case. We then propose a scheme to correctly demodulate such a distorted 16QAM signal, where the reference constellation and the threshold for the decision are adaptively adjusted such that they fit to the distorted ones. We experimentally confirm the improved performance of the proposed scheme over the conventional one for single-and dual-polarization 16QAM signals with distortion. We also investigate the applicable range of the proposed scheme for the degree of distortion of the signal.

Radio-Frequency and Wideband Modulation Arraying

NASA Technical Reports Server (NTRS)

Brockman, M. H.

1984-01-01

Summing network receives coherent signals from all receivers in array. Method sums narrow-band radio-frequency (RF) carrier powers and wide-band spectrum powers of array of separate antenna/receiver systems designed for phase-locked-loop or suppressed-carrier operation.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope.

PubMed

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-04-20

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments.

Dynamic tracking down-conversion signal processing method based on reference signal for grating heterodyne interferometer

NASA Astrophysics Data System (ADS)

Wang, Guochao; Yan, Shuhua; Zhou, Weihong; Gu, Chenhui

2012-08-01

Traditional displacement measurement systems by grating, which purely make use of fringe intensity to implement fringe count and subdivision, have rigid demands for signal quality and measurement condition, so they are not easy to realize measurement with nanometer precision. Displacement measurement with the dual-wavelength and single-grating design takes advantage of the single grating diffraction theory and the heterodyne interference theory, solving quite well the contradiction between large range and high precision in grating displacement measurement. To obtain nanometer resolution and nanometer precision, high-power subdivision of interference fringes must be realized accurately. A dynamic tracking down-conversion signal processing method based on the reference signal is proposed. Accordingly, a digital phase measurement module to realize high-power subdivision on field programmable gate array (FPGA) was designed, as well as a dynamic tracking down-conversion module using phase-locked loop (PLL). Experiments validated that a carrier signal after down-conversion can constantly maintain close to 100 kHz, and the phase-measurement resolution and phase precision are more than 0.05 and 0.2 deg, respectively. The displacement resolution and the displacement precision, corresponding to the phase results, are 0.139 and 0.556 nm, respectively.

Effects of channel tap spacing on delay-lock tracking

NASA Astrophysics Data System (ADS)

Dana, Roger A.; Milner, Brian R.; Bogusch, Robert L.

1995-12-01

High fidelity simulations of communication links operating through frequency selective fading channels require both accurate channel models and faithful reproduction of the received signal. In modern radio receivers, processing beyond the analog-to-digital converter (A/D) is done digitally, so a high fidelity simulation is actually an emulation of this digital signal processing. The 'simulation' occurs in constructing the output of the A/D. One approach to constructing the A/D output is to convolve the channel impulse response function with the combined impulse response of the transmitted modulation and the A/D. For both link simulations and hardware channel simulators, the channel impulse response function is then generated with a finite number of samples per chip, and the convolution is implemented in a tapped delay line. In this paper we discuss the effects of the channel model tap spacing on the performance of delay locked loops (DLLs) in both direct sequence and frequency hopped spread spectrum systems. A frequency selective fading channel is considered, and the channel impulse response function is constructed with an integer number of taps per modulation symbol or chip. The tracking loop time delay is computed theoretically for this tapped delay line channel model and is compared to the results of high fidelity simulations of actual DLLs. A surprising result is obtained. The performance of the DLL depends strongly on the number of taps per chip. As this number increases the DLL delay approaches the theoretical limit.

A low noise synthesizer for autotuning and performance testing of hydrogen masers

NASA Technical Reports Server (NTRS)

Cloeren, J. M.; Ingold, J. S.

1984-01-01

A low noise synthesizer has been developed for use in hydrogen maser autotuning and performance evaluation. This synthesizer replaces the frequency offset maser normally used for this purpose and allows the user to maintain all masers in the ensemble at the same frequency. The synthesizer design utilizes a quartz oscillator with a BVA resonator. The oscillator has a frequency offset of 5 X 10 to the minus 8 power. The BVA oscillator is phase-locked to a hydrogen maser by means of a high gain, high stability phase-locked loop, employing low noise multipliers as phase error amplifiers. A functional block diagram of the synthesizer and performance data will be presented.

A Markov chain technique for determining the acquisition behavior of a digital tracking loop

NASA Technical Reports Server (NTRS)

Chadwick, H. D.

1972-01-01

An iterative procedure is presented for determining the acquisition behavior of discrete or digital implementations of a tracking loop. The technique is based on the theory of Markov chains and provides the cumulative probability of acquisition in the loop as a function of time in the presence of noise and a given set of initial condition probabilities. A digital second-order tracking loop to be used in the Viking command receiver for continuous tracking of the command subcarrier phase was analyzed using this technique, and the results agree closely with experimental data.

Phase stabilization for mode locked lasers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baer, M.T.

A method is described for stabilizing a phase relationship between two mode locked lasers, comprising: driving through a power splitter the mode lockers of both lasers from a single stable radio frequency source; monitoring the phase of pulses from each laser utilizing a fast photodiode output of each laser; feeding the output of the fast photodiodes to a phase detector and comparator; measuring a relative phase difference between the lasers with a phase detector and comparator, producing a voltage output signal or phase error signal representing the phase difference; amplifying and filtering the voltage output signal with an amplifier andmore » loop filter; feeding the resulting output signal to a voltage controlled phase delay between the power splitter and one of the lasers; and delaying the RF drive to the one laser to achieve a desired phase relationship, between the two lasers.« less

Engineering evaluations and studies. Report for IUS studies

NASA Technical Reports Server (NTRS)

1981-01-01

The reviews, investigations, and analyses of the Inertial Upper Stage (IUS) Spacecraft Tracking and Data Network (STDN) transponder are reviewed. Carrier lock detector performance for Tracking and Data Relay Satellite System (TDRSS) dual-mode operation is discussed, as is the problem of predicting instantaneous frequency error in the carrier loop. Coastal loop performance analysis is critiqued and the static tracking phase error induced by thermal noise biases is discussed.

Dual-Phase Lock-In Amplifier Based on FPGA for Low-Frequencies Experiments

PubMed Central

Macias-Bobadilla, Gonzalo; Rodríguez-Reséndiz, Juvenal; Mota-Valtierra, Georgina; Soto-Zarazúa, Genaro; Méndez-Loyola, Maurino; Garduño-Aparicio, Mariano

2016-01-01

Photothermal techniques allow the detection of characteristics of material without invading it. Researchers have developed hardware for some specific Phase and Amplitude detection (Lock-In Function) applications, eliminating space and unnecessary electronic functions, among others. This work shows the development of a Digital Lock-In Amplifier based on a Field Programmable Gate Array (FPGA) for low-frequency applications. This system allows selecting and generating the appropriated frequency depending on the kind of experiment or material studied. The results show good frequency stability in the order of 1.0 × 10−9 Hz, which is considered good linearity and repeatability response for the most common Laboratory Amplitude and Phase Shift detection devices, with a low error and standard deviation. PMID:26999138

Dual-Phase Lock-In Amplifier Based on FPGA for Low-Frequencies Experiments.

PubMed

Macias-Bobadilla, Gonzalo; Rodríguez-Reséndiz, Juvenal; Mota-Valtierra, Georgina; Soto-Zarazúa, Genaro; Méndez-Loyola, Maurino; Garduño-Aparicio, Mariano

2016-03-16

Photothermal techniques allow the detection of characteristics of material without invading it. Researchers have developed hardware for some specific Phase and Amplitude detection (Lock-In Function) applications, eliminating space and unnecessary electronic functions, among others. This work shows the development of a Digital Lock-In Amplifier based on a Field Programmable Gate Array (FPGA) for low-frequency applications. This system allows selecting and generating the appropriated frequency depending on the kind of experiment or material studied. The results show good frequency stability in the order of 1.0 × 10(-9) Hz, which is considered good linearity and repeatability response for the most common Laboratory Amplitude and Phase Shift detection devices, with a low error and standard deviation.

Effects of low sampling rate in the digital data-transition tracking loop

NASA Technical Reports Server (NTRS)

Mileant, A.; Million, S.; Hinedi, S.

1994-01-01

This article describes the performance of the all-digital data-transition tracking loop (DTTL) with coherent and noncoherent sampling using nonlinear theory. The effects of few samples per symbol and of noncommensurate sampling and symbol rates are addressed and analyzed. Their impact on the probability density and variance of the phase error are quantified through computer simulations. It is shown that the performance of the all-digital DTTL approaches its analog counterpart when the sampling and symbol rates are noncommensurate (i.e., the number of samples per symbol is an irrational number). The loop signal-to-noise ratio (SNR) (inverse of phase error variance) degrades when the number of samples per symbol is an odd integer but degrades even further for even integers.

Synchronization sampling method based on delta-sigma analog-digital converter for underwater towed array system.

PubMed

Jiang, Jia-Jia; Duan, Fa-Jie; Li, Yan-Chao; Hua, Xiang-Ning

2014-03-01

Synchronization sampling is very important in underwater towed array system where every acquisition node (AN) samples analog signals by its own analog-digital converter (ADC). In this paper, a simple and effective synchronization sampling method is proposed to ensure synchronized operation among different ANs of the underwater towed array system. We first present a master-slave synchronization sampling model, and then design a high accuracy phase-locked loop to synchronize all delta-sigma ADCs to a reference clock. However, when the master-slave synchronization sampling model is used, both the time-delay (TD) of messages traveling along the wired transmission medium and the jitter of the clocks will bring out synchronization sampling error (SSE). Therefore, a simple method is proposed to estimate and compensate the TD of the messages transmission, and then another effective method is presented to overcome the SSE caused by the jitter of the clocks. An experimental system with three ANs is set up, and the related experimental results verify the validity of the synchronization sampling method proposed in this paper.

Synchronization sampling method based on delta-sigma analog-digital converter for underwater towed array system

NASA Astrophysics Data System (ADS)

Jiang, Jia-Jia; Duan, Fa-Jie; Li, Yan-Chao; Hua, Xiang-Ning

2014-03-01

Synchronization sampling is very important in underwater towed array system where every acquisition node (AN) samples analog signals by its own analog-digital converter (ADC). In this paper, a simple and effective synchronization sampling method is proposed to ensure synchronized operation among different ANs of the underwater towed array system. We first present a master-slave synchronization sampling model, and then design a high accuracy phase-locked loop to synchronize all delta-sigma ADCs to a reference clock. However, when the master-slave synchronization sampling model is used, both the time-delay (TD) of messages traveling along the wired transmission medium and the jitter of the clocks will bring out synchronization sampling error (SSE). Therefore, a simple method is proposed to estimate and compensate the TD of the messages transmission, and then another effective method is presented to overcome the SSE caused by the jitter of the clocks. An experimental system with three ANs is set up, and the related experimental results verify the validity of the synchronization sampling method proposed in this paper.

Microcontroller-based locking in optics experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, K.; State Key Laboratory of Precision Spectroscopy, East China Normal University, Shanghai 200062; Le Jeannic, H.

2014-12-15

Optics experiments critically require the stable and accurate locking of relative phases between light beams or the stabilization of Fabry-Perot cavity lengths. Here, we present a simple and inexpensive technique based on a stand-alone microcontroller unit to perform such tasks. Easily programmed in C language, this reconfigurable digital locking system also enables automatic relocking and sequential functioning. Different algorithms are detailed and applied to fringe locking and to low- and high-finesse optical cavity stabilization, without the need of external modulations or error signals. This technique can readily replace a number of analog locking systems advantageously in a variety of opticalmore » experiments.« less

An efficient magnetron transmitter for superconducting accelerators

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kazakevich, G.; Lebedev, V.; Yakovlev, V.

A concept of a highly-efficient high-power magnetron transmitter allowing wide-band phase and the mid-frequency power control at the frequency of the locking signal is proposed. The proposal is aimed for powering Superconducting RF (SRF) cavities of intensity-frontier accelerators. The transmitter is intended to operate with phase and amplitude control feedback loops allowing suppression of microphonics and beam loading in the SRF cavities. The concept utilizes injectionlocked magnetrons controlled in phase by the locking signal supplied by a feedback system. The injection-locking signal pre-excites the magnetron and allows its operation below the critical voltage. This realizes control of the magnetron powermore » in a wide range by control of the magnetron current. Pre-excitation of the magnetron by the locking signal provides an output power range up to 10 dB. Experimental studies were carried out with 2.45 GHz, 1 kW, CW magnetrons. They demonstrated stable operation of the magnetrons and power control at a low noise level. In conclusion, an analysis of the kinetics of the drifting charge in the drift approximation substantiates the concept and the experimental results.« less

Optical Frequency Stabilization and Optical Phase Locked Loops: Golden Threads of Precision Measurement

DOE Office of Scientific and Technical Information (OSTI.GOV)

Taubman, Matthew S.

Stabilization of lasers through locking to optical cavities, atomic transitions, and molecular transitions has enabled the field of precision optical measurement since shortly after the invention of the laser. Recent advances in the field have produced an optical clock that is orders of magnitude more stable than those of just a few years prior. Phase locking of one laser to another, or to a frequency offset from another, formed the basis for linking stable lasers across the optical spectrum, such frequency chains exhibiting progressively finer precision through the years. Phase locking between the modes within a femtosecond pulsed laser hasmore » yielded the optical frequency comb, one of the most beautiful and useful instruments of our time. This talk gives an overview of these topics, from early work through to the latest 1E-16 thermal noise-limited precision recently attained for a stable laser, and the ongoing quest for ever finer precision and accuracy. The issues of understanding and measuring line widths and shapes are also studied in some depth, highlighting implications for servo design for sub-Hz line widths.« less

An efficient magnetron transmitter for superconducting accelerators

DOE PAGES

Kazakevich, G.; Lebedev, V.; Yakovlev, V.; ...

2016-09-22

A concept of a highly-efficient high-power magnetron transmitter allowing wide-band phase and the mid-frequency power control at the frequency of the locking signal is proposed. The proposal is aimed for powering Superconducting RF (SRF) cavities of intensity-frontier accelerators. The transmitter is intended to operate with phase and amplitude control feedback loops allowing suppression of microphonics and beam loading in the SRF cavities. The concept utilizes injectionlocked magnetrons controlled in phase by the locking signal supplied by a feedback system. The injection-locking signal pre-excites the magnetron and allows its operation below the critical voltage. This realizes control of the magnetron powermore » in a wide range by control of the magnetron current. Pre-excitation of the magnetron by the locking signal provides an output power range up to 10 dB. Experimental studies were carried out with 2.45 GHz, 1 kW, CW magnetrons. They demonstrated stable operation of the magnetrons and power control at a low noise level. In conclusion, an analysis of the kinetics of the drifting charge in the drift approximation substantiates the concept and the experimental results.« less

Open-loop control of quasiperiodic thermoacoustic oscillations

NASA Astrophysics Data System (ADS)

Guan, Yu; Gupta, Vikrant; Kashinath, Karthik; Li, Larry K. B.

2017-11-01

The open-loop application of periodic acoustic forcing has been shown to be a potentially effective strategy for controlling periodic thermoacoustic oscillations, but its effectiveness on aperiodic thermoacoustic oscillations is less clear. In this experimental study, we apply periodic acoustic forcing to a ducted premixed flame oscillating quasiperiodically at two incommensurate natural frequencies, f1 and f2. We find that (i) above a critical forcing amplitude, the system locks into the forcing by oscillating only at the forcing frequency ff, producing a closed periodic orbit in phase space with no evidence of the original T2 torus attractor; (ii) the critical forcing amplitude required for lock-in decreases as ff approaches either f1 or f2, resulting in characteristic ∨-shaped lock-in boundaries around the two natural modes; and (iii) for a wide range of forcing frequencies, the system's oscillation amplitude can be reduced to less than 20% of that of the unforced system. These findings show that the open-loop application of periodic acoustic forcing can be an effective strategy for controlling aperiodic thermoacoustic oscillations. This work was supported by the Research Grants Council of Hong Kong (Project No. 16235716 and 26202815).

Narrow linewidth comb realized with a mode-locked fiber laser using an intra-cavity waveguide electro-optic modulator for high-speed control.

PubMed

Iwakuni, Kana; Inaba, Hajime; Nakajima, Yoshiaki; Kobayashi, Takumi; Hosaka, Kazumoto; Onae, Atsushi; Hong, Feng-Lei

2012-06-18

We have developed an optical frequency comb using a mode-locked fiber ring laser with an intra-cavity waveguide electro-optic modulator controlling the optical length in the laser cavity. The mode-locking is achieved with a simple ring configuration and a nonlinear polarization rotation mechanism. The beat note between the laser and a reference laser and the carrier envelope offset frequency of the comb were simultaneously phase locked with servo bandwidths of 1.3 MHz and 900 kHz, respectively. We observed an out-of-loop beat between two identical combs, and obtained a coherent δ-function peak with a signal to noise ratio of 70 dB/Hz.

Wide bandwidth phase-locked loop circuit

NASA Technical Reports Server (NTRS)

Koudelka, Robert David (Inventor)

2005-01-01

A PLL circuit uses a multiple frequency range PLL in order to phase lock input signals having a wide range of frequencies. The PLL includes a VCO capable of operating in multiple different frequency ranges and a divider bank independently configurable to divide the output of the VCO. A frequency detector detects a frequency of the input signal and a frequency selector selects an appropriate frequency range for the PLL. The frequency selector automatically switches the PLL to a different frequency range as needed in response to a change in the input signal frequency. Frequency range hysteresis is implemented to avoid operating the PLL near a frequency range boundary.

Electronically tunable phase locked loop oscillator

NASA Astrophysics Data System (ADS)

Balasis, M.; Davis, M. R.; Jackson, C. R.

1982-02-01

This report describes the design and development of a low noise, high power, variable oscillator incorporating a high 'Q' electronically tunable resonator as the frequency determining element. The VCO provides improved EMC performance in phase locked synthesizers which are a part of communications equipments. The oscillator combines a low noise VMOS transistor with the selectivity and out-of-band attenuation of a coaxial resonator to provide superior EMC performance. Several oscillator designs were examined and the basis for the final configuration is presented. Oscillator noise is discussed and models for analysis are explained. A brass board model was constructed and tested and the technical results are presented.

Imaging the developing heart: synchronized time-lapse microscopy during developmental changes

NASA Astrophysics Data System (ADS)

Nelson, Carl J.; Buckley, Charlotte; Mullins, John J.; Denvir, Martin A.; Taylor, Jonathan

2018-02-01

How do you use imaging to analyse the development of the heart, which not only changes shape but also undergoes constant, high-speed, quasi-periodic changes? We have integrated ideas from prospective and retrospective optical gating to capture long-term, phase-locked developmental time-lapse videos. In this paper we demonstrate the success of this approach over a key developmental time period: heart looping, where large changes in heart shape prevent previous prospective gating approaches from capturing phase- locked videos. We use the comparison with other approaches to in vivo heart imaging to highlight the importance of collecting the most appropriate data for the biological question.

Self-referenced locking of optical coherence by single-detector electronic-frequency tagging

NASA Astrophysics Data System (ADS)

Shay, T. M.; Benham, Vincent; Spring, Justin; Ward, Benjamin; Ghebremichael, F.; Culpepper, Mark A.; Sanchez, Anthony D.; Baker, J. T.; Pilkington, D.; Berdine, Richard

2006-02-01

We report a novel coherent beam combining technique. This is the first actively phase locked optical fiber array that eliminates the need for a separate reference beam. In addition, only a single photodetector is required. The far-field central spot of the array is imaged onto the photodetector to produce the phase control loop signals. Each leg of the fiber array is phase modulated with a separate RF frequency, thus tagging the optical phase shift for each leg by a separate RF frequency. The optical phase errors for the individual array legs are separated in the electronic domain. In contrast with the previous active phase locking techniques, in our system the reference beam is spatially overlapped with all the RF modulated fiber leg beams onto a single detector. The phase shift between the optical wave in the reference leg and in the RF modulated legs is measured separately in the electronic domain and the phase error signal is feedback to the LiNbO 3 phase modulator for that leg to minimize the phase error for that leg relative to the reference leg. The advantages of this technique are 1) the elimination of the reference beam and beam combination optics and 2) the electronic separation of the phase error signals without any degradation of the phase locking accuracy. We will present the first theoretical model for self-referenced LOCSET and describe experimental results for a 3 x 3 array.

Circuit design and simulation of a transmit beamforming ASIC for high-frequency ultrasonic imaging systems.

PubMed

Athanasopoulos, Georgios I; Carey, Stephen J; Hatfield, John V

2011-07-01

This paper describes the design of a programmable transmit beamformer application-specific integrated circuit (ASIC) with 8 channels for ultrasound imaging systems. The system uses a 20-MHz reference clock. A digital delay-locked loop (DLL) was designed with 50 variable delay elements, each of which provides a clock with different phase from a single reference. Two phase detectors compare the phase difference of the reference clock with the feedback clock, adjusting the delay of the delay elements to bring the feedback clock signal in phase with the reference clock signal. Two independent control voltages for the delay elements ensure that the mark space ratio of the pulses remain at 50%. By combining a 10- bit asynchronous counter with the delays from the DLL, each channel can be programmed to give a maximum time delay of 51 μs with 1 ns resolution. It can also give bursts of up to 64 pulses. Finally, for a single pulse, it can adjust the pulse width between 9 ns and 100 ns by controlling the current flowing through a capacitor in a one-shot circuit, for use with 40-MHz and 5-MHz transducers, respectively.

Phase-Locked Loop for Precisely Timed Acoustic Stimulation during Sleep

PubMed Central

Santostasi, Giovanni; Malkani, Roneil; Riedner, Brady; Bellesi, Michele; Tononi, Giulio; Paller, Ken A.; Zee, Phyllis C.

2016-01-01

Background A Brain-Computer Interface could potentially enhance the various benefits of sleep. New Method We describe a strategy for enhancing slow-wave sleep (SWS) by stimulating the sleeping brain with periodic acoustic stimuli that produce resonance in the form of enhanced slow-wave activity in the electroencephalogram (EEG). The system delivers each acoustic stimulus at a particular phase of an electrophysiological rhythm using a Phase-Locked Loop (PLL). Results The PLL is computationally economical and well suited to follow and predict the temporal behavior of the EEG during slow-wave sleep. Comparison with Existing Methods Acoustic stimulation methods may be able to enhance SWS without the risks inherent in electrical stimulation or pharmacological methods. The PLL method differs from other acoustic stimulation methods that are based on detecting a single slow wave rather than modeling slow-wave activity over an extended period of time. Conclusions By providing real-time estimates of the phase of ongoing EEG oscillations, the PLL can rapidly adjust to physiological changes, thus opening up new possibilities to study brain dynamics during sleep. Future application of these methods hold promise for enhancing sleep quality and associated daytime behavior and improving physiologic function. PMID:26617321

Wideband and high-gain frequency stabilization of a 100-W injection-locked Nd:YAG laser for second-generation gravitational wave detectors.

PubMed

Ohmae, Noriaki; Moriwaki, Shigenori; Mio, Norikatsu

2010-07-01

Second-generation gravitational wave detectors require a highly stable laser with an output power greater than 100 W to attain their target sensitivity. We have developed a frequency stabilization system for a 100-W injection-locked Nd:YAG (yttrium aluminum garnet) laser. By placing an external wideband electro-optic modulator used as a fast-frequency actuator in the optical path of the slave output, we can circumvent a phase delay in the frequency control loop originating from the pole of an injection-locked slave cavity. Thus, we have developed an electro-optic modulator made of a MgO-doped stoichiometric LiNbO(3) crystal. Using this modulator, we achieve a frequency control bandwidth of 800 kHz and a control gain of 180 dB at 1 kHz. These values satisfy the requirement for a laser frequency control loop in second-generation gravitational wave detectors.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips.

PubMed

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-05-18

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of -0.7/0.6 °C from -30 °C to 70 °C after 1-point calibration at 30 °C.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips

PubMed Central

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-01-01

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of −0.7/0.6 °C from −30 °C to 70 °C after 1-point calibration at 30 °C. PMID:25993518

Pulsed Phase Lock Loop Device for Monitoring Intracranial Pressure During Space Flight

NASA Technical Reports Server (NTRS)

Ueno, Toshiaki; Macias, Brandon R.; Yost, William T.; Hargens, Alan R.

2003-01-01

We have developed an ultrasonic device to monitor ICP waveforms non-invasively from cranial diameter oscillations using a NASA-developed pulsed phase lock loop (PPLL) technique. The purpose of this study was to attempt to validate the PPLL device for reliable recordings of ICP waveforms and analysis of ICP dynamics in vivo. METHODS: PPLL outputs were recorded in patients during invasive ICP monitoring at UCSD Medical Center (n=10). RESULTS: An averaged linear regression coefficient between ICP and PPLL waveform data during one cardiac cycle in all patients is 0.88 +/- 0.02 (mean +/- SE). Coherence function analysis indicated that ICP and PPLL waveforms have high correlation in the lst, 2nd, and 3rd harmonic waves associated with a cardiac cycle. CONCLUSIONS: PPLL outputs represent ICP waveforms in both frequency and time domains. PPLL technology enables in vivo evaluation of ICP dynamics non-invasively, and can acquire continuous ICP waveforms during spaceflight because of compactness and non-invasive nature.

Nondestructive ultrasonic measurement of bolt preload using the pulsed-phase locked-loop interferometer

NASA Technical Reports Server (NTRS)

Allison, S. G.; Heyman, J. S.

1985-01-01

Achieving accurate preload in threaded fasteners is an important and often critical problem which is encountered in nearly all sectors of government and industry. Conventional tensioning methods which rely on torque carry with them the disadvantage of requiring constant friction in the fastener in order to accurately correlate torque to preload. Since most of the applied torque typically overcomes friction rather than tensioning the fastener, small variations in friction can cause large variations in preload. An instrument called a pulsed phase locked loop interferometer, which was recently developed at NASA Langley, has found widespread use for measurement of stress as well as material properties. When used to measure bolt preload, this system detects changes in the fastener length and sound velocity which are independent of friction. The system is therefore capable of accurately establishing the correct change in bolt tension. This high resolution instrument has been used for precision measurement of preload in critical fasteners for numerous applications such as the space shuttle landing gear and helicopter main rotors.

Coherent inductive communications link for biomedical applications

NASA Technical Reports Server (NTRS)

Hogrefe, Arthur F. (Inventor); Radford, Wade E. (Inventor)

1985-01-01

A two-way coherent inductive communications link between an external transceiver and an internal transceiver located in a biologically implanted programmable medical device. Digitally formatted command data and programming data is transmitted to the implanted medical device by frequency shift keying the inductive communications link. Internal transceiver is powered by the inductive field between internal and external transceivers. Digitally formatted data is transmitted to external transceiver by internal transceiver amplitude modulating inductive field. Immediate verification of the establishment of a reliable communications link is provided by determining existence of frequency lock and bit phase lock between internal and external transceivers.

Digitally synthesized high purity, high-voltage radio frequency drive electronics for mass spectrometry.

PubMed

Schaefer, R T; MacAskill, J A; Mojarradi, M; Chutjian, A; Darrach, M R; Madzunkov, S M; Shortt, B J

2008-09-01

Reported herein is development of a quadrupole mass spectrometer controller (MSC) with integrated radio frequency (rf) power supply and mass spectrometer drive electronics. Advances have been made in terms of the physical size and power consumption of the MSC, while simultaneously making improvements in frequency stability, total harmonic distortion, and spectral purity. The rf power supply portion of the MSC is based on a series-resonant LC tank, where the capacitive load is the mass spectrometer itself, and the inductor is a solenoid or toroid, with various core materials. The MSC drive electronics is based on a field programmable gate array (FPGA), with serial peripheral interface for analog-to-digital and digital-to-analog converter support, and RS232/RS422 communications interfaces. The MSC offers spectral quality comparable to, or exceeding, that of conventional rf power supplies used in commercially available mass spectrometers; and as well an inherent flexibility, via the FPGA implementation, for a variety of tasks that includes proportional-integral derivative closed-loop feedback and control of rf, rf amplitude, and mass spectrometer sensitivity. Also provided are dc offsets and resonant dipole excitation for mass selective accumulation in applications involving quadrupole ion traps; rf phase locking and phase shifting for external loading of a quadrupole ion trap; and multichannel scaling of acquired mass spectra. The functionality of the MSC is task specific, and is easily modified by simply loading FPGA registers or reprogramming FPGA firmware.

Optoelectrical clock recovery with dispersion monitoring for high speed transmission

NASA Astrophysics Data System (ADS)

Wen, He; Liao, Jinxin; Zheng, Xiaoping; Zhang, Hanyi; Guo, Yili

2010-12-01

The proposed clock recovery scheme introduces electrooptical modulation to down convert the clock frequency facilitating succeeding narrow band filtering by a phase locked loop (PLL) with ordinary radio frequency (RF) devices, further, employs a quadrature phase detector in the PLL to provide an indication signal for monitoring residual dispersion. It was demonstrated in a polarization multiplexed 160-Gbit/s optical non-return to zero quadrature phase shift keying (NRZ-QPSK) transmission system.

GPS/IGS Design Analysis Report. Volume 1

DTIC Science & Technology

1982-11-15

PLL Phase Lock Loop FMPCB Parts, Hateriala, and Processes Control Board PPPL Program Preferred Parts List P14 Pseudo-Rando* Noise PSI Peculiar Support...program preferred ?arts list ( PPPL ). Where ?PPL parts were not obtainable, screening, burn-in, and other tes. were imposed on those parts to assure

Direct phase-locking of a 8.6-μm quantum cascade laser to a mid-IR optical frequency comb: application to precision spectroscopy of N2O.

PubMed

Gambetta, Alessio; Cassinerio, Marco; Coluccelli, Nicola; Fasci, Eugenio; Castrillo, Antonio; Gianfrani, Livio; Gatti, Davide; Marangoni, Marco; Laporta, Paolo; Galzerano, Gianluca

2015-02-01

We developed a high-precision spectroscopic system at 8.6 μm based on direct heterodyne detection and phase-locking of a room-temperature quantum-cascade-laser against an harmonic, 250-MHz mid-IR frequency comb obtained by difference-frequency generation. The ∼30  dB signal-to-noise ratio of the detected beat-note together with the achieved closed-loop locking bandwidth of ∼500  kHz allows for a residual integrated phase noise of 0.78 rad (1 Hz-5 MHz), for an ultimate resolution of ∼21  kHz, limited by the measured linewidth of the mid-IR comb. The system was used to perform absolute measurement of line-center frequencies for the rotational components of the ν2 vibrational band of N2O, with a relative precision of 3×10(-10).

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vacas-Jacques, Paulino; Wellman Center for Photomedicine and Harvard Medical School, Massachusetts General Hospital, Boston, Massachusetts 02114; Linnes, Jacqueline

Innovations in international health require the use of state-of-the-art technology to enable clinical chemistry for diagnostics of bodily fluids. We propose the implementation of a portable and affordable lock-in amplifier-based instrument that employs digital technology to perform biochemical diagnostics on blood, urine, and other fluids. The digital instrument is composed of light source and optoelectronic sensor, lock-in detection electronics, microcontroller unit, and user interface components working with either power supply or batteries. The instrument performs lock-in detection provided that three conditions are met. First, the optoelectronic signal of interest needs be encoded in the envelope of an amplitude-modulated waveform. Second,more » the reference signal required in the demodulation channel has to be frequency and phase locked with respect to the optoelectronic carrier signal. Third, the reference signal should be conditioned appropriately. We present three approaches to condition the signal appropriately: high-pass filtering the reference signal, precise offset tuning the reference level by low-pass filtering, and by using a voltage divider network. We assess the performance of the lock-in instrument by comparing it to a benchmark device and by determining protein concentration with single-color absorption measurements. We validate the concentration values obtained with the proposed instrument using chemical concentration measurements. Finally, we demonstrate that accurate retrieval of phase information can be achieved by using the same instrument.« less

A microcontroller-based lock-in amplifier for sub-milliohm resistance measurements.

PubMed

Bengtsson, Lars E

2012-07-01

This paper presents a novel approach to the design of a digital ohmmeter with a resolution of <60 μΩ based on a general-purpose microcontroller and a high-impedance instrumentation amplifier only. The design uses two digital I/O-pins to alternate the current through the sample resistor and combined with a proper firmware routine, the design is a lock-in detector that discriminates any signal that is out of phase/frequency with the reference signal. This makes it possible to selectively detect the μV drop across sample resistors down to 55.6 μΩ using only the current that can be supplied by the digital output pins of a microcontroller. This is achieved without the need for an external reference signal generator and does not rely on the computing processing power of a digital signal processor.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope

PubMed Central

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-01-01

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments. PMID:27104539

[Study on a wireless energy transmission system for the noninvasive examination micro system inside alimentary tracts].

PubMed

He, Xiu; Yan, Guo-Zheng; Wang, Fu-Min

2008-01-01

A wireless energy transmission system for the MEMS system inside alimentary tracts is reported here in the paper. It consists of an automatic frequency tracking circuit of phase lock loop and phase shift PWM control circuit. Experimental results show that the energy transmission system is capable of automatic frequency-tracking and transmission power-adjusting and has stable received energy.

Active stabilization of a rapidly chirped laser by an optoelectronic digital servo-loop control.

PubMed

Gorju, G; Jucha, A; Jain, A; Crozatier, V; Lorgeré, I; Le Gouët, J-L; Bretenaker, F; Colice, M

2007-03-01

We propose and demonstrate a novel active stabilization scheme for wide and fast frequency chirps. The system measures the laser instantaneous frequency deviation from a perfectly linear chirp, thanks to a digital phase detection process, and provides an error signal that is used to servo-loop control the chirped laser. This way, the frequency errors affecting a laser scan over 10 GHz on the millisecond timescale are drastically reduced below 100 kHz. This active optoelectronic digital servo-loop control opens new and interesting perspectives in fields where rapidly chirped lasers are crucial.

A multi-channel low-power system-on-chip for single-unit recording and narrowband wireless transmission of neural signal.

PubMed

Bonfanti, A; Ceravolo, M; Zambra, G; Gusmeroli, R; Spinelli, A S; Lacaita, A L; Angotzi, G N; Baranauskas, G; Fadiga, L

2010-01-01

This paper reports a multi-channel neural recording system-on-chip (SoC) with digital data compression and wireless telemetry. The circuit consists of a 16 amplifiers, an analog time division multiplexer, an 8-bit SAR AD converter, a digital signal processor (DSP) and a wireless narrowband 400-MHz binary FSK transmitter. Even though only 16 amplifiers are present in our current die version, the whole system is designed to work with 64 channels demonstrating the feasibility of a digital processing and narrowband wireless transmission of 64 neural recording channels. A digital data compression, based on the detection of action potentials and storage of correspondent waveforms, allows the use of a 1.25-Mbit/s binary FSK wireless transmission. This moderate bit-rate and a low frequency deviation, Manchester-coded modulation are crucial for exploiting a narrowband wireless link and an efficient embeddable antenna. The chip is realized in a 0.35- εm CMOS process with a power consumption of 105 εW per channel (269 εW per channel with an extended transmission range of 4 m) and an area of 3.1 × 2.7 mm(2). The transmitted signal is captured by a digital TV tuner and demodulated by a wideband phase-locked loop (PLL), and then sent to a PC via an FPGA module. The system has been tested for electrical specifications and its functionality verified in in-vivo neural recording experiments.

A Comparative Study of Co-Channel Interference Suppression Techniques

NASA Technical Reports Server (NTRS)

Hamkins, Jon; Satorius, Ed; Paparisto, Gent; Polydoros, Andreas

1997-01-01

We describe three methods of combatting co-channel interference (CCI): a cross-coupled phase-locked loop (CCPLL); a phase-tracking circuit (PTC), and joint Viterbi estimation based on the maximum likelihood principle. In the case of co-channel FM-modulated voice signals, the CCPLL and PTC methods typically outperform the maximum likelihood estimators when the modulation parameters are dissimilar. However, as the modulation parameters become identical, joint Viterbi estimation provides for a more robust estimate of the co-channel signals and does not suffer as much from "signal switching" which especially plagues the CCPLL approach. Good performance for the PTC requires both dissimilar modulation parameters and a priori knowledge of the co-channel signal amplitudes. The CCPLL and joint Viterbi estimators, on the other hand, incorporate accurate amplitude estimates. In addition, application of the joint Viterbi algorithm to demodulating co-channel digital (BPSK) signals in a multipath environment is also discussed. It is shown in this case that if the interference is sufficiently small, a single trellis model is most effective in demodulating the co-channel signals.

The use of interleaving for reducing radio loss in trellis-coded modulation systems

NASA Technical Reports Server (NTRS)

Divsalar, D.; Simon, M. K.

1989-01-01

It is demonstrated how the use of interleaving/deinterleaving in trellis-coded modulation (TCM) systems can reduce the signal-to-noise ratio loss due to imperfect carrier demodulation references. Both the discrete carrier (phase-locked loop) and suppressed carrier (Costas loop) cases are considered and the differences between the two are clearly demonstrated by numerical results. These results are of great importance for future communication links to the Deep Space Network (DSN), especially from high Earth orbiters, which may be bandwidth limited.

An actively mode-locked fiber laser for sampling in a wide-bandwidth opto-electronic analog-to-digital converter

NASA Astrophysics Data System (ADS)

Powers, John P.; Pace, Phillip E.

2008-02-01

We have designed, built and tested an actively mode-locked fiber laser, operating at 1550 nm, for use as the sampling waveform in an opto-electronic analog-to-digital converter (ADC). Analysis shows that, in order to digitize a 10-GHz signal to 10 bits of resolution, the sampling pulsewidth must be less than 2.44 ps, the RMS timing jitter must be below 31.0 fs, and the RMS amplitude jitter must be below 0.195%. Fiber lasers have proven to have the capability to narrowly exceed these operating requirements. The fiber laser is a "sigma" laser consisting of Er-doped gain medium, dispersion-compensating fiber, nonlinear fiber, a Faraday rotation mirror, polarization-maintaining fiber and components, and diode pump lasers. The active mode-locking is achieved by a Mach-Zehnder interferometer modulator, driven by a frequency synthesizer operating at the desired sampling rate. A piezo-electric element is used in a feedback control loop to stabilize the output PRF against environmental changes. Measurements of the laser output revealed the maximum nominal PRF to be 16 GHz, the nominal pulsewidth to be 7.2 ps, and the nominal RNS timing jitter to be 386 fs. Incorporating this laser into a sampling ADC would allow us to sample a 805-MHz bandwidth signal to a resolution of 10 bits as limited by timing jitter. Techniques to reduce the timing-jitter bottleneck are discussed.

Numerical investigation of multichannel laser beam phase locking in turbulent atmosphere

DOE Office of Scientific and Technical Information (OSTI.GOV)

Volkov, V A; Volkov, M V; Garanin, S G

2015-12-31

The efficiency of coherent multichannel beam combining under focusing through a turbulent medium on a target in the cases of phase conjugation and target irradiation in the feedback loop is investigated numerically in various approximations. The conditions of efficient focusing of multichannel radiation on the target are found. It is shown that the coherent beam combining with target irradiation in the feedback loop, which does not require a reference beam and wavefront measurements, is as good as the phase conjugation approach in the efficiency of focusing. It is found that the main effect of focusing is provided by properly chosenmore » phase shifts in the channels, whereas taking into account local wavefront tip tilts weakly affects the result. (control of laser radiation parameters)« less

Self-Tuning Adaptive-Controller Using Online Frequency Identification

NASA Technical Reports Server (NTRS)

Chiang, W. W.; Cannon, R. H., Jr.

1985-01-01

A real time adaptive controller was designed and tested successfully on a fourth order laboratory dynamic system which features very low structural damping and a noncolocated actuator sensor pair. The controller, implemented in a digital minicomputer, consists of a state estimator, a set of state feedback gains, and a frequency locked loop (FLL) for real time parameter identification. The FLL can detect the closed loop natural frequency of the system being controlled, calculate the mismatch between a plant parameter and its counterpart in the state estimator, and correct the estimator parameter in real time. The adaptation algorithm can correct the controller error and stabilize the system for more than 50% variation in the plant natural frequency, compared with a 10% stability margin in frequency variation for a fixed gain controller having the same performance at the nominal plant condition. After it has locked to the correct plant frequency, the adaptive controller works as well as the fixed gain controller does when there is no parameter mismatch. The very rapid convergence of this adaptive system is demonstrated experimentally, and can also be proven with simple root locus methods.

The performance of a sampled data delay lock loop implemented with a Kalman loop filter

NASA Astrophysics Data System (ADS)

Eilts, H. S.

1980-01-01

The purpose of this study is to evaluate the steady-state and transient (lock-up) performance of a tracking loop implemented with a Kalman filter. Steady-state performance criteria are errors due to measurement noise (jitter) and Doppler errors due to motion of the tracking loop. Trade-offs exist between the two criteria such that increasing performance with respect to either one will cause performance decrease with respect to the other. It is shown that by carefully selecting filter parameters reasonable performance can be obtained for both criteria simultaneously. It is also shown that lock-up performance for the loop is acceptable when these parameters are used.

Instantaneous power control of a high speed permanent magnet synchronous generator based on a sliding mode observer and a phase locked loop

NASA Astrophysics Data System (ADS)

Duan, Jiandong; Fan, Shaogui; Wu, Fengjiang; Sun, Li; Wang, Guanglin

2018-06-01

This paper proposes an instantaneous power control method for high speed permanent magnet synchronous generators (PMSG), to realize the decoupled control of active power and reactive power, through vector control based on a sliding mode observer (SMO), and a phase locked loop (PLL). Consequently, the high speed PMSG has a high internal power factor, to ensure efficient operation. Vector control and accurate estimation of the instantaneous power require an accurate estimate of the rotor position. The SMO is able to estimate the back electromotive force (EMF). The rotor position and speed can be obtained using a combination of the PLL technique and the phase compensation method. This method has the advantages of robust operation, and being resistant to noise when estimating the position of the rotor. Using instantaneous power theory, the relationship between the output active power, reactive power, and stator current of the PMSG is deduced, and the power constraint condition is analysed for operation at the unit internal power factor. Finally, the accuracy of the rotor position detection, the instantaneous power detection, and the control methods are verified using simulations and experiments.

Frequency stabilization for multilocation optical FDM networks

NASA Astrophysics Data System (ADS)

Jiang, Quan; Kavehrad, Mohsen

1993-04-01

In a multi-location optical FDM network, the frequency of each user's transmitter can be offset-locked, through a Fabry-Perot, to an absolute frequency standard which is distributed to the users. To lock the local Fabry-Perot to the frequency standard, the standard has to be frequency-dithered by a sinusoidal signal and the sinusoidal reference has to be transmitted to the user location since the lock-in amplifier in the stabilization system requires the reference for synchronous detection. We proposed two solutions to avoid transmitting the reference. One uses an extraction circuit to obtain the sinusoidal signal from the incoming signal. A nonlinear circuit following the photodiode produces a strong second-order harmonic of the sinusoidal signal and a phase-locked loop is locked to it. The sinusoidal reference is obtained by a divide- by-2 circuit. The phase ambiguity (0 degree(s) or 180 degree(s)) is resolved by using a selection- circuit and an initial scan. The other method uses a pseudo-random sequence instead of a sinusoidal signal to dither the frequency standard and a surface-acoustic-wave (SAW) matched-filter instead of a lock-in amplifier to obtain the frequency error. The matched-filter serves as a correlator and does not require the dither reference.

A microprocessor based portable bolt tension monitor

NASA Technical Reports Server (NTRS)

Perey, D. F.

1991-01-01

A bolt tension monitor (BTM) which uses ultrasonics and a pulsed phase locked loop circuit to measure load-induced acoustic phase shifts which are independent of friction is described. The BTM makes it possible to measure the load in a bolt that was tightened at some time in the past. This capability to recertify a load after-the-fact will help to insure the integrity of a bolted joint.

The Ionospheric Scintillation Effects on the BeiDou Signal Receiver

PubMed Central

He, Zhijun; Zhao, Hongbo; Feng, Wenquan

2016-01-01

Irregularities in the Earth’s ionosphere can make the amplitude and phase of radio signals fluctuate rapidly, which is known as ionospheric scintillation. Severe ionospheric scintillation could affect the performance of the Global Navigation Satellite System (GNSS). Currently, the Multiple Phase Screen (MPS) technique is widely used in solving problems caused by weak and strong scintillations. Considering that Southern China is mainly located in the area where moderate and intense scintillation occur frequently, this paper built a model based on the MPS technique and discussed the scintillation impacts on China’s BeiDou navigation system. By using the BeiDou B1I signal, this paper analyzed the scintillation effects on the receiver, which includes the acquisition and tracking process. For acquisition process, this paper focused on the correlation peak and acquisition probability. For the tracking process, this paper focused on the carrier tracking loop and the code tracking loop. Simulation results show that under high scintillation intensity, the phase fluctuation could be −1.13 ± 0.087 rad to 1.40 ± 0.087 rad and the relative amplitude fluctuation could be −10 dB to 8 dB. As the scintillation intensity increased, the average correlation peak would decrease more than 8%, which could thus degrade acquisition performance. On the other hand, when the signal-to-noise ratio (SNR) is comparatively lower, the influence of strong scintillation on the phase locked loop (PLL) is much higher than that of weak scintillation. As the scintillation becomes more intense, PLL variance could consequently results in an error of more than 2.02 cm in carrier-phase based ranging. In addition, the delay locked loop (DLL) simulation results indicated that the pseudo-range error caused by strong scintillation could be more than 4 m and the consequent impact on positioning accuracy could be more than 6 m. PMID:27834867

Lock-in thermal imaging for the early-stage detection of cutaneous melanoma: a feasibility study.

PubMed

Bonmarin, Mathias; Le Gal, Frédérique-Anne

2014-04-01

This paper theoretically evaluates lock-in thermal imaging for the early-stage detection of cutaneous melanoma. Lock-in thermal imaging is based on the periodic thermal excitation of the specimen under test. Resulting surface temperature oscillations are recorded with an infrared camera and allow the detection of variations of the sample's thermophysical properties under the surface. In this paper, the steady-state and transient skin surface temperatures are numerically derived for a different stage of development of the melanoma lesion using a two-dimensional axisymmetric multilayer heat-transfer model. The transient skin surface temperature signals are demodulated according to the digital lock-in principle to compute both a phase and an amplitude image of the lesions. The phase image can be advantageously used to accurately detect cutaneous melanoma at an early stage of development while the maximal phase shift can give precious information about the lesion invasion depth. The ability of lock-in thermal imaging to suppress disturbing subcutaneous thermal signals is demonstrated. The method is compared with the previously proposed pulse-based approaches, and the influence of the modulation frequency is further discussed. Copyright © 2014 Elsevier Ltd. All rights reserved.

Modeling and Simulation of a DG-Integrated Intelligent Microgrid

DTIC Science & Technology

2010-02-01

17. The I-V curve from the manufacturer for BP-4175 175W PV module...........................32   Fig. 18. Wind turbine model...33   Fig. 19. Electrical outputs of wind turbine... PMSG : Permanent Magnet Synchronous Generator PLL : Phase Lock Loop PV : Photovoltaic PWM : Pulse Width Modulation TOU : Time of Use VTES

A closed-loop phase-locked interferometer for wide bandwidth position sensing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fleming, Andrew J., E-mail: Andrew.Fleming@Newcastle.edu.au; Routley, Ben S., E-mail: Ben.Routley@Newcastle.edu.au

This article describes a position sensitive interferometer with closed-loop control of the reference mirror. A calibrated nanopositioner is used to lock the interferometer phase to the most sensitive point in the interferogram. In this configuration, large low-frequency movements of the sensor mirror can be detected from the control signal applied to the nanopositioner and high-frequency short-range signals can be measured directly from the photodiode. It is demonstrated that these two signals are complementary and can be summed to find the total displacement. The resulting interferometer has a number of desirable characteristics: it is optically simple, does not require polarization ormore » modulation to detect the direction of motion, does not require fringe-counting or interpolation electronics, and has a bandwidth equal to that of the photodiode. Experimental results demonstrate the frequency response analysis of a high-speed positioning stage. The proposed instrument is ideal for measuring the frequency response of nanopositioners, electro-optical components, MEMs devices, ultrasonic devices, and sensors such as surface acoustic wave detectors.« less

Word timing recovery in direct detection optical PPM communication systems with avalanche photodiodes using a phase lock loop

NASA Technical Reports Server (NTRS)

Sun, Xiaoli; Davidson, Frederic M.

1990-01-01

A technique for word timing recovery in a direct-detection optical PPM communication system is described. It tracks on back-to-back pulse pairs in the received random PPM data sequences with the use of a phase locked loop. The experimental system consisted of an 833-nm AlGaAs laser diode transmitter and a silicon avalanche photodiode photodetector, and it used Q = 4 PPM signaling at source data rate 25 Mb/s. The mathematical model developed to describe system performance is shown to be in good agreement with the experimental measurements. Use of this recovered PPM word clock with a slot clock recovery system caused no measurable penalty in receiver sensitivity. The completely self-synchronized receiver was capable of acquiring and maintaining both slot and word synchronizations for input optical signal levels as low as 20 average detected photons per information bit. The receiver achieved a bit error probability of 10 to the -6th at less than 60 average detected photons per information bit.

Digital tanlock loop architecture with no delay

NASA Astrophysics Data System (ADS)

Al-Kharji AL-Ali, Omar; Anani, Nader; Al-Araji, Saleh; Al-Qutayri, Mahmoud; Ponnapalli, Prasad

2012-02-01

This article proposes a new architecture for a digital tanlock loop which eliminates the time-delay block. The ? (rad) phase shift relationship between the two channels, which is generated by the delay block in the conventional time-delay digital tanlock loop (TDTL), is preserved using two quadrature sampling signals for the loop channels. The proposed system outperformed the original TDTL architecture, when both systems were tested with frequency shift keying input signal. The new system demonstrated better linearity and acquisition speed as well as improved noise performance compared with the original TDTL architecture. Furthermore, the removal of the time-delay block enables all processing to be digitally performed, which reduces the implementation complexity. Both the original TDTL and the new architecture without the delay block were modelled and simulated using MATLAB/Simulink. Implementation issues, including complexity and relation to simulation of both architectures, are also addressed.

Design of a delayed XOR phase detector for an optical phase-locked loop toward high-speed coherent laser communication.

PubMed

Liu, Yang; Tong, Shoufeng; Chang, Shuai; Song, Yansong; Dong, Yan; Zhao, Xin; An, Zhe; Yu, Fuwan

2018-05-10

Optical phase-locked loops are an effective detection method in high-speed and long-distance laser communication. Although this method can detect weak signal light and maintain a small bit error rate, it is difficult to perform because identifying the phase difference between the signal light and the local oscillator accurately has always been a technical challenge. Thus, a series of studies is conducted to address this issue. First, a delayed exclusive or gate (XOR) phase detector with multi-level loop compound control is proposed. Then, a 50 ps delay line and relative signal-to-noise ratio control at 15 dB are produced through theoretical derivation and simulation. Thereafter, a phase discrimination module is designed on a 15  cm×5  cm printed circuit board board. Finally, the experiment platform is built for verification. Experimental results show that the phase discrimination range is -1.1 to 1.1 GHz, and the gain is 0.82 mV/MHz. Three times the standard deviation, that is, 0.064 V, is observed between the test and theoretical values. The accuracy of phase detection is better than 0.07 V, which meets the design standards. A coherent carrier recovery test system is established. The delayed XOR gate has good performance in this system. When the communication rate is 5 Gbps, the system realizes a bit error rate of 1.55×10 -8 when the optical power of the signal is -40.4  dBm. When the communication rate is increased to 10 Gbps, the detection sensitivity drops to -39.5  dBm and still shows good performance in high-speed communications. This work provides a reference for future high-speed coherent homodyne detection in space. Ideas for the next phase of this study are presented at the end of this paper.

Excitation power quantities in phase resonance testing of nonlinear systems with phase-locked-loop excitation

NASA Astrophysics Data System (ADS)

Peter, Simon; Leine, Remco I.

2017-11-01

Phase resonance testing is one method for the experimental extraction of nonlinear normal modes. This paper proposes a novel method for nonlinear phase resonance testing. Firstly, the issue of appropriate excitation is approached on the basis of excitation power considerations. Therefore, power quantities known from nonlinear systems theory in electrical engineering are transferred to nonlinear structural dynamics applications. A new power-based nonlinear mode indicator function is derived, which is generally applicable, reliable and easy to implement in experiments. Secondly, the tuning of the excitation phase is automated by the use of a Phase-Locked-Loop controller. This method provides a very user-friendly and fast way for obtaining the backbone curve. Furthermore, the method allows to exploit specific advantages of phase control such as the robustness for lightly damped systems and the stabilization of unstable branches of the frequency response. The reduced tuning time for the excitation makes the commonly used free-decay measurements for the extraction of backbone curves unnecessary. Instead, steady-state measurements for every point of the curve are obtained. In conjunction with the new mode indicator function, the correlation of every measured point with the associated nonlinear normal mode of the underlying conservative system can be evaluated. Moreover, it is shown that the analysis of the excitation power helps to locate sources of inaccuracies in the force appropriation process. The method is illustrated by a numerical example and its functionality in experiments is demonstrated on a benchmark beam structure.

Frequency Stabilization of DFB Laser Diodes at 1572 nm for Spaceborne Lidar Measurements of CO2

NASA Technical Reports Server (NTRS)

Numata, Kenji; Chen, Jeffrey R.; Wu, Stewart T.; Abshire, James B.; Krainak, Michael A.

2010-01-01

We report a fiber-based, pulsed laser seeder system that rapidly switches among 6 wavelengths across atmospheric carbon dioxide (CO2) absorption line near 1572.3 nm for measurements of global CO2 mixing ratios to 1-ppmv precision. One master DFB laser diode has been frequency-locked to the CO2 line center using a frequency modulation technique, suppressing its peak-to-peak frequency drifts to 0.3 MHz at 0.8 sec averaging time over 72 hours. Four online DFB laser diodes have been offset-locked to the master laser using phase locked loops, with virtually the same sub-MHz absolute accuracy. The 6 lasers were externally modulated and then combined to produce the measurement pulse train.

Improvement of the phase regulation between two amplifiers feeding the inputs of the 3dB combiner in the ASDEX-Upgrade ICRH system

NASA Astrophysics Data System (ADS)

Grine, D.; Pompon, F.; Faugel, H.; Funfgelder, H.; Noterdaeme, J. M.; Koch, R.

2011-12-01

The present ICRF system at ASDEX Upgrade uses 3dB combiners to forward the combined power of a generator pair to a single line [1]. Optimal output performance is achieved when the voltages at the two input lines of a combiner are equal in amplitude and in phase quadrature. If this requirement is not met, a large amount of power is lost in the dummy loads of the combiner. To minimize losses, it is paramount to reach this phase relationship in a fast and stable way. The current phase regulation system is based on analog phase locked loops circuits. The main limitation of this system is the response time: several tens of milliseconds are needed to achieve a stable state. In order to get rid of the response time limitation of the current system, a new system is proposed based on a multi-channel direct digital synthesis device which is steered by a microcontroller and a software-based controller. The proposed system has been developed and successfully tested on a test-bench. The results show a remarkable improvement in the reduction of the response times. Other significant advantages provided by the new system include greater flexibility for frequency and phase settings, lower cost and a noticeable size reduction of the system.

Quadrature demultiplexing using a degenerate vector parametric amplifier.

PubMed

Lorences-Riesgo, Abel; Liu, Lan; Olsson, Samuel L I; Malik, Rohit; Kumpera, Aleš; Lundström, Carl; Radic, Stojan; Karlsson, Magnus; Andrekson, Peter A

2014-12-01

We report on quadrature demultiplexing of a quadrature phase-shift keying (QPSK) signal into two cross-polarized binary phase-shift keying (BPSK) signals with negligible penalty at bit-error rate (BER) equal to 10(-9). The all-optical quadrature demultiplexing is achieved using a degenerate vector parametric amplifier operating in phase-insensitive mode. We also propose and demonstrate the use of a novel and simple phase-locked loop (PLL) scheme based on detecting the envelope of one of the signals after demultiplexing in order to achieve stable quadrature decomposition.

Reference-free direct digital lock-in method and apparatus

NASA Technical Reports Server (NTRS)

Henry, James E. (Inventor); Leonard, John A. (Inventor)

2000-01-01

A reference-free direct digital lock-in system (RDDL 10) has a first input coupled to a periodic electrical signal and an output for outputting an indication of a magnitude of a desired periodic signal component. The RDDL also has a second input for receiving a signal (9) that specifies a reference period value, and operates to autonomously generate a lock-in reference signal having a specified period and a phase that is adjusted to maximize a magnitude of the outputted desired periodic signal component. In an embodiment of a measurement system that includes the RDDL 10 an optical source provides a chopped light beam having wavelengths within a predetermined range of wavelengths, and the periodic electrical signal is generated by at least one photodetector that is illuminated by the chopped light beam. In this embodiment the measurement system characterizes, for at least one wavelength of light that is generated by the optical source, a spectral response of the at least one photodetector. The RDDL can operate in nonreal-time upon previously generated and stored digital equivalent values of the periodic electrical signal or signals.

Commutated automatic gain control system

NASA Technical Reports Server (NTRS)

Yost, S. R.

1982-01-01

A commutated automatic gain control (AGC) system was designed and built for a prototype Loran C receiver. The receiver uses a microcomputer to control a memory aided phase-locked loop (MAPLL). The microcomputer also controls the input/output, latitude/longitude conversion, and the recently added AGC system. The circuit designed for the AGC is described, and bench and flight test results are presented. The AGC circuit described actually samples starting at a point 40 microseconds after a zero crossing determined by the software lock pulse ultimately generated by a 30 microsecond delay and add network in the receiver front end envelope detector.

An open source digital servo for atomic, molecular, and optical physics experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Leibrandt, D. R., E-mail: david.leibrandt@nist.gov; Heidecker, J.

2015-12-15

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of themore » laser used to probe the narrow clock transition of {sup 27}Al{sup +} in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.« less

An open source digital servo for atomic, molecular, and optical physics experiments.

PubMed

Leibrandt, D R; Heidecker, J

2015-12-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of (27)Al(+) in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.

An open source digital servo for atomic, molecular, and optical physics experiments

NASA Astrophysics Data System (ADS)

Leibrandt, D. R.; Heidecker, J.

2015-12-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of 27Al+ in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.

An open source digital servo for atomic, molecular, and optical physics experiments

PubMed Central

Leibrandt, D. R.; Heidecker, J.

2016-01-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of 27Al+ in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser. PMID:26724014

Improvements in deep-space tracking by use of third-order loops.

NASA Technical Reports Server (NTRS)

Tausworth, R. C.; Crow, R. B.

1972-01-01

Third-order phase-locked receivers have not yet found wide application in deep-space communications systems because the second-order systems now used have performed adequately on past spacecraft missions. However, a survey of the doppler profiles for future missions shows that an unaided second-order loop may be unable to perform within reasonable error bounds. This article discusses the characteristics of a simple third-order extension to present second-order systems that not only extends doppler-tracking capability, but widens the pull-in range and decreases pull-in time as well.

Photonic Applications Using Electrooptic Optical Signal Processors

DTIC Science & Technology

2011-11-16

analog-to-digital conversion using a continuous wave multiwavelength source and phase modulation Author(s): Bortnik, B.J.; Fetterman, H.R. Source... multiwavelength source and phase modulation Bartosz J. Bortnik* and Harold R. Fetterman Department of Electrical Engineering, University of California Los...utilizing a cw multiwavelength source and phase modulation instead of a mode-locked laser is presented. The output of the cw multiwave- length source

Double closed-loop resonant micro optic gyro using hybrid digital phase modulation.

PubMed

Ma, Huilian; Zhang, Jianjie; Wang, Linglan; Jin, Zhonghe

2015-06-15

It is well-known that the closed-loop operation in optical gyros offers wider dynamic range and better linearity. By adding a stair-like digital serrodyne wave to a phase modulator can be used as a frequency shifter. The width of one stair in this stair-like digital serrodyne wave should be set equal to the optical transmission time in the resonator, which is relaxed in the hybrid digital phase modulation (HDPM) scheme. The physical mechanism for this relaxation is firstly indicated in this paper. Detailed theoretical and experimental investigations are presented for the HDPM. Simulation and experimental results show that the width of one stair is not restricted by the optical transmission time, however, it should be optimized according to the rise time of the output of the digital-to-analogue converter. Based on the optimum parameters of the HDPM, a bias stability of 0.05°/s for the integration time of 400 seconds in 1 h has been carried out in an RMOG with a waveguide ring resonator with a length of 7.9 cm and a diameter of 2.5 cm.

Frequency-Locked Detector Threshold Setting Criteria Based on Mean-Time-To-Lose-Lock (MTLL) for GPS Receivers

PubMed Central

Zhao, Na; Qin, Honglei; Sun, Kewen; Ji, Yuanfa

2017-01-01

Frequency-locked detector (FLD) has been widely utilized in tracking loops of Global Positioning System (GPS) receivers to indicate their locking status. The relation between FLD and lock status has been seldom discussed. The traditional PLL experience is not suitable for FLL. In this paper, the threshold setting criteria for frequency-locked detector in the GPS receiver has been proposed by analyzing statistical characteristic of FLD output. The approximate probability distribution of frequency-locked detector is theoretically derived by using a statistical approach, which reveals the relationship between probabilities of frequency-locked detector and the carrier-to-noise ratio (C/N0) of the received GPS signal. The relationship among mean-time-to-lose-lock (MTLL), detection threshold and lock probability related to C/N0 can be further discovered by utilizing this probability. Therefore, a theoretical basis for threshold setting criteria in frequency locked loops for GPS receivers is provided based on mean-time-to-lose-lock analysis. PMID:29207546

Frequency-Locked Detector Threshold Setting Criteria Based on Mean-Time-To-Lose-Lock (MTLL) for GPS Receivers.

PubMed

Jin, Tian; Yuan, Heliang; Zhao, Na; Qin, Honglei; Sun, Kewen; Ji, Yuanfa

2017-12-04

Frequency-locked detector (FLD) has been widely utilized in tracking loops of Global Positioning System (GPS) receivers to indicate their locking status. The relation between FLD and lock status has been seldom discussed. The traditional PLL experience is not suitable for FLL. In this paper, the threshold setting criteria for frequency-locked detector in the GPS receiver has been proposed by analyzing statistical characteristic of FLD output. The approximate probability distribution of frequency-locked detector is theoretically derived by using a statistical approach, which reveals the relationship between probabilities of frequency-locked detector and the carrier-to-noise ratio ( C / N ₀) of the received GPS signal. The relationship among mean-time-to-lose-lock (MTLL), detection threshold and lock probability related to C / N ₀ can be further discovered by utilizing this probability. Therefore, a theoretical basis for threshold setting criteria in frequency locked loops for GPS receivers is provided based on mean-time-to-lose-lock analysis.

Clock recovery for high-speed optical communication

NASA Astrophysics Data System (ADS)

Pedrotti, Kenneth D.

1996-01-01

This paper reviews recent results for clock recovery circuits operating at speeds in excess of 1 Gbit/sec or realized as multichannel arrays. The emphasis is on synchronous optical network (SONET) type systems, their requirements, and the effect of the clock recovery circuits on system performance. Clock recovery approaches include filter based, phase-locked-loops, and all-optical methods.

Chip Scale Atomic Resonator Frequency Stabilization System With Ultra-Low Power Consumption for Optoelectronic Oscillators.

PubMed

Zhao, Jianye; Zhang, Yaolin; Lu, Haoyuan; Hou, Dong; Zhang, Shuangyou; Wang, Zhong

2016-07-01

We present a long-term chip scale stabilization scheme for optoelectronic oscillators (OEOs) based on a rubidium coherent population trapping (CPT) atomic resonator. By locking a single mode of an OEO to the (85)Rb 3.035-GHz CPT resonance utilizing an improved phase-locked loop (PLL) with a PID regulator, we achieved a chip scale frequency stabilization system for the OEO. The fractional frequency stability of the stabilized OEO by overlapping Allan deviation reaches 6.2 ×10(-11) (1 s) and  ∼ 1.45 ×10 (-11) (1000 s). This scheme avoids a decrease in the extra phase noise performance induced by the electronic connection between the OEO and the microwave reference in common injection locking schemes. The total physical package of the stabilization system is [Formula: see text] and the total power consumption is 400 mW, which provides a chip scale and portable frequency stabilization approach with ultra-low power consumption for OEOs.

Fast, externally triggered, digital phase controller for an optical lattice

NASA Astrophysics Data System (ADS)

Sadgrove, Mark; Nakagawa, Ken'ichi

2011-11-01

We present a method to control the phase of an optical lattice according to an external trigger signal. The method has a latency of less than 30 μs. Two phase locked digital synthesizers provide the driving signal for two acousto-optic modulators which control the frequency and phase of the counter-propagating beams which form a standing wave (optical lattice). A micro-controller with an external interrupt function is connected to the desired external signal, and updates the phase register of one of the synthesizers when the external signal changes. The standing wave (period λ/2 = 390 nm) can be moved by units of 49 nm with a mean jitter of 28 nm. The phase change is well known due to the digital nature of the synthesizer, and does not need calibration. The uses of the scheme include coherent control of atomic matter-wave dynamics.

An Integrated Programmable Wide-range PLL for Switching Synchronization in Isolated DC-DC Converters

NASA Astrophysics Data System (ADS)

Fard, Miad

In this thesis, two Phase-Locked-Loop (PLL) based synchronization schemes are introduced and applied to a bi-directional Dual-Active-Bridge (DAB) dc-dc converter with an input voltage up to 80 V switching in the range of 250 kHz to 1 MHz. The two schemes synchronize gating signals across an isolated boundary without the need for an isolator per transistor. The Power Transformer Sensing (PTS) method utilizes the DAB power transformer to indirectly sense switching on the secondary side of the boundary, while the Digital Isolator Sensing (DIS) method utilizes a miniature transformer for synchronization and communication at up to 100 MHz. The PLL is implemented on-chip, and is used to control an external DAB power-stage. This work will lead to lower cost, high-frequency isolated dc-dc converters needed for a wide variety of emerging low power applications where isolator cost is relatively high and there is a demand for the reduction of parts.

A compensation scheme for tape-speed variation in cassette recorders.

PubMed

Wodicka, G R; Aguirre, A; Burns, S K; Shannon, D C

1988-06-01

A scheme to reduce the data corruption caused by tape-speed variation in cassette recorders used for monitoring infant apnea was developed. Low-frequency timing information is recorded on the tape, under the constraints of the frequency response of the recorder, simultaneously with the other signals. This information is extracted during playback and multiplied to a frequency suitable for data sampling, using an electronic, phase-locked loop. Analog-to-digital conversion of the data is performed at a rate proportional to the tape speed, resulting in compensation for speed variation. No direct modification of the speed-control mechanism of the recorder is required. The scheme was evaluated by comparing interval measurements of recorded timing information with and without compensation. Compensation reduced the error of the measurement by nearly an order of magnitude, which was consistent with theoretical predictions. This allows analysis of clinical value to be performed on signals recorded by systems that lack sophisticated speed-control mechanisms.

A CMOS Pressure Sensor Tag Chip for Passive Wireless Applications

PubMed Central

Deng, Fangming; He, Yigang; Li, Bing; Zuo, Lei; Wu, Xiang; Fu, Zhihui

2015-01-01

This paper presents a novel monolithic pressure sensor tag for passive wireless applications. The proposed pressure sensor tag is based on an ultra-high frequency RFID system. The pressure sensor element is implemented in the 0.18 µm CMOS process and the membrane gap is formed by sacrificial layer release, resulting in a sensitivity of 1.2 fF/kPa within the range from 0 to 600 kPa. A three-stage rectifier adopts a chain of auxiliary floating rectifier cells to boost the gate voltage of the switching transistors, resulting in a power conversion efficiency of 53% at the low input power of −20 dBm. The capacitive sensor interface, using phase-locked loop archietcture, employs fully-digital blocks, which results in a 7.4 bits resolution and 0.8 µW power dissipation at 0.8 V supply voltage. The proposed passive wireless pressure sensor tag costs a total 3.2 µW power dissipation. PMID:25806868

A CMOS pressure sensor tag chip for passive wireless applications.

PubMed

Deng, Fangming; He, Yigang; Li, Bing; Zuo, Lei; Wu, Xiang; Fu, Zhihui

2015-03-23

This paper presents a novel monolithic pressure sensor tag for passive wireless applications. The proposed pressure sensor tag is based on an ultra-high frequency RFID system. The pressure sensor element is implemented in the 0.18 µm CMOS process and the membrane gap is formed by sacrificial layer release, resulting in a sensitivity of 1.2 fF/kPa within the range from 0 to 600 kPa. A three-stage rectifier adopts a chain of auxiliary floating rectifier cells to boost the gate voltage of the switching transistors, resulting in a power conversion efficiency of 53% at the low input power of -20 dBm. The capacitive sensor interface, using phase-locked loop archietcture, employs fully-digital blocks, which results in a 7.4 bits resolution and 0.8 µW power dissipation at 0.8 V supply voltage. The proposed passive wireless pressure sensor tag costs a total 3.2 µW power dissipation.

Novel Concrete Temperature Monitoring Method Based on an Embedded Passive RFID Sensor Tag.

PubMed

Liu, Yongsheng; Deng, Fangming; He, Yigang; Li, Bing; Liang, Zhen; Zhou, Shuangxi

2017-06-22

This paper firstly introduces the importance of temperature control in concrete measurement, then a passive radio frequency identification (RFID) sensor tag embedded for concrete temperature monitoring is presented. In order to reduce the influences of concrete electromagnetic parameters during the drying process, a T-type antenna is proposed to measure the concrete temperature at the required depth. The proposed RFID sensor tag is based on the EPC generation-2 ultra-high frequency (UHF) communication protocol and operates in passive mode. The temperature sensor can convert the sensor signals to corresponding digital signals without an external reference clock due to the adoption of phase-locked loop (PLL)-based architecture. Laboratory experimentation and on-site testing demonstrate that our sensor tag embedded in concrete can provide reliable communication performance in passive mode. The maximum communicating distance between reader and tag is 7 m at the operating frequency of 915 MHz and the tested results show high consistency with the results tested by a thermocouple.

Novel Concrete Temperature Monitoring Method Based on an Embedded Passive RFID Sensor Tag

PubMed Central

Liu, Yongsheng; Deng, Fangming; He, Yigang; Li, Bing; Liang, Zhen; Zhou, Shuangxi

2017-01-01

This paper firstly introduces the importance of temperature control in concrete measurement, then a passive radio frequency identification (RFID) sensor tag embedded for concrete temperature monitoring is presented. In order to reduce the influences of concrete electromagnetic parameters during the drying process, a T-type antenna is proposed to measure the concrete temperature at the required depth. The proposed RFID sensor tag is based on the EPC generation-2 ultra-high frequency (UHF) communication protocol and operates in passive mode. The temperature sensor can convert the sensor signals to corresponding digital signals without an external reference clock due to the adoption of phase-locked loop (PLL)-based architecture. Laboratory experimentation and on-site testing demonstrate that our sensor tag embedded in concrete can provide reliable communication performance in passive mode. The maximum communicating distance between reader and tag is 7 m at the operating frequency of 915 MHz and the tested results show high consistency with the results tested by a thermocouple. PMID:28640188

Design and implementation of a micromechanical silicon resonant accelerometer.

PubMed

Huang, Libin; Yang, Hui; Gao, Yang; Zhao, Liye; Liang, Jinxing

2013-11-19

The micromechanical silicon resonant accelerometer has attracted considerable attention in the research and development of high-precision MEMS accelerometers because of its output of quasi-digital signals, high sensitivity, high resolution, wide dynamic range, anti-interference capacity and good stability. Because of the mismatching thermal expansion coefficients of silicon and glass, the micromechanical silicon resonant accelerometer based on the Silicon on Glass (SOG) technique is deeply affected by the temperature during the fabrication, packaging and use processes. The thermal stress caused by temperature changes directly affects the frequency output of the accelerometer. Based on the working principle of the micromechanical resonant accelerometer, a special accelerometer structure that reduces the temperature influence on the accelerometer is designed. The accelerometer can greatly reduce the thermal stress caused by high temperatures in the process of fabrication and packaging. Currently, the closed-loop drive circuit is devised based on a phase-locked loop. The unloaded resonant frequencies of the prototype of the micromechanical silicon resonant accelerometer are approximately 31.4 kHz and 31.5 kHz. The scale factor is 66.24003 Hz/g. The scale factor stability is 14.886 ppm, the scale factor repeatability is 23 ppm, the bias stability is 23 μg, the bias repeatability is 170 μg, and the bias temperature coefficient is 0.0734 Hz/°C.

Advanced technology satellite demodulator development

NASA Technical Reports Server (NTRS)

Ames, Stephen A.

1989-01-01

Ford Aerospace has developed a proof-of-concept satellite 8 phase shift keying (PSK) modulation and coding system operating in the Time Division Multiple Access (TDMA) mode at a data range of 200 Mbps using rate 5/6 forward error correction coding. The 80 Msps 8 PSK modem was developed in a mostly digital form and is amenable to an ASIC realization in the next phase of development. The codec was developed as a paper design only. The power efficiency goal was to be within 2 dB of theoretical at a bit error rate (BER) of 5x10(exp 7) while the measured implementation loss was 4.5 dB. The bandwidth efficiency goal was 2 bits/sec/Hz while the realized bandwidth efficiency was 1.8 bits/sec/Hz. The burst format used a preamble of only 40 8 PSK symbol times including 32 symbols of all zeros and an eight symbol unique word. The modem and associated special test equipment (STE) were fabricated mostly on a specially designed stitch-weld board although a few of the highest rate circuits were built on printed circuit cards. All the digital circuits were ECL to support the clock rates of from 80 MHz to 360 MHz. The transmitter and receiver matched filters were square-root Nyquist bandpass filters realized at the 3.37 GHz i.f. The modem operated as a coherent system although no analog phase locked (PLL) loop was employed. Within the budgetary constraints of the program, the approach to the demodulator has been proven and is eligible to proceed to the next phase of development of a satellite demodulator engineering model. This would entail the development of an ASIC version of the digital portion of the demodulator, and MMIC version of the quadrature detector, and SAW Nyquist filters to realize the bandwidth efficiency.

Multiplexing Readout of TES Microcalorimeters Based on Analog Baseband Feedback

DOE Office of Scientific and Technical Information (OSTI.GOV)

Takei, Y.; Yamasaki, N.Y; Mitsuda, K.

2009-12-16

A TES microcalorimeter array is a promising spectrometer with excellent energy resolution and a moderate imaging capability. To realize a large format array in space, multiplexing the TES signals at the low tempersture stage is mandatory. We are developing frequency division multiplexing (FDM) based on baseband feedback technique. In FDM, each TES is AC-biased with a different carrier frequency. Signals from several pixels are summed and then read out by one SQUID. The maximum number of multiplexed pixels are limited by the frequency band in which the SQUID can be operated in a flux-locked loop, which is {approx}1 MHz withmore » standard flux-locked loop circuit. In the baseband feedback, the signal ({approx}10 kHz band) from the TES is once demodulated. Then a reconstructed copy of the modulated signal with an appropriate phase is fed back to the SQUID input coil to maintain an approximately constant magnetic flux. This can be implemented even for large cable delays and automatically suppresses the carrier. We developed a prototype electronics for the baseband feedback based on an analog phase sensitive detector (PSD) and a multiplier. Combined with Seiko 80-SSA SQUID amp, open-loop gain of 8 has been obtained for 10 kHz baseband signal at 5 MHz carrier frequency, with a moderate noise contribution of 27pA/{radical}(Hz) at input.« less

A 65nm CMOS low-power MedRadio-band integer-N cascaded phase-locked loop for implantable medical systems.

PubMed

Wang, Yi-Xiao; Chen, Wei-Ming; Wu, Chung-Yu

2014-01-01

This paper presents a low-power MedRadio-band integer-N phase-locked Loop (PLL) system which is composed of two charge-pump PLLs cascade connected. The PLL provides the operation clock and local carrier signals for an implantable medical electronic system. In addition, to avoid the off-chip crystal oscillator, the 13.56 MHz Industrial, Scientific and Medical (ISM) band signal from the wireless power transmission system is adopted as the input reference signal for the PLL. Ring-based voltage controlled oscillators (VCOs) with current control units are adopted to reduce chip area and power dissipation. The proposed cascaded PLL system is designed and implemented in TSMC 65-nm CMOS technology. The measured jitter for 216.96 MHz signal is 12.23 ps and the phase noise is -65.9 dBc/Hz at 100 kHz frequency offset under 402.926 MHz carrier frequency. The measured power dissipations are 66 μW in the first PLL and 195 μW in the whole system under 1-V supply voltage. The chip area is 0.1088 mm(2) and no off-chip component is required which is suitable for the integration of the implantable medical electronic system.

A scalable, self-analyzing digital locking system for use on quantum optics experiments.

PubMed

Sparkes, B M; Chrzanowski, H M; Parrain, D P; Buchler, B C; Lam, P K; Symul, T

2011-07-01

Digital control of optics experiments has many advantages over analog control systems, specifically in terms of the scalability, cost, flexibility, and the integration of system information into one location. We present a digital control system, freely available for download online, specifically designed for quantum optics experiments that allows for automatic and sequential re-locking of optical components. We show how the inbuilt locking analysis tools, including a white-noise network analyzer, can be used to help optimize individual locks, and verify the long term stability of the digital system. Finally, we present an example of the benefits of digital locking for quantum optics by applying the code to a specific experiment used to characterize optical Schrödinger cat states.

Coherent detection in optical fiber systems.

PubMed

Ip, Ezra; Lau, Alan Pak Tao; Barros, Daniel J F; Kahn, Joseph M

2008-01-21

The drive for higher performance in optical fiber systems has renewed interest in coherent detection. We review detection methods, including noncoherent, differentially coherent, and coherent detection, as well as a hybrid method. We compare modulation methods encoding information in various degrees of freedom (DOF). Polarization-multiplexed quadrature-amplitude modulation maximizes spectral efficiency and power efficiency, by utilizing all four available DOF, the two field quadratures in the two polarizations. Dual-polarization homodyne or heterodyne downconversion are linear processes that can fully recover the received signal field in these four DOF. When downconverted signals are sampled at the Nyquist rate, compensation of transmission impairments can be performed using digital signal processing (DSP). Linear impairments, including chromatic dispersion and polarization-mode dispersion, can be compensated quasi-exactly using finite impulse response filters. Some nonlinear impairments, such as intra-channel four-wave mixing and nonlinear phase noise, can be compensated partially. Carrier phase recovery can be performed using feedforward methods, even when phase-locked loops may fail due to delay constraints. DSP-based compensation enables a receiver to adapt to time-varying impairments, and facilitates use of advanced forward-error-correction codes. We discuss both single- and multi-carrier system implementations. For a given modulation format, using coherent detection, they offer fundamentally the same spectral efficiency and power efficiency, but may differ in practice, because of different impairments and implementation details. With anticipated advances in analog-to-digital converters and integrated circuit technology, DSP-based coherent receivers at bit rates up to 100 Gbit/s should become practical within the next few years.

High-speed electromechanical chutter for imaging spectrographs

NASA Technical Reports Server (NTRS)

Nguyen, Quang-Viet (Inventor)

2005-01-01

The present invention presents a high-speed electromechanical shutter which has at least two rotary beam choppers that are synchronized using a phase-locked loop electronic control to reduce the duty cycle. These choppers have blade means that can comprise discs or drums, each having about 60 (+/- 15) slots which are from about 0.3 to about 0.8 mm wide and about 5 to about 20 nun long (radially) which are evenly distributed through out 360 deg, and a third rotary chopper which is optically aligned has a small number of slots, such as for example, 1 to 10 slots which are about 1 to about 2 mm wide and about 5 to about 20 mm long (radially). Further the blade means include phase slots that allow the blade means to be phase locked using a closed loop control circuit. In addition, in a preferred embodiment, the system also has a leaf shutter. Thus the invention preferably achieves a gate width of less than about 100 microseconds, using motors that operate at 3000 to 10,OOO rpm, and with a phase jitter of less than about 1.5 microseconds, and further using an aperture with more than about 75% optical transmission with a clear aperture of about 0.8 -10 nun. The system can be synchronized to external sources at 0 6 kHz lasers, data acquisition systems, and cameras.

High-speed electromechanical shutter for imaging spectrographs

NASA Technical Reports Server (NTRS)

Nguyen, Quang-Viet (Inventor)

2005-01-01

The present invention presents a high-speed electromechanical shutter which has at least two rotary beam choppers that are synchronized using a phase-locked loop electronic control to reduce the duty cycle. These choppers have blade means that can comprise discs or drums, each having about 60 (+/-15) slots which are from about 0.3 to about 0.8 mm wide and about 5 to about 20 mm long (radially) which are evenly distributed through out 360?, and a third rotary chopper which is optically aligned has a small number of slots, such as for example, 1 to 10 slots which are about 1 to about 2 mm wide and about 5 to about 20 mm long (radially). Further the blade means include phase slots that allow the blade means to be phase locked using a closed loop control circuit. In addition, in a preferred embodiment, the system also has a leaf shutter. Thus the invention preferably achieves a gate width of less than about 100 microseconds, using motors that operate at 3000 to 10,000 rpm, and with a phase jitter of less than about 1.5 microseconds, and further using an aperture with more than about 75% optical transmission with a clear aperture of about 0.8 mm?10 mm. The system can be synchronized to external sources at 0 6 kHz lasers, data acquisition systems, and cameras.