Comparison between phase-shift full-bridge converters with noncoupled and coupled current-doubler rectifier.

PubMed

Tsai, Cheng-Tao; Su, Jye-Chau; Tseng, Sheng-Yu

2013-01-01

This paper presents comparison between phase-shift full-bridge converters with noncoupled and coupled current-doubler rectifier. In high current capability and high step-down voltage conversion, a phase-shift full-bridge converter with a conventional current-doubler rectifier has the common limitations of extremely low duty ratio and high component stresses. To overcome these limitations, a phase-shift full-bridge converter with a noncoupled current-doubler rectifier (NCDR) or a coupled current-doubler rectifier (CCDR) is, respectively, proposed and implemented. In this study, performance analysis and efficiency obtained from a 500 W phase-shift full-bridge converter with two improved current-doubler rectifiers are presented and compared. From their prototypes, experimental results have verified that the phase-shift full-bridge converter with NCDR has optimal duty ratio, lower component stresses, and output current ripple. In component count and efficiency comparison, CCDR has fewer components and higher efficiency at full load condition. For small size and high efficiency requirements, CCDR is relatively suitable for high step-down voltage and high efficiency applications.

A Digital Radio Receiver for Ionospheric Research

DTIC Science & Technology

2006-06-01

amplification, the signals are digitized and then processed by a digital down converter ( DDC ) and decimating low-pass filter. The resultant digital...images. 14. ABSTRACT 15. SUBJECT TERMS 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT UU 18. NUMBER OF PAGES 41 19a. NAME OF...the University of Calgary under a Contributions Agreement contract awarded by the Canadian Space Agency. The present paper follows an earlier article

Microwave Imaging Radar Reflectometer System Utilizing Digital Beam Forming

NASA Astrophysics Data System (ADS)

Hu, Fengqi; Li, Meijiao; Domier, Calvin W.; Liu, Xiaoguang; Luhmann, Neville C., Jr.

2016-10-01

Microwave Imaging Reflectometry is a radar-like technique developed to measure the electron density fluctuations in fusion plasmas. Phased Antenna Arrays can serve as electronically controlled ``lenses'' that can generate the required wavefronts by phase shifting and amplitude scaling, which is being realized in the digital domain with higher flexibility and faster processing speed. In the transmitter, the resolution of the phase control is 1.4 degrees and the amplitude control is 0.5 dB/ step. A V-band double-sided, printed bow tie antenna which exhibits 49% bandwidth (46 - 76 GHz) is employed. The antenna is fed by a microstrip transmission line for easy impedance matching. The simple structure and the small antenna are suitable for low cost fabrication, easy circuit integration, and phased antenna array multi-frequency applications. In the receiver part, a sub-array of 32 channels with 200 mil spacing is used to collect the scattered reflected signal from one unit spot on the plasma cutoff surface. Pre-amplification is used to control the noise level of the system and wire bondable components are used to accommodate the small spacing between each channel. After down converting, base band signals are digitized and processed in an FPGA module. U.S. Department of Energy Grant No. DE-FG02-99ER54531.

Optical encryption interface

NASA Technical Reports Server (NTRS)

Jackson, Deborah J. (Inventor)

1998-01-01

An analog optical encryption system based on phase scrambling of two-dimensional optical images and holographic transformation for achieving large encryption keys and high encryption speed. An enciphering interface uses a spatial light modulator for converting a digital data stream into a two dimensional optical image. The optical image is further transformed into a hologram with a random phase distribution. The hologram is converted into digital form for transmission over a shared information channel. A respective deciphering interface at a receiver reverses the encrypting process by using a phase conjugate reconstruction of the phase scrambled hologram.

Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

NASA Astrophysics Data System (ADS)

Liu, Lintao; Gao, Yuhan; Deng, Jun

2017-11-01

This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

Optical analog-to-digital converter

DOEpatents

Vawter, G Allen [Corrales, NM; Raring, James [Goleta, CA; Skogen, Erik J [Albuquerque, NM

2009-07-21

An optical analog-to-digital converter (ADC) is disclosed which converts an input optical analog signal to an output optical digital signal at a sampling rate defined by a sampling optical signal. Each bit of the digital representation is separately determined using an optical waveguide interferometer and an optical thresholding element. The interferometer uses the optical analog signal and the sampling optical signal to generate a sinusoidally-varying output signal using cross-phase-modulation (XPM) or a photocurrent generated from the optical analog signal. The sinusoidally-varying output signal is then digitized by the thresholding element, which includes a saturable absorber or at least one semiconductor optical amplifier, to form the optical digital signal which can be output either in parallel or serially.

Autonomous Telemetry Collection for Single-Processor Small Satellites

NASA Technical Reports Server (NTRS)

Speer, Dave

2003-01-01

For the Space Technology 5 mission, which is being developed under NASA's New Millennium Program, a single spacecraft processor will be required to do on-board real-time computations and operations associated with attitude control, up-link and down-link communications, science data processing, solid-state recorder management, power switching and battery charge management, experiment data collection, health and status data collection, etc. Much of the health and status information is in analog form, and each of the analog signals must be routed to the input of an analog-to-digital converter, converted to digital form, and then stored in memory. If the micro-operations of the analog data collection process are implemented in software, the processor may use up a lot of time either waiting for the analog signal to settle, waiting for the analog-to-digital conversion to complete, or servicing a large number of high frequency interrupts. In order to off-load a very busy processor, the collection and digitization of all analog spacecraft health and status data will be done autonomously by a field-programmable gate array that can configure the analog signal chain, control the analog-to-digital converter, and store the converted data in memory.

The design and implementation of a broadband digital low-level RF control system for the cyclotron accelerators at iThemba LABS

NASA Astrophysics Data System (ADS)

Duckitt, W. D.; Conradie, J. L.; van Niekerk, M. J.; Abraham, J. K.; Niesler, T. R.

2018-07-01

iThemba LABS has successfully designed a new broadband digital low-level RF control system for cyclotrons, that operates over the wide frequency range of 2-100 MHz and can achieve peak-peak amplitude and phase stabilities of 0.01% and 0.01°, respectively. The presented system performs direct digital synthesis (DDS) to directly convert the digital RF signals to analog RF and local-oscillator (LO) signals with 16-bit amplitude accuracy, programmable in steps of 1 μHz and 0.0001°. Down-conversion of the RF pick-up signals to an optimal intermediate frequency (IF) of 1 MHz and sampling of the IF channels by 16-bit, single sample-latency 10 MHz ADCs was implemented to allow digital high-speed low-latency in-phase/quadrature (I/Q) demodulation of the IF channels within the FPGA. This in turn allows efficient real-time digital closed-loop control of the amplitude and phase of the RF drive-signal to be achieved. The systems have been successfully integrated at iThemba LABS into the K = 8 and K = 10 injector cyclotrons (SPC1, and SPC2), the K = 200 separated sector cyclotron (SSC), the SSC flat-topping system, the pulse-selector system and the AX , J, and K-line RF bunchers. The systems have led to a substantial improvement in the beam quality of the SSC at iThemba LABS with a reduction in beam losses by more than 90%. The design, implementation and performance is discussed.

Programmable Oscillator

NASA Technical Reports Server (NTRS)

Quirk, Kevin J.; Patawaran, Ferze D.; Nguyen, Danh H.; Lee, Clement G.; Nguyen, Huy

2011-01-01

A programmable oscillator is a frequency synthesizer with an output phase that tracks an arbitrary function. An offset, phase-locked loop circuit is used in combination with an error control feedback loop to precisely control the output phase of the oscillator. To down-convert the received signal, several stages of mixing may be employed with the compensation for the time-base distortion of the carrier occurring at any one of those stages. In the Goldstone Solar System Radar (GSSR), the compensation occurs in the mixing from an intermediate frequency (IF), whose value is dependent on the station and band, to a common IF used in the final stage of down-conversion to baseband. The programmable oscillator (PO) is used in the final stage of down-conversion to generate the IF, along with a time-varying phase component that matches the time-base distortion of the carrier, thus removing it from the final down-converted signal.

Evaluation of quadrature-phase-shift-keying signal characteristics in W-band radio-over-fiber transmission using direct in-phase/quadrature-phase conversion technique

NASA Astrophysics Data System (ADS)

Suzuki, Meisaku; Kanno, Atsushi; Yamamoto, Naokatsu; Sotobayashi, Hideyuki

2016-02-01

The effects of in-phase/quadrature-phase (IQ) imbalances are evaluated with a direct IQ down-converter in the W-band (75-110 GHz). The IQ imbalance of the converter is measured within a range of +/-10 degrees in an intermediate frequency of DC-26.5 GHz. 1-8-G-baud quadrature phase-shift keying (QPSK) signals are transmitted successfully with observed bit error rates within a forward error correction limit of 2×10-3 using radio over fiber (RoF) techniques. The direct down-conversion technique is applicable to next-generation high-speed wireless access communication systems in the millimeter-wave band.

The Setup Phase of Project Open Book: A Report to the Commission on Preservation and Access on the Status of an Effort to Convert Microfilm to Digital Imagery.

ERIC Educational Resources Information Center

Conway, Paul; Weaver, Shari

1994-01-01

This report documents the second phase of Yale University's Project Open Book, which explored the uses of digital technology for preservation of and access to deteriorating documents. Highlights include preconditions for project implementation; quality digital conversion; characteristics of source materials; digital document indexing; workflow…

Digital Front End for Wide-Band VLBI Science Receiver

NASA Technical Reports Server (NTRS)

Jongeling, Andre; Sigman, Elliott; Navarro, Robert; Goodhart, Charles; Rogstad, Steve; Chandra, Kumar; Finley, Sue; Trinh, Joseph; Soriano, Melissa; White, Les;

Single-Stage Step up/down Driver for Permanent-Magnet Synchronous Machines

NASA Astrophysics Data System (ADS)

Chen, T. R.; Juan, Y. L.; Huang, C. Y.; Kuo, C. T.

2017-11-01

The two-stage circuit composed of a step up/down dc converter and a three-phase voltage source inverter is usually adopted as the electric vehicle’s motor driver. The conventional topology is more complicated. Additional power loss resulted from twice power conversion would also cause lower efficiency. A single-stage step up/down Permanent-Magnet Synchronous Motor driver for Brushless DC (BLDC) Motor is proposed in this study. The number components and circuit complexity are reduced. The low frequency six-step square-wave control is used to reduce the switching losses. In the proposed topology, only one active switch is gated with a high frequency PWM signal for adjusting the rotation speed. The rotor position signals are fed back to calculate the motor speed for digital close-loop control in a MCU. A 600W prototype circuit is constructed to drive a BLDC motor with rated speed 3000 rpm, and can control the speed of six sections.

Parallel Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren N.; Hinedi, Sami M.

1995-01-01

Wide-band microwave receivers of proposed type include digital phase-locked loops in which band-pass filtering and down-conversion of input signals implemented by banks of multirate digital filters operating in parallel. Called "parallel digital phase-locked loops" to distinguish them from other digital phase-locked loops. Systems conceived as cost-effective solution to problem of filtering signals at high sampling rates needed to accommodate wide input frequency bands. Each of M filters process 1/M of spectrum of signal.

Subnanosecond time-to-digital converter implemented in a Kintex-7 FPGA

NASA Astrophysics Data System (ADS)

Sano, Y.; Horii, Y.; Ikeno, M.; Sasaki, O.; Tomoto, M.; Uchida, T.

2017-12-01

Time-to-digital converters (TDCs) are used in various fields, including high-energy physics. One advantage of implementing TDCs in field-programmable gate arrays (FPGAs) is the flexibility on the modification of the logics, which is useful to cope with the changes in the experimental conditions. Recent FPGAs make it possible to implement TDCs with a time resolution less than 10 ps. On the other hand, various drift chambers require a time resolution of O(0.1) ns, and a simple and easy-to-implement TDC is useful for a robust operation. Herein an eight-channel TDC with a variable bin size down to 0.28 ns is implemented in a Xilinx Kintex-7 FPGA and tested. The TDC is based on a multisampling scheme with quad phase clocks synchronised with an external reference clock. Calibration of the bin size is unnecessary if a stable reference clock is available, which is common in high-energy physics experiments. Depending on the channel, the standard deviation of the differential nonlinearity for a 0.28 ns bin size is 0.13-0.31. The performance has a negligible dependence on the temperature. The power consumption and the potential to extend the number of channels are also discussed.

Multi-DSP and FPGA based Multi-channel Direct IF/RF Digital receiver for atmospheric radar

NASA Astrophysics Data System (ADS)

Yasodha, Polisetti; Jayaraman, Achuthan; Kamaraj, Pandian; Durga rao, Meka; Thriveni, A.

2016-07-01

Modern phased array radars depend highly on digital signal processing (DSP) to extract the echo signal information and to accomplish reliability along with programmability and flexibility. The advent of ASIC technology has made various digital signal processing steps to be realized in one DSP chip, which can be programmed as per the application and can handle high data rates, to be used in the radar receiver to process the received signal. Further, recent days field programmable gate array (FPGA) chips, which can be re-programmed, also present an opportunity to utilize them to process the radar signal. A multi-channel direct IF/RF digital receiver (MCDRx) is developed at NARL, taking the advantage of high speed ADCs and high performance DSP chips/FPGAs, to be used for atmospheric radars working in HF/VHF bands. Multiple channels facilitate the radar t be operated in multi-receiver modes and also to obtain the wind vector with improved time resolution, without switching the antenna beam. MCDRx has six channels, implemented on a custom built digital board, which is realized using six numbers of ADCs for simultaneous processing of the six input signals, Xilinx vertex5 FPGA and Spartan6 FPGA, and two ADSPTS201 DSP chips, each of which performs one phase of processing. MCDRx unit interfaces with the data storage/display computer via two gigabit ethernet (GbE) links. One of the six channels is used for Doppler beam swinging (DBS) mode and the other five channels are used for multi-receiver mode operations, dedicatedly. Each channel has (i) ADC block, to digitize RF/IF signal, (ii) DDC block for digital down conversion of the digitized signal, (iii) decoding block to decode the phase coded signal, and (iv) coherent integration block for integrating the data preserving phase intact. ADC block consists of Analog devices make AD9467 16-bit ADCs, to digitize the input signal at 80 MSPS. The output of ADC is centered around (80 MHz - input frequency). The digitized data is fed to DDC block, which down converts the data to base-band. The DDC block has NCO, mixer and two chains of Bessel filters (fifth order cascaded integration comb filter, two FIR filters, two half band filters and programmable FIR filters) for in-phase (I) and Quadrature phase (Q) channels. The NCO has 32 bits and is set to match the output frequency of ADC. Further, DDC down samples (decimation) the data and reduces the data rate to 16 MSPS. This data is further decimated and the data rate is reduced down to 4/2/1/0.5/0.25/0.125/0.0625 MSPS for baud lengths 0.25/0.5/1/2/4/8/16 μs respectively. The down sampled data is then fed to decoding block, which performs cross correlation to achieve pulse compression of the binary-phase coded data to obtain better range resolution with maximum possible height coverage. This step improves the signal power by a factor equal to the length of the code. Coherent integration block integrates the decoded data coherently for successive pulses, which improves the signal to noise ratio and reduces the data volume. DDC, decoding and coherent integration blocks are implemented in Xilinx vertex5 FPGA. Till this point, function of all six channels is same for DBS mode and multi-receiver modes. Data from vertex5 FPGA is transferred to PC via GbE-1 interface for multi-modes or to two Analog devices make ADSP-TS201 DSP chips (A and B), via link port for DBS mode. ADSP-TS201 chips perform the normalization, DC removal, windowing, FFT computation and spectral averaging on the data, which is transferred to storage/display PC via GbE-2 interface for real-time data display and data storing. Physical layer of GbE interface is implemented in an external chip (Marvel 88E1111) and MAC layer is implemented internal to vertex5 FPGA. The MCDRx has total 4 GB of DDR2 memory for data storage. Spartan6 FPGA is used for generating timing signals, required for basic operation of the radar and testing of the MCDRx.

Fermilab Recycler Ring BPM Upgrade Based on Digital Receiver Technology

NASA Astrophysics Data System (ADS)

Webber, R.; Crisp, J.; Prieto, P.; Voy, D.; Briegel, C.; McClure, C.; West, R.; Pordes, S.; Mengel, M.

2004-11-01

Electronics for the 237 BPMs in the Fermilab Recycler Ring have been upgraded from a log-amplifier based system to a commercially produced digitizer-digital down converter based system. The hardware consists of a pre-amplifier connected to a split-plate BPM, an analog differential receiver-filter module and an 8-channel 80-MHz digital down converter VME board. The system produces position and intensity with a dynamic range of 30 dB and a resolution of ±10 microns. The position measurements are made on 2.5-MHz bunched beam and barrier buckets of the un-bunched beam. The digital receiver system operates in one of six different signal processing modes that include 2.5-MHz average, 2.5-MHz bunch-by-bunch, 2.5-MHz narrow band, unbunched average, un-bunched head/tail and 89-kHz narrow band. Receiver data is acquired on any of up to sixteen clock events related to Recycler beam transfers and other machine activities. Data from the digital receiver board are transferred to the front-end CPU for position and intensity computation on an on-demand basis through the VME bus. Data buffers are maintained for each of the acquisition events and support flash, closed orbit and turn-by-turn measurements. A calibration system provides evaluation of the BPM signal path and application programs.

Isolated step-down DC -DC converter for electric vehicles

NASA Astrophysics Data System (ADS)

Kukovinets, O. V.; Sidorov, K. M.; Yutt, V. E.

2018-02-01

Modern motor-vehicle industrial sector is moving rapidly now towards the electricity-driving cars production, improving their range and efficiency of components, and in particular the step-down DC/DC converter to supply the onboard circuit 12/24V of electric vehicle from the high-voltage battery. The purpose of this article - to identify the best circuitry topology to design an advanced step-down DC/DC converters with the smallest mass, volume, highest efficiency and power. And this will have a positive effect on driving distance of electric vehicle (EV). On the basis of computational research of existing and implemented circuit topologies of step-down DC/DC converters (serial resonant converter, full bridge with phase-shifting converter, LLC resonant converter) a comprehensive analysis was carried out on the following characteristics: specific volume, specific weight, power, efficiency. The data obtained was the basis for the best technical option - LLC resonant converter. The results can serve as a guide material in the process of components design of the traction equipment for electric vehicles, providing for the best technical solutions in the design and manufacturing of converting equipment, self-contained power supply systems and advanced driver assistance systems.

Application of the GNU Radio platform in the multistatic radar

NASA Astrophysics Data System (ADS)

Szlachetko, Boguslaw; Lewandowski, Andrzej

2009-06-01

This document presents the application of the Software Defined Radio-based platform in the multistatic radar. This platform consists of four-sensor linear antenna, Universal Software Radio Peripheral (USRP) hardware (radio frequency frontend) and GNU-Radio PC software. The paper provides information about architecture of digital signal processing performed by USRP's FPGA (digital down converting blocks) and PC host (implementation of the multichannel digital beamforming). The preliminary results of the signal recording performed by our experimental platform are presented.

Breaking down number syntax: spared comprehension of multi-digit numbers in a patient with impaired digit-to-word conversion.

PubMed

Dotan, Dror; Friedmann, Naama; Dehaene, Stanislas

2014-10-01

Can the meaning of two-digit Arabic numbers be accessed independently of their verbal-phonological representations? To answer this question we explored the number processing of ZN, an aphasic patient with a syntactic deficit in digit-to-verbal transcoding, who could hardly read aloud two-digit numbers, but could read them as single digits ("four, two"). Neuropsychological examination showed that ZN's deficit was neither in the digit input nor in the phonological output processes, as he could copy and repeat two-digit numbers. His deficit thus lied in a central process that converts digits to abstract number words and sends this information to phonological retrieval processes. Crucially, in spite of this deficit in number transcoding, ZN's two-digit comprehension was spared in several ways: (1) he could calculate two-digit additions; (2) he showed good performance in a two-digit comparison task, and a continuous distance effect; and (3) his performance in a task of mapping numbers to positions on an unmarked number line showed a logarithmic (nonlinear) factor, indicating that he represented two-digit Arabic numbers as holistic two-digit quantities. Thus, at least these aspects of number comprehension can be performed without converting the two-digit number from digits to verbal representation.

Digital-only PLL with adaptive search step

NASA Astrophysics Data System (ADS)

Lin, Ming-Lang; Huang, Shu-Chuan; Liu, Jie-Cherng

2014-06-01

In this paper, an all-digital phase-locked loop (PLL) with adaptively controlled up/down counter serves as the loop filter is presented, and it is implemented on a field-programmable gate array. The detailed circuit of the adaptive up/down counter implementing the adaptive search algorithm is also given, in which the search step for frequency acquisition is adaptively scaled down in half until it is reduced to zero. The phase jitter of the proposed PLL can be lowered, yet keeping with fast lock-in time. Thus, the dilemma between the low phase jitter and fast lock-in time of the traditional PLL can be resolved. Simulation results and circuit implementation show that the locked count, phase jitter and lock-in time of the proposed PLL are consistent with the theoretical predictions.

Inflight characterization and correction of Planck/HFI analog to digital converter nonlinearity

NASA Astrophysics Data System (ADS)

Sauvé, A.; Couchot, F.; Patanchon, G.; Montier, L.

2016-07-01

The Planck Satellite launched in 2009 was targeted to observe the anisotropies of the Cosmic Microwave Back-ground (CMB) to an unprecedented sensitivity. While the Analog to Digital Converter of the HFI (High Frequency Instrument) readout electronics had not been properly characterized on ground, it has been shown to add a systematic nonlinearity effect up to 2% of the cosmological signal. This was a limiting factor for CMB science at large angular scale. We will present the in-flight analysis and method used to characterize and correct this effect down to 0.05% level. We also discuss how to avoid this kind of complex issue for future missions.

Precision digital pulse phase generator

DOEpatents

McEwan, T.E.

1996-10-08

A timing generator comprises a crystal oscillator connected to provide an output reference pulse. A resistor-capacitor combination is connected to provide a variable-delay output pulse from an input connected to the crystal oscillator. A phase monitor is connected to provide duty-cycle representations of the reference and variable-delay output pulse phase. An operational amplifier drives a control voltage to the resistor-capacitor combination according to currents integrated from the phase monitor and injected into summing junctions. A digital-to-analog converter injects a control current into the summing junctions according to an input digital control code. A servo equilibrium results that provides a phase delay of the variable-delay output pulse to the output reference pulse that linearly depends on the input digital control code. 2 figs.

Precision digital pulse phase generator

DOEpatents

McEwan, Thomas E.

1996-01-01

A timing generator comprises a crystal oscillator connected to provide an output reference pulse. A resistor-capacitor combination is connected to provide a variable-delay output pulse from an input connected to the crystal oscillator. A phase monitor is connected to provide duty-cycle representations of the reference and variable-delay output pulse phase. An operational amplifier drives a control voltage to the resistor-capacitor combination according to currents integrated from the phase monitor and injected into summing junctions. A digital-to-analog converter injects a control current into the summing junctions according to an input digital control code. A servo equilibrium results that provides a phase delay of the variable-delay output pulse to the output reference pulse that linearly depends on the input digital control code.

An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers

PubMed Central

Anabtawi, Nijad; Ferzli, Rony; Harmanani, Haidar M.

2017-01-01

This paper presents a step down, switched mode power converter for use in multi-standard envelope tracking radio frequency power amplifiers (RFPA). The converter is based on a programmable order sigma delta modulator that can be configured to operate with either 1st, 2nd, 3rd or 4th order loop filters, eliminating the need for a bulky passive output filter. Output ripple, sideband noise and spectral emission requirements of different wireless standards can be met by configuring the modulator’s filter order and converter’s sampling frequency. The proposed converter is entirely digital and is implemented in 14nm bulk CMOS process for post layout verification. For an input voltage of 3.3V, the converter’s output can be regulated to any voltage level from 0.5V to 2.5V, at a nominal switching frequency of 150MHz. It achieves a maximum efficiency of 94% at 1.5 W output power. PMID:28919657

Harmonic arbitrary waveform generator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Roberts, Brock Franklin

2017-11-28

High frequency arbitrary waveforms have applications in radar, communications, medical imaging, therapy, electronic warfare, and charged particle acceleration and control. State of the art arbitrary waveform generators are limited in the frequency they can operate by the speed of the Digital to Analog converters that directly create their arbitrary waveforms. The architecture of the Harmonic Arbitrary Waveform Generator allows the phase and amplitude of the high frequency content of waveforms to be controlled without taxing the Digital to Analog converters that control them. The Harmonic Arbitrary Waveform Generator converts a high frequency input, into a precision, adjustable, high frequency arbitrarymore » waveform.« less

Sensing device and method for measuring emission time delay during irradiation of targeted samples utilizing variable phase tracking

NASA Technical Reports Server (NTRS)

Danielson, J. D. Sheldon (Inventor)

2006-01-01

An apparatus for measuring emission time delay during irradiation of targeted samples by utilizing digital signal processing to determine the emission phase shift caused by the sample is disclosed. The apparatus includes a source of electromagnetic radiation adapted to irradiate a target sample. A mechanism generates first and second digital input signals of known frequencies with a known phase relationship, and a device then converts the first and second digital input signals to analog sinusoidal signals. An element is provided to direct the first input signal to the electromagnetic radiation source to modulate the source by the frequency thereof to irradiate the target sample and generate a target sample emission. A device detects the target sample emission and produces a corresponding first output signal having a phase shift relative to the phase of the first input signal, the phase shift being caused by the irradiation time delay in the sample. A member produces a known phase shift in the second input signal to create a second output signal. A mechanism is then provided for converting each of the first and second analog output signals to digital signals. A mixer receives the first and second digital output signals and compares the signal phase relationship therebetween to produce a signal indicative of the change in phase relationship between the first and second output signals caused by the target sample emission. Finally, a feedback arrangement alters the phase of the second input signal based on the mixer signal to ultimately place the first and second output signals in quadrature. Mechanisms for enhancing this phase comparison and adjustment technique are also disclosed.

Micromechanical torsional digital-to-analog converter for open-loop angular positioning applications

NASA Astrophysics Data System (ADS)

Zhou, Guangya; Tay, Francis E. H.; Chau, Fook Siong; Zhao, Yi; Logeeswaran, VJ

2004-05-01

This paper reports a novel micromechanical torsional digital-to-analog converter (MTDAC), operated in open-loop with digitally controlled precise multi-level tilt angles. The MTDAC mechanism presented is analogous to that of an electrical binary-weighted-input digital-to-analog converter (DAC). It consists of a rigid tunable platform, an array of torsional microactuators, each operating in a two-state (on/off) mode, and a set of connection beams with binary-weighted torsional stiffnesses that connect the actuators to the platform. The feasibility of the proposed MTDAC mechanism was verified numerically by finite element simulations and experimentally with a commercial optical phase-shifting interferometric system. A prototype 2-bit MTDAC was implemented using the poly-MUMPS process achieving a full-scale output tilt angle of 1.92° with a rotation step of 0.64°. This mechanism can be configured for many promising applications, particularly in beam steering-based OXC switches.

Sensing device and method for measuring emission time delay during irradiation of targeted samples

NASA Technical Reports Server (NTRS)

Danielson, J. D. Sheldon (Inventor)

2000-01-01

An apparatus for measuring emission time delay during irradiation of targeted samples by utilizing digital signal processing to determine the emission phase shift caused by the sample is disclosed. The apparatus includes a source of electromagnetic radiation adapted to irradiate a target sample. A mechanism generates first and second digital input signals of known frequencies with a known phase relationship, and a device then converts the first and second digital input signals to analog sinusoidal signals. An element is provided to direct the first input signal to the electromagnetic radiation source to modulate the source by the frequency thereof to irradiate the target sample and generate a target sample emission. A device detects the target sample emission and produces a corresponding first output signal having a phase shift relative to the phase of the first input signal, the phase shift being caused by the irradiation time delay in the sample. A member produces a known phase shift in the second input signal to create a second output signal. A mechanism is then provided for converting each of the first and second analog output signals to digital signals. A mixer receives the first and second digital output signals and compares the signal phase relationship therebetween to produce a signal indicative of the change in phase relationship between the first and second output signals caused by the target sample emission. Finally, a feedback arrangement alters the phase of the second input signal based on the mixer signal to ultimately place the first and second output signals in quadrature. Mechanisms for enhancing this phase comparison and adjustment technique are also disclosed.

Noise reduction and control in mode-locked semiconductor diode lasers for use in next-generation all-optical analog-to-digital converters

NASA Astrophysics Data System (ADS)

DePriest, Christopher M.; Abeles, Joseph H.; Braun, Alan; Delfyett, Peter J., Jr.

2000-07-01

External-cavity, actively-modelocked semiconductor diode lasers (SDLs) have proven to be attractive candidates for forming the backbone of next-generation analog-to-digital converters (ADCs), which are currently being developed to sample signals at repetition rates exceeding several GHz with up to 12 bits of digital resolution. Modelocked SDLs are capable of producing waveform-sampling pulse trains with very low temporal jitter (phase noise) and very small fluctuations in pulse height (amplitude noise)--two basic conditions that must be met in order for high-speed ADCs to achieve projected design goals. Single-wavelength modelocked operation (at nominal repetition frequencies of 400 MHz) has produced pulse trains with very low amplitude noise (approximately 0.08%), and the implementation of a phase- locked-loop has been effective in reducing the system's low- frequency phase noise (RMS timing jitter for offset frequencies between 10 Hz and 10 kHz has been reduced from 240 fs to 27 fs).

A finite state machine read-out chip for integrated surface acoustic wave sensors

NASA Astrophysics Data System (ADS)

Rakshit, Sambarta; Iliadis, Agis A.

2015-01-01

A finite state machine based integrated sensor circuit suitable for the read-out module of a monolithically integrated SAW sensor on Si is reported. The primary sensor closed loop consists of a voltage controlled oscillator (VCO), a peak detecting comparator, a finite state machine (FSM), and a monolithically integrated SAW sensor device. The output of the system oscillates within a narrow voltage range that correlates with the SAW pass-band response. The period of oscillation is of the order of the SAW phase delay. We use timing information from the FSM to convert SAW phase delay to an on-chip 10 bit digital output operating on the principle of time to digital conversion (TDC). The control inputs of this digital conversion block are generated by a second finite state machine operating under a divided system clock. The average output varies with changes in SAW center frequency, thus tracking mass sensing events in real time. Based on measured VCO gain of 16 MHz/V our system will convert a 10 kHz SAW frequency shift to a corresponding mean voltage shift of 0.7 mV. A corresponding shift in phase delay is converted to a one or two bit shift in the TDC output code. The system can handle alternate SAW center frequencies and group delays simply by adjusting the VCO control and TDC delay control inputs. Because of frequency to voltage and phase to digital conversion, this topology does not require external frequency counter setups and is uniquely suitable for full monolithic integration of autonomous sensor systems and tags.

An 11-bit and 39 ps resolution time-to-digital converter for ADPLL in digital television

NASA Astrophysics Data System (ADS)

Liu, Wei; (Ruth) Li, Wei; Ren, P.; Lin, C. L.; Zhang, Shengdong; Wang, Yangyuan

2010-04-01

We propose and demonstrate an 11-bit time-to-digital converter (TDC) for all-digital phase-locked loops (ADPLLs) in digital television. The proposed TDC converts the width of the input pulse into digital output with the tap space of the outputs of a free-running ring oscillator (FRO) being the conversion resolution. The FRO is in a structure of coiled cell array and the TDC core is symmetrical in the input structure. This leads to equally spaced taps in the reference clocks and thereby a high TDC conversion linearity. The TDC is fabricated in 0.13 μm CMOS process and the chip area is 0.025 mm2. The measurement results show that the TDC has a conversion resolution of 39 ps at 1.2 V power supply and a 4.5 ns dead time in the 11-bits output case. Both the differential non-linearity (DNL) and integral non-linearity (INL) are below 0.5 LSB. The power consumption of the whole circuit is 4.2 mW.

A single-board NMR spectrometer based on a software defined radio architecture

NASA Astrophysics Data System (ADS)

Tang, Weinan; Wang, Weimin

2011-01-01

A single-board software defined radio (SDR) spectrometer for nuclear magnetic resonance (NMR) is presented. The SDR-based architecture, realized by combining a single field programmable gate array (FPGA) and a digital signal processor (DSP) with peripheral radio frequency (RF) front-end circuits, makes the spectrometer compact and reconfigurable. The DSP, working as a pulse programmer, communicates with a personal computer via a USB interface and controls the FPGA through a parallel port. The FPGA accomplishes digital processing tasks such as a numerically controlled oscillator (NCO), digital down converter (DDC) and gradient waveform generator. The NCO, with agile control of phase, frequency and amplitude, is part of a direct digital synthesizer that is used to generate an RF pulse. The DDC performs quadrature demodulation, multistage low-pass filtering and gain adjustment to produce a bandpass signal (receiver bandwidth from 3.9 kHz to 10 MHz). The gradient waveform generator is capable of outputting shaped gradient pulse waveforms and supports eddy-current compensation. The spectrometer directly acquires an NMR signal up to 30 MHz in the case of baseband sampling and is suitable for low-field (<0.7 T) application. Due to the featured SDR architecture, this prototype has flexible add-on ability and is expected to be suitable for portable NMR systems.

An Analysis of Offset, Gain, and Phase Corrections in Analog to Digital Converters

NASA Astrophysics Data System (ADS)

Cody, Devin; Ford, John

2015-01-01

Many high-speed analog to digital converters (ADCs) use interwoven ADCs to greatly boost their sample rate. This interwoven architecture can introduce problems if the low speed ADCs do not have identical outputs. These errors are manifested as phantom frequencies that appear in the digitized signal although they never existed in the analog domain. Through the application of offset, gain, and phase (OGP) corrections to the ADC, this problem can be reduced. Here we report on an implementation of such a correction in a high speed ADC chip used for radio astronomy. While the corrections could not be implemented in the ADCs themselves, a partial solution was devised and implemented digitally inside of a signal processing field programmable gate array (FPGA). Positive results to contrived situations are shown, and null results are presented for implementation in an ADC083000 card with minimal error. Lastly, we discuss the implications of this method as well as its mathematical basis.

Latency study of the High Performance Time to Digital Converter for the ATLAS Muon Spectrometer trigger upgrade

NASA Astrophysics Data System (ADS)

Meng, X. T.; Levin, D. S.; Chapman, J. W.; Li, D. C.; Yao, Z. E.; Zhou, B.

2017-02-01

The High Performance Time to Digital Converter (HPTDC), a multi-channel ASIC designed by the CERN Microelectronics group, has been proposed for the digitization of the thin-Resistive Plate Chambers (tRPC) in the ATLAS Muon Spectrometer Phase-1 upgrade project. These chambers, to be staged for higher luminosity LHC operation, will increase trigger acceptance and reduce or eliminate the fake muon trigger rates in the barrel-endcap transition region, corresponding to pseudo-rapidity range 1<|η|<1.3. Low level trigger candidates must be flagged within a maximum latency of 1075 ns, thus imposing stringent signal processing time performance requirements on the readout system in general, and on the digitization electronics in particular. This paper investigates the HPTDC signal latency performance based on a specially designed evaluation board coupled with an external FPGA evaluation board, when operated in triggerless mode, and under hit rate conditions expected in Phase-I. This hardware based study confirms previous simulations and demonstrates that the HPTDC in triggerless operation satisfies the digitization timing requirements in both leading edge and pair modes.

Locality of Area Coverage on Digital Acoustic Communication in Air using Differential Phase Shift Keying

NASA Astrophysics Data System (ADS)

Mizutani, Keiichi; Ebihara, Tadashi; Wakatsuki, Naoto; Mizutani, Koichi

2009-07-01

We experimentally evaluate the locality of digital acoustic communication in air. Digital acoustic communication in air is suitable for a small cell system, because acoustic waves have a short propagation distance in air. In this study, optimal cell size is experimentally evaluated. Each base station (BS) transmits different commands. In our experiment, differential phase shift keying (DPSK), especially binary DPSK (DBPSK), is adopted as a modulation and demodulation scheme. The evaluated system consists of a personal computer (PC), a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), a loud speaker (SP), a microphone (MIC), and transceiver software. All experiments are performed in an anechoic room. The cell size of the transmitter can be limited under low signal-to-noise ratio (SNR) condition. If another transmitter works, cell size is limited by the effect of the interference from that transmitter. The cell size-to-distance ratio of transmitter A to transmitter B is 37.5%, if cell edge bit-error-rate (BER) is taken as 10-3.

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Yeh, H.-G.

1993-01-01

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

All-digital GPS receiver mechanization

NASA Astrophysics Data System (ADS)

Ould, P. C.; van Wechel, R. J.

The paper describes the all-digital baseband correlation processing of GPS signals, which is characterized by (1) a potential for improved antijamming performance, (2) fast acquisition by a digital matched filter, (3) reduction of adjustment, (4) increased system reliability, and (5) provision of a basis for the realization of a high degree of VLSI potential for the development of small economical GPS sets. The basic technical approach consists of a broadband fix-tuned RF converter followed by a digitizer; digital-matched-filter acquisition section; phase- and delay-lock tracking via baseband digital correlation; software acquisition logic and loop filter implementation; and all-digital implementation of the feedback numerical controlled oscillators and code generator. Broadband in-phase and quadrature tracking is performed by an arctangent angle detector followed by a phase-unwrapping algorithm that eliminates false locks induced by sampling and data bit transitions, and yields a wide pull-in frequency range approaching one-fourth of the loop iteration frequency.

A Fast Multiple Sampling Method for Low-Noise CMOS Image Sensors With Column-Parallel 12-bit SAR ADCs.

PubMed

Kim, Min-Kyu; Hong, Seong-Kwan; Kwon, Oh-Kyong

2015-12-26

This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling method decreases the A/D conversion time by repeatedly converting a pixel output to 4-bit after the first 12-bit A/D conversion, reducing noise of the CIS by one over the square root of the number of samplings. The area of the 12-bit SAR ADC is reduced by using a 10-bit capacitor digital-to-analog converter (DAC) with four scaled reference voltages. In addition, a simple up/down counter-based digital processing logic is proposed to perform complex calculations for multiple sampling and digital correlated double sampling. To verify the proposed multiple sampling method, a 256 × 128 pixel array CIS with 12-bit SAR ADCs was fabricated using 0.18 μm CMOS process. The measurement results shows that the proposed multiple sampling method reduces each A/D conversion time from 1.2 μs to 0.45 μs and random noise from 848.3 μV to 270.4 μV, achieving a dynamic range of 68.1 dB and an SNR of 39.2 dB.

Digitized synchronous demodulator

NASA Technical Reports Server (NTRS)

Woodhouse, Christopher E. (Inventor)

1990-01-01

A digitized synchronous demodulator is constructed entirely of digital components including timing logic, an accumulator, and means to digitally filter the digital output signal. Indirectly, it accepts, at its input, periodic analog signals which are converted to digital signals by traditional analog-to-digital conversion techniques. Broadly, the input digital signals are summed to one of two registers within an accumulator, based on the phase of the input signal and medicated by timing logic. At the end of a predetermined number of cycles of the inputted periodic signals, the contents of the register that accumulated samples from the negative half cycle is subtracted from the accumulated samples from the positive half cycle. The resulting difference is an accurate measurement of the narrow band amplitude of the periodic input signal during the measurement period. This measurement will not include error sources encountered in prior art synchronous demodulators using analog techniques such as offsets, charge injection errors, temperature drift, switching transients, settling time, analog to digital converter missing code, and linearity errors.

Digital servo control of random sound test excitation. [in reverberant acoustic chamber

NASA Technical Reports Server (NTRS)

Nakich, R. B. (Inventor)

1974-01-01

A digital servocontrol system for random noise excitation of a test object in a reverberant acoustic chamber employs a plurality of sensors spaced in the sound field to produce signals in separate channels which are decorrelated and averaged. The average signal is divided into a plurality of adjacent frequency bands cyclically sampled by a time division multiplex system, converted into digital form, and compared to a predetermined spectrum value stored in digital form. The results of the comparisons are used to control a time-shared up-down counter to develop gain control signals for the respective frequency bands in the spectrum of random sound energy picked up by the microphones.

Development of Coriolis mass flowmeter with digital drive and signal processing technology.

PubMed

Hou, Qi-Li; Xu, Ke-Jun; Fang, Min; Liu, Cui; Xiong, Wen-Jun

2013-09-01

Coriolis mass flowmeter (CMF) often suffers from two-phase flowrate which may cause flowtube stalling. To solve this problem, a digital drive method and a digital signal processing method of CMF is studied and implemented in this paper. A positive-negative step signal is used to initiate the flowtube oscillation without knowing the natural frequency of the flowtube. A digital zero-crossing detection method based on Lagrange interpolation is adopted to calculate the frequency and phase difference of the sensor output signals in order to synthesize the digital drive signal. The digital drive approach is implemented by a multiplying digital to analog converter (MDAC) and a direct digital synthesizer (DDS). A digital Coriolis mass flow transmitter is developed with a digital signal processor (DSP) to control the digital drive, and realize the signal processing. Water flow calibrations and gas-liquid two-phase flowrate experiments are conducted to examine the performance of the transmitter. The experimental results show that the transmitter shortens the start-up time and can maintain the oscillation of flowtube in two-phase flowrate condition. Copyright © 2013 ISA. Published by Elsevier Ltd. All rights reserved.

Optoelectronic frequency discriminated phase tuning technology and its applications

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2000-07-01

By using a phase-tunable optoelectronic phase-locked loop, we are able to continuously change the phase as well as the delay-time of optically distributed microwave clock signals or optical pulse train. The advantages of the proposed technique include such as wide-band operation up to 20GHz, wide-range tuning up to 640 degrees, high tuning resolution of <6x10-2 degree/mV, ultra-low short-term phase fluctuation and drive of 4.7x10-2 degree and 3.4x10- 3 degree/min, good linearity with acceptable deviations, and frequency-independent transferred function with slope of nearly 90 degrees/volt, etc. The novel optoelectronic phase shifter is performed by using a DC-voltage controlled, optoelectronic-mixer-based, frequency-down-converted digital phase-locked-loop. The maximum delay-time is continuously tunable up to 3.9 ns for optical pulses repeated at 500 MHz from a gain-switched laser diode. This corresponds to a delay responsivity of about 0.54 ps/mV. The using of the OEPS as being an optoelectronic delay-time controller for optical pulses is demonstrated with temporal resolution of <0.2 ps. Electro-optic sampling of high-frequency microwave signals by using the in-situ delay-time-tunable pulsed laser as a novel optical probe is primarily reported.

Front end for GPS receivers

NASA Technical Reports Server (NTRS)

Thomas, Jr., Jess Brooks (Inventor)

1999-01-01

The front end in GPS receivers has the functions of amplifying, down-converting, filtering and sampling the received signals. In the preferred embodiment, only two operations, A/D conversion and a sum, bring the signal from RF to filtered quadrature baseband samples. After amplification and filtering at RF, the L1 and L2 signals are each sampled at RF at a high selected subharmonic rate. The subharmonic sample rates are approximately 900 MHz for L1 and 982 MHz for L2. With the selected subharmonic sampling, the A/D conversion effectively down-converts the signal from RF to quadrature components at baseband. The resulting sample streams for L1 and L2 are each reduced to a lower rate with a digital filter, which becomes a straight sum in the simplest embodiment. The frequency subsystem can be very simple, only requiring the generation of a single reference frequency (e.g. 20.46 MHz minus a small offset) and the simple multiplication of this reference up to the subharmonic sample rates for L1 and L2. The small offset in the reference frequency serves the dual purpose of providing an advantageous offset in the down-converted carrier frequency and in the final baseband sample rate.

A 12-bit high-speed column-parallel two-step single-slope analog-to-digital converter (ADC) for CMOS image sensors.

PubMed

Lyu, Tao; Yao, Suying; Nie, Kaiming; Xu, Jiangtao

2014-11-17

A 12-bit high-speed column-parallel two-step single-slope (SS) analog-to-digital converter (ADC) for CMOS image sensors is proposed. The proposed ADC employs a single ramp voltage and multiple reference voltages, and the conversion is divided into coarse phase and fine phase to improve the conversion rate. An error calibration scheme is proposed to correct errors caused by offsets among the reference voltages. The digital-to-analog converter (DAC) used for the ramp generator is based on the split-capacitor array with an attenuation capacitor. Analysis of the DAC's linearity performance versus capacitor mismatch and parasitic capacitance is presented. A prototype 1024 × 32 Time Delay Integration (TDI) CMOS image sensor with the proposed ADC architecture has been fabricated in a standard 0.18 μm CMOS process. The proposed ADC has average power consumption of 128 μW and a conventional rate 6 times higher than the conventional SS ADC. A high-quality image, captured at the line rate of 15.5 k lines/s, shows that the proposed ADC is suitable for high-speed CMOS image sensors.

Seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery.

PubMed

Li, Xinying; Yu, Jianjun; Dong, Ze; Cao, Zizheng; Chi, Nan; Zhang, Junwen; Shao, Yufeng; Tao, Li

2012-10-22

We experimentally demonstrated the seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery adopting polarization-division-multiplexing quadrature-phase-shift-keying (PDM-QPSK) modulation with 400-km single-mode fiber-28 (SMF-28) transmission and 1-m wireless delivery. The X- and Y-polarization components of optical PDM-QPSK baseband signal are simultaneously up-converted to 100 GHz by optical polarization-diversity heterodyne beating, and then independently transmitted and received by two pairs of transmitter and receiver antennas, which make up a 2x2 multiple-input multiple-output (MIMO) wireless link based on microwave polarization multiplexing. At the wireless receiver, a two-stage down conversion is firstly done in analog domain based on balanced mixer and sinusoidal radio frequency (RF) signal, and then in digital domain based on digital signal processing (DSP). Polarization de-multiplexing is realized by constant modulus algorithm (CMA) based on DSP in heterodyne coherent detection. Our experimental results show that more taps are required for CMA when the X- and Y-polarization antennas have different wireless distance.

Correction of I/Q channel errors without calibration

DOEpatents

Doerry, Armin W.; Tise, Bertice L.

2002-01-01

A method of providing a balanced demodular output for a signal such as a Doppler radar having an analog pulsed input; includes adding a variable phase shift as a function of time to the input signal, applying the phase shifted input signal to a demodulator; and generating a baseband signal from the input signal. The baseband signal is low-pass filtered and converted to a digital output signal. By removing the variable phase shift from the digital output signal, a complex data output is formed that is representative of the output of a balanced demodulator.

A switchable digital microfluidic droplet dye-laser.

PubMed

Kuehne, Alexander J C; Gather, Malte C; Eydelnant, Irwin A; Yun, Seok-Hyun; Weitz, David A; Wheeler, Aaron R

2011-11-07

Digital microfluidic devices allow the manipulation of droplets between two parallel electrodes. These electrodes can act as mirrors generating a micro-cavity, which can be exploited for a droplet dye-laser. Three representative laser-dyes with emission wavelengths spanning the whole visible spectrum are chosen to show the applicability of this concept. Sub-microlitre droplets of laser-dye solution are moved in and out of a lasing site on-chip to down-convert the UV-excitation light into blue, green and red laser-pulses. This journal is © The Royal Society of Chemistry 2011

Optically-synchronized encoder and multiplexer scheme for interleaved photonics analog-to-digital conversion

NASA Astrophysics Data System (ADS)

Villa, Carlos; Kumavor, Patrick; Donkor, Eric

2008-04-01

Photonics Analog-to-Digital Converters (ADCs) utilize a train of optical pulses to sample an electrical input waveform applied to an electrooptic modulator or a reverse biased photodiode. In the former, the resulting train of amplitude-modulated optical pulses is detected (converter to electrical) and quantized using a conversional electronics ADC- as at present there are no practical, cost-effective optical quantizers available with performance that rival electronic quantizers. In the latter, the electrical samples are directly quantized by the electronics ADC. In both cases however, the sampling rate is limited by the speed with which the electronics ADC can quantize the electrical samples. One way to increase the sampling rate by a factor N is by using the time-interleaved technique which consists of a parallel array of N electrical ADC converters, which have the same sampling rate but different sampling phase. Each operating at a quantization rate of fs/N where fs is the aggregated sampling rate. In a system with no real-time operation, the N channels digital outputs are stored in memory, and then aggregated (multiplexed) to obtain the digital representation of the analog input waveform. Alternatively, for real-time operation systems the reduction of storing time in the multiplexing process is desired to improve the time response of the ADC. The complete elimination of memories come expenses of concurrent timing and synchronization in the aggregation of the digital signal that became critical for a good digital representation of the analog signal waveform. In this paper we propose and demonstrate a novel optically synchronized encoder and multiplexer scheme for interleaved photonics ADCs that utilize the N optical signals used to sample different phases of an analog input signal to synchronize the multiplexing of the resulting N digital output channels in a single digital output port. As a proof of concept, four 320 Megasamples/sec 12-bit of resolution digital signals were multiplexed to form an aggregated 1.28 Gigasamples/sec single digital output signal.

Miniature L-Band Radar Transceiver

NASA Technical Reports Server (NTRS)

McWatters, Dalia; Price, Douglas; Edelstein, Wendy

2007-01-01

A miniature L-band transceiver that operates at a carrier frequency of 1.25 GHz has been developed as part of a generic radar electronics module (REM) that would constitute one unit in an array of many identical units in a very-large-aperture phased-array antenna. NASA and the Department of Defense are considering the deployment of such antennas in outer space; the underlying principles of operation, and some of those of design, also are applicable on Earth. The large dimensions of the antennas make it advantageous to distribute radio-frequency electronic circuitry into elements of the arrays. The design of the REM is intended to implement the distribution. The design also reflects a requirement to minimize the size and weight of the circuitry in order to minimize the weight of any such antenna. Other requirements include making the transceiver robust and radiation-hard and minimizing power demand. Figure 1 depicts the functional blocks of the REM, including the L-band transceiver. The key functions of the REM include signal generation, frequency translation, amplification, detection, handling of data, and radar control and timing. An arbitrary-waveform generator that includes logic circuitry and a digital-to-analog converter (DAC) generates a linear-frequency-modulation chirp waveform. A frequency synthesizer produces local-oscillator signals used for frequency conversion and clock signals for the arbitrary-waveform generator, for a digitizer [that is, an analog-to-digital converter (ADC)], and for a control and timing unit. Digital functions include command, timing, telemetry, filtering, and high-rate framing and serialization of data for a high-speed scientific-data interface. The aforementioned digital implementation of filtering is a key feature of the REM architecture. Digital filters, in contradistinction to analog ones, provide consistent and temperature-independent performance, which is particularly important when REMs are distributed throughout a large array. Digital filtering also enables selection among multiple filter parameters as required for different radar operating modes. After digital filtering, data are decimated appropriately in order to minimize the data rate out of an antenna panel. The L-band transceiver (see Figure 2) includes a radio-frequency (RF)-to-baseband down-converter chain and an intermediate- frequency (IF)-to-RF up-converter chain. Transmit/receive (T/R) switches enable the use of a single feed to the antenna for both transmission and reception. The T/R switches also afford a built-in test capability by enabling injection of a calibration signal into the receiver chain. In order of decreasing priority, components of the transceiver were selected according to requirements of radiation hardness, then compactness, then low power. All of the RF components are radiation-hard. The noise figure (NF) was optimized to the extent that (1) a low-noise amplifier (LNA) (characterized by NF < 2 dB) was selected but (2) the receiver front-end T/R switches were selected for a high degree of isolation and acceptably low loss, regardless of the requirement to minimize noise.

Hardware Overview of the Microwave Imaging Reflectometry (MIR) on DIII-D

NASA Astrophysics Data System (ADS)

Hu, Xing; Muscatello, Chirstopher; Domier, Calvin; Luhmann, Neville; Ren, Xiaoxin; Spear, Alexander; Tobias, Benjamin; Yu, Liubing; University of California Davis Collaboration; Princeton Plasma Physics Laboratory Collaboration

2013-10-01

UC Davis in collaboration with PPPL has developed and installed a 12 by 4 (48) channel MIR system on DIII-D to measure 2-D structure of density fluctuations. In the transmitter path, a four-frequency probing beam is generated by mixing the 65 GHz Gunn oscillator signal with two different 0.5 ~ 9 GHz signals. Carefully designed imaging optics shape the beam to ensure the probing beam wavefront matches the cutoff surfaces. In the receiver path, large aperture imaging optics collect the reflected beam and focus it onto the mini lens antenna array, which provides improved LO coupling and antenna performance over earlier imaging systems. The reflected signal is down-converted for the first time on the array and goes into the innovative electronics for a second down-conversion. Low frequency LOs for the IQ mixer are generated by mixing two reference signals from phase-locked circuits. The double down-converted signal is mixed with the low frequency LOs yielding in-phase and quadrature components of the phase and thus density fluctuation information.

Digital readout for image converter cameras

NASA Astrophysics Data System (ADS)

Honour, Joseph

1991-04-01

There is an increasing need for fast and reliable analysis of recorded sequences from image converter cameras so that experimental information can be readily evaluated without recourse to more time consuming photographic procedures. A digital readout system has been developed using a randomly triggerable high resolution CCD camera, the output of which is suitable for use with IBM AT compatible PC. Within half a second from receipt of trigger pulse, the frame reformatter displays the image and transfer to storage media can be readily achieved via the PC and dedicated software. Two software programmes offer different levels of image manipulation which includes enhancement routines and parameter calculations with accuracy down to pixel levels. Hard copy prints can be acquired using a specially adapted Polaroid printer, outputs for laser and video printer extend the overall versatility of the system.

A Fast Multiple Sampling Method for Low-Noise CMOS Image Sensors With Column-Parallel 12-bit SAR ADCs

PubMed Central

Kim, Min-Kyu; Hong, Seong-Kwan; Kwon, Oh-Kyong

2015-01-01

This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling method decreases the A/D conversion time by repeatedly converting a pixel output to 4-bit after the first 12-bit A/D conversion, reducing noise of the CIS by one over the square root of the number of samplings. The area of the 12-bit SAR ADC is reduced by using a 10-bit capacitor digital-to-analog converter (DAC) with four scaled reference voltages. In addition, a simple up/down counter-based digital processing logic is proposed to perform complex calculations for multiple sampling and digital correlated double sampling. To verify the proposed multiple sampling method, a 256 × 128 pixel array CIS with 12-bit SAR ADCs was fabricated using 0.18 μm CMOS process. The measurement results shows that the proposed multiple sampling method reduces each A/D conversion time from 1.2 μs to 0.45 μs and random noise from 848.3 μV to 270.4 μV, achieving a dynamic range of 68.1 dB and an SNR of 39.2 dB. PMID:26712765

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, Herb

2017-01-01

Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency (RF) components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. These innovations have reduced the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. An additional pay-off is the increased flexibility of the SDR: allowing the same hardware to implement multiple transponder types by altering hardware logic -no change of analog hardware is required -all of which can be ultimately accomplished in orbit.

Calculation reduction method for color digital holography and computer-generated hologram using color space conversion

NASA Astrophysics Data System (ADS)

Shimobaba, Tomoyoshi; Nagahama, Yuki; Kakue, Takashi; Takada, Naoki; Okada, Naohisa; Endo, Yutaka; Hirayama, Ryuji; Hiyama, Daisuke; Ito, Tomoyoshi

2014-02-01

A calculation reduction method for color digital holography (DH) and computer-generated holograms (CGHs) using color space conversion is reported. Color DH and color CGHs are generally calculated on RGB space. We calculate color DH and CGHs in other color spaces for accelerating the calculation (e.g., YCbCr color space). In YCbCr color space, a RGB image or RGB hologram is converted to the luminance component (Y), blue-difference chroma (Cb), and red-difference chroma (Cr) components. In terms of the human eye, although the negligible difference of the luminance component is well recognized, the difference of the other components is not. In this method, the luminance component is normal sampled and the chroma components are down-sampled. The down-sampling allows us to accelerate the calculation of the color DH and CGHs. We compute diffraction calculations from the components, and then we convert the diffracted results in YCbCr color space to RGB color space. The proposed method, which is possible to accelerate the calculations up to a factor of 3 in theory, accelerates the calculation over two times faster than the ones in RGB color space.

Ultra-High Speed Analog-to-Digital Converters in 14nm FinFET Process and Usage in Digital and Hybrid Phased Array Systems

DTIC Science & Technology

2017-03-01

enable extremely high dynamic range receivers to be realized in very compact dimensions. This paper provides information on the performance...this is the “Butler Matrix” topology in which N beam angular positions into N matrix ports. With this topology , by selecting a particular...waveguide port to connect a receiver or transmitter chain to a particular beam direction would be enabled. RF phase shifters and amplitude weighting

Fast Offset Laser Phase-Locking System

NASA Technical Reports Server (NTRS)

Shaddock, Daniel; Ware, Brent

2008-01-01

Figure 1 shows a simplified block diagram of an improved optoelectronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications. The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in High-Accuracy, High-Dynamic-Range Phase-Measurement System (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output. The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode-output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.

Simultaneously frequency down-conversion, independent multichannel phase shifting and zero-IF receiving using a phase modulator in a sagnac loop and balanced detection

NASA Astrophysics Data System (ADS)

Zhu, Zihang; Zhao, Shanghong; Li, Xuan; Lin, Tao; Hu, Dapeng

2018-03-01

Photonic microwave frequency down-conversion with independent multichannel phase shifting and zero-intermediate frequency (IF) receiving is proposed and demonstrated by simulation. By combined use of a phase modulator (PM) in a sagnac loop and an optical bandpass filter (OBPF), orthogonal polarized carrier suppression single sideband (CS-SSB) signals are obtained. By adjusting the polarization controllers (PCs) to introduce the phase difference in the optical domain and using balanced detection to eliminate the direct current components, the phase of the generated IF signal can be arbitrarily tuned. Besides, the radio frequency (RF) vector signal can be also frequency down-converted to baseband directly by choosing two quadrature channels. In the simulation, high gain and continuously tunable phase shifts over the 360 degree range are verified. Furthermore, 2.5 Gbit/s RF vector signals centered at 10 GHz with different modulation formats are successfully demodulated.

Design of a delay-locked-loop-based time-to-digital converter

NASA Astrophysics Data System (ADS)

Zhaoxin, Ma; Xuefei, Bai; Lu, Huang

2013-09-01

A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid “false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7 × 0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.

Low frequency noise elimination technique for 24-bit Σ-Δ data acquisition systems.

PubMed

Qu, Shao-Bo; Robert, Olivier; Lognonné, Philippe; Zhou, Ze-Bing; Yang, Shan-Qing

2015-03-01

Low frequency 1/f noise is one of the key limiting factors of high precision measurement instruments. In this paper, digital correlated double sampling is implemented to reduce the offset and low frequency 1/f noise of a data acquisition system with 24-bit sigma delta (Σ-Δ) analog to digital converter (ADC). The input voltage is modulated by cross-coupled switches, which are synchronized to the sampling clock, and converted into digital signal by ADC. By using a proper switch frequency, the unwanted parasitic signal frequencies generated by the switches are avoided. The noise elimination processing is made through the principle of digital correlated double sampling, which is equivalent to a time shifted subtraction for the sampled voltage. The low frequency 1/f noise spectrum density of the data acquisition system is reduced to be flat down to the measurement frequency lower limit, which is about 0.0001 Hz in this paper. The noise spectrum density is eliminated by more than 60 dB at 0.0001 Hz, with a residual noise floor of (9 ± 2) nV/Hz(1/2) which is limited by the intrinsic white noise floor of the ADC above its corner frequency.

Generation of complementary sampled phase-only holograms.

PubMed

Tsang, P W M; Chow, Y T; Poon, T-C

2016-10-03

If an image is uniformly down-sampled into a sparse form and converted into a hologram, the phase component alone will be adequate to reconstruct the image. However, the appearance of the reconstructed image is degraded with numerous empty holes. In this paper, we present a low complexity and non-iterative solution to this problem. Briefly, two phase-only holograms are generated for an image, each based on a different down-sampling lattice. Subsequently, the holograms are displayed alternately at high frame rate. The reconstructed images of the 2 holograms will appear to be a single, densely sampled image with enhance visual quality.

Simulation of the High Performance Time to Digital Converter for the ATLAS Muon Spectrometer trigger upgrade

NASA Astrophysics Data System (ADS)

Meng, X. T.; Levin, D. S.; Chapman, J. W.; Zhou, B.

2016-09-01

The ATLAS Muon Spectrometer endcap thin-Resistive Plate Chamber trigger project compliments the New Small Wheel endcap Phase-1 upgrade for higher luminosity LHC operation. These new trigger chambers, located in a high rate region of ATLAS, will improve overall trigger acceptance and reduce the fake muon trigger incidence. These chambers must generate a low level muon trigger to be delivered to a remote high level processor within a stringent latency requirement of 43 bunch crossings (1075 ns). To help meet this requirement the High Performance Time to Digital Converter (HPTDC), a multi-channel ASIC designed by CERN Microelectronics group, has been proposed for the digitization of the fast front end detector signals. This paper investigates the HPTDC performance in the context of the overall muon trigger latency, employing detailed behavioral Verilog simulations in which the latency in triggerless mode is measured for a range of configurations and under realistic hit rate conditions. The simulation results show that various HPTDC operational configurations, including leading edge and pair measurement modes can provide high efficiency (>98%) to capture and digitize hits within a time interval satisfying the Phase-1 latency tolerance.

Digital phase-locked loop speed control for a brushless dc motor

NASA Astrophysics Data System (ADS)

Wise, M. G.

1985-06-01

Speed control of d.c. motors by phase-locked loops (PLL) is becoming increasingly popular. Primary interest has been in employing PLL for constant speed control. This thesis investigates the theory and techniques of digital PLL to speed control of a brushless d.c. motor with a variable speed of operation. Addition of logic controlled count enable/disable to a synchronous up/down counter, used as a phase-frequency detector, is shown to improve the performance of previously proposed PLL control schemes.

Satellite analog FDMA/FM to digital TDMA conversion

NASA Technical Reports Server (NTRS)

Driggers, T.; Nguyen, T.; Kolavennu, V.

1987-01-01

The results of a study which investigated design issues regarding the use of analog to digital (A/D) conversion on board a satellite are presented. The need for A/D, and of course D/A as well, conversion arose from a satellite design which required analog FDMA/FM up and down links to/from a digitally modulated intersatellite link. There are also some advantages when one must interconnect a large number of various spot beams which are using analog, and therefore cannot take advantage of SS/TDMA switching among the beams, thus resulting in low fill factors. Various tradeoffs were performed regarding the implementation of on-board A/D processing, including mass, power, and costs. The various technologies which were considered included flash ADCs, surface acoustic wave (SAW) devices, and digital signal processing (DSP) chips. Impact analyses were also performed to determine the effect on ground stations to convert to digital if the A/D approach were not implemented.

High-accuracy resolver-to-digital conversion via phase locked loop based on PID controller

NASA Astrophysics Data System (ADS)

Li, Yaoling; Wu, Zhong

2018-03-01

The problem of resolver-to-digital conversion (RDC) is transformed into the problem of angle tracking control, and a phase locked loop (PLL) method based on PID controller is proposed in this paper. This controller comprises a typical PI controller plus an incomplete differential which can avoid the amplification of higher-frequency noise components by filtering the phase detection error with a low-pass filter. Compared with conventional ones, the proposed PLL method makes the converter a system of type III and thus the conversion accuracy can be improved. Experimental results demonstrate the effectiveness of the proposed method.

PIC microcontroller based external fast analog to digital converter to acquire wide-lined solid NMR spectra by BRUKER DRX and Avance-I spectrometers.

PubMed

Koczor, Bálint; Rohonczy, János

2015-01-01

Concerning many former liquid or hybrid liquid/solid NMR consoles, the built in Analog-to-Digital Converters (ADCs) are incapable of digitizing the fids at sampling rates in the MHz range. Regarding both strong anisotropic interactions in the solid state and wide chemical shift dispersion nuclei in solution phase such as (195)Pt, (119)Sn, (207)Pb etc., the spectrum range of interest might be in the MHz range. As determining the informative tensor components of anisotropic NMR interactions requires nonlinear fitting over the whole spectrum including the asymptotic baseline, it is prohibited by low sampling rates of the ADCs. Wide spectrum width is also useful in solution NMR, since windowing of wide chemical shift ranges is avoidable. We built an external analog to digital converter with 10 MHz maximal sampling rate, which can work simultaneously with the built in ADC of the spectrometer. The ADC was tested on both Bruker DRX and Avance-I NMR consoles. In addition to the analog channels it only requires three external digital lines of the NMR console. The ADC sends data to PC via USB. The whole process is controlled by software written in JAVA which is implemented under TopSpin. Copyright © 2015 Elsevier Inc. All rights reserved.

IF digitization receiver of wideband digital array radar test-bed

NASA Astrophysics Data System (ADS)

Li, Weixing; Zhang, Yue; Lin, Jianzhi; Chen, Zengping

2014-10-01

In this paper, an X-band, 8-element wideband digital array radar (DAR) test-bed is presented, which makes use of a novel digital backend coupled with highly-integrated, multi-channel intermediate frequency (IF) digital receiver. Radar returns are received by the broadband antenna and then down-converted to the IF of 0.6GHz-3.0GHz. Four band-pass filters are applied in the front-end to divide the IF returns into four frequency bands with the instantaneous bandwidth of 500MHz. Every four array elements utilize a digital receiver, which is focused in this paper. The digital receivers are designed in a compact and flexible manner to meet the demands of DAR system. Each receiver consists of a fourchannel ADC, a high-performance FPGA, four DDR3 chips and two optical transceivers. With the sampling rate of up to 1.2GHz each channel, the ADC is capable of directly sampling the IF returns of four array elements at 10bits. In addition to serving as FIFO and controller, the onboard FPGA is also utilized for the implementation of various real-time algorithms such as DDC and channel calibration. Data is converted to bit stream and transferred through two low overhead, high data rate and multi-channel optical transceivers. Key technologies such as channel calibration and wideband DOA are studied with the measured data which is obtained in the experiments to illustrate the functionality of the system.

Fiber-optic extrinsic Fabry-Perot interferometer strain sensor with <50 pm displacement resolution using three-wavelength digital phase demodulation.

PubMed

Schmidt, M; Werther, B; Fuerstenau, N; Matthias, M; Melz, T

2001-04-09

A fiber-optic extrinsic Fabry-Perot interferometer strain sensor (EFPI-S) of ls = 2.5 cm sensor length using three-wavelength digital phase demodulation is demonstrated to exhibit <50 pm displacement resolution (<2nm/m strain resolution) when measuring the cross expansion of a PZT-ceramic plate. The sensing (single-mode downlead-) and reflecting fibers are fused into a 150/360 microm capillary fiber where the fusion points define the sensor length. Readout is performed using an improved version of the previously described three-wavelength digital phase demodulation method employing an arctan-phase stepping algorithm. In the resent experiments the strain sensitivity was varied via the mapping of the arctan - lookup table to the 16-Bit DA-converter range from 188.25 k /V (6 Volt range 1130 k ) to 11.7 k /Volt (range 70 k ).

Design and construction of a prototype ACTS propagation terminal

NASA Technical Reports Server (NTRS)

Stutzman, Warren; Pratt, Tim; Nunnally, Charles; Nealy, Randall; Remaklus, Will; Sylvester, Bill; Predoehl, Andrew; Gaff, Doug

1993-01-01

The launch schedule for the Advanced Communication Technology Satellite (ACTS) spacecraft did not leave sufficient time for completion of the prototype ACTS Propagation Terminals (APT) prior to initiation of the APT production phase. In fact, the approach used was to construct and test all subassemblies of the terminal with special emphasis on the technically challenging portions. These include the RF front end that uses a state-of-the-art down converter which integrates a low noise amplifier, mixer, post amplifier, filter, and local oscillator port frequency doubler into a single small package. In addition, a new digital receiver that uses the latest DSP technology was developed. Both of these subassemblies were thoroughly tested. The highest risk technology in the APT program was the digital receiver. Several candidate algorithms and DSP chips were investigated early on, primarily under JPL sponsorship. A receiver was constructed based on Texas Instruments chip. The final prototype digital receiver was one based on an Analog Devices chip. The design and test results are documented in a report prepared for this grant. A Primary Design Review (PDR) was conducted 30 May 1991, and a Critical Design Review was held 7 Jul. 1992. Final complete documentation of the APT's will appear in the form of three reports: a hardware description report, a report on the data collection code (ACTS VIEW), and a report on the preprocessing code.

Digital Analysis and Sorting of Fluorescence Lifetime by Flow Cytometry

PubMed Central

Houston, Jessica P.; Naivar, Mark A.; Freyer, James P.

2010-01-01

Frequency-domain flow cytometry techniques are combined with modifications to the digital signal processing capabilities of the Open Reconfigurable Cytometric Acquisition System (ORCAS) to analyze fluorescence decay lifetimes and control sorting. Real-time fluorescence lifetime analysis is accomplished by rapidly digitizing correlated, radiofrequency modulated detector signals, implementing Fourier analysis programming with ORCAS’ digital signal processor (DSP) and converting the processed data into standard cytometric list mode data. To systematically test the capabilities of the ORCAS 50 MS/sec analog-to-digital converter (ADC) and our DSP programming, an error analysis was performed using simulated light scatter and fluorescence waveforms (0.5–25 ns simulated lifetime), pulse widths ranging from 2 to 15 µs, and modulation frequencies from 2.5 to 16.667 MHz. The standard deviations of digitally acquired lifetime values ranged from 0.112 to >2 ns, corresponding to errors in actual phase shifts from 0.0142° to 1.6°. The lowest coefficients of variation (<1%) were found for 10-MHz modulated waveforms having pulse widths of 6 µs and simulated lifetimes of 4 ns. Direct comparison of the digital analysis system to a previous analog phase-sensitive flow cytometer demonstrated similar precision and accuracy on measurements of a range of fluorescent microspheres, unstained cells and cells stained with three common fluorophores. Sorting based on fluorescence lifetime was accomplished by adding analog outputs to ORCAS and interfacing with a commercial cell sorter with a radiofrequency modulated solid-state laser. Two populations of fluorescent microspheres with overlapping fluorescence intensities but different lifetimes (2 and 7 ns) were separated to ~98% purity. Overall, the digital signal acquisition and processing methods we introduce present a simple yet robust approach to phase-sensitive measurements in flow cytometry. The ability to simply and inexpensively implement this system on a commercial flow sorter will both allow better dissemination of this technology and better exploit the traditionally underutilized parameter of fluorescence lifetime. PMID:20662090

Photon-Limited Information in High Resolution Laser Ranging

DTIC Science & Technology

2014-05-28

entangled photons generated by spontaneous parametric down-conversion of a chirped source to perform ranging measurements. Summary of the Most... Matlab program to collect the photon counts from the time to digital converter (TDC). This entailed setting up Matlab to talk to the TDC to get the...SECURITY CLASSIFICATION OF: This project is an effort under the Information in a Photon (InPho) program at DARPA\\DSO. Its purpose is to investigate

An FPGA-based reconfigurable DDC algorithm

NASA Astrophysics Data System (ADS)

Juszczyk, B.; Kasprowicz, G.

2016-09-01

This paper describes implementation of reconfigurable digital down converter in an FPGA structure. System is designed to work with quadrature signals. One of the main criteria of the project was to provied wide range of reconfiguration in order to fulfill various application rage. Potential applications include: software defined radio receiver, passive noise radars and measurement data compression. This document contains general system overview, short description of hardware used in the project and gateware implementation.

Application of digital control techniques for satellite medium power DC-DC converters

NASA Astrophysics Data System (ADS)

Skup, Konrad R.; Grudzinski, Pawel; Nowosielski, Witold; Orleanski, Piotr; Wawrzaszek, Roman

2010-09-01

The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter bases on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage mode stabilization that was implemented using VHDL. The described controllers are a classical digital PID controller and a bang-bang controller. The used converter for testing is a simple model of 5-20 W, 200 kHz buck power converter. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

CMOS Bit-Stream Band-Pass Beamforming

DTIC Science & Technology

2016-03-31

unlimited. with direct IF sampling, most of the signal processing, including digital down-conversion ( DDC ), is carried out in the digital domain, and I/Q...level digitized signals are directly processed without decimation filtering for I/Q DDC and phase shifting. This novel BSP approach replaces bulky...positive feedback. The resonator center frequency of fs/4 (260MHz) simplifies the design of DDC . 4b tunable capacitors adjust the center frequency

Low speed phaselock speed control system. [for brushless dc motor

NASA Technical Reports Server (NTRS)

Fulcher, R. W.; Sudey, J. (Inventor)

1975-01-01

A motor speed control system for an electronically commutated brushless dc motor is provided which includes a phaselock loop with bidirectional torque control for locking the frequency output of a high density encoder, responsive to actual speed conditions, to a reference frequency signal, corresponding to the desired speed. The system includes a phase comparator, which produces an output in accordance with the difference in phase between the reference and encoder frequency signals, and an integrator-digital-to-analog converter unit, which converts the comparator output into an analog error signal voltage. Compensation circuitry, including a biasing means, is provided to convert the analog error signal voltage to a bidirectional error signal voltage which is utilized by an absolute value amplifier, rotational decoder, power amplifier-commutators, and an arrangement of commutation circuitry.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holes, J. K.; Carl, C.; Tegnelia, C. R. (Inventor)

1973-01-01

A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum.

Adaptive frequency-domain equalization in digital coherent optical receivers.

PubMed

Faruk, Md Saifuddin; Kikuchi, Kazuro

2011-06-20

We propose a novel frequency-domain adaptive equalizer in digital coherent optical receivers, which can reduce computational complexity of the conventional time-domain adaptive equalizer based on finite-impulse-response (FIR) filters. The proposed equalizer can operate on the input sequence sampled by free-running analog-to-digital converters (ADCs) at the rate of two samples per symbol; therefore, the arbitrary initial sampling phase of ADCs can be adjusted so that the best symbol-spaced sequence is produced. The equalizer can also be configured in the butterfly structure, which enables demultiplexing of polarization tributaries apart from equalization of linear transmission impairments. The performance of the proposed equalization scheme is verified by 40-Gbits/s dual-polarization quadrature phase-shift keying (QPSK) transmission experiments.

Research on Parallel Three Phase PWM Converters base on RTDS

NASA Astrophysics Data System (ADS)

Xia, Yan; Zou, Jianxiao; Li, Kai; Liu, Jingbo; Tian, Jun

2018-01-01

Converters parallel operation can increase capacity of the system, but it may lead to potential zero-sequence circulating current, so the control of circulating current was an important goal in the design of parallel inverters. In this paper, the Real Time Digital Simulator (RTDS) is used to model the converters parallel system in real time and study the circulating current restraining. The equivalent model of two parallel converters and zero-sequence circulating current(ZSCC) were established and analyzed, then a strategy using variable zero vector control was proposed to suppress the circulating current. For two parallel modular converters, hardware-in-the-loop(HIL) study based on RTDS and practical experiment were implemented, results prove that the proposed control strategy is feasible and effective.

Radio Astronomy Software Defined Receiver Project

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vacaliuc, Bogdan; Leech, Marcus; Oxley, Paul

The paper describes a Radio Astronomy Software Defined Receiver (RASDR) that is currently under development. RASDR is targeted for use by amateurs and small institutions where cost is a primary consideration. The receiver will operate from HF thru 2.8 GHz. Front-end components such as preamps, block down-converters and pre-select bandpass filters are outside the scope of this development and will be provided by the user. The receiver includes RF amplifiers and attenuators, synthesized LOs, quadrature down converters, dual 8 bit ADCs and a Signal Processor that provides firmware processing of the digital bit stream. RASDR will interface to a usermore » s PC via a USB or higher speed Ethernet LAN connection. The PC will run software that provides processing of the bit stream, a graphical user interface, as well as data analysis and storage. Software should support MAC OS, Windows and Linux platforms and will focus on such radio astronomy applications as total power measurements, pulsar detection, and spectral line studies.« less

Double closed-loop resonant micro optic gyro using hybrid digital phase modulation.

PubMed

Ma, Huilian; Zhang, Jianjie; Wang, Linglan; Jin, Zhonghe

2015-06-15

It is well-known that the closed-loop operation in optical gyros offers wider dynamic range and better linearity. By adding a stair-like digital serrodyne wave to a phase modulator can be used as a frequency shifter. The width of one stair in this stair-like digital serrodyne wave should be set equal to the optical transmission time in the resonator, which is relaxed in the hybrid digital phase modulation (HDPM) scheme. The physical mechanism for this relaxation is firstly indicated in this paper. Detailed theoretical and experimental investigations are presented for the HDPM. Simulation and experimental results show that the width of one stair is not restricted by the optical transmission time, however, it should be optimized according to the rise time of the output of the digital-to-analogue converter. Based on the optimum parameters of the HDPM, a bias stability of 0.05°/s for the integration time of 400 seconds in 1 h has been carried out in an RMOG with a waveguide ring resonator with a length of 7.9 cm and a diameter of 2.5 cm.

Exploration of strategies for implementation of screen-printed mercuric iodide converters in direct detection AMFPIs for digital breast tomosynthesis

NASA Astrophysics Data System (ADS)

Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua; Jiang, Hao

2017-03-01

Digital breast tomosynthesis (DBT) has become an increasingly important tool in the diagnosis of breast disease. For those DBT imaging systems based on active matrix, flat-panel imager (AMFPI) arrays, the incident radiation is detected directly or indirectly by means of an a-Se or CsI:Tl x-ray converter, respectively. While all AMFPI DBT devices provide clinically useful volumetric information, their performance is limited by the relatively modest average signal generated per interacting X ray by present converters compared to the electronic additive noise of the system. To address this constraint, we are pursuing the development of a screen-printed form of mercuric iodide (SP HgI2) which has demonstrated considerably higher sensitivities (i.e., larger average signal per interacting X ray) than those of conventional a-Se and CsI:Tl converters, as well as impressive DQE and MTF performance under mammographic irradiation conditions. A converter offering such enhanced sensitivity would greatly improve signal-to-noise performance and facilitate quantum-limited imaging down to significantly lower exposures than present AMFPI DBT systems. However, before this novel converter material can be implemented practically, challenges associated with SP HgI2 must be addressed. Most significantly, high levels of charge trapping (which lead to image lag as well as fall-off in DQE at higher exposures) need to be reduced - while improving the uniformity in pixel-to-pixel signal response as well as maintaining low dark current and otherwise favorable DQE performance. In this paper, a pair of novel strategies for overcoming the challenge of charge trapping in SP HgI2 converters are described, and initial results from empirical and calculational studies of these strategies are reported.

Multi-Modulator for Bandwidth-Efficient Communication

NASA Technical Reports Server (NTRS)

Gray, Andrew; Lee, Dennis; Lay, Norman; Cheetham, Craig; Fong, Wai; Yeh, Pen-Shu; King, Robin; Ghuman, Parminder; Hoy, Scott; Fisher, Dave

2009-01-01

A modulator circuit board has recently been developed to be used in conjunction with a vector modulator to generate any of a large number of modulations for bandwidth-efficient radio transmission of digital data signals at rates than can exceed 100 Mb/s. The modulations include quadrature phaseshift keying (QPSK), offset quadrature phase-shift keying (OQPSK), Gaussian minimum-shift keying (GMSK), and octonary phase-shift keying (8PSK) with square-root raised-cosine pulse shaping. The figure is a greatly simplified block diagram showing the relationship between the modulator board and the rest of the transmitter. The role of the modulator board is to encode the incoming data stream and to shape the resulting pulses, which are fed as inputs to the vector modulator. The combination of encoding and pulse shaping in a given application is chosen to maximize the bandwidth efficiency. The modulator board includes gallium arsenide serial-to-parallel converters at its input end. A complementary metal oxide/semiconductor (CMOS) field-programmable gate array (FPGA) performs the coding and modulation computations and utilizes parallel processing in doing so. The results of the parallel computation are combined and converted to pulse waveforms by use of gallium arsenide parallel-to-serial converters integrated with digital-to-analog converters. Without changing the hardware, one can configure the modulator to produce any of the designed combinations of coding and modulation by loading the appropriate bit configuration file into the FPGA.

Decentralized Interleaving of Paralleled Dc-Dc Buck Converters: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Brian B; Rodriguez, Miguel; Sinha, Mohit

We present a decentralized control strategy that yields switch interleaving among parallel connected dc-dc buck converters without communication. The proposed method is based on the digital implementation of the dynamics of a nonlinear oscillator circuit as the controller. Each controller is fully decentralized, i.e., it only requires the locally measured output current to synthesize the pulse width modulation (PWM) carrier waveform. By virtue of the intrinsic electrical coupling between converters, the nonlinear oscillator-based controllers converge to an interleaved state with uniform phase-spacing across PWM carriers. To the knowledge of the authors, this work represents the first fully decentralized strategy formore » switch interleaving of paralleled dc-dc buck converters.« less

Generation of cylindrically polarized vector vortex beams with digital micromirror device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gong, Lei; Liu, Weiwei; Wang, Meng

We propose a novel technique to directly transform a linearly polarized Gaussian beam into vector-vortex beams with various spatial patterns. Full high-quality control of amplitude and phase is implemented via a Digital Micro-mirror Device (DMD) binary holography for generating Laguerre-Gaussian, Bessel-Gaussian, and helical Mathieu–Gaussian modes, while a radial polarization converter (S-waveplate) is employed to effectively convert the optical vortices into cylindrically polarized vortex beams. Additionally, the generated vector-vortex beams maintain their polarization symmetry after arbitrary polarization manipulation. Due to the high frame rates of DMD, rapid switching among a series of vector modes carrying different orbital angular momenta paves themore » way for optical microscopy, trapping, and communication.« less

Optoelectrical clock recovery with dispersion monitoring for high speed transmission

NASA Astrophysics Data System (ADS)

Wen, He; Liao, Jinxin; Zheng, Xiaoping; Zhang, Hanyi; Guo, Yili

2010-12-01

The proposed clock recovery scheme introduces electrooptical modulation to down convert the clock frequency facilitating succeeding narrow band filtering by a phase locked loop (PLL) with ordinary radio frequency (RF) devices, further, employs a quadrature phase detector in the PLL to provide an indication signal for monitoring residual dispersion. It was demonstrated in a polarization multiplexed 160-Gbit/s optical non-return to zero quadrature phase shift keying (NRZ-QPSK) transmission system.

Test strategies for industrial testers for converter controls equipment

NASA Astrophysics Data System (ADS)

Oleniuk, P.; Di Cosmo, M.; Kasampalis, V.; Nisbet, D.; Todd, B.; Uznański, S.

2017-04-01

Power converters and their controls electronics are key elements for the operation of the CERN accelerator complex, having a direct impact on its availability. To prevent early-life failures and provide means to verify electronics, a set of industrial testers is used throughout the converters controls electronics' life cycle. The roles of the testers are to validate mass production during the manufacturing phase and to provide means to diagnose and repair failed modules that are brought back from operation. In the converter controls electronics section of the power converters group in the technology department of CERN (TE/EPC/CCE), two main test platforms have been adopted: a PXI platform for mixed analogue-digital functional tests and a JTAG Boundary-Scan platform for digital interconnection and functional tests. Depending on the functionality of the device under test, the appropriate test platforms are chosen. This paper is a follow-up to results presented at the TWEPP 2015 conference, adding the boundary scan test platform and the first results from exploitation of the test system. This paper reports on the test software, hardware design and test strategy applied for a number of devices that has resulted in maximizing test coverage and minimizing test design effort.

Through-the-earth radio

DOEpatents

Reagor, David [Los Alamos, NM; Vasquez-Dominguez, Jose [Los Alamos, NM

2006-05-09

A method and apparatus for effective through-the-earth communication involves a signal input device connected to a transmitter operating at a predetermined frequency sufficiently low to effectively penetrate useful distances through-the earth, and having an analog to digital converter receiving the signal input and passing the signal input to a data compression circuit that is connected to an encoding processor, the encoding processor output being provided to a digital to analog converter. An amplifier receives the analog output from the digital to analog converter for amplifying said analog output and outputting said analog output to an antenna. A receiver having an antenna receives the analog output passes the analog signal to a band pass filter whose output is connected to an analog to digital converter that provides a digital signal to a decoding processor whose output is connected to an data decompressor, the data decompressor providing a decompressed digital signal to a digital to analog converter. An audio output device receives the analog output form the digital to analog converter for producing audible output.

Design of a 40-nm CMOS integrated on-chip oscilloscope for 5-50 GHz spin wave characterization

NASA Astrophysics Data System (ADS)

Egel, Eugen; Csaba, György; Dietz, Andreas; Breitkreutz-von Gamm, Stephan; Russer, Johannes; Russer, Peter; Kreupl, Franz; Becherer, Markus

2018-05-01

Spin wave (SW) devices are receiving growing attention in research as a strong candidate for low power applications in the beyond-CMOS era. All SW applications would require an efficient, low power, on-chip read-out circuitry. Thus, we provide a concept for an on-chip oscilloscope (OCO) allowing parallel detection of the SWs at different frequencies. The readout system is designed in 40-nm CMOS technology and is capable of SW device characterization. First, the SWs are picked up by near field loop antennas, placed below yttrium iron garnet (YIG) film, and amplified by a low noise amplifier (LNA). Second, a mixer down-converts the radio frequency (RF) signal of 5 - 50 GHz to lower intermediate frequencies (IF) around 10 - 50 MHz. Finally, the IF signal can be digitized and analyzed regarding the frequency, amplitude and phase variation of the SWs. The power consumption and chip area of the whole OCO are estimated to 166.4 mW and 1.31 mm2, respectively.

An evaluation of the Intel 2920 digital signal processing integrated circuit

NASA Technical Reports Server (NTRS)

Heller, J.

1981-01-01

The circuit consists of a digital to analog converter, accumulator, read write memory and UV erasable read only memory. The circuit can convert an analog signal to a digital representation, perform mathematical operations on the digital signal and subsequently convert the digital signal to an analog output. Development software tailored for programming the 2920 is presented.

Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

NASA Astrophysics Data System (ADS)

Tekwani, P. N.; Shah, M. T.

2017-10-01

This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

The Tracking Resonance Frequency Method for Photoacoustic Measurements Based on the Phase Response

NASA Astrophysics Data System (ADS)

Suchenek, Mariusz

2017-04-01

One of the major issues in the use of the resonant photoacoustic cell is the resonance frequency of the cell. The frequency is not stable, and its changes depend mostly on temperature and gas mixture. This paper presents a new method for tracking resonance frequency, where both the amplitude and phase are calculated from the input samples. The stimulating frequency can be adjusted to the resonance frequency of the cell based on the phase. This method was implemented using a digital measurement system with an analog to digital converter, field programmable gate array (FPGA) and a microcontroller. The resonance frequency was changed by the injection of carbon dioxide into the cell. A theoretical description and experimental results are also presented.

Imaging RF Phased Array Receivers using Optically-Coherent Up-conversion for High Beam-Bandwidth Processing

DTIC Science & Technology

2017-03-01

It does so by using an optical lens to perform an inverse spatial Fourier Transform on the up-converted RF signals, thereby rendering a real-time... simultaneous beams or other engineered beam patterns. There are two general approaches to array-based beam forming: digital and analog. In digital beam...of significantly limiting the number of beams that can be formed simultaneously and narrowing the operational bandwidth. An alternate approach that

A Synthetic Quadrature Phase Detector/Demodulator for Fourier Transform Transform Spectrometers

NASA Technical Reports Server (NTRS)

Campbell, Joel

2008-01-01

A method is developed to demodulate (velocity correct) Fourier transform spectrometer (FTS) data that is taken with an analog to digital converter that digitizes equally spaced in time. This method makes it possible to use simple low cost, high resolution audio digitizers to record high quality data without the need for an event timer or quadrature laser hardware, and makes it possible to use a metrology laser of any wavelength. The reduced parts count and simplicity implementation makes it an attractive alternative in space based applications when compared to previous methods such as the Brault algorithm.

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, William H.

2017-01-01

Software Defined Radio is an industry term describing a method of utilizing a minimum amount of Radio Frequency (RF)/analog electronics before digitization takes place. Upon digitization all other functions are performed in software/firmware. There are as many different types of SDRs as there are data systems. Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. This presentation will show how the emerging SDR market has leveraged the existing commercial sector to provide a path to a radiation tolerant SDR transponder. These innovations will reduce the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. A second pay-off is the increased flexibility of the SDR by allowing the same hardware to implement multiple transponder types by altering hardware logic - no change of analog hardware is required - all of which can be ultimately accomplished in orbit. This in turn would provide high capability and low cost transponder to programs of all sizes.

Software Defined Radios - Architectures, Systems and Functions

NASA Technical Reports Server (NTRS)

Sims, Herb

2017-01-01

Software Defined Radio is an industry term describing a method of utilizing a minimum amount of Radio Frequency (RF)/analog electronics before digitization takes place. Upon digitization all other functions are performed in software/firmware. There are as many different types of SDRs as there are data systems. Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. This presentation will show how the emerging SDR market has leveraged the existing commercial sector to provide a path to a radiation tolerant SDR transponder. These innovations will reduce the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. A second pay-off is the increased flexibility of the SDR by allowing the same hardware to implement multiple transponder types by altering hardware logic - no change of analog hardware is required - all of which can be ultimately accomplished in orbit. This in turn would provide high capability and low cost transponder to programs of all sizes

Development of a Crosstalk Suppression Algorithm for KID Readout

NASA Astrophysics Data System (ADS)

Lee, Kyungmin; Ishitsuka, H.; Oguri, S.; Suzuki, J.; Tajima, O.; Tomita, N.; Won, Eunil; Yoshida, M.

2018-06-01

The GroundBIRD telescope aims to detect B-mode polarization of the cosmic microwave background radiation using the kinetic inductance detector array as a polarimeter. For the readout of the signal from detector array, we have developed a frequency division multiplexing readout system based on a digital down converter method. These techniques in general have the leakage problems caused by the crosstalks. The window function was applied in the field programmable gate arrays to mitigate the effect of these problems and tested it in algorithm level.

The DBBC environment for millimeter radioastronomy

NASA Astrophysics Data System (ADS)

Tuccari, Gino; Comoretto, Giovanni; Melis, Andrea; Buttaccio, Salvo

2012-09-01

The Digital Base Band Converter project developed in the last decade produced a general architecture and a class of boards, firmware and software, giving the possibility to build a general purpose back-end system for VLBI or single-dish observational activities. Such approach suggests the realization of a digital radio system, i.e. a receiver with conversion not realized with analogue techniques, maintaining only amplification stages in the analogue domain. This solution can be applied until a maximum around 16 GHz, the present limit for the instantaneous input band in the latest version of the DBBC project, while in the millimeter frequency range this maximum limit of 0.5-2 GHz of the previous versions allows the intermediate frequency to be processed in the digital domain. A description of the elements developed in the DBBC project is presented, with their use in different environments. The architecture is composed of a PC controlled mainframe, and of different modules that can be combined in a very flexible way in order to realize different instruments. The instrument can be expanded or retrofitted to meet increasing observational demands. Available modules include ADC converters, processing boards, physical interfaces (VSI and 10G Ethernet). Several applications have already been implemented and used in radioastronomic observations: a DDC (Direct Digital Conversion) for VLBI observations, a Polyphase Digital Filter Bank, and a Multiband Scansion Spectrometer. Other applications are currently studied for additional functionalities like a spectropolarimeter, a linear-to-circular polarization converter, a RFI-mitigation tool, and a phase-reference holographic tool-kit.

Highly linear, sensitive analog-to-digital converter

NASA Technical Reports Server (NTRS)

Cox, J.; Finley, W. R.

1969-01-01

Analog-to-digital converter converts 10 volt full scale input signal into 13 bit digital output. Advantages include high sensitivity, linearity, low quantitizing error, high resistance to mechanical shock and vibration loads, and temporary data storage capabilities.

Second harmonic generation in resonant optical structures

DOEpatents

Eichenfield, Matt; Moore, Jeremy; Friedmann, Thomas A.; Olsson, Roy H.; Wiwi, Michael; Padilla, Camille; Douglas, James Kenneth; Hattar, Khalid Mikhiel

2018-01-09

An optical second-harmonic generator (or spontaneous parametric down-converter) includes a microresonator formed of a nonlinear optical medium. The microresonator supports at least two modes that can be phase matched at different frequencies so that light can be converted between them: A first resonant mode having substantially radial polarization and a second resonant mode having substantially vertical polarization. The first and second modes have the same radial order. The thickness of the nonlinear medium is less than one-half the pump wavelength within the medium.

Charge integration successive approximation analog-to-digital converter for focal plane applications using a single amplifier

NASA Technical Reports Server (NTRS)

Zhou, Zhimin (Inventor); Pain, Bedabrata (Inventor)

1999-01-01

An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes a single charge integrating amplifier in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.

Decentralized Interleaving of Paralleled Dc-Dc Buck Converters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Brian B; Rodriguez, Miguel; Sinha, Mohit

We present a decentralized control strategy that yields switch interleaving among parallel-connected dc-dc buck converters. The proposed method is based on the digital implementation of the dynamics of a nonlinear oscillator circuit as the controller. Each controller is fully decentralized, i.e., it only requires the locally measured output current to synthesize the pulse width modulation (PWM) carrier waveform and no communication between different controllers is needed. By virtue of the intrinsic electrical coupling between converters, the nonlinear oscillator-based controllers converge to an interleaved state with uniform phase-spacing across PWM carriers. To the knowledge of the authors, this work presents themore » first fully decentralized strategy for switch interleaving in paralleled dc-dc buck converters.« less

Flexible, reconfigurable, power efficient transmitter and method

NASA Technical Reports Server (NTRS)

Bishop, James W. (Inventor); Zaki, Nazrul H. Mohd (Inventor); Newman, David Childress (Inventor); Bundick, Steven N. (Inventor)

2011-01-01

A flexible, reconfigurable, power efficient transmitter device and method is provided. In one embodiment, the method includes receiving outbound data and determining a mode of operation. When operating in a first mode the method may include modulation mapping the outbound data according a modulation scheme to provide first modulation mapped digital data, converting the first modulation mapped digital data to an analog signal that comprises an intermediate frequency (IF) analog signal, upconverting the IF analog signal to produce a first modulated radio frequency (RF) signal based on a local oscillator signal, amplifying the first RF modulated signal to produce a first RF output signal, and outputting the first RF output signal via an isolator. In a second mode of operation method may include modulation mapping the outbound data according a modulation scheme to provide second modulation mapped digital data, converting the second modulation mapped digital data to a first digital baseband signal, conditioning the first digital baseband signal to provide a first analog baseband signal, modulating one or more carriers with the first analog baseband signal to produce a second modulated RF signal based on a local oscillator signal, amplifying the second RF modulated signal to produce a second RF output signal, and outputting the second RF output signal via the isolator. The digital baseband signal may comprise an in-phase (I) digital baseband signal and a quadrature (Q) baseband signal.

A Fully Integrated Sensor SoC with Digital Calibration Hardware and Wireless Transceiver at 2.4 GHz

PubMed Central

Kim, Dong-Sun; Jang, Sung-Joon; Hwang, Tae-Ho

2013-01-01

A single-chip sensor system-on-a-chip (SoC) that implements radio for 2.4 GHz, complete digital baseband physical layer (PHY), 10-bit sigma-delta analog-to-digital converter and dedicated sensor calibration hardware for industrial sensing systems has been proposed and integrated in a 0.18-μm CMOS technology. The transceiver's building block includes a low-noise amplifier, mixer, channel filter, receiver signal-strength indicator, frequency synthesizer, voltage-controlled oscillator, and power amplifier. In addition, the digital building block consists of offset quadrature phase-shift keying (OQPSK) modulation, demodulation, carrier frequency offset compensation, auto-gain control, digital MAC function, sensor calibration hardware and embedded 8-bit microcontroller. The digital MAC function supports cyclic redundancy check (CRC), inter-symbol timing check, MAC frame control, and automatic retransmission. The embedded sensor signal processing block consists of calibration coefficient calculator, sensing data calibration mapper and sigma-delta analog-to-digital converter with digital decimation filter. The sensitivity of the overall receiver and the error vector magnitude (EVM) of the overall transmitter are −99 dBm and 18.14%, respectively. The proposed calibration scheme has a reduction of errors by about 45.4% compared with the improved progressive polynomial calibration (PPC) method and the maximum current consumption of the SoC is 16 mA. PMID:23698271

Automated recognition of helium speech. Phase I: Investigation of microprocessor based analysis/synthesis system

NASA Astrophysics Data System (ADS)

Jelinek, H. J.

1986-01-01

This is the Final Report of Electronic Design Associates on its Phase I SBIR project. The purpose of this project is to develop a method for correcting helium speech, as experienced in diver-surface communication. The goal of the Phase I study was to design, prototype, and evaluate a real time helium speech corrector system based upon digital signal processing techniques. The general approach was to develop hardware (an IBM PC board) to digitize helium speech and software (a LAMBDA computer based simulation) to translate the speech. As planned in the study proposal, this initial prototype may now be used to assess expected performance from a self contained real time system which uses an identical algorithm. The Final Report details the work carried out to produce the prototype system. Four major project tasks were: a signal processing scheme for converting helium speech to normal sounding speech was generated. The signal processing scheme was simulated on a general purpose (LAMDA) computer. Actual helium speech was supplied to the simulation and the converted speech was generated. An IBM-PC based 14 bit data Input/Output board was designed and built. A bibliography of references on speech processing was generated.

The modulation and demodulation module of a high resolution MOEMS accelerometer

NASA Astrophysics Data System (ADS)

Jiao, Xufen; Bai, Jian; Lu, Qianbo; Lou, Shuqi

2016-02-01

A MOEMS accelerometer with high precision based on grating interferometer is demonstrated in this paper. In order to increase the signal-to-noise ratio (SNR) and accuracy, a specific modulator and an orthogonal phase-lock demodulator are proposed. Phase modulation is introduced to this accelerometer by applying a sinusoidal signal to a piezoelectric translator (PZT) amounted to the accelerometer. Phase demodulation module consists of a circuit design and a digital design. In the circuit design, the modulated light intensity signal is converted to a voltage signal and processed. In the digital part, the demodulator is mainly composed of a Band Pass Filter, two Phase-Sensitive Detectors, a phase shifter, and two Low Pass Filters based on virtual instrument. Simulation results indicate that this approach can decrease the noise greatly, and the SNR of this demodulator is 50dB and the relative error is less than 4%.

Method and apparatus for spur-reduced digital sinusoid synthesis

NASA Technical Reports Server (NTRS)

Zimmerman, George A. (Inventor); Flanagan, Michael J. (Inventor)

1995-01-01

A technique for reducing the spurious signal content in digital sinusoid synthesis is presented. Spur reduction is accomplished through dithering both amplitude and phase values prior to word-length reduction. The analytical approach developed for analog quantization is used to produce new bounds on spur performance in these dithered systems. Amplitude dithering allows output word-length reduction without introducing additional spurs. Effects of periodic dither similar to that produced by a pseudo-noise (PN) generator are analyzed. This phase dithering method provides a spur reduction of 6(M + 1) dB per phase bit when the dither consists of M uniform variates. While the spur reduction is at the expense of an increase in system noise, the noise power can be made white, making the power spectral density small. This technique permits the use of a smaller number of phase bits addressing sinusoid look-up tables, resulting in an exponential decrease in system complexity. Amplitude dithering allows the use of less complicated multipliers and narrower data paths in purely digital applications, as well as the use of coarse-resolution, highly-linear digital-to-analog converters (DAC's) to obtain spur performance limited by the DAC linearity rather than its resolution.

Temperature dependence of terahertz optical properties of LBO and perspectives of applications in down-converters

NASA Astrophysics Data System (ADS)

Nikolaev, N. A.; Andreev, Yu. M.; Kononova, N. G.; Lanskii, G. V.; Mamrashev, A. A.; Antsygin, V. D.; Kokh, K. A.; Kokh, A. E.

2018-01-01

Lithium triborate LiB3O5 (LBO) crystals are widely used for frequency conversion of the near-IR lasers within main transparency windows. Their optical properties at these wavelengths are well studied. However, very little work has been published on the properties in the terahertz (THz) range. There was a lack of data on the refractive indices, the absorption coefficients spectra and their temperature dispersions. There are no reports of THz applications. Present work reveals all these topics including the prospects for use LBO crystals as down-converters of the near-IR lasers radiation. Optically finished samples of flux-grown LBO crystals were studied by THz-TDS. The refractive index dispersions were recorded and then approximated in the form of Sellmeier equations for the temperatures of 300 and 81 K. The phase-matching curves for the IR-THz and THz-THz frequency conversions were calculated. It was found that the absorption coefficients of LBO decrease significantly with cooling to cryogenic temperatures, but the overall character of optical properties changes is intricated. Experimental results are discussed in detail considering potential characteristics of THz down-converters.

Omniview motionless camera orientation system

NASA Technical Reports Server (NTRS)

Martin, H. Lee (Inventor); Kuban, Daniel P. (Inventor); Zimmermann, Steven D. (Inventor); Busko, Nicholas (Inventor)

2010-01-01

An apparatus and method is provided for converting digital images for use in an imaging system. The apparatus includes a data memory which stores digital data representing an image having a circular or spherical field of view such as an image captured by a fish-eye lens, a control input for receiving a signal for selecting a portion of the image, and a converter responsive to the control input for converting digital data corresponding to the selected portion into digital data representing a planar image for subsequent display. Various methods include the steps of storing digital data representing an image having a circular or spherical field of view, selecting a portion of the image, and converting the stored digital data corresponding to the selected portion into digital data representing a planar image for subsequent display. In various embodiments, the data converter and data conversion step may use an orthogonal set of transformation algorithms.

Efficient high-performance ultrasound beamforming using oversampling

NASA Astrophysics Data System (ADS)

Freeman, Steven R.; Quick, Marshall K.; Morin, Marc A.; Anderson, R. C.; Desilets, Charles S.; Linnenbrink, Thomas E.; O'Donnell, Matthew

1998-05-01

High-performance and efficient beamforming circuitry is very important in large channel count clinical ultrasound systems. Current state-of-the-art digital systems using multi-bit analog to digital converters (A/Ds) have matured to provide exquisite image quality with moderate levels of integration. A simplified oversampling beamforming architecture has been proposed that may a low integration of delta-sigma A/Ds onto the same chip as digital delay and processing circuitry to form a monolithic ultrasound beamformer. Such a beamformer may enable low-power handheld scanners for high-end systems with very large channel count arrays. This paper presents an oversampling beamformer architecture that generates high-quality images using very simple; digitization, delay, and summing circuits. Additional performance may be obtained with this oversampled system for narrow bandwidth excitations by mixing the RF signal down in frequency to a range where the electronic signal to nose ratio of the delta-sigma A/D is optimized. An oversampled transmit beamformer uses the same delay circuits as receive and eliminates the need for separate transmit function generators.

Design and Testing of Space Telemetry SCA Waveform

NASA Technical Reports Server (NTRS)

Mortensen, Dale J.; Handler, Louis M.; Quinn, Todd M.

2006-01-01

A Software Communications Architecture (SCA) Waveform for space telemetry is being developed at the NASA Glenn Research Center (GRC). The space telemetry waveform is implemented in a laboratory testbed consisting of general purpose processors, field programmable gate arrays (FPGAs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). The radio hardware is integrated with an SCA Core Framework and other software development tools. The waveform design is described from both the bottom-up signal processing and top-down software component perspectives. Simulations and model-based design techniques used for signal processing subsystems are presented. Testing with legacy hardware-based modems verifies proper design implementation and dynamic waveform operations. The waveform development is part of an effort by NASA to define an open architecture for space based reconfigurable transceivers. Use of the SCA as a reference has increased understanding of software defined radio architectures. However, since space requirements put a premium on size, mass, and power, the SCA may be impractical for today s space ready technology. Specific requirements for an SCA waveform and other lessons learned from this development are discussed.

Hardware description ADSP-21020 40-bit floating point DSP as designed in a remotely controlled digital CW Doppler radar

NASA Astrophysics Data System (ADS)

Morrison, R. E.; Robinson, S. H.

A continuous wave Doppler radar system has been designed which is portable, easily deployed, and remotely controlled. The heart of this system is a DSP/control board using Analog Devices ADSP-21020 40-bit floating point digital signal processor (DSP) microprocessor. Two 18-bit audio A/D converters provide digital input to the DSP/controller board for near real time target detection. Program memory for the DSP is dual ported with an Intel 87C51 microcontroller allowing DSP code to be up-loaded or down-loaded from a central controlling computer. The 87C51 provides overall system control for the remote radar and includes a time-of-day/day-of-year real time clock, system identification (ID) switches, and input/output (I/O) expansion by an Intel 82C55 I/O expander.

P-code enhanced method for processing encrypted GPS signals without knowledge of the encryption code

NASA Technical Reports Server (NTRS)

Young, Lawrence E. (Inventor); Meehan, Thomas K. (Inventor); Thomas, Jr., Jess Brooks (Inventor)

2000-01-01

In the preferred embodiment, an encrypted GPS signal is down-converted from RF to baseband to generate two quadrature components for each RF signal (L1 and L2). Separately and independently for each RF signal and each quadrature component, the four down-converted signals are counter-rotated with a respective model phase, correlated with a respective model P code, and then successively summed and dumped over presum intervals substantially coincident with chips of the respective encryption code. Without knowledge of the encryption-code signs, the effect of encryption-code sign flips is then substantially reduced by selected combinations of the resulting presums between associated quadrature components for each RF signal, separately and independently for the L1 and L2 signals. The resulting combined presums are then summed and dumped over longer intervals and further processed to extract amplitude, phase and delay for each RF signal. Precision of the resulting phase and delay values is approximately four times better than that obtained from straight cross-correlation of L1 and L2. This improved method provides the following options: separate and independent tracking of the L1-Y and L2-Y channels; separate and independent measurement of amplitude, phase and delay L1-Y channel; and removal of the half-cycle ambiguity in L1-Y and L2-Y carrier phase.

Intermediate frequency band digitized high dynamic range radiometer system for plasma diagnostics and real-time Tokamak control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bongers, W. A.; Beveren, V. van; Westerhof, E.

2011-06-15

An intermediate frequency (IF) band digitizing radiometer system in the 100-200 GHz frequency range has been developed for Tokamak diagnostics and control, and other fields of research which require a high flexibility in frequency resolution combined with a large bandwidth and the retrieval of the full wave information of the mm-wave signals under investigation. The system is based on directly digitizing the IF band after down conversion. The enabling technology consists of a fast multi-giga sample analog to digital converter that has recently become available. Field programmable gate arrays (FPGA) are implemented to accomplish versatile real-time data analysis. A prototypemore » system has been developed and tested and its performance has been compared with conventional electron cyclotron emission (ECE) spectrometer systems. On the TEXTOR Tokamak a proof of principle shows that ECE, together with high power injected and scattered radiation, becomes amenable to measurement by this device. In particular, its capability to measure the phase of coherent signals in the spectrum offers important advantages in diagnostics and control. One case developed in detail employs the FPGA in real-time fast Fourier transform (FFT) and additional signal processing. The major benefit of such a FFT-based system is the real-time trade-off that can be made between frequency and time resolution. For ECE diagnostics this corresponds to a flexible spatial resolution in the plasma, with potential application in smart sensing of plasma instabilities such as the neoclassical tearing mode (NTM) and sawtooth instabilities. The flexible resolution would allow for the measurement of the full mode content of plasma instabilities contained within the system bandwidth.« less

A simple and versatile phase detector for heterodyne interferometers

NASA Astrophysics Data System (ADS)

Mlynek, A.; Faugel, H.; Eixenberger, H.; Pautasso, G.; Sellmair, G.

2017-02-01

The measurement of the relative phase of two sinusoidal electrical signals is a frequently encountered task in heterodyne interferometry, but also occurs in many other applications. Especially in interferometry, multi-radian detectors are often required, which track the temporal evolution of the phase difference and are able to register phase changes that exceed 2π. While a large variety of solutions to this problem is already known, we present an alternative approach, which pre-processes the signals with simple analog circuitry and digitizes two resulting voltages with an analog-to-digital converter (ADC), whose sampling frequency can be far below the frequency of the sinusoidal signals. Phase reconstruction is finally carried out by software. The main advantage of this approach is its simplicity, using only few low-cost hardware components and a standard 2-channel ADC with low performance requirements. We present an application on the two-color interferometer of the ASDEX Upgrade tokamak, where the relative phase of 40 MHz sinusoids is measured.

Digital Receiver Phase Meter

NASA Technical Reports Server (NTRS)

Marcin, Martin; Abramovici, Alexander

2008-01-01

The software of a commercially available digital radio receiver has been modified to make the receiver function as a two-channel low-noise phase meter. This phase meter is a prototype in the continuing development of a phase meter for a system in which radiofrequency (RF) signals in the two channels would be outputs of a spaceborne heterodyne laser interferometer for detecting gravitational waves. The frequencies of the signals could include a common Doppler-shift component of as much as 15 MHz. The phase meter is required to measure the relative phases of the signals in the two channels at a sampling rate of 10 Hz at a root power spectral density <5 microcycle/(Hz)1/2 and to be capable of determining the power spectral density of the phase difference over the frequency range from 1 mHz to 1 Hz. Such a phase meter could also be used on Earth to perform similar measurements in laser metrology of moving bodies. To illustrate part of the principle of operation of the phase meter, the figure includes a simplified block diagram of a basic singlechannel digital receiver. The input RF signal is first fed to the input terminal of an analog-to-digital converter (ADC). To prevent aliasing errors in the ADC, the sampling rate must be at least twice the input signal frequency. The sampling rate of the ADC is governed by a sampling clock, which also drives a digital local oscillator (DLO), which is a direct digital frequency synthesizer. The DLO produces samples of sine and cosine signals at a programmed tuning frequency. The sine and cosine samples are mixed with (that is, multiplied by) the samples from the ADC, then low-pass filtered to obtain in-phase (I) and quadrature (Q) signal components. A digital signal processor (DSP) computes the ratio between the Q and I components, computes the phase of the RF signal (relative to that of the DLO signal) as the arctangent of this ratio, and then averages successive such phase values over a time interval specified by the user.

Conversion loss and noise of microwave and millimeter-wave mixers. I - Theory. II - Experiment

NASA Technical Reports Server (NTRS)

Held, D. N.; Kerr, A. R.

1978-01-01

The conversion loss and noise of microwave and millimeter-wave mixers are analyzed. Nonlinear capacitance, arbitrary embedding impedances, as well as shot, thermal and scattering noise arising in the diode, figure in the analysis. The anomalous mixer noise noted in millimeter-wave mixers by Kerr (1975) is shown to be explainable in terms of the correlation of down-converted components of the time-varying shot noise. A digital computer analysis of the conversion loss, noise, and output impedance of an 80-120-GHz mixer is also conducted.

GPU Acceleration of DSP for Communication Receivers.

PubMed

Gunther, Jake; Gunther, Hyrum; Moon, Todd

2017-09-01

Graphics processing unit (GPU) implementations of signal processing algorithms can outperform CPU-based implementations. This paper describes the GPU implementation of several algorithms encountered in a wide range of high-data rate communication receivers including filters, multirate filters, numerically controlled oscillators, and multi-stage digital down converters. These structures are tested by processing the 20 MHz wide FM radio band (88-108 MHz). Two receiver structures are explored: a single channel receiver and a filter bank channelizer. Both run in real time on NVIDIA GeForce GTX 1080 graphics card.

RF digital-to-analog converter

DOEpatents

Conway, Patrick H.; Yu, David U. L.

1995-01-01

A digital-to analogue converter for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration.

A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA

NASA Astrophysics Data System (ADS)

Zhujia, Chen; Haigang, Yang; Fei, Liu; Yu, Wang

2011-10-01

A fast-locking all-digital delay-locked loop (ADDLL) is proposed for the DDR SDRAM controller interface in a field programmable gate array (FPGA). The ADDLL performs a 90° phase-shift so that the data strobe (DQS) can enlarge the data valid window in order to minimize skew. In order to further reduce the locking time and to prevent the harmonic locking problem, a time-to-digital converter (TDC) is proposed. A duty cycle corrector (DCC) is also designed in the ADDLL to adjust the output duty cycle to 50%. The ADDLL, implemented in a commercial 0.13 μm CMOS process, occupies a total of 0.017 mm2 of active area. Measurement results show that the ADDLL has an operating frequency range of 75 to 350 MHz and a total delay resolution of 15 ps. The time interval error (TIE) of the proposed circuit is 60.7 ps.

A digital receiver module with direct data acquisition for magnetic resonance imaging systems.

PubMed

Tang, Weinan; Sun, Hongyu; Wang, Weimin

2012-10-01

A digital receiver module for magnetic resonance imaging (MRI) with detailed hardware implementations is presented. The module is based on a direct sampling scheme using the latest mixed-signal circuit design techniques. A single field-programmable gate array chip is employed to perform software-based digital down conversion for radio frequency signals. The modular architecture of the receiver allows multiple acquisition channels to be implemented on a highly integrated printed circuit board. To maintain the phase coherence of the receiver and the exciter in the context of direct sampling, an effective phase synchronization method was proposed to achieve a phase deviation as small as 0.09°. The performance of the described receiver module was verified in the experiments for both low- and high-field (0.5 T and 1.5 T) MRI scanners and was compared to a modern commercial MRI receiver system.

Dynamic tracking down-conversion signal processing method based on reference signal for grating heterodyne interferometer

NASA Astrophysics Data System (ADS)

Wang, Guochao; Yan, Shuhua; Zhou, Weihong; Gu, Chenhui

2012-08-01

Traditional displacement measurement systems by grating, which purely make use of fringe intensity to implement fringe count and subdivision, have rigid demands for signal quality and measurement condition, so they are not easy to realize measurement with nanometer precision. Displacement measurement with the dual-wavelength and single-grating design takes advantage of the single grating diffraction theory and the heterodyne interference theory, solving quite well the contradiction between large range and high precision in grating displacement measurement. To obtain nanometer resolution and nanometer precision, high-power subdivision of interference fringes must be realized accurately. A dynamic tracking down-conversion signal processing method based on the reference signal is proposed. Accordingly, a digital phase measurement module to realize high-power subdivision on field programmable gate array (FPGA) was designed, as well as a dynamic tracking down-conversion module using phase-locked loop (PLL). Experiments validated that a carrier signal after down-conversion can constantly maintain close to 100 kHz, and the phase-measurement resolution and phase precision are more than 0.05 and 0.2 deg, respectively. The displacement resolution and the displacement precision, corresponding to the phase results, are 0.139 and 0.556 nm, respectively.

Clock and carrier recovery in high-speed coherent optical communication systems

NASA Astrophysics Data System (ADS)

Amado, Sofia B.; Ferreira, Ricardo; Costa, Pedro S.; Guiomar, Fernando P.; Ziaie, Somayeh; Teixeira, António L.; Muga, Nelson J.; Pinto, Armando N.

2014-08-01

In this paper, the implementations of clock and carrier recovery in digital domain are analyzed. Hardware implementation details, resources estimation and real-time results are presented. Analog-to-Digital Converters (ADC), operating at 1.25Gsa/s, and a Virtex-6 Field-Programmable Gate Array (FPGA), have been used, allowing the implementation of a real-time Quadrature Phase Shift Keying (QPSK) system operating at 1.25Gb/s. The real-time mode operation is successfully demonstrated over 80 km of Standard Single Mode Fiber (SSMF).

Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

NASA Technical Reports Server (NTRS)

Wrigley, Christopher James (Inventor); Hancock, Bruce R. (Inventor); Cunningham, Thomas J. (Inventor); Newton, Kenneth W. (Inventor)

2014-01-01

An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

A bunch to bucket phase detector for the RHIC LLRF upgrade platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.S.; Harvey, M.; Hayes, T.

2011-03-28

As part of the overall development effort for the RHIC LLRF Upgrade Platform [1,2,3], a generic four channel 16 bit Analog-to-Digital Converter (ADC) daughter module was developed to provide high speed, wide dynamic range digitizing and processing of signals from DC to several hundred megahertz. The first operational use of this card was to implement the bunch to bucket phase detector for the RHIC LLRF beam control feedback loops. This paper will describe the design and performance features of this daughter module as a bunch to bucket phase detector, and also provide an overview of its place within the overallmore » LLRF platform architecture as a high performance digitizer and signal processing module suitable to a variety of applications. In modern digital control and signal processing systems, ADCs provide the interface between the analog and digital signal domains. Once digitized, signals are then typically processed using algorithms implemented in field programmable gate array (FPGA) logic, general purpose processors (GPPs), digital signal processors (DSPs) or a combination of these. For the recently developed and commissioned RHIC LLRF Upgrade Platform, we've developed a four channel ADC daughter module based on the Linear Technology LTC2209 16 bit, 160 MSPS ADC and the Xilinx V5FX70T FPGA. The module is designed to be relatively generic in application, and with minimal analog filtering on board, is capable of processing signals from DC to 500 MHz or more. The module's first application was to implement the bunch to bucket phase detector (BTB-PD) for the RHIC LLRF system. The same module also provides DC digitizing of analog processed BPM signals used by the LLRF system for radial feedback.« less

RF digital-to-analog converter

DOEpatents

Conway, P.H.; Yu, D.U.L.

1995-02-28

A digital-to-analog converter is disclosed for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration. 18 figs.

Recent Radiation Damage and Single Event Effect Results for Candidate Spacecraft Electronics

NASA Technical Reports Server (NTRS)

OBryan, Martha V.; LaBel, Kenneth A.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Buchner, Stephen P.; Barth, Janet L.; Kniffen, Scott D.; Seidleck, Christina M.; Marshall, Cheryl J.;

Current Single Event Effects and Radiation Damage Results for Candidate Spacecraft Electronics

NASA Technical Reports Server (NTRS)

OBryan, Martha V.; LaBel, Kenneth A.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Kniffin, Scott D.; Poivey, Christian; Buchner, Stephen P.; Bings, John P.; Titus, Jeff L.

2002-01-01

We present data on the vulnerability of a variety of candidate spacecraft electronics to proton and heavy ion induced single event effects, total ionizing dose and proton-induced damage. Devices tested include optoelectronics, digital, analog, linear bipolar, hybrid devices, Analog-to-Digital Converters (ADCs), Digital-to-Analog Converters (DACs), and DC-DC converters, among others.

Parametric down-conversion with nonideal and random quasi-phase-matching

NASA Astrophysics Data System (ADS)

Yang, Chun-Yao; Lin, Chun; Liljestrand, Charlotte; Su, Wei-Min; Canalias, Carlota; Chuu, Chih-Sung

2016-05-01

Quasi-phase-matching (QPM) has enriched the capacity of parametric down-conversion (PDC) in generating biphotons for many fundamental tests and advanced applications. However, it is not clear how the nonidealities and randomness in the QPM grating of a parametric down-converter may affect the quantum properties of the biphotons. This paper intends to provide insights into the interplay between PDC and nonideal or random QPM structures. Using a periodically poled nonlinear crystal with short periodicity, we conduct experimental and theoretical studies of PDC subject to nonideal duty cycle and random errors in domain lengths. We report the observation of biphotons emerging through noncritical birefringent-phasematching, which is impossible to occur in PDC with an ideal QPM grating, and a biphoton spectrum determined by the details of nonidealities and randomness. We also observed QPM biphotons with a diminished strength. These features are both confirmed by our theory. Our work provides new perspectives for biphoton engineering with QPM.

Design and development progress of a LLRF control system for a 500 MHz superconducting cavity

NASA Astrophysics Data System (ADS)

Lee, Y. S.; Kim, H. W.; Song, H. S.; Lee, J. H.; Park, K. H.; Yu, I. H.; Chai, J. S.

2012-07-01

The LLRF (low-level radio-frequency) control system which regulates the amplitude and the phase of the accelerating voltage inside a RF cavity is essential to ensure the stable operation of charged particle accelerators. Recent advances in digital signal processors and data acquisition systems have allowed the LLRF control system to be implemented in digitally and have made it possible to meet the higher demands associated with the performance of LLRF control systems, such as stability, accuracy, etc. For this reason, many accelerator laboratories have completed or are completing the developments of digital LLRF control systems. The digital LLRF control system has advantages related with flexibility and fast reconfiguration. This paper describes the design of the FPGA (field programmable gate array) based LLRF control system and the status of development for this system. The proposed LLRF control system includes an analog front-end, a digital board (ADC (analog to digital converter), DAC (digital to analog converter), FPGA, etc.) and a RF & clock generation system. The control algorithms will be implemented by using the VHDL (VHSIC (very high speed integrated circuits) hardware description language), and the EPICS (experiment physics and industrial control system) will be ported to the host computer for the communication. In addition, the purpose of this system is to control a 500 MHz RF cavity, so the system will be applied to the superconducting cavity to be installed in the PLS storage ring, and its performance will be tested.

High-frequency AC/DC converter with unity power factor and minimum harmonic distortion

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wernekinch, E.R.

1987-01-01

The power factor is controlled by adjusting the relative position of the fundamental component of an optimized PWM-type voltage with respect to the supply voltage. Current harmonic distortion is minimized by the use of optimized firing angles for the converter at a frequency where GTO's can be used. This feature makes this approach very attractive at power levels of 100 to 600 kW. To obtain the optimized PWM pattern, a steepest descent digital computer algorithm is used. Digital-computer simulations are performed and a low-power model is constructed and tested to verify the concepts and the behavior of the model. Experimentalmore » results show that unity power factor is achieved and that the distortion in the phase currents is 10.4% at 90% of full load. This is less than achievable with sinusoidal PWM, harmonic elimination, hysteresis control, and deadbeat control for the same switching frequency.« less

Development of a digital solar simulator based on full-bridge converter

NASA Astrophysics Data System (ADS)

Liu, Chen; Feng, Jian; Liu, Zhilong; Tong, Weichao; Ji, Yibo

2014-02-01

With the development of solar photovoltaic, distribution schemes utilized in power grid had been commonly application, and photovoltaic (PV) inverter is an essential equipment in grid. In this paper, a digital solar simulator based on full-bridge structure is presented. The output characteristic curve of system is electrically similar to silicon solar cells, which can greatly simplify research methods of PV inverter, improve the efficiency of research and development. The proposed simulator consists on a main control board based on TM320F28335, phase-shifted zero-voltage-switching (ZVS) DC-DC full-bridge converter and voltage and current sampling circuit, that allows emulating the voltage-current curve with the open-circuit voltage (Voc) of 900V and the short-circuit current (Isc) of 18A .When the system connected to a PV inverter, the inverter can quickly track from the open-circuit to the maximum power point and keep stability.

Development and Performance Analysis of a Photonics-Assisted RF Converter for 5G Applications

NASA Astrophysics Data System (ADS)

Borges, Ramon Maia; Muniz, André Luiz Marques; Sodré Junior, Arismar Cerqueira

2017-03-01

This article presents a simple, ultra-wideband and tunable radiofrequency (RF) converter for 5G cellular networks. The proposed optoelectronic device performs broadband photonics-assisted upconversion and downconversion using a single optical modulator. Experimental results demonstrate RF conversion from DC to millimeter waves, including 28 and 38 GHz that are potential frequency bands for 5G applications. Narrow linewidth and low phase noise characteristics are observed in all generated RF carriers. An experimental digital performance analysis using different modulation schemes illustrates the applicability of the proposed photonics-based device in reconfigurable optical wireless communications.

Single-stage three-phase boost power factor correction circuit for AC-DC converter

NASA Astrophysics Data System (ADS)

Azazi, Haitham Z.; Ahmed, Sayed M.; Lashine, Azza E.

2018-01-01

This article presents a single-stage three-phase power factor correction (PFC) circuit for AC-to-DC converter using a single-switch boost regulator, leading to improve the input power factor (PF), reducing the input current harmonics and decreasing the number of required active switches. A novel PFC control strategy which is characterised as a simple and low-cost control circuit was adopted, for achieving a good dynamic performance, unity input PF, and minimising the harmonic contents of the input current, at which it can be applied to low/medium power converters. A detailed analytical, simulation and experimental studies were therefore conducted. The effectiveness of the proposed controller algorithm is validated by the simulation results, which were carried out using MATLAB/SIMULINK environment. The proposed system is built and tested in the laboratory using DSP-DS1104 digital control board for an inductive load. The results revealed that the total harmonic distortion in the supply current was very low. Finally, a good agreement between simulation and experimental results was achieved.

Digitally generated excitation and near-baseband quadrature detection of rapid scan EPR signals.

PubMed

Tseitlin, Mark; Yu, Zhelin; Quine, Richard W; Rinard, George A; Eaton, Sandra S; Eaton, Gareth R

2014-12-01

The use of multiple synchronized outputs from an arbitrary waveform generator (AWG) provides the opportunity to perform EPR experiments differently than by conventional EPR. We report a method for reconstructing the quadrature EPR spectrum from periodic signals that are generated with sinusoidal magnetic field modulation such as continuous wave (CW), multiharmonic, or rapid scan experiments. The signal is down-converted to an intermediate frequency (IF) that is less than the field scan or field modulation frequency and then digitized in a single channel. This method permits use of a high-pass analog filter before digitization to remove the strong non-EPR signal at the IF, that might otherwise overwhelm the digitizer. The IF is the difference between two synchronized X-band outputs from a Tektronix AWG 70002A, one of which is for excitation and the other is the reference for down-conversion. To permit signal averaging, timing was selected to give an exact integer number of full cycles for each frequency. In the experiments reported here the IF was 5kHz and the scan frequency was 40kHz. To produce sinusoidal rapid scans with a scan frequency eight times IF, a third synchronized output generated a square wave that was converted to a sine wave. The timing of the data acquisition with a Bruker SpecJet II was synchronized by an external clock signal from the AWG. The baseband quadrature signal in the frequency domain was reconstructed. This approach has the advantages that (i) the non-EPR response at the carrier frequency is eliminated, (ii) both real and imaginary EPR signals are reconstructed from a single physical channel to produce an ideal quadrature signal, and (iii) signal bandwidth does not increase relative to baseband detection. Spectra were obtained by deconvolution of the reconstructed signals for solid BDPA (1,3-bisdiphenylene-2-phenylallyl) in air, 0.2mM trityl OX63 in water, 15 N perdeuterated tempone, and a nitroxide with a 0.5G partially-resolved proton hyperfine splitting. Copyright © 2014 Elsevier Inc. All rights reserved.

Description and availability of airborne Doppler radar data

NASA Technical Reports Server (NTRS)

Harrah, S. D.; Bracalente, E. M.; Schaffner, P. R.; Baxa, E. G.

1993-01-01

An airborne, forward-looking, pulse, Doppler radar has been developed in conjunction with the joint FAA/NASA Wind Shear Program. This radar represents a first in an emerging technology. The radar was developed to assess the applicability of an airborne radar to detect low altitude hazardous wind shears for civil aviation applications. Such a radar must be capable of looking down into the ground clutter environment and extracting wind estimates from relatively low reflectivity weather targets. These weather targets often have reflectivities several orders of magnitude lower than the surrounding ground clutter. The NASA radar design incorporates numerous technological and engineering achievements in order to accomplish this task. The basic R/T unit evolved from a standard Collins 708 weather radar, which supports specific pulse widths of 1-7 microns and Pulse Repetition Frequencies (PRF) of less than 1-10 kHz. It was modified to allow for the output of the first IF signal, which fed a NASA developed receiver/detector subsystem. The NASA receiver incorporated a distributed, high-speed digital attenuator, producing a range bin to range bin automatic gain control system with 65 dB of dynamic range. Using group speed information supplied by the aircraft's navigation system, the radar signal is frequency demodulated back to base band (zero Doppler relative to stationary ground). The In-phase & Quadrature-phase (I/Q) components of the measured voltage signal are then digitized by a 12-bit A-D converter (producing an additional 36 dB of dynamic range). The raw I/Q signal for each range bin is then recorded (along with the current radar & aircraft state parameters) by a high-speed Kodak tape recorder.

75 FR 59100 - Removal of Regulations That Implement and Administer a Coupon Program for Digital-to-Analog...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-09-27

... Program for Digital-to-Analog Converter Boxes AGENCY: National Telecommunications and Information... the Digital-to-Analog Converter Box Program (Coupon Program). The regulations implemented provisions of section 3005 of the Digital Television Transition and Public Safety Act of 2005, as subsequently...

Wireless sensor platform for harsh environments

NASA Technical Reports Server (NTRS)

Garverick, Steven L. (Inventor); Yu, Xinyu (Inventor); Toygur, Lemi (Inventor); He, Yunli (Inventor)

2009-01-01

Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna.

Four-channel magnetic resonance imaging receiver using frequency domain multiplexing.

PubMed

He, Wang; Qin, Xu; Jiejing, Ren; Gengying, Li

2007-01-01

An alternative technique that uses frequency domain multiplexing to acquire phased array magnetic resonance images is discussed in detail. The proposed method has advantages over traditional independent receiver chains in that it utilizes an analog-to-digital converter and a single-chip multicarrier receiver with high performance to reduce the size and cost of the phased array receiver system. A practical four-channel digital receiver using frequency domain multiplexing was implemented and verified on a home-built 0.3 T magnetic resonance imaging system. The experimental results confirmed that the cross talk between each channel was below -60 dB, the phase fluctuations were about 1 degrees , and there was no obvious signal-to-noise ratio degradation. It is demonstrated that the frequency domain multiplexing is a valuable and economical technique, particularly for array coil systems where the multichannel receiver is indispensable and dynamic range is not a critical problem.

Step-by-Step Design of an FPGA-Based Digital Compensator for DC/DC Converters Oriented to an Introductory Course

ERIC Educational Resources Information Center

Zumel, P.; Fernandez, C.; Sanz, M.; Lazaro, A.; Barrado, A.

2011-01-01

In this paper, a short introductory course to introduce field-programmable gate array (FPGA)-based digital control of dc/dc switching power converters is presented. Digital control based on specific hardware has been at the leading edge of low-medium power dc/dc switching converters in recent years. Besides industry's interest in this topic, from…

Input and Output Mechanisms and Devices. Phase I: Adding Voice Output to a Speaker-Independent Recognition System.

ERIC Educational Resources Information Center

Scott Instruments Corp., Denton, TX.

This project was designed to develop techniques for adding low-cost speech synthesis to educational software. Four tasks were identified for the study: (1) select a microcomputer with a built-in analog-to-digital converter that is currently being used in educational environments; (2) determine the feasibility of implementing expansion and playback…

Coherent optical OFDM: theory and design.

PubMed

Shieh, W; Bao, H; Tang, Y

2008-01-21

Coherent optical OFDM (CO-OFDM) has recently been proposed and the proof-of-concept transmission experiments have shown its extreme robustness against chromatic dispersion and polarization mode dispersion. In this paper, we first review the theoretical fundamentals for CO-OFDM and its channel model in a 2x2 MIMO-OFDM representation. We then present various design choices for CO-OFDM systems and perform the nonlinearity analysis for RF-to-optical up-converter. We also show the receiver-based digital signal processing to mitigate self-phase-modulation (SPM) and Gordon-Mollenauer phase noise, which is equivalent to the midspan phase conjugation.

Quantization noise in digital speech. M.S. Thesis- Houston Univ.

NASA Technical Reports Server (NTRS)

Schmidt, O. L.

1972-01-01

The amount of quantization noise generated in a digital-to-analog converter is dependent on the number of bits or quantization levels used to digitize the analog signal in the analog-to-digital converter. The minimum number of quantization levels and the minimum sample rate were derived for a digital voice channel. A sample rate of 6000 samples per second and lowpass filters with a 3 db cutoff of 2400 Hz are required for 100 percent sentence intelligibility. Consonant sounds are the first speech components to be degraded by quantization noise. A compression amplifier can be used to increase the weighting of the consonant sound amplitudes in the analog-to-digital converter. An expansion network must be installed at the output of the digital-to-analog converter to restore the original weighting of the consonant sounds. This technique results in 100 percent sentence intelligibility for a sample rate of 5000 samples per second, eight quantization levels, and lowpass filters with a 3 db cutoff of 2000 Hz.

High reliability megawatt transformer/rectifier

NASA Technical Reports Server (NTRS)

Zwass, Samuel; Ashe, Harry; Peters, John W.

1991-01-01

The goal of the two phase program is to develop the technology and design and fabricate ultralightweight high reliability DC to DC converters for space power applications. The converters will operate from a 5000 V dc source and deliver 1 MW of power at 100 kV dc. The power weight density goal is 0.1 kg/kW. The cycle to cycle voltage stability goals was + or - 1 percent RMS. The converter is to operate at an ambient temperature of -40 C with 16 minute power pulses and one hour off time. The uniqueness of the design in Phase 1 resided in the dc switching array which operates the converter at 20 kHz using Hollotron plasma switches along with a specially designed low loss, low leakage inductance and a light weight high voltage transformer. This approach reduced considerably the number of components in the converter thereby increasing the system reliability. To achieve an optimum transformer for this application, the design uses four 25 kV secondary windings to produce the 100 kV dc output, thus reducing the transformer leakage inductance, and the ac voltage stresses. A specially designed insulation system improves the high voltage dielectric withstanding ability and reduces the insulation path thickness thereby reducing the component weight. Tradeoff studies and tests conducted on scaled-down model circuits and using representative coil insulation paths have verified the calculated transformer wave shape parameters and the insulation system safety. In Phase 1 of the program a converter design approach was developed and a preliminary transformer design was completed. A fault control circuit was designed and a thermal profile of the converter was also developed.

Digital optical conversion module

DOEpatents

Kotter, D.K.; Rankin, R.A.

1988-07-19

A digital optical conversion module used to convert an analog signal to a computer compatible digital signal including a voltage-to-frequency converter, frequency offset response circuitry, and an electrical-to-optical converter. Also used in conjunction with the digital optical conversion module is an optical link and an interface at the computer for converting the optical signal back to an electrical signal. Suitable for use in hostile environments having high levels of electromagnetic interference, the conversion module retains high resolution of the analog signal while eliminating the potential for errors due to noise and interference. The module can be used to link analog output scientific equipment such as an electrometer used with a mass spectrometer to a computer. 2 figs.

Digital optical conversion module

DOEpatents

Kotter, Dale K.; Rankin, Richard A.

1991-02-26

A digital optical conversion module used to convert an analog signal to a computer compatible digital signal including a voltage-to-frequency converter, frequency offset response circuitry, and an electrical-to-optical converter. Also used in conjunction with the digital optical conversion module is an optical link and an interface at the computer for converting the optical signal back to an electrical signal. Suitable for use in hostile environments having high levels of electromagnetic interference, the conversion module retains high resolution of the analog signal while eliminating the potential for errors due to noise and interference. The module can be used to link analog output scientific equipment such as an electrometer used with a mass spectrometer to a computer.

Calibration Test Set for a Phase-Comparison Digital Tracker

NASA Technical Reports Server (NTRS)

Boas, Amy; Li, Samuel; McMaster, Robert

2007-01-01

An apparatus that generates four signals at a frequency of 7.1 GHz having precisely controlled relative phases and equal amplitudes has been designed and built. This apparatus is intended mainly for use in computer-controlled automated calibration and testing of a phase-comparison digital tracker (PCDT) that measures the relative phases of replicas of the same X-band signal received by four antenna elements in an array. (The relative direction of incidence of the signal on the array is then computed from the relative phases.) The present apparatus can also be used to generate precisely phased signals for steering a beam transmitted from a phased antenna array. The apparatus (see figure) includes a 7.1-GHz signal generator, the output of which is fed to a four-way splitter. Each of the four splitter outputs is attenuated by 10 dB and fed as input to a vector modulator, wherein DC bias voltages are used to control the in-phase (I) and quadrature (Q) signal components. The bias voltages are generated by digital-to-analog- converter circuits on a control board that receives its digital control input from a computer running a LabVIEW program. The outputs of the vector modulators are further attenuated by 10 dB, then presented at high-grade radio-frequency connectors. The attenuation reduces the effects of changing mismatch and reflections. The apparatus was calibrated in a process in which the bias voltages were first stepped through all possible IQ settings. Then in a reverse interpolation performed by use of MATLAB software, a lookup table containing 3,600 IQ settings, representing equal amplitude and phase increments of 0.1 , was created for each vector modulator. During operation of the apparatus, these lookup tables are used in calibrating the PCDT.

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA on the GANDALF module

NASA Astrophysics Data System (ADS)

Büchele, M.; Fischer, H.; Gorzellik, M.; Herrmann, F.; Königsmann, K.; Schill, C.; Schopferer, S.

2012-03-01

The GANDALF 6U-VME64x/VXS module has been developed for the digitization and real time analysis of detector signals. To perform different applications such as analog-to-digital or time-to-digital conversions, coincidence matrix formation, fast pattern recognition and trigger generation, this module comes with exchangeable analog and digital mezzanine cards. Based on this platform, we present a 128-channel TDC which is implemented in a single Xilinx Virtex-5 FPGA using a shifted clock sampling method. In contrast to common TDC concepts, the input signal is sampled by 16 equidistant phase-shifted clocks. A particular challenge of the design is the minimum skew routing of the input signals to the sampling flip-flops. We present measurement results for the differential nonlinearity and the time resolution of the TDC readout system.

Integrated mixed signal control IC for 500-kHz switching frequency buck regulator

NASA Astrophysics Data System (ADS)

Chen, Keng; Zhang, Hong

2015-12-01

The main purpose for this work is to study the challenges of designing a digital buck regulator using pipelined analog to digital converter (ADC). Although pipelined ADC can achieve high sampling speed, it will introduce additional phase lag to the buck circuit. Along with the latency brought by processing time of additional digital circuits, as well as the time delay associated with the switching frequency, the closed loop will be unstable; moreover, raw ADC outputs have low signal-to-noise ratio, which usually need back-end calibration. In order to compensate these phase lag and make control loop unconditional stable, as well as boost up signal-to-noise ratio of the ADC block with cost-efficient design, a finite impulse response filter followed by digital proportional-integral-derivative blocks were designed. All these digital function blocks were optimised with processing speed. In the system simulation, it can be found that this controller achieved output regulation within 10% of nominal 5 V output voltage under 1 A/µs load transient condition; moreover, with the soft-start method, there is no turn-on overshooting. The die size of this controller is controlled within 3 mm2 by using 180 nm CMOS technology.

Compensation based on linearized analysis for a six degree of freedom motion simulator

NASA Technical Reports Server (NTRS)

Parrish, R. V.; Dieudonne, J. E.; Martin, D. J., Jr.; Copeland, J. L.

1973-01-01

The inertial response characteristics of a synergistic, six-degree-of-freedom motion base are presented in terms of amplitude ratio and phase lag as functions of frequency data for the frequency range of interest (0 to 2 Hz) in real time, digital, flight simulators. The notch filters which smooth the digital-drive signals to continuous drive signals are presented, and appropriate compensation, based on the inertial response data, is suggested. The existence of an inverse transformation that converts actuator extensions into inertial positions makes it possible to gather the response data in the inertial axis system.

Orbital angular momentum correlations with a phase-flipped Gaussian mode pump beam

NASA Astrophysics Data System (ADS)

Romero, J.; Giovannini, D.; McLaren, M. G.; Galvez, E. J.; Forbes, A.; Padgett, M. J.

2012-08-01

We report orbital angular momentum (OAM) and angle correlations between signal and idler photons observed when the nonlinear crystal used in spontaneous parametric down-conversion is illuminated by a non-fundamental Gaussian pump beam. We introduce a π-phase step to the transverse profile of the pump, before it impinges on the crystal to create a phase-flipped Gaussian mode, which is a close approximation to an HG10 Hermite-Gaussian-like beam. The correlations in OAM and angular position are then measured holographically using two separate spatial light modulators in the signal and idler arms. We show the transfer of the OAM spectrum of the pump to the down-converted fields, manifested as a redistribution in the OAM correlations consistent with OAM conservation. This corresponds to a modulation of the angular position correlations consistent with the Fourier relationship between the OAM and angle.

An Autonomous Circuit for the Measurement of Photovoltaic Devices Parameters.

DTIC Science & Technology

1986-09-01

Comparison Data, Gallium Arsenide ................ 80 A 7 A,. TABLE OF SYMBOLS A Curve Fitting Constant ADC Analog to Digital Converter AMO Air-Mass-Zero...in Radiation Fluence in the Logarithmic Region CMOS Complementary Metal-Oxide Semiconductor DAC Digital to Analog Converter DC Direct Current Dp Hole...characteristics of individual solar cells. A novel circuit is developed that uses a microprocessor controlled Digital to Analog Converter (DAC) to obtain

Advanced Optical Fiber Communication Systems.

DTIC Science & Technology

1993-02-28

feedback (DFB) laser and a fiber Fabry - Perot (FFP) interferometer for optical frequency discrimination. After the photodetector and amplification, a...filter, an envelope detector, and an integrator; these three components function in tandem as a phase demodulator . We have analyzed the nonlinearities...down-converter and FSK demodulator extract the desired video signals. The measured carrier-to-noise ratio (CNR) at the photodiode must be approximately

A digital beacon receiver

NASA Technical Reports Server (NTRS)

Ransome, Peter D.

1988-01-01

A digital satellite beacon receiver is described which provides measurement information down to a carrier/noise density ratio approximately 15 dB below that required by a conventional (phase locked loop) design. When the beacon signal fades, accuracy degrades gracefully, and is restored immediately (without hysteresis) on signal recovery, even if the signal has faded into the noise. Benefits of the digital processing approach used include the minimization of operator adjustments, stability of the phase measuring circuits with time, repeatability between units, and compatibility with equipment not specifically designed for propagation measuring. The receiver has been developed for the European Olympus satellite which has continuous wave (CW) beacons at 12.5 and 29.7 GHz, and a switched polarization beacon at 19.8 GHz approximately, but the system can be reconfigured for CW and polarization-switched beacons at other frequencies.

Spline-based high-accuracy piecewise-polynomial phase-to-sinusoid amplitude converters.

PubMed

Petrinović, Davor; Brezović, Marko

2011-04-01

We propose a method for direct digital frequency synthesis (DDS) using a cubic spline piecewise-polynomial model for a phase-to-sinusoid amplitude converter (PSAC). This method offers maximum smoothness of the output signal. Closed-form expressions for the cubic polynomial coefficients are derived in the spectral domain and the performance analysis of the model is given in the time and frequency domains. We derive the closed-form performance bounds of such DDS using conventional metrics: rms and maximum absolute errors (MAE) and maximum spurious free dynamic range (SFDR) measured in the discrete time domain. The main advantages of the proposed PSAC are its simplicity, analytical tractability, and inherent numerical stability for high table resolutions. Detailed guidelines for a fixed-point implementation are given, based on the algebraic analysis of all quantization effects. The results are verified on 81 PSAC configurations with the output resolutions from 5 to 41 bits by using a bit-exact simulation. The VHDL implementation of a high-accuracy DDS based on the proposed PSAC with 28-bit input phase word and 32-bit output value achieves SFDR of its digital output signal between 180 and 207 dB, with a signal-to-noise ratio of 192 dB. Its implementation requires only one 18 kB block RAM and three 18-bit embedded multipliers in a typical field-programmable gate array (FPGA) device. © 2011 IEEE

A Compact, Soft-Switching DC-DC Converter for Electric Propulsion

NASA Technical Reports Server (NTRS)

Button, Robert; Redilla, Jack; Ayyanar, Raja

2003-01-01

A hybrid, soft-switching, DC-DC converter has been developed with superior soft switching characteristics, high efficiency, and low electro-magnetic interference. This hybrid topology is comprised of an uncontrolled bridge operating at full pulse-width, and a controlled section operating as a conventional phase modulated converter. The unique topology is able to maintain zero voltage switching down to no load operating conditions. A breadboard prototype was developed and tested to demonstrate the benefits of the topology. Improvements were then made to reduce the size of passive components and increase efficiency in preparation for packaging. A packaged prototype was then designed and built, and several innovative packaging techniques are presented. Performance test data is presented that reveals deficiencies in the design of the power transformer. A simple redesign of the transformer windings eliminated the deficiency. Future plans to improve the converter and packaging design are presented along with several conclusions.

Analog current mode analog/digital converter

NASA Technical Reports Server (NTRS)

Hadidi, Khayrollah (Inventor)

1996-01-01

An improved subranging or comparator circuit is provided for an analog-to-digital converter. As a subranging circuit, the circuit produces a residual signal representing the difference between an analog input signal and an analog of a digital representation. This is achieved by subdividing the digital representation into two or more parts and subtracting from the analog input signal analogs of each of the individual digital portions. In another aspect of the present invention, the subranging circuit comprises two sets of differential input pairs in which the transconductance of one differential input pair is scaled relative to the transconductance of the other differential input pair. As a consequence, the same resistor string may be used for two different digital-to-analog converters of the subranging circuit.

Capacitance-digital and impedance converter as electrical tomography measurement system for biological tissue

NASA Astrophysics Data System (ADS)

Ikhsanti, Mila Izzatul; Bouzida, Rana; Wijaya, Sastra Kusuma; Rohmadi, Muttakin, Imamul; Taruno, Warsito P.

2017-02-01

This research aims to explore the feasibility of capacitance-digital converter and impedance converter for measurement module in electrical capacitance tomography (ECT) system. ECT sensor used was a cylindrical sensor having 8 electrodes. Absolute capacitance measurement system based on Sigma Delta Capacitance-to-Digital-Converter AD7746 has been shown to produce measurement with high resolution. Whereas, capacitance measurement with wide range of frequency is possible using Impedance Converter AD5933. Comparison of measurement accuracy by both AD7746 and AD5933 with reference of LCR meter was evaluated. Biological matters represented in water and oil were treated as object reconstructed into image using linear back projection (LBP) algorithm.

Rotary encoding device

NASA Technical Reports Server (NTRS)

Leviton, Douglas B. (Inventor)

1993-01-01

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a light beam is directed towards the facets is presented. The facets of the polygonal mirror reflect the light beam such that a light spot is created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spot on the linear array detector. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spot and to compute the position of the shaft based upon the data from the analog-to-digital converter.

Optimal space communications techniques. [all digital phase locked loop for FM demodulation

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1973-01-01

The design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.

Cost-effective bidirectional digitized radio-over-fiber systems employing sigma delta modulation

NASA Astrophysics Data System (ADS)

Lee, Kyung Woon; Jung, HyunDo; Park, Jung Ho

2016-11-01

We propose a cost effective digitized radio-over-fiber (D-RoF) system employing a sigma delta modulation (SDM) and a bidirectional transmission technique using phase modulated downlink and intensity modulated uplink. SDM is transparent to different radio access technologies and modulation formats, and more suitable for a downlink of wireless system because a digital to analog converter (DAC) can be avoided at the base station (BS). Also, Central station and BS share the same light source by using a phase modulation for the downlink and an intensity modulation for the uplink transmission. Avoiding DACs and light sources have advantages in terms of cost reduction, power consumption, and compatibility with conventional wireless network structure. We have designed a cost effective bidirectional D-RoF system using a low pass SDM and measured the downlink and uplink transmission performance in terms of error vector magnitude, signal spectra, and constellations, which are based on the 10MHz LTE 64-QAM standard.

The phase 1 upgrade of the CMS Pixel Front-End Driver

NASA Astrophysics Data System (ADS)

Friedl, M.; Pernicka, M.; Steininger, H.

2010-12-01

The pixel detector of the CMS experiment at the LHC is read out by analog optical links, sending the data to 9U VME Front-End Driver (FED) boards located in the electronics cavern. There are plans for the phase 1 upgrade of the pixel detector (2016) to add one more layer, while significantly cutting down the overall material budget. At the same time, the optical data transmission will be replaced by a serialized digital scheme. A plug-in board solution with a high-speed digital optical receiver has been developed for the Pixel-FED readout boards and will be presented along with first tests of the future optical link.

First-Order-hold interpolation digital-to-analog converter with application to aircraft simulation

NASA Technical Reports Server (NTRS)

Cleveland, W. B.

1976-01-01

Those who design piloted aircraft simulations must contend with the finite size and speed of the available digital computer and the requirement for simulation reality. With a fixed computational plant, the more complex the model, the more computing cycle time is required. While increasing the cycle time may not degrade the fidelity of the simulated aircraft dynamics, the larger steps in the pilot cue feedback variables (such as the visual scene cues), may be disconcerting to the pilot. The first-order-hold interpolation (FOHI) digital-to-analog converter (DAC) is presented as a device which offers smooth output, regardless of cycle time. The Laplace transforms of these three conversion types are developed and their frequency response characteristics and output smoothness are compared. The FOHI DAC exhibits a pure one-cycle delay. Whenever the FOHI DAC input comes from a second-order (or higher) system, a simple computer software technique can be used to compensate for the DAC phase lag. When so compensated, the FOHI DAC has (1) an output signal that is very smooth, (2) a flat frequency response in frequency ranges of interest, and (3) no phase error. When the input comes from a first-order system, software compensation may cause the FOHI DAC to perform as an FOHE DAC, which, although its output is not as smooth as that of the FOHI DAC, has a smoother output than that of the ZOH DAC.

Quarter-Rate Superconducting Modulator for Improved High Resolution Analog-to-Digital Converter

DTIC Science & Technology

2006-08-01

third pulse to Output B2, and the fourth to Output C2. The fifth pulse goes to Output B1 and the pattern continues. The inductances LQA , LQB, LQC...inductance LQA . Junction JL1A is now biased with the loop phase being equal to – π. In the bottom left demultiplexer, junctions JR1B and JL2B are

Reconfigurable radio receiver with fractional sample rate converter and multi-rate ADC based on LO-derived sampling clock

NASA Astrophysics Data System (ADS)

Park, Sungkyung; Park, Chester Sungchung

2018-03-01

A composite radio receiver back-end and digital front-end, made up of a delta-sigma analogue-to-digital converter (ADC) with a high-speed low-noise sampling clock generator, and a fractional sample rate converter (FSRC), is proposed and designed for a multi-mode reconfigurable radio. The proposed radio receiver architecture contributes to saving the chip area and thus lowering the design cost. To enable inter-radio access technology handover and ultimately software-defined radio reception, a reconfigurable radio receiver consisting of a multi-rate ADC with its sampling clock derived from a local oscillator, followed by a rate-adjustable FSRC for decimation, is designed. Clock phase noise and timing jitter are examined to support the effectiveness of the proposed radio receiver. A FSRC is modelled and simulated with a cubic polynomial interpolator based on Lagrange method, and its spectral-domain view is examined in order to verify its effect on aliasing, nonlinearity and signal-to-noise ratio, giving insight into the design of the decimation chain. The sampling clock path and the radio receiver back-end data path are designed in a 90-nm CMOS process technology with 1.2V supply.

Static and Dynamic Characteristics of DC-DC Converter Using a Digital Filter

NASA Astrophysics Data System (ADS)

Kurokawa, Fujio; Okamatsu, Masashi

This paper presents the regulation and dynamic characteristics of the dc-dc converter with digital PID control, the minimum phase FIR filter or the IIR filter, and then the design criterion to improve the dynamic characteristics is discussed. As a result, it is clarified that the DC-DC converter using the IIR filter method has superior performance characteristics. The regulation range is within 1.3%, the undershoot against the step change of the load is less than 2% and the transient time is less than 0.4ms with the IIR filter method. In this case, the switching frequency is 100kHz and the step change of the load R is from 50 Ω to 10 Ω. Further, the superior characteristics are obtained when the first gain, the second gain and the second cut-off frequency are relatively large, and the first cut-off frequency and the passing frequency are relatively low. Moreover, it is important that the gain strongly decreases at the second cut-off frequency because the upper band pass frequency range must be always less than half of the sampling frequency based on the sampling theory.

Low-to-Medium Power Single Chip Digital Controlled DC-DC Regulator for Point-of-Load Applications

NASA Technical Reports Server (NTRS)

Adell, Philippe C. (Inventor); Bakkaloglu, Bertan (Inventor); Vermeire, Bert (Inventor); Liu, Tao (Inventor)

2015-01-01

A DC-DC converter for generating a DC output voltage includes: a digitally controlled pulse width modulator (DPWM) for controlling a switching power stage to supply a varying voltage to an inductor; and a digital voltage feedback circuit for controlling the DPWM in accordance with a feedback voltage corresponding to the DC output voltage, the digital voltage feedback circuit including: a first voltage controlled oscillator for converting the feedback voltage into a first frequency signal and to supply the first frequency signal to a first frequency discriminator; a second voltage controlled oscillator for converting a reference voltage into a second frequency signal and to supply the second frequency signal to a second frequency discriminator; a digital comparator for comparing digital outputs of the first and second frequency discriminators and for outputting a digital feedback signal; and a controller for controlling the DPWM in accordance with the digital feedback signal.

Einstein Critical-Slowing-Down is Siegel CyberWar Denial-of-Access Queuing/Pinning/ Jamming/Aikido Via Siegel DIGIT-Physics BEC ``Intersection''-BECOME-UNION Barabasi Network/GRAPH-Physics BEC: Strutt/Rayleigh-Siegel Percolation GLOBALITY-to-LOCALITY Phase-Transition Critical-Phenomenon

NASA Astrophysics Data System (ADS)

Buick, Otto; Falcon, Pat; Alexander, G.; Siegel, Edward Carl-Ludwig

2013-03-01

Einstein[Dover(03)] critical-slowing-down(CSD)[Pais, Subtle in The Lord; Life & Sci. of Albert Einstein(81)] is Siegel CyberWar denial-of-access(DOA) operations-research queuing theory/pinning/jamming/.../Read [Aikido, Aikibojitsu & Natural-Law(90)]/Aikido(!!!) phase-transition critical-phenomenon via Siegel DIGIT-Physics (Newcomb[Am.J.Math. 4,39(1881)]-{Planck[(1901)]-Einstein[(1905)])-Poincare[Calcul Probabilités(12)-p.313]-Weyl [Goett.Nachr.(14); Math.Ann.77,313 (16)]-{Bose[(24)-Einstein[(25)]-Fermi[(27)]-Dirac[(1927)]}-``Benford''[Proc.Am.Phil.Soc. 78,4,551 (38)]-Kac[Maths.Stat.-Reasoning(55)]-Raimi[Sci.Am. 221,109 (69)...]-Jech[preprint, PSU(95)]-Hill[Proc.AMS 123,3,887(95)]-Browne[NYT(8/98)]-Antonoff-Smith-Siegel[AMS Joint-Mtg.,S.-D.(02)] algebraic-inversion to yield ONLY BOSE-EINSTEIN QUANTUM-statistics (BEQS) with ZERO-digit Bose-Einstein CONDENSATION(BEC) ``INTERSECTION''-BECOME-UNION to Barabasi[PRL 876,5632(01); Rev.Mod.Phys.74,47(02)...] Network /Net/GRAPH(!!!)-physics BEC: Strutt/Rayleigh(1881)-Polya(21)-``Anderson''(58)-Siegel[J.Non-crystalline-Sol.40,453(80)

Unity-Efficiency Parametric Down-Conversion via Amplitude Amplification.

PubMed

Niu, Murphy Yuezhen; Sanders, Barry C; Wong, Franco N C; Shapiro, Jeffrey H

2017-03-24

We propose an optical scheme, employing optical parametric down-converters interlaced with nonlinear sign gates (NSGs), that completely converts an n-photon Fock-state pump to n signal-idler photon pairs when the down-converters' crystal lengths are chosen appropriately. The proof of this assertion relies on amplitude amplification, analogous to that employed in Grover search, applied to the full quantum dynamics of single-mode parametric down-conversion. When we require that all Grover iterations use the same crystal, and account for potential experimental limitations on crystal-length precision, our optimized conversion efficiencies reach unity for 1≤n≤5, after which they decrease monotonically for n values up to 50, which is the upper limit of our numerical dynamics evaluations. Nevertheless, our conversion efficiencies remain higher than those for a conventional (no NSGs) down-converter.

A new mathematical model and control of a three-phase AC-DC voltage source converter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blasko, V.; Kaura, V.

1997-01-01

A new mathematical model of the power circuit of a three-phase voltage source converter (VSC) was developed in the stationary and synchronous reference frames. The mathematical model was then used to analyze and synthesize the voltage and current control loops for the VSC. Analytical expressions were derived for calculating the gains and time constants of the current and voltage regulators. The mathematical model was used to control a 140-kW regenerative VSC. The synchronous reference frame model was used to define feedforward signals in the current regulators to eliminate the cross coupling between the d and q phases. It allowed themore » reduction of the current control loop to first-order plants and improved their tracking capability. The bandwidths of the current and voltage-control loops were found to be approximately 20 and 60 times (respectively) smaller than the sampling frequency. All control algorithms were implemented in a digital-signal processor. All results of the analysis were experimentally verified.« less

Rotary encoding device with polygonal reflector and centroid detection

NASA Technical Reports Server (NTRS)

Leviton, Douglas B. (Inventor)

1994-01-01

A device for positioning encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a light beam is directed towards the facets. The facets of the polygonal mirror reflect the light beam such that a light spot is created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spot on the spots on the linear array detector. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spot and to compute the position of the shaft based upon the data from the analog-to-digital converter.

Linear encoding device

NASA Technical Reports Server (NTRS)

Leviton, Douglas B. (Inventor)

1993-01-01

A Linear Motion Encoding device for measuring the linear motion of a moving object is disclosed in which a light source is mounted on the moving object and a position sensitive detector such as an array photodetector is mounted on a nearby stationary object. The light source emits a light beam directed towards the array photodetector such that a light spot is created on the array. An analog-to-digital converter, connected to the array photodetector is used for reading the position of the spot on the array photodetector. A microprocessor and memory is connected to the analog-to-digital converter to hold and manipulate data provided by the analog-to-digital converter on the position of the spot and to compute the linear displacement of the moving object based upon the data from the analog-to-digital converter.

Current Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

NASA Technical Reports Server (NTRS)

Cochran, Donna J.; Kniffin, Scott D.; LaBel, Kenneth A.; OBryan, Martha V.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Poivey, Christian; Buchner, Stephen P.; Marshall, Cheryl J.

2004-01-01

We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to-Digital Converters (ADCs), and Digital-to-Analog Converters (DACS), among others.

Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

NASA Technical Reports Server (NTRS)

Cochran, Donna J.; Kniffin, Scott D.; LaBel, Kenneth A.; OBryan, Martha V.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Poivey, Christian; Buchner, Stephen P.; Marshall, Cheryl J.

2003-01-01

We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to-Digital Converters (ADCs), and Digital-to-Analog Converters (DACs), among others.

A ROM-Less Direct Digital Frequency Synthesizer Based on Hybrid Polynomial Approximation

PubMed Central

Omran, Qahtan Khalaf; Islam, Mohammad Tariqul; Misran, Norbahiah; Faruque, Mohammad Rashed Iqbal

2014-01-01

In this paper, a novel design approach for a phase to sinusoid amplitude converter (PSAC) has been investigated. Two segments have been used to approximate the first sine quadrant. A first linear segment is used to fit the region near the zero point, while a second fourth-order parabolic segment is used to approximate the rest of the sine curve. The phase sample, where the polynomial changed, was chosen in such a way as to achieve the maximum spurious free dynamic range (SFDR). The invented direct digital frequency synthesizer (DDFS) has been encoded in VHDL and post simulation was carried out. The synthesized architecture exhibits a promising result of 90 dBc SFDR. The targeted structure is expected to show advantages for perceptible reduction of hardware resources and power consumption as well as high clock speeds. PMID:24892092

Ultra-high throughput real-time instruments for capturing fast signals and rare events

NASA Astrophysics Data System (ADS)

Buckley, Brandon Walter

Wide-band signals play important roles in the most exciting areas of science, engineering, and medicine. To keep up with the demands of exploding internet traffic, modern data centers and communication networks are employing increasingly faster data rates. Wide-band techniques such as pulsed radar jamming and spread spectrum frequency hopping are used on the battlefield to wrestle control of the electromagnetic spectrum. Neurons communicate with each other using transient action potentials that last for only milliseconds at a time. And in the search for rare cells, biologists flow large populations of cells single file down microfluidic channels, interrogating them one-by-one, tens of thousands of times per second. Studying and enabling such high-speed phenomena pose enormous technical challenges. For one, parasitic capacitance inherent in analog electrical components limits their response time. Additionally, converting these fast analog signals to the digital domain requires enormous sampling speeds, which can lead to significant jitter and distortion. State-of-the-art imaging technologies, essential for studying biological dynamics and cells in flow, are limited in speed and sensitivity by finite charge transfer and read rates, and by the small numbers of photo-electrons accumulated in short integration times. And finally, ultra-high throughput real-time digital processing is required at the backend to analyze the streaming data. In this thesis, I discuss my work in developing real-time instruments, employing ultrafast optical techniques, which overcome some of these obstacles. In particular, I use broadband dispersive optics to slow down fast signals to speeds accessible to high-bit depth digitizers and signal processors. I also apply telecommunication multiplexing techniques to boost the speeds of confocal fluorescence microscopy. The photonic time stretcher (TiSER) uses dispersive Fourier transformation to slow down analog signals before digitization and processing. The act of time-stretching effectively boosts the performance of the back-end electronics and digital signal processors. The slowed down signals reach the back-end electronics with reduced bandwidth, and are therefore less affected by high-frequency roll-off and distortion. Time-stretching also increases the effective sampling rate of analog-to-digital converters and reduces aperture jitter, thereby improving resolution. Finally, the instantaneous throughputs of digital signal processors are enhanced by the stretch factor to otherwise unattainable speeds. Leveraging these unique capabilities, TiSER becomes the ideal tool for capturing high-speed signals and characterizing rare phenomena. For this thesis, I have developed techniques to improve the spectral efficiency, bandwidth, and resolution of TiSER using polarization multiplexing, all-optical modulation, and coherent dispersive Fourier transformation. To reduce the latency and improve the data handling capacity, I have also designed and implemented a real-time digital signal processing electronic backend, achieving 1.5 tera-bit per second instantaneous processing throughput. Finally, I will present results from experiments highlighting TiSER's impact in real-world applications. Confocal fluorescence microscopy is the most widely used method for unveiling the molecular composition of biological specimens. However, the weak optical emission of fluorescent probes and the tradeoff between imaging speed and sensitivity is problematic for acquiring blur-free images of fast phenomena and cells flowing at high speed. Here I introduce a new fluorescence imaging modality, which leverages techniques from wireless communication to reach record pixel and frame rates. Termed Fluorescence Imaging using Radio-frequency tagged Emission (FIRE), this new imaging modality is capable of resolving never before seen dynamics in living cells - such as action potentials in neurons and metabolic waves in astrocytes - as well as performing high-content image assays of cells and particles in high-speed flow.

Road Tripping down the Digital Preservation Highway: Part IV--Classic Rides

ERIC Educational Resources Information Center

Colati, Jessica Branco; Colati, Gregory C.

2011-01-01

"Road Tripping Down the Digital Preservation Highway" follows the continuing adventures of Peter Palmer, erstwhile librarian at Bellaluna University and manager of the library's and University's digital content, as he journeys down the Digital Preservation Highway. Palmer's problem this month was somewhat more philosophical. As manager of the…

Sampling Frequency Optimisation and Nonlinear Distortion Mitigation in Subsampling Receiver

NASA Astrophysics Data System (ADS)

Castanheira, Pedro Xavier Melo Fernandes

Subsampling receivers utilise the subsampling method to down convert signals from radio frequency (RF) to a lower frequency location. Multiple signals can also be down converted using the subsampling receiver, but using the incorrect subsampling frequency could result in signals aliasing one another after down conversion. The existing method for subsampling multiband signals focused on down converting all the signals without any aliasing between the signals. The case considered initially was a dual band signal, and then it was further extended to a more general multiband case. In this thesis, a new method is proposed with the assumption that only one signal is needed to not overlap the other multiband signals that are down converted at the same time. The proposed method will introduce unique formulas using the said assumption to calculate the valid subsampling frequencies, ensuring that the target signal is not aliased by the other signals. Simulation results show that the proposed method will provide lower valid subsampling frequencies for down conversion compared to the existing methods.

Radiation Damage and Single Event Effect Results for Candidate Spacecraft Electronics

NASA Technical Reports Server (NTRS)

OBryan, Martha V.; LaBel, Kenneth A.; Reed, Robert A.; Howard, James W., Jr.; Ladbury, Ray L.; Barth, Janet L.; Kniffin, Scott D.; Seidleck, Christina M.; Marshall, Paul W.; Marshall, Cheryl J.;

A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives

ERIC Educational Resources Information Center

Quintans, C.; Colmenar, A.; Castro, M.; Moure, M. J.; Mandado, E.

2010-01-01

ADCs (analog-to-digital converters), especially Pipeline and Sigma-Delta converters, are designed using complex architectures in order to increase their sampling rate and/or resolution. Consequently, the learning of ADC devices also encompasses complex concepts such as multistage synchronization, latency, oversampling, modulation, noise shaping,…

Fast Low-Cost Multiple Sensor Readout System

DOEpatents

Carter-Lewis, David; Krennich, Frank; Le Bohec, Stephane; Petry, Dirk; Sleege, Gary

2004-04-06

A low resolution data acquisition system is presented. The data acquisition system has a plurality of readout modules serially connected to a controller. Each readout module has a FPGA in communication with analog to digital (A/D) converters, which are connected to sensors. The A/D converter has eight bit or lower resolution. The FPGA detects when a command is addressed to it and commands the A/D converters to convert analog sensor data into digital data. The digital data is sent on a high speed serial communication bus to the controller. A graphical display is used in one embodiment to indicate if a sensor reading is outside of a predetermined range.

Solar energy enhancement using down-converting particles: A rigorous approach

DOE Office of Scientific and Technical Information (OSTI.GOV)

Abrams, Ze’ev R.; Niv, Avi; Zhang, Xiang

2011-06-01

The efficiency of a single band-gap solar cell is specified by the Shockley-Queisser limit, which defines the maximal output power as a function of the solar cell’s band-gap. One way to overcome this limit is by using a down-conversion process whereupon a high energy photon is split into two lower energy photons, thereby increasing the current of the cell. Here, we provide a full analysis of the possible efficiency increase when placing a down-converting material on top of a pre-existing solar cell. We show that a total 7% efficiency improvement is possible for a perfectly efficient down-converting material. Our analysismore » covers both lossless and lossy theoretical limits, as well as a thermodynamic evaluation. Finally, we describe the advantages of nanoparticles as a possible choice for a down-converting material.« less

A multiphoton laser scanning microscope setup for transcranial in vivo brain imaging on mice

NASA Astrophysics Data System (ADS)

Nase, Gabriele; Helm, P. Johannes; Reppen, Trond; Ottersen, Ole Petter

2005-12-01

We describe a multiphoton laser scanning microscope setup for transcranial in vivo brain imaging in mice. The modular system is based on a modified industrial standard Confocal Scanning Laser Microscope (CSLM) and is assembled mainly from commercially available components. A special multifunctional stage, which is optimized for both laser scanning microscopic observation and preparative animal surgery, has been developed and built. The detection unit includes a highly efficient photomultiplier tube installed in a Peltier-cooled thermal box shielding the detector from changes in room temperature and from distortions caused by external electromagnetic fields. The images are recorded using a 12-bit analog-to-digital converter. Depending on the characteristics of the staining, individual nerve cells can be imaged down to at least 100μm below the intact cranium and down to at least 200μm below the opened cranium.

Systems and methods for self-synchronized digital sampling

NASA Technical Reports Server (NTRS)

Samson, Jr., John R. (Inventor)

2008-01-01

Systems and methods for self-synchronized data sampling are provided. In one embodiment, a system for capturing synchronous data samples is provided. The system includes an analog to digital converter adapted to capture signals from one or more sensors and convert the signals into a stream of digital data samples at a sampling frequency determined by a sampling control signal; and a synchronizer coupled to the analog to digital converter and adapted to receive a rotational frequency signal from a rotating machine, wherein the synchronizer is further adapted to generate the sampling control signal, and wherein the sampling control signal is based on the rotational frequency signal.

Photonic Analog-to-Digital Converters

DTIC Science & Technology

2006-03-01

Edward W. Taylor, “Gamma-Ray Induced Damage and Recovery Behavior in an Erbium-Doped Fiber Laser ”, SPIE Proceedings, Vol. 4547, Sep. 2001, pp.126-133...requirements. The center frequency of the bandpass filter determined the laser mode-locked frequency. SNDP’s COEO had an operating frequency of... laser . Better filters and amplifiers were needed to improve operation and to reduce the phase noise to a level comparable with Delfyett’s actively

A cryogenic DAC operating down to 4.2 K

NASA Astrophysics Data System (ADS)

Rahman, M. T.; Lehmann, T.

2016-04-01

This paper presents a 10 bit CMOS current steering digital to analog converter (DAC) that operates from room temperature to as low as 4.2 K. It works as the core part of a cryogenic Silicon quantum computer controller circuit producing rapid control gate voltage pulses for quantum bits (qubits) initialization. An improved analog calibration method with a unique unit current cell design is included in the D/A converter structure to overcome the extended cryogenic nonlinear and mismatch effects. The DAC retains its 10 bit linear monotonic behavior over the wide temperature range and it drives a 50 Ω load to 516 mV with a full scale rise time of 10 ns. The differential non-linearity (DNL) of the converter is 0.35LSB while its average power consumption is 32.18 mW from a 3 V power supply. The complete converter is fabricated using a commercial 0.5 μm 1 poly 3 metal Silicon on Sapphire (SOS) CMOS process. He briefly worked as a Lecturer in the Stamford University Bangladesh prior to starting his Ph.D. in 2012 in the School of Electrical Engineering and Telecommunications, UNSW. His Ph.D. research is focused on cryogenic electronics for Quantum Computer Interface. His main research interests are in designing data converters for ultra-low temperature electronics and biomedical applications. He spent two years as a Research Fellow at the University of Edinburgh, U.K., where he worked with biologically inspired artificial neural systems. From 1997 to 2000, he was an Assistant Professor in electronics at the Technical University of Denmark, working with low-power low-noise low-voltage analog and mixed analog-digital integrated circuits. From 2001 to 2003 he was Principal Engineer with Cochlear Ltd., Australia, where he was involved in the design of the world's first fully implantable cochlear implant. Today he is Associate Professor in microelectronics at the University of New South Wales, Australia. He has authored over 100 journal papers, conference papers, book chapters and patents in microelectronic circuit design for a range of applications. His main research interests are in solid-state circuits and systems (analog and digital), biomedical microelectronics, ultra-low temperature electronics, nanometre CMOS, and green electronics.

Single chip camera active pixel sensor

NASA Technical Reports Server (NTRS)

Shaw, Timothy (Inventor); Pain, Bedabrata (Inventor); Olson, Brita (Inventor); Nixon, Robert H. (Inventor); Fossum, Eric R. (Inventor); Panicacci, Roger A. (Inventor); Mansoorian, Barmak (Inventor)

2003-01-01

A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

Recent Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

NASA Technical Reports Server (NTRS)

Cochran, Donna J.; Buchner, Stephen P.; Irwin, Tim L.; LaBel, Kenneth A.; Marshall, Cheryl J.; Reed, Robert A.; Sanders, Anthony B.; Hawkins, Donald K.; Flanigan, Ryan J.; Cox, Stephen R.

2005-01-01

We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to- Digital Converters (ADCs), and Digital-to-Analog Converters (DACs), among others. T

A digital correlator upgrade for the Arcminute MicroKelvin Imager

NASA Astrophysics Data System (ADS)

Hickish, Jack; Razavi-Ghods, Nima; Perrott, Yvette C.; Titterington, David J.; Carey, Steve H.; Scott, Paul F.; Grainge, Keith J. B.; Scaife, Anna M. M.; Alexander, Paul; Saunders, Richard D. E.; Crofts, Mike; Javid, Kamran; Rumsey, Clare; Jin, Terry Z.; Ely, John A.; Shaw, Clive; Northrop, Ian G.; Pooley, Guy; D'Alessandro, Robert; Doherty, Peter; Willatt, Greg P.

2018-04-01

The Arcminute Microkelvin Imager (AMI) telescopes located at the Mullard Radio Astronomy Observatory near Cambridge have been significantly enhanced by the implementation of a new digital correlator with 1.2 MHz spectral resolution. This system has replaced a 750-MHz resolution analogue lag-based correlator, and was designed to mitigate the effects of radio frequency interference, particularly that from geostationary satellites which are visible from the AMI site when observing at low declinations. The upgraded instrument consists of 18 ROACH2 Field Programmable Gate Array platforms used to implement a pair of real-time FX correlators - one for each of AMI's two arrays. The new system separates the down-converted RF baseband signal from each AMI receiver into two sub-bands, each of which are filtered to a width of 2.3 GHz and digitized at 5-Gsps with 8 bits of precision. These digital data streams are filtered into 2048 frequency channels and cross-correlated using FPGA hardware, with a commercial 10 Gb Ethernet switch providing high-speed data interconnect. Images formed using data from the new digital correlator show over an order of magnitude improvement in dynamic range over the previous system. The ability to observe at low declinations has also been significantly improved.

Quantitative light-induced fluorescence technology for quantitative evaluation of tooth wear

NASA Astrophysics Data System (ADS)

Kim, Sang-Kyeom; Lee, Hyung-Suk; Park, Seok-Woo; Lee, Eun-Song; de Josselin de Jong, Elbert; Jung, Hoi-In; Kim, Baek-Il

2017-12-01

Various technologies used to objectively determine enamel thickness or dentin exposure have been suggested. However, most methods have clinical limitations. This study was conducted to confirm the potential of quantitative light-induced fluorescence (QLF) using autofluorescence intensity of occlusal surfaces of worn teeth according to enamel grinding depth in vitro. Sixteen permanent premolars were used. Each tooth was gradationally ground down at the occlusal surface in the apical direction. QLF-digital and swept-source optical coherence tomography images were acquired at each grinding depth (in steps of 100 μm). All QLF images were converted to 8-bit grayscale images to calculate the fluorescence intensity. The maximum brightness (MB) values of the same sound regions in grayscale images before (MB) and phased values after (MB) the grinding process were calculated. Finally, 13 samples were evaluated. MB increased over the grinding depth range with a strong correlation (r=0.994, P<0.001). In conclusion, the fluorescence intensity of the teeth and grinding depth was strongly correlated in the QLF images. Therefore, QLF technology may be a useful noninvasive tool used to monitor the progression of tooth wear and to conveniently estimate enamel thickness.

Digital Data Acquisition for Laser Radar for Vibration Analysis

DTIC Science & Technology

1998-06-01

and the resulting signal is a function of the relative phase of the two waves , which changes as the target vibrates. The relative phase is inversely...light crosses the medium in a direction perpendicular to the acoustic waves , a modulated optical wave front will result. A standing acoustic wave in the...mean that the frequency can be up or down-shifted, depending on the orientation of the AOM, or the direction of the traveling acoustic waves . An

An Improved Model Predictive Current Controller of Switched Reluctance Machines Using Time-Multiplexed Current Sensor

PubMed Central

Li, Bingchu; Ling, Xiao; Huang, Yixiang; Gong, Liang; Liu, Chengliang

2017-01-01

This paper presents a fixed-switching-frequency model predictive current controller using multiplexed current sensor for switched reluctance machine (SRM) drives. The converter was modified to distinguish currents from simultaneously excited phases during the sampling period. The only current sensor installed in the converter was time division multiplexing for phase current sampling. During the commutation stage, the control steps of adjacent phases were shifted so that sampling time was staggered. The maximum and minimum duty ratio of pulse width modulation (PWM) was limited to keep enough sampling time for analog-to-digital (A/D) conversion. Current sensor multiplexing was realized without complex adjustment of either driver circuit nor control algorithms, while it helps to reduce the cost and errors introduced in current sampling due to inconsistency between sensors. The proposed controller is validated by both simulation and experimental results with a 1.5 kW three-phase 12/8 SRM. Satisfied current sampling is received with little difference compared with independent phase current sensors for each phase. The proposed controller tracks the reference current profile as accurately as the model predictive current controller with independent phase current sensors, while having minor tracking errors compared with a hysteresis current controller. PMID:28513554

Analysis and design of a high power, digitally-controlled spacecraft power system

NASA Technical Reports Server (NTRS)

Lee, F. C.; Cho, B. H.

1990-01-01

The progress to date on the analysis and design of a high power, digitally controlled spacecraft power system is described. Several battery discharger topologies were compared for use in the space platform application. Updated information has been provided on the battery voltage specification. Initially it was thought to be in the 30 to 40 V range. It is now specified to be 53 V to 84 V. This eliminated the tapped-boost and the current-fed auto-transformer converters from consideration. After consultations with NASA, it was decided to trade-off the following topologies: (1) boost converter; (2) multi-module, multi-phase boost converter; and (3) voltage-fed push-pull with auto-transformer. A non-linear design optimization software tool was employed to facilitate an objective comparison. Non-linear design optimization insures that the best design of each topology is compared. The results indicate that a four-module, boost converter with each module operating 90 degrees out of phase is the optimum converter for the space platform. Large-signal and small-signal models were generated for the shunt, charger, discharger, battery, and the mode controller. The models were first tested individually according to the space platform power system specifications supplied by NASA. The effect of battery voltage imbalance on parallel dischargers was investigated with respect to dc and small-signal responses. Similarly, the effects of paralleling dischargers and chargers were also investigated. A solar array and shunt model was included in these simulations. A model for the bus mode controller (power control unit) was also developed to interface the Orbital replacement Unit (ORU) model to the platform power system. Small signal models were used to generate the bus impedance plots in the various operating modes. The large signal models were integrated into a system model, and time domain simulations were performed to verify bus regulation during mode transitions. Some changes have subsequently been incorporated into the models. The changes include the use of a four module boost discharger, and a new model for the mode controller, which includes the effects of saturation. The new simulations for the boost discharger show the improvement in bus ripple that can be achieved by phase-shifted operation of each of the boost modules.

Designed cell consortia as fragrance-programmable analog-to-digital converters.

PubMed

Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

2017-03-01

Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

Capacitance Measurement with a Sigma Delta Converter for 3D Electrical Capacitance Tomography

NASA Technical Reports Server (NTRS)

Nurge, Mark

2005-01-01

This paper will explore suitability of a newly available capacitance to digital converter for use in a 3D Electrical Capacitance Tomography system. A switch design is presented along with circuitry needed to extend the range of the capacitance to digital converter. Results are then discussed for a 15+ hour drift and noise test.

Implementing a Digital Phasemeter in an FPGA

NASA Technical Reports Server (NTRS)

Rao, Shanti R.

2008-01-01

Firmware for implementing a digital phasemeter within a field-programmable gate array (FPGA) has been devised. In the original application of this firmware, the phase that one seeks to measure is the difference between the phases of two nominally-equal-frequency heterodyne signals generated by two interferometers. In that application, zero-crossing detectors convert the heterodyne signals to trains of rectangular pulses, the two pulse trains are fed to a fringe counter (the major part of the phasemeter) controlled by a clock signal having a frequency greater than the heterodyne frequency, and the fringe counter computes a time-averaged estimate of the difference between the phases of the two pulse trains. The firmware also does the following: Causes the FPGA to compute the frequencies of the input signals; Causes the FPGA to implement an Ethernet (or equivalent) transmitter for readout of phase and frequency values; and Provides data for use in diagnosis of communication failures. The readout rate can be set, by programming, to a value between 250 Hz and 1 kHz. Network addresses can be programmed by the user.

Road Tripping Down the Digital Preservation Highway: Part III. Rolls Royce, Ford, or Dune Buggy?

ERIC Educational Resources Information Center

Colati, Jessica Branco; Colati, Gregory C.

2011-01-01

"Road Tripping Down the Digital Preservation Highway" follows the continuing adventures of Peter Palmer, erstwhile librarian at Bellaluna University and manager of the library's and University's digital content, as he journeys down the Digital Preservation Highway. In this article, Palmer is put in charge of a task force to determine…

Beat note stabilization of a 10-60 GHz dual-polarization microlaser through optical down conversion.

PubMed

Rolland, A; Brunel, M; Loas, G; Frein, L; Vallet, M; Alouini, M

2011-02-28

Down-conversion of a high-frequency beat note to an intermediate frequency is realized by a Mach-Zehnder intensity modulator. Optically-carried microwave signals in the 10-60 GHz range are synthesized by using a two-frequency solid-state microchip laser as a voltage-controlled oscillator inside a digital phase-locked loop. We report an in-loop relative frequency stability better than 2.5×10⁻¹¹. The principle is applicable to beat notes in the millimeter-wave range.

The two-dimensional kinetic ballooning theory for ion temperature gradient mode in tokamak

NASA Astrophysics Data System (ADS)

Xie, T.; Zhang, Y. Z.; Mahajan, S. M.; Hu, S. L.; He, Hongda; Liu, Z. Y.

2017-10-01

The two-dimensional (2D) kinetic ballooning theory is developed for the ion temperature gradient mode in an up-down symmetric equilibrium (illustrated via concentric circular magnetic surfaces). The ballooning transform converts the basic 2D linear gyro-kinetic equation into two equations: (1) the lowest order equation (ballooning equation) is an integral equation essentially the same as that reported by Dong et al., [Phys. Fluids B 4, 1867 (1992)] but has an undetermined Floquet phase variable, (2) the higher order equation for the rapid phase envelope is an ordinary differential equation in the same form as the 2D ballooning theory in a fluid model [Xie et al., Phys. Plasmas 23, 042514 (2016)]. The system is numerically solved by an iterative approach to obtain the (phase independent) eigen-value. The new results are compared to the two earlier theories. We find a strongly modified up-down asymmetric mode structure, and non-trivial modifications to the eigen-value.

A high performance DAC /DDS daughter module for the RHIC LLRF platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hayes, T.; Harvey, M.; Narayan, G.

The RHIC LLRF upgrade is a flexible, modular system. Output signals are generated by a custom designed XMC card with 4 high speed digital to analog (DAC) converters interfaced to a high performance field programmable gate array (FPGA). This paper discusses the hardware details of the XMC DAC board as well as the implementation of a low noise rf synthesizer with digital IQ modulation. This synthesizer also provides injection phase cogging and frequency hop rebucketing capabilities. A new modular RHIC LLRF system was recently designed and commissioned based on custom designed XMC cards. As part of that effort a highmore » speed, four channel DAC board was designed. The board uses Maxim MAX5891 16 bit DACs with a maximum update rate of 600 Msps. Since this module is intended to be used for many different systems throughout the Collider Accelerator complex, it was designed to be as generic as possible. One major application of this DAC card is to implement digital synthesizers to provide drive signals to the various cavities at RHIC. Since RHIC is a storage ring with stores that typically last many hours, extremely low RF noise is a critical requirement. Synchrotron frequencies at RHIC range from a few hertz to several hundred hertz depending on the species and point in the acceleration cycle so close in phase noise is a major concern. The RHIC LLRF system uses the Update Link, a deterministic, high speed data link that broadcasts the revolution frequency and the synchronous phase angle. The digital synthesizers use this data to generate a properly phased analog drive signal. The synthesizers must also provide smooth phase shifts for cogging and support frequency shift rebucketing. One additional feature implemented in the FPGA is a digital waveform generator (WFG) that generates I and Q data pairs based on a user selected amplitude and phase profile as a function of time.« less

Rotary encoding device using polygonal mirror with diffraction gratings on each facet

NASA Technical Reports Server (NTRS)

Leviton, Douglas B. (Inventor)

1993-01-01

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror each have a low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-to-digital converter.

Road Tripping Down the Digital Preservation Highway, Part II: Road Signs, Billboards, and Rest Stops along the Way

ERIC Educational Resources Information Center

Colati, Jessica Branco; Colati, Gregory C.

2011-01-01

In this second of a two-part article on road tripping down the Digital Preservation Highway, the authors follow the continuing adventures of Peter Palmer, erstwhile librarian at Bellaluna University and manager of the library's and University's digital content, as he journeys down the Digital Preservation Highway. In the authors' last visit with…

A New Interferometer for Monitoring Atmospheric Phase Fluctuations

NASA Technical Reports Server (NTRS)

Lay, Oliver

2000-01-01

Water vapor in the Earth's troposphere introduces an extra electrical path in the propagation of radio signals through the atmosphere. The distribution of water vapor is irregular and distorts the wavefronts of incoming radio waves, limiting the angular resolution that can be achieved with ground-based telescopes. The level of fluctuations depends both on the location of the site ,and on the prevailing atmospheric conditions. The ability to measure the fluctuations is therefore important when choosing a site for a new instrument, and for scheduling observations of existing telescopes. Existing phase monitors are radio interferometers that monitor monochromatic beacon tones from geostationary communications satellites at a frequency of about 12 GHz. They have a classical heterodyne design based on two satellite receiving antennas; each has a front-end for amplifying and down-converting the incoming signals using a local oscillator that is phase-locked to a common reference frequency. In addition to multiple phase-locked loops these instruments require expensive phase-stable cabling to reduce the effects of thermal drift. The new system uses two consumer 18" digital satellite TV dishes to monitor satellite TV broadcast signals over a bandwidth of 500 MHz (12.2 to 12.7 GHz). The novel design eliminates the need for phase-locked loops and thermally stable components, and uses a pair of Gilbert Cell multipliers to perform the broadband correlation. A phase monitor has been been built and deployed at the site of the Berkeley-Illinois-Maryland Association Millimeter Array in Northern California, and has been operating successfully since June 1998, measuring the difference in electrical path length for parallel lines of sight to the satellite separated by a baseline of 100 m. With a hardware cost of approximately $4000, it is much cheaper than previous instruments, and the low power requirements and high reliability make the system suitable for site testing in remote locations.

Architecture of a mixed-mode electrophysiological signal acquisition interface.

PubMed

Shen, Ding-Lan; Chen, Jyun-Min

2012-01-01

This paper proposes mixed-mode architecture for the acquisition interface of electrophysiological signals. The architecture advances the analog-to-digital converter (ADC) from the second chopper signal in the conventional approach and performs the second chopper operation in the digital domain. The demanded low-pass filter (LPF) is realized with a digital type. The analog LPF in feedback path is substituted with a digital one accompanying with a digital-to-analog converter (DAC). The analog variation is decreased due to the digitization of these operations. The entire architecture is simulated with the ECG input in a behavior model of Simulink.

The National Shipbuilding Research Program. Photogrammetric Dimensioning of Distributive Systems Models. Phase 1

DTIC Science & Technology

1978-08-01

21- accepts piping geometry as one of its basic inputs; whether this geometry comes from arrangement drawings or models is of no real consequence. c ... computer . Geometric data is taken from the catalogue and automatically merged with the piping geometry data. Also, fitting orientation is automatically...systems require a number of data manipulation routines to convert raw digitized data into logical pipe geometry acceptable to a computer -aided piping design

Resonant Tunneling Analog-To-Digital Converter

NASA Technical Reports Server (NTRS)

Broekaert, T. P. E.; Seabaugh, A. C.; Hellums, J.; Taddiken, A.; Tang, H.; Teng, J.; vanderWagt, J. P. A.

1995-01-01

As sampling rates continue to increase, current analog-to-digital converter (ADC) device technologies will soon reach a practical resolution limit. This limit will most profoundly effect satellite and military systems used, for example, for electronic countermeasures, electronic and signal intelligence, and phased array radar. New device and circuit concepts will be essential for continued progress. We describe a novel, folded architecture ADC which could enable a technological discontinuity in ADC performance. The converter technology is based on the integration of multiple resonant tunneling diodes (RTD) and hetero-junction transistors on an indium phosphide substrate. The RTD consists of a layered semiconductor hetero-structure AlAs/InGaAs/AlAs(2/4/2 nm) clad on either side by heavily doped InGaAs contact layers. Compact quantizers based around the RTD offer a reduction in the number of components and a reduction in the input capacitance Because the component count and capacitance scale with the number of bits N, rather than by 2 (exp n) as in the flash ADC, speed can be significantly increased, A 4-bit 2-GSps quantizer circuit is under development to evaluate the performance potential. Circuit designs for ADC conversion with a resolution of 6-bits at 25GSps may be enabled by the resonant tunneling approach.

Digital computer simulation of inductor-energy-storage dc-to-dc converters with closed-loop regulators

NASA Technical Reports Server (NTRS)

Ohri, A. K.; Owen, H. A.; Wilson, T. G.; Rodriguez, G. E.

1974-01-01

The simulation of converter-controller combinations by means of a flexible digital computer program which produces output to a graphic display is discussed. The procedure is an alternative to mathematical analysis of converter systems. The types of computer programming involved in the simulation are described. Schematic diagrams, state equations, and output equations are displayed for four basic forms of inductor-energy-storage dc to dc converters. Mathematical models are developed to show the relationship of the parameters.

Demodulation of messages received with low signal to noise ratio

NASA Astrophysics Data System (ADS)

Marguinaud, A.; Quignon, T.; Romann, B.

The implementation of this all-digital demodulator is derived from maximum likelihood considerations applied to an analytical representation of the received signal. Traditional adapted filters and phase lock loops are replaced by minimum variance estimators and hypothesis tests. These statistical tests become very simple when working on phase signal. These methods, combined with rigorous control data representation allow significant computation savings as compared to conventional realizations. Nominal operation has been verified down to energetic signal over noise of -3 dB upon a QPSK demodulator.

Apparatus and Method for Effecting Data Transfer Between Data Systems

NASA Technical Reports Server (NTRS)

Kirkpatrick, Joey V. (Inventor); Grosz, Francis B., Jr. (Inventor); Lannes, Kenny (Inventor); Maniscalco, David G. (Inventor)

2001-01-01

An apparatus for effecting data transfer between data systems comprising a first transceiver and a second transceiver. The first transceiver has an input for receiving digital data from one of the data systems, an output for serially outputting digital data to one of the data systems, at least one transmitter for converting digital data received at the input into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the data output. The second transceiver has an input for receiving digital data from another one of the data systems, an output for serially outputting digital data to the another one of the data systems, at least one transmitter for serially converting digital data received at the input of the second transceiver into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the output of the second transceiver. The apparatus further comprises an optical link connecting the first and second transceivers. The optical link comprising a pair of optical fibers. One of the optical fibers optically links the transmitter of the first transceiver to the receiver of the second transceiver. The other optical fiber optically links the receiver of the first transceiver to the transmitter of the second transceiver.

Multichannel Phase and Power Detector

NASA Technical Reports Server (NTRS)

Li, Samuel; Lux, James; McMaster, Robert; Boas, Amy

2006-01-01

An electronic signal-processing system determines the phases of input signals arriving in multiple channels, relative to the phase of a reference signal with which the input signals are known to be coherent in both phase and frequency. The system also gives an estimate of the power levels of the input signals. A prototype of the system has four input channels that handle signals at a frequency of 9.5 MHz, but the basic principles of design and operation are extensible to other signal frequencies and greater numbers of channels. The prototype system consists mostly of three parts: An analog-to-digital-converter (ADC) board, which coherently digitizes the input signals in synchronism with the reference signal and performs some simple processing; A digital signal processor (DSP) in the form of a field-programmable gate array (FPGA) board, which performs most of the phase- and power-measurement computations on the digital samples generated by the ADC board; and A carrier board, which allows a personal computer to retrieve the phase and power data. The DSP contains four independent phase-only tracking loops, each of which tracks the phase of one of the preprocessed input signals relative to that of the reference signal (see figure). The phase values computed by these loops are averaged over intervals, the length of which is chosen to obtain output from the DSP at a desired rate. In addition, a simple sum of squares is computed for each channel as an estimate of the power of the signal in that channel. The relative phases and the power level estimates computed by the DSP could be used for diverse purposes in different settings. For example, if the input signals come from different elements of a phased-array antenna, the phases could be used as indications of the direction of arrival of a received signal and/or as feedback for electronic or mechanical beam steering. The power levels could be used as feedback for automatic gain control in preprocessing of incoming signals. For another example, the system could be used to measure the phases and power levels of outputs of multiple power amplifiers to enable adjustment of the amplifiers for optimal power combining.

Antenna unit and radio base station therewith

DOEpatents

Kuwahara, Mikio; Doi, Nobukazu; Suzuki, Toshiro; Ishida, Yuji; Inoue, Takashi; Niida, Sumaru

2007-04-10

Phase and amplitude deviations, which are generated, for example, by cables connecting an array antenna of a CDMA base station and the base station, are calibrated in the baseband. The base station comprises: an antenna apparatus 1; couplers 2; an RF unit 3 that converts a receive signal to a baseband signal, converts a transmit signal to a radio frequency, and performs power control; an A/D converter 4 for converting a receive signal to a digital signal; a receive beam form unit 6 that multiplies the receive signal by semi-fixed weight; a despreader 7 for this signal input; a time-space demodulator 8 for demodulating user data; a despreader 9 for probe signal; a space modulator 14 for user data; a spreader 13 for user signal; a channel combiner 12; a Tx calibrater 11 for controlling calibration of a signal; a D/A converter 10; a unit 16 for calculation of correlation matrix for generating a probe signal used for controlling an Rx calibration system and a TX calibration system; a spreader 17 for probe signal; a power control unit 18; a D/A converter 19; an RF unit 20 for probe signal; an A/D converter 21 for signal from the couplers 2; and a despreader 22.

Analog-to-digital conversion techniques for precision photometry

NASA Technical Reports Server (NTRS)

Opal, Chet B.

1988-01-01

Three types of analog-to-digital converters are described: parallel, successive-approximation, and integrating. The functioning of comparators and sample-and-hold amplifiers is explained. Differential and integral linearity are defined, and good and bad examples are illustrated. The applicability and relative advantages of the three types of converters for precision astronomical photometric measurements are discussed. For most measurements, integral linearity is more important than differential linearity. Successive-approximation converters should be used with multielement solid state detectors because of their high speed, but dual slope integrating converters may be superior for use with single element solid state detectors where speed of digitization is not a factor. In all cases, the input signal should be tailored so that they occupy the upper part of the converter's dynamic range; this can be achieved by providing adjustable gain, or better by varying the integration time of the observation if possible.

Improved frequency/voltage converters for fast quartz crystal microbalance applications.

PubMed

Torres, R; García, J V; Arnau, A; Perrot, H; Kim, L To Thi; Gabrielli, C

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1 kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10 mVHz, for a frequency shift resolution of 0.1 Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5 to 10 MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

Improved frequency/voltage converters for fast quartz crystal microbalance applications

NASA Astrophysics Data System (ADS)

Torres, R.; García, J. V.; Arnau, A.; Perrot, H.; Kim, L. To Thi; Gabrielli, C.

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10mV/Hz, for a frequency shift resolution of 0.1Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5to10MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

A Nonlinear Digital Control Solution for a DC/DC Power Converter

NASA Technical Reports Server (NTRS)

Zhu, Minshao

2002-01-01

A digital Nonlinear Proportional-Integral-Derivative (NPID) control algorithm was proposed to control a 1-kW, PWM, DC/DC, switching power converter. The NPID methodology is introduced and a practical hardware control solution is obtained. The design of the controller was completed using Matlab (trademark) Simulink, while the hardware-in-the-loop testing was performed using both the dSPACE (trademark) rapid prototyping system, and a stand-alone Texas Instruments (trademark) Digital Signal Processor (DSP)-based system. The final Nonlinear digital control algorithm was implemented and tested using the ED408043-1 Westinghouse DC-DC switching power converter. The NPID test results are discussed and compared to the results of a standard Proportional-Integral (PI) controller.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aeloiza, Eddy C.; Burgos, Rolando P.

A step-down AC/AC converter for use in an electric distribution system includes at least one chopper circuit for each one of a plurality of phases of the AC power, each chopper circuit including a four-quadrant switch coupled in series between primary and secondary sides of the chopper circuit and a current-bidirectional two-quadrant switch coupled between the secondary side of the chopper circuit and a common node. Each current-bidirectional two-quadrant switch is oriented in the same direction, with respect to the secondary side of the corresponding chopper circuit and the common node. The converter further includes a control circuit configured tomore » pulse-width-modulate control inputs of the switches, to convert a first multiphase AC voltage at the primary sides of the chopper circuits to a second multiphase AC voltage at the secondary sides of the chopper circuits, the second multiphase AC voltage being lower in voltage than the first multiphase AC voltage.« less

Converting Topographic Maps into Digital Form to Aid in Archeological Research in the Peten, Guatemala

NASA Technical Reports Server (NTRS)

Aldrich, Serena R.

1999-01-01

The purpose of my project was to convert a topographical map into digital form so that the data can be manipulated and easily accessed in the field. With the data in this particular format, Dr. Sever and his colleagues can highlight the specific features of the landscape that they require for their research of the ancient Mayan civilization. Digital elevation models (DEMs) can also be created from the digitized contour features adding another dimension to their research.

Design and Calibration of an RF Actuator for Low-Level RF Systems

NASA Astrophysics Data System (ADS)

Geng, Zheqiao; Hong, Bo

2016-02-01

X-ray free electron laser (FEL) machines like the Linac Coherent Light Source (LCLS) at SLAC require high-quality electron beams to generate X-ray lasers for various experiments. Digital low-level RF (LLRF) systems are widely used to control the high-power RF klystrons to provide a highly stable RF field in accelerator structures for beam acceleration. Feedback and feedforward controllers are implemented in LLRF systems to stabilize or adjust the phase and amplitude of the RF field. To achieve the RF stability and the accuracy of the phase and amplitude adjustment, low-noise and highly linear RF actuators are required. Aiming for the upgrade of the S-band Linac at SLAC, an RF actuator is designed with an I/Qmodulator driven by two digital-to-analog converters (DAC) for the digital LLRF systems. A direct upconversion scheme is selected for RF actuation, and an on-line calibration algorithm is developed to compensate the RF reference leakage and the imbalance errors in the I/Q modulator, which may cause significant phase and amplitude actuation errors. This paper presents the requirements on the RF actuator, the design of the hardware, the calibration algorithm, and the implementation in firmware and software and the test results at LCLS.

Monitoring of live cell cultures during apoptosis by phase imaging and Raman spectroscopy

NASA Astrophysics Data System (ADS)

Sharikova, Anna; Saide, George; Sfakis, Lauren; Park, Jun Yong; Desta, Habben; Maloney, Maxwell C.; Castracane, James; Mahajan, Supriya D.; Khmaladze, Alexander

2017-02-01

Non-invasive live cell measurements are an important tool in biomedical research. We present a combined digital holography/Raman spectroscopy technique to study live cell cultures during apoptosis. Digital holographic microscopy records an interference pattern between object and reference waves, so that the computationally reconstructed holographic image contains both amplitude and phase information about the sample. When the phase is mapped across the sample and converted into height information for each pixel, a three dimensional image is obtained. The measurement of live cell cultures by digital holographic microscopy yields information about cell shape and volume, changes to which are reflective of alterations in cell cycle and initiation of cell death mechanisms. Raman spectroscopy, on the other hand, is sensitive to rotational and vibrational molecular transitions, as well as intermolecular vibrations. Therefore, Raman spectroscopy provides complementary information about cells, such as protein, lipid and nucleic acid content, and, particularly, the spectral signatures associated with structural changes in molecules. The cell cultures are kept in the temperature-controlled environmental chamber during the experiment, which allows monitoring over multiple cell cycles. The DHM system combines a visible (red) laser source with conventional microscope base, and LabVIEW-run data processing. We analyzed and compared cell culture information obtained by these two methods.

Photographic Video Disc Technology Assessment

DTIC Science & Technology

1976-09-27

by a universal type motor that is driven from the ac power lines using a triac . The triac is controlled by a phase locked loop control circuit that...Regardless of signal format, direct analogue or an A/D converted digital signal, it is recorded by modulated laser beam and can be read out by either...was made to record with frequency modulation (FM) because of its immunity to noise at low frequencies where much of the system noise is. The usual

Hierarchically Patterned Noncovalent Functionalization of 2D Materials by Controlled Langmuir-Schaefer Conversion.

PubMed

Davis, Tyson C; Bang, Jae Jin; Brooks, Jacob T; McMillan, David G; Claridge, Shelley A

2018-01-30

Noncovalent monolayer chemistries are often used to functionalize 2D materials. Nanoscopic ligand ordering has been widely demonstrated (e.g., lying-down lamellar phases of functional alkanes); however, combining this control with micro- and macroscopic patterning for practical applications remains a significant challenge. A few reports have demonstrated that standing phase Langmuir films on water can be converted into nanoscopic lying-down molecular domains on 2D substrates (e.g., graphite), using horizontal dipping (Langmuir-Schaefer, LS, transfer). Molecular patterns are known to form at scales up to millimeters in Langmuir films, suggesting the possibility of transforming such structures into functional patterns on 2D materials. However, to our knowledge, this approach has not been investigated, and the rules governing LS conversion are not well understood. In part, this is because the conversion process is mechanistically very different from classic LS transfer of standing phases; challenges also arise due to the need to characterize structure in noncovalently adsorbed ligand layers <0.5 nm thick, at scales ranging from millimeters to nanometers. Here, we show that scanning electron microscopy enables diynoic acid lying-down phases to be imaged across this range of scales; using this structural information, we establish conditions for LS conversion to create hierarchical microscopic and nanoscopic functional patterns. Such control opens the door to tailoring noncovalent surface chemistry of 2D materials to pattern local interactions with the environment.

Non-parametric PCM to ADM conversion. [Pulse Code to Adaptive Delta Modulation

NASA Technical Reports Server (NTRS)

Locicero, J. L.; Schilling, D. L.

1977-01-01

An all-digital technique to convert pulse code modulated (PCM) signals into adaptive delta modulation (ADM) format is presented. The converter developed is shown to be independent of the statistical parameters of the encoded signal and can be constructed with only standard digital hardware. The structure of the converter is simple enough to be fabricated on a large scale integrated circuit where the advantages of reliability and cost can be optimized. A concise evaluation of this PCM to ADM translation technique is presented and several converters are simulated on a digital computer. A family of performance curves is given which displays the signal-to-noise ratio for sinusoidal test signals subjected to the conversion process, as a function of input signal power for several ratios of ADM rate to Nyquist rate.

A microcontroller-based lock-in amplifier for sub-milliohm resistance measurements.

PubMed

Bengtsson, Lars E

2012-07-01

This paper presents a novel approach to the design of a digital ohmmeter with a resolution of <60 μΩ based on a general-purpose microcontroller and a high-impedance instrumentation amplifier only. The design uses two digital I/O-pins to alternate the current through the sample resistor and combined with a proper firmware routine, the design is a lock-in detector that discriminates any signal that is out of phase/frequency with the reference signal. This makes it possible to selectively detect the μV drop across sample resistors down to 55.6 μΩ using only the current that can be supplied by the digital output pins of a microcontroller. This is achieved without the need for an external reference signal generator and does not rely on the computing processing power of a digital signal processor.

Synchronization sampling method based on delta-sigma analog-digital converter for underwater towed array system.

PubMed

Jiang, Jia-Jia; Duan, Fa-Jie; Li, Yan-Chao; Hua, Xiang-Ning

2014-03-01

Synchronization sampling is very important in underwater towed array system where every acquisition node (AN) samples analog signals by its own analog-digital converter (ADC). In this paper, a simple and effective synchronization sampling method is proposed to ensure synchronized operation among different ANs of the underwater towed array system. We first present a master-slave synchronization sampling model, and then design a high accuracy phase-locked loop to synchronize all delta-sigma ADCs to a reference clock. However, when the master-slave synchronization sampling model is used, both the time-delay (TD) of messages traveling along the wired transmission medium and the jitter of the clocks will bring out synchronization sampling error (SSE). Therefore, a simple method is proposed to estimate and compensate the TD of the messages transmission, and then another effective method is presented to overcome the SSE caused by the jitter of the clocks. An experimental system with three ANs is set up, and the related experimental results verify the validity of the synchronization sampling method proposed in this paper.

Synchronization sampling method based on delta-sigma analog-digital converter for underwater towed array system

NASA Astrophysics Data System (ADS)

Jiang, Jia-Jia; Duan, Fa-Jie; Li, Yan-Chao; Hua, Xiang-Ning

2014-03-01

Synchronization sampling is very important in underwater towed array system where every acquisition node (AN) samples analog signals by its own analog-digital converter (ADC). In this paper, a simple and effective synchronization sampling method is proposed to ensure synchronized operation among different ANs of the underwater towed array system. We first present a master-slave synchronization sampling model, and then design a high accuracy phase-locked loop to synchronize all delta-sigma ADCs to a reference clock. However, when the master-slave synchronization sampling model is used, both the time-delay (TD) of messages traveling along the wired transmission medium and the jitter of the clocks will bring out synchronization sampling error (SSE). Therefore, a simple method is proposed to estimate and compensate the TD of the messages transmission, and then another effective method is presented to overcome the SSE caused by the jitter of the clocks. An experimental system with three ANs is set up, and the related experimental results verify the validity of the synchronization sampling method proposed in this paper.

Compendium of Single-Event Latchup and Total Ionizing Dose Test Results of Commercial Analog to Digital Converters

NASA Technical Reports Server (NTRS)

Irom, Farokh; Agarwal, Shri G.

2012-01-01

This paper reports single-event latchup and total dose results for a variety of analog to digital converters targeted for possible use in NASA spacecraft's. The compendium covers devices tested over the last 15 years.

High Angular Sensitivity, Absolute Rotary Encoding Device with Polygonal Mirror and Stand-Alone Diffraction Gratings

NASA Technical Reports Server (NTRS)

Leviton, Douglas B. (Inventor)

1996-01-01

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror direct the light beam to a stand-alone low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-lo-digital converter.

All-digital pulse-expansion-based CMOS digital-to-time converter.

PubMed

Chen, Chun-Chi; Chu, Che-Hsun

2017-02-01

This paper presents a new all-digital CMOS digital-to-time converter (DTC) based on pulse expansion. Pulse expansion is achieved using an all-digital pulse-mixing scheme that can effectively improve the timing resolution and enable the DTC to be concise. Without requiring the Vernier principle or a costly digital-to-analog converter, the DTC comprises a pulse generator for generating a pulse, a pulse-expanding circuit (PEC) for programming timing generation, and a time subtractor for removing the time width of the pulse. The PEC comprises only a delay chain composed of proposed pulse-expanding units and a multiplexer. For accuracy enhancement, a pulse neutralization technique is presented to eliminate undesirable pulse variation. A 4-bit converter was fabricated in a 0.35-μm Taiwan Semiconductor Manufacturing Company CMOS process and had a small area of nearly 0.045 mm 2 . Six chips were tested, all of which exhibited an improved resolution (approximately 16 ps) and low integral nonlinearity (less than ±0.4 least significant bit). The power consumption was 0.2 mW when the sample rate was 1M samples/s and the voltage supply was 3.3 V. The proposed DTC not only has favorable cost and power but also achieves an acceptable resolution without requiring an advanced CMOS process. This study is the first to use pulse expansion in digital-to-time conversion.

All-digital pulse-expansion-based CMOS digital-to-time converter

NASA Astrophysics Data System (ADS)

Chen, Chun-Chi; Chu, Che-Hsun

2017-02-01

This paper presents a new all-digital CMOS digital-to-time converter (DTC) based on pulse expansion. Pulse expansion is achieved using an all-digital pulse-mixing scheme that can effectively improve the timing resolution and enable the DTC to be concise. Without requiring the Vernier principle or a costly digital-to-analog converter, the DTC comprises a pulse generator for generating a pulse, a pulse-expanding circuit (PEC) for programming timing generation, and a time subtractor for removing the time width of the pulse. The PEC comprises only a delay chain composed of proposed pulse-expanding units and a multiplexer. For accuracy enhancement, a pulse neutralization technique is presented to eliminate undesirable pulse variation. A 4-bit converter was fabricated in a 0.35-μ m Taiwan Semiconductor Manufacturing Company CMOS process and had a small area of nearly 0.045 mm2. Six chips were tested, all of which exhibited an improved resolution (approximately 16 ps) and low integral nonlinearity (less than ±0.4 least significant bit). The power consumption was 0.2 mW when the sample rate was 1M samples/s and the voltage supply was 3.3 V. The proposed DTC not only has favorable cost and power but also achieves an acceptable resolution without requiring an advanced CMOS process. This study is the first to use pulse expansion in digital-to-time conversion.

8-Channel acquisition system for Time-Correlated Single-Photon Counting.

PubMed

Antonioli, S; Miari, L; Cuccato, A; Crotti, M; Rech, I; Ghioni, M

2013-06-01

Nowadays, an increasing number of applications require high-performance analytical instruments capable to detect the temporal trend of weak and fast light signals with picosecond time resolution. The Time-Correlated Single-Photon Counting (TCSPC) technique is currently one of the preferable solutions when such critical optical signals have to be analyzed and it is fully exploited in biomedical and chemical research fields, as well as in security and space applications. Recent progress in the field of single-photon detector arrays is pushing research towards the development of high performance multichannel TCSPC systems, opening the way to modern time-resolved multi-dimensional optical analysis. In this paper we describe a new 8-channel high-performance TCSPC acquisition system, designed to be compact and versatile, to be used in modern TCSPC measurement setups. We designed a novel integrated circuit including a multichannel Time-to-Amplitude Converter with variable full-scale range, a D∕A converter, and a parallel adder stage. The latter is used to adapt each converter output to the input dynamic range of a commercial 8-channel Analog-to-Digital Converter, while the integrated DAC implements the dithering technique with as small as possible area occupation. The use of this monolithic circuit made the design of a scalable system of very small dimensions (95 × 40 mm) and low power consumption (6 W) possible. Data acquired from the TCSPC measurement are digitally processed and stored inside an FPGA (Field-Programmable Gate Array), while a USB transceiver allows real-time transmission of up to eight TCSPC histograms to a remote PC. Eventually, the experimental results demonstrate that the acquisition system performs TCSPC measurements with high conversion rate (up to 5 MHz/channel), extremely low differential nonlinearity (<0.04 peak-to-peak of the time bin width), high time resolution (down to 20 ps Full-Width Half-Maximum), and very low crosstalk between channels.

Using a fast-neutron spectrometer system to candle luggage for hidden explosives

NASA Astrophysics Data System (ADS)

Lefevre, Harlan W.; Rasmussen, R. J.; Chmelik, Michael S.; Schofield, R. M. S.; Sieger, G. E.; Overley, Jack C.

1997-02-01

A continuous spectrum of neutron switch energies up to 8.2 MeV is produced by a 4.2-MeV nanosecond-pulsed deuteron beam slowing down in a thick beryllium target. The spectrum form the locally shielded target is collimated to a horizontal fan-beam and delivered to a row of 16, 6-cm square plastic scintillators located 4 m from the neutron source. The scintillators are coupled to 12-stage photomultiplier tubes, constant-fraction discriminators, time-to-amplitude converters, analog-to-digital converters, and digital memories. Unattenuated neutron-source spectra and background spectra ar recorded. Luggage is stepped through the fan beam by an automated lift located 2 m from the neutron source. Transmission spectra are measured, and are transferred to a computer while the location is advanced one pixel width. As the next set of spectra is being measured, the computer calculates neutron attenuations for the previous set, deconvolutes attenuations into projected elemental number densities, and determines the explosive likelihood for each pixel. With a time-averaged deuteron beam current o 1(mu) A, a suitcase 60-cm long can be automatically imaged in 1600s. We will suggest that time can be reduced to 8s or less with straight-forward improvements. The following paper describes the explosives recognition algorithm and presents the results of teste with explosives.

A development of two-dimensional birefringence distribution measurement system with a sampling rate of 1.3 MHz

NASA Astrophysics Data System (ADS)

Onuma, Takashi; Otani, Yukitoshi

2014-03-01

A two-dimensional birefringence distribution measurement system with a sampling rate of 1.3 MHz is proposed. A polarization image sensor is developed as core device of the system. It is composed of a pixelated polarizer array made from photonic crystal and a parallel read out circuit with a multi-channel analog to digital converter specialized for two-dimensional polarization detection. By applying phase shifting algorism with circularly-polarized incident light, birefringence phase difference and azimuthal angle can be measured. The performance of the system is demonstrated experimentally by measuring actual birefringence distribution and polarization device such as Babinet-Soleil compensator.

Digital control of a direct current converter for a hybrid vehicle

NASA Astrophysics Data System (ADS)

Hernandez, Juan Manuel

The nonlinear feedback loops permitting the large signal control of pulse width modulators in direct current converters are discussed. A digital feedback loop on a converter controlling the coupling of a direct current machine is described. It is used in the propulsion of a hybrid vehicle (thermal-electric) with regenerative braking. The protection of the power switches is also studied. An active protection of the MOST bipolar transistor association is proposed.

An 8-PSK TDMA uplink modulation and coding system

NASA Technical Reports Server (NTRS)

Ames, S. A.

1992-01-01

The combination of 8-phase shift keying (8PSK) modulation and greater than 2 bits/sec/Hz drove the design of the Nyquist filter to one specified to have a rolloff factor of 0.2. This filter when built and tested was found to produce too much intersymbol interference and was abandoned for a design with a rolloff factor of 0.4. The preamble is limited to 100 bit periods of the uncoded bit period of 5 ns for a maximum preamble length of 500 ns or 40 8PSK symbol times at 12.5 ns per symbol. For 8PSK modulation, the required maximum degradation of 1 dB in -20 dB cochannel interference (CCI) drove the requirement for forward error correction coding. In this contract, the funding was not sufficient to develop the proposed codec so the codec was limited to a paper design during the preliminary design phase. The mechanization of the demodulator is digital, starting from the output of the analog to digital converters which quantize the outputs of the quadrature phase detectors. This approach is amenable to an application specific integrated circuit (ASIC) replacement in the next phase of development.

Wideband aperture array using RF channelizers and massively parallel digital 2D IIR filterbank

NASA Astrophysics Data System (ADS)

Sengupta, Arindam; Madanayake, Arjuna; Gómez-García, Roberto; Engeberg, Erik D.

2014-05-01

Wideband receive-mode beamforming applications in wireless location, electronically-scanned antennas for radar, RF sensing, microwave imaging and wireless communications require digital aperture arrays that offer a relatively constant far-field beam over several octaves of bandwidth. Several beamforming schemes including the well-known true time-delay and the phased array beamformers have been realized using either finite impulse response (FIR) or fast Fourier transform (FFT) digital filter-sum based techniques. These beamforming algorithms offer the desired selectivity at the cost of a high computational complexity and frequency-dependant far-field array patterns. A novel approach to receiver beamforming is the use of massively parallel 2-D infinite impulse response (IIR) fan filterbanks for the synthesis of relatively frequency independent RF beams at an order of magnitude lower multiplier complexity compared to FFT or FIR filter based conventional algorithms. The 2-D IIR filterbanks demand fast digital processing that can support several octaves of RF bandwidth, fast analog-to-digital converters (ADCs) for RF-to-bits type direct conversion of wideband antenna element signals. Fast digital implementation platforms that can realize high-precision recursive filter structures necessary for real-time beamforming, at RF radio bandwidths, are also desired. We propose a novel technique that combines a passive RF channelizer, multichannel ADC technology, and single-phase massively parallel 2-D IIR digital fan filterbanks, realized at low complexity using FPGA and/or ASIC technology. There exists native support for a larger bandwidth than the maximum clock frequency of the digital implementation technology. We also strive to achieve More-than-Moore throughput by processing a wideband RF signal having content with N-fold (B = N Fclk/2) bandwidth compared to the maximum clock frequency Fclk Hz of the digital VLSI platform under consideration. Such increase in bandwidth is achieved without use of polyphase signal processing or time-interleaved ADC methods. That is, all digital processors operate at the same Fclk clock frequency without phasing, while wideband operation is achieved by sub-sampling of narrower sub-bands at the the RF channelizer outputs.

Existing methods for improving the accuracy of digital-to-analog converters

NASA Astrophysics Data System (ADS)

Eielsen, Arnfinn A.; Fleming, Andrew J.

2017-09-01

The performance of digital-to-analog converters is principally limited by errors in the output voltage levels. Such errors are known as element mismatch and are quantified by the integral non-linearity. Element mismatch limits the achievable accuracy and resolution in high-precision applications as it causes gain and offset errors, as well as harmonic distortion. In this article, five existing methods for mitigating the effects of element mismatch are compared: physical level calibration, dynamic element matching, noise-shaping with digital calibration, large periodic high-frequency dithering, and large stochastic high-pass dithering. These methods are suitable for improving accuracy when using digital-to-analog converters that use multiple discrete output levels to reconstruct time-varying signals. The methods improve linearity and therefore reduce harmonic distortion and can be retrofitted to existing systems with minor hardware variations. The performance of each method is compared theoretically and confirmed by simulations and experiments. Experimental results demonstrate that three of the five methods provide significant improvements in the resolution and accuracy when applied to a general-purpose digital-to-analog converter. As such, these methods can directly improve performance in a wide range of applications including nanopositioning, metrology, and optics.

Apparatus for providing a servo drive signal in a high-speed stepping interferometer

NASA Technical Reports Server (NTRS)

Schindler, R. A. (Inventor)

1979-01-01

An analog voltage approximately linearly proportional to a desired offset from the present null position of a moving mirror in an interferometer is applied to the mirror moving means. As the mirror moves to the next null position, as determined by the analog voltage, the fringes of a laser reference interference pattern are detected. At the occurrence of each fringe the analog voltage is reduced proportionally so that when the next null position is reached, this driving analog is effectively zero. A binary up/down counter, by its internal count, causes a digital/analog converter to supply the analog voltage to the mirror moving means. Fringe detection and direction of movement logic cause the binary up/down counter to be decremented from its offset count as the mirror is moved to the new null position. Undesirable movement of the mirror due to vibration or other sources causes a correcting drive signal to be applied to the mirror moving means that is proportional to the distance of movement.

A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems.

PubMed

Park, Sung-Yun; Cho, Jihyun; Lee, Kyuseok; Yoon, Euisik

2015-12-01

We report a pulse width modulation (PWM) buck converter that is able to achieve a power conversion efficiency (PCE) of > 80% in light loads 100 μA) for implantable biomedical systems. In order to achieve a high PCE for the given light loads, the buck converter adaptively reconfigures the size of power PMOS and NMOS transistors and their gate drivers in accordance with load currents, while operating at a fixed frequency of 1 MHz. The buck converter employs the analog-digital hybrid control scheme for coarse/fine adjustment of power transistors. The coarse digital control generates an approximate duty cycle necessary for driving a given load and selects an appropriate width of power transistors to minimize redundant power dissipation. The fine analog control provides the final tuning of the duty cycle to compensate for the error from the coarse digital control. The mode switching between the analog and digital controls is accomplished by a mode arbiter which estimates the average of duty cycles for the given load condition from limit cycle oscillations (LCO) induced by coarse adjustment. The fabricated buck converter achieved a peak efficiency of 86.3% at 1.4 mA and > 80% efficiency for a wide range of load conditions from 45 μA to 4.1 mA, while generating 1 V output from 2.5-3.3 V supply. The converter occupies 0.375 mm(2) in 0.18 μm CMOS processes and requires two external components: 1.2 μF capacitor and 6.8 μH inductor.

Top-down solid-phase fabrication of nanoporous cadmium oxide architectures.

PubMed

Yu, Haidong; Wang, Deshen; Han, Ming-Yong

2007-02-28

In this article, we have demonstrated one-step solid-phase transformation from high-quality cadmium carbonate microcrystals into highly nanoporous cadmium oxide. The high crystal quality of cadmium carbonate is critical for the successful fabrication of porous nanoarchitectures with predetermined morphology and well-controlled internal structure. This novel strategy has a good potential to prepare nanoporous materials at a large scale by using perfect monolithic carbonate crystals, and it is also useful to synthesize different nanoporous materials on metal-oxide-coated substrates. Meanwhile, this simple thermal transformation of cadmium carbonate into porous structures has further been extended to convert calcium carbonate into such porous structures.

An Economic Analysis of Two Groundwater Allocation Programs for the Salinas Valley

DTIC Science & Technology

1994-06-01

monitoring system would establish a definable and 17Each individual well would have a frequency generator, analog/ digital converter, microprocessor with...RTU). The cost for purchasing and installing the frequency generator is estimated to be $1,100. The RTU consists of an analog/ digital converter and a...programmable microprocessor that can accept up to eight inputs and one output. The unit can transmit and receive digital data via LAN network or

A Time-Domain CMOS Oscillator-Based Thermostat with Digital Set-Point Programming

PubMed Central

Chen, Chun-Chi; Lin, Shih-Hao

2013-01-01

This paper presents a time-domain CMOS oscillator-based thermostat with digital set-point programming [without a digital-to-analog converter (DAC) or external resistor] to achieve on-chip thermal management of modern VLSI systems. A time-domain delay-line-based thermostat with multiplexers (MUXs) was used to substantially reduce the power consumption and chip size, and can benefit from the performance enhancement due to the scaling down of fabrication processes. For further cost reduction and accuracy enhancement, this paper proposes a thermostat using two oscillators that are suitable for time-domain curvature compensation instead of longer linear delay lines. The final time comparison was achieved using a time comparator with a built-in custom hysteresis to generate the corresponding temperature alarm and control. The chip size of the circuit was reduced to 0.12 mm2 in a 0.35-μm TSMC CMOS process. The thermostat operates from 0 to 90 °C, and achieved a fine resolution better than 0.05 °C and an improved inaccuracy of ± 0.6 °C after two-point calibration for eight packaged chips. The power consumption was 30 μW at a sample rate of 10 samples/s. PMID:23385403

A time-based front-end ASIC for the silicon micro strip sensors of the bar PANDA Micro Vertex Detector

NASA Astrophysics Data System (ADS)

Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.

2016-03-01

The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.

Electro-Optic Analog/Digital Converter.

DTIC Science & Technology

electro - optic material and a source of linearly polarized light is arranged to transmit its light energy along each of the optical waveguides. Electrodes are disposed contiguous to the optical waveguides for impressing electric fields thereacross. An input signal potential is applied to the electrodes to produce electric fields of intensity relative to each of the waveguides such that causes phase shift and resultant change of polarization which can be detected as representative of a binary ’one’ or binary ’zero’ for each of the channel optical

Ghost imaging for three-dimensional optical security

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Wen, E-mail: elechenw@nus.edu.sg; Chen, Xudong

2013-11-25

Ghost imaging has become increasingly popular in quantum and optical application fields. Here, we report three-dimensional (3D) optical security using ghost imaging. The series of random phase-only masks are sparsified, which are further converted into particle-like distributions placed in 3D space. We show that either an optical or digital approach can be employed for the encoding. The results illustrate that a larger key space can be generated due to the application of 3D space compared with previous works.

Wideband Holographic Digital Recording and Reproduction. Phase IV.

DTIC Science & Technology

1980-02-01

array of 128 acousto-optic ele- meats. The electrical energy is converted to acoustic waves within a glass crystal, so that when the light passes through...systems. An AO device is a block of transparent material (various types of glass , for example) through which we pass the laser beam that we want to...Clearance - .60 mm from cell Vignetting None None Glass Type Optional SF6 R ecord Mode Input Aperture 14 mm x 52mm 14mrm x 52rm Field Angle +12. 0

Recipient luminophoric mediums having narrow spectrum luminescent materials and related semiconductor light emitting devices and methods

DOEpatents

LeToquin, Ronan P; Tong, Tao; Glass, Robert C

2014-12-30

Light emitting devices include a light emitting diode ("LED") and a recipient luminophoric medium that is configured to down-convert at least some of the light emitted by the LED. In some embodiments, the recipient luminophoric medium includes a first broad-spectrum luminescent material and a narrow-spectrum luminescent material. The broad-spectrum luminescent material may down-convert radiation emitted by the LED to radiation having a peak wavelength in the red color range. The narrow-spectrum luminescent material may also down-convert radiation emitted by the LED into the cyan, green or red color range.

An efficient fluorescent single-particle position tracking system for long-term pulsed measurements of nitrogen-vacancy centers in diamond

NASA Astrophysics Data System (ADS)

Kim, Kiho; Yun, Jiwon; Lee, Donghyuck; Kim, Dohun

2018-02-01

A simple and convenient design enables real-time three-dimensional position tracking of nitrogen-vacancy (NV) centers in diamond. The system consists entirely of commercially available components (a single-photon counter, a high-speed digital-to-analog converter, a phase-sensitive detector-based feedback device, and a piezo stage), eliminating the need for custom programming or rigorous optimization processes. With a large input range of counters and trackers combined with high sensitivity of single-photon counting, high-speed position tracking (upper bound recovery time of 0.9 s upon 250 nm of step-like positional shift) not only of bright ensembles, but also of low-photon-collection-efficiency single to few NV centers (down to 103 s-1) is possible. The tracking requires position modulation of only 10 nm, which allows simultaneous position tracking and pulsed measurements in the long term. Therefore, this tracking system enables measuring a single-spin magnetic resonance and Rabi oscillations at a very high resolution even without photon collection optimization. The system is widely applicable to various fields related to NV center quantum manipulation research such as NV optical trapping, NV tracking in fluid dynamics, and biological sensing using NV centers inside a biological cell.

The Deep Space Network in the Common Platform Era: A Prototype Implementation at DSS-13

NASA Technical Reports Server (NTRS)

Davarian, F.

2013-01-01

To enhance NASA's Deep Space Network (DSN), an effort is underway to improve network performance and simplify its operation and maintenance. This endeavor, known as the "Common Platform," has both short- and long-term objectives. The long-term work has not begun yet; however, the activity to realize the short-term goals has started. There are three goals for the long-term objective: 1. Convert the DSN into a digital network where signals are digitized at the output of the down converters at the antennas and are distributed via a digital IF switch to the processing platforms. 2. Employ a set of common hardware for signal processing applications, e.g., telemetry, tracking, radio science and Very Long Baseline Interferometry (VLBI). 3. Minimize in-house developments in favor of purchasing commercial off-the-shelf (COTS) equipment. The short-term goal is to develop a prototype of the above at NASA's experimental station known as DSS-13. This station consists of a 34m beam waveguide antenna with cryogenically cooled amplifiers capable of handling deep space research frequencies at S-, X-, and Ka-bands. Without the effort at DSS-13, the implementation of the long-term goal can potentially be risky because embarking on the modification of an operational network without prior preparations can, among other things, result in unwanted service interruptions. Not only are there technical challenges to address, full network implementation of the Common Platform concept includes significant cost uncertainties. Therefore, a limited implementation at DSS-13 will contribute to risk reduction. The benefits of employing common platforms for the DSN are lower cost and improved operations resulting from ease of maintenance and reduced number of spare parts. Increased flexibility for the user is another potential benefit. This paper will present the plans for DSS-13 implementation. It will discuss key issues such as the Common Platform architecture, choice of COTS equipment, and the standard for radio frequency (RF) to digital interface.

Digital EPR with an arbitrary waveform generator and direct detection at the carrier frequency

PubMed Central

Tseitlin, Mark; Quine, Richard W.; Rinard, George A.; Eaton, Sandra S.; Eaton, Gareth R.

2011-01-01

A digital EPR spectrometer was constructed by replacing the traditional bridge with an arbitrary waveform generator (AWG) to produce excitation patterns and a high-speed digitizer for direct detection of the spin system response at the carrier frequency. Digital down-conversion produced baseband signals in quadrature with very precise orthogonality. Real-time resonator tuning was performed by monitoring the Fourier transforms of signals reflected from the resonator during frequency sweeps generated by the AWG. The capabilities of the system were demonstrated by rapid magnetic field scans at 256 MHz carrier frequency, and FID and spin echo experiments at 1 and 10 GHz carrier frequencies. For the rapid scan experiments the leakage through a cross-loop resonator was compensated by adjusting the amplitude and phase of a sinusoid at the carrier frequency that was generated with another AWG channel. PMID:21968420

Generation and coherent detection of QPSK signal using a novel method of digital signal processing

NASA Astrophysics Data System (ADS)

Zhao, Yuan; Hu, Bingliang; He, Zhen-An; Xie, Wenjia; Gao, Xiaohui

2018-02-01

We demonstrate an optical quadrature phase-shift keying (QPSK) signal transmitter and an optical receiver for demodulating optical QPSK signal with homodyne detection and digital signal processing (DSP). DSP on the homodyne detection scheme is employed without locking the phase of the local oscillator (LO). In this paper, we present an extracting one-dimensional array of down-sampling method for reducing unwanted samples of constellation diagram measurement. Such a novel scheme embodies the following major advantages over the other conventional optical QPSK signal detection methods. First, this homodyne detection scheme does not need strict requirement on LO in comparison with linear optical sampling, such as having a flat spectral density and phase over the spectral support of the source under test. Second, the LabVIEW software is directly used for recovering the QPSK signal constellation without employing complex DSP circuit. Third, this scheme is applicable to multilevel modulation formats such as M-ary PSK and quadrature amplitude modulation (QAM) or higher speed signals by making minor changes.

Digitization of Analog Signals using a Field Programmable Gate Array (FPGA)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aguilera, Daniel; Rusu, Vadim

The idea of this research is consolidating the electrical components used for capturing data in the Mu2e Tracker. Ideally, an FPGA will serve as the Time-Division Converters (TDC) and Analog-to-Digital Converters (ADC). The TDC is already being carried out by the FPGA, but we are still using off the shelf ADCs. This poster proposes using Low Voltage Differential Signaling as the basis for analog-to-digital conversion using and FPGA.

DMSP Special Sensor Microwave/Imager Calibration/Validation. Volume 1

DTIC Science & Technology

1990-01-01

each channel samples the hot load on every scan and commands a gain change up when the hot load is below 7/16th of the analog to digital converter range...OLS imagery. A threshold blanking technique was used to convert the manual analyses into synthetic digital images containing the cloud truth...should include OLS digital thermal infrared into the analysis. While this will be of use only in clear, relatively dry atmospheric conditions, the

Digital control of diode laser for atmospheric spectroscopy

NASA Technical Reports Server (NTRS)

Menzies, R. T.; Rutledge, C. W. (Inventor)

1985-01-01

A system is described for remote absorption spectroscopy of trace species using a diode laser tunable over a useful spectral region of 50 to 200 cm(-1) by control of diode laser temperature over range from 15 K to 100 K, and tunable over a smaller region of typically 0.1 to 10 cm(-1) by control of the diode laser current over a range from 0 to 2 amps. Diode laser temperature and current set points are transmitted to the instrument in digital form and stored in memory for retrieval under control of a microprocessor during measurements. The laser diode current is determined by a digital to analog converter through a field effect transistor for a high degree of ambient temperature stability, while the laser diode temperature is determined by set points entered into a digital to analog converter under control of the microprocessor. Temperature of the laser diode is sensed by a sensor diode to provide negative feedback to the temperature control circuit that responds to the temperature control digital to analog converter.

Computerized Experiments Using an A/D Converter.

ERIC Educational Resources Information Center

Karl, John H.

The indroduction of on-line data collection and data processing techniques into an intermediate physics laboratory is described. Using a minimum configuration PDP-8L and a Digital Equipment AD01 analog to digital converter, an interface is developed with two existing experiments. These are a microwave apparatus used to simulate Bragg diffraction…

A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors.

PubMed

Son, Hyunwoo; Cho, Hwasuk; Koo, Jahyun; Ji, Youngwoo; Kim, Byungsub; Park, Hong-June; Sim, Jae-Yoon

2017-06-01

This paper presents an amplifier-less and digital-intensive current-to-digital converter for ion-sensitive FET sensors. Capacitance on the input node is utilized as a residue accumulator, and a clocked comparator is followed for quantization. Without any continuous-time feedback circuit, the converter performs a first-order noise shaping of the quantization error. In order to minimize static power consumption, the proposed circuit employs a single-ended current-steering digital-to-analog converter which flows only the same current as the input. By adopting a switching noise averaging algorithm, our dynamic element matching not only mitigates mismatch of current sources in the current-steering DAC, but also makes the effect of dynamic switching noise become an input-independent constant. The implemented circuit in 0.35 μm CMOS converts the current input with a range of 2.8 μ A to 15 b digital output in about 4 ms, showing a DNL of +0.24/-0.25 LSB and an INL of + 1.98/-1.98 LSB while consuming 16.8 μW.

The influence of lower limb amputation level on the approach in the amputee long jump.

PubMed

Nolan, Lee; Lees, Adrian

2007-02-15

In this study, we investigated the adjustments to posture, kinematic and temporal characteristics of performance made by lower limb amputees during the last few strides in preparation for long jump take-off. Six male unilateral trans-femoral and seven male unilateral trans-tibial amputees competing in a World Championships final were filmed in the sagittal plane using a 100-Hz digital video camera positioned so that the last three strides to take-off were visible. After digitizing using a nine-segment model, a range of kinematic variables were computed to define technique characteristics. Both the trans-femoral and trans-tibial athletes appeared to achieve their reduction in centre of mass during the flight phase between strides, and did so mainly by extending the flight time by increasing stride length, achieved by a greater flexion of the hip joint of the touch-down leg. The trans-tibial athletes appeared to adopt a technique similar to that previously reported for able-bodied athletes. They lowered their centre of mass most on their second last stride (-1.6% of body height compared with -1.4% on the last stride) and used a flexed knee at take-off on the last stride, but they were less able to control their downward velocity at touch-down (-0.4 m x s(-1)). Both this and their restricted approach speed (8.9 m x s(-1) at touch-down), rather than technique limitations, influenced their jump performance. The trans-femoral athletes lowered their centre of mass most on the last stride (-2.3% of body height compared with -1.6% on the second last stride) and, as they were unable to flex their prosthetic knee sufficiently, achieved this by abducting their prosthetic leg during the support phase, which led to a large downward velocity at touch-down (-0.6 m x s(-1)). This, combined with their slower approach velocity (7.1 m x s(-1) at touch-down), restricted their performance.

Electronics for Deep Space Cryogenic Applications

NASA Technical Reports Server (NTRS)

Patterson, R. L.; Hammond, A.; Dickman, J. E.; Gerber, S. S.; Elbuluk, M. E.; Overton, E.

2002-01-01

Deep space probes and planetary exploration missions require electrical power management and control systems that are capable of efficient and reliable operation in very cold temperature environments. Typically, in deep space probes, heating elements are used to keep the spacecraft electronics near room temperature. The utilization of power electronics designed for and operated at low temperature will contribute to increasing efficiency and improving reliability of space power systems. At NASA Glenn Research Center, commercial-off-the-shelf devices as well as developed components are being investigated for potential use at low temperatures. These devices include semiconductor switching devices, magnetics, and capacitors. Integrated circuits such as digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being evaluated. In this paper, results will be presented for selected analog-to-digital converters, oscillators, DC/DC converters, and pulse width modulation (PWM) controllers.

An Integrated Programmable Wide-range PLL for Switching Synchronization in Isolated DC-DC Converters

NASA Astrophysics Data System (ADS)

Fard, Miad

In this thesis, two Phase-Locked-Loop (PLL) based synchronization schemes are introduced and applied to a bi-directional Dual-Active-Bridge (DAB) dc-dc converter with an input voltage up to 80 V switching in the range of 250 kHz to 1 MHz. The two schemes synchronize gating signals across an isolated boundary without the need for an isolator per transistor. The Power Transformer Sensing (PTS) method utilizes the DAB power transformer to indirectly sense switching on the secondary side of the boundary, while the Digital Isolator Sensing (DIS) method utilizes a miniature transformer for synchronization and communication at up to 100 MHz. The PLL is implemented on-chip, and is used to control an external DAB power-stage. This work will lead to lower cost, high-frequency isolated dc-dc converters needed for a wide variety of emerging low power applications where isolator cost is relatively high and there is a demand for the reduction of parts.

Parallel-Processing Equalizers for Multi-Gbps Communications

NASA Technical Reports Server (NTRS)

Gray, Andrew; Ghuman, Parminder; Hoy, Scott; Satorius, Edgar H.

2004-01-01

Architectures have been proposed for the design of frequency-domain least-mean-square complex equalizers that would be integral parts of parallel- processing digital receivers of multi-gigahertz radio signals and other quadrature-phase-shift-keying (QPSK) or 16-quadrature-amplitude-modulation (16-QAM) of data signals at rates of multiple gigabits per second. Equalizers as used here denotes receiver subsystems that compensate for distortions in the phase and frequency responses of the broad-band radio-frequency channels typically used to convey such signals. The proposed architectures are suitable for realization in very-large-scale integrated (VLSI) circuitry and, in particular, complementary metal oxide semiconductor (CMOS) application- specific integrated circuits (ASICs) operating at frequencies lower than modulation symbol rates. A digital receiver of the type to which the proposed architecture applies (see Figure 1) would include an analog-to-digital converter (A/D) operating at a rate, fs, of 4 samples per symbol period. To obtain the high speed necessary for sampling, the A/D and a 1:16 demultiplexer immediately following it would be constructed as GaAs integrated circuits. The parallel-processing circuitry downstream of the demultiplexer, including a demodulator followed by an equalizer, would operate at a rate of only fs/16 (in other words, at 1/4 of the symbol rate). The output from the equalizer would be four parallel streams of in-phase (I) and quadrature (Q) samples.

Numerical Simulation of Electrical Properties of Carbonate Reservoir Rocks Using µCT Images

NASA Astrophysics Data System (ADS)

Colgin, J.; Niu, Q.; Zhang, C.; Zhang, F.

2017-12-01

Digital rock physics involves the modern microscopic imaging of geomaterials, digitalization of the microstructure, and numerical simulation of physical properties of rocks. This physics-based approach can give important insight into understanding properties of reservoir rocks, and help reveal the link between intrinsic rock properties and macroscopic geophysical responses. The focus of this study is the simulation of the complex conductivity of carbonate reservoir rocks using reconstructed 3D rock structures from high-resolution X-ray micro computed tomography (µCT). Carbonate core samples with varying lithofacies and pore structures from the Cambro-Ordovician Arbuckle Group and the Upper Pennsylvanian Lansing-Kansas City Group in Kansas are used in this study. The wide variations in pore geometry and connectivity of these samples were imaged using µCT. A two-phase segmentation method was used to reconstruct a digital rock of solid particles and pores. We then calculate the effective electrical conductivity of the digital rock volume using a pore-scale numerical approach. The complex conductivity of geomaterials is influenced by the electrical properties and geometry of each phase, i.e., the solid and fluid phases. In addition, the electrical double layer that forms between the solid and fluid phases can also affect the effective conductivity of the material. In the numerical modeling, the influence of the electrical double layer is quantified by a complex surface conductance and converted to an apparent volumetric complex conductivity of either solid particles or pore fluid. The effective complex conductivity resulting from numerical simulations based on µCT images will be compared to results from laboratory experiments on equivalent rock samples. The imaging and digital segmentation method, assumptions in the numerical simulation, and trends as compared to laboratory results will be discussed. This study will help us understand how microscale physics affects macroscale electrical conductivity in porous media.

A 1.1nW Energy Harvesting System with 544pW Quiescent Power for Next Generation Implants

PubMed Central

Mercier, Patrick P.; Lysaght, Andrew C.; Stankovic, Konstantina M.; Chandrakasan, Anantha P.

2015-01-01

This paper presents a nW power management unit (PMU) for an autonomous wireless sensor that sustains itself by harvesting energy from the endocochlear potential (EP), the 70–100 mV electrochemical bio-potential inside the mammalian ear. Due to the anatomical constraints inside the inner ear, the total extractable power from the EP is limited to 1.1–6.25 nW. A nW boost converter is used to increase the input voltage (30–55 mV) to a higher voltage (0.8 to 1.1 V) usable by CMOS circuits in the sensor. A pW Charge Pump circuit is used to minimize the leakage in the boost converter. Further, ultra-low-power control circuits consisting of digital implementations of input impedance adjustment circuits and Zero Current Switching circuits along with Timer and Reference circuits keep the quiescent power of the PMU down to 544 pW. The designed boost converter achieves a peak power conversion efficiency of 56%. The PMU can sustain itself and a duty-cyled ultra-low power load while extracting power from the EP of a live guinea pig. The PMU circuits have been implemented on a 0.18µm CMOS process. PMID:25983340

A 1.1nW Energy Harvesting System with 544pW Quiescent Power for Next Generation Implants.

PubMed

Bandyopadhyay, Saurav; Mercier, Patrick P; Lysaght, Andrew C; Stankovic, Konstantina M; Chandrakasan, Anantha P

2014-12-01

This paper presents a nW power management unit (PMU) for an autonomous wireless sensor that sustains itself by harvesting energy from the endocochlear potential (EP), the 70-100 mV electrochemical bio-potential inside the mammalian ear. Due to the anatomical constraints inside the inner ear, the total extractable power from the EP is limited to 1.1-6.25 nW. A nW boost converter is used to increase the input voltage (30-55 mV) to a higher voltage (0.8 to 1.1 V) usable by CMOS circuits in the sensor. A pW Charge Pump circuit is used to minimize the leakage in the boost converter. Further, ultra-low-power control circuits consisting of digital implementations of input impedance adjustment circuits and Zero Current Switching circuits along with Timer and Reference circuits keep the quiescent power of the PMU down to 544 pW. The designed boost converter achieves a peak power conversion efficiency of 56%. The PMU can sustain itself and a duty-cyled ultra-low power load while extracting power from the EP of a live guinea pig. The PMU circuits have been implemented on a 0.18µm CMOS process.

A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications.

PubMed

Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

2017-06-07

The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm², which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply.

A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications

PubMed Central

Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

2017-01-01

The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm2, which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply. PMID:28590425

A new concept of space solar power satellite

NASA Astrophysics Data System (ADS)

Li, Xun; Duan, Baoyan; Song, Liwei; Yang, Yang; Zhang, Yiqun; Wang, Dongxu

2017-07-01

Space solar power satellite (SSPS) is a tremendous energy system that collects and converts solar power to electric power in space, and then transmits the electric power to earth wirelessly. In this paper, a novel SSPS concept based on ε-near-zero (ENZ) metamaterial is proposed. A spherical condenser made of ENZ metamaterial is developed, by using the refractive property of the ENZ metamaterial sunlight can be captured and redirected to its center. To make the geometric concentration ratio of the PV array reasonable, a hemispherical one located at the center is used to collect and convert the normal-incidence sunlight to DC power, then through a phased array transmitting antenna the DC power is beamed down to the rectenna on the ground. Detailed design of the proposed concept is presented.

Fiber optic accelerometer

NASA Technical Reports Server (NTRS)

August, R. R.

1981-01-01

Low-cost, rugged lightweight accelerometer has been developed that converts mechanical motion into digitized optical outputs and is immune to electromagnetic and electrostatic interferences. Instrument can be placed in hostile environment, such as engine under test, and output led out through miscellany of electrical fields, high temperatures, etc., by optic fiber cables to benign environment of test panel. There, digitized optical signals can be converted to electrical signals for use in standard electrical equipment or used directly in optical devices, such as optical digital computer.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bakhtiari, S.; Liao, S.; Elmer, T.

This paper analyzes heart rate (HR) information from physiological tracings collected with a remote millimeter wave (mmW) I-Q sensor for biometric monitoring applications. A parameter optimization method based on the nonlinear Levenberg-Marquardt algorithm is used. The mmW sensor works at 94 GHz and can detect the vital signs of a human subject from a few to tens of meters away. The reflected mmW signal is typically affected by respiration, body movement, background noise, and electronic system noise. Processing of the mmW radar signal is, thus, necessary to obtain the true HR. The down-converted received signal in this case consists ofmore » both the real part (I-branch) and the imaginary part (Q-branch), which can be considered as the cosine and sine of the received phase of the HR signal. Instead of fitting the converted phase angle signal, the method directly fits the real and imaginary parts of the HR signal, which circumvents the need for phase unwrapping. This is particularly useful when the SNR is low. Also, the method identifies both beat-to-beat HR and individual heartbeat magnitude, which is valuable for some medical diagnosis applications. The mean HR here is compared to that obtained using the discrete Fourier transform.« less

Superluminal Labview Code

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wheat, Robert; Marksteiner, Quinn; Quenzer, Jonathan

2012-03-26

This labview code is used to set the phase and amplitudes on the 72 antenna of the superluminal machine, and to map out the radiation patter from the superluminal antenna.Each antenna radiates a modulated signal consisting of two separate frequencies, in the range of 2 GHz to 2.8 GHz. The phases and amplitudes from each antenna are controlled by a pair of AD8349 vector modulators (VMs). These VMs set the phase and amplitude of a high frequency signal using a set of four DC inputs, which are controlled by Linear Technologies LTC1990 digital to analog converters (DACs). The labview codemore » controls these DACs through an 8051 microcontroller.This code also monitors the phases and amplitudes of the 72 channels. Near each antenna, there is a coupler that channels a portion of the power into a binary network. Through a labview controlled switching array, any of the 72 coupled signals can be channeled in to the Tektronix TDS 7404 digital oscilloscope. Then the labview code takes an FFT of the signal, and compares it to the FFT of a reference signal in the oscilloscope to determine the magnitude and phase of each sideband of the signal. The code compensates for phase and amplitude errors introduced by differences in cable lengths.The labview code sets each of the 72 elements to a user determined phase and amplitude. For each element, the code runs an iterative procedure, where it adjusts the DACs until the correct phases and amplitudes have been reached.« less

High Speed, Low Cost Telemetry Access from Space Development Update on Programmable Ultra Lightweight System Adaptable Radio (PULSAR)

NASA Technical Reports Server (NTRS)

Simms, William Herbert, III; Varnavas, Kosta; Eberly, Eric

2014-01-01

Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 1990's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast, the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. Conventional transponders are built to a specific platform and must be redesigned for every new bus while the SDR is adaptive in nature and can fit numerous applications with no hardware modifications. A SDR uses a minimum amount of analog / Radio Frequency (RF) components to up/down-convert the RF signal to/from a digital format. Once the signal is digitized, all processing is performed using hardware or software logic. Typical SDR digital processes include; filtering, modulation, up/down converting and demodulation. NASA Marshall Space Flight Center (MSFC) Programmable Ultra Lightweight System Adaptable Radio (PULSAR) leverages existing MSFC SDR designs and commercial sector enhanced capabilities to provide a path to a radiation tolerant SDR transponder. These innovations (1) reduce the cost of NASA Low Earth Orbit (LEO) and Deep Space standard transponders, (2) decrease power requirements, and (3) commensurately reduce volume. A second pay-off is the increased SDR flexibility by allowing the same hardware to implement multiple transponder types simply by altering hardware logic - no change of hardware is required - all of which will ultimately be accomplished in orbit. Development of SDR technology for space applications will provide a highly capable, low cost transponder to programs of all sizes. The MSFC PULSAR Project results in a Technology Readiness Level (TRL) 7 low-cost telemetry system available to Smallsat and CubeSat missions, as well as other platforms. This paper documents the continued development and verification/validation of the MSFC SDR, called PULSAR, which contributes to advancing the state-of-the-art in transponder design - directly applicable to the SmallSat and CubeSat communities. This paper focuses on lessons learned on the first sub-orbital flight (high altitude balloon) and the follow-on steps taken to validate PULSAR. A sounding rocket launch, currently planned for 03/2015, will further expose PULSAR to the high dynamics of sub-orbital flights. Future opportunities for orbiting satellite incorporation reside in the small satellite missions (FASTSat, CubeSat. etc.).

Development of a Comb Limiter Combiner with Sub band Known Interference Cancellation

DTIC Science & Technology

2017-10-17

Juarez, Head 55190 Networks Division ACRONYMS ABSF absorptive bandstop filters ATP applied thin films BAW bulk acoustic waves BPF bandpass filter ...BSF bandstop filters CW continuous wave CWSP Commercial Wideband Satellite Program DAC digital to analog converter DAC digital to analog converter...8 3.2 FREQUENCY AGILE ABSORPTIVE NOTCH FILTERS ................................................. 9 3.3 INTEGRATION OF

High-Speed Large-Alphabet Quantum Key Distribution Using Photonic Integrated Circuits

DTIC Science & Technology

2014-01-28

polarizing beam splitter, TDC: time-to-digital converter. Extra&loss& photon/bin frame size QSER secure bpp ECC secure&key&rate& none& 0.0031 64 14...to-digital converter. photon/frame frame size QSER secure bpp ECC secure&key& rate& 1.3 16 9.5 % 2.9 layered LDPC 7.3&Mbps& Figure 24: Operating

Instantly Converting Atrial Fibrillation into Sinus Rhythm by a Digital Rectal Exam on a 29-year-Old Male

PubMed Central

Ruan, Cheng-Huai

2010-01-01

Vagal maneuvers cause increase in vagal tone, which has been shown to slow many types supraventricular tachycardia, such as atrial fibrillation (AF). However, the conversion of AF to sinus rhythm is usually not associated with vagal manuvers. Thus, AF is classically treated with medication and electrical cardioversion. Here, we present a 29-year-old male with no cardiovascular history and a low atherosclerotic risk profile who developed AF which converted into sinus rhythm immediately after a digital rectal exam. The patient remained asymptomatic after a 3-month follow-up. This implies that the digital rectal exam can be considered as an additional attempt to convert AF to sinus rhythm in AF patients. PMID:21769254

Compensation of PVT Variations in ToF Imagers with In-Pixel TDC

PubMed Central

Vornicu, Ion; Carmona-Galán, Ricardo; Rodríguez-Vázquez, Ángel

2017-01-01

The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must contemplate system-level aspects that affect its overall performance. This paper provides a detailed analysis of the impact of process parameters, voltage supply, and temperature (PVT) variations on the time bin of the TDC array. Moreover, the design and characterization of a global compensation loop is presented. It is based on a phase locked loop (PLL) that is integrated on-chip. The main building block of the PLL is a voltage-controlled ring-oscillator (VCRO) that is identical to the ones employed for the in-pixel TDCs. The reference voltage that drives the master VCRO is distributed to the voltage control inputs of the slave VCROs such that their multiphase outputs become invariant to PVT changes. These outputs act as time interpolators for the TDCs. Therefore the compensation scheme prevents the time bin of the TDCs from drifting over time due to the aforementioned factors. Moreover, the same scheme is used to program different time resolutions of the direct time-of-flight (ToF) imager aimed at 3D ranging or depth map imaging. Experimental results that validate the analysis are provided as well. The compensation loop proves to be remarkably effective. The spreading of the TDCs time bin is lowered from: (i) 20% down to 2.4% while the temperature ranges from 0 °C to 100 °C; (ii) 27% down to 0.27%, when the voltage supply changes within ±10% of the nominal value; (iii) 5.2 ps to 2 ps standard deviation over 30 sample chips, due to process parameters’ variation. PMID:28486405

Compensation of PVT Variations in ToF Imagers with In-Pixel TDC.

PubMed

Vornicu, Ion; Carmona-Galán, Ricardo; Rodríguez-Vázquez, Ángel

2017-05-09

The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must contemplate system-level aspects that affect its overall performance. This paper provides a detailed analysis of the impact of process parameters, voltage supply, and temperature (PVT) variations on the time bin of the TDC array. Moreover, the design and characterization of a global compensation loop is presented. It is based on a phase locked loop (PLL) that is integrated on-chip. The main building block of the PLL is a voltage-controlled ring-oscillator (VCRO) that is identical to the ones employed for the in-pixel TDCs. The reference voltage that drives the master VCRO is distributed to the voltage control inputs of the slave VCROs such that their multiphase outputs become invariant to PVT changes. These outputs act as time interpolators for the TDCs. Therefore the compensation scheme prevents the time bin of the TDCs from drifting over time due to the aforementioned factors. Moreover, the same scheme is used to program different time resolutions of the direct time-of-flight (ToF) imager aimed at 3D ranging or depth map imaging. Experimental results that validate the analysis are provided as well. The compensation loop proves to be remarkably effective. The spreading of the TDCs time bin is lowered from: (i) 20% down to 2.4% while the temperature ranges from 0 °C to 100 °C; (ii) 27% down to 0.27%, when the voltage supply changes within ±10% of the nominal value; (iii) 5.2 ps to 2 ps standard deviation over 30 sample chips, due to process parameters' variation.

Kickdown control for a motor vehicle automatic transmission with two stage kickdown

DOE Office of Scientific and Technical Information (OSTI.GOV)

Higashi, H.; Waki, K.; Fukuiri, M.

This patent describes a vehicle automatic transmission. This transmission consists of a hydraulic torque converter, a transmission gear mechanism connected with the torque converter and has at least three gear stages of different gear ratios for foward drive, friction for selecting one of the gear stages. A kick down control which consists of a first shift down circuit for controlling the friction so that the transmission gear mechanism is shifted down from a high gear stage to a lower gear stage. A kick down solenoid is provided in the first shift down circuit for controlling the first shift down circuitmore » and a kick down switch is adapted to be actuated by an engine control member. When the engine control member is moved substantially to a full power position to thereby control the kick down solenoid effects a shift down from a high gear stage to a lower gear stage.« less

Common-path digital holographic microscopy based on a beam displacer unit

NASA Astrophysics Data System (ADS)

Di, Jianglei; Zhang, Jiwei; Song, Yu; Wang, Kaiqiang; Wei, Kun; Zhao, Jianlin

2018-02-01

Digital holographic microscopy (DHM) has become a novel tool with advantages of full field, non-destructive, high-resolution and 3D imaging, which captures the quantitative amplitude and phase information of microscopic specimens. It's a well-established method for digital recording and numerical reconstructing the full complex field of wavefront of the samples with a diffraction-limited lateral resolution down to 0.3 μm depending on the numerical aperture of microscope objective. Meanwhile, its axial resolution through axial direction is less than 10 nm due to the interferometric nature in phase imaging. Compared with the typical optical configurations such as Mach-Zehnder interferometer and Michelson interferometer, the common-path DHM has the advantages of simple and compact configuration, high stability, and so on. Here, a simple, compact, and low-cost common-path DHM based on a beam displacer unit is proposed for quantitative phase imaging of biological cells. The beam displacer unit is completely compatible with commercial microscope and can be easily set up in the output port of the microscope as a compact independent device. This technique can be used to achieve the quantitative phase measurement of biological cells with an excellent temporal stability of 0.51 nm, which makes it having a good prospect in the fields of biological and medical science. Living mouse osteoblastic cells are quantitatively measured with the system to demonstrate its capability and applicability.

Toward a reduced-wire readout system for ultrasound imaging.

PubMed

Lim, Jaemyung; Arkan, Evren F; Degertekin, F Levent; Ghovanloo, Maysam

2014-01-01

We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply.

Toward a Reduced-Wire Readout System for Ultrasound Imaging

PubMed Central

Lim, Jaemyung; Arkan, Evren F.; Degertekin, F. Levent; Ghovanloo, Maysam

2015-01-01

We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply. PMID:25571135

NASA Pioneer: Venus reverse playback telemetry program TR 78-2

NASA Technical Reports Server (NTRS)

Modestino, J. W.; Daut, D. G.; Vickers, A. L.; Matis, K. R.

1978-01-01

During the entry of the Pioneer Venus Atmospheric Probes into the Venus atmosphere, there were several events (RF blackout and data rate changes) which caused the ground receiving equipment to lose lock on the signal. This caused periods of data loss immediately following each one of these disturbing events which lasted until all the ground receiving units (receiver, subcarrier demodulator, symbol synchronizer, and sequential decoder) acquired lock once more. A scheme to recover these data by off-line data processing was implemented. This scheme consisted of receiving the S band signals from the probes with an open loop reciever (requiring no lock up on the signal) in parallel with the closed loop receivers of the real time receiving equipment, down converting the signals to baseband, and recording them on an analog recorder. The off-line processing consisted of playing the analog recording in the reverse direction (starting with the end of the tape) up, converting the signal to S-band, feeding the signal into the "real time" receiving system and recording on digital tape, the soft decisions from the symbol synchronizer.

The characterization and application of a low resource FPGA-based time to digital converter

NASA Astrophysics Data System (ADS)

Balla, Alessandro; Mario Beretta, Matteo; Ciambrone, Paolo; Gatta, Maurizio; Gonnella, Francesco; Iafolla, Lorenzo; Mascolo, Matteo; Messi, Roberto; Moricciani, Dario; Riondino, Domenico

2014-03-01

Time to Digital Converters (TDCs) are very common devices in particles physics experiments. A lot of "off-the-shelf" TDCs can be employed but the necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the architectures developed so far are based on the tapped delay lines with precision down to 10 ps, obtained with high FPGA resources usage and non-linearity issues to be managed. Often such precision is not necessary; in this case TDC architectures with low resources occupancy are preferable allowing the implementation of data processing systems and of other utilities on the same device. In order to reconstruct γγ physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a 32 channel TDC with a precision of 255 ps and low non-linearity effects along with an embedded data acquisition system and the interface to the online FARM of KLOE-2. The TDC is based on a low resources occupancy technique: the 4×Oversampling technique which, in this work, is pushed to its best resolution and its performances were exhaustively measured.

Spectral Narrowing of a Varactor-Integrated Resonant-Tunneling-Diode Terahertz Oscillator by Phase-Locked Loop

NASA Astrophysics Data System (ADS)

Ogino, Kota; Suzuki, Safumi; Asada, Masahiro

2017-12-01

Spectral narrowing of a resonant-tunneling-diode (RTD) terahertz oscillator, which is useful for various applications of terahertz frequency range, such as an accurate gas spectroscopy, a frequency reference in various communication systems, etc., was achieved with a phase-locked loop system. The oscillator is composed of an RTD, a slot antenna, and a varactor diode for electrical frequency tuning. The output of the RTD oscillating at 610 GHz was down-converted to 400 MHz by a heterodyne detection. The phase noise was transformed to amplitude noise by a balanced mixer and fed back into the varactor diode. The loop filter for a stable operation is discussed. The spectral linewidth of 18.6 MHz in free-running operation was reduced to less than 1 Hz by the feedback.

Device for modular input high-speed multi-channel digitizing of electrical data

DOEpatents

VanDeusen, Alan L.; Crist, Charles E.

1995-09-26

A multi-channel high-speed digitizer module converts a plurality of analog signals to digital signals (digitizing) and stores the signals in a memory device. The analog input channels are digitized simultaneously at high speed with a relatively large number of on-board memory data points per channel. The module provides an automated calibration based upon a single voltage reference source. Low signal noise at such a high density and sample rate is accomplished by ensuring the A/D converters are clocked at the same point in the noise cycle each time so that synchronous noise sampling occurs. This sampling process, in conjunction with an automated calibration, yields signal noise levels well below the noise level present on the analog reference voltages.

Precision electronic speed controller for an alternating-current

DOEpatents

Bolie, Victor W.

1988-01-01

A high precision controller for an alternating-current multi-phase electrical motor that is subject to a large inertial load. The controller was developed for and is particularly suitable for controlling, in a neutron chopper system, a heavy spinning rotor that must be rotated in phase-locked synchronism with a reference pulse train that is representative of an ac power supply signal having a meandering line frequency. The controller includes a shaft revolution sensor which provides a feedback pulse train representative of the actual speed of the motor. An internal digital timing signal generator provides a reference signal which is compared with the feedback signal in a computing unit to provide a motor control signal. In the preferred embodiment, the motor control signal is a weighted linear sum of a speed error voltage, a phase error voltage, and a drift error voltage, each of which is computed anew with each revolution of the motor shaft. The stator windings of the motor are driven by two amplifiers which are provided with input signals having the proper quadrature relationship by an exciter unit consisting of a voltage controlled oscillator, a binary counter, a pair of readonly memories, and a pair of digital-to-analog converters.

Weather satellite picture receiving stations, APT digital scan converter

NASA Technical Reports Server (NTRS)

Vermillion, C. H.; Kamowski, J. C.

1975-01-01

The automatic picture transmission digital scan converter is used at ground stations to convert signals received from scanning radiometers to data compatible with ground equipment designed to receive signals from vidicons aboard operational meteorological satellites. Information necessary to understand the circuit theory, functional operation, general construction and calibration of the converter is provided. Brief and detailed descriptions of each of the individual circuits are included, accompanied by a schematic diagram contained at the end of each circuit description. Listings of integral parts and testing equipment required as well as an overall wiring diagram are included. This unit will enable the user to readily accept and process weather photographs from the operational meteorological satellites.

CMOS based capacitance to digital converter circuit for MEMS sensor

NASA Astrophysics Data System (ADS)

Rotake, D. R.; Darji, A. D.

2018-02-01

Most of the MEMS cantilever based system required costly instruments for characterization, processing and also has large experimental setups which led to non-portable device. So there is a need of low cost, highly sensitive, high speed and portable digital system. The proposed Capacitance to Digital Converter (CDC) interfacing circuit converts capacitance to digital domain which can be easily processed. Recent demand microcantilever deflection is part per trillion ranges which change the capacitance in 1-10 femto farad (fF) range. The entire CDC circuit is designed using CMOS 250nm technology. Design of CDC circuit consists of a D-latch and two oscillators, namely Sensor controlled oscillator (SCO) and digitally controlled oscillator (DCO). The D-latch is designed using transmission gate based MUX for power optimization. A CDC design of 7-stage, 9-stage and 11-stage tested for 1-18 fF and simulated using mentor graphics Eldo tool with parasitic. Since the proposed design does not use resistance component, the total power dissipation is reduced to 2.3621 mW for CDC designed using 9-stage SCO and DCO.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

21 CFR 892.2030 - Medical image digitizer.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Medical image digitizer. 892.2030 Section 892.2030...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2030 Medical image digitizer. (a) Identification. A medical image digitizer is a device intended to convert an analog medical image into a digital...

21 CFR 892.2030 - Medical image digitizer.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Medical image digitizer. 892.2030 Section 892.2030...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2030 Medical image digitizer. (a) Identification. A medical image digitizer is a device intended to convert an analog medical image into a digital...

21 CFR 892.2030 - Medical image digitizer.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Medical image digitizer. 892.2030 Section 892.2030...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2030 Medical image digitizer. (a) Identification. A medical image digitizer is a device intended to convert an analog medical image into a digital...

21 CFR 892.2030 - Medical image digitizer.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Medical image digitizer. 892.2030 Section 892.2030...) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.2030 Medical image digitizer. (a) Identification. A medical image digitizer is a device intended to convert an analog medical image into a digital...

Phase diagram of quantum critical system via local convertibility of ground state

PubMed Central

Liu, Si-Yuan; Quan, Quan; Chen, Jin-Jun; Zhang, Yu-Ran; Yang, Wen-Li; Fan, Heng

2016-01-01

We investigate the relationship between two kinds of ground-state local convertibility and quantum phase transitions in XY model. The local operations and classical communications (LOCC) convertibility is examined by the majorization relations and the entanglement-assisted local operations and classical communications (ELOCC) via Rényi entropy interception. In the phase diagram of XY model, LOCC convertibility and ELOCC convertibility of ground-states are presented and compared. It is shown that different phases in the phase diagram of XY model can have different LOCC or ELOCC convertibility, which can be used to detect the quantum phase transition. This study will enlighten extensive studies of quantum phase transitions from the perspective of local convertibility, e.g., finite-temperature phase transitions and other quantum many-body models. PMID:27381284

Design of an Intelligent Front-End Signal Conditioning Circuit for IR Sensors

NASA Astrophysics Data System (ADS)

de Arcas, G.; Ruiz, M.; Lopez, J. M.; Gutierrez, R.; Villamayor, V.; Gomez, L.; Montojo, Mª. T.

2008-02-01

This paper presents the design of an intelligent front-end signal conditioning system for IR sensors. The system has been developed as an interface between a PbSe IR sensor matrix and a TMS320C67x digital signal processor. The system architecture ensures its scalability so it can be used for sensors with different matrix sizes. It includes an integrator based signal conditioning circuit, a data acquisition converter block, and a FPGA based advanced control block that permits including high level image preprocessing routines such as faulty pixel detection and sensor calibration in the signal conditioning front-end. During the design phase virtual instrumentation technologies proved to be a very valuable tool for prototyping when choosing the best A/D converter type for the application. Development time was significantly reduced due to the use of this technology.

Harmonics analysis of the photonic time stretch system.

PubMed

Mei, Yuan; Xu, Boyu; Chi, Hao; Jin, Tao; Zheng, Shilie; Jin, Xiaofeng; Zhang, Xianmin

2016-09-10

Photonic time stretch (PTS) has been intensively investigated in recent decades due to its potential application to ultra-wideband analog-to-digital conversion. A high-speed analog signal can be captured by an electronic analog-to-digital converter (ADC) with the help of the PTS technique, which slows down the speed of signal in the photonic domain. Unfortunately, the process of the time stretch is not linear due to the nonlinear modulation of the electro-optic intensity modulator in the PTS system, which means the undesired harmonics distortion. In this paper, we present an exact analytical model to fully characterize the harmonics generation in the PTS systems for the first time, to the best of our knowledge. We obtain concise and closed-form expressions for all harmonics of the PTS system with either a single-arm Mach-Zehnder modulator (MZM) or a push-pull MZM. The presented model can largely simplify the PTS system design and the system parameters estimation, such as system bandwidth, harmonics power, time-bandwidth product, and dynamic range. The correctness of the mathematic model is verified by the numerical and experimental results.

Digital to synchro converter

NASA Technical Reports Server (NTRS)

Predina, Joseph P. (Inventor)

1989-01-01

A digital-to-synchro converter is provided where a binary input code specifies a desired shaft angle and where an resolver type position transducer is employed with additional circuitry to generate a shaft position error signal indicative of the angular difference between the desired shaft angle and the actual shaft angle. The additional circuitry corrects for known and calculated errors in the shaft position detection process and equipment.

Guided-Wave Optic Devices for Integrated Optic Information Processing.

DTIC Science & Technology

1984-08-08

Modulation and switching of light waves in Yttrium iron garnet (YIG)- Gadolinium gallium garnet (GGG) waveguides using Farady rotation , and light...switch, an electrooptic analog-to-digital converter using a Fabry -Perot modula- tor array, and a noncollinear magnetooptic modulator using magnetostatic...data routing in electronic computer networks. ELECTROOPTIC ANALOG-TO-DIGITAL CONVERTER USING CHANNEL WAVEGUIDE FABRY -PEROT MODULATOR ARRAY One of the

Frequently Asked Questions about Digital Mammography

MedlinePlus

... in digital cameras, which convert x-rays into electrical signals. The electrical signals are used to produce images of the ... DBT? Digital breast tomosynthesis is a relatively new technology. In DBT, the X-ray tube moves in ...

Optical domain analog to digital conversion methods and apparatus

DOEpatents

Vawter, Gregory A

2014-05-13

Methods and apparatus for optical analog to digital conversion are disclosed. An optical signal is converted by mapping the optical analog signal onto a wavelength modulated optical beam, passing the mapped beam through interferometers to generate analog bit representation signals, and converting the analog bit representation signals into an optical digital signal. A photodiode receives an optical analog signal, a wavelength modulated laser coupled to the photodiode maps the optical analog signal to a wavelength modulated optical beam, interferometers produce an analog bit representation signal from the mapped wavelength modulated optical beam, and sample and threshold circuits corresponding to the interferometers produce a digital bit signal from the analog bit representation signal.

Digital Libraries and the Problem of Purpose [and] On DigiPaper and the Dissemination of Electronic Documents [and] DFAS: The Distributed Finding Aid Search System [and] Best Practices for Digital Archiving: An Information Life Cycle Approach [and] Mapping and Converting Essential Federal Geographic Data Committee (FGDC) Metadata into MARC21 and Dublin Core: Towards an Alternative to the FGDC Clearinghouse [and] Evaluating Website Modifications at the National Library of Medicine through Search Log analysis.

ERIC Educational Resources Information Center

Levy, David M.; Huttenlocher, Dan; Moll, Angela; Smith, MacKenzie; Hodge, Gail M.; Chandler, Adam; Foley, Dan; Hafez, Alaaeldin M.; Redalen, Aaron; Miller, Naomi

2000-01-01

Includes six articles focusing on the purpose of digital public libraries; encoding electronic documents through compression techniques; a distributed finding aid server; digital archiving practices in the framework of information life cycle management; converting metadata into MARC format and Dublin Core formats; and evaluating Web sites through…

Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage Regulators

NASA Technical Reports Server (NTRS)

Adell, Philippe; Allen, Gregory

2013-01-01

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Bidirectional converter for high-efficiency fuel cell powertrain

NASA Astrophysics Data System (ADS)

Fardoun, Abbas A.; Ismail, Esam H.; Sabzali, Ahmad J.; Al-Saffar, Mustafa A.

2014-03-01

In this paper, a new wide conversion ratio step-up and step-down converter is presented. The proposed converter is derived from the conventional Single Ended Primary Inductor Converter (SEPIC) topology and it is integrated with a capacitor-diode voltage multiplier, which offers a simple structure, reduced electromagnetic interference (EMI), and reduced semiconductors' voltage stresses. Other advantages include: continuous input and output current, extended step-up and step-down voltage conversion ratio without extreme low or high duty-cycle, simple control circuitry, and near-zero input and output ripple currents compared to other converter topologies. The low charging/discharging current ripple and wide gain features result in a longer life-span and lower cost of the energy storage battery system. In addition, the "near-zero" ripple capability improves the fuel cell durability. Theoretical analysis results obtained with the proposed structure are compared with other bi-direction converter topologies. Simulation and experimental results are presented to verify the performance of the proposed bi-directional converter.

Device for modular input high-speed multi-channel digitizing of electrical data

DOEpatents

VanDeusen, A.L.; Crist, C.E.

1995-09-26

A multi-channel high-speed digitizer module converts a plurality of analog signals to digital signals (digitizing) and stores the signals in a memory device. The analog input channels are digitized simultaneously at high speed with a relatively large number of on-board memory data points per channel. The module provides an automated calibration based upon a single voltage reference source. Low signal noise at such a high density and sample rate is accomplished by ensuring the A/D converters are clocked at the same point in the noise cycle each time so that synchronous noise sampling occurs. This sampling process, in conjunction with an automated calibration, yields signal noise levels well below the noise level present on the analog reference voltages. 1 fig.

Digital Control Technologies for Modular DC-DC Converters

NASA Technical Reports Server (NTRS)

Button, Robert M.; Kascak, Peter E.; Lebron-Velilla, Ramon

2002-01-01

Recent trends in aerospace Power Management and Distribution (PMAD) systems focus on using commercial off-the-shelf (COTS) components as standard building blocks. This move to more modular designs has been driven by a desire to reduce costs and development times, but is also due to the impressive power density and efficiency numbers achieved by today's commercial DC-DC converters. However, the PMAD designer quickly learns of the hidden "costs" of using COTS converters. The most significant cost is the required addition of external input filters to meet strict electromagnetic interference (MIAMI) requirements for space systems. In fact, the high power density numbers achieved by the commercial manufacturers are greatly due to the lack of necessary input filters included in the COTS module. The NASA Glenn Research Center is currently pursuing a digital control technology that addresses this problem with modular DC-DC converters. This paper presents the digital control technologies that have been developed to greatly reduce the input filter requirements for paralleled, modular DC-DC converters. Initial test result show that the input filter's inductor size was reduced by 75 percent, and the capacitor size was reduced by 94 percent while maintaining the same power quality specifications.

Three-dimensional motion-picture imaging of dynamic object by parallel-phase-shifting digital holographic microscopy using an inverted magnification optical system

NASA Astrophysics Data System (ADS)

Fukuda, Takahito; Shinomura, Masato; Xia, Peng; Awatsuji, Yasuhiro; Nishio, Kenzo; Matoba, Osamu

2017-04-01

We constructed a parallel-phase-shifting digital holographic microscopy (PPSDHM) system using an inverted magnification optical system, and succeeded in three-dimensional (3D) motion-picture imaging for 3D displacement of a microscopic object. In the PPSDHM system, the inverted and afocal magnification optical system consisted of a microscope objective (16.56 mm focal length and 0.25 numerical aperture) and a convex lens (300 mm focal length and 82 mm aperture diameter). A polarization-imaging camera was used to record multiple phase-shifted holograms with a single-shot exposure. We recorded an alum crystal, sinking down in aqueous solution of alum, by the constructed PPSDHM system at 60 frames/s for about 20 s and reconstructed high-quality 3D motion-picture image of the crystal. Then, we calculated amounts of displacement of the crystal from the amounts in the focus plane and the magnifications of the magnification optical system, and obtained the 3D trajectory of the crystal by that amounts.

Research of digital controlled DC/DC converter based on STC12C5410AD

NASA Astrophysics Data System (ADS)

Chen, Dan-Jiang; Jin, Xin; Xiao, Zhi-Hong

2010-02-01

In order to study application of digital control technology on DC/DC converter, principle of increment mode PID control algorithm was analyzed in the paper. Then, a SCM named STC12C5410AD was introduced with its internal resources and characteristics. The PID control algorithm can be implemented easily based on it. The output of PID control was used to change the value of a variable that is 255 times than duty cycle, and this reduced the error of calculation. The valid of the presented algorithm was verified by an experiment for a BUCK DC/DC converter. The experimental results indicated that output voltage of the BUCK converter is stable with low ripple.

Experimental prototype of an electric elevator

NASA Astrophysics Data System (ADS)

Gaiceanu, M.; Epure, S.; Ciuta, S.

2016-08-01

The main objective is to achieve an elevator prototype powered by a three-phase voltage system via a bidirectional static power converter ac-ac with regenerating capability. In order to diminish the power size of the electric motor up to 1/3 of rated power, the elevator contains two carriages of the same weight, one serving as the payload, and the other as counterweight. Before proper operation of the static power converter, the capacitor must be charged at rated voltage via a precharge circuit. At the moment of stabilizing the DC voltage at nominal value, the AC-AC power converter can operates in the proper limits. The functions of the control structure are: the load control task, speed and torque controls. System includes transducers for current measuring, voltage sensors and encoder. As reserve power sources the hybrid battery-photovoltaic panels are used. The control voltage is modulated by implementing four types of pulse width modulations: sinusoidal, with reduced commutation, third order harmonic insertion, and the space vector modulation. Therefore, the prototype could operates with an increased efficiency, in spite of the existing ones. The experimental results confirm the well design of the chosen solution. The control solution assures bidirectional power flow control, precharge control, and load control and it is implemented on a digital signal processor. The elevator capacity is between 300-450 kg, and it is driven by using a 1.5 kW three-phase asynchronous machine.

SEM analysis of ionizing radiation effects in an analog to digital converter /AD571/

NASA Technical Reports Server (NTRS)

Gauthier, M. K.; Perret, J.; Evans, K. C.

1981-01-01

The considered investigation is concerned with the study of the total-dose degradation mechanisms in an IIL analog to digital (A/D) converter. The A/D converter is a 10 digit device having nine separate functional units on the chip which encompass several hundred transistors and circuit elements. It was the objective of the described research to find the radiation sensitive elements by a systematic search of the devices on the LSI chip. The employed technique using a scanning electron microscope to determine the functional blocks of an integrated circuit which are sensitive to ionizing radiation and then progressively zeroing in on the soft components within those blocks, proved extremely successful on the AD571. Four functional blocks were found to be sensitive to radiation, including the Voltage Reference, DAC, IIL Clock, and IIL SAR.

Development of ATC for High Speed and High Density Commuter Line

NASA Astrophysics Data System (ADS)

Okutani, Tamio; Nakamura, Nobuyuki; Araki, Hisato; Irie, Shouji; Osa, Hiroki; Sano, Minoru; Ikeda, Keigo; Ozawa, Hiroyuki

A new ATC (Automatic Train Control) system has been developed with solutions to realize short train headway by assured braking utilizing digital data transmission via rails; the digital data for the ATP (Automatic Train Protection) function; and to achieve EMC features for both AC and DC sections. The DC section is of the unprecedented DC traction power supply system utilizing IGBT PWM converter at all DC substations. Within the AC section, train traction force is controlled by PWM converter/inverters. The carrier frequencies of the digital data signals and chopping frequency of PWM traction power converters on-board are decided via spectral analysis of noise up to degraded mode cases of equipment. Developed system was equipped to the Tukuba Express Line, new commuter line of Tokyo metropolitan area, and opened since Aug. 2005.

Road Tripping down the Digital Preservation Highway, Part I: Hitting the Road

ERIC Educational Resources Information Center

Colati, Jessica Branco; Colati, Gregory C.

2011-01-01

In this inaugural column, the authors introduce Peter Palmer, erstwhile librarian at Bellaluna University who is being tasked with managing the library's and university's digital content as he begins his journey down the Digital Highway. As head of access services at Bellaluna University, Peter had been, by default, made responsible for managing…

Observation of energy transfer phenomenon via up and down conversion in Eu3+ ions for BaMoO4:Er3+-Eu3+ nanophosphor

NASA Astrophysics Data System (ADS)

Soni, Abhishek Kumar; Ningthoujam, Raghumani Singh

2018-04-01

The Er3+-Eu3+ codoped BaMoO4 nanophosphor has been synthesized by using urea hydrolysis in ethylene glycol medium. The tetragonal phase formation of the codoped nanophosphor has been confirmed by the X-ray diffraction analysis. The up and down conversion emission spectra have been recorded via 980 and 270 nm excitation, respectively. The Eu3+ emission arising in the prepared Er3+-Eu3+ codoped BaMoO4 nanophosphor is basically due to the efficient energy transfer process. The energy level diagram has been sketched to show the energy transfer phenomenon in the Eu3+ ion from charge transfer band (host lattice absorption) and excited level of the Er3+ ion (multiphoton absorption). The values of colour co-ordinates suggest that materials can produce the red to yellow. The developed nanophosphor could be useful as an effective up and down converting optical material and lighting device applications.

New technologies for radiation-hardening analog to digital converters

NASA Technical Reports Server (NTRS)

Gauthier, M. K.

1982-01-01

Surveys of available Analog to Digital Converters (ADC) suitable for precision applications showed that none have the proper combination of accuracy and radiation hardness to meet space and/or strategic weapon requirements. A development program which will result in an ADC device which will serve a number of space and strategic applications. Emphasis was placed on approaches that could be integrated onto a single chip within three to five years.

All-optical analog-to-digital converter based on Kerr effect in photonic crystal

NASA Astrophysics Data System (ADS)

Jafari, Dariush; Nurmohammadi, Tofiq; Asadi, Mohammad Javad; Abbasian, Karim

2018-05-01

In this paper, a novel all-optical analog-to-digital converter (AOADC) is proposed and simulated for proof of principle. This AOADC is designed to operate in the range of telecom wavelength (1550 nm). A cavity made of nonlinear Kerr material in photonic crystal (PhC), is designed to achieve an optical analog-to-digital conversion with 1 Tera sample per second (TS/s) and the total footprint of 42 μm2 . The simulation is done using finite-difference time domain (FDTD) method.

Secure communications system

NASA Technical Reports Server (NTRS)

Doland, G. D.

1977-01-01

System employs electronically randomized variant of quadraphase modulation and demodulation between two synchronized transceivers. System uses off-the-shelf components. It may be used with digital data, command signals, delta-modulated voice signals, digital television signals, or other data converted to digital form.

Present and Future Applications of Digital Electronics in Nuclear Science - a Commercial Prospective

NASA Astrophysics Data System (ADS)

Tan, Hui

2011-10-01

Digital readout electronics instrumenting radiation detectors have experienced significant advancements in the last decade or so. This on one hand can be attributed to the steady improvements in commercial digital processing components such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field-programmable-gate-arrays (FPGAs), and digital-signal-processors (DSPs), and on the other hand can also be attributed to the increasing needs for improved time, position, and energy resolution in nuclear physics experiments, which have spurred the rapid development of commercial off-the-shelf high speed, high resolution digitizers or spectrometers. Absent from conventional analog electronics, the capability to record fast decaying pulses from radiation detectors in digital readout electronics has profoundly benefited nuclear physics researchers since they now can perform detailed pulse processing for applications such as gamma-ray tracking and decay-event selection and reconstruction. In this talk, present state-of-the-art digital readout electronics and its applications in a variety of nuclear science fields will be discussed, and future directions in hardware development for digital electronics will also be outlined, all from the prospective of a commercial manufacturer of digital electronics.

KM3NeT Digital Optical Module electronics

NASA Astrophysics Data System (ADS)

Real, Diego

2016-04-01

The KM3NeT collaboration is currently building of a neutrino telescope with a volume of several cubic kilometres at the bottom of the Mediterranean Sea. The telescope consists of a matrix of Digital Optical Modules that will detect the Cherenkov light originated by the interaction of the neutrinos in the proximity of the detector. This contribution describes the main components of the read-out electronics of the Digital Optical Module: the Power Board, which delivers all the power supply required by the Digital Optical Molule electronics; the Central Logic Board, the main core of the read-out system, hosting 31 Time to Digital Converters with 1 ns resolution and the White Rabbit protocol embedded in the Central Logic Board Field Programmable Gate Array; the Octopus boards, that transfer the Low Voltage Digital Signals from the PMT bases to the Central Logic Board and finally the PMT bases, in charge of converting the analogue signal produced in the 31 3" PMTs into a Low Voltage Digital Signal.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips.

PubMed

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-05-18

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of -0.7/0.6 °C from -30 °C to 70 °C after 1-point calibration at 30 °C.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips

PubMed Central

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-01-01

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of −0.7/0.6 °C from −30 °C to 70 °C after 1-point calibration at 30 °C. PMID:25993518

INSPECTION MEANS FOR INDUCTION MOTORS

DOEpatents

Williams, A.W.

1959-03-10

an appartus is descripbe for inspcting electric motors and more expecially an appartus for detecting falty end rings inn suqirrel cage inductio motors while the motor is running. In its broua aspects, the mer would around ce of reference tedtor means also itons in the phase ition of the An electronic circuit for conversion of excess-3 binary coded serial decimal numbers to straight binary coded serial decimal numbers is reported. The converter of the invention in its basic form generally coded pulse words of a type having an algebraic sign digit followed serially by a plurality of decimal digits in order of decreasing significance preceding a y algebraic sign digit followed serially by a plurality of decimal digits in order of decreasing significance. A switching martix is coupled to said input circuit and is internally connected to produce serial straight binary coded pulse groups indicative of the excess-3 coded input. A stepping circuit is coupled to the switching matrix and to a synchronous counter having a plurality of x decimal digit and plurality of y decimal digit indicator terminals. The stepping circuit steps the counter in synchornism with the serial binary pulse group output from the switching matrix to successively produce pulses at corresponding ones of the x and y decimal digit indicator terminals. The combinations of straight binary coded pulse groups and corresponding decimal digit indicator signals so produced comprise a basic output suitable for application to a variety of output apparatus.

Experience in the installation of a microprocessor system for controlling converter units of the Vyborg substation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gusakovskii, K. B.; Zmaznov, E. Yu.; Katantsev, S. V.

The experience in the installation of modern digital systems for controlling converter units at the Vyborg converter substation on the basis of advanced microprocessor devices is considered. It is shown that debugging of a control and protection system on mathematical and physical models does not guarantee optimum control of actual converter devices. Examples of advancing the control and protection system are described, the necessity for which has become obvious in tests of actual equipment. Comparison of oscillograms of processes before optimization of the control system and after its optimization and adjustment shows that the digital control system makes it possiblemore » to improve substantially the algorithms of control and protection in the short term and without changing the hardware component.« less

Radiation-hard analog-to-digital converters for space and strategic applications

NASA Technical Reports Server (NTRS)

Gauthier, M. K.; Dantas, A. R. V.

1985-01-01

During the course of the Jet Propulsion Laboratory's program to study radiation-hardened analog-to-digital converters (ADCs), numerous milestones have been reached in manufacturers' awareness and technology development and transfer, as well as in user awareness of these developments. The testing of ADCs has also continued with twenty different ADCs from seven manufacturers, all tested for total radiation dose and three tested for neutron effects. Results from these tests are reported.

Another Nulling Hall-Effect Current-Measuring Circuit

NASA Technical Reports Server (NTRS)

Thibodeau, Phillip E.; Sullender, Craig C.

1993-01-01

Lightweight, low-power circuit provides noncontact measurement of alternating or direct current of many ampheres in main conductor. Advantages of circuit over other nulling Hall-effect current-measuring circuits is stability and accuracy increased by putting both analog-to-digital and digital-to-analog converters in nulling feedback loop. Converters and rest of circuit designed for operation at sampling rate of 100 kHz, but rate changed to alter time or frequency response of circuit.

Active Microelectronic Neurosensor Arrays for Implantable Brain Communication Interfaces

PubMed Central

Song, Y.-K.; Borton, D. A.; Park, S.; Patterson, W. R.; Bull, C. W.; Laiwalla, F.; Mislow, J.; Simeral, J. D.; Donoghue, J. P.; Nurmikko, A. V.

2010-01-01

We have built a wireless implantable microelectronic device for transmitting cortical signals transcutaneously. The device is aimed at interfacing a microelectrode array cortical to an external computer for neural control applications. Our implantable microsystem enables presently 16-channel broadband neural recording in a non-human primate brain by converting these signals to a digital stream of infrared light pulses for transmission through the skin. The implantable unit employs a flexible polymer substrate onto which we have integrated ultra-low power amplification with analog multiplexing, an analog-to-digital converter, a low power digital controller chip, and infrared telemetry. The scalable 16-channel microsystem can employ any of several modalities of power supply, including via radio frequency by induction, or infrared light via a photovoltaic converter. As of today, the implant has been tested as a sub-chronic unit in non-human primates (~ 1 month), yielding robust spike and broadband neural data on all available channels. PMID:19502132

Design of a 12-GHz multicarrier earth-terminal for satellite-CATV interconnection

NASA Technical Reports Server (NTRS)

Newman, B. A.; Singh, J. P.; Rosenbaum, F. J.

1971-01-01

The design and development of the front-end for a multi-carrier system that allows multiplex signal transmission from satellite-borne transponders is described. Detailed systems analyses provided down-converter specifications. The 12 GHz carrier down-converter uses waveguide, coaxial, and microstrip transmission line elements in its implementation. Mixing is accomplished in a single-ended coaxial mixer employing a field-replacable cartridge style diode.

Precision electronic speed controller for an alternating-current motor

DOEpatents

Bolie, V.W.

A high precision controller for an alternating-current multi-phase electrical motor that is subject to a large inertial load. The controller was developed for controlling, in a neutron chopper system, a heavy spinning rotor that must be rotated in phase-locked synchronism with a reference pulse train that is representative of an ac power supply signal having a meandering line frequency. The controller includes a shaft revolution sensor which provides a feedback pulse train representative of the actual speed of the motor. An internal digital timing signal generator provides a reference signal which is compared with the feedback signal in a computing unit to provide a motor control signal. The motor control signal is a weighted linear sum of a speed error voltage, a phase error voltage, and a drift error voltage, each of which is computed anew with each revolution of the motor shaft. The speed error signal is generated by a novel vernier-logic circuit which is drift-free and highly sensitive to small speed changes. The phase error is also computed by digital logic, with adjustable sensitivity around a 0 mid-scale value. The drift error signal, generated by long-term counting of the phase error, is used to compensate for any slow changes in the average friction drag on the motor. An auxillary drift-byte status sensor prevents any disruptive overflow or underflow of the drift-error counter. An adjustable clocked-delay unit is inserted between the controller and the source of the reference pulse train to permit phase alignment of the rotor to any desired offset angle. The stator windings of the motor are driven by two amplifiers which are provided with input signals having the proper quadrature relationship by an exciter unit consisting of a voltage controlled oscillator, a binary counter, a pair of read-only memories, and a pair of digital-to-analog converters.

Goldstone R/D High Speed Data Acquisition System

NASA Technical Reports Server (NTRS)

Deutsch, L. J.; Jurgens, R. F.; Brokl, S. S.

1984-01-01

A digital data acquisition system that meets the requirements of several users (initially the planetary radar program) is planned for general use at Deep Space Station 14 (DSS 14). The system, now partially complete, is controlled by VAX 11/780 computer that is programmed in high level languages. A DEC Data Controller is included for moderate-speed data acquisition, low speed data display, and for a digital interface to special user-provided devices. The high-speed data acquisition is performed in devices that are being designed and built at JPL. Analog IF signals are converted to a digitized 50 MHz real signal. This signal is filtered and mixed digitally to baseband after which its phase code (a PN sequence in the case of planetary radar) is removed. It may then be accumulated (or averaged) and fed into the VAX through an FPS 5210 array processor. Further data processing before entering the VAX is thus possible (computation and accumulation of the power spectra, for example). The system is to be located in the research and development pedestal at DSS 14 for easy access by researchers in radio astronomy as well as telemetry processing and antenna arraying.

A new on-chip all-digital three-phase full-bridge dc/ac power inverter with feedforward and frequency control techniques.

PubMed

Chen, Jiann-Jong; Kung, Che-Min

2010-09-01

The communication speed between components is far from satisfactory. To achieve high speed, simple control system configuration, and low cost, a new on-chip all-digital three-phase dc/ac power inverter using feedforward and frequency control techniques is proposed. The controller of the proposed power inverter, called the shift register, consists of six-stage D-latch flip-flops with a goal of achieving low-power consumption and area efficiency. Variable frequency is achieved by controlling the clocks of the shift register. One advantage regarding the data signal (D) and the common clock (CK) is that, regardless of the phase difference between the two, all of the D-latch flip-flops are capable of delaying data by one CK period. To ensure stability, the frequency of CK must be six times higher than that of D. The operation frequency of the proposed power inverter ranges from 10 Hz to 2 MHz, and the maximum output loading current is 0.8 A. The prototype of the proposed circuit has been fabricated with TSMC 0.35 μm 2P4M CMOS processes. The total chip area is 2.333 x 1.698 mm2. The three-phase dc/ac power inverter is applicable in uninterrupted power supplies, cold cathode fluorescent lamps, and motors, because of its ability to convert the dc supply voltage into the three-phase ac power sources.

A new digital pulse power supply in heavy ion research facility in Lanzhou

NASA Astrophysics Data System (ADS)

Wang, Rongkun; Chen, Youxin; Huang, Yuzhen; Gao, Daqing; Zhou, Zhongzu; Yan, Huaihai; Zhao, Jiang; Shi, Chunfeng; Wu, Fengjun; Yan, Hongbin; Xia, Jiawen; Yuan, Youjin

2013-11-01

To meet the increasing requirements of the Heavy Ion Research Facility in Lanzhou-Cooler Storage Ring (HIRFL-CSR), a new digital pulse power supply, which employs multi-level converter, was designed. This power supply was applied with a multi H-bridge converters series-parallel connection topology. A new control model named digital power supply regulator system (DPSRS) was proposed, and a pulse power supply prototype based on DPSRS has been built and tested. The experimental results indicate that tracking error and ripple current meet the requirements of this design. The achievement of prototype provides a perfect model for HIRFL-CSR power supply system.

Implementation of high-resolution time-to-digital converter in 8-bit microcontrollers.

PubMed

Bengtsson, Lars E

2012-04-01

This paper will demonstrate how a time-to-digital converter (TDC) with sub-nanosecond resolution can be implemented into an 8-bit microcontroller using so called "direct" methods. This means that a TDC is created using only five bidirectional digital input-output-pins of a microcontroller and a few passive components (two resistors, a capacitor, and a diode). We will demonstrate how a TDC for the range 1-10 μs is implemented with 0.17 ns resolution. This work will also show how to linearize the output by combining look-up tables and interpolation. © 2012 American Institute of Physics

Comparative hybrid and digital simulation studies of the behaviour of a wind generator equipped with a static frequency converter

NASA Astrophysics Data System (ADS)

Dube, B.; Lefebvre, S.; Perocheau, A.; Nakra, H. L.

1988-01-01

This paper describes the comparative results obtained from digital and hybrid simulation studies on a variable speed wind generator interconnected to the utility grid. The wind generator is a vertical-axis Darrieus type coupled to a synchronous machine by a gear-box; the synchronous machine is connected to the AC utility grid through a static frequency converter. Digital simulation results have been obtained using CSMP software; these results are compared with those obtained from a real-time hybrid simulator that in turn uses a part of the IREQ HVDC simulator. The agreement between hybrid and digital simulation results is generally good. The results demonstrate that the digital simulation reproduces the dynamic behavior of the system in a satisfactory manner and thus constitutes a valid tool for the design of the control systems of the wind generator.

Parallax Player: a stereoscopic format converter

NASA Astrophysics Data System (ADS)

Feldman, Mark H.; Lipton, Lenny

2003-05-01

The Parallax Player is a software application that is, in essence, a stereoscopic format converter. Various formats may be inputted and outputted. In addition to being able to take any one of a wide variety of different formats and play them back on many different kinds of PCs and display screens. The Parallax Player has built into it the capability to produce ersatz stereo from a planar still or movie image. The player handles two basic forms of digital content - still images, and movies. It is assumed that all data is digital, either created by means of a photographic film process and later digitized, or directly captured or authored in a digital form. In its current implementation, running on a number of Windows Operating Systems, The Parallax Player reads in a broad selection of contemporary file formats.

Note: All-digital CMOS MOS-capacitor-based pulse-shrinking mechanism suitable for time-to-digital converters

NASA Astrophysics Data System (ADS)

Chen, Chun-Chi; Hwang, Chorng-Sii; Lin, You-Ting; Liu, Keng-Chih

2015-12-01

This paper presents an all-digital CMOS pulse-shrinking mechanism suitable for time-to-digital converters (TDCs). A simple MOS capacitor is used as a pulse-shrinking cell to perform time attenuation for time resolving. Compared with a previous pulse-shrinking mechanism, the proposed mechanism provides an appreciably improved temporal resolution with high linearity. Furthermore, the use of a binary-weighted pulse-shrinking unit with scaled MOS capacitors is proposed for achieving a programmable resolution. A TDC involving the proposed mechanism was fabricated using a TSMC (Taiwan Semiconductor Manufacturing Company) 0.18-μm CMOS process, and it has a small area of nearly 0.02 mm2 and an integral nonlinearity error of ±0.8 LSB for a resolution of 24 ps.

Digital Ratiometer

NASA Technical Reports Server (NTRS)

Beer, R.

1985-01-01

Small, low-cost comparator with 24-bit-precision yields ratio signal from pair of analog or digital input signals. Arithmetic logic chips (bit-slice) sample two 24-bit analog-to-digital converters approximately once every millisecond and accumulate them in two 24-bit registers. Approach readily modified to arbitrary precision.

Streak camera imaging of single photons at telecom wavelength

NASA Astrophysics Data System (ADS)

Allgaier, Markus; Ansari, Vahid; Eigner, Christof; Quiring, Viktor; Ricken, Raimund; Donohue, John Matthew; Czerniuk, Thomas; Aßmann, Marc; Bayer, Manfred; Brecht, Benjamin; Silberhorn, Christine

2018-01-01

Streak cameras are powerful tools for temporal characterization of ultrafast light pulses, even at the single-photon level. However, the low signal-to-noise ratio in the infrared range prevents measurements on weak light sources in the telecom regime. We present an approach to circumvent this problem, utilizing an up-conversion process in periodically poled waveguides in Lithium Niobate. We convert single photons from a parametric down-conversion source in order to reach the point of maximum detection efficiency of commercially available streak cameras. We explore phase-matching configurations to apply the up-conversion scheme in real-world applications.

Two-path plasmonic interferometer with integrated detector

DOEpatents

Dyer, Gregory Conrad; Shaner, Eric A.; Aizin, Gregory

2016-03-29

An electrically tunable terahertz two-path plasmonic interferometer with an integrated detection element can down convert a terahertz field to a rectified DC signal. The integrated detector utilizes a resonant plasmonic homodyne mixing mechanism that measures the component of the plasma waves in-phase with an excitation field that functions as the local oscillator in the mixer. The plasmonic interferometer comprises two independently tuned electrical paths. The plasmonic interferometer enables a spectrometer-on-a-chip where the tuning of electrical path length plays an analogous role to that of physical path length in macroscopic Fourier transform interferometers.

Calibration Software for Use with Jurassicprok

NASA Technical Reports Server (NTRS)

Chapin, Elaine; Hensley, Scott; Siqueira, Paul

2004-01-01

The Jurassicprok Interferometric Calibration Software (also called "Calibration Processor" or simply "CP") estimates the calibration parameters of an airborne synthetic-aperture-radar (SAR) system, the raw measurement data of which are processed by the Jurassicprok software described in the preceding article. Calibration parameters estimated by CP include time delays, baseline offsets, phase screens, and radiometric offsets. CP examines raw radar-pulse data, single-look complex image data, and digital elevation map data. For each type of data, CP compares the actual values with values expected on the basis of ground-truth data. CP then converts the differences between the actual and expected values into updates for the calibration parameters in an interferometric calibration file (ICF) and a radiometric calibration file (RCF) for the particular SAR system. The updated ICF and RCF are used as inputs to both Jurassicprok and to the companion Motion Measurement Processor software (described in the following article) for use in generating calibrated digital elevation maps.

Image resolution in the digital era: notion and clinical implications.

PubMed

Rakhshan, Vahid

2014-12-01

Digital radiographs need additional metadata in order to be accurate when being converted to analog media. Resolution is a major reason of failures in proper printing or digitizing the images. This letter shortly explains the overlooked pitfalls of digital radiography and photography in dental practice, and briefly instructs the reader how to avoid or rectify common problems associated with resolution calibration of digital radiographs.

Development of an algorithm for controlling a multilevel three-phase converter

NASA Astrophysics Data System (ADS)

Taissariyeva, Kyrmyzy; Ilipbaeva, Lyazzat

2017-08-01

This work is devoted to the development of an algorithm for controlling transistors in a three-phase multilevel conversion system. The developed algorithm allows to organize a correct operation and describes the state of transistors at each moment of time when constructing a computer model of a three-phase multilevel converter. The developed algorithm of operation of transistors provides in-phase of a three-phase converter and obtaining a sinusoidal voltage curve at the converter output.

A Close Loop Low-Power and High Speed 130 nm CMOS Sample and Hold Circuit Based on Switched Capacitor for ADC Module

NASA Astrophysics Data System (ADS)

Nasir, Z.; Ruslan, S. H.

2017-08-01

A sample and hold (S/H) block is typically used as an analogue to digital interface in the analogue to digital converter (ADC) system. Since ADC is widely used in processing signals, the power consumption of the ADC must be lowered to conserve energy. Therefore the S/H circuit must be of a low powered too. Sampling phase and hold phase are the two phases of the operation cycle of the S/H circuit. Switched capacitor (SC) techniques have been developed in order to allow the integration on a single silicon chip of both digital and analogue functions. By controlling switches around the SC, the SC circuit works by passing charge into and out of a capacitor. SC circuits are suitable for on chip implementations because they replace a resistor with switches and capacitors. In this research, a closed-loop sample and hold circuit based on SC is designed and simulated with Cadence EDA tools. The schematic, layout, and simulation of the circuit is done using generic Silterra 130 nm technology file. All the analysis is done using Virtuoso Analog Design Environment. Layout and schematic are drawn using Virtuoso Schematic Editor and Virtuoso Layout Editor, Calibre is used for post layout simulation. The closed loop S/H circuit based on SC is successfully designed and able to sample and hold the analogue input waveform. The power consumption of the circuit is 0.919 mW and the propagation delay is 64.96 ps.

Implantable digital hearing aid

NASA Technical Reports Server (NTRS)

Kissiah, A. M., Jr.

1979-01-01

Hearing aid converts analog output of microphone into digital pulses in about 10 channels of audiofrequencies. Each pulse band could be directly connected to portion of auditory nerve most sensitive to that range.

Morphologically and size uniform monodisperse particles and their shape-directed self-assembly

DOE Office of Scientific and Technical Information (OSTI.GOV)

Collins, Joshua E.; Bell, Howard Y.; Ye, Xingchen

2017-09-12

Monodisperse particles having: a single pure crystalline phase of a rare earth-containing lattice, a uniform three-dimensional size, and a uniform polyhedral morphology are disclosed. Due to their uniform size and shape, the monodisperse particles self assemble into superlattices. The particles may be luminescent particles such as down-converting phosphor particles and up-converting phosphors. The monodisperse particles of the invention have a rare earth-containing lattice which in one embodiment may be an yttrium-containing lattice or in another may be a lanthanide-containing lattice. The monodisperse particles may have different optical properties based on their composition, their size, and/or their morphology (or shape). Alsomore » disclosed is a combination of at least two types of monodisperse particles, where each type is a plurality of monodisperse particles having a single pure crystalline phase of a rare earth-containing lattice, a uniform three-dimensional size, and a uniform polyhedral morphology; and where the types of monodisperse particles differ from one another by composition, by size, or by morphology. In a preferred embodiment, the types of monodisperse particles have the same composition but different morphologies. Methods of making and methods of using the monodisperse particles are disclosed.« less

Morphologically and size uniform monodisperse particles and their shape-directed self-assembly

DOEpatents

Collins, Joshua E.; Bell, Howard Y.; Ye, Xingchen; Murray, Christopher Bruce

2015-11-17

Monodisperse particles having: a single pure crystalline phase of a rare earth-containing lattice, a uniform three-dimensional size, and a uniform polyhedral morphology are disclosed. Due to their uniform size and shape, the monodisperse particles self assemble into superlattices. The particles may be luminescent particles such as down-converting phosphor particles and up-converting phosphors. The monodisperse particles of the invention have a rare earth-containing lattice which in one embodiment may be an yttrium-containing lattice or in another may be a lanthanide-containing lattice. The monodisperse particles may have different optical properties based on their composition, their size, and/or their morphology (or shape). Also disclosed is a combination of at least two types of monodisperse particles, where each type is a plurality of monodisperse particles having a single pure crystalline phase of a rare earth-containing lattice, a uniform three-dimensional size, and a uniform polyhedral morphology; and where the types of monodisperse particles differ from one another by composition, by size, or by morphology. In a preferred embodiment, the types of monodisperse particles have the same composition but different morphologies. Methods of making and methods of using the monodisperse particles are disclosed.

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide

PubMed Central

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P. K. A.

2014-01-01

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W−1/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems. PMID:25417847

CMOS-compatible 2-bit optical spectral quantization scheme using a silicon-nanocrystal-based horizontal slot waveguide.

PubMed

Kang, Zhe; Yuan, Jinhui; Zhang, Xianting; Wu, Qiang; Sang, Xinzhu; Farrell, Gerald; Yu, Chongxiu; Li, Feng; Tam, Hwa Yaw; Wai, P K A

2014-11-24

All-optical analog-to-digital converters based on the third-order nonlinear effects in silicon waveguide are a promising candidate to overcome the limitation of electronic devices and are suitable for photonic integration. In this paper, a 2-bit optical spectral quantization scheme for on-chip all-optical analog-to-digital conversion is proposed. The proposed scheme is realized by filtering the broadened and split spectrum induced by the self-phase modulation effect in a silicon horizontal slot waveguide filled with silicon-nanocrystal. Nonlinear coefficient as high as 8708 W(-1)/m is obtained because of the tight mode confinement of the horizontal slot waveguide and the high nonlinear refractive index of the silicon-nanocrystal, which provides the enhanced nonlinear interaction and accordingly low power threshold. The results show that a required input peak power level less than 0.4 W can be achieved, along with the 1.98-bit effective-number-of-bit and Gray code output. The proposed scheme can find important applications in on-chip all-optical digital signal processing systems.

Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

NASA Astrophysics Data System (ADS)

Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

2015-06-01

We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

An Optimal Current Observer for Predictive Current Controlled Buck DC-DC Converters

PubMed Central

Min, Run; Chen, Chen; Zhang, Xiaodong; Zou, Xuecheng; Tong, Qiaoling; Zhang, Qiao

2014-01-01

In digital current mode controlled DC-DC converters, conventional current sensors might not provide isolation at a minimized price, power loss and size. Therefore, a current observer which can be realized based on the digital circuit itself, is a possible substitute. However, the observed current may diverge due to the parasitic resistors and the forward conduction voltage of the diode. Moreover, the divergence of the observed current will cause steady state errors in the output voltage. In this paper, an optimal current observer is proposed. It achieves the highest observation accuracy by compensating for all the known parasitic parameters. By employing the optimal current observer-based predictive current controller, a buck converter is implemented. The converter has a convergently and accurately observed inductor current, and shows preferable transient response than the conventional voltage mode controlled converter. Besides, costs, power loss and size are minimized since the strategy requires no additional hardware for current sensing. The effectiveness of the proposed optimal current observer is demonstrated experimentally. PMID:24854061

Digital timing: sampling frequency, anti-aliasing filter and signal interpolation filter dependence on timing resolution.

PubMed

Cho, Sanghee; Grazioso, Ron; Zhang, Nan; Aykac, Mehmet; Schmand, Matthias

2011-12-07

The main focus of our study is to investigate how the performance of digital timing methods is affected by sampling rate, anti-aliasing and signal interpolation filters. We used the Nyquist sampling theorem to address some basic questions such as what will be the minimum sampling frequencies? How accurate will the signal interpolation be? How do we validate the timing measurements? The preferred sampling rate would be as low as possible, considering the high cost and power consumption of high-speed analog-to-digital converters. However, when the sampling rate is too low, due to the aliasing effect, some artifacts are produced in the timing resolution estimations; the shape of the timing profile is distorted and the FWHM values of the profile fluctuate as the source location changes. Anti-aliasing filters are required in this case to avoid the artifacts, but the timing is degraded as a result. When the sampling rate is marginally over the Nyquist rate, a proper signal interpolation is important. A sharp roll-off (higher order) filter is required to separate the baseband signal from its replicates to avoid the aliasing, but in return the computation will be higher. We demonstrated the analysis through a digital timing study using fast LSO scintillation crystals as used in time-of-flight PET scanners. From the study, we observed that there is no significant timing resolution degradation down to 1.3 Ghz sampling frequency, and the computation requirement for the signal interpolation is reasonably low. A so-called sliding test is proposed as a validation tool checking constant timing resolution behavior of a given timing pick-off method regardless of the source location change. Lastly, the performance comparison for several digital timing methods is also shown.

Development of wide band digital receiver for atmospheric radars using COTS board based SDR

NASA Astrophysics Data System (ADS)

Yasodha, Polisetti; Jayaraman, Achuthan; Thriveni, A.

2016-07-01

Digital receiver extracts the received echo signal information, and is a potential subsystem for atmospheric radar, also referred to as wind profiling radar (WPR), which provides the vertical profiles of 3-dimensional wind vector in the atmosphere. This paper presents the development of digital receiver using COTS board based Software Defined Radio technique, which can be used for atmospheric radars. The developmental work is being carried out at National Atmospheric Research Laboratory (NARL), Gadanki. The digital receiver consists of a commercially available software defined radio (SDR) board called as universal software radio peripheral B210 (USRP B210) and a personal computer. USRP B210 operates over a wider frequency range from 70 MHz to 6 GHz and hence can be used for variety of radars like Doppler weather radars operating in S/C bands, in addition to wind profiling radars operating in VHF, UHF and L bands. Due to the flexibility and re-configurability of SDR, where the component functionalities are implemented in software, it is easy to modify the software to receive the echoes and process them as per the requirement suitable for the type of the radar intended. Hence, USRP B210 board along with the computer forms a versatile digital receiver from 70 MHz to 6 GHz. It has an inbuilt direct conversion transceiver with two transmit and two receive channels, which can be operated in fully coherent 2x2 MIMO fashion and thus it can be used as a two channel receiver. Multiple USRP B210 boards can be synchronized using the pulse per second (PPS) input provided on the board, to configure multi-channel digital receiver system. RF gain of the transceiver can be varied from 0 to 70 dB. The board can be controlled from the computer via USB 3.0 interface through USRP hardware driver (UHD), which is an open source cross platform driver. The USRP B210 board is connected to the personal computer through USB 3.0. Reference (10 MHz) clock signal from the radar master oscillator is used to lock the board, which is essential for deriving Doppler information. Input from the radar analog receiver is given to one channel of USRP B210, which is down converted to baseband. 12-bit ADC present on the board digitizes the signal and produces I (in-phase) and Q (quadrature-phase) data. The maximum sampling rate possible is about 61 MSPS. The I and Q (time series) data is sent to PC via USB 3.0, where the signal processing is carried out. The online processing steps include decimation, range gating, decoding, coherent integration and FFT computation (optional). The processed data is then stored in the hard disk. C++ programming language is used for developing the real time signal processing. Shared memory along with multi threading is used to collect and process data simultaneously. Before implementing the real time operation, stand alone test of the board was carried out through GNU radio software and the base band output data obtained is found satisfactory. Later the board is integrated with the existing Lower Atmospheric Wind Profiling radar at NARL. The radar receive IF output at 70 MHz is given to the board and the real-time radar data is collected. The data is processed off-line and the range-doppler spectrum is obtained. Online processing software is under progress.

Coherent detection and digital signal processing for fiber optic communications

NASA Astrophysics Data System (ADS)

Ip, Ezra

The drive towards higher spectral efficiency in optical fiber systems has generated renewed interest in coherent detection. We review different detection methods, including noncoherent, differentially coherent, and coherent detection, as well as hybrid detection methods. We compare the modulation methods that are enabled and their respective performances in a linear regime. An important system parameter is the number of degrees of freedom (DOF) utilized in transmission. Polarization-multiplexed quadrature-amplitude modulation maximizes spectral efficiency and power efficiency as it uses all four available DOF contained in the two field quadratures in the two polarizations. Dual-polarization homodyne or heterodyne downconversion are linear processes that can fully recover the received signal field in these four DOF. When downconverted signals are sampled at the Nyquist rate, compensation of transmission impairments can be performed using digital signal processing (DSP). Software based receivers benefit from the robustness of DSP, flexibility in design, and ease of adaptation to time-varying channels. Linear impairments, including chromatic dispersion (CD) and polarization-mode dispersion (PMD), can be compensated quasi-exactly using finite impulse response filters. In practical systems, sampling the received signal at 3/2 times the symbol rate is sufficient to enable an arbitrary amount of CD and PMD to be compensated for a sufficiently long equalizer whose tap length scales linearly with transmission distance. Depending on the transmitted constellation and the target bit error rate, the analog-to-digital converter (ADC) should have around 5 to 6 bits of resolution. Digital coherent receivers are naturally suited for the implementation of feedforward carrier recovery, which has superior linewidth tolerance than phase-locked loops, and does not suffer from feedback delay constraints. Differential bit encoding can be used to prevent catastrophic receiver failure due to cycle slips. In systems where nonlinear effects are concentrated mostly at fiber locations with small accumulated dispersion, nonlinear phase de-rotation is a low-complexity algorithm that can partially mitigate nonlinear effects. For systems with arbitrary dispersion maps, however, backpropagation is the only universal technique that can jointly compensate dispersion and fiber nonlinearity. Backpropagation requires solving the nonlinear Schrodinger equation at the receiver, and has high computational cost. Backpropagation is most effective when dispersion compensation fibers are removed, and when signal processing is performed at three times oversampling. Backpropagation can improve system performance and increase transmission distance. With anticipated advances in analog-to-digital converters and integrated circuit technology, DSP-based coherent receivers at bit rates up to 100 Gb/s should become practical in the near future.

Trueness and precision of digital impressions obtained using an intraoral scanner with different head size in the partially edentulous mandible.

PubMed

Hayama, Hironari; Fueki, Kenji; Wadachi, Juro; Wakabayashi, Noriyuki

2018-03-01

It remains unclear whether digital impressions obtained using an intraoral scanner are sufficiently accurate for use in fabrication of removable partial dentures. We therefore compared the trueness and precision between conventional and digital impressions in the partially edentulous mandible. Mandibular Kennedy Class I and III models with soft silicone simulated-mucosa placed on the residual edentulous ridge were used. The reference models were converted to standard triangulated language (STL) file format using an extraoral scanner. Digital impressions were obtained using an intraoral scanner with a large or small scanning head, and converted to STL files. For conventional impressions, pressure impressions of the reference models were made and working casts fabricated using modified dental stone; these were converted to STL file format using an extraoral scanner. Conversion to STL file format was performed 5 times for each method. Trueness and precision were evaluated by deviation analysis using three-dimensional image processing software. Digital impressions had superior trueness (54-108μm), but inferior precision (100-121μm) compared to conventional impressions (trueness 122-157μm, precision 52-119μm). The larger intraoral scanning head showed better trueness and precision than the smaller head, and on average required fewer scanned images of digital impressions than the smaller head (p<0.05). On the color map, the deviation distribution tended to differ between the conventional and digital impressions. Digital impressions are partially comparable to conventional impressions in terms of accuracy; the use of a larger scanning head may improve the accuracy for removable partial denture fabrication. Copyright © 2018 Japan Prosthodontic Society. Published by Elsevier Ltd. All rights reserved.

An ultra low-power front-end IC for wearable health monitoring system.

PubMed

Yu-Pin Hsu; Zemin Liu; Hella, Mona M

2016-08-01

This paper presents a low-power front-end IC for wearable health monitoring systems. The IC, designed in a standard 0.13μm CMOS technology, fully integrates a low-noise analog front-end (AFE) to process the weak bio-signals, followed by an analog-to-digital converter (ADC) to digitize the extracted signals. An AC-coupled driving buffer, that interfaces between the AFE and the ADC is introduced to scale down the power supply of the ADC. The power consumption decreases by 50% compared to the case without power supply scaling. The AFE passes signals from 0.5Hz to 280Hz and from 0.7Hz to 160Hz with a simulated input referred noise of 1.6μVrms and achieves a maximum gain of 35dB/41dB respectively, with a noise-efficiency factor (NEF) of the AFE is 1. The 8-bit ADC achieves a simulated 7.96-bit resolution at 10KS/s sampling rate under 0.5V supply voltage. The overall system consumes only 0.86μW at dual supply voltages of 1V (AFE) and 0.5 V (ADC).

Shuttle bit rate synchronizer. [signal to noise ratios and error analysis

NASA Technical Reports Server (NTRS)

Huey, D. C.; Fultz, G. L.

1974-01-01

A shuttle bit rate synchronizer brassboard unit was designed, fabricated, and tested, which meets or exceeds the contractual specifications. The bit rate synchronizer operates at signal-to-noise ratios (in a bit rate bandwidth) down to -5 dB while exhibiting less than 0.6 dB bit error rate degradation. The mean acquisition time was measured to be less than 2 seconds. The synchronizer is designed around a digital data transition tracking loop whose phase and data detectors are integrate-and-dump filters matched to the Manchester encoded bits specified. It meets the reliability (no adjustments or tweaking) and versatility (multiple bit rates) of the shuttle S-band communication system through an implementation which is all digital after the initial stage of analog AGC and A/D conversion.

Design Challenges in Converting a Paper Checklist to Digital Format for Dynamic Medical Settings

PubMed Central

Sarcevic, Aleksandra; Rosen, Brett J.; Kulp, Leah J.; Marsic, Ivan; Burd, Randall S.

2016-01-01

We describe a mobile digital checklist that we designed and developed for trauma resuscitation—a dynamic, fast-paced medical process of treating severely injured patients. The checklist design was informed by our analysis of user interactions with a paper checklist that was introduced to improve team performance during resuscitations. The design process followed an iterative approach and involved several medical experts. We discuss design challenges in converting a paper checklist to its digital counterpart, as well as our approaches for addressing those challenges. While we show that using a digital checklist during a fast-paced medical event is feasible, we also recognize several design constraints, including limited display size, difficulties in entering notes about the medical process and patient, and difficulties in replicating user experience with paper checklists. PMID:28480116

High performance photonic ADC for space applications

NASA Astrophysics Data System (ADS)

Pantoja, S.; Piqueras, M. A.; Villalba, P.; Martínez, B.; Rico, E.

2017-11-01

The flexibility required for future telecom payloads will require of more digital processing capabilities, moving from conventional analogue repeaters to more advanced and efficient analog subsystems or DSPbased solutions. Aggregate data throughputs will have to be handled onboard, creating the need for effective, ADC/DSP and DSP/DAC high speed links. Broadband payloads will have to receive, route and retransmit hundreds of channels and need to be designed so as to meet such requirements of larger bandwidth, system transparency and flexibility.[1][2] One important device in these new architectures is analog to digital converter (ADC) and its equivalent digital to analog converter (DAC). These will be the in/out interface for the use of digital processing in order to provide flexible beam to beam connectivity and variable bandwidth allocation. For telecom payloads having a large number of feeds and thus a large number of converters the mass and consumption of the mixer stage has become significant. Moreover, the inclusion of ADCs in the payload presents new trade-offs in design (jitter, quantization noise, ambiguity). This paper deals with an alternative solution of these two main problems with the exploitation of photonic techniques.

SWARM: A 32 GHz Correlator and VLBI Beamformer for the Submillimeter Array

NASA Astrophysics Data System (ADS)

Primiani, Rurik A.; Young, Kenneth H.; Young, André; Patel, Nimesh; Wilson, Robert W.; Vertatschitsch, Laura; Chitwood, Billie B.; Srinivasan, Ranjani; MacMahon, David; Weintroub, Jonathan

2016-03-01

A 32GHz bandwidth VLBI capable correlator and phased array has been designed and deployeda at the Smithsonian Astrophysical Observatory’s Submillimeter Array (SMA). The SMA Wideband Astronomical ROACH2 Machine (SWARM) integrates two instruments: a correlator with 140kHz spectral resolution across its full 32GHz band, used for connected interferometric observations, and a phased array summer used when the SMA participates as a station in the Event Horizon Telescope (EHT) very long baseline interferometry (VLBI) array. For each SWARM quadrant, Reconfigurable Open Architecture Computing Hardware (ROACH2) units shared under open-source from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) are equipped with a pair of ultra-fast analog-to-digital converters (ADCs), a field programmable gate array (FPGA) processor, and eight 10 Gigabit Ethernet (GbE) ports. A VLBI data recorder interface designated the SWARM digital back end, or SDBE, is implemented with a ninth ROACH2 per quadrant, feeding four Mark6 VLBI recorders with an aggregate recording rate of 64 Gbps. This paper describes the design and implementation of SWARM, as well as its deployment at SMA with reference to verification and science data.

Computer-assisted analysis of the vascular endothelial cell motile response to injury.

PubMed

Askey, D B; Herman, I M

1988-12-01

We have developed an automated, user-friendly method to track vascular endothelial cell migration in vitro using an IBM PC/XT with MS DOS. Analog phase-contrast images of the bovine aortic endothelial cells are converted into digital images (8 bit, 250 x 240 pixel resolution) using a Tecmar Video VanGogh A/D board. Digitized images are stored at selected time points following mechanical injury in vitro. FORTRAN and assembly language subroutines have been implemented to automatically detect the wound edge and the edge of each cell nucleus in the phase-contrast, light-microscope field. Detection of the wound edge is accomplished by intensity thresholding following noise reduction in the image and subsequent sampling of the wound. After the range of wound intensities is determined, the entire image is sampled and a histogram of intensities is formed. The histogram peak corresponding to the wound intensities is subtracted, leaving a histogram peak that gives the range of intensities corresponding to the cell nuclei. Rates of cell migration, as well as cellular trajectories and cell surface areas, can be automatically quantitated and analyzed. This inexpensive, automated cell-tracking system should be widely applicable in a variety of cell biologic applications.

A miniature high-efficiency fully digital adaptive voltage scaling buck converter

NASA Astrophysics Data System (ADS)

Li, Hangbiao; Zhang, Bo; Luo, Ping; Zhen, Shaowei; Liao, Pengfei; He, Yajuan; Li, Zhaoji

2015-09-01

A miniature high-efficiency fully digital adaptive voltage scaling (AVS) buck converter is proposed in this paper. The pulse skip modulation with flexible duty cycle (FD-PSM) is used in the AVS controller, which simplifies the circuit architecture (<170 gates) and greatly saves the die area and the power consumption. The converter is implemented in a 0.13-μm one-poly-eight-metal (1P8 M) complementary metal oxide semiconductor process and the active on-chip area of the controller is only 0.003 mm2, which is much smaller. The measurement results show that when the operating frequency of the digital load scales dynamically from 25.6 MHz to 112.6 MHz, the supply voltage of which can be scaled adaptively from 0.84 V to 1.95 V. The controller dissipates only 17.2 μW, while the supply voltage of the load is 1 V and the operating frequency is 40 MHz.

Power Management and Distribution System Developed for Thermionic Power Converters

NASA Technical Reports Server (NTRS)

Baez, Anastacio N.

1998-01-01

A spacecraft solar, bimodal system combines propulsion and power generation into a single integrated system. An Integrated Solar Upper Stage (ISUS) provides orbital transfer capabilities, power generation for payloads, and onboard propulsion to the spacecraft. A key benefit of a bimodal system is a greater payload-to-spacecraft mass ratio resulting in lower launch vehicle requirements. Scaling down to smaller launch vehicles increases space access by reducing overall mission cost. NASA has joined efforts with the Air Force Phillips Laboratory to develop enabling technologies for such a system. The NASA/Air Force bimodal concept uses solar concentrators to focus energy into an integrated power plant. This power plant consists of a graphite core that stores thermal energy within a cavity. An array of thermionic converters encircles the graphite cavity and provides electrical energy conversion functions. During the power generation phase of the bimodal system, the thermionic converters are exposed to the heated cavity and convert the thermal energy to electricity. Near-term efforts of the ISUS bimodal program are focused on a ground demonstration of key technologies in order to proceed to a full space flight test. Thermionic power generation is one key technology of the bimodal concept. Thermionic power converters impose unique operating requirements upon a power management and distribution (PMAD) system design. Single thermionic converters supply large currents at very low voltages. Operating voltages can vary over a range of up to 3 to 1 as a function of operating temperature. Most spacecraft loads require regulated 28-volts direct-current (Vdc) power. A combination of series-connected converters and powerprocessing boosters is required to deliver power to the spacecraft's payloads at this level.

Analog phase lock between two lasers at LISA power levels

NASA Astrophysics Data System (ADS)

Diekmann, Christian; Steier, Frank; Sheard, Benjamin; Heinzel, Gerhard; Danzmann, Karsten

2009-03-01

This paper presents the implementation of an analog optical phase-locked-loop with an offset frequency of about 20MHz between two lasers, where the detected light powers were of the order of 31 pW and 200 μW. The goal of this setup was the design and characterization of a photodiode transimpedance amplifier for application in LISA. By application of a transimpedance amplifier designed to have low noise and low power consumption, the phase noise between the two lasers was a factor of two above the shot noise limit down to 60mHz. The achievable phase sensitivity depends ultimately on the available power of the highly attenuated master laser and on the input current noise of the transimpedance amplifier of the photodetector. The limiting noise source below 60mHz was the analog phase measurement system that was used in this experiment. A digital phase measurement system that is currently under development at the AEI will be used in the near future. Its application should improve the sensitivity.

Microcomputer data acquisition and control.

PubMed

East, T D

1986-01-01

In medicine and biology there are many tasks that involve routine well defined procedures. These tasks are ideal candidates for computerized data acquisition and control. As the performance of microcomputers rapidly increases and cost continues to go down the temptation to automate the laboratory becomes great. To the novice computer user the choices of hardware and software are overwhelming and sadly most of the computer sales persons are not at all familiar with real-time applications. If you want to bill your patients you have hundreds of packaged systems to choose from; however, if you want to do real-time data acquisition the choices are very limited and confusing. The purpose of this chapter is to provide the novice computer user with the basics needed to set up a real-time data acquisition system with the common microcomputers. This chapter will cover the following issues necessary to establish a real time data acquisition and control system: Analysis of the research problem: Definition of the problem; Description of data and sampling requirements; Cost/benefit analysis. Choice of Microcomputer hardware and software: Choice of microprocessor and bus structure; Choice of operating system; Choice of layered software. Digital Data Acquisition: Parallel Data Transmission; Serial Data Transmission; Hardware and software available. Analog Data Acquisition: Description of amplitude and frequency characteristics of the input signals; Sampling theorem; Specification of the analog to digital converter; Hardware and software available; Interface to the microcomputer. Microcomputer Control: Analog output; Digital output; Closed-Loop Control. Microcomputer data acquisition and control in the 21st Century--What is in the future? High speed digital medical equipment networks; Medical decision making and artificial intelligence.

A power scalable PLL frequency synthesizer for high-speed Δ—Σ ADC

NASA Astrophysics Data System (ADS)

Siyang, Han; Baoyong, Chi; Xinwang, Zhang; Zhihua, Wang

2014-08-01

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for Δ—Σ analog-to-digital converter (ADC) in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode (300-360 MHz) or in low-power mode (35-130 MHz) to satisfy the ADC's requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the frequency synthesizer achieves a phase-noise of -132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of -112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.

40 CFR 52.1675 - Control strategy and regulations: Sulfur oxides.

Code of Federal Regulations, 2010 CFR

2010-07-01

...-down; One boiler converted; South Campus—Boiler Plant: Converted; North Campus Science and Physical Education Building: October 1, 1980. (b) Harlem Hospital, 135th St. and Lenox Ave., Manhattan: April 1, 1981...

Quantifying the Efficiency of a Translator: The Effect of Syntactical and Literal Written Translations on Language Comprehension Using the Machine Translation System FALCon (Foreign Area Language Converter)

ERIC Educational Resources Information Center

McCulloh, Ian A.; Morton, Jillian; Jantzi, Jennifer K.; Rodriguez, Amy M.; Graham, John

2008-01-01

The purpose of this study is to introduce a new method of evaluating human comprehension in the context of machine translation using a language translation program known as the FALCon (Forward Area Language Converter). The FALCon works by converting documents into digital images via scanner, and then converting those images to electronic text by…

Solar Energy Enhancement Using Down-converting Particles: A Rigorous Approach

DTIC Science & Technology

2011-06-06

Solar energy enhancement using down-converting particles: A rigorous approach Ze’ev R. Abrams,1,2 Avi Niv ,2 and Xiang Zhang2,3,a) 1Applied Science...System 1. 114905-2 Abrams, Niv , and Zhang J. Appl. Phys. 109, 114905 (2011) [This article is copyrighted as indicated in the article. Reuse of AIP...This increase per band-gap is displayed in 114905-3 Abrams, Niv , and Zhang J. Appl. Phys. 109, 114905 (2011) [This article is copyrighted as indicated

Active-Pixel Image Sensor With Analog-To-Digital Converters

NASA Technical Reports Server (NTRS)

Fossum, Eric R.; Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.

1995-01-01

Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

A 10 bit 200 MS/s pipeline ADC using loading-balanced architecture in 0.18 μm CMOS

NASA Astrophysics Data System (ADS)

Wang, Linfeng; Meng, Qiao; Zhi, Hao; Li, Fei

2017-07-01

A new loading-balanced architecture for high speed and low power consumption pipeline analog-to-digital converter (ADC) is presented in this paper. The proposed ADC uses SHA-less, op-amp and capacitor-sharing technique, capacitor-scaling scheme to reduce the die area and power consumption. A new capacitor-sharing scheme was proposed to cancel the extra reset phase of the feedback capacitors. The non-standard inter-stage gain increases the feedback factor of the first stage and makes it equal to the second stage, by which, the load capacitor of op-amp shared by the first and second stages is balanced. As for the fourth stage, the capacitor and op-amp no longer scale down. From the system’s point of view, all load capacitors of the shared OTAs are balanced by employing a loading-balanced architecture. The die area and power consumption are optimized maximally. The ADC is implemented in a 0.18 μm 1P6M CMOS technology, and occupies a die area of 1.2 × 1.2 mm{}2. The measurement results show a 55.58 dB signal-to-noise-and-distortion ratio (SNDR) and 62.97 dB spurious-free dynamic range (SFDR) with a 25 MHz input operating at a 200 MS/s sampling rate. The proposed ADC consumes 115 mW at 200 MS/s from a 1.8 V supply.

Serial-to-parallel color-TV converter

NASA Technical Reports Server (NTRS)

Doak, T. W.; Merwin, R. B.; Zuckswert, S. E.; Sepper, W.

1976-01-01

Solid analog-to-digital converter eliminates flicker and problems with time base stability and gain variation in sequential color TV cameras. Device includes 3-bit delta modulator; two-field memory; timing, switching, and sync network; and three 3-bit delta demodulators

Scoping of Flood Hazard Mapping Needs for Merrimack County, New Hampshire

DTIC Science & Technology

2006-01-01

DOQ Digital Orthophoto Quadrangle DOQQ Digital Ortho Quarter Quadrangle DTM Digital Terrain Model FBFM Flood Boundary and Floodway Map FEMA Federal...discussed available data and coverages within New Hampshire (for example, 2003 National Agriculture Imag- ery Program (NAIP) color Digital Orthophoto ... orthophotos providing improved base map accuracy. NH GRANIT is presently converting the standard, paper FIRMs and Flood Boundary and Floodway maps (FBFMs

Digital photogrammetry at the U.S. Geological Survey

USGS Publications Warehouse

Greve, Clifford W.

1995-01-01

The U.S. Geological Survey is converting its primary map production and revision operations to use digital photogrammetric techniques. The primary source of data for these operations is the digital orthophoto quadrangle derived from National Aerial Photography Program images. These digital orthophotos are used on workstations that permit comparison of existing vector and raster data with the orthophoto and interactive collection and revision of the vector data.

Pulse-shape discrimination of the new plastic scintillators in neutron-gamma mixed field using fast digitizer card

NASA Astrophysics Data System (ADS)

Jančář, A.; Kopecký, Z.; Dressler, J.; Veškrna, M.; Matěj, Z.; Granja, C.; Solar, M.

2015-11-01

Recently invented plastic scintillator EJ-299-33 enables pulse-shape discrimination (PSD) and thus measurement of neutron and photon spectra in mixed fields. In this work we compare the PSD properties of EJ-299-33 plastic and the well-known NE-213 liquid scintillator in monoenergetic neutron fields generated by the Van de Graaff accelerator using the 3H(d, n)4He reaction. Pulses from the scintillators are processed by a newly developed digital measuring system employing the fast digitizer card. This card contains two AD converters connected to the measuring computer via 10 Gbps optical ethernet. The converters operate with a resolution of 12 bits and have two differential inputs with a sampling frequency 1 GHz. The resulting digital channels with different gains are merged into one composite channel with a higher digital resolution in a wide dynamic range of energies. Neutron signals are fully discriminated from gamma signals. Results are presented.

Cheaper Synthesis Of Multipole-Brushless-dc-Motor Current

NASA Technical Reports Server (NTRS)

Alhorn, Dean C.; Howard, David E.

1994-01-01

Circuit converts output of single two-phase shaft-angle resolver to that of multi-speed three-phase shaft-angle resolver. Converter circuit applicable to generation of multispeed, multiphase shaft-angle-resolver signals from single two-phase shaft-angle resolver. Combination of converter circuit and single two-phase shaft-angle resolver offer advantages in cost, weight, size, and complexity. Design readily adaptable to two-phase motor.

Ka-Band Transponder for Deep-Space Radio Science

NASA Technical Reports Server (NTRS)

Dennis, Matthew S.; Mysoor, Narayan R.; Folkner, William M.; Mendoza, Ricardo; Venkatesan, Jaikrishna

2008-01-01

A one-page document describes a Ka-band transponder being developed for use in deep-space radio science. The transponder receives in the Deep Space Network (DSN) uplink frequency band of 34.2 to 34.7 GHz, transmits in the 31.8- to 32.3 GHz DSN downlink band, and performs regenerative ranging on a DSN standard 4-MHz ranging tone subcarrier phase-modulated onto the uplink carrier signal. A primary consideration in this development is reduction in size, relative to other such transponders. The transponder design is all-analog, chosen to minimize not only the size but also the number of parts and the design time and, thus, the cost. The receiver features two stages of frequency down-conversion. The receiver locks onto the uplink carrier signal. The exciter signal for the transmitter is derived from the same source as that used to generate the first-stage local-oscillator signal. The ranging-tone subcarrier is down-converted along with the carrier to the second intermediate frequency, where the 4-MHz tone is demodulated from the composite signal and fed into a ranging-tone-tracking loop, which regenerates the tone. The regenerated tone is linearly phase-modulated onto the downlink carrier.

Laser-to-electricity energy converter for short wavelengths

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y. C. M.

1975-01-01

Short-wavelength energy converter can be made using Schottky barrier structure. It has wider band gap than p-n junction silicon semiconductors, and thus it has improved response at wavelengths down to and including ultraviolet region.

Digital image transformation and rectification of spacecraft and radar images

NASA Technical Reports Server (NTRS)

Wu, S. S. C.

1985-01-01

The application of digital processing techniques to spacecraft television pictures and radar images is discussed. The use of digital rectification to produce contour maps from spacecraft pictures is described; images with azimuth and elevation angles are converted into point-perspective frame pictures. The digital correction of the slant angle of radar images to ground scale is examined. The development of orthophoto and stereoscopic shaded relief maps from digital terrain and digital image data is analyzed. Digital image transformations and rectifications are utilized on Viking Orbiter and Lander pictures of Mars.

Real-time digital heterodyne interferometer for high resolution plasma density measurements at ISTTOK.

PubMed

Marques, T G; Gouveia, A; Pereira, T; Fortunato, J; Carvalho, B B; Sousa, J; Silva, C; Fernandes, H

2008-10-01

With the implementation of alternating discharges (ac) at the ISTTOK tokamak, the typical duration of the discharges increased from 35 to 250 ms. This time increase created the need for a real-time electron density measurement in order to control the plasma fueling. The diagnostic chosen for the real-time calculation was the microwave interferometer. The ISTTOK microwave interferometer is a heterodyne system with quadrature detection and a probing frequency of 100 GHz (lambda(0)=3 mm). In this paper, a low-cost approach for real-time diagnostic using a digital signal programmable intelligent computer embedded system is presented, which allows the measurement of the phase with a 1% fringe accuracy in less than 6 micros. The system increases its accuracy by digitally correcting the offsets of the input signals and making use of a judicious lookup table optimized to improve the nonlinear behavior of the transfer curve. The electron density is determined at a rate of 82 kHz (limited by the analog to digital converter), and the data are transmitted for each millisecond although this last parameter could be much lower (around 12 micros--each value calculated is transmitted). In the future, this same system is expected to control plasma actuators, such as the piezoelectric valve of the hydrogen injection system responsible for the plasma fueling.

An investigation of down-conversion luminescence properties of rare earth doped CaMoO4 phosphors for solar cell application

NASA Astrophysics Data System (ADS)

Verma, Akta; Sharma, S. K.

2018-05-01

In the present work, we have synthesized a CaMoO4:(1%)Er3+,(1%)Yb3+ down-converting phosphor by hydrothermal method. The primary goal of studying down-conversion is to enhance the conversion efficiency of Si-solar cell by converting one high energy (UV) photon into two low energy (NIR) photons. The various characterization such as XRD, FESEM and Photoluminescence (PL) were carried out. The X-ray diffraction (XRD) pattern exhibit tetragonal crystal structure and has a space group of I41a (88). The FESEM microphotograph shows surface morphology having a abundance of particles in spherical shape. The PL emission spectra were recorded both in Visible and NIR regions. There is hypertensive emission peak at 555 nm in the visible region due to 4S3/2 → 4I15/2 transition of Er3+ ions and an emission at 980 nm (2F5/2 → 2F7/2) due to Yb3+ ions. The result shows a demand of this down-converting material in the field of solar energy to improve the efficiency of Si-solar-cell.

Extremum seeking-based optimization of high voltage converter modulator rise-time

DOE Office of Scientific and Technical Information (OSTI.GOV)

Scheinker, Alexander; Bland, Michael; Krstic, Miroslav

2013-02-01

We digitally implement an extremum seeking (ES) algorithm, which optimizes the rise time of the output voltage of a high voltage converter modulator (HVCM) at the Los Alamos Neutron Science Center (LANSCE) HVCM test stand by iteratively, simultaneously tuning the first 8 switching edges of each of the three phase drive waveforms (24 variables total). We achieve a 50 μs rise time, which is reduction in half compared to the 100 μs achieved at the Spallation Neutron Source (SNS) at Oak Ridge National Laboratory. Considering that HVCMs typically operate with an output voltage of 100 kV, with a 60Hz repetitionmore » rate, the 50 μs rise time reduction will result in very significant energy savings. The ES algorithm will prove successful, despite the noisy measurements and cost calculations, confirming the theoretical results that the algorithm is not affected by noise whose frequency components are independent of the perturbing frequencies.« less

Characterization of a Track-and-Hold Amplifier for Application to a High Performance SAR

DOE Office of Scientific and Technical Information (OSTI.GOV)

DUBBERT, DALE F.; HARDIN, TERRY LYNN; DELAPLAIN, GILBERT G.

2002-07-01

A Synthetic Aperture Radar (SAR) which employs direct IF sampling can significantly reduce the complexity of the analog electronics prior to the analog-to-digital converter (ADC). For relatively high frequency IF bands, a wide-bandwidth track-and-hold amplifier (THA) is required prior to the ADC. The THA functions primarily as a means of converting, through bandpass sampling, the IF signal to a baseband signal which can be sampled by the ADC. For a wide-band, high dynamic-range receiver system, such as a SAR receiver, stringent performance requirements are placed on the THA. We first measure the THA parameters such as gain, gain compression, third-ordermore » intercept (TOI), signal-to-noise ratio (SNR), spurious-free dynamic-range (SFDR), noise figure (NF), and phase noise. The results are then analyzed in terms of their respective impact on the overall performance of the SAR. The specific THA under consideration is the Rockwell Scientific RTH010.« less

Coding for Single-Line Transmission

NASA Technical Reports Server (NTRS)

Madison, L. G.

1983-01-01

Digital transmission code combines data and clock signals into single waveform. MADCODE needs four standard integrated circuits in generator and converter plus five small discrete components. MADCODE allows simple coding and decoding for transmission of digital signals over single line.

BacNet and Analog/Digital Interfaces of the Building Controls Virtual Testbed

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nouidui, Thierry Stephane; Wetter, Michael; Li, Zhengwei

2011-11-01

This paper gives an overview of recent developments in the Building Controls Virtual Test Bed (BCVTB), a framework for co-simulation and hardware-in-the-loop. First, a general overview of the BCVTB is presented. Second, we describe the BACnet interface, a link which has been implemented to couple BACnet devices to the BCVTB. We present a case study where the interface was used to couple a whole building simulation program to a building control system to assess in real-time the performance of a real building. Third, we present the ADInterfaceMCC, an analog/digital interface that allows a USB-based analog/digital converter to be linked tomore » the BCVTB. In a case study, we show how the link was used to couple the analog/digital converter to a building simulation model for local loop control.« less

Triaxial digital fluxgate magnetometer for NASA applications explorer mission: Results of tests of critical elements

NASA Technical Reports Server (NTRS)

Mcleod, M. G.; Means, J. D.

1977-01-01

Tests performed to prove the critical elements of the triaxial digital fluxgate magnetometer design were described. A method for improving the linearity of the analog to digital converter portion of the instrument was studied in detail. A sawtooth waveform was added to the signal being measured before the A/D conversion, and averaging the digital readings over one cycle of the sawtooth. It was intended to reduce bit error nonlinearities present in the A/D converter which could be expected to be as much as 16 gamma if not reduced. No such nonlinearities were detected in the output of the instrument which included the feature designed to reduce these nonlinearities. However, a small scale nonlinearity of plus or minus 2 gamma with a 64 gamma repetition rate was observed in the unit tested. A design improvement intended to eliminate this small scale nonlinearity was examined.

A 780 × 800 μm2 Multichannel Digital Silicon Photomultiplier With Column-Parallel Time-to-Digital Converter and Basic Characterization

NASA Astrophysics Data System (ADS)

Mandai, Shingo; Jain, Vishwas; Charbon, Edoardo

2014-02-01

This paper presents a digital silicon photomultiplier (SiPM) partitioned in columns, whereas each column is connected to a column-parallel time-to-digital converter (TDC), in order to improve the timing resolution of single-photon detection. By reducing the number of pixels per TDC using a sharing scheme with three TDCs per column, the pixel-to-pixel skew is reduced. We report the basic characterization of the SiPM, comprising 416 single-photon avalanche diodes (SPADs); the characterization includes photon detection probability, dark count rate, afterpulsing, and crosstalk. We achieved 264-ps full-width at half maximum timing resolution of single-photon detection using a 48-fold column-parallel TDC with a temporal resolution of 51.8 ps (least significant bit), fully integrated in standard complementary metal-oxide semiconductor technology.

System for memorizing maximum values

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1992-01-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either linear or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

System for memorizing maximum values

NASA Astrophysics Data System (ADS)

Bozeman, Richard J., Jr.

1992-08-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either linear or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

System for Memorizing Maximum Values

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr. (Inventor)

1996-01-01

The invention discloses a system capable of memorizing maximum sensed values. The system includes conditioning circuitry which receives the analog output signal from a sensor transducer. The conditioning circuitry rectifies and filters the analog signal and provides an input signal to a digital driver, which may be either liner or logarithmic. The driver converts the analog signal to discrete digital values, which in turn triggers an output signal on one of a plurality of driver output lines n. The particular output lines selected is dependent on the converted digital value. A microfuse memory device connects across the driver output lines, with n segments. Each segment is associated with one driver output line, and includes a microfuse that is blown when a signal appears on the associated driver output line.

Manual on characteristics of Landsat computer-compatible tapes produced by the EROS Data Center digital image processing system

USGS Publications Warehouse

Holkenbrink, Patrick F.

1978-01-01

Landsat data are received by National Aeronautics and Space Administration (NASA) tracking stations and converted into digital form on high-density tapes (HDTs) by the Image Processing Facility (IPF) at the Goddard Space Flight Center (GSFC), Greenbelt, Maryland. The HDTs are shipped to the EROS Data Center (EDC) where they are converted into customer products by the EROS Data Center digital image processing system (EDIPS). This document describes in detail one of these products: the computer-compatible tape (CCT) produced from Landsat-1, -2, and -3 multispectral scanner (MSS) data and Landsat-3 only return-beam vidicon (RBV) data. Landsat-1 and -2 RBV data will not be processed by IPF/EDIPS to CCT format.

Proceedings of the ADPA/AIAA/ASME/SPIE Conference on Active and Adaptive Structures Held in Alexandria, Virginia on November 4 - 8, 1991

DTIC Science & Technology

1991-11-08

saturation limit. The control action is sent via a digital-to-analog converter to a power amplifier to activate the NITINOL fibers embedded inside the...feedback approaches in the design of a modal- eiipl.’ i,, n e .ti )tal filters with feedfor.ard and feedback based active control system. There are...photocells; and a series of narrow bandpass filters with silicon photodetectors. The sensor outputs are fed through an anolog to digital converter into the

Electric field measuring and display system. [for cloud formations

NASA Technical Reports Server (NTRS)

Wojtasinski, R. J.; Lovall, D. D. (Inventor)

1974-01-01

An apparatus is described for monitoring the electric fields of cloud formations within a particular area. It utilizes capacitor plates that are alternately shielded from the clouds for generating an alternating signal corresponding to the intensity of the electric field of the clouds. A synchronizing signal is produced for controlling sampling of the alternating signal. Such samplings are fed through a filter and converted by an analogue to digital converter into digital form and subsequently fed to a transmitter for transmission to the control station for recording.

Dual function seal: visualized digital signature for electronic medical record systems.

PubMed

Yu, Yao-Chang; Hou, Ting-Wei; Chiang, Tzu-Chiang

2012-10-01

Digital signature is an important cryptography technology to be used to provide integrity and non-repudiation in electronic medical record systems (EMRS) and it is required by law. However, digital signatures normally appear in forms unrecognizable to medical staff, this may reduce the trust from medical staff that is used to the handwritten signatures or seals. Therefore, in this paper we propose a dual function seal to extend user trust from a traditional seal to a digital signature. The proposed dual function seal is a prototype that combines the traditional seal and digital seal. With this prototype, medical personnel are not just can put a seal on paper but also generate a visualized digital signature for electronic medical records. Medical Personnel can then look at the visualized digital signature and directly know which medical personnel generated it, just like with a traditional seal. Discrete wavelet transform (DWT) is used as an image processing method to generate a visualized digital signature, and the peak signal to noise ratio (PSNR) is calculated to verify that distortions of all converted images are beyond human recognition, and the results of our converted images are from 70 dB to 80 dB. The signature recoverability is also tested in this proposed paper to ensure that the visualized digital signature is verifiable. A simulated EMRS is implemented to show how the visualized digital signature can be integrity into EMRS.

Radio-frequency Bloch-transistor electrometer.

PubMed

Zorin, A B

2001-04-09

A quantum electrometer is proposed which is based on charge modulation of the Josephson supercurrent in the Bloch transistor inserted in a superconducting ring. As this ring is inductively coupled to a high- Q resonance tank circuit, the variations of the charge on the transistor island are converted into variations of amplitude and phase of oscillations in the tank. These variations are amplified and then detected. At sufficiently low temperature of the tank the device sensitivity is determined by the energy resolution of the amplifier, that can be reduced down to the standard quantum limit of 1 / 2Planck's over 2pi. A "back-action-evading" scheme of subquantum limit measurements is proposed.

DAC-board based X-band EPR spectrometer with arbitrary waveform control

NASA Astrophysics Data System (ADS)

Kaufmann, Thomas; Keller, Timothy J.; Franck, John M.; Barnes, Ryan P.; Glaser, Steffen J.; Martinis, John M.; Han, Songi

2013-10-01

We present arbitrary control over a homogenous spin system, demonstrated on a simple, home-built, electron paramagnetic resonance (EPR) spectrometer operating at 8-10 GHz (X-band) and controlled by a 1 GHz arbitrary waveform generator (AWG) with 42 dB (i.e. 14-bit) of dynamic range. Such a spectrometer can be relatively easily built from a single DAC (digital to analog converter) board with a modest number of stock components and offers powerful capabilities for automated digital calibration and correction routines that allow it to generate shaped X-band pulses with precise amplitude and phase control. It can precisely tailor the excitation profiles "seen" by the spins in the microwave resonator, based on feedback calibration with experimental input. We demonstrate the capability to generate a variety of pulse shapes, including rectangular, triangular, Gaussian, sinc, and adiabatic rapid passage waveforms. We then show how one can precisely compensate for the distortion and broadening caused by transmission into the microwave cavity in order to optimize corrected waveforms that are distinctly different from the initial, uncorrected waveforms. Specifically, we exploit a narrow EPR signal whose width is finer than the features of any distortions in order to map out the response to a short pulse, which, in turn, yields the precise transfer function of the spectrometer system. This transfer function is found to be consistent for all pulse shapes in the linear response regime. In addition to allowing precise waveform shaping capabilities, the spectrometer presented here offers complete digital control and calibration of the spectrometer that allows one to phase cycle the pulse phase with 0.007° resolution and to specify the inter-pulse delays and pulse durations to ⩽250 ps resolution. The implications and potential applications of these capabilities will be discussed.

Digital Phase Meter for a Laser Heterodyne Interferometer

NASA Technical Reports Server (NTRS)

Loya, Frank

2008-01-01

The Digital Phase Meter is based on a modified phase-locked loop. When phase alignment between the reference input and the phase-shifted metrological input is achieved, the loop locks and the phase shift of the digital phase shifter equals the phase difference that one seeks to measure. This digital phase meter is being developed for incorporation into a laser heterodyne interferometer in a metrological apparatus, but could also be adapted to other uses. Relative to prior phase meters of similar capability, including digital ones, this digital phase meter is smaller, less complex, and less expensive. The phase meter has been constructed and tested in the form of a field-programmable gate array (FPGA).

Growing Oxide Nanowires and Nanowire Networks by Solid State Contact Diffusion into Solution-Processed Thin Films.

PubMed

Glynn, Colm; McNulty, David; Geaney, Hugh; O'Dwyer, Colm

2016-11-01

New techniques to directly grow metal oxide nanowire networks without the need for initial nanoparticle seed deposition or postsynthesis nanowire casting will bridge the gap between bottom-up formation and top-down processing for many electronic, photonic, energy storage, and conversion technologies. Whether etched top-down, or grown from catalyst nanoparticles bottom-up, nanowire growth relies on heterogeneous material seeds. Converting surface oxide films, ubiquitous in the microelectronics industry, to nanowires and nanowire networks by the incorporation of extra species through interdiffusion can provide an alternative deposition method. It is shown that solution-processed thin films of oxides can be converted and recrystallized into nanowires and networks of nanowires by solid-state interdiffusion of ionic species from a mechanically contacted donor substrate. NaVO 3 nanowire networks on smooth Si/SiO 2 and granular fluorine-doped tin oxide surfaces can be formed by low-temperature annealing of a Na diffusion species-containing donor glass to a solution-processed V 2 O 5 thin film, where recrystallization drives nanowire growth according to the crystal habit of the new oxide phase. This technique illustrates a new method for the direct formation of complex metal oxide nanowires on technologically relevant substrates, from smooth semiconductors, to transparent conducting materials and interdigitated device structures. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Iterative current mode per pixel ADC for 3D SoftChip implementation in CMOS

NASA Astrophysics Data System (ADS)

Lachowicz, Stefan W.; Rassau, Alexander; Lee, Seung-Minh; Eshraghian, Kamran; Lee, Mike M.

2003-04-01

Mobile multimedia communication has rapidly become a significant area of research and development constantly challenging boundaries on a variety of technological fronts. The processing requirements for the capture, conversion, compression, decompression, enhancement, display, etc. of increasingly higher quality multimedia content places heavy demands even on current ULSI (ultra large scale integration) systems, particularly for mobile applications where area and power are primary considerations. The ADC presented in this paper is designed for a vertically integrated (3D) system comprising two distinct layers bonded together using Indium bump technology. The top layer is a CMOS imaging array containing analogue-to-digital converters, and a buffer memory. The bottom layer takes the form of a configurable array processor (CAP), a highly parallel array of soft programmable processors capable of carrying out complex processing tasks directly on data stored in the top plane. This paper presents a ADC scheme for the image capture plane. The analogue photocurrent or sampled voltage is transferred to the ADC via a column or a column/row bus. In the proposed system, an array of analogue-to-digital converters is distributed, so that a one-bit cell is associated with one sensor. The analogue-to-digital converters are algorithmic current-mode converters. Eight such cells are cascaded to form an 8-bit converter. Additionally, each photo-sensor is equipped with a current memory cell, and multiple conversions are performed with scaled values of the photocurrent for colour processing.

Evaluation and Analysis of a Multi-Band Transceiver for Next Generation Telemetry Applications

DTIC Science & Technology

2014-06-01

DDC ) BAND SELECTION Kintex FPGA DIGITAL RADIO RECEIVER DIGITAL RADIO TRANSMITTER ADC Fs < 225 MSPS Fs = 400 MHz RF BW = 36 MHz FREQ TRANSLATION VIA...MANAGER (MMCM) DIGITAL DOWN CONVERSION ( DDC ) BAND SELECTIVE FILTER Kintex FPGA DIGITAL RADIO RECEIVER DIGITAL RADIO TRANSMITTER FIR FINE TRANSLATION

Digitally synthesized high purity, high-voltage radio frequency drive electronics for mass spectrometry.

PubMed

Schaefer, R T; MacAskill, J A; Mojarradi, M; Chutjian, A; Darrach, M R; Madzunkov, S M; Shortt, B J

2008-09-01

Reported herein is development of a quadrupole mass spectrometer controller (MSC) with integrated radio frequency (rf) power supply and mass spectrometer drive electronics. Advances have been made in terms of the physical size and power consumption of the MSC, while simultaneously making improvements in frequency stability, total harmonic distortion, and spectral purity. The rf power supply portion of the MSC is based on a series-resonant LC tank, where the capacitive load is the mass spectrometer itself, and the inductor is a solenoid or toroid, with various core materials. The MSC drive electronics is based on a field programmable gate array (FPGA), with serial peripheral interface for analog-to-digital and digital-to-analog converter support, and RS232/RS422 communications interfaces. The MSC offers spectral quality comparable to, or exceeding, that of conventional rf power supplies used in commercially available mass spectrometers; and as well an inherent flexibility, via the FPGA implementation, for a variety of tasks that includes proportional-integral derivative closed-loop feedback and control of rf, rf amplitude, and mass spectrometer sensitivity. Also provided are dc offsets and resonant dipole excitation for mass selective accumulation in applications involving quadrupole ion traps; rf phase locking and phase shifting for external loading of a quadrupole ion trap; and multichannel scaling of acquired mass spectra. The functionality of the MSC is task specific, and is easily modified by simply loading FPGA registers or reprogramming FPGA firmware.

Compton suppression and event triggering in a commercial data acquisition system

NASA Astrophysics Data System (ADS)

Tabor, Samuel; Caussyn, D. D.; Tripathi, Vandana; Vonmoss, J.; Liddick, S. N.

2012-10-01

A number of groups are starting to use flash digitizer systems to directly convert the preamplifier signals of high-resolution Ge detectors to a stream of digital data. Some digitizers are also equipped with software constant fraction discriminator algorithms capable of operating on the resulting digital data stream to provide timing information. Because of the dropping cost per channel of these systems, it should now be possible to also connect outputs of the Bismuth Germanate (BGO) scintillators used for Compton suppression to other digitizer inputs so that BGO logic signals can also be available in the same system. This provides the possibility to perform all the Compton suppression and multiplicity trigger logic within the digital system, thus eliminating the need for separate timing filter amplifiers (TFA), constant fraction discriminators (CFD), logic units, and lots of cables. This talk will describe the performance of such a system based on Pixie16 modules from XIA LLC with custom field programmable gate array (FPGA) programming for an array of Compton suppressed single Ge crystal and 4-crystal ``Clover'' detector array along with optional particle detectors. Initial tests of the system have produced results comparable with the current traditional system of individual electronics and peak sensing analog to digital converters. The advantages of the all digital system will be discussed.

Ultra-fast quantitative imaging using ptychographic iterative engine based digital micro-mirror device

NASA Astrophysics Data System (ADS)

Sun, Aihui; Tian, Xiaolin; Kong, Yan; Jiang, Zhilong; Liu, Fei; Xue, Liang; Wang, Shouyu; Liu, Cheng

2018-01-01

As a lensfree imaging technique, ptychographic iterative engine (PIE) method can provide both quantitative sample amplitude and phase distributions avoiding aberration. However, it requires field of view (FoV) scanning often relying on mechanical translation, which not only slows down measuring speed, but also introduces mechanical errors decreasing both resolution and accuracy in retrieved information. In order to achieve high-accurate quantitative imaging with fast speed, digital micromirror device (DMD) is adopted in PIE for large FoV scanning controlled by on/off state coding by DMD. Measurements were implemented using biological samples as well as USAF resolution target, proving high resolution in quantitative imaging using the proposed system. Considering its fast and accurate imaging capability, it is believed the DMD based PIE technique provides a potential solution for medical observation and measurements.

Nonlinear channelizer.

PubMed

In, Visarath; Longhini, Patrick; Kho, Andy; Neff, Joseph D; Leung, Daniel; Liu, Norman; Meadows, Brian K; Gordon, Frank; Bulsara, Adi R; Palacios, Antonio

2012-12-01

The nonlinear channelizer is an integrated circuit made up of large parallel arrays of analog nonlinear oscillators, which, collectively, serve as a broad-spectrum analyzer with the ability to receive complex signals containing multiple frequencies and instantaneously lock-on or respond to a received signal in a few oscillation cycles. The concept is based on the generation of internal oscillations in coupled nonlinear systems that do not normally oscillate in the absence of coupling. In particular, the system consists of unidirectionally coupled bistable nonlinear elements, where the frequency and other dynamical characteristics of the emergent oscillations depend on the system's internal parameters and the received signal. These properties and characteristics are being employed to develop a system capable of locking onto any arbitrary input radio frequency signal. The system is efficient by eliminating the need for high-speed, high-accuracy analog-to-digital converters, and compact by making use of nonlinear coupled systems to act as a channelizer (frequency binning and channeling), a low noise amplifier, and a frequency down-converter in a single step which, in turn, will reduce the size, weight, power, and cost of the entire communication system. This paper covers the theory, numerical simulations, and some engineering details that validate the concept at the frequency band of 1-4 GHz.

Quasi-Linear Circuit

NASA Technical Reports Server (NTRS)

Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

2013-01-01

This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

Ultra Small Aperture Terminal for Ka-Band SATCOM

NASA Technical Reports Server (NTRS)

Acosta, Roberto; Reinhart, Richard; Lee, Richard; Simons, Rainee

1997-01-01

An ultra small aperture terminal (USAT) at Ka-band frequency has been developed by Lewis Research Center (LeRC) for data rates up to 1.5 Mbps in the transmit mode and 40 Mbps in receive mode. The terminal consists of a 35 cm diameter offset-fed parabolic antenna which is attached to a solid state power amplifier and low noise amplifier. A single down converter is used to convert the Ka-band frequency to 70 MHz intermediate frequency (IF). A variable rate (9.6 Kbps to 10 Mbps) commercial modem with a standard RS-449/RS-232 interface is used to provide point-to-point digital services. The terminal has been demonstrated numerous times using the Advanced Communications Technology Satellite (ACTS) and the 4.5 in Link Evaluation Terminal (LET) in Cleveland. A conceptual design for an advanced terminal has also been developed. This advanced USAT utilizes Microwave Monolithic Integrated Circuit (MMIC) and flat plate array technologies. This terminal will be self contained in a single package which will include a 1 watt solid state amplifier (SSPA), low noise amplifier (LNA) and a modem card located behind the aperture of the array. The advanced USAT will be light weight, transportable, low cost and easy to point to the satellite. This paper will introduce designs for the reflector based and array based USAT's.

SCANIT: centralized digitizing of forest resource maps or photographs

Treesearch

Elliot L. Amidon; E. Joyce Dye

1981-01-01

Spatial data on wildland resource maps and aerial photographs can be analyzed by computer after digitizing. SCANIT is a computerized system for encoding such data in digital form. The system, consisting of a collection of computer programs and subroutines, provides a powerful and versatile tool for a variety of resource analyses. SCANIT also may be converted easily to...

Sn to Sg conversion and focusing along the Atlantic margin, Morocco - Implications for earthquake hazard evaluation

NASA Astrophysics Data System (ADS)

Seber, Dogan; Barazangi, Muawia; Tadili, Ben A.; Ramdani, Mohamed; Ibenbrahim, Aomar; Ben Sari, Driss; El Alami, Sidi O.

1993-07-01

Digital data from a telemetered, short-period seismic network in Morocco provide a new perspective for understanding the cause of severe shaking and macroseismic reports in Morocco produced by large offshore earthquakes located along the Azores-Gibraltar seismic zone. Even though the earthquake epicenters are 500-1000 km away from the Moroccan coast, historical records show that such events are capable of producing considerable damage in inland areas. We analyze 15 earthquakes that occurred in this region. The records show multiple S phases with varying frequencies and amplitudes. The S phase with the largest amplitude, usually misinterpreted as Sn, has a phase velocity of 4.2-4.4 km/s. We show that these S arrivals can best be explained as Sn to Sg converted phases. Calculated locations of the conversion points for these phases exhibit two distinct zones almost parallel to the Atlantic coastline: one is located along the passive continental margin and the other is located about 100 km inland from the coastline. We interpret these two zones to be regions where a sudden change in crustal thickness occurs. Such zones act to focus and magnify the amplitudes of seismic phases.

Flexible Power Distribution Based on Point of Load Converters

NASA Astrophysics Data System (ADS)

Dhallewin, G.; Galiana, D.; Mollard, J. M.; Schaper, W.; Strixner, E.; Tonicello, F.; Triggianese, M.

2014-08-01

Present digital electronic loads require low voltages and suffer from high currents. In addition, they need several different voltage levels to supply the different parts of digital devices like the core, the input/output I/F, etc. Distributed Power Architectures (DPA) with point-of- load (POL) converters (synchronous buck type) offer excellent performance in term of efficiency and load step behaviour. They occupy little PCB area and are well suited for very low voltage (VLV) DC conversion (1V to 3.3V). The paper presents approaches to architectural design of POL based supplies including redundancy and protection as well as the requirements on a European hardware implementation. The main driver of the analysis is the flexibility of each element (DC/DC converter, protection, POL core) to cover a wide range of space applications.

Application of Digital Radiography to Weld Inspection for the Space Shuttle External Fuel Tank

NASA Technical Reports Server (NTRS)

Ussery, Warren

2009-01-01

This slide presentation reviews NASA's use of digital radiography to inspect the welds of the external tanks used to hold the cryogenic fuels for the Space Shuttle Main Engines. NASA has had a goal of replacing a significant portion of film used to inspect the welds, with digital radiography. The presentation reviews the objectives for converting to a digital system from film, the characteristics of the digital system, the Probability of detection study, the qualification and implementation of the system.

Proceedings of the 1981 RADC Microwave Magnetics Technology Workshop, June 10-11, 1981,

DTIC Science & Technology

1983-01-01

tactical radar system, one that is not unrealistic, a tactical radar system of 20,000 elements. If the Air Force were to buy 50 of these systems, which...that you need to accurately match the devices RF-IF. One of the problems that we have right now is that, say at 30 GHz you wanted to buy match down...converters at 30 GHz, you’d have a very difficult time buying matched down converters. The people developing millimeter wave devices are right now

Spatial two-photon coherence of the entangled field produced by down-conversion using a partially spatially coherent pump beam

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jha, Anand Kumar; Boyd, Robert W.

2010-01-15

We study the spatial coherence properties of the entangled two-photon field produced by parametric down-conversion (PDC) when the pump field is, spatially, a partially coherent beam. By explicitly treating the case of a pump beam of the Gaussian Schell-model type, we show that in PDC the spatial coherence properties of the pump field get entirely transferred to the spatial coherence properties of the down-converted two-photon field. As one important consequence of this study, we find that, for two-qubit states based on the position correlations of the two-photon field, the maximum achievable entanglement, as quantified by concurrence, is bounded by themore » degree of spatial coherence of the pump field. These results could be important by providing a means of controlling the entanglement of down-converted photons by tailoring the degree of coherence of the pump field.« less

Pilot-multiplexed continuous-variable quantum key distribution with a real local oscillator

NASA Astrophysics Data System (ADS)

Wang, Tao; Huang, Peng; Zhou, Yingming; Liu, Weiqi; Zeng, Guihua

2018-01-01

We propose a pilot-multiplexed continuous-variable quantum key distribution (CVQKD) scheme based on a local local oscillator (LLO). Our scheme utilizes time-multiplexing and polarization-multiplexing techniques to dramatically isolate the quantum signal from the pilot, employs two heterodyne detectors to separately detect the signal and the pilot, and adopts a phase compensation method to almost eliminate the multifrequency phase jitter. In order to analyze the performance of our scheme, a general LLO noise model is constructed. Besides the phase noise and the modulation noise, the photon-leakage noise from the reference path and the quantization noise due to the analog-to-digital converter (ADC) are also considered, which are first analyzed in the LLO regime. Under such general noise model, our scheme has a higher key rate and longer secure distance compared with the preexisting LLO schemes. Moreover, we also conduct an experiment to verify our pilot-multiplexed scheme. Results show that it maintains a low level of the phase noise and is expected to obtain a 554-Kbps secure key rate within a 15-km distance under the finite-size effect.

Two stage kickdown control system for a motor vehicle automatic transmission

DOE Office of Scientific and Technical Information (OSTI.GOV)

Higashi, H.; Waki, K.; Fukuiri, M.

This patent describes a vehicle automatic transmission including a hydraulic torque converter and a transmission gear mechanism connected with the torque converter and having at least three gear stages of different gear ratios for forward drive. A principal feature of this system as described is a friction means for selecting one of the gear stages as well as a kickdown control means consisting of the first shift down circuit means for control of the friction means so that the transmission gear mechanism is shifted downward. A solenoid kick down means within the modality of the first shift down circuit andmore » a kick down switch means actuated by an engine control member when it is moved to a full power position provides control of the kick down solenoid and the effecting of a down shift. The shift down control means is composed of a second shift down circuit means for controlling the friction means so shift down occurs. The shift down solenoid contained in the second shift down circuit means in conjunction with a shift down switch actuated by engine control member movement to a position spaced a predetermined distance from the full power position control the shift down solenoid to effect a shift down. Thus this mechanism is actuated earlier than the kickdown switch means when the engine control member is moved toward the full power position. A time delay means from the time of actuation of the shift down switch means and controlling kickdown switch activation is also described.« less

An Ultra-Low Power Charge Redistribution Successive Approximation Register A/D Converter for Biomedical Applications.

PubMed

Koppa, Santosh; Mohandesi, Manouchehr; John, Eugene

2016-12-01

Power consumption is one of the key design constraints in biomedical devices such as pacemakers that are powered by small non rechargeable batteries over their entire life time. In these systems, Analog to Digital Convertors (ADCs) are used as interface between analog world and digital domain and play a key role. In this paper we present the design of an 8-bit Charge Redistribution Successive Approximation Register (CR-SAR) analog to digital converter in standard TSMC 0.18μm CMOS technology for low power and low data rate devices such as pacemakers. The 8-bit optimized CR-SAR ADC achieves low power of less than 250nW with conversion rate of 1KB/s. This ADC achieves integral nonlinearity (INL) and differential nonlinearity (DNL) less than 0.22 least significant bit (LSB) and less than 0.04 LSB respectively as compared to the standard requirement for the INL and DNL errors to be less than 0.5 LSB. The designed ADC operates at 1V supply voltage converting input ranging from 0V to 250mV.

High-rate anaerobic treatment system for solid/lipid-rich wastewater using anaerobic baffled reactor with scum recovery.

PubMed

Fujihira, Takuya; Seo, Shogo; Yamaguchi, Takashi; Hatamoto, Masashi; Tanikawa, Daisuke

2018-04-27

A laboratory scale experiment was conducted to investigate the treatment of solid/lipid-rich wastewater with an anaerobic baffled reactor (ABR) and a down-flow hanging sponge (DHS) reactor. In this study, experimental periods were divided into three phases to explore efficient treatment of solids and lipids in wastewater. In ABR, >90% of the influent chemical oxygen demand (COD) was removed and >70% of the removed COD was converted to methane under steady-state conditions during each phase. During this period, >4.5 kg COD m -3  d -1 was achieved on an average in Phases 1 and 3. Biogas contributed to scum formation, and the scum was categorized into lipid-rich and sludge-containing types, which have energy potentials of 53.4 and 212 kcal/kg-wet weight, respectively. Therefore, by recovering solids and lipids, which formed persistent scum, ABR can be applied as a high-rate treatment for solid/lipid-rich wastewater. Copyright © 2018 Elsevier Ltd. All rights reserved.

Digital circuits for computer applications: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

The GANDALF 128-Channel Time-to-Digital Converter

NASA Astrophysics Data System (ADS)

Büchele, M.; Fischer, H.; Herrmann, F.; Königsmann, K.; Schill, C.; Schopferer, S.

The GANDALF 6U-VME64x/VXS module has been designed to cope with a variety of readout tasks in high energy and nuclear physics experiments, in particular the COMPASS experiment at CERN. The exchangeable mezzanine cards allow for an employment of the system in very different applications such as analog-to-digital or time-to-digital conversions, coincidence matrix formation, fast pattern recognition or fast trigger generation. Based on this platform, we present a 128-channel TDC which is implemented in a single Xilinx Virtex-5 FPGA using a shifted clock sampling method. In this concept each input signal is continuously sampled by 16 flip-flops using equidistant phase-shifted clocks. Compared to previous FPGA designs, usually based on delay lines and comprising few TDC channels with resolutions in the order of 10 ps, our design permits the implementation of a large number of TDC channels with a resolution of 64 ps in a single FPGA. Predictable placement of logic components and uniform routing inside the FPGA fabric is a particular challenge of this design. We present measurement results for the time resolution and the nonlinearity of the TDC readout system.

YF-12 cooperative airframe/propulsion control system program, volume 1

NASA Technical Reports Server (NTRS)

Anderson, D. L.; Connolly, G. F.; Mauro, F. M.; Reukauf, P. J.; Marks, R. (Editor)

1980-01-01

Several YF-12C airplane analog control systems were converted to a digital system. Included were the air data computer, autopilot, inlet control system, and autothrottle systems. This conversion was performed to allow assessment of digital technology applications to supersonic cruise aircraft. The digital system was composed of a digital computer and specialized interface unit. A large scale mathematical simulation of the airplane was used for integration testing and software checkout.

Super-resolution technique for CW lidar using Fourier transform reordering and Richardson-Lucy deconvolution.

PubMed

Campbell, Joel F; Lin, Bing; Nehrir, Amin R; Harrison, F Wallace; Obland, Michael D

2014-12-15

An interpolation method is described for range measurements of high precision altimetry with repeating intensity modulated continuous wave (IM-CW) lidar waveforms using binary phase shift keying (BPSK), where the range profile is determined by means of a cross-correlation between the digital form of the transmitted signal and the digitized return signal collected by the lidar receiver. This method uses reordering of the array elements in the frequency domain to convert a repeating synthetic pulse signal to single highly interpolated pulse. This is then enhanced further using Richardson-Lucy deconvolution to greatly enhance the resolution of the pulse. We show the sampling resolution and pulse width can be enhanced by about two orders of magnitude using the signal processing algorithms presented, thus breaking the fundamental resolution limit for BPSK modulation of a particular bandwidth and bit rate. We demonstrate the usefulness of this technique for determining cloud and tree canopy thicknesses far beyond this fundamental limit in a lidar not designed for this purpose.

Turning Microscopy in the Medical Curriculum Digital: Experiences from The Faculty of Health and Medical Sciences at University of Copenhagen

PubMed Central

Vainer, Ben; Mortensen, Niels Werner; Poulsen, Steen Seier; Sørensen, Allan Have; Olsen, Jørgen; Saxild, Hans Henrik; Johansen, Flemming Fryd

2017-01-01

Familiarity with the structure and composition of normal tissue and an understanding of the changes that occur during disease is pivotal to the study of the human body. For decades, microscope slides have been central to teaching pathology in medical courses and related subjects at the University of Copenhagen. Students had to learn how to use a microscope and envisage three-dimensional processes that occur in the body from two-dimensional glass slides. Here, we describe how a PathXL virtual microscopy system for teaching pathology and histology at the Faculty has recently been implemented, from an administrative, an economic, and a teaching perspective. This fully automatic digital microscopy system has been received positively by both teachers and students, and a decision was made to convert all courses involving microscopy to the virtual microscopy format. As a result, conventional analog microscopy will be phased out from the fall of 2016. PMID:28382225

Interface of the transport systems research vehicle monochrome display system to the digital autonomous terminal access communication data bus

NASA Technical Reports Server (NTRS)

Easley, W. C.; Tanguy, J. S.

1986-01-01

An upgrade of the transport systems research vehicle (TSRV) experimental flight system retained the original monochrome display system. The original host computer was replaced with a Norden 11/70, a new digital autonomous terminal access communication (DATAC) data bus was installed for data transfer between display system and host, while a new data interface method was required. The new display data interface uses four split phase bipolar (SPBP) serial busses. The DATAC bus uses a shared interface ram (SIR) for intermediate storage of its data transfer. A display interface unit (DIU) was designed and configured to read from and write to the SIR to properly convert the data from parallel to SPBP serial and vice versa. It is found that separation of data for use by each SPBP bus and synchronization of data tranfer throughout the entire experimental flight system are major problems which require solution in DIU design. The techniques used to accomplish these new data interface requirements are described.

Thermal heat-balance mode flow-to-frequency converter

NASA Astrophysics Data System (ADS)

Pawlowski, Eligiusz

2016-11-01

This paper presents new type of thermal flow converter with the pulse frequency output. The integrating properties of the temperature sensor have been used, which allowed for realization of pulse frequency modulator with thermal feedback loop, stabilizing temperature of sensor placed in the flowing medium. The system assures balancing of heat amount supplied in impulses to the sensor and heat given up by the sensor in a continuous way to the flowing medium. Therefore the frequency of output impulses is proportional to the heat transfer coefficient from sensor to environment. According to the King's law, the frequency of those impulses is a function of medium flow velocity around the sensor. The special feature of presented solution is total integration of thermal sensor with the measurement signal conditioning system. Sensor and conditioning system are not the separate elements of the measurement circuit, but constitute a whole in form of thermal heat-balance mode flow-to-frequency converter. The advantage of such system is easiness of converting the frequency signal to the digital form, without using any additional analogue-to-digital converters. The frequency signal from the converter may be directly connected to the microprocessor input, which with use of standard built-in counters may convert the frequency into numerical value of high precision. Moreover, the frequency signal has higher resistance to interference than the voltage signal and may be transmitted to remote locations without the information loss.

Introduction of a new opto-electrical phase-locked loop in CMOS technology: the PMD-PLL

NASA Astrophysics Data System (ADS)

Ringbeck, Thorsten; Schwarte, Rudolf; Buxbaum, Bernd

1999-12-01

The huge and increasing need of information in the industrial world demands an enormous potential of bandwidth in telecommunication systems. Optical communication provides all participants with the whole spectrum of digital services like videophone, cable TV, video conferencing and online services. Especially fast and low cost opto-electrical receivers are badly needed in order to expand fiber networks to every home (FTTH--fiber to the home or FTTD--fiber to the desk, respectively). This paper proposes a new receiver structure which is designed to receiver optical data which are encoded by code division multiple access techniques (CDMA). For data recovery in such CDMA networks phase locked loops (PLL) are needed, which synchronize the local oscillator with the incoming clock. In optical code division multiple access networks these PLLs could be realized either with an electrical PLL after opto-electrical converting or directly in the optical path with a pure optical PLL.

Fast, Deep-Record-Length, Fiber-Coupled Photodiode Imaging Array for Plasma Diagnostics

NASA Astrophysics Data System (ADS)

Brockington, Samuel; Case, Andrew; Witherspoon, F. Douglas

2014-10-01

HyperV Technologies has been developing an imaging diagnostic comprised of an array of fast, low-cost, long-record-length, fiber-optically-coupled photodiode channels to investigate plasma dynamics and other fast, bright events. By coupling an imaging fiber bundle to a bank of amplified photodiode channels, imagers and streak imagers of 100 to 1000 pixels can be constructed. By interfacing analog photodiode systems directly to commercial analog-to-digital converters and modern memory chips, a prototype 100 pixel array with an extremely deep record length (128 k points at 20 Msamples/s) and 10 bit pixel resolution has already been achieved. HyperV now seeks to extend these techniques to construct a prototype 1000 Pixel framing camera with up to 100 Msamples/sec rate and 10 to 12 bit depth. Preliminary experimental results as well as Phase 2 plans will be discussed. Work supported by USDOE Phase 2 SBIR Grant DE-SC0009492.

Integrating a Microwave Radiometer into Radar Hardware for Simultaneous Data Collection Between the Instruments

NASA Technical Reports Server (NTRS)

McLinden, Matthew; Piepmeier, Jeffrey

2013-01-01

The conventional method for integrating a radiometer into radar hardware is to share the RF front end between the instruments, and to have separate IF receivers that take data at separate times. Alternatively, the radar and radiometer could share the antenna through the use of a diplexer, but have completely independent receivers. This novel method shares the radar's RF electronics and digital receiver with the radiometer, while allowing for simultaneous operation of the radar and radiometer. Radars and radiometers, while often having near-identical RF receivers, generally have substantially different IF and baseband receivers. Operation of the two instruments simultaneously is difficult, since airborne radars will pulse at a rate of hundreds of microseconds. Radiometer integration time is typically 10s or 100s of milliseconds. The bandwidth of radar may be 1 to 25 MHz, while a radiometer will have an RF bandwidth of up to a GHz. As such, the conventional method of integrating radar and radiometer hardware is to share the highfrequency RF receiver, but to have separate IF subsystems and digitizers. To avoid corruption of the radiometer data, the radar is turned off during the radiometer dwell time. This method utilizes a modern radar digital receiver to allow simultaneous operation of a radiometer and radar with a shared RF front end and digital receiver. The radiometer signal is coupled out after the first down-conversion stage. From there, the radar transmit frequencies are heavily filtered, and the bands outside the transmit filter are amplified and passed to a detector diode. This diode produces a DC output proportional to the input power. For a conventional radiometer, this level would be digitized. By taking this DC output and mixing it with a system oscillator at 10 MHz, the signal can instead be digitized by a second channel on the radar digital receiver (which typically do not accept DC inputs), and can be down-converted to a DC level again digitally. This unintuitive step allows the digital receiver to sample both the radiometer and radar data at a rapid, synchronized data rate (greater than 1 MHz bandwidth). Once both signals are sampled by the same digital receiver, high-speed quality control can be performed on the radiometer data to allow it to take data simultaneously with the radar. The radiometer data can be blanked during radar transmit, or when the radar return is of a power level high enough to corrupt the radiometer data. Additionally, the receiver protection switches in the RF front end can double as radiometer calibration sources, the short (four-microsecond level) switching periods integrated over many seconds to estimate the radiometer offset. The major benefit of this innovation is that there is minimal impact on the radar performance due to the integration of the radiometer, and the radiometer performance is similarly minimally affected by the radar. As the radar and radiometer are able to operate simultaneously, there is no extended period of integration time loss for the radiometer (maximizing sensitivity), and the radar is able to maintain its full number of pulses (increasing sensitivity and decreasing measurement uncertainty).

500 MHz Analog-to-Digital Converter Development Program

DTIC Science & Technology

1972-03-01

marginal level digital input signals. At these encoding speeds, quasi -stable non -digital voltage levels at their outputs still resulted. Further...OF COMMERCE SPRINGFIELD, VA. 22161 Radar Division AEROSPACE GROUP Hughes Aircraft Company * Culver City, California / .A CONTFNTS Page INTRODUCTION...sec. The experimental data also indicated that the short time stability of the timing reference generator caused most of the time jitter associated

Synthesis and implementation of state-trajectory control law for dc-to-dc converters

NASA Technical Reports Server (NTRS)

Burns, W. W., III; Huffman, S. D.; Wilson, T. G.; Owen, H. A., Jr.

1977-01-01

Mathematical representations of a state-plane switching boundary employed in a state-trajectory control law for dc-to-dc converters are derived. Two approaches to implementing the control law are discussed; one approach employs a digital processor and the other uses analog computational circuits. Performance characteristics of experimental voltage step-up dc-to-dc converters operating under the control of each of these implementations are presented.

Hybrid inverter for HVDC/weak AC system interconnection

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tam, K.S.

1985-01-01

The concept of the hybrid converter is introduced. By independently controlling a naturally commutated converter (NCC) and an artificially commutated converter (ACC), real power and reactive power can be controlled independently. Alternatively, the ac bus voltage can be regulated without affecting the real power transfer. Independent control is feasible only within certain operating boundaries. Twelve pulse operation, sequential control, and complementary circuits may be viewed as variations of the hybrid converter. The concept of the hybrid converter is demonstrated by digital simulation. At the current state of technology, the NCC is best implemented by a 6-pulse bridge using thyristors asmore » the switching elements. A survey of power electronics applicable to HVDC applications reveals that the capacitively commutated current-sourced converters are either technically or economically better than the other alternatives for the implementation of the ACC. The digital simulation results show that the problems of operating an HVDC system into a weak ac system can be solved by using a hybrid inverter. A new control scheme, the zero Q control, is developed. With no reactive power interaction between the dc system and the ac system, the stability of the HVDC/weak ac system operation is significantly improved. System start-up and fault recovery is fast and stable.« less

Method and apparatus for enhancing microchannel plate data

DOEpatents

Thoe, R.S.

1983-10-24

A method and apparatus for determining centroid channel locations are disclosed for use in a system activated by one or more multichannel plates and including a linear diode array providing channels of information 1, 2, ...,n, ..., N containing signal amplitudes A/sub n/. A source of analog A/sub n/ signals, and a source of digital clock signals n, are provided. Non-zero A/sub n/ values are detected in a discriminator. A digital signal representing p, the value of n immediately preceding that whereat A/sub n/ takes its first non-zero value, is generated in a scaler. The analog A/sub n/ signals are converted to digital in an analog to digital converter. The digital A/sub n/ signals are added to produce a digital ..sigma..A/sub n/ signal in a full adder. Digital 1, 2, ..., m signals representing the number of non-zero A/sub n/ are produced by a discriminator pulse counter. Digital signals representing 1 A/sub p+1/, 2 A/sub p+2/, ..., m A/sub p+m/ are produced by pairwise multiplication in multiplier. These signal are added in multiplier summer to produce a digital ..sigma..nA/sub n/ - p..sigma..A/sub n/ signal. This signal is divided by the digital ..sigma..A/sub n/ signal in divider to provide a digital (..sigma..nA/sub n//..sigma..A/sub n/) -p signal. Finally, this last signal is added to the digital p signal in an offset summer to provide ..sigma..nA/sub n//..sigma..A/sub n/, the centroid channel locations.

Development of a low-frequency physiotherapeutic device for diabetes manipulated by microcontroller.

PubMed

Guo, Jin-Song; Gong, Jian

2001-01-01

OBJECTIVE: To develop a physiotherapeutic device for diabetes that generates special low-frequency waveform manipulated by a microcontroller. METHODS: A microcontoller and a digital-to-analog converter were utilized along with a keyboard and LED display circuit, to generate desired low-frequecy waveform with the assistance of a software. RESULTS: The complex waveform generated by this device met the demands for diabetes physiotherapy, and the frequency and amplitude could be freely adjusted. CONCLUSIONS: The utilization of a digital-to-analog converter controlled by a microcontroller can very well serve the purpose of a low-frequency physiotherapy for diabetes.

A novel emissive projection display (EPD) on transparent phosphor screen

NASA Astrophysics Data System (ADS)

Cheng, Botao; Sun, Leonard; Yu, Ge; Sun, Ted X.

2017-03-01

A new paradigm of digital projection is on the horizon, based on innovative emissive screen that are made fully transparent. It can be readily applied and convert any surface to a high image quality emissive digital display, without affecting the surface appearance. For example, it can convert any glass window or windshield to completely see-through display, with unlimited field of view and viewing angles. It also enables a scalable and economic projection display on a pitch-black emissive screen with black level and image contrast that rivals other emissive displays such as plasma display or OLED.

Telemedicine optoelectronic biomedical data processing system

NASA Astrophysics Data System (ADS)

Prosolovska, Vita V.

2010-08-01

The telemedicine optoelectronic biomedical data processing system is created to share medical information for the control of health rights and timely and rapid response to crisis. The system includes the main blocks: bioprocessor, analog-digital converter biomedical images, optoelectronic module for image processing, optoelectronic module for parallel recording and storage of biomedical imaging and matrix screen display of biomedical images. Rated temporal characteristics of the blocks defined by a particular triggering optoelectronic couple in analog-digital converters and time imaging for matrix screen. The element base for hardware implementation of the developed matrix screen is integrated optoelectronic couples produced by selective epitaxy.

The evaluation of phasemeter prototype performance for the space gravitational waves detection.

PubMed

Liu, He-Shan; Dong, Yu-Hui; Li, Yu-Qiong; Luo, Zi-Ren; Jin, Gang

2014-02-01

Heterodyne laser interferometry is considered as the most promising readout scheme for future space gravitational wave detection missions, in which the gravitational wave signals disguise as small phase variances within the heterodyne beat note. This makes the phasemeter, which extracts the phase information from the beat note, the key device to this system. In this paper, a prototype of phasemeter based on digital phase-locked loop technology is developed, and the major noise sources which may contribute to the noise spectra density are analyzed in detail. Two experiments are also carried out to evaluate the performance of the phasemeter prototype. The results show that the sensitivity is achieved 2π μrad/√Hz in the frequency range of 0.04 Hz-10 Hz. Due to the effect of thermal drift, the noise obviously increases with the frequencies down to 0.1 mHz.

The evaluation of phasemeter prototype performance for the space gravitational waves detection

NASA Astrophysics Data System (ADS)

Liu, He-Shan; Dong, Yu-Hui; Li, Yu-Qiong; Luo, Zi-Ren; Jin, Gang

2014-02-01

Heterodyne laser interferometry is considered as the most promising readout scheme for future space gravitational wave detection missions, in which the gravitational wave signals disguise as small phase variances within the heterodyne beat note. This makes the phasemeter, which extracts the phase information from the beat note, the key device to this system. In this paper, a prototype of phasemeter based on digital phase-locked loop technology is developed, and the major noise sources which may contribute to the noise spectra density are analyzed in detail. Two experiments are also carried out to evaluate the performance of the phasemeter prototype. The results show that the sensitivity is achieved 2π μrad/√Hz in the frequency range of 0.04 Hz-10 Hz. Due to the effect of thermal drift, the noise obviously increases with the frequencies down to 0.1 mHz.

VHDL Implementation of Sigma-Delta Analog To Digital Converter

NASA Astrophysics Data System (ADS)

Chavan, R. N.; Chougule, D. G.

2010-11-01

Sigma-Delta modulation techniques provide a range of opportunities in a signal processing system for both increasing performance and data path optimization along the silicon area axis in the design space. One of the most challenging tasks in Analog to Digital Converter (ADC) design is to adapt the circuitry to ever new CMOS process technology. For digital circuits the number of gates per square mm app. doubles per chip generation. Integration of analog parts in newer deep submicron technologies is much more tough and additionally complicated because the usable voltage ranges are decreasing with every new integration step. This paper shows an approach which only uses 2 resistors and 1 capacitor which are located outside a pure digital chip. So all integration advantages of pure digital chips are preserved, there is no design effort for a new chip generation and the ADC also can be used for FPGAs. Resolutions of up to 16 bit are achievable. Sample rates in the 1 MHz region are feasible so that the approach is also useful for ADCs for xDSL technologies.

Programmable Remapper with Single Flow Architecture

NASA Technical Reports Server (NTRS)

Fisher, Timothy E. (Inventor)

1993-01-01

An apparatus for image processing comprising a camera for receiving an original visual image and transforming the original visual image into an analog image, a first converter for transforming the analog image of the camera to a digital image, a processor having a single flow architecture for receiving the digital image and producing, with a single algorithm, an output image, a second converter for transforming the digital image of the processor to an analog image, and a viewer for receiving the analog image, transforming the analog image into a transformed visual image for observing the transformations applied to the original visual image. The processor comprises one or more subprocessors for the parallel reception of a digital image for producing an output matrix of the transformed visual image. More particularly, the processor comprises a plurality of subprocessors for receiving in parallel and transforming the digital image for producing a matrix of the transformed visual image, and an output interface means for receiving the respective portions of the transformed visual image from the respective subprocessor for producing an output matrix of the transformed visual image.

National Park Service digital transit data sharing pilot results and discussion

DOT National Transportation Integrated Search

2017-04-06

This report describes the National Park Services pilot project to convert select NPS transit schedules to a digital format, known as General Transit Feed Specification (GTFS), in order to share more widely with the public. The GTFS pilot effort be...

Enhancements for digital imaging of gusset plate connections : fisheye and image stitching.

DOT National Transportation Integrated Search

2011-09-01

This report describes techniques to convert fisheye digital images of gusset plates to perspective images (defish). It also describes methods to stitch together partial images of a gusset plate into a composite of the complete gusset plate. The conve...

Fourier emission infrared microspectrophotometer for surface analysis. I - Application to lubrication problems

NASA Technical Reports Server (NTRS)

Lauer, J. L.; King, V. W.

1979-01-01

A far-infrared interferometer was converted into an emission microspectrophotometer for surface analysis. To cover the mid-infrared as well as the far-infrared the Mylar beamsplitter was made replaceable by a germanium-coated salt plate, and the Moire fringe counting system used to locate the moveable Michelson mirror was improved to read 0.5 micron of mirror displacement. Digital electronics and a dedicated minicomputer were installed for data collection and processing. The most critical element for the recording of weak emission spectra from small areas was, however, a reflecting microscope objective and phase-locked signal detection with simultaneous referencing to a blackbody source. An application of the technique to lubrication problems is shown.

Multi-channel spatialization systems for audio signals

NASA Technical Reports Server (NTRS)

Begault, Durand R. (Inventor)

1993-01-01

Synthetic head related transfer functions (HRTF's) for imposing reprogrammable spatial cues to a plurality of audio input signals included, for example, in multiple narrow-band audio communications signals received simultaneously are generated and stored in interchangeable programmable read only memories (PROM's) which store both head related transfer function impulse response data and source positional information for a plurality of desired virtual source locations. The analog inputs of the audio signals are filtered and converted to digital signals from which synthetic head related transfer functions are generated in the form of linear phase finite impulse response filters. The outputs of the impulse response filters are subsequently reconverted to analog signals, filtered, mixed, and fed to a pair of headphones.

Multi-channel spatialization system for audio signals

NASA Technical Reports Server (NTRS)

Begault, Durand R. (Inventor)

1995-01-01

Synthetic head related transfer functions (HRTF's) for imposing reprogramable spatial cues to a plurality of audio input signals included, for example, in multiple narrow-band audio communications signals received simultaneously are generated and stored in interchangeable programmable read only memories (PROM's) which store both head related transfer function impulse response data and source positional information for a plurality of desired virtual source locations. The analog inputs of the audio signals are filtered and converted to digital signals from which synthetic head related transfer functions are generated in the form of linear phase finite impulse response filters. The outputs of the impulse response filters are subsequently reconverted to analog signals, filtered, mixed and fed to a pair of headphones.

A multi-channel low-power system-on-chip for single-unit recording and narrowband wireless transmission of neural signal.

PubMed

Bonfanti, A; Ceravolo, M; Zambra, G; Gusmeroli, R; Spinelli, A S; Lacaita, A L; Angotzi, G N; Baranauskas, G; Fadiga, L

2010-01-01

This paper reports a multi-channel neural recording system-on-chip (SoC) with digital data compression and wireless telemetry. The circuit consists of a 16 amplifiers, an analog time division multiplexer, an 8-bit SAR AD converter, a digital signal processor (DSP) and a wireless narrowband 400-MHz binary FSK transmitter. Even though only 16 amplifiers are present in our current die version, the whole system is designed to work with 64 channels demonstrating the feasibility of a digital processing and narrowband wireless transmission of 64 neural recording channels. A digital data compression, based on the detection of action potentials and storage of correspondent waveforms, allows the use of a 1.25-Mbit/s binary FSK wireless transmission. This moderate bit-rate and a low frequency deviation, Manchester-coded modulation are crucial for exploiting a narrowband wireless link and an efficient embeddable antenna. The chip is realized in a 0.35- εm CMOS process with a power consumption of 105 εW per channel (269 εW per channel with an extended transmission range of 4 m) and an area of 3.1 × 2.7 mm(2). The transmitted signal is captured by a digital TV tuner and demodulated by a wideband phase-locked loop (PLL), and then sent to a PC via an FPGA module. The system has been tested for electrical specifications and its functionality verified in in-vivo neural recording experiments.

Digital rotation measurement unit

DOEpatents

Sanderson, S.N.

1983-09-30

A digital rotation indicator is disclosed for monitoring the position of a valve member having a movable actuator. The indicator utilizes mercury switches adapted to move in cooperation with the actuator. Each of the switches produces an output as it changes state when the actuator moves. A direction detection circuit is connected to the switches to produce a first digital signal indicative of the direction of rotation of the actuator. A count pulse generating circuit is also connected to the switches to produce a second digital pulse signal having count pulses corresponding to a change of state of any of the mercury switches. A reset pulse generating circuit is provided to generate a reset pulse each time a count pulse is generated. An up/down counter is connected to receive the first digital pulse signal and the second digital pulse signal and to count the pulses of the second digital pulse signal either up or down depending upon the instantaneous digital value of the first digital signal whereby a running count indicative of the movement of the actuator is maintained.

Clinical Study of Orthogonal-View Phase-Matched Digital Tomosynthesis for Lung Tumor Localization.

PubMed

Zhang, You; Ren, Lei; Vergalasova, Irina; Yin, Fang-Fang

2017-01-01

Compared to cone-beam computed tomography, digital tomosynthesis imaging has the benefits of shorter scanning time, less imaging dose, and better mechanical clearance for tumor localization in radiation therapy. However, for lung tumors, the localization accuracy of the conventional digital tomosynthesis technique is affected by the lack of depth information and the existence of lung tumor motion. This study investigates the clinical feasibility of using an orthogonal-view phase-matched digital tomosynthesis technique to improve the accuracy of lung tumor localization. The proposed orthogonal-view phase-matched digital tomosynthesis technique benefits from 2 major features: (1) it acquires orthogonal-view projections to improve the depth information in reconstructed digital tomosynthesis images and (2) it applies respiratory phase-matching to incorporate patient motion information into the synthesized reference digital tomosynthesis sets, which helps to improve the localization accuracy of moving lung tumors. A retrospective study enrolling 14 patients was performed to evaluate the accuracy of the orthogonal-view phase-matched digital tomosynthesis technique. Phantom studies were also performed using an anthropomorphic phantom to investigate the feasibility of using intratreatment aggregated kV and beams' eye view cine MV projections for orthogonal-view phase-matched digital tomosynthesis imaging. The localization accuracy of the orthogonal-view phase-matched digital tomosynthesis technique was compared to that of the single-view digital tomosynthesis techniques and the digital tomosynthesis techniques without phase-matching. The orthogonal-view phase-matched digital tomosynthesis technique outperforms the other digital tomosynthesis techniques in tumor localization accuracy for both the patient study and the phantom study. For the patient study, the orthogonal-view phase-matched digital tomosynthesis technique localizes the tumor to an average (± standard deviation) error of 1.8 (0.7) mm for a 30° total scan angle. For the phantom study using aggregated kV-MV projections, the orthogonal-view phase-matched digital tomosynthesis localizes the tumor to an average error within 1 mm for varying magnitudes of scan angles. The pilot clinical study shows that the orthogonal-view phase-matched digital tomosynthesis technique enables fast and accurate localization of moving lung tumors.

Simultaneous DC and three phase output using hybrid converter

NASA Astrophysics Data System (ADS)

Surenderanath, S.; Rathnavel, P.; Prakash, G.; Rayavel, P.

2018-04-01

This Paper introduces new hybrid converter topologies which can supply simultaneously three phase AC as well as DC from a single DC source. The new Hybrid Converter is derived from the single switch controlled Boost converter by replacing the controlled switch with voltage source inverter (VSI). This new hybrid converter has the advantages like reduced number of switches as compared with conventional design having separate converter for supplying three phase AC and DC loads, provide DC and three AC outputs with an increased reliability, resulting from the inherent shoot through protection in the inverter stage. The proposed converter, studied in this paper, is called Boost-Derived Hybrid Converter (BDHC) as it is obtained from the conventional boost topology. A DSPIC based feedback controller is designed to regulate the DC as well as AC outputs. The proposed Converter can supply DC and AC loads at 95 V and 35 V (line to ground) respectively from a 48 V DC source.

Down syndrome in diverse populations.

PubMed

Kruszka, Paul; Porras, Antonio R; Sobering, Andrew K; Ikolo, Felicia A; La Qua, Samantha; Shotelersuk, Vorasuk; Chung, Brian H Y; Mok, Gary T K; Uwineza, Annette; Mutesa, Leon; Moresco, Angélica; Obregon, María Gabriela; Sokunbi, Ogochukwu Jidechukwu; Kalu, Nnenna; Joseph, Daniel Akinsanya; Ikebudu, Desmond; Ugwu, Christopher Emeka; Okoromah, Christy A N; Addissie, Yonit A; Pardo, Katherine L; Brough, J Joseph; Lee, Ni-Chung; Girisha, Katta M; Patil, Siddaramappa Jagdish; Ng, Ivy S L; Min, Breana Cham Wen; Jamuar, Saumya S; Tibrewal, Shailja; Wallang, Batriti; Ganesh, Suma; Sirisena, Nirmala D; Dissanayake, Vajira H W; Paththinige, C Sampath; Prabodha, L B Lahiru; Richieri-Costa, Antonio; Muthukumarasamy, Premala; Thong, Meow-Keong; Jones, Kelly L; Abdul-Rahman, Omar A; Ekure, Ekanem Nsikak; Adeyemo, Adebowale A; Summar, Marshall; Linguraru, Marius George; Muenke, Maximilian

2017-01-01

Down syndrome is the most common cause of cognitive impairment and presents clinically with universally recognizable signs and symptoms. In this study, we focus on exam findings and digital facial analysis technology in individuals with Down syndrome in diverse populations. Photos and clinical information were collected on 65 individuals from 13 countries, 56.9% were male and the average age was 6.6 years (range 1 month to 26 years; SD = 6.6 years). Subjective findings showed that clinical features were different across ethnicities (Africans, Asians, and Latin Americans), including brachycephaly, ear anomalies, clinodactyly, sandal gap, and abundant neck skin, which were all significantly less frequent in Africans (P < 0.001, P < 0.001, P < 0.001, P < 0.05, and P < 0.05, respectively). Evaluation using a digital facial analysis technology of a larger diverse cohort of newborns to adults (n = 129 cases; n = 132 controls) was able to diagnose Down syndrome with a sensitivity of 0.961, specificity of 0.924, and accuracy of 0.943. Only the angles at medial canthus and ala of the nose were common significant findings amongst different ethnicities (Caucasians, Africans, and Asians) when compared to ethnically matched controls. The Asian group had the least number of significant digital facial biometrics at 4, compared to Caucasians at 8 and Africans at 7. In conclusion, this study displays the wide variety of findings across different geographic populations in Down syndrome and demonstrates the accuracy and promise of digital facial analysis technology in the diagnosis of Down syndrome internationally. © 2016 Wiley Periodicals, Inc. © 2016 Wiley Periodicals, Inc.

An Airborne Programmable Digital to Video Converter Interface and Operation Manual.

DTIC Science & Technology

1981-02-01

Identify by block number) SCAN CONVERTER VIDEO DISPLAY TELEVISION DISPLAY 20. ABSTRACT (Continue on reverse oide If necessary and Identify by block...programmable cathode ray tube (CRT) controller which is accessed by the CPU to permit operation in a wide variety of modes. The Alphanumeric Generator

42 CFR 37.2 - Definitions.

Code of Federal Regulations, 2013 CFR

2013-10-01

... radiography (CR) is the term for digital X-ray image acquisition systems that detect X-ray signals using a... stimulating laser beam to convert the latent radiographic image to electronic signals which are then processed... image acquisition systems in which the X-ray signals received by the image detector are converted nearly...

State trajectories used to observe and control dc-to-dc converters

NASA Technical Reports Server (NTRS)

Burns, W. W., III; Wilson, T. G.

1976-01-01

State-plane analysis techniques are employed to study the voltage stepup energy-storage dc-to-dc converter. Within this framework, an example converter operating under the influence of a constant on-time and a constant frequency controller is examined. Qualitative insight gained through this approach is used to develop a conceptual free-running control law for the voltage stepup converter which can achieve steady-state operation in one on/off cycle of control. Digital computer simulation data are presented to illustrate and verify the theoretical discussions presented.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

The Microcomputer as an Educational Laboratory Workstation.

ERIC Educational Resources Information Center

Ciociolo, James M.

1983-01-01

Describes laboratory workstations which provide direct connection for monitoring and control of analytical instruments such as pH meters, spectrophotometers, temperature, and chromatographic instruments. This is accomplished through analog/digital and digital/analog converters for analog signals and input/output devices for on/off signals.…

Digital radiographic imaging: is the dental practice ready?

PubMed

Parks, Edwin T

2008-04-01

Digital radiographic imaging is slowly, but surely, replacing film-based imaging. It has many advantages over traditional imaging, but the technology also has some drawbacks. The author presents an overview of the types of digital image receptors available, image enhancement software and the range of costs for the new technology. PRACTICE IMPLICATIONS. The expenses associated with converting to digital radiographic imaging are considerable. The purpose of this article is to provide the clinician with an overview of digital radiographic imaging technology so that he or she can be an informed consumer when evaluating the numerous digital systems in the marketplace.

Enterprise Implementation of Digital Pathology: Feasibility, Challenges, and Opportunities.

PubMed

Hartman, D J; Pantanowitz, L; McHugh, J S; Piccoli, A L; OLeary, M J; Lauro, G R

2017-10-01

Digital pathology is becoming technically possible to implement for routine pathology work. At our institution, we have been using digital pathology for second opinion intraoperative consultations for over 10 years. Herein, we describe our experience in converting to a digital pathology platform for primary pathology diagnosis. We implemented an incremental rollout for digital pathology on subspecialty benches, beginning with cases that contained small amounts of tissue (biopsy specimens). We successfully scanned over 40,000 slides through our digital pathology system. Several lessons (both challenges and opportunities) were learned through this implementation. A successful conversion to digital pathology requires pre-imaging adjustments, integrated software and post-imaging evaluations.

Method and Apparatus for Improving the Resolution of Digitally Sampled Analog Data

NASA Technical Reports Server (NTRS)

Liaghati, Amir L. (Inventor)

2017-01-01

A system and method is described for converting an analog signal into a digital signal. The gain and offset of an ADC is dynamically adjusted so that the N-bits of input data are assigned to a narrower channel instead of the entire input range of the ADC. This provides greater resolution in the range of interest without generating longer digital data strings.

Preliminary study of crust-upper mantle structure of the Tibetan Plateau by using broadband teleseismic body waveforms

NASA Astrophysics Data System (ADS)

Zhu, Lu-Pei; Zeng, Rong-Sheng; Wu, Francis T.; Owens, Thomas J.; Randall, George E.

1993-05-01

As part of a joint Sino-U.S. research project to study the deep structure of the Tibetan Plateau, 11 broadband digital seismic recorders were deployed on the Plateau for one year of passive seismic recording. In this report we use teleseimic P waveforms to study the seismic velocity structure of crust and upper mantle under three stations by receiver function inversion. The receiver function is obtained by first rotating two horizontal components of seismic records into radial and tangential components and then deconvolving the vertical component from them. The receiver function depends only on the structure near the station because the source and path effects have been removed by the deconvolution. To suppress noise, receiver functions calculated from events clustered in a small range of back-azimuths and epicentral distances are stacked. Using a matrix formalism describing the propagation of elastic waves in laterally homogeneous stratified medium, a synthetic receiver function and differential receiver functions for the parameters in each layer can be calculated to establish a linearized inversion for one-dimensional velocity structure. Preliminary results of three stations, Wen-quan, Golmud and Xigatze (Coded as WNDO, TUNL and XIGA), located in central, northern and southern Plateau are given in this paper. The receiver functions of all three stations show clear P-S converted phases. The time delays of these converted phases relative to direct P arrivals are: WNDO 7.9s (for NE direction) and 8.3s (for SE direction), TUNL 8.2s, XIGA 9.0s. Such long time delays indicate the great thickness of crust under the Plateau. The differences between receiver function of these three station shows the tectonic difference between southern and north-central Plateau. The waveforms of the receiver functions for WNDO and TUNL are very simple, while the receiver function of XIGA has an additional midcrustal converted phase. The S wave velocity structures at these three stations are estimated from inversions of the receiver function. The crustal shear wave velocities at WNDO and TUNL are vertically homogeneous, with value between 3.5 3.6 km/s down to Moho. This value in the lower crust is lower than the normal value for the lower crust of continents, which is consistent with the observed strong Sn attenuation in this region. The velocity structure at XIGA shows a velocity discontinuity at depth of 20 km and high velocity value of 4.0 km/s in the midcrust between 20 30 km depth. Similar results are obtained from a DSS profile in southern Tibet. The velocity under XIGA decreases below a depth of 30 km, reaching the lowest value of 3.2 km/s between 50 55 km. depth. This may imply that the Indian crust underthrusts the low part of Tibetan crust in the southern Plateau, forming a “double crust”. The crustal thickness at each of these sites is: WNDO, 68 km; TUNL, 70 km; XI-GA, 80 km.

Digital polarization holography advancing geometrical phase optics.

PubMed

De Sio, Luciano; Roberts, David E; Liao, Zhi; Nersisyan, Sarik; Uskova, Olena; Wickboldt, Lloyd; Tabiryan, Nelson; Steeves, Diane M; Kimball, Brian R

2016-08-08

Geometrical phase or the fourth generation (4G) optics enables realization of optical components (lenses, prisms, gratings, spiral phase plates, etc.) by patterning the optical axis orientation in the plane of thin anisotropic films. Such components exhibit near 100% diffraction efficiency over a broadband of wavelengths. The films are obtained by coating liquid crystalline (LC) materials over substrates with patterned alignment conditions. Photo-anisotropic materials are used for producing desired alignment conditions at the substrate surface. We present and discuss here an opportunity of producing the widest variety of "free-form" 4G optical components with arbitrary spatial patterns of the optical anisotropy axis orientation with the aid of a digital spatial light polarization converter (DSLPC). The DSLPC is based on a reflective, high resolution spatial light modulator (SLM) combined with an "ad hoc" optical setup. The most attractive feature of the use of a DSLPC for photoalignment of nanometer thin photo-anisotropic coatings is that the orientation of the alignment layer, and therefore of the fabricated LC or LC polymer (LCP) components can be specified on a pixel-by-pixel basis with high spatial resolution. By varying the optical magnification or de-magnification the spatial resolution of the photoaligned layer can be adjusted to an optimum for each application. With a simple "click" it is possible to record different optical components as well as arbitrary patterns ranging from lenses to invisible labels and other transparent labels that reveal different images depending on the side from which they are viewed.

On the Use of Calibration Explosions at the Former Semipalatinsk Test Site for Compiling a Travel-time Model of the Crust and Upper Mantle

NASA Astrophysics Data System (ADS)

Belyashova, N. N.; Shacilov, V. I.; Mikhailova, N. N.; Komarov, I. I.; Sinyova, Z. I.; Belyashov, A. V.; Malakhova, M. N.

- Two chemical calibration explosions, conducted at the former Semipalatinsk nuclear test site in 1998 with charges of 25 tons and 100 tons TNT, have been used for developing travel-time curves and generalized one-dimensional velocity models of the crust and upper mantle of the platform region of Kazakhstan. The explosions were recorded by a number of digital seismic stations, located in Kazakhstan at distances ranging from 0 to 720km. The travel-time tables developed in this paper cover the phases P, Pn, Pg, S, Sn, Lg in a range of 0-740km and the velocity models apply to the crust down to 44km depth and to the mantle down to 120km. A comparison of the compiled travel-time tables with existing travel-time tables of CSE and IASPEI91 is presented.

A design method for high performance seismic data acquisition based on oversampling delta-sigma modulation

NASA Astrophysics Data System (ADS)

Gao, Shanghua; Xue, Bing

2017-04-01

The dynamic range of the currently most widely used 24-bit seismic data acquisition devices is 10-20 dB lower than that of broadband seismometers, and this can affect the completeness of seismic waveform recordings under certain conditions. However, this problem is not easy to solve because of the lack of analog to digital converter (ADC) chips with more than 24 bits in the market. So the key difficulties for higher-resolution data acquisition devices lie in achieving more than 24-bit ADC circuit. In the paper, we propose a method in which an adder, an integrator, a digital to analog converter chip, a field-programmable gate array, and an existing low-resolution ADC chip are used to build a third-order 16-bit oversampling delta-sigma modulator. This modulator is equipped with a digital decimation filter, thus forming a complete analog to digital converting circuit. Experimental results show that, within the 0.1-40 Hz frequency range, the circuit board's dynamic range reaches 158.2 dB, its resolution reaches 25.99 dB, and its linearity error is below 2.5 ppm, which is better than what is achieved by the commercial 24-bit ADC chips ADS1281 and CS5371. This demonstrates that the proposed method may alleviate or even solve the amplitude-limitation problem that broadband observation systems so commonly have to face during strong earthquakes.

Silicon-photonic interferometric biosensor using active phase demodulation

NASA Astrophysics Data System (ADS)

Marin, Y.; Toccafondo, V.; Velha, P.; Scarano, S.; Tirelli, S.; Nottola, A.; Jeong, Y.; Jeon, H. P.; Minunni, M.; Di Pasquale, F.; Oton, C. J.

2018-02-01

Silicon photonics is becoming a consolidated technology, mainly in the telecom/datacom sector, but with a great potential in the chemical and biomedical sensor market too, mainly due to its CMOS compatibility, which allows massfabrication of huge numbers of miniaturized devices at a very low cost per chip. Integrated photonic sensors, typically based on resonators, interferometers, or periodic structures, are easy to multiplex as the light is confined in optical waveguides. In this work, we present a silicon-photonic sensor capable of measuring refractive index and chemical binding of biomolecules on the surface, using a low-cost phase interrogation scheme. The sensor consists of a pair of balanced Mach-Zehnder interferometers with interaction lengths of 2.5 mm and 22 mm, wound to a sensing area of only 500 μm x500 μm. The phase interrogation is performed with a fixed laser and an active phase demodulation approach based on a phase generated carrier (PGC) technique using a phase demodulator integrated within the chip. No laser tuning is required, and the technique can extract the univocal phase value with no sensitivity fading. The detection only requires a photo-receiver per interferometer, analog-to-digital conversion, and simple processing performed in real-time. We present repeatable and linear refractive index measurements, with a detection limit down to 4.7·10-7 RIU. We also present sensing results on a chemically-functionalized sample, where anti-BSA to BSA (bovine serum albumin) binding curves are clearly visible for concentrations down to 5 ppm. Considering the advantages of silicon photonics, this device has great potential over several applications in the chemical/biochemical sensing industry.

Digital Beamforming Scatterometer

NASA Technical Reports Server (NTRS)

Rincon, Rafael F.; Vega, Manuel; Kman, Luko; Buenfil, Manuel; Geist, Alessandro; Hillard, Larry; Racette, Paul

2009-01-01

This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate feeds for vertical and horizontal polarization. System upgrades to dual polarization are currently under way. The DBSAR processor is a reconfigurable data acquisition and processor system capable of real-time, high-speed data processing. DBSAR uses an FPGA-based architecture to implement digitally down-conversion, in-phase and quadrature (I/Q) demodulation, and subsequent radar specific algorithms. The core of the processor board consists of an analog-to-digital (AID) section, three Altera Stratix field programmable gate arrays (FPGAs), an ARM microcontroller, several memory devices, and an Ethernet interface. The processor also interfaces with a navigation board consisting of a GPS and a MEMS gyro. The processor has been configured to operate in scatterometer, Synthetic Aperture Radar (SAR), and altimeter modes. All the modes are based on digital beamforming which is a digital process that generates the far-field beam patterns at various scan angles from voltages sampled in the antenna array. This technique allows steering the received beam and controlling its beam-width and side-lobe. Several beamforming techniques can be implemented each characterized by unique strengths and weaknesses, and each applicable to different measurement scenarios. In Scatterometer mode, the radar is capable to.generate a wide beam or scan a narrow beam on transmit, and to steer the received beam on processing while controlling its beamwidth and side-lobe level. Table I lists some important radar characteristics

A passerine spreads its tail to facilitate a rapid recovery of its body posture during hovering

PubMed Central

Su, Jian-Yuan; Ting, Shang-Chieh; Chang, Yu-Hung; Yang, Jing-Tang

2012-01-01

We demonstrate experimentally that a passerine exploits tail spreading to intercept the downward flow induced by its wings to facilitate the recovery of its posture. The periodic spreading of its tail by the White-eye bird exhibits a phase correlation with both wingstroke motion and body oscillation during hovering flight. During a downstroke, a White-eye's body undergoes a remarkable pitch-down motion, with the tail undergoing an upward swing. This pitch-down motion becomes appropriately suppressed at the end of the downstroke; the bird's body posture then recovers gradually to its original status. Employing digital particle-image velocimetry, we show that the strong downward flow induced by downstroking the wings serves as an external jet flow impinging upon the tail, providing a depressing force on the tail to counteract the pitch-down motion of the bird's body. Spreading of the tail enhances a rapid recovery of the body posture because increased forces are experienced. The maximum force experienced by a spread tail is approximately 2.6 times that of a non-spread tail. PMID:22258552

A passerine spreads its tail to facilitate a rapid recovery of its body posture during hovering.

PubMed

Su, Jian-Yuan; Ting, Shang-Chieh; Chang, Yu-Hung; Yang, Jing-Tang

2012-07-07

We demonstrate experimentally that a passerine exploits tail spreading to intercept the downward flow induced by its wings to facilitate the recovery of its posture. The periodic spreading of its tail by the White-eye bird exhibits a phase correlation with both wingstroke motion and body oscillation during hovering flight. During a downstroke, a White-eye's body undergoes a remarkable pitch-down motion, with the tail undergoing an upward swing. This pitch-down motion becomes appropriately suppressed at the end of the downstroke; the bird's body posture then recovers gradually to its original status. Employing digital particle-image velocimetry, we show that the strong downward flow induced by downstroking the wings serves as an external jet flow impinging upon the tail, providing a depressing force on the tail to counteract the pitch-down motion of the bird's body. Spreading of the tail enhances a rapid recovery of the body posture because increased forces are experienced. The maximum force experienced by a spread tail is approximately 2.6 times that of a non-spread tail.

Fast transient digitizer

DOEpatents

Villa, Francesco

1982-01-01

Method and apparatus for sequentially scanning a plurality of target elements with an electron scanning beam modulated in accordance with variations in a high-frequency analog signal to provide discrete analog signal samples representative of successive portions of the analog signal; coupling the discrete analog signal samples from each of the target elements to a different one of a plurality of high speed storage devices; converting the discrete analog signal samples to equivalent digital signals; and storing the digital signals in a digital memory unit for subsequent measurement or display.

Priming by NUMB3R5 Does Not Involve Top-Down Feedback

ERIC Educational Resources Information Center

Kinoshita, Sachiko; Lagoutaris, Stephanie

2010-01-01

Using the same-different task, Perea, Dunabeitia, Pollatsek, and Carreiras (2009) showed that digits resembling letters ("leet digits"; e.g., 1 = "I", 4 = "A") primed pseudoword strings (e.g., "V35Z3D-VESZED"), but letters resembling digits ("leet letters") did not prime digit strings (e.g.,…

SWARM: A Compact High Resolution Correlator and Wideband VLBI Phased Array Upgrade for SMA

NASA Astrophysics Data System (ADS)

Weintroub, Jonathan

2014-06-01

A new digital back end (DBE) is being commissioned on Mauna Kea. The “SMA Wideband Astronomical ROACH2 Machine”, or SWARM, processes a 4 GHz usable band in single polarization mode and is flexibly reconfigurable for 2 GHz full Stokes dual polarization. The hardware is based on the open source Reconfigurable Open Architecture Computing Hardware 2 (ROACH2) platform from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER). A 5 GSps quad-core analog-to-digital converter board uses a commercial chip from e2v installed on a CASPER-standard printed circuit board designed by Homin Jiang’s group at ASIAA. Two ADC channels are provided per ROACH2, each sampling a 2.3 GHz Nyquist band generated by a custom wideband block downconverter (BDC). The ROACH2 logic includes 16k-channel Polyphase Filterbank (F-engine) per input followed by a 10 GbE switch based corner-turn which feeds into correlator-accumulator logic (X-engines) co-located with the F-engines. This arrangement makes very effective use of a small amount of digital hardware (just 8 ROACH2s in 1U rack mount enclosures). The primary challenge now is to meet timing at full speed for a large and very complex FPGA bit code. Design of the VLBI phased sum and recorder interface logic is also in process. Our poster will describe the instrument design, with the focus on the particular challenges of ultra wideband signal processing. Early connected commissioning and science verification data will be presented.

A novel dynamic sensing of wearable digital textile sensor with body motion analysis.

PubMed

Yang, Chang-Ming; Lin, Zhan-Sheng; Hu, Chang-Lin; Chen, Yu-Shih; Ke, Ling-Yi; Chen, Yin-Rui

2010-01-01

This work proposes an innovative textile sensor system to monitor dynamic body movement and human posture by attaching wearable digital sensors to analyze body motion. The proposed system can display and analyze signals when individuals are walking, running, veering around, walking up and down stairs, as well as falling down with a wearable monitoring system, which reacts to the coordination between the body and feet. Several digital sensor designs are embedded in clothing and wear apparel. Any pressure point can determine which activity is underway. Importantly, wearable digital sensors and a wearable monitoring system allow adaptive, real-time postures, real time velocity, acceleration, non-invasive, transmission healthcare, and point of care (POC) for home and non-clinical environments.

Method and apparatus for enhancing microchannel plate data

DOEpatents

Thoe, Robert S.

1987-01-01

A method and apparatus for determining centroid channel locations is disclosed for use in a system activated by one or more multichannel plates (16,18) and including a linear diode array (24) providing channels of information 1, 2, . . . , n, . . . , N containing signal amplitudes A.sub.n. A source of analog A.sub.n signals (40), and a source of digital clock signals n (48), are provided. Non-zero A.sub.n values are detected in a discriminator (42). A digital signal representing p, the value of n immediately preceding that whereat A.sub.n takes its first non-zero value, is generated in a scaler (50). The analog A.sub.n signals are converted to digital in an analog to digital converter (44). The digital A.sub.n signals are added to produce a digital .SIGMA.A.sub.n signal in a full adder (46). Digital 1, 2, . . . , m signals representing the number of non-zero A.sub.n are produced by a discriminator pulse counter (52). Digital signals representing 1 A.sub.p+ 1, 2 A.sub.p+2, . . . , m A.sub.p+m are produced by pairwise multiplication in multiplier (54). These signals are added in multiplier summer (56) to produce a digital .SIGMA.nA.sub.n -p.SIGMA.A.sub.n signal. This signal is divided by the digital .SIGMA.A.sub.n signal in divider (58) to provide a digital (.SIGMA.nA.sub.n /.SIGMA.A.sub.n) -p signal. Finally, this last signal is added to the digital p signal in an offset summer (60) to provide .SIGMA.nA.sub.n /.SIGMA.A.sub.n, the centroid channel locations.

Real time implementation and control validation of the wind energy conversion system

NASA Astrophysics Data System (ADS)

Sattar, Adnan

The purpose of the thesis is to analyze dynamic and transient characteristics of wind energy conversion systems including the stability issues in real time environment using the Real Time Digital Simulator (RTDS). There are different power system simulation tools available in the market. Real time digital simulator (RTDS) is one of the powerful tools among those. RTDS simulator has a Graphical User Interface called RSCAD which contains detail component model library for both power system and control relevant analysis. The hardware is based upon the digital signal processors mounted in the racks. RTDS simulator has the advantage of interfacing the real world signals from the external devices, hence used to test the protection and control system equipments. Dynamic and transient characteristics of the fixed and variable speed wind turbine generating systems (WTGSs) are analyzed, in this thesis. Static Synchronous Compensator (STATCOM) as a flexible ac transmission system (FACTS) device is used to enhance the fault ride through (FRT) capability of the fixed speed wind farm. Two level voltage source converter based STATCOM is modeled in both VSC small time-step and VSC large time-step of RTDS. The simulation results of the RTDS model system are compared with the off-line EMTP software i.e. PSCAD/EMTDC. A new operational scheme for a MW class grid-connected variable speed wind turbine driven permanent magnet synchronous generator (VSWT-PMSG) is developed. VSWT-PMSG uses fully controlled frequency converters for the grid interfacing and thus have the ability to control the real and reactive powers simultaneously. Frequency converters are modeled in the VSC small time-step of the RTDS and three phase realistic grid is adopted with RSCAD simulation through the use of optical analogue digital converter (OADC) card of the RTDS. Steady state and LVRT characteristics are carried out to validate the proposed operational scheme. Simulation results show good agreement with real time simulation software and thus can be used to validate the controllers for the real time operation. Integration of the Battery Energy Storage System (BESS) with wind farm can smoothen its intermittent power fluctuations. The work also focuses on the real time implementation of the Sodium Sulfur (NaS) type BESS. BESS is integrated with the STATCOM. The main advantage of this system is that it can also provide the reactive power support to the system along with the real power exchange from BESS unit. BESS integrated with STATCOM is modeled in the VSC small time-step of the RTDS. The cascaded vector control scheme is used for the control of the STATCOM and suitable control is developed to control the charging/discharging of the NaS type BESS. Results are compared with Laboratory standard power system software PSCAD/EMTDC and the advantages of using RTDS in dynamic and transient characteristics analyses of wind farm are also demonstrated clearly.

Digital coherent receiver based transmitter penalty characterization.

PubMed

Geisler, David J; Kaufmann, John E

2016-12-26

For optical communications links where receivers are signal-power-starved, such as through free-space, it is important to design transmitters and receivers that can operate as close as practically possible to theoretical limits. A total system penalty is typically assessed in terms of how far the end-to-end bit-error rate (BER) is from these limits. It is desirable, but usually difficult, to determine the division of this penalty between the transmitter and receiver. This paper describes a new rigorous and computationally based method that isolates which portion of the penalty can be assessed against the transmitter. There are two basic parts to this approach: (1) use of a coherent optical receiver to perform frequency down-conversion of a transmitter's optical signal waveform to the electrical domain, preserving both optical field amplitude and phase information, and (2): software-based analysis of the digitized electrical waveform. The result is a single numerical metric that quantifies how close a transmitter's signal waveform is to the ideal, based on its BER performance with a perfect software-defined matched-filter receiver demodulator. A detailed description of applying the proposed methodology to the waveform characterization of an optical burst-mode differential phase-shifted keying (DPSK) transmitter is experimentally demonstrated.

Picosecond Resolution Time-to-Digital Converter Using Gm-C Integrator and SAR-ADC

NASA Astrophysics Data System (ADS)

Xu, Zule; Miyahara, Masaya; Matsuzawa, Akira

2014-04-01

A picosecond resolution time-to-digital converter (TDC) is presented. The resolution of a conventional delay chain TDC is limited by the delay of a logic buffer. Various types of recent TDCs are successful in breaking this limitation, but they require a significant calibration effort to achieve picosecond resolution with a sufficient linear range. To address these issues, we propose a simple method to break the resolution limitation without any calibration: a Gm-C integrator followed by a successive approximation register analog-to-digital converter (SAR-ADC). This translates the time interval into charge, and then the charge is quantized. A prototype chip was fabricated in 90 nm CMOS. The measurement results reveal a 1 ps resolution, a -0.6/0.7 LSB differential nonlinearity (DNL), a -1.1/2.3 LSB integral nonlinearity (INL), and a 9-bit range. The measured 11.74 ps single-shot precision is caused by the noise of the integrator. We analyze the noise of the integrator and propose an improved front-end circuit to reduce this noise. The proposal is verified by simulations showing the maximum single-shot precision is less than 1 ps. The proposed front-end circuit can also diminish the mismatch effects.

A flexible FPGA based QDC and TDC for the HADES and the CBM calorimeters

NASA Astrophysics Data System (ADS)

Rost, A.; Galatyuk, T.; Koenig, W.; Michel, J.; Pietraszko, J.; Skott, P.; Traxler, M.

2017-02-01

A Charge-to-Digital-Converter (QDC) and Time-to-Digital-Converter (TDC) based on a commercial FPGA (Field Programmable Gate Array) was developed to read out PMT signals of the planned HADES electromagnetic calorimeter (ECAL) at GSI Helmholtzzentrum für Schwerionenforschung GmbH (Darmstadt, Germany). The main idea is to convert the charge measurement of a detector signal into a time measurement, where the charge is encoded in the width of a digital pulse, while the arrival time information is encoded in the leading edge time of the pulse. The PaDiWa-AMPS prototype front-end board for the TRB3 (General Purpose Trigger and Readout Board—version 3) which implements this conversion method was developed and qualified. The already well established TRB3 platform provides the needed precise time measurements and serves as a data acquisition system. We present the read-out concept and the performance of the prototype boards in laboratory and also under beam conditions. First steps have been completed in order to adapt this concept to SiPM signals of the hadron calorimeter in the CBM experiment at the planned FAIR facility (Darmstadt).

A microcomputer-based data acquisition system for ECG, body and ambient temperatures measurement during bathing.

PubMed

Uokawa, Y; Yonezawa, Y; Caldwell, W M; Hahn, A W

2000-01-01

A data acquisition system employing a low power 8 bit microcomputer has been developed for heart rate variability monitoring before, during and after bathing. The system consists of three integral chest electrodes, two temperature sensors, an instrumentation amplifier, a low power 8-bit single chip microcomputer (SMC) and a 4 MB compact flash memory (CFM). The ECG from the electrodes is converted to an 8-bit digital format at a 1 ms rate by an A/D converter in the SMC. Both signals from the body and ambient temperature sensors are converted to an 8-bit digital format every 1 second. These data are stored by the CFM. The system is powered by a rechargeable 3.6 V lithium battery. The 4 x 11 x 1 cm system is encapsulated in epoxy and silicone, yielding a total volume of 44 cc. The weight is 100 g.

Submillisecond Optical Knife-Edge Testing

NASA Technical Reports Server (NTRS)

Thurlow, P.

1983-01-01

Fast computer-controlled sampling of optical knife-edge response (KER) signal increases accuracy of optical system aberration measurement. Submicrosecond-response detectors in optical focal plane convert optical signals to electrical signals converted to digital data, sampled and feed into computer for storage and subsequent analysis. Optical data are virtually free of effects of index-of-refraction gradients.

Implement trigger for a NI data acquisition card PCI 5105 in the measurement studio development environment for a high speed demodulator based on fiber Fabry-Pérot tunable filter (FFP-TF)

NASA Astrophysics Data System (ADS)

Zhang, Hongtao; Yang, Shangming; Fan, Lingling; Wang, Pengfei; Zhao, Xilin; Wang, Zhenhua; Cui, Hong-Liang

2010-04-01

In this paper we report a scheme of low-cost, small-size differential electrical converter to change analog trigger signals into digital trigger signals. This converter successfully resolves the incompatibility between the digital trigger mode of NI (National Instruments) data acquisition card PCI 5105 in Measurement Studio development environment for a demodulator and the requirement from instability of spectra of fiber Bragg grating (FBG) sensors. The instability is caused by intrinsic drifts of FFP-TF inside this high speed demodulator. The obtained results of frequency response about the converter have clearly demonstrated that this method is effective when the frequency of trigger signal is less than 3,000 Hz. This converter can satisfy the current requirements of demodulator based on FFP-TF, since mostly actual working scanning frequency of FFP-TF is less than 1,000 Hz. This method may be recommended to resolve similar problems for other NI customers who have developed their data acquisition system based on Measurement Studio.

Fast-response free-running dc-to-dc converter employing a state-trajectory control law

NASA Technical Reports Server (NTRS)

Huffman, S. D.; Burns, W. W., III; Wilson, T. G.; Owen, H. A., Jr.

1977-01-01

A recently proposed state-trajectory control law for a family of energy-storage dc-to-dc converters has been implemented for the voltage step-up configuration. Two methods of realization are discussed; one employs a digital processor and the other uses analog computational circuits. Performance characteristics of experimental voltage step-up converters operating under the control of each of these implementations are reported and compared to theoretical predictions and computer simulations.

Digital conversion of INEL archeological data using ARC/INFO and Oracle

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, R.D.; Brizzee, J.; White, L.

1993-11-04

This report documents the procedures used to convert archaeological data for the INEL to digital format, lists the equipment used, and explains the verification and validation steps taken to check data entry. It also details the production of an engineered interface between ARC/INFO and Oracle.

DC/DC Converter Stability Testing Study

NASA Technical Reports Server (NTRS)

Wang, Bright L.

2008-01-01

This report presents study results on hybrid DC/DC converter stability testing methods. An input impedance measurement method and a gain/phase margin measurement method were evaluated to be effective to determine front-end oscillation and feedback loop oscillation. In particular, certain channel power levels of converter input noises have been found to have high degree correlation with the gain/phase margins. It becomes a potential new method to evaluate stability levels of all type of DC/DC converters by utilizing the spectral analysis on converter input noises.

Digital phase shifter synchronizes local oscillators

NASA Technical Reports Server (NTRS)

Ali, S. M.

1978-01-01

Digital phase-shifting network is used as synchronous frequency multiplier for applications such as phase-locking two signals that may differ in frequency. Circuit has various phase-shift capability. Possible applications include data-communication systems and hybrid digital/analog phase-locked loops.

Compensator design for corrector magnet power supply of TPS facility

NASA Astrophysics Data System (ADS)

Wong, Y.-S.; Chen, J.-F.; Liu, K.-B.; Liu, C.-Y.; Wang, B.-S.

2017-10-01

From 2012 to 2015, Taiwan government has a most important technology project is Taiwan Photon Source (TPS), the total budget of TPS fund to over US300 million. It set up a synchrotron storage ring (electron energy of 3.3 GeV, circumference of 518 m, and low emittance) that provides one of the world's brightest synchrotron sources of x-rays. This study presents a compensator design for corrector magnet power supply to avoid limitations in stabilizing the frequency when the machine output current load is valid. A lead-lag compensator had been built in a full-bridge converter to improve the system bandwidth. Lead-lag compensators influence various disciplines, such as robotics, satellite control, automobile diagnostics, and laser frequency stabilization. These components are important building blocks in analog control systems and can also be used in digital control. A 50V output voltage and 10A output current prototype converter is fabricated in the laboratory. From the experimental results, the effectiveness of the control loop design can be verified from the gain margin and phase margin.

Compact FPGA-based beamformer using oversampled 1-bit A/D converters.

PubMed

Tomov, Borislav Gueorguiev; Jensen, Jørgen Arendt

2005-05-01

A compact medical ultrasound beamformer architecture that uses oversampled 1-bit analog-to-digital (A/D) converters is presented. Sparse sample processing is used, as the echo signal for the image lines is reconstructed in 512 equidistant focal points along the line through its in-phase and quadrature components. That information is sufficient for presenting a B-mode image and creating a color flow map. The high sampling rate provides the necessary delay resolution for the focusing. The low channel data width (1-bit) makes it possible to construct a compact beamformer logic. The signal reconstruction is done using finite impulse reponse (FIR) filters, applied on selected bit sequences of the delta-sigma modulator output stream. The approach allows for a multichannel beamformer to fit in a single field programmable gate array (FPGA) device. A 32-channel beamformer is estimated to occupy 50% of the available logic resources in a commercially available mid-range FPGA, and to be able to operate at 129 MHz. Simulation of the architecture at 140 MHz provides images with a dynamic range approaching 60 dB for an excitation frequency of 3 MHz.

Validation and Refinement of a Lunar Irradiance Model for Suomi NPP VIIRS Day-Night Band Quantitative Nighttime Applications

NASA Astrophysics Data System (ADS)

Miller, S. D.; Combs, C.; Wagner, S.; Viticchiè, B.; Walther, A.; Solbrig, J.

2014-12-01

The VIIRS Day-Night Band provides the first calibrated observations of nocturnal low-light visible/near-infrared (~500-900 nm response, 710 nm central wavelength) radiances, including reflected moonlight down to values of 3 × 10-5 W·m-2·sr-1. These novel measurements afford the first opportunity to attempt nighttime retrievals of optical depth for optically thick clouds when moonlight is available, thereby advancing our ability to observe the diurnal cycle of such structures as marine stratocumuli which are thought to play an important role in determining climate and climate feedbacks. In order to leverage the Day-Night Band measurements in this capacity, we must first convert the upwelling top-of-atmosphere radiances to equivalent values of reflectance. Doing so requires a detailed knowledge of the down-welling top-of-atmosphere lunar spectral irradiance which, unlike sunlight, varies significantly over the course of the ~29.5 day lunar cycle. This research summarizes the ongoing development, validation, and refinement of a lunar irradiance model designed to convert Day-Night Band radiances to equivalent lunar reflectance. Comparisons between daytime and nighttime Day-Night Band reflectance for vicarious calibration targets offering radiometric stability (e.g., White Sands, Salar de Uyuni, Dome-C, and snow fields) confirms the model's performance to within an expected ~10% uncertainty. An observed lunar-phase-dependent trend associated with the model's assumption of a disk-averaged albedo was addressed via analysis of a version of the model adapted for comparison against Meteosat Second Generation SEVIRI lunar measurements. The analysis resulted in a phase-dependent 6th order polynomial correction to the model and expected model uncertainty improvements to within ~5%. Examples of lunar reflectance imagery for operational applications and the provisional quantitative application of Day-Night Band lunar reflectance to nighttime cloud optical property retrievals, bearing relevance to the diurnally resolved global climate data record, are shown.

An Implantable Neural Sensing Microsystem with Fiber-Optic Data Transmission and Power Delivery

PubMed Central

Park, Sunmee; Borton, David A.; Kang, Mingyu; Nurmikko, Arto V.; Song, Yoon-Kyu

2013-01-01

We have developed a prototype cortical neural sensing microsystem for brain implantable neuroengineering applications. Its key feature is that both the transmission of broadband, multichannel neural data and power required for the embedded microelectronics are provided by optical fiber access. The fiber-optic system is aimed at enabling neural recording from rodents and primates by converting cortical signals to a digital stream of infrared light pulses. In the full microsystem whose performance is summarized in this paper, an analog-to-digital converter and a low power digital controller IC have been integrated with a low threshold, semiconductor laser to extract the digitized neural signals optically from the implantable unit. The microsystem also acquires electrical power and synchronization clocks via optical fibers from an external laser by using a highly efficient photovoltaic cell on board. The implantable unit employs a flexible polymer substrate to integrate analog and digital microelectronics and on-chip optoelectronic components, while adapting to the anatomical and physiological constraints of the environment. A low power analog CMOS chip, which includes preamplifier and multiplexing circuitry, is directly flip-chip bonded to the microelectrode array to form the cortical neurosensor device. PMID:23666130

Design and development of digital seismic amplifier recorder

DOE Office of Scientific and Technical Information (OSTI.GOV)

Samsidar, Siti Alaa; Afuar, Waldy; Handayani, Gunawan, E-mail: gunawanhandayani@gmail.com

2015-04-16

A digital seismic recording is a recording technique of seismic data in digital systems. This method is more convenient because it is more accurate than other methods of seismic recorders. To improve the quality of the results of seismic measurements, the signal needs to be amplified to obtain better subsurface images. The purpose of this study is to improve the accuracy of measurement by amplifying the input signal. We use seismic sensors/geophones with a frequency of 4.5 Hz. The signal is amplified by means of 12 units of non-inverting amplifier. The non-inverting amplifier using IC 741 with the resistor values 1KΩmore » and 1MΩ. The amplification results were 1,000 times. The results of signal amplification converted into digital by using the Analog Digital Converter (ADC). Quantitative analysis in this study was performed using the software Lab VIEW 8.6. The Lab VIEW 8.6 program was used to control the ADC. The results of qualitative analysis showed that the seismic conditioning can produce a large output, so that the data obtained is better than conventional data. This application can be used for geophysical methods that have low input voltage such as microtremor application.« less

Digitally controlled analog proportional-integral-derivative (PID) controller for high-speed scanning probe microscopy

NASA Astrophysics Data System (ADS)

Dukic, Maja; Todorov, Vencislav; Andany, Santiago; Nievergelt, Adrian P.; Yang, Chen; Hosseini, Nahid; Fantner, Georg E.

2017-12-01

Nearly all scanning probe microscopes (SPMs) contain a feedback controller, which is used to move the scanner in the direction of the z-axis in order to maintain a constant setpoint based on the tip-sample interaction. The most frequently used feedback controller in SPMs is the proportional-integral (PI) controller. The bandwidth of the PI controller presents one of the speed limiting factors in high-speed SPMs, where higher bandwidths enable faster scanning speeds and higher imaging resolution. Most SPM systems use digital signal processor-based PI feedback controllers, which require analog-to-digital and digital-to-analog converters. These converters introduce additional feedback delays which limit the achievable imaging speed and resolution. In this paper, we present a digitally controlled analog proportional-integral-derivative (PID) controller. The controller implementation allows tunability of the PID gains over a large amplification and frequency range, while also providing precise control of the system and reproducibility of the gain parameters. By using the analog PID controller, we were able to perform successful atomic force microscopy imaging of a standard silicon calibration grating at line rates up to several kHz.

Digitally controlled analog proportional-integral-derivative (PID) controller for high-speed scanning probe microscopy.

PubMed

Dukic, Maja; Todorov, Vencislav; Andany, Santiago; Nievergelt, Adrian P; Yang, Chen; Hosseini, Nahid; Fantner, Georg E

2017-12-01

Nearly all scanning probe microscopes (SPMs) contain a feedback controller, which is used to move the scanner in the direction of the z-axis in order to maintain a constant setpoint based on the tip-sample interaction. The most frequently used feedback controller in SPMs is the proportional-integral (PI) controller. The bandwidth of the PI controller presents one of the speed limiting factors in high-speed SPMs, where higher bandwidths enable faster scanning speeds and higher imaging resolution. Most SPM systems use digital signal processor-based PI feedback controllers, which require analog-to-digital and digital-to-analog converters. These converters introduce additional feedback delays which limit the achievable imaging speed and resolution. In this paper, we present a digitally controlled analog proportional-integral-derivative (PID) controller. The controller implementation allows tunability of the PID gains over a large amplification and frequency range, while also providing precise control of the system and reproducibility of the gain parameters. By using the analog PID controller, we were able to perform successful atomic force microscopy imaging of a standard silicon calibration grating at line rates up to several kHz.

A state-trajectory control law for dc-to-dc converters

NASA Technical Reports Server (NTRS)

Burns, W. W., III; Wilson, T. G.

1978-01-01

Mathematical representations of a state-plane switching boundary employed in a state-trajectory control law for dc-to-dc converters are derived. Several levels of approximation to the switching boundary equations are presented, together with an evaluation of the effects of nonideal operating characteristics of converter power stage components on the shape and location of the boundary and the behavior of a system controlled by it. Digital computer simulations of dc-to-dc converters operating in conjunction with each of these levels of control are presented and evaluated with respect to changes in transient and steady-state performance.

State-plane trajectories used to observe and control the behavior of a voltage step-up dc-to-dc converter

NASA Technical Reports Server (NTRS)

Burns, W. W., III; Wilson, T. G.

1976-01-01

State-plane analysis techniques are employed to study the voltage step up energy storage dc-to-dc converter. Within this framework, an example converter operating under the influence of a constant on time and a constant frequency controller is examined. Qualitative insight gained through this approach is used to develop a conceptual free running control law for the voltage step up converter which can achieve steady state operation in one on/off cycle of control. Digital computer simulation data is presented to illustrate and verify the theoretical discussions presented.