Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

PubMed

Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

2016-07-01

We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET. © The Author(s) 2016.

JMOSFET: A MOSFET parameter extractor with geometry-dependent terms

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Moore, B. T.

1985-01-01

The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.

Inversion channel diamond metal-oxide-semiconductor field-effect transistor with normally off characteristics.

PubMed

Matsumoto, Tsubasa; Kato, Hiromitsu; Oyama, Kazuhiro; Makino, Toshiharu; Ogura, Masahiko; Takeuchi, Daisuke; Inokuma, Takao; Tokuda, Norio; Yamasaki, Satoshi

2016-08-22

We fabricated inversion channel diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off characteristics. At present, Si MOSFETs and insulated gate bipolar transistors (IGBTs) with inversion channels are widely used because of their high controllability of electric power and high tolerance. Although a diamond semiconductor is considered to be a material with a strong potential for application in next-generation power devices, diamond MOSFETs with an inversion channel have not yet been reported. We precisely controlled the MOS interface for diamond by wet annealing and fabricated p-channel and planar-type MOSFETs with phosphorus-doped n-type body on diamond (111) substrate. The gate oxide of Al2O3 was deposited onto the n-type diamond body by atomic layer deposition at 300 °C. The drain current was controlled by the negative gate voltage, indicating that an inversion channel with a p-type character was formed at a high-quality n-type diamond body/Al2O3 interface. The maximum drain current density and the field-effect mobility of a diamond MOSFET with a gate electrode length of 5 μm were 1.6 mA/mm and 8.0 cm(2)/Vs, respectively, at room temperature.

Radiation hardness of β-Ga2O3 metal-oxide-semiconductor field-effect transistors against gamma-ray irradiation

NASA Astrophysics Data System (ADS)

Wong, Man Hoi; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Sasaki, Kohei; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka

2018-01-01

The effects of ionizing radiation on β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated. A gamma-ray tolerance as high as 1.6 MGy(SiO2) was demonstrated for the bulk Ga2O3 channel by virtue of weak radiation effects on the MOSFETs' output current and threshold voltage. The MOSFETs remained functional with insignificant hysteresis in their transfer characteristics after exposure to the maximum cumulative dose. Despite the intrinsic radiation hardness of Ga2O3, radiation-induced gate leakage and drain current dispersion ascribed respectively to dielectric damage and interface charge trapping were found to limit the overall radiation hardness of these devices.

Effects of drain bias on the statistical variation of double-gate tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Choi, Woo Young

2017-04-01

The effects of drain bias on the statistical variation of double-gate (DG) tunnel field-effect transistors (TFETs) are discussed in comparison with DG metal-oxide-semiconductor FETs (MOSFETs). Statistical variation corresponds to the variation of threshold voltage (V th), subthreshold swing (SS), and drain-induced barrier thinning (DIBT). The unique statistical variation characteristics of DG TFETs and DG MOSFETs with the variation of drain bias are analyzed by using full three-dimensional technology computer-aided design (TCAD) simulation in terms of the three dominant variation sources: line-edge roughness (LER), random dopant fluctuation (RDF) and workfunction variation (WFV). It is observed than DG TFETs suffer from less severe statistical variation as drain voltage increases unlike DG MOSFETs.

Silicon junctionless field effect transistors as room temperature terahertz detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marczewski, J., E-mail: jmarcz@ite.waw.pl; Tomaszewski, D.; Zaborowski, M.

2015-09-14

Terahertz (THz) radiation detection by junctionless metal-oxide-semiconductor field-effect transistors (JL MOSFETs) was studied and compared with THz detection using conventional MOSFETs. It has been shown that in contrast to the behavior of standard transistors, the junctionless devices have a significant responsivity also in the open channel (low resistance) state. The responsivity for a photolithographically defined JL FET was 70 V/W and the noise equivalent power 460 pW/√Hz. Working in the open channel state may be advantageous for THz wireless and imaging applications because of its low thermal noise and possible high operating speed or large bandwidth. It has been proven that themore » junctionless MOSFETs can also operate in a zero gate bias mode, which enables simplification of the THz array circuitry. Existing models of THz detection by MOSFETs were considered and it has been demonstrated that the process of detection by these junctionless devices cannot be explained within the framework of the commonly accepted models and therefore requires a new theoretical approach.« less

A Self-Aligned InGaAs Quantum-Well Metal-Oxide-Semiconductor Field-Effect Transistor Fabricated through a Lift-Off-Free Front-End Process

NASA Astrophysics Data System (ADS)

Lin, Jianqiang; Kim, Tae-Woo; Antoniadis, Dimitri A.; del Alamo, Jesús A.

2012-06-01

We present a novel n-type InGaAs quantum-well metal-oxide-semiconductor field-effect transistor (QW-MOSFET) fabricated by a self-aligned gate-last process and investigate relevant Si-like manufacturing issues in future III-V MOSFETs. The device structure features a composite InP/Al2O3 gate barrier with a capacitance equivalent thickness (CET) of 3 nm and non alloyed Mo ohmic contacts. We have found that RIE introduces significant damage to the intrinsic device resulting in poor current drive and subthreshold swing. The effect is largely removed through a thermal annealing step. Thermally annealed QW-MOSFETs exhibit a subthreshold swing of 95 mV/dec, indicative of excellent interfacial characteristics. The peak mobility of the MOSFET is 2780 cm2 V-1 s-1.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN bipolar junction transistors (BJTs), metal-oxide-semiconductor field effect transistors (MOSFETs), and static induction transistors (SITs) are given. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Postirradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori

2016-07-18

The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulationmore » by the gate and pinch off.« less

Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

2018-01-01

We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

Power Conditioning for MEMS-Based Waste Vibrational Energy Harvester

DTIC Science & Technology

2015-06-01

circuits ...........................................................................................18 Figure 18. Full-wave passive MOSFET rectifier...ABBREVIATIONS AC Alternative Current AlN Aluminum Nitride DC Direct Current LIA Lock-In Amplifier MEMS Microelectromechanical Systems MOSFET ...efficiency is achieved when input voltage is over 2–3 V [14]. Using metal-oxide-semiconductor field-effect transistors ( MOSFETs ) in a rectifier instead of

Thin film three-dimensional topological insulator metal-oxide-semiconductor field-effect-transistors: A candidate for sub-10 nm devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akhavan, N. D., E-mail: nima.dehdashti@uwa.edu.au; Jolley, G.; Umana-Membreno, G. A.

2014-08-28

Three-dimensional (3D) topological insulators (TI) are a new state of quantum matter in which surface states reside in the bulk insulating energy bandgap and are protected by time-reversal symmetry. It is possible to create an energy bandgap as a consequence of the interaction between the conduction band and valence band surface states from the opposite surfaces of a TI thin film, and the width of the bandgap can be controlled by the thin film thickness. The formation of an energy bandgap raises the possibility of thin-film TI-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). In this paper, we explore the performance of MOSFETs basedmore » on thin film 3D-TI structures by employing quantum ballistic transport simulations using the effective continuous Hamiltonian with fitting parameters extracted from ab-initio calculations. We demonstrate that thin film transistors based on a 3D-TI structure provide similar electrical characteristics compared to a Si-MOSFET for gate lengths down to 10 nm. Thus, such a device can be a potential candidate to replace Si-based MOSFETs in the sub-10 nm regime.« less

Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi

2015-02-16

We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with themore » 20-nm-thick GaSb layer.« less

Operation of the GaSb p-channel metal-oxide-semiconductor field-effect transistors fabricated on (111)A surfaces

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nishi, K., E-mail: nishi@mosfet.t.u-tokyo.ac.jp; Takenaka, M.; Takagi, S.

2014-12-08

We demonstrate the operation of GaSb p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on (111)A surfaces with Al{sub 2}O{sub 3} gate dielectrics formed by atomic-layer deposition at 150 °C. The p-MOSFETs on (111)A surfaces exhibit higher drain current and lower subthreshold swing than those on (100) surfaces. We find that the interface-state density (D{sub it}) values at the Al{sub 2}O{sub 3}/GaSb MOS interfaces on the (111)A surfaces are lower than those on the (100) surfaces, which can lead to performance enhancement of the GaSb p-MOSFETs on (111)A surfaces. The mobility of the GaSb p-MOSFETs on (111)A surfaces is 80% higher than that onmore » (100) surfaces.« less

Prognostics of Power MOSFET

NASA Technical Reports Server (NTRS)

Celaya, Jose Ramon; Saxena, Abhinav; Vashchenko, Vladislay; Saha, Sankalita; Goebel, Kai Frank

2011-01-01

This paper demonstrates how to apply prognostics to power MOSFETs (metal oxide field effect transistor). The methodology uses thermal cycling to age devices and Gaussian process regression to perform prognostics. The approach is validated with experiments on 100V power MOSFETs. The failure mechanism for the stress conditions is determined to be die-attachment degradation. Change in ON-state resistance is used as a precursor of failure due to its dependence on junction temperature. The experimental data is augmented with a finite element analysis simulation that is based on a two-transistor model. The simulation assists in the interpretation of the degradation phenomena and SOA (safe operation area) change.

MOSFET-BJT hybrid mode of the gated lateral bipolar junction transistor for C-reactive protein detection.

PubMed

Yuan, Heng; Kwon, Hyurk-Choon; Yeom, Se-Hyuk; Kwon, Dae-Hyuk; Kang, Shin-Won

2011-10-15

In this study, we propose a novel biosensor based on a gated lateral bipolar junction transistor (BJT) for biomaterial detection. The gated lateral BJT can function as both a BJT and a metal-oxide-semiconductor field-effect transistor (MOSFET) with both the emitter and source, and the collector and drain, coupled. C-reactive protein (CRP), which is an important disease marker in clinical examinations, can be detected using the proposed device. In the MOSFET-BJT hybrid mode, the sensitivity, selectivity, and reproducibility of the gated lateral BJT for biosensors were evaluated in this study. According to the results, in the MOSFET-BJT hybrid mode, the gated lateral BJT shows good selectivity and reproducibility. Changes in the emitter (source) current of the device for CRP antigen detection were approximately 0.65, 0.72, and 0.80 μA/decade at base currents of -50, -30, and -10 μA, respectively. The proposed device has significant application in the detection of certain biomaterials that require a dilution process using a common biosensor, such as a MOSFET-based biosensor. Copyright © 2011 Elsevier B.V. All rights reserved.

Aluminum nitride insulating films for MOSFET devices

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Maserjian, J.

1972-01-01

Application of aluminum nitrides as electrical insulator for electric capacitors is discussed. Electrical properties of aluminum nitrides are analyzed and specific use with field effect transistors is defined. Operational limits of field effect transistors are developed.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Advanced p-MOSFET Ionizing-Radiation Dosimeter

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.

1994-01-01

Circuit measures total dose of ionizing radiation in terms of shift in threshold gate voltage of doped-channel metal oxide/semiconductor field-effect transistor (p-MOSFET). Drain current set at temperature-independent point to increase accuracy in determination of radiation dose.

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study.

PubMed

Koivisto, J; Schulze, D; Wolff, J; Rottke, D

2014-01-01

The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO(®) head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; -5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; -14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; -16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region.

INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Hu, Guang-Xi; Wang, Ling-Li; Liu, Ran; Tang, Ting-Ao; Qiu, Zhi-Jun

2010-10-01

As the channel length of metal-oxide-semiconductor field-effect transistors (MOSFETs) scales into the nanometer regime, quantum mechanical effects are becoming more and more significant. In this work, a model for the surrounding-gate (SG) nMOSFET is developed. The Schrödinger equation is solved analytically. Some of the solutions are verified via results obtained from simulations. It is found that the percentage of the electrons with lighter conductivity mass increases as the silicon body radius decreases, or as the gate voltage reduces, or as the temperature decreases. The centroid of inversion-layer is driven away from the silicon-oxide interface towards the silicon body, therefore the carriers will suffer less scattering from the interface and the electrons effective mobility of the SG nMOSFETs will be enhanced.

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John; Coss, James

1988-01-01

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

Study of proton radiation effects among diamond and rectangular gate MOSFET layouts

NASA Astrophysics Data System (ADS)

Seixas, L. E., Jr.; Finco, S.; Silveira, M. A. G.; Medina, N. H.; Gimenez, S. P.

2017-01-01

This paper describes an experimental comparative study of proton ionizing radiation effects between the metal-oxide-semiconductor (MOS) Field Effect Transistors (MOSFETs) implemented with hexagonal gate shapes (diamond) and their respective counterparts designed with the classical rectangular ones, regarding the same gate areas, channel widths and geometrical ratios (W/L). The devices were manufactured by using the 350 nm bulk complementary MOS (CMOS) integrated circuits technology. The diamond MOSFET with α angles higher or equal to 90° tends to present a smaller vulnerability to the high doses ionizing radiation than those observed in the typical rectangular MOSFET counterparts.

Calculating Second-Order Effects in MOSFET's

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

1990-01-01

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

PubMed

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

Comparative study on skin dose measurement using MOSFET and TLD for pediatric patients with acute lymphatic leukemia.

PubMed

Al-Mohammed, Huda I; Mahyoub, Fareed H; Moftah, Belal A

2010-07-01

The object of this study was to compare the difference of skin dose measured in patients with acute lymphatic leukemia (ALL) treated with total body irradiation (TBI) using metal oxide semiconductor field-effect transistors (mobile MOSFET dose verification system (TN-RD-70-W) and thermoluminescent dosimeters (TLD-100 chips, Harshaw/ Bicron, OH, USA). Because TLD has been the most-commonly used technique in the skin dose measurement of TBI, the aim of the present study is to prove the benefit of using the mobile MOSFET (metal oxide semiconductor field effect transistor) dosimeter, for entrance dose measurements during the total body irradiation (TBI) over thermoluminescent dosimeters (TLD). The measurements involved 10 pediatric patients ages between 3 and 14 years. Thermoluminescent dosimeters and MOSFET dosimetry were performed at 9 different anatomic sites on each patient. The present results show there is a variation between skin dose measured with MOSFET and TLD in all patients, and for every anatomic site selected, there is no significant difference in the dose delivered using MOSFET as compared to the prescribed dose. However, there is a significant difference for every anatomic site using TLD compared with either the prescribed dose or MOSFET. The results indicate that the dosimeter measurements using the MOSFET gave precise measurements of prescribed dose. However, TLD measurement showed significant increased skin dose of cGy as compared to either prescribed dose or MOSFET group. MOSFET dosimeters provide superior dose accuracy for skin dose measurement in TBI as compared with TLD.

Driver Circuit For High-Power MOSFET's

NASA Technical Reports Server (NTRS)

Letzer, Kevin A.

1991-01-01

Driver circuit generates rapid-voltage-transition pulses needed to switch high-power metal oxide/semiconductor field-effect transistor (MOSFET) modules rapidly between full "on" and full "off". Rapid switching reduces time of overlap between appreciable current through and appreciable voltage across such modules, thereby increasing power efficiency.

MOSFET analog memory circuit achieves long duration signal storage

NASA Technical Reports Server (NTRS)

1966-01-01

Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

Single Event Effects (SEE) for Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2011-01-01

Single-event gate rupture (SEGR) continues to be a key failure mode in power MOSFETs. (1) SEGR is complex, making rate prediction difficult SEGR mechanism has two main components: (1) Oxide damage-- Reduces field required for rupture (2) Epilayer response -- Creates transient high field across the oxide.

Analyzing Single-Event Gate Ruptures In Power MOSFET's

NASA Technical Reports Server (NTRS)

Zoutendyk, John A.

1993-01-01

Susceptibilities of power metal-oxide/semiconductor field-effect transistors (MOSFET's) to single-event gate ruptures analyzed by exposing devices to beams of energetic bromine ions while applying appropriate bias voltages to source, gate, and drain terminals and measuring current flowing into or out of each terminal.

Temperature dependence of single-event burnout in n-channel power MOSFET's

NASA Astrophysics Data System (ADS)

Johnson, G. H.; Schrimpf, R. D.; Galloway, K. F.; Koga, R.

1994-03-01

The temperature dependence of single-event burnout (SEB) in n-channel power metal-oxide-semiconductor field effect transistors (MOSFET's) is investigated experimentally and analytically. Experimental data are presented which indicate that the SEB susceptibility of the power MOSFET decreases with increasing temperature. A previously reported analytical model that describes the SEB mechanism is updated to include temperature variations. This model is shown to agree with the experimental trends.

MOSFET Electric-Charge Sensor

NASA Technical Reports Server (NTRS)

Robinson, Paul A., Jr.

1988-01-01

Charged-particle probe compact and consumes little power. Proposed modification enables metal oxide/semiconductor field-effect transistor (MOSFET) to act as detector of static electric charges or energetic charged particles. Thickened gate insulation acts as control structure. During measurements metal gate allowed to "float" to potential of charge accumulated in insulation. Stack of modified MOSFET'S constitutes detector of energetic charged particles. Each gate "floats" to potential induced by charged-particle beam penetrating its layer.

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

PubMed Central

Schulze, D; Wolff, J; Rottke, D

2014-01-01

Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO® head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). Results: The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; −5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; −14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; −16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Conclusions: Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region. PMID:25143020

A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems

NASA Astrophysics Data System (ADS)

Tanoi, Satoru; Endoh, Tetsuo

2012-04-01

A wide-range tunable level-keeper using vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed for current-reuse analog systems. The design keys for widening tunable range of the operation are a two-path feed-back and a vertical MOSFET with back-bias-effect free. The proposed circuit with the vertical MOSFETs shows the 1.23-V tunable-range of the input level with the 2.4-V internal-supply voltage (VDD) in the simulation. This tunable-range of the proposed circuit is 4.7 times wider than that of the conventional. The achieved current efficiency of the proposed level-keeper is 66% at the 1.2-V output with the 2.4-V VDD. This efficiency of the proposed circuit is twice higher than that of the traditional voltage down converter.

Fabricating metal-oxide-semiconductor field-effect transistors on a polyethylene terephthalate substrate by applying low-temperature layer transfer of a single-crystalline silicon layer by meniscus force

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sakaike, Kohei; Akazawa, Muneki; Nakamura, Shogo

2013-12-02

A low-temperature local-layer technique for transferring a single-crystalline silicon (c-Si) film by using a meniscus force was proposed, and an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) was fabricated on polyethylene terephthalate (PET) substrate. It was demonstrated that it is possible to transfer and form c-Si films in the required shape at the required position on PET substrates at extremely low temperatures by utilizing a meniscus force. The proposed technique for layer transfer was applied for fabricating high-performance c-Si MOSFETs on a PET substrate. The fabricated MOSFET showed a high on/off ratio of more than 10{sup 8} and a high field-effect mobilitymore » of 609 cm{sup 2} V{sup −1} s{sup −1}.« less

Effect of the mobility on (I-V) characteristics of the MOSFET

DOE Office of Scientific and Technical Information (OSTI.GOV)

Benzaoui, Ouassila, E-mail: o-benzaoui@yahoo.fr; Azizi, Cherifa, E-mail: aziziche@yahoo.fr

2013-12-16

MOSFET Transistor was the subject of many studies and research works (electronics, data-processing, telecommunications...) in order to exploit its interesting and promising characteristics. The aim of this contribution is devoted to the effect of the mobility on the static characteristics I-V of the MOSFET. The study enables us to calculate the drain current as function of bias in both linear and saturated modes; this effect is evaluated using a numerical simulation program. The influence of mobility was studied. Obtained results allow us to determine the mobility law in the MOSFET which gives optimal (I-V) characteristics of the component.

Robust mode space approach for atomistic modeling of realistically large nanowire transistors

NASA Astrophysics Data System (ADS)

Huang, Jun Z.; Ilatikhameneh, Hesameddin; Povolotskyi, Michael; Klimeck, Gerhard

2018-01-01

Nanoelectronic transistors have reached 3D length scales in which the number of atoms is countable. Truly atomistic device representations are needed to capture the essential functionalities of the devices. Atomistic quantum transport simulations of realistically extended devices are, however, computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost, but a good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables engineering-level, reliable tight binding non-equilibrium Green's function simulation of nanowire metal-oxide-semiconductor field-effect transistor (MOSFET) with a realistic cross section of 10 nm × 10 nm using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire n-type MOSFETs (nMOSFETs) with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about 10 nm × 10 nm.

Dc-To-Dc Converter Uses Reverse Conduction Of MOSFET's

NASA Technical Reports Server (NTRS)

Gruber, Robert P.; Gott, Robert W.

1991-01-01

In modified high-power, phase-controlled, full-bridge, pulse-width-modulated dc-to-dc converters, switching devices power metal oxide/semiconductor field-effect transistors (MOSFET's). Decreases dissipation of power during switching by eliminating approximately 0.7-V forward voltage drop in anti-parallel diodes. Energy-conversion efficiency increased.

Progress in MOSFET double-layer metalization

NASA Technical Reports Server (NTRS)

Gassaway, J. D.; Trotter, J. D.; Wade, T. E.

1980-01-01

Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).

Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout.

PubMed

Lee, Min Su; Lee, Hee Chul

2014-01-01

In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results.

Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout

PubMed Central

Lee, Min Su; Lee, Hee Chul

2014-01-01

In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results. PMID:27350975

Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

PubMed

Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

2013-03-25

n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

Re-Verification of the IRHN57133SE and IRHN57250SE for Single Event Gate Rupture and Single Event Burnout

NASA Technical Reports Server (NTRS)

Scheick, Leif

2010-01-01

The vertical metal oxide semiconductor field-effect transistor (MOSFET) is a widely used power transistor onboard a spacecraft. The MOSFET is typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single event gate rupture (SEGR) or single event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. These radiation hardened devices are not immune to SEGR or SEB but, rather, can exhibit them at a much more damaging ion than their non-radiation hardened counterparts. See [1] through [5] for more information.This effort was to investigate the SEGR and SEB responses of two power MOSFETs from IR(the IRHN57133SE and the IRHN57250SE) that have recently been produced on a new fabrication line. These tests will serve as a limited verification of these parts, but it is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Study on effective MOSFET channel length extracted from gate capacitance

NASA Astrophysics Data System (ADS)

Tsuji, Katsuhiro; Terada, Kazuo; Fujisaka, Hisato

2018-01-01

The effective channel length (L GCM) of metal-oxide-semiconductor field-effect transistors (MOSFETs) is extracted from the gate capacitances of actual-size MOSFETs, which are measured by charge-injection-induced-error-free charge-based capacitance measurement (CIEF CBCM). To accurately evaluate the capacitances between the gate and the channel of test MOSFETs, the parasitic capacitances are removed by using test MOSFETs having various channel sizes and a source/drain reference device. A strong linear relationship between the gate-channel capacitance and the design channel length is obtained, from which L GCM is extracted. It is found that L GCM is slightly less than the effective channel length (L CRM) extracted from the measured MOSFET drain current. The reason for this is discussed, and it is found that the capacitance between the gate electrode and the source and drain regions affects this extraction.

Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mukhopadhyay, A., E-mail: arnabm.electinstru@gmail.com; Banerjee, L.; Sengupta, A.

We investigate the effect of stacking order of bilayer black phosphorene on the device properties of p-MOSFET and n-MOSFET. Two layers of black phosphorus are stacked in three different orders and are used as channel material in both n-MOSFET and p-MOSFET devices. The effects of different stacking orders on electron and hole effective masses and output characteristics of MOSFETs, such as ON currents, ON/OFF ratio, and transconductance are analyzed. Our results show that about 1.37 times and 1.49 times increase in ON current is possible along armchair and zigzag directions, respectively, 55.11% variation in transconductance is possible along armchair direction,more » by changing stacking orders (AA, AB, and AC) and about 8 times increase in ON current is achievable by changing channel orientation (armchair or zigzag) in p-MOSFET. About 14.8 mV/V drain induced barrier lowering is observed for both p-MOSFET and n-MOSFET, which signifies good immunity to short channel effects.« less

Development of Process Technologies for High-Performance MOS-Based SiC Power Switching Devices

DTIC Science & Technology

2007-08-01

investigated are insulated-gate bipolar transistors ( IGBTs ) in 4H-SiC. The IGBT combines the best aspects of MOS and bipolar power transistors... IGBTs can be thought of as a fusion of a MOSFET and a BJT. The MOSFET provides a high input impedance while the BJT provides conductivity modulation of...region due to conductivity modulation from the forward-biased BJT. The IGBT is structurally identical to a MOSFET, except that the substrate doping

CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

NASA Astrophysics Data System (ADS)

Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

2008-05-01

A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

Design and fabrication of high-performance diamond triple-gate field-effect transistors

PubMed Central

Liu, Jiangwei; Ohsato, Hirotaka; Wang, Xi; Liao, Meiyong; Koide, Yasuo

2016-01-01

The lack of large-area single-crystal diamond wafers has led us to downscale diamond electronic devices. Here, we design and fabricate a hydrogenated diamond (H-diamond) triple-gate metal-oxide-semiconductor field-effect transistor (MOSFET) to extend device downscaling and increase device output current. The device’s electrical properties are compared with those of planar-type MOSFETs, which are fabricated simultaneously on the same substrate. The triple-gate MOSFET’s output current (174.2 mA mm−1) is much higher than that of the planar-type device (45.2 mA mm−1), and the on/off ratio and subthreshold swing are more than 108 and as low as 110 mV dec−1, respectively. The fabrication of these H-diamond triple-gate MOSFETs will drive diamond electronic device development forward towards practical applications. PMID:27708372

New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

PubMed

Shih, Cheng Wei; Chin, Albert

2016-08-03

At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

Investigation of the Semicoa 2N7616 and 2N7425 and the Microsemi 2N7480 for Single-Event Gate Rupture and Single-Event Burnout

NASA Technical Reports Server (NTRS)

Scheick, Leif

2014-01-01

Single-event-effect test results for hi-rel total-dose-hardened power MOSFETs are presented in this report. The 2N7616 and the 2N7425 from Semicoa and the 2N7480 from International Rectifier were tested to NASA test condition standards and requirements. The 2N7480 performed well and the data agree with the manufacture's data. The 2N7616 and 2N7425 were entry parts from Semicoa using a new device architecture. Unfortunately, the device performed poorly and Semicoa is withdrawing power MOSFETs from it line due to these data. Vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) are the most commonly used power transistor. MOSFETs are typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single-event gate rupture (SEGR) or single-event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. See [1] through [5] for more information. The objective of this effort was to investigate the SEGR and SEB responses of two power MOSFETs recently produced. These tests will serve as a limited verification of these parts. It is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Dual metal gate tunneling field effect transistors based on MOSFETs: A 2-D analytical approach

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2018-01-01

A novel 2-D analytical drain current model of novel Dual Metal Gate Tunnel Field Effect Transistors Based on MOSFETs (DMG-TFET) is presented in this paper. The proposed Tunneling FET is extracted from a MOSFET structure by employing an additional electrode in the source region with an appropriate work function to induce holes in the N+ source region and hence makes it as a P+ source region. The electric field is derived which is utilized to extract the expression of the drain current by analytically integrating the band to band tunneling generation rate in the tunneling region based on the potential profile by solving the Poisson's equation. Through this model, the effects of the thin film thickness and gate voltage on the potential, the electric field, and the effects of the thin film thickness on the tunneling current can be studied. To validate our present model we use SILVACO ATLAS device simulator and the analytical results have been compared with it and found a good agreement.

CMOS-compatible batch processing of monolayer MoS2 MOSFETs

NASA Astrophysics Data System (ADS)

Xiong, Kuanchen; Kim, Hyun; Marstell, Roderick J.; Göritz, Alexander; Wipf, Christian; Li, Lei; Park, Ji-Hoon; Luo, Xi; Wietstruck, Matthias; Madjar, Asher; Strandwitz, Nicholas C.; Kaynak, Mehmet; Lee, Young Hee; Hwang, James C. M.

2018-04-01

Thousands of high-performance 2D metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on wafer-scale chemical vapor deposited MoS2 with fully-CMOS-compatible processes such as photolithography and aluminum metallurgy. The yield was greater than 50% in terms of effective gate control with less-than-10 V threshold voltage, even for MOSFETs having deep-submicron gate length. The large number of fabricated MOSFETs allowed statistics to be gathered and the main yield limiter to be attributed to the weak adhesion between the transferred MoS2 and the substrate. With cut-off frequencies approaching the gigahertz range, the performances of the MOSFETs were comparable to that of state-of-the-art MoS2 MOSFETs, whether the MoS2 was grown by a thin-film process or exfoliated from a bulk crystal.

Dosimetric evaluation of a MOSFET detector for clinical application in photon therapy.

PubMed

Kohno, Ryosuke; Hirano, Eriko; Nishio, Teiji; Miyagishi, Tomoko; Goka, Tomonori; Kawashima, Mitsuhiko; Ogino, Takashi

2008-01-01

Dosimetric characteristics of a metal oxide-silicon semiconductor field effect transistor (MOSFET) detector are studied with megavoltage photon beams for patient dose verification. The major advantages of this detector are its size, which makes it a point dosimeter, and its ease of use. In order to use the MOSFET detector for dose verification of intensity-modulated radiation therapy (IMRT) and in-vivo dosimetry for radiation therapy, we need to evaluate the dosimetric properties of the MOSFET detector. Therefore, we investigated the reproducibility, dose-rate effect, accumulated-dose effect, angular dependence, and accuracy in tissue-maximum ratio measurements. Then, as it takes about 20 min in actual IMRT for the patient, we evaluated fading effect of MOSFET response. When the MOSFETs were read-out 20 min after irradiation, we observed a fading effect of 0.9% with 0.9% standard error of the mean. Further, we applied the MOSFET to the measurement of small field total scatter factor. The MOSFET for dose measurements of small field sizes was better than the reference pinpoint chamber with vertical direction. In conclusion, we assessed the accuracy, reliability, and usefulness of the MOSFET detector in clinical applications such as pinpoint absolute dosimetry for small fields.

Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

PubMed

Choi, Woo Young; Lee, Hyun Kook

2016-01-01

The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE PAGES

King, M. P.; Wu, X.; Eller, Manfred; ...

2016-12-07

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

King, M. P.; Wu, X.; Eller, Manfred

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

Response Of A MOSFET To A Cosmic Ray

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John A.

1988-01-01

Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.

MCT/MOSFET Switch

NASA Technical Reports Server (NTRS)

Rippel, Wally E.

1990-01-01

Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.

Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

NASA Astrophysics Data System (ADS)

Ullah, A. R.; Carrad, D. J.; Krogstrup, P.; Nygârd, J.; Micolich, A. P.

2018-02-01

Doping is a common route to reducing nanowire transistor on-resistance but it has limits. A high doping level gives significant loss in gate performance and ultimately complete gate failure. We show that electrolyte gating remains effective even when the Be doping in our GaAs nanowires is so high that traditional metal-oxide gates fail. In this regime we obtain a combination of subthreshold swing and contact resistance that surpasses the best existing p -type nanowire metal-oxide semiconductor field-effect transistors (MOSFETs). Our subthreshold swing of 75 mV/dec is within 25 % of the room-temperature thermal limit and comparable with n -InP and n -GaAs nanowire MOSFETs. Our results open a new path to extending the performance and application of nanowire transistors, and motivate further work on improved solid electrolytes for nanoscale device applications.

Performance analysis of SOI MOSFET with rectangular recessed channel

NASA Astrophysics Data System (ADS)

Singh, M.; Mishra, S.; Mohanty, S. S.; Mishra, G. P.

2016-03-01

In this paper a two dimensional (2D) rectangular recessed channel-silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed.

Dosimetric characteristics of a MOSFET dosimeter for clinical electron beams.

PubMed

Manigandan, D; Bharanidharan, G; Aruna, P; Devan, K; Elangovan, D; Patil, Vikram; Tamilarasan, R; Vasanthan, S; Ganesan, S

2009-09-01

The fundamental dosimetric characteristics of commercially available metal oxide semiconductor field effect transistor (MOSFET) detectors were studied for clinical electron beam irradiations. MOSFET showed excellent linearity against doses measured using an ion chamber in the dose range of 20-630cGy. MOSFET reproducibility is better at high doses compared to low doses. The output factors measured with the MOSFET were within +/-3% when compared with those measured with a parallel plate chamber. From 4 to 12MeV, MOSFETs showed a large angular dependence in the tilt directions and less in the axial directions. MOSFETs do not show any dose-rate dependence between 100 and 600MU/min. However, MOSFETs have shown under-response when the dose per pulse of the beam is decreased. No measurable effect in MOSFET response was observed in the temperature range of 23-40 degrees C. The energy dependence of a MOSFET dosimeter was within +/-3.0% for 6-18MeV electron beams and 5.5% for 4MeV ones. This study shows that MOSFET detectors are suitable for dosimetry of electron beams in the energy range of 4-18MeV.

THE SILICON OLFACTORY BULB: A NEUROMORPHIC APPROACH TO MOLECULAR SENSING WITH CHEMORECEPTIVE NEURON MOS TRANSISTORS (CNMOS)

EPA Science Inventory

Within the 3 -year effort, we have established several major findings:

• Chemical sensor in fluid environment with inorganic and polymer sensing surfaces (1,5): Conventional metal oxide semiconductor field effect transistor (MOSFET)-based chemical sensing su...

• An EKV-based high voltage MOSFET model with improved mobility and drift model

  NASA Astrophysics Data System (ADS)

  Chauhan, Yogesh Singh; Gillon, Renaud; Bakeroot, Benoit; Krummenacher, Francois; Declercq, Michel; Ionescu, Adrian Mihai

  2007-11-01

  An EKV-based high voltage MOSFET model is presented. The intrinsic channel model is derived based on the charge based EKV-formalism. An improved mobility model is used for the modeling of the intrinsic channel to improve the DC characteristics. The model uses second order dependence on the gate bias and an extra parameter for the smoothening of the saturation voltage of the intrinsic drain. An improved drift model [Chauhan YS, Anghel C, Krummenacher F, Ionescu AM, Declercq M, Gillon R, et al. A highly scalable high voltage MOSFET model. In: IEEE European solid-state device research conference (ESSDERC), September 2006. p. 270-3; Chauhan YS, Anghel C, Krummenacher F, Maier C, Gillon R, Bakeroot B, et al. Scalable general high voltage MOSFET model including quasi-saturation and self-heating effect. Solid State Electron 2006;50(11-12):1801-13] is used for the modeling of the drift region, which gives smoother transition on output characteristics and also models well the quasi-saturation region of high voltage MOSFETs. First, the model is validated on the numerical device simulation of the VDMOS transistor and then, on the measured characteristics of the SOI-LDMOS transistor. The accuracy of the model is better than our previous model [Chauhan YS, Anghel C, Krummenacher F, Maier C, Gillon R, Bakeroot B, et al. Scalable general high voltage MOSFET model including quasi-saturation and self-heating effect. Solid State Electron 2006;50(11-12):1801-13] especially in the quasi-saturation region of output characteristics.

• Modeling of Nano-Scale Transistors and Memory Devices for Low Power Applications

  NASA Astrophysics Data System (ADS)

  Cao, Xi

  As the featuring size of transistors scaled down to sub-20 nm, the continuous scaling of power has become one of the main challenges of the semiconductor industry. The power issue is raised by the barely scalable supply voltage and a limitation on the subthreshold swing (SS) of conventional metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, self-consistent quantum transport device simulators are developed to examine the nanoscale transistors based on black phosphorus (BP) materials. The scaling limit of double-gated BP MOSFETs is assessed. To reduce the SS below the thermionic limit for ultra-steep switching, tunnel FETs (TFETs) and vertical ballistic impact ionization FETs based on BP and its heterojunctions are investigated. Furthermore, the ferroelectric tunneling junction (FTJ) is modeled and examined for potential low power memory applications. For BP MOSFETs, the device physics at the ultimate scaling limit are examined. The performance of monolayer BP MOSFETs is projected to sub-10 nm and compared with the International Technology Roadmap for Semiconductors (ITRS) requirements. And the interplay of quantum mechanical effects and the highly anisotropic bandstructure of BP at this scale is investigated. By choice of layer number and crystalline direction, BP materials can offer a range of bandgap and effective mass values, which is attractive for TFET applications. Therefore, scaling behaviors of BP TFETs near and below the 10 nm scale are studied. The gate oxide thickness scaling and the effect of high-k dielectric are compared between the TFETs and the MOSFETs. For the TFETs with the gate lengths beyond 10 nm and at the sub-10 nm scale, the direct-source-to-drain tunneling issues are evaluated, and different strategies to achieve ultra-steep switching are specified. In a sub-10 nm graphene-BP-graphene heterojunction transistor, the sharp turnon behavior was observed, under a small source-drain bias of 0.1 V. The fast switch is attributed to a ballistic energy-dependent impact ionization mechanism. A device model is developed, which shows agreement with experiment results. The model is applied to explore the gate oxide scaling behavior and the effect of graphene doping, and to optimize the device for low power applications. Finally, to keep the integrity of the computing system, the FTJ is studied for its possible use as a low power memory device. A compact model for FTJ, dealing with both static and dynamic behaviors, is developed and compared with experimental data. The write energy consumed by the memory cell, comprising one transistor and one FTJ, is estimated by applying the compact model to circuit simulation. And a way to reduce the write energy is suggested.

• Design, production, and testing of field effect transistors. [cryogenic MOSFETS

  NASA Technical Reports Server (NTRS)

  Sclar, N.

  1982-01-01

  Cryogenic MOSFETS (CRYOFETS), specifically designed for low temperature preamplifier application with infrared extrinsic detectors were produced and comparatively tested with p-channel MOSFETs under matched conditions. The CRYOFETs exhibit lower voltage thresholds, high source-follower gains at lower bias voltage, and lower dc offset source voltage. The noise of the CRYOFET is found to be 2 to 4 times greater than the MOSFET with a correspondingly lower figure of merit (which is established for source-follower amplifiers). The device power dissipation at a gain of 0.98 is some two orders of magnitude lower than for the MOSFET. Further, CRYOFETs are free of low temperature I vs V character hysteresis and balky conduction turn-on effects and operate effectively in the 2.4 to 20 K range. These devices have promise for use on long term duration sensor missions and for on-focal-plane signal processing at low temperatures.

• Effects of Lightning Injection on Power-MOSFETs

  NASA Technical Reports Server (NTRS)

  Celaya, Jose; Saha, Sankalita; Wysocki, Phil; Ely, Jay; Nguyen, Truong; Szatkowski, George; Koppen, Sandra; Mielnik, John; Vaughan, Roger; Goebel, Kai

  2009-01-01

  Lightning induced damage is one of the major concerns in aircraft health monitoring. Such short-duration high voltages can cause significant damage to electronic devices. This paper presents a study on the effects of lightning injection on power metal-oxide semiconductor field effect transistors (MOSFETs). This approach consisted of pin-injecting lightning waveforms into the gate, drain and/or source of MOSFET devices while they were in the OFF-state. Analysis of the characteristic curves of the devices showed that for certain injection modes the devices can accumulate considerable damage rendering them inoperable. Early results demonstrate that a power MOSFET, even in its off-state, can incur considerable damage due to lightning pin injection, leading to significant deviation in its behavior and performance, and to possibly early device failures.

• Differential multi-MOSFET nuclear radiation sensor

  NASA Technical Reports Server (NTRS)

  Deoliveira, W. A.

  1977-01-01

  Circuit allows minimization of thermal-drift errors, low power consumption, operation over wide dynamic range, improved sensitivity and stability with metaloxide-semiconductor field-effect transistor sensors.

• SOI metal-oxide-semiconductor field-effect transistor photon detector based on single-hole counting.

  PubMed

  Du, Wei; Inokawa, Hiroshi; Satoh, Hiroaki; Ono, Atsushi

  2011-08-01

  In this Letter, a scaled-down silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) is characterized as a photon detector, where photogenerated individual holes are trapped below the negatively biased gate and modulate stepwise the electron current flowing in the bottom channel induced by the positive substrate bias. The output waveforms exhibit clear separation of current levels corresponding to different numbers of trapped holes. Considering this capability of single-hole counting, a small dark count of less than 0.02 s(-1) at room temperature, and low operation voltage of 1 V, SOI MOSFET could be a unique photon-number-resolving detector if the small quantum efficiency were improved. © 2011 Optical Society of America

• Evaluation of clinical use of OneDose™ metal oxide semiconductor field-effect transistor detectors compared to thermoluminescent dosimeters to measure skin dose for adult patients with acute lymphoblastic leukemia

  PubMed Central

  Al-Mohammed, Huda Ibrahim

  2011-01-01

  Background: Total body irradiation is a protocol used to treat acute lymphoblastic leukemia in patients prior to their bone marrow transplant. It involves the treatment of the whole body using a large radiation field with extended source-skin distance. Therefore, it is important to measure and monitor the skin dose during the treatment. Thermoluminescent dosimeters (TLDs) and the OneDose™ metal oxide semiconductor field effect transistor (MOSFET) detectors are used during treatment delivery to measure the radiation dose and compare it with the target prescribed dose. Aims: The primary goal of this study was to measure the variation of skin dose using OneDose MOSFET detectors and TLD detectors, and compare the results with the target prescribed dose. The secondary aim was to evaluate the simplicity of use and determine if one system was superior to the other in clinical use. Material and Methods: The measurements involved twelve adult patients diagnosed with acute lymphoblastic leukemia. TLD and OneDose MOSFET dosimetry were performed at ten different anatomical sites of each patient. Results: The results showed that there was a variation between skin dose measured with OneDose MOSFET detectors and TLD in all patients. However, the variation was not significant. Furthermore, the results showed for every anatomical site there was no significant different between the prescribed dose and the dose measured by either TLD or OneDose MOSFET detectors. Conclusion: There were no significant differences between the OneDose MOSFET and TLDs in comparison to the target prescribed dose. However, OneDose MOSFET detectors give a direct read-out immediately after the treatment, and their simplicity of use to compare with TLD detectors may make them preferred for clinical use. PMID:22171243

• GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

  NASA Astrophysics Data System (ADS)

  Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

  2015-04-01

  GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

• Skin dose measurements using MOSFET and TLD for head and neck patients treated with tomotherapy.

  PubMed

  Kinhikar, Rajesh A; Murthy, Vedang; Goel, Vineeta; Tambe, Chandrashekar M; Dhote, Dipak S; Deshpande, Deepak D

  2009-09-01

  The purpose of this work was to estimate skin dose for the patients treated with tomotherapy using metal oxide semiconductor field-effect transistors (MOSFETs) and thermoluminescent dosimeters (TLDs). In vivo measurements were performed for two head and neck patients treated with tomotherapy and compared to TLD measurements. The measurements were subsequently carried out for five days to estimate the inter-fraction deviations in MOSFET measurements. The variation between skin dose measured with MOSFET and TLD for first patient was 2.2%. Similarly, the variation of 2.3% was observed between skin dose measured with MOSFET and TLD for second patient. The tomotherapy treatment planning system overestimated the skin dose as much as by 10-12% when compared to both MOSFET and TLD. However, the MOSFET measured patient skin doses also had good reproducibility, with inter-fraction deviations ranging from 1% to 1.4%. MOSFETs may be used as a viable dosimeter for measuring skin dose in areas where the treatment planning system may not be accurate.

• Remote hydrogen sensing techniques

  NASA Technical Reports Server (NTRS)

  Perry, Cortes L.

  1992-01-01

  The objective of this project is to evaluate remote hydrogen sensing methodologies utilizing metal oxide semi-conductor field effect transistors (MOS-FET) and mass spectrometric (MS) technologies and combinations thereof.

• Engineering Nanowire n-MOSFETs at L_{g}<8 nm

  NASA Astrophysics Data System (ADS)

  Mehrotra, Saumitra R.; Kim, SungGeun; Kubis, Tillmann; Povolotskyi, Michael; Lundstrom, Mark S.; Klimeck, Gerhard

  2013-07-01

  As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport mass can be used to limit source-drain (S-D) tunneling. Taking InAs and Si as examples, it is shown that different heavier transport masses can be engineered using strain and crystal orientation engineering. Full-band extended device atomistic quantum transport simulations are performed for nanowire MOSFETs at Lg<8 nm in both ballistic and incoherent scattering regimes. In conclusion, a heavier transport mass can indeed be advantageous in improving ON state currents in ultra scaled nanowire MOSFETs.

• Total body irradiation, toward optimal individual delivery: dose evaluation with metal oxide field effect transistors, thermoluminescence detectors, and a treatment planning system.

  PubMed

  Bloemen-van Gurp, Esther J; Mijnheer, Ben J; Verschueren, Tom A M; Lambin, Philippe

  2007-11-15

  To predict the three-dimensional dose distribution of our total body irradiation technique, using a commercial treatment planning system (TPS). In vivo dosimetry, using metal oxide field effect transistors (MOSFETs) and thermoluminescence detectors (TLDs), was used to verify the calculated dose distributions. A total body computed tomography scan was performed and loaded into our TPS, and a three-dimensional-dose distribution was generated. In vivo dosimetry was performed at five locations on the patient. Entrance and exit dose values were converted to midline doses using conversion factors, previously determined with phantom measurements. The TPS-predicted dose values were compared with the MOSFET and TLD in vivo dose values. The MOSFET and TLD dose values agreed within 3.0% and the MOSFET and TPS data within 0.5%. The convolution algorithm of the TPS, which is routinely applied in the clinic, overestimated the dose in the lung region. Using a superposition algorithm reduced the calculated lung dose by approximately 3%. The dose inhomogeneity, as predicted by the TPS, can be reduced using a simple intensity-modulated radiotherapy technique. The use of a TPS to calculate the dose distributions in individual patients during total body irradiation is strongly recommended. Using a TPS gives good insight of the over- and underdosage in a patient and the influence of patient positioning on dose homogeneity. MOSFETs are suitable for in vivo dosimetry purposes during total body irradiation, when using appropriate conversion factors. The MOSFET, TLD, and TPS results agreed within acceptable margins.

• GaN MOSFET with Boron Trichloride-Based Dry Recess Process

  NASA Astrophysics Data System (ADS)

  Jiang, Y.; Wang, Q. P.; Tamai, K.; Miyashita, T.; Motoyama, S.; Wang, D. J.; Ao, J. P.; Ohno, Y.

  2013-06-01

  The dry recessed-gate GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure using boron trichloride (BCl3) as etching gas were fabricated and characterized. Etching with different etching power was conducted. Devices with silicon tetrachloride (SiCl4) etching gas were also prepared for comparison. Field-effect mobility and interface state density were extracted from current-voltage (I-V) characteristics. GaN MOSFETs on AlGaN/GaN heterostructure with BCl3 based dry recess achieved a high maximum electron mobility of 141.5 cm2V-1s-1 and a low interface state density.

• Improved Hot Carrier Reliability Characteristics of Metal Oxide Semiconductor Field Effect Transistors with High-k Gate Dielectric by Using High Pressure Deuterium Post Metallization Annealing

  NASA Astrophysics Data System (ADS)

  Park, Hokyung; Choi, Rino; Lee, Byoung Hun; Hwang, Hyunsang

  2007-09-01

  High pressure deuterium annealing on the hot carrier reliability characteristics of HfSiO metal oxide semiconductor field effect transistor (MOSFET) was investigated. Comparing with the conventional forming gas (H2/Ar=10%/96%, 480 °C, 30 min) annealed sample, MOSFET annealed in 5 atm pure deuterium ambient at 400 °C showed the improvement of linear drain current, reduction of interface trap density, and improvement of the hot carrier reliability characteristics. These improvements can be attributed to the effective passivation of the interface trap site after high pressure annealing and heavy mass effect of deuterium. These results indicate that high pressure pure deuterium annealing can be a promising process for improving device performance as well as hot carrier reliability, together.

• High performance multi-finger MOSFET on SOI for RF amplifiers

  NASA Astrophysics Data System (ADS)

  Adhikari, M. Singh; Singh, Y.

  2017-10-01

  In this paper, we propose structural modifications in the conventional planar metal-oxide-semiconductor field-effect transistor (MOSFET) on silicon-on-insulator by utilizing trenches in the epitaxial layer. The proposed multi-finger MOSFET (MF-MOSFET) has dual vertical-gates placed in separate trenches to form multiple channels in the p-base which carry the drain current in parallel. The proposed device uses TaN as gate electrode and SiO2 as gate dielectric. Simultaneous conduction of multiple channels enhances the drain current (ID) and provides higher transconductance (gm) leading to significant improvement in cut-off frequency (ft). Two-dimensional simulations are performed to evaluate and compare the performance of the MF-MOSFET with the conventional MOSFET. At a gate length of 60 nm, the proposed device provides 4 times higher ID, 3 times improvement in gm and 1.25 times increase in ft with better control over the short channel effects as compared with the conventional device.

• Characterization and Fabrication of High k dielectric-High Mobility Channel Transistors

  NASA Astrophysics Data System (ADS)

  Sun, Xiao

  As the conventional scaling of Si-based MOSFETs would bring negligible or even negative merits for IC's beyond the 7-nm CMOS technology node, many perceive the use of high-mobility channels to be one of the most likely principle changes, in order to achieve higher performance and lower power. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, InGaAs, GaSb, GaN...) to replace Si CMOS technology. In this thesis, the distinct properties of the traps in the high-k dielectric/high-mobility substrate system is discussed, as well as the challenges to characterize and passivate them. By modifying certain conventional gate admittance methods, both the fast and slow traps in Ge MOS gate stacks is investigated. In addition, a novel ac-transconductance method originated at Yale is introduced and demonstrated with several advanced transistors provided by collaborating groups, such as ultra-thin-body & box SO1 MOSFETs (CEA-LETI), InGaAs MOSFETs (IMEC, UT Austin, Purdue), and GaN MOS-HEMT (MIT). By use of the aforementioned characterization techniques, several effective passivation techniques on high mobility substrates (Ge, InGaAs, GaSb, GeSn, etc.) are evaluated, including a novel Ba sub-monolayer passivation of Ge surface. The key factors that need to be considered in passivating high mobility substrates are revealed. The techniques that we have established for characterizing traps in advanced field-effect transistors, as well as the knowledge gained about these traps by the use of these techniques, have been applied to the study of ionizing radiation effects in high-mobility-channel transistors, because it is very important to understand such effects as these devices are likely to be exposed to radiation-harsh environments, such as in outer space, nuclear plants, and during X-ray or UHV lithography. In this thesis, the total ionizing dose (TD) radiation effects of InGaAs-based MOSFETs and GaN-based MOS-HEMT are studied, and the results help to reveal the underlying mechanisms and inspire ideas for minimizing the TID radiation effects.

• Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

  NASA Technical Reports Server (NTRS)

  Schwarze, G. E.; Frasca, A. J.

  1991-01-01

  The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Loss analysis and optimum design of a highly efficient and compact CMOS DC–DC converter with novel transistor layout using 60 nm multipillar-type vertical body channel MOSFET

NASA Astrophysics Data System (ADS)

Itoh, Kazuki; Endoh, Tetsuo

2018-04-01

In this paper, we present a novel transistor layout of multi pillar-type vertical body-channel (BC) MOSFET for cascode power switches for improving the efficiency and compactness of CMOS DC–DC converters. The proposed layout features a stacked and multifingered layout to suppress the loss due to parasitic components such as diffusion resistance and contact resistance. In addition, the loss of each MOSFET, which configures cascode power switches, is analyzed, and it is revealed that the total optimum gate width and loss with the high-side (HS) n-type MOSFET topology are 27 and 16% smaller than those with the HS p-type MOSFET topology, respectively. Moreover, a circuit simulation of 2.0 to 0.8 V, 100 MHz CMOS DC–DC converters with the proposed layout is carried out by using experimentally extracted models of BSIM4 60 nm vertical BC MOSFETs. The peak efficiency of the HS n-type MOSFET converter with the proposed layout is 90.1%, which is 6.0% higher than that with the conventional layout.

Experimental evaluation of a MOSFET dosimeter for proton dose measurements.

PubMed

Kohno, Ryosuke; Nishio, Teiji; Miyagishi, Tomoko; Hirano, Eriko; Hotta, Kenji; Kawashima, Mitsuhiko; Ogino, Takashi

2006-12-07

The metal oxide semiconductor field-effect transistor (MOSFET) dosimeter has been widely studied for use as a dosimeter for patient dose verification. The major advantage of this detector is its size, which acts as a point dosimeter, and also its ease of use. The commercially available TN502RD MOSFET dosimeter manufactured by Thomson and Nielsen has never been used for proton dosimetry. Therefore we used the MOSFET dosimeter for the first time in proton dose measurements. In this study, the MOSFET dosimeter was irradiated with 190 MeV therapeutic proton beams. We experimentally evaluated dose reproducibility, linearity, fading effect, beam intensity dependence and angular dependence for the proton beam. Furthermore, the Bragg curve and spread-out Bragg peak were also measured and the linear-energy transfer (LET) dependence of the MOSFET response was investigated. Many characteristics of the MOSFET response for proton beams were the same as those for photon beams reported in previous papers. However, the angular MOSFET responses at 45, 90, 135, 225, 270 and 315 degrees for proton beams were over-responses of about 15%, and moreover the MOSFET response depended strongly on the LET of the proton beam. This study showed that the angular dependence and LET dependence of the MOSFET response must be considered very carefully for quantitative proton dose evaluations.

I-V Characteristics of a Static Random Access Memory Cell Utilizing Ferroelectric Transistors

NASA Technical Reports Server (NTRS)

Laws, Crystal; Mitchell, Cody; Hunt, Mitchell; Ho, Fat D.; MacLeod, Todd C.

2012-01-01

I-V characteristics for FeFET different than that of MOSFET Ferroelectric layer features hysteresis trend whereas MOSFET behaves same for both increasing and decreasing VGS FeFET I-V characteristics doesn't show dependence on VDS A Transistor with different channel length and width as well as various resistance and input voltages give different results As resistance values increased, the magnitude of the drain current decreased.

Radiation dose response of N channel MOSFET submitted to filtered X-ray photon beam

NASA Astrophysics Data System (ADS)

Gonçalves Filho, Luiz C.; Monte, David S.; Barros, Fabio R.; Santos, Luiz A. P.

2018-01-01

MOSFET can operate as a radiation detector mainly in high-energy photon beams, which are normally used in cancer treatments. In general, such an electronic device can work as a dosimeter from threshold voltage shift measurements. The purpose of this article is to show a new way for measuring the dose-response of MOSFETs when they are under X-ray beams generated from 100kV potential range, which is normally used in diagnostic radiology. Basically, the method consists of measuring the MOSFET drain current as a function of the radiation dose. For this the type of device, it has to be biased with a high value resistor aiming to see a substantial change in the drain current after it has been irradiated with an amount of radiation dose. Two types of N channel device were used in the experiment: a signal transistor and a power transistor. The delivered dose to the device was varied and the electrical curves were plotted. Also, a sensitivity analysis of the power MOSFET response was made, by varying the tube potential of about 20%. The results show that both types of devices have responses very similar, the shift in the electrical curve is proportional to the radiation dose. Unlike the power MOSFET, the signal transistor does not provide a linear function between the dose rate and its drain current. We also have observed that the variation in the tube potential of the X-ray equipment produces a very similar dose-response.

SiC JFET Transistor Circuit Model for Extreme Temperature Range

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2008-01-01

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

In vivo proton dosimetry using a MOSFET detector in an anthropomorphic phantom with tissue inhomogeneity.

PubMed

Kohno, Ryosuke; Hotta, Kenji; Matsubara, Kana; Nishioka, Shie; Matsuura, Taeko; Kawashima, Mitsuhiko

2012-03-08

When in vivo proton dosimetry is performed with a metal-oxide semiconductor field-effect transistor (MOSFET) detector, the response of the detector depends strongly on the linear energy transfer. The present study reports a practical method to correct the MOSFET response for linear energy transfer dependence by using a simplified Monte Carlo dose calculation method (SMC). A depth-output curve for a mono-energetic proton beam in polyethylene was measured with the MOSFET detector. This curve was used to calculate MOSFET output distributions with the SMC (SMC(MOSFET)). The SMC(MOSFET) output value at an arbitrary point was compared with the value obtained by the conventional SMC(PPIC), which calculates proton dose distributions by using the depth-dose curve determined by a parallel-plate ionization chamber (PPIC). The ratio of the two values was used to calculate the correction factor of the MOSFET response at an arbitrary point. The dose obtained by the MOSFET detector was determined from the product of the correction factor and the MOSFET raw dose. When in vivo proton dosimetry was performed with the MOSFET detector in an anthropomorphic phantom, the corrected MOSFET doses agreed with the SMC(PPIC) results within the measurement error. To our knowledge, this is the first report of successful in vivo proton dosimetry with a MOSFET detector.

Impact of metal gates on remote phonon scattering in titanium nitride/hafnium dioxide n-channel metal-oxide-semiconductor field effect transistors-low temperature electron mobility study

NASA Astrophysics Data System (ADS)

Maitra, Kingsuk; Frank, Martin M.; Narayanan, Vijay; Misra, Veena; Cartier, Eduard A.

2007-12-01

We report low temperature (40-300 K) electron mobility measurements on aggressively scaled [equivalent oxide thickness (EOT)=1 nm] n-channel metal-oxide-semiconductor field effect transistors (nMOSFETs) with HfO2 gate dielectrics and metal gate electrodes (TiN). A comparison is made with conventional nMOSFETs containing HfO2 with polycrystalline Si (poly-Si) gate electrodes. No substantial change in the temperature acceleration factor is observed when poly-Si is replaced with a metal gate, showing that soft optical phonons are not significantly screened by metal gates. A qualitative argument based on an analogy between remote phonon scattering and high-resolution electron energy-loss spectroscopy (HREELS) is provided to explain the underlying physics of the observed phenomenon. It is also shown that soft optical phonon scattering is strongly damped by thin SiO2 interface layers, such that room temperature electron mobility values at EOT=1 nm become competitive with values measured in nMOSFETs with SiON gate dielectrics used in current high performance processors.

A new DG nanoscale TFET based on MOSFETs by using source gate electrode: 2D simulation and an analytical potential model

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2017-08-01

This paper suggests and investigates a double-gate (DG) MOSFET, which emulates tunnel field effect transistors (M-TFET). We have combined this novel concept into a double-gate MOSFET, which behaves as a tunneling field effect transistor by work function engineering. In the proposed structure, in addition to the main gate, we utilize another gate over the source region with zero applied voltage and a proper work function to convert the source region from N+ to P+. We check the impact obtained by varying the source gate work function and source doping on the device parameters. The simulation results of the M-TFET indicate that it is a suitable case for a switching performance. Also, we present a two-dimensional analytic potential model of the proposed structure by solving the Poisson's equation in x and y directions and by derivatives from the potential profile; thus, the electric field is achieved. To validate our present model, we use the SILVACO ATLAS device simulator. The analytical results have been compared with it.

Power MOSFET Thermal Instability Operation Characterization Support

NASA Technical Reports Server (NTRS)

Shue, John L.; Leidecker, Henning

2010-01-01

Metal-oxide semiconductor field-effect transistors (MOSFETs) are used extensively in flight hardware and ground support equipment. In the quest for faster switching times and lower "on resistance," the MOSFETs designed from 1998 to the present have achieved most of their intended goals. In the quest for lower on resistance and higher switching speeds, the designs now being produced allow the charge-carrier dominated region (once small and outside of the area of concern) to become important and inside the safe operating area (SOA). The charge-carrier dominated region allows more current to flow as the temperature increases. The higher temperatures produce more current resulting in the beginning of thermal runaway. Thermal runaway is a problem affecting a wide range of modern MOSFETs from more than one manufacturer. This report contains information on MOSFET failures, their causes and test results and information dissemination.

MOSFET dosimetry in-vivo at superficial and orthovoltage x-ray energies.

PubMed

Cheung, T; Butson, M J; Yu, P K N

2003-06-01

This note investigates in-vivo dosimetry using a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) for radiotherapy treatment at superficial and orthovoltage x-ray energies. This was performed within one fraction of the patients treatment. Standard measurements along with energy response of the detector are given. Results showed that the MOSFET measurements in-vivo agreed with calculated results on average within +/- 5.6% over all superficial and orthovoltage energies. These variations were slightly larger than TLD results with variations between measured and calculated results being +/- 5.0% for the same patient measurements. The MOSFET device provides adequate in-vivo dosimetry for superficial and orthovoltage energy treatments with the accuracy of the measurements seeming to be relatively on par with TLD in our case. The MOSFET does have the advantage of returning a relatively immediate dosimetric result after irradiation.

A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Edward Namkyu; Shin, Yong Hyeon; Yun, Ilgu, E-mail: iyun@yonsei.ac.kr

2014-11-07

A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulationmore » results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.« less

Static Characteristics of the Ferroelectric Transistor Inverter

NASA Technical Reports Server (NTRS)

Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.

2010-01-01

The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

Review on analog/radio frequency performance of advanced silicon MOSFETs

NASA Astrophysics Data System (ADS)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

MOSFET and MOS capacitor responses to ionizing radiation

NASA Technical Reports Server (NTRS)

Benedetto, J. M.; Boesch, H. E., Jr.

1984-01-01

The ionizing radiation responses of metal oxide semiconductor (MOS) field-effect transistors (FETs) and MOS capacitors are compared. It is shown that the radiation-induced threshold voltage shift correlates closely with the shift in the MOS capacitor inversion voltage. The radiation-induced interface-state density of the MOSFETs and MOS capacitors was determined by several techniques. It is shown that the presence of 'slow' states can interfere with the interface-state measurements.

Characterization of metal oxide field-effect transistors for first helical tomotherapy Hi-Art II unit in India.

PubMed

Kinhikar, Rajesh A; Pai, Rajeshree; Master, Zubin; Deshpande, Deepak D

2009-01-01

To characterize metal oxide semiconductor field-effect transistors (MOSFETs) for a 6-MV photon beam with a first helical tomotherapy Hi-Art II unit in India. Standard sensitivity MOSFETs were first calibrated and then characterized for reproducibility, field size dependence, angular dependence, fade effects, and temperature dependence. The detector sensitivity was estimated for static as well as rotational modes for three jaw settings (1.0 cm x 40 cm, 2.5 cm x 40 cm, and 5 cm x 40 cm) at 1.5-cm depth with a source-to-axis distance (SAD) of 85 cm in virtual water slabs. The A1SL ion chamber and thermoluminescence dosimeters (TLDs) were used to compare the results. No significant difference was found in the detector sensitivity for static and rotational procedures. The average detector sensitivity for static procedures was 1.10 mV/cGy (SD 0.02) while it was 1.12 mV/cGy (SD 0.02) for rotational procedures. The average detector sensitivity found was the same within the experimental uncertainty for static and rotational dose deliveries. The MOSFET reading was consistent and its reproducibility was excellent (+0.5%) while there was no significant dependence of field size. The angular dependence of less than 1.0% was observed. There was negligible fading effect of the MOSFET. The MOSFET response was found independent of temperature in the range 18 degrees-30 degrees. The ion chamber readings were assumed to be a reference for the estimation of the MOSFET calibration factor. The ion chamber and the TLD were in good agreement (+2%) with each other. This study deals only with the measurements and calibration performed on the surface of the phantom. MOSFET was calibrated and validated for phantom surface measurements for a 6-MV photon beam generated by a tomotherapy machine. The sensitivity of the detector was the same for both modes of treatment delivery with tomotherapy. The performance of the MOSFET was validated for and satisfactory for the helical tomotherapy Hi-Art II unit. However, MOSFET may be used for in vivo surface dosimetry only after it is calibrated under the conditions replicating as much as possible the manner in which the dosimeter will be used clinically.

Sub-1-V-60 nm vertical body channel MOSFET-based six-transistor static random access memory array with wide noise margin and excellent power delay product and its optimization with the cell ratio on static random access memory cell

NASA Astrophysics Data System (ADS)

Ogasawara, Ryosuke; Endoh, Tetsuo

2018-04-01

In this study, with the aim to achieve a wide noise margin and an excellent power delay product (PDP), a vertical body channel (BC)-MOSFET-based six-transistor (6T) static random access memory (SRAM) array is evaluated by changing the number of pillars in each part of a SRAM cell, that is, by changing the cell ratio in the SRAM cell. This 60 nm vertical BC-MOSFET-based 6T SRAM array realizes 0.84 V operation under the best PDP and up to 31% improvement of PDP compared with the 6T SRAM array based on a 90 nm planar MOSFET whose gate length and channel width are the same as those of the 60 nm vertical BC-MOSFET. Additionally, the vertical BC-MOSFET-based 6T SRAM array achieves an 8.8% wider read static noise margin (RSNM), a 16% wider write margin (WM), and an 89% smaller leakage. Moreover, it is shown that changing the cell ratio brings larger improvements of RSNM, WM, and write time in the vertical BC-MOSFET-based 6T SRAM array.

Characteristics of a Nonvolatile SRAM Memory Cell Utilizing a Ferroelectric Transistor

NASA Technical Reports Server (NTRS)

Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2011-01-01

The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

Anomalous threshold voltage change by 2 MeV electron irradiation at 100 °C in deep submicron metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Hayama, K.; Ohyama, H.; Simoen, E.; Rafí, J. M.; Mercha, A.; Claeys, C.

2004-04-01

The degradation of the electrical properties of deep submicron metal-oxide-semiconductor field-effect transistors (MOSFETs) by 2 MeV electron irradiation at high temperatures was studied. The irradiation temperatures were 30, 100, 150 and 200 °C, and the fluence was fixed at 1015e/cm2. For most experimental conditions, the threshold voltage (VT) is observed to reduce in absolute value both for n- and p-MOSFETs. This reduction is most pronounced at 100 °C, as at this irradiation temperature, the radiation-induced density of interface traps is highest. It is proposed that hydrogen neutralization of the dopants in the substrate plays a key role, whereby the hydrogen is released from the gate by the 2 MeV electrons.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high-power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Characterization of responses and comparison of calibration factor for commercial MOSFET detectors.

PubMed

Bharanidharan, Ganesan; Manigandan, Durai; Devan, Krishnamurthy; Subramani, Vellaiyan; Gopishankar, Natanasabapathi; Ganesh, Tharmar; Joshi, Rakeshchander; Rath, Gourakishore; Velmurugan, Jagadeesan; Aruna, Prakasarao; Ganesan, Singaravelu

2005-01-01

A commercial metal oxide silicon field effect transistor (MOSFET) dosimeter of model TN502-RD has been characterized for its linearity, reproducibility, field size dependency, dose rate dependency, and angular dependency for Cobalt-60 (60Co), 6-MV, and 15-MV beam energies. The performance of the MOSFET clearly shows that it is highly reproducible, independent of field size and dose rate. Furthermore, MOSFET has a very high degree of linearity, with r-value>0.9 for all 3 energies. The calibration factor for 2 similar MOSFET detectors of model TN502-RD were also estimated and compared for all 3 energies. The calibration factor between the 2 similar MOSFET detectors shows a variation of about 1.8% for 60Co and 15 MV, and for 6 MV it shows variation of about 2.5%, indicating that calibration should be done whenever a new MOSFET is used. However, the detector shows considerable angular dependency of about 8.8% variation. This may be due to the variation in radiation sensitivity between flat and bubble sides of the MOSFET, and indicates that positional care must be taken while using MOSFET for stereotactic radiosurgery and stereotactic radiotherapy dosimetric applications.

Dopant distributions in n-MOSFET structure observed by atom probe tomography.

PubMed

Inoue, K; Yano, F; Nishida, A; Takamizawa, H; Tsunomura, T; Nagai, Y; Hasegawa, M

2009-11-01

The dopant distributions in an n-type metal-oxide-semiconductor field effect transistor (MOSFET) structure were analyzed by atom probe tomography. The dopant distributions of As, P, and B atoms in a MOSFET structure (gate, gate oxide, channel, source/drain extension, and halo) were obtained. P atoms were segregated at the interface between the poly-Si gate and the gate oxide, and on the grain boundaries of the poly-Si gate, which had an elongated grain structure along the gate height direction. The concentration of B atoms was enriched near the edge of the source/drain extension where the As atoms were implanted.

Evaluation of the usefulness of a MOSFET detector in an anthropomorphic phantom for 6-MV photon beam.

PubMed

Kohno, Ryosuke; Hirano, Eriko; Kitou, Satoshi; Goka, Tomonori; Matsubara, Kana; Kameoka, Satoru; Matsuura, Taeko; Ariji, Takaki; Nishio, Teiji; Kawashima, Mitsuhiko; Ogino, Takashi

2010-07-01

In order to evaluate the usefulness of a metal oxide-silicon field-effect transistor (MOSFET) detector as a in vivo dosimeter, we performed in vivo dosimetry using the MOSFET detector with an anthropomorphic phantom. We used the RANDO phantom as an anthropomorphic phantom, and dose measurements were carried out in the abdominal, thoracic, and head and neck regions for simple square field sizes of 10 x 10, 5 x 5, and 3 x 3 cm(2) with a 6-MV photon beam. The dose measured by the MOSFET detector was verified by the dose calculations of the superposition (SP) algorithm in the XiO radiotherapy treatment-planning system. In most cases, the measured doses agreed with the results of the SP algorithm within +/-3%. Our results demonstrated the utility of the MOSFET detector for in vivo dosimetry even in the presence of clinical tissue inhomogeneities.

Multiple negative differential resistance devices with ultra-high peak-to-valley current ratio for practical multi-valued logic and memory applications

NASA Astrophysics Data System (ADS)

Shin, Sunhae; Rok Kim, Kyung

2015-06-01

In this paper, we propose a novel multiple negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) over 106 by combining tunnel diode with a conventional MOSFET, which suppresses the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) in tunnel junction provides the first peak, and the second peak and valley are generated from the suppression of diffusion current in tunnel diode by the off-state MOSFET. The multiple NDR curves can be controlled by doping concentration of tunnel junction and the threshold voltage of MOSFET. By using complementary multiple NDR devices, five-state memory is demonstrated only with six transistors.

Specifics of Pulsed Arc Welding Power Supply Performance Based On A Transistor Switch

NASA Astrophysics Data System (ADS)

Krampit, N. Yu; Kust, T. S.; Krampit, M. A.

2016-08-01

Specifics of designing a pulsed arc welding power supply device are presented in the paper. Electronic components for managing large current was analyzed. Strengths and shortcomings of power supply circuits based on thyristor, bipolar transistor and MOSFET are outlined. As a base unit for pulsed arc welding was chosen MOSFET transistor, which is easy to manage. Measures to protect a transistor are given. As for the transistor control device is a microcontroller Arduino which has a low cost and adequate performance of the work. Bead transfer principle is to change the voltage on the arc in the formation of beads on the wire end. Microcontroller controls transistor when the arc voltage reaches the threshold voltage. Thus there is a separation and transfer of beads without splashing. Control strategies tested on a real device and presented. The error in the operation of the device is less than 25 us, it can be used controlling drop transfer at high frequencies (up to 1300 Hz).

Angular dependence of the MOSFET dosimeter and its impact on in vivo surface dose measurement in breast cancer treatment.

PubMed

Qin, S; Chen, T; Wang, L; Tu, Y; Yue, N; Zhou, J

2014-08-01

The focus of this study is the angular dependence of two types of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) dosimeters (MOSFET20 and OneDose/OneDosePlus) when used for surface dose measurements. External beam radiationat different gantry angles were delivered to a cubic solid water phantom with a MOSFET placed on the top surface at CAX. The long axis of the MOSFET was oriented along the gantry axis of rotation, with the dosimeter (bubble side) facing the radiation source. MOSFET-measured surface doses were compared against calibrated radiochromic film readings. It was found that both types of MOSFET dosimeters exhibited larger than previously reported angular dependence when measuring surface dose in beams at large oblique angles. For the MOSFET20 dosimeter the measured surface dose deviation against film readings was as high as 17% when the incident angle was 72 degrees to the norm of the phantom surface. It is concluded that some MOSFET dosimeters may have a strong angular dependence when placed on the surface of water-equivalent material, even though they may have an isotropic angular response when surrounded by uniform medium. Extra on-surface calibration maybe necessary before using MOSFET dosimeters for skin dose measurement in tangential fields.

Calibration and error analysis of metal-oxide-semiconductor field-effect transistor dosimeters for computed tomography radiation dosimetry.

PubMed

Trattner, Sigal; Prinsen, Peter; Wiegert, Jens; Gerland, Elazar-Lars; Shefer, Efrat; Morton, Tom; Thompson, Carla M; Yagil, Yoad; Cheng, Bin; Jambawalikar, Sachin; Al-Senan, Rani; Amurao, Maxwell; Halliburton, Sandra S; Einstein, Andrew J

2017-12-01

Metal-oxide-semiconductor field-effect transistors (MOSFETs) serve as a helpful tool for organ radiation dosimetry and their use has grown in computed tomography (CT). While different approaches have been used for MOSFET calibration, those using the commonly available 100 mm pencil ionization chamber have not incorporated measurements performed throughout its length, and moreover, no previous work has rigorously evaluated the multiple sources of error involved in MOSFET calibration. In this paper, we propose a new MOSFET calibration approach to translate MOSFET voltage measurements into absorbed dose from CT, based on serial measurements performed throughout the length of a 100-mm ionization chamber, and perform an analysis of the errors of MOSFET voltage measurements and four sources of error in calibration. MOSFET calibration was performed at two sites, to determine single calibration factors for tube potentials of 80, 100, and 120 kVp, using a 100-mm-long pencil ion chamber and a cylindrical computed tomography dose index (CTDI) phantom of 32 cm diameter. The dose profile along the 100-mm ion chamber axis was sampled in 5 mm intervals by nine MOSFETs in the nine holes of the CTDI phantom. Variance of the absorbed dose was modeled as a sum of the MOSFET voltage measurement variance and the calibration factor variance, the latter being comprised of three main subcomponents: ionization chamber reading variance, MOSFET-to-MOSFET variation and a contribution related to the fact that the average calibration factor of a few MOSFETs was used as an estimate for the average value of all MOSFETs. MOSFET voltage measurement error was estimated based on sets of repeated measurements. The calibration factor overall voltage measurement error was calculated from the above analysis. Calibration factors determined were close to those reported in the literature and by the manufacturer (~3 mV/mGy), ranging from 2.87 to 3.13 mV/mGy. The error σ V of a MOSFET voltage measurement was shown to be proportional to the square root of the voltage V: σV=cV where c = 0.11 mV. A main contributor to the error in the calibration factor was the ionization chamber reading error with 5% error. The usage of a single calibration factor for all MOSFETs introduced an additional error of about 5-7%, depending on the number of MOSFETs that were used to determine the single calibration factor. The expected overall error in a high-dose region (~30 mGy) was estimated to be about 8%, compared to 6% when an individual MOSFET calibration was performed. For a low-dose region (~3 mGy), these values were 13% and 12%. A MOSFET calibration method was developed using a 100-mm pencil ion chamber and a CTDI phantom, accompanied by an absorbed dose error analysis reflecting multiple sources of measurement error. When using a single calibration factor, per tube potential, for different MOSFETs, only a small error was introduced into absorbed dose determinations, thus supporting the use of a single calibration factor for experiments involving many MOSFETs, such as those required to accurately estimate radiation effective dose. © 2017 American Association of Physicists in Medicine.

Low-frequency noise behavior of polysilicon emitter bipolar junction transistors: a review

NASA Astrophysics Data System (ADS)

Deen, M. Jamal; Pascal, Fabien

2003-05-01

For many analog integrated circuit applications, the polysilicon emitter bipolar junction transistor (PE-BJT) is still the preferred choice because of its higher operational frequency and lower noise performance characteristics compared to MOS transistors of similar active areas and at similar biasing currents. In this paper, we begin by motivating the reader with reasons why bipolar transistors are still of great interest for analog integrated circuits. This motivation includes a comparison between BJT and the MOSFET using a simple small-signal equivalent circuit to derive important parameters that can be used to compare these two technologies. An extensive review of the popular theories used to explain low frequency noise results is presented. However, in almost all instances, these theories have not been fully tested. The effects of different processing technologies and conditions on the noise performance of PE-BJTs is reviewed and a summary of some of the key technological steps and device parameters and their effects on noise is discussed. The effects of temperature and emitter geometries scaling is reviewed. It is shown that dispersion of the low frequency noise in ultra-small geometries is a serious issue since the rate of increase of the noise dispersion is faster than the noise itself as the emitter geometry is scaled to smaller values. Finally, some ideas for future research on PE-BJTs, some of which are also applicable to SiGe heteorjunction bipolar transistors and MOSFETs, are presented after the conclusions.

Spin Transport in Nondegenerate Si with a Spin MOSFET Structure at Room Temperature

NASA Astrophysics Data System (ADS)

Sasaki, Tomoyuki; Ando, Yuichiro; Kameno, Makoto; Tahara, Takayuki; Koike, Hayato; Oikawa, Tohru; Suzuki, Toshio; Shiraishi, Masashi

2014-09-01

Spin transport in nondegenerate semiconductors is expected to pave the way to the creation of spin transistors, spin logic devices, and reconfigurable logic circuits, because room-temperature (RT) spin transport in Si has already been achieved. However, RT spin transport has been limited to degenerate Si, which makes it difficult to produce spin-based signals because a gate electric field cannot be used to manipulate such signals. Here, we report the experimental demonstration of spin transport in nondegenerate Si with a spin metal-oxide-semiconductor field-effect transistor (MOSFET) structure. We successfully observe the modulation of the Hanle-type spin-precession signals, which is a characteristic spin dynamics in nondegenerate semiconductors. We obtain long spin transport of more than 20 μm and spin rotation greater than 4π at RT. We also observe gate-induced modulation of spin-transport signals at RT. The modulation of the spin diffusion length as a function of a gate voltage is successfully observed, which we attribute to the Elliott-Yafet spin relaxation mechanism. These achievements are expected to lead to the creation of practical Si-based spin MOSFETs.

Steep-slope hysteresis-free negative capacitance MoS2 transistors

NASA Astrophysics Data System (ADS)

Si, Mengwei; Su, Chun-Jung; Jiang, Chunsheng; Conrad, Nathan J.; Zhou, Hong; Maize, Kerry D.; Qiu, Gang; Wu, Chien-Ting; Shakouri, Ali; Alam, Muhammad A.; Ye, Peide D.

2018-01-01

The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption1,2. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier3. Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel4-12. Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

Vertical Isolation for Photodiodes in CMOS Imagers

NASA Technical Reports Server (NTRS)

Pain, Bedabrata

2008-01-01

In a proposed improvement in complementary metal oxide/semi conduct - or (CMOS) image detectors, two additional implants in each pixel would effect vertical isolation between the metal oxide/semiconductor field-effect transistors (MOSFETs) and the photodiode of the pixel. This improvement is expected to enable separate optimization of the designs of the photodiode and the MOSFETs so as to optimize their performances independently of each other. The purpose to be served by enabling this separate optimization is to eliminate or vastly reduce diffusion cross-talk, thereby increasing sensitivity, effective spatial resolution, and color fidelity while reducing noise.

Switching Characteristics of Ferroelectric Transistor Inverters

NASA Technical Reports Server (NTRS)

Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.

2010-01-01

This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.

Silicon device performance measurements to support temperature range enhancement

NASA Technical Reports Server (NTRS)

Johnson, R. Wayne; Askew, Ray; Bromstead, James; Weir, Bennett

1991-01-01

The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell.

PubMed

Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis

2014-03-28

Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

In vivo proton dosimetry using a MOSFET detector in an anthropomorphic phantom with tissue inhomogeneity

PubMed Central

Hotta, Kenji; Matsubara, Kana; Nishioka, Shie; Matsuura, Taeko; Kawashima, Mitsuhiko

2012-01-01

When in vivo proton dosimetry is performed with a metal‐oxide semiconductor field‐effect transistor (MOSFET) detector, the response of the detector depends strongly on the linear energy transfer. The present study reports a practical method to correct the MOSFET response for linear energy transfer dependence by using a simplified Monte Carlo dose calculation method (SMC). A depth‐output curve for a mono‐energetic proton beam in polyethylene was measured with the MOSFET detector. This curve was used to calculate MOSFET output distributions with the SMC (SMCMOSFET). The SMCMOSFET output value at an arbitrary point was compared with the value obtained by the conventional SMCPPIC, which calculates proton dose distributions by using the depth‐dose curve determined by a parallel‐plate ionization chamber (PPIC). The ratio of the two values was used to calculate the correction factor of the MOSFET response at an arbitrary point. The dose obtained by the MOSFET detector was determined from the product of the correction factor and the MOSFET raw dose. When in vivo proton dosimetry was performed with the MOSFET detector in an anthropomorphic phantom, the corrected MOSFET doses agreed with the SMCPPIC results within the measurement error. To our knowledge, this is the first report of successful in vivo proton dosimetry with a MOSFET detector. PACS number: 87.56.‐v PMID:22402385

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

NASA Astrophysics Data System (ADS)

Hu, Ai-Bin; Xu, Qiu-Xia

2010-05-01

Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.

Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer.

PubMed

Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J

2016-06-09

Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack.

P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas

PubMed Central

Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

2016-01-01

The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of −2 V and drain bias of −15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm2/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG. PMID:27021054

CMOS Image Sensor Using SOI-MOS/Photodiode Composite Photodetector Device

NASA Astrophysics Data System (ADS)

Uryu, Yuko; Asano, Tanemasa

2002-04-01

A new photodetector device composed of a lateral junction photodiode and a metal-oxide-semiconductor field-effect-transistor (MOSFET), in which the output of the diode is fed through the body of the MOSFET, has been investigated. It is shown that the silicon-on-insulator (SOI)-MOSFET amplifies the junction photodiode current due to the lateral bipolar action. It is also shown that the presence of the electrically floating gate enhances the current amplification factor of the SOI-MOSFET. The output current of this composite device linearly responds by four orders of illumination intensity. As an application of the composite device, a complementary-metal-oxide-semiconductor (CMOS) line sensor incorporating the composite device is fabricated and its operation is demonstrated. The output signal of the line sensor using the composite device was two times larger than that using the lateral photodiode.

A two dimensional analytical modeling of surface potential in triple metal gate (TMG) fully-depleted Recessed-Source/Drain (Re-S/D) SOI MOSFET

NASA Astrophysics Data System (ADS)

Priya, Anjali; Mishra, Ram Awadh

2016-04-01

In this paper, analytical modeling of surface potential is proposed for new Triple Metal Gate (TMG) fully depleted Recessed-Source/Dain Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The metal with the highest work function is arranged near the source region and the lowest one near the drain. Since Recessed-Source/Drain SOI MOSFET has higher drain current as compared to conventional SOI MOSFET due to large source and drain region. The surface potential model developed by 2D Poisson's equation is verified by comparison to the simulation result of 2-dimensional ATLAS simulator. The model is compared with DMG and SMG devices and analysed for different device parameters. The ratio of metal gate length is varied to optimize the result.

Kink effect in ultrathin FDSOI MOSFETs

NASA Astrophysics Data System (ADS)

Park, H. J.; Bawedin, M.; Choi, H. G.; Cristoloveanu, S.

2018-05-01

Systematic experiments demonstrate the presence of the kink effect even in FDSOI MOSFETs. The back-gate bias controls the kink effect via the formation of a back accumulation channel. The kink is more or less pronounced according to the film thickness and channel length. However, in ultrathin (<10 nm) and/or very short transistors (L < 50 nm), the kink is totally absent as a consequence of super-coupling effect. For the first time, thanks to the availability of body contacts, the body potential is probed to evidence the impact of majority carrier accumulation and drain pulse duration on the kink effect onset. He is currently working toward the Ph.D. degree in FDSOI device characterization and simulation at a laboratory of IMEP-lahc, Université Grenoble Alpes, Minatec, Grenoble, France. His research interests include residual floating body effects, electrical characterization, and device simulation for ultra FDSOI MOSFETs.

An Overview of High-k Oxides on Hydrogenated-Diamond for Metal-Oxide-Semiconductor Capacitors and Field-Effect Transistors.

PubMed

Liu, Jiangwei; Koide, Yasuo

2018-06-04

Thanks to its excellent intrinsic properties, diamond is promising for applications of high-power electronic devices, ultraviolet detectors, biosensors, high-temperature tolerant gas sensors, etc. Here, an overview of high- k oxides on hydrogenated-diamond (H-diamond) for metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) is demonstrated. Fabrication routines for the H-diamond MOS capacitors and MOSFETs, band configurations of oxide/H-diamond heterointerfaces, and electrical properties of the MOS and MOSFETs are summarized and discussed. High- k oxide insulators are deposited using atomic layer deposition (ALD) and sputtering deposition (SD) techniques. Electrical properties of the H-diamond MOS capacitors with high- k oxides of ALD-Al₂O₃, ALD-HfO₂, ALD-HfO₂/ALD-Al₂O₃ multilayer, SD-HfO₂/ALD-HfO₂ bilayer, SD-TiO₂/ALD-Al₂O₃ bilayer, and ALD-TiO₂/ALD-Al₂O₃ bilayer are discussed. Analyses for capacitance-voltage characteristics of them show that there are low fixed and trapped charge densities for the ALD-Al₂O₃/H-diamond and SD-HfO₂/ALD-HfO₂/H-diamond MOS capacitors. The k value of 27.2 for the ALD-TiO₂/ALD-Al₂O₃ bilayer is larger than those of the other oxide insulators. Drain-source current versus voltage curves show distinct pitch-off and p -type channel characteristics for the ALD-Al₂O₃/H-diamond, SD-HfO₂/ALD-HfO₂/H-diamond, and ALD-TiO₂/ALD-Al₂O₃/H-diamond MOSFETs. Understanding of fabrication routines and electrical properties for the high- k oxide/H-diamond MOS electronic devices is meaningful for the fabrication of high-performance H-diamond MOS capacitor and MOSFET gas sensors.

Annealing effects on hydrogenated diamond NOR logic circuits

NASA Astrophysics Data System (ADS)

Liu, J. W.; Oosato, H.; Liao, M. Y.; Imura, M.; Watanabe, E.; Koide, Y.

2018-04-01

Here, hydrogenated diamond (H-diamond) NOR logic circuits composed of two p-type enhancement-mode (E-mode) metal-oxide-semiconductor field-effect-transistors (MOSFETs) and a load resistor are fabricated and characterized. The fabrication process and the annealing effect on the electrical properties of the NOR logic circuit are demonstrated. There are distinct logical characteristics for the as-received and 300 °C annealed NOR logic circuits. When one or both input voltages for the E-mode MOSFETs are -10.0 V and "high" signals, output voltages respond 0 V and "low" signals. Instead, when both input voltages are 0 V and "low" signals, output voltage responds -10.0 V and a "high" signal. After annealing at 400 °C, the NOR logical characteristics are damaged, which is possibly attributed to the degradation of the H-diamond MOSFETs.

95 MeV oxygen ion irradiation effects on N-channel MOSFETs

NASA Astrophysics Data System (ADS)

Prakash, A. P. G.; Ke, S. C.; Siddappa, K.

2003-09-01

The N-channel metal oxide semiconductor field effect transistors (MOSFETs) were exposed to 95 MeV oxygen ions, in the fluence range of 5 x 10(10) to 5 x 10(13) ions/cm(2). The influence of ion irradiation on threshold voltage (V-TH), linear drain current (I-DLin), leakage current (I-L), drain conductance (g(D)), transconductance (g(m)), mobility (mu) and drain saturation current (I-DSat) of MOSFETs was studied systematically for various fluence. The V-TH of the irradiated MOSFET was found to decrease significantly after irradiation. The interface (N-it) and oxide trapped charge (N-ot) were estimated from the subthreshold measurements and were found to increase after irradiation. The densities of oxide-trapped (DeltaN(it)) charge in irradiated MOSFETs were found to he higher than those of the interface trapped charge (DeltaN(ot)). The I-DLin and I-Dsat of MOSFETs were also found to decrease significantly after irradiation. Studies on effects of 95 MeV oxygen ion irradiation on g(m), g(D) and mu show a degradation varying front 70 to 75% after irradiation. The mobility degradation coefficients for N-it(alpha(it)) and N-ot(alpha(it)) were estimated. The results of these studies are presented and discussed.

Regenerative switching CMOS system

DOEpatents

Welch, James D.

1998-01-01

Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a seriesed combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided.

Regenerative switching CMOS system

DOEpatents

Welch, J.D.

1998-06-02

Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a series combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electrically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided. 14 figs.

Photo-electronic current transport in back-gated graphene transistor

NASA Astrophysics Data System (ADS)

Srivastava, Ashok; Chen, Xinlu; Pradhan, Aswini K.

2017-04-01

In this work, we have studied photo-electronic current transport in a back-gated graphene field-effect transistor. Under the light illumination, band bending at the metal/graphene interface develops a built-in potential which generates photonic current at varying back-gate biases. A typical MOSFET type back-gated transistor structure uses a monolayer graphene as the channel layer formed over the silicon dioxide/silicon substrate. It is shown that the photo-electronic current consists of current contributions from photovoltaic, photo-thermoelectric and photo-bolometric effects. A maximum external responsivity close to 0.0009A/W is achieved at 30μW laser power source and 633nm wavelength.

Characterization of a Common-Source Amplifier Using Ferroelectric Transistors

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; MacLeond, Todd C.; Ho, Pat D.

2010-01-01

This paper presents empirical data that was collected through experiments using a FeFET in the established common-source amplifier circuit. The unique behavior of the FeFET lends itself to interesting and useful operation in this widely used common-source amplifier. The paper examines the effect of using a ferroelectric transistor for the amplifier. It also examines the effects of varying load resistance, biasing, and input voltages on the output signal and gives several examples of the output of the amplifier for a given input. The difference between a commonsource amplifier using a ferroelectric transistor and that using a MOSFET is addressed.

Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Djara, V.; Cherkaoui, K.; Negara, M. A.

2015-11-28

An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N{sub inv}) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I{sub d}-V{sub g}more » measurements enabled an accurate effective mobility vs N{sub inv} extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs.« less

The Development of SiC MOSFET-based Switching Power Amplifiers for Fusion Science

NASA Astrophysics Data System (ADS)

Prager, James; Ziemba, Timothy; Miller, Kenneth; Picard, Julian

2015-11-01

Eagle Harbor Technologies (EHT), Inc. is developing a switching power amplifier (SPA) based on silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET). SiC MOSFETs offer many advantages over IGBTs including lower drive energy requirements, lower conduction and switching losses, and higher switching frequency capabilities. When comparing SiC and traditional silicon-based MOSFETs, SiC MOSFETs provide higher current carrying capability allowing for smaller package weights and sizes and lower operating temperature. EHT has conducted single device testing that directly compares the capabilities of SiC MOSFETs and IGBTs to demonstrate the utility of SiC MOSFETs for fusion science applications. These devices have been built into a SPA that can drive resistive loads and resonant tank loads at 800 V, 4.25 kA at pulse repetition frequencies up to 1 MHz. During the Phase II program, EHT will finalize the design of the SPA. In Year 2, EHT will replace the SPAs used in the HIT-SI lab at the University of Washington to allow for operation over 100 kHz. SPA prototype results will be presented. This work is supported under DOE Grant # DE-SC0011907.

Lightning Pin Injection Testing on MOSFETS

NASA Technical Reports Server (NTRS)

Ely, Jay J.; Nguyen, Truong X.; Szatkowski, George N.; Koppen, Sandra V.; Mielnik, John J.; Vaughan, Roger K.; Wysocki, Philip F.; Celaya, Jose R.; Saha, Sankalita

2009-01-01

Lightning transients were pin-injected into metal-oxide-semiconductor field-effect transistors (MOSFETs) to induce fault modes. This report documents the test process and results, and provides a basis for subsequent lightning tests. MOSFETs may be present in DC-DC power supplies and electromechanical actuator circuits that may be used on board aircraft. Results show that unprotected MOSFET Gates are susceptible to failure, even when installed in systems in well-shielded and partial-shielded locations. MOSFET Drains and Sources are significantly less susceptible. Device impedance decreased (current increased) after every failure. Such a failure mode may lead to cascading failures, as the damaged MOSFET may allow excessive current to flow through other circuitry. Preliminary assessments on a MOSFET subjected to 20-stroke pin-injection testing demonstrate that Breakdown Voltage, Leakage Current and Threshold Voltage characteristics show damage, while the device continues to meet manufacturer performance specifications. The purpose of this research is to develop validated tools, technologies, and techniques for automated detection, diagnosis and prognosis that enable mitigation of adverse events during flight, such as from lightning transients; and to understand the interplay between lightning-induced surges and aging (i.e. humidity, vibration thermal stress, etc.) on component degradation.

Radiation Effects on DC-DC Converters

NASA Technical Reports Server (NTRS)

Zhang, De-Xin; AbdulMazid, M. D.; Attia, John O.; Kankam, Mark D. (Technical Monitor)

2001-01-01

In this work, several DC-DC converters were designed and built. The converters are Buck Buck-Boost, Cuk, Flyback, and full-bridge zero-voltage switched. The total ionizing dose radiation and single event effects on the converters were investigated. The experimental results for the TID effects tests show that the voltages of the Buck Buck-Boost, Cuk, and Flyback converters increase as total dose increased when using power MOSFET IRF250 as a switching transistor. The change in output voltage with total dose is highest for the Buck converter and the lowest for Flyback converter. The trend of increase in output voltages with total dose in the present work agrees with those of the literature. The trends of the experimental results also agree with those obtained from PSPICE simulation. For the full-bridge zero-voltage switch converter, it was observed that the dc-dc converter with IRF250 power MOSFET did not show a significant change of output voltage with total dose. In addition, for the dc-dc converter with FSF254R4 radiation-hardened power MOSFET, the output voltage did not change significantly with total dose. The experimental results were confirmed by PSPICE simulation that showed that FB-ZVS converter with IRF250 power MOSFET's was not affected with the increase in total ionizing dose. Single Event Effects (SEE) radiation tests were performed on FB-ZVS converters. It was observed that the FB-ZVS converter with the IRF250 power MOSFET, when the device was irradiated with Krypton ion with ion-energy of 150 MeV and LET of 41.3 MeV-square cm/mg, the output voltage increased with the increase in fluence. However, for Krypton with ion-energy of 600 MeV and LET of 33.65 MeV-square cm/mg, and two out of four transistors of the converter were permanently damaged. The dc-dc converter with FSF254R4 radiation hardened power MOSFET's did not show significant change at the output voltage with fluence while being irradiated by Krypton with ion energy of 1.20 GeV and LET of 25.97 MeV-square cm/mg. This might be due to fact that the device is radiation hardened.

Energy dependence corrections to MOSFET dosimetric sensitivity.

PubMed

Cheung, T; Butson, M J; Yu, P K N

2009-03-01

Metal Oxide Semiconductor Field Effect Transistors (MOSFET's) are dosimeters which are now frequently utilized in radiotherapy treatment applications. An improved MOSFET, clinical semiconductor dosimetry system (CSDS) which utilizes improved packaging for the MOSFET device has been studied for energy dependence of sensitivity to x-ray radiation measurement. Energy dependence from 50 kVp to 10 MV x-rays has been studied and found to vary by up to a factor of 3.2 with 75 kVp producing the highest sensitivity response. The detectors average life span in high sensitivity mode is energy related and ranges from approximately 100 Gy for 75 kVp x-rays to approximately 300 Gy at 6 MV x-ray energy. The MOSFET detector has also been studied for sensitivity variations with integrated dose history. It was found to become less sensitive to radiation with age and the magnitude of this effect is dependant on radiation energy with lower energies producing a larger sensitivity reduction with integrated dose. The reduction in sensitivity is however approximated reproducibly by a slightly non linear, second order polynomial function allowing corrections to be made to readings to account for this effect to provide more accurate dose assessments both in phantom and in-vivo.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

Monte carlo study of MOSFET packaging, optimised for improved energy response: single MOSFET filtration.

PubMed

Othman, M A R; Cutajar, D L; Hardcastle, N; Guatelli, S; Rosenfeld, A B

2010-09-01

Monte Carlo simulations of the energy response of a conventionally packaged single metal-oxide field effect transistors (MOSFET) detector were performed with the goal of improving MOSFET energy dependence for personal accident or military dosimetry. The MOSFET detector packaging was optimised. Two different 'drop-in' design packages for a single MOSFET detector were modelled and optimised using the GEANT4 Monte Carlo toolkit. Absorbed photon dose simulations of the MOSFET dosemeter placed in free-air response, corresponding to the absorbed doses at depths of 0.07 mm (D(w)(0.07)) and 10 mm (D(w)(10)) in a water equivalent phantom of size 30 x 30 x 30 cm(3) for photon energies of 0.015-2 MeV were performed. Energy dependence was reduced to within + or - 60 % for photon energies 0.06-2 MeV for both D(w)(0.07) and D(w)(10). Variations in the response for photon energies of 15-60 keV were 200 and 330 % for D(w)(0.07) and D(w)(10), respectively. The obtained energy dependence was reduced compared with that for conventionally packaged MOSFET detectors, which usually exhibit a 500-700 % over-response when used in free-air geometry.

Characterization of MOSFET detectors for in vivo dosimetry in interventional radiology and for dose reconstruction in case of overexposure.

PubMed

Bassinet, Céline; Huet, Christelle; Baumann, Marion; Etard, Cécile; Réhel, Jean-Luc; Boisserie, Gilbert; Debroas, Jacques; Aubert, Bernard; Clairand, Isabelle

2013-04-01

As MOSFET (Metal Oxide Semiconductor Field Effect Transistor) detectors allow dose measurements in real time, the interest in these dosimeters is growing. The aim of this study was to investigate the dosimetric properties of commercially available TN-502RD-H MOSFET silicon detectors (Best Medical Canada, Ottawa, Canada) in order to use them for in vivo dosimetry in interventional radiology and for dose reconstruction in case of overexposure. Reproducibility of the measurements, dose rate dependence, and dose response of the MOSFET detectors have been studied with a Co source. Influence of the dose rate, frequency, and pulse duration on MOSFET responses has also been studied in pulsed x-ray fields. Finally, in order to validate the integrated dose given by MOSFET detectors, MOSFETs and TLDs (LiF:Mg,Cu,P) were fixed on an Alderson-Rando phantom in the conditions of an interventional neuroradiology procedure, and their responses have been compared. The results of this study show the suitability of MOSFET detectors for in vivo dosimetry in interventional radiology and for dose reconstruction in case of accident, provided a well-corrected energy dependence, a pulse duration equal to or higher than 10 ms, and an optimized contact between the detector and the skin of the patient are achieved.

Volumetric measurement of human red blood cells by MOSFET-based microfluidic gate.

PubMed

Guo, Jinhong; Ai, Ye; Cheng, Yuanbing; Li, Chang Ming; Kang, Yuejun; Wang, Zhiming

2015-08-01

In this paper, we present a MOSFET-based (metal oxide semiconductor field-effect transistor) microfluidic gate to characterize the translocation of red blood cells (RBCs) through a gate. In the microfluidic system, the bias voltage modulated by the particles or biological cells is connected to the gate of MOSFET. The particles or cells can be detected by monitoring the MOSFET drain current instead of DC/AC-gating method across the electronic gate. Polystyrene particles with various standard sizes are utilized to calibrate the proposed device. Furthermore, RBCs from both adults and newborn blood sample are used to characterize the performance of the device in distinguishing the two types of RBCs. As compared to conventional DC/AC current modulation method, the proposed device demonstrates a higher sensitivity and is capable of being a promising platform for bioassay analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Detecting a Protein in its Natural Environment with a MOSFET Transistor

NASA Astrophysics Data System (ADS)

Perez, Benjamin; Balijepalli, Arvind

2015-03-01

Our group's goal is to make a MOSFET transistor that has a nanopore through it. We want to have proteins flow through this device and examine their structure based on the modulation they cause on the current. This process does not harm the protein and allows the protein to be studied in its natural environment. The electric field and electric potential of a point charge were computed within a nano-transistor. The simulations were used to see if the point charge had enough influence on the current to cause a modulation. The point charge did cause a rise in the current making the modulation concept a viable one for medical applications. COMSOL metaphysics software was used to perform all simulations. The Society of Physics Students internship program and NIST.

Influence of 2D electrostatic effects on the high-frequency noise behavior of sub-100-nm scaled MOSFETs

NASA Astrophysics Data System (ADS)

Rengel, Raul; Pardo, Daniel; Martin, Maria J.

2004-05-01

In this work, we have performed an investigation of the consequences of dowscaling the bulk MOSFET beyond the 100 nm range by means of a particle-based Monte Carlo simulator. Taking a 250 nm gate-length ideal structure as the starting point, the constant field scaling rules (also known as "classical" scaling) are considered and the high-frequency dynamic and noise performance of transistors with 130 nm, 90 nm and 60 nm gate-lengths are studied in depth. The analysis of internal quantities such as electric fields, velocity and energy of carriers or conduction band profiles shows the increasing importance of electrostatic two-dimensional effects due to the proximity of source and drain regions even when the most ideal bias conditions are imposed. As a consequence, a loss of the transistor action for the smallest MOSFET and the degradation of the most important high-frequency figures of merit is observed. Whereas the comparative values of intrinsic noise sources (SID, SIG) are improved when reducing the dimensions and the bias voltages, the poor dynamic performance yields an overall worse noise behaviour than expected (especially for Rn and Gass), limiting at the same time the useful bias ranges and conditions for a proper low-noise configuration.

Negative bias-and-temperature stress-assisted activation of oxygen-vacancy hole traps in 4H-silicon carbide metal-oxide-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ettisserry, D. P., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Goldsman, N., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Akturk, A.

We use hybrid-functional density functional theory-based Charge Transition Levels (CTLs) to study the electrical activity of near-interfacial oxygen vacancies located in the oxide side of 4H-Silicon Carbide (4H-SiC) power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). Based on the “amorphousness” of their local atomic environment, oxygen vacancies are shown to introduce their CTLs either within (permanently electrically active) or outside of (electrically inactive) the 4H-SiC bandgap. The “permanently electrically active” centers are likely to cause threshold voltage (V{sub th}) instability at room temperature. On the other hand, we show that the “electrically inactive” defects could be transformed into various “electrically active” configurations undermore » simultaneous application of negative bias and high temperature stresses. Based on this observation, we present a model for plausible oxygen vacancy defects that could be responsible for the recently observed excessive worsening of V{sub th} instability in 4H-SiC power MOSFETs under high temperature-and-gate bias stress. This model could also explain the recent electrically detected magnetic resonance observations in 4H-SiC MOSFETs.« less

Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer

PubMed Central

Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J.

2016-01-01

Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack. PMID:27279454

Saving Moore’s Law Down To 1 nm Channels With Anisotropic Effective Mass

NASA Astrophysics Data System (ADS)

Ilatikhameneh, Hesameddin; Ameen, Tarek; Novakovic, Bozidar; Tan, Yaohua; Klimeck, Gerhard; Rahman, Rajib

2016-08-01

Scaling transistors’ dimensions has been the thrust for the semiconductor industry in the last four decades. However, scaling channel lengths beyond 10 nm has become exceptionally challenging due to the direct tunneling between source and drain which degrades gate control, switching functionality, and worsens power dissipation. Fortunately, the emergence of novel classes of materials with exotic properties in recent times has opened up new avenues in device design. Here, we show that by using channel materials with an anisotropic effective mass, the channel can be scaled down to 1 nm and still provide an excellent switching performance in phosphorene nanoribbon MOSFETs. To solve power consumption challenge besides dimension scaling in conventional transistors, a novel tunnel transistor is proposed which takes advantage of anisotropic mass in both ON- and OFF-state of the operation. Full-band atomistic quantum transport simulations of phosphorene nanoribbon MOSFETs and TFETs based on the new design have been performed as a proof.

Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena

This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{supmore » 11} cm{sup −2}).« less

Direct and pulsed current annealing of p-MOSFET based dosimeter: the "MOSkin".

PubMed

Alshaikh, Sami; Carolan, Martin; Petasecca, Marco; Lerch, Michael; Metcalfe, Peter; Rosenfeld, Anatoly

2014-06-01

Contemporary radiation therapy (RT) is complicated and requires sophisticated real-time quality assurance (QA). While 3D real-time dosimetry is most preferable in RT, it is currently not fully realised. A small, easy to use and inexpensive point dosimeter with real-time and in vivo capabilities is an option for routine QA. Such a dosimeter is essential for skin, in vivo or interface dosimetry in phantoms for treatment plan verification. The metal-oxide-semiconductor-field-effect-transistor (MOSFET) detector is one of the best choices for these purposes, however, the MOSFETs sensitivity and its signal stability degrade after essential irradiation which limits its lifespan. The accumulation of positive charge on the gate oxide and the creation of interface traps near the silicon-silicon dioxide layer is the primary physical phenomena responsible for this degradation. The aim of this study is to investigate MOSFET dosimeter recovery using two proposed annealing techniques: direct current (DC) and pulsed current (PC), both based on hot charged carrier injection into the gate oxide of the p-MOSFET dosimeter. The investigated MOSFETs were reused multiple times using an irradiation-annealing cycle. The effect of the current-annealing parameters was investigated for the dosimetric characteristics of the recovered MOSFET dosimeters such as linearity, sensitivity and initial threshold voltage. Both annealing techniques demonstrated excellent results in terms of maintaining a stable response, linearity and sensitivity of the MOSFET dosimeter. However, PC annealing is more preferable than DC annealing as it offers better dose response linearity of the reused MOSFET and has a very short annealing time.

1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors.

PubMed

Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

2009-01-01

We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

Measurement and comparison of skin dose using OneDose MOSFET and Mobile MOSFET for patients with acute lymphoblastic leukemia

PubMed Central

Mattar, Essam H.; Hammad, Lina F.; Al-Mohammed, Huda I.

2011-01-01

Summary Background Total body irradiation is a protocol used to treat acute lymphoblastic leukemia in patients prior to bone marrow transplant. It is involved in the treatment of the whole body using a large radiation field with extended source-skin distance. Therefore measuring and monitoring the skin dose during the treatment is important. Two kinds of metal oxide semiconductor field effect transistor (OneDose MOSFET and mobile MOSEFT) dosimeter are used during the treatment delivery to measure the skin dose to specific points and compare it with the target prescribed dose. The objective of this study was to compare the variation of skin dose in patients with acute lymphatic leukemia (ALL) treated with total body irradiation (TBI) using OneDose MOSFET detectors and Mobile MOSFET, and then compare both results with the target prescribed dose. Material/Methods The measurements involved 32 patient’s (16 males, 16 females), aged between 14–30 years, with an average age of 22.41 years. One-Dose MOSFET and Mobile MOSFET dosimetry were performed at 10 different anatomical sites on every patient. Results The results showed there was no variation between skin dose measured with OneDose MOSFET and Mobile MOSFET in all patients. Furthermore, the results showed for every anatomical site selected there was no significant difference in the dose delivered using either OneDose MOSFET detector or Mobile MOSFET as compared to the prescribed dose. Conclusions The study concludes that One-Dose MOSFET detectors and Mobile MOSFET both give a direct read-out immediately after the treatment; therefore both detectors are suitable options when measuring skin dose for total body irradiation treatment. PMID:21709641

Measurement and comparison of skin dose using OneDose MOSFET and Mobile MOSFET for patients with acute lymphoblastic leukemia.

PubMed

Mattar, Essam H; Hammad, Lina F; Al-Mohammed, Huda I

2011-07-01

Total body irradiation is a protocol used to treat acute lymphoblastic leukemia in patients prior to bone marrow transplant. It is involved in the treatment of the whole body using a large radiation field with extended source-skin distance. Therefore measuring and monitoring the skin dose during the treatment is important. Two kinds of metal oxide semiconductor field effect transistor (OneDose MOSFET and mobile MOSEFT) dosimeter are used during the treatment delivery to measure the skin dose to specific points and compare it with the target prescribed dose. The objective of this study was to compare the variation of skin dose in patients with acute lymphatic leukemia (ALL) treated with total body irradiation (TBI) using OneDose MOSFET detectors and Mobile MOSFET, and then compare both results with the target prescribed dose. The measurements involved 32 patient's (16 males, 16 females), aged between 14-30 years, with an average age of 22.41 years. One-Dose MOSFET and Mobile MOSFET dosimetry were performed at 10 different anatomical sites on every patient. The results showed there was no variation between skin dose measured with OneDose MOSFET and Mobile MOSFET in all patients. Furthermore, the results showed for every anatomical site selected there was no significant difference in the dose delivered using either OneDose MOSFET detector or Mobile MOSFET as compared to the prescribed dose. The study concludes that One-Dose MOSFET detectors and Mobile MOSFET both give a direct read-out immediately after the treatment; therefore both detectors are suitable options when measuring skin dose for total body irradiation treatment.

Estimation of computed tomography dose index in cone beam computed tomography: MOSFET measurements and Monte Carlo simulations.

PubMed

Kim, Sangroh; Yoshizumi, Terry; Toncheva, Greta; Yoo, Sua; Yin, Fang-Fang; Frush, Donald

2010-05-01

To address the lack of accurate dose estimation method in cone beam computed tomography (CBCT), we performed point dose metal oxide semiconductor field-effect transistor (MOSFET) measurements and Monte Carlo (MC) simulations. A Varian On-Board Imager (OBI) was employed to measure point doses in the polymethyl methacrylate (PMMA) CT phantoms with MOSFETs for standard and low dose modes. A MC model of the OBI x-ray tube was developed using BEAMnrc/EGSnrc MC system and validated by the half value layer, x-ray spectrum and lateral and depth dose profiles. We compared the weighted computed tomography dose index (CTDIw) between MOSFET measurements and MC simulations. The CTDIw was found to be 8.39 cGy for the head scan and 4.58 cGy for the body scan from the MOSFET measurements in standard dose mode, and 1.89 cGy for the head and 1.11 cGy for the body in low dose mode, respectively. The CTDIw from MC compared well to the MOSFET measurements within 5% differences. In conclusion, a MC model for Varian CBCT has been established and this approach may be easily extended from the CBCT geometry to multi-detector CT geometry.

Measurement of the spin structure function GD1 of the deuteron and its moments at low Q2

NASA Astrophysics Data System (ADS)

Athmakur, Abhiram Goud

This thesis focuses on energy considerations in the MOSFET when we supply a bias to it. We also notice that the length of the MOSFET gets smaller and smaller then for a small release or exchange of energy that may take place in a MOS transistor which can cause a change in the temperature. We have investigated that there is a change in the temperature of the MOSFET when we supply bias to it as we keep reducing the length of the channel. The change in the temperature of the MOSFET is calculated theoretically.

Implementation and comparative analysis of the optimisations produced by evolutionary algorithms for the parameter extraction of PSP MOSFET model

NASA Astrophysics Data System (ADS)

Hadia, Sarman K.; Thakker, R. A.; Bhatt, Kirit R.

2016-05-01

The study proposes an application of evolutionary algorithms, specifically an artificial bee colony (ABC), variant ABC and particle swarm optimisation (PSO), to extract the parameters of metal oxide semiconductor field effect transistor (MOSFET) model. These algorithms are applied for the MOSFET parameter extraction problem using a Pennsylvania surface potential model. MOSFET parameter extraction procedures involve reducing the error between measured and modelled data. This study shows that ABC algorithm optimises the parameter values based on intelligent activities of honey bee swarms. Some modifications have also been applied to the basic ABC algorithm. Particle swarm optimisation is a population-based stochastic optimisation method that is based on bird flocking activities. The performances of these algorithms are compared with respect to the quality of the solutions. The simulation results of this study show that the PSO algorithm performs better than the variant ABC and basic ABC algorithm for the parameter extraction of the MOSFET model; also the implementation of the ABC algorithm is shown to be simpler than that of the PSO algorithm.

InGaAsP Mach-Zehnder interferometer optical modulator monolithically integrated with InGaAs driver MOSFET on a III-V CMOS photonics platform.

PubMed

Park, Jin-Kown; Takagi, Shinichi; Takenaka, Mitsuru

2018-02-19

We demonstrated the monolithic integration of a carrier-injection InGaAsP Mach-Zehnder interferometer (MZI) optical modulator and InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) on a III-V-on-insulator (III-V-OI) wafer. A low-resistivity lateral PIN junction was formed along an InGaAsP rib waveguide by Zn diffusion and Ni-InGaAsP alloy, enabling direct driving of the InGaAsP optical modulator by the InGaAs MOSFET. A π phase shift of the InGaAsP optical modulator was obtained through the injection of a drain current from the InGaAs MOSFET with a gate voltage of approximately 1 V. This proof-of-concept demonstration of the monolithic integration of the InGaAsP optical modulator and InGaAs driver MOSFET will enable us to develop high-performance and low-power electronic-photonic integrated circuits on a III-V CMOS photonics platform.

In vivo prostate IMRT dosimetry with MOSFET detectors using brass buildup caps

PubMed Central

Varadhan, Raj; Miller, John; Garrity, Brenden; Weber, Michael

2006-01-01

The feasibility of using dual bias metal oxide semiconductor field effect transistor (MOSFET) detectors with the new hemispherical brass buildup cap for in vivo dose measurements in prostate intensity‐modulated radiotherapy (IMRT) treatments was investigated and achieved. In this work, MOSFET detectors with brass buildup caps placed on the patient's skin surface on the central axis of the individual IMRT beams are used to determine the maximum entrance dose (Dmax) from the prostate IMRT fields. A general formalism with various correction factors taken into account to predict Dmax entrance dose for the IMRT fields with MOSFETs was developed and compared against predicted dose from the treatment‐planning system (TPS). We achieved an overall accuracy of better than ±5% on all measured fields for both 6‐MV and 10‐MV beams when compared to predicted doses from the Philips Pinnacle 3 and CMS XiO TPSs, respectively. We also estimate the total uncertainty in estimation of MOSFET dose in the high‐sensitivity mode for IMRT therapy to be 4.6%. PACS numbers: 87.53Xd, 87.56Fc PMID:17533354

Extended Characterization of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and varying device sizes compared to earlier characterizations. The effects of the ferroelectric layer's capacitance and variation load, quiescent point, or input signal on each circuit are discussed. Comparisons between the MFSFET and MOSFET circuit operation and performance are discussed at length as well as applications and advantages for the MFSFETs.

Cryogenic measurements of aerojet GaAs n-JFETs

NASA Technical Reports Server (NTRS)

Goebel, John H.; Weber, Theodore T.

1993-01-01

The spectral noise characteristics of Aerojet gallium arsenide (GaAs) junction field effect transistors (JFET's) have been investigated down to liquid-helium temperatures. Noise characterization was performed with the field effect transistor (FET) in the floating-gate mode, in the grounded-gate mode to determine the lowest noise readings possible, and with an extrinsic silicon photodetector at various detector bias voltages to determine optimum operating conditions. The measurements indicate that the Aerojet GaAs JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to silicon (Si) metal oxide semiconductor field effect transistor (MOSFET's) operating at liquid helium temperatures, and is equal to the best Si n channel junction field effect transistor (n-JFET's) operating at 300 K.

Flat-roof phenomenon of dynamic equilibrium phase in the negative bias temperature instability effect on a power MOSFET

NASA Astrophysics Data System (ADS)

Zhang, Yue; Zhuo, Qing-Qing; Liu, Hong-Xia; Ma, Xiao-Hua; Hao, Yue

2014-05-01

The effect of the static negative bias temperature (NBT) stress on a p-channel power metal—oxide—semiconductor field-effect transistor (MOSFET) is investigated by experiment and simulation. The time evolution of the negative bias temperature instability (NBTI) degradation has the trend predicted by the reaction—diffusion (R—D) model but with an exaggerated time scale. The phenomena of the flat-roof section are observed under various stress conditions, which can be considered as the dynamic equilibrium phase in the R—D process. Based on the simulated results, the variation of the flat-roof section with the stress condition can be explained.

Investigation of a pulsed current annealing method in reusing MOSFET dosimeters for in vivo IMRT dosimetry.

PubMed

Luo, Guang-Wen; Qi, Zhen-Yu; Deng, Xiao-Wu; Rosenfeld, Anatoly

2014-05-01

To explore the feasibility of pulsed current annealing in reusing metal oxide semiconductor field-effect transistor (MOSFET) dosimeters for in vivo intensity modulated radiation therapy (IMRT) dosimetry. Several MOSFETs were irradiated at d(max) using a 6 MV x-ray beam with 5 V on the gate and annealed with zero bias at room temperature. The percentage recovery of threshold voltage shift during multiple irradiation-annealing cycles was evaluated. Key dosimetry characteristics of the annealed MOSFET such as the dosimeter's sensitivity, reproducibility, dose linearity, and linearity of response within the dynamic range were investigated. The initial results of using the annealed MOSFETs for IMRT dosimetry practice were also presented. More than 95% of threshold voltage shift can be recovered after 24-pulse current continuous annealing in 16 min. The mean sensitivity degradation was found to be 1.28%, ranging from 1.17% to 1.52%, during multiple annealing procedures. Other important characteristics of the annealed MOSFET remained nearly consistent before and after annealing. Our results showed there was no statistically significant difference between the annealed MOSFETs and their control samples in absolute dose measurements for IMRT QA (p = 0.99). The MOSFET measurements agreed with the ion chamber results on an average of 0.16% ± 0.64%. Pulsed current annealing provides a practical option for reusing MOSFETs to extend their operational lifetime. The current annealing circuit can be integrated into the reader, making the annealing procedure fully automatic.

Inexpensive and fast pathogenic bacteria screening using field-effect transistors.

PubMed

Formisano, Nello; Bhalla, Nikhil; Heeran, Mel; Reyes Martinez, Juana; Sarkar, Amrita; Laabei, Maisem; Jolly, Pawan; Bowen, Chris R; Taylor, John T; Flitsch, Sabine; Estrela, Pedro

2016-11-15

While pathogenic bacteria contribute to a large number of globally important diseases and infections, current clinical diagnosis is based on processes that often involve culturing which can be time-consuming. Therefore, innovative, simple, rapid and low-cost solutions to effectively reduce the burden of bacterial infections are urgently needed. Here we demonstrate a label-free sensor for fast bacterial detection based on metal-oxide-semiconductor field-effect transistors (MOSFETs). The electric charge of bacteria binding to the glycosylated gates of a MOSFET enables quantification in a straightforward manner. We show that the limit of quantitation is 1.9×10(5) CFU/mL with this simple device, which is more than 10,000-times lower than is achieved with electrochemical impedance spectroscopy (EIS) and matrix-assisted laser desorption ionisation time-of-flight mass spectrometry (MALDI-ToF) on the same modified surfaces. Moreover, the measurements are extremely fast and the sensor can be mass produced at trivial cost as a tool for initial screening of pathogens. Copyright © 2016 Elsevier B.V. All rights reserved.

Effects of substrate voltage on noise characteristics and hole lifetime in SOI metal-oxide-semiconductor field-effect transistor photon detector.

PubMed

Putranto, Dedy Septono Catur; Priambodo, Purnomo Sidi; Hartanto, Djoko; Du, Wei; Satoh, Hiroaki; Ono, Atsushi; Inokawa, Hiroshi

2014-09-08

Low-frequency noise and hole lifetime in silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) are analyzed, considering their use in photon detection based on single-hole counting. The noise becomes minimum at around the transition point between front- and back-channel operations when the substrate voltage is varied, and increases largely on both negative and positive sides of the substrate voltage showing peculiar Lorentzian (generation-recombination) noise spectra. Hole lifetime is evaluated by the analysis of drain current histogram at different substrate voltages. It is found that the peaks in the histogram corresponding to the larger number of stored holes become higher as the substrate bias becomes larger. This can be attributed to the prolonged lifetime caused by the higher electric field inside the body of SOI MOSFET. It can be concluded that, once the inversion channel is induced for detection of the photo-generated holes, the small absolute substrate bias is favorable for short lifetime and low noise, leading to high-speed operation.

Electronic Model of a Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry (Technical Monitor)

2001-01-01

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. T'he input and o Output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. No attempt was made to model the high frequency characteristics of the FFET. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.

Real-time in vivo dosimetry with MOSFET detectors in serial tomotherapy for head and neck cancer patients.

PubMed

Qi, Zhen-Yu; Deng, Xiao-Wu; Huang, Shao-Min; Shiu, Almon; Lerch, Michael; Metcalfe, Peter; Rosenfeld, Anatoly; Kron, Tomas

2011-08-01

A real-time dose verification method using a recently designed metal oxide semiconductor field effect transistor (MOSFET) dosimetry system was evaluated for quality assurance (QA) of intensity-modulated radiation therapy (IMRT). Following the investigation of key parameters that might affect the accuracy of MOSFET measurements (i.e., source surface distance [SSD], field size, beam incident angles and radiation energy spectrum), the feasibility of this detector in IMRT dose verification was demonstrated by comparison with ion chamber measurements taken in an IMRT QA phantom. Real-time in vivo measurements were also performed with the MOSFET system during serial tomotherapy treatments administered to 8 head and neck cancer patients. MOSFET sensitivity did not change with SSD. For field sizes smaller than 20 × 20 cm(2), MOFET sensitivity varied within 1.0%. The detector angular response was isotropic within 2% over 360°, and the observed sensitivity variation due to changes in the energy spectrum was negligible in 6-MV photons. MOSFET system measurements and ion chamber measurements agreed at all points in IMRT phantom plan verification, within 5%. The mean difference between 48 IMRT MOSFET-measured doses and calculated values in 8 patients was 3.33% and ranged from -2.20% to 7.89%. More than 90% of the total measurements had deviations of less than 5% from the planned doses. The MOSFET dosimetry system has been proven to be an effective tool in evaluating the actual dose within individual patients during IMRT treatment. Copyright © 2011 Elsevier Inc. All rights reserved.

Proton dose distribution measurements using a MOSFET detector with a simple dose-weighted correction method for LET effects.

PubMed

Kohno, Ryosuke; Hotta, Kenji; Matsuura, Taeko; Matsubara, Kana; Nishioka, Shie; Nishio, Teiji; Kawashima, Mitsuhiko; Ogino, Takashi

2011-04-04

We experimentally evaluated the proton beam dose reproducibility, sensitivity, angular dependence and depth-dose relationships for a new Metal Oxide Semiconductor Field Effect Transistor (MOSFET) detector. The detector was fabricated with a thinner oxide layer and was operated at high-bias voltages. In order to accurately measure dose distributions, we developed a practical method for correcting the MOSFET response to proton beams. The detector was tested by examining lateral dose profiles formed by protons passing through an L-shaped bolus. The dose reproducibility, angular dependence and depth-dose response were evaluated using a 190 MeV proton beam. Depth-output curves produced using the MOSFET detectors were compared with results obtained using an ionization chamber (IC). Since accurate measurements of proton dose distribution require correction for LET effects, we developed a simple dose-weighted correction method. The correction factors were determined as a function of proton penetration depth, or residual range. The residual proton range at each measurement point was calculated using the pencil beam algorithm. Lateral measurements in a phantom were obtained for pristine and SOBP beams. The reproducibility of the MOSFET detector was within 2%, and the angular dependence was less than 9%. The detector exhibited a good response at the Bragg peak (0.74 relative to the IC detector). For dose distributions resulting from protons passing through an L-shaped bolus, the corrected MOSFET dose agreed well with the IC results. Absolute proton dosimetry can be performed using MOSFET detectors to a precision of about 3% (1 sigma). A thinner oxide layer thickness improved the LET in proton dosimetry. By employing correction methods for LET dependence, it is possible to measure absolute proton dose using MOSFET detectors.

Proton dose distribution measurements using a MOSFET detector with a simple dose‐weighted correction method for LET effects

PubMed Central

Hotta, Kenji; Matsuura, Taeko; Matsubara, Kana; Nishioka, Shie; Nishio, Teiji; Kawashima, Mitsuhiko; Ogino, Takashi

2011-01-01

We experimentally evaluated the proton beam dose reproducibility, sensitivity, angular dependence and depth‐dose relationships for a new Metal Oxide Semiconductor Field Effect Transistor (MOSFET) detector. The detector was fabricated with a thinner oxide layer and was operated at high‐bias voltages. In order to accurately measure dose distributions, we developed a practical method for correcting the MOSFET response to proton beams. The detector was tested by examining lateral dose profiles formed by protons passing through an L‐shaped bolus. The dose reproducibility, angular dependence and depth‐dose response were evaluated using a 190 MeV proton beam. Depth‐output curves produced using the MOSFET detectors were compared with results obtained using an ionization chamber (IC). Since accurate measurements of proton dose distribution require correction for LET effects, we developed a simple dose‐weighted correction method. The correction factors were determined as a function of proton penetration depth, or residual range. The residual proton range at each measurement point was calculated using the pencil beam algorithm. Lateral measurements in a phantom were obtained for pristine and SOBP beams. The reproducibility of the MOSFET detector was within 2%, and the angular dependence was less than 9%. The detector exhibited a good response at the Bragg peak (0.74 relative to the IC detector). For dose distributions resulting from protons passing through an L‐shaped bolus, the corrected MOSFET dose agreed well with the IC results. Absolute proton dosimetry can be performed using MOSFET detectors to a precision of about 3% (1 sigma). A thinner oxide layer thickness improved the LET in proton dosimetry. By employing correction methods for LET dependence, it is possible to measure absolute proton dose using MOSFET detectors. PACS number: 87.56.‐v

C-H surface diamond field effect transistors for high temperature (400 °C) and high voltage (500 V) operation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kawarada, H., E-mail: kawarada@waseda.jp; Institute of Nano-Science and Nano-Engineering, Waseda University, Shinjuku, Tokyo 169-8555; Kagami Memorial Laboratory for Material Science and Technology, Waseda University, Shinjuku, Tokyo 169-0051

2014-07-07

By forming a highly stable Al{sub 2}O{sub 3} gate oxide on a C-H bonded channel of diamond, high-temperature, and high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) has been realized. From room temperature to 400 °C (673 K), the variation of maximum drain-current is within 30% at a given gate bias. The maximum breakdown voltage (V{sub B}) of the MOSFET without a field plate is 600 V at a gate-drain distance (L{sub GD}) of 7 μm. We fabricated some MOSFETs for which V{sub B}/L{sub GD} > 100 V/μm. These values are comparable to those of lateral SiC or GaN FETs. The Al{sub 2}O{sub 3} was deposited on the C-Hmore » surface by atomic layer deposition (ALD) at 450 °C using H{sub 2}O as an oxidant. The ALD at relatively high temperature results in stable p-type conduction and FET operation at 400 °C in vacuum. The drain current density and transconductance normalized by the gate width are almost constant from room temperature to 400 °C in vacuum and are about 10 times higher than those of boron-doped diamond FETs.« less

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistors

NASA Technical Reports Server (NTRS)

Yamada, Toshishige; Biegel, Bryan (Technical Monitor)

2002-01-01

The threshold voltages of a carbon nanotube (CNT) field-effect transistor (FET) are derived and compared with those of the metal oxide-semiconductor (MOS) FETs. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, which is the CNT diameter direction, and this makes the CNTFET characteristics quite different from those in MOSFETs. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and it is shown that the familiar relations are still valid because of the macroscopic number of states available in the CNTs. This is in sharp contrast to the cases of quantum dots. Using these relations, we derive an inversion threshold voltage V(sub Ti) and an accumulation threshold voltage V(sub Ta) as a function of the Fermi level E(sub F) in the channel, where E(sub F) is a measure of channel doping. V(sub Ti) of the CNTFETs has a much stronger dependence than that of MOSFETs, while V(sub Ta)s of both CNTFETs and MOSFETs depend quite weakly on E(sub F) with the same functional form. This means the transition from normally-off mode to normally-on mode is much sharper in CNTFETs as the doping increases, and this property has to be taken into account in circuit design.

NOTE: Clinical application of a OneDose™ MOSFET for skin dose measurements during internal mammary chain irradiation with high dose rate brachytherapy in carcinoma of the breast

NASA Astrophysics Data System (ADS)

Kinhikar, Rajesh A.; Sharma, Pramod K.; Tambe, Chandrashekhar M.; Mahantshetty, Umesh M.; Sarin, Rajiv; Deshpande, Deepak D.; Shrivastava, Shyam K.

2006-07-01

In our earlier study, we experimentally evaluated the characteristics of a newly designed metal oxide semiconductor field effect transistor (MOSFET) OneDose™ in-vivo dosimetry system for Ir-192 (380 keV) energy and the results were compared with thermoluminescent dosimeters (TLDs). We have now extended the same study to the clinical application of this MOSFET as an in-vivo dosimetry system. The MOSFET was used during high dose rate brachytherapy (HDRBT) of internal mammary chain (IMC) irradiation for a carcinoma of the breast. The aim of this study was to measure the skin dose during IMC irradiation with a MOSFET and a TLD and compare it with the calculated dose with a treatment planning system (TPS). The skin dose was measured for ten patients. All the patients' treatment was planned on a PLATO treatment planning system. TLD measurements were performed to compare the accuracy of the measured results from the MOSFET. The mean doses measured with the MOSFET and the TLD were identical (0.5392 Gy, 15.85% of the prescribed dose). The mean dose was overestimated by the TPS and was 0.5923 Gy (17.42% of the prescribed dose). The TPS overestimated the skin dose by 9% as verified by the MOSFET and TLD. The MOSFET provides adequate in-vivo dosimetry for HDRBT. Immediate readout after irradiation, small size, permanent storage of dose and ease of use make the MOSFET a viable alternative for TLDs.

Clinical application of a OneDose MOSFET for skin dose measurements during internal mammary chain irradiation with high dose rate brachytherapy in carcinoma of the breast.

PubMed

Kinhikar, Rajesh A; Sharma, Pramod K; Tambe, Chandrashekhar M; Mahantshetty, Umesh M; Sarin, Rajiv; Deshpande, Deepak D; Shrivastava, Shyam K

2006-07-21

In our earlier study, we experimentally evaluated the characteristics of a newly designed metal oxide semiconductor field effect transistor (MOSFET) OneDose in-vivo dosimetry system for Ir-192 (380 keV) energy and the results were compared with thermoluminescent dosimeters (TLDs). We have now extended the same study to the clinical application of this MOSFET as an in-vivo dosimetry system. The MOSFET was used during high dose rate brachytherapy (HDRBT) of internal mammary chain (IMC) irradiation for a carcinoma of the breast. The aim of this study was to measure the skin dose during IMC irradiation with a MOSFET and a TLD and compare it with the calculated dose with a treatment planning system (TPS). The skin dose was measured for ten patients. All the patients' treatment was planned on a PLATO treatment planning system. TLD measurements were performed to compare the accuracy of the measured results from the MOSFET. The mean doses measured with the MOSFET and the TLD were identical (0.5392 Gy, 15.85% of the prescribed dose). The mean dose was overestimated by the TPS and was 0.5923 Gy (17.42% of the prescribed dose). The TPS overestimated the skin dose by 9% as verified by the MOSFET and TLD. The MOSFET provides adequate in-vivo dosimetry for HDRBT. Immediate readout after irradiation, small size, permanent storage of dose and ease of use make the MOSFET a viable alternative for TLDs.

LDMOS Channel Thermometer Based on a Thermal Resistance Sensor for Balancing Temperature in Monolithic Power ICs.

PubMed

Lin, Tingyou; Ho, Yingchieh; Su, Chauchin

2017-06-15

This paper presents a method of thermal balancing for monolithic power integrated circuits (ICs). An on-chip temperature monitoring sensor that consists of a poly resistor strip in each of multiple parallel MOSFET banks is developed. A temperature-to-frequency converter (TFC) is proposed to quantize on-chip temperature. A pulse-width-modulation (PWM) methodology is developed to balance the channel temperature based on the quantization. The modulated PWM pulses control the hottest of metal-oxide-semiconductor field-effect transistor (MOSFET) bank to reduce its power dissipation and heat generation. A test chip with eight parallel MOSFET banks is fabricated in TSMC 0.25 μm HV BCD processes, and total area is 900 × 914 μm². The maximal temperature variation among the eight banks can reduce to 2.8 °C by the proposed thermal balancing system from 9.5 °C with 1.5 W dissipation. As a result, our proposed system improves the lifetime of a power MOSFET by 20%.

LDMOS Channel Thermometer Based on a Thermal Resistance Sensor for Balancing Temperature in Monolithic Power ICs

PubMed Central

Lin, Tingyou; Ho, Yingchieh; Su, Chauchin

2017-01-01

This paper presents a method of thermal balancing for monolithic power integrated circuits (ICs). An on-chip temperature monitoring sensor that consists of a poly resistor strip in each of multiple parallel MOSFET banks is developed. A temperature-to-frequency converter (TFC) is proposed to quantize on-chip temperature. A pulse-width-modulation (PWM) methodology is developed to balance the channel temperature based on the quantization. The modulated PWM pulses control the hottest of metal-oxide-semiconductor field-effect transistor (MOSFET) bank to reduce its power dissipation and heat generation. A test chip with eight parallel MOSFET banks is fabricated in TSMC 0.25 μm HV BCD processes, and total area is 900 × 914 μm2. The maximal temperature variation among the eight banks can reduce to 2.8 °C by the proposed thermal balancing system from 9.5 °C with 1.5 W dissipation. As a result, our proposed system improves the lifetime of a power MOSFET by 20%. PMID:28617346

Error correcting circuit design with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong

2018-03-01

In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.

Multiscale modeling and computation of nano-electronic transistors and transmembrane proton channels

NASA Astrophysics Data System (ADS)

Chen, Duan

The miniaturization of nano-scale electronic transistors, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. In biology, proton dynamics and transport across membrane proteins are of paramount importance to the normal function of living cells. Similar physical characteristics are behind the two subjects, and model simulations share common mathematical interests/challenges. In this thesis work, multiscale and multiphysical models are proposed to study the mechanisms of nanotransistors and proton transport in transmembrane at the atomic level. For nano-electronic transistors, we introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential. This framework enables us to put microscopic and macroscopic descriptions on an equal footing at nano-scale. Additionally, this model includes layered structures and random doping effect of nano-transistors. For transmembrane proton channels, we describe proton dynamics quantum mechanically via a density functional approach while implicitly treat numerous solvent molecules as a dielectric continuum. The densities of all other ions in the solvent are assumed to obey the Boltzmann distribution. The impact of protein molecular structure and its charge polarization on the proton transport is considered in atomic details. We formulate a total free energy functional to include kinetic and potential energies of protons, as well as electrostatic energy of all other ions on an equal footing. For both nano-transistors and proton channels systems, the variational principle is employed to derive nonlinear governing equations. The Poisson-Kohn-Sham equations are derived for nano-transistors while the generalized Poisson-Boltzmann equation and Kohn-Sham equation are obtained for proton channels. Related numerical challenges in simulations are addressed: the matched interface and boundary (MIB) method, the Dirichlet-to-Neumann mapping (DNM) technique, and the Krylov subspace and preconditioner theory are introduced to improve the computational efficiency of the Poisson-type equation. The quantum transport theory is employed to solve the Kohn-Sham equation. The Gummel iteration and relaxation technique are utilized for overall self-consistent iterations. Finally, applications are considered and model validations are verified by realistic nano-transistors and transmembrane proteins. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our threedimensional numerical simulations. For these devices, the current uctuation and voltage threshold lowering effect induced by discrete dopants are explored. For proton transport, a realistic channel protein, the Gramicidin A (GA) is used to demonstrate the performance of the proposed proton channel model and validate the efficiency of the proposed mathematical algorithms. The electrostatic characteristics of the GA channel is analyzed with a wide range of model parameters. Proton channel conductances are studied over a number of applied voltages and reference concentrations. Comparisons with experimental data are utilized to verify our model predictions.

Performance of a 100V Half-Bridge MOSFET Driver, Type MIC4103, Over a Wide Temperature Range

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Ahmad

2011-01-01

The operation of a high frequency, high voltage MOSFET (metal-oxide semiconductor field-effect transistors) driver was investigated over a wide temperature regime that extended beyond its specified range. The Micrel MIC4103 is a 100V, non-inverting, dual driver that is designed to independently drive both high-side and low-side N-channel MOSFETs. It features fast propagation delay times and can drive 1000 pF load with 10ns rise times and 6 ns fall times [1]. The device consumes very little power, has supply under-voltage protection, and is rated for a -40 C to +125 C junction temperature range. The floating high-side driver of the chip can sustain boost voltages up to 100 V. Table I shows some of the device manufacturer s specification.

Characteristics and performance of a micro-MOSFET: an "imageable" dosimeter for image-guided radiotherapy.

PubMed

Rowbottoma, Carl G; Jaffray, David A

2004-03-01

The performance and characteristics of a miniature metal oxide semiconductor field effect transistor (micro-MOSFET) detector was investigated for its potential application to integral system tests for image-guided radiotherapy. In particular, the position of peak response to a slit of radiation was determined for the three principal axes to define the co-ordinates for the center of the active volume of the detector. This was compared to the radiographically determined center of the micro-MOSFET visible using cone-beam CT. Additionally, the angular sensitivity of the micro-MOSFET was measured. The micro-MOSFETs are clearly visible on the cone-beam CT images, and produce no artifacts. The center of the active volume of the micro-MOSFET aligned with the center of the visible micro-MOSFET on the cone-beam CT images for the x and y axes to within 0.20 mm and 0.15 mm, respectively. In z, the long axis of the detector, the peak response was found to be 0.79 mm from the tip of the visible micro-MOSFET. Repeat experiments verified that the position of the peak response of the micro-MOSFET was reproducible. The micro-MOSFET response for 360 degrees of rotation in the axial plane to the micro-MOSFET was +/-2%, consistent with values quoted by the manufacturer. The location of the active volume of the micro-MOSFETs under investigation can be determined from the centroid of the visible micro-MOSFET on cone-beam CT images. The CT centroid position corresponds closely to the center of the detector response to radiation. The ability to use the cone-beam CT to locate the active volume to within 0.20 mm allows their use in an integral system test for the imaging of and dose delivery to a phantom containing an array of micro-MOSFETs. The small angular sensitivity allows the investigation of noncoplanar beams.

Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region

NASA Astrophysics Data System (ADS)

Noguchi, Munetaka; Iwamatsu, Toshiaki; Amishiro, Hiroyuki; Watanabe, Hiroshi; Kita, Koji; Yamakawa, Satoshi

2018-04-01

The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

The four-gate transistor

NASA Technical Reports Server (NTRS)

Mojarradi, M. M.; Cristoveanu, S.; Allibert, F.; France, G.; Blalock, B.; Durfrene, B.

2002-01-01

The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

Fabrication and characteristics of MOSFET protein chip for detection of ribosomal protein.

PubMed

Park, Keun-Yong; Kim, Min-Suk; Choi, Sie-Young

2005-04-15

A metal oxide silicon field effect transistor (MOSFET) protein chip for the easy detection of protein was fabricated and its characteristics were investigated. Generally, the drain current of the MOSFET is varied by the gate potential. It is expected that the formation of an antibody-antigen complex on the gate of MOSFET would lead to a detectable change in the charge distribution and thus, directly modulate the drain current of MOSFET. As such, the drain current of the MOSFET protein chip can be varied by ribosomal proteins absorbed by the self-assembled monolayer (SAM) immobilized on the gate (Au) surface, as ribosomal protein has positive charge, and these current variations then used as the response of the protein chip. The gate of MOSFET protein chip is not directly biased by an external voltage source, so called open gate or floating gate MOSFET, but rather chemically modified by immobilized molecular receptors called self-assembled monolayer (SAM). In our experiments, the current variation in the proposed protein chip was about 8% with a protein concentration of 0.7 mM. As the protein concentration increased, the drain current also gradually increased. In addition, there were some drift of the drain current in the device. It is considered that these drift might be caused by the drift from the MOSFET itself or protein absorption procedures that are relied on the facile attachment of thiol (-S) ligands to the gate (Au) surface. We verified the formation of SAM on the gold surface and the absorption of protein through the surface plasmon resonance (SPR) measurement.

A new radiotherapy surface dose detector:the MOSFET.

PubMed

Butson, M J; Rozenfeld, A; Mathur, J N; Carolan, M; Wong, T P; Metcalfe, P E

1996-05-01

Radiotherapy x-ray and electron beam surface doses are accurately measurable by use of a MOS-FET detector system. The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is approximately 200-microns in diameter and consists of a 0.5-microns Al electrode on top of a 1-microns SiO2 and 300-microns Si substrate. Results for % surface dose were within +/- 2% compared to the Attix chamber and within +/- 3% of TLD extrapolation results for normally incident beams. Detectors were compared using different energies, field size, and beam modifying devices such as block trays and wedges. Percentage surface dose for 10 x 10-cm and 40 x 40-cm field size for 6-MV x rays at 100-cm SSD using the MOSFET were 16% and 42% of maximum, respectively. Factors such as its small size, immediate retrieval of results, high accuracy attainable from low applied doses, and as the MOSFET records its dose history make it a suitable in vivo dosimeter where surface and skin doses need to be determined. This can be achieved within part of the first fraction of dose (i.e., only 10 cGy is required.)

Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.

2014-04-15

Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample sizemore » required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomen–pelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the same precision and confidence.« less

Modeling and simulation of electronic structure, material interface and random doping in nano electronic devices

PubMed Central

Chen, Duan; Wei, Guo-Wei

2010-01-01

The miniaturization of nano-scale electronic devices, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. Modeling and simulation of this class of problems have emerged as an important topic in applied and computational mathematics. This work presents mathematical models and computational algorithms for the simulation of nano-scale MOSFETs. We introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential of the nano-electronic device. This framework enables us to put microscopic and macroscopic descriptions in an equal footing at nano scale. By optimization of the energy functional, we derive consistently-coupled Poisson-Kohn-Sham equations. Additionally, layered structures are crucial to the electrostatic and transport properties of nano transistors. A material interface model is proposed for more accurate description of the electrostatics governed by the Poisson equation. Finally, a new individual dopant model that utilizes the Dirac delta function is proposed to understand the random doping effect in nano electronic devices. Two mathematical algorithms, the matched interface and boundary (MIB) method and the Dirichlet-to-Neumann mapping (DNM) technique, are introduced to improve the computational efficiency of nano-device simulations. Electronic structures are computed via subband decomposition and the transport properties, such as the I-V curves and electron density, are evaluated via the non-equilibrium Green's functions (NEGF) formalism. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our three-dimensional numerical simulations. For these devices, the current fluctuation and voltage threshold lowering effect induced by the discrete dopant model are explored. Numerical convergence and model well-posedness are also investigated in the present work. PMID:20396650

Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

PubMed Central

Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.; Hoffmann, Udo; Douglas, Pamela S.; Einstein, Andrew J.

2014-01-01

Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample size required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomen–pelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the same precision and confidence. PMID:24694150

Characterization of MOSFET dosimeters for low-dose measurements in maxillofacial anthropomorphic phantoms.

PubMed

Koivisto, Juha H; Wolff, Jan E; Kiljunen, Timo; Schulze, Dirk; Kortesniemi, Mika

2015-07-08

The aims of this study were to characterize reinforced metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low-dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the thermoluminescent dosimeters (TLD). The second aim was to characterize MOSFET dosimeter sensitivities for two dental photon energy ranges, dose dependency, dose rate dependency, and accumulated dose dependency. A further aim was to compare the performance of MOSFETs with those of TLDs in an anthropomorphic phantom head using a dentomaxillofacial CBCT device. The uncertainty was assessed by exposing 20 MOSFETs and a Barracuda MPD reference dosimeter. The MOSFET dosimeter sensitivities were evaluated for two photon energy ranges (50-90 kVp) using a constant dose and polymethylmethacrylate backscatter material. MOSFET and TLD comparative point-dose measurements were performed on an anthropomorphic phantom that was exposed with a clinical CBCT protocol. The MOSFET single exposure low dose limit (25% uncertainty, k = 2) was 1.69 mGy. An averaging of eight MOSFET exposures was required to attain the corresponding TLD (0.3 mGy) low-dose limit. The sensitivity was 3.09 ± 0.13 mV/mGy independently of the photon energy used. The MOSFET dosimeters did not present dose or dose rate sensitivity but, however, presented a 1% decrease of sensitivity per 1000 mV for accumulated threshold voltages between 8300 mV and 17500 mV. The point doses in an anthropomorphic phantom ranged for MOSFETs between 0.24 mGy and 2.29 mGy and for TLDs between 0.25 and 2.09 mGy, respectively. The mean difference was -8%. The MOSFET dosimeters presented statistically insignificant energy dependency. By averaging multiple exposures, the MOSFET dosimeters can achieve a TLD-comparable low-dose limit and constitute a feasible method for diagnostic dosimetry using anthropomorphic phantoms. However, for single in vivo measurements (<1.7 mGy) the sensitivity is too low.

Design and performance study of a DC-DC flyback converter based on wide bandgap power devices for photovoltaic applications

NASA Astrophysics Data System (ADS)

Alharbi, Salah S.; Alharbi, Saleh S.; Al-bayati, Ali M. S.; Matin, Mohammad

2017-08-01

This paper presents a high-performance dc-dc flyback converter design based on wide bandgap (WBG) semiconductor devices for photovoltaic (PV) applications. Two different power devices, a gallium nitride (GaN)-transistor and a silicon (Si)-MOSFET, are implemented individually in the flyback converter to examine their impact on converter performance. The total power loss of the converter with different power devices is analyzed for various switching frequencies. Converter efficiency is evaluated at different switching frequencies, input voltages, and output power levels. The results reveal that the converter with the GaN-transistor has lower total power loss and better efficiency compared to the converter with the conventional Si-MOSFET.

MOSFET detectors in quality assurance of tomotherapy treatments.

PubMed

Cherpak, Amanda; Studinski, Ryan C N; Cygler, Joanna E

2008-02-01

The purpose of this work was to characterize metal oxide semiconductor field-effect transistors (MOSFETs) in a 6 MV conventional linac and investigate their use for quality assurance of radiotherapy treatments with a tomotherapy Hi-Art unit. High sensitivity and standard sensitivity MOSFETs were first calibrated and then tested for reproducibility, field size dependence, and accuracy of measuring surface dose in a 6 MV beam as well as in a tomotherapy Hi-Art unit. In vivo measurements were performed on both a RANDO phantom and several head and neck cancer patients treated with tomotherapy and compared to TLD measurements and treatment plan doses to evaluate the performance of MOSFETs in a high gradient radiation field. The average calibration factor found was 0.345+/-2.5%cGy/mV for the high sensitivity MOSFETs tested and 0.901+/-2.4%cGy/mV for the standard sensitivity MOSFETs. MOSFET measured surface doses had an average agreement with ion chamber measurements of 1.55% for the high sensitivity MOSFET and 5.23% for the standard sensitivity MOSFET when averaged over all trials and field sizes tested. No significant dependence on field size was found for the standard sensitivity MOSFETs, however a maximum difference of 5.34% was found for the high sensitivity MOSFET calibration factors in the field sizes tested. Measurements made with MOSFETS on head and neck patients treated on a tomotherapy Hi-Art unit had an average agreement of (3.26+/-0.03)% with TLD measurements, however the average of the absolute difference between the MOSFET measurements and the treatment plan skin doses was (12.2+/-7.5)%. The MOSFET measured patient skin doses also had good reproducibility, with inter-fraction deviations ranging from 1.4% to 6.6%. Similar results were found from trials using a RANDO phantom. The MOSFETs performed well when used in the tomotherapy Hi-Art unit and did not increase the overall treatment set-up time when used for patient measurements. It was found that MOSFETs are suitable detectors for surface dose measurements in both conventional beam and tomotherapy treatments and they can provide valuable skin dose information in areas where the treatment planning system may not be accurate.

Noise and linearity optimization methods for a 1.9GHz low noise amplifier.

PubMed

Guo, Wei; Huang, Da-Quan

2003-01-01

Noise and linearity performances are critical characteristics for radio frequency integrated circuits (RFICs), especially for low noise amplifiers (LNAs). In this paper, a detailed analysis of noise and linearity for the cascode architecture, a widely used circuit structure in LNA designs, is presented. The noise and the linearity improvement techniques for cascode structures are also developed and have been proven by computer simulating experiments. Theoretical analysis and simulation results showed that, for cascode structure LNAs, the first metallic oxide semiconductor field effect transistor (MOSFET) dominates the noise performance of the LNA, while the second MOSFET contributes more to the linearity. A conclusion is thus obtained that the first and second MOSFET of the LNA can be designed to optimize the noise performance and the linearity performance separately, without trade-offs. The 1.9GHz Complementary Metal-Oxide-Semiconductor (CMOS) LNA simulation results are also given as an application of the developed theory.

Signal Processing for Wireless Communication MIMO System with Nano- Scaled CSDG MOSFET based DP4T RF Switch.

PubMed

Srivastava, Viranjay M

2015-01-01

In the present technological expansion, the radio frequency integrated circuits in the wireless communication technologies became useful because of the replacement of increasing number of functions, traditional hardware components by modern digital signal processing. The carrier frequencies used for communication systems, now a day, shifted toward the microwave regime. The signal processing for the multiple inputs multiple output wireless communication system using the Metal- Oxide-Semiconductor Field-Effect-Transistor (MOSFET) has been done a lot. In this research the signal processing with help of nano-scaled Cylindrical Surrounding Double Gate (CSDG) MOSFET by means of Double- Pole Four-Throw Radio-Frequency (DP4T RF) switch, in terms of Insertion loss, Isolation, Reverse isolation and Inter modulation have been analyzed. In addition to this a channel model has been presented. Here, we also discussed some patents relevant to the topic.

Influence of gate recess on the electronic characteristics of β-Ga2O3 MOSFETs

NASA Astrophysics Data System (ADS)

Lv, Yuanjie; Mo, Jianghui; Song, Xubo; He, Zezhao; Wang, Yuangang; Tan, Xin; Zhou, Xingye; Gu, Guodong; Guo, Hongyu; Feng, Zhihong

2018-05-01

Gallium oxide (Ga2O3) metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with gate recess depths of 110 nm and 220 nm, respectively. The gate recess was formed by dry plasma etching with Cr metal as the mask. The fabricated devices with a 25-nm HfO2 gate dielectric both showed a low off-state drain current of about 1.8 × 10-10 A/mm. The effects of recess depth on the electronic characteristics of Ga2O3 MOSFETs were investigated. Upon increasing the recess depth from 110 nm to 220 nm, the saturated drain current decreased from 20.7 mA/mm to 2.6 mA/mm, while the threshold voltage moved increased to +3 V. Moreover, the breakdown voltage increased from 122 V to 190 V. This is mainly because the inverted-trapezoidal gate played the role of a gate-field plate, which suppressed the peak electric field close to the gate.

Investigation of short-circuit failure mechanisms of SiC MOSFETs by varying DC bus voltage

NASA Astrophysics Data System (ADS)

Namai, Masaki; An, Junjie; Yano, Hiroshi; Iwamuro, Noriyuki

2018-07-01

In this study, the experimental evaluation and numerical analysis of short-circuit mechanisms of 1200 V SiC planar and trench MOSFETs were conducted at various DC bus voltages from 400 to 800 V. Investigation of the impact of DC bus voltage on short-circuit capability yielded results that are extremely useful for many existing power electronics applications. Three failure mechanisms were identified in this study: thermal runaway, MOS channel current following device turn-off, and rupture of the gate oxide layer (gate oxide layer damage). The SiC MOSFETs experienced lattice temperatures exceeding 1000 K during the short-circuit transient; as Si insulated gate bipolar transistors (IGBTs) are not typically subject to such temperatures, the MOSFETs experienced distinct failure modes, and the mode experienced was significantly influenced by the DC bus voltage. In conclusion, suggestions regarding the SiC MOSFET design and operation methods that would enhance device robustness are proposed.

Unique reliability characteristics of fully depleted silicon-on-insulator tunneling FET

NASA Astrophysics Data System (ADS)

Kang, Soo Cheol; Lim, Donghwan; Lim, Sung Kwan; Noh, Jinwoo; Kim, Seung-Mo; Lee, Sang Kyung; Choi, Changhwan; Lee, Byoung Hun

2018-04-01

This study investigated the unique reliability characteristics of tunneling field effect transistors (TFETs) by comparing the effects of positive bias temperature instability (PBTI) and hot carrier injection (HCI) stresses. In case of hot carrier injection (HCI) stress, the interface trap generation near a p/n+ region was the primary degradation mechanism. However, strong recovery after a high-pressure hydrogen annealing and weak degradation at low temperature indicates that the degradation mechanism of TFET under the HCI stress is different from the high-energy carrier stress induced permanent defect generation mechanism observed in MOSFETs. Further study is necessary to identify the exact location and defect species causing TFET degradation; however, a significant difference is evident between the dominant reliability mechanism of TFET and MOSFET.

Anomalous radiation effects in fully depleted SOI MOSFETs fabricated on SIMOX

NASA Astrophysics Data System (ADS)

Li, Ying; Niu, Guofu; Cressler, J. D.; Patel, J.; Marshall, C. J.; Marshall, P. W.; Kim, H. S.; Reed, R. A.; Palmer, M. J.

2001-12-01

We investigate the proton tolerance of fully depleted silicon-on-insulator (SOI) MOSFETs with H-gate and regular-gate structural configurations. For the front-gate characteristics, the H-gate does not show the edge leakage observed in the regular-gate transistor. An anomalous kink in the back-gate linear I/sub D/-V/sub GS/ characteristics of the fully depleted SOI nFETs has been observed at high radiation doses. This kink is attributed to charged traps generated in the bandgap at the buried oxide/silicon film interface during irradiation. Extensive two-dimensional simulations with MEDICI were used to understand the physical origin of this kink. We also report unusual self-annealing effects in the devices when they are cooled to liquid nitrogen temperature.

CMOS Active-Pixel Image Sensor With Simple Floating Gates

NASA Technical Reports Server (NTRS)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

Calibration of a mosfet detection system for 6-MV in vivo dosimetry.

PubMed

Scalchi, P; Francescon, P

1998-03-01

Metal oxide semiconductor field-effect transistor (MOSFET) detectors were calibrated to perform in vivo dosimetry during 6-MV treatments, both in normal setup and total body irradiation (TBI) conditions. MOSFET water-equivalent depth, dependence of the calibration factors (CFs) on the field sizes, MOSFET orientation, bias supply, accumulated dose, incidence angle, temperature, and spoiler-skin distance in TBI setup were investigated. MOSFET reproducibility was verified. The correlation between the water-equivalent midplane depth and the ratio of the exit MOSFET readout divided by the entrance MOSFET readout was studied. MOSFET midplane dosimetry in TBI setup was compared with thermoluminescent dosimetry in an anthropomorphic phantom. By using ionization chamber measurements, the TBI midplane dosimetry was also verified in the presence of cork as a lung substitute. The water-equivalent depth of the MOSFET is about 0.8 mm or 1.8 mm, depending on which sensor side faces the beam. The field size also affects this quantity; Monte Carlo simulations allow driving this behavior by changes in the contaminating electron mean energy. The CFs vary linearly as a function of the square field side, for fields ranging from 5 x 5 to 30 x 30 cm2. In TBI setup, varying the spoiler-skin distance between 5 mm and 10 cm affects the CFs within 5%. The MOSFET reproducibility is about 3% (2 SD) for the doses normally delivered to the patients. The effect of the accumulated dose on the sensor response is negligible. For beam incidence ranging from 0 degrees to 90 degrees, the MOSFET response varies within 7%. No monotonic correlation between the sensor response and the temperature is apparent. Good correlation between the water-equivalent midplane depth and the ratio of the exit MOSFET readout divided by the entrance MOSFET readout was found (the correlation coefficient is about 1). The MOSFET midplane dosimetry relevant to the anthropomorphic phantom irradiation is in agreement with TLD dosimetry within 5%. Ionization chamber and MOSFET midplane dosimetry in inhomogeneous phantoms are in agreement within 2%. MOSFET characteristics are suitable for the in vivo dosimetry relevant to 6-MV treatments, both in normal and TBI setup. The TBI midplane dosimetry using MOSFETs is valid also in the presence of the lung, which is the most critical organ, and allows verifying that calculation of the lung attenuator thicknesses based only on the density is not correct. Our MOSFET dosimetry system can be used also to determine the surface dose by using the water-equivalent depth and extrapolation methods. This procedure depends on the field size used.

A novel nanoscale SOI MOSFET by embedding undoped region for improving self-heating effect

NASA Astrophysics Data System (ADS)

Ghaffari, Majid; Orouji, Ali A.

2018-06-01

Because of the low thermal conductivity of the SiO2 (oxide), the Buried Oxide (BOX) layer in a Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor (SOI MOSFET) prevents heat dissipation in the silicon layer and causes increase in the device lattice temperature. In this paper, a new technique is proposed for reducing Self-Heating Effects (SHEs). The key idea in the proposed structure is using a Silicon undoped Region (SR) in the nanoscale SOI MOSFET under the drain and channel regions in order to decrease the SHE. The novel transistor is named Silicon undoped Region SOI-MOSFET (SR-SOI). Due to the embedded silicon undoped region in the suitable place, the proposed structure has decreased the device lattice temperature. The location and dimensions of the proposed region have been carefully optimized to achieve the best results. This work has explored enhancement such as decreased maximum lattice temperature, increased electron mobility, increased drain current, lower DC drain conductance and higher DC transconductance and also decreased bandgap energy variations. Also, for modeling of the structure in the SPICE tools, the main characterizations have been extracted such as thermal resistance (RTH), thermal capacitance (CTH), and SHE characteristic frequency (fTH). All parameters are extracted in relation with the AC operation indicate excellent performance of the SR-SOI device. The results show that proposed region is a suitable alternative to oxide as a part of the buried oxide layer in SOI structures and has better performance in high temperature. Using two-dimensional (2-D) and two-carrier device simulation is done comparison of the SR-SOI structure with a Conventional SOI (C-SOI). As a result, the SR-SOI device can be regarded as a useful substitution for the C-SOI device in nanoscale integrated circuits as a reliable device.

Experimental evidence of mobility enhancement in short-channel ultra-thin body double-gate MOSFETs by magnetoresistance technique

NASA Astrophysics Data System (ADS)

Chaisantikulwat, W.; Mouis, M.; Ghibaudo, G.; Cristoloveanu, S.; Widiez, J.; Vinet, M.; Deleonibus, S.

2007-11-01

Double-gate transistor with ultra-thin body (UTB) has proved to offer advantages over bulk device for high-speed, low-power applications. There is thus a strong need to obtain an accurate understanding of carrier transport and mobility in such device. In this work, we report for the first time an experimental evidence of mobility enhancement in UTB double-gate (DG) MOSFETs using magnetoresistance mobility extraction technique. Mobility in planar DG transistor operating in single- and double-gate mode is compared. The influence of different scattering mechanisms in the channel is also investigated by obtaining mobility values at low temperatures. The results show a clear mobility improvement in double-gate mode compared to single-gate mode mobility at the same inversion charge density. This is explained by the role of volume inversion in ultra-thin body transistor operating in DG mode. Volume inversion is found to be especially beneficial in terms of mobility gain at low-inversion densities.

Single-event burnout hardening of planar power MOSFET with partially widened trench source

NASA Astrophysics Data System (ADS)

Lu, Jiang; Liu, Hainan; Cai, Xiaowu; Luo, Jiajun; Li, Bo; Li, Binhong; Wang, Lixin; Han, Zhengsheng

2018-03-01

We present a single-event burnout (SEB) hardened planar power MOSFET with partially widened trench sources by three-dimensional (3D) numerical simulation. The advantage of the proposed structure is that the work of the parasitic bipolar transistor inherited in the power MOSFET is suppressed effectively due to the elimination of the most sensitive region (P-well region below the N+ source). The simulation result shows that the proposed structure can enhance the SEB survivability significantly. The critical value of linear energy transfer (LET), which indicates the maximum deposited energy on the device without SEB behavior, increases from 0.06 to 0.7 pC/μm. The SEB threshold voltage increases to 120 V, which is 80% of the rated breakdown voltage. Meanwhile, the main parameter characteristics of the proposed structure remain similar with those of the conventional planar structure. Therefore, this structure offers a potential optimization path to planar power MOSFET with high SEB survivability for space and atmospheric applications. Project supported by the National Natural Science Foundation of China (Nos. 61404161, 61404068, 61404169).

Direct protein detection with a nano-interdigitated array gate MOSFET.

PubMed

Tang, Xiaohui; Jonas, Alain M; Nysten, Bernard; Demoustier-Champagne, Sophie; Blondeau, Franoise; Prévot, Pierre-Paul; Pampin, Rémi; Godfroid, Edmond; Iñiguez, Benjamin; Colinge, Jean-Pierre; Raskin, Jean-Pierre; Flandre, Denis; Bayot, Vincent

2009-08-15

A new protein sensor is demonstrated by replacing the gate of a metal oxide semiconductor field effect transistor (MOSFET) with a nano-interdigitated array (nIDA). The sensor is able to detect the binding reaction of a typical antibody Ixodes ricinus immunosuppressor (anti-Iris) protein at a concentration lower than 1 ng/ml. The sensor exhibits a high selectivity and reproducible specific detection. We provide a simple model that describes the behavior of the sensor and explains the origin of its high sensitivity. The simulated and experimental results indicate that the drain current of nIDA-gate MOSFET sensor is significantly increased with the successive binding of the thiol layer, Iris and anti-Iris protein layers. It is found that the sensor detection limit can be improved by well optimizing the geometrical parameters of nIDA-gate MOSFET. This nanobiosensor, with real-time and label-free capabilities, can easily be used for the detection of other proteins, DNA, virus and cancer markers. Moreover, an on-chip associated electronics nearby the sensor can be integrated since its fabrication is compatible with complementary metal oxide semiconductor (CMOS) technology.

Cross-point-type spin-transfer-torque magnetoresistive random access memory cell with multi-pillar vertical body channel MOSFET

NASA Astrophysics Data System (ADS)

Sasaki, Taro; Endoh, Tetsuo

2018-04-01

In this paper, from the viewpoint of cell size and sensing margin, the impact of a novel cross-point-type one transistor and one magnetic tunnel junction (1T–1MTJ) spin-transfer-torque magnetoresistive random access memory (STT-MRAM) cell with a multi-pillar vertical body channel (BC) MOSFET is shown for high density and wide sensing margin STT-MRAM, with a 10 ns writing period and 1.2 V V DD. For that purpose, all combinations of n/p-type MOSFETs and bottom/top-pin MTJs are compared, where the diameter of MTJ (D MTJ) is scaled down from 55 to 15 nm and the tunnel magnetoresistance (TMR) ratio is increased from 100 to 200%. The results show that, benefiting from the proposed STT-MRAM cell with no back bias effect, the MTJ with a high TMR ratio (200%) can be used in the design of smaller STT-MRAM cells (over 72.6% cell size reduction), which is a difficult task for conventional planar MOSFET based design.

Application of MOSFET detectors for dosimetry in small animal radiography using short exposure times.

PubMed

De Lin, Ming; Toncheva, Greta; Nguyen, Giao; Kim, Sangroh; Anderson-Evans, Colin; Johnson, G Allan; Yoshizumi, Terry T

2008-08-01

Digital subtraction angiography (DSA) X-ray imaging for small animals can be used for functional phenotyping given its ability to capture rapid physiological changes at high spatial and temporal resolution. The higher temporal and spatial requirements for small-animal imaging drive the need for short, high-flux X-ray pulses. However, high doses of ionizing radiation can affect the physiology. The purpose of this study was to verify and apply metal oxide semiconductor field effect transistor (MOSFET) technology to dosimetry for small-animal diagnostic imaging. A tungsten anode X-ray source was used to expose a tissue-equivalent mouse phantom. Dose measurements were made on the phantom surface and interior. The MOSFETs were verified with thermoluminescence dosimeters (TLDs). Bland-Altman analysis showed that the MOSFET results agreed with the TLD results (bias, 0.0625). Using typical small animal DSA scan parameters, the dose ranged from 0.7 to 2.2 cGy. Application of the MOSFETs in the small animal environment provided two main benefits: (1) the availability of results in near real-time instead of the hours needed for TLD processes and (2) the ability to support multiple exposures with different X-ray techniques (various of kVp, mA and ms) using the same MOSFET. This MOSFET technology has proven to be a fast, reliable small animal dosimetry method for DSA imaging and is a good system for dose monitoring for serial and gene expression studies.

Application of MOSFET Detectors for Dosimetry in Small Animal Radiography Using Short Exposure Times

PubMed Central

De Lin, Ming; Toncheva, Greta; Nguyen, Giao; Kim, Sangroh; Anderson-Evans, Colin; Johnson, G. Allan; Yoshizumi, Terry T.

2008-01-01

Digital subtraction angiography (DSA) X-ray imaging for small animals can be used for functional phenotyping given its ability to capture rapid physiological changes at high spatial and temporal resolution. The higher temporal and spatial requirements for small-animal imaging drive the need for short, high-flux X-ray pulses. However, high doses of ionizing radiation can affect the physiology. The purpose of this study was to verify and apply metal oxide semiconductor field effect transistor (MOSFET) technology to dosimetry for small-animal diagnostic imaging. A tungsten anode X-ray source was used to expose a tissue-equivalent mouse phantom. Dose measurements were made on the phantom surface and interior. The MOSFETs were verified with thermoluminescence dosimeters (TLDs). Bland-Altman analysis showed that the MOSFET results agreed with the TLD results (bias, 0.0625). Using typical small animal DSA scan parameters, the dose ranged from 0.7 to 2.2 cGy. Application of the MOSFETs in the small animal environment provided two main benefits: (1) the availability of results in near real-time instead of the hours needed for TLD processes and (2) the ability to support multiple exposures with different X-ray techniques (various of kVp, mA and ms) using the same MOSFET. This MOSFET technology has proven to be a fast, reliable small animal dosimetry method for DSA imaging and is a good system for dose monitoring for serial and gene expression studies. PMID:18666818

Dose verification to cochlea during gamma knife radiosurgery of acoustic schwannoma using MOSFET dosimeter.

PubMed

Sharma, Sunil D; Kumar, Rajesh; Akhilesh, Philomina; Pendse, Anil M; Deshpande, Sudesh; Misra, Basant K

2012-01-01

Dose verification to cochlea using metal oxide semiconductor field effect transistor (MOSFET) dosimeter using a specially designed multi slice head and neck phantom during the treatment of acoustic schwannoma by Gamma Knife radiosurgery unit. A multi slice polystyrene head phantom was designed and fabricated for measurement of dose to cochlea during the treatment of the acoustic schwannoma. The phantom has provision to position the MOSFET dosimeters at the desired location precisely. MOSFET dosimeters of 0.2 mm x 0.2 mm x 0.5 μm were used to measure the dose to the cochlea. CT scans of the phantom with MOSFETs in situ were taken along with Leksell frame. The treatment plans of five patients treated earlier for acoustic schwannoma were transferred to the phantom. Dose and coordinates of maximum dose point inside the cochlea were derived. The phantom along with the MOSFET dosimeters was irradiated to deliver the planned treatment and dose received by cochlea were measured. The treatment planning system (TPS) estimated and measured dose to the cochlea were in the range of 7.4 - 8.4 Gy and 7.1 - 8 Gy, respectively. The maximum variation between TPS calculated and measured dose to cochlea was 5%. The measured dose values were found in good agreement with the dose values calculated using the TPS. The MOSFET dosimeter can be a suitable choice for routine dose verification in the Gamma Knife radiosurgery.

A statistical evaluation of effective time constants of random telegraph noise with various operation timings of in-pixel source follower transistors

NASA Astrophysics Data System (ADS)

Yonezawa, A.; Kuroda, R.; Teramoto, A.; Obara, T.; Sugawa, S.

2014-03-01

We evaluated effective time constants of random telegraph noise (RTN) with various operation timings of in-pixel source follower transistors statistically, and discuss the dependency of RTN time constants on the duty ratio (on/off ratio) of MOSFET which is controlled by the gate to source voltage (VGS). Under a general readout operation of CMOS image sensor (CIS), the row selected pixel-source followers (SFs) turn on and not selected pixel-SFs operate at different bias conditions depending on the select switch position; when select switch locate in between the SF driver and column output line, SF drivers nearly turn off. The duty ratio and cyclic period of selected time of SF driver depends on the operation timing determined by the column read out sequence. By changing the duty ratio from 1 to 7.6 x 10-3, time constant ratio of RTN (time to capture <τc<)/(time to emission <τe<) of a part of MOSFETs increased while RTN amplitudes were almost the same regardless of the duty ratio. In these MOSFETs, <τc< increased and the majority of <τe< decreased and the minority of <τe< increased by decreasing the duty ratio. The same tendencies of behaviors of <τc< and <τe< were obtained when VGS was decreased. This indicates that the effective <τc< and <τe< converge to those under off state as duty ratio decreases. These results are important for the noise reduction, detection and analysis of in pixel-SF with RTN.

MoS2 Negative-Capacitance Field-Effect Transistors with Subthreshold Swing below the Physics Limit.

PubMed

Liu, Xingqiang; Liang, Renrong; Gao, Guoyun; Pan, Caofeng; Jiang, Chunsheng; Xu, Qian; Luo, Jun; Zou, Xuming; Yang, Zhenyu; Liao, Lei; Wang, Zhong Lin

2018-05-21

The Boltzmann distribution of electrons induced fundamental barrier prevents subthreshold swing (SS) from less than 60 mV dec -1 at room temperature, leading to high energy consumption of MOSFETs. Herein, it is demonstrated that an aggressive introduction of the negative capacitance (NC) effect of ferroelectrics can decisively break the fundamental limit governed by the "Boltzmann tyranny". Such MoS 2 negative-capacitance field-effect transistors (NC-FETs) with self-aligned top-gated geometry demonstrated here pull down the SS value to 42.5 mV dec -1 , and simultaneously achieve superior performance of a transconductance of 45.5 μS μm and an on/off ratio of 4 × 10 6 with channel length less than 100 nm. Furthermore, the inserted HfO 2 layer not only realizes a stable NC gate stack structure, but also prevents the ferroelectric P(VDF-TrFE) from fatigue with robust stability. Notably, the fabricated MoS 2 NC-FETs are distinctly different from traditional MOSFETs. The on-state current increases as the temperature decreases even down to 20 K, and the SS values exhibit nonlinear dependence with temperature due to the implementation of the ferroelectric gate stack. The NC-FETs enable fundamental applications through overcoming the Boltzmann limit in nanoelectronics and open up an avenue to low-power transistors needed for many exciting long-endurance portable consumer products. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Simulation study of short-channel effects of tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Fukuda, Koichi; Asai, Hidehiro; Hattori, Junichi; Mori, Takahiro; Morita, Yukinori; Mizubayashi, Wataru; Masahara, Meishoku; Migita, Shinji; Ota, Hiroyuki; Endo, Kazuhiro; Matsukawa, Takashi

2018-04-01

Short-channel effects of tunnel field-effect transistors (FETs) are investigated in detail using simulations of a nonlocal band-to-band tunneling model. Discussion is limited to silicon. Several simulation scenarios were considered to address different effects, such as source overlap and drain offset effects. Adopting the drain offset to suppress the drain leakage current suppressed the short channel effects. The physical mechanism underlying the short-channel behavior of the tunnel FETs (TFETs) was very different from that of metal-oxide-semiconductor FETs (MOSFETs). The minimal gate lengths that do not lose on-state current by one order are shown to be 3 nm for single-gate structures and 2 nm for double gate structures, as determined from the drain offset structure.

A two-dimensional (2D) analytical subthreshold swing and transconductance model of underlap dual-material double-gate (DMDG) MOSFET for analog/RF applications

NASA Astrophysics Data System (ADS)

Narendar, Vadthiya; Rai, Saurabh; Tiwari, Siddharth; Mishra, R. A.

2016-12-01

The double-gate (DG) metal-oxide-semiconductor field effect transistors (MOSFETs) are the choice of technology in sub -100 nm regime of leading microelectronics industry. To enhance the analog and RF performance of DG MOSFET, an underlap dual-material (DM) DG MOSFET device structure has been considered because, it has the advantages of both underlap as well as that of dual-material gate (DMG). A 2D analytical surface potential, subthreshold current, subthreshold swing as well as transconductance modelling of underlap DMDG MOSFET has been done by solving the Poisson's equation. It has also been found that, numerically simulated data approves the analytically modelled data with commendable accuracy. As underlap length (Lun) increases, a substantial reduction of subthreshold current due to enhanced gate control over channel regime is observed. DMG structure facilitates to improve the average velocity of carriers which leads to superior drive current of the device. The underlap DMDG MOSFET device structure demonstrates an ameliorated subthreshold characteristic. The analog figure of merits (FOMs) such as transconductance (gm), transconductance generation factor (TGF), output conductance (gd), early voltage (VEA), intrinsic gain (AV) and RF FOMs namely cut-off frequency (fT), gain frequency product (GFP), transconductance frequency product (TFP) and gain transconductance frequency product (GTFP) have been evaluated. The aforesaid analysis revels that, the device is best suited for communication related Analog/RF applications.

Modeling and analysis of sub-surface leakage current in nano-MOSFET under cutoff regime

NASA Astrophysics Data System (ADS)

Swami, Yashu; Rai, Sanjeev

2017-02-01

The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in nano-MOSFET circuits as threshold voltage, channel length, and gate oxide thickness are scaled down to nano-meter range. Precise leakage current valuation and meticulous modeling of the same at nano-meter technology scale is an increasingly a critical work in designing the low power nano-MOSFET circuits. We present a specific compact model for sub-threshold regime leakage current in bulk driven nano-MOSFETs. The proposed logical model is instigated and executed into the latest updated PTM bulk nano-MOSFET model and is found to be in decent accord with technology-CAD simulation data. This paper also reviews various transistor intrinsic leakage mechanisms for nano-MOSFET exclusively in weak inversion, like drain-induced barricade lowering (DIBL), gate-induced drain leakage (GIDL), gate oxide tunneling (GOT) leakage etc. The root cause of the sub-surface leakage current is mainly due to the nano-scale short channel length causing source-drain coupling even in sub-threshold domain. Consequences leading to carriers triumphing the barricade between the source and drain. The enhanced model effectively considers the following parameter dependence in the account for better-quality value-added results like drain-to-source bias (VDS), gate-to-source bias (VGS), channel length (LG), source/drain junction depth (Xj), bulk doping concentration (NBULK), and operating temperature (Top).

Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org

2016-01-14

The effect of room temperature sulfur passivation of the surface of Ge{sub 0.83}Sn{sub 0.17} prior to high-k dielectric (HfO{sub 2}) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO{sub 2} and Ge{sub 0.83}Sn{sub 0.17}. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge{sub 0.83}Sn{sub 0.17} samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trapmore » density D{sub it} at the high-k dielectric/Ge{sub 0.83}Sn{sub 0.17} interface from the valence band edge to the midgap of Ge{sub 0.83}Sn{sub 0.17}, as compared with a non-passivated control. The impact of the improved D{sub it} is demonstrated in Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance G{sub m,int}, and effective hole mobility μ{sub eff} as compared with the non-passivated control. At a high inversion carrier density N{sub inv} of 1 × 10{sup 13 }cm{sup −2}, sulfur passivation increases μ{sub eff} by 25% in Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs.« less

Dose measurement based on threshold shift in MOSFET arrays in commercial SRAMS

NASA Technical Reports Server (NTRS)

Scheick, L. Z.; Swift, G.

2002-01-01

A new method using an array of MOS transistors isdescribed for measuring dose absorbed from ionizingradiation. Using the array of MOSFETs in a SRAM, a direct measurement of the number of MOS cells which change as a function of applied bias on the SRAM. Since the input and output of a SRAM used as a dosimeter is completely digital, the measurement of dose is easily accessible by a remote processing system.

Evaluation of semiconductor devices for Electric and Hybrid Vehicle (EHV) ac-drive applications, volume 1

NASA Technical Reports Server (NTRS)

Lee, F. C.; Chen, D. Y.; Jovanovic, M.; Hopkins, D. C.

1985-01-01

The results of evaluation of power semiconductor devices for electric hybrid vehicle ac drive applications are summarized. Three types of power devices are evaluated in the effort: high power bipolar or Darlington transistors, power MOSFETs, and asymmetric silicon control rectifiers (ASCR). The Bipolar transistors, including discrete device and Darlington devices, range from 100 A to 400 A and from 400 V to 900 V. These devices are currently used as key switching elements inverters for ac motor drive applications. Power MOSFETs, on the other hand, are much smaller in current rating. For the 400 V device, the current rating is limited to 25 A. For the main drive of an electric vehicle, device paralleling is normally needed to achieve practical power level. For other electric vehicle (EV) related applications such as battery charger circuit, however, MOSFET is advantageous to other devices because of drive circuit simplicity and high frequency capability. Asymmetrical SCR is basically a SCR device and needs commutation circuit for turn off. However, the device poses several advantages, i.e., low conduction drop and low cost.

Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature

NASA Astrophysics Data System (ADS)

Pavanello, Marcelo Antonio; de Souza, Michelly; Ribeiro, Thales Augusto; Martino, João Antonio; Flandre, Denis

2016-11-01

This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low temperatures down to liquid helium temperature in comparison to standard uniformly doped transistors. Devices from two different technologies have been measured and show that the mobility increase rate with temperature for GC SOI transistors is similar to uniformly doped devices for temperatures down to 90 K. However, at liquid helium temperature the rate of mobility increase is larger in GC SOI than in standard devices because of the different mobility scattering mechanisms. The analog properties of GC SOI devices have been investigated down to 4.16 K and show that because of its better transconductance and output conductance, an intrinsic voltage gain improvement with temperature is also obtained for devices in the whole studied temperature range. GC devices are also capable of reducing the impact ionization due to the high electric field in the drain region, increasing the drain breakdown voltage of fully-depleted SOI MOSFETs at any studied temperature and the kink voltage at 4.16 K.

Four-Quadrant Analog Multipliers Using G4-FETs

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Blalock, Benjamin; Christoloveanu, Sorin; Chen, Suheng; Akarvardar, Kerem

2006-01-01

Theoretical analysis and some experiments have shown that the silicon-on-insulator (SOI) 4-gate transistors known as G4-FETs can be used as building blocks of four-quadrant analog voltage multiplier circuits. Whereas a typical prior analog voltage multiplier contains between six and 10 transistors, it is possible to construct a superior voltage multiplier using only four G4-FETs. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET). It can be regarded as a single transistor having four gates, which are parts of a structure that affords high functionality by enabling the utilization of independently biased multiple inputs. The structure of a G4-FET of the type of interest here (see Figure 1) is that of a partially-depleted SOI MOSFET with two independent body contacts, one on each side of the channel. The drain current comprises of majority charge carriers flowing from one body contact to the other that is, what would otherwise be the side body contacts of the SOI MOSFET are used here as the end contacts [the drain (D) and the source (S)] of the G4-FET. What would otherwise be the source and drain of the SOI MOSFET serve, in the G4-FET, as two junction-based extra gates (JG1 and JG2), which are used to squeeze the channel via reverse-biased junctions as in a JFET. The G4-FET also includes a polysilicon top gate (G1), which plays the same role as does the gate in an accumulation-mode MOSFET. The substrate emulates a fourth MOS gate (G2). By making proper choices of G4-FET device parameters in conjunction with bias voltages and currents, one can design a circuit in which two input gate voltages (Vin1,Vin2) control the conduction characteristics of G4-FETs such that the output voltage (Vout) closely approximates a value proportional to the product of the input voltages. Figure 2 depicts two such analog multiplier circuits. In each circuit, there is the following: The input and output voltages are differential, The multiplier core consists of four G4- FETs (M1 through M4) biased by a constant current sink (Ibias), and The G4-FETs in two pairs are loaded by two identical resistors (RL), which convert a differential output current to a differential output voltage. The difference between the two circuits stems from their input and bias configurations. In each case, provided that the input voltages remain within their design ranges as determined by considerations of bias, saturation, and cutoff, then the output voltage is nominally given by Vout = kVin1Vin2, where k is a constant gain factor that depends on the design parameters and is different for the two circuits. In experimental versions of these circuits constructed using discrete G4- FETs and resistors, multiplication of voltages in all four quadrants (that is, in all four combinations of input polarities) was demonstrated, and deviations of the output voltages from linear dependence on the input voltages were found to amount to no more than a few percent. It is anticipated that in fully integrated versions of these circuits, the deviations from linearity will be made considerably smaller through better matching of devices.

Impact of source height on the characteristic of U-shaped channel tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei

2017-11-01

Tunnel field-effect transistor (TFET) is very attractive in replacing a MOSFET, particularly for low-power nanoelectronic circuits. The U-shaped channel TFET (U-TFET) was proposed to improve the drain-source current with a reduced footprint. In this work, the impact of the source height (HS) on the characteristic of the U-shaped channel tunnel field-effect transistor (U-TFET) is investigated by using TCAD simulation. It is found that with a fixed gate height (HG) the drain-source current has a negative correlation with HS. This is because when the gate region is deeper than the source region, the electric field near the corner of the tunneling junction can be enhanced and the tunneling rate is increased. When HS becomes very thin, the drain-source current is limited by the source region volume. The U-TFET with an n+ pocket is also studied and the same trend is observed.

Analysis of Carbon Nanotube Field-Effect-Transistors (FETs)

NASA Technical Reports Server (NTRS)

Yamada, Toshishige

1999-01-01

This five page presentation is grouped into 11 numbered viewgraphs, most of which contain one or more diagrams. Some of the diagrams are accompanied by captions, including: 2) Nanotube FET by Delft, IBM; 3) Nanotube FET/Standard MOSFET; 5) Saturation with carrier-carrier; 7) Electronic properties of carbon nanotube; 8) Theoretical nanotube FET characteristics; 11) Summary: Delft and IBM nanotube FET analysis.

High-voltage, high-current, solid-state closing switch

DOE Office of Scientific and Technical Information (OSTI.GOV)

Focia, Ronald Jeffrey

2017-08-22

A high-voltage, high-current, solid-state closing switch uses a field-effect transistor (e.g., a MOSFET) to trigger a high-voltage stack of thyristors. The switch can have a high hold-off voltage, high current carrying capacity, and high time-rate-of-change of current, di/dt. The fast closing switch can be used in pulsed power applications.

Differential-Mode Biosensor Using Dual Extended-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Choi, Jinhyeon; Lee, Hee Ho; Ahn, Jungil; Seo, Sang-Ho; Shin, Jang-Kyoo

2012-06-01

In this paper, we present a differential-mode biosensor using dual extended-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), which possesses the advantages of both the extended-gate structure and the differential-mode operation. The extended-gate MOSFET was fabricated using a 0.6 µm standard complementary metal oxide semiconductor (CMOS) process. The Au extended gate is the sensing gate on which biomolecules are immobilized, while the Pt extended gate is the dummy gate for use in the differential-mode detection circuit. The differential-mode operation offers many advantages such as insensitivity to the variation of temperature and light, as well as low noise. The outputs were measured using a semiconductor parameter analyzer in a phosphate buffered saline (PBS; pH 7.4) solution. A standard Ag/AgCl reference electrode was used to apply the gate bias. We measured the variation of output voltage with time, temperature, and light intensity. The bindings of self-assembled monolayer (SAM), streptavidin, and biotin caused a variation in the output voltage of the differential-mode detection circuit and this was confirmed by surface plasmon resonance (SPR) experiment. Biotin molecules could be detected up to a concentration of as low as 0.001 µg/ml.

Scan direction induced charging dynamics and the application for detection of gate to S/D shorts in logic devices

NASA Astrophysics Data System (ADS)

Lei, Ming; Tian, Qing; Wu, Kevin; Zhao, Yan

2016-03-01

Gate to source/drain (S/D) short is the most common and detrimental failure mechanism for advanced process technology development in Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) device manufacturing. Especially for sub-1Xnm nodes, MOSFET device is more vulnerable to gate-S/D shorts due to the aggressive scaling. The detection of this kind of electrical short defect is always challenging for in-line electron beam inspection (EBI), especially new shorting mechanisms on atomic scale due to new material/process flow implementation. The second challenge comes from the characterization of the shorts including identification of the exact shorting location. In this paper, we demonstrate unique scan direction induced charging dynamics (SDCD) phenomenon which stems from the transistor level response from EBI scan at post metal contact chemical-mechanical planarization (CMP) layers. We found that SDCD effect is exceptionally useful for gate-S/D short induced voltage contrast (VC) defect detection, especially for identification of shorting locations. The unique SDCD effect signatures of gate-S/D shorts can be used as fingerprint for ground true shorting defect detection. Correlation with other characterization methods on the same defective location from EBI scan shows consistent results from various shorting mechanism. A practical work flow to implement the application of SDCD effect for in-line EBI monitor of critical gate-S/D short defects is also proposed, together with examples of successful application use cases which mostly focus on static random-access memory (SRAM) array regions. Although the capability of gate-S/D short detection as well as expected device response is limited to passing transistors and pull-down transistors due to the design restriction from standard 6-cell SRAM structure, SDCD effect is proven to be very effective for gate-S/D short induced VC defect detection as well as yield learning for advanced technology development.

Effective Dose of Positioning Scans for Five CBCT Devices

DTIC Science & Technology

2016-05-25

CBCT. Journal of Dental Research , Dental Clinics , Dental Prospects 2014;8(2):107-10. 26. Kim D, Rashsuren O, Kim E. Conversion coefficients for the... International Journal of Oral & Maxillofacial Implants 2014;29:55-77. 10. Brooks SL. Radiation doses of common dental radiographic examinations: A review...dose was measured with metal–oxide–semiconductor field-effect transistor (MOSFET) dosimeters for five CBCT devices in a postgraduate dental clinic

Passivation of GaSb using molecular beam epitaxy Y{sub 2}O{sub 3} to achieve low interfacial trap density and high-performance self-aligned inversion-channel p-metal-oxide-semiconductor field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chu, R. L.; Chiang, T. H.; Hsueh, W. J.

2014-11-03

Molecular beam epitaxy deposited rare-earth oxide of Y{sub 2}O{sub 3} has effectively passivated GaSb, leading to low interfacial trap densities of (1–4) × 10{sup 12 }cm{sup −2} eV{sup −1} across the energy bandgap of GaSb. A high saturation drain current density of 130 μA/μm, a peak transconductance of 90 μS/μm, a low subthreshold slope of 147 mV/decade, and a peak field-effect hole mobility of 200 cm{sup 2}/V-s were obtained in 1 μm-gate-length self-aligned inversion-channel GaSb p-Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). In this work, high-κ/GaSb interfacial properties were better in samples with a high substrate temperature of 200 °C than in those with high κ's deposited at room temperature, in terms of themore » interfacial electrical properties, particularly, the reduction of interfacial trap densities near the conduction band and the MOSFET device performance.« less

Characterization of MOSFET dosimeters for low‐dose measurements in maxillofacial anthropomorphic phantoms

PubMed Central

Wolff, Jan E.; Kiljunen, Timo; Schulze, Dirk; Kortesniemi, Mika

2015-01-01

The aims of this study were to characterize reinforced metal‐oxide‐semiconductor field‐effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low‐dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the thermoluminescent dosimeters (TLD). The second aim was to characterize MOSFET dosimeter sensitivities for two dental photon energy ranges, dose dependency, dose rate dependency, and accumulated dose dependency. A further aim was to compare the performance of MOSFETs with those of TLDs in an anthropomorphic phantom head using a dentomaxillofacial CBCT device. The uncertainty was assessed by exposing 20 MOSFETs and a Barracuda MPD reference dosimeter. The MOSFET dosimeter sensitivities were evaluated for two photon energy ranges (50–90 kVp) using a constant dose and polymethylmethacrylate backscatter material. MOSFET and TLD comparative point‐dose measurements were performed on an anthropomorphic phantom that was exposed with a clinical CBCT protocol. The MOSFET single exposure low dose limit (25% uncertainty, k=2) was 1.69 mGy. An averaging of eight MOSFET exposures was required to attain the corresponding TLD (0.3 mGy) low‐dose limit. The sensitivity was 3.09±0.13 mV/mGy independently of the photon energy used. The MOSFET dosimeters did not present dose or dose rate sensitivity but, however, presented a 1% decrease of sensitivity per 1000 mV for accumulated threshold voltages between 8300 mV and 17500 mV. The point doses in an anthropomorphic phantom ranged for MOSFETs between 0.24 mGy and 2.29 mGy and for TLDs between 0.25 and 2.09 mGy, respectively. The mean difference was −8%. The MOSFET dosimeters presented statistically insignificant energy dependency. By averaging multiple exposures, the MOSFET dosimeters can achieve a TLD‐comparable low‐dose limit and constitute a feasible method for diagnostic dosimetry using anthropomorphic phantoms. However, for single in vivo measurements (<1.7 mGy) the sensitivity is too low. PACS number: 87.50.wj PMID:26219008

Improved analog and AC performance with increased noise immunity using nanotube junctionless field effect transistor (NJLFET)

NASA Astrophysics Data System (ADS)

Rewari, Sonam; Nath, Vandana; Haldar, Subhasis; Deswal, S. S.; Gupta, R. S.

2016-12-01

In this paper for the first time, the noise immunity and analog performance of nanotube junctionless field effect transistor (NJLFET) has been investigated. Small signal AC performance metrics namely Scattering parameters (S-parameters) have been analyzed along with analog parameters to validate the suitability of NJLFET for RFIC design. NJLFET performance is examined by comparing its performance with junctionless gate-all-around (JLGAA) MOSFET. It has been inferred that NJLFET has improved I on/ I off ratio directing improved digital performance at higher channel lengths, reduced channel resistance ( R ch) which enables the MOSFET to provide a low resistance path to current and improved early voltage ( V EA) which shows the capability for high-gain amplification and higher g m/ g d directing high intrinsic dc gain. Higher f Tmax for NJLFET has been observed posing its potential for terahertz applications. Higher gain transconductance frequency product makes NJLFET an ultimate device for high-speed switching applications. Higher maximum transducer power gain in NJLFET implies higher power gain than JLGAA MOSFET. Also, NJLFET exhibits lower harmonic distortion and it has been explained by significant reduction in third-order derivative of transconductance, g m3. Reduction in g m3 shows that NJLFET provides better linearity over JLGAA and is more suitable for RFIC design. Also the S-parameters namely S11, S12, S21 and S22 have been analyzed to verify the small signal performance. A lower magnitude for reflection coefficients S11 and S22 depicts minimum reflection and higher matching between ports in NJLFET than JLGAA MOSFET. Higher voltage gains S12 and S21 are present in NJLFET than its counterpart which shows the higher gains that can be achieved using nanotube architecture. The noise metrics which are noise figure and noise conductance show significant reduction for NJLFET justifying its noise immunity.

Triggering Mechanism for Neutron Induced Single-Event Burnout in Power Devices

NASA Astrophysics Data System (ADS)

Shoji, Tomoyuki; Nishida, Shuichi; Hamada, Kimimori

2013-04-01

Cosmic ray neutrons can trigger catastrophic failures in power devices. It has been reported that parasitic transistor action causes single-event burnout (SEB) in power metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs). However, power diodes do not have an inherent parasitic transistor. In this paper, we describe the mechanism triggering SEB in power diodes for the first time using transient device simulation. Initially, generated electron-hole pairs created by incident recoil ions generate transient current, which increases the electron density in the vicinity of the n-/n+ boundary. The space charge effect of the carriers leads to an increase in the strength of the electric field at the n-/n+ boundary. Finally, the onset of impact ionization at the n-/n+ boundary can trigger SEB. Furthermore, this failure is closely related to diode secondary breakdown. It was clarified that the impact ionization at the n-/n+ boundary is a key point of the mechanism triggering SEB in power devices.

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

Improvement of charge-pumping electrically detected magnetic resonance and its application to silicon metal-oxide-semiconductor field-effect transistor

NASA Astrophysics Data System (ADS)

Hori, Masahiro; Tsuchiya, Toshiaki; Ono, Yukinori

2017-01-01

Charge-pumping electrically detected magnetic resonance (CP EDMR), or EDMR in the CP mode, is improved and applied to a silicon metal-oxide-semiconductor field-effect transistor (MOSFET). Real-time monitoring of the CP process reveals that high-frequency transient currents are an obstacle to signal amplification for EDMR. Therefore, we introduce cutoff circuitry, leading to a detection limit for the number of spins as low as 103 for Si MOS interface defects. With this improved method, we demonstrate that CP EDMR inherits one of the most important features of the CP method: the gate control of the energy window of the detectable interface defects for spectroscopy.

Experience of using MOSFET detectors for dose verification measurements in an end-to-end 192Ir brachytherapy quality assurance system.

PubMed

Persson, Maria; Nilsson, Josef; Carlsson Tedgren, Åsa

Establishment of an end-to-end system for the brachytherapy (BT) dosimetric chain could be valuable in clinical quality assurance. Here, the development of such a system using MOSFET (metal oxide semiconductor field effect transistor) detectors and experience gained during 2 years of use are reported with focus on the performance of the MOSFET detectors. A bolus phantom was constructed with two implants, mimicking prostate and head & neck treatments, using steel needles and plastic catheters to guide the 192 Ir source and house the MOSFET detectors. The phantom was taken through the BT treatment chain from image acquisition to dose evaluation. During the 2-year evaluation-period, delivered doses were verified a total of 56 times using MOSFET detectors which had been calibrated in an external 60 Co beam. An initial experimental investigation on beam quality differences between 192 Ir and 60 Co is reported. The standard deviation in repeated MOSFET measurements was below 3% in the six measurement points with dose levels above 2 Gy. MOSFET measurements overestimated treatment planning system doses by 2-7%. Distance-dependent experimental beam quality correction factors derived in a phantom of similar size as that used for end-to-end tests applied on a time-resolved measurement improved the agreement. MOSFET detectors provide values stable over time and function well for use as detectors for end-to-end quality assurance purposes in 192 Ir BT. Beam quality correction factors should address not only distance from source but also phantom dimensions. Copyright © 2017 American Brachytherapy Society. Published by Elsevier Inc. All rights reserved.

Long-Term Reliability of a Hard-Switched Boost Power Processing Unit Utilizing SiC Power MOSFETs

NASA Technical Reports Server (NTRS)

Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Iannello, Christopher J.; Del Castillo, Linda Y.; Fitzpatrick, Fred D.; Mojarradi, Mohammad M.;

Analytical model of threshold voltage degradation due to localized charges in gate material engineered Schottky barrier cylindrical GAA MOSFETs

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

2016-10-01

The threshold voltage degradation due to the hot carrier induced localized charges (LC) is a major reliability concern for nanoscale Schottky barrier (SB) cylindrical gate all around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs). The degradation physics of gate material engineered (GME)-SB-GAA MOSFETs due to LC is still unexplored. An explicit threshold voltage degradation model for GME-SB-GAA-MOSFETs with the incorporation of localized charges (N it) is developed. To accurately model the threshold voltage the minimum channel carrier density has been taken into account. The model renders how +/- LC affects the device subthreshold performance. One-dimensional (1D) Poisson’s and 2D Laplace equations have been solved for two different regions (fresh and damaged) with two different gate metal work-functions. LCs are considered at the drain side with low gate metal work-function as N it is more vulnerable towards the drain. For the reduction of carrier mobility degradation, a lightly doped channel has been considered. The proposed model also includes the effect of barrier height lowering at the metal-semiconductor interface. The developed model results have been verified using numerical simulation data obtained by the ATLAS-3D device simulator and excellent agreement is observed between analytical and simulation results.

Abnormal threshold voltage shift under hot carrier stress in Ti1-xNx/HfO2 p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jyun-Yu; Chang, Ting-Chang; Lo, Wen-Hung; Ho, Szu-Han; Chen, Ching-En; Chen, Hua-Mao; Tseng, Tseung-Yuen; Tai, Ya-Hsiang; Cheng, Osbert; Huang, Cheng-Tung

2013-09-01

This work investigates the channel hot carrier (CHC) effect in HfO2/Ti1-xNx p-channel metal oxide semiconductor field effect transistors (p-MOSFETs). Generally, the subthreshold swing (S.S.) should increase during CHC stress (CHCS), since interface states will be generated near the drain side under high electric field due to drain voltage (Vd). However, our experimental data indicate that S.S. has no evident change under CHCS, but threshold voltage (Vth) shifts positively. This result can be attributed to hot carrier injected into high-k dielectric near the drain side. Meanwhile, it is surprising that such Vth degradation is not observed in the saturation region during stress. Therefore, drain-induced-barrier-lowering (DIBL) as a result of CHC-induced electron trapping is proposed to explain the different Vth behaviors in the linear and saturation regions. Additionally, the influence of different nitrogen concentrations in HfO2/Ti1-xNx p-MOSFETs on CHCS is also investigated in this work. Since nitrogen diffuses to SiO2/Si interface induced pre-Nit occurring to degrades channel mobility during the annealing process, a device with more nitrogen shows slightly less impact ionization, leading to insignificant charge trapping-induced DIBL behavior.

Performance characteristics of mobile MOSFET dosimeter for kilovoltage X-rays used in image guided radiotherapy.

PubMed

Kumar, A Sathish; Singh, I Rabi Raja; Sharma, S D; Ravindran, B Paul

2015-01-01

The main objective of this study was to investigate the characteristics of metal oxide semiconductor field effect transistor (MOSFET) dosimeter for kilovoltage (kV) X-ray beams in order to perform the in vivo dosimetry during image guidance in radiotherapy. The performance characteristics of high sensitivity MOSFET dosimeters were investigated for 80, 90, 100, 110, 120, and 125 kV X-ray beams used for imaging in radiotherapy. This study was performed using Clinac 2100 C/D medical electron linear accelerator with on-board imaging and kV cone beam computed tomography system. The characteristics studied in this work include energy dependence, angular dependence, and linearity. The X-ray beam outputs were measured as per American Association of Physicists in Medicine (AAPM) TG 61 recommendations using PTW parallel plate (PP) ionization chamber, which was calibrated in terms of air kerma (Nk) by the National Standard Laboratory. The MOSFET dosimeters were calibrated against the PP ionization chamber for all the kV X-ray beams and the calibration coefficient was found to be 0.11 cGy/mV with a standard deviation of about ±1%. The response of MOSFET was found to be energy independent for the kV X-ray energies used in this study. The response of the MOSFET dosimeter was also found independent of angle of incidence for the gantry angles in the range of 0° to 360° in-air as well as at 3 cm depth in tissue equivalent phantom.

In vivo dosimetry using a linear Mosfet-array dosimeter to determine the urethra dose in 125I permanent prostate implants.

PubMed

Bloemen-van Gurp, Esther J; Murrer, Lars H P; Haanstra, Björk K C; van Gils, Francis C J M; Dekker, Andre L A J; Mijnheer, Ben J; Lambin, Philippe

2009-01-01

In vivo dosimetry during brachytherapy of the prostate with (125)I seeds is challenging because of the high dose gradients and low photon energies involved. We present the results of a study using metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to evaluate the dose in the urethra after a permanent prostate implantation procedure. Phantom measurements were made to validate the measurement technique, determine the measurement accuracy, and define action levels for clinical measurements. Patient measurements were performed with a MOSFET array in the urinary catheter immediately after the implantation procedure. A CT scan was performed, and dose values, calculated by the treatment planning system, were compared to in vivo dose values measured with MOSFET dosimeters. Corrections for temperature dependence of the MOSFET array response and photon attenuation in the catheter on the in vivo dose values are necessary. The overall uncertainty in the measurement procedure, determined in a simulation experiment, is 8.0% (1 SD). In vivo dose values were obtained for 17 patients. In the high-dose region (> 100 Gy), calculated and measured dose values agreed within 1.7% +/- 10.7% (1 SD). In the low-dose region outside the prostate (< 100 Gy), larger deviations occurred. MOSFET detectors are suitable for in vivo dosimetry during (125)I brachytherapy of prostate cancer. An action level of +/- 16% (2 SD) for detection of errors in the implantation procedure is achievable after validation of the detector system and measurement conditions.

Effects of plasma-induced charging damage on random telegraph noise in metal-oxide-semiconductor field-effect transistors with SiO2 and high-k gate dielectrics

NASA Astrophysics Data System (ADS)

Kamei, Masayuki; Takao, Yoshinori; Eriguchi, Koji; Ono, Kouichi

2014-01-01

We clarified in this study how plasma-induced charging damage (PCD) affects the so-called “random telegraph noise (RTN)” — a principal concern in designing ultimately scaled large-scale integrated circuits (LSIs). Metal-oxide-semiconductor field-effect transistors (MOSFETs) with SiO2 and high-k gate dielectric were exposed to an inductively coupled plasma (ICP) with Ar gas. Drain current vs gate voltage (Ids-Vg) characteristics were obtained before and after the ICP plasma exposure for the same device. Then, the time evolution of Ids fluctuation defined as Ids/μIds was measured, where μIds is the mean Ids. This value corresponds to an RTN feature, and RTN was obtained under various gate voltages (Vg) by a customized measurement technique. We focused on the statistical distribution width of (Ids/μIds), δ(Ids/μIds), in order to clarify the effects of PCD on RTN. δ(Ids/μIds) was increased by PCD for both MOSFETs with the SiO2 and high-k gate dielectrics, suggesting that RTN can be used as a measure of PCD, i.e., a distribution width increase directly indicates the presence of PCD. The dependence of δ(Ids/μIds) on the overdrive voltage Vg-Vth, where Vth is the threshold voltage, was investigated by the present technique. It was confirmed that δ(Ids/μIds) increased with a decrease in the overdrive voltage for MOSFETs with the SiO2 and high-k gate dielectrics. The presence of created carrier trap sites with PCD was characterized by the time constants for carrier capture and emission. The threshold voltage shift (ΔVth) induced by PCD was also evaluated and compared with the RTN change, to correlate the RTN increase with ΔVth induced by PCD. Although the estimated time constants exhibited complex behaviors due to the nature of trap sites created by PCD, δ(Ids/μIds) showed a straightforward tendency in accordance with the amount of PCD. These findings provide an in-depth understanding of plasma-induced RTN characteristic changes in future MOSFETs.

Analog synthesized fast-variable linear load

NASA Technical Reports Server (NTRS)

Niedra, Janis M.

1991-01-01

A several kilowatt power level, fast-variable linear resistor was synthesized by using analog components to control the conductance of power MOSFETs. Risetimes observed have been as short as 500 ns with respect to the control signal and 1 to 2 microseconds with respect to the power source voltage. A variant configuration of this load that dissipates a constant power set by a control signal is indicated. Replacement of the MOSFETs by static induction transistors (SITs) to increase power handling, speed and radiation hardness is discussed.

FinFET and UTBB for RF SOI communication systems

NASA Astrophysics Data System (ADS)

Raskin, Jean-Pierre

2016-11-01

Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. Thanks to the introduction of the trap-rich high-resistivity Silicon-on-Insulator (SOI) substrate on the market, the ICs requirements in term of linearity are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this paper, their analog/RF behavior is described and compared. Both show similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances.

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

NASA Technical Reports Server (NTRS)

Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Del Castillo, Linda Y.; Fitzpatrick, Fred; Chen, Yuan

2016-01-01

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

MOSFET Switching Circuit Protects Shape Memory Alloy Actuators

NASA Technical Reports Server (NTRS)

Gummin, Mark A.

2011-01-01

A small-footprint, full surface-mount-component printed circuit board employs MOSFET (metal-oxide-semiconductor field-effect transistor) power switches to switch high currents from any input power supply from 3 to 30 V. High-force shape memory alloy (SMA) actuators generally require high current (up to 9 A at 28 V) to actuate. SMA wires (the driving element of the actuators) can be quickly overheated if power is not removed at the end of stroke, which can damage the wires. The new analog driver prevents overheating of the SMA wires in an actuator by momentarily removing power when the end limit switch is closed, thereby allowing complex control schemes to be adopted without concern for overheating. Either an integral pushbutton or microprocessor-controlled gate or control line inputs switch current to the actuator until the end switch line goes from logic high to logic low state. Power is then momentarily removed (switched off by the MOSFET). The analog driver is suited to use with nearly any SMA actuator.

Prognostics of Power Mosfets Under Thermal Stress Accelerated Aging Using Data-Driven and Model-Based Methodologies

NASA Technical Reports Server (NTRS)

Celaya, Jose; Saxena, Abhinav; Saha, Sankalita; Goebel, Kai F.

2011-01-01

An approach for predicting remaining useful life of power MOSFETs (metal oxide field effect transistor) devices has been developed. Power MOSFETs are semiconductor switching devices that are instrumental in electronics equipment such as those used in operation and control of modern aircraft and spacecraft. The MOSFETs examined here were aged under thermal overstress in a controlled experiment and continuous performance degradation data were collected from the accelerated aging experiment. Dieattach degradation was determined to be the primary failure mode. The collected run-to-failure data were analyzed and it was revealed that ON-state resistance increased as die-attach degraded under high thermal stresses. Results from finite element simulation analysis support the observations from the experimental data. Data-driven and model based prognostics algorithms were investigated where ON-state resistance was used as the primary precursor of failure feature. A Gaussian process regression algorithm was explored as an example for a data-driven technique and an extended Kalman filter and a particle filter were used as examples for model-based techniques. Both methods were able to provide valid results. Prognostic performance metrics were employed to evaluate and compare the algorithms.

Molecular sensing using monolayer floating gate, fully depleted SOI MOSFET acting as an exponential transducer.

PubMed

Takulapalli, Bharath R

2010-02-23

Field-effect transistor-based chemical sensors fall into two broad categories based on the principle of signal transduction-chemiresistor or Schottky-type devices and MOSFET or inversion-type devices. In this paper, we report a new inversion-type device concept-fully depleted exponentially coupled (FDEC) sensor, using molecular monolayer floating gate fully depleted silicon on insulator (SOI) MOSFET. Molecular binding at the chemical-sensitive surface lowers the threshold voltage of the device inversion channel due to a unique capacitive charge-coupling mechanism involving interface defect states, causing an exponential increase in the inversion channel current. This response of the device is in opposite direction when compared to typical MOSFET-type sensors, wherein inversion current decreases in a conventional n-channel sensor device upon addition of negative charge to the chemical-sensitive device surface. The new sensor architecture enables ultrahigh sensitivity along with extraordinary selectivity. We propose the new sensor concept with the aid of analytical equations and present results from our experiments in liquid phase and gas phase to demonstrate the new principle of signal transduction. We present data from numerical simulations to further support our theory.

G(sup 4)FET Implementations of Some Logic Circuits

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

2009-01-01

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

Monte Carlo simulation of MOSFET detectors for high-energy photon beams using the PENELOPE code

NASA Astrophysics Data System (ADS)

Panettieri, Vanessa; Amor Duch, Maria; Jornet, Núria; Ginjaume, Mercè; Carrasco, Pablo; Badal, Andreu; Ortega, Xavier; Ribas, Montserrat

2007-01-01

The aim of this work was the Monte Carlo (MC) simulation of the response of commercially available dosimeters based on metal oxide semiconductor field effect transistors (MOSFETs) for radiotherapeutic photon beams using the PENELOPE code. The studied Thomson&Nielsen TN-502-RD MOSFETs have a very small sensitive area of 0.04 mm2 and a thickness of 0.5 µm which is placed on a flat kapton base and covered by a rounded layer of black epoxy resin. The influence of different metallic and Plastic water™ build-up caps, together with the orientation of the detector have been investigated for the specific application of MOSFET detectors for entrance in vivo dosimetry. Additionally, the energy dependence of MOSFET detectors for different high-energy photon beams (with energy >1.25 MeV) has been calculated. Calculations were carried out for simulated 6 MV and 18 MV x-ray beams generated by a Varian Clinac 1800 linear accelerator, a Co-60 photon beam from a Theratron 780 unit, and monoenergetic photon beams ranging from 2 MeV to 10 MeV. The results of the validation of the simulated photon beams show that the average difference between MC results and reference data is negligible, within 0.3%. MC simulated results of the effect of the build-up caps on the MOSFET response are in good agreement with experimental measurements, within the uncertainties. In particular, for the 18 MV photon beam the response of the detectors under a tungsten cap is 48% higher than for a 2 cm Plastic water™ cap and approximately 26% higher when a brass cap is used. This effect is demonstrated to be caused by positron production in the build-up caps of higher atomic number. This work also shows that the MOSFET detectors produce a higher signal when their rounded side is facing the beam (up to 6%) and that there is a significant variation (up to 50%) in the response of the MOSFET for photon energies in the studied energy range. All the results have shown that the PENELOPE code system can successfully reproduce the response of a detector with such a small active area.

Monte Carlo simulation of MOSFET detectors for high-energy photon beams using the PENELOPE code.

PubMed

Panettieri, Vanessa; Duch, Maria Amor; Jornet, Núria; Ginjaume, Mercè; Carrasco, Pablo; Badal, Andreu; Ortega, Xavier; Ribas, Montserrat

2007-01-07

The aim of this work was the Monte Carlo (MC) simulation of the response of commercially available dosimeters based on metal oxide semiconductor field effect transistors (MOSFETs) for radiotherapeutic photon beams using the PENELOPE code. The studied Thomson&Nielsen TN-502-RD MOSFETs have a very small sensitive area of 0.04 mm(2) and a thickness of 0.5 microm which is placed on a flat kapton base and covered by a rounded layer of black epoxy resin. The influence of different metallic and Plastic water build-up caps, together with the orientation of the detector have been investigated for the specific application of MOSFET detectors for entrance in vivo dosimetry. Additionally, the energy dependence of MOSFET detectors for different high-energy photon beams (with energy >1.25 MeV) has been calculated. Calculations were carried out for simulated 6 MV and 18 MV x-ray beams generated by a Varian Clinac 1800 linear accelerator, a Co-60 photon beam from a Theratron 780 unit, and monoenergetic photon beams ranging from 2 MeV to 10 MeV. The results of the validation of the simulated photon beams show that the average difference between MC results and reference data is negligible, within 0.3%. MC simulated results of the effect of the build-up caps on the MOSFET response are in good agreement with experimental measurements, within the uncertainties. In particular, for the 18 MV photon beam the response of the detectors under a tungsten cap is 48% higher than for a 2 cm Plastic water cap and approximately 26% higher when a brass cap is used. This effect is demonstrated to be caused by positron production in the build-up caps of higher atomic number. This work also shows that the MOSFET detectors produce a higher signal when their rounded side is facing the beam (up to 6%) and that there is a significant variation (up to 50%) in the response of the MOSFET for photon energies in the studied energy range. All the results have shown that the PENELOPE code system can successfully reproduce the response of a detector with such a small active area.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

NASA Astrophysics Data System (ADS)

Es-Sakhi, Azzedin D.

Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Development of an applicator for eye lens dosimetry during radiotherapy.

PubMed

Park, J M; Lee, J; Kim, H S; Ye, S-J; Kim, J-I

2014-10-01

To develop an applicator for in vivo measurements of lens dose during radiotherapy. A contact lens-shaped applicator made of acrylic was developed for in vivo measurements of lens dose. This lens applicator allows the insertion of commercially available metal oxide semiconductor field effect transistors (MOSFETs) dosemeters. CT images of an anthropomorphic phantom with and without the applicator were acquired. Ten volumetric modulated arc therapy plans each for the brain and the head and neck cancer were generated and delivered to an anthropomorphic phantom. The differences between the measured and the calculated doses at the lens applicator, as well as the differences between the measured and the calculated doses at the surface of the eyelid were acquired. The average difference between the measured and the calculated doses with the applicator was 3.1 ± 1.8 cGy with a micro MOSFET and 2.8 ± 1.3 cGy with a standard MOSFET. The average difference without the lens applicator was 4.8 ± 5.2 cGy with the micro MOSFET and 5.7 ± 6.5 cGy with the standard MOSFET. The maximum difference with the micro MOSFET was 10.5 cGy with the applicator and 21.1 cGy without the applicator. For the standard MOSFET, it was 6.8 cGy with the applicator and 27.6 cGy without the applicator. The lens applicator allowed reduction of the differences between the calculated and the measured doses during in vivo measurement for the lens compared with in vivo measurement at the surface of the eyelid. By using an applicator for in vivo dosimetry of the eye lens, it was possible to reduce the measurement uncertainty.

ZnO-based multiple channel and multiple gate FinMOSFETs

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Huang, Hung-Lin; Tseng, Chun-Yen; Lee, Hsin-Ying

2016-02-01

In recent years, zinc oxide (ZnO)-based metal-oxide-semiconductor field-effect transistors (MOSFETs) have attracted much attention, because ZnO-based semiconductors possess several advantages, including large exciton binding energy, nontoxicity, biocompatibility, low material cost, and wide direct bandgap. Moreover, the ZnO-based MOSFET is one of most potential devices, due to the applications in microwave power amplifiers, logic circuits, large scale integrated circuits, and logic swing. In this study, to enhance the performances of the ZnO-based MOSFETs, the ZnObased multiple channel and multiple gate structured FinMOSFETs were fabricated using the simple laser interference photolithography method and the self-aligned photolithography method. The multiple channel structure possessed the additional sidewall depletion width control ability to improve the channel controllability, because the multiple channel sidewall portions were surrounded by the gate electrode. Furthermore, the multiple gate structure had a shorter distance between source and gate and a shorter gate length between two gates to enhance the gate operating performances. Besides, the shorter distance between source and gate could enhance the electron velocity in the channel fin structure of the multiple gate structure. In this work, ninety one channels and four gates were used in the FinMOSFETs. Consequently, the drain-source saturation current (IDSS) and maximum transconductance (gm) of the ZnO-based multiple channel and multiple gate structured FinFETs operated at a drain-source voltage (VDS) of 10 V and a gate-source voltage (VGS) of 0 V were respectively improved from 11.5 mA/mm to 13.7 mA/mm and from 4.1 mS/mm to 6.9 mS/mm in comparison with that of the conventional ZnO-based single channel and single gate MOSFETs.

Characteristics of mobile MOSFET dosimetry system for megavoltage photon beams

PubMed Central

Kumar, A. Sathish; Sharma, S. D.; Ravindran, B. Paul

2014-01-01

The characteristics of a mobile metal oxide semiconductor field effect transistor (mobile MOSFET) detector for standard bias were investigated for megavoltage photon beams. This study was performed with a brass alloy build-up cap for three energies namely Co-60, 6 and 15 MV photon beams. The MOSFETs were calibrated and the performance characteristics were analyzed with respect to dose rate dependence, energy dependence, field size dependence, linearity, build-up factor, and angular dependence for all the three energies. A linear dose-response curve was noted for Co-60, 6 MV, and 15 MV photons. The calibration factors were found to be 1.03, 1, and 0.79 cGy/mV for Co-60, 6 MV, and 15 MV photon energies, respectively. The calibration graph has been obtained to the dose up to 600 cGy, and the dose-response curve was found to be linear. The MOSFETs were found to be energy independent both for measurements performed at depth as well as on the surface with build-up. However, field size dependence was also analyzed for variable field sizes and found to be field size independent. Angular dependence was analyzed by keeping the MOSFET dosimeter in parallel and perpendicular orientation to the angle of incidence of the radiation with and without build-up on the surface of the phantom. The maximum variation for the three energies was found to be within ± 2% for the gantry angles 90° and 270°, the deviations without the build-up for the same gantry angles were found to be 6%, 25%, and 60%, respectively. The MOSFET response was found to be independent of dose rate for all three energies. The dosimetric characteristics of the MOSFET detector make it a suitable in vivo dosimeter for megavoltage photon beams. PMID:25190992

Characteristics of mobile MOSFET dosimetry system for megavoltage photon beams.

PubMed

Kumar, A Sathish; Sharma, S D; Ravindran, B Paul

2014-07-01

The characteristics of a mobile metal oxide semiconductor field effect transistor (mobile MOSFET) detector for standard bias were investigated for megavoltage photon beams. This study was performed with a brass alloy build-up cap for three energies namely Co-60, 6 and 15 MV photon beams. The MOSFETs were calibrated and the performance characteristics were analyzed with respect to dose rate dependence, energy dependence, field size dependence, linearity, build-up factor, and angular dependence for all the three energies. A linear dose-response curve was noted for Co-60, 6 MV, and 15 MV photons. The calibration factors were found to be 1.03, 1, and 0.79 cGy/mV for Co-60, 6 MV, and 15 MV photon energies, respectively. The calibration graph has been obtained to the dose up to 600 cGy, and the dose-response curve was found to be linear. The MOSFETs were found to be energy independent both for measurements performed at depth as well as on the surface with build-up. However, field size dependence was also analyzed for variable field sizes and found to be field size independent. Angular dependence was analyzed by keeping the MOSFET dosimeter in parallel and perpendicular orientation to the angle of incidence of the radiation with and without build-up on the surface of the phantom. The maximum variation for the three energies was found to be within ± 2% for the gantry angles 90° and 270°, the deviations without the build-up for the same gantry angles were found to be 6%, 25%, and 60%, respectively. The MOSFET response was found to be independent of dose rate for all three energies. The dosimetric characteristics of the MOSFET detector make it a suitable in vivo dosimeter for megavoltage photon beams.

Evaluation of linear array MOSFET detectors for in vivo dosimetry to measure rectal dose in HDR brachytherapy.

PubMed

Haughey, Aisling; Coalter, George; Mugabe, Koki

2011-09-01

The study aimed to assess the suitability of linear array metal oxide semiconductor field effect transistor detectors (MOSFETs) as in vivo dosimeters to measure rectal dose in high dose rate brachytherapy treatments. The MOSFET arrays were calibrated with an Ir192 source and phantom measurements were performed to check agreement with the treatment planning system. The angular dependence, linearity and constancy of the detectors were evaluated. For in vivo measurements two sites were investigated, transperineal needle implants for prostate cancer and Fletcher suites for cervical cancer. The MOSFETs were inserted into the patients' rectum in theatre inside a modified flatus tube. The patients were then CT scanned for treatment planning. Measured rectal doses during treatment were compared with point dose measurements predicted by the TPS. The MOSFETs were found to require individual calibration factors. The calibration was found to drift by approximately 1% ±0.8 per 500 mV accumulated and varies with distance from source due to energy dependence. In vivo results for prostate patients found only 33% of measured doses agreed with the TPS within ±10%. For cervix cases 42% of measured doses agreed with the TPS within ±10%, however of those not agreeing variations of up to 70% were observed. One of the most limiting factors in this study was found to be the inability to prevent the MOSFET moving internally between the time of CT and treatment. Due to the many uncertainties associated with MOSFETs including calibration drift, angular dependence and the inability to know their exact position at the time of treatment, we consider them to be unsuitable for in vivo dosimetry in rectum for HDR brachytherapy.

Compact modeling of nanoscale triple-gate junctionless transistors covering drift-diffusion to quasi-ballistic carrier transport

NASA Astrophysics Data System (ADS)

Oproglidis, T. A.; Karatsori, T. A.; Barraud, S.; Ghibaudo, G.; Dimitriadis, C. A.

2018-04-01

In this work, we extend our analytical compact model for nanoscale junctionless triple-gate (JL TG) MOSFETs, capturing carrier transport from drift-diffusion to quasi-ballistic regime. This is based on a simple formulation of the low-field mobility extracted from experimental data using the Y-function method, taking into account the ballistic carrier motion and an increased carrier scattering in process-induced defects near the source/drain regions. The case of a Schottky junction in non-ideal ohmic contact at the drain side was also taken into account by modifying the threshold voltage and ideality factor of the JL transistor. The model is validated with experimental data for n-channel JL TG MOSFETs with channel length varying from 95 down to 25 nm. It can be easily implemented as a compact model for use in Spice circuit simulators.

Random Telegraph Signal-Like Fluctuation Created by Fowler-Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor

NASA Astrophysics Data System (ADS)

Kim, Heesang; Oh, Byoungchan; Kim, Kyungdo; Cha, Seon-Yong; Jeong, Jae-Goan; Hong, Sung-Joo; Lee, Jong-Ho; Park, Byung-Gook; Shin, Hyungcheol

2010-09-01

We generated traps inside gate oxide in gate-drain overlap region of recess channel type dynamic random access memory (DRAM) cell transistor through Fowler-Nordheim (FN) stress, and observed gate induced drain leakage (GIDL) current both in time domain and in frequency domain. It was found that the trap inside gate oxide could generate random telegraph signal (RTS)-like fluctuation in GIDL current. The characteristics of that fluctuation were similar to those of RTS-like fluctuation in GIDL current observed in the non-stressed device. This result shows the possibility that the trap causing variable retention time (VRT) in DRAM data retention time can be located inside gate oxide like channel RTS of metal-oxide-semiconductor field-effect transistors (MOSFETs).

Graphene field-effect devices

NASA Astrophysics Data System (ADS)

Echtermeyer, T. J.; Lemme, M. C.; Bolten, J.; Baus, M.; Ramsteiner, M.; Kurz, H.

2007-09-01

In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices (FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors (MOSFETs).

Single-event burnout of n-p-n bipolar-junction transistors in hybrid DC/DC converters

NASA Astrophysics Data System (ADS)

Warren, K.; Roth, D.; Kinnison, J.; Pappalardo, R.

2002-12-01

Single-event-induced failure of the Lambda Advanced Analog AMF2805S DC/DC Converter has been traced to burnout of an n-p-n transistor in the MOSFET drive stage. The failures were observed during testing while in inhibit mode only. Modifications to prevent burnout of the drive stage were successfully employed. A discussion of the failure mechanism and consequences for DC/DC converter testing are presented.

The Impact of the Shallow-Trench Isolation Effect on Flicker Noise of Source Follower MOSFETs in a CMOS Image Sensor.

PubMed

Fan, C C; Chiu, Y C; Liu, C; Lai, W W; Cheng, C H; Lin, D L; Li, G R; Lo, Y H; Chang, C W; Tsai, C C; Chang, C Y

2018-06-01

The flicker noise of source follower transistors is the dominant noise source in image sensors. This paper reports a systematic study of the shallow trench isolation effect in transistors with different sizes under high temperature conditions that correspond to the quantity of empty defect sites. The effects of shallow trench isolation sidewall defects on flicker noise characteristics are investigated. In addition, the low-frequency noise and subthreshold swing degrade simultaneously in accordance to the device gate width scaling. Both serious subthreshold leakage and considerable noise can be attributed to the high trap density near the STI edge. Consequently, we propose a coincidental relationship between the noise level and the subthreshold characteristic; its trend is identical to the experiments and simulation results.

Performance characteristics of mobile MOSFET dosimeter for kilovoltage X-rays used in image guided radiotherapy

PubMed Central

Kumar, A. Sathish; Singh, I. Rabi Raja; Sharma, S. D.; Ravindran, B. Paul

2015-01-01

The main objective of this study was to investigate the characteristics of metal oxide semiconductor field effect transistor (MOSFET) dosimeter for kilovoltage (kV) X-ray beams in order to perform the in vivo dosimetry during image guidance in radiotherapy. The performance characteristics of high sensitivity MOSFET dosimeters were investigated for 80, 90, 100, 110, 120, and 125 kV X-ray beams used for imaging in radiotherapy. This study was performed using Clinac 2100 C/D medical electron linear accelerator with on-board imaging and kV cone beam computed tomography system. The characteristics studied in this work include energy dependence, angular dependence, and linearity. The X-ray beam outputs were measured as per American Association of Physicists in Medicine (AAPM) TG 61 recommendations using PTW parallel plate (PP) ionization chamber, which was calibrated in terms of air kerma (Nk) by the National Standard Laboratory. The MOSFET dosimeters were calibrated against the PP ionization chamber for all the kV X-ray beams and the calibration coefficient was found to be 0.11 cGy/mV with a standard deviation of about ±1%. The response of MOSFET was found to be energy independent for the kV X-ray energies used in this study. The response of the MOSFET dosimeter was also found independent of angle of incidence for the gantry angles in the range of 0° to 360° in-air as well as at 3 cm depth in tissue equivalent phantom. PMID:26500397

Investigation of veritcal graded channel doping in nanoscale fully-depleted SOI-MOSFET

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2016-10-01

For achieving reliable transistor, we investigate an amended channel doping (ACD) engineering which improves the electrical and thermal performances of fully-depleted silicon-on-insulator (SOI) MOSFET. We have called the proposed structure with the amended channel doping engineering as ACD-SOI structure and compared it with a conventional fully-depleted SOI MOSFET (C-SOI) with uniform doping distribution using 2-D ATLAS simulator. The amended channel doping is a vertical graded doping that is distributed from the surface of structure with high doping density to the bottom of channel, near the buried oxide, with low doping density. Short channel effects (SCEs) and leakage current suppress due to high barrier height near the source region and electric field modification in the ACD-SOI in comparison with the C-SOI structure. Furthermore, by lower electric field and electron temperature near the drain region that is the place of hot carrier generation, we except the improvement of reliability and gate induced drain lowering (GIDL) in the proposed structure. Undesirable Self heating effect (SHE) that become a critical challenge for SOI MOSFETs is alleviated in the ACD-SOI structure because of utilizing low doping density near the buried oxide. Thus, refer to accessible results, the ACD-SOI structure with graded distribution in vertical direction is a reliable device especially in low power and high temperature applications.

Towards Prognostics of Power MOSFETs: Accelerated Aging and Precursors of Failure

NASA Technical Reports Server (NTRS)

Celaya, Jose R.; Saxena, Abhinav; Wysocki, Philip; Saha, Sankalita; Goebel, Kai

2010-01-01

This paper presents research results dealing with power MOSFETs (metal oxide semiconductor field effect transistor) within the prognostics and health management of electronics. Experimental results are presented for the identification of the on-resistance as a precursor to failure of devices with die-attach degradation as a failure mechanism. Devices are aged under power cycling in order to trigger die-attach damage. In situ measurements of key electrical and thermal parameters are collected throughout the aging process and further used for analysis and computation of the on-resistance parameter. Experimental results show that the devices experience die-attach damage and that the on-resistance captures the degradation process in such a way that it could be used for the development of prognostics algorithms (data-driven or physics-based).

Novel failure mechanism and improvement for split-gate trench MOSFET with large current under unclamped inductive switch stress

NASA Astrophysics Data System (ADS)

Tian, Ye; Yang, Zhuo; Xu, Zhiyuan; Liu, Siyang; Sun, Weifeng; Shi, Longxing; Zhu, Yuanzheng; Ye, Peng; Zhou, Jincheng

2018-04-01

In this paper, a novel failure mechanism under unclamped inductive switch (UIS) for Split-Gate Trench Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with large current is investigated. The device sample is tested and analyzed in detail. The simulation results demonstrate that the nonuniform potential distribution of the source poly should be responsible for the failure. Three structures are proposed and verified available to improve the device UIS ruggedness by TCAD simulation. The best one of the structures the device with source metal inserting into source poly through contacts in the field oxide is carried out and measured. The results demonstrate that the optimized structure can balance the trade-off between the UIS ruggedness and the static characteristics.

Parameter extraction and transistor models

NASA Technical Reports Server (NTRS)

Rykken, Charles; Meiser, Verena; Turner, Greg; Wang, QI

1985-01-01

Using specified mathematical models of the MOSFET device, the optimal values of the model-dependent parameters were extracted from data provided by the Jet Propulsion Laboratory (JPL). Three MOSFET models, all one-dimensional were used. One of the models took into account diffusion (as well as convection) currents. The sensitivity of the models was assessed for variations of the parameters from their optimal values. Lines of future inquiry are suggested on the basis of the behavior of the devices, of the limitations of the proposed models, and of the complexity of the required numerical investigations.

Four Terminal Gallium Nitride MOSFETs

NASA Astrophysics Data System (ADS)

Veety, Matthew Thomas

All reported gallium nitride (GaN) transistors to date have been three-terminal devices with source, drain, and gate electrodes. In the case of GaN MOSFETs, this leaves the bulk of the device at a floating potential which can impact device threshold voltage. In more traditional silicon-based MOSFET fabrication a bulk contact can be made on the back side of the silicon wafer. For GaN grown on sapphire substrates, however, this is not possible and an alternate, front-side bulk contact must be investigated. GaN is a III-V, wide band gap semiconductor that as promising material parameters for use in high frequency and high power applications. Possible applications are in the 1 to 10 GHz frequency band and power inverters for next generation grid solid state transformers and inverters. GaN has seen significant academic and commercial research for use in Heterojunction Field Effect Transistors (HFETs). These devices however are depletion-mode, meaning the device is considered "on" at zero gate bias. A MOSFET structure allows for enhancement mode operation, which is normally off. This mode is preferrable in high power applications as the device has lower off-state power consumption and is easier to implement in circuits. Proper surface passivation of seminconductor surface interface states is an important processing step for any device. Preliminary research on surface treatments using GaN wet etches and depletion-mode GaN devices utilizing this process are discussed. Devices pretreated with potassium pursulfate prior to gate dielectric deposition show significant device improvements. This process can be applied to any current GaN FET. Enhancement-mode GaN MOSFETs were fabricated on magnesium doped p-type Wurtzite gallium nitride grown by Metal Organic Chemical Vapor Deposition (MOCVD) on c-plane sapphire substrates. Devices utilized ion implant source and drain which was activated under NH3 overpressure in MOCVD. Also, devices were fabricated with a SiO2 gate dielectric and metal gate. Preliminary devices exhibited high GaN-oxide interface state density, Dit, on the order of 1013 cm-2· eV-1. Additional experiments and device fabrication was focused on improving device performance through optimization of the ion implantation activation anneal as well as incorporation of a bulk p-type ohmic contact and migration to a thicker, lower defect density, HVPE-grown template substrate. The first reported MOSFET on HVPE grown GaN substrates (templates) is reported with peak measured drain current of 1.05 mA/mm and a normalized transconductance of 57 muS/mm. Fabricated devices exhibited large (greater than 1 muA) source-to-drain junction leakage which is attributed to low activated doping density in the MOCVD-grown p-type bulk. MOSFETs fabricated on template substrates show more than twice the measured drain current as similar devices fabricated on traditional MOCVD GaN on sapphire substrates for the same bias conditions. Also, template MOSFETs have decreased gate leakage which allowed for a much greater range of operation. This performance increase is attributed to a more than doubled effective channel mobility on template GaN MOSFETs due to decreased crystal defect scattering when compared to a MOCVD-grown GaN-on-sapphire MOSFET. Fabricated MOSFETs also exhibit decreased interface state density with lower bound of 2.2x1011 cm-2·eV-1 when compared to prelimary MOSFETs. This decrease is associated with the use of a sacrificial oxide cap during source/drain activation. Suggested work for continued research is also presented which includes experiments to improve source/drain ion implantation profile, utilization of selective area growth for the active area, improved n- and p-type ohmic contact resistance and investigation of alternate oxides.

A Distance Detector with a Strip Magnetic MOSFET and Readout Circuit.

PubMed

Sung, Guo-Ming; Lin, Wen-Sheng; Wang, Hsing-Kuang

2017-01-10

This paper presents a distance detector composed of two separated metal-oxide semiconductor field-effect transistors (MOSFETs), a differential polysilicon cross-shaped Hall plate (CSHP), and a readout circuit. The distance detector was fabricated using 0.18 μm 1P6M Complementary Metal-Oxide Semiconductor (CMOS) technology to sense the magnetic induction perpendicular to the chip surface. The differential polysilicon CSHP enabled the magnetic device to not only increase the magnetosensitivity but also eliminate the offset voltage generated because of device mismatch and Lorentz force. Two MOSFETs generated two drain currents with a quadratic function of the differential Hall voltages at CSHP. A readout circuit-composed of a current-to-voltage converter, a low-pass filter, and a difference amplifier-was designed to amplify the current difference between two drains of MOSFETs. Measurements revealed that the electrostatic discharge (ESD) could be eliminated from the distance sensor by grounding it to earth; however, the sensor could be desensitized by ESD in the absence of grounding. The magnetic influence can be ignored if the magnetic body (human) stays far from the magnetic sensor, and the measuring system is grounded to earth by using the ESD wrist strap (Strap E-GND). Both 'no grounding' and 'grounding to power supply' conditions were unsuitable for measuring the induced Hall voltage.

Voltage-Boosting Driver For Switching Regulator

NASA Technical Reports Server (NTRS)

Trump, Ronald C.

1990-01-01

Driver circuit assures availability of 10- to 15-V gate-to-source voltage needed to turn on n-channel metal oxide/semiconductor field-effect transistor (MOSFET) acting as switch in switching voltage regulator. Includes voltage-boosting circuit efficiently providing gate voltage 10 to 15 V above supply voltage. Contains no exotic parts and does not require additional power supply. Consists of NAND gate and dual voltage booster operating in conjunction with pulse-width modulator part of regulator.

Verification of eye lens dose in IMRT by MOSFET measurement.

PubMed

Wang, Xuetao; Li, Guangjun; Zhao, Jianling; Song, Ying; Xiao, Jianghong; Bai, Sen

2018-04-17

The eye lens is recognized as one of the most radiosensitive structures in the human body. The widespread use of intensity-modulated radiotherapy (IMRT) complicates dose verification and necessitates high standards of dose computation. The purpose of this work was to assess the computed dose accuracy of eye lens through measurements using a metal-oxide-semiconductor field-effect transistor (MOSFET) dosimetry system. Sixteen clinical IMRT plans of head and neck patients were copied to an anthropomorphic head phantom. Measurements were performed using the MOSFET dosimetry system based on the head phantom. Two MOSFET detectors were imbedded in the eyes of the head phantom as the left and the right lens, covered by approximately 5-mm-thick paraffin wax. The measurement results were compared with the calculated values with a dose grid size of 1 mm. Sixteen IMRT plans were delivered, and 32 measured lens doses were obtained for analysis. The MOSFET dosimetry system can be used to verify the lens dose, and our measurements showed that the treatment planning system used in our clinic can provide adequate dose assessment in eye lenses. The average discrepancy between measurement and calculation was 6.7 ± 3.4%, and the largest discrepancy was 14.3%, which met the acceptability criterion set by the American Association of Physicists in Medicine Task Group 53 for external beam calculation for multileaf collimator-shaped fields in buildup regions. Copyright © 2018 American Association of Medical Dosimetrists. Published by Elsevier Inc. All rights reserved.

Electrically detected magnetic resonance of carbon dangling bonds at the Si-face 4H-SiC/SiO2 interface

NASA Astrophysics Data System (ADS)

Gruber, G.; Cottom, J.; Meszaros, R.; Koch, M.; Pobegen, G.; Aichinger, T.; Peters, D.; Hadley, P.

2018-04-01

SiC based metal-oxide-semiconductor field-effect transistors (MOSFETs) have gained a significant importance in power electronics applications. However, electrically active defects at the SiC/SiO2 interface degrade the ideal behavior of the devices. The relevant microscopic defects can be identified by electron paramagnetic resonance (EPR) or electrically detected magnetic resonance (EDMR). This helps to decide which changes to the fabrication process will likely lead to further increases of device performance and reliability. EDMR measurements have shown very similar dominant hyperfine (HF) spectra in differently processed MOSFETs although some discrepancies were observed in the measured g-factors. Here, the HF spectra measured of different SiC MOSFETs are compared, and it is argued that the same dominant defect is present in all devices. A comparison of the data with simulated spectra of the C dangling bond (PbC) center and the silicon vacancy (VSi) demonstrates that the PbC center is a more suitable candidate to explain the observed HF spectra.

Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

NASA Astrophysics Data System (ADS)

Guerfi, Youssouf; Larrieu, Guilhem

2016-04-01

Nanowires are considered building blocks for the ultimate scaling of MOS transistors, capable of pushing devices until the most extreme boundaries of miniaturization thanks to their physical and geometrical properties. In particular, nanowires' suitability for forming a gate-all-around (GAA) configuration confers to the device an optimum electrostatic control of the gate over the conduction channel and then a better immunity against the short channel effects (SCE). In this letter, a large-scale process of GAA vertical silicon nanowire (VNW) MOSFETs is presented. A top-down approach is adopted for the realization of VNWs with an optimum reproducibility followed by thin layer engineering at nanoscale. Good overall electrical performances were obtained, with excellent electrostatic behavior (a subthreshold slope (SS) of 95 mV/dec and a drain induced barrier lowering (DIBL) of 25 mV/V) for a 15-nm gate length. Finally, a first demonstration of dual integration of n-type and p-type VNW transistors for the realization of CMOS inverter is proposed.

Carbon Nanotubes as FET Channel: Analog Design Optimization considering CNT Parameter Variability

NASA Astrophysics Data System (ADS)

Samar Ansari, Mohd.; Tripathi, S. K.

2017-08-01

Carbon nanotubes (CNTs), both single-walled as well as multi-walled, have been employed in a plethora of applications pertinent to semiconductor materials and devices including, but not limited to, biotechnology, material science, nanoelectronics and nano-electro mechanical systems (NEMS). The Carbon Nanotube Field Effect Transistor (CNFET) is one such electronic device which effectively utilizes CNTs to achieve a boost in the channel conduction thereby yielding superior performance over standard MOSFETs. This paper explores the effects of variability in CNT physical parameters viz. nanotube diameter, pitch, and number of CNT in the transistor channel, on the performance of a chosen analog circuit. It is further shown that from the analyses performed, an optimal design of the CNFETs can be derived for optimizing the performance of the analog circuit as per a given specification set.

Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology.

PubMed

Emigh, Brent; Gordon, Christopher L; Connolly, Bairbre L; Falkiner, Michelle; Thomas, Karen E

2013-09-01

There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences <19%, T > 0.18). DAP-to-effective dose conversion factors ranged from 6.5 ×10(-4) mSv per Gy-cm(2) to 4.3 × 10(-3) mSv per Gy-cm(2) for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination protocols through the use of direct organ dose measurement using MOSFETs, which were shown to agree with Monte Carlo simulated doses.

Estimating effective dose to pediatric patients undergoing interventional radiology procedures using anthropomorphic phantoms and MOSFET dosimeters.

PubMed

Miksys, Nelson; Gordon, Christopher L; Thomas, Karen; Connolly, Bairbre L

2010-05-01

The purpose of this study was to estimate the effective doses received by pediatric patients during interventional radiology procedures and to present those doses in "look-up tables" standardized according to minute of fluoroscopy and frame of digital subtraction angiography (DSA). Organ doses were measured with metal oxide semiconductor field effect transistor (MOSFET) dosimeters inserted within three anthropomorphic phantoms, representing children at ages 1, 5, and 10 years, at locations corresponding to radiosensitive organs. The phantoms were exposed to mock interventional radiology procedures of the head, chest, and abdomen using posteroanterior and lateral geometries, varying magnification, and fluoroscopy or DSA exposures. Effective doses were calculated from organ doses recorded by the MOSFET dosimeters and are presented in look-up tables according to the different age groups. The largest effective dose burden for fluoroscopy was recorded for posteroanterior and lateral abdominal procedures (0.2-1.1 mSv/min of fluoroscopy), whereas procedures of the head resulted in the lowest effective doses (0.02-0.08 mSv/min of fluoroscopy). DSA exposures of the abdomen imparted higher doses (0.02-0.07 mSv/DSA frame) than did those involving the head and chest. Patient doses during interventional procedures vary significantly depending on the type of procedure. User-friendly look-up tables may provide a helpful tool for health care providers in estimating effective doses for an individual procedure.

Kilovolt dc solid state remote power controller development

NASA Technical Reports Server (NTRS)

Mitchell, J. T.

1982-01-01

The experience gained in developing and applying solid state power controller (SSPC) technology at high voltage dc (HVDC) potentials and power levels of up to 25 kilowatts is summarized. The HVDC switching devices, power switching concepts, drive circuits, and very fast acting overcurrent protection circuits were analyzed. A 25A bipolar breadboard with Darlington connected switching transistor was built. Fault testing at 900 volts was included. A bipolar transistor packaged breadboard design was developed. Power MOSFET remote power controller (RPC) was designed.

Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax

PubMed Central

Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He

2016-01-01

In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009

Effect of Al-diffusion-induced positive flatband voltage shift on the electrical characteristics of Al-incorporated high-k metal-oxide-semiconductor field-effective transistor

NASA Astrophysics Data System (ADS)

Wang, Wenwu; Akiyama, Koji; Mizubayashi, Wataru; Nabatame, Toshihide; Ota, Hiroyuki; Toriumi, Akira

2009-03-01

We systematically studied what effect Al diffusion from high-k dielectrics had on the flatband voltage (Vfb) of Al-incorporated high-k gate stacks. An anomalous positive shift fin Vfb with the decreasing equivalent oxide thickness (EOT) of high-k gate stacks is reported. As the SiO2 interfacial layer is aggressively thinned in Al-incorporated HfxAl1-xOy gate stacks with a metal-gate electrode, the Vfb first lies on the well known linear Vfb-EOT plot and deviates toward the positive-voltage direction (Vfb roll-up), followed by shifting toward negative voltage (Vfb roll-off). We demonstrated that the Vfb roll-up behavior remarkably decreases the threshold voltage (Vth) of p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs), and does not cause severe degradation in the characteristics of hole mobility. The Vfb roll-up behavior, which is independent of gate materials but strongly dependent on high-k dielectrics, was ascribed to variations in fixed charges near the SiO2/Si interface, which are caused by Al diffusion from HfxAl1-xOy through SiO2 to the SiO2/Si interface. These results indicate that anomalous positive shift in Vfb, i.e., Vfb roll-up, should be taken into consideration in quantitatively adjusting Vfb in thin EOT regions and that it could be used to further tune Vth in p-MOSFETs.

Methods of high current magnetic field generator for transcranial magnetic stimulation application

NASA Astrophysics Data System (ADS)

Bouda, N. R.; Pritchard, J.; Weber, R. J.; Mina, M.

2015-05-01

This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/-20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG1) and MOSFET circuits (HCMFG2) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.

Methods of high current magnetic field generator for transcranial magnetic stimulation application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bouda, N. R., E-mail: nybouda@iastate.edu; Pritchard, J.; Weber, R. J.

This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/−20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG{sub 1}) and MOSFET circuits (HCMFG{sub 2}) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.

Suppression of Random Dopant-Induced Threshold Voltage Fluctuations in Sub-0.1-(micron)meter MOSFET's with Epitaxial and (delta)-Doped Channels

NASA Technical Reports Server (NTRS)

Asenov, Asen; Saini, Subhash

1999-01-01

A detailed three-dimensional (3-D) statistical 'atomistic' simulation study of fluctuation-resistant sub-0.1-(micron)meter MOSFET architectures with epitaxial channels and delta doping is presented. The need for enhancing the fluctuation resistance of the sub-0.1-(micron)meter generation transistors is highlighted by presenting summarized results from atomistic simulations of a wide range of conventional devices with uniformly doped channel. According to our atomistic results, the doping concentration dependence of the random dopant-induced threshold voltage fluctuations in conventional devices is stronger than the analytically predicted fourth-root dependence. As a result of this, the scaling of such devices will be restricted by the "intrinsic" random dopant-induced fluctuations earlier than anticipated. Our atomistic simulations confirm that the introduction of a thin epitaxial layer in the MOSFET's channel can efficiently suppress the random dopant-induced threshold voltage fluctuations in sub-0.1-(micron)meter devices. For the first time, we observe an "anomalous" reduction in the threshold voltage fluctuations with an increase in the doping concentration behind the epitaxial channel, which we attribute to screening effects. Also, for the first time we study the effect of a delta-doping, positioned behind the epitaxial layer, on the intrinsic threshold voltage fluctuations. Above a certain thickness of epitaxial layer, we observe a pronounced anomalous decrease in the threshold voltage fluctuation with the increase of the delta doping. This phenomenon, which is also associated with screening, enhances the importance of the delta doping in the design of properly scaled fluctuation-resistant sub-0.1-(micron)meter MOSFET's. Index Terms-Doping, fluctuations, MOSFET, semiconductor device simulation, silicon devices, threshold.

Fabrication of 4H-SiC n-channel IGBTs with ultra high blocking voltage

NASA Astrophysics Data System (ADS)

Yang, Xiaolei; Tao, Yonghong; Yang, Tongtong; Huang, Runhua; Song, Bai

2018-03-01

Owing to the conductivity modulation of silicon carbide (SiC) bipolar devices, n-channel insulated gate bipolar transistors (n-IGBTs) have a significant advantage over metal oxide semiconductor field effect transistors (MOSFETs) in ultra high voltage (UHV) applications. In this paper, backside grinding and laser annealing process were carried out to fabricate 4H-SiC n-IGBTs. The thickness of a drift layer was 120 μm, which was designed for a blocking voltage of 13 kV. The n-IGBTs carried a collector current density of 24 A/cm2 at a power dissipation of 300 W/cm2 when the gate voltage was 20 V, with a differential specific on-resistance of 140 mΩ·cm2.

All-ion-implanted planar-gate current aperture vertical Ga2O3 MOSFETs with Mg-doped blocking layer

NASA Astrophysics Data System (ADS)

Wong, Man Hoi; Goto, Ken; Morikawa, Yoji; Kuramata, Akito; Yamakoshi, Shigenobu; Murakami, Hisashi; Kumagai, Yoshinao; Higashiwaki, Masataka

2018-06-01

A vertical β-Ga2O3 metal–oxide–semiconductor field-effect transistor featuring a planar-gate architecture is presented. The device was fabricated by an all-ion-implanted process without requiring trench etching or epitaxial regrowth. A Mg-ion-implanted current blocking layer (CBL) provided electrical isolation between the source and the drain except at an aperture opening through which drain current was conducted. Successful transistor action was realized by gating a Si-ion-implanted channel above the CBL. Thermal diffusion of Mg induced a large source–drain leakage current through the CBL, which resulted in compromised off-state device characteristics as well as a reduced peak extrinsic transconductance compared with the results of simulations.

Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu Shiyang; Nakajima, Anri; Ohashi, Takuo

2005-12-01

The interface trap generation ({delta}N{sub it}) and fixed oxide charge buildup ({delta}N{sub ot}) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current-current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for {delta}N{sub it} and {delta}N{sub ot}. At the earlier stress times, {delta}N{sub it} dominates the threshold voltage shift ({delta}V{sub th}) and {delta}N{sub ot} is negligible. With increasing stress time, the rate of increase of {delta}N{sub it} decreases continuously, showing a saturating trend for longer stress times, while {delta}N{submore » ot} still has a power-law dependence on stress time so that the relative contribution of {delta}N{sub ot} increases. The thermal activation energy of {delta}N{sub it} and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.« less

Integration of InGaAs MOSFETs and GaAs/ AlGaAs lasers on Si Substrate for advanced opto-electronic integrated circuits (OEICs).

PubMed

Kumar, Annie; Lee, Shuh-Ying; Yadav, Sachin; Tan, Kian Hua; Loke, Wan Khai; Dong, Yuan; Lee, Kwang Hong; Wicaksono, Satrio; Liang, Gengchiau; Yoon, Soon-Fatt; Antoniadis, Dimitri; Yeo, Yee-Chia; Gong, Xiao

2017-12-11

Lasers monolithically integrated with high speed MOSFETs on the silicon (Si) substrate could be a key to realize low cost, low power, and high speed opto-electronic integrated circuits (OEICs). In this paper, we report the monolithic integration of InGaAs channel transistors with electrically pumped GaAs/AlGaAs lasers on the Si substrate for future advanced OEICs. The laser and transistor layers were grown on the Si substrate by molecular beam epitaxy (MBE) using direct epitaxial growth. InGaAs n-FETs with an I ON /I OFF ratio of more than 10 6 with very low off-state leakage and a low subthreshold swing with a minimum of 82 mV/decade were realized. Electrically pumped GaAs/AlGaAs quantum well (QW) lasers with a lasing wavelength of 795 nm at room temperature were demonstrated. The overall fabrication process has a low thermal budget of no more than 400 °C.

Surface dose measurements from air gaps under a bolus by using a MOSFET dosimeter in clinical oblique photon beams

NASA Astrophysics Data System (ADS)

Chung, Jin-Beom; Kim, Jae-Sung; Kim, In-Ah; Lee, Jeong-Woo

2012-10-01

This study is intended to investigate the effects of surface dose from air gaps under the bolus in clinically used oblique photon beams by using a Markus parallel-plate chamber and a metal-oxide semiconductor field-effect transistor (MOSFET) dosimeter. To evaluate the performances of the two detectors, the percentage surface doses of the MOSFET dosimeters in without an air gap under the bolus material were measured and compared with those of the Markus parallel-plate chamber. MOSFET dosimeters at the surface provided results mostly in good agreement with the parallelplate chamber. The MOSFET dosimeters seemed suitable for surface dose measurements having excellent accuracy for clinical used photon beams. The relative surface doses were measured with air gaps (2, 5, 10 mm) and without an air gap under 3 different bolus setups: (1) unbolused (no bolus), (2) 5-mm bolus, and (3) 10-mm bolus. The reductions in the surface dose substantially increased with small field size, thick bolus, and large air gap. The absolute difference in the reductions of the surface dose between the MOSFET dosimeter and the Markus parallel-plate chamber was less than 1.1%. Results at oblique angles of incidence showed larger reductions in surface dose with increasing angle of incidence. The largest reduction in surface dose was recorded for a 6 × 6 cm2 field at a 60° angle of incidence with an 10-mm air gap under a 10-mm bolus. When a 10-mm bolus was used, a reduction in the surface dose with an air gap of up to 10.5% could be achieved by varying the field size and the incident angle. Therefore, air gaps under the bolus should be avoided in radiotherapy treatment, especially for photon beam with highly oblique angles of incidence.

Development of an applicator for eye lens dosimetry during radiotherapy

PubMed Central

Park, J M; Lee, J; Ye, S-J

2014-01-01

Objective: To develop an applicator for in vivo measurements of lens dose during radiotherapy. Methods: A contact lens-shaped applicator made of acrylic was developed for in vivo measurements of lens dose. This lens applicator allows the insertion of commercially available metal oxide semiconductor field effect transistors (MOSFETs) dosemeters. CT images of an anthropomorphic phantom with and without the applicator were acquired. Ten volumetric modulated arc therapy plans each for the brain and the head and neck cancer were generated and delivered to an anthropomorphic phantom. The differences between the measured and the calculated doses at the lens applicator, as well as the differences between the measured and the calculated doses at the surface of the eyelid were acquired. Results: The average difference between the measured and the calculated doses with the applicator was 3.1 ± 1.8 cGy with a micro MOSFET and 2.8 ± 1.3 cGy with a standard MOSFET. The average difference without the lens applicator was 4.8 ± 5.2 cGy with the micro MOSFET and 5.7 ± 6.5 cGy with the standard MOSFET. The maximum difference with the micro MOSFET was 10.5 cGy with the applicator and 21.1 cGy without the applicator. For the standard MOSFET, it was 6.8 cGy with the applicator and 27.6 cGy without the applicator. Conclusion: The lens applicator allowed reduction of the differences between the calculated and the measured doses during in vivo measurement for the lens compared with in vivo measurement at the surface of the eyelid. Advances in knowledge: By using an applicator for in vivo dosimetry of the eye lens, it was possible to reduce the measurement uncertainty. PMID:25111733

Characterization of MOSFET dosimeter angular dependence in three rotational axes measured free-in-air and in soft-tissue equivalent material.

PubMed

Koivisto, Juha; Kiljunen, Timo; Wolff, Jan; Kortesniemi, Mika

2013-09-01

When performing dose measurements on an X-ray device with multiple angles of irradiation, it is necessary to take the angular dependence of metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters into account. The objective of this study was to investigate the angular sensitivity dependence of MOSFET dosimeters in three rotational axes measured free-in-air and in soft-tissue equivalent material using dental photon energy. Free-in-air dose measurements were performed with three MOSFET dosimeters attached to a carbon fibre holder. Soft tissue measurements were performed with three MOSFET dosimeters placed in a polymethylmethacrylate (PMMA) phantom. All measurements were made in the isocenter of a dental cone-beam computed tomography (CBCT) scanner using 5º angular increments in the three rotational axes: axial, normal-to-axial and tangent-to-axial. The measurements were referenced to a RADCAL 1015 dosimeter. The angular sensitivity free-in-air (1 SD) was 3.7 ± 0.5 mV/mGy for axial, 3.8 ± 0.6 mV/mGy for normal-to-axial and 3.6 ± 0.6 mV/mGy for tangent-to-axial rotation. The angular sensitivity in the PMMA phantom was 3.1 ± 0.1 mV/mGy for axial, 3.3 ± 0.2 mV/mGy for normal-to-axial and 3.4 ± 0.2 mV/mGy for tangent-to-axial rotation. The angular sensitivity variations are considerably smaller in PMMA due to the smoothing effect of the scattered radiation. The largest decreases from the isotropic response were observed free-in-air at 90° (distal tip) and 270° (wire base) in the normal-to-axial and tangent-to-axial rotations, respectively. MOSFET dosimeters provide us with a versatile dosimetric method for dental radiology. However, due to the observed variation in angular sensitivity, MOSFET dosimeters should always be calibrated in the actual clinical settings for the beam geometry and angular range of the CBCT exposure.

Characterization of MOSFET dosimeter angular dependence in three rotational axes measured free-in-air and in soft-tissue equivalent material

PubMed Central

Koivisto, Juha; Kiljunen, Timo; Wolff, Jan; Kortesniemi, Mika

2013-01-01

When performing dose measurements on an X-ray device with multiple angles of irradiation, it is necessary to take the angular dependence of metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters into account. The objective of this study was to investigate the angular sensitivity dependence of MOSFET dosimeters in three rotational axes measured free-in-air and in soft-tissue equivalent material using dental photon energy. Free-in-air dose measurements were performed with three MOSFET dosimeters attached to a carbon fibre holder. Soft tissue measurements were performed with three MOSFET dosimeters placed in a polymethylmethacrylate (PMMA) phantom. All measurements were made in the isocenter of a dental cone-beam computed tomography (CBCT) scanner using 5º angular increments in the three rotational axes: axial, normal-to-axial and tangent-to-axial. The measurements were referenced to a RADCAL 1015 dosimeter. The angular sensitivity free-in-air (1 SD) was 3.7 ± 0.5 mV/mGy for axial, 3.8 ± 0.6 mV/mGy for normal-to-axial and 3.6 ± 0.6 mV/mGy for tangent-to-axial rotation. The angular sensitivity in the PMMA phantom was 3.1 ± 0.1 mV/mGy for axial, 3.3 ± 0.2 mV/mGy for normal-to-axial and 3.4 ± 0.2 mV/mGy for tangent-to-axial rotation. The angular sensitivity variations are considerably smaller in PMMA due to the smoothing effect of the scattered radiation. The largest decreases from the isotropic response were observed free-in-air at 90° (distal tip) and 270° (wire base) in the normal-to-axial and tangent-to-axial rotations, respectively. MOSFET dosimeters provide us with a versatile dosimetric method for dental radiology. However, due to the observed variation in angular sensitivity, MOSFET dosimeters should always be calibrated in the actual clinical settings for the beam geometry and angular range of the CBCT exposure. PMID:23520268

Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors

NASA Technical Reports Server (NTRS)

Duen Ho, Fat; Macleod, Todd C.

1998-01-01

The characteristics for a MFSFET (metal-ferroelectric-semiconductor field effect transistor) is very different than a conventional MOSFET and must be modeled differently. The drain current has a hysteresis shape with respect to the gate voltage. The position along the hysteresis curve is dependent on the last positive or negative polling of the ferroelectric material. The drain current also has a logarithmic decay after the last polling. A model has been developed to describe the MFSFET drain current for both gate voltage on and gate voltage off conditions. This model takes into account the hysteresis nature of the MFSFET and the time dependent decay. The model is based on the shape of the Fermi-Dirac function which has been modified to describe the MFSFET's drain current. This is different from the model proposed by Chen et. al. and that by Wu.

Drying Temperature Dependence of Sol-gel Spin Coated Bilayer Composite ZnO/TiO2 Thin Films for Extended Gate Field Effect Transistor pH Sensor

NASA Astrophysics Data System (ADS)

Rahman, R. A.; Zulkefle, M. A.; Yusoff, K. A.; Abdullah, W. F. H.; Rusop, M.; Herman, S. H.

2018-03-01

This study presents an investigation on zinc oxide (ZnO) and titanium dioxide (TiO2) bilayer film applied as the sensing membrane for extended-gate field effect transistor (EGFET) for pH sensing application. The influences of the drying temperatures on the pH sensing capability of ZnO/TiO2 were investigated. The sensing performance of the thin films were measured by connecting the thin film to a commercial MOSFET to form the extended gates. By varying the drying temperature, we found that the ZnO/TiO2 thin film dried at 150°C gave the highest sensitivity compared to other drying conditions, with the sensitivity value of 48.80 mV/pH.

Simulation study of ballistic spin-MOSFET devices with ferromagnetic channels based on some Heusler and oxide compounds

NASA Astrophysics Data System (ADS)

Graziosi, Patrizio; Neophytou, Neophytos

2018-02-01

Newly emerged materials from the family of Heuslers and complex oxides exhibit finite bandgaps and ferromagnetic behavior with Curie temperatures much higher than even room temperature. In this work, using the semiclassical top-of-the-barrier FET model, we explore the operation of a spin-MOSFET that utilizes such ferromagnetic semiconductors as channel materials, in addition to ferromagnetic source/drain contacts. Such a device could retain the spin polarization of injected electrons in the channel, the loss of which limits the operation of traditional spin transistors with non-ferromagnetic channels. We examine the operation of four material systems that are currently considered some of the most prominent known ferromagnetic semiconductors: three Heusler-type alloys (Mn2CoAl, CrVZrAl, and CoVZrAl) and one from the oxide family (NiFe2O4). We describe their band structures by using data from DFT (Density Functional Theory) calculations. We investigate under which conditions high spin polarization and significant ION/IOFF ratio, two essential requirements for the spin-MOSFET operation, are both achieved. We show that these particular Heusler channels, in their bulk form, do not have adequate bandgap to provide high ION/IOFF ratios and have small magnetoconductance compared to state-of-the-art devices. However, with confinement into ultra-narrow sizes down to a few nanometers, and by engineering their spin dependent contact resistances, they could prove promising channel materials for the realization of spin-MOSFET transistor devices that offer combined logic and memory functionalities. Although the main compounds of interest in this paper are Mn2CoAl, CrVZrAl, CoVZrAl, and NiFe2O4 alone, we expect that the insight we provide is relevant to other classes of such materials as well.

Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic

NASA Astrophysics Data System (ADS)

Yamamoto, Shuu'ichirou; Shuto, Yusuke; Sugahara, Satoshi

2013-07-01

We computationally analyzed performance and power-gating (PG) ability of a new nonvolatile delay flip-flop (NV-DFF) based on pseudo-spin-MOSFET (PS-MOSFET) architecture using spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The high-performance energy-efficient PG operations of the NV-DFF can be achieved owing to its cell structure employing PS-MOSFETs that can electrically separate the STT-MTJs from the ordinary DFF part of the NV-DFF. This separation also makes it possible that the break-even time (BET) of the NV-DFF is designed by the size of the PS-MOSFETs without performance degradation of the normal DFF operations. The effect of the area occupation ratio of the NV-DFFs to a CMOS logic system on the BET was also analyzed. Although the optimized BET was varied depending on the area occupation ratio, energy-efficient fine-grained PG with a BET of several sub-microseconds was revealed to be achieved. We also proposed microprocessors and system-on-chip (SoC) devices using nonvolatile hierarchical-memory systems wherein NV-DFF and nonvolatile static random access memory (NV-SRAM) circuits are used as fundamental building blocks. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

Binary CMOS image sensor with a gate/body-tied MOSFET-type photodetector for high-speed operation

NASA Astrophysics Data System (ADS)

Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Kim, Sang-Hwan; Shin, Jang-Kyoo

2016-05-01

In this paper, a binary complementary metal oxide semiconductor (CMOS) image sensor with a gate/body-tied (GBT) metal oxide semiconductor field effect transistor (MOSFET)-type photodetector is presented. The sensitivity of the GBT MOSFET-type photodetector, which was fabricated using the standard CMOS 0.35-μm process, is higher than the sensitivity of the p-n junction photodiode, because the output signal of the photodetector is amplified by the MOSFET. A binary image sensor becomes more efficient when using this photodetector. Lower power consumptions and higher speeds of operation are possible, compared to the conventional image sensors using multi-bit analog to digital converters (ADCs). The frame rate of the proposed image sensor is over 2000 frames per second, which is higher than those of the conventional CMOS image sensors. The output signal of an active pixel sensor is applied to a comparator and compared with a reference level. The 1-bit output data of the binary process is determined by this level. To obtain a video signal, the 1-bit output data is stored in the memory and is read out by horizontal scanning. The proposed chip is composed of a GBT pixel array (144 × 100), binary-process circuit, vertical scanner, horizontal scanner, and readout circuit. The operation mode can be selected from between binary mode and multi-bit mode.

Atomistic characterization of SAM coatings as gate insulators in Si-based FET devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gala, F.; Zollo, G.

2014-06-19

Many nano-material systems are currently under consideration as possible candidates for gate dielectric insulators in both metal-oxide-semiconductor (MOSFET) and organic (OFET) field-effect transistors. In this contribution, the possibility of employing self-assembled monolayers (SAMs) of hydroxylated octadecyltrichlorosilane (OTS) chains on a (111) Si substrate as gate dielectrics is discussed; in particular ab initio theoretical simulations have been employed to study the structural properties, work function modifications, and the insulating properties of OTS thin film coatings on Si substrates.

Atomistic characterization of SAM coatings as gate insulators in Si-based FET devices

NASA Astrophysics Data System (ADS)

Gala, F.; Zollo, G.

2014-06-01

Many nano-material systems are currently under consideration as possible candidates for gate dielectric insulators in both metal-oxide-semiconductor (MOSFET) and organic (OFET) field-effect transistors. In this contribution, the possibility of employing self-assembled monolayers (SAMs) of hydroxylated octadecyltrichlorosilane (OTS) chains on a (111) Si substrate as gate dielectrics is discussed; in particular ab initio theoretical simulations have been employed to study the structural properties, work function modifications, and the insulating properties of OTS thin film coatings on Si substrates.

Development of optimized detector/spectrophotometer technology for low background space astronomy missions

NASA Technical Reports Server (NTRS)

Jones, B.

1985-01-01

This program was directed towards a better understanding of some of the important factors in the performance of infrared detector arrays at low background conditions appropriate for space astronomy. The arrays were manufactured by Aerojet Electrosystems Corporation, Azusa. Two arrays, both bismuth doped silicon, were investigated: an AMCID 32x32 Engineering mosiac Si:Bi accumulation mode charge injection device detector array and a metal oxide semiconductor/field effect transistor (MOS-FET) switched array of 16x32 pixels.

Detection of the spin injection into silicon by broadband ferromagnetic resonance spectroscopy

NASA Astrophysics Data System (ADS)

Ohshima, Ryo; Dushenko, Sergey; Ando, Yuichiro; Weiler, Mathias; Klingler, Stefan; Huebl, Hans; Shinjo, Teruya; Goennenwein, Sebastian; Shiraishi, Masashi

Silicon (Si) based spintronics was eagerly studied to realize spin metal-oxide-semiconductor field-effect-transistors (MOSFETs) since it has long spin lifetime and gate tunability. The operation of n-type Si spin MOSFET was successfully demonstrated, however, their resistivity is still too low for practical applications and a systematic study of spin injection properties (such as spin lifetime, spin injection efficiency and so on) from the ferromagnet into the Si with different resistivity is awaited for further progress in Si spintronics. In this study, we show the spin injection by spin pumping technique in the NiFe(Py)/Si system. Broadband FMR measurement was carried out to see the enhancement of the Gilbert damping parameter with different resistivity of the Si channel. Additional damping indicated the successful spin injection by spin pumping and observed even for the Si channel with high resistivity, which is necessary for the gate operation of the device.

Surface dose measurement for helical tomotherapy.

PubMed

Snir, Jonatan A; Mosalaei, Homeira; Jordan, Kevin; Yartsev, Slav

2011-06-01

To compare the surface dose measurements made by different dosimeters for the helical tomotherapy (HT) plan in the case of the target close to the surface. Surface dose measurements in different points for the HT plan to deliver 2 Gy to the planning target volume (PTV) at 5 mm below the surface of the cylindrical phantom were performed by radiochromic films, single use metal oxide semiconductor field-effect transistor (MOSFET) dosimeters, silicon IVD QED diode, and optically stimulated luminescence (OSL) dosimeters. The measured doses by all dosimeters were within 12 +/- 8% difference of each other. Radiochromic films, EBT, and EBT2, provide high spatial resolution, although it is difficult to get accurate measurements of dose. Both the OSL and QED measured similar dose to that of the MOSFET detectors. The QED dosimeter is promising as a reusable on-line wireless dosimeter, while the OSL dosimeters are easier to use, require minimum setup time and are very precise.

Remote N2 plasma treatment to deposit ultrathin high-k dielectric as tunneling contact layer for single-layer MoS2 MOSFET

NASA Astrophysics Data System (ADS)

Qian, Qingkai; Zhang, Zhaofu; Hua, Mengyuan; Wei, Jin; Lei, Jiacheng; Chen, Kevin J.

2017-12-01

Remote N2 plasma treatment is explored as a surface functionalization technique to deposit ultrathin high-k dielectric on single-layer MoS2. The ultrathin dielectric is used as a tunneling contact layer, which also serves as an interfacial layer below the gate region for fabricating top-gate MoS2 metal-oxide-semiconductor field-effect transistors (MOSFETs). The fabricated devices exhibited small hysteresis and mobility as high as 14 cm2·V-1·s-1. The contact resistance was significantly reduced, which resulted in the increase of drain current from 20 to 56 µA/µm. The contact resistance reduction can be attributed to the alleviated metal-MoS2 interface reaction and the preserved conductivity of MoS2 below the source/drain metal contact.

Defect generation in electronic devices under plasma exposure: Plasma-induced damage

NASA Astrophysics Data System (ADS)

Eriguchi, Koji

2017-06-01

The increasing demand for higher performance of ULSI circuits requires aggressive shrinkage of device feature sizes in accordance with Moore’s law. Plasma processing plays an important role in achieving fine patterns with anisotropic features in metal-oxide-semiconductor field-effect transistors (MOSFETs). This article comprehensively addresses the negative aspect of plasma processing — plasma-induced damage (PID). PID naturally not only modifies the surface morphology of materials but also degrades the performance and reliability of MOSFETs as a result of defect generation in the materials. Three key mechanisms of PID, i.e., physical, electrical, and photon-irradiation interactions, are overviewed in terms of modeling, characterization techniques, and experimental evidence reported so far. In addition, some of the emerging topics — control of parameter variability in ULSI circuits caused by PID and recovery of PID — are discussed as future perspectives.

High-voltage, high-power, solid-state remote power controllers for aerospace applications

NASA Technical Reports Server (NTRS)

Sturman, J. C.

1985-01-01

Two general types of remote power controller (RPC) that combine the functions of a circuit breaker and a switch were developed for use in direct-current (dc) aerospace systems. Power-switching devices used in these designs are the relatively new gate-turnoff thyristor (GTO) and poweer metal-oxide-semiconductor field-effect transistors (MOSFET). The various RPC's can switch dc voltages to 1200 V and currents to 100 A. Seven different units were constructed and subjected to comprehensive laboratory and thermal vacuum testing. Two of these were dual units that switch both positive and negative voltages simultaneously. The RPC's using MOSFET's have slow turnon and turnoff times to limit voltage spiking from high di/dt. The GTO's have much faster transition times. All RPC's have programmable overload tripout and microsecond tripout for large overloads. The basic circuits developed can be used to build switchgear limited only by the ratings of the switching device used.

Extraction method of interfacial injected charges for SiC power MOSFETs

NASA Astrophysics Data System (ADS)

Wei, Jiaxing; Liu, Siyang; Li, Sheng; Song, Haiyang; Chen, Xin; Li, Ting; Fang, Jiong; Sun, Weifeng

2018-01-01

An improved novel extraction method which can characterize the injected charges along the gate oxide interface for silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. According to the different interface situations of the channel region and the junction FET (JFET) region, the gate capacitance versus gate voltage (Cg-Vg) curve of the device can be divided into three relatively independent parts, through which the locations and the types of the charges injected in to the oxide above the interface can be distinguished. Moreover, the densities of these charges can also be calculated by the amplitudes of the shifts in the Cg-Vg curve. The correctness of this method is proved by TCAD simulations. Moreover, experiments on devices stressed by unclamped-inductive-switching (UIS) stress and negative bias temperature stress (NBTS) are performed to verify the validity of this method.

Silicon device performance measurements to support temperature range enhancement

NASA Technical Reports Server (NTRS)

Bromstead, James; Weir, Bennett; Johnson, R. Wayne; Askew, Ray

1992-01-01

Testing of the metal oxide semiconductor (MOS)-controlled thyristor (MCT) has uncovered a failure mechanism at elevated temperature. The failure appears to be due to breakdown of the gate oxide. Further testing is underway to verify the failure mode. Higher current level inverters were built to demonstrate 200 C operation of the N-MOSFET's and insulated-gate-bipolar transistors (IGBT's) and for life testing. One MOSFET failed early in testing. The origin of this failure is being studied. No IGBT's have failed. A prototype 28-to-42 V converter was built and is being tested at room temperature. The control loop is being finalized. Temperature stable, high value (10 micro-F) capacitors appear to be the limiting factor in the design at this time. In this application, the efficiency will be lower for the IGBT version due to the large V sub(cesat) (3.5-4 V) compared to the input voltage of 28 V. The MOSFET version should have higher efficiency; however, the MOSFET does not appear to be as robust at 200 C. Both versions are built for comparison.

Characterization of a Common-Gate Amplifier Using Ferroelectric Transistors

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; MacLeod, Todd C.; Ho, Fat D.

2011-01-01

In this paper, the empirical data collected through experiments performed using a FeFET in the common-gate amplifier circuit is presented. The FeFET common-gate amplifier was characterized by varying all parameters in the circuit, such as load resistance, biasing of the transistor, and input voltages. Due to the polarization of the ferroelectric layer, the particular behavior of the FeFET common-gate amplifier presents interesting results. Furthermore, the differences between a FeFET common-gate amplifier and a MOSFET common-gate amplifier are examined.

Contact Metallization and Packaging Technology Development for SiC Bipolar Junction Transistors, PiN Diodes, and Schottky Diodes Designed for Long-Term Operations at 350degreeC

DTIC Science & Technology

2006-05-01

switches that are used in power conditioning systems. Silicon carbide diodes are now available commercially, and transistors (JEFETs, MOSFETs, IGBTs ...in UHP Ar for 60s in a rapid thermal annealing (RTA) furnace to achieve a low contact resistance. Following the RTA step, photolithography was...with 20μm Au is shown in Figure 3-4. The brazing process was performed with an SST 3150 high vacuum furnace . The 3150 utilizes an oil-free roughing

Buffer Layer Doping Concentration Measurement Using VT-VSUB Characteristics of GaN HEMT with p-GaN Substrate Layer

NASA Astrophysics Data System (ADS)

Hu, Cheng-Yu; Nakatani, Katsutoshi; Kawai, Hiroji; Ao, Jin-Ping; Ohno, Yasuo

To improve the high voltage performance of AlGaN/GaN heterojunction field effect transistors (HFETs), we have fabricated AlGaN/GaN HFETs with p-GaN epi-layer on sapphire substrate with an ohmic contact to the p-GaN (p-sub HFET). Substrate bias dependent threshold voltage variation (VT-VSUB) was used to directly determine the doping concentration profile in the buffer layer. This VT-VSUB method was developed from Si MOSFET. For HFETs, the insulator is formed by epitaxially grown and heterogeneous semiconductor layer while for Si MOSFETs the insulator is amorphous SiO2. Except that HFETs have higher channel mobility due to the epitaxial insulator/semiconductor interface, HFETs and Si MOSFETs are basically the same in the respect of device physics. Based on these considerations, the feasibility of this VT-VSUB method for AlGaN/GaN HFETs was discussed. In the end, the buffer layer doping concentration was measured to be 2 × 1017cm-3, p-type, which is well consistent with the Mg concentration obtained from secondary ion mass spectroscopy (SIMS) measurement.

Accurate evaluation of fast threshold voltage shift for SiC MOS devices under various gate bias stress conditions

NASA Astrophysics Data System (ADS)

Sometani, Mitsuru; Okamoto, Mitsuo; Hatakeyama, Tetsuo; Iwahashi, Yohei; Hayashi, Mariko; Okamoto, Dai; Yano, Hiroshi; Harada, Shinsuke; Yonezawa, Yoshiyuki; Okumura, Hajime

2018-04-01

We investigated methods of measuring the threshold voltage (V th) shift of 4H-silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) under positive DC, negative DC, and AC gate bias stresses. A fast measurement method for V th shift under both positive and negative DC stresses revealed the existence of an extremely large V th shift in the short-stress-time region. We then examined the effect of fast V th shifts on drain current (I d) changes within a pulse under AC operation. The fast V th shifts were suppressed by nitridation. However, the I d change within one pulse occurred even in commercially available SiC MOSFETs. The correlation between I d changes within one pulse and V th shifts measured by a conventional method is weak. Thus, a fast and in situ measurement method is indispensable for the accurate evaluation of I d changes under AC operation.

Solid state safety jumper cables

DOEpatents

Kronberg, James W.

1993-01-01

Solid state jumper cables for connecting two batteries in parallel, having two bridge rectifiers for developing a reference voltage, a four-input decoder for determining which terminals are to be connected based on a comparison of the voltage at each of the four terminals to the reference voltage, and a pair of relays for effecting the correct connection depending on the determination of the decoder. No connection will be made unless only one terminal of each battery has a higher voltage than the reference voltage, indicating "positive" terminals, and one has a lower voltage than the reference voltage, indicating "negative" terminals, and that, therefore, the two high voltage terminals may be connected and the two lower voltage terminals may be connected. Current flows once the appropriate relay device is closed. The relay device is preferably a MOSFET (metal oxide semiconductor field effect transistor) combined with a series array of photodiodes that develop MOSFET gate-closing potential when the decoder output causes an LED to light.

Solid state safety jumper cables

DOEpatents

Kronberg, J.W.

1993-02-23

Solid state jumper cables for connecting two batteries in parallel, having two bridge rectifiers for developing a reference voltage, a four-input decoder for determining which terminals are to be connected based on a comparison of the voltage at each of the four terminals to the reference voltage, and a pair of relays for effecting the correct connection depending on the determination of the decoder. No connection will be made unless only one terminal of each battery has a higher voltage than the reference voltage, indicating positive'' terminals, and one has a lower voltage than the reference voltage, indicating negative'' terminals, and that, therefore, the two high voltage terminals may be connected and the two lower voltage terminals may be connected. Current flows once the appropriate relay device is closed. The relay device is preferably a MOSFET (metal oxide semiconductor field effect transistor) combined with a series array of photodiodes that develop MOSFET gate-closing potential when the decoder output causes an LED to light.

Real-time photoelectron spectroscopy study of the oxidation reaction kinetics on p-type and n-type Si (001) surfaces

NASA Astrophysics Data System (ADS)

Yu, Zhou

Silicon oxides thermally grown on Si surface are the core gate materials of metal-oxide-semiconductor field effect transistor (MOSFET). This thin oxide layer insulates the gate terminals and the transistors substrate which make MOSFET has certain advantages over those conventional junctions, such as field-effect transistor (FET) and junction field effect transistor (JFET). With an oxide insulating layer, MOSFET is able to sustain higher input impedance and the corresponding gate leakage current can be minimized. Today, though the oxidation process on Si substrate is popular in industry, there are still some uncertainties about its oxidation kinetics. On a path to clarify and modeling the oxidation kinetics, a study of initial oxidation kinetics on Si (001) surface has attracted attentions due to having a relatively low surface electron density and few adsorption channels compared with other Si surface direction. Based on previous studies, there are two oxidation models of Si (001) that extensively accepted, which are dual oxide species mode and autocatalytic reaction model. These models suggest the oxidation kinetics on Si (001) mainly relies on the metastable oxygen atom on the surface and the kinetic is temperature dependent. Professor Yuji Takakuwa's group, Surface Physics laboratory, Institute of Multidisciplinary Research for Advanced Materials, Tohoku University, observed surface strain existed during the oxidation kinetics on Si (001) and this is the first time that strain was discovered during Si oxidation. Therefore, it is necessary to explain where the strain comes from since none of previous model research included the surface strain (defects generation) into considerations. Moreover, recent developing of complementary metal-oxide-semiconductor (CMOS) requires a simultaneous oxidation process on p- and n-type Si substrate. However, none of those previous models included the dopant factor into the oxidation kinetic modeling. All of these points that further work is necessary to update and modify the traditional Si (001) oxidation models that had been accepted for several decades. To update and complement the Si (001) oxidation kinetics, an understanding of the temperature and dopant factor during initial oxidation kinetics on Si (001) is our first step. In this study, real-time photoelectron spectroscopy is applied to characterize the oxidized (001) surface and surface information was collected by ultraviolet photoelectron spectroscopy technique. By analyzing parameters such as O 2p spectra uptake, change of work function and the surface state in respect of p- and n- type Si (001) substrate under different temperature, the oxygen adsorption structure and the dopant factor can be determined. In this study, experiments with temperature gradients on p-type Si (001) were conducted and this aims to clarify the temperature dependent characteristic of Si (001) surface oxidation. A comparison of the O 2p uptake, change of work function and surface state between p-and n-type Si (001) is made under a normal temperature and these provides with the data to explain how the dopant factor impacts the oxygen adsorption structure on the surface. In the future, the study of the oxygen adsorption structure will lead to an explanation of the surface strain that discovered; therefore, fundamental of the initial oxidation on Si (001) would be updated and complemented, which would contribute to the future gate technology in MOSFET and CMOS.

Drain Current Modulation of a Single Drain MOSFET by Lorentz Force for Magnetic Sensing Application.

PubMed

Chatterjee, Prasenjit; Chow, Hwang-Cherng; Feng, Wu-Shiung

2016-08-30

This paper reports a detailed analysis of the drain current modulation of a single-drain normal-gate n channel metal-oxide semiconductor field effect transistor (n-MOSFET) under an on-chip magnetic field. A single-drain n-MOSFET has been fabricated and placed in the center of a square-shaped metal loop which generates the on-chip magnetic field. The proposed device designed is much smaller in size with respect to the metal loop, which ensures that the generated magnetic field is approximately uniform. The change of drain current and change of bulk current per micron device width has been measured. The result shows that the difference drain current is about 145 µA for the maximum applied magnetic field. Such changes occur from the applied Lorentz force to push out the carriers from the channel. Based on the drain current difference, the change in effective mobility has been detected up to 4.227%. Furthermore, a detailed investigation reveals that the device behavior is quite different in subthreshold and saturation region. A change of 50.24 µA bulk current has also been measured. Finally, the device has been verified for use as a magnetic sensor with sensitivity 4.084% (29.6 T(-1)), which is very effective as compared to other previously reported works for a single device.

Efficient G(sup 4)FET-Based Logic Circuits

NASA Technical Reports Server (NTRS)

Vatan, Farrokh

2008-01-01

A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

Ultra-low output impedance RF power amplifier for parallel excitation.

PubMed

Chu, Xu; Yang, Xing; Liu, Yunfeng; Sabate, Juan; Zhu, Yudong

2009-04-01

Inductive coupling between coil elements of a transmit array is one of the key challenges faced by parallel RF transmission. An ultra-low output impedance RF power amplifier (PA) concept was introduced to address this challenge. In an example implementation, an output-matching network was designed to transform the drain-source impedance of the metallic oxide semiconductor field effect transistor (MOSFET) into a very low value for suppressing interelement coupling effect, and meanwhile, to match the input impedance of the coil to the optimum load of the MOSFET for maximizing the available output power. Two prototype amplifiers with 500-W output rating were developed accordingly, and were further evaluated with a transmit array in phantom experiments. Compared to the conventional 50-Omega sources, the new approach exhibited considerable effectiveness suppressing the effects of interelement coupling. The experiments further indicated that the isolation performance was comparable to that achieved by optimized overlap decoupling. The new approach, benefiting from a distinctive current-source characteristic, also exhibited a superior robustness against load variation. Feasibility of the new approach in high-field MR was demonstrated on a 3T clinical scanner.

Monte Carlo simulation of MOSFET dosimeter for electron backscatter using the GEANT4 code.

PubMed

Chow, James C L; Leung, Michael K K

2008-06-01

The aim of this study is to investigate the influence of the body of the metal-oxide-semiconductor field effect transistor (MOSFET) dosimeter in measuring the electron backscatter from lead. The electron backscatter factor (EBF), which is defined as the ratio of dose at the tissue-lead interface to the dose at the same point without the presence of backscatter, was calculated by the Monte Carlo simulation using the GEANT4 code. Electron beams with energies of 4, 6, 9, and 12 MeV were used in the simulation. It was found that in the presence of the MOSFET body, the EBFs were underestimated by about 2%-0.9% for electron beam energies of 4-12 MeV, respectively. The trend of the decrease of EBF with an increase of electron energy can be explained by the small MOSFET dosimeter, mainly made of epoxy and silicon, not only attenuated the electron fluence of the electron beam from upstream, but also the electron backscatter generated by the lead underneath the dosimeter. However, this variation of the EBF underestimation is within the same order of the statistical uncertainties as the Monte Carlo simulations, which ranged from 1.3% to 0.8% for the electron energies of 4-12 MeV, due to the small dosimetric volume. Such small EBF deviation is therefore insignificant when the uncertainty of the Monte Carlo simulation is taken into account. Corresponding measurements were carried out and uncertainties compared to Monte Carlo results were within +/- 2%. Spectra of energy deposited by the backscattered electrons in dosimetric volumes with and without the lead and MOSFET were determined by Monte Carlo simulations. It was found that in both cases, when the MOSFET body is either present or absent in the simulation, deviations of electron energy spectra with and without the lead decrease with an increase of the electron beam energy. Moreover, the softer spectrum of the backscattered electron when lead is present can result in a reduction of the MOSFET response due to stronger recombination in the SiO2 gate. It is concluded that the MOSFET dosimeter performed well for measuring the electron backscatter from lead using electron beams. The uncertainty of EBF determined by comparing the results of Monte Carlo simulations and measurements is well within the accuracy of the MOSFET dosimeter (< +/- 4.2%) provided by the manufacturer.

Gate voltage dependent 1/f noise variance model based on physical noise generation mechanisms in n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Arai, Yukiko; Aoki, Hitoshi; Abe, Fumitaka; Todoroki, Shunichiro; Khatami, Ramin; Kazumi, Masaki; Totsuka, Takuya; Wang, Taifeng; Kobayashi, Haruo

2015-04-01

1/f noise is one of the most important characteristics for designing analog/RF circuits including operational amplifiers and oscillators. We have analyzed and developed a novel 1/f noise model in the strong inversion, saturation, and sub-threshold regions based on SPICE2 type model used in any public metal-oxide-semiconductor field-effect transistor (MOSFET) models developed by the University of California, Berkeley. Our model contains two noise generation mechanisms that are mobility and interface trap number fluctuations. Noise variability dependent on gate voltage is also newly implemented in our model. The proposed model has been implemented in BSIM4 model of a SPICE3 compatible circuit simulator. Parameters of the proposed model are extracted with 1/f noise measurements for simulation verifications. The simulation results show excellent agreements between measurement and simulations.

III-V heterostructure tunnel field-effect transistor.

PubMed

Convertino, C; Zota, C B; Schmid, H; Ionescu, A M; Moselund, K E

2018-07-04

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III-V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

III–V heterostructure tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Convertino, C.; Zota, C. B.; Schmid, H.; Ionescu, A. M.; Moselund, K. E.

2018-07-01

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III–V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

2-D Modeling of Nanoscale MOSFETs: Non-Equilibrium Green's Function Approach

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Electron-electron interaction is treated within Hartree approximation by solving NEGF and Poisson equations self-consistently. For the calculations presented here, parallelization is performed by distributing the solution of NEGF equations to various processors, energy wise. We present simulation of the "benchmark" MIT 25nm and 90nm MOSFETs and compare our results to those from the drift-diffusion simulator and the quantum-corrected results available. In the 25nm MOSFET, the channel length is less than ten times the electron wavelength, and the electron scattering time is comparable to its transit time. Our main results are: (1) Simulated drain subthreshold current characteristics are shown, where the potential profiles are calculated self-consistently by the corresponding simulation methods. The current predicted by our quantum simulation has smaller subthreshold slope of the Vg dependence which results in higher threshold voltage. (2) When gate oxide thickness is less than 2 nm, gate oxide leakage is a primary factor which determines off-current of a MOSFET (3) Using our 2-D NEGF simulator, we found several ways to drastically decrease oxide leakage current without compromising drive current. (4) Quantum mechanically calculated electron density is much smaller than the background doping density in the poly silicon gate region near oxide interface. This creates an additional effective gate voltage. Different ways to. include this effect approximately will be discussed.

A novel double gate metal source/drain Schottky MOSFET as an inverter

NASA Astrophysics Data System (ADS)

Loan, Sajad A.; Kumar, Sunil; Alamoud, Abdulrahman M.

2016-03-01

In this work, we propose and simulate a novel structure of a double gate metal source/drain (MSD) Schottky MOSFET. The novelty of the proposed device is that it realizes a complete CMOS inverter action, which is actually being realized by the combination of two n and p type MOS transistors in the conventional CMOS technology. Therefore, the use of this device will significantly reduce the transistor count in implementing combinational and sequential circuits. Further, there is a significant reduction in the number of junctions and regions in the proposed device in comparison to the conventional CMOS inverter. Therefore, the proposed device is compact and can consume less power. The proposed device has been named as Sajad-Sunil-Schottky (SSS) device. The mixed mode circuit analysis of the proposed SSS device has shown that a CMOS inverter action with high logic level (VOH) and low logic level (VOL) as ∼VDD and ∼ground respectively. A two dimensional calibrated simulation study using the experimental data has revealed that the proposed SSS device in n and p type modes have subthreshold slopes (S) of 130 mV/decade and 85 mV/decade respectively and have reasonable high ION and ION/IOFF ratio's. Furthermore, it has been proved that such a device action cannot be realised by folding the conventional doped n and p MOS transistors.

Ultrashort channel silicon nanowire transistors with nickel silicide source/drain contacts.

PubMed

Tang, Wei; Dayeh, Shadi A; Picraux, S Tom; Huang, Jian Yu; Tu, King-Ning

2012-08-08

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Novel technique of source and drain engineering for dual-material double-gate (DMDG) SOI MOSFETS

NASA Astrophysics Data System (ADS)

Yadav, Himanshu; Malviya, Abhishek Kumar; Chauhan, R. K.

2018-04-01

The dual-metal dual-gate (DMDG) SOI has been used with Dual Sided Source and Drain Engineered 50nm SOI MOSFET with various high-k gate oxide. It has been scrutinized in this work to enhance its electrical performance. The proposed structure is designed by creating Dual Sided Source and Drain Modification and its characteristics are evaluated on ATLAS device simulator. The consequence of this dual sided assorted doping on source and drain side of the DMDG transistor has better leakage current immunity and heightened ION current with higher ION to IOFF Ratio. Which thereby vesting the proposed device appropriate for low power digital applications.

Dual-mode MOS SOI nanoscale transistor serving as a building block for optical communication between blocks

NASA Astrophysics Data System (ADS)

Bendayan, Michael; Sabo, Roi; Zolberg, Roee; Mandelbaum, Yaakov; Chelly, Avraham; Karsenty, Avi

2017-02-01

We developed a new type of silicon MOSFET Quantum Well transistor, coupling both electronic and optical properties which should overcome the indirect silicon bandgap constraint, and serve as a future light emitting device in the range 0.8-2μm, as part of a new building block in integrated circuits allowing ultra-high speed processors. Such Quantum Well structure enables discrete energy levels for light recombination. Model and simulations of both optical and electric properties are presented pointing out the influence of the channel thickness and the drain voltage on the optical emission spectrum.

Comparative Study of Fault Diagnostic Methods in Voltage Source Inverter Fed Three Phase Induction Motor Drive

NASA Astrophysics Data System (ADS)

Dhumale, R. B.; Lokhande, S. D.

2017-05-01

Three phase Pulse Width Modulation inverter plays vital role in industrial applications. The performance of inverter demeans as several types of faults take place in it. The widely used switching devices in power electronics are Insulated Gate Bipolar Transistors (IGBTs) and Metal Oxide Field Effect Transistors (MOSFET). The IGBTs faults are broadly classified as base or collector open circuit fault, misfiring fault and short circuit fault. To develop consistency and performance of inverter, knowledge of fault mode is extremely important. This paper presents the comparative study of IGBTs fault diagnosis. Experimental set up is implemented for data acquisition under various faulty and healthy conditions. Recent methods are executed using MATLAB-Simulink and compared using key parameters like average accuracy, fault detection time, implementation efforts, threshold dependency, and detection parameter, resistivity against noise and load dependency.

Surface roughness scattering of electrons in bulk mosfets

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zuverink, Amanda Renee

2015-11-01

Surface-roughness scattering of electrons at the Si-SiO 2 interface is a very important consideration when analyzing Si metal-oxide-semiconductor field-effect transistors (MOSFETs). Scattering reduces the mobility of the electrons and degrades the device performance. 250-nm and 50-nm bulk MOSFETs were simulated with varying device parameters and mesh sizes in order to compare the effects of surface-roughness scattering in multiple devices. The simulation framework includes the ensemble Monte Carlo method used to solve the Boltzmann transport equation coupled with a successive over-relaxation method used to solve the two-dimensional Poisson's equation. Four methods for simulating the surface-roughness scattering of electrons were implemented onmore » both devices and compared: the constant specularity parameter, the momentum-dependent specularity parameter, and the real-space-roughness method with both uniform and varying electric fields. The specularity parameter is the probability of an electron scattering speculariy from a rough surface. It can be chosen as a constant, characterizing partially diffuse scattering of all electrons from the surface the same way, or it can be momentum dependent, where the size of rms roughness and the normal component of the electron wave number determine the probability of electron-momentum randomization. The real-space rough surface method uses the rms roughness height and correlation length of an actual MOSFET to simulate a rough interface. Due to their charge, electrons scatter from the electric field and not directly from the surface. If the electric field is kept uniform, the electrons do not perceive the roughness and scatter as if from a at surface. However, if the field is allowed to vary, the electrons scatter from the varying electric field as they would in a MOSFET. These methods were implemented for both the 50-nm and 250-nm MOSFETs, and using the rms roughness heights and correlation lengths for real devices. The current-voltage and mobility-electric field curves were plotted for each method on the two devices and compared. The conclusion is that the specularity-parameter methods are valuable as simple models for relatively smooth interfaces. However, they have limitations, as they cannot accurately describe the drastic reduction in the current and the electron mobility that occur in MOSFETs with very rough Si-SiO 2 interfaces.« less

Suppression of threshold voltage variability in MOSFETs by adjustment of ion implantation parameters

NASA Astrophysics Data System (ADS)

Park, Jae Hyun; Chang, Tae-sig; Kim, Minsuk; Woo, Sola; Kim, Sangsig

2018-01-01

In this study, we investigate threshold voltage (VTH) variability of metal-oxide-semiconductor field-effect transistors induced by random dopant fluctuation (RDF). Our simulation work demonstrates not only the influence of the implantation parameters such as its dose, tilt angle, energy, and rotation angle on the RDF-induced VTH variability, but also the solution to reduce the effect of this variability. By adjusting the ion implantation parameters, the 3σ (VTH) is reduced from 43.8 mV to 28.9 mV. This 34% reduction is significant, considering that our technique is very cost effective and facilitates easy fabrication, increasing availability.

Establishing a standard calibration methodology for MOSFET detectors in computed tomography dosimetry.

PubMed

Brady, S L; Kaufman, R A

2012-06-01

The use of metal-oxide-semiconductor field-effect transistor (MOSFET) detectors for patient dosimetry has increased by ~25% since 2005. Despite this increase, no standard calibration methodology has been identified nor calibration uncertainty quantified for the use of MOSFET dosimetry in CT. This work compares three MOSFET calibration methodologies proposed in the literature, and additionally investigates questions relating to optimal time for signal equilibration and exposure levels for maximum calibration precision. The calibration methodologies tested were (1) free in-air (FIA) with radiographic x-ray tube, (2) FIA with stationary CT x-ray tube, and (3) within scatter phantom with rotational CT x-ray tube. Each calibration was performed at absorbed dose levels of 10, 23, and 35 mGy. Times of 0 min or 5 min were investigated for signal equilibration before or after signal read out. Calibration precision was measured to be better than 5%-7%, 3%-5%, and 2%-4% for the 10, 23, and 35 mGy respective dose levels, and independent of calibration methodology. No correlation was demonstrated for precision and signal equilibration time when allowing 5 min before or after signal read out. Differences in average calibration coefficients were demonstrated between the FIA with CT calibration methodology 26.7 ± 1.1 mV cGy(-1) versus the CT scatter phantom 29.2 ± 1.0 mV cGy(-1) and FIA with x-ray 29.9 ± 1.1 mV cGy(-1) methodologies. A decrease in MOSFET sensitivity was seen at an average change in read out voltage of ~3000 mV. The best measured calibration precision was obtained by exposing the MOSFET detectors to 23 mGy. No signal equilibration time is necessary to improve calibration precision. A significant difference between calibration outcomes was demonstrated for FIA with CT compared to the other two methodologies. If the FIA with a CT calibration methodology was used to create calibration coefficients for the eventual use for phantom dosimetry, a measurement error ~12% will be reflected in the dosimetry results. The calibration process must emulate the eventual CT dosimetry process by matching or excluding scatter when calibrating the MOSFETs. Finally, the authors recommend that the MOSFETs are energy calibrated approximately every 2500-3000 mV. © 2012 American Association of Physicists in Medicine.

G4-FETs as Universal and Programmable Logic Gates

NASA Technical Reports Server (NTRS)

Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin

2007-01-01

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Optimising operational amplifiers by evolutionary algorithms and gm/Id method

NASA Astrophysics Data System (ADS)

Tlelo-Cuautle, E.; Sanabria-Borbon, A. C.

2016-10-01

The evolutionary algorithm called non-dominated sorting genetic algorithm (NSGA-II) is applied herein in the optimisation of operational transconductance amplifiers. NSGA-II is accelerated by applying the gm/Id method to estimate reduced search spaces associated to widths (W) and lengths (L) of the metal-oxide-semiconductor field-effect-transistor (MOSFETs), and to guarantee their appropriate bias levels conditions. In addition, we introduce an integer encoding for the W/L sizes of the MOSFETs to avoid a post-processing step for rounding-off their values to be multiples of the integrated circuit fabrication technology. Finally, from the feasible solutions generated by NSGA-II, we introduce a second optimisation stage to guarantee that the final feasible W/L sizes solutions support process, voltage and temperature (PVT) variations. The optimisation results lead us to conclude that the gm/Id method and integer encoding are quite useful to accelerate the convergence of the evolutionary algorithm NSGA-II, while the second optimisation stage guarantees robustness of the feasible solutions to PVT variations.

Development of a unit cell for a Ge:Ga detector array

NASA Technical Reports Server (NTRS)

1988-01-01

Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.

A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor.

PubMed

Lee, Jieun; Jang, Jaeman; Choi, Bongsik; Yoon, Jinsu; Kim, Jee-Yeon; Choi, Yang-Kyu; Kim, Dong Myong; Kim, Dae Hwan; Choi, Sung-Jin

2015-07-21

This study demonstrates a hybrid biosensor comprised of a silicon nanowire (SiNW) integrated with an amplifier MOSFET to improve the current response of field-effect-transistor (FET)-based biosensors. The hybrid biosensor is fabricated using conventional CMOS technology, which has the potential advantage of high density and low noise performance. The biosensor shows a current response of 5.74 decades per pH for pH detection, which is 2.5 × 10(5) times larger than that of a single SiNW sensor. In addition, we demonstrate charged polymer detection using the biosensor, with a high current change of 4.5 × 10(5) with a 500 nM concentration of poly(allylamine hydrochloride). In addition, we demonstrate a wide dynamic range can be obtained by adjusting the liquid gate voltage. We expect that this biosensor will be advantageous and practical for biosensor applications which requires lower noise, high speed, and high density.

MOSFET assessment of radiation dose delivered to mice using the Small Animal Radiation Research Platform (SARRP).

PubMed

Ngwa, Wilfred; Korideck, Houari; Chin, Lee M; Makrigiorgos, G Mike; Berbeco, Ross I

2011-12-01

The Small Animal Radiation Research Platform (SARRP) is a novel isocentric irradiation system that enables state-of-the-art image-guided radiotherapy research to be performed with animal models. This paper reports the results obtained from investigations assessing the radiation dose delivered by the SARRP to different anatomical target volumes in mice. Surgically implanted metal oxide semiconductor field effect transistors (MOSFET) dosimeters were employed for the dose assessment. The results reveal differences between the calculated and measured dose of -3.5 to 0.5%, -5.2 to -0.7%, -3.9 to 0.5%, -5.9 to 2.5%, -5.5 to 0.5%, and -4.3 to 0% for the left kidney, liver, pancreas, prostate, left lung, and brain, respectively. Overall, the findings show less than 6% difference between the delivered and calculated dose, without tissue heterogeneity corrections. These results provide a useful assessment of the need for tissue heterogeneity corrections in SARRP dose calculations for clinically relevant tumor model sites.

A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor

PubMed Central

Lee, Jieun; Jang, Jaeman; Choi, Bongsik; Yoon, Jinsu; Kim, Jee-Yeon; Choi, Yang-Kyu; Myong Kim, Dong; Hwan Kim, Dae; Choi, Sung-Jin

2015-01-01

This study demonstrates a hybrid biosensor comprised of a silicon nanowire (SiNW) integrated with an amplifier MOSFET to improve the current response of field-effect-transistor (FET)-based biosensors. The hybrid biosensor is fabricated using conventional CMOS technology, which has the potential advantage of high density and low noise performance. The biosensor shows a current response of 5.74 decades per pH for pH detection, which is 2.5 × 105 times larger than that of a single SiNW sensor. In addition, we demonstrate charged polymer detection using the biosensor, with a high current change of 4.5 × 105 with a 500 nM concentration of poly(allylamine hydrochloride). In addition, we demonstrate a wide dynamic range can be obtained by adjusting the liquid gate voltage. We expect that this biosensor will be advantageous and practical for biosensor applications which requires lower noise, high speed, and high density. PMID:26197105

Simulation of hole-mobility in doped relaxed and strained Ge layers

NASA Astrophysics Data System (ADS)

Watling, Jeremy R.; Riddet, Craig; Chan, Morgan Kah H.; Asenov, Asen

2010-11-01

As silicon based metal-oxide-semiconductor field-effect transistors (MOSFETs) are reaching the limits of their performance with scaling, alternative channel materials are being considered to maintain performance in future complementary metal-oxide semiconductor technology generations. Thus there is renewed interest in employing Ge as a channel material in p-MOSFETs, due to the significant improvement in hole mobility as compared to Si. Here we employ full-band Monte Carlo to study hole transport properties in Ge. We present mobility and velocity-field characteristics for different transport directions in p-doped relaxed and strained Ge layers. The simulations are based on a method for over-coming the potentially large dynamic range of scattering rates, which results from the long-range nature of the unscreened Coulombic interaction. Our model for ionized impurity scattering includes the affects of dynamic Lindhard screening, coupled with phase-shift, and multi-ion corrections along with plasmon scattering. We show that all these effects play a role in determining the hole carrier transport in doped Ge layers and cannot be neglected.

Direct observation of inversion capacitance in p-type diamond MOS capacitors with an electron injection layer

NASA Astrophysics Data System (ADS)

Matsumoto, Tsubasa; Kato, Hiromitsu; Makino, Toshiharu; Ogura, Masahiko; Takeuchi, Daisuke; Yamasaki, Satoshi; Imura, Masataka; Ueda, Akihiro; Inokuma, Takao; Tokuda, Norio

2018-04-01

The electrical properties of Al2O3/p-type diamond (111) MOS capacitors were studied with the goal of furthering diamond-based semiconductor research. To confirm the formation of an inversion layer in the p-type diamond body, an n-type layer for use as a minority carrier injection layer was selectively deposited onto p-type diamond. To form the diamond MOS capacitors, Al2O3 was deposited onto OH-terminated diamond using atomic layer deposition. The MOS capacitor showed clear inversion capacitance at 10 Hz. The minority carrier injection from the n-type layer reached the inversion n-channel diamond MOS field-effect transistor (MOSFET). Using the high-low frequency capacitance method, the interface state density, D it, within an energy range of 0.1-0.5 eV from the valence band edge energy, E v, was estimated at (4-9) × 1012 cm-2 eV-1. However, the high D it near E v remains an obstacle to improving the field effect mobility for the inversion p-channel diamond MOSFET.

Carbon nanotube transistor based high-frequency electronics

NASA Astrophysics Data System (ADS)

Schroter, Michael

At the nanoscale carbon nanotubes (CNTs) have higher carrier mobility and carrier velocity than most incumbent semiconductors. Thus CNT based field-effect transistors (FETs) are being considered as strong candidates for replacing existing MOSFETs in digital applications. In addition, the predicted high intrinsic transit frequency and the more recent finding of ways to achieve highly linear transfer characteristics have inspired investigations on analog high-frequency (HF) applications. High linearity is extremely valuable for an energy efficient usage of the frequency spectrum, particularly in mobile communications. Compared to digital applications, the much more relaxed constraints for CNT placement and lithography combined with already achieved operating frequencies of at least 10 GHz for fabricated devices make an early entry in the low GHz HF market more feasible than in large-scale digital circuits. Such a market entry would be extremely beneficial for funding the development of production CNTFET based process technology. This talk will provide an overview on the present status and feasibility of HF CNTFET technology will be given from an engineering point of view, including device modeling, experimental results, and existing roadblocks. Carbon nanotube transistor based high-frequency electronics.

Extended design window of resonant plasma-wave transistor for terahertz emitter by considering degenerate carrier velocity model with Fermi-Dirac distribution

NASA Astrophysics Data System (ADS)

Park, Jong Yul; Kim, Sung-Ho; Rok Kim, Kyung

2015-06-01

In this work, we propose extended design window which is helpful to judge whether the plasma-wave transistor (PWT) operates as a resonant terahertz (THz) electromagnetic (EM) wave emitter. When metal-oxide-semiconductor field-effect transistor (MOSFET) is on strong inversion which is believed to be an operation regime of PWT THz emitter, Boltzmann statistics is no longer valid and degenerate Fermi-Dirac distribution should be considered. Based on degenerate carrier velocity model, we report the increased maximum channel length (Lmax) to 17 nm for strained silicon (s-Si) PWT with assuming μ = 500 cm2·V-1·s-1. As mobility is enhanced, it is possible to observe two emission spectrums [fundamental (N = 1) and third (N = 3) harmonics] in a specific operation range. Theoretically, increment of Lmax for enhanced μ is limited to near 35 nm by the Pauli’s principle in the case of s-Si PWT. This theoretical value of Lmax should be compromised by considering actual PWT operation voltage for gate oxide breakdown.

Multi-Dimensional Quantum Tunneling and Transport Using the Density-Gradient Model

NASA Technical Reports Server (NTRS)

Biegel, Bryan A.; Yu, Zhi-Ping; Ancona, Mario; Rafferty, Conor; Saini, Subhash (Technical Monitor)

1999-01-01

We show that quantum effects are likely to significantly degrade the performance of MOSFETs (metal oxide semiconductor field effect transistor) as these devices are scaled below 100 nm channel length and 2 nm oxide thickness over the next decade. A general and computationally efficient electronic device model including quantum effects would allow us to monitor and mitigate these effects. Full quantum models are too expensive in multi-dimensions. Using a general but efficient PDE solver called PROPHET, we implemented the density-gradient (DG) quantum correction to the industry-dominant classical drift-diffusion (DD) model. The DG model efficiently includes quantum carrier profile smoothing and tunneling in multi-dimensions and for any electronic device structure. We show that the DG model reduces DD model error from as much as 50% down to a few percent in comparison to thin oxide MOS capacitance measurements. We also show the first DG simulations of gate oxide tunneling and transverse current flow in ultra-scaled MOSFETs. The advantages of rapid model implementation using the PDE solver approach will be demonstrated, as well as the applicability of the DG model to any electronic device structure.

Post-focus expansion of ion beams for low fluence and large area MeV ion irradiation: Application to human brain tissue and electronics devices

NASA Astrophysics Data System (ADS)

Whitlow, Harry J.; Guibert, Edouard; Jeanneret, Patrick; Homsy, Alexandra; Roth, Joy; Krause, Sven; Roux, Adrien; Eggermann, Emmanuel; Stoppini, Luc

2017-08-01

Irradiation with ∼3 MeV proton fluences of 106-109 protons cm-2 have been applied to study the effects on human brain tissue corresponding to single-cell irradiation doses and doses received by electronic components in low-Earth orbit. The low fluence irradiations were carried out using a proton microbeam with the post-focus expansion of the beam; a method developed by the group of Breese [1]. It was found from electrophysiological measurements that the mean neuronal frequency of human brain tissue decreased to zero as the dose increased to 0-1050 Gy. Enhancement-mode MOSFET transistors exhibited a 10% reduction in threshold voltage for 2.7 MeV proton doses of 10 Gy while a NPN bipolar transistor required ∼800 Gy to reduce the hfe by 10%, which is consistent the expected values.

Trilayer TMDC Heterostructures for MOSFETs and Nanobiosensors

NASA Astrophysics Data System (ADS)

Datta, Kanak; Shadman, Abir; Rahman, Ehsanur; Khosru, Quazi D. M.

2017-02-01

Two dimensional materials such as transition metal dichalcogenides (TMDC) and their bi-layer/tri-layer heterostructures have become the focus of intense research and investigation in recent years due to their promising applications in electronics and optoelectronics. In this work, we have explored device level performance of trilayer TMDC heterostructure (MoS2/MX2/MoS2; M = Mo or, W and X = S or, Se) metal oxide semiconductor field effect transistors (MOSFETs) in the quantum ballistic regime. Our simulation shows that device `on' current can be improved by inserting a WS2 monolayer between two MoS2 monolayers. Application of biaxial tensile strain reveals a reduction in drain current which can be attributed to the lowering of carrier effective mass with increased tensile strain. In addition, it is found that gate underlap geometry improves electrostatic device performance by improving sub-threshold swing. However, increase in channel resistance reduces drain current. Besides exploring the prospect of these materials in device performance, novel trilayer TMDC heterostructure double gate field effect transistors (FETs) are proposed for sensing Nano biomolecules as well as for pH sensing. Bottom gate operation ensures these FETs operating beyond Nernst limit of 59 mV/pH. Simulation results found in this work reveal that scaling of bottom gate oxide results in better sensitivity while top oxide scaling exhibits an opposite trend. It is also found that, for identical operating conditions, proposed TMDC FET pH sensors show super-Nernst sensitivity indicating these materials as potential candidates in implementing such sensor. Besides pH sensing, all these materials show high sensitivity in the sub-threshold region as a channel material in nanobiosensor while MoS2/WS2/MoS2 FET shows the least sensitivity among them.

Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors

NASA Astrophysics Data System (ADS)

Saripalli, Vinay; Narayanan, Vijay; Datta, Suman

Novel medical applications involving embedded sensors, require ultra low energy dissipation with low-to-moderate performance (10kHz-100MHz) driving the conventional MOSFETs into sub-threshold operation regime. In this paper, we present an alternate ultra-low power computing architecture using Binary Decision Diagram based logic circuits implemented using Single Electron Transistors (SETs) operating in the Coulomb blockade regime with very low supply voltages. We evaluate the energy - performance tradeoff metrics of such BDD circuits using time domain Monte Carlo simulations and compare them with the energy-optimized CMOS logic circuits. Simulation results show that the proposed approach achieves better energy-delay characteristics than CMOS realizations.

Effective doses in children: association with common complex imaging techniques used during interventional radiology procedures.

PubMed

Lai, Priscilla; McNeil, Sarah M; Gordon, Christopher L; Connolly, Bairbre L

2014-12-01

The purpose of this study was to determine the range of effective doses associated with imaging techniques used during interventional radiology procedures on children. A pediatric phantom set (1, 5, and 10 years) coupled with high-sensitivity metal oxide semiconductor field effect transistor (MOSFET) dosimeters was used to calculate effective doses. Twenty MOSFETs were inserted into each phantom at radiosensitive organ locations. The phantoms were exposed to mock head, chest, and abdominal interventional radiology procedures performed with different geometries and magnifications. Fluoroscopy, digital subtraction angiography (DSA), and spin angiography were simulated on each phantom. Road mapping was conducted only on the 5-year-old phantom. International Commission on Radiological Protection publication 103 tissue weights were applied to the organ doses recorded with the MOSFETs to determine effective dose. For easy application to clinical cases, doses were normalized per minute of fluoroscopy and per 10 frames of DSA or spin angiography. Effective doses from DSA, angiography, and fluoroscopy were higher for younger ages because of magnification use and were largest for abdominal procedures. DSA of the head, chest, and abdomen (normalized per 10 frames) imparted doses 2-3 times as high as corresponding doses per minute of fluoroscopy while all other factors remained unchanged (age, projection, collimation, magnification). Three to five frames of DSA imparted an effective dose equal to doses from 1 minute of fluoroscopy. Doses from spin angiography were almost one-half the doses received from an equivalent number of frames of DSA. Patient effective doses during interventional procedures vary substantially depending on procedure type but tend to be higher because of magnification use in younger children and higher in the abdomen.

Simulation of charge transport in micro and nanoscale FETs with elements having different dielectric properties

NASA Astrophysics Data System (ADS)

Blokhin, A. M.; Kruglova, E. A.; Semisalov, B. V.

2018-03-01

The hydrodynamical model is used for description of the process of charge transport in semiconductors with a high rate of reliability. It is a set of nonlinear partial differential equations with small parameters and specific conditions at the boundaries of field effect transistors (FETs), which essentially complicates the process of finding its stationary solutions. To overcome these difficulties in the case of FETs with elements having different dielectric properties, a fast pseudospectral method has been developed. This method was used for advanced numerical simulation of charge transport in DG-MOSFET.

Electronic system for data acquisition to study radiation effects on operating MOSFET transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alves de Oliveira, Juliano; Assis de Melo, Marco Antônio; Guazzelli da Silveira, Marcilei A.

In this work we present the development of an acquisition system for characterizing transistors under X-ray radiation. The system is able to carry out the acquisition and to storage characteristic transistor curves. To test the acquisition system we have submitted polarized P channel MOS transistors under continuous 10-keV X-ray doses up to 1500 krad. The characterization system can operate in the saturation region or in the linear region in order to observe the behavior of the currents or voltages involved during the irradiation process. Initial tests consisted of placing the device under test (DUT) in front of the X-ray beammore » direction, while its drain current was constantly monitored through the prototype generated in this work, the data are stored continuously and system behavior was monitored during the test. In order to observe the behavior of the DUT during the radiation tests, we used an acquisition system that consists of an ultra-low consumption16-bit Texas Instruments MSP430 microprocessor. Preliminary results indicate linear behavior of the voltage as a function of the exposure time and fast recovery. These features may be favorable to use this device as a radiation dosimeter to monitor low rate X-ray.« less

In vivo dosimetry in intraoperative electron radiotherapy: microMOSFETs, radiochromic films and a general-purpose linac.

PubMed

López-Tarjuelo, Juan; Bouché-Babiloni, Ana; Morillo-Macías, Virginia; de Marco-Blancas, Noelia; Santos-Serra, Agustín; Quirós-Higueras, Juan David; Ferrer-Albiach, Carlos

2014-10-01

In vivo dosimetry is desirable for the verification, recording, and eventual correction of treatment in intraoperative electron radiotherapy (IOERT). Our aim is to share our experience of metal oxide semiconductor field-effect transistors (MOSFETs) and radiochromic films with patients undergoing IOERT using a general-purpose linac. We used MOSFETs inserted into sterile bronchus catheters and radiochromic films that were cut, digitized, and sterilized by means of gas plasma. In all, 59 measurements were taken from 27 patients involving 15 primary tumors (seven breast and eight non-breast tumors) and 12 relapses. Data were subjected to an outliers' analysis and classified according to their compatibility with the relevant doses. Associations were sought regarding the type of detector, breast and non-breast irradiation, and the radiation oncologist's assessment of the difficulty of detector placement. At the same time, 19 measurements were carried out at the tumor bed with both detectors. MOSFET measurements ([Formula: see text]  = 93.5 %, sD  =  6.5 %) were not significantly shifted from film measurements ([Formula: see text]  =  96.0 %, sD  =  5.5 %; p  =  0.109), and no associations were found (p = 0.526, p = 0.295,  and p = 0.501, respectively). As regards measurements performed at the tumor bed with both detectors, MOSFET measurements ([Formula: see text]  =  95.0 %, sD  =  5.4 % were not significantly shifted from film measurements ([Formula: see text]  =  96.4 %, sD  =  5.0 %; p  =  0.363). In vivo dosimetry can produce satisfactory results at every studied location with a general-purpose linac. Detector choice should depend on user factors, not on the detector performance itself. Surgical team collaboration is crucial to success.

Fabrication of a Silicon MOSFET Device with Bipolar Transistor Source,

DTIC Science & Technology

1980-07-01

NEGATIVE PHOTORESIST PROCEDURE ’•J n •:• fi >. 3 u i fc- Process Coat wafer Air dry Pre bake the resist coating Expose Develop Method Time...Orange (rather broad for orange) 0.82 Salmon 0.85 Dull, light red-violet 0.86 Violet £ 0.87 Blue-violet 0.89 Blue ::’ 0.92 V Blue-green •I 0.95

Low Power Band to Band Tunnel Transistors

DTIC Science & Technology

2010-12-15

burden, to Washington Headquarters Services , Directorate for Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington VA...issues like poor dielectric interface quality and low density of states[1.10]. Further homo junction TFETs in these ultra low bandgap materials exhibit...drain leakage current on MOSFET scaling”, International Electron Devices Meeting, Vol.33, pp: 718-721, 1987 [1.3] W. M. Reddick, G. A. Amaratunga

Investigation of analog/RF performance of staggered heterojunctions based nanowire tunneling field-effect transistors

NASA Astrophysics Data System (ADS)

Chakraborty, Avik; Sarkar, Angsuman

2015-04-01

In this paper, the analog/RF performance of an III-V semiconductor based staggered hetero-tunnel-junction (HETJ) n-type nanowire (NW) tunneling FET (n-TFET) is investigated, for the first time. The device performance figure-of-merits governing the analog/RF performance such as transconductance (gm), transconductance-to-drive current ratio (gm/IDS), output resistance (Rout), intrinsic gain and unity-gain cutoff frequency (fT) have been studied. The analog/RF performance parameters is compared between HETJ NW TFET and a homojunction (HJ) NW n-type TFET of similar dimensions. In addition to enhanced ION and subthreshold swing, a significant improvement in the analog/RF performance parameters obtained by the HETJ n-TFET over HJ counterpart for use in analog/mixed signal System-on-Chip (SoC) applications is reported. Moreover, the analog/RF performance parameters of a III-V based staggered HETJ NW TFET is also compared with a heterojunction (HETJ) NW n-type MOSFET having same material as HETJ n-TFET and equal dimension in order to provide a systematic comparison between HETJ-TFET and HETJ-MOSFET for use in analog/mixed-signal applications. The results reveal that HETJ n-TFET provides higher Rout and hence, a higher intrinsic gain, an improved gm/IDS ratio, and reasonable fT at lower values of gate-overdrive voltage as compared to the HETJ NW n-MOSFET.

A physical anthropomorphic phantom of a one year old child with real-time dosimetry

NASA Astrophysics Data System (ADS)

Bower, Mark William

A physical heterogeneous phantom has been created with epoxy resin based tissue substitutes. The phantom is based on the Cristy and Eckerman mathematical phantom which in turn is a modification of the Medical Internal Radiation Dose (MIRD) model of a one-year-old child as presented by the Society of Nuclear Medicine. The Cristy and Eckerman mathematical phantom, and the physical phantom, are comprised of three different tissue types: bone, lung tissue and soft tissue. The bone tissue substitute is a homogenous mixture of bone tissues: active marrow, inactive marrow, trabecular bone, and cortical bone. Soft tissue organs are represented by a homogeneous soft tissue substitute at a particular location. Point doses were measured within the phantom with a Metal Oxide Semiconductor Field Effect Transistor (MOSFET)- based Patient Dose Verification System modified from the original radiotherapy application. The system features multiple dosimeters that are used to monitor entrance or exit skin doses and intracavity doses in the phantom in real-time. Two different MOSFET devices were evaluated: the typical therapy MOSFET and a developmental MOSFET device that has an oxide layer twice as thick as the therapy MOSFET thus making it of higher sensitivity. The average sensitivity (free-in-air, including backscatter) of the 'high-sensitivity' MOSFET dosimeters ranged from 1.15×105 mV per C kg-1 (29.7 mV/R) to 1.38×105 mV per C kg-1 (35.7 mV/R) depending on the energy of the x-ray field. The integrated physical phantom was utilized to obtain point measurements of the absorbed dose from diagnostic x-ray examinations. Organ doses were calculated based on these point dose measurements. The phantom dosimetry system functioned well providing real-time measurement of the dose to particular organs. The system was less reliable at low doses where the main contribution to the dose was from scattered radiation. The system also was of limited utility for determining the absorbed dose in larger systems such as the skeleton. The point dose method of estimating the organ dose to large disperse organs such as this are of questionable accuracy since only a limited number of points are measured in a field with potentially large exposure variations. The MOSFET system was simple to use and considerably faster than traditional thermoluminescent dosimetry. The one-year-old simulated phantom with the real-time MOSFET dosimeters provides a method to easily evaluate the risk to a previously understudied population from diagnostic radiographic procedures.

SU-G-IeP3-02: Characteristics of In-Vivo MOSFET Dosimeters for Diagnostic X-Ray Low-Dose Measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, S; Ali, S; Harper, K

Purpose: To correct in-vivo metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters dependence on X-ray energy, dose and dose rate, and temperature in order to measure doses or exposures on several anatomic points of interest undergoing some routine radiographs. Methods: A mobile MOSFET system (BEST Medical) was carefully calibrated with X-ray at kVp of 70, 80, 100, 120, and 138 kVp, phantom temperatures at 0, 21, and 43 oC, and exposure range from 0.01 to 10 R confirmed with Raysafe and RadCal dosimeters. The MOSFETS were placed on the midline bladder or uterus, left pelvic iliac artery, left abdominal above iliac crest, abdominalmore » midline anterior at inferior margin of stomach, and left pectoral of a large and a small body-size cadavers undergoing AP/PA chest and lumber spine radiographs using manual and automatic exposure control (AEC) with and without lead shielding. MOSTFETs and TLD chips were also placed on the stomach, sigmoid, pubic symphysis, left and right pelvic walls of another cadaver for AP pelvic manual or AEC radiography prior to and after a left hip metal implant. Results: Individual MOSFET detectors had various low-dose limits in ranged from 0.03 to 0.08 R, nonlinear response to X-ray energy, and significant temperature effect of 15%. By accumulating 10 manual exposures and 20 AEC exposures, we achieved dose measured accuracy of 6%. There were up to 8 fold increases for AEC exposure of spine and chest X-ray procedure from no shielding to with shielding. For pelvic radiography, exposure to public symphysis was the highest even higher than that of the skin. After hip implant, AEC pelvic radiograph increase exposure by 30 to 200% consistent with results of TLDs. Conclusion: Dependence of energy, temperature and dose limit were accurately corrected. We have found significant exposure for those clinical pr°ocedures and the study provided evidences for developing new clinical procedures.« less

III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications

NASA Astrophysics Data System (ADS)

Huang, Cheng-Ying

As device scaling continues to sub-10-nm regime, III-V InGaAs/InAs metal- oxide-semiconductor ?eld-e?ect transistors (MOSFETs) are promising candidates for replacing Si-based MOSFETs for future very-large-scale integration (VLSI) logic applications. III-V InGaAs materials have low electron effective mass and high electron velocity, allowing higher on-state current at lower VDD and reducing the switching power consumption. However, III-V InGaAs materials have a narrower band gap and higher permittivity, leading to large band-to-band tunneling (BTBT) leakage or gate-induced drain leakage (GIDL) at the drain end of the channel, and large subthreshold leakage due to worse electrostatic integrity. To utilize III-V MOSFETs in future logic circuits, III-V MOSFETs must have high on-state performance over Si MOSFETs as well as very low leakage current and low standby power consumption. In this dissertation, we will report InGaAs/InAs ultra-thin-body MOSFETs. Three techniques for reducing the leakage currents in InGaAs/InAs MOSFETs are reported as described below. 1) Wide band-gap barriers: We developed AlAs0.44Sb0.56 barriers lattice-match to InP by molecular beam epitaxy (MBE), and studied the electron transport in In0.53Ga0.47As/AlAs 0.44Sb0.56 heterostructures. The InGaAs channel MOSFETs using AlAs0.44Sb0.56 bottom barriers or p-doped In0.52 Al0.48As barriers were demonstrated, showing significant suppression on the back barrier leakage. 2) Ultra-thin channels: We investigated the electron transport in InGaAs and InAs ultra-thin quantum wells and ultra-thin body MOSFETs (t ch ~ 2-4 nm). For high performance logic, InAs channels enable higher on-state current, while for low power logic, InGaAs channels allow lower BTBT leakage current. 3) Source/Drain engineering: We developed raised InGaAs and recessed InP source/drain spacers. The raised InGaAs source/drain spacers improve electrostatics, reducing subthreshold leakage, and smooth the electric field near drain, reducing BTBT leakage. With further replacement of raised InGaAs spacers by recessed, doping-graded InP spacers at high field regions, BTBT leakage can be reduced ~100:1. Using the above-mentioned techniques, record high performance InAs MOSFETs with a 2.7 nm InAs channel and a ZrO2 gate dielectric were demonstrated with Ion = 500 microA/microm at Ioff = 100 nA/microm and VDS =0.5 V, showing the highest on-state performance among all the III-V MOSFETs and comparable performance to 22 nm Si FinFETs. Record low leakage InGaAs MOSFETs with recessed InP source/drain spacers were also demonstrated with minimum I off = 60 pA/microm at 30 nm-Lg , and Ion = 150 microA/microm at I off = 1 nA/microm and VDS =0.5 V. This recessed InP source/drain spacer technique improves device scalability and enables III-V MOSFETs for low standby power logic applications. Furthermore, ultra-thin InAs channel MOSFETs were fabricated on Si substrates, exhibiting high yield and high transconductance gm ~2.0 mS/microm at 20 nm- Lg and VDS =0.5 V. With further scaling of gate lengths, a 12 nm-Lg III-V MOSFET has shown maximum Ion/Ioff ratio ~8.3x105 , confirming that III-V MOSFETs are scalable to sub-10-nm technology nodes.

Fabrication of a novel RF switch device with high performance using In0.4Ga0.6As MOSFET technology

NASA Astrophysics Data System (ADS)

Jiahui, Zhou; Hudong, Chang; Xufang, Zhang; Jingzhi, Yang; Guiming, Liu; Haiou, Li; Honggang, Liu

2016-02-01

A novel radio frequency (RF) switch device has been successfully fabricated using InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) technology. The device showed drain saturation currents of 250 mA/mm, a maximum transconductance of 370 mS/mm, a turn-on resistance of 0.72 mω·mm2 and a drain current on-off (Ion/Ioff) ratio of 1 × 106. The maximum handling power of on-state of 533 mW/mm and off-state of 3667 mW/mm is obtained. The proposed In0.4Ga0.6 As MOSFET RF switch showed an insertion loss of less than 1.8 dB and an isolation of better than 20 dB in the frequency range from 0.1 to 7.5 GHz. The lowest insertion loss and the highest isolation can reach 0.27 dB and more than 68 dB respectively. This study demonstrates that the InGaAs MOSFET technology has a great potential for RF switch application. Project supported by the National Natural Science Foundation of China (Nos. 61274077, 61474031), the Guangxi Natural Science Foundation (No. 2013GXNSFGA019003), the Guangxi Department of Education Project (No. 201202ZD041), the Guilin City Technology Bureau (Nos. 20120104-8, 20130107-4), the China Postdoctoral Science Foundation Funded Project (Nos. 2012M521127, 2013T60566), the National Basic Research Program of China (Nos. 2011CBA00605, 2010CB327501), the Innovation Project of GUET Graduate Education (Nos. GDYCSZ201448, GDYCSZ201449), the State key Laboratory of Electronic Thin Films and Integrated Devices, UESTC (No. KFJJ201205), and the Guilin City Science and Technology Development Project (Nos. 20130107-4, 20120104-8).

Learning the Art of Electronics

NASA Astrophysics Data System (ADS)

Hayes, Thomas C.; Horowitz, Paul

2016-03-01

1. DC circuits; 2. RC circuits; 3. Diode circuits; 4. Transistors I; 5. Transistors II; 6. Operational amplifiers I; 7. Operational amplifiers II: nice positive feedback; 8. Operational amplifiers III; 9. Operational amplifiers IV: nasty positive feedback; 10. Operational amplifiers V: PID motor control loop; 11. Voltage regulators; 12. MOSFET switches; 13. Group audio project; 14. Logic gates; 15. Logic compilers, sequential circuits, flip-flops; 16. Counters; 17. Memory: state machines; 18. Analog to digital: phase-locked loop; 19. Microcontrollers and microprocessors I: processor/controller; 20. I/O, first assembly language; 21. Bit operations; 22. Interrupt: ADC and DAC; 23. Moving pointers, serial buses; 24. Dallas Standalone Micro, SiLabs SPI RAM; 25. Toys in the attic; Appendices; Index.

Double gate graphene nanoribbon field effect transistor with single halo pocket in channel region

NASA Astrophysics Data System (ADS)

Naderi, Ali

2016-01-01

A new structure for graphene nanoribbon field-effect transistors (GNRFETs) is proposed and investigated using quantum simulation with a nonequilibrium Green's function (NEGF) method. Tunneling leakage current and ambipolar conduction are known effects for MOSFET-like GNRFETs. To minimize these issues a novel structure with a simple change of the GNRFETs by using single halo pocket in the intrinsic channel region, "Single Halo GNRFET (SH-GNRFET)", is proposed. An appropriate halo pocket at source side of channel is used to modify potential distribution of the gate region and weaken band to band tunneling (BTBT). In devices with materials like Si in channel region, doping type of halo and source/drain regions are different. But, here, due to the smaller bandgap of graphene, the mentioned doping types should be the same to reduce BTBT. Simulations have shown that in comparison with conventional GNRFET (C-GNRFET), an SH-GNRFET with appropriately halo doping results in a larger ON current (Ion), smaller OFF current (Ioff), a larger ON-OFF current ratio (Ion/Ioff), superior ambipolar characteristics, a reduced power-delay product and lower delay time.

Novel H+-Ion Sensor Based on a Gated Lateral BJT Pair

PubMed Central

Yuan, Heng; Zhang, Jixing; Cao, Chuangui; Zhang, Gangyuan; Zhang, Shaoda

2015-01-01

An H+-ion sensor based on a gated lateral bipolar junction transistor (BJT) pair that can operate without the classical reference electrode is proposed. The device is a special type of ion-sensitive field-effect transistor (ISFET). Classical ISFETs have the advantage of miniaturization, but  they are difficult to fabricate by a single fabrication process because of the bulky and brittle reference electrode materials. Moreover, the reference electrodes need to be separated from the sensor device in some cases. The proposed device is composed of two gated lateral BJT components, one of which had a silicide layer while the other was without the layer. The two components were operated under the metal-oxide semiconductor field-effect transistor (MOSFET)-BJT hybrid mode, which can be controlled by emitter voltage and base current. Buffer solutions with different pH values were used as the sensing targets to verify the characteristics of the proposed device. Owing to their different sensitivities, both components could simultaneously detect the H+-ion concentration and function as a reference to each other. Per the experimental results, the sensitivity of the proposed device was found to be approximately 0.175 μA/pH. This experiment demonstrates enormous potential to lower the cost of the ISFET-based sensor technology. PMID:26703625

Extraction of mobility and Degradation coefficients in double gate junctionless transistors

NASA Astrophysics Data System (ADS)

Bhuvaneshwari, Y. V.; Kranti, Abhinav

2017-12-01

In this work, we use the modified McLarty function to understand and extract accumulation (μ acc) and bulk (μ bulk) mobility in Double Gate (DG) Junctionless (JL) MOSFETs over a wide range of doping concentration (N d) and temperature range (250 K to 520 K). The approach enables the estimation of mobility and its attenuation factors (θ 1 and θ 2) by a single method. The extracted results indicate that μ acc can reach higher values than μ bulk due to the screening effect. Results also show that θ 2 extracted in the accumulation regime of JL transistors exhibit relatively low values in comparison to inversion and accumulation mode devices. It is shown that the attenuation factor (θ 1) in JL devices designed with higher N d (≥1019 cm-3) is mainly affected by series resistance (R sd) whereas, in inversion mode (IM) and Accumulation mode (AM) devices, θ 1 factor is governed by both the intrinsic mobility reduction factor (θ 10) and R sd. Additionally, the impact of variation in oxide thickness (T ox), gate length (L g), N d and temperature on θ 1 and θ 2 has been investigated for JL transistor. The weak dependence of μ bulk and μ acc on temperature shows the prevalence of coulomb scattering over phonon scattering for heavily doped JL transistors. The work provides insights into different modes of operation, extraction of mobility and attenuation factors which will be useful for the development of compact models for JL transistors.

TEM studies of III-V MOSFETs for ultimate CMOS

NASA Astrophysics Data System (ADS)

Longo, Paolo

Over the past half-century electronic industry has enormously grown changing the way people live their lives. Such growth has been driven by the miniaturisation and development of the transistors which are the main components in an integrated circuit (IC) commonly referred as a chip. Until today electronic industry has been based on the use of Si and its native oxide SiO2 in transistors. However, the performance limit of conventional Si based transistors is rapidly being approached and alternatives will soon be required. One of the proposed alternatives is GaAs. n-type GaAs has a mobility 5 times higher than Si. This makes it a suitable candidate for MOSFETs devices. So far, GaAs has not been used for practical MOSFETs because of the difficulties of making a good dielectric oxide layer in terms of leakage current and unpinned Fermi Level. Using processes pioneered by Passlack et al, dielectric gate stacks consisting of a template layer of amorphous Ga2O3 followed by amorphous GdGaO have been grown on GaAs substrates. Careful deposition of Ga2O3 can leave the Fermi Level unpinned. The introduction of Gd is important in order to decrease the leakage of current. The electrical properties of the Ga2O3/Gd[x]Ga[0.4-x]O[0.6] dielectric stack are related to the Gd concentration and the quality of the GaAs/Ga2O3 interface. Over the past years in a unique partnership several research groups from the Physics and the Electronic and Electrical engineering Department have collaboratively worked for the realisation and development of such new generation of GaAs based transistors using the technology described above. The properties of such devices depend on structures at the nanoscale which is only few atoms across. Thus the characterization using the transmission electron microscope (TEM) becomes essential. In this project TEM has been used to study several MBE grown III-V semiconductor nanostructures. In particular most of the thesis is focussed on the chemical characterisation of the GaAs/Ga2O3/GGO dielectric gate stack, mainly using electron energy loss spectroscopy (EELS) and high-resolution scanning Transmission electron microscopy (STEM) imaging. As said above the quality of such interfaces affects the properties of the whole device. Hence the results presented herein represent an important feedback for the realisation of world performance GaAs devices.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal-oxide-semiconductor field effect transistor with Stone Wales defects

NASA Astrophysics Data System (ADS)

Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

2014-01-01

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width ˜5 nm, the simulated ON current is found to be in the range of 265 μA-280 μA with an ON/OFF ratio 7.1 × 106-7.4 × 106 for a VDD = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.

Universal MOSFET parameter analyzer

NASA Astrophysics Data System (ADS)

Klekachev, A. V.; Kuznetsov, S. N.; Pikulev, V. B.; Gurtov, V. A.

2006-05-01

MOSFET analyzer is developed to extract most important parameters of transistors. Instead of routine DC transfer and output characteristics, analyzer provides an evaluation of interface states density by applying charge pumping technique. There are two features that outperform the analyzer among similar products of other vendors. It is compact (100 × 80 × 50 mm 3 in dimensions) and lightweight (< 200 gram) instrument with ultra low power supply (< 2.5 W). The analyzer operates under control of IBM PC by means of USB interface that simultaneously provides power supply. Owing to the USB-compatible microcontroller as the basic element, designed analyzer offers cost-effective solution for diverse applications. The enclosed software runs under Windows 98/2000/XP operating systems, it has convenient graphical interface simplifying measurements for untrained user. Operational characteristics of analyzer are as follows: gate and drain output voltage within limits of +/-10V measuring current range of 1pA ÷ 10 mA; lowest limit of interface states density characterization of ~10 9 cm -2 • eV -1. The instrument was designed on the base of component parts from CYPRESS and ANALOG DEVICES (USA).

Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit

NASA Astrophysics Data System (ADS)

Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong

2018-06-01

A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.

Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cipro, R.; Gorbenko, V.; Univ. Grenoble Alpes, F-38000, France CEA-LETI, MINATEC Campus, F-38054 Grenoble

2014-06-30

Metal organic chemical vapor deposition of GaAs, InGaAs, and AlGaAs on nominal 300 mm Si(100) at temperatures below 550 °C was studied using the selective aspect ratio trapping method. We clearly show that growing directly GaAs on a flat Si surface in a SiO{sub 2} cavity with an aspect ratio as low as 1.3 is efficient to completely annihilate the anti-phase boundary domains. InGaAs quantum wells were grown on a GaAs buffer and exhibit room temperature micro-photoluminescence. Cathodoluminescence reveals the presence of dark spots which could be associated with the presence of emerging dislocation in a direction parallel to the cavity. Themore » InGaAs layers obtained with no antiphase boundaries are perfect candidates for being integrated as channels in n-type metal oxide semiconductor field effect transistor (MOSFET), while the low temperatures used allow the co-integration of p-type MOSFET.« less

Assessment of female breast dose for thoracic cone-beam CT using MOSFET dosimeters.

PubMed

Sun, Wenzhao; Wang, Bin; Qiu, Bo; Liang, Jian; Xie, Weihao; Deng, Xiaowu; Qi, Zhenyu

2017-03-21

To assess the breast dose during a routine thoracic cone-beam CT (CBCT) check with the efforts to explore the possible dose reduction strategy. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were used to measure breast surface doses during a thorax kV CBCT scan in an anthropomorphic phantom. Breast doses for different scanning protocols and breast sizes were compared. Dose reduction was attempted by using partial arc CBCT scan with bowtie filter. The impact of this dose reduction strategy on image registration accuracy was investigated. The average breast surface doses were 20.02 mGy and 11.65 mGy for thoracic CBCT without filtration and with filtration, respectively. This indicates a dose reduction of 41.8% by use of bowtie filter. It was found 220° partial arc scanning significantly reduced the dose to contralateral breast (44.4% lower than ipsilateral breast), while the image registration accuracy was not compromised. Breast dose reduction can be achieved by using ipsilateral 220° partial arc scan with bowtie filter. This strategy also provides sufficient image quality for thorax image registration in daily patient positioning verification.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vanheusden, K.; Warren, W.L.; Devine, R.A.B.

It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protonsmore » are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).« less

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

NASA Astrophysics Data System (ADS)

Afzalian, Aryan; Colinge, Jean-Pierre; Flandre, Denis

2011-05-01

A new concept of nanoscale MOSFET, the Gate Modulated Resonant Tunneling Transistor (RT-FET), is presented and modeled using 3D Non-Equilibrium Green's Function simulations enlightening the main physical mechanisms. Owing to the additional tunnel barriers and the related longitudinal confinement present in the device, the density of state is reduced in its off-state, while remaining comparable in its on-state, to that of a MOS transistor without barriers. The RT-FET thus features both a lower RT-limited off-current and a faster increase of the current with V G, i.e. an improved slope characteristic, and hence an improved Ion/ Ioff ratio. Such improvement of the slope can happen in subthreshold regime, and therefore lead to subthreshold slope below the kT/q limit. In addition, faster increase of current and improved slope occur above threshold and lead to high thermionic on-current and significant Ion/ Ioff ratio improvement, even with threshold voltage below 0.2 V and supply voltage V dd of a few hundreds of mV as critically needed for future technology nodes. Finally RT-FETs are intrinsically immune to source-drain tunneling and are therefore promising candidate for extending the roadmap below 10 nm.

Radiotherapy dose verification on a customised head and neck perspex phantom

NASA Astrophysics Data System (ADS)

Eng, K. Y.; Kandaiya, S.; Yahaya, N. Z.

2017-05-01

IMRT dose planned for head and neck radiotherapy was verified using a customised acrylic head-and-neck phantom. The dosimeters used were calibrated Gafchromic EBT2 film and metal-oxide-semiconductor-field-effect-transistor (MOSFET). Target volumes (TV) and organs-at-risk (OAR) which were previously contoured by an oncologist on selected nasopharynx (NPC) patients were transferred to this phantom by an image fusion procedure. Three radiotherapy plans were done: Plan1 with 7-fields intensity-modulated radiotherapy (IMRT) of prescribed dose 70 Gy using 33 fractions; Plan2 with 7-fields IMRT plan at 70 Gy and 35 fractions; and Plan3 which was a mid-plane-dose (MPD) plan of 66 Gy at 33 fractions. The dose maps were first verified using MapCheck2 by SNC-PatientTM software. The passing rates from gamma analysis were 97.7% (Plan1), 93.1% (Plan2) and 100% (Plan3). Percentage difference between Treatment Planning System (TPS) calculated dose and MOSFET measured dose was comparatively higher than those from EBT2. Calculated dose and EBT2 measured doses showed differences of within the range of ±3% for TV and <±10% for OARs. However MOSFET had differences of within the range of ±6% for TV and within the range of ±10% for OARs between measured and planned doses. An overdose treatment may occur as TPS calculated doses were lower than the measured doses in these plans. This may be due to the effects of leaf leakage, leaf scatter and photon backscatter into the measuring tools (Pawlicki et al., 1999 and Ma et al., 2000). More IMRT plans have to be studied to validate this conclusion. However, the dose measurements were still within the 10% tolerance (AAPM Task Group 119). In conclusion, both GafchromicEBT2 film and MOSFET are suitable for IMRT radiotherapy dosimetry.

Inherent overload protection for the series resonant converter

NASA Technical Reports Server (NTRS)

King, R. J.; Stuart, T. A.

1983-01-01

The overload characteristics of the full bridge series resonant power converter are considered. This includes analyses of the two most common control methods presently in use. The first of these uses a current zero crossing detector to synchronize the control signals and is referred to as the alpha controller. The second is driven by a voltage controlled oscillator and is referred to as the gamma controller. It is shown that the gamma controller has certain reliability advantages in that it can be designed with inherent short circuit protection. Experimental results are included for an 86 kHz converter using power metal-oxide-semiconductor field-effect transistors (MOSFETs).

Electrical Control of g-Factor in a Few-Hole Silicon Nanowire MOSFET.

PubMed

Voisin, B; Maurand, R; Barraud, S; Vinet, M; Jehl, X; Sanquer, M; Renard, J; De Franceschi, S

2016-01-13

Hole spins in silicon represent a promising yet barely explored direction for solid-state quantum computation, possibly combining long spin coherence, resulting from a reduced hyperfine interaction, and fast electrically driven qubit manipulation. Here we show that a silicon-nanowire field-effect transistor based on state-of-the-art silicon-on-insulator technology can be operated as a few-hole quantum dot. A detailed magnetotransport study of the first accessible hole reveals a g-factor with unexpectedly strong anisotropy and gate dependence. We infer that these two characteristics could enable an electrically driven g-tensor-modulation spin resonance with Rabi frequencies exceeding several hundred mega-Hertz.

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

2D Quantum Transport Modeling in Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

A novel self-aligned oxygen (SALOX) implanted SOI MOSFET device structure

NASA Astrophysics Data System (ADS)

Tzeng, J. C.; Baerg, W.; Ting, C.; Siu, B.

The morphology of the novel self-aligned oxygen implanted SOI (SALOX SOI) [1] MOSFET was studied. The channel silicon of SALOX SOI was confirmed to be undamaged single crystal silicon and was connected with the substrate. Buried oxide formed by oxygen implantation in this SALOX SOI structure was shown by a cross section transmission electron micrograph (X-TEM) to be amorphous. The source/drain silicon on top of the buried oxide was single crystal, as shown by the transmission electron diffraction (TED) pattern. The source/drain regions were elevated due to the buried oxide volume expansion. A sharp silicon—silicon dioxide interface between the source/drain silicon and buried oxide was observed by Auger electron spectroscopy (AES). Well behaved n-MOS transistor current voltage characteristics were obtained and showed no I-V kink.

Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays

NASA Astrophysics Data System (ADS)

Kwak, Bong-Choon; Lim, Han-Sin; Kwon, Oh-Kyong

2011-03-01

In this paper, we propose a pixel circuit immune to the electrical characteristic variation of organic light-emitting diodes (OLEDs) for organic light-emitting diode-on-silicon (OLEDoS) microdisplays with a 0.4 inch video graphics array (VGA) resolution and a 6-bit gray scale. The proposed pixel circuit is implemented using five p-channel metal oxide semiconductor field-effect transistors (MOSFETs) and one storage capacitor. The proposed pixel circuit has a source follower with a diode-connected transistor as an active load for improving the immunity against the electrical characteristic variation of OLEDs. The deviation in the measured emission current ranges from -0.165 to 0.212 least significant bit (LSB) among 11 samples while the anode voltage of OLED is 0 V. Also, the deviation in the measured emission current ranges from -0.262 to 0.272 LSB in pixel samples, while the anode voltage of OLED varies from 0 to 2.5 V owing to the electrical characteristic variation of OLEDs.

In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation.

PubMed

Amor, S; André, N; Kilchytska, V; Tounsi, F; Mezghani, B; Gérard, P; Ali, Z; Udrea, F; Flandre, D; Francis, L A

2017-05-05

In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal-oxide-semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of -580 mV for N-channel transistors, and -360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation

NASA Astrophysics Data System (ADS)

Amor, S.; André, N.; Kilchytska, V.; Tounsi, F.; Mezghani, B.; Gérard, P.; Ali, Z.; Udrea, F.; Flandre, D.; Francis, L. A.

2017-05-01

In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal-oxide-semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of -580 mV for N-channel transistors, and -360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

Advanced testing of the DEPFET minimatrix particle detector

NASA Astrophysics Data System (ADS)

Andricek, L.; Kodyš, P.; Koffmane, C.; Ninkovic, J.; Oswald, C.; Richter, R.; Ritter, A.; Rummel, S.; Scheirich, J.; Wassatsch, A.

2012-01-01

The DEPFET (DEPleted Field Effect Transistor) is an active pixel particle detector with a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) integrated in each pixel, providing first amplification stage of readout electronics. Excellent signal over noise performance is gained this way. The DEPFET sensor will be used as a vertex detector in the Belle II experiment at SuperKEKB, electron-positron collider in Japan. The vertex detector will be composed of two layers of pixel detectors (DEPFET) and four layers of strip detectors. The DEPFET sensor requires switching and current readout circuits for its operation. These circuits have been designed as ASICs (Application Specific Integrated Circuits) in several different versions, but they provide insufficient flexibility for precise detector testing. Therefore, a test system with a flexible control cycle range and minimal noise has been designed for testing and characterizing of small detector prototypes (Minimatrices). Sensors with different design layouts and thicknesses are produced in order to evaluate and select the one with the best performance for the Belle II application. Description of the test system as well as measurement results are presented.

Modeling, Fabrication, and Analysis of Vertical Conduction Gallium Nitride Fin MOSFET

NASA Astrophysics Data System (ADS)

Tahhan, Maher Bishara

Gallium Nitride has seen much interest in the field of electronics due to its large bandgap and high mobility. In the field of power electronics, this combination leads to a low on-resistance for a given breakdown voltage. To take full advantage of this, vertical conduction transistors in GaN can give high breakdown voltages independent of chip area, leading to transistors with nominally low on resistance with high breakdown at a low cost. Acknowledging this, a vertical transistor design is presented with a small footprint area. This design utilizes a fin structure as a double gated insulated MESFET with electrons flowing from the top of the fin downward. The transistor's characteristics and design is initially explored via simulation and modelling. In this modelling, it is found that the narrow dimension of the fin must be sub-micron to allow for the device to be turned off with no leakage current and have a positive threshold voltage. Several process modules are developed and integrated to fabricate the device. A smooth vertical etch leaving low damage to the surfaces is demonstrated and characterized, preventing micromasking during the GaN dry etch. Methods of removing damage from the dry etch are tested, including regrowth and wet etching. Several hard masks were developed to be used in conjunction with this GaN etch for various requirements of the process, such as material constraints and self-aligning a metal contact. Multiple techniques are tested to deposit and pattern the gate oxide and metal to ensure good contact with the channel without causing unwanted shorts. To achieve small fin dimensions, a self-aligned transistor process flow is presented allowing for smaller critical dimensions at increased fabrication tolerances by avoiding the use of lithographic steps that require alignments to very high accuracy. In the case of the device design presented, the fins are lithographically defined at the limit of i-line stepper system. From this single lithography, the sources are formed, fins are etched, and the gate insulator and metal are deposited. The first functional fabricated devices are presented, but exhibit a few differences from the model. A threshold voltage of -6 V, was measured, with an ID of 5 kA/cm2 at 3 V, and Ron of 0.6 mO/cm 2. The current is limited by the Schottky nature of the top contacts and show a turn-on voltage as a result. These measurements are comparable to recently published GaN fin MOSFET data, whose devices were defined by e-beam lithography. This dissertation work sought to show that a vertical conduction fin MOSFET can be fabricated on GaN. Furthermore, it aimed to provide a self-aligned process that does not require e-beam lithography. With further development, such devices can be designed to hold large voltages while maintaining a small footprint.

DOE Office of Scientific and Technical Information (OSTI.GOV)

NONE

Work under DOE Grant No. DE-FG47-93R701314, to investigate a Novel Process for Fabricating MOSFET Devices, has progressed to a point where feasibility of producing MOSFETS using Chromium Disilicide Schottky barrier junctions at Source and Drain has been shown. Devices fabricated, however, show inconsistent operating characteristics from device to device, and further work is required to overcome the defects. Some fabrication procedures have produced a relatively high, (e.g., ninety-five (95%) percent), yield of devices on a substrate which show at least some transistor action, while others have resulted in very low yield, (e.g., five (5%) percent). Consistency of results from devicemore » to device is less than desired. However, considering that the University of Nebraska at Lincoln (UNL) Electrical Engineering Fabrication Lab is not what industry can provide, it is reasonable to project that essentially one-hundred (99.99+%) percent yield should be achievable in an industrial setting because of the simplicity in the fabrication procedure.« less

Carrier mobility degradation due to high dose implantation in ultrathin unstrained and strained silicon-on-insulator films

NASA Astrophysics Data System (ADS)

Dupré, C.; Ernst, T.; Hartmann, J.-M.; Andrieu, F.; Barnes, J.-P.; Rivallin, P.; Faynot, O.; Deleonibus, S.; Fazzini, P. F.; Claverie, A.; Cristoloveanu, S.; Ghibaudo, G.; Cristiano, F.

2007-11-01

Based on electrical measurements and transmission electron microscopy (TEM) imaging, we propose an explanation for the electron and hole mobility degradation with gate length reduction in metal-oxide-semiconductor field effect transistors (MOSFETs). We demonstrate that ion implantation, normally used for source/drain doping, is responsible for transport degradation for short-channel devices. Implantation impact on electrons and holes mobility was investigated both on silicon-on-insulator (SOI) and tensile strained silicon-on-insulator (sSOI) substrates. Wafers with ultrathin Si films (from 8 to 35 nm) were Ge implanted at 3 keV and various concentrations (from 5×1014 to 2×1015 atoms cm-2), then annealed at 600 °C for 1 h. Secondary ion mass spectrometry enabled us to quantify the Ge-implanted atoms concentrations. The end-of-range defects impact on mobility was investigated with the pseudo-MOSFET technique. Measurements showed a mobility decrease as the implantation dose increased. We demonstrated that sSOI mobility is more sensitive to implantation than SOI mobility, without any implantation-induced strain relaxation in sSOI (checked using the ultraviolet Raman technique). A 36% (25%) holes (electrons) mobility degradation was measured for sSOI, while SOI presented a 21% mobility degradation for holes and 5% for electrons. Finally, the electrical results were compared with morphological studies. Plan-view TEM showed the presence of interstitial defects formed during ion implantation and annealing. The defect density was estimated to be two times higher in sSOI than in SOI, which is in full agreement with electrical results mentioned before. The results are relevant for the optimization of the source and drain regions of advanced nanoscale SOI and sSOI transistors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Teherani, James T., E-mail: j.teherani@columbia.edu; Agarwal, Sapan; Chern, Winston

Many in the microelectronics field view tunneling field-effect transistors (TFETs) as society's best hope for achieving a >10× power reduction for electronic devices; however, despite a decade of considerable worldwide research, experimental TFET results have significantly underperformed simulations and conventional MOSFETs. To explain the discrepancy between TFET experiments and simulations, we investigate the parasitic leakage current due to Auger generation, an intrinsic mechanism that cannot be mitigated with improved material quality or better device processing. We expose the intrinsic link between the Auger and band-to-band tunneling rates, highlighting the difficulty of increasing one without the other. From this link, wemore » show that Auger generation imposes a fundamental limit on ultimate TFET performance.« less

Depletion-mode vertical Ga2O3 trench MOSFETs fabricated using Ga2O3 homoepitaxial films grown by halide vapor phase epitaxy

NASA Astrophysics Data System (ADS)

Sasaki, Kohei; Thieu, Quang Tu; Wakimoto, Daiki; Koishikawa, Yuki; Kuramata, Akito; Yamakoshi, Shigenobu

2017-12-01

We developed depletion-mode vertical Ga2O3 trench metal-oxide-semiconductor field-effect transistors by using n+ contact and n- drift layers. These epilayers were grown on an n+ (001) Ga2O3 single-crystal substrate by halide vapor phase epitaxy. Cu and HfO2 were used for the gate metal and dielectric film, respectively. The mesa width and gate length were approximately 2 and 1 µm, respectively. The devices showed good DC characteristics, with a specific on-resistance of 3.7 mΩ cm2 and clear current modulation. An on-off ratio of approximately 103 was obtained.

2D Quantum Mechanical Study of Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, B.; Kwak, Dochan (Technical Monitor)

2000-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. We present the results of our simulations of MIT 25, 50 and 90 nm "well-tempered" MOSFETs and compare them to those of classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. Surprisingly, the self-consistent potential profile shows lower injection barrier in the channel in quantum case. These results are qualitatively consistent with ID Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and subthreshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Characterization of silicon-on-insulator wafers

NASA Astrophysics Data System (ADS)

Park, Ki Hoon

The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal–oxide–semiconductor field effect transistor with Stone Wales defects

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

2014-01-21

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of widthmore » ∼5 nm, the simulated ON current is found to be in the range of 265 μA–280 μA with an ON/OFF ratio 7.1 × 10{sup 6}–7.4 × 10{sup 6} for a V{sub DD} = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.« less

Assessment of female breast dose for thoracic cone-beam CT using MOSFET dosimeters

PubMed Central

Qiu, Bo; Liang, Jian; Xie, Weihao; Deng, Xiaowu; Qi, Zhenyu

2017-01-01

Objective: To assess the breast dose during a routine thoracic cone-beam CT (CBCT) check with the efforts to explore the possible dose reduction strategy. Materials and Methods: Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were used to measure breast surface doses during a thorax kV CBCT scan in an anthropomorphic phantom. Breast doses for different scanning protocols and breast sizes were compared. Dose reduction was attempted by using partial arc CBCT scan with bowtie filter. The impact of this dose reduction strategy on image registration accuracy was investigated. Results: The average breast surface doses were 20.02 mGy and 11.65 mGy for thoracic CBCT without filtration and with filtration, respectively. This indicates a dose reduction of 41.8% by use of bowtie filter. It was found 220° partial arc scanning significantly reduced the dose to contralateral breast (44.4% lower than ipsilateral breast), while the image registration accuracy was not compromised. Conclusions: Breast dose reduction can be achieved by using ipsilateral 220° partial arc scan with bowtie filter. This strategy also provides sufficient image quality for thorax image registration in daily patient positioning verification. PMID:28423624

Role of hydrogen in volatile behaviour of defects in SiO2-based electronic devices

NASA Astrophysics Data System (ADS)

Wimmer, Yannick; El-Sayed, Al-Moatasem; Gös, Wolfgang; Grasser, Tibor; Shluger, Alexander L.

2016-06-01

Charge capture and emission by point defects in gate oxides of metal-oxide-semiconductor field-effect transistors (MOSFETs) strongly affect reliability and performance of electronic devices. Recent advances in experimental techniques used for probing defect properties have led to new insights into their characteristics. In particular, these experimental data show a repeated dis- and reappearance (the so-called volatility) of the defect-related signals. We use multiscale modelling to explain the charge capture and emission as well as defect volatility in amorphous SiO2 gate dielectrics. We first briefly discuss the recent experimental results and use a multiphonon charge capture model to describe the charge-trapping behaviour of defects in silicon-based MOSFETs. We then link this model to ab initio calculations that investigate the three most promising defect candidates. Statistical distributions of defect characteristics obtained from ab initio calculations in amorphous SiO2 are compared with the experimentally measured statistical properties of charge traps. This allows us to suggest an atomistic mechanism to explain the experimentally observed volatile behaviour of defects. We conclude that the hydroxyl-E' centre is a promising candidate to explain all the observed features, including defect volatility.

Study of Direct-Contact HfO2/Si Interfaces

PubMed Central

Miyata, Noriyuki

2012-01-01

Controlling monolayer Si oxide at the HfO2/Si interface is a challenging issue in scaling the equivalent oxide thickness of HfO2/Si gate stack structures. A concept that the author proposes to control the Si oxide interface by using ultra-high vacuum electron-beam HfO2 deposition is described in this review paper, which enables the so-called direct-contact HfO2/Si structures to be prepared. The electrical characteristics of the HfO2/Si metal-oxide-semiconductor capacitors are reviewed, which suggest a sufficiently low interface state density for the operation of metal-oxide-semiconductor field-effect-transistors (MOSFETs) but reveal the formation of an unexpected strong interface dipole. Kelvin probe measurements of the HfO2/Si structures provide obvious evidence for the formation of dipoles at the HfO2/Si interfaces. The author proposes that one-monolayer Si-O bonds at the HfO2/Si interface naturally lead to a large potential difference, mainly due to the large dielectric constant of the HfO2. Dipole scattering is demonstrated to not be a major concern in the channel mobility of MOSFETs. PMID:28817060

Biomimetic Trehalose Biosensor Using Gustatory Receptor (Gr5a) Expressed in Drosophila Cells and Ion-Sensitive Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Lau, Hui-Chong; Bae, Tae-Eon; Jang, Hyun-June; Kwon, Jae-Young; Cho, Won-Ju; Lim, Jeong-Ok

2013-04-01

The development of potential applications of biosensors using the sensory systems of vertebrates and invertebrates has progressed rapidly, especially in clinical diagnosis. The biosensor developed here involves the use of Drosophila cells expressing the gustatory receptor Gr5a and an ion-sensitive field-effect transistor (ISFET) sensor device. Gustatory receptor Gr5a is expressed abundantly in gustatory neurons and acts as a primary marker for tastants, especially sugar, in Drosophila. As a result, it could potentially serve as a good candidate for potential biomarkers of diseases in which the current knowledge of the cause and treatment is limited. The developed ISFET was based on the outstanding electrical characteristics of the metal-oxide-semiconductor field-effect transistor (MOSFET) with a subthreshold swing of 85 mV/dec, low leakage current of <10-12 and high on/off current ratio of 7.3×106. The SiO2 sensing membrane with a pH sensitivity of 34.9 mV/pH and drift rate 1.17 mV/h was sufficient for biosensing applications. In addition, the sensor device also showed significant compatibility with the Drosophila cells expressing Gr5a and their response to sugar, particularly trehalose. Moreover, the interactions between the transfected Drosophila cells and trehalose were consistent and reliable. This suggests that the developed ISFET sensor device could have potential use in the future as a screening device in diagnosis.

Lateral power MOSFETs in silicon carbide

NASA Astrophysics Data System (ADS)

Spitz, Jan

2001-07-01

Because of its large bandgap, its high critical electric field, and its high quality native SiO2, silicon carbide is considered to be the material of choice for power switching electronics in the future. Until 1997 the maximum thickness of commercially available epilayers serving as the drift region for power devices has been limited to 10--15 mum, limiting the maximum blocking voltage to 1500 V for vertical power devices in silicon carbide. In this study, we present the first lateral power devices on a semi-insulating vanadium doped substrate of silicon carbide. The first generation of lateral DMOSFETs in 4H-SiC yielded a blocking voltage of 2.6 kV---more than twice what was previously reported for any SiC MOSFETs---but suffered from low MOS channel mobility caused by the high anneal temperatures (≥1600°C) required to activate the p-type ion-implant. Combining the high blocking-voltage of the vanadium-doped substrate with the higher MOS mobility previously achieved by an epitaxially-grown accumulation channel leads us to the LACCUFET device: No p-type implant is necessary. This device shows a blocking voltage of 2.7 kV unmatched by any SiC transistor until February 2000 combined with a much lower specific on-resistance of 3.6 O•cm2. The ability to combine long-channel test MOSFETs with high channel mobility of 27 cm2/(volt·sec) in 4H-SiC with power devices of 13 cm2/(volt·sec) on the same chip has been demonstrated. The Figure of Merit Vblock 2/Ron,sp for this new NON-RESURF LDMOSFET in 4H-SiC is close to the theoretical limit for vertical power devices made of silicon. The specific on-resistance can be reduced by factor 2.5 by forward-biasing the p-base to source junction by 2 to 3 volts. Basic operation in Static Induction Injection Accumulation FET (SIAFET) mode has been demonstrated. Lateral (Non-Punch-Through) Insulated Gate Bipolar Transistors (LIGBT) have been presented for the first time showing similar on-resistance and blocking voltages but significantly higher on-currents for both 4H and 6H-SiC devices compared to their MOSFET counterparts. Test p-i-n diodes show lower on-resistance by carrier injection into the drift region.

Strain effects in low-dimensional silicon MOS and AlGaN/GaN HEMT devices

NASA Astrophysics Data System (ADS)

Baykan, Mehmet Onur

Strained silicon technology is a well established method to enhance sub-100nm MOSFET performance. With the scalability of process-induced strain, strained silicon channels have been used in every advanced CMOS technology since the 90nm node. At the 22nm node, due to the detrimental short channel effects, non-planar silicon CMOS has emerged as a viable solution to sustain transistor scaling without compromising the device performance. Therefore, it is necessary to conduct a physics based investigation of the effects of mechanical strain in silicon MOS device performance enhancement, as the transverse and longitudinal device dimensions scale down for future technology nodes. While silicon is widely used as the material basis for logic transistors, AlGaN/GaN HEMTs promise a superior device platform over silicon based power MOSFETs for high-frequency and high-power applications. In contrast to the mature Si crystal growth technology, the abundance of defects in the GaN material system creates obstacles for the realization of a reliable AlGaN/GaN HEMT device technology. Due to the high levels of internal mechanical strain present in AlGaN/GaN HEMTs, it is of utmost importance to understand the impact of mechanical stress on AlGaN/GaN trap generation. First, we have investigated the underlying physics of the comparable electron mobility observed in (100) and (110) sidewall silicon double-gate FinFETs, which is different from the observed planar (100) and (110) electron mobility. By conducting a systematic experimental study, it is shown that the undoped body, metal gate induced stress, and volume-inversion effects do not explain the comparable electron mobility. Using a self-consistent double-gate FinFET simulator, we have showed that for (110) FinFETs, an increased population of electrons is obtained for the Delta2 valley due to the heavy nonparabolic confinement mass, leading to a comparable average electron transport effective mass for both orientations. The width dependent strain response of tri-gate p-type FinFETs are experimentally extracted using a 4-point bending jig. It is found that the low-field piezoresistance coefficient of p-type FinFETs can be modeled by using a weighted conductance average of the top and sidewall bulk piezoresistance coefficients. Next, the strain enhancement of p-type ballistic silicon nanowire MOSFETs is studied using sp3d 5s* basis nearest-neighbor tight-binding simulations coupled with a semiclassical top-of-the-barrier transport model. Size and orientation dependent strain enhancement of ballistic hole transport is explained by the strain-induced modification of the 1D nanowire valence band density-of-states. Further insights are provided for future p-type high-performance silicon nanowire logic devices. A physics based investigation is conducted to understand the strain effects on surface roughness limited electron mobility in silicon inversion layers. Based on the evidence from electrical and material characterization, a strain-induced surface morphology change is hypothesized. To model the observed electrical characteristics, we have employed a self-consistent MOSFET mobility simulator coupled with an ad hoc strain-induced roughness modification. The strain induced surface morphology change is found to be consistent among electrical and materials characterization, as well as transport simulations. In order to bridge the gap between the drift-diffusion based models for long-channel devices and the quasi-ballistic models for nanoscale channels, a unified carrier transport model is developed using an updated one-flux theory. Including the high-field and carrier confinement effects, a surface-potential based analytical transmission expression is obtained for the entire MOSFET operation range. With the new channel transmission equation and average carrier drift velocity, a new expression for channel ballisticity is defined. Impact of mechanical strain on carrier transport for both nMOSFETs and pMOSFETs in both linear and saturation regimes is explained using the new channel transmission definitions. To understand the impact of mechanical strain on AlGaN/GaN HEMT trap generation, we have devised an experimental method to obtain the photon flux-normalized relative areal trap density distribution using photoionization spectroscopy technique. The details of the trap extraction method and the experimental setup are given. Using this setup, the trap characteristics are extracted for both ungated transmission line module (TLM) and gated HEMT devices from both Si and SiC substrates. The changes in the device trap characteristics are emphasized before and after electrical stressing. It is found through the step-voltage stressing of the AlGaN/GaN HEMT gate stack that the device degradation is due to the near bandgap trap generation, which are shown to be related to the structural defects in GaN.

Process dependency on threshold voltage of GaN MOSFET on AlGaN/GaN heterostructure

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Jiang, Ying; Miyashita, Takahiro; Motoyama, Shin-ichi; Li, Liuan; Wang, Dejun; Ohno, Yasuo; Ao, Jin-Ping

2014-09-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with recessed gate on AlGaN/GaN heterostructure are reported in which the drain and source ohmic contacts were fabricated on the AlGaN/GaN heterostructure and the electron channel was formed on the GaN buffer layer by removing the AlGaN barrier layer. Negative threshold voltages were commonly observed in all devices. To investigate the reasons of the negative threshold voltages, different oxide thickness, etching gas and bias power of inductively-coupled plasma (ICP) system were utilized in the fabrication process of the GaN MOSFETs. It is found that positive charges of around 1 × 1012 q/cm2 exist near the interface at the just threshold condition in both silane- and tetraethylorthosilicate (TEOS)-based devices. It is also found that the threshold voltages do not obviously change with the different etching gas (SiCl4, BCl3 and two-step etching of SiCl4/Cl2) at the same ICP bias power level (20-25 W) and will become deeper when higher bias power is used in the dry recess process which may be related to the much serious ion bombardment damage. Furthermore, X-ray photoelectron spectroscopy (XPS) experiments were done to investigate the surface conditions. It is found that N 1s peaks become lower with higher bias power of the dry etching process. Also, silicon contamination was found and could be removed by HNO3/HF solution. It indicates that the nitrogen vacancies are mainly responsible for the negative threshold voltages rather than the silicon contamination. It demonstrates that optimization of the ICP recess conditions and improvement of the surface condition are still necessary to realize enhancement-mode GaN MOSFETs on AlGaN/GaN heterostructure.

The Development of III-V Semiconductor MOSFETs for Future CMOS Applications

NASA Astrophysics Data System (ADS)

Greene, Andrew M.

Alternative channel materials with superior transport properties over conventional strained silicon are required for supply voltage scaling in low power complementary metal-oxide-semiconductor (CMOS) integrated circuits. Group III-V compound semiconductor systems offer a potential solution due to their high carrier mobility, low carrier effective mass and large injection velocity. The enhancement in transistor drive current at a lower overdrive voltage allows for the scaling of supply voltage while maintaining high switching performance. This thesis focuses on overcoming several material and processing challenges associated with III-V semiconductor development including a low thermal processing budget, high interface trap state density (Dit), low resistance source/drain contacts and growth on lattice mismatched substrates. Non-planar In0.53Ga0.47As FinFETs were developed using both "gate-first" and "gate-last" fabrication methods for n-channel MOSFETs. Electron beam lithography and anisotropic plasma etching processes were optimized to create highly scaled fins with near vertical sidewalls. Plasma damage was removed using a wet etch process and improvements in gate efficiency were characterized on MOS capacitor structures. A two-step, selective removal of the pre-grown n+ contact layer was developed for "gate-last" recess etching. The final In0.53Ga 0.47As FinFET devices demonstrated an ION = 70 mA/mm, I ON/IOFF ratio = 15,700 and sub-threshold swing = 210 mV/dec. Bulk GaSb and strained In0.36Ga0.64Sb quantum well (QW) heterostructures were developed for p-channel MOSFETs. Dit was reduced to 2 - 3 x 1012 cm-2eV-1 using an InAs surface layer, (NH4)2S passivation and atomic layer deposition (ALD) of Al2O3. A self-aligned "gate-first" In0.36Ga0.64Sb MOSFET fabrication process was invented using a "T-shaped" electron beam resist patterning stack and intermetallic source/drain contacts. Ni contacts annealed at 300°C demonstrated an ION = 166 mA/mm, ION/IOFF ratio = 1,500 and sub-threshold swing = 340 mV/dec. Split C-V measurements were used to extract an effective channel mobility of muh* = 300 cm2/Vs at Ns = 2 x 1012 cm -2. "Gate-last" MOSFETs grown with an epitaxial p + contact layer were fabricated using selective gate-recess etching techniques. A parasitic "n-channel" limited ION/I OFF ratio and sub-threshold swing, most likely due to effects from the InAs surface layer.

Single-Event Gate Rupture in Power MOSFETs: A New Radiation Hardness Assurance Approach

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2011-01-01

Almost every space mission uses vertical power metal-semiconductor-oxide field-effect transistors (MOSFETs) in its power-supply circuitry. These devices can fail catastrophically due to single-event gate rupture (SEGR) when exposed to energetic heavy ions. To reduce SEGR failure risk, the off-state operating voltages of the devices are derated based upon radiation tests at heavy-ion accelerator facilities. Testing is very expensive. Even so, data from these tests provide only a limited guide to on-orbit performance. In this work, a device simulation-based method is developed to measure the response to strikes from heavy ions unavailable at accelerator facilities but posing potential risk on orbit. This work is the first to show that the present derating factor, which was established from non-radiation reliability concerns, is appropriate to reduce on-orbit SEGR failure risk when applied to data acquired from ions with appropriate penetration range. A second important outcome of this study is the demonstration of the capability and usefulness of this simulation technique for augmenting SEGR data from accelerator beam facilities. The mechanisms of SEGR are two-fold: the gate oxide is weakened by the passage of the ion through it, and the charge ionized along the ion track in the silicon transiently increases the oxide electric field. Most hardness assurance methodologies consider the latter mechanism only. This work demonstrates through experiment and simulation that the gate oxide response should not be neglected. In addition, the premise that the temporary weakening of the oxide due to the ion interaction with it, as opposed to due to the transient oxide field generated from within the silicon, is validated. Based upon these findings, a new approach to radiation hardness assurance for SEGR in power MOSFETs is defined to reduce SEGR risk in space flight projects. Finally, the potential impact of accumulated dose over the course of a space mission on SEGR susceptibility is explored. SEGR evaluation of gamma-irradiated power MOSFETs suggests a non-significant SEGR susceptibility enhancement due to accumulated dose from gamma rays. During SEGR testing, an unexpected enhanced dose effect from heavy-ion irradiation was detected. We demonstrate that this effect could be due to direct ionization by two or more ions at the same channel location. The probability on-orbit for such an occurrence is near-zero given the low heavy-ion fluence over a typical mission lifetime, and did not affect SEGR susceptibility. The results of this work can be used to bound the risk of SEGR in power MOSFETs considered for insertion into spacecraft and instruments.

SOI CMOS Imager with Suppression of Cross-Talk

NASA Technical Reports Server (NTRS)

Pain, Bedabrata; Zheng, Xingyu; Cunningham, Thomas J.; Seshadri, Suresh; Sun, Chao

2009-01-01

A monolithic silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) image-detecting integrated circuit of the active-pixel-sensor type, now undergoing development, is designed to operate at visible and near-infrared wavelengths and to offer a combination of high quantum efficiency and low diffusion and capacitive cross-talk among pixels. The imager is designed to be especially suitable for astronomical and astrophysical applications. The imager design could also readily be adapted to general scientific, biological, medical, and spectroscopic applications. One of the conditions needed to ensure both high quantum efficiency and low diffusion cross-talk is a relatively high reverse bias potential (between about 20 and about 50 V) on the photodiode in each pixel. Heretofore, a major obstacle to realization of this condition in a monolithic integrated circuit has been posed by the fact that the required high reverse bias on the photodiode is incompatible with metal oxide/semiconductor field-effect transistors (MOSFETs) in the CMOS pixel readout circuitry. In the imager now being developed, the SOI structure is utilized to overcome this obstacle: The handle wafer is retained and the photodiode is formed in the handle wafer. The MOSFETs are formed on the SOI layer, which is separated from the handle wafer by a buried oxide layer. The electrical isolation provided by the buried oxide layer makes it possible to bias the MOSFETs at CMOS-compatible potentials (between 0 and 3 V), while biasing the photodiode at the required higher potential, and enables independent optimization of the sensory and readout portions of the imager.

Submicrosecond Power-Switching Test Circuit

NASA Technical Reports Server (NTRS)

Folk, Eric N.

2006-01-01

A circuit that changes an electrical load in a switching time shorter than 0.3 microsecond has been devised. This circuit can be used in testing the regulation characteristics of power-supply circuits . especially switching power-converter circuits that are supposed to be able to provide acceptably high degrees of regulation in response to rapid load transients. The combination of this power-switching circuit and a known passive constant load could be an attractive alternative to a typical commercially available load-bank circuit that can be made to operate in nominal constant-voltage, constant-current, and constant-resistance modes. The switching provided by a typical commercial load-bank circuit in the constant-resistance mode is not fast enough for testing of regulation in response to load transients. Moreover, some test engineers do not trust the test results obtained when using commercial load-bank circuits because the dynamic responses of those circuits are, variously, partly unknown and/or excessively complex. In contrast, the combination of this circuit and a passive constant load offers both rapid switching and known (or at least better known) load dynamics. The power-switching circuit (see figure) includes a signal-input section, a wide-hysteresis Schmitt trigger that prevents false triggering in the event of switch-contact bounce, a dual-bipolar-transistor power stage that drives the gate of a metal oxide semiconductor field-effect transistor (MOSFET), and the MOSFET, which is the output device that performs the switching of the load. The MOSFET in the specific version of the circuit shown in the figure is rated to stand off a potential of 100 V in the "off" state and to pass a current of 20 A in the "on" state. The switching time of this circuit (the characteristic time of rise or fall of the potential at the drain of the MOSFET) is .300 ns. The circuit can accept any of three control inputs . which one depending on the test that one seeks to perform: a repetitive waveform from a signal generator, momentary closure of a push-button switch, or closure or opening of a manually operated on/off switch. In the case of a signal generator, one can adjust the frequency and duty cycle as needed to obtain the desired AC power-supply response, which one could display on an oscilloscope. Momentary switch closure could be useful for obtaining (and, if desired, displaying on an oscilloscope set to trigger on an event) the response of a power supply to a single load transient. The on/off switch can be used to switch between load states in which static-load regulation measurements are performed.

Device Performance and Reliability Improvements of AlGaBN/GaN/Si MOSFET

DTIC Science & Technology

2016-02-04

Metal insulator semiconductor AlGaN /GaN high electron mobility transistors (MISHEMTs) are promising for power device applications due to a lower leakage...current than the conventional Schottky AlGaN/GaN HEMTs.1–3 Among a large number of insulator materials, an Al2O3 dielectric layer, deposited by...atomic layer deposition (ALD), is often employed as the gate insulator because of a large band gap (and the resultant high conduction band offset on

Limiting CT radiation dose in children with craniosynostosis: phantom study using model-based iterative reconstruction.

PubMed

Kaasalainen, Touko; Palmu, Kirsi; Lampinen, Anniina; Reijonen, Vappu; Leikola, Junnu; Kivisaari, Riku; Kortesniemi, Mika

2015-09-01

Medical professionals need to exercise particular caution when developing CT scanning protocols for children who require multiple CT studies, such as those with craniosynostosis. To evaluate the utility of ultra-low-dose CT protocols with model-based iterative reconstruction techniques for craniosynostosis imaging. We scanned two pediatric anthropomorphic phantoms with a 64-slice CT scanner using different low-dose protocols for craniosynostosis. We measured organ doses in the head region with metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters. Numerical simulations served to estimate organ and effective doses. We objectively and subjectively evaluated the quality of images produced by adaptive statistical iterative reconstruction (ASiR) 30%, ASiR 50% and Veo (all by GE Healthcare, Waukesha, WI). Image noise and contrast were determined for different tissues. Mean organ dose with the newborn phantom was decreased up to 83% compared to the routine protocol when using ultra-low-dose scanning settings. Similarly, for the 5-year phantom the greatest radiation dose reduction was 88%. The numerical simulations supported the findings with MOSFET measurements. The image quality remained adequate with Veo reconstruction, even at the lowest dose level. Craniosynostosis CT with model-based iterative reconstruction could be performed with a 20-μSv effective dose, corresponding to the radiation exposure of plain skull radiography, without compromising required image quality.

Multi-Dimensional Quantum Effect Simulation Using a Density-Gradient Model and Script-Level Programming Techniques

NASA Technical Reports Server (NTRS)

Rafferty, Connor S.; Biegel, Bryan A.; Yu, Zhi-Ping; Ancona, Mario G.; Bude, J.; Dutton, Robert W.; Saini, Subhash (Technical Monitor)

1998-01-01

A density-gradient (DG) model is used to calculate quantum-mechanical corrections to classical carrier transport in MOS (Metal Oxide Semiconductor) inversion/accumulation layers. The model is compared to measured data and to a fully self-consistent coupled Schrodinger and Poisson equation (SCSP) solver. Good agreement is demonstrated for MOS capacitors with gate oxide as thin as 21 A. It is then applied to study carrier distribution in ultra short MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) with surface roughness. This work represents the first implementation of the DG formulation on multidimensional unstructured meshes. It was enabled by a powerful scripting approach which provides an easy-to-use and flexible framework for solving the fourth-order PDEs (Partial Differential Equation) of the DG model.

Methods for growth of relatively large step-free SiC crystal surfaces

NASA Technical Reports Server (NTRS)

Neudeck, Philip G. (Inventor); Powell, J. Anthony (Inventor)

2002-01-01

A method for growing arrays of large-area device-size films of step-free (i.e., atomically flat) SiC surfaces for semiconductor electronic device applications is disclosed. This method utilizes a lateral growth process that better overcomes the effect of extended defects in the seed crystal substrate that limited the obtainable step-free area achievable by prior art processes. The step-free SiC surface is particularly suited for the heteroepitaxial growth of 3C (cubic) SiC, AlN, and GaN films used for the fabrication of both surface-sensitive devices (i.e., surface channel field effect transistors such as HEMT's and MOSFET's) as well as high-electric field devices (pn diodes and other solid-state power switching devices) that are sensitive to extended crystal defects.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Spathis, C., E-mail: cspathis@ece.upatras.gr; Birbas, A.; Georgakopoulou, K.

Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel andmore » quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.« less

High performance tunnel field-effect transistor by gate and source engineering.

PubMed

Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

2014-12-19

As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

Carbon nanotube transistor based high-frequency electronics

NASA Astrophysics Data System (ADS)

Schroter, Michael

At the nanoscale carbon nanotubes (CNTs) have higher carrier mobility and carrier velocity than most incumbent semiconductors. Thus CNT based field-effect transistors (FETs) are being considered as strong candidates for replacing existing MOSFETs in digital applications. In addition, the predicted high intrinsic transit frequency and the more recent finding of ways to achieve highly linear transfer characteristics have inspired investigations on analog high-frequency (HF) applications. High linearity is extremely valuable for an energy efficient usage of the frequency spectrum, particularly in mobile communications. Compared to digital applications, the much more relaxed constraints for CNT placement and lithography combined with already achieved operating frequencies of at least 10 GHz for fabricated devices make an early entry in the low GHz HF market more feasible than in large-scale digital circuits. Such a market entry would be extremely beneficial for funding the development of production CNTFET based process technology. This talk will provide an overview on the present status and feasibility of HF CNTFET technology will be given from an engineering point of view, including device modeling, experimental results, and existing roadblocks.

In-depth analysis and modelling of self-heating effects in nanometric DGMOSFETs

NASA Astrophysics Data System (ADS)

Roldán, J. B.; González, B.; Iñiguez, B.; Roldán, A. M.; Lázaro, A.; Cerdeira, A.

2013-01-01

Self-heating effects (SHEs) in nanometric symmetrical double-gate MOSFETs (DGMOSFETs) have been analysed. An equivalent thermal circuit for the transistors has been developed to characterise thermal effects, where the temperature and thickness dependency of the thermal conductivity of the silicon and oxide layers within the devices has been included. The equivalent thermal circuit is consistent with simulations using a commercial technology computer-aided design (TCAD) tool (Sentaurus by Synopsys). In addition, a model for DGMOSFETs has been developed where SHEs have been considered in detail, taking into account the temperature dependence of the low-field mobility, saturation velocity, and inversion charge. The model correctly reproduces Sentaurus simulation data for the typical bias range used in integrated circuits. Lattice temperatures predicted by simulation are coherently reproduced by the model for varying silicon layer geometry.

3D assembly of carbon nanotubes for fabrication of field-effect transistors through nanomanipulation and electron-beam-induced deposition

NASA Astrophysics Data System (ADS)

Yu, Ning; Shi, Qing; Nakajima, Masahiro; Wang, Huaping; Yang, Zhan; Sun, Lining; Huang, Qiang; Fukuda, Toshio

2017-10-01

Three-dimensional carbon nanotube field-effect transistors (3D CNTFETs) possess predictable characteristics that rival those of planar CNTFETs and Si-based MOSFETs. However, due to the lack of a reliable assembly technology, they are rarely reported on, despite the amount of attention they receive. To address this problem, we propose the novel concept of a 3D CNTFET and develop its assembly strategy based on nanomanipulation and the electron-beam-induced deposition (EBID) technique inside a scanning electron microscope (SEM). In particular, the electrodes in our transistor design are three metallic cuboids of the same size, and their front, top and back surfaces are all wrapped up in CNTs. The assembly strategy is employed to build the structure through a repeated basic process of pick-up, placement, fixing and cutting of CNTs. The pick-up and placement is performed through one nanomanipulator with four degrees of freedom. Fixing is carried out through the EBID technique so as to improve the mechanical and electrical characteristics of the CNT/electrodes connection. CNT cutting is undertaken using the typical method of electrical breakdown. Experimental results showed that two CNTs were successfully assembled on the front sides of the cubic electrodes. This validates our assembly method for the 3D CNTFET. Also, when contact resistance was measured, tens of kilohms of resistance was observed at the CNT-EBID deposition-FET electrodes junction.. This manifests the electrical reliability of our assembly strategy.

Electrical Transport Ability of Nanostructured Potassium-Doped Titanium Oxide Film

NASA Astrophysics Data System (ADS)

Lee, So-Yoon; Matsuno, Ryosuke; Ishihara, Kazuhiko; Takai, Madoka

2011-02-01

Potassium-doped nanostructured titanium oxide films were fabricated using a wet corrosion process with various KOH solutions. The doped condition of potassium in TiO2 was confirmed by Raman spectroscopy and X-ray photoelectron spectroscopy (XPS). Nanotubular were synthesized at a dopant concentration of <0.27% when the dopant concentration increased to >0.27%, these structures disappeared. To investigate the electrical properties of K-doped TiO2, pseudo metal-oxide-semiconductor field-effect transistor (MOSFET) samples were fabricated. The samples exhibited a distinct electrical behavior and p-type characteristics. The electrical behavior was governed by the volume of the dopant when the dopant concentration was <0.10% and the volume of the TiO2 phase when the dopant concentration was >0.18%.

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection

PubMed Central

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-01

We developed a Fabry–Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction. PMID:29304011

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection.

PubMed

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-05

We developed a Fabry-Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction.

Modelling short channel mosfets for use in VLSI

NASA Technical Reports Server (NTRS)

Klafter, Alex; Pilorz, Stuart; Polosa, Rosa Loguercio; Ruddock, Guy; Smith, Andrew

1986-01-01

In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.

Lateral resolution improvement in scanning nonlinear dielectric microscopy by measuring super-higher-order nonlinear dielectric constants

NASA Astrophysics Data System (ADS)

Chinone, N.; Yamasue, K.; Hiranaga, Y.; Honda, K.; Cho, Y.

2012-11-01

Scanning nonlinear dielectric microscopy (SNDM) can be used to visualize polarization distributions in ferroelectric materials and dopant profiles in semiconductor devices. Without using a special sharp tip, we achieved an improved lateral resolution in SNDM through the measurement of super-higher-order nonlinearity up to the fourth order. We observed a multidomain single crystal congruent LiTaO3 (CLT) sample, and a cross section of a metal-oxide-semiconductor (MOS) field-effect-transistor (FET). The imaged domain boundaries of the CLT were narrower in the super-higher-order images than in the conventional image. Compared to the conventional method, the super-higher-order method resolved the more detailed structure of the MOSFET.

ZnO nanorods for electronic and photonic device applications

NASA Astrophysics Data System (ADS)

Yi, Gyu-Chul; Yoo, Jinkyoung; Park, Won Il; Jung, Sug Woo; An, Sung Jin; Kim, H. J.; Kim, D. W.

2005-11-01

We report on catalyst-free growth of ZnO nanorods and their nano-scale electrical and optical device applications. Catalyst-free metalorganic vapor-phase epitaxy (MOVPE) enables fabrication of size-controlled high purity ZnO single crystal nanorods. Various high quality nanorod heterostructures and quantum structures based on ZnO nanorods were also prepared using the MOVPE method and characterized using scanning electron microscopy, transmission electron microscopy, and optical spectroscopy. From the photoluminescence spectra of ZnO/Zn 0.8Mg 0.2O nanorod multi-quantum-well structures, in particular, we observed a systematic blue-shift in their PL peak position due to quantum confinement effect of carriers in nanorod quantum structures. For ZnO/ZnMgO coaxial nanorod heterostructures, photoluminescence intensity was significantly increased presumably due to surface passivation and carrier confinement. In addition to the growth and characterizations of ZnO nanorods and their quantum structures, we fabricated nanoscale electronic devices based on ZnO nanorods. We report on fabrication and device characteristics of metal-oxidesemiconductor field effect transistors (MOSFETs), Schottky diodes, and metal-semiconductor field effect transistors (MESFETs) as examples of the nanodevices. In addition, electroluminescent devices were fabricated using vertically aligned ZnO nanorods grown p-type GaN substrates, exhibiting strong visible electroluminescence.

Implementation of an intraoperative electron radiotherapy in vivo dosimetry program.

PubMed

López-Tarjuelo, Juan; Morillo-Macías, Virginia; Bouché-Babiloni, Ana; Boldó-Roda, Enrique; Lozoya-Albacar, Rafael; Ferrer-Albiach, Carlos

2016-03-15

Intraoperative electron radiotherapy (IOERT) is a highly selective radiotherapy technique which aims to treat restricted anatomic volumes during oncological surgery and is now the subject of intense re-evaluation. In vivo dosimetry has been recommended for IOERT and has been identified as a risk-reduction intervention in the context of an IOERT risk analysis. Despite reports of fruitful experiences, information about in vivo dosimetry in intraoperative radiotherapy is somewhat scarce. Therefore, the aim of this paper is to report our experience in developing a program of in vivo dosimetry for IOERT, from both multidisciplinary and practical approaches, in a consistent patient series. We also report several current weaknesses. Reinforced TN-502RDM-H mobile metal oxide semiconductor field effect transistors (MOSFETs) and Gafchromic MD-55-2 films were used as a redundant in vivo treatment verification system with an Elekta Precise fixed linear accelerator for calibrations and treatments. In vivo dosimetry was performed in 45 patients in cases involving primary tumors or relapses. The most frequent primary tumors were breast (37 %) and colorectal (29 %), and local recurrences among relapses was 83 %. We made 50 attempts to measure with MOSFETs and 48 attempts to measure with films in the treatment zones. The surgical team placed both detectors with supervision from the radiation oncologist and following their instructions. The program was considered an overall success by the different professionals involved. The absorbed doses measured with MOSFETs and films were 93.8 ± 6.7 % and 97.9 ± 9.0 % (mean ± SD) respectively using a scale in which 90 % is the prescribed dose and 100 % is the maximum absorbed dose delivered by the beam. However, in 10 % of cases we experienced dosimetric problems due to detector misalignment, a situation which might be avoided with additional checks. The useful MOSFET lifetime length and the film sterilization procedure should also be controlled. It is feasible to establish an in vivo dosimetry program for a wide set of locations treated with IOERT using a multidisciplinary approach according to the skills of the professionals present and the detectors used; oncological surgeons' commitment is key to success in this context. Films are more unstable and show higher uncertainty than MOSFETs but are cheaper and are useful and convenient if real-time treatment monitoring is not necessary.

Measurement of the quantum capacitance from two-dimensional surface state of a topological insulator at room temperature

NASA Astrophysics Data System (ADS)

Choi, Hyunwoo; Kim, Tae Geun; Shin, Changhwan

2017-06-01

A topological insulator (TI) is a new kind of material that exhibits unique electronic properties owing to its topological surface state (TSS). Previous studies focused on the transport properties of the TSS, since it can be used as the active channel layer in metal-oxide-semiconductor field-effect transistors (MOSFETs). However, a TI with a negative quantum capacitance (QC) effect can be used in the gate stack of MOSFETs, thereby facilitating the creation of ultra-low power electronics. Therefore, it is important to study the physics behind the QC in TIs in the absence of any external magnetic field, at room temperature. We fabricated a simple capacitor structure using a TI (TI-capacitor: Au-TI-SiO2-Si), which shows clear evidence of QC at room temperature. In the capacitance-voltage (C-V) measurement, the total capacitance of the TI-capacitor increases in the accumulation regime, since QC is the dominant capacitive component in the series capacitor model (i.e., CT-1 = CQ-1 + CSiO2-1). Based on the QC model of the two-dimensional electron systems, we quantitatively calculated the QC, and observed that the simulated C-V curve theoretically supports the conclusion that the QC of the TI-capacitor is originated from electron-electron interaction in the two-dimensional surface state of the TI.

Fabrication of 4H-SiC lateral double implanted MOSFET on an on-axis semi-insulating substrate without using epi-layer

NASA Astrophysics Data System (ADS)

Kim, Hyoung Woo; Seok, Ogyun; Moon, Jeong Hyun; Bahng, Wook; Jo, Jungyol

2017-12-01

4H-SiC lateral double implanted metal-oxide-semiconductor field effect transistors (LDIMOSFET) were fabricated on on-axis semi-insulating SiC substrates without using an epi-layer. The LDIMOSFET adopted a current path layer (CPL), which was formed by ion-implantation. The CPL works as a drift region between gate and drain. By using on-axis semi-insulating substrate and optimized CPL parameters, breakdown voltage (BV) of 1093 V and specific on-resistance (R on,sp) of 89.8 mΩ·cm2 were obtained in devices with 20 µm long CPL. Experimentally extracted field-effect channel mobility was 21.7 cm2·V-1·s-1 and the figure-of-merit (BV2/R on,sp) was 13.3 MW/cm2.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1979-01-01

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

How small can MOSFETs get?

NASA Astrophysics Data System (ADS)

Risch, Lothar

2001-10-01

Scaling of CMOS technology made possible the key appliances of our information technology society, like the PC, mobile communication, and the internet. Reduction of feature sizes for semiconductor devices continued according to Moore's law for the last 25 years in order to achieve higher integration densities, higher speed, lower power consumption, and lower costs. But now, as we approach the sub 100 nm regime, several roadblocks have been predicted for the next generations down to 35 nm. The latest ITRS roadmap 99 describes in detail the challenges which have to be addressed for the future CMOS technology nodes, regarding lithography, metallization, power dissipation, and circuit design. Also for the MOSFET, performance degradation is a big issue. Because this is not a limitation from basic physical laws, novel architectures for MOSFETs will be needed to improve again the electrical characteristics and thus pave the way to much smaller transistors than expected in the past. 25 nm CMOS seems to be feasible using very thin silicon substrates on insulator. Further improvements down to 10 nm are very likely with two gates for the control of the charge carriers. So, it is very likely that CMOS will not end with today's roadmap at 35 nm or even before, but may continue with non bulk devices and fully depleted channels. Finally, tunnelling from source to drain will set an end to the reduction of channel length, which is estimated to be below 5 nm.

Peripheral dose measurement in high-energy photon radiotherapy with the implementation of MOSFET.

PubMed

Vlachopoulou, Vassiliki; Malatara, Georgia; Delis, Harry; Theodorou, Kiki; Kardamakis, Dimitrios; Panayiotakis, George

2010-11-28

To study the peripheral dose (PD) from high-energy photon beams in radiotherapy using the metal oxide semiconductor field effect transistor (MOSFET) dose verification system. The radiation dose absorbed by the MOSFET detector was calculated taking into account the manufacturer's Correction Factor, the Calibration Factor and the threshold voltage shift. PD measurements were carried out for three different field sizes (5 cm × 5 cm, 10 cm × 10 cm and 15 cm × 15 cm) and for various depths with the source to surface distance set at 100 cm. Dose measurements were realized on the central axis and then at distances (1 to 18 cm) parallel to the edge of the field, and were expressed as the percentage PD (% PD) with respect to the maximum dose (d(max)). The accuracy of the results was evaluated with respect to a calibrated 0.3 cm(3) ionization chamber. The reproducibility was expressed in terms of standard deviation (s) and coefficient of variation. % PD is higher near the phantom surface and drops to a minimum at the depth of d(max), and then tends to become constant with depth. Internal scatter radiation is the predominant source of PD and the depth dependence is determined by the attenuation of the primary photons. Closer to the field edge, where internal scatter from the phantom dominates, the % PD increases with depth because the ratio of the scatter to primary increases with depth. A few centimeters away from the field, where collimator scatter and leakage dominate, the % PD decreases with depth, due to attenuation by the water. The % PD decreases almost exponentially with the increase of distance from the field edge. The decrease of the % PD is more than 60% and can reach up to 90% as the measurement point departs from the edge of the field. For a given distance, the % PD is significantly higher for larger field sizes, due to the increase of the scattering volume. Finally, the measured PD obtained with MOSFET is higher than that obtained with an ionization chamber with percentage differences being from 0.6% to 34.0%. However, when normalized to the central d(max) this difference is less than 1%. The MOSFET system, in the early stage of its life, has a dose measurement reproducibility of within 1.8%, 2.7%, 8.9% and 13.6% for 22.8, 11.3, 3.5 and 1.3 cGy dose assessments, respectively. In the late stage of MOSFET life the corresponding values change to 1.5%, 4.8%, 11.1% and 29.9% for 21.8, 2.9, 1.6 and 1.0 cGy, respectively. Comparative results acquired with the MOSFET and with an ionization chamber show fair agreement, supporting the suitability of this measurement for clinical in vivo dosimetry.

Peripheral dose measurement in high-energy photon radiotherapy with the implementation of MOSFET

PubMed Central

Vlachopoulou, Vassiliki; Malatara, Georgia; Delis, Harry; Theodorou, Kiki; Kardamakis, Dimitrios; Panayiotakis, George

2010-01-01

AIM: To study the peripheral dose (PD) from high-energy photon beams in radiotherapy using the metal oxide semiconductor field effect transistor (MOSFET) dose verification system. METHODS: The radiation dose absorbed by the MOSFET detector was calculated taking into account the manufacturer’s Correction Factor, the Calibration Factor and the threshold voltage shift. PD measurements were carried out for three different field sizes (5 cm × 5 cm, 10 cm × 10 cm and 15 cm × 15 cm) and for various depths with the source to surface distance set at 100 cm. Dose measurements were realized on the central axis and then at distances (1 to 18 cm) parallel to the edge of the field, and were expressed as the percentage PD (% PD) with respect to the maximum dose (dmax). The accuracy of the results was evaluated with respect to a calibrated 0.3 cm3 ionization chamber. The reproducibility was expressed in terms of standard deviation (s) and coefficient of variation. RESULTS: % PD is higher near the phantom surface and drops to a minimum at the depth of dmax, and then tends to become constant with depth. Internal scatter radiation is the predominant source of PD and the depth dependence is determined by the attenuation of the primary photons. Closer to the field edge, where internal scatter from the phantom dominates, the % PD increases with depth because the ratio of the scatter to primary increases with depth. A few centimeters away from the field, where collimator scatter and leakage dominate, the % PD decreases with depth, due to attenuation by the water. The % PD decreases almost exponentially with the increase of distance from the field edge. The decrease of the % PD is more than 60% and can reach up to 90% as the measurement point departs from the edge of the field. For a given distance, the % PD is significantly higher for larger field sizes, due to the increase of the scattering volume. Finally, the measured PD obtained with MOSFET is higher than that obtained with an ionization chamber with percentage differences being from 0.6% to 34.0%. However, when normalized to the central dmax this difference is less than 1%. The MOSFET system, in the early stage of its life, has a dose measurement reproducibility of within 1.8%, 2.7%, 8.9% and 13.6% for 22.8, 11.3, 3.5 and 1.3 cGy dose assessments, respectively. In the late stage of MOSFET life the corresponding values change to 1.5%, 4.8%, 11.1% and 29.9% for 21.8, 2.9, 1.6 and 1.0 cGy, respectively. CONCLUSION: Comparative results acquired with the MOSFET and with an ionization chamber show fair agreement, supporting the suitability of this measurement for clinical in vivo dosimetry. PMID:21179311

Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

NASA Astrophysics Data System (ADS)

Singh, Anil; Agarwal, Alpana

2016-10-01

A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

The 5-kW arcjet power electronics

NASA Technical Reports Server (NTRS)

Gruber, R. P.; Gott, R. W.; Haag, T. W.

1989-01-01

The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

Hot-Electron-Induced Device Degradation during Gate-Induced Drain Leakage Stress

NASA Astrophysics Data System (ADS)

Kim, Kwang-Soo; Han, Chang-Hoon; Lee, Jun-Ki; Kim, Dong-Soo; Kim, Hyong-Joon; Shin, Joong-Shik; Lee, Hea-Beoum; Choi, Byoung-Deog

2012-11-01

We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.

A High-Linearity Low-Noise Amplifier with Variable Bandwidth for Neural Recoding Systems

NASA Astrophysics Data System (ADS)

Yoshida, Takeshi; Sueishi, Katsuya; Iwata, Atsushi; Matsushita, Kojiro; Hirata, Masayuki; Suzuki, Takafumi

2011-04-01

This paper describes a low-noise amplifier with multiple adjustable parameters for neural recording applications. An adjustable pseudo-resistor implemented by cascade metal-oxide-silicon field-effect transistors (MOSFETs) is proposed to achieve low-signal distortion and wide variable bandwidth range. The amplifier has been implemented in 0.18 µm standard complementary metal-oxide-semiconductor (CMOS) process and occupies 0.09 mm2 on chip. The amplifier achieved a selectable voltage gain of 28 and 40 dB, variable bandwidth from 0.04 to 2.6 Hz, total harmonic distortion (THD) of 0.2% with 200 mV output swing, input referred noise of 2.5 µVrms over 0.1-100 Hz and 18.7 µW power consumption at a supply voltage of 1.8 V.

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

PubMed Central

Zhao, Chun; Zhao, Ce Zhou; Lu, Qifeng; Yan, Xiaoyi; Taylor, Stephen; Chalker, Paul R.

2014-01-01

Oxide materials with large dielectric constants (so-called high-k dielectrics) have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). A novel characterization (pulse capacitance-voltage) method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS) capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future. PMID:28788225

Contact resistance extraction methods for short- and long-channel carbon nanotube field-effect transistors

NASA Astrophysics Data System (ADS)

Pacheco-Sanchez, Anibal; Claus, Martin; Mothes, Sven; Schröter, Michael

2016-11-01

Three different methods for the extraction of the contact resistance based on both the well-known transfer length method (TLM) and two variants of the Y-function method have been applied to simulation and experimental data of short- and long-channel CNTFETs. While for TLM special CNT test structures are mandatory, standard electrical device characteristics are sufficient for the Y-function methods. The methods have been applied to CNTFETs with low and high channel resistance. It turned out that the standard Y-function method fails to deliver the correct contact resistance in case of a relatively high channel resistance compared to the contact resistances. A physics-based validation is also given for the application of these methods based on applying traditional Si MOSFET theory to quasi-ballistic CNTFETs.

Measuring pacemaker dose: a clinical perspective.

PubMed

Studenski, Matthew T; Xiao, Ying; Harrison, Amy S

2012-01-01

Recently in our clinic, we have seen an increased number of patients presenting with pacemakers and defibrillators. Precautions are taken to develop a treatment plan that minimizes the dose to the pacemaker because of the adverse effects of radiation on the electronics. Here we analyze different dosimeters to determine which is the most accurate in measuring pacemaker or defibrillator dose while at the same time not requiring a significant investment in time to maintain an efficient workflow in the clinic. The dosimeters analyzed here were ion chambers, diodes, metal-oxide-semiconductor field effect transistor (MOSFETs), and optically stimulated luminescence (OSL) dosimeters. A simple phantom was used to quantify the angular and energy dependence of each dosimeter. Next, 8 patients plans were delivered to a Rando phantom with all the dosimeters located where the pacemaker would be, and the measurements were compared with the predicted dose. A cone beam computed tomography (CBCT) image was obtained to determine the dosimeter response in the kilovoltage energy range. In terms of the angular and energy dependence of the dosimeters, the ion chamber and diode were the most stable. For the clinical cases, all the dosimeters match relatively well with the predicted dose, although the ideal dosimeter to use is case dependent. The dosimeters, especially the MOSFETS, tend to be less accurate for the plans, with many lateral beams. Because of their efficiency, we recommend using a MOSFET or a diode to measure the dose. If a discrepancy is observed between the measured and expected dose (especially when the pacemaker to field edge is <10 cm), we recommend analyzing the treatment plan to see whether there are many lateral beams. Follow-up with another dosimeter rather than repeating multiple times with the same type of dosimeter. All dosimeters should be placed after the CBCT has been acquired. Copyright © 2012 American Association of Medical Dosimetrists. Published by Elsevier Inc. All rights reserved.

Measuring pacemaker dose: A clinical perspective

DOE Office of Scientific and Technical Information (OSTI.GOV)

Studenski, Matthew T., E-mail: matthew.studenski@jeffersonhospital.org; Xiao Ying; Harrison, Amy S.

2012-07-01

Recently in our clinic, we have seen an increased number of patients presenting with pacemakers and defibrillators. Precautions are taken to develop a treatment plan that minimizes the dose to the pacemaker because of the adverse effects of radiation on the electronics. Here we analyze different dosimeters to determine which is the most accurate in measuring pacemaker or defibrillator dose while at the same time not requiring a significant investment in time to maintain an efficient workflow in the clinic. The dosimeters analyzed here were ion chambers, diodes, metal-oxide-semiconductor field effect transistor (MOSFETs), and optically stimulated luminescence (OSL) dosimeters. Amore » simple phantom was used to quantify the angular and energy dependence of each dosimeter. Next, 8 patients plans were delivered to a Rando phantom with all the dosimeters located where the pacemaker would be, and the measurements were compared with the predicted dose. A cone beam computed tomography (CBCT) image was obtained to determine the dosimeter response in the kilovoltage energy range. In terms of the angular and energy dependence of the dosimeters, the ion chamber and diode were the most stable. For the clinical cases, all the dosimeters match relatively well with the predicted dose, although the ideal dosimeter to use is case dependent. The dosimeters, especially the MOSFETS, tend to be less accurate for the plans, with many lateral beams. Because of their efficiency, we recommend using a MOSFET or a diode to measure the dose. If a discrepancy is observed between the measured and expected dose (especially when the pacemaker to field edge is <10 cm), we recommend analyzing the treatment plan to see whether there are many lateral beams. Follow-up with another dosimeter rather than repeating multiple times with the same type of dosimeter. All dosimeters should be placed after the CBCT has been acquired.« less

A Resonant Tunneling Nanowire Field Effect Transistor with Physical Contractions: A Negative Differential Resistance Device for Low Power Very Large Scale Integration Applications

NASA Astrophysics Data System (ADS)

Molaei Imen Abadi, Rouzbeh; Saremi, Mehdi

2018-02-01

In this paper, the influence of ultra-scaled physical symmetrical contraction on electrical characteristics of ultra-thin silicon-on-insulator nanowires with circular gate-all-around structure is investigated by using a 3D Atlas numerical quantum simulator based on non-equilibrium green's function formalism. It is demonstrated that local cross-section variation in a nanowire transistor results in the establishment of tunnel energy barriers at the source-channel and drain-channel junctions which change device physics and cause a transmission from a quantum wire (1-D) to a floating quantum dot nanowire (0-D) introducing a resonant tunneling nanowire FET (RT-NWFET) as an interesting concept of nanoscale MOSFETs. The barriers construct resonance energy levels in the channel region of nanowires because of the longitudinal confinement in three directions causing some fluctuation in I D- V GS characteristic. In addition, these barriers remarkably improve the subthreshold swing and minimize the ON/OFF-current ratio degradation at a low operation voltage of 0.5 V. As a result, RT-NWFETs are intrinsically preserved from drain-source tunneling and are an interesting candidate for developing the roadmap below 10 nm.

Noise in Charge Amplifiers— A gm/ID Approach

NASA Astrophysics Data System (ADS)

Alvarez, Enrique; Avila, Diego; Campillo, Hernan; Dragone, Angelo; Abusleme, Angel

2012-10-01

Charge amplifiers represent the standard solution to amplify signals from capacitive detectors in high energy physics experiments. In a typical front-end, the noise due to the charge amplifier, and particularly from its input transistor, limits the achievable resolution. The classic approach to attenuate noise effects in MOSFET charge amplifiers is to use the maximum power available, to use a minimum-length input device, and to establish the input transistor width in order to achieve the optimal capacitive matching at the input node. These conclusions, reached by analysis based on simple noise models, lead to sub-optimal results. In this work, a new approach on noise analysis for charge amplifiers based on an extension of the gm/ID methodology is presented. This method combines circuit equations and results from SPICE simulations, both valid for all operation regions and including all noise sources. The method, which allows to find the optimal operation point of the charge amplifier input device for maximum resolution, shows that the minimum device length is not necessarily the optimal, that flicker noise is responsible for the non-monotonic noise versus current function, and provides a deeper insight on the noise limits mechanism from an alternative and more design-oriented point of view.

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures over the range of -190 C to +225 C in terms of its voltage/current characteristic curves. The test temperatures included +22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 C. Limited thermal cycling testing was also performed on the device. These tests consisted of subjecting the transistor to a total of twelve thermal cycles between -190 C and +225 C. A temperature rate of change of 10 C/min and a soak time at the test temperature of 10 minutes were used throughout this work. Post-cycling measurements were also performed at selected temperatures. In addition, re-start capability at extreme temperatures, i.e. power switched on while the device was soaking for a period of 20 minutes at the test temperatures of -190 C and +225 C, was investigated.

Evaluation of plasma-induced damage and bias temperature instability depending on type of antenna layer using current-starved ring oscillators

NASA Astrophysics Data System (ADS)

Kishida, Ryo; Furuta, Jun; Kobayashi, Kazutoshi

2018-04-01

Plasma-induced damage (PID) and bias temperature instability (BTI) are inevitable reliability issues that degrade the performance of transistors. In this study, PID and BTI, depending on the type of antenna layer, are evaluated in current-starved ring oscillators (ROs) to separate degradations in PMOS and NMOS transistors in a 65 nm silicon-on-insulator (SOI) process. Oscillation frequencies of ROs fluctuate with the performance of MOSFET switches between power/ground rails and virtual power/ground nodes. The initial frequencies of ROs with PMOS switches having antennas on upper layers decrease. However, those with NMOS switches become higher than those without PID because high-k dielectrics are damaged by positive charges. The degradation induced by negative BTI (NBTI) in PMOS is 1.5 times larger than that induced by positive BTI (PBTI) in NMOS. However, both NBTI- and PBTI-induced degradations are the same among different antenna layers. The frequency fluctuation caused by PID is converted to threshold voltage shifts by circuit simulations. Threshold voltages shift by 8.4 and 11% owing to PID in PMOS and NMOS transistors, respectively.

Circuit Methods for VLF Antenna Couplers. [for use in Loran or Omega receiver systems

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1977-01-01

The limitations of different E-field antenna coupler or preamplifier circuits are presented. All circuits were evaluated using actual Loran or Omega signals. Electric field whip or wire antennas are the simplest types which can be used for reception of VLF signals in the 10 to 100 kHz range. JFET or MOSFET transistors provide impedance transformation and some voltage gain in simple circuits where the power for operating the preamplifier uses the same coaxial cable that feeds the signal back to the receiver. The circuit techniques provide useful alternative methods for Loran-Omega receiver system designers.

Low voltage operation of GaN vertical nanowire MOSFET

NASA Astrophysics Data System (ADS)

Son, Dong-Hyeok; Jo, Young-Woo; Seo, Jae Hwa; Won, Chul-Ho; Im, Ki-Sik; Lee, Yong Soo; Jang, Hwan Soo; Kim, Dae-Hyun; Kang, In Man; Lee, Jung-Hee

2018-07-01

GaN gate-all-around (GAA) vertical nanowire MOSFET (VNWMOSFET) with channel length of 300 nm and diameter of 120 nm, the narrowest GaN-based vertical nanowire transistor ever achieved from the top-down approach, was fabricated by utilizing anisotropic side-wall wet etching in TMAH solution and photoresist etch-back process. The VNWMOSFET exhibited output characteristics with very low saturation drain voltage of less than 0.5 V, which is hardly observed from the wide bandgap-based devices. Simulation results indicated that the narrow diameter of the VNWMOSFET with relatively short channel length is responsible for the low voltage operation. The VNWMOSFET also demonstrated normally-off mode with threshold voltage (VTH) of 0.7 V, extremely low leakage current of ∼10-14 A, low drain-induced barrier lowering (DIBL) of 125 mV/V, and subthreshold swing (SS) of 66-122 mV/decade. The GaN GAA VNWMOSFET with narrow channel diameter investigated in this work would be promising for new low voltage logic application. He has been a Professor with the School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu, Korea, since 1993

Analysis of switching characteristics for negative capacitance ultra-thin-body germanium-on-insulator MOSFETs

NASA Astrophysics Data System (ADS)

Pi-Ho Hu, Vita; Chiu, Pin-Chieh

2018-04-01

The impact of device parameters on the switching characteristics of negative capacitance ultra-thin-body (UTB) germanium-on-insulator (NC-GeOI) MOSFETs is analyzed. NC-GeOI MOSFETs with smaller gate length (L g), EOT, and buried oxide thickness (T box) and thicker ferroelectric layer thickness (T FE) exhibit larger subthreshold swing improvements over GeOI MOSFETs due to better capacitance matching. Compared with GeOI MOSFETs, NC-GeOI MOSFETs exhibit better switching time due to improvements in effective drive current (I eff) and subthreshold swing. NC-GeOI MOSFET exhibits larger ST improvements at V dd = 0.3 V (-82.9%) than at V dd = 0.86 V (-9.7%), because NC-GeOI MOSFET shows 18.2 times higher I eff than the GeOI MOSFET at V dd = 0.3 V, while 2.5 times higher I eff at V dd = 0.86 V. This work provides the device design guideline of NC-GeOI MOSFETs for ultra-low power applications.

Silicon Power MOSFETs

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan; Campola, Michael; Ladbury, Raymond; Label, Kenneth; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

2017-01-01

Recent work for the NASA Electronic Parts and Packaging Program Power MOSFET task is presented. The Task technology focus, roadmap, and partners are given. Recent single-event effect test results on commercial, automotive, and radiation hardened trench power MOSFETs are summarized with an emphasis on risk of using commercial and automotive trench-gate power MOSFETs in space applications.

Study of interfacial strain at the α-Al2O3/monolayer MoS2 interface by first principle calculations

NASA Astrophysics Data System (ADS)

Yu, Sheng; Ran, Shunjie; Zhu, Hao; Eshun, Kwesi; Shi, Chen; Jiang, Kai; Gu, Kunming; Seo, Felix Jaetae; Li, Qiliang

2018-01-01

With the advances in two-dimensional (2D) transition metal dichalcogenides (TMDCs) based metal-oxide-semiconductor field-effect transistor (MOSFET), the interface between the semiconductor channel and gate dielectrics has received considerable attention due to its significant impacts on the morphology and charge transport of the devices. In this study, first principle calculations were utilized to investigate the strain effect induced by the interface between crystalline α-Al2O3 (0001)/h-MoS2 monolayer. The results indicate that the 1.3 nm Al2O3 can induce a 0.3% tensile strain on the MoS2 monolayer. The strain monotonically increases with thicker dielectric layers, inducing more significant impact on the properties of MoS2. In addition, the study on temperature effect indicates that the increasing temperature induces monotonic lattice expansion. This study clearly indicates that the dielectric engineering can effectively tune the properties of 2D TMDCs, which is very attractive for nanoelectronics.

Polycrystalline diamond RF MOSFET with MoO3 gate dielectric

NASA Astrophysics Data System (ADS)

Ren, Zeyang; Zhang, Jinfeng; Zhang, Jincheng; Zhang, Chunfu; Chen, Dazheng; Quan, Rudai; Yang, Jiayin; Lin, Zhiyu; Hao, Yue

2017-12-01

We report the radio frequency characteristics of the diamond metal-oxide-semiconductor field effect transistor with MoO3 gate dielectric for the first time. The device with 2-μm gate length was fabricated on high quality polycrystalline diamond. The maximum drain current of 150 mA/mm at VGS = -5 V and the maximum transconductance of 27 mS/mm were achieved. The extrinsic cutoff frequency of 1.2 GHz and the maximum oscillation frequency of 1.9 GHz have been measured. The moderate frequency characteristics are attributed to the moderate transconductance limited by the series resistance along the channel. We expect that the frequency characteristics of the device can be improved by increasing the magnitude of gm, or fundamentally decreasing the gate-controlled channel resistance and series resistance along the channel, and down-scaling the gate length.

Two-Dimensional Quantum Model of a Nanotransistor

NASA Technical Reports Server (NTRS)

Govindan, T. R.; Biegel, B.; Svizhenko, A.; Anantram, M. P.

2009-01-01

A mathematical model, and software to implement the model, have been devised to enable numerical simulation of the transport of electric charge in, and the resulting electrical performance characteristics of, a nanotransistor [in particular, a metal oxide/semiconductor field-effect transistor (MOSFET) having a channel length of the order of tens of nanometers] in which the overall device geometry, including the doping profiles and the injection of charge from the source, gate, and drain contacts, are approximated as being two-dimensional. The model and software constitute a computational framework for quantitatively exploring such device-physics issues as those of source-drain and gate leakage currents, drain-induced barrier lowering, and threshold voltage shift due to quantization. The model and software can also be used as means of studying the accuracy of quantum corrections to other semiclassical models.

SU-F-T-474: Evaluation of Dose Perturbation, Temperature and Sensitivity Variation With Accumulated Dose of MOSFET Detector

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ganesan, B; Prakasarao, A; Singaravelu, G

Purpose: The use of mega voltage gamma and x-ray sources with their skin sparring qualities in radiation therapy has been a boon in relieving patient discomfort and allowing high tumor doses to be given with fewer restrictions due to radiation effects in the skin. However, high doses given to deep tumors may require careful consideration of dose distribution in the buildup region in order to avoid irreparable damage to the skin. Methods: To measure the perturbation of MOSFET detector in Co60,6MV and 15MV the detector was placed on the surface of the phantom covered with the brass build up cap.more » To measure the effect of temperature the MOSFET detector was kept on the surface of hot water polythene container and the radiation was delivere. In order to measure the sensitivity variation with accumulated dose Measurements were taken by delivering the dose of 200 cGy to MOSFET until the MOSFET absorbed dose comes to 20,000 cGy Results: the Measurement was performed by positioning the bare MOSFET and MOSFET with brass build up cap on the top surface of the solid water phantom for various field sizes in order to find whether there is any attenuation caused in the dose distribution. The response of MOSFET was monitored for temperature ranging from 42 degree C to 22 degree C. The integrated dose dependence of MOSFET dosimeter sensitivity over different energy is not well characterized. This work investigates the dual-bias MOSFET dosimeter sensitivity response to 6 MV and 15 MV beams. Conclusion: From this study it is observed that unlike diode, bare MOSFET does not perturb the radiation field.. It is observed that the build-up influences the temperature dependency of MOSFET and causes some uncertainty in the readings. In the case of sensitivity variation with accumulated dose MOSFET showed higher sensitivity with dose accumulation for both the energies.« less

Negative differential resistance and effect of defects and deformations in MoS{sub 2} armchair nanoribbon metal-oxide-semiconductor field effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sengupta, Amretashis, E-mail: amretashis@dese.iisc.ernet.in; Mahapatra, Santanu

In this work, we present a study on the negative differential resistance (NDR) behavior and the impact of various deformations (like ripple, twist, wrap) and defects like vacancies and edge roughness on the electronic properties of short-channel MoS{sub 2} armchair nanoribbon MOSFETs. The effect of deformation (3°–7° twist or wrap and 0.3–0.7 Å ripple amplitude) and defects on a 10 nm MoS2 ANR FET is evaluated by the density functional tight binding theory and the non-equilibrium Green's function approach. We study the channel density of states, transmission spectra, and the I{sub D}–V{sub D} characteristics of such devices under the varying conditions, withmore » focus on the NDR behavior. Our results show significant change in the NDR peak to valley ratio and the NDR window with such minor intrinsic deformations, especially with the ripple.« less

Development and characterization of ultrathin hafnium titanates as high permittivity gate insulators

NASA Astrophysics Data System (ADS)

Li, Min

High permittivity or high-kappa materials are being developed for use as gate insulators for future ultrascaled metal oxide semiconductor field effect transistors (MOSFETs). Hafnium containing compounds are the leading candidates. Due to its moderate permittivity, however, it is difficult to achieve HfO2 gate structures with an EOT well below 1.0 nm. One approach to increase HfO2 permittivity is combining it with a very high-kappa material, such as TiO2. In this thesis, we systematically studied the electrical and physical characteristics of high-kappa hafnium titanates films as gate insulators. A series of HfxTi1-xO2 films with well-controlled composition were deposited using an MOCVD system. The physical properties of the films were analyzed using a variety of characterization techniques. X-ray micro diffraction indicates that the Ti-rich thin film is more immune to crystallization. TEM analysis showed that the thick stoichiometric HfTiO 4 film has an orthorhombic structure and large anisotropic grains. The C-V curves from the devices with the hafnium titanates films displayed relatively low hysteresis. In a certain composition range, the interfacial layer (IL) EOT and permittivity of HfxTi1-x O2 increases linearly with increasing Ti. The charge is negative for HfxTi1-xO2/IL and positive for Si/IL interface, and the magnitude increases as Hf increases. For ultra-thin films (less than 2 nm EOT), the leakage current increases with increasing HE Moreover, the Hf-rich sample has weaker temperature dependence of the current. In the MOSFET devices with the hafnium titanates films, normal transistor characteristics were observed, also electron mobility degradation. Next, we investigated the effects that different pre-deposition surface treatments, including HF dipping, NH3 surface nitridation, and HfO2 deposition, have on the electrical properties of hafnium titanates. Surface nitridation shows stronger effect than the thin HfO2 layer. The nitrided samples displayed a negative flat band voltage shift and larger hysteresis relative to the HF-dipped samples. The IL EOT reduction by mtridation increases with increasing HE Surface nitridation also induces extra charge, more considerable at the Si/IL interface. The leakage current is reduced in the Hf-rich samples with a nitride layer. Electron mobility degradation by surface nitridation was also observed.

Crystalline ZrTiO{sub 4} gated p-metal–oxide–semiconductor field effect transistors with sub-nm equivalent oxide thickness featuring good electrical characteristics and reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Chao-Yi; Hsieh, Ching-Heng; Lee, Ching-Wei

2015-02-02

ZrTiO{sub 4} crystallized in orthorhombic (o-) phase was stacked with an amorphous Yb{sub 2}O{sub 3} interfacial layer as the gate dielectric for Si-based p-MOSFETs. With thermal annealing after gate electrode, the gate stack with equivalent oxide thickness (EOT) of 0.82 nm achieves high dielectric quality by showing a low interface trap density (D{sub it}) of 2.75 × 10{sup 11 }cm{sup −2}eV{sup −1} near the midgap and low oxide traps. Crystallization of ZrTiO{sub 4} and post metal annealing are also proven to introduce very limited amount of metal induced gap states or interfacial dipole. The p-MOSFETs exhibit good sub-threshold swing of 75 mV/dec which is ascribedmore » to the low D{sub it} value and small EOT. Owing to the Y{sub 2}O{sub 3} interfacial layer and smooth interface with Si substrate that, respectively, suppress phonon and surface roughness scattering, the p-MOSFETs also display high hole mobility of 49 cm{sup 2}/V-s at 1 MV/cm. In addition, I{sub on}/I{sub off} ratio larger than 10{sup 6} is also observed. From the reliability evaluation by negative bias temperature instability test, after stressing with an electric field of −10 MV/cm at 85 °C for 1000 s, satisfactory threshold voltage shift of 12 mV and sub-threshold swing degradation of 3% were obtained. With these promising characteristics, the Yb{sub 2}O{sub 3}/o-ZrTiO{sub 4} gate stack holds the great potential for next-generation electronics.« less

Study on electrical properties of metal/GaSb junctions using metal-GaSb alloys

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nishi, Koichi, E-mail: nishi@mosfet.t.u-tokyo.ac.jp; Yokoyama, Masafumi; Kim, Sanghyeon

2014-01-21

We study the metal-GaSb alloy formation, the structural properties and the electrical characteristics of the metal-alloy/GaSb diodes by employing metal materials such as Ni, Pd, Co, Ti, Al, and Ta, in order to clarify metals suitable for GaSb p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) as metal-GaSb alloy source/drain (S/D). It is found that Ni, Pd, Co, and Ti can form alloy with GaSb by rapid thermal annealing at 250, 250, 350, and 450 °C, respectively. The Ni-GaSb and Pd-GaSb alloy formation temperature of 250 °C is lower than the conventional dopant activation annealing for ion implantation, which enable us to lower the processmore » temperature. The alloy layers show lower sheet resistance (R{sub Sheet}) than that of p{sup +}-GaSb layer formed by ion implantation and activation annealing. We also study the electrical characteristics of the metal-alloy/GaSb junctions. The alloy/n-GaSb contact has large Schottky barrier height (ϕ{sub B}) for electrons, ∼0.6 eV, and low ϕ{sub B} for holes, ∼0.2 eV, which enable us to realize high on/off ratio in pMOSFETs. We have found that the Ni-GaSb/GaSb Schottky junction shows the best electrical characteristics with ideal factor (n) of 1.1 and on-current/off-current ratio (I{sub on}/I{sub off}) of ∼10{sup 4} among the metal-GaSb alloy/GaSb junctions evaluated in the present study. These electrical properties are also superior to those of a p{sup +}-n diode fabricated by Be ion implantation with activation annealing at 350 °C. As a result, the Ni-GaSb alloy can be regarded as one of the best materials to realize metal S/D in GaSb pMOSFETs.« less

Characterization of MOSFET Dosimeter Angular Response Using a Spherical Phantom for Fluoroscopic Dosimetry.

PubMed

Wang, Chu; Hill, Kevin; Yoshizumi, Terry

2016-01-01

Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET) dosimeters, placed in anthropomorphic phantoms, are a standard method for organ dosimetry in medical x-ray imaging applications. However, many x-ray applications, particularly fluoroscopy procedures, use variable projection angles. During dosimetry, the MOSFET detector active area may not always be perpendicular to the x-ray beam. The goal of this study was to characterize the dosimeter's angular response in the fluoroscopic irradiation involved in pediatric cardiac catheterization procedures, during which a considerable amount of fluoroscopic x-ray irradiation is often applied from various projection angles. A biological x-ray irradiator was used to simulate the beam quality of a biplane fluoroscopy imaging system. A custom-designed acrylic spherical scatter phantom was fabricated to measure dosimeter response (in mV) in two rotational axes, axial (ψ) and normal-to-axial (θ), in 30° increments, as well as four common oblique angles used in cardiac catheterization: a) 90° Left Anterior Oblique (LAO); b) 70° LAO/ 20° Cranial; c) 20° LAO/ 15° Cranial; and d) 30° Right Anterior Oblique (RAO). All results were normalized to the angle where the dosimeter epoxy is perpendicular to the beam or the Posterior-Anterior projection angle in the clinical setup. The relative response in the axial rotation was isotropic (within ± 10% deviation); that in the normal-to-axial rotation was isotropic in all angles except the ψ = 270° angle, where the relative response was 83 ± 9%. No significant deviation in detector response was observed in the four common oblique angles, with their relative responses being: a) 102 ± 3%; b) 90 ± 3%; c) 92 ± 3%; and d) 95 ± 3%, respectively. These angular correction factors will be used in future dosimetry studies for fluoroscopy. The spherical phantom may be useful for other applications, as it allows the measurement of dosimeter response in virtually all angles in the 3-dimensional spherical coordinates.

CRRES microelectronic test chip orbital data. II

NASA Technical Reports Server (NTRS)

Soli, G. A.; Blaes, B. R.; Buehler, M. G.; Ray, K.; Lin, Y.-S.

1992-01-01

Data from a MOSFET matrix on two JPL (CIT Jet Propulsion Laboratory) CRRES (Combined Release and Radiation Effects Satellite) chips, each behind different amounts of shielding, are presented. Space damage factors are nearly identical to ground test values for pMOSFETs. The results from neighboring rows of MOSFETs show similar radiation degradation. The SRD (Space Radiation Dosimeter) is used to measure the total dose accumulated by the JPL chips. A parameter extraction algorithm that does not underestimate threshold voltage shifts is used. Temperature effects are removed from the MOSFET data.

Study of G-S/D underlap for enhanced analog performance and RF/circuit analysis of UTB InAs-OI-Si MOSFET using NQS small signal model

NASA Astrophysics Data System (ADS)

Maity, Subir Kumar; Pandit, Soumya

2017-01-01

InGaAs (and its variant) appears to be a promising channel material for high-performance, low-power scaled CMOS applications due to its excellent carrier transport properties. However, MOS transistors made of this suffer from poor electrostatic integrity. In this work, we consider an underlap ultra thin body (UTB) InAs-on-Insulator n-channel MOS transistor, and study the effect of varying the gate-source/drain (G-S/D) underlap length on the analog performance of the device with the help of technology computer-aided design (TCAD) simulation, calibrated with Schrodinger-Poisson solver and experimental results. The underlap technique improves the gate electrostatic integrity which in turn improves the analog performance. We develop a non-quasi-static (NQS) small signal equivalent circuit model of the device which is used for study of the RF performance. With increase of the underlap length, the unity gain cut-off frequency degrades and the maximum oscillation frequency improves beyond a certain value of the underlap length. We further study the gain-frequency response of a common source amplifier using the NQS model, through SPICE simulation and observe that the voltage gain and the gain bandwidth improves.

SU-E-T-145: Effects of Temporary Tachytherapy Inhibition Magnet On MOSFET Dose Measurements of Cardiovascular Implantable Electronic Devices (CIED) in Radiation Therapy Patients

DOE Office of Scientific and Technical Information (OSTI.GOV)

P, Joshi; Salomons, G; Kerr, A

2014-06-01

Purpose: To determine the effects of temporary tachytherapy inhibition magnet on MOSFET dose measurements of cardiovascular implantable electronic devices (CIED) in radiation therapy patients. Methods: Infield and peripheral MOSFET dose measurements with 6MV photon beams were performed to evaluate dose to a CIED in the presence of a doughnut shaped temporary tachytherapy inhibition magnet. Infield measurements were done to quantify the effects of the magnetic field alone and shielding by the magnet. MOSFETs were placed inside a 20×20cm{sup 2} field at a depth of 3cm in the isocentre plane in the presence and absence of the magnet. Peripheral dose measurementsmore » were done to determine the impact of the magnet on dose to the CIED in a clinical setting. These measurements were performed at the centre, under the rim and half way between a 10×10cm{sup 2} field edge and the magnet with MOSFETS placed at the surface, 0.5cm and 1cm depths in the presence and absence of the magnet. Results: Infield measurements showed that effects of magnetic field on the MOSFET readings were within the 2% MOSFET dose measurement uncertainty; a 20% attenuation of dose under the magnet rim was observed. Peripheral dose measurements at the centre of the magnet show an 8% increase in surface dose and a 6% decrease in dose at 1cm depth. Dose under the magnet rim was reduced by approximately 68%, 45% and 25% for MOSFET placed at 0.0, 0.5 and 1.0cm bolus depths, respectively. Conclusions: The magnetic field has an insignificant effect on MOSFET dose measurements. Dose to the central region of CIED represented by centre of the magnet doughnut increases at the surface, and decreases at depths due to low energy scattering contributions from the magnet. Dose under the magnet rim, representing CIED edges, decreased significantly due to shielding.« less

Dosimetry investigation of MOSFET for clinical IMRT dose verification.

PubMed

Deshpande, Sudesh; Kumar, Rajesh; Ghadi, Yogesh; Neharu, R M; Kannan, V

2013-06-01

In IMRT, patient-specific dose verification is followed regularly at each centre. Simple and efficient dosimetry techniques play a very important role in routine clinical dosimetry QA. The MOSFET dosimeter offers several advantages over the conventional dosimeters such as its small detector size, immediate readout, immediate reuse, multiple point dose measurements. To use the MOSFET as routine clinical dosimetry system for pre-treatment dose verification in IMRT, a comprehensive set of experiments has been conducted, to investigate its linearity, reproducibility, dose rate effect and angular dependence for 6 MV x-ray beam. The MOSFETs shows a linear response with linearity coefficient of 0.992 for a dose range of 35 cGy to 427 cGy. The reproducibility of the MOSFET was measured by irradiating the MOSFET for ten consecutive irradiations in the dose range of 35 cGy to 427 cGy. The measured reproducibility of MOSFET was found to be within 4% up to 70 cGy and within 1.4% above 70 cGy. The dose rate effect on the MOSFET was investigated in the dose rate range 100 MU/min to 600 MU/min. The response of the MOSFET varies from -1.7% to 2.1%. The angular responses of the MOSFETs were measured at 10 degrees intervals from 90 to 270 degrees in an anticlockwise direction and normalized at gantry angle zero and it was found to be in the range of 0.98 ± 0.014 to 1.01 ± 0.014. The MOSFETs were calibrated in a phantom which was later used for IMRT verification. The measured calibration coefficients were found to be 1 mV/cGy and 2.995 mV/cGy in standard and high sensitivity mode respectively. The MOSFETs were used for pre-treatment dose verification in IMRT. Nine dosimeters were used for each patient to measure the dose in different plane. The average variation between calculated and measured dose at any location was within 3%. Dose verification using MOSFET and IMRT phantom was found to quick and efficient and well suited for a busy radiotherapy department.

Multi-resonance frequency spin dependent charge pumping and spin dependent recombination - applied to the 4H-SiC/SiO2 interface

NASA Astrophysics Data System (ADS)

Anders, M. A.; Lenahan, P. M.; Lelis, A. J.

2017-12-01

We report on a new electrically detected magnetic resonance (EDMR) approach involving spin dependent charge pumping (SDCP) and spin dependent recombination (SDR) at high (K band, about 16 GHz) and ultra-low (360 and 85 MHz) magnetic resonance frequencies to investigate the dielectric/semiconductor interface in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). A comparison of SDCP and SDR allows for a comparison of deep level defects and defects with energy levels throughout most of the bandgap. Additionally, a comparison of high frequency and ultra-low frequency measurements allows for (1) the partial separation of spin-orbit coupling and hyperfine effects on magnetic resonance spectra, (2) the observation of otherwise forbidden half-field effects, which make EDMR, at least, in principle, quantitative, and (3) the observation of Breit-Rabi shifts in superhyperfine measurements. (Observation of the Breit-Rabi shift helps in both the assignment and the measurement of superhyperfine parameters.) We find that, as earlier work also indicates, the SiC silicon vacancy is the dominating defect in n-MOSFETs with as-grown oxides and that post-oxidation NO anneals significantly reduce their population. In addition, we provide strong evidence that NO anneals result in the presence of nitrogen very close to a large fraction of the silicon vacancies. The results indicate that the presence of nearby nitrogen significantly shifts the silicon vacancy energy levels. Our results also show that the introduction of nitrogen introduces a disorder at the interface. This nitrogen induced disorder may provide at least a partial explanation for the relatively modest improvement in mobility after the NO anneals. Finally, we compare the charge pumping and SDCP response as a function of gate amplitude and charge pumping frequency.

Design and characterization of Au/In4Se3/Ga2S3/C field effect transistors

NASA Astrophysics Data System (ADS)

Khusayfan, Najla M.; Qasrawi, A. F.; Khanfar, Hazem K.

2018-03-01

In the current work, the structural and electrical properties of the In4Se3/Ga2S3 interfaces are investigated. The X-ray analysis which concern the structural evolutions that is associated with the substrate type has shown that the hexagonal κ-In2Se3 and the selenium (rhombohedral) rich orthorhombic In4Se3 phases of InSe are grown onto glass and gold substrates, respectively, at substrate of temperature of 300 °C in a vacuum media. The coating of the κ-In2Se3 and of In4Se3 with amorphous layer of Ga2S3 is accompanied with uniform strain. The In4Se3/Ga2S3 interface is found to be of attractive quantum confinement features as it exhibited a conduction and valence band offsets of 0.20 and 1.86 eV, respectively. When the Au/In4Se3/Ga2S3 interface was contacted with carbon metallic point contact, it reveals a back to back Schottky hybrid device that behaves typically as metal-oxidesemiconductor field effect transition (MOSFET). The depletion capacitance analysis of this device revealed built in voltage values of 1.91 and 1.64 V at the Au and C sides, respectively. The designed MOSFET which is characterized in the frequency domain of 0.01-1.80 GHz is observed to exhibit, resonance-anti-resonance phenomena associated with negative capacitance effect in a wide domain of frequency that nominate it for applications in electronic circuits as parasitic capacitance minimizer, bus switching speed enhancer and low pass/high pass filter at microwave frequencies.

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Multiscale examination and modeling of electron transport in nanoscale materials and devices

NASA Astrophysics Data System (ADS)

Banyai, Douglas R.

For half a century the integrated circuits (ICs) that make up the heart of electronic devices have been steadily improving by shrinking at an exponential rate. However, as the current crop of ICs get smaller and the insulating layers involved become thinner, electrons leak through due to quantum mechanical tunneling. This is one of several issues which will bring an end to this incredible streak of exponential improvement of this type of transistor device, after which future improvements will have to come from employing fundamentally different transistor architecture rather than fine tuning and miniaturizing the metal-oxide-semiconductor field effect transistors (MOSFETs) in use today. Several new transistor designs, some designed and built here at Michigan Tech, involve electrons tunneling their way through arrays of nanoparticles. We use a multi-scale approach to model these devices and study their behavior. For investigating the tunneling characteristics of the individual junctions, we use a first-principles approach to model conduction between sub-nanometer gold particles. To estimate the change in energy due to the movement of individual electrons, we use the finite element method to calculate electrostatic capacitances. The kinetic Monte Carlo method allows us to use our knowledge of these details to simulate the dynamics of an entire device---sometimes consisting of hundreds of individual particles---and watch as a device 'turns on' and starts conducting an electric current. Scanning tunneling microscopy (STM) and the closely related scanning tunneling spectroscopy (STS) are a family of powerful experimental techniques that allow for the probing and imaging of surfaces and molecules at atomic resolution. However, interpretation of the results often requires comparison with theoretical and computational models. We have developed a new method for calculating STM topographs and STS spectra. This method combines an established method for approximating the geometric variation of the electronic density of states, with a modern method for calculating spin-dependent tunneling currents, offering a unique balance between accuracy and accessibility.

Study on Frequency Dependency of ON-Resistance and Pulse-Loss Calculation of MOSFETs for Switch Mode Power Supply

NASA Astrophysics Data System (ADS)

Yamamura, Hideho; Sato, Ryohei; Iwata, Yoshiharu

Global efforts toward energy conservation, increasing data centers, and the increasing use of IT equipments are leading to a demand in reduced power consumption of equipments, and power efficiency improvement of power supply units is becoming a necessity. MOSFETs are widely used for their low ON-resistances. Power efficiency is designed using time-domain circuit simulators, except for transformer copper-loss, which has frequency dependency which is calculated separately using methods based on skin and proximity effects. As semiconductor technology reduces the ON-resistance of MOSFETs, frequency dependency due to the skin effect or proximity effect is anticipated. In this study, ON-resistance of MOSFETs are measured and frequency dependency is confirmed. Power loss against rectangular current pulse is calculated. The calculation method for transformer copper-loss is expanded to MOSFETs. A frequency function for the resistance model is newly developed and parametric calculation is enabled. Acceleration of calculation is enabled by eliminating summation terms. Using this method, it is shown that the frequency dependent component of the measured MOSFETs increases the dissipation from 11% to 32% at a switching frequency of 100kHz. From above, this paper points out the importance of the frequency dependency of MOSFETs' ON-resistance, provides means of calculating its pulse losses, and improves loss calculation accuracy of SMPSs.

Charge deposition model for investigating SE-microdose effect in trench power MOSFETs

NASA Astrophysics Data System (ADS)

Xin, Wan; Weisong, Zhou; Daoguang, Liu; Hanliang, Bo; Jun, Xu

2015-05-01

It was demonstrated that heavy ions can induce large current—voltage (I-V) characteristics shift in commercial trench power MOSFETs, named single event microdose effect (SE-microdose effect). A model is presented to describe this effect. This model calculates the charge deposition by a single heavy ion hitting oxide and the subsequent charge transport under an electric field. Holes deposited at the SiO2/Si interface by a Xe ion are calculated by using this model. The calculated results were then used in Sentaurus TCAD software to simulate a trench power MOSFET's I-V curve shift after a Xe ion has hit it. The simulation results are consistent with the related experiment's data. In the end, several factors which affect the SE-microdose effect in trench power MOSFETs are investigated by using this model.

An Updated Perspective of Single Event Gate Rupture and Single Event Burnout in Power MOSFETs

NASA Astrophysics Data System (ADS)

Titus, Jeffrey L.

2013-06-01

Studies over the past 25 years have shown that heavy ions can trigger catastrophic failure modes in power MOSFETs [e.g., single-event gate rupture (SEGR) and single-event burnout (SEB)]. In 1996, two papers were published in a special issue of the IEEE Transaction on Nuclear Science [Johnson, Palau, Dachs, Galloway and Schrimpf, “A Review of the Techniques Used for Modeling Single-Event Effects in Power MOSFETs,” IEEE Trans. Nucl. Sci., vol. 43, no. 2, pp. 546-560, April. 1996], [Titus and Wheatley, “Experimental Studies of Single-Event Gate Rupture and Burnout in Vertical Power MOSFETs,” IEEE Trans. Nucl. Sci., vol. 43, no. 2, pp. 533-545, Apr. 1996]. Those two papers continue to provide excellent information and references with regard to SEB and SEGR in vertical planar MOSFETs. This paper provides updated references/information and provides an updated perspective of SEB and SEGR in vertical planar MOSFETs as well as provides references/information to other device types that exhibit SEB and SEGR effects.

Schottky barrier MOSFET systems and fabrication thereof

DOEpatents

Welch, James D.

1997-01-01

(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controled switching and effecting a direction of rectification.

Schottky barrier MOSFET systems and fabrication thereof

DOEpatents

Welch, J.D.

1997-09-02

(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controlled switching and effecting a direction of rectification. 89 figs.

Al-implanted on-axis 4H-SiC MOSFETs

NASA Astrophysics Data System (ADS)

Florentin, M.; Cabello, M.; Rebollo, J.; Montserrat, J.; Brosselard, P.; Henry, A.; Godignon, P.

2017-03-01

In this paper, the impact of temperature and time stress on gate oxide stability of several multi-implanted and epitaxied 4H-SiC nMOSFET is presented. The oxide layer was processed under a rapid thermal process (RTP) furnace. The variation of the main electrical parameters is shown. We report the high quality and stability of such implanted MOSFETs, and point out the very low roughness effect of the on-axis-cut sample. Particularly, in the best case, effective channel mobility (μ fe) overcomes 20 cm2.V-1.s-1 at 300 °C for a channel length of 12 μm, which is very encouraging for implantation technology. Starting from 200 °C, the apparent increase of the μ fe peak of the MOSFET ceases and tends to saturate with further temperature increase. This is an indication of the potential of MOSFETs built on on-axis substrates. Thus, starting from the real case of an implanted MOSFET, the global purpose is to show that the electrical performance of such an on-axis-built device can tend to reach that of the ideal case, i.e. epitaxied MOSFET, and even overcome its electrical limitation, e.g. in terms of threshold voltage stability at high temperature.

Power connect safety and connection interlock

NASA Technical Reports Server (NTRS)

Rippel, Wally E. (Inventor)

1992-01-01

A power connect safety and connection interlock system is shown for use with inverters and other DC loads (16) which include capacitor filter banks (14) at their DC inputs. A safety circuit (20) operates a spring (26) biased, solenoid (22) driven mechanical connection interference (24) which prevents mating and therefore electrical connection between the power contactor halves (11, 13) of the main power contacts (12) until the capacitor bank is safely precharged through auxiliary contacts (18). When the DC load (16) is shut down, the capacitor bank (14) is automatically discharged through a discharging power resistor (66) by a MOSFET transistor (60) through a discharging power resistor (66) only when both the main power contacts and auxiliary contacts are disconnected.

Silicon device performance measurements to support temperature range enhancement

NASA Technical Reports Server (NTRS)

Bromstead, James; Weir, Bennett; Nelms, R. Mark; Johnson, R. Wayne; Askew, Ray

1994-01-01

Silicon based power devices can be used at 200 C. The device measurements made during this program show a predictable shift in device parameters with increasing temperature. No catastrophic or abrupt changes occurred in the parameters over the temperature range. As expected, the most dramatic change was the increase in leakage currents with increasing temperature. At 200 C the leakage current was in the milliAmp range but was still several orders of magnitude lower than the on-state current capabilities of the devices under test. This increase must be considered in the design of circuits using power transistors at elevated temperature. Three circuit topologies have been prototyped using MOSFET's and IGBT's. The circuits were designed using zero current or zero voltage switching techniques to eliminate or minimize hard switching of the power transistors. These circuits have functioned properly over the temperature range. One thousand hour life data have been collected for two power supplies with no failures and no significant change in operating efficiency. While additional reliability testing should be conducted, the feasibility of designing soft switched circuits for operation at 200 C has been successfully demonstrated.

Dosimetric evaluation of a new OneDose MOSFET for Ir-192 energy.

PubMed

Kinhikar, Rajesh A; Sharma, Pramod K; Tambe, Chandrashekhar M; Deshpande, Deepak D

2006-03-07

The purpose of this study was to investigate dosimetry (reproducibility, energy correction, relative response with distance from source, linearity with threshold dose, rate of fading, temperature and angular dependence) of a newly designed OneDosetrade mark MOSFET patient dosimetry system for use in HDR brachytherapy with Ir-192 energy. All measurements were performed with a MicroSelectron HDR unit and OneDose MOSFET detectors. All dosimeters were normalized to 3 min post-irradiation to minimize fading effects. All dosimeters gave reproducible readings with mean deviation of 1.8% (SD 0.4) and 2.4% (SD 0.6) for 0 degrees and 180 degrees incidences, respectively. The mean energy correction factor was found to be 1.1 (range 1.06-1.12). Overall, there was 60% and 40% mean response of the MOSFET at 2 and 3 cm, respectively, from the source. MOSFET results showed good agreement with TLD and parallel plate ion chamber. Linear dose response with threshold voltage shift was observed with applied doses of 0.3 Gy-5 Gy with Ir-192 energy. Linearity (R2 = 1) was observed in the MOSFET signal with the applied dose range of 0.3 Gy-5 Gy with Ir-192 energy. Fading effects were less than 1% after 10 min and the MOSFET detectors stayed stable (within 5%) over a period of 1 month. The MOSFET response was found to be decreased by approximately 1.5% at 37 degrees C compared to 20 degrees C. The isotropic response of the MOSFET was found to be within +/-6%. A maximum deviation of 5.5% was obtained between 0 degrees and 180 degrees for both the axes and this should be considered in clinical applications. The small size, cable-less, instant readout, permanent storage of dose and ease of use make the MOSFET a novel dosimeter and beneficial to patients for skin dose measurements with HDRBT using an Ir-192 source compared to the labour demanding and time-consuming TLDs.

An extensive investigation of work function modulated trapezoidal recessed channel MOSFET

NASA Astrophysics Data System (ADS)

Lenka, Annada Shankar; Mishra, Sikha; Mishra, Satyaranjan; Bhanja, Urmila; Mishra, Guru Prasad

2017-11-01

The concept of silicon on insulator (SOI) and grooved gate help to lessen the short channel effects (SCEs). Again the work function modulation along the metal gate gives a better drain current due to the uniform electric field along the channel. So all these concepts are combined and used in the proposed MOSFET structure for more improved performance. In this work, trapezoidal recessed channel silicon on insulator (TRC-SOI) MOSFET and work function modulated trapezoidal recessed channel silicon on insulator (WFM-TRC-SOI) MOSFET are compared with DC and RF parameters and later linearity of both the devices is tested. An analytical model is formulated by using a 2-D Poisson's equation and develops a compact equation for threshold voltage using minimum surface potential. In this work we analyze the effect of negative junction depth and the corner angle on various device parameters such as minimum surface potential, sub-threshold slope (SS), drain induced barrier lowering (DIBL) and threshold voltage. The analysis interprets that the switching performance of WFM-TRC-SOI MOSFET surpasses TRC-SOI MOSFET in terms of high Ion/Ioff ratio and also the proposed structure can minimize the short channel effects (SCEs) in RF application. The validity of proposed model has been verified with simulation result performed on Sentaurus TCAD device simulator.

Schottky Barrier Height Tuning via the Dopant Segregation Technique through Low-Temperature Microwave Annealing.

PubMed

Fu, Chaochao; Zhou, Xiangbiao; Wang, Yan; Xu, Peng; Xu, Ming; Wu, Dongping; Luo, Jun; Zhao, Chao; Zhang, Shi-Li

2016-04-27

The Schottky junction source/drain structure has great potential to replace the traditional p/n junction source/drain structure of the future ultra-scaled metal-oxide-semiconductor field effect transistors (MOSFETs), as it can form ultimately shallow junctions. However, the effective Schottky barrier height (SBH) of the Schottky junction needs to be tuned to be lower than 100 meV in order to obtain a high driving current. In this paper, microwave annealing is employed to modify the effective SBH of NiSi on Si via boron or arsenic dopant segregation. The barrier height decreased from 0.4-0.7 eV to 0.2-0.1 eV for both conduction polarities by annealing below 400 °C. Compared with the required temperature in traditional rapid thermal annealing, the temperature demanded in microwave annealing is ~60 °C lower, and the mechanisms of this observation are briefly discussed. Microwave annealing is hence of high interest to future semiconductor processing owing to its unique capability of forming the metal/semiconductor contact at a remarkably lower temperature.

Schottky Barrier Height Tuning via the Dopant Segregation Technique through Low-Temperature Microwave Annealing

PubMed Central

Fu, Chaochao; Zhou, Xiangbiao; Wang, Yan; Xu, Peng; Xu, Ming; Wu, Dongping; Luo, Jun; Zhao, Chao; Zhang, Shi-Li

2016-01-01

The Schottky junction source/drain structure has great potential to replace the traditional p/n junction source/drain structure of the future ultra-scaled metal-oxide-semiconductor field effect transistors (MOSFETs), as it can form ultimately shallow junctions. However, the effective Schottky barrier height (SBH) of the Schottky junction needs to be tuned to be lower than 100 meV in order to obtain a high driving current. In this paper, microwave annealing is employed to modify the effective SBH of NiSi on Si via boron or arsenic dopant segregation. The barrier height decreased from 0.4–0.7 eV to 0.2–0.1 eV for both conduction polarities by annealing below 400 °C. Compared with the required temperature in traditional rapid thermal annealing, the temperature demanded in microwave annealing is ~60 °C lower, and the mechanisms of this observation are briefly discussed. Microwave annealing is hence of high interest to future semiconductor processing owing to its unique capability of forming the metal/semiconductor contact at a remarkably lower temperature. PMID:28773440

Effects of BOX engineering on analogue/RF and circuit performance of InGaAs-OI-Si MOSFET

NASA Astrophysics Data System (ADS)

Maity, Subir Kr.; Pandit, Soumya

2017-11-01

InGaAs is an attractive choice as alternate channel material in n-channel metal oxide semiconductor transistor for high-performance applications. However, electrostatic integrity of such device is poor. In this paper, we present a comprehensive technology computer-aided design simulation-based study of the effect of scaling the thickness of the buried oxide (BOX) region and varying the dielectric constant of BOX material on the electrostatic integrity, analogue/radio frequency (RF) performance and circuit performance of InGaAs-on-Insulator device. Device with thin BOX layer gives better drain-induced barrier lowering performance which enhances output resistance. The carrier mobility remains almost constant with thinning of BOX layer up to certain value. By lowering the dielectric constant of the BOX material, it is further possible to improve the analogue and RF performance. Effect of BOX thickness scaling and role of BOX dielectric material on gain-frequency response of common source amplifier is also studied. It is observed that frequency response of the amplifier improves for thin BOX and with low dielectric constant-based material.

Ultra-low energy photoreceivers for optical interconnects

NASA Astrophysics Data System (ADS)

Going, Ryan Wayne

Optical interconnects are increasingly important for our communication and data center systems, and are forecasted to be an essential component of future computers. In order to meet these future demands, optical interconnects must be improved to consume less power than they do today. To do this, both more efficient transmitters and more sensitive receivers must be developed. This work addresses the latter, focusing on device level improvements to tightly couple a low capacitance photodiode with the first stage transistor of the receiver as a single phototransistor device. First I motivate the need for a coupled phototransistor using a simple circuit model which shows how receiver sensitivity is determined by photodiode capacitance and the length of wire connecting it to the first transistor in a receiver amplifier. Then I describe our use of the unique rapid melt growth technique, which is used to integrate crystalline germanium on silicon photonics substrates without an epitaxial reactor. The resulting material quality is demonstrated with high quality (0.95 A/W, 40+ GHz) germanium photodiodes on silicon waveguides. Next I describe two germanium phototransistors I have developed. One is a germanium- gated MOSFET on silicon photonics which has up to 18 A/W gate-controlled responsivity at 1550 nm. Simulations show how MOSFET scaling rules can be easily applied to increase both speed and sensitivity. The second is a floating base germanium bipolar phototransistor on silicon photonics with a 15 GHz gain x bandwidth product. The photoBJT also has a clear scaling path, and it is proposed to create a separate gain and absorption region photoBJT to realize the maximum benefit of scaling the BJT without negatively affecting its absorption and photocarrier collection. Following this design a 120 GHz gain x bandwidth photoBJT is simulated. Finally I present a metal-cavity, which can have over 50% quantum efficiency absorption in sub-100 aF germanium photodiodes, which addresses the issue of absorption in photodiodes which have been scaled to near sub-wavelength dimensions.

Characterization of a new MOSFET detector configuration for in vivo skin dosimetry.

PubMed

Scalchi, Paolo; Francescon, Paolo; Rajaguru, Priyadarshini

2005-06-01

The dose released to the patient skin during a radiotherapy treatment is important when the skin is an organ at risk, or on the contrary, is included in the target volume. Since most treatment planning programs do not predict dose within several millimeters of the body surface, it is important to have a method to verify the skin dose for the patient who is undergoing radiotherapy. A special type of metal oxide semiconductors field-effect transistors (MOSFET) was developed to perform in vivo skin dosimetry for radiotherapy treatments. Water-equivalent depth (WED), both manufacturing and sensor reproducibility, dependence on both field size and angulation of the sensor were investigated using 6 MV photon beams. Patient skin dosimetries were performed during 6 MV total body irradiations (TBI). The resulting WEDs ranged from 0.04 and 0.15 mm (0.09 mm on average). The reproducibility of the sensor response, for doses of 50 cGy, was within +/-2% (maximum deviation) and improves with increasing sensitivity or dose level. As to the manufacturing reproducibility, it was found to be +/-0.055 mm. No WED dependence on the field size was verified, but possible variations of this quantity with the field size could be hidden by the assessment uncertainty. The angular dependence, for both phantom-surface and in-air setups, when referred to the mean response, is within +/-27% until 80 degree rotations. The results of the performed patient skin dosimetries showed that, normally, our TBI setup was suitable to give skin the prescribed dose, but, for some cases, interventions were necessary: as a consequence the TBI setup was corrected. The water-equivalent depth is, on average, less than the thinnest thermoluminescent dosimeters (TLD). In addition, when compared with TLDs, the skin MOSFETs have significant advantages, like immediate both readout and reuse, as well as the permanent storage of dose. These sensors are also waterproof. The in vivo dosimetries performed prove the importance of verifying the dose to the skin of the patient undergoing radiotherapy.

Application of commercial MOSFET detectors for in vivo dosimetry in the therapeutic x-ray range from 80 kV to 250 kV

NASA Astrophysics Data System (ADS)

Ehringfeld, Christian; Schmid, Susanne; Poljanc, Karin; Kirisits, Christian; Aiginger, Hannes; Georg, Dietmar

2005-01-01

The purpose of this study was to investigate the dosimetric characteristics (energy dependence, linearity, fading, reproducibility, etc) of MOSFET detectors for in vivo dosimetry in the kV x-ray range. The experience of MOSFET in vivo dosimetry in a pre-clinical study using the Alderson phantom and in clinical practice is also reported. All measurements were performed with a Gulmay D3300 kV unit and TN-502RDI MOSFET detectors. For the determination of correction factors different solid phantoms and a calibrated Farmer-type chamber were used. The MOSFET signal was linear with applied dose in the range from 0.2 to 2 Gy for all energies. Due to fading it is recommended to read the MOSFET signal during the first 15 min after irradiation. For long time intervals between irradiation and readout the fading can vary largely with the detector. The temperature dependence of the detector signal was small (0.3% °C-1) in the temperature range between 22 and 40 °C. The variation of the measuring signal with beam incidence amounts to ±5% and should be considered in clinical applications. Finally, for entrance dose measurements energy-dependent calibration factors, correction factors for field size and irradiated cable length were applied. The overall accuracy, for all measurements, was dominated by reproducibility as a function of applied dose. During the pre-clinical in vivo study, the agreement between MOSFET and TLD measurements was well within 3%. The results of MOSFET measurements, to determine the dosimetric characteristics as well as clinical applications, showed that MOSFET detectors are suitable for in vivo dosimetry in the kV range. However, some energy-dependent dosimetry effects need to be considered and corrected for. Due to reproducibility effects at low dose levels accurate in vivo measurements are only possible if the applied dose is equal to or larger than 2 Gy.

Application of commercial MOSFET detectors for in vivo dosimetry in the therapeutic x-ray range from 80 kV to 250 kV.

PubMed

Ehringfeld, Christian; Schmid, Susanne; Poljanc, Karin; Kirisits, Christian; Aiginger, Hannes; Georg, Dietmar

2005-01-21

The purpose of this study was to investigate the dosimetric characteristics (energy dependence, linearity, fading, reproducibility, etc) of MOSFET detectors for in vivo dosimetry in the kV x-ray range. The experience of MOSFET in vivo dosimetry in a pre-clinical study using the Alderson phantom and in clinical practice is also reported. All measurements were performed with a Gulmay D3300 kV unit and TN-502RDI MOSFET detectors. For the determination of correction factors different solid phantoms and a calibrated Farmer-type chamber were used. The MOSFET signal was linear with applied dose in the range from 0.2 to 2 Gy for all energies. Due to fading it is recommended to read the MOSFET signal during the first 15 min after irradiation. For long time intervals between irradiation and readout the fading can vary largely with the detector. The temperature dependence of the detector signal was small (0.3% degrees C(-1)) in the temperature range between 22 and 40 degrees C. The variation of the measuring signal with beam incidence amounts to +/-5% and should be considered in clinical applications. Finally, for entrance dose measurements energy-dependent calibration factors, correction factors for field size and irradiated cable length were applied. The overall accuracy, for all measurements, was dominated by reproducibility as a function of applied dose. During the pre-clinical in vivo study, the agreement between MOSFET and TLD measurements was well within 3%. The results of MOSFET measurements, to determine the dosimetric characteristics as well as clinical applications, showed that MOSFET detectors are suitable for in vivo dosimetry in the kV range. However, some energy-dependent dosimetry effects need to be considered and corrected for. Due to reproducibility effects at low dose levels accurate in vivo measurements are only possible if the applied dose is equal to or larger than 2 Gy.

Intelligent Gate Drive for Fast Switching and Crosstalk Suppression of SiC Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Zheyu; Dix, Jeffery; Wang, Fei Fred

This study presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiCmore » MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.« less

Stable Extraction of Threshold Voltage Using Transconductance Change Method for CMOS Modeling, Simulation and Characterization

NASA Astrophysics Data System (ADS)

Choi, Woo Young; Woo, Dong-Soo; Choi, Byung Yong; Lee, Jong Duk; Park, Byung-Gook

2004-04-01

We proposed a stable extraction algorithm for threshold voltage using transconductance change method by optimizing node interval. With the algorithm, noise-free gm2 (=dgm/dVGS) profiles can be extracted within one-percent error, which leads to more physically-meaningful threshold voltage calculation by the transconductance change method. The extracted threshold voltage predicts the gate-to-source voltage at which the surface potential is within kT/q of φs=2φf+VSB. Our algorithm makes the transconductance change method more practical by overcoming noise problem. This threshold voltage extraction algorithm yields the threshold roll-off behavior of nanoscale metal oxide semiconductor field effect transistor (MOSFETs) accurately and makes it possible to calculate the surface potential φs at any other point on the drain-to-source current (IDS) versus gate-to-source voltage (VGS) curve. It will provide us with a useful analysis tool in the field of device modeling, simulation and characterization.

Intelligent Gate Drive for Fast Switching and Crosstalk Suppression of SiC Devices

DOE PAGES

Zhang, Zheyu; Dix, Jeffery; Wang, Fei Fred; ...

2017-01-19

This study presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiCmore » MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.« less

Simulation of planar single-gate Si tunnel FET with average subthreshold swing of less than 60 mV/decade for 0.3 V operation

NASA Astrophysics Data System (ADS)

Kukita, Kentaro; Uechi, Tadayoshi; Shimokawa, Junji; Goto, Masakazu; Yokota, Yoshinori; Kawanaka, Shigeru; Tanamoto, Tetsufumi; Tanimoto, Hiroyoshi; Takagi, Shinichi

2018-04-01

Planar single-gate (SG) silicon (Si) tunnel field effect transistors (TFETs) are attracting interest for ultra-low voltage operation and CMOS applications. For the achievement of subthreshold swing (S.S.) less than thermal limit of Si MOSFETs (S.S. = 60 mV/decade at 300 K), previous studies have proposed the formation of a pocket region, which needs very difficult implantation process. In this work, a planar SG Si TFET without pocket was proposed by using the technology computer-aided design (TCAD) simulations. An average S.S. of less than 60 mV/decade for 0.3 V (= V gs = V ds) operation was obtained. It is found that both low average S.S. (= 27.8 mV/decade) and high on-current I on (= 3.8 µA/µm) are achieved without pocket doping by scaling the equivalent oxide thickness (EOT) and increasing the gate-to-source overlap length L ov.

Height-selective etching for regrowth of self-aligned contacts using MBE

NASA Astrophysics Data System (ADS)

Burek, G. J.; Wistey, M. A.; Singisetti, U.; Nelson, A.; Thibeault, B. J.; Bank, S. R.; Rodwell, M. J. W.; Gossard, A. C.

2009-03-01

Advanced III-V transistors require unprecedented low-resistance contacts in order to simultaneously scale bandwidth, fmax and ft with the physical active region [M.J.W. Rodwell, M. Le, B. Brar, in: Proceedings of the IEEE, 96, 2008, p. 748]. Low-resistance contacts have been previously demonstrated using molecular beam epitaxy (MBE), which provides active doping above 4×10 19 cm -3 and permits in-situ metal deposition for the lowest resistances [U. Singisetti, M.A. Wistey, J.D. Zimmerman, B.J. Thibeault, M.J.W. Rodwell, A.C. Gossard, S.R. Bank, Appl. Phys. Lett., submitted]. But MBE is a blanket deposition technique, and applying MBE regrowth to deep-submicron lateral device dimensions is difficult even with advanced lithography techniques. We present a simple method for selectively etching undesired regrowth from the gate or mesa of a III-V MOSFET or laser, resulting in self-aligned source/drain contacts regardless of the device dimensions. This turns MBE into an effectively selective area growth technique.

Direct Growth of Graphene Film on Germanium Substrate

PubMed Central

Wang, Gang; Zhang, Miao; Zhu, Yun; Ding, Guqiao; Jiang, Da; Guo, Qinglei; Liu, Su; Xie, Xiaoming; Chu, Paul K.; Di, Zengfeng; Wang, Xi

2013-01-01

Graphene has been predicted to play a role in post-silicon electronics due to the extraordinary carrier mobility. Chemical vapor deposition of graphene on transition metals has been considered as a major step towards commercial realization of graphene. However, fabrication based on transition metals involves an inevitable transfer step which can be as complicated as the deposition of graphene itself. By ambient-pressure chemical vapor deposition, we demonstrate large-scale and uniform depositon of high-quality graphene directly on a Ge substrate which is wafer scale and has been considered to replace conventional Si for the next generation of high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs). The immiscible Ge-C system under equilibrium conditions dictates graphene depositon on Ge via a self-limiting and surface-mediated process rather than a precipitation process as observed from other metals with high carbon solubility. Our technique is compatible with modern microelectronics technology thus allowing integration with high-volume production of complementary metal-oxide-semiconductors (CMOS). PMID:23955352

SU-G-IeP3-04: Effective Dose Measurements in Fast Kvp Switch Dual Energy Computed Tomography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Raudabaugh, J; Moore, B; Nguyen, G

2016-06-15

Purpose: The objective of this study was two-fold: (a) to test a new approach to approximating organ dose by using the effective energy of the combined 80kV/140kV beam in dual-energy (DE) computed tomography (CT), and (b) to derive the effective dose (ED) in the abdomen-pelvis protocol in DECT. Methods: A commercial dual energy CT scanner was employed using a fast-kV switch abdomen/pelvis protocol alternating between 80 kV and 140 kV. MOSFET detectors were used for organ dose measurements. First, an experimental validation of the dose equivalency between MOSFET and ion chamber (as a gold standard) was performed using a CTDImore » phantom. Second, the ED of DECT scans was measured using MOSFET detectors and an anthropomorphic phantom. For ED calculations, an abdomen/pelvis scan was used using ICRP 103 tissue weighting factors; ED was also computed using the AAPM Dose Length Product (DLP) method and compared to the MOSFET value. Results: The effective energy was determined as 42.9 kV under the combined beam from half-value layer (HVL) measurement. ED for the dual-energy scan was calculated as 16.49 ± 0.04 mSv by the MOSFET method and 14.62 mSv by the DLP method. Conclusion: Tissue dose in the center of the CTDI body phantom was 1.71 ± 0.01 cGy (ion chamber) and 1.71 ± 0.06 (MOSFET) respectively; this validated the use of effective energy method for organ dose estimation. ED from the abdomen-pelvis scan was calculated as 16.49 ± 0.04 mSv by MOSFET and 14.62 mSv by the DLP method; this suggests that the DLP method provides a reasonable approximation to the ED.« less

Investigations of interference between electromagnetic transponders and wireless MOSFET dosimeters: a phantom study.

PubMed

Su, Zhong; Zhang, Lisha; Ramakrishnan, V; Hagan, Michael; Anscher, Mitchell

2011-05-01

To evaluate both the Calypso Systems' (Calypso Medical Technologies, Inc., Seattle, WA) localization accuracy in the presence of wireless metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters of dose verification system (DVS, Sicel Technologies, Inc., Morrisville, NC) and the dosimeters' reading accuracy in the presence of wireless electromagnetic transponders inside a phantom. A custom-made, solid-water phantom was fabricated with space for transponders and dosimeters. Two inserts were machined with positioning grooves precisely matching the dimensions of the transponders and dosimeters and were arranged in orthogonal and parallel orientations, respectively. To test the transponder localization accuracy with/without presence of dosimeters (hypothesis 1), multivariate analyses were performed on transponder-derived localization data with and without dosimeters at each preset distance to detect statistically significant localization differences between the control and test sets. To test dosimeter dose-reading accuracy with/without presence of transponders (hypothesis 2), an approach of alternating the transponder presence in seven identical fraction dose (100 cGy) deliveries and measurements was implemented. Two-way analysis of variance was performed to examine statistically significant dose-reading differences between the two groups and the different fractions. A relative-dose analysis method was also used to evaluate transponder impact on dose-reading accuracy after dose-fading effect was removed by a second-order polynomial fit. Multivariate analysis indicated that hypothesis 1 was false; there was a statistically significant difference between the localization data from the control and test sets. However, the upper and lower bounds of the 95% confidence intervals of the localized positional differences between the control and test sets were less than 0.1 mm, which was significantly smaller than the minimum clinical localization resolution of 0.5 mm. For hypothesis 2, analysis of variance indicated that there was no statistically significant difference between the dosimeter readings with and without the presence of transponders. Both orthogonal and parallel configurations had difference of polynomial-fit dose to measured dose values within 1.75%. The phantom study indicated that the Calypso System's localization accuracy was not affected clinically due to the presence of DVS wireless MOSFET dosimeters and the dosimeter-measured doses were not affected by the presence of transponders. Thus, the same patients could be implanted with both transponders and dosimeters to benefit from improved accuracy of radiotherapy treatments offered by conjunctional use of the two systems.

Switching transients in high-frequency high-power converters using power MOSFET's

NASA Technical Reports Server (NTRS)

Sloane, T. H.; Owen, H. A., Jr.; Wilson, T. G.

1979-01-01

The use of MOSFETs in a high-frequency high-power dc-to-dc converter is investigated. Consideration is given to the phenomena associated with the paralleling of MOSFETs and to the effect of stray circuit inductances on the converter circuit performance. Analytical relationships between various time constants during the turning-on and turning-off intervals are derived which provide estimates of plateau and peak levels during these intervals.

Investigation of radiation hardened SOI wafer fabricated by ion-cut technique

NASA Astrophysics Data System (ADS)

Chang, Yongwei; Wei, Xing; Zhu, Lei; Su, Xin; Gao, Nan; Dong, Yemin

2018-07-01

Total ionizing dose (TID) effect on Silicon-on-Insulator (SOI) wafers due to inherent buried oxide (BOX) is a significant concern as it leads to the degradation of electrical properties of SOI-based devices and circuits, even failures of the systems associated with them. This paper reports the radiation hardening implementation of SOI wafer fabricated by ion-cut technique integrated with low-energy Si+ implantation. The electrical properties and radiation response of pseudo-MOS transistors are analyzed. The results demonstrate that the hardening process can significantly improve the TID tolerance of SOI wafers by generating Si nanocrystals (Si-NCs) within the BOX. The presence of Si-NCs created through Si+ implantation is evidenced by high-resolution transmission electron microscopy (HR-TEM). Under the pass gate (PG) irradiation bias, the anti-radiation properties of H-gate SOI nMOSFETs suggest that the radiation hardened SOI wafers with optimized Si implantation dose can perform effectively in a radiation environment. The radiation hardening process provides an excellent way to reinforce the TID tolerance of SOI wafers.

Image guided IMRT dosimetry using anatomy specific MOSFET configurations.

PubMed

Amin, Md Nurul; Norrlinger, Bern; Heaton, Robert; Islam, Mohammad

2008-06-23

We have investigated the feasibility of using a set of multiple MOSFETs in conjunction with the mobile MOSFET wireless dosimetry system, to perform a comprehensive and efficient quality assurance (QA) of IMRT plans. Anatomy specific MOSFET configurations incorporating 5 MOSFETs have been developed for a specially designed IMRT dosimetry phantom. Kilovoltage cone beam computed tomography (kV CBCT) imaging was used to increase the positional precision and accuracy of the detectors and phantom, and so minimize dosimetric uncertainties in high dose gradient regions. The effectiveness of the MOSFET based dose measurements was evaluated by comparing the corresponding doses measured by an ion chamber. For 20 head and neck IMRT plans the agreement between the MOSFET and ionization chamber dose measurements was found to be within -0.26 +/- 0.88% and 0.06 +/- 1.94% (1 sigma) for measurement points in the high dose and low dose respectively. A precision of 1 mm in detector positioning was achieved by using the X-Ray Volume Imaging (XVI) kV CBCT system available with the Elekta Synergy Linear Accelerator. Using the anatomy specific MOSFET configurations, simultaneous measurements were made at five strategically located points covering high dose and low dose regions. The agreement between measurements and calculated doses by the treatment planning system for head and neck and prostate IMRT plans was found to be within 0.47 +/- 2.45%. The results indicate that a cylindrical phantom incorporating multiple MOSFET detectors arranged in an anatomy specific configuration, in conjunction with image guidance, can be utilized to perform a comprehensive and efficient quality assurance of IMRT plans.

Low-frequency noise reduction in vertical MOSFETs having tunable threshold voltage fabricated with 60 nm CMOS technology on 300 mm wafer process

NASA Astrophysics Data System (ADS)

Imamoto, Takuya; Ma, Yitao; Muraguchi, Masakazu; Endoh, Tetsuo

2015-04-01

In this paper, DC and low-frequency noise (LFN) characteristics have been investigated with actual measurement data in both n- and p-type vertical MOSFETs (V-MOSFETs) for the first time. The V-MOSFETs which was fabricated on 300 mm bulk silicon wafer process have realized excellent DC performance and a significant reduction of flicker (1/f) noise. The measurement results show that the fabricated V-MOSFETs with 60 nm silicon pillar and 100 nm gate length achieve excellent steep sub-threshold swing (69 mV/decade for n-type and 66 mV/decade for p-type), good on-current (281 µA/µm for n-type 149 µA/µm for p-type), low off-leakage current (28.1 pA/µm for n-type and 79.6 pA/µm for p-type), and excellent on-off ratio (1 × 107 for n-type and 2 × 106 for p-type). In addition, it is demonstrated that our fabricated V-MOSFETs can control the threshold voltage (Vth) by changing the channel doping condition, which is the useful and low-cost technique as it has been widely used in the conventional bulk planar MOSFET. This result indicates that V-MOSFETs can control Vth more finely and flexibly by the combined the use of the doping technique with other techniques such as work function engineering of metal-gate. Moreover, it is also shown that V-MOSFETs can suppress 1/f noise (L\\text{gate}WS\\text{Id}/I\\text{d}2 of 10-13-10-11 µm2/Hz for n-type and 10-12-10-10 µm2/Hz for p-type) to one or two order lower level than previously reported nanowire type MOSFET, FinFET, Tri-Gate, and planar MOSFETs. The results have also proved that both DC and 1/f noise performances are independent from the bias voltage which is applied to substrate or well layer. Therefore, it is verified that V-MOSFETs can eliminate the effects from substrate or well layer, which always adversely affects the circuit performances due to this serial connection.

A novel double gate MOSFET by symmetrical insulator packets with improved short channel effects

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2018-03-01

In this article, we study a novel double-gate SOI MOSFET structure incorporating insulator packets (IPs) at the junction between channel and source/drain (S/D) ends. The proposed MOSFET has great strength in inhibiting short channel effects and OFF-state current that are the main problems compared with conventional one due to the significant suppressed penetrations of both the lateral electric field and the carrier diffusion from the S/D into the channel. Improvement of the hot electron reliability, the ON to OFF drain current ratio, drain-induced barrier lowering, gate-induced drain leakage and threshold voltage over conventional double-gate SOI MOSFETs, i.e. without IPs, is displayed with the simulation results. This study is believed to improve the CMOS device reliability and is suitable for the low-power very-large-scale integration circuits.

Quantum Corrections to the 'Atomistic' MOSFET Simulations

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Kaya, S.; Balasubramaniam, R.

2000-01-01

We have introduced in a simple and efficient manner quantum mechanical corrections in our 3D 'atomistic' MOSFET simulator using the density gradient formalism. We have studied in comparison with classical simulations the effect of the quantum mechanical corrections on the simulation of random dopant induced threshold voltage fluctuations, the effect of the single charge trapping on interface states and the effect of the oxide thickness fluctuations in decanano MOSFETs with ultrathin gate oxides. The introduction of quantum corrections enhances the threshold voltage fluctuations but does not affect significantly the amplitude of the random telegraph noise associated with single carrier trapping. The importance of the quantum corrections for proper simulation of oxide thickness fluctuation effects has also been demonstrated.

Defect-free high Sn-content GeSn on insulator grown by rapid melting growth.

PubMed

Liu, Zhi; Cong, Hui; Yang, Fan; Li, Chuanbo; Zheng, Jun; Xue, Chunlai; Zuo, Yuhua; Cheng, Buwen; Wang, Qiming

2016-12-12

GeSn is an attractive semiconductor material for Si-based photonics. However, large lattice mismatch between GeSn and Si and the low solubility of Sn in Ge limit its development. In order to obtain high Sn-content GeSn on Si, it is normally grown at low temperature, which would lead to inevitable dislocations. Here, we reported a single-crystal defect-free graded GeSn on insulator (GSOI) stripes laterally grown by rapid melting growth (RMG). The Sn-content reaches to 14.2% at the end of the GSOI stripe. Transmission electron microscopy observation shows the GSOI stripe without stacking fault and dislocations. P-channel pseudo metal-oxide-semiconductor field effect transistors (MOSFETs) and metal-semiconductor-metal (MSM) Schottky junction photodetectors were fabricated on these GSOIs. Good transistor performance with a low field peak hole mobility of 402 cm 2 /Vs is obtained, which indicates a high-quality of this GSOI structure. Strong near-infrared and short-wave infrared optical absorption of the MSM photodetectors at 1550 nm and 2000 nm were observed. Owing to high Sn-content and defect-free, responsivity of 236 mA/W@-1.5 V is achieved at 1550 nm wavelength. In addition, responsivity reaches 154 mA/W@-1.5 V at 2000 nm with the optical absorption layer only 200 nm-thick, which is the highest value reported for GeSn junction photodetectors until now.

Defect-free high Sn-content GeSn on insulator grown by rapid melting growth

PubMed Central

Liu, Zhi; Cong, Hui; Yang, Fan; Li, Chuanbo; Zheng, Jun; Xue, Chunlai; Zuo, Yuhua; Cheng, Buwen; Wang, Qiming

2016-01-01

GeSn is an attractive semiconductor material for Si-based photonics. However, large lattice mismatch between GeSn and Si and the low solubility of Sn in Ge limit its development. In order to obtain high Sn-content GeSn on Si, it is normally grown at low temperature, which would lead to inevitable dislocations. Here, we reported a single-crystal defect-free graded GeSn on insulator (GSOI) stripes laterally grown by rapid melting growth (RMG). The Sn-content reaches to 14.2% at the end of the GSOI stripe. Transmission electron microscopy observation shows the GSOI stripe without stacking fault and dislocations. P-channel pseudo metal-oxide-semiconductor field effect transistors (MOSFETs) and metal-semiconductor-metal (MSM) Schottky junction photodetectors were fabricated on these GSOIs. Good transistor performance with a low field peak hole mobility of 402 cm2/Vs is obtained, which indicates a high-quality of this GSOI structure. Strong near-infrared and short-wave infrared optical absorption of the MSM photodetectors at 1550 nm and 2000 nm were observed. Owing to high Sn-content and defect-free, responsivity of 236 mA/W@-1.5 V is achieved at 1550 nm wavelength. In addition, responsivity reaches 154 mA/W@-1.5 V at 2000 nm with the optical absorption layer only 200 nm-thick, which is the highest value reported for GeSn junction photodetectors until now. PMID:27941825

Defect-free high Sn-content GeSn on insulator grown by rapid melting growth

NASA Astrophysics Data System (ADS)

Liu, Zhi; Cong, Hui; Yang, Fan; Li, Chuanbo; Zheng, Jun; Xue, Chunlai; Zuo, Yuhua; Cheng, Buwen; Wang, Qiming

2016-12-01

GeSn is an attractive semiconductor material for Si-based photonics. However, large lattice mismatch between GeSn and Si and the low solubility of Sn in Ge limit its development. In order to obtain high Sn-content GeSn on Si, it is normally grown at low temperature, which would lead to inevitable dislocations. Here, we reported a single-crystal defect-free graded GeSn on insulator (GSOI) stripes laterally grown by rapid melting growth (RMG). The Sn-content reaches to 14.2% at the end of the GSOI stripe. Transmission electron microscopy observation shows the GSOI stripe without stacking fault and dislocations. P-channel pseudo metal-oxide-semiconductor field effect transistors (MOSFETs) and metal-semiconductor-metal (MSM) Schottky junction photodetectors were fabricated on these GSOIs. Good transistor performance with a low field peak hole mobility of 402 cm2/Vs is obtained, which indicates a high-quality of this GSOI structure. Strong near-infrared and short-wave infrared optical absorption of the MSM photodetectors at 1550 nm and 2000 nm were observed. Owing to high Sn-content and defect-free, responsivity of 236 mA/W@-1.5 V is achieved at 1550 nm wavelength. In addition, responsivity reaches 154 mA/W@-1.5 V at 2000 nm with the optical absorption layer only 200 nm-thick, which is the highest value reported for GeSn junction photodetectors until now.

Image guided IMRT dosimetry using anatomy specific MOSFET configurations

PubMed Central

Norrlinger, Bern; Heaton, Robert; Islam, Mohammad

2008-01-01

We have investigated the feasibility of using a set of multiple MOSFETs in conjunction with the mobileMOSFET wireless dosimetry system, to perform a comprehensive and efficient quality assurance (QA) of IMRT plans. Anatomy specific MOSFET configurations incorporating 5 MOSFETs have been developed for a specially designed IMRT dosimetry phantom. Kilovoltage cone beam computed tomography (kV CBCT) imaging was used to increase the positional precision and accuracy of the detectors and phantom, and so minimize dosimetric uncertainties in high dose gradient regions. The effectiveness of the MOSFET based dose measurements was evaluated by comparing the corresponding doses measured by an ion chamber. For 20 head and neck IMRT plans the agreement between the MOSFET and ionization chamber dose measurements was found to be within −0.26±0.88% and 0.06±1.94% (1σ) for measurement points in the high dose and low dose respectively. A precision of 1 mm in detector positioning was achieved by using the X‐Ray Volume Imaging (XVI) kV CBCT system available with the Elekta Synergy Linear Accelerator. Using the anatomy specific MOSFET configurations, simultaneous measurements were made at five strategically located points covering high dose and low dose regions. The agreement between measurements and calculated doses by the treatment planning system for head and neck and prostate IMRT plans was found to be within 0.47±2.45%. The results indicate that a cylindrical phantom incorporating multiple MOSFET detectors arranged in an anatomy specific configuration, in conjunction with image guidance, can be utilized to perform a comprehensive and efficient quality assurance of IMRT plans. PACS number: 87.55.Qr

Recent Radiation Test Results for Trench Power MOSFETs

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie; Casey, Megan C.; Wilcox, Edward P.; Phan, Anthony M.; Kim, Hak S.; Topper, Alyson D.; Ladbury, Raymond L.; Label, Kenneth A.

2017-01-01

Single-event effect (SEE) radiation test results are presented for various trench-gate power MOSFETs. The heavy-ion response of the first (and only) radiation-hardened trench-gate power MOSFET is evaluated: the manufacturer SEE response curve is verified and importantly, no localized dosing effects are measured, distinguishing it from other, non-hardened trench-gate power MOSFETs. Evaluations are made of n-type commercial and both n- and p-type automotive grade trench-gate device using ions comparable to of those on the low linear energy transfer (LET) side of the iron knee of the galactic cosmic ray spectrum, to explore suitability of these parts for missions with higher risk tolerance and shorter duration, such as CubeSats. Part-to-part variability of SEE threshold suggests testing with larger sample sizes and applying more aggressive derating to avoid on-orbit failures. The n-type devices yielded expected localized dosing effects including when irradiated in an unbiased (0-V) configuration, adding to the challenge of inserting these parts into space flight missions.

Characteristics of TiO2/ZnO bilayer film towards pH sensitivity prepared by different spin coating deposition process

NASA Astrophysics Data System (ADS)

Rahman, Rohanieza Abdul; Zulkefle, Muhammad Al Hadi; Abdullah, Wan Fazlida Hanim; Rusop, M.; Herman, Sukreen Hana

2016-07-01

In this study, titanium dioxide (TiO2) and zinc oxide (ZnO) bilayer film for pH sensing application will be presented. TiO2/ZnO bilayer film with different speed of spin-coating process was deposited on Indium Tin Oxide (ITO), prepared by sol-gel method. This fabricated bilayer film was used as sensing membrane for Extended Gate Field-Effect Transistor (EGFET) for pH sensing application. Experimental results indicated that the sensor is able to detect the sensitivity towards pH buffer solution. In order to obtained the result, sensitivity measurement was done by using the EGFET setup equipment with constant-current (100 µA) and constant-voltage (0.3 V) biasing interfacing circuit. TiO2/ZnO bilayer film which the working electrode, act as the pH-sensitive membrane was connected to a commercial metal-oxide semiconductor FET (MOSFET). This MOSFET then was connected to the interfacing circuit. The sensitivity of the TiO2 thin film towards pH buffer solution was measured by dipping the sensing membrane in pH4, pH7 and pH10 buffer solution. These thin films were characterized by using Field Emission Scanning Electron Microscope (FESEM) to obtain the surface morphology of the composite bilayer films. In addition, I-V measurement was done in order to determine the electrical properties of the bilayer films. According to the result obtained in this experiment, bilayer film that spin at 4000 rpm, gave highest sensitivity which is 52.1 mV/pH. Relating the I-V characteristic of the thin films and sensitivity, the sensing membrane with higher conductivity gave better sensitivity.

Lateral solid phase epitaxy of silicon and application to the fabrication of metal oxide semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Greene, Brian Joseph

Thin film silicon on insulator fabrication is an increasingly important technology requirement for improving performance in future generation devices and circuits. One process for SOI fabrication that has recently been generating renewed interest is Lateral Solid Phase Epitaxy (LSPE) of silicon over oxide. This process involves annealing amorphous silicon that has been deposited on oxide patterned Si wafers. The (001) Si substrate forms the crystalline seed for epitaxial growth, permitting the generation of Si films that are both single crystal, and oriented to the substrate. This method is particularly attractive to fabrication that requires low temperature processing, because the Si films are deposited in the amorphous phase at temperatures near 525°C, and crystallized at temperatures near 570°C. It is also attractive for applications requiring three dimensional stacking of active silicon device layers, due to the relatively low temperatures involved. For sub-50 nm gate length MOSFET fabrication, an SOI thickness on the order of 10 nm will be required. One limitation of the LSPE process has been the need for thick films (0.5--2 mum) and/or heavy P doping (10 19--1020 cm-3) to increase the maximum achievable lateral growth distance, and therefore minimize the area on the substrate occupied by seed holes. This dissertation discusses the characterization and optimization of process conditions for large area LSPE silicon film growth, as well as efforts to adapt the traditional LSPE process to achieve ultra-thin SOI layers (Tsilicon ≤ 25 nm) while avoiding the use of heavy active doping layers. MOSFETs fabricated in these films that exhibit electron mobility comparable to the Universal Si MOS Mobility are described.

Characteristics of TiO{sub 2}/ZnO bilayer film towards pH sensitivity prepared by different spin coating deposition process

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rahman, Rohanieza Abdul, E-mail: rohanieza.abdrahman@gmail.com; Zulkefle, Muhammad Al Hadi, E-mail: alhadizulkefle@gmail.com; Abdullah, Wan Fazlida Hanim, E-mail: wanfaz@salam.uitm.edu.my

In this study, titanium dioxide (TiO{sub 2}) and zinc oxide (ZnO) bilayer film for pH sensing application will be presented. TiO{sub 2}/ZnO bilayer film with different speed of spin-coating process was deposited on Indium Tin Oxide (ITO), prepared by sol-gel method. This fabricated bilayer film was used as sensing membrane for Extended Gate Field-Effect Transistor (EGFET) for pH sensing application. Experimental results indicated that the sensor is able to detect the sensitivity towards pH buffer solution. In order to obtained the result, sensitivity measurement was done by using the EGFET setup equipment with constant-current (100 µA) and constant-voltage (0.3 V)more » biasing interfacing circuit. TiO{sub 2}/ZnO bilayer film which the working electrode, act as the pH-sensitive membrane was connected to a commercial metal-oxide semiconductor FET (MOSFET). This MOSFET then was connected to the interfacing circuit. The sensitivity of the TiO2 thin film towards pH buffer solution was measured by dipping the sensing membrane in pH4, pH7 and pH10 buffer solution. These thin films were characterized by using Field Emission Scanning Electron Microscope (FESEM) to obtain the surface morphology of the composite bilayer films. In addition, I-V measurement was done in order to determine the electrical properties of the bilayer films. According to the result obtained in this experiment, bilayer film that spin at 4000 rpm, gave highest sensitivity which is 52.1 mV/pH. Relating the I-V characteristic of the thin films and sensitivity, the sensing membrane with higher conductivity gave better sensitivity.« less

Design, simulation and comparative analysis of CNT based cascode operational transconductance amplifiers

NASA Astrophysics Data System (ADS)

Nizamuddin, M.; Loan, Sajad A.; Alamoud, Abdul R.; Abbassi, Shuja A.

2015-10-01

In this work, design and calibrated simulation of carbon nanotube field effect transistor (CNTFET)-based cascode operational transconductance amplifiers (COTA) have been performed. Three structures of CNTFET-based COTAs have been designed using HSPICE and have been compared with the conventional CMOS-based COTAs. The proposed COTAs include one using pure CNTFETs and two others that employ CNTFETs, as well as the conventional MOSFETs. The simulation study has revealed that the CNTFET-based COTAs have significantly outperformed the conventional MOSFET-based COTAs. A significant increase in dc gain, output resistance and slew rate of 81.4%, 25% and 13.2%, respectively, have been achieved in the proposed pure CNT-based COTA in comparison to the conventional CMOS-based COTA. The power consumption in the pure CNT-COTA is 324 times less in comparison to the conventional CMOS-COTA. Further, the phase margin (PM), gain margin (GM), common mode and power supply rejection ratios have been significantly increased in the proposed CNT-based COTAs in comparison to the conventional CMOS-based COTAs. Furthermore, to see the advantage of cascoding, the proposed CNT-based cascode OTAs have been compared with the CNT-based OTAs. It has been observed that by incorporating the concept of cascode in the CNTFET-based OTAs, significant increases in gain (12.5%) and output resistance (13.07%) have been achieved. The performance of the proposed COTAs has been further observed by changing the number of CNTs (N), CNT pitch (S) and CNT diameter (DCNT) in the CNTFETs used. It has been observed that the performance of the proposed COTAs can be significantly improved by using optimum values of N, S and DCNT.

A CMOS matrix for extracting MOSFET parameters before and after irradiation

NASA Technical Reports Server (NTRS)

Blaes, B. R.; Buehler, M. G.; Lin, Y.-S.; Hicks, K. A.

1988-01-01

An addressable matrix of 16 n- and 16 p-MOSFETs was designed to extract the dc MOSFET parameters for all dc gate bias conditions before and after irradiation. The matrix contains four sets of MOSFETs, each with four different geometries that can be biased independently. Thus the worst-case bias scenarios can be determined. The MOSFET matrix was fabricated at a silicon foundry using a radiation-soft CMOS p-well LOCOS process. Co-60 irradiation results for the n-MOSFETs showed a threshold-voltage shift of -3 mV/krad(Si), whereas the p-MOSFETs showed a shift of 21 mV/krad(Si). The worst-case threshold-voltage shift occurred for the n-MOSFETs, with a gate bias of 5 V during the anneal. For the p-MOSFETs, biasing did not affect the shift in the threshold voltage. A parasitic MOSFET dominated the leakage of the n-MOSFET biased with 5 V on the gate during irradiation. Co-60 test results for other parameters are also presented.

Oxidation of gallium arsenide in a plasma multipole device. Study of the MOS structures obtained

NASA Technical Reports Server (NTRS)

Gourrier, S.; Mircea, A.; Simondet, F.

1980-01-01

The oxygen plasma oxidation of GaAs was studied in order to obtain extremely high frequency responses with MOS devices. In the multipole system a homogeneous oxygen plasma of high density can easily be obtained in a large volume. This system is thus convenient for the study of plasma oxidation of GaAs. The electrical properties of the MOS diodes obtained in this way are controlled by interface states, located mostly in the upper half of the band gap where densities in the 10 to the 13th power/(sq cm) (eV) range can be estimated. Despite these interface states the possibility of fabricating MOSFET transistors working mostly in the depletion mode for a higher frequency cut-off still exists.

Microdose Induced Drain Leakage Effects in Power Trench MOSFETs: Experiment and Modeling

NASA Astrophysics Data System (ADS)

Zebrev, Gennady I.; Vatuev, Alexander S.; Useinov, Rustem G.; Emeliyanov, Vladimir V.; Anashin, Vasily S.; Gorbunov, Maxim S.; Turin, Valentin O.; Yesenkov, Kirill A.

2014-08-01

We study experimentally and theoretically the micro-dose induced drain-source leakage current in the trench power MOSFETs under irradiation with high-LET heavy ions. We found experimentally that cumulative increase of leakage current occurs by means of stochastic spikes corresponding to a strike of single heavy ion into the MOSFET gate oxide. We simulate this effect with the proposed analytic model allowing to describe (including Monte Carlo methods) both the deterministic (cumulative dose) and stochastic (single event) aspects of the problem. Based on this model the survival probability assessment in space heavy ion environment with high LETs was proposed.

Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

NASA Astrophysics Data System (ADS)

Ashenafi, Emeshaw

Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse-with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon-on-ferroelectric-insulator field effect transistor (SOFFET). In both of the designs, the ability to control the threshold voltage via bias voltage at the back gate makes both devices more flexible for sleep transistors design than a bulk MOSFET. The proposed approaches simplify the design complexity, reduce the chip area, eliminate the voltage drop by sleep transistor, and improve power dissipation. In addition, the design provides a dynamically controlled Vt for times when the circuit needs to be in a sleep or switching mode.

Impact of optical phonon scattering on inversion channel mobility in 4H-SiC trenched MOSFETs

NASA Astrophysics Data System (ADS)

Kutsuki, Katsuhiro; Kawaji, Sachiko; Watanabe, Yukihiko; Onishi, Toru; Fujiwara, Hirokazu; Yamamoto, Kensaku; Yamamoto, Toshimasa

2017-04-01

Temperature characteristics of the channel mobility were investigated for 4H-SiC trenched MOSFETs in the range from 30 to 200 °C. The conventional model of channel mobility limited by carrier scattering is based on Si-MOSFETs and shows a greatly different channel mobility from the experimental value, especially at high temperatures. On the other hand, our improved mobility model taking into account optical phonon scattering yielded results in excellent agreement with experimental results. Moreover, the major factors limiting the channel mobility were found to be Coulomb scattering in a low effective field (<0.7 MV/cm) and optical phonon scattering in a high effective field.

Characterization of ultrathin SOI film and application to short channel MOSFETs.

PubMed

Tang, Xiaohui; Reckinger, Nicolas; Larrieu, Guilhem; Dubois, Emmanuel; Flandre, Denis; Raskin, Jean-Pierre; Nysten, Bernard; Jonas, Alain M; Bayot, Vincent

2008-04-23

In this study, a very dilute solution (NH(4)OH:H(2)O(2):H(2)O 1:8:64 mixture) was employed to reduce the thickness of commercially available SOI wafers down to 3 nm. The etch rate is precisely controlled at 0.11 Å s(-1) based on the self-limited etching speed of the solution. The thickness uniformity of the thin film, evaluated by spectroscopic ellipsometry and by high-resolution x-ray reflectivity, remains constant through the thinning process. Moreover, the film roughness, analyzed by atomic force microscopy, slightly improves during the thinning process. The residual stress in the thin film is much smaller than that obtained by sacrificial oxidation. Mobility, measured by means of a bridge-type Hall bar on 15 nm film, is not significantly reduced compared to the value of bulk silicon. Finally, the thinned SOI wafers were used to fabricate Schottky-barrier metal-oxide-semiconductor field-effect transistors with a gate length down to 30 nm, featuring state-of-the-art current drive performance.