The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V. A. L.

2013-02-01

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics.The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics. Electronic supplementary information (ESI) available: UV-vis spectrum of Au nanoparticle aqueous solution, transfer characteristics of the transistors without inserting an Au nanoparticle monolayer, AFM image of the pentacene layer, transfer characteristics at different program voltages and memory windows with respect to the P/E voltage. See DOI: 10.1039/c2nr32579a

Similarity between the response of memristive and memcapacitive circuits subjected to ramped voltage

NASA Astrophysics Data System (ADS)

Kanygin, Mikhail A.; Katkov, Mikhail V.; Pershin, Yuriy V.

2017-07-01

We report a similar feature in the response of resistor-memristor and capacitor-memcapacitor circuits with threshold-type memory devices driven by triangular waveform voltage. In both cases, the voltage across the memory device is stabilized during the switching of the memory device state. While in the memristive circuit this feature is observed when the applied voltage changes in one direction, the memcapacitive circuit with a ferroelectric memcapacitor demonstrates the voltage stabilization effect at both sweep directions. The discovered behavior of capacitor-memcapacitor circuit is also demonstrated experimentally. We anticipate that our observation can be used in the design of electronic circuits with emergent memory devices as well as in the identification and characterization of memory effects in threshold-type memory devices.

Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

PubMed Central

Song, Ji-Min; Lee, Jang-Sik

2016-01-01

Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

Photoisomerization-induced manipulation of single-electron tunneling for novel Si-based optical memory.

PubMed

Hayakawa, Ryoma; Higashiguchi, Kenji; Matsuda, Kenji; Chikyow, Toyohiro; Wakayama, Yutaka

2013-11-13

We demonstrated optical manipulation of single-electron tunneling (SET) by photoisomerization of diarylethene molecules in a metal-insulator-semiconductor (MIS) structure. Stress is placed on the fact that device operation is realized in the practical device configuration of MIS structure and that it is not achieved in structures based on nanogap electrodes and scanning probe techniques. Namely, this is a basic memory device configuration that has the potential for large-scale integration. In our device, the threshold voltage of SET was clearly modulated as a reversible change in the molecular orbital induced by photoisomerization, indicating that diarylethene molecules worked as optically controllable quantum dots. These findings will allow the integration of photonic functionality into current Si-based memory devices, which is a unique feature of organic molecules that is unobtainable with inorganic materials. Our proposed device therefore has enormous potential for providing a breakthrough in Si technology.

Fabrication of poly(methyl methacrylate)-MoS{sub 2}/graphene heterostructure for memory device application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shinde, Sachin M.; Tanemura, Masaki; Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp

2014-12-07

Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material asmore » well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.« less

Transparent and flexible resistive switching memory devices with a very high ON/OFF ratio using gold nanoparticles embedded in a silk protein matrix

NASA Astrophysics Data System (ADS)

Gogurla, Narendar; Mondal, Suvra P.; Sinha, Arun K.; Katiyar, Ajit K.; Banerjee, Writam; Kundu, Subhas C.; Ray, Samit K.

2013-08-01

The growing demand for biomaterials for electrical and optical devices is motivated by the need to make building blocks for the next generation of printable bio-electronic devices. In this study, transparent and flexible resistive memory devices with a very high ON/OFF ratio incorporating gold nanoparticles into the Bombyx mori silk protein fibroin biopolymer are demonstrated. The novel electronic memory effect is based on filamentary switching, which leads to the occurrence of bistable states with an ON/OFF ratio larger than six orders of magnitude. The mechanism of this process is attributed to the formation of conductive filaments through silk fibroin and gold nanoparticles in the nanocomposite. The proposed hybrid bio-inorganic devices show promise for use in future flexible and transparent nanoelectronic systems.

Multi-bit dark state memory: Double quantum dot as an electronic quantum memory

NASA Astrophysics Data System (ADS)

Aharon, Eran; Pozner, Roni; Lifshitz, Efrat; Peskin, Uri

2016-12-01

Quantum dot clusters enable the creation of dark states which preserve electrons or holes in a coherent superposition of dot states for a long time. Various quantum logic devices can be envisioned to arise from the possibility of storing such trapped particles for future release on demand. In this work, we consider a double quantum dot memory device, which enables the preservation of a coherent state to be released as multiple classical bits. Our unique device architecture uses an external gating for storing (writing) the coherent state and for retrieving (reading) the classical bits, in addition to exploiting an internal gating effect for the preservation of the coherent state.

High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

2017-08-01

Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

High‐Performance Nonvolatile Organic Field‐Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers

PubMed Central

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn

2017-01-01

Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Dry writing of highly conductive electrodes on papers by using silver nanoparticle-graphene hybrid pencils.

PubMed

Park, Jun-Ho; Park, Myung-Joo; Lee, Jang-Sik

2017-01-05

The development of paper electronics would enable realization of extremely cheap devices for portable, disposable, and environmentally-benign electronics. Here, we propose a simple dry-writing tool similar to a pencil, which can be used to draw electrically conducting lines on paper for use in paper-based electronic devices. The fabricated pencil is composed of silver nanoparticles decorated on graphene layers to construct layered hybrid nanostructures. This pencil can draw highly conductive lines that are flexible and foldable on conventional papers. Electrodes drawn using this pencil on conventional copy paper are stable during repetitive mechanical folding and highly resistant to moisture/chemicals. This pencil can draw a conductive line where its resistance can be tuned by changing the amount of nanoparticles. A nonvolatile memory device is realized on papers by hand written lines with different resistance. All memory elements are composed of carbons on papers, so complete data security can be achieved by burning the memory papers. This work will provide a new opportunity to fabricate electronic devices on real papers with good conductivity as well as robust mechanical/chemical stability.

Metal-organic molecular device for non-volatile memory storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Radha, B., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in

Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organicmore » complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.« less

Resonant tunneling based graphene quantum dot memristors.

PubMed

Pan, Xuan; Skafidas, Efstratios

2016-12-08

In this paper, we model two-terminal all graphene quantum dot (GQD) based resistor-type memory devices (memristors). The resistive switching is achieved by resonant electron tunneling. We show that parallel GQDs can be used to create multi-state memory circuits. The number of states can be optimised with additional voltage sources, whilst the noise margin for each state can be controlled by appropriately choosing the branch resistance. A three-terminal GQD device configuration is also studied. The addition of an isolated gate terminal can be used to add further or modify the states of the memory device. The proposed devices provide a promising route towards volatile memory devices utilizing only atomically thin two-dimensional graphene.

Forced Ion Migration for Chalcogenide Phase Change Memory Device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2011-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2012-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Solution-processed flexible NiO resistive random access memory device

NASA Astrophysics Data System (ADS)

Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

2018-04-01

Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

Giant Electroresistive Ferroelectric Diode on 2DEG

PubMed Central

Kim, Shin-Ik; Jin Gwon, Hyo; Kim, Dai-Hong; Keun Kim, Seong; Choi, Ji-Won; Yoon, Seok-Jin; Jung Chang, Hye; Kang, Chong-Yun; Kwon, Beomjin; Bark, Chung-Wung; Hong, Seong-Hyeon; Kim, Jin-Sang; Baek, Seung-Hyub

2015-01-01

Manipulation of electrons in a solid through transmitting, storing, and switching is the fundamental basis for the microelectronic devices. Recently, the electroresistance effect in the ferroelectric capacitors has provided a novel way to modulate the electron transport by polarization reversal. Here, we demonstrate a giant electroresistive ferroelectric diode integrating a ferroelectric capacitor into two-dimensional electron gas (2DEG) at oxide interface. As a model system, we fabricate an epitaxial Au/Pb(Zr0.2Ti0.8)O3/LaAlO3/SrTiO3 heterostructure, where 2DEG is formed at LaAlO3/SrTiO3 interface. This device functions as a two-terminal, non-volatile memory of 1 diode-1 resistor with a large I+/I− ratio (>108 at ±6 V) and Ion/Ioff ratio (>107). This is attributed to not only Schottky barrier modulation at metal/ferroelectric interface by polarization reversal but also the field-effect metal-insulator transition of 2DEG. Moreover, using this heterostructure, we can demonstrate a memristive behavior for an artificial synapse memory, where the resistance can be continuously tuned by partial polarization switching, and the electrons are only unidirectionally transmitted. Beyond non-volatile memory and logic devices, our results will provide new opportunities to emerging electronic devices such as multifunctional nanoelectronics and neuromorphic electronics. PMID:26014446

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Organic-Inorganic Hybrid Halide Perovskites for Memories, Transistors, and Artificial Synapses.

PubMed

Choi, Jaeho; Han, Ji Su; Hong, Kootak; Kim, Soo Young; Jang, Ho Won

2018-05-30

Fascinating characteristics of halide perovskites (HPs), which cannot be seen in conventional semiconductors and metal oxides, have boosted the application of HPs in electronic devices beyond optoelectronics such as solar cells, photodetectors, and light-emitting diodes. Here, recent advances in HP-based memory and logic devices such as resistive-switching memories (i.e., resistive random access memory (RRAM) or memristors), transistors, and artificial synapses are reviewed, focusing on inherently exotic properties of HPs: i) tunable bandgap, ii) facile majority carrier control, iii) fast ion migration, and iv) superflexibility. Various fabrication techniques of HP thin films from solution-based methods to vacuum processes are introduced. Up-to-date work in the field, emphasizing the compositional flexibility of HPs, suggest that HPs are promising candidates for next-generation electronic devices. Taking advantages of their unique electrical properties, low-cost and low-temperature synthesis, and compositional and mechanical flexibility, HPs have enormous potential to provide a new platform for future electronic devices and explosively intensive studies will pave the way in finding new HP materials beyond conventional silicon-based semiconductors to keep up with "More-than-Moore" times. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Three-terminal resistive switching memory in a transparent vertical-configuration device

NASA Astrophysics Data System (ADS)

Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

2014-01-01

The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.

Direct Observation of Conducting Filaments in Tungsten Oxide Based Transparent Resistive Switching Memory.

PubMed

Qian, Kai; Cai, Guofa; Nguyen, Viet Cuong; Chen, Tupei; Lee, Pooi See

2016-10-05

Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO 3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/-0.42 V), and long retention time (>10 4 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive memory devices.

Shape Memory Polymers for Body Motion Energy Harvesting and Self-Powered Mechanosensing.

PubMed

Liu, Ruiyuan; Kuang, Xiao; Deng, Jianan; Wang, Yi-Cheng; Wang, Aurelia C; Ding, Wenbo; Lai, Ying-Chih; Chen, Jun; Wang, Peihong; Lin, Zhiqun; Qi, H Jerry; Sun, Baoquan; Wang, Zhong Lin

2018-02-01

Growing demand in portable electronics raises a requirement to electronic devices being stretchable, deformable, and durable, for which functional polymers are ideal choices of materials. Here, the first transformable smart energy harvester and self-powered mechanosensation sensor using shape memory polymers is demonstrated. The device is based on the mechanism of a flexible triboelectric nanogenerator using the thermally triggered shape transformation of organic materials for effectively harvesting mechanical energy. This work paves a new direction for functional polymers, especially in the field of mechanosensation for potential applications in areas such as soft robotics, biomedical devices, and wearable electronics. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2012 CFR

2012-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2011 CFR

2011-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

45 CFR 160.103 - Definitions.

Code of Federal Regulations, 2010 CFR

2010-10-01

..., the following definitions apply to this subchapter: Act means the Social Security Act. ANSI stands for... required documents. Electronic media means: (1) Electronic storage media including memory devices in computers (hard drives) and any removable/transportable digital memory medium, such as magnetic tape or disk...

Realization of the Switching Mechanism in Resistance Random Access Memory™ Devices: Structural and Electronic Properties Affecting Electron Conductivity in a Hafnium Oxide-Electrode System Through First-Principles Calculations

NASA Astrophysics Data System (ADS)

Aspera, Susan Meñez; Kasai, Hideaki; Kishi, Hirofumi; Awaya, Nobuyoshi; Ohnishi, Shigeo; Tamai, Yukio

2013-01-01

The resistance random access memory (RRAM™) device, with its electrically induced nanoscale resistive switching capacity, has attracted considerable attention as a future nonvolatile memory device. Here, we propose a mechanism of switching based on an oxygen vacancy migration-driven change in the electronic properties of the transition-metal oxide film stimulated by set pulse voltages. We used density functional theory-based calculations to account for the effect of oxygen vacancies and their migration on the electronic properties of HfO2 and Ta/HfO2 systems, thereby providing a complete explanation of the RRAM™ switching mechanism. Furthermore, computational results on the activation energy barrier for oxygen vacancy migration were found to be consistent with the set and reset pulse voltage obtained from experiments. Understanding this mechanism will be beneficial to effectively realizing the materials design in these devices.

Memory and learning behaviors mimicked in nanogranular SiO2-based proton conductor gated oxide-based synaptic transistors

NASA Astrophysics Data System (ADS)

Wan, Chang Jin; Zhu, Li Qiang; Zhou, Ju Mei; Shi, Yi; Wan, Qing

2013-10-01

In neuroscience, signal processing, memory and learning function are established in the brain by modifying ionic fluxes in neurons and synapses. Emulation of memory and learning behaviors of biological systems by nanoscale ionic/electronic devices is highly desirable for building neuromorphic systems or even artificial neural networks. Here, novel artificial synapses based on junctionless oxide-based protonic/electronic hybrid transistors gated by nanogranular phosphorus-doped SiO2-based proton-conducting films are fabricated on glass substrates by a room-temperature process. Short-term memory (STM) and long-term memory (LTM) are mimicked by tuning the pulse gate voltage amplitude. The LTM process in such an artificial synapse is due to the proton-related interfacial electrochemical reaction. Our results are highly desirable for building future neuromorphic systems or even artificial networks via electronic elements.In neuroscience, signal processing, memory and learning function are established in the brain by modifying ionic fluxes in neurons and synapses. Emulation of memory and learning behaviors of biological systems by nanoscale ionic/electronic devices is highly desirable for building neuromorphic systems or even artificial neural networks. Here, novel artificial synapses based on junctionless oxide-based protonic/electronic hybrid transistors gated by nanogranular phosphorus-doped SiO2-based proton-conducting films are fabricated on glass substrates by a room-temperature process. Short-term memory (STM) and long-term memory (LTM) are mimicked by tuning the pulse gate voltage amplitude. The LTM process in such an artificial synapse is due to the proton-related interfacial electrochemical reaction. Our results are highly desirable for building future neuromorphic systems or even artificial networks via electronic elements. Electronic supplementary information (ESI) available. See DOI: 10.1039/c3nr02987e

3D Printing of Shape Memory Polymers for Flexible Electronic Devices.

PubMed

Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

2016-06-01

The formation of 3D objects composed of shape memory polymers for flexible electronics is described. Layer-by-layer photopolymerization of methacrylated semicrystalline molten macromonomers by a 3D digital light processing printer enables rapid fabrication of complex objects and imparts shape memory functionality for electrical circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Shape‐Controlled, Self‐Wrapped Carbon Nanotube 3D Electronics

PubMed Central

Wang, Huiliang; Wang, Yanming; Tee, Benjamin C.‐K.; Kim, Kwanpyo; Lopez, Jeffrey; Cai, Wei

2015-01-01

The mechanical flexibility and structural softness of ultrathin devices based on organic thin films and low‐dimensional nanomaterials have enabled a wide range of applications including flexible display, artificial skin, and health monitoring devices. However, both living systems and inanimate systems that are encountered in daily lives are all 3D. It is therefore desirable to either create freestanding electronics in a 3D form or to incorporate electronics onto 3D objects. Here, a technique is reported to utilize shape‐memory polymers together with carbon nanotube flexible electronics to achieve this goal. Temperature‐assisted shape control of these freestanding electronics in a programmable manner is demonstrated, with theoretical analysis for understanding the shape evolution. The shape control process can be executed with prepatterned heaters, desirable for 3D shape formation in an enclosed environment. The incorporation of carbon nanotube transistors, gas sensors, temperature sensors, and memory devices that are capable of self‐wrapping onto any irregular shaped‐objects without degradations in device performance is demonstrated. PMID:27980972

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

From dead leaves to sustainable organic resistive switching memory.

PubMed

Sun, Bai; Zhu, Shouhui; Mao, Shuangsuo; Zheng, Pingping; Xia, Yudong; Yang, Feng; Lei, Ming; Zhao, Yong

2018-03-01

An environmental-friendly, sustainable, pollution-free, biodegradable, flexible and wearable electronic device hold advanced potential applications. Here, an organic resistive switching memory device with Ag/Leaves/Ti/PET structure on a flexible polyethylene terephthalate (PET) substrate was fabricated for the first time. We observed an obvious resistive switching memory characteristic with large switching resistance ratio and stable cycle performance at room temperature. This work demonstrates that leaves, a useless waste, can be properly treated to make useful devices. Furthermore, the as-fabricated devices can be degraded naturally without damage to the environment. Copyright © 2017 Elsevier Inc. All rights reserved.

Wearable Intrinsically Soft, Stretchable, Flexible Devices for Memories and Computing.

PubMed

Rajan, Krishna; Garofalo, Erik; Chiolerio, Alessandro

2018-01-27

A recent trend in the development of high mass consumption electron devices is towards electronic textiles (e-textiles), smart wearable devices, smart clothes, and flexible or printable electronics. Intrinsically soft, stretchable, flexible, Wearable Memories and Computing devices (WMCs) bring us closer to sci-fi scenarios, where future electronic systems are totally integrated in our everyday outfits and help us in achieving a higher comfort level, interacting for us with other digital devices such as smartphones and domotics, or with analog devices, such as our brain/peripheral nervous system. WMC will enable each of us to contribute to open and big data systems as individual nodes, providing real-time information about physical and environmental parameters (including air pollution monitoring, sound and light pollution, chemical or radioactive fallout alert, network availability, and so on). Furthermore, WMC could be directly connected to human brain and enable extremely fast operation and unprecedented interface complexity, directly mapping the continuous states available to biological systems. This review focuses on recent advances in nanotechnology and materials science and pays particular attention to any result and promising technology to enable intrinsically soft, stretchable, flexible WMC.

Wearable Intrinsically Soft, Stretchable, Flexible Devices for Memories and Computing

PubMed Central

Rajan, Krishna; Garofalo, Erik

2018-01-01

A recent trend in the development of high mass consumption electron devices is towards electronic textiles (e-textiles), smart wearable devices, smart clothes, and flexible or printable electronics. Intrinsically soft, stretchable, flexible, Wearable Memories and Computing devices (WMCs) bring us closer to sci-fi scenarios, where future electronic systems are totally integrated in our everyday outfits and help us in achieving a higher comfort level, interacting for us with other digital devices such as smartphones and domotics, or with analog devices, such as our brain/peripheral nervous system. WMC will enable each of us to contribute to open and big data systems as individual nodes, providing real-time information about physical and environmental parameters (including air pollution monitoring, sound and light pollution, chemical or radioactive fallout alert, network availability, and so on). Furthermore, WMC could be directly connected to human brain and enable extremely fast operation and unprecedented interface complexity, directly mapping the continuous states available to biological systems. This review focuses on recent advances in nanotechnology and materials science and pays particular attention to any result and promising technology to enable intrinsically soft, stretchable, flexible WMC. PMID:29382050

Transparent resistive switching memory using aluminum oxide on a flexible substrate

NASA Astrophysics Data System (ADS)

Yeom, Seung-Won; Shin, Sang-Chul; Kim, Tan-Young; Ha, Hyeon Jun; Lee, Yun-Hi; Shim, Jae Won; Ju, Byeong-Kwon

2016-02-01

Resistive switching memory (ReRAM) has attracted much attention in recent times owing to its fast switching, simple structure, and non-volatility. Flexible and transparent electronic devices have also attracted considerable attention. We therefore fabricated an Al2O3-based ReRAM with transparent indium-zinc-oxide (IZO) electrodes on a flexible substrate. The device transmittance was found to be higher than 80% in the visible region (400-800 nm). Bended states (radius = 10 mm) of the device also did not affect the memory performance because of the flexibility of the two transparent IZO electrodes and the thin Al2O3 layer. The conduction mechanism of the resistive switching of our device was explained by ohmic conduction and a Poole-Frenkel emission model. The conduction mechanism was proved by oxygen vacancies in the Al2O3 layer, as analyzed by x-ray photoelectron spectroscopy analysis. These results encourage the application of ReRAM in flexible and transparent electronic devices.

Reduced electron back-injection in Al2O3/AlOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Min Kim, Sung; Lee, Youngmin; Seo, David H.; Seo, Sunae; Wang, Kang L.

2012-12-01

A graphene charge-trap memory is devised using a single-layer graphene channel with an Al2O3/AlOx/Al2O3 oxide stack, where the ion-bombarded AlOx layer is intentionally added to create an abundance of charge-trap sites. The low dielectric constant of AlOx compared to Al2O3 reduces the potential drop in the control oxide Al2O3 and suppresses the electron back-injection from the gate to the charge-storage layer, allowing the memory window of the device to be further extended. This shows that the usage of a lower dielectric constant in the charge-storage layer compared to that of the control oxide layer improves the memory performance for graphene charge-trap memories.

Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

2012-01-01

Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

Investigation of resistive switching behaviours in WO3-based RRAM devices

NASA Astrophysics Data System (ADS)

Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming

2011-01-01

In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.

The strain and thermal induced tunable charging phenomenon in low power flexible memory arrays with a gold nanoparticle monolayer.

PubMed

Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V A L

2013-03-07

The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al(2)O(3)) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al(2)O(3) dielectric layer) could be potentially integrated with large area flexible electronics.

A visual-display and storage device

NASA Technical Reports Server (NTRS)

Bosomworth, D. R.; Moles, W. H.

1972-01-01

Memory and display device uses cathodochromic material to store visual information and fast phosphor to recall information for display and electronic processing. Cathodochromic material changes color when bombarded with electrons, and is restored to its original color when exposed to light of appropiate wavelength.

Assistive technology for memory support in dementia.

PubMed

Van der Roest, Henriëtte G; Wenborn, Jennifer; Pastink, Channah; Dröes, Rose-Marie; Orrell, Martin

2017-06-11

The sustained interest in electronic assistive technology in dementia care has been fuelled by the urgent need to develop useful approaches to help support people with dementia at home. Also the low costs and wide availability of electronic devices make it more feasible to use electronic devices for the benefit of disabled persons. Information Communication Technology (ICT) devices designed to support people with dementia are usually referred to as Assistive Technology (AT) or Electronic Assistive Technology (EAT). By using AT in this review we refer to electronic assistive devices. A range of AT devices has been developed to support people with dementia and their carers to manage their daily activities and to enhance safety, for example electronic pill boxes, picture phones, or mobile tracking devices. Many are commercially available. However, the usefulness and user-friendliness of these devices are often poorly evaluated. Although reviews of (electronic) memory aids do exist, a systematic review of studies focusing on the efficacy of AT for memory support in people with dementia is lacking. Such a review would guide people with dementia and their informal and professional carers in selecting appropriate AT devices. Primary objectiveTo assess the efficacy of AT for memory support in people with dementia in terms of daily performance of personal and instrumental activities of daily living (ADL), level of dependency, and admission to long-term care. Secondary objectiveTo assess the impact of AT on: users (autonomy, usefulness and user-friendliness, adoption of AT); cognitive function and neuropsychiatric symptoms; need for informal and formal care; perceived quality of life; informal carer burden, self-esteem and feelings of competence; formal carer work satisfaction, workload and feelings of competence; and adverse events. We searched ALOIS, the Specialised Register of the Cochrane Dementia and Cognitive Improvement Group (CDCIG), on 10 November 2016. ALOIS is maintained by the Information Specialists of the CDCIG and contains studies in the areas of dementia prevention, dementia treatment and cognitive enhancement in healthy people. We also searched the following list of databases, adapting the search strategy as necessary: Centre for Reviews and Dissemination (CRD) Databases, up to May 2016; The Collection of Computer Science Bibliographies; DBLP Computer Science Bibliography; HCI Bibliography: Human-Computer Interaction Resources; and AgeInfo, all to June 2016; PiCarta; Inspec; Springer Link Lecture Notes; Social Care Online; and IEEE Computer Society Digital Library, all to October 2016; J-STAGE: Japan Science and Technology Information Aggregator, Electronic; and Networked Computer Science Technical Reference Library (NCSTRL), both to November 2016; Computing Research Repository (CoRR) up to December 2016; and OT seeker; and ADEAR, both to February 2017. In addition, we searched Google Scholar and OpenSIGLE for grey literature. We intended to review randomised controlled trials (RCTs) and clustered randomised trials with blinded assessment of outcomes that evaluated an electronic assistive device used with the single aim of supporting memory function in people diagnosed with dementia. The control interventions could either be 'care (or treatment) as usual' or non-technological psychosocial interventions (including interventions that use non-electronic assistive devices) also specifically aimed at supporting memory. Outcome measures included activities of daily living, level of dependency, clinical and care-related outcomes (for example admission to long-term care), perceived quality of life and well-being, and adverse events resulting from the use of AT; as well as the effects of AT on carers. Two review authors independently screened all titles and abstracts identified by the search. We identified no studies which met the inclusion criteria. This review highlights the current lack of high-quality evidence to determine whether AT is effective in supporting people with dementia to manage their memory problems.

Nanogap-Engineerable Electromechanical System for Ultralow Power Memory.

PubMed

Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei; Chu, Weiguo; Zhou, Haiqing; Sun, Lianfeng

2018-02-01

Nanogap engineering of low-dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub-5 nm nanogaped single-walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10 -19 J bit -1 ), ON/OFF ratio of 10 5 , stable switching ON operations, and over 30 h retention time in ambient conditions.

Nanogap‐Engineerable Electromechanical System for Ultralow Power Memory

PubMed Central

Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei

2017-01-01

Abstract Nanogap engineering of low‐dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub‐5 nm nanogaped single‐walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10−19 J bit−1), ON/OFF ratio of 105, stable switching ON operations, and over 30 h retention time in ambient conditions. PMID:29619307

Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

NASA Astrophysics Data System (ADS)

Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong

2015-03-01

Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

Transferable and flexible label-like macromolecular memory on arbitrary substrates with high performance and a facile methodology.

PubMed

Lai, Ying-Chih; Hsu, Fang-Chi; Chen, Jian-Yu; He, Jr-Hau; Chang, Ting-Chang; Hsieh, Ya-Ping; Lin, Tai-Yuan; Yang, Ying-Jay; Chen, Yang-Fang

2013-05-21

A newly designed transferable and flexible label-like organic memory based on a graphene electrode behaves like a sticker, and can be readily placed on desired substrates or devices for diversified purposes. The memory label reveals excellent performance despite its physical presentation. This may greatly extend the memory applications in various advanced electronics and provide a simple scheme to integrate with other electronics. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Novel conformal organic antireflective coatings for advanced I-line lithography

NASA Astrophysics Data System (ADS)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Ferroelectric polarization induces electronic nonlinearity in ion-doped conducting polymers

PubMed Central

Fabiano, Simone; Sani, Negar; Kawahara, Jun; Kergoat, Loïg; Nissa, Josefin; Engquist, Isak; Crispin, Xavier; Berggren, Magnus

2017-01-01

Poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS) is an organic mixed ion-electron conducting polymer. The PEDOT phase transports holes and is redox-active, whereas the PSS phase transports ions. When PEDOT is redox-switched between its semiconducting and conducting state, the electronic and optical properties of its bulk are controlled. Therefore, it is appealing to use this transition in electrochemical devices and to integrate those into large-scale circuits, such as display or memory matrices. Addressability and memory functionality of individual devices, within these matrices, are typically achieved by nonlinear current-voltage characteristics and bistability—functions that can potentially be offered by the semiconductor-conductor transition of redox polymers. However, low conductivity of the semiconducting state and poor bistability, due to self-discharge, make fast operation and memory retention impossible. We report that a ferroelectric polymer layer, coated along the counter electrode, can control the redox state of PEDOT. The polarization switching characteristics of the ferroelectric polymer, which take place as the coercive field is overcome, introduce desired nonlinearity and bistability in devices that maintain PEDOT in its highly conducting and fast-operating regime. Memory functionality and addressability are demonstrated in ferro-electrochromic display pixels and ferro-electrochemical transistors. PMID:28695197

Self-assembled phase-change nanowire for nonvolatile electronic memory

NASA Astrophysics Data System (ADS)

Jung, Yeonwoong

One of the most important subjects in nanosciences is to identify and exploit the relationship between size and structural/physical properties of materials and to explore novel material properties at a small-length scale. Scale-down of materials is not only advantageous in realizing miniaturized devices but nanometer-sized materials often exhibit intriguing physical/chemical properties that greatly differ from their bulk counterparts. This dissertation studies self-assembled phase-change nanowires for future nonvolatile electronic memories, mainly focusing on their size-dependent memory switching properties. Owing to the one-dimensional, unique geometry coupled with the small and tunable sizes, bottom-designed nanowires offer great opportunities in terms for both fundamental science and practical engineering perspectives, which would be difficult to realize in conventional top-down based approaches. We synthesized chalcogenide phase-change nanowires of different compositions and sizes, and studied their electronic memory switching owing to the structural change between crystalline and amorphous phases. In particular, we investigated nanowire size-dependent memory switching parameters, including writing current, power consumption, and data retention times, as well as studying composition-dependent electronic properties. The observed size and composition-dependent switching and recrystallization kinetics are explained based on the heat transport model and heterogeneous nucleation theories, which help to design phase-change materials with better properties. Moreover, we configured unconventional heterostructured phase-change nanowire memories and studied their multiple memory states in single nanowire devices. Finally, by combining in-situ/ex-situ electron microscopy techniques and electrical measurements, we characterized the structural states involved in electrically-driven phase-change in order to understand the atomistic mechanism that governs the electronic memory switching through phase-change.

Hydrogen doping in HfO{sub 2} resistance change random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Duncan, D.; Magyari-Köpe, B.; Nishi, Y.

2016-01-25

The structures and energies of hydrogen-doped monoclinic hafnium dioxide were calculated using density-functional theory. The electronic interactions are described within the LDA + U formalism, where on-site Coulomb corrections are applied to the 5d orbital electrons of Hf atoms and 2p orbital electrons of the O atoms. The effects of charge state, defect-defect interactions, and hydrogenation are investigated and compared with experiment. It is found that hydrogenation of HfO{sub 2} resistance-change random access memory devices energetically stabilizes the formation of oxygen vacancies and conductive vacancy filaments through multiple mechanisms, leading to improved switching characteristic and device yield.

Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

PubMed

Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-05-01

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory.

PubMed

Ng, Tse Nga; Schwartz, David E; Lavery, Leah L; Whiting, Gregory L; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

2012-01-01

Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic.

Recent Advances of Flexible Data Storage Devices Based on Organic Nanoscaled Materials.

PubMed

Zhou, Li; Mao, Jingyu; Ren, Yi; Han, Su-Ting; Roy, Vellaisamy A L; Zhou, Ye

2018-03-01

Following the trend of miniaturization as per Moore's law, and facing the strong demand of next-generation electronic devices that should be highly portable, wearable, transplantable, and lightweight, growing endeavors have been made to develop novel flexible data storage devices possessing nonvolatile ability, high-density storage, high-switching speed, and reliable endurance properties. Nonvolatile organic data storage devices including memory devices on the basis of floating-gate, charge-trapping, and ferroelectric architectures, as well as organic resistive memory are believed to be favorable candidates for future data storage applications. In this Review, typical information on device structure, memory characteristics, device operation mechanisms, mechanical properties, challenges, and recent progress of the above categories of flexible data storage devices based on organic nanoscaled materials is summarized. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Stretchable carbon nanotube charge-trap floating-gate memory and logic devices for wearable electronics.

PubMed

Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong

2015-05-26

Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.

A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

NASA Astrophysics Data System (ADS)

Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

2017-12-01

Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (<40° C) on a variety of substrates (including many kinds of plastic substrates) by an industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

Electrical Switching of Perovskite Thin-Film Resistors

NASA Technical Reports Server (NTRS)

Liu, Shangqing; Wu, Juan; Ignatiev, Alex

2010-01-01

Electronic devices that exploit electrical switching of physical properties of thin films of perovskite materials (especially colossal magnetoresistive materials) have been invented. Unlike some related prior devices, these devices function at room temperature and do not depend on externally applied magnetic fields. Devices of this type can be designed to function as sensors (exhibiting varying electrical resistance in response to varying temperature, magnetic field, electric field, and/or mechanical pressure) and as elements of electronic memories. The underlying principle is that the application of one or more short electrical pulse(s) can induce a reversible, irreversible, or partly reversible change in the electrical, thermal, mechanical, and magnetic properties of a thin perovskite film. The energy in the pulse must be large enough to induce the desired change but not so large as to destroy the film. Depending on the requirements of a specific application, the pulse(s) can have any of a large variety of waveforms (e.g., square, triangular, or sine) and be of positive, negative, or alternating polarity. In some applications, it could be necessary to use multiple pulses to induce successive incremental physical changes. In one class of applications, electrical pulses of suitable shapes, sizes, and polarities are applied to vary the detection sensitivities of sensors. Another class of applications arises in electronic circuits in which certain resistance values are required to be variable: Incorporating the affected resistors into devices of the present type makes it possible to control their resistances electrically over wide ranges, and the lifetimes of electrically variable resistors exceed those of conventional mechanically variable resistors. Another and potentially the most important class of applications is that of resistance-based nonvolatile-memory devices, such as a resistance random access memory (RRAM) described in the immediately following article, Electrically Variable Resistive Memory Devices (MFS-32511-1).

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M.; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2015-09-08

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the gap region between the first electrical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

DOEpatents

Tour, James M; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

2013-11-26

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the the gap region between the first electical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

PubMed Central

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

PubMed

Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

2016-01-01

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

Application of graphene oxide-poly (vinyl alcohol) polymer nanocomposite for memory devices

NASA Astrophysics Data System (ADS)

Kaushal, Jyoti; Kaur, Ravneet; Sharma, Jadab; Tripathi, S. K.

2018-05-01

Significant attention has been gained by polymer nanocomposites because of their possible demands in future electronic memory devices. In the present work, device based on Graphene Oxide (GO) and polyvinyl alcohol (PVA) has been made and examined for the memory device application. The prepared Graphene oxide (GO) and GO-PVA nanocomposite (NC) has been characterized by X-ray Diffraction (XRD). GO nanosheets show the diffraction peak at 2θ = 11.60° and the interlayer spacing of 0.761 nm. The XRD of GO-PVA NC shows the diffraction peak at 2θ =18.56°. The fabricated device shows bipolar switching behavior having ON/OFF current ratio ˜102. The Write-Read-Erase-Read (WRER) cycles test shows that the Al/GO-PVA/Ag device has good stability and repeatability.

Optically programmable electron spin memory using semiconductor quantum dots.

PubMed

Kroutvar, Miro; Ducommun, Yann; Heiss, Dominik; Bichler, Max; Schuh, Dieter; Abstreiter, Gerhard; Finley, Jonathan J

2004-11-04

The spin of a single electron subject to a static magnetic field provides a natural two-level system that is suitable for use as a quantum bit, the fundamental logical unit in a quantum computer. Semiconductor quantum dots fabricated by strain driven self-assembly are particularly attractive for the realization of spin quantum bits, as they can be controllably positioned, electronically coupled and embedded into active devices. It has been predicted that the atomic-like electronic structure of such quantum dots suppresses coupling of the spin to the solid-state quantum dot environment, thus protecting the 'spin' quantum information against decoherence. Here we demonstrate a single electron spin memory device in which the electron spin can be programmed by frequency selective optical excitation. We use the device to prepare single electron spins in semiconductor quantum dots with a well defined orientation, and directly measure the intrinsic spin flip time and its dependence on magnetic field. A very long spin lifetime is obtained, with a lower limit of about 20 milliseconds at a magnetic field of 4 tesla and at 1 kelvin.

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures

PubMed Central

Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo

2018-01-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356

Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.

PubMed

Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun

2018-04-01

Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.

Overview of emerging nonvolatile memory technologies

PubMed Central

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

Overview of emerging nonvolatile memory technologies.

PubMed

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

Inserting Thienyl Linkers into Conjugated Molecules for Efficient Multilevel Electronic Memory: A New Understanding of Charge-Trapping in Organic Materials.

PubMed

Li, Yang; Li, Hua; He, Jinghui; Xu, Qingfeng; Li, Najun; Chen, Dongyun; Lu, Jianmei

2016-03-18

The practical application of organic memory devices requires low power consumption and reliable device quality. Herein, we report that inserting thienyl units into D-π-A molecules can improve these parameters by tuning the texture of the film. Theoretical calculations revealed that introducing thienyl π bridges increased the planarity of the molecular backbone and extended the D-A conjugation. Thus, molecules with more thienyl spacers showed improved stacking and orientation in the film state relative to the substrates. The corresponding sandwiched memory devices showed enhanced ternary memory behavior, with lower threshold voltages and better repeatability. The conductive switching and variation in the performance of the memory devices were interpreted by using an extended-charge-trapping mechanism. Our study suggests that judicious molecular engineering can facilitate control of the orientation of the crystallite in the solid state to achieve superior multilevel memory performance. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Electronic shift register memory based on molecular electron-transfer reactions

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Jose Nelson; Beratan, David N.

1989-01-01

The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

Multifunctional tunneling devices based on graphene/h-BN/MoSe2 van der Waals heterostructures

NASA Astrophysics Data System (ADS)

Cheng, Ruiqing; Wang, Feng; Yin, Lei; Xu, Kai; Ahmed Shifa, Tofik; Wen, Yao; Zhan, Xueying; Li, Jie; Jiang, Chao; Wang, Zhenxing; He, Jun

2017-04-01

The vertically stacked devices based on van der Waals heterostructures (vdWHs) of two-dimensional layered materials (2DLMs) have attracted considerable attention due to their superb properties. As a typical structure, graphene/hexagonal boron nitride (h-BN)/graphene vdWH has been proved possible to make tunneling devices. Compared with graphene, transition metal dichalcogenides possess intrinsic bandgap, leading to high performance of electronic devices. Here, tunneling devices based on graphene/h-BN/MoSe2 vdWHs are designed for multiple functions. On the one hand, the device shows a typical tunneling field-effect transistor behavior. A high on/off ratio of tunneling current (5 × 103) and an ultrahigh current rectification ratio (7 × 105) are achieved, which are attributed to relatively small electronic affinity of MoSe2 and optimized thickness of h-BN. On the other hand, the same structure also realizes 2D non-volatile memory with a high program/erase current ratio (>105), large memory window (˜150 V from ±90 V), and good retention characteristic. These results could enhance the fundamental understanding of tunneling behavior in vdWHs and contribute to the design of ultrathin rectifiers and memory based on 2DLMs.

Ionic current devices-Recent progress in the merging of electronic, microfluidic, and biomimetic structures.

PubMed

Koo, Hyung-Jun; Velev, Orlin D

2013-05-09

We review the recent progress in the emerging area of devices and circuits operating on the basis of ionic currents. These devices operate at the intersection of electrochemistry, electronics, and microfluidics, and their potential applications are inspired by essential biological processes such as neural transmission. Ionic current rectification has been demonstrated in diode-like devices containing electrolyte solutions, hydrogel, or hydrated nanofilms. More complex functions have been realized in ionic current based transistors, solar cells, and switching memory devices. Microfluidic channels and networks-an intrinsic component of the ionic devices-could play the role of wires and circuits in conventional electronics.

Organic memory capacitor device fabricated with Ag nanoparticles.

PubMed

Kim, Yo-Han; Jung, Sung Mok; Hu, Quanli; Kim, Yong-Sang; Yoon, Tae-Sik; Lee, Hyun Ho

2011-07-01

In this study, it is demonstrated that an organic memory structure using pentacene and citrate-stabilized silver nanoparticles (Ag NPs) as charge storage elements on dielectric SiO2 layer and silicon substrate. The Ag NPs were synthesized by thermal reduction method of silver trifluoroacetate with oleic acid. The synthesized Ag NPs were analyzed with high resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) for their crystalline structure. The capacitance versus voltage (C-V) curves obtained for the Ag NPs embedded capacitor exhibited flat-band voltage shifts, which demonstrated the presence of charge storages. The citrate-capping of the Ag NPs was confirmed by ultraviolet-visible (UV-VIS) and Fourier transformed infrared (FTIR) spectroscopy. With voltage sweeping of +/-7 V, a hysteresis loop having flatband voltage shift of 7.1 V was obtained. The hysteresis loop showed a counter-clockwise direction. In addition, electrical performance test for charge storage showed more than 10,000 second charge retention time. The device with Ag NPs can be applied to an organic memory device for flexible electronics.

Displays, memories, and signal processing: A compilation

NASA Technical Reports Server (NTRS)

1975-01-01

Articles on electronics systems and techniques were presented. The first section is on displays and other electro-optical systems; the second section is devoted to signal processing. The third section presented several new memory devices for digital equipment, including articles on holographic memories. The latest patent information available is also given.

Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory

PubMed Central

Ng, Tse Nga; Schwartz, David E.; Lavery, Leah L.; Whiting, Gregory L.; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

2012-01-01

Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143

High-performance flexible resistive memory devices based on Al2O3:GeOx composite

NASA Astrophysics Data System (ADS)

Behera, Bhagaban; Maity, Sarmistha; Katiyar, Ajit K.; Das, Samaresh

2018-05-01

In this study a resistive switching random access memory device using Al2O3:GeOx composite thin films on flexible substrate is presented. A bipolar switching characteristic was observed for the co-sputter deposited Al2O3:GeOx composite thin films. Al/Al2O3:GeOx/ITO/PET memory device shows excellent ON/OFF ratio (∼104) and endurance (>500 cycles). GeOx nanocrystals embedded in the Al2O3 matrix have been found to play a significant role in enhancing the switching characteristics by facilitating oxygen vacancy formation. Mechanical endurance was retained even after several bending. The conduction mechanism of the device was qualitatively discussed by considering Ohmic and SCLC conduction. This flexible device is a potential candidate for next-generation electronics device.

Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

NASA Astrophysics Data System (ADS)

Hong, Augustin Jinwoo

Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

NASA Astrophysics Data System (ADS)

Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

2013-08-01

In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

Observation of conducting filament growth in nanoscale resistive memories

NASA Astrophysics Data System (ADS)

Yang, Yuchao; Gao, Peng; Gaba, Siddharth; Chang, Ting; Pan, Xiaoqing; Lu, Wei

2012-03-01

Nanoscale resistive switching devices, sometimes termed memristors, have recently generated significant interest for memory, logic and neuromorphic applications. Resistive switching effects in dielectric-based devices are normally assumed to be caused by conducting filament formation across the electrodes, but the nature of the filaments and their growth dynamics remain controversial. Here we report direct transmission electron microscopy imaging, and structural and compositional analysis of the nanoscale conducting filaments. Through systematic ex-situ and in-situ transmission electron microscopy studies on devices under different programming conditions, we found that the filament growth can be dominated by cation transport in the dielectric film. Unexpectedly, two different growth modes were observed for the first time in materials with different microstructures. Regardless of the growth direction, the narrowest region of the filament was found to be near the dielectric/inert-electrode interface in these devices, suggesting that this region deserves particular attention for continued device optimization.

Face classification using electronic synapses

NASA Astrophysics Data System (ADS)

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H.-S. Philip; Qian, He

2017-05-01

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Face classification using electronic synapses.

PubMed

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H-S Philip; Qian, He

2017-05-12

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

NASA Astrophysics Data System (ADS)

Ghoneim, M. T.; Hussain, M. M.

2015-08-01

Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

Information storage at the molecular level - The design of a molecular shift register memory

NASA Technical Reports Server (NTRS)

Beratan, David N.; Onuchic, Jose Nelson; Hopfield, J. J.

1989-01-01

The control of electron transfer rates is discussed and a molecular shift register memory at the molecular level is described. The memory elements are made up of molecules which can exist in either an oxidized or reduced state and the bits can be shifted between the cells with photoinduced electron transfer reactions. The device integrates designed molecules onto a VLSI substrate. A control structure to modify the flow of information along a shift register is indicated schematically.

Operation of a quantum dot in the finite-state machine mode: Single-electron dynamic memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Klymenko, M. V.; Klein, M.; Levine, R. D.

2016-07-14

A single electron dynamic memory is designed based on the non-equilibrium dynamics of charge states in electrostatically defined metallic quantum dots. Using the orthodox theory for computing the transfer rates and a master equation, we model the dynamical response of devices consisting of a charge sensor coupled to either a single and or a double quantum dot subjected to a pulsed gate voltage. We show that transition rates between charge states in metallic quantum dots are characterized by an asymmetry that can be controlled by the gate voltage. This effect is more pronounced when the switching between charge states correspondsmore » to a Markovian process involving electron transport through a chain of several quantum dots. By simulating the dynamics of electron transport we demonstrate that the quantum box operates as a finite-state machine that can be addressed by choosing suitable shapes and switching rates of the gate pulses. We further show that writing times in the ns range and retention memory times six orders of magnitude longer, in the ms range, can be achieved on the double quantum dot system using experimentally feasible parameters, thereby demonstrating that the device can operate as a dynamic single electron memory.« less

What people know about electronic devices: A descriptive study

NASA Astrophysics Data System (ADS)

Kieras, D. E.

1982-10-01

Informal descriptive results on the nature of people's natural knowledge of electronic devices are presented. Expert and nonexpert subjects were given an electronic device to examine and describe orally. The devices ranged from familiar everyday devices, to those familiar only to the expert, to unusual devices unfamiliar even to an expert. College students were asked to describe everyday devices from memory. The results suggest that device knowledge consists of the major categories of what the device is for, how it is used, its structure in terms of subdevices, its physical layout, how it works, and its behavior. A preliminary theoretical framework for device knowledge is that it consists of a hierarchy of schemas, corresponding to a hierarchial decomposition of the device into subdevices, with each level containing the major categories of information.

Organic nonvolatile resistive memory devices based on thermally deposited Au nanoparticle

NASA Astrophysics Data System (ADS)

Jin, Zhiwen; Liu, Guo; Wang, Jizheng

2013-05-01

Uniform Au nanoparticles (NPs) are formed by thermally depositing nominal 2-nm thick Au film on a 10-nm thick polyimide film formed on a Al electrode, and then covered by a thin polymer semiconductor film, which acts as an energy barrier for electrons to be injected from the other Al electrode (on top of polymer film) into the Au NPs, which are energetically electron traps in such a resistive random access memory (RRAM) device. The Au NPs based RRAM device exhibits estimated retention time of 104 s, cycle times of more than 100, and ON-OFF ratio of 102 to 103. The carrier transport properties are also analyzed by fitting the measured I-V curves with several conduction models.

Artificial Synaptic Devices Based on Natural Chicken Albumen Coupled Electric-Double-Layer Transistors

NASA Astrophysics Data System (ADS)

Wu, Guodong; Feng, Ping; Wan, Xiang; Zhu, Liqiang; Shi, Yi; Wan, Qing

2016-03-01

Recent progress in using biomaterials to fabricate functional electronics has got growing attention for the new generation of environmentally friendly and biocompatible electronic devices. As a kind of biological material with rich source, proteins are essential natural component of all organisms. At the same time, artificial synaptic devices are of great significance for neuromorphic systems because they can emulate the signal process and memory behaviors of biological synapses. In this report, natural chicken albumen with high proton conductivity was used as the coupling electrolyte film for organic/inorganic hybrid synaptic devices fabrication. Some important synaptic functions including paired-pulse facilitation, dynamic filtering, short-term to long-term memory transition and spatial summation and shunting inhibition were successfully mimicked. Our results are very interesting for biological friendly artificial neuron networks and neuromorphic systems.

Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Y.; Zhong, Y. P.; Deng, Y. F.

2013-12-21

Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

Spin transport and spin torque in antiferromagnetic devices

DOE PAGES

Zelezny, J.; Wadley, P.; Olejnik, K.; ...

2018-03-02

Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less

Spin transport and spin torque in antiferromagnetic devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zelezny, J.; Wadley, P.; Olejnik, K.

Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less

Monolayer optical memory cells based on artificial trap-mediated charge storage and release

NASA Astrophysics Data System (ADS)

Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min

2017-03-01

Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.

Spin transport and spin torque in antiferromagnetic devices

NASA Astrophysics Data System (ADS)

Železný, J.; Wadley, P.; Olejník, K.; Hoffmann, A.; Ohno, H.

2018-03-01

Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets, which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, which could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here, we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum-mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.

Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices.

PubMed

Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A

2017-10-17

A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.

Sketched oxide single-electron transistor

NASA Astrophysics Data System (ADS)

Cheng, Guanglei; Siles, Pablo F.; Bi, Feng; Cen, Cheng; Bogorin, Daniela F.; Bark, Chung Wung; Folkman, Chad M.; Park, Jae-Wan; Eom, Chang-Beom; Medeiros-Ribeiro, Gilberto; Levy, Jeremy

2011-06-01

Devices that confine and process single electrons represent an important scaling limit of electronics. Such devices have been realized in a variety of materials and exhibit remarkable electronic, optical and spintronic properties. Here, we use an atomic force microscope tip to reversibly `sketch' single-electron transistors by controlling a metal-insulator transition at the interface of two oxides. In these devices, single electrons tunnel resonantly between source and drain electrodes through a conducting oxide island with a diameter of ~1.5 nm. We demonstrate control over the number of electrons on the island using bottom- and side-gate electrodes, and observe hysteresis in electron occupation that is attributed to ferroelectricity within the oxide heterostructure. These single-electron devices may find use as ultradense non-volatile memories, nanoscale hybrid piezoelectric and charge sensors, as well as building blocks in quantum information processing and simulation platforms.

Non-Volatile High Speed & Low Power Charge Trapping Devices

NASA Astrophysics Data System (ADS)

Kim, Moon Kyung; Tiwari, Sandip

2007-06-01

We report the operational characteristics of ultra-small-scaled SONOS (below 50 nm gate width and length) and SiO2/SiO2 structural devices with 0.5 um gate width and length where trapping occurs in a very narrow region. The experimental work summarizes the memory characteristics of retention time, endurance cycles, and speed in SONOS and SiO2/SiO2 structures. Silicon nitride has many defects to hold electrons as charge storage media in SONOS memory. Defects are also incorporated during growth and deposition in device processing. Our experiments show that the interface between two oxides, one grown and one deposited, provides a remarkable media for electron storage with a smaller gate stack and thus lower operating voltage. The exponential dependence of the time on the voltage is reflected in the characteristic energy. It is ˜0.44 eV for the write process and ˜0.47 eV for the erase process in SiO2/SiO2 structural device which is somewhat more efficient than those of SONOS structure memory.

Electronic Spin Storage in an Electrically Readable Nuclear Spin Memory with a Lifetime >100 Seconds

NASA Astrophysics Data System (ADS)

McCamey, D. R.; Van Tol, J.; Morley, G. W.; Boehme, C.

2010-12-01

Electron spins are strong candidates with which to implement spintronics because they are both mobile and able to be manipulated. The relatively short lifetimes of electron spins, however, present a problem for the long-term storage of spin information. We demonstrated an ensemble nuclear spin memory in phosphorous-doped silicon, which can be read out electrically and has a lifetime exceeding 100 seconds. The electronic spin information can be mapped onto and stored in the nuclear spin of the phosphorus donors, and the nuclear spins can then be repetitively read out electrically for time periods that exceed the electron spin lifetime. We discuss how this memory can be used in conjunction with other silicon spintronic devices.

Operation mode switchable charge-trap memory based on few-layer MoS2

NASA Astrophysics Data System (ADS)

Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-03-01

Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.

Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures.

PubMed

Abhijith, T; Kumar, T V Arun; Reddy, V S

2017-03-03

Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO 3 ) between two tris-(8-hydroxyquinoline)aluminum (Alq 3 ) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 10 3 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO 3 layer thickness and its location in the Alq 3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO 3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures

NASA Astrophysics Data System (ADS)

Abhijith, T.; Kumar, T. V. Arun; Reddy, V. S.

2017-03-01

Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO3) between two tris-(8-hydroxyquinoline)aluminum (Alq3) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 103 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO3 layer thickness and its location in the Alq3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

Molecular Electronic Shift Registers

NASA Technical Reports Server (NTRS)

Beratan, David N.; Onuchic, Jose N.

1990-01-01

Molecular-scale shift registers eventually constructed as parts of high-density integrated memory circuits. In principle, variety of organic molecules makes possible large number of different configurations and modes of operation for such shift-register devices. Several classes of devices and implementations in some specific types of molecules proposed. All based on transfer of electrons or holes along chains of repeating molecular units.

End-group-directed self-assembly of organic compounds useful for photovoltaic applications

DOEpatents

Beaujuge, Pierre M.; Lee, Olivia P.; Yiu, Alan T.; Frechet, Jean M.J.

2016-05-31

The present invention provides for an organic compound comprising electron deficient unit covalently linked to two or more electron rich units. The present invention also provides for a device comprising the organic compound, such as a light-emitting diode, thin-film transistor, chemical biosensor, non-emissive electrochromic, memory device, photovoltaic cells, or the like.

External Verification of SCADA System Embedded Controller Firmware

DTIC Science & Technology

2012-03-01

microprocessor and read-only memory (ROM) or flash memory for storing firmware and control logic [5],[8]. A PLC typically has three software levels as shown in...implementing different firmware. Because PLCs are in effect a microprocessor device, an analysis of the current research on embedded devices is important...Electronics Engineers (IEEE) published a 15 best practices guide for firmware control on microprocessors [44]. IEEE suggests that microprocessors

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

NASA Astrophysics Data System (ADS)

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-07-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

Low-power resistive random access memory by confining the formation of conducting filaments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, Yi-Jen; Lee, Si-Chen, E-mail: sclee@ntu.edu.tw; Shen, Tzu-Hsien

2016-06-15

Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiO{sub x}/silver nanoparticles/TiO{sub x}/AlTiO{sub x}, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistancemore » state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiO{sub x} layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.« less

Memory characteristics of metal-oxide-semiconductor structures based on Ge nanoclusters-embedded GeO(x) films grown at low temperature.

PubMed

Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng

2012-03-01

The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.

Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang, Yu-Chi; Wang, Yeong-Her, E-mail: yhw@ee.ncku.edu.tw

2015-03-23

Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10{sup 5}), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect ofmore » Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications.« less

Focused ion beam and field-emission microscopy of metallic filaments in memory devices based on thin films of an ambipolar organic compound consisting of oxadiazole, carbazole, and fluorene units

USGS Publications Warehouse

Pearson, Christopher; Bowen, Leon; Lee, Myung Won; Fisher, Alison L.; Linton, Katherine E.; Bryce, Martin R.; Petty, Michael C.

2013-01-01

We report on the mechanism of operation of organic thin film resistive memory architectures based on an ambipolar compound consisting of oxadiazole, carbazole, and fluorene units. Cross-sections of the devices have been imaged by electron microscopy both before and after applying a voltage. The micrographs reveal the growth of filaments, with diameters of 50 nm–100 nm, on the metal cathode. We suggest that these are formed by the drift of aluminium ions from the anode and are responsible for the observed switching and negative differential resistance phenomena in the memory devices.

Trends in solid state electronics, part 2

NASA Technical Reports Server (NTRS)

Gassaway, J. D.

1972-01-01

Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

Feasibility study of molecular memory device based on DNA using methylation to store information

NASA Astrophysics Data System (ADS)

Jiang, Liming; Qiu, Wanzhi; Al-Dirini, Feras; Hossain, Faruque M.; Evans, Robin; Skafidas, Efstratios

2016-07-01

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

Sketched Oxide Single-Electron Transistor

NASA Astrophysics Data System (ADS)

Cheng, Guanglei

2012-02-01

Devices that confine and process single electrons represent an important scaling limit of electronics. Such devices have been realized in a variety of materials and exhibit remarkable electronic, optical and spintronic properties. Here, we use an atomic force microscope tip to reversibly ``sketch'' single-electron transistors by controlling a metal-insulator transition at the interface of two oxides.ootnotetextCheng et al., Nature Nanotechnology 6, 343 (2011). In these devices, single electrons tunnel resonantly between source and drain electrodes through a conducting oxide island with a diameter of ˜1.5 nm. We demonstrate control over the number of electrons on the island using bottom- and side-gate electrodes, and observe hysteresis in electron occupation that is attributed to ferroelectricity within the oxide heterostructure. These single-electron devices may find use as ultradense non-volatile memories, nanoscale hybrid piezoelectric and charge sensors, as well as building blocks in quantum information processing and simulation platforms.

Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line

NASA Astrophysics Data System (ADS)

León Pérez, Edgar A. A.; Guenery, Pierre-Vincent; Abouzaid, Oumaïma; Ayadi, Khaled; Brottet, Solène; Moeyaert, Jérémy; Labau, Sébastien; Baron, Thierry; Blanchard, Nicholas; Baboux, Nicolas; Militaru, Liviu; Souifi, Abdelkader

2018-05-01

We report on the fabrication and characterization of Resistive Random Access Memory (RRAM) devices based on nanoparticles in MIM structures. Our approach is based on the use of indium oxide (In2O3) nanoparticles embedded in a dielectric matrix using CMOS-full-compatible fabrication processes in view of back-end-off-line integration for non-volatile memory (NVM) applications. A bipolar switching behavior has been observed using current-voltage measurements (I-V) for all devices. Very high ION/IOFF ratios have been obtained up to 108. Our results provide insights for further integration of In2O3 nanoparticles-based devices for NVM applications. He is currently a Postdoctoral Researcher in the Institute of Nanotechnologies of Lyon (INL), INSA de Lyon, France, in the Electronics Department. His current research include indium oxide nanoparticles for non-volatile memory applications, and the integrations of these devices in CMOS BEOL.

Adaptive microwave impedance memory effect in a ferromagnetic insulator.

PubMed

Lee, Hanju; Friedman, Barry; Lee, Kiejin

2016-12-14

Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures.

Adaptive microwave impedance memory effect in a ferromagnetic insulator

PubMed Central

Lee, Hanju; Friedman, Barry; Lee, Kiejin

2016-01-01

Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures. PMID:27966536

Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa

Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygenmore » and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.« less

Bistable resistive memory behavior in gelatin-CdTe quantum dot composite film

NASA Astrophysics Data System (ADS)

Vallabhapurapu, Sreedevi; Rohom, Ashwini; Chaure, N. B.; Du, Shengzhi; Srinivasan, Ananthakrishnan

2018-05-01

Bistable memory behavior has been observed for the first time in gelatin type A thin film dispersed with functionalized CdTe quantum dots. The two terminal device with the polymer nanocomposite layer sandwiched between an indium tin oxide coated glass plate and an aluminium top electrode performs as a bistable resistive random access memory module. Butterfly shaped (O-shaped with a hysteresis in forward and reverse sweeps) current-voltage response is observed in this device. The conduction mechanism leading to the bistable electrical switching has been deduced to be a combination of ohmic and electron hopping.

All-spin logic operations: Memory device and reconfigurable computing

NASA Astrophysics Data System (ADS)

Patra, Moumita; Maiti, Santanu K.

2018-02-01

Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung

Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while themore » electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research.« less

Organic transistor memory with a charge storage molecular double-floating-gate monolayer.

PubMed

Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai

2015-05-13

A flexible, low-voltage, and nonvolatile memory device was fabricated by implanting a functional monolayer on an aluminum oxide dielectric surface in a pentacene-based organic transistor. The monolayer-forming molecule contains a phosphonic acid group as the anchoring moiety and a charge-trapping core group flanked between two alkyl chain spacers as the charge trapping site. The memory characteristics strongly depend on the monolayer used due to the localized charge-trapping capability for different core groups, including the diacetylenic (DA) unit as the hole carrier trap, the naphthalenetetracarboxyldiimide (ND) unit as the electron carrier trap, and the one with both DA and ND units present, respectively. The device with the monolayer carrying both DA and ND groups has a larger memory window than that for the one containing DA only and a longer retention time than that for the one containing DA or ND only, giving a memory window of 1.4 V and a retention time around 10(9) s. This device with hybrid organic monolayer/inorganic dielectrics also exhibited rather stable device characteristics upon bending of the polymeric substrate.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

PubMed Central

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-01-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

Electrically and Optically Readable Light Emitting Memories

PubMed Central

Chang, Che-Wei; Tan, Wei-Chun; Lu, Meng-Lin; Pan, Tai-Chun; Yang, Ying-Jay; Chen, Yang-Fang

2014-01-01

Electrochemical metallization memories based on redox-induced resistance switching have been considered as the next-generation electronic storage devices. However, the electronic signals suffer from the interconnect delay and the limited reading speed, which are the major obstacles for memory performance. To solve this problem, here we demonstrate the first attempt of light-emitting memory (LEM) that uses SiO2 as the resistive switching material in tandem with graphene-insulator-semiconductor (GIS) light-emitting diode (LED). By utilizing the excellent properties of graphene, such as high conductivity, high robustness and high transparency, our proposed LEM enables data communication via electronic and optical signals simultaneously. Both the bistable light-emission state and the resistance switching properties can be attributed to the conducting filament mechanism. Moreover, on the analysis of current-voltage characteristics, we further confirm that the electroluminescence signal originates from the carrier tunneling, which is quite different from the standard p-n junction model. We stress here that the newly developed LEM device possesses a simple structure with mature fabrication processes, which integrates advantages of all composed materials and can be extended to many other material systems. It should be able to attract academic interest as well as stimulate industrial application. PMID:24894723

Spiers Memorial Lecture. Molecular mechanics and molecular electronics.

PubMed

Beckman, Robert; Beverly, Kris; Boukai, Akram; Bunimovich, Yuri; Choi, Jang Wook; DeIonno, Erica; Green, Johnny; Johnston-Halperin, Ezekiel; Luo, Yi; Sheriff, Bonnie; Stoddart, Fraser; Heath, James R

2006-01-01

We describe our research into building integrated molecular electronics circuitry for a diverse set of functions, and with a focus on the fundamental scientific issues that surround this project. In particular, we discuss experiments aimed at understanding the function of bistable rotaxane molecular electronic switches by correlating the switching kinetics and ground state thermodynamic properties of those switches in various environments, ranging from the solution phase to a Langmuir monolayer of the switching molecules sandwiched between two electrodes. We discuss various devices, low bit-density memory circuits, and ultra-high density memory circuits that utilize the electrochemical switching characteristics of these molecules in conjunction with novel patterning methods. We also discuss interconnect schemes that are capable of bridging the micrometre to submicrometre length scales of conventional patterning approaches to the near-molecular length scales of the ultra-dense memory circuits. Finally, we discuss some of the challenges associated with fabricated ultra-dense molecular electronic integrated circuits.

Ultra-low power, highly uniform polymer memory by inserted multilayer graphene electrode

NASA Astrophysics Data System (ADS)

Jang, Byung Chul; Seong, Hyejeong; Kim, Jong Yun; Koo, Beom Jun; Kim, Sung Kyu; Yang, Sang Yoon; Gap Im, Sung; Choi, Sung-Yool

2015-12-01

Filament type resistive random access memory (RRAM) based on polymer thin films is a promising device for next generation, flexible nonvolatile memory. However, the resistive switching nonuniformity and the high power consumption found in the general filament type RRAM devices present critical issues for practical memory applications. Here, we introduce a novel approach not only to reduce the power consumption but also to improve the resistive switching uniformity in RRAM devices based on poly(1,3,5-trimethyl-3,4,5-trivinyl cyclotrisiloxane) by inserting multilayer graphene (MLG) at the electrode/polymer interface. The resistive switching uniformity was thereby significantly improved, and the power consumption was markedly reduced by 250 times. Furthermore, the inserted MLG film enabled a transition of the resistive switching operation from unipolar resistive switching to bipolar resistive switching and induced self-compliance behavior. The findings of this study can pave the way toward a new area of application for graphene in electronic devices.

Physical Realization of a Supervised Learning System Built with Organic Memristive Synapses

NASA Astrophysics Data System (ADS)

Lin, Yu-Pu; Bennett, Christopher H.; Cabaret, Théo; Vodenicarevic, Damir; Chabi, Djaafar; Querlioz, Damien; Jousselme, Bruno; Derycke, Vincent; Klein, Jacques-Olivier

2016-09-01

Multiple modern applications of electronics call for inexpensive chips that can perform complex operations on natural data with limited energy. A vision for accomplishing this is implementing hardware neural networks, which fuse computation and memory, with low cost organic electronics. A challenge, however, is the implementation of synapses (analog memories) composed of such materials. In this work, we introduce robust, fastly programmable, nonvolatile organic memristive nanodevices based on electrografted redox complexes that implement synapses thanks to a wide range of accessible intermediate conductivity states. We demonstrate experimentally an elementary neural network, capable of learning functions, which combines four pairs of organic memristors as synapses and conventional electronics as neurons. Our architecture is highly resilient to issues caused by imperfect devices. It tolerates inter-device variability and an adaptable learning rule offers immunity against asymmetries in device switching. Highly compliant with conventional fabrication processes, the system can be extended to larger computing systems capable of complex cognitive tasks, as demonstrated in complementary simulations.

Physical Realization of a Supervised Learning System Built with Organic Memristive Synapses.

PubMed

Lin, Yu-Pu; Bennett, Christopher H; Cabaret, Théo; Vodenicarevic, Damir; Chabi, Djaafar; Querlioz, Damien; Jousselme, Bruno; Derycke, Vincent; Klein, Jacques-Olivier

2016-09-07

Multiple modern applications of electronics call for inexpensive chips that can perform complex operations on natural data with limited energy. A vision for accomplishing this is implementing hardware neural networks, which fuse computation and memory, with low cost organic electronics. A challenge, however, is the implementation of synapses (analog memories) composed of such materials. In this work, we introduce robust, fastly programmable, nonvolatile organic memristive nanodevices based on electrografted redox complexes that implement synapses thanks to a wide range of accessible intermediate conductivity states. We demonstrate experimentally an elementary neural network, capable of learning functions, which combines four pairs of organic memristors as synapses and conventional electronics as neurons. Our architecture is highly resilient to issues caused by imperfect devices. It tolerates inter-device variability and an adaptable learning rule offers immunity against asymmetries in device switching. Highly compliant with conventional fabrication processes, the system can be extended to larger computing systems capable of complex cognitive tasks, as demonstrated in complementary simulations.

Proton Irradiation of the 16GB Intel Optane SSD

NASA Technical Reports Server (NTRS)

Wyrwas, E. J.

2017-01-01

The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).

Scientific developments of liquid crystal-based optical memory: a review

NASA Astrophysics Data System (ADS)

Prakash, Jai; Chandran, Achu; Biradar, Ashok M.

2017-01-01

The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

Scientific developments of liquid crystal-based optical memory: a review.

PubMed

Prakash, Jai; Chandran, Achu; Biradar, Ashok M

2017-01-01

The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

NASA Astrophysics Data System (ADS)

Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

2016-04-01

The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

Lanthanum Gadolinium Oxide: A New Electronic Device Material for CMOS Logic and Memory Devices

PubMed Central

Pavunny, Shojan P.; Scott, James F.; Katiyar, Ram S.

2014-01-01

A comprehensive study on the ternary dielectric, LaGdO3, synthesized and qualified in our laboratory as a novel high-k dielectric material for logic and memory device applications in terms of its excellent features that include a high linear dielectric constant (k) of ~22 and a large energy bandgap of ~5.6 eV, resulting in sufficient electron and hole band offsets of ~2.57 eV and ~1.91 eV, respectively, on silicon, good thermal stability with Si and lower gate leakage current densities within the International Technology Roadmap for Semiconductors (ITRS) specified limits at the sub-nanometer electrical functional thickness level, which are desirable for advanced complementary metal-oxide-semiconductor (CMOS), bipolar (Bi) and BiCMOS chips applications, is presented in this review article. PMID:28788589

Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

NASA Astrophysics Data System (ADS)

Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

2017-04-01

The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

Feasibility study of molecular memory device based on DNA using methylation to store information

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Liming; Al-Dirini, Feras; Center for Neural Engineering

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibriummore » Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.« less

A memristor-based nonvolatile latch circuit

NASA Astrophysics Data System (ADS)

Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-06-01

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Investigation of Basic Mechanisms of Radiation Effects in Carbon-Based Electronic Materials

DTIC Science & Technology

2017-06-01

materials characterization, and carbon nanotube diodes, FET, and PZT-memory test device structures for electrical measurements. Pre - and post -irradiation...definition (Radiation exposure) Task 2) The grantee shall perform testing to include: - Radiation testing . May be multiple types. - Pre and post -rad...technologies for electronic devices. Experiential radiation testing has included exposure to 10 keV X-rays, 4 MeV protons, heavy ions, and Ultra

Electrically Variable Resistive Memory Devices

NASA Technical Reports Server (NTRS)

Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.

2010-01-01

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Nanoscale chemical state analysis of resistance random access memory device reacting with Ti

NASA Astrophysics Data System (ADS)

Shima, Hisashi; Nakano, Takashi; Akinaga, Hiro

2010-05-01

The thermal stability of the resistance random access memory material in the reducing atmosphere at the elevated temperature was improved by the addition of Ti. The unipolar resistance switching before and after the postdeposition annealing (PDA) process at 400 °C was confirmed in Pt/CoO/Ti(5 nm)/Pt device, while the severe degradation of the initial resistance occurs in the Pt/CoO/Pt and Pt/CoO/Ti(50 nm)/Pt devices. By investigating the chemical bonding states of Co, O, and Ti using electron energy loss spectroscopy combined with transmission electron microscopy, it was revealed that excess Ti induces the formation of metallic Co, while the thermal stability was improved by trace Ti. Moreover, it was indicated that the filamentary conduction path can be thermally induced after PDA in the oxide layer by analyzing electrical properties of the degraded devices. The adjustment of the reducing elements is quite essential in order to participate in their profits.

An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices.

PubMed

Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

2017-12-01

Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag 5 In 5 Sb 60 Te 30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices

NASA Astrophysics Data System (ADS)

Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

2017-12-01

Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

Review of radiation effects on ReRAM devices and technology

NASA Astrophysics Data System (ADS)

Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

2017-08-01

A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

Field enhanced charge carrier reconfiguration in electronic and ionic coupled dynamic polymer resistive memory.

PubMed

Zhao, Jun Hui; Thomson, Douglas J; Pilapil, Matt; Pillai, Rajesh G; Rahman, G M Aminur; Freund, Michael S

2010-04-02

Dynamic resistive memory devices based on a conjugated polymer composite (PPy(0)DBS(-)Li(+) (PPy: polypyrrole; DBS(-): dodecylbenzenesulfonate)), with field-driven ion migration, have been demonstrated. In this work the dynamics of these systems has been investigated and it has been concluded that increasing the applied field can dramatically increase the rate at which information can be 'written' into these devices. A conductance model using space charge limited current coupled with an electric field induced ion reconfiguration has been successfully utilized to interpret the experimentally observed transient conducting behaviors. The memory devices use the rising and falling transient current states for the storage of digital states. The magnitude of these transient currents is controlled by the magnitude and width of the write/read pulse. For the 500 nm length devices used in this work an increase in 'write' potential from 2.5 to 5.5 V decreased the time required to create a transient conductance state that can be converted into the digital signal by 50 times. This work suggests that the scaling of these devices will be favorable and that 'write' times for the conjugated polymer composite memory devices will decrease rapidly as ion driving fields increase with decreasing device size.

Current-voltage characteristics of organic semiconductors: Interfacial control between organic layers and electrodes

NASA Astrophysics Data System (ADS)

Kondo, Takeshi

2007-12-01

Current-voltage (I-V) characteristics of organic molecular glasses and solution processable materials embedded between two electrodes were studied to find materials possessing high charge-carrier mobilities and to design organic memory devices. The comparison studies between TOF, FET and SCLC measurements confirm the validity of using analyses of I-V characteristics to determine the mobility of organic semiconductors. Hexaazatrinaphthylene derivatives tri-substituted by electron withdrawing groups were characterized as potential electron transporting molecular glasses. The presence of two isomers has important implications for film morphology and effective mobility. The statistical isomer mixture of hexaazatrinaphthylene derivatized with pentafluoro-phenylmethyl ester is able to form amorphous films, and electron mobilities with the range of 10--2 cm2/Vs are observed in their I-V characteristics. Single-layer organic memory devices consisting of a polymer layer embedded between an Al electrode and ITO modified with Ag nanodots (Ag-NDs) prepared by a solution-based surface assembly demonstrated a potential capability as nonvolatile organic memory device with high ON/OFF switching ratios of 10 4. This level of performance could be achieved by modifying the ITO electrodes with some Ag-NDs that act as trapping sites, reducing the current in the OFF state. Based upon the observed electrical characteristics, the currents of the low-resistance state can be attributed to a tunneling through low-resistance pathways of metal particles originating from the metal top electrode in the organic layer and that the high-resistance state is controlled by charge trapping by the metal particles including Ag-NDs. In an alternative approach, complex films of AgNO3: hexaazatrinaphthylene derivatives were studied as the active layers for all-solution processed and air-stable organic memory devices. Rewritable memory effects were observed in the devices comprised of a thin polymer dielectric layer deposited on the bottom electrode, the complex film, and a conducting polymer film as the top electrode. The electrical characteristics indicate that the accumulation of Ag+ ions at the interface of the complex film and the top electrode may contribute to the switching effect.

Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

NASA Astrophysics Data System (ADS)

Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

2014-11-01

Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

Development and characterization of a ferroelectric non-volatile memory for flexible electronics

NASA Astrophysics Data System (ADS)

Mao, Duo

Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P(VDF-TrFE) ferroelectric capacitor for a one-transistor-one-capacitor (1T1C) memory cell. The 1T1C devices were fabricated at low temperature and demonstrated a memory window (DeltaVBL) of 2.3 V and 3.5 V, depending on the device dimensions. Next, FRAM arrays (4-bit, 16-bit and 64-bit) based on the two-transistor-two-capacitor (2T2C) memory cell architecture were designed and fabricated using a photolithographic process with 9 masks. The fabricated FRAM arrays were packaged in 28-pin ceramic packages. The read/write schemes were developed and the FRAM arrays show successful program and erase with a memory window of approximately 1 V at the output of the sense amplifier.

Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

NASA Astrophysics Data System (ADS)

Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

2013-04-01

In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

Titanium oxide nonvolatile memory device and its application

NASA Astrophysics Data System (ADS)

Wang, Wei

In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

Surface Engineering of ITO Substrates to Improve the Memory Performance of an Asymmetric Conjugated Molecule with a Side Chain.

PubMed

Hou, Xiang; Cheng, Xue-Feng; Xiao, Xin; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei

2017-09-05

Organic multilevel random resistive access memory (RRAM) devices with an electrode/organic layer/electrode sandwich-like structure suffer from poor reproducibility, such as low effective ternary device yields and a wide threshold voltage distribution, and improvements through organic material renovation are rather limited. In contrast, engineering of the electrode surfaces rather than molecule design has been demonstrated to boost the performance of organic electronics effectively. Herein, we introduce surface engineering into organic multilevel RRAMs to enhance their ternary memory performance. A new asymmetric conjugated molecule composed of phenothiazine and malononitrile with a side chain (PTZ-PTZO-CN) was fabricated in an indium tin oxide (ITO)/PTZ-PTZO-CN/Al sandwich-like memory device. Modification of the ITO substrate with a phosphonic acid (PA) prior to device fabrication increased the ternary device yield (the ratio of effective ternary device) and narrowed the threshold voltage distribution. The crystallinity analysis revealed that PTZ-PTZO-CN grown on untreated ITO crystallized into two phases. After the surface engineering of ITO, this crystalline ambiguity was eliminated and a sole crystal phase was obtained that was the same as in the powder state. The unified crystal structure and improved grain mosaicity resulted in a lower threshold voltage and, therefore, a higher ternary device yield. Our result demonstrated that PA modification also improved the memory performance of an asymmetric conjugated molecule with a side chain. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Unexpected surface implanted layer in static random access memory devices observed by microwave impedance microscope

NASA Astrophysics Data System (ADS)

Kundhikanjana, W.; Yang, Y.; Tanga, Q.; Zhang, K.; Lai, K.; Ma, Y.; Kelly, M. A.; Li, X. X.; Shen, Z.-X.

2013-02-01

Real-space mapping of doping concentration in semiconductor devices is of great importance for the microelectronics industry. In this work, a scanning microwave impedance microscope (MIM) is employed to resolve the local conductivity distribution of a static random access memory sample. The MIM electronics can also be adjusted to the scanning capacitance microscopy (SCM) mode, allowing both measurements on the same region. Interestingly, while the conventional SCM images match the nominal device structure, the MIM results display certain unexpected features, which originate from a thin layer of the dopant ions penetrating through the protective layers during the heavy implantation steps.

Ultralow Power Consumption Flexible Biomemristors.

PubMed

Kim, Min-Kyu; Lee, Jang-Sik

2018-03-28

Low power consumption is the important requirement in memory devices for saving energy. In particular, improved energy efficiency is essential in implantable electronic devices for operation under a limited power supply. Here, we demonstrate the use of κ-carrageenan (κ-car) as the resistive switching layer to achieve memory that has low power consumption. A carboxymethyl (CM) group is introduced to the κ-car to increase its ionic conductivity. Ag was doped in CM:κ-car to improve the resistive switching properties of the devices. Memory devices based on Ag-doped CM:κ-car showed electroforming-free resistive switching. This device exhibited low reset voltage (∼0.05 V), fast switching speed (50 ns), and high on/off ratio (>10 3 ) under low compliance current (10 -5 A). Its power consumption (∼0.35 μW) is much lower than those of the previously reported biomemristors. The resistive switching may be a result of an electrochemical redox process and Ag filament formation in the CM:κ-car under an electric field. This biopolymer memory can also be fabricated on flexible substrate. This study verifies the feasibility of using biopolymers for applications to future implantable and biocompatible nanoelectronics.

Deviation from the law of energy equipartition in a small dynamic-random-access memory

NASA Astrophysics Data System (ADS)

Carles, Pierre-Alix; Nishiguchi, Katsuhiko; Fujiwara, Akira

2015-06-01

A small dynamic-random-access memory (DRAM) coupled with a high charge sensitivity electrometer based on a silicon field-effect transistor is used to study the law of equipartition of energy. By statistically analyzing the movement of single electrons in the DRAM at various temperature and voltage conditions in thermal equilibrium, we are able to observe a behavior that differs from what is predicted by the law of equipartition energy: when the charging energy of the capacitor of the DRAM is comparable to or smaller than the thermal energy kBT/2, random electron motion is ruled perfectly by thermal energy; on the other hand, when the charging energy becomes higher in relation to the thermal energy kBT/2, random electron motion is suppressed which indicates a deviation from the law of equipartition of energy. Since the law of equipartition is analyzed using the DRAM, one of the most familiar devices, we believe that our results are perfectly universal among all electronic devices.

Stretchable inorganic nanomembrane electronics for healthcare devices

NASA Astrophysics Data System (ADS)

Kim, Dae-Hyeong; Son, Donghee; Kim, Jaemin

2015-05-01

Flexible or stretchable electronic devices for healthcare technologies have attracted much attention in terms of usefulness to assist doctors in their operating rooms and to monitor patients' physical conditions for a long period of time. Each device to monitor the patients' physiological signals real-time, such as strain, pressure, temperature, and humidity, etc. has been reported recently. However, their limitations are found in acquisition of various physiological signals simultaneously because all the functions are not assembled in one skin-like electronic system. Here, we describe a skin-like, multi-functional healthcare system, which includes single crystalline silicon nanomembrane based sensors, nanoparticle-integrated non-volatile memory modules, electro-resistive thermal actuators, and drug delivery. Smart prosthetics coupled with therapeutic electronic system would provide new approaches to personalized healthcare.

Conference on Charge-Coupled Device Technology and Applications

NASA Technical Reports Server (NTRS)

1976-01-01

Papers were presented from the conference on charge coupled device technology and applications. The following topics were investigated: data processing; infrared; devices and testing; electron-in, x-ray, radiation; and applications. The emphasis was on the advances of mutual relevance and potential significance both to industry and NASA's current and future requirements in all fields of imaging, signal processing and memory.

Thermal annealing and temperature dependences of memory effect in organic memory transistor

NASA Astrophysics Data System (ADS)

Ren, X. C.; Wang, S. M.; Leung, C. W.; Yan, F.; Chan, P. K. L.

2011-07-01

We investigate the annealing and thermal effects of organic non-volatile memory with floating silver nanoparticles by real-time transfer curve measurements. During annealing, the memory window shows shrinkage of 23% due to structural variation of the nanoparticles. However, by increasing the device operating temperature from 20 to 90 °C after annealing, the memory window demonstrates an enlargement up to 100%. The differences in the thermal responses are explained and confirmed by the co-existence of electron and hole traps. Our findings provide a better understanding of organic memory performances under various operating temperatures and validate their applications for temperature sensing or thermal memories.

RFID and Memory Devices Fabricated Integrally on Substrates

NASA Technical Reports Server (NTRS)

Schramm, Harry F.

2004-01-01

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for the deposition of the device. By use of a vacuum arc vapor deposition apparatus, a thin electrically insulating film would first be deposited on the substrate. Subsequent layers of materials would then be deposited and patterned by use of known integrated-circuit fabrication techniques. The total thickness of the deposited layers could be much less than the 100- m thickness of the thinnest state-of-the-art self-contained microchips. Such a thin deposit could be readily concealed by simply painting over it. Both large vacuum chambers for production runs and portable hand-held devices for in situ applications are available.

Switching mechanism transition induced by annealing treatment in nonvolatile Cu/ZnO/Cu/ZnO/Pt resistive memory: From carrier trapping/detrapping to electrochemical metallization

NASA Astrophysics Data System (ADS)

Yang, Y. C.; Pan, F.; Zeng, F.; Liu, M.

2009-12-01

ZnO/Cu/ZnO trilayer films sandwiched between Cu and Pt electrodes were prepared for nonvolatile resistive memory applications. These structures show resistance switching under electrical bias both before and after a rapid thermal annealing (RTA) treatment, while it is found that the resistive switching effects in the two cases exhibit distinct characteristics. Compared with the as-fabricated device, the memory cell after RTA demonstrates remarkable device parameter improvements including lower threshold voltages, lower write current, and higher Roff/Ron ratio. A high-voltage forming process is avoided in the annealed device as well. Furthermore, the RTA treatment has triggered a switching mechanism transition from a carrier trapping/detrapping type to an electrochemical-redox-reaction-controlled conductive filament formation/rupture process, as indicated by different features in current-voltage characteristics. Both scanning electron microscopy observations and Auger electron spectroscopy depth profiles reveal that the Cu charge trapping layer in ZnO/Cu/ZnO disperses uniformly into the storage medium after RTA, while x-ray diffraction and x-ray photoelectron spectroscopy analyses demonstrate that the Cu atoms have lost electrons to become Cu2+ ions after dispersion. The above experimental facts indicate that the altered status of Cu in the ZnO/Cu/ZnO trilayer films during RTA treatment should be responsible for the switching mechanism transition. This study is envisioned to open the door for understanding the interrelation between different mechanisms that currently exist in the field of resistive memories.

Multi-step resistive switching behavior of Li-doped ZnO resistance random access memory device controlled by compliance current

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lin, Chun-Cheng; Department of Mathematic and Physical Sciences, R.O.C. Air Force Academy, Kaohsiung 820, Taiwan; Tang, Jian-Fu

2016-06-28

The multi-step resistive switching (RS) behavior of a unipolar Pt/Li{sub 0.06}Zn{sub 0.94}O/Pt resistive random access memory (RRAM) device is investigated. It is found that the RRAM device exhibits normal, 2-, 3-, and 4-step RESET behaviors under different compliance currents. The transport mechanism within the device is investigated by means of current-voltage curves, in-situ transmission electron microscopy, and electrochemical impedance spectroscopy. It is shown that the ion transport mechanism is dominated by Ohmic behavior under low electric fields and the Poole-Frenkel emission effect (normal RS behavior) or Li{sup +} ion diffusion (2-, 3-, and 4-step RESET behaviors) under high electric fields.

Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx, GdOx, HfOx, and TaOx switching materials.

PubMed

Prakash, Amit; Maikap, Siddheswar; Banerjee, Writam; Jana, Debanjan; Lai, Chao-Sung

2013-09-06

Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled 'SET/RESET' current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.

Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

PubMed

Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

2017-10-11

The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

Electronic medical devices: a primer for pathologists.

PubMed

Weitzman, James B

2003-07-01

Electronic medical devices (EMDs) with downloadable memories, such as implantable cardiac pacemakers, defibrillators, drug pumps, insulin pumps, and glucose monitors, are now an integral part of routine medical practice in the United States, and functional organ replacements, such as the artificial heart, pancreas, and retina, will most likely become commonplace in the near future. Often, EMDs end up in the hands of the pathologist as a surgical specimen or at autopsy. No established guidelines for systematic examination and reporting or comprehensive reviews of EMDs currently exist for the pathologist. To provide pathologists with a general overview of EMDs, including a brief history; epidemiology; essential technical aspects, indications, contraindications, and complications of selected devices; potential applications in pathology; relevant government regulations; and suggested examination and reporting guidelines. Articles indexed on PubMed of the National Library of Medicine, various medical and history of medicine textbooks, US Food and Drug Administration publications and product information, and specifications provided by device manufacturers. Studies were selected on the basis of relevance to the study objectives. Descriptive data were selected by the author. Suggested examination and reporting guidelines for EMDs received as surgical specimens and retrieved at autopsy. Electronic medical devices received as surgical specimens and retrieved at autopsy are increasing in number and level of sophistication. They should be systematically examined and reported, should have electronic memories downloaded when indicated, will help pathologists answer more questions with greater certainty, and should become an integral part of the formal knowledge base, research focus, training, and practice of pathology.

Graphene - ferroelectric and MoS2 - ferroelectric heterostructures for memory applications

NASA Astrophysics Data System (ADS)

Lipatov, Alexey; Sharma, Pankaj; Gruverman, Alexei; Sinitskii, Alexander

In recent years there has been an unprecedented interest in two-dimensional (2D) materials with unique physical and chemical properties that cannot be found in their three-dimensional (3D) counterparts. One of the important advantages of 2D materials is that they can be easily integrated with other 2D materials and functional films, resulting in multilayered structures with new properties. We fabricated and tested electronic and memory properties of field-effect transistors (FETs) based on a single-layer graphene combined with lead zirconium titanate (PZT) substrate. Previously studied graphene-PZT devices exhibited an unusual electronic behavior such as clockwise hysteresis of electronic transport, in contradiction with counterclockwise polarization dependence of PZT. We investigated how the interplay of polarization and interfacial phenomena affects the electronic behavior and memory characteristics of graphene-PZT FETs, explain the origin of unusual clockwise hysteresis and experimentally demonstrate a reversed polarization-dependent hysteresis of electronic transport. In addition we fabricated and tested properties of MoS2-PZT FETs which exhibit a large hysteresis of electronic transport with high ON/OFF ratios. We demonstrate that MoS2-PZT memories have a number of advantages over commercial FeRAMs, such as nondestructive data readout, low operation voltage, wide memory window and the possibility to write and erase them both electrically and optically.

Device and method to enhance availability of cluster-based processing systems

NASA Technical Reports Server (NTRS)

Lupia, David J. (Inventor); Ramos, Jeremy (Inventor); Samson, Jr., John R. (Inventor)

2010-01-01

An electronic computing device including at least one processing unit that implements a specific fault signal upon experiencing an associated fault, a control unit that generates a specific recovery signal upon receiving the fault signal from the at least one processing unit, and at least one input memory unit. The recovery signal initiates specific recovery processes in the at least one processing unit. The input memory buffers input data signals input to the at least one processing unit that experienced the fault during the recovery period.

Multipurpose panel, phase 1, study report. [display utilizing multiplexing and digital techniques

NASA Technical Reports Server (NTRS)

Parkin, W.

1975-01-01

The feasibility of a multipurpose panel which provides a programmable electronic display for changeable panel nomenclature, multiplexes similar indicator display signals to the signal display, and demultiplexes command signals is examined. Topics discussed include: electronic display technology, miniaturized electronic and memory devices, and data management systems which employ digital address and multiplexing.

Conducting Polymeric Hydrogel Electrolyte Based on Carboxymethylcellulose and Polyacrylamide/Polyaniline for Supercapacitor Applications

NASA Astrophysics Data System (ADS)

Suganya, N.; Jaisankar, V.; Sivakumar, E. K. T.

Conducting polymer hydrogels represent a unique class of materials that possess enormous application in flexible electronic devices. In the present work, conducting carboxymethylcellulose (CMC)-co-polyacrylamide (PAAm)/polyaniline was synthesized by a two-step interpenetrating network solution polymerization technique. The synthesized CMC-co-PAAm/polyaniline with interpenetrating network structure was prepared by in situ polymerization of aniline to enhance conductivity. The molecular structure and morphology of the copolymer hydrogels were characterized by Fourier transform infrared spectroscopy and scanning electron microscopy. The novel conducting polymer hydrogels show good electrical and electrochemical behavior, which makes them potentially useful in electronic devices such as supercapacitors, biosensors, bioelectronics, solar cells and memory devices.

A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

NASA Astrophysics Data System (ADS)

Jovanović, B.; Brum, R. M.; Torres, L.

2014-04-01

After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

Hafnia-based resistive switching devices for non-volatile memory applications and effects of gamma irradiation on device performance

NASA Astrophysics Data System (ADS)

Arun, N.; Kumar, K. Vinod; Pathak, A. P.; Avasthi, D. K.; Nageswara Rao, S. V. S.

2018-04-01

Non-volatile memory (NVM) devices were fabricated as a Metal- Insulator-Metal (MIM) structures by sandwiching Hafnium dioxide (HfO2) thin film in between two metal electrodes. The top and bottom metal electrodes were deposited by using the thermal evaporation, and the oxide layer was deposited by using the RF magnetron sputtering technique. The Resistive Random Access Memory (RRAM) device structures such as Ag/HfO2/Au/Si were fabricated and I-V characteristics for the pristine and gamma-irradiated devices with a dose 24 kGy were measured. Further we have studied the thermal annealing effects, in the range of 100°-400°C in a tubular furnace for the HfO2/Au/Si samples. The X-ray diffraction (XRD), Rutherford Backscattering Spectrometry (RBS), field emission-scanning electron microscopy (FESEM) analysis measurements were performed to determine the thickness, crystallinity and stoichiometry of these films. The electrical characteristics such as resistive switching, endurance, retention time and switching speed were measured by a semiconductor device analyser. The effects of gamma irradiation on the switching properties of these RRAM devices have been studied.

Modeling of Sonos Memory Cell Erase Cycle

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications

NASA Astrophysics Data System (ADS)

He, Long-Fei; Zhu, Hao; Xu, Jing; Liu, Hao; Nie, Xin-Ran; Chen, Lin; Sun, Qing-Qing; Xia, Yang; Wei Zhang, David

2017-11-01

The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.

Super non-linear RRAM with ultra-low power for 3D vertical nano-crossbar arrays.

PubMed

Luo, Qing; Xu, Xiaoxin; Liu, Hongtao; Lv, Hangbing; Gong, Tiancheng; Long, Shibing; Liu, Qi; Sun, Haitao; Banerjee, Writam; Li, Ling; Gao, Jianfeng; Lu, Nianduan; Liu, Ming

2016-08-25

Vertical crossbar arrays provide a cost-effective approach for high density three-dimensional (3D) integration of resistive random access memory. However, an individual selector device is not allowed to be integrated with the memory cell separately. The development of V-RRAM has impeded the lack of satisfactory self-selective cells. In this study, we have developed a high performance bilayer self-selective device using HfO2 as the memory switching layer and a mixed ionic and electron conductor as the selective layer. The device exhibits high non-linearity (>10(3)) and ultra-low half-select leakage (<0.1 pA). A four layer vertical crossbar array was successfully demonstrated based on the developed self-selective device. High uniformity, ultra-low leakage, sub-nA operation, self-compliance, and excellent read/write disturbance immunity were achieved. The robust array level performance shows attractive potential for low power and high density 3D data storage applications.

Soluble porphyrin polymers

DOEpatents

Gust, Jr., John Devens; Liddell, Paul Anthony

2015-07-07

Porphyrin polymers of Structure 1, where n is an integer (e.g., 1, 2, 3, 4, 5, or greater) ##STR00001## are synthesized by the method shown in FIGS. 2A and 2B. The porphyrin polymers of Structure 1 are soluble in organic solvents such as 2-MeTHF and the like, and can be synthesized in bulk (i.e., in processes other than electropolymerization). These porphyrin polymers have long excited state lifetimes, making the material suitable as an organic semiconductor for organic electronic devices including transistors and memories, as well as solar cells, sensors, light-emitting devices, and other opto-electronic devices.

Conditional Dispersive Readout of a CMOS Single-Electron Memory Cell

NASA Astrophysics Data System (ADS)

Schaal, S.; Barraud, S.; Morton, J. J. L.; Gonzalez-Zalba, M. F.

2018-05-01

Quantum computers require interfaces with classical electronics for efficient qubit control, measurement, and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offering potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-semiconductor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large-scale circuits. We demonstrate a CMOS single-electron memory cell composed of a single quantum dot and a transistor that locks charge on the quantum-dot gate. The single-electron memory cell is conditionally read out by gate-based dispersive sensing using a lumped-element L C resonator. The control field-effect transistor (FET) and quantum dot are fabricated on the same chip using fully depleted silicon-on-insulator technology. We obtain a charge sensitivity of δ q =95 ×10-6e Hz-1 /2 when the quantum-dot readout is enabled by the control FET, comparable to results without the control FET. Additionally, we observe a single-electron retention time on the order of a second when storing a single-electron charge on the quantum dot at millikelvin temperatures. These results demonstrate first steps towards time-based multiplexing of gate-based dispersive readout in CMOS quantum devices opening the path for the development of an all-silicon quantum-classical processor.

Synaptic plasticity and oscillation at zinc tin oxide/silver oxide interfaces

NASA Astrophysics Data System (ADS)

Murdoch, Billy J.; McCulloch, Dougal G.; Partridge, James G.

2017-02-01

Short-term plasticity, long-term potentiation, and pulse interval dependent plasticity learning/memory functions have been observed in junctions between amorphous zinc-tin-oxide and silver-oxide. The same junctions exhibited current-controlled negative differential resistance and when connected in an appropriate circuit, they behaved as relaxation oscillators. These oscillators produced voltage pulses suitable for device programming. Transmission electron microscopy, energy dispersive X-ray spectroscopy, and electrical measurements suggest that the characteristics of these junctions arise from Ag+/O- electromigration across a highly resistive interface layer. With memory/learning functions and programming spikes provided in a single device structure, arrays of similar devices could be used to form transistor-free neuromorphic circuits.

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

NASA Astrophysics Data System (ADS)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

A multiscale simulation technique for molecular electronics: design of a directed self-assembled molecular n-bit shift register memory device.

PubMed

Lambropoulos, Nicholas A; Reimers, Jeffrey R; Crossley, Maxwell J; Hush, Noel S; Silverbrook, Kia

2013-12-20

A general method useful in molecular electronics design is developed that integrates modelling on the nano-scale (using quantum-chemical software) and on the micro-scale (using finite-element methods). It is applied to the design of an n-bit shift register memory that could conceivably be built using accessible technologies. To achieve this, the entire complex structure of the device would be built to atomic precision using feedback-controlled lithography to provide atomic-level control of silicon devices, controlled wet-chemical synthesis of molecular insulating pillars above the silicon, and controlled wet-chemical self-assembly of modular molecular devices to these pillars that connect to external metal electrodes (leads). The shift register consists of n connected cells that read data from an input electrode, pass it sequentially between the cells under the control of two external clock electrodes, and deliver it finally to an output device. The proposed cells are trimeric oligoporphyrin units whose internal states are manipulated to provide functionality, covalently connected to other cells via dipeptide linkages. Signals from the clock electrodes are conveyed by oligoporphyrin molecular wires, and μ-oxo porphyrin insulating columns are used as the supporting pillars. The developed multiscale modelling technique is applied to determine the characteristics of this molecular device, with in particular utilization of the inverted region for molecular electron-transfer processes shown to facilitate latching and control using exceptionally low energy costs per logic operation compared to standard CMOS shift register technology.

A multiscale simulation technique for molecular electronics: design of a directed self-assembled molecular n-bit shift register memory device

NASA Astrophysics Data System (ADS)

Lambropoulos, Nicholas A.; Reimers, Jeffrey R.; Crossley, Maxwell J.; Hush, Noel S.; Silverbrook, Kia

2013-12-01

A general method useful in molecular electronics design is developed that integrates modelling on the nano-scale (using quantum-chemical software) and on the micro-scale (using finite-element methods). It is applied to the design of an n-bit shift register memory that could conceivably be built using accessible technologies. To achieve this, the entire complex structure of the device would be built to atomic precision using feedback-controlled lithography to provide atomic-level control of silicon devices, controlled wet-chemical synthesis of molecular insulating pillars above the silicon, and controlled wet-chemical self-assembly of modular molecular devices to these pillars that connect to external metal electrodes (leads). The shift register consists of n connected cells that read data from an input electrode, pass it sequentially between the cells under the control of two external clock electrodes, and deliver it finally to an output device. The proposed cells are trimeric oligoporphyrin units whose internal states are manipulated to provide functionality, covalently connected to other cells via dipeptide linkages. Signals from the clock electrodes are conveyed by oligoporphyrin molecular wires, and μ-oxo porphyrin insulating columns are used as the supporting pillars. The developed multiscale modelling technique is applied to determine the characteristics of this molecular device, with in particular utilization of the inverted region for molecular electron-transfer processes shown to facilitate latching and control using exceptionally low energy costs per logic operation compared to standard CMOS shift register technology.

A triple quantum dot based nano-electromechanical memory device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pozner, R.; Lifshitz, E.; Solid State Institute, Technion-Israel Institute of Technology, Haifa 32000

Colloidal quantum dots (CQDs) are free-standing nano-structures with chemically tunable electronic properties. This tunability offers intriguing possibilities for nano-electromechanical devices. In this work, we consider a nano-electromechanical nonvolatile memory (NVM) device incorporating a triple quantum dot (TQD) cluster. The device operation is based on a bias induced motion of a floating quantum dot (FQD) located between two bound quantum dots (BQDs). The mechanical motion is used for switching between two stable states, “ON” and “OFF” states, where ligand-mediated effective interdot forces between the BQDs and the FQD serve to hold the FQD in each stable position under zero bias. Consideringmore » realistic microscopic parameters, our quantum-classical theoretical treatment of the TQD reveals the characteristics of the NVM.« less

Two-Way Communication Using RFID Equipment and Techniques

NASA Technical Reports Server (NTRS)

Jedry, Thomas; Archer, Eric

2007-01-01

Equipment and techniques used in radio-frequency identification (RFID) would be extended, according to a proposal, to enable short-range, two-way communication between electronic products and host computers. In one example of a typical contemplated application, the purpose of the short-range radio communication would be to transfer image data from a user s digital still or video camera to the user s computer for recording and/or processing. The concept is also applicable to consumer electronic products other than digital cameras (for example, cellular telephones, portable computers, or motion sensors in alarm systems), and to a variety of industrial and scientific sensors and other devices that generate data. Until now, RFID has been used to exchange small amounts of mostly static information for identifying and tracking assets. Information pertaining to an asset (typically, an object in inventory to be tracked) is contained in miniature electronic circuitry in an RFID tag attached to the object. Conventional RFID equipment and techniques enable a host computer to read data from and, in some cases, to write data to, RFID tags, but they do not enable such additional functions as sending commands to, or retrieving possibly large quantities of dynamic data from, RFID-tagged devices. The proposal would enable such additional functions. The figure schematically depicts an implementation of the proposal for a sensory device (e.g., a digital camera) that includes circuitry that converts sensory information to digital data. In addition to the basic sensory device, there would be a controller and a memory that would store the sensor data and/or data from the controller. The device would also be equipped with a conventional RFID chipset and antenna, which would communicate with a host computer via an RFID reader. The controller would function partly as a communication interface, implementing two-way communication protocols at all levels (including RFID if needed) between the sensory device and the memory and between the host computer and the memory. The controller would perform power V

A Novel Bat-Shaped Dicyanomethylene-4H-pyran-Functionalized Naphthalimide for Highly Efficient Solution-Processed Multilevel Memory Devices.

PubMed

Zhang, Qi-Jian; Miao, Shi-Feng; Li, Hua; He, Jing-Hui; Li, Na-Jun; Xu, Qing-Feng; Chen, Dong-Yun; Lu, Jian-Mei

2017-06-19

Small-molecule-based multilevel memory devices have attracted increasing attention because of their advantages, such as super-high storage density, fast reading speed, light weight, low energy consumption, and shock resistance. However, the fabrication of small-molecule-based devices always requires expensive vacuum-deposition techniques or high temperatures for spin-coating. Herein, through rational tailoring of a previous molecule, DPCNCANA (4,4'-(6,6'-bis(2-octyl-1,3-dioxo-2,3-dihydro-1H-benzo[de]isoquinolin-6-yl)-9H,9'H-[3,3'-bicarbazole]-9,9'-diyl)dibenzonitrile), a novel bat-shaped A-D-A-type (A-D-A=acceptor-donor-acceptor) symmetric framework has been successfully synthesized and can be dissolved in common solvents at room temperature. Additionally, it has a low-energy bandgap and dense intramolecular stacking in the film state. The solution-processed memory devices exhibited high-performance nonvolatile multilevel data-storage properties with low switching threshold voltages of about -1.3 and -2.7 V, which is beneficial for low power consumption. Our result should prompt the study of highly efficient solution-processed multilevel memory devices in the field of organic electronics. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Stress-induced reversible and irreversible ferroelectric domain switching

NASA Astrophysics Data System (ADS)

Chen, Zibin; Huang, Qianwei; Wang, Feifei; Ringer, Simon P.; Luo, Haosu; Liao, Xiaozhou

2018-04-01

Ferroelectric materials have been extensively explored for applications in electronic devices because of their ferroelectric/ferroelastic domain switching behaviour under electric bias or mechanical stress. Recent findings on applying mechanical loading to manipulate reversible logical signals in non-volatile ferroelectric memory devices make ferroelectric materials more attractive to scientists and engineers. However, the dynamical microscopic structural behaviour of ferroelectric domains under stress is not well understood, which limits the applications of ferroelectric/ferroelastic switching in memory devices. Here, the kinetics of reversible and irreversible ferroelectric domain switching induced by mechanical stress in relaxor-based ferroelectrics was explored. In-situ transmission electron microscopy investigation revealed that 90° ferroelastic and 180° ferroelectric domain switching can be induced by low and high mechanical stresses. The nucleation and growth of nanoscale domains overwhelm the defect-induced pinning effect on the stable micro-domain walls. This study provides deep insights for exploring the mechanical kinetics for ferroelectric/ferroelastic domains and a clear pathway to overcome the domain pinning effect of defects in ferroelectrics.

Comparison of resistive switching characteristics using copper and aluminum electrodes on GeOx/W cross-point memories

PubMed Central

2013-01-01

Comparison of resistive switching memory characteristics using copper (Cu) and aluminum (Al) electrodes on GeOx/W cross-points has been reported under low current compliances (CCs) of 1 nA to 50 μA. The cross-point memory devices are observed by high-resolution transmission electron microscopy (HRTEM). Improved memory characteristics are observed for the Cu/GeOx/W structures as compared to the Al/GeOx/W cross-points owing to AlOx formation at the Al/GeOx interface. The RESET current increases with the increase of the CCs varying from 1 nA to 50 μA for the Cu electrode devices, while the RESET current is high (>1 mA) and independent of CCs varying from 1 nA to 500 μA for the Al electrode devices. An extra formation voltage is needed for the Al/GeOx/W devices, while a low operation voltage of ±2 V is needed for the Cu/GeOx/W cross-point devices. Repeatable bipolar resistive switching characteristics of the Cu/GeOx/W cross-point memory devices are observed with CC varying from 1 nA to 50 μA, and unipolar resistive switching is observed with CC >100 μA. High resistance ratios of 102 to 104 for the bipolar mode (CCs of 1 nA to 50 μA) and approximately 108 for the unipolar mode are obtained for the Cu/GeOx/W cross-points. In addition, repeatable switching cycles and data retention of 103 s are observed under a low current of 1 nA for future low-power, high-density, nonvolatile, nanoscale memory applications. PMID:24305116

Advanced Relay Design and Technology for Energy-Efficient Electronics

DTIC Science & Technology

2011-07-07

Estimates and Unique Failure Mechanisms of the Digital Micromirror Device (DMD),” in Proceedings of the IEEE Annual International Reliability Physics...Symposium (IRPS 󈨦), pp. 9-16, March 1998. [18] A. B. Sontheimer, “Digital Micromirror Device (DMD) Hinge Memory Lifetime Reliability Modeling,” in...Mechanisms of the Digital Micromirror Device (DMD),” in Proceedings of the IEEE Annual International Reliability Physics Symposium (IRPS 󈨦), pp. 9-16

Neuromimetic Circuits with Synaptic Devices Based on Strongly Correlated Electron Systems

NASA Astrophysics Data System (ADS)

Ha, Sieu D.; Shi, Jian; Meroz, Yasmine; Mahadevan, L.; Ramanathan, Shriram

2014-12-01

Strongly correlated electron systems such as the rare-earth nickelates (R NiO3 , R denotes a rare-earth element) can exhibit synapselike continuous long-term potentiation and depression when gated with ionic liquids; exploiting the extreme sensitivity of coupled charge, spin, orbital, and lattice degrees of freedom to stoichiometry. We present experimental real-time, device-level classical conditioning and unlearning using nickelate-based synaptic devices in an electronic circuit compatible with both excitatory and inhibitory neurons. We establish a physical model for the device behavior based on electric-field-driven coupled ionic-electronic diffusion that can be utilized for design of more complex systems. We use the model to simulate a variety of associate and nonassociative learning mechanisms, as well as a feedforward recurrent network for storing memory. Our circuit intuitively parallels biological neural architectures, and it can be readily generalized to other forms of cellular learning and extinction. The simulation of neural function with electronic device analogs may provide insight into biological processes such as decision making, learning, and adaptation, while facilitating advanced parallel information processing in hardware.

Flexible ferroelectric element based on van der Waals heteroepitaxy.

PubMed

Jiang, Jie; Bitla, Yugandhar; Huang, Chun-Wei; Do, Thi Hien; Liu, Heng-Jui; Hsieh, Ying-Hui; Ma, Chun-Hao; Jang, Chi-Yuan; Lai, Yu-Hong; Chiu, Po-Wen; Wu, Wen-Wei; Chen, Yi-Chun; Zhou, Yi-Chun; Chu, Ying-Hao

2017-06-01

We present a promising technology for nonvolatile flexible electronic devices: A direct fabrication of epitaxial lead zirconium titanate (PZT) on flexible mica substrate via van der Waals epitaxy. These single-crystalline flexible ferroelectric PZT films not only retain their performance, reliability, and thermal stability comparable to those on rigid counterparts in tests of nonvolatile memory elements but also exhibit remarkable mechanical properties with robust operation in bent states (bending radii down to 2.5 mm) and cycling tests (1000 times). This study marks the technological advancement toward realizing much-awaited flexible yet single-crystalline nonvolatile electronic devices for the design and development of flexible, lightweight, and next-generation smart devices with potential applications in electronics, robotics, automotive, health care, industrial, and military systems.

Flexible ferroelectric element based on van der Waals heteroepitaxy

PubMed Central

Jiang, Jie; Bitla, Yugandhar; Huang, Chun-Wei; Do, Thi Hien; Liu, Heng-Jui; Hsieh, Ying-Hui; Ma, Chun-Hao; Jang, Chi-Yuan; Lai, Yu-Hong; Chiu, Po-Wen; Wu, Wen-Wei; Chen, Yi-Chun; Zhou, Yi-Chun; Chu, Ying-Hao

2017-01-01

We present a promising technology for nonvolatile flexible electronic devices: A direct fabrication of epitaxial lead zirconium titanate (PZT) on flexible mica substrate via van der Waals epitaxy. These single-crystalline flexible ferroelectric PZT films not only retain their performance, reliability, and thermal stability comparable to those on rigid counterparts in tests of nonvolatile memory elements but also exhibit remarkable mechanical properties with robust operation in bent states (bending radii down to 2.5 mm) and cycling tests (1000 times). This study marks the technological advancement toward realizing much-awaited flexible yet single-crystalline nonvolatile electronic devices for the design and development of flexible, lightweight, and next-generation smart devices with potential applications in electronics, robotics, automotive, health care, industrial, and military systems. PMID:28630922

Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

NASA Astrophysics Data System (ADS)

Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

2016-01-01

Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07377d

Hot-Electron-Induced Device Degradation during Gate-Induced Drain Leakage Stress

NASA Astrophysics Data System (ADS)

Kim, Kwang-Soo; Han, Chang-Hoon; Lee, Jun-Ki; Kim, Dong-Soo; Kim, Hyong-Joon; Shin, Joong-Shik; Lee, Hea-Beoum; Choi, Byoung-Deog

2012-11-01

We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

NASA Technical Reports Server (NTRS)

Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

2001-01-01

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Temperature Dependence Of Single-Event Effects

NASA Technical Reports Server (NTRS)

Coss, James R.; Nichols, Donald K.; Smith, Lawrence S.; Huebner, Mark A.; Soli, George A.

1990-01-01

Report describes experimental study of effects of temperature on vulnerability of integrated-circuit memories and other electronic logic devices to single-event effects - spurious bit flips or latch-up in logic state caused by impacts of energetic ions. Involved analysis of data on 14 different device types. In most cases examined, vulnerability to these effects increased or remain constant with temperature.

Printing an ITO-free flexible poly (4-vinylphenol) resistive switching device

NASA Astrophysics Data System (ADS)

Ali, Junaid; Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Aziz, Shahid; Choi, Kyung Hyun

2018-02-01

Resistive switching in a sandwich structure of silver (Ag)/Polyvinyl phenol (PVP)/carbon nanotube (CNTs)-silver nanowires (AgNWs) coated on a flexible PET substrate is reported in this work. Densely populated networks of one dimensional nano materials (1DNM), CNTs-AgNWs have been used as the conductive bottom electrode with the prominent features of high flexibility and low sheet resistance of 90 Ω/sq. Thin, yet uniform active layer of PVP was deposited on top of the spin coated 1DNM thin film through state of the art printing technique of electrohydrodynamic atomization (EHDA) with an average thickness of 170 ± 28 nm. Ag dots with an active area of ∼0.1 mm2 were deposited through roll to plate printing system as the top electrodes to complete the device fabrication of flexible memory device. Our memory device exhibited suitable electrical characteristics with OFF/ON ratio of 100:1, retention time of 60 min and electrical endurance for 100 voltage sweeps without any noticeable decay in performance. The resistive switching characteristics at a low current compliance of 3 nA were also evaluated for the application of low power consumption. This memory device is flexible and can sustain more than 100 bending cycles at a bending diameter of 2 cm with stable HRS and LRS values. Our proposed device shows promise to be used as a future potential nonvolatile memory device in flexible electronics.

Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

NASA Astrophysics Data System (ADS)

Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

2015-10-01

Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e

Deformable devices with integrated functional nanomaterials for wearable electronics.

PubMed

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-01-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

Deformable devices with integrated functional nanomaterials for wearable electronics

NASA Astrophysics Data System (ADS)

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-03-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

Charge collection and SEU mechanisms

NASA Astrophysics Data System (ADS)

Musseau, O.

1994-01-01

In the interaction of cosmic ions with microelectronic devices a dense electron-hole plasma is created along the ion track. Carriers are separated and transported by the electric field and under the action of the concentration gradient. The subsequent collection of these carriers induces a transient current at some electrical node of the device. This "ionocurrent" (single ion induced current) acts as any electrical perturbation in the device, propagating in the circuit and inducing failures. In bistable systems (registers, memories) the stored data can be upset. In clocked devices (microprocessors) the parasitic perturbation may propagate through the device to the outputs. This type of failure only effects the information, and do not degrade the functionally of the device. The purpose of this paper is to review the mechanisms of single event upset in microelectronic devices. Experimental and theoretical results are presented, and actual questions and problems are discussed. A brief introduction recalls the creation of the dense plasma of electron-hole pairs. The basic processes for charge collection in a simple np junction (drift and diffusion) are presented. The funneling-field effect is discussed and experimental results are compared to numerical simulations and semi-empirical models. Charge collection in actual microelectronic structures is then presented. Due to the parasitic elements, coupling effects are observed. Geometrical effects, in densely packed structures, results in multiple errors. Electronic couplings are due to the carriers in excess, acting as minority carriers, that trigger parasitic bipolar transistors. Single event upset of memory cells is discussed, based on numerical and experimental data. The main parameters for device characterization are presented. From the physical interpretation of charge collection mechanisms, the intrinsic sensitivity of various microelectronic technologies is determined and compared to experimental data. Scaling laws and future trends are finally discussed.

Two-dimensional multiferroics in monolayer group IV monochalcogenides

NASA Astrophysics Data System (ADS)

Wang, Hua; Qian, Xiaofeng

2017-03-01

Low-dimensional multiferroic materials hold great promises in miniaturized device applications such as nanoscale transducers, actuators, sensors, photovoltaics, and nonvolatile memories. Here, using first-principles theory we predict that two-dimensional (2D) monolayer group IV monochalcogenides including GeS, GeSe, SnS, and SnSe are a class of 2D semiconducting multiferroics with giant strongly-coupled in-plane spontaneous ferroelectric polarization and spontaneous ferroelastic lattice strain that are thermodynamically stable at room temperature and beyond, and can be effectively modulated by elastic strain engineering. Their optical absorption spectra exhibit strong in-plane anisotropy with visible-spectrum excitonic gaps and sizable exciton binding energies, rendering the unique characteristics of low-dimensional semiconductors. More importantly, the predicted low domain wall energy and small migration barrier together with the coupled multiferroic order and anisotropic electronic structures suggest their great potentials for tunable multiferroic functional devices by manipulating external electrical, mechanical, and optical field to control the internal responses, and enable the development of four device concepts including 2D ferroelectric memory, 2D ferroelastic memory, and 2D ferroelastoelectric nonvolatile photonic memory as well as 2D ferroelectric excitonic photovoltaics.

CMOS-compatible spintronic devices: a review

NASA Astrophysics Data System (ADS)

Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

2016-11-01

For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

Heavy-ion induced single-event upset in integrated circuits

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.

1991-01-01

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Electrochromic conductive polymer fuses for hybrid organic/inorganic semiconductor memories

NASA Astrophysics Data System (ADS)

Möller, Sven; Forrest, Stephen R.; Perlov, Craig; Jackson, Warren; Taussig, Carl

2003-12-01

We demonstrate a nonvolatile, write-once-read-many-times (WORM) memory device employing a hybrid organic/inorganic semiconductor architecture consisting of thin film p-i-n silicon diode on a stainless steel substrate integrated in series with a conductive polymer fuse. The nonlinearity of the silicon diodes enables a passive matrix memory architecture, while the conductive polyethylenedioxythiophene:polystyrene sulfonic acid polymer serves as a reliable switch with fuse-like behavior for data storage. The polymer can be switched at ˜2 μs, resulting in a permanent decrease of conductivity of the memory pixel by up to a factor of 103. The switching mechanism is primarily due to a current and thermally dependent redox reaction in the polymer, limited by the double injection of both holes and electrons. The switched device performance does not degrade after many thousand read cycles in ambient at room temperature. Our results suggest that low cost, organic/inorganic WORM memories are feasible for light weight, high density, robust, and fast archival storage applications.

Direct Laser Writing-Based Programmable Transfer Printing via Bioinspired Shape Memory Reversible Adhesive.

PubMed

Huang, Yin; Zheng, Ning; Cheng, Zhiqiang; Chen, Ying; Lu, Bingwei; Xie, Tao; Feng, Xue

2016-12-28

Flexible and stretchable electronics offer a wide range of unprecedented opportunities beyond conventional rigid electronics. Despite their vast promise, a significant bottleneck lies in the availability of a transfer printing technique to manufacture such devices in a highly controllable and scalable manner. Current technologies usually rely on manual stick-and-place and do not offer feasible mechanisms for precise and quantitative process control, especially when scalability is taken into account. Here, we demonstrate a spatioselective and programmable transfer strategy to print electronic microelements onto a soft substrate. The method takes advantage of automated direct laser writing to trigger localized heating of a micropatterned shape memory polymer adhesive stamp, allowing highly controlled and spatioselective switching of the interfacial adhesion. This, coupled to the proper tuning of the stamp properties, enables printing with perfect yield. The wide range adhesion switchability further allows printing of hybrid electronic elements, which is otherwise challenging given the complex interfacial manipulation involved. Our temperature-controlled transfer printing technique shows its critical importance and obvious advantages in the potential scale-up of device manufacturing. Our strategy opens a route to manufacturing flexible electronics with exceptional versatility and potential scalability.

Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Organic electronic devices via interface engineering

NASA Astrophysics Data System (ADS)

Xu, Qianfei

This dissertation focuses on interface engineering and its influence on organic electronic devices. A comprehensive review of interface studies in organic electronic devices is presented in Chapter 1. By interface engineering at the cathode contact, an ultra-high efficiency green polymer light emitting diode is demonstrated in Chapter 2. The interface modification turns out to be solution processable by using calcium acetylacetonate, donated by Ca(acac)2. The device structure is Induim Tin Oxide (ITO)/3,4-polyethylenedioxythiophene-polystyrene-sulfonate (PEDOT)/Green polyfluorene/Ca(acac) 2/Al. Based on this structure, we obtained device efficiencies as high as 28 cd/A at 2650 cd/m2, which is about a 3 times improvement over previous devices. The mechanism of this nano-layer has been studied by I-L-V measurements, photovoltaic measurements, XPS/UPS studies, impedance measurements as well as transient EL studies. The interfacial layer plays a crucial role for the efficiency improvement. It is believed to work as a hole blocking layer as well as an electron injection layer. Meanwhile, a systematic study on ITO electrodes is also carried out in Chapter 4. By engineering the interface at ITO electrode, the device lifetime has been improved. In Chapter 5, very bright white emission PLEDs are fabricated based on blue polyfluorene (PF) doped with 1 wt% 6, 8, 15, 17-tetraphyenyl-1.18, 4.5, 9.10, 13.14-tetrabenzoheptacene (TBH). The maximum luminance exceeds 20,000 cd/m2. The maximum luminance efficiency is 3.55 cd/A at 4228 cd/m2 while the maximum power efficiency is 1.6 lm/W at 310 cd/m2. The white color is achieved by an incomplete energy transfer from blue PF to TBH. The devices show super stable CIE coordinates as a function of current density. The interface engineering is also applied to memory devices. In Chapter 6, a novel nonvolatile memory device is fabricated by inserting a buffer layer at the anode contact. Devices with the structure of Cu/Buffer-layer/organic layer/Cu show very attractive electrical bi-stability. The switching mechanism is believed to origin from by the different copper ion concentrations in the organic layer. This opens up a promising way to achieve high-performance organic electronic devices.

Photo-activation of Single Molecule Magnet Behavior in a Manganese-based Complex

NASA Astrophysics Data System (ADS)

Fetoh, Ahmed; Cosquer, Goulven; Morimoto, Masakazu; Irie, Masahiro; El-Gammal, Ola; El-Reash, Gaber Abu; Breedlove, Brian K.; Yamashita, Masahiro

2016-03-01

A major roadblock to fully realizing molecular electronic devices is the ability to control the properties of each molecule in the device. Herein we report the control of the magnetic properties of single-molecule magnets (SMMs), which can be used in memory devices, by using a photo-isomerizable diarthylenthene ligand. Photo-isomerization of the diarylethene ligand bridging two manganese salen complexes with visible light caused a significant change in the SMM behavior due to opening of the six-membered ring of diarylethene ligand, accompanied by reorganization of the entire molecule. The ring-opening activated the frequency-dependent magnetization of the complex. Our results are a major step towards the realization of molecular memory devices composed of SMMs because the SMM behaviour can be turned on and off simply by irradiating the molecule.

SnO2-based memristors and the potential synergies of integrating memristors with MEMS

NASA Astrophysics Data System (ADS)

Zubia, David; Almeida, Sergio; Talukdar, Arka; Mireles, Jose; MacDonald, Eric

2012-06-01

Memristors, usually in the form metal/metal-oxide/metal, have attracted much attention due to their potential application for non-volatile memory. Their simple structure and ease of fabrication make them good candidates for dense memory with projections of 22 terabytes per wafer. Excellent switching times of ~10 ns, memory endurance of >109 cycles, and extrapolated retention times of >10 yrs have been reported. Interestingly, memristors use the migration of ions to change their resistance in response to charge flow, and can therefore measure and remember the amount of current that has flowed. This is similar to many MEMS devices in which the motion of mass is an operating principle of the device. Memristors are also similar to MEMS in the sense that they can both be resistant to radiation effects. Memristors are radiation tolerant since information is stored as a structural change and not as electronic charge. Functionally, a MEMS device's sensitivity to radiation is concomitant to the role that the dielectric layers play in the function of the device. This is due to radiation-induced trapped charge in the dielectrics which can alter device performance and in extreme cases cause failure. Although different material systems have been investigated for memristors, SnO2 has received little attention even though it demonstrates excellent electronic properties and a high resistance to displacement damage from radiation due to a large Frenkel defect energy (7 eV) compared its bandgap (3.6 eV). This talk discusses recent research on SnO2-based memristors and the potential synergies of integrating memristors with MEMS.

Ferroelectric FET for nonvolatile memory application with two-dimensional MoSe2 channels

NASA Astrophysics Data System (ADS)

Wang, Xudong; Liu, Chunsen; Chen, Yan; Wu, Guangjian; Yan, Xiao; Huang, Hai; Wang, Peng; Tian, Bobo; Hong, Zhenchen; Wang, Yutao; Sun, Shuo; Shen, Hong; Lin, Tie; Hu, Weida; Tang, Minghua; Zhou, Peng; Wang, Jianlu; Sun, Jinglan; Meng, Xiangjian; Chu, Junhao; Li, Zheng

2017-06-01

Graphene and other two-dimensional materials have received considerable attention regarding their potential applications in nano-electronics. Here, we report top-gate nonvolatile memory field-effect transistors (FETs) with different layers of MoSe2 nanosheets channel gated by ferroelectric film. The conventional gate dielectric of FETs was replaced by a ferroelectric thin film that provides a ferroelectric polarization electric field, and therefore defined as an Fe-FET where the poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) was used as the gate dielectric. Among the devices with MoSe2 channels of different thicknesses, the device with a single layer of MoSe2 exhibited a large hysteresis of electronic transport with an over 105 write/erase ratio, and displayed excellent retention and endurance performance. The possible mechanism of the device’s good properties was qualitatively analyzed using band theory. Additionally, a comprehensive study comparing the memory properties of MoSe2 channels of different thicknesses is presented. Increasing the numbers of MoSe2 layers was found to cause a reduced memory window. However, MoSe2 thickness of 5 nm yielded a write/erase ratio of more than 103. The results indicate that, based on a Fe-FET structure, the combination of two-dimensional semiconductors and organic ferroelectric gate dielectrics shows good promise for future applications in nonvolatile ferroelectric memory.

Optical recording materials

NASA Astrophysics Data System (ADS)

Savant, Gajendra D.; Jannson, Joanna L.

1991-07-01

The increased emphasis on speed of operation, wavelength selectivity, compactness, and ruggedization has focused a great deal of attention on the solutions offered by all-optic devices and by hybrid electro-optic systems. In fact, many photonic devices are being considered for use as partial replacements for electronic systems. Optical components, which include modulators, switches, 3-D memory storage devices, wavelength division multiplexers, holographic optical elements, and others, are examples of such devices. The success or failure of these modern optical devices depends, to a great extent, on the performance and survivability of the optical materials used. This is particularly true for volume holographic filters, organic memory media, second- and third-order nonlinear material-based processors and neural networks. Due to the critical importance of these materials and their lack of availability, Physical Optics Corporation (POC) undertook a global advanced optical materials program which has enabled it to introduce several optical devices, based on the new and improved materials which will be described in this article.

77 FR 35718 - Certain Universal Serial Bus (“USB”) Portable Storage Devices, Including USB Flash Drives and...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-14

... on the Commission's electronic docket (EDIS) at http://edis.usitc.gov . Hearing-impaired persons are... Sunnyvale, California; Kingston Technology Company, Inc. of Fountain Valley, California; Patriot Memory, LLC...

Fast neutron irradiation tests of flash memories used in space environment at the ISIS spallation neutron source

NASA Astrophysics Data System (ADS)

Andreani, C.; Senesi, R.; Paccagnella, A.; Bagatin, M.; Gerardin, S.; Cazzaniga, C.; Frost, C. D.; Picozza, P.; Gorini, G.; Mancini, R.; Sarno, M.

2018-02-01

This paper presents a neutron accelerated study of soft errors in advanced electronic devices used in space missions, i.e. Flash memories performed at the ChipIr and VESUVIO beam lines at the ISIS spallation neutron source. The two neutron beam lines are set up to mimic the space environment spectra and allow neutron irradiation tests on Flash memories in the neutron energy range above 10 MeV and up to 800 MeV. The ISIS neutron energy spectrum is similar to the one occurring in the atmospheric as well as in space and planetary environments, with intensity enhancements varying in the range 108- 10 9 and 106- 10 7 respectively. Such conditions are suitable for the characterization of the atmospheric, space and planetary neutron radiation environments, and are directly applicable for accelerated tests of electronic components as demonstrated here in benchmark measurements performed on flash memories.

Protecting solid-state spins from a strongly coupled environment

NASA Astrophysics Data System (ADS)

Chen, Mo; Calvin Sun, Won Kyu; Saha, Kasturi; Jaskula, Jean-Christophe; Cappellaro, Paola

2018-06-01

Quantum memories are critical for solid-state quantum computing devices and a good quantum memory requires both long storage time and fast read/write operations. A promising system is the nitrogen-vacancy (NV) center in diamond, where the NV electronic spin serves as the computing qubit and a nearby nuclear spin as the memory qubit. Previous works used remote, weakly coupled 13C nuclear spins, trading read/write speed for long storage time. Here we focus instead on the intrinsic strongly coupled 14N nuclear spin. We first quantitatively understand its decoherence mechanism, identifying as its source the electronic spin that acts as a quantum fluctuator. We then propose a scheme to protect the quantum memory from the fluctuating noise by applying dynamical decoupling on the environment itself. We demonstrate a factor of 3 enhancement of the storage time in a proof-of-principle experiment, showing the potential for a quantum memory that combines fast operation with long coherence time.

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

PubMed

Yoon, Changjoon; Jeon, Youngin; Yun, Junggwon; Kim, Sangsig

2012-01-01

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Electron holography on HfO2/HfO2-x bilayer structures with multilevel resistive switching properties

NASA Astrophysics Data System (ADS)

Niu, G.; Schubert, M. A.; Sharath, S. U.; Zaumseil, P.; Vogel, S.; Wenger, C.; Hildebrandt, E.; Bhupathi, S.; Perez, E.; Alff, L.; Lehmann, M.; Schroeder, T.; Niermann, T.

2017-05-01

Unveiling the physical nature of the oxygen-deficient conductive filaments (CFs) that are responsible for the resistive switching of the HfO2-based resistive random access memory (RRAM) devices represents a challenging task due to the oxygen vacancy related defect nature and nanometer size of the CFs. As a first important step to this goal, we demonstrate in this work direct visualization and a study of physico-chemical properties of oxygen-deficient amorphous HfO2-x by carrying out transmission electron microscopy electron holography as well as energy dispersive x-ray spectroscopy on HfO2/HfO2-x bilayer heterostructures, which are realized by reactive molecular beam epitaxy. Furthermore, compared to single layer devices, Pt/HfO2/HfO2-x /TiN bilayer devices show enhanced resistive switching characteristics with multilevel behavior, indicating their potential as electronic synapses in future neuromorphic computing applications.

Near-Field Thermal Radiation for Solar Thermophotovoltaics and High Temperature Thermal Logic and Memory Applications

NASA Astrophysics Data System (ADS)

Elzouka, Mahmoud

This dissertation investigates Near-Field Thermal Radiation (NFTR) applied to MEMS-based concentrated solar thermophotovoltaics (STPV) energy conversion and thermal memory and logics. NFTR is the exchange of thermal radiation energy at nano/microscale; when separation between the hot and cold objects is less than dominant radiation wavelength (˜1 mum). NFTR is particularly of interest to the above applications due to its high rate of energy transfer, exceeding the blackbody limit by orders of magnitude, and its strong dependence on separation gap size, surface nano/microstructure and material properties. Concentrated STPV system converts solar radiation to electricity using heat as an intermediary through a thermally coupled absorber/emitter, which causes STPV to have one of the highest solar-to-electricity conversion efficiency limits (85.4%). Modeling of a near-field concentrated STPV microsystem is carried out to investigate the use of STPV based solid-state energy conversion as high power density MEMS power generator. Numerical results for In 0.18Ga0.82Sb PV cell illuminated with tungsten emitter showed significant enhancement in energy transfer, resulting in output power densities as high as 60 W/cm2; 30 times higher than the equivalent far-field power density. On thermal computing, this dissertation demonstrates near-field heat transfer enabled high temperature NanoThermoMechanical memory and logics. Unlike electronics, NanoThermoMechanical memory and logic devices use heat instead of electricity to record and process data; hence they can operate in harsh environments where electronics typically fail. NanoThermoMechanical devices achieve memory and thermal rectification functions through the coupling of near-field thermal radiation and thermal expansion in microstructures, resulting in nonlinear heat transfer between two temperature terminals. Numerical modeling of a conceptual NanoThermoMechanical is carried out; results include the dynamic response under write/read cycles for a practical silicon-based device. NanoThermoMechanical rectification is achieved experimentally--for the first time--with measurements at a high temperature of 600 K, demonstrating the feasibility of NanoThermoMechanical to operate in harsh environments. The proof-of-concept device has shown a maximum rectification of 10.9%. This dissertation proposes using meshed photonic crystal structures to enhance NFTR between surfaces. Numerical results show thermal rectification as high as 2500%. Incorporating these structures in thermal memory and rectification devices will significantly enhance their functionality and performance.

Electrical Conductance Tuning and Bistable Switching in Poly(N-vinylcarbazole)-Carbon Nanotube Composite Films.

PubMed

Liu, Gang; Ling, Qi-Dan; Teo, Eric Yeow Hwee; Zhu, Chun-Xiang; Chan, D Siu-Hung; Neoh, Koon-Gee; Kang, En-Tang

2009-07-28

By varying the carbon nanotube (CNT) content in poly(N-vinylcarbazole) (PVK) composite thin films, the electrical conductance behavior of an indium-tin oxide/PVK-CNT/aluminum (ITO/PVK-CNT/Al) sandwich structure can be tuned in a controlled manner. Distinctly different electrical conductance behaviors, such as (i) insulator behavior, (ii) bistable electrical conductance switching effects (write-once read-many-times (WORM) memory effect and rewritable memory effect), and (iii) conductor behavior, are discernible from the current density-voltage characteristics of the composite films. The turn-on voltage of the two bistable conductance switching devices decreases and the ON/OFF state current ratio of the WORM device increases with the increase in CNT content of the composite film. Both the WORM and rewritable devices are stable under a constant voltage stress or a continuous pulse voltage stress, with an ON/OFF state current ratio in excess of 10(3). The conductance switching effects of the composite films have been attributed to electron trapping in the CNTs of the electron-donating/hole-transporting PVK matrix.

Development of shape memory metal as the actuator of a fail safe mechanism

NASA Technical Reports Server (NTRS)

Ford, V. G.; Johnson, M. R.; Orlosky, S. D.

1990-01-01

A small, compact, lightweight device was developed using shape memory alloy (SMA) in wire form to actuate a pin-puller that decouples the flanges of two shafts. When the SMA is heated it contracts producing a useful force and stroke. As it cools, it can be reset (elongated in this case) by applying a relatively small force. Resistive heating is accomplished by running a current through the SMA wire for a controlled length of time. The electronics to drive the device are not elaborate or complicated, consisting of a timed current source. The total available contraction is 3 percent of the length of the wire. This device, the engineering properties of the SMA, and the tests performed to verify the design concept are described.

New trends in the optical and electronic applications of polymers containing transition-metal complexes.

PubMed

Liu, Shu-Juan; Chen, Yang; Xu, Wen-Juan; Zhao, Qiang; Huang, Wei

2012-04-13

Polymers containing transition-metal complexes exhibit excellent optical and electronic properties, which are different from those of polymers with a pure organic skeleton and combine the advantages of both polymers and metal complexes. Hence, research about this class of polymers has attracted more and more interest in recent years. Up to now, a number of novel polymers containing transition-metal complexes have been exploited, and significant advances in their optical and electronic applications have been achieved. In this article, we summarize some new research trends in the applications of this important class of optoelectronic polymers, such as chemo/biosensors, electronic memory devices and photovoltaic devices. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Carbon nanotube chemistry and assembly for electronic devices

NASA Astrophysics Data System (ADS)

Derycke, Vincent; Auvray, Stéphane; Borghetti, Julien; Chung, Chia-Ling; Lefèvre, Roland; Lopez-Bezanilla, Alejandro; Nguyen, Khoa; Robert, Gaël; Schmidt, Gregory; Anghel, Costin; Chimot, Nicolas; Lyonnais, Sébastien; Streiff, Stéphane; Campidelli, Stéphane; Chenevier, Pascale; Filoramo, Arianna; Goffman, Marcelo F.; Goux-Capes, Laurence; Latil, Sylvain; Blase, Xavier; Triozon, François; Roche, Stephan; Bourgoin, Jean-Philippe

2009-05-01

Carbon nanotubes (CNTs) have exceptional physical properties that make them one of the most promising building blocks for future nanotechnologies. They may in particular play an important role in the development of innovative electronic devices in the fields of flexible electronics, ultra-high sensitivity sensors, high frequency electronics, opto-electronics, energy sources and nano-electromechanical systems (NEMS). Proofs of concept of several high performance devices already exist, usually at the single device level, but there remain many serious scientific issues to be solved before the viability of such routes can be evaluated. In particular, the main concern regards the controlled synthesis and positioning of nanotubes. In our opinion, truly innovative use of these nano-objects will come from: (i) the combination of some of their complementary physical properties, such as combining their electrical and mechanical properties; (ii) the combination of their properties with additional benefits coming from other molecules grafted on the nanotubes (this route being particularly relevant for gas- and bio-sensors, opto-electronic devices and energy sources); and (iii) the use of chemically- or bio-directed self-assembly processes to allow the efficient combination of several devices into functional arrays or circuits. In this article, we review our recent results concerning nanotube chemistry and assembly and their use to develop electronic devices. In particular, we present carbon nanotube field effect transistors and their chemical optimization, high frequency nanotube transistors, nanotube-based opto-electronic devices with memory capabilities and nanotube-based nano-electromechanical systems (NEMS). The impact of chemical functionalization on the electronic properties of CNTs is analyzed on the basis of theoretical calculations. To cite this article: V. Derycke et al., C. R. Physique 10 (2009).

Extended papers selected from ESSDERC 2015

NASA Astrophysics Data System (ADS)

Grasser, Tibor; Schmitz, Jurriaan; Lemme, Max C.

2016-11-01

This special issue of Solid State Electronics includes 28 papers which have been carefully selected from the best presentations given at the 45th European Solid-State Device Research Conference (ESSDERC 2015) held from September 14-18, 2015 in Graz, Austria. These papers cover a wide range of topics related to the research on solid-state devices. These topics are used also to organize the conference submissions and presentations into 7 tracks: CMOS Processes, Devices and Integration; Opto-, Power- and Microwave Devices; Modeling & Simulation; Characterization, Reliability & Yield; Advanced & Emerging Memories; MEMS, Sensors & Display Technologies; Emerging Non-CMOS Devices & Technologies.

NASA Electronic Parts and Packaging (NEPP) Program - Update

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2010-01-01

This slide presentation reviews the goals and mission of the NASA Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs. The program has been supporting NASA for over 20 years. The focus is on the reliability aspects of electronic devices. In this work the program also supports the electronics industry. There are several areas that the program is involved in: Memories, systems on a chip (SOCs), data conversion devices, power MOSFETS, power converters, scaled CMOS, capacitors, linear devices, fiber optics, and other electronics such as sensors, cryogenic and SiGe that are used in space systems. Each of these area are reviewed with the work that is being done in reliability and effects of radiation on these technologies.

Resistive switching mechanisms in random access memory devices incorporating transition metal oxides: TiO2, NiO and Pr0.7Ca0.3MnO3.

PubMed

Magyari-Köpe, Blanka; Tendulkar, Mihir; Park, Seong-Geon; Lee, Hyung Dong; Nishi, Yoshio

2011-06-24

Resistance change random access memory (RRAM) cells, typically built as MIM capacitor structures, consist of insulating layers I sandwiched between metal layers M, where the insulator performs the resistance switching operation. These devices can be electrically switched between two or more stable resistance states at a speed of nanoseconds, with long retention times, high switching endurance, low read voltage, and large switching windows. They are attractive candidates for next-generation non-volatile memory, particularly as a flash successor, as the material properties can be scaled to the nanometer regime. Several resistance switching models have been suggested so far for transition metal oxide based devices, such as charge trapping, conductive filament formation, Schottky barrier modulation, and electrochemical migration of point defects. The underlying fundamental principles of the switching mechanism still lack a detailed understanding, i.e. how to control and modulate the electrical characteristics of devices incorporating defects and impurities, such as oxygen vacancies, metal interstitials, hydrogen, and other metallic atoms acting as dopants. In this paper, state of the art ab initio theoretical methods are employed to understand the effects that filamentary types of stable oxygen vacancy configurations in TiO(2) and NiO have on the electronic conduction. It is shown that strong electronic interactions between metal ions adjacent to oxygen vacancy sites results in the formation of a conductive path and thus can explain the 'ON' site conduction in these materials. Implication of hydrogen doping on electroforming is discussed for Pr(0.7)Ca(0.3)MnO(3) devices based on electrical characterization and FTIR measurements.

Temperature-driven topological quantum phase transitions in a phase-change material Ge2Sb2Te5.

PubMed

Eremeev, S V; Rusinov, I P; Echenique, P M; Chulkov, E V

2016-12-13

The Ge 2 Sb 2 Te 5 is a phase-change material widely used in optical memory devices and is a leading candidate for next generation non-volatile random access memory devices which are key elements of various electronics and portable systems. Despite the compound is under intense investigation its electronic structure is currently not fully understood. The present work sheds new light on the electronic structure of the Ge 2 Sb 2 Te 5 crystalline phases. We demonstrate by predicting from first-principles calculations that stable crystal structures of Ge 2 Sb 2 Te 5 possess different topological quantum phases: a topological insulator phase is realized in low-temperature structure and Weyl semimetal phase is a characteristic of the high-temperature structure. Since the structural phase transitions are caused by the temperature the switching between different topologically non-trivial phases can be driven by variation of the temperature. The obtained results reveal the rich physics of the Ge 2 Sb 2 Te 5 compound and open previously unexplored possibility for spintronics applications of this material, substantially expanding its application potential.

Toward all-carbon electronics: fabrication of graphene-based flexible electronic circuits and memory cards using maskless laser direct writing.

PubMed

Liang, Jiajie; Chen, Yongsheng; Xu, Yanfei; Liu, Zhibo; Zhang, Long; Zhao, Xin; Zhang, Xiaoliang; Tian, Jianguo; Huang, Yi; Ma, Yanfeng; Li, Feifei

2010-11-01

Owing to its extraordinary electronic property, chemical stability, and unique two-dimensional nanostructure, graphene is being considered as an ideal material for the highly expected all-carbon-based micro/nanoscale electronics. Herein, we present a simple yet versatile approach to constructing all-carbon micro/nanoelectronics using solution-processing graphene films directly. From these graphene films, various graphene-based microcosmic patterns and structures have been fabricated using maskless computer-controlled laser cutting. Furthermore, a complete system involving a prototype of a flexible write-once-read-many-times memory card and a fast data-reading system has been demonstrated, with infinite data retention time and high reliability. These results indicate that graphene could be the ideal material for fabricating the highly demanded all-carbon and flexible devices and electronics using the simple and efficient roll-to-roll printing process when combined with maskless direct data writing.

Annual Conference on Nuclear and Space Radiation Effects, 15th, University of New Mexico, Albuquerque, N. Mex., July 18-21, 1978, Proceedings

NASA Technical Reports Server (NTRS)

Simons, M.

1978-01-01

Radiation effects in MOS devices and circuits are considered along with radiation effects in materials, space radiation effects and spacecraft charging, SGEMP, IEMP, EMP, fabrication of radiation-hardened devices, radiation effects in bipolar devices and circuits, simulation, energy deposition, and dosimetry. Attention is given to the rapid anneal of radiation-induced silicon-sapphire interface charge trapping, cosmic ray induced errors in MOS memory cells, a simple model for predicting radiation effects in MOS devices, the response of MNOS capacitors to ionizing radiation at 80 K, trapping effects in irradiated and avalanche-injected MOS capacitors, inelastic interactions of electrons with polystyrene, the photoelectron spectral yields generated by monochromatic soft X radiation, and electron transport in reactor materials.

SRAM As An Array Of Energetic-Ion Detectors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Lieneweg, Udo; Nixon, Robert H.

1993-01-01

Static random-access memory (SRAM) designed for use as array of energetic-ion detectors. Exploits well-known tendency of incident energetic ions to cause bit flips in cells of electronic memories. Design of ion-detector SRAM involves modifications of standard SRAM design to increase sensitivity to ions. Device fabricated by use of conventional complementary metal oxide/semiconductor (CMOS) processes. Potential uses include gas densimetry, position sensing, and measurement of cosmic-ray spectrum.

Radiation Hardened Electronics Destined For Severe Nuclear Reactor Environments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holbert, Keith E.; Clark, Lawrence T.

Post nuclear accident conditions represent a harsh environment for electronics. The full station blackout experience at Fukushima shows the necessity for emergency sensing capabilities in a radiation-enhanced environment. This NEET (Nuclear Energy Enabling Technologies) research project developed radiation hardened by design (RHBD) electronics using commercially available technology that employs commercial off-the-shelf (COTS) devices and present generation circuit fabrication techniques to improve the total ionizing dose (TID) hardness of electronics. Such technology not only has applicability to severe accident conditions but also to facilities throughout the nuclear fuel cycle in which radiation tolerance is required. For example, with TID tolerance tomore » megarads of dose, electronics could be deployed for long-term monitoring, inspection and decontamination missions. The present work has taken a two-pronged approach, specifically, development of both board and application-specific integrated circuit (ASIC) level RHBD techniques. The former path has focused on TID testing of representative microcontroller ICs with embedded flash (eFlash) memory, as well as standalone flash devices that utilize the same fabrication technologies. The standalone flash devices are less complicated, allowing better understanding of the TID response of the crucial circuits. Our TID experiments utilize biased components that are in-situ tested, and in full operation during irradiation. A potential pitfall in the qualification of memory circuits is the lack of rigorous testing of the possible memory states. For this reason, we employ test patterns that include all ones, all zeros, a checkerboard of zeros and ones, an inverse checkerboard, and random data. With experimental evidence of improved radiation response for unbiased versus biased conditions, a demonstration-level board using the COTS devices was constructed. Through a combination of redundancy and power gating, the demonstration board exhibits radiation resilience to over 200 krad. Furthermore, our ASIC microprocessor using RHBD techniques was shown to be fully functional after an exposure of 2.5 Mrad whereas the COTS microcontroller units failed catastrophically at <100 krad. The methods developed in this work can facilitate the long-term viability of radiation-hard robotic systems, thereby avoiding obsolescence issues. As a case in point, the nuclear industry with its low purchasing power does not drive the semiconductor industry strategic plans, and the rapid advancements in electronics technology can leave legacy systems stranded.« less

Electron-beam-induced-current and active secondary-electron voltage-contrast with aberration-corrected electron probes

DOE PAGES

Han, Myung-Geun; Garlow, Joseph A.; Marshall, Matthew S. J.; ...

2017-03-23

The ability to map out electrostatic potentials in materials is critical for the development and the design of nanoscale electronic and spintronic devices in modern industry. Electron holography has been an important tool for revealing electric and magnetic field distributions in microelectronics and magnetic-based memory devices, however, its utility is hindered by several practical constraints, such as charging artifacts and limitations in sensitivity and in field of view. In this article, we report electron-beam-induced-current (EBIC) and secondary-electron voltage-contrast (SE-VC) with an aberration-corrected electron probe in a transmission electron microscope (TEM), as complementary techniques to electron holography, to measure electric fieldsmore » and surface potentials, respectively. These two techniques were applied to ferroelectric thin films, multiferroic nanowires, and single crystals. Electrostatic potential maps obtained by off-axis electron holography were compared with EBIC and SE-VC to show that these techniques can be used as a complementary approach to validate quantitative results obtained from electron holography analysis.« less

The effect of doping Sb on the electronic structure and the device characteristics of Ovonic Threshold Switches based on Ge-Se.

PubMed

Shin, Sang-Yeol; Choi, J M; Seo, Juhee; Ahn, Hyung-Woo; Choi, Yong Gyu; Cheong, Byung-ki; Lee, Suyoun

2014-11-18

The Ovonic Threshold Switch (OTS) based on an amorphous chalcogenide material has attracted much interest as a promising candidate for a high-performance thin-film switching device enabling 3D-stacking of memory devices. In this work, we studied on the electronic structure of amorphous Sb-doped Ge(0.6)Se(0.4) (in atomic mole fraction) film and its characteristics as to OTS devices. From the optical absorption spectroscopy measurement, the band gap (Eg) was found to decrease with increasing Sb content. In addition, as Sb content increased, the activation energy (Ea) for electrical conduction was found to decrease down to about one third of Eg from a half. As to the device characteristics, we found that the threshold switching voltage (Vth) drastically decreased with the Sb content. These results, being accountable in terms of the changes in the bonding configuration of constituent atoms as well as in the electronic structure such as the energy gap and trap states, advance an effective method of compositional adjustment to modulate Vth of an OTS device for various applications.

Maximum Acceleration Recording Circuit

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1995-01-01

Coarsely digitized maximum levels recorded in blown fuses. Circuit feeds power to accelerometer and makes nonvolatile record of maximum level to which output of accelerometer rises during measurement interval. In comparison with inertia-type single-preset-trip-point mechanical maximum-acceleration-recording devices, circuit weighs less, occupies less space, and records accelerations within narrower bands of uncertainty. In comparison with prior electronic data-acquisition systems designed for same purpose, circuit simpler, less bulky, consumes less power, costs and analysis of data recorded in magnetic or electronic memory devices. Circuit used, for example, to record accelerations to which commodities subjected during transportation on trucks.

Multilevel Resistance Programming in Conductive Bridge Resistive Memory

NASA Astrophysics Data System (ADS)

Mahalanabis, Debayan

This work focuses on the existence of multiple resistance states in a type of emerging non-volatile resistive memory device known commonly as Programmable Metallization Cell (PMC) or Conductive Bridge Random Access Memory (CBRAM), which can be important for applications such as multi-bit memory as well as non-volatile logic and neuromorphic computing. First, experimental data from small signal, quasi-static and pulsed mode electrical characterization of such devices are presented which clearly demonstrate the inherent multi-level resistance programmability property in CBRAM devices. A physics based analytical CBRAM compact model is then presented which simulates the ion-transport dynamics and filamentary growth mechanism that causes resistance change in such devices. Simulation results from the model are fitted to experimental dynamic resistance switching characteristics. The model designed using Verilog-a language is computation-efficient and can be integrated with industry standard circuit simulation tools for design and analysis of hybrid circuits involving both CMOS and CBRAM devices. Three main circuit applications for CBRAM devices are explored in this work. Firstly, the susceptibility of CBRAM memory arrays to single event induced upsets is analyzed via compact model simulation and experimental heavy ion testing data that show possibility of both high resistance to low resistance and low resistance to high resistance transitions due to ion strikes. Next, a non-volatile sense amplifier based flip-flop architecture is proposed which can help make leakage power consumption negligible by allowing complete shutdown of power supply while retaining its output data in CBRAM devices. Reliability and energy consumption of the flip-flop circuit for different CBRAM low resistance levels and supply voltage values are analyzed and compared to CMOS designs. Possible extension of this architecture for threshold logic function computation using the CBRAM devices as re-configurable resistive weights is also discussed. Lastly, Spike timing dependent plasticity (STDP) based gradual resistance change behavior in CBRAM device fabricated in back-end-of-line on a CMOS die containing integrate and fire CMOS neuron circuits is demonstrated for the first time which indicates the feasibility of using CBRAM devices as electronic synapses in spiking neural network hardware implementations for non-Boolean neuromorphic computing.

Low-voltage all-inorganic perovskite quantum dot transistor memory

NASA Astrophysics Data System (ADS)

Chen, Zhiliang; Zhang, Yating; Zhang, Heng; Yu, Yu; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Che, Yongli; Jin, Lufan; Li, Yifan; Li, Qingyan; Dai, Haitao; Yang, Junbo; Yao, Jianquan

2018-05-01

An all-inorganic cesium lead halide quantum dot (QD) based Au nanoparticle (NP) floating-gate memory with a solution processed layer-by-layer method is demonstrated. Easy synthesis at room temperature and excellent stability make all-inorganic CsPbBr3 perovskite QDs suitable as a semiconductor layer in low voltage nonvolatile transistor memory. The bipolarity of QDs has both electrons and holes stored in the Au NP floating gate, resulting in bidirectional shifts of initial threshold voltage according to the applied programing and erasing pulses. Under low operation voltage (±5 V), the memory achieved a great memory window (˜2.4 V), long retention time (>105 s), and stable endurance properties after 200 cycles. So the proposed memory device based on CsPbBr3 perovskite QDs has a great potential in the flash memory market.

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

NASA Technical Reports Server (NTRS)

Thakoor, Sarita (Inventor)

1992-01-01

Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

NASA Technical Reports Server (NTRS)

Thakoor, Sarita (Inventor)

1994-01-01

Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Storing quantum information in spins and high-sensitivity ESR

NASA Astrophysics Data System (ADS)

Morton, John J. L.; Bertet, Patrice

2018-02-01

Quantum information, encoded within the states of quantum systems, represents a novel and rich form of information which has inspired new types of computers and communications systems. Many diverse electron spin systems have been studied with a view to storing quantum information, including molecular radicals, point defects and impurities in inorganic systems, and quantum dots in semiconductor devices. In these systems, spin coherence times can exceed seconds, single spins can be addressed through electrical and optical methods, and new spin systems with advantageous properties continue to be identified. Spin ensembles strongly coupled to microwave resonators can, in principle, be used to store the coherent states of single microwave photons, enabling so-called microwave quantum memories. We discuss key requirements in realising such memories, including considerations for superconducting resonators whose frequency can be tuned onto resonance with the spins. Finally, progress towards microwave quantum memories and other developments in the field of superconducting quantum devices are being used to push the limits of sensitivity of inductively-detected electron spin resonance. The state-of-the-art currently stands at around 65 spins per √{ Hz } , with prospects to scale down to even fewer spins.

Storing quantum information in spins and high-sensitivity ESR.

PubMed

Morton, John J L; Bertet, Patrice

2018-02-01

Quantum information, encoded within the states of quantum systems, represents a novel and rich form of information which has inspired new types of computers and communications systems. Many diverse electron spin systems have been studied with a view to storing quantum information, including molecular radicals, point defects and impurities in inorganic systems, and quantum dots in semiconductor devices. In these systems, spin coherence times can exceed seconds, single spins can be addressed through electrical and optical methods, and new spin systems with advantageous properties continue to be identified. Spin ensembles strongly coupled to microwave resonators can, in principle, be used to store the coherent states of single microwave photons, enabling so-called microwave quantum memories. We discuss key requirements in realising such memories, including considerations for superconducting resonators whose frequency can be tuned onto resonance with the spins. Finally, progress towards microwave quantum memories and other developments in the field of superconducting quantum devices are being used to push the limits of sensitivity of inductively-detected electron spin resonance. The state-of-the-art currently stands at around 65 spins per Hz, with prospects to scale down to even fewer spins. Copyright © 2017. Published by Elsevier Inc.

Evaluation of switchable organic devices for nonvolatile memory applications

NASA Astrophysics Data System (ADS)

Campbell Scott, J.

2007-03-01

Many organic electronic devices exhibit switching behavior and have therefore been proposed as the basis for a nonvolatile memory technology. In particular, bistable resistive elements, in which a high or low current state is selected by application of a specific voltage, may be used as the elements of a crosspoint memory array. This architecture places very stringent requirements on the electrical response of the individual devices, in terms of on-state current density, switching and retention times, cycling endurance, rectification and size-scaling. In this talk, I will describe the progress that we and others have made towards satisfying these requirements. In many cases, the mechanisms responsible for conduction and switching are not fully understood. In some devices, it has been shown that current flows in a few highly localized regions. These so-called ``filaments'' are not necessarily metallic bridges between the electrodes, but may be associated with chains of nanoparticles introduced into the organic matrix either deliberately or accidentally. Coulomb blockade effects can then explain the switching behavior observed in some devices. This work was done in collaboration with L. D. Bozano, M. Beinhoff, K. R. Carter, V. R. Deline, B. W. Kean, G. M. McClelland, D. C. Miller, P. M. Rice, J. R. Salem, and S. A. Swanson.

Xyce parallel electronic simulator users guide, version 6.1

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas; Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers; A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models; Device models that are specifically tailored to meet Sandia's needs, including some radiationaware devices (for Sandia users only); and Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase-a message passing parallel implementation-which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Xyce parallel electronic simulator users' guide, Version 6.0.1.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Xyce parallel electronic simulator users guide, version 6.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Feasibility and limitations of anti-fuses based on bistable non-volatile switches for power electronic applications

NASA Astrophysics Data System (ADS)

Erlbacher, T.; Huerner, A.; Bauer, A. J.; Frey, L.

2012-09-01

Anti-fuse devices based on non-volatile memory cells and suitable for power electronic applications are demonstrated for the first time using silicon technology. These devices may be applied as stand alone devices or integrated using standard junction-isolation into application-specific and smart-power integrated circuits. The on-resistance of such devices can be permanently switched by nine orders of magnitude by triggering the anti-fuse with a positive voltage pulse. Extrapolation of measurement data and 2D TCAD process and device simulations indicate that 20 A anti-fuses with 10 mΩ can be reliably fabricated in 0.35 μm technology with a footprint of 2.5 mm2. Moreover, this concept offers distinguished added-values compared to existing mechanical relays, e.g. pre-test, temporary and permanent reset functions, gradual turn-on mode, non-volatility, and extendibility to high voltage capability.

Mechanistic analysis of temperature-dependent current conduction through thin tunnel oxide in n+-polySi/SiO2/n+-Si structures

NASA Astrophysics Data System (ADS)

Samanta, Piyas

2017-09-01

We present a detailed investigation on temperature-dependent current conduction through thin tunnel oxides grown on degenerately doped n-type silicon (n+-Si) under positive bias ( VG ) on heavily doped n-type polycrystalline silicon (n+-polySi) gate in metal-oxide-semiconductor devices. The leakage current measured between 298 and 573 K and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole-Frenkel (PF) emission of trapped electrons from the neutral electron traps located in the silicon dioxide (SiO2) band gap in addition to Fowler-Nordheim (FN) tunneling of electrons from n+-Si acting as the drain node in FLOating gate Tunnel OXide Electrically Erasable Programmable Read-Only Memory devices. Process-induced neutral electron traps are located at 0.18 eV and 0.9 eV below the SiO2 conduction band. Throughout the temperature range studied here, PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm. A physics based new analytical formula has been developed for FN tunneling of electrons from the accumulation layer of degenerate semiconductors at a wide range of temperatures incorporating the image force barrier rounding effect. FN tunneling has been formulated in the framework of Wentzel-Kramers-Brilloiun taking into account the correction factor due to abrupt variation of the energy barrier at the cathode/oxide interface. The effect of interfacial and near-interfacial trapped-oxide charges on FN tunneling has also been investigated in detail at positive VG . The mechanism of leakage current conduction through SiO2 films plays a crucial role in simulation of time-dependent dielectric breakdown of the memory devices and to precisely predict the normal operating field or applied floating gate (FG) voltage for lifetime projection of the devices. In addition, we present theoretical results showing the effect of drain doping concentration on the FG leakage current.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu, H. X.; Zhang, T.; Wang, R. X.

A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfO{sub x} film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfO{sub x} matrix. Pt/Ni-NCs embedded HfO{sub x}/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 10{sup 12} electrons/cm{sup 2}, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 10{sup 4} cycles and excellent retention performance of 10{sup 5} s, fulfilling themore » requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.« less

Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

NASA Astrophysics Data System (ADS)

Zhu, H. X.; Zhang, T.; Wang, R. X.; Zhang, Y. Y.; Li, L. T.; Qiu, X. Y.

2016-05-01

A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfOx film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfOx matrix. Pt/Ni-NCs embedded HfOx/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 1012 electrons/cm2, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 104 cycles and excellent retention performance of 105 s, fulfilling the requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.

Proton upsets in LSI memories in space

NASA Technical Reports Server (NTRS)

Mcnulty, P. J.; Wyatt, R. C.; Filz, R. C.; Rothwell, P. L.; Farrell, G. E.

1980-01-01

Two types of large scale integrated dynamic random access memory devices were tested and found to be subject to soft errors when exposed to protons incident at energies between 18 and 130 MeV. These errors are shown to differ significantly from those induced in the same devices by alphas from an Am-241 source. There is considerable variation among devices in their sensitivity to proton-induced soft errors, even among devices of the same type. For protons incident at 130 MeV, the soft error cross sections measured in these experiments varied from 10 to the -8th to 10 to the -6th sq cm/proton. For individual devices, however, the soft error cross section consistently increased with beam energy from 18-130 MeV. Analysis indicates that the soft errors induced by energetic protons result from spallation interactions between the incident protons and the nuclei of the atoms comprising the device. Because energetic protons are the most numerous of both the galactic and solar cosmic rays and form the inner radiation belt, proton-induced soft errors have potentially serious implications for many electronic systems flown in space.

Synaptic organic transistors with a vacuum-deposited charge-trapping nanosheet

NASA Astrophysics Data System (ADS)

Kim, Chang-Hyun; Sung, Sujin; Yoon, Myung-Han

2016-09-01

Organic neuromorphic devices hold great promise for unconventional signal processing and efficient human-machine interfaces. Herein, we propose novel synaptic organic transistors devised to overcome the traditional trade-off between channel conductance and memory performance. A vacuum-processed, nanoscale metallic interlayer provides an ultra-flat surface for a high-mobility molecular film as well as a desirable degree of charge trapping, allowing for low-temperature fabrication of uniform device arrays on plastic. The device architecture is implemented by widely available electronic materials in combination with conventional deposition methods. Therefore, our results are expected to generate broader interests in incorporation of organic electronics into large-area neuromorphic systems, with potential in gate-addressable complex logic circuits and transparent multifunctional interfaces receiving direct optical and cellular stimulation.

Decontamination of blood soaked electronic devices using ultrasonic technology.

PubMed

Dudeck, Kimberly C; Brennan, Tamara C; Embury, Daniel J

2012-01-10

With advancements in technology allowing for the miniaturization of consumer electronics, criminal investigations of all types frequently involve the forensic examination of electronic devices, such as cellular telephones, smartphones, and portable flash memory; in some extreme, violent cases, these devices are found covered in blood. Due to the complexity of such devices, standard operating procedures for the complete removal of blood had not previously been established by the Royal Canadian Mounted Police prior to this study. The electronics industry has adopted the use of the ultrasonic cleaner for sanitizing printed circuit boards (PCBs) by removing residues and contaminants. High frequency sound waves created by the machine penetrate and remove dirt and residues; however, early research during the 1950s recorded these sound waves breaking the internal bonds of integrated circuit chips. Experimentation with modern ultrasonic technology was used to determine if internal components were damaged, as well as if ultrasonic cleaning was the most suitable method for the removal of dried and liquid blood from a PCB. Several disinfectant solutions were compared against the 0.5% Triton(®) X-100 detergent solution in the ultrasonic cleaner, including: 10% sodium hypochlorite bleach, 85% isopropyl alcohol, and Conflikt(®) disinfectant spray. The results not only demonstrated that the ultrasonic cleaner did not damage the vital memory chip on the PCB, but also, with the assistance of Conflikt(®), was able to remove all traces of blood as indicated by Hemastix(®) reagent strips. Of five methods experimented with, two cycles of ultrasonic cleaning followed by sanitization with Conflikt(®) proved to be the only procedure capable of removing all traces of blood, as confirmed with both Hemastix(®) reagent strips and the hemochromogen test. Crown Copyright © 2011. Published by Elsevier Ireland Ltd. All rights reserved.

Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

2016-09-01

Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

Oxide-based materials by atomic layer deposition

NASA Astrophysics Data System (ADS)

Godlewski, Marek; Pietruszka, Rafał; Kaszewski, Jarosław; Witkowski, Bartłomiej S.; Gierałtowska, Sylwia; Wachnicki, Łukasz; Godlewski, Michał M.; Slonska, Anna; Gajewski, Zdzisław

2017-02-01

Thin films of wide band-gap oxides grown by Atomic Layer Deposition (ALD) are suitable for a range of applications. Some of these applications will be presented. First of all, ALD-grown high-k HfO2 is used as a gate oxide in the electronic devices. Moreover, ALD-grown oxides can be used in memory devices, in transparent transistors, or as elements of solar cells. Regarding photovoltaics (PV), ALD-grown thin films of Al2O3 are already used as anti-reflection layers. In addition, thin films of ZnO are tested as replacement of ITO in PV devices. New applications in organic photovoltaics, electronics and optoelectronics are also demonstrated Considering new applications, the same layers, as used in electronics, can also find applications in biology, medicine and in a food industry. This is because layers of high-k oxides show antibacterial activity, as discussed in this work.

Probing electron density across Ar{sup +} irradiation-induced self-organized TiO{sub 2−x} nanochannels for memory application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Barman, A.; Saini, C. P.; Ghosh, S. K.

2016-06-13

The variation of electron density in TiO{sub 2−x} nanochannels, exhibiting resistive switching phenomenon, produced by Ar{sup +} ion-irradiation at the threshold fluence of 5 × 10{sup 16} ions/cm{sup 2} is demonstrated by X-ray reflectivity (XRR). The transmission electron microscopy reveals the formation of nanochannels, while the energy dispersive X-ray spectroscopy confirms Ti enrichment near the surface due to ion-irradiation, in consistent with the increase in electron density by XRR measurements. Such a variation in Ti concentration indicates the evolution of oxygen vacancies (OVs) along the TiO{sub 2−x} nanochannels, and thus paves the way to explain the operation and performance of the Pt/TiO{sub 2−x}/Pt-basedmore » memory devices via OV migration.« less

Self-assembled oxide films with tailored nanoscale ionic and electronic channels for controlled resistive switching

NASA Astrophysics Data System (ADS)

Cho, Seungho; Yun, Chao; Tappertzhofen, Stefan; Kursumovic, Ahmed; Lee, Shinbuhm; Lu, Ping; Jia, Quanxi; Fan, Meng; Jian, Jie; Wang, Haiyan; Hofmann, Stephan; MacManus-Driscoll, Judith L.

2016-08-01

Resistive switches are non-volatile memory cells based on nano-ionic redox processes that offer energy efficient device architectures and open pathways to neuromorphics and cognitive computing. However, channel formation typically requires an irreversible, not well controlled electroforming process, giving difficulty to independently control ionic and electronic properties. The device performance is also limited by the incomplete understanding of the underlying mechanisms. Here, we report a novel memristive model material system based on self-assembled Sm-doped CeO2 and SrTiO3 films that allow the separate tailoring of nanoscale ionic and electronic channels at high density (~1012 inch-2). We systematically show that these devices allow precise engineering of the resistance states, thus enabling large on-off ratios and high reproducibility. The tunable structure presents an ideal platform to explore ionic and electronic mechanisms and we expect a wide potential impact also on other nascent technologies, ranging from ionic gating to micro-solid oxide fuel cells and neuromorphics.

Operando x-ray photoelectron emission microscopy for studying forward and reverse biased silicon p-n junctions.

PubMed

Barrett, N; Gottlob, D M; Mathieu, C; Lubin, C; Passicousset, J; Renault, O; Martinez, E

2016-05-01

Significant progress in the understanding of surfaces and interfaces of materials for new technologies requires operando studies, i.e., measurement of chemical, electronic, and magnetic properties under external stimulus (such as mechanical strain, optical illumination, or electric fields) applied in situ in order to approach real operating conditions. Electron microscopy attracts much interest, thanks to its ability to determine semiconductor doping at various scales in devices. Spectroscopic photoelectron emission microscopy (PEEM) is particularly powerful since it combines high spatial and energy resolution, allowing a comprehensive analysis of local work function, chemistry, and electronic structure using secondary, core level, and valence band electrons, respectively. Here we present the first operando spectroscopic PEEM study of a planar Si p-n junction under forward and reverse bias. The method can be used to characterize a vast range of materials at near device scales such as resistive oxides, conducting bridge memories and domain wall arrays in ferroelectrics photovoltaic devices.

Multifunctional Energy Storage and Conversion Devices.

PubMed

Huang, Yan; Zhu, Minshen; Huang, Yang; Pei, Zengxia; Li, Hongfei; Wang, Zifeng; Xue, Qi; Zhi, Chunyi

2016-10-01

Multifunctional energy storage and conversion devices that incorporate novel features and functions in intelligent and interactive modes, represent a radical advance in consumer products, such as wearable electronics, healthcare devices, artificial intelligence, electric vehicles, smart household, and space satellites, etc. Here, smart energy devices are defined to be energy devices that are responsive to changes in configurational integrity, voltage, mechanical deformation, light, and temperature, called self-healability, electrochromism, shape memory, photodetection, and thermal responsivity. Advisable materials, device designs, and performances are crucial for the development of energy electronics endowed with these smart functions. Integrating these smart functions in energy storage and conversion devices gives rise to great challenges from the viewpoint of both understanding the fundamental mechanisms and practical implementation. Current state-of-art examples of these smart multifunctional energy devices, pertinent to materials, fabrication strategies, and performances, are highlighted. In addition, current challenges and potential solutions from materials synthesis to device performances are discussed. Finally, some important directions in this fast developing field are considered to further expand their application. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Models for Total-Dose Radiation Effects in Non-Volatile Memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Campbell, Philip Montgomery; Wix, Steven D.

The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models andmore » compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.« less

Energy Dissipation and Transport in Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Pop, Eric

2011-03-01

Power consumption is a significant challenge in electronics, often limiting the performance of integrated circuits from mobile devices to massive data centers. Carbon nanotubes have emerged as potentially energy-efficient future devices and interconnects, with both large mobility and thermal conductivity. This talk will focus on understanding and controlling energy dissipation [1-3] and transport [4-6] in carbon nanotubes, with applications to low-energy devices, interconnects, heat sinks, and memory elements. Experiments have been used to gain new insight into the fundamental behavior of such devices, and to better inform practical device models. The results suggest much room for energy optimization in nanoelectronics through the design of geometry, interfaces, and materials..

Rapid synthesis and decoration of reduced graphene oxide with gold nanoparticles by thermostable peptides for memory device and photothermal applications.

PubMed

Otari, Sachin V; Kumar, Manoj; Anwar, Muhammad Zahid; Thorat, Nanasaheb D; Patel, Sanjay K S; Lee, Dongjin; Lee, Jai Hyo; Lee, Jung-Kul; Kang, Yun Chan; Zhang, Liaoyuan

2017-09-08

This article presents novel, rapid, and environmentally benign synthesis method for one-step reduction and decoration of graphene oxide with gold nanoparticles (NAuNPs) by using thermostable antimicrobial nisin peptides to form a gold-nanoparticles-reduced graphene oxide (NAu-rGO) nanocomposite. The formed composite material was characterized by UV/Vis spectroscopy, X-ray diffraction, Raman spectroscopy, X-ray photoelectron spectroscopy, field emission scanning electron microscopy, and high-resolution transmission electron microscopy (HR-TEM). HR-TEM analysis revealed the formation of spherical AuNPs of 5-30 nm in size on reduced graphene oxide (rGO) nanosheets. A non-volatile-memory device was prepared based on a solution-processed ZnO thin-film transistor fabricated by inserting the NAu-rGO nanocomposite in the gate dielectric stack as a charge trapping medium. The transfer characteristic of the ZnO thin-film transistor memory device showed large clockwise hysteresis behaviour because of charge carrier trapping in the NAu-rGO nanocomposite. Under positive and negative bias conditions, clear positive and negative threshold voltage shifts occurred, which were attributed to charge carrier trapping and de-trapping in the ZnO/NAu-rGO/SiO 2 structure. Also, the photothermal effect of the NAu-rGO nanocomposites on MCF7 breast cancer cells caused inhibition of ~80% cells after irradiation with infrared light (0.5 W cm -2 ) for 5 min.

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

2014-02-18

Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

Radiation-tolerant imaging device

DOEpatents

Colella, N.J.; Kimbrough, J.R.

1996-11-19

A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconductor logic or memory device from entering the collection volume of each pixel in the imaging device. The charge barrier is a physical barrier, a potential barrier, or a combination of both. The physical barrier is formed by an SiO{sub 2} insulator. The potential barrier is formed by increasing the concentration of majority carriers (holes) to combine with the electron`s generated by the ionizing radiation. A manufacturer of CCD imaging devices can produce radiation-tolerant devices by merely changing the wafer type fed into his process stream from a standard wafer to one possessing a barrier beneath its surface, thus introducing a very small added cost to his production cost. An effective barrier type is an SiO{sub 2} layer. 7 figs.

Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer.

PubMed

Lee, Young Tack; Kwon, Hyeokjae; Kim, Jin Sung; Kim, Hong-Hee; Lee, Yun Jae; Lim, Jung Ah; Song, Yong-Won; Yi, Yeonjin; Choi, Won-Kook; Hwang, Do Kyung; Im, Seongil

2015-10-27

Two-dimensional van der Waals (2D vdWs) materials are a class of new materials that can provide important resources for future electronics and materials sciences due to their unique physical properties. Among 2D vdWs materials, black phosphorus (BP) has exhibited significant potential for use in electronic and optoelectronic applications because of its allotropic properties, high mobility, and direct and narrow band gap. Here, we demonstrate a few-layered BP-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. Experiments showed that our BP-based ferroelectric transistors operate satisfactorily at room temperature in ambient air and exhibit a clear memory window. Unlike conventional ambipolar BP transistors, our ferroelectric transistors showed only p-type characteristics due to the carbon-fluorine (C-F) dipole effect of the P(VDF-TrFE) layer, as well as the highest linear mobility value of 1159 cm(2) V(-1) s(-1) with a 10(3) on/off current ratio. For more advanced memory applications beyond unit memory devices, we implemented two memory inverter circuits, a resistive-load inverter circuit and a complementary inverter circuit, combined with an n-type molybdenum disulfide (MoS2) nanosheet. Our memory inverter circuits displayed a clear memory window of 15 V and memory output voltage efficiency of 95%.

Bipolar resistive switching in graphene oxide based metal insulator metal structure for non-volatile memory applications

NASA Astrophysics Data System (ADS)

Singh, Rakesh; Kumar, Ravi; Kumar, Anil; Kashyap, Rajesh; Kumar, Mukesh; Kumar, Dinesh

2018-05-01

Graphene oxide based devices have attracted much attention recently because of their possible application in next generation electronic devices. In this study, bipolar resistive switching characteristics of graphene oxide based metal insulator metal structure were investigated for nonvolatile memories. The graphene oxide was prepared by the conventional Hummer's method and deposited on ITO coated glass by spin-coating technique. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament inside the graphene oxide. The conduction mechanism for low and high resistance states are dominated by two mechanism the ohmic conduction and space charge limited current (SCLC) mechanism, respectively. Atomic Force Microscopy, X-ray diffraction, Cyclic-Voltammetry were conducted to observe the morphology, structure and behavior of the material. The fabricated device with Al/GO/ITO structure exhibited reliable bipolar resistive switching with set & reset voltage of -2.3 V and 3V respectively.

Nanoelectronics from the bottom up.

PubMed

Lu, Wei; Lieber, Charles M

2007-11-01

Electronics obtained through the bottom-up approach of molecular-level control of material composition and structure may lead to devices and fabrication strategies not possible with top-down methods. This review presents a brief summary of bottom-up and hybrid bottom-up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif. First, we will discuss representative electromechanical and resistance-change memory devices based on carbon nanotube and core-shell nanowire structures, respectively. These device structures show robust switching, promising performance metrics and the potential for terabit-scale density. Second, we will review architectures being developed for circuit-level integration, hybrid crossbar/CMOS circuits and array-based systems, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers. Finally, bottom-up fabrication approaches, including the opportunity for assembly of three-dimensional, vertically integrated multifunctional circuits, will be critically discussed.

Layer-by-layer charging in non-volatile memory devices using embedded sub-2 nm platinum nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ramalingam, Balavinayagam; Zheng, Haisheng; Gangopadhyay, Shubhra, E-mail: gangopadhyays@missouri.edu

In this work, we demonstrate multi-level operation of a non-volatile memory metal oxide semiconductor capacitor by controlled layer-by-layer charging of platinum nanoparticle (PtNP) floating gate devices with defined gate voltage bias ranges. The device consists of two layers of ultra-fine, sub-2 nm PtNPs integrated between Al{sub 2}O{sub 3} tunneling and separation layers. PtNP size and interparticle distance were varied to control the particle self-capacitance and associated Coulomb charging energy. Likewise, the tunneling layer thicknesses were also varied to control electron tunneling to the first and second PtNP layers. The final device configuration with optimal charging behavior and multi-level programming was attainedmore » with a 3 nm Al{sub 2}O{sub 3} initial tunneling layer, initial PtNP layer with particle size 0.54 ± 0.12 nm and interparticle distance 4.65 ± 2.09 nm, 3 nm Al{sub 2}O{sub 3} layer to separate the PtNP layers, and second particle layer with 1.11 ± 0.28 nm PtNP size and interparticle distance 2.75 ± 1.05 nm. In this device, the memory window of the first PtNP layer saturated over a programming bias range of 7 V to 14 V, after which the second PtNP layer starts charging, exhibiting a multi-step memory window with layer-by-layer charging.« less

Enhanced organic memory devices (OMEM) with a photochromic perhydro DTE as a transduction layer (Conference Presentation)

NASA Astrophysics Data System (ADS)

Cordes, Sandra; Kranz, Darius; Maibach, Eduard; Kempf, Maxim; Meerholz, Klaus

2016-09-01

In modern electronic systems memory elements are of fundamental importance for data storage. Especially solution-processable nonvolatile organic memories, which are inexpensive and can be manufactured on flexible substrates, are a promising alternative to brittle inorganic devices. Organic photochromic switchable compounds, mostly dithienylethenes (DTEs), are thermally stable, fatigue resistant and can undergo an electrically- or/and photo-induced ring-opening and -closing reaction which results in a change of energy levels. Due to the energetic difference in the highest occupied molecular orbital (HOMO) between the open and closed isomer, the DTE layer can be exploited as a switchable hole injection barrier that controls the electrical current in the diode. We demonstrated that a light-emitting organic memory (LE-OMEM) device with a perfluoro DTE transduction layer can be switched electrically via high current densities pulses and optically by irradiated light, with impressive current ON/OFF Ratios (OOR) of 10Λ2, 10Λ4 respectively. Currently we aim to minimize the barrier of the ON state and maximize the barrier of the OFF state by designing DTE molecules with larger differences in the HOMO energies of the two isomers yielding improved OOR values. By synthesizing perhydro derivates of DTE we achieved molecules with high HOMO levels and large ΔHOMO energies providing OMEM devices with excellent physical properties (OOR 1.4 x higher than perfluoro DTE). Due to the high HOMO level of the perhydro DTE utilization of hole transport layers (HTLs) is not necessary and thus manufacturing of OMEM devices is simplified.

Multiple switching modes and multiple level states in memristive devices

NASA Astrophysics Data System (ADS)

Miao, Feng; Yang, J. Joshua; Borghetti, Julien; Strachan, John Paul; Zhang, M.-X.; Goldfarb, Ilan; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2011-03-01

As one of the most promising technologies for next generation non-volatile memory, metal oxide based memristive devices have demonstrated great advantages on scalability, operating speed and power consumption. Here we report the observation of multiple switching modes and multiple level states in different memristive systems. The multiple switching modes can be obtained by limiting the current during electroforming, and related transport behaviors, including ionic and electronic motions, are characterized. Such observation can be rationalized by a model of two effective switching layers adjacent to the bottom and top electrodes. Multiple level states, corresponding to different composition of the conducting channel, will also be discussed in the context of multiple-level storage for high density, non-volatile memory applications.

Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

NASA Astrophysics Data System (ADS)

Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

2015-09-01

Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

Effect of substrate and temperature on the electronic properties of monolayer molybdenum disulfide field-effect transistors

NASA Astrophysics Data System (ADS)

Yang, Qizhi; Fang, Jiajia; Zhang, Guangru; Wang, Quan

2018-03-01

The use of two-dimensional nanostructured molybdenum disulfide (MoS2) films in field-effect transistors (FETs) in place of graphene was investigated. Monolayer MoS2 films were fabricated by chemical vapor deposition. The output and transfer curves of supported and suspended MoS2 FETs were measured. The mobility of the suspended device reached 364.2 cm2 V-1 s-1 at 150 °C. The hysteresis of the supported device in transfer curves was much larger than that of the suspended device, and it increased at higher temperatures. These results indicate that the device mobility was limited by Coulomb scattering at ambient temperature, and surface/interface phonon scattering at 150 °C, and the injection of electrons, via quantum tunneling through the Schottky barrier at the contact, was enhanced at higher temperatures and led to the increase of the hysteresis. The suspended MoS2 films show potential for application as a channel material in electronic devices, and further understanding the causes of hysteresis in a material is important for its use in technologies, such as memory devices and sensing cells.

The effect of doping Sb on the electronic structure and the device characteristics of Ovonic Threshold Switches based on Ge-Se

PubMed Central

Shin, Sang-Yeol; Choi, J. M.; Seo, Juhee; Ahn, Hyung-Woo; Choi, Yong Gyu; Cheong, Byung-ki; Lee, Suyoun

2014-01-01

The Ovonic Threshold Switch (OTS) based on an amorphous chalcogenide material has attracted much interest as a promising candidate for a high-performance thin-film switching device enabling 3D-stacking of memory devices. In this work, we studied on the electronic structure of amorphous Sb-doped Ge0.6Se0.4 (in atomic mole fraction) film and its characteristics as to OTS devices. From the optical absorption spectroscopy measurement, the band gap (Eg) was found to decrease with increasing Sb content. In addition, as Sb content increased, the activation energy (Ea) for electrical conduction was found to decrease down to about one third of Eg from a half. As to the device characteristics, we found that the threshold switching voltage (Vth) drastically decreased with the Sb content. These results, being accountable in terms of the changes in the bonding configuration of constituent atoms as well as in the electronic structure such as the energy gap and trap states, advance an effective method of compositional adjustment to modulate Vth of an OTS device for various applications. PMID:25403772

Effects of device size and material on the bending performance of resistive-switching memory devices fabricated on flexible substrates

NASA Astrophysics Data System (ADS)

Lee, Won-Ho; Yoon, Sung-Min

2017-05-01

The resistive change memory (RCM) devices using amorphous In-Ga-Zn-O (IGZO) and microcrystalline Al-doped ZnO (AZO) thin films were fabricated on plastic substrates and characterized for flexible electronic applications. The device cell sizes were varied to 25 × 25, 50 × 50, 100 × 100, and 200 × 200 μm2 to examine the effects of cell size on the resistive-switching (RS) behaviors at a flat state and under bending conditions. First, it was found that the high-resistance state programmed currents markedly increased with the increase in the cell size. Second, while the AZO RCM devices did not exhibit RESET operations at a curvature radius smaller than 8.0 mm, the IGZO RCM devices showed sound RS behaviors even at a curvature radius of 4.5 mm. Third, for the IGZO RCM devices with the cell size bigger than 100 × 100 μm2, the RESET operation could not be performed at a curvature radius smaller than 6.5 mm. Thus, it was elucidated that the RS characteristics of the flexible RCM devices using oxide semiconductor thin films were closely related to the types of RS materials and the cell size of the device.

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

2014-11-04

Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

NASA Astrophysics Data System (ADS)

Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

2008-05-01

A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

NASA Astrophysics Data System (ADS)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

Synaptic organic transistors with a vacuum-deposited charge-trapping nanosheet

PubMed Central

Kim, Chang-Hyun; Sung, Sujin; Yoon, Myung-Han

2016-01-01

Organic neuromorphic devices hold great promise for unconventional signal processing and efficient human-machine interfaces. Herein, we propose novel synaptic organic transistors devised to overcome the traditional trade-off between channel conductance and memory performance. A vacuum-processed, nanoscale metallic interlayer provides an ultra-flat surface for a high-mobility molecular film as well as a desirable degree of charge trapping, allowing for low-temperature fabrication of uniform device arrays on plastic. The device architecture is implemented by widely available electronic materials in combination with conventional deposition methods. Therefore, our results are expected to generate broader interests in incorporation of organic electronics into large-area neuromorphic systems, with potential in gate-addressable complex logic circuits and transparent multifunctional interfaces receiving direct optical and cellular stimulation. PMID:27645425

Highly flexible and electroforming free resistive switching behavior of tungsten disulfide flakes fabricated through advanced printing technology

NASA Astrophysics Data System (ADS)

Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Doh, Yang Hoi; Choi, Kyung Hyun

2017-09-01

Tungsten disulfide (WS2) is a transition metal dichalcogenide that differs from other 2D materials such as graphene owing to its distinctive semiconducting nature and tunable band gap. In this study, we have reported the structural, electrical, physical, and mechanical properties of exfoliated WS2 flakes and used them as the functional layer of a rewritable bipolar memory device. We demonstrate this concept by sandwiching few-layered WS2 flakes between two silver (Ag) electrodes on a flexible and transparent PET substrate. The entire device fabrication was carried out through all-printing technology such as reverse offset printing for patterning bottom electrodes, electrohydrodynamic (EHD) atomization for depositing functional thin film and EHD patterning for depositing the top electrode respectively. The memory device was further encapsulated with an atomically thin layer of aluminum oxide (Al2O3), deposited through a spatial atmospheric atomic layer deposition system to protect it against a humid environment. Remarkable resistive switching results were obtained, such as nonvolatile bipolar behavior, a high switching ratio (∼103), a long retention time (∼105 s), high endurance (1500 voltage sweeps), a low operating voltage (∼2 V), low current compliance (50 μA), mechanical robustness (1500 cycles) and unique repeatability at ambient conditions. Ag/WS2/Ag-based memory devices offer a new possibility for integration in flexible electronic devices.

Efficacy of memory aids after traumatic brain injury: A single case series.

PubMed

Bos, Hannah R; Babbage, Duncan R; Leathem, Janet M

2017-01-01

Individuals living with traumatic brain injury commonly have difficulties with prospective memory-the ability to remember a planned action at the intended time. Traditionally a memory notebook has been recommended as a compensatory memory aid. Electronic devices have the advantage of providing a cue at the appropriate time to remind participants to refer to the memory aid and complete tasks. Research suggests these have potential benefit in neurorehabilitation. This study aimed to investigate the efficacy of a memory notebook and specifically a smartphone as a compensatory memory aid. A single case series design was used to assess seven participants. A no-intervention baseline was followed by training and intervention with either the smartphone alone, or a memory notebook and later the smartphone. Memory was assessed with weekly assigned memory tasks. Participants using a smartphone showed improvements in their ability to complete assigned memory tasks accurately and within the assigned time periods. Use of a smartphone provided additional benefits over and above those already seen for those who received a memory notebook first. Smartphones have the potential to be a useful and cost effective tool in neurorehabilitation practice.

Analysis of a Memory Device Failure

NASA Technical Reports Server (NTRS)

Nicolas, David P.; Devaney, John; Gores, Mark; Dicken, Howard

1998-01-01

The recent failure of a vintage memory device presented a unique challenge to failure analysts. Normally device layouts, fabrication parameters and other technical information were available to assist the analyst in the analysis. However, this device was out of production for many years and the manufacturer was no longer in business, so the information was not available. To further complicate this analysis, the package leads were all but removed making additional electrical testing difficult. Under these conditions, new and innovative methods were used to analyze the failure. The external visual exam, radiography, PIND, and leak testing were performed with nominal results. Since electrical testing was precluded by the short lead lengths, the device was delidded to expose the internal structures for microscopic examination. No failure mechanism was identified. The available electrical data suggested an ESD or low level EOS type mechanism which left no visible surface damage. Due to parallel electrical paths, electrical probing on the chip failed to locate the failure site. Two non-destructive Scanning Electron Microscopy techniques, CIVA (Charge Induced Voltage Alteration) and EBIC (Electron Beam Induced Current), and a liquid crystal decoration technique which detects localized heating were employed to aid in the analysis. CIVA and EBIC isolated two faults in the input circuitry, and the liquid crystal technique further localized two hot spots in regions on two input gates. Removal of the glassivation and metallization revealed multiple failure sites located in the gate oxide of two input transistors suggesting machine (testing) induced damage.

Rapid thermal responsive conductive hybrid cryogels with shape memory properties, photothermal properties and pressure dependent conductivity.

PubMed

Deng, Zexing; Guo, Yi; Ma, Peter X; Guo, Baolin

2018-09-15

Stimuli responsive cryogels with multi-functionality have potential application for electrical devices, actuators, sensors and biomedical devices. However, conventional thermal sensitive poly(N-isopropylacrylamide) cryogels show slow temperature response speed and lack of multi-functionality, which greatly limit their practical application. Herein we present conductive fast (2 min for both deswelling and reswelling behavior) thermally responsive poly(N-isopropylacrylamide) cryogels with rapid shape memory properties (3 s for shape recovery), near-infrared (NIR) light sensitivity and pressure dependent conductivity, and further demonstrated their applications as temperature sensitive on-off switch, NIR light sensitive on-off switch, water triggered shape memory on-off switch and pressure dependent device. These cryogels were first prepared in dimethyl sulfoxide below its melting temperature in ice bath and subsequently put into aniline or pyrrole solution to in situ deposition of conducting polyaniline or polypyrrole nanoparticles. The continuous macroporous sponge-like structure provides cryogels with rapid responsivity both in deswelling, reswelling kinetics and good elasticity. After incorporating electrically conductive polyaniline or polypyrrole nanoaggregates, the hybrid cryogels exhibit desirable conductivity, photothermal property, pressure dependent conductivity and good cytocompatibility. These multifunctional hybrid cryogels make them great potential as stimuli responsive electrical device, tissue engineering scaffolds, drug delivery vehicle and electronic skin. Copyright © 2018 Elsevier Inc. All rights reserved.

Electrical Maxwell Demon and Szilard Engine Utilizing Johnson Noise, Measurement, Logic and Control

PubMed Central

Kish, Laszlo Bela; Granqvist, Claes-Göran

2012-01-01

We introduce a purely electrical version of Maxwell's demon which does not involve mechanically moving parts such as trapdoors, etc. It consists of a capacitor, resistors, amplifiers, logic circuitry and electronically controlled switches and uses thermal noise in resistors (Johnson noise) to pump heat. The only types of energy of importance in this demon are electrical energy and heat. We also demonstrate an entirely electrical version of Szilard's engine, i.e., an information-controlled device that can produce work by employing thermal fluctuations. The only moving part is a piston that executes work, and the engine has purely electronic controls and it is free of the major weakness of the original Szilard engine in not requiring removal and repositioning the piston at the end of the cycle. For both devices, the energy dissipation in the memory and other binary informatics components are insignificant compared to the exponentially large energy dissipation in the analog part responsible for creating new information by measurement and decision. This result contradicts the view that the energy dissipation in the memory during erasure is the most essential dissipation process in a demon. Nevertheless the dissipation in the memory and information processing parts is sufficient to secure the Second Law of Thermodynamics. PMID:23077525

Electrical Maxwell demon and Szilard engine utilizing Johnson noise, measurement, logic and control.

PubMed

Kish, Laszlo Bela; Granqvist, Claes-Göran

2012-01-01

We introduce a purely electrical version of Maxwell's demon which does not involve mechanically moving parts such as trapdoors, etc. It consists of a capacitor, resistors, amplifiers, logic circuitry and electronically controlled switches and uses thermal noise in resistors (Johnson noise) to pump heat. The only types of energy of importance in this demon are electrical energy and heat. We also demonstrate an entirely electrical version of Szilard's engine, i.e., an information-controlled device that can produce work by employing thermal fluctuations. The only moving part is a piston that executes work, and the engine has purely electronic controls and it is free of the major weakness of the original Szilard engine in not requiring removal and repositioning the piston at the end of the cycle. For both devices, the energy dissipation in the memory and other binary informatics components are insignificant compared to the exponentially large energy dissipation in the analog part responsible for creating new information by measurement and decision. This result contradicts the view that the energy dissipation in the memory during erasure is the most essential dissipation process in a demon. Nevertheless the dissipation in the memory and information processing parts is sufficient to secure the Second Law of Thermodynamics.

System and method for programmable bank selection for banked memory subsystems

DOEpatents

Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

2010-09-07

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Electric field-triggered metal-insulator transition resistive switching of bilayered multiphasic VOx

NASA Astrophysics Data System (ADS)

Won, Seokjae; Lee, Sang Yeon; Hwang, Jungyeon; Park, Jucheol; Seo, Hyungtak

2018-01-01

Electric field-triggered Mott transition of VO2 for next-generation memory devices with sharp and fast resistance-switching response is considered to be ideal but the formation of single-phase VO2 by common deposition techniques is very challenging. Here, VOx films with a VO2-dominant phase for a Mott transition-based metal-insulator transition (MIT) switching device were successfully fabricated by the combined process of RF magnetron sputtering of V metal and subsequent O2 annealing to form. By performing various material characterizations, including scanning transmission electron microscopy-electron energy loss spectroscopy, the film is determined to have a bilayer structure consisting of a VO2-rich bottom layer acting as the Mott transition switching layer and a V2O5/V2O3 mixed top layer acting as a control layer that suppresses any stray leakage current and improves cyclic performance. This bilayer structure enables excellent electric field-triggered Mott transition-based resistive switching of Pt-VOx-Pt metal-insulator-metal devices with a set/reset current ratio reaching 200, set/reset voltage of less than 2.5 V, and very stable DC cyclic switching upto 120 cycles with a great set/reset current and voltage distribution less than 5% of standard deviation at room temperature, which are specifications applicable for neuromorphic or memory device applications. [Figure not available: see fulltext.

Xyce Parallel Electronic Simulator Users' Guide Version 6.8

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik Venkatraman; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been de- signed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel com- puting platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows onemore » to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase$-$ a message passing parallel implementation $-$ which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Graphene devices based on laser scribing technology

NASA Astrophysics Data System (ADS)

Qiao, Yan-Cong; Wei, Yu-Hong; Pang, Yu; Li, Yu-Xing; Wang, Dan-Yang; Li, Yu-Tao; Deng, Ning-Qin; Wang, Xue-Feng; Zhang, Hai-Nan; Wang, Qian; Yang, Zhen; Tao, Lu-Qi; Tian, He; Yang, Yi; Ren, Tian-Ling

2018-04-01

Graphene with excellent electronic, thermal, optical, and mechanical properties has great potential applications. The current devices based on graphene grown by micromechanical exfoliation, chemical vapor deposition (CVD), and thermal decomposition of silicon carbide are still expensive and inefficient. Laser scribing technology, a low-cost and time-efficient method of fabricating graphene, is introduced in this review. The patterning of graphene can be directly performed on solid and flexible substrates. Therefore, many novel devices such as strain sensors, acoustic devices, memory devices based on laser scribing graphene are fabricated. The outlook and challenges of laser scribing technology have also been discussed. Laser scribing may be a potential way of fabricating wearable and integrated graphene systems in the future.

Accessing global data from accelerator devices

DOEpatents

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

Application of phase-change materials in memory taxonomy.

PubMed

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.

An UV photochromic memory effect in proton-based WO3 electrochromic devices

NASA Astrophysics Data System (ADS)

Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

2008-11-01

We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

Cathodochromic storage device

NASA Technical Reports Server (NTRS)

Bosomworth, D. R.; Moles, W. H.

1969-01-01

A memory and display device has been developed by combing a fast phosphor layer with a cathodochromic layer in a cathode ray tube. Images are stored as patterns of electron beam induced optical density in the cathodo-chromic material. The stored information is recovered by exciting the backing, fast phosphor layer with a constant current electron beam and detecting the emitted radiation which is modulated by absorption in the cathodochromic layer. The storage can be accomplished in one or more TV frames (1/30 sec each). More than 500 TV line resolution and close to 2:1 contrast ratio are possible. The information storage time in a dark environment is approximately 24 hours. A reconstituted (readout) electronic video signal can be generated continuously for times in excess of 10 minutes or periodically for several hours.

Memory Device and Nanofabrication Techniques Using Electrically Configurable Materials

NASA Astrophysics Data System (ADS)

Ascenso Simões, Bruno

Development of novel nanofabrication techniques and single-walled carbon nanotubes field configurable transistor (SWCNT-FCT) memory devices using electrically configurable materials is presented. A novel lithographic technique, electric lithography (EL), that uses electric field for pattern generation has been demonstrated. It can be used for patterning of biomolecules on a polymer surface and patterning of resist as well. Using electrical resist composed of a polymer having Boc protected amine group and iodonium salt, Boc group on the surface of polymer was modified to free amine by applying an electric field. On the modified surface of the polymer, Streptavidin pattern was fabricated with a sub-micron scale. Also patterning of polymer resin composed of epoxy monomers and diaryl iodonium salt by EL has been demonstrated. Reaction mechanism for electric resist configuration is believed to be induced by an acid generation via electrochemical reduction in the resist. We show a novel field configurable transistor (FCT) based on single-walled carbon nanotube network field-effect transistors in which poly (ethylene glycol) crosslinked by electron-beam is incorporated into the gate. The device conductance can be configured to arbitrary states reversibly and repeatedly by applying external gate voltages. Raman spectroscopy revealed that evolution of the ratio of D- to G-band intensity in the SWCNTs of the FCT progressively increases as the device is configured to lower conductance states. Electron transport studies at low temperatures showed a strong temperature dependence of the resistance. Band gap widening of CNTs up to ˜ 4 eV has been observed by examining the differential conductance-gate voltage-bias voltage relationship. The switching mechanism of the FCT is attributed a structural transformation of CNTs via reversible hydrogenation and dehydrogenations induced by gate voltages, which tunes the CNT bandgap continuously and reversibly to non-volatile analog values. The CNT transistors with field tunable band gaps would facilitate field programmable circuits based on the self-organized CNTs, and might also lead to novel analog memory, neuromorphic, and photonic devices.

Theoretical study of ferroelectric nanoparticles using phase reconstructed electron microscopy

NASA Astrophysics Data System (ADS)

Phatak, C.; Petford-Long, A. K.; Beleggia, M.; De Graef, M.

2014-06-01

Ferroelectric nanostructures are important for a variety of applications in electronic and electro-optical devices, including nonvolatile memories and thin-film capacitors. These applications involve stability and switching of polarization using external stimuli, such as electric fields. We present a theoretical model describing how the shape of a nanoparticle affects its polarization in the absence of screening charges, and quantify the electron-optical phase shift for detecting ferroelectric signals with phase-sensitive techniques in a transmission electron microscope. We provide an example phase shift computation for a uniformly polarized prolate ellipsoid with varying aspect ratio in the absence of screening charges.

A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory.

PubMed

Chicca, E; Badoni, D; Dante, V; D'Andreagiovanni, M; Salina, G; Carota, L; Fusi, S; Del Giudice, P

2003-01-01

Electronic neuromorphic devices with on-chip, on-line learning should be able to modify quickly the synaptic couplings to acquire information about new patterns to be stored (synaptic plasticity) and, at the same time, preserve this information on very long time scales (synaptic stability). Here, we illustrate the electronic implementation of a simple solution to this stability-plasticity problem, recently proposed and studied in various contexts. It is based on the observation that reducing the analog depth of the synapses to the extreme (bistable synapses) does not necessarily disrupt the performance of the device as an associative memory, provided that 1) the number of neurons is large enough; 2) the transitions between stable synaptic states are stochastic; and 3) learning is slow. The drastic reduction of the analog depth of the synaptic variable also makes this solution appealing from the point of view of electronic implementation and offers a simple methodological alternative to the technological solution based on floating gates. We describe the full custom analog very large-scale integration (VLSI) realization of a small network of integrate-and-fire neurons connected by bistable deterministic plastic synapses which can implement the idea of stochastic learning. In the absence of stimuli, the memory is preserved indefinitely. During the stimulation the synapse undergoes quick temporary changes through the activities of the pre- and postsynaptic neurons; those changes stochastically result in a long-term modification of the synaptic efficacy. The intentionally disordered pattern of connectivity allows the system to generate a randomness suited to drive the stochastic selection mechanism. We check by a suitable stimulation protocol that the stochastic synaptic plasticity produces the expected pattern of potentiation and depression in the electronic network.

Computational Nanotechnology of Materials, Electronics and Machines: Carbon Nanotubes

NASA Technical Reports Server (NTRS)

Srivastava, Deepak

2001-01-01

This report presents the goals and research of the Integrated Product Team (IPT) on Devices and Nanotechnology. NASA's needs for this technology are discussed and then related to the research focus of the team. The two areas of focus for technique development are: 1) large scale classical molecular dynamics on a shared memory architecture machine; and 2) quantum molecular dynamics methodology. The areas of focus for research are: 1) nanomechanics/materials; 2) carbon based electronics; 3) BxCyNz composite nanotubes and junctions; 4) nano mechano-electronics; and 5) nano mechano-chemistry.

A Normal Incidence X-ray Telescope (NIXT) sounding rocket payload

NASA Technical Reports Server (NTRS)

Golub, Leon

1989-01-01

Work on the High Resolution X-ray (HRX) Detector Program is described. In the laboratory and flight programs, multiple copies of a general purpose set of electronics which control the camera, signal processing and data acquisition, were constructed. A typical system consists of a phosphor convertor, image intensifier, a fiber optics coupler, a charge coupled device (CCD) readout, and a set of camera, signal processing and memory electronics. An initial rocket detector prototype camera was tested in flight and performed perfectly. An advanced prototype detector system was incorporated on another rocket flight, in which a high resolution heterojunction vidicon tube was used as the readout device for the H(alpha) telescope. The camera electronics for this tube were built in-house and included in the flight electronics. Performance of this detector system was 100 percent satisfactory. The laboratory X-ray system for operation on the ground is also described.

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

NASA Astrophysics Data System (ADS)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

Molecular Rotors as Switches

PubMed Central

Xue, Mei; Wang, Kang L.

2012-01-01

The use of a functional molecular unit acting as a state variable provides an attractive alternative for the next generations of nanoscale electronics. It may help overcome the limits of conventional MOSFETd due to their potential scalability, low-cost, low variability, and highly integratable characteristics as well as the capability to exploit bottom-up self-assembly processes. This bottom-up construction and the operation of nanoscale machines/devices, in which the molecular motion can be controlled to perform functions, have been studied for their functionalities. Being triggered by external stimuli such as light, electricity or chemical reagents, these devices have shown various functions including those of diodes, rectifiers, memories, resonant tunnel junctions and single settable molecular switches that can be electronically configured for logic gates. Molecule-specific electronic switching has also been reported for several of these device structures, including nanopores containing oligo(phenylene ethynylene) monolayers, and planar junctions incorporating rotaxane and catenane monolayers for the construction and operation of complex molecular machines. A specific electrically driven surface mounted molecular rotor is described in detail in this review. The rotor is comprised of a monolayer of redox-active ligated copper compounds sandwiched between a gold electrode and a highly-doped P+ Si. This electrically driven sandwich-type monolayer molecular rotor device showed an on/off ratio of approximately 104, a read window of about 2.5 V, and a retention time of greater than 104 s. The rotation speed of this type of molecular rotor has been reported to be in the picosecond timescale, which provides a potential of high switching speed applications. Current-voltage spectroscopy (I-V) revealed a temperature-dependent negative differential resistance (NDR) associated with the device. The analysis of the device I–V characteristics suggests the source of the observed switching effects to be the result of the redox-induced ligand rotation around the copper metal center and this attribution of switching is consistent with the observed temperature dependence of the switching behavior as well as the proposed energy diagram of the device. The observed resistance switching shows the potential for future non-volatile memories and logic devices applications. This review will discuss the progress and provide a perspective of molecular motion for nanoelectronics and other applications.

Fault tolerance issues in nanoelectronics

NASA Astrophysics Data System (ADS)

Spagocci, S. M.

The astonishing success story of microelectronics cannot go on indefinitely. In fact, once devices reach the few-atom scale (nanoelectronics), transient quantum effects are expected to impair their behaviour. Fault tolerant techniques will then be required. The aim of this thesis is to investigate the problem of transient errors in nanoelectronic devices. Transient error rates for a selection of nanoelectronic gates, based upon quantum cellular automata and single electron devices, in which the electrostatic interaction between electrons is used to create Boolean circuits, are estimated. On the bases of such results, various fault tolerant solutions are proposed, for both logic and memory nanochips. As for logic chips, traditional techniques are found to be unsuitable. A new technique, in which the voting approach of triple modular redundancy (TMR) is extended by cascading TMR units composed of nanogate clusters, is proposed and generalised to other voting approaches. For memory chips, an error correcting code approach is found to be suitable. Various codes are considered and a lookup table approach is proposed for encoding and decoding. We are then able to give estimations for the redundancy level to be provided on nanochips, so as to make their mean time between failures acceptable. It is found that, for logic chips, space redundancies up to a few tens are required, if mean times between failures have to be of the order of a few years. Space redundancy can also be traded for time redundancy. As for memory chips, mean times between failures of the order of a few years are found to imply both space and time redundancies of the order of ten.

Disabling CNT Electronic Devices by Use of Electron Beams

NASA Technical Reports Server (NTRS)

Petkov, Mihail

2008-01-01

Bombardment with tightly focused electron beams has been suggested as a means of electrically disabling selected individual carbon-nanotubes (CNTs) in electronic devices. Evidence in support of the suggestion was obtained in an experiment in which a CNT field-effect transistor was disabled (see figure) by focusing a 1-keV electron beam on a CNT that served as the active channel of a field-effect transistor (FET). Such bombardment could be useful in the manufacture of nonvolatile-memory circuits containing CNT FETs. Ultimately, in order to obtain the best electronic performances in CNT FETs and other electronic devices, it will be necessary to fabricate the devices such that each one contains only a single CNT as an active element. At present, this is difficult because there is no way to grow a single CNT at a specific location and with a specific orientation. Instead, the common practice is to build CNTs into electronic devices by relying on spatial distribution to bridge contacts. This practice results in some devices containing no CNTs and some devices containing more than one CNT. Thus, CNT FETs have statistically distributed electronic characteristics (including switching voltages, gains, and mixtures of metallic and semiconducting CNTs). According to the suggestion, by using a 1-keV electron beam (e.g., a beam from a scanning electron microscope), a particular nanotube could be rendered electrically dysfunctional. This procedure could be repeated as many times as necessary on different CNTs in a device until all of the excess CNTs in the device had been disabled, leaving only one CNT as an active element (e.g., as FET channel). The physical mechanism through which a CNT becomes electrically disabled is not yet understood. On one hand, data in the literature show that electron kinetic energy >86 keV is needed to cause displacement damage in a CNT. On the other hand, inasmuch as a 1-keV beam focused on a small spot (typically a few tens of nanometers wide) deposits a significant amount of energy in a small volume, the energy density may suffice to thermally induce structural and/or electronic changes that disable the CNT. Research may be warranted to investigate this effect in detail.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nekoogar, Faranak; Reynolds, Matthew; Lefton, Scott

A secure optionally passive RFID tag or sensor system comprises a passive RFID tag having means for receiving radio signals from at least one base station and for transmitting radio signals to at least one base station, where the tag is capable of being powered exclusively by received radio energy, and an external power and data logging device having at least one battery and electronic circuitry including a digital memory configured for storing and recalling data. The external power and data logging device has a means for powering the tag, and also has a means.

Application of phase-change materials in memory taxonomy

PubMed Central

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557

Self-assembled oxide films with tailored nanoscale ionic and electronic channels for controlled resistive switching

DOE PAGES

Cho, Seungho; Yun, Chao; Tappertzhofen, Stefan; ...

2016-08-05

Resistive switches are non-volatile memory cells based on nano-ionic redox processes that offer energy efficient device architectures and open pathways to neuromorphics and cognitive computing. However, channel formation typically requires an irreversible, not well controlled electroforming process, giving difficulty to independently control ionic and electronic properties. The device performance is also limited by the incomplete understanding of the underlying mechanisms. Here, we report a novel memristive model material system based on self-assembled Sm-doped CeO 2 and SrTiO 3 films that allow the separate tailoring of nanoscale ionic and electronic channels at high density (~10 12 inch –2). Here, we systematicallymore » show that these devices allow precise engineering of the resistance states, thus enabling large on–off ratios and high reproducibility. The tunable structure presents an ideal platform to explore ionic and electronic mechanisms and we expect a wide potential impact also on other nascent technologies, ranging from ionic gating to micro-solid oxide fuel cells and neuromorphics.« less

Spacecraft optical disk recorder memory buffer control

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1992-01-01

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Accessing global data from accelerator devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less

Field-Sequential Color Converter

NASA Technical Reports Server (NTRS)

Studer, Victor J.

1989-01-01

Electronic conversion circuit enables display of signals from field-sequential color-television camera on color video camera. Designed for incorporation into color-television monitor on Space Shuttle, circuit weighs less, takes up less space, and consumes less power than previous conversion equipment. Incorporates state-of-art memory devices, also used in terrestrial stationary or portable closed-circuit television systems.

Charge injection and discharging of Si nanocrystals and arrays by atomic force microscopy

NASA Technical Reports Server (NTRS)

Boer, E.; Ostraat, M.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.

2000-01-01

Charge injection and storage in dense arrays of silicon nanocrystals in SiO(sub 2) is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few-or single- electron storage in a small number of nanocrystal elements.

An Introduction to the Memristor

ERIC Educational Resources Information Center

Atkin, Keith

2013-01-01

In recent years there has been a revolution in electronics, with a variety of physical phenomena being utilized in the construction of new types of memory circuits for computer application. A device which has had an increasing role is the memristor, whose description and properties have so far had little mention in physics education. This paper…

Investigation of multi-state charge-storage properties of redox-active organic molecules in silicon-molecular hybrid devices for DRAM and Flash applications

NASA Astrophysics Data System (ADS)

Gowda, Srivardhan Shivappa

Molecular electronics has recently spawned a considerable amount of interest with several molecules possessing charge-conduction and charge-storage properties proposed for use in electronic devices. Hybrid silicon-molecular technology has the promise of augmenting the current silicon technology and provide for a transitional path to future molecule-only technology. The focus of this dissertation work has been on developing a class of hybrid silicon-molecular electronic devices for DRAM and Flash memory applications utilizing redox-active molecules. This work exploits the ability of molecules to store charges with single-electron precision at room temperature. The hybrid devices are fabricated by forming self-assembled monolayers of redox-active molecules on Si and oxide (SiO2 and HfO2) surfaces via formation of covalent linkages. The molecules possess discrete quantum states from which electrons can tunnel to the Si substrate at discrete applied voltages (oxidation process, cell write), leaving behind a positively charged layer of molecules. The reduction (erase) process, which is the process of electrons tunneling back from Si to the molecules, neutralizes the positively charged molecular monolayer. Hybrid silicon-molecular capacitor test structures were electrically characterized with an electrolyte gate using cyclic voltammetry (CyV) and impedance spectroscopy (CV) techniques. The redox voltages, kinetics (write/erase speeds) and charge-retention characteristics were found to be strongly dependent on the Si doping type and densities, and ambient light. It was also determined that the redox energy states in the molecules communicate with the valence band of the Si substrate. This allows tuning of write and read states by modulating minority carriers in n- and p-Si substrates. Ultra-thin dielectric tunnel barriers (SiO2, HfO2) were placed between the molecules and the Si substrate to augment charge-retention for Flash memory applications. The redox response was studied as a function of tunnel oxide thickness, dielectric permittivity and energy barrier, and modified Butler-Volmer expressions were postulated to describe the redox kinetics. The speed vs. retention performance of the devices was improved via asymmetric layered tunnel barriers. The properties of molecules can be tailored by molecular design and synthetic chemistry. In this work, it was demonstrated that an alternate route to tune/enhance the properties of the hybrid device is to engineer the substrate (silicon) component. The molecules were attached to diode surfaces to tune redox voltages and improve charge-retention characteristics. N+ pockets embedded in P-Si well were utilized to obtain multiple states from a two-state molecule. The structure was also employed as a characterization tool in investigating the intrinsic properties of the molecules such as lateral conductivity within the monolayer. Redox molecules were also incorporated on an ultra thin gate-oxide of Si MOSFETs with the intent of studying the interaction of redox states with Si MOSFETs. The discrete molecular states were manifested in the drain current and threshold voltage characteristics of the device. This work demonstrates the multi-state modulation of Si-MOSFETs' drain current via redox-active molecular monolayers. Polymeric films of redox-active molecules were incorporated to improve the charge-density (ON/OFF ratio) and these structures may be employed for multi-state, low-voltage Flash memory applications. The most critical aspect of this research effort is to build a reliable and high density solid state memory technology. To this end, efforts were directed towards replacement of the electrolytic gate, which forms an extremely thin insulating double layer (˜10 nm) at the electrolyte-molecule interface, with a combination of an ultra-thin high-K dielectric layer and a metal gate. Several interesting observations were made in the research approaches towards integration and provided valuable insights into the electrolyte-redox systems. In summary, this work provides fundamental insights into the interaction of redox-energy states with silicon substrate and realistic approaches for exploiting the unique properties of the molecules that may enable solutions for nanoscale high density, low-voltage, long retention and multiple bit memory applications.

Remote Monitoring for Follow-up of Patients with Cardiac Implantable Electronic Devices

PubMed Central

Morichelli, Loredana; Varma, Niraj

2014-01-01

Follow-up of patients with cardiac implantable electronic devices is challenging due to the increasing number and technical complexity of devices coupled to increasing clinical complexity of patients. Remote monitoring (RM) offers the opportunity to optimise clinic workflow and to improve device monitoring and patient management. Several randomised clinical trials and registries have demonstrated that RM may reduce number of hospital visits, time required for patient follow-up, physician and nurse time, hospital and social costs. Furthermore, patient retention and adherence to follow-up schedule are significantly improved by RM. Continuous wireless monitoring of data stored in the device memory with automatic alerts allows early detection of device malfunctions and of events requiring clinical reaction, such as atrial fibrillation, ventricular arrhythmias and heart failure. Early reaction may improve patient outcome. RM is easy to use and patients showed a high level of acceptance and satisfaction. Implementing RM in daily practice may require changes in clinic workflow. To this purpose, new organisational models have been introduced. In spite of a favourable cost:benefit ratio, RM reimbursement still represents an issue in several European countries. PMID:26835079

Memory hierarchy using row-based compression

DOEpatents

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

3D Printing of Highly Stretchable, Shape-Memory, and Self-Healing Elastomer toward Novel 4D Printing.

PubMed

Kuang, Xiao; Chen, Kaijuan; Dunn, Conner K; Wu, Jiangtao; Li, Vincent C F; Qi, H Jerry

2018-02-28

The three-dimensional (3D) printing of flexible and stretchable materials with smart functions such as shape memory (SM) and self-healing (SH) is highly desirable for the development of future 4D printing technology for myriad applications, such as soft actuators, deployable smart medical devices, and flexible electronics. Here, we report a novel ink that can be used for the 3D printing of highly stretchable, SM, and SH elastomer via UV-light-assisted direct-ink-write printing. An ink containing urethane diacrylate and a linear semicrystalline polymer is developed for the 3D printing of a semi-interpenetrating polymer network elastomer that can be stretched by up to 600%. The 3D-printed complex structures show interesting functional properties, such as high strain SM and SM -assisted SH capability. We demonstrate that such a 3D-printed SM elastomer has the potential application for biomedical devices, such as vascular repair devices. This research paves a new way for the further development of novel 4D printing, soft robotics, and biomedical devices.

The Effect of 4-Octyldecyloxybenzoic Acid on Liquid-Crystalline Polyurethane Composites with Triple-Shape Memory and Self-Healing Properties

PubMed Central

Ban, Jianfeng; Zhu, Linjiang; Chen, Shaojun; Wang, Yiping

2016-01-01

To better understand shape memory materials and self-healing materials, a new series of liquid-crystalline shape memory polyurethane (LC-SMPU) composites, named SMPU-OOBAm, were successfully prepared by incorporating 4-octyldecyloxybenzoic acid (OOBA) into the PEG-based SMPU. The effect of OOBA on the structure, morphology, and properties of the material has been carefully investigated. The results demonstrate that SMPU-OOBAm has liquid crystalline properties, triple-shape memory properties, and self-healing properties. The incorporated OOBA promotes the crystallizability of both soft and hard segments of SMPU, and the crystallization rate of the hard segment of SMPU decreases when the OOBA-content increases. Additionally, the SMPU-OOBAm forms a two-phase separated structure (SMPU phase and OOBA phase), and it shows two-step modulus changes upon heating. Therefore, the SMPU-OOBAm exhibits triple-shape memory behavior, and the shape recovery ratio decreases with an increase in the OOBA content. Finally, SMPU-OOBAm exhibits self-healing properties. The new mechanism can be ascribed to the heating-induced “bleeding” of OOBA in the liquid crystalline state and the subsequent re-crystallization upon cooling. This successful combination of liquid crystalline properties, triple-shape memory properties, and self-healing properties make the SMPU-OOBAm composites ideal for many promising applications in smart optical devices, smart electronic devices, and smart sensors. PMID:28773914

An insight into the dopant selection for CeO2-based resistive-switching memory system: a DFT and experimental study

NASA Astrophysics Data System (ADS)

Hussain, Fayyaz; Imran, Muhammad; Rana, Anwar Manzoor; Khalil, R. M. Arif; Khera, Ejaz Ahmad; Kiran, Saira; Javid, M. Arshad; Sattar, M. Atif; Ismail, Muhammad

2018-03-01

The aim of this study is to figure out better metal dopants for CeO2 for designing highly efficient non-volatile memory (NVM) devices. The present DFT work involves four different metals doped interstitially and substitutionally in CeO2 thin films. First principle calculations involve electron density of states (DOS) and partial density of states (PDOS), and isosurface charge densities are carried out within the plane-wave density functional theory using GGA and GGA + U approach by employing the Vienna ab initio simulation package VASP. Isosurface charge density plots confirmed that interstitial doping of Zr and Ti metals truly assists in generating conduction filaments (CFs), while substitutional doping of these metals cannot do so. Substitutional doping of W may contribute in generating CFs in CeO2 directly, but its interstitial doping improves conductivity of CeO2. However, Ni-dopant is capable of directly generating CFs both as substitutional and interstitial dopants in ceria. Such a capability of Ni appears acting as top electrode in Ni/CeO2/Pt memory devices, but its RS behavior is not so good. On inserting Zr layer to make Ni/Zr:CeO2/Pt memory stacks, Ni does not contribute in RS characteristics, but Zr plays a vital role in forming CFs by creating oxygen vacancies and forming ZrO2 interfacial layer. Therefore, Zr-doped devices exhibit high-resistance ratio of 104 and good endurance as compared to undoped devices suitable for RRAM applications.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

An overview of Experimental Condensed Matter Physics in Argentina by 2014, and Oxides for Non Volatile Memory Devices: The MeMOSat Project

NASA Astrophysics Data System (ADS)

Levy, Pablo

2015-03-01

In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.

Rational design of metal-organic electronic devices: A computational perspective

NASA Astrophysics Data System (ADS)

Chilukuri, Bhaskar

Organic and organometallic electronic materials continue to attract considerable attention among researchers due to their cost effectiveness, high flexibility, low temperature processing conditions and the continuous emergence of new semiconducting materials with tailored electronic properties. In addition, organic semiconductors can be used in a variety of important technological devices such as solar cells, field-effect transistors (FETs), flash memory, radio frequency identification (RFID) tags, light emitting diodes (LEDs), etc. However, organic materials have thus far not achieved the reliability and carrier mobility obtainable with inorganic silicon-based devices. Hence, there is a need for finding alternative electronic materials other than organic semiconductors to overcome the problems of inferior stability and performance. In this dissertation, I research the development of new transition metal based electronic materials which due to the presence of metal-metal, metal-pi, and pi-pi interactions may give rise to superior electronic and chemical properties versus their organic counterparts. Specifically, I performed computational modeling studies on platinum based charge transfer complexes and d 10 cyclo-[M(mu-L)]3 trimers (M = Ag, Au and L = monoanionic bidentate bridging (C/N~C/N) ligand). The research done is aimed to guide experimental chemists to make rational choices of metals, ligands, substituents in synthesizing novel organometallic electronic materials. Furthermore, the calculations presented here propose novel ways to tune the geometric, electronic, spectroscopic, and conduction properties in semiconducting materials. In addition to novel material development, electronic device performance can be improved by making a judicious choice of device components. I have studied the interfaces of a p-type metal-organic semiconductor viz cyclo-[Au(mu-Pz)] 3 trimer with metal electrodes at atomic and surface levels. This work was aimed to guide the device engineers to choose the appropriate metal electrodes considering the chemical interactions at the interface. Additionally, the calculations performed on the interfaces provided valuable insight into binding energies, charge redistribution, change in the energy levels, dipole formation, etc., which are important parameters to consider while fabricating an electronic device. The research described in this dissertation highlights the application of unique computational modeling methods at different levels of theory to guide the experimental chemists and device engineers toward a rational design of transition metal based electronic devices with low cost and high performance.

Response of GaAs charge storage devices to transient ionizing radiation

NASA Astrophysics Data System (ADS)

Hetherington, D. L.; Klem, J. F.; Hughes, R. C.; Weaver, H. T.

Charge storage devices in which non-equilibrium depletion regions represent stored charge are sensitive to ionizing radiation. This results since the radiation generates electron-hole pairs that neutralize excess ionized dopant charge. Silicon structures, such as dynamic RAM or CCD cells are particularly sensitive to radiation since carrier diffusion lengths in this material are often much longer than the depletion width, allowing collection of significant quantities of charge from quasi-neutral sections of the device. For GaAs the situation is somewhat different in that minority carrier diffusion lengths are shorter than in silicon, and although mobilities are higher, we expect a reduction of radiation sensitivity as suggested by observations of reduced quantum efficiency in GaAs solar cells. Dynamic memory cells in GaAs have potential increased retention times. In this paper, we report the response of a novel GaAs dynamic memory element to transient ionizing radiation. The charge readout technique is nondestructive over a reasonable applied voltage range and is more sensitive to stored charge than a simple capacitor.

Extraction of sub-gap density of states via capacitance-voltage measurement for the erasing process in a TFT charge-trapping memory

NASA Astrophysics Data System (ADS)

Chiang, Yen-Chang; Hsiao, Yang-Hsuan; Li, Jeng-Ting; Chen, Jen-Sue

2018-02-01

Charge-trapping memories (CTMs) based on zinc tin oxide (ZTO) semiconductor thin-film transistors (TFTs) can be programmed by a positive gate voltage and erased by a negative gate voltage in conjunction with light illumination. To understand the mechanism involved, the sub-gap density of states associated with ionized oxygen vacancies in the ZTO active layer is extracted from optical response capacitance-voltage (C-V) measurements. The corresponding energy states of ionized oxygen vacancies are observed below the conduction band minimum at approximately 0.5-1.0 eV. From a comparison of the fitted oxygen vacancy concentration in the CTM-TFT after the light-bias erasing operation, it is found that the pristine-erased device contains more oxygen vacancies than the program-erased device because the trapped electrons in the programmed device are pulled into the active layer and neutralized by the oxygen vacancies that are present there.

Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density.

PubMed

Al-Haddad, Ahmed; Wang, Chengliang; Qi, Haoyuan; Grote, Fabian; Wen, Liaoyong; Bernhard, Jörg; Vellacheri, Ranjith; Tarish, Samar; Nabi, Ghulam; Kaiser, Ute; Lei, Yong

2016-09-07

Resistive switching random access memories (RRAM) have attracted great scientific and industrial attention for next generation data storage because of their advantages of nonvolatile properties, high density, low power consumption, fast writing/erasing speed, good endurance, and simple and small operation system. Here, by using a template-assisted technique, we demonstrate a three-dimensional highly ordered vertical RRAM device array with density as high as that of the nanopores of the template (10(8)-10(9) cm(-2)), which can also be fabricated in large area. The high crystallinity of the materials, the large contact area and the intimate semiconductor/electrode interface (3 nm interfacial layer) make the ultralow voltage operation (millivolt magnitude) and ultralow power consumption (picowatt) possible. Our procedure for fabrication of the nanodevice arrays in large area can be used for producing many other different materials and such three-dimensional electronic device arrays with the capability to adjust the device densities can be extended to other applications of the next generation nanodevice technology.

1986 Annual Conference on Nuclear and Space Radiation Effects, 23rd, Providence, RI, July 21-23, 1986, Proceedings

NASA Technical Reports Server (NTRS)

Ellis, Thomas D. (Editor)

1986-01-01

The present conference on the effects of nuclear and space radiation on electronic hardware gives attention to topics in the basic mechanisms of radiation effects, dosimetry and energy-dependent effects, electronic device radiation hardness assurance, SOI/SOS radiation effects, spacecraft charging and space radiation, IC radiation effects and hardening, single-event upset (SEU) phenomena and hardening, and EMP/SGEMP/IEMP phenomena. Specific treatments encompass the generation of interface states by ionizing radiation in very thin MOS oxides, the microdosimetry of meson energy deposited on 1-micron sites in Si, total dose radiation and engineering studies, plasma interactions with biased concentrator solar cells, the transient imprint memory effect in MOS memories, mechanisms leading to SEU, and the vaporization and breakdown of thin columns of water.

Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

PubMed Central

Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

2015-01-01

We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

Influence of ultraviolet irradiation on data retention characteristics in resistive random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kimura, K.; Ohmi, K.; Tottori University Electronic Display Research Center, 101 Minami4-chome, Koyama-cho, Tottori-shi, Tottori 680-8551

With increasing density of memory devices, the issue of generating soft errors by cosmic rays is becoming more and more serious. Therefore, the irradiation resistance of resistance random access memory (ReRAM) to cosmic radiation has to be elucidated for practical use. In this paper, we investigated the data retention characteristics of ReRAM against ultraviolet irradiation with a Pt/NiO/ITO structure. Soft errors were confirmed to be caused by ultraviolet irradiation in both low- and high-resistance states. An analysis of the wavelength dependence of light irradiation on data retention characteristics suggested that electronic excitation from the valence to the conduction band andmore » to the energy level generated due to the introduction of oxygen vacancies caused the errors. Based on a statistically estimated soft error rates, the errors were suggested to be caused by the cohesion and dispersion of oxygen vacancies owing to the generation of electron-hole pairs and valence changes by the ultraviolet irradiation.« less

Xyce™ Parallel Electronic Simulator Users' Guide, Version 6.5.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik V.; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase -- a message passing parallel implementation -- which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The information herein is subject to change without notice. Copyright © 2002-2016 Sandia Corporation. All rights reserved.« less

Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure.

PubMed

Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

2009-01-14

The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

Microstructure research for ferroelectric origin in the strained Hf0.5Zr0.5O2 thin film via geometric phase analysis

NASA Astrophysics Data System (ADS)

Bi, Han; Sun, Qingqing; Zhao, Xuebing; You, Wenbin; Zhang, David Wei; Che, Renchao

2018-04-01

Recently, non-volatile semiconductor memory devices using a ferroelectric Hf0.5Zr0.5O2 film have been attracting extensive attention. However, at the nano-scale, the phase structure remains unclear in a thin Hf0.5Zr0.5O2 film, which stands in the way of the sustained development of ferroelectric memory nano-devices. Here, a series of electron microscopy evidences have illustrated that the interfacial strain played a key role in inducing the orthorhombic phase and the distorted tetragonal phase, which was the origin of the ferroelectricity in the Hf0.5Zr0.5O2 film. Our results provide insight into understanding the association between ferroelectric performances and microstructures of Hf0.5Zr0.5O2-based systems.

The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2007-01-01

This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

Tri-state resistive switching characteristics of MnO/Ta2O5 resistive random access memory device by a controllable reset process

NASA Astrophysics Data System (ADS)

Lee, N. J.; Kang, T. S.; Hu, Q.; Lee, T. S.; Yoon, T.-S.; Lee, H. H.; Yoo, E. J.; Choi, Y. J.; Kang, C. J.

2018-06-01

Tri-state resistive switching characteristics of bilayer resistive random access memory devices based on manganese oxide (MnO)/tantalum oxide (Ta2O5) have been studied. The current–voltage (I–V) characteristics of the Ag/MnO/Ta2O5/Pt device show tri-state resistive switching (RS) behavior with a high resistance state (HRS), intermediate resistance state (IRS), and low resistance state (LRS), which are controlled by the reset process. The MnO/Ta2O5 film shows bipolar RS behavior through the formation and rupture of conducting filaments without the forming process. The device shows reproducible and stable RS both from the HRS to the LRS and from the IRS to the LRS. In order to elucidate the tri-state RS mechanism in the Ag/MnO/Ta2O5/Pt device, transmission electron microscope (TEM) images are measured in the LRS, IRS and HRS. White lines like dendrites are observed in the Ta2O5 film in both the LRS and the IRS. Poole–Frenkel conduction, space charge limited conduction, and Ohmic conduction are proposed as the dominant conduction mechanisms for the Ag/MnO/Ta2O5/Pt device based on the obtained I–V characteristics and TEM images.

Flexible Memristive Devices Based on InP/ZnSe/ZnS Core-Multishell Quantum Dot Nanocomposites.

PubMed

Kim, Do Hyeong; Wu, Chaoxing; Park, Dong Hyun; Kim, Woo Kyum; Seo, Hae Woon; Kim, Sang Wook; Kim, Tae Whan

2018-05-02

The effects of the ZnS shell layer on the memory performances of flexible memristive devices based on quantum dots (QDs) with an InP/ZnSe/ZnS core-multishell structure embedded in a poly(methylmethacrylate) layer were investigated. The on/off ratios of the devices based on QDs with an InP/ZnSe core-shell structure and with an InP/ZnSe/ZnS core-multishell structure were approximately 4.2 × 10 2 and 8.5 × 10 3 , respectively, indicative of enhanced charge storage capability in the latter. After bending, the memory characteristics of the memristive devices based on QDs with the InP/ZnSe/ZnS structure were similar to those before bending. In addition, those devices maintained the same on/off ratios for retention time of 1 × 10 4 s, and the number of endurance cycles was above 1 × 10 2 . The reset voltages ranged from -2.3 to -3.1 V, and the set voltages ranged from 1.3 to 2.1 V, indicative of reliable electrical characteristics. Furthermore, the possible operating mechanisms of the devices are presented on the basis of the electron trapping and release mode.

Study on data compression algorithm and its implementation in portable electronic device for Internet of Things applications

NASA Astrophysics Data System (ADS)

Asilah Khairi, Nor; Bahari Jambek, Asral

2017-11-01

An Internet of Things (IoT) device is usually powered by a small battery, which does not last long. As a result, saving energy in IoT devices has become an important issue when it comes to this subject. Since power consumption is the primary cause of radio communication, some researchers have proposed several compression algorithms with the purpose of overcoming this particular problem. Several data compression algorithms from previous reference papers are discussed in this paper. The description of the compression algorithm in the reference papers was collected and summarized in a table form. From the analysis, MAS compression algorithm was selected as a project prototype due to its high potential for meeting the project requirements. Besides that, it also produced better performance regarding energy-saving, better memory usage, and data transmission efficiency. This method is also suitable to be implemented in WSN. MAS compression algorithm will be prototyped and applied in portable electronic devices for Internet of Things applications.

Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device.

PubMed

Park, Sangsu; Noh, Jinwoo; Choo, Myung-Lae; Sheri, Ahmad Muqeem; Chang, Man; Kim, Young-Bae; Kim, Chang Jung; Jeon, Moongu; Lee, Byung-Geun; Lee, Byoung Hun; Hwang, Hyunsang

2013-09-27

Efforts to develop scalable learning algorithms for implementation of networks of spiking neurons in silicon have been hindered by the considerable footprints of learning circuits, which grow as the number of synapses increases. Recent developments in nanotechnologies provide an extremely compact device with low-power consumption.In particular, nanoscale resistive switching devices (resistive random-access memory (RRAM)) are regarded as a promising solution for implementation of biological synapses due to their nanoscale dimensions, capacity to store multiple bits and the low energy required to operate distinct states. In this paper, we report the fabrication, modeling and implementation of nanoscale RRAM with multi-level storage capability for an electronic synapse device. In addition, we first experimentally demonstrate the learning capabilities and predictable performance by a neuromorphic circuit composed of a nanoscale 1 kbit RRAM cross-point array of synapses and complementary metal-oxide-semiconductor neuron circuits. These developments open up possibilities for the development of ubiquitous ultra-dense, ultra-low-power cognitive computers.

Energy-band engineering for tunable memory characteristics through controlled doping of reduced graphene oxide.

PubMed

Han, Su-Ting; Zhou, Ye; Yang, Qing Dan; Zhou, Li; Huang, Long-Biao; Yan, Yan; Lee, Chun-Sing; Roy, Vellaisamy A L

2014-02-25

Tunable memory characteristics are used in multioperational mode circuits where memory cells with various functionalities are needed in one combined device. It is always a challenge to obtain control over threshold voltage for multimode operation. On this regard, we use a strategy of shifting the work function of reduced graphene oxide (rGO) in a controlled manner through doping gold chloride (AuCl3) and obtained a gradient increase of rGO work function. By inserting doped rGO as floating gate, a controlled threshold voltage (Vth) shift has been achieved in both p- and n-type low voltage flexible memory devices with large memory window (up to 4 times for p-type and 8 times for n-type memory devices) in comparison with pristine rGO floating gate memory devices. By proper energy band engineering, we demonstrated a flexible floating gate memory device with larger memory window and controlled threshold voltage shifts.

Compact Method for Modeling and Simulation of Memristor Devices

DTIC Science & Technology

2011-08-01

single-valued equations. 15. SUBJECT TERMS Memristor, Neuromorphic , Cognitive, Computing, Memory, Emerging Technology, Computational Intelligence 16...resistance state depends on its previous state and present electrical biasing conditions, and when combined with transistors in a hybrid chip ...computers, reconfigurable electronics and neuromorphic computing [3,4]. According to Chua [4], the memristor behaves like a linear resistor with

Flexible and twistable non-volatile memory cell array with all-organic one diode-one resistor architecture.

PubMed

Ji, Yongsung; Zeigler, David F; Lee, Dong Su; Choi, Hyejung; Jen, Alex K-Y; Ko, Heung Cho; Kim, Tae-Wook

2013-01-01

Flexible organic memory devices are one of the integral components for future flexible organic electronics. However, high-density all-organic memory cell arrays on malleable substrates without cross-talk have not been demonstrated because of difficulties in their fabrication and relatively poor performances to date. Here we demonstrate the first flexible all-organic 64-bit memory cell array possessing one diode-one resistor architectures. Our all-organic one diode-one resistor cell exhibits excellent rewritable switching characteristics, even during and after harsh physical stresses. The write-read-erase-read output sequence of the cells perfectly correspond to the external pulse signal regardless of substrate deformation. The one diode-one resistor cell array is clearly addressed at the specified cells and encoded letters based on the standard ASCII character code. Our study on integrated organic memory cell arrays suggests that the all-organic one diode-one resistor cell architecture is suitable for high-density flexible organic memory applications in the future.

A 2D Material based Gate Tunable Memristive Device for Emulating Modulatory Input-dependent Hetero-synaptic Plasticity.

NASA Astrophysics Data System (ADS)

Yan, Xiaodong; Tian, He; Xie, Yujun; Kostelec, Andrew; Zhao, Huan; Cha, Judy J.; Tice, Jesse; Wang, Han

Modulatory input-dependent plasticity is a well-known type of hetero-synaptic response where the release of neuromodulators can alter the efficacy of neurotransmission in a nearby chemical synapse. Solid-state devices that can mimic such phenomenon are desirable for enhancing the functionality and reconfigurability of neuromorphic electronics. In this work, we demonstrated a tunable artificial synaptic device concept based on the properties of graphene and tin oxide that can mimic the modulatory input-dependent plasticity. By using graphene as the contact electrode, a third electrode terminal can be used to modulate the conductive filament formation in the vertical tin oxide based resistive memory device. The resulting synaptic characteristics of this device, in terms of the profile of synaptic weight change and the spike-timing-dependent-plasticity, is tunable with the bias at the modulating terminal. Furthermore, the synaptic response can be reconfigured between excitatory and inhibitory modes by this modulating bias. The operation mechanism of the device is studied with combined experimental and theoretical analysis. The device is attractive for application in neuromorphic electronics. This work is supported by ARO and NG-ION2 at USC.

Effects of Piezoelectric Potential of ZnO on Resistive Switching Characteristics of Flexible ZnO/TiO2 Heterojunction Cells

NASA Astrophysics Data System (ADS)

Li, Hongxia; Zhou, You; Du, Gang; Huang, Yanwei; Ji, Zhenguo

2018-03-01

Flexible resistance random access memory (ReRAM) devices with a heterojunction structure of PET/ITO/ZnO/TiO2/Au were fabricated on polyethylene terephthalate/indium tin oxide (PET/ITO) substrates by different physical and chemical preparation methods. X-ray diffraction, scanning electron microscopy and atomic force microscopy were carried out to investigate the crystal structure, surface topography and cross-sectional structure of the prepared films. X-ray photoelectron spectroscopy was also used to identify the chemical state of Ti, O and Zn elements. Theoretical and experimental analyses were conducted to identify the effect of piezoelectric potential of ZnO on resistive switching characteristics of flexible ZnO/TiO2 heterojunction cells. The results showed a pathway to enhance the performance of ReRAM devices by engineering the interface barrier, which is also feasible for other electronics, optoelectronics and photovoltaic devices.

High performance superconducting devices enabled by three dimensionally ordered nanodots and/or nanorods

DOEpatents

Goyal, Amit

2013-09-17

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

High performance electrical, magnetic, electromagnetic and electrooptical devices enabled by three dimensionally ordered nanodots and nanorods

DOEpatents

Goyal, Amit , Kang; Sukill, [Knoxville, TN

2012-02-21

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

High performance devices enabled by epitaxial, preferentially oriented, nanodots and/or nanorods

DOEpatents

Goyal, Amit [Knoxville, TN

2011-10-11

Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic, superconducting and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

Ultrafast, superhigh gain visible-blind UV detector and optical logic gates based on nonpolar a-axial GaN nanowire

NASA Astrophysics Data System (ADS)

Wang, Xingfu; Zhang, Yong; Chen, Xinman; He, Miao; Liu, Chao; Yin, Yian; Zou, Xianshao; Li, Shuti

2014-09-01

Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage.Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage. Electronic supplementary information (ESI) available: Details of the EDS and SAED data, supplementary results of the UV detector, and the discussion of the transport properties of the MSM Schottky contact devices. See DOI: 10.1039/c4nr03581j

Organic Ferroelectric-Based 1T1T Random Access Memory Cell Employing a Common Dielectric Layer Overcoming the Half-Selection Problem.

PubMed

Zhao, Qiang; Wang, Hanlin; Ni, Zhenjie; Liu, Jie; Zhen, Yonggang; Zhang, Xiaotao; Jiang, Lang; Li, Rongjin; Dong, Huanli; Hu, Wenping

2017-09-01

Organic electronics based on poly(vinylidenefluoride/trifluoroethylene) (P(VDF-TrFE)) dielectric is facing great challenges in flexible circuits. As one indispensable part of integrated circuits, there is an urgent demand for low-cost and easy-fabrication nonvolatile memory devices. A breakthrough is made on a novel ferroelectric random access memory cell (1T1T FeRAM cell) consisting of one selection transistor and one ferroelectric memory transistor in order to overcome the half-selection problem. Unlike complicated manufacturing using multiple dielectrics, this system simplifies 1T1T FeRAM cell fabrication using one common dielectric. To achieve this goal, a strategy for semiconductor/insulator (S/I) interface modulation is put forward and applied to nonhysteretic selection transistors with high performances for driving or addressing purposes. As a result, high hole mobility of 3.81 cm 2 V -1 s -1 (average) for 2,6-diphenylanthracene (DPA) and electron mobility of 0.124 cm 2 V -1 s -1 (average) for N,N'-1H,1H-perfluorobutyl dicyanoperylenecarboxydiimide (PDI-FCN 2 ) are obtained in selection transistors. In this work, we demonstrate this technology's potential for organic ferroelectric-based pixelated memory module fabrication. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Status and Prospects of ZnO-Based Resistive Switching Memory Devices

NASA Astrophysics Data System (ADS)

Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

2016-08-01

In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

Probing material conductivity in two-terminal devices by resistance difference

NASA Astrophysics Data System (ADS)

Lu, Yang; Chen, I.-Wei

2017-08-01

It is generally impossible in two-terminal devices to separate the resistance of the device material from the parasitic resistance of terminals, interfaces, and serial loads, yet such information is needed to understand device physics. Here, we present an exact resistance-difference analysis, for a library of similarly configured two-terminal devices with self-similar material responses to external perturbations (electric current, temperature, and magnetic field), to obtain the relative conductivity change Δσ/σ in the device material using device-resistance data only. An outstanding example is nanometallic Mo/Si3N4:Pt/Pt resistance memory, in which electrons in Si3N4:Pt—the device material—display entirely different physics from those in the Pt and Mo electrodes. Our method unraveled their individual Δσ/σ, which for Si3N4:Pt exhibits self-similarity over different resistance states and film thicknesses.

Bubble memory module for spacecraft application

NASA Technical Reports Server (NTRS)

Hayes, P. J.; Looney, K. T.; Nichols, C. D.

1985-01-01

Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan

High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio andmore » good memory retention.« less

Reconfigurable pipelined processor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saccardi, R.J.

1989-09-19

This patent describes a reconfigurable pipelined processor for processing data. It comprises: a plurality of memory devices for storing bits of data; a plurality of arithmetic units for performing arithmetic functions with the data; cross bar means for connecting the memory devices with the arithmetic units for transferring data therebetween; at least one counter connected with the cross bar means for providing a source of addresses to the memory devices; at least one variable tick delay device connected with each of the memory devices and arithmetic units; and means for providing control bits to the variable tick delay device formore » variably controlling the input and output operations thereof to selectively delay the memory devices and arithmetic units to align the data for processing in a selected sequence.« less

Static Behavior of Chalcogenide Based Programmable Metallization Cells

NASA Astrophysics Data System (ADS)

Rajabi, Saba

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization. To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities. The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior. The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.

EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

NASA Astrophysics Data System (ADS)

Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

2011-06-01

Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show that limiting the current during electroforming leads to the coexistence of two resistance switching modes in TiO2 memristive devices [2]. They also present spectromicroscopic observations and modelling results for the Joule heating during switching, providing insights into the ON/OFF switching process [3]. Researchers in Korea have examined in detail the mechanism of electronic bipolar resistance switching in the Pt/TiO2/Pt structure and show that degradation in switching performance of this system can be explained by the modified distribution of trap densities [4]. The issue also includes studies of TiO2 that demonstrate analog memory, synaptic plasticity, and spike-timing-dependent plasticity functions, work that contributes to the development of neuromorphic devices that have high efficiency and low power consumption [5]. In addition to enabling a wide range of data storage and logic applications, electroresistive non-volatile memories invite us to re-evaluate the long-held paradigms in the condensed matter physics of oxides. In the past three years, much attention has been attracted to polarization-mediated electronic transport [6, 7] and domain wall conduction [8] as the key to the next generation of electronic and spintronic devices based on ferroelectric tunnelling barriers. Typically local probe experiments are performed on an ambient scanning probe microscope platform under conditions of high voltage stresses, conditions highly conducive to electrochemical reactions. Recent experiments [9-13] suggest that ionic motion can heavily contribute to the measured responses and compete with purely physical mechanisms. Electrochemical effects can also be expected in non-ferroelectric materials such as manganites and cobaltites, as well as for thick ferroelectrics under high-field conditions, as in capacitors and tunnelling junctions where the ionic motion could be a major contributor to electric field-induced strain. Such strain, in turn, can affect the effective barrier width in tunnelling experiments, resulting in memristive ionic switching. These phenomena must be differentiated from intrinsic physical polarization switching effects. Similar analysis of solid-state electrochemistry versus physical mechanisms is also important for future research in all areas of oxide materials. In an age where miniaturised computer components can enable GPS tracking, internet access and even the remote operation of machinery from a mobile phone, there is an endearing quaintness associated with images of the large rooms rammed with wires and boxes that comprised early computers. Yet there was a time when these cumbersome devices were state of the art. When the electronic numerical integrator and computer (ENIAC) was developed it achieved speeds one thousand times faster than previous electromechanical machines, a leap in processing power that has not been achieved since. It is easy to imagine future generations looking back on the slow start up and shut down times and high energy consumption of today's computers with a similar wry smile. The articles in this special issue on non-volatile memory based on nanostructures present the very latest research into the next generation's device technology, which may eventually consign today's cutting edge electronics to the history books. References [1] Ryu S W et al 2011 Nanotechnology 22 254005 [2] Miao F, Yang J J, Borghetti J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 254007 [3] Strachan J P, Strukov D B, Borghetti J, Yang J J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 245015 [4] Kim K M, Choi B J, Lee M H, Kim G H, Song S J, Seok J Y, Yoon J H, Han S and Hwang C S 2011 Nanotechnology 22 254010 [5] Seo K et al 2011 Nanotechnology 22 254023 [6] Garcia V, Fusil S, Bouzehouane K, Enouz-Vedrenne S, Mathur N D, Barthelemy A and Bibes M 2009 Nature 460 81-4 [7] Maksymovych P, Jesse S, Yu P, Ramesh R, Baddorf A P and Kalinin S V 2009 Science 324 1421 [8] Seidel J et al 2009 Nature Mat. 8 229 [9] Tsuruoka T, Terabe K, Hasegawa T, and Aono M 2010 Nanotechnology 21 425205 [10] Waser R and Aono M 2007 Nature Mat. 6 833 [11] Sawa A 2008 Materials Today 11 28 [12] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 Nature 453 80 Changes were made to this Editorial on 16 May 2011. An author was added to the Editorial.

Microscopic origin of read current noise in TaOx-based resistive switching memory by ultra-low temperature measurement

NASA Astrophysics Data System (ADS)

Pan, Yue; Cai, Yimao; Liu, Yefan; Fang, Yichen; Yu, Muxi; Tan, Shenghu; Huang, Ru

2016-04-01

TaOx-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaOx-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25 K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaOx RRAM devices. A statistical comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaOx RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activation of conduction centers that form the percolation network. At last, a unified model in the framework of hopping conduction is proposed to explain the underlying mechanism of both RTN and ACF noise, which can provide meaningful guidelines for designing noise-immune RRAM devices.

Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

PubMed

Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

2015-03-04

Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

Forming-free and self-rectifying resistive switching of the simple Pt/TaOx/n-Si structure for access device-free high-density memory application

NASA Astrophysics Data System (ADS)

Gao, Shuang; Zeng, Fei; Li, Fan; Wang, Minjuan; Mao, Haijun; Wang, Guangyue; Song, Cheng; Pan, Feng

2015-03-01

The search for self-rectifying resistive memories has aroused great attention due to their potential in high-density memory applications without additional access devices. Here we report the forming-free and self-rectifying bipolar resistive switching behavior of a simple Pt/TaOx/n-Si tri-layer structure. The forming-free phenomenon is attributed to the generation of a large amount of oxygen vacancies, in a TaOx region that is in close proximity to the TaOx/n-Si interface, via out-diffusion of oxygen ions from TaOx to n-Si. A maximum rectification ratio of ~6 × 102 is obtained when the Pt/TaOx/n-Si devices stay in a low resistance state, which originates from the existence of a Schottky barrier between the formed oxygen vacancy filament and the n-Si electrode. More importantly, numerical simulation reveals that the self-rectifying behavior itself can guarantee a maximum crossbar size of 212 × 212 (~44 kbit) on the premise of 10% read margin. Moreover, satisfactory switching uniformity and retention performance are observed based on this simple tri-layer structure. All of these results demonstrate the great potential of this simple Pt/TaOx/n-Si tri-layer structure for access device-free high-density memory applications.The search for self-rectifying resistive memories has aroused great attention due to their potential in high-density memory applications without additional access devices. Here we report the forming-free and self-rectifying bipolar resistive switching behavior of a simple Pt/TaOx/n-Si tri-layer structure. The forming-free phenomenon is attributed to the generation of a large amount of oxygen vacancies, in a TaOx region that is in close proximity to the TaOx/n-Si interface, via out-diffusion of oxygen ions from TaOx to n-Si. A maximum rectification ratio of ~6 × 102 is obtained when the Pt/TaOx/n-Si devices stay in a low resistance state, which originates from the existence of a Schottky barrier between the formed oxygen vacancy filament and the n-Si electrode. More importantly, numerical simulation reveals that the self-rectifying behavior itself can guarantee a maximum crossbar size of 212 × 212 (~44 kbit) on the premise of 10% read margin. Moreover, satisfactory switching uniformity and retention performance are observed based on this simple tri-layer structure. All of these results demonstrate the great potential of this simple Pt/TaOx/n-Si tri-layer structure for access device-free high-density memory applications. Electronic supplementary information (ESI) available. See DOI: 10.1039/c4nr06406b

Disorder-induced localization in crystalline phase-change materials.

PubMed

Siegrist, T; Jost, P; Volker, H; Woda, M; Merkelbach, P; Schlockermann, C; Wuttig, M

2011-03-01

Localization of charge carriers in crystalline solids has been the subject of numerous investigations over more than half a century. Materials that show a metal-insulator transition without a structural change are therefore of interest. Mechanisms leading to metal-insulator transition include electron correlation (Mott transition) or disorder (Anderson localization), but a clear distinction is difficult. Here we report on a metal-insulator transition on increasing annealing temperature for a group of crystalline phase-change materials, where the metal-insulator transition is due to strong disorder usually associated only with amorphous solids. With pronounced disorder but weak electron correlation, these phase-change materials form an unparalleled quantum state of matter. Their universal electronic behaviour seems to be at the origin of the remarkable reproducibility of the resistance switching that is crucial to their applications in non-volatile-memory devices. Controlling the degree of disorder in crystalline phase-change materials might enable multilevel resistance states in upcoming storage devices.

The Non-innocent Phenalenyl Unit: An Electronic Nest to Modulate the Catalytic Activity in Hydroamination Reaction

PubMed Central

Mukherjee, Arup; Sen, Tamal K.; Ghorai, Pradip Kr; Mandal, Swadhin K.

2013-01-01

The phenalenyl unit has played intriguing role in different fields of research spanning from chemistry, material chemistry to device physics acting as key electronic reservoir which has not only led to the best organic single component conductor but also created the spin memory device of next generation. Now we show the non-innocent behaviour of phenalenyl unit in modulating the catalytic behaviour in a homogeneous organic transformation. The present study establishes that the cationic state of phenalenyl unit can act as an organic Lewis acceptor unit to influence the catalytic outcome of intermolecular hydroamination reaction of carbodiimides. For the present study, we utilized organoaluminum complexes of phenalenyl ligands in which the phenalenyl unit maintains the closed shell electronic state. The DFT calculation reveals that the energy of LUMO of the catalyst is mainly controlled by phenalenyl ligands which in turn determines the outcome of the catalysis. PMID:24084653

DFT investigations on mechanical stability, electronic structure and magnetism in Co2TaZ (Z = Al, Ga, In) heusler alloys

NASA Astrophysics Data System (ADS)

Khandy, Shakeel Ahmad; Gupta, Dinesh C.

2017-12-01

Ferromagnetic Heusler compounds have vast and imminent applications for novel devices, smart materials thanks to density functional theory (DFT) based simulations, which have scored out a new approach to study these materials. We forecast the structural stability of Co2TaZ alloys on the basis of total energy calculations and mechanical stability criteria. The elastic constants, robust spin-polarized ferromagnetism and electron densities in these half-metallic alloys are also discussed. The observed structural aspects calculated to predict the stability and equilibrium lattice parameters agree well with the experimental results. The elastic parameters like elastic constants, bulk, Young’s and shear moduli, poison’s and Pugh ratios, melting temperatures, etc have been put together to establish their mechanical properties. The elaborated electronic band structures along with indirect band gaps and spin polarization favour the application of these materials in spintronics and memory device technology.

Moisture-triggered physically transient electronics

PubMed Central

Gao, Yang; Zhang, Ying; Wang, Xu; Sim, Kyoseung; Liu, Jingshen; Chen, Ji; Feng, Xue; Xu, Hangxun; Yu, Cunjiang

2017-01-01

Physically transient electronics, a form of electronics that can physically disappear in a controllable manner, is very promising for emerging applications. Most of the transient processes reported so far only occur in aqueous solutions or biofluids, offering limited control over the triggering and degradation processes. We report novel moisture-triggered physically transient electronics, which exempt the needs of resorption solutions and can completely disappear within well-controlled time frames. The triggered transient process starts with the hydrolysis of the polyanhydride substrate in the presence of trace amounts of moisture in the air, a process that can generate products of corrosive organic acids to digest various inorganic electronic materials and components. Polyanhydride is the only example of polymer that undergoes surface erosion, a distinct feature that enables stable operation of the functional devices over a predefined time frame. Clear advantages of this novel triggered transience mode include that the lifetime of the devices can be precisely controlled by varying the moisture levels and changing the composition of the polymer substrate. The transience time scale can be tuned from days to weeks. Various transient devices, ranging from passive electronics (such as antenna, resistor, and capacitor) to active electronics (such as transistor, diodes, optoelectronics, and memories), and an integrated system as a platform demonstration have been developed to illustrate the concept and verify the feasibility of this design strategy. PMID:28879237

An upconverted photonic nonvolatile memory.

PubMed

Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L

2014-08-21

Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

Users Guide on Scaled CMOS Reliability: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

NASA Technical Reports Server (NTRS)

White, Mark; Cooper, Mark; Johnston, Allan

2011-01-01

Reliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Bin; Wang, Xue -Peng; Shen, Zhen -Ju

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) atmore » an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Furthermore, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe.« less

An Investigation of Quantum Dot Super Lattice Use in Nonvolatile Memory and Transistors

NASA Astrophysics Data System (ADS)

Mirdha, P.; Parthasarathy, B.; Kondo, J.; Chan, P.-Y.; Heller, E.; Jain, F. C.

2018-02-01

Site-specific self-assembled colloidal quantum dots (QDs) will deposit in two layers only on p-type substrate to form a QD superlattice (QDSL). The QDSL structure has been integrated into the floating gate of a nonvolatile memory component and has demonstrated promising results in multi-bit storage, ease of fabrication, and memory retention. Additionally, multi-valued logic devices and circuits have been created by using QDSL structures which demonstrated ternary and quaternary logic. With increasing use of site-specific self-assembled QDSLs, fundamental understanding of silicon and germanium QDSL charge storage capability, self-assembly on specific surfaces, uniform distribution, and mini-band formation has to be understood for successful implementation in devices. In this work, we investigate the differences in electron charge storage by building metal-oxide semiconductor (MOS) capacitors and using capacitance and voltage measurements to quantify the storage capabilities. The self-assembly process and distribution density of the QDSL is done by obtaining atomic force microscopy (AFM) results on line samples. Additionally, we present a summary of the theoretical density of states in each of the QDSLs.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

An oscillator based on a single Au nanocluster

NASA Astrophysics Data System (ADS)

Gorshkov, O. N.; Filatov, D. O.; Antonov, D. A.; Antonov, I. N.; Shenina, M. E.; Pavlov, D. A.

2017-01-01

Metal nanoclusters embedded into the ultrathin dielectric films attracted much attention in recent years due to their unusual electronic, optical, etc., properties differing from those of the bulk metals essentially and, hence, to the prospects of their applications in novel nanoelectronic, single electronic, non-volatile memory, etc., devices. Here, we report on the experimental observation of the electrical oscillations in an oscillating loop connected to a contact of a conductive probe of an Atomic Force Microscope to a tunnel-transparent ( ˜6.5 nm thick) yttria stabilized zirconia film with embedded Au nanoclusters on the Si substrate. The oscillations were attributed to the negative differential resistance of the probe-to-sample contact originating from the resonant electron tunnelling between the probe and the Si substrate via the quantum confined electron energy levels in small ( ≈2.5 nm in diameter) Au nanoclusters. This observation demonstrates the prospects of building an oscillator nanoelectronic device based on an individual nanometer-sized metal nanocluster.

Impact of Stoichiometry on the Structure of van der Waals Layered GeTe/Sb2 Te3 Superlattices Used in Interfacial Phase-Change Memory (iPCM) Devices.

PubMed

Kowalczyk, Philippe; Hippert, Françoise; Bernier, Nicolas; Mocuta, Cristian; Sabbione, Chiara; Batista-Pessoa, Walter; Noé, Pierre

2018-06-01

Van der Waals layered GeTe/Sb 2 Te 3 superlattices (SLs) have demonstrated outstanding performances for use in resistive memories in so-called interfacial phase-change memory (iPCM) devices. GeTe/Sb 2 Te 3 SLs are made by periodically stacking ultrathin GeTe and Sb 2 Te 3 crystalline layers. The mechanism of the resistance change in iPCM devices is still highly debated. Recent experimental studies on SLs grown by molecular beam epitaxy or pulsed laser deposition indicate that the local structure does not correspond to any of the previously proposed structural models. Here, a new insight is given into the complex structure of prototypical GeTe/Sb 2 Te 3 SLs deposited by magnetron sputtering, which is the used industrial technique for SL growth in iPCM devices. X-ray diffraction analysis shows that the structural quality of the SL depends critically on its stoichiometry. Moreover, high-angle annular dark-field-scanning transmission electron microscopy analysis of the local atomic order in a perfectly stoichiometric SL reveals the absence of GeTe layers, and that Ge atoms intermix with Sb atoms in, for instance, Ge 2 Sb 2 Te 5 blocks. This result shows that an alternative structural model is required to explain the origin of the electrical contrast and the nature of the resistive switching mechanism observed in iPCM devices. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Single-chip microprocessor that communicates directly using light

NASA Astrophysics Data System (ADS)

Sun, Chen; Wade, Mark T.; Lee, Yunsup; Orcutt, Jason S.; Alloatti, Luca; Georgas, Michael S.; Waterman, Andrew S.; Shainline, Jeffrey M.; Avizienis, Rimas R.; Lin, Sen; Moss, Benjamin R.; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H.; Cook, Henry M.; Ou, Albert J.; Leu, Jonathan C.; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J.; Popović, Miloš A.; Stojanović, Vladimir M.

2015-12-01

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

Single-chip microprocessor that communicates directly using light.

PubMed

Sun, Chen; Wade, Mark T; Lee, Yunsup; Orcutt, Jason S; Alloatti, Luca; Georgas, Michael S; Waterman, Andrew S; Shainline, Jeffrey M; Avizienis, Rimas R; Lin, Sen; Moss, Benjamin R; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H; Cook, Henry M; Ou, Albert J; Leu, Jonathan C; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J; Popović, Miloš A; Stojanović, Vladimir M

2015-12-24

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems--from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a 'zero-change' approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

New Ferroelectric Phase in Atomic-Thick Phosphorene Nanoribbons: Existence of in-Plane Electric Polarization.

PubMed

Hu, Ting; Wu, Haiping; Zeng, Haibo; Deng, Kaiming; Kan, Erjun

2016-12-14

Ferroelectrics have many significant applications in electric devices, such as capacitor or random-access memory, tuning the efficiency of solar cell. Although atomic-thick ferroelectrics are the necessary components for high-density electric devices or nanoscale devices, the development of such materials still faces a big challenge because of the limitation of intrinsic mechanism. Here, we reported that in-plane atomic-thick ferroelectricity can be induced by vertical electric field in phosphorene nanoribbons (PNRs). Through symmetry arguments, we predicted that ferroelectric direction is perpendicular to the direction of external electric field and lies in the plane. Further confirmed by the comprehensive first-principles calculations, we showed that such ferroelectricity is induced by the electron-polarization, which is different from the structural distortion in traditional ferroelectrics and the recent experimental discovery of in-plane atomic-thick ferroelectrics (Science 2016, 353, 274). Moreover, we found that the value of electronic polarization in bilayer is much larger than that in monolayer. Our results show that electron-polarization ferroelectricity maybe the most promising candidate for atomic-thick ferroelectrics.

All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron.

PubMed

Zhang, Deming; Zeng, Lang; Cao, Kaihua; Wang, Mengxing; Peng, Shouzhong; Zhang, Yue; Zhang, Youguang; Klein, Jacques-Olivier; Wang, Yu; Zhao, Weisheng

2016-08-01

Artificial synaptic devices implemented by emerging post-CMOS non-volatile memory technologies such as Resistive RAM (RRAM) have made great progress recently. However, it is still a big challenge to fabricate stable and controllable multilevel RRAM. Benefitting from the control of electron spin instead of electron charge, spintronic devices, e.g., magnetic tunnel junction (MTJ) as a binary device, have been explored for neuromorphic computing with low power dissipation. In this paper, a compound spintronic device consisting of multiple vertically stacked MTJs is proposed to jointly behave as a synaptic device, termed as compound spintronic synapse (CSS). Based on our theoretical and experimental work, it has been demonstrated that the proposed compound spintronic device can achieve designable and stable multiple resistance states by interfacial and materials engineering of its components. Additionally, a compound spintronic neuron (CSN) circuit based on the proposed compound spintronic device is presented, enabling a multi-step transfer function. Then, an All Spin Artificial Neural Network (ASANN) is constructed with the CSS and CSN circuit. By conducting system-level simulations on the MNIST database for handwritten digital recognition, the performance of such ASANN has been investigated. Moreover, the impact of the resolution of both the CSS and CSN and device variation on the system performance are discussed in this work.

Quantitative Observation of Threshold Defect Behavior in Memristive Devices with Operando X-ray Microscopy.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Huajun; Dong, Yongqi; Cherukara, Matthew J.

Memristive devices are an emerging technology that enables both rich interdisciplinary science and novel device functionalities, such as nonvolatile memories and nanoionics-based synaptic electronics. Recent work has shown that the reproducibility and variability of the devices depend sensitively on the defect structures created during electroforming as well as their continued evolution under dynamic electric fields. However, a fundamental principle guiding the material design of defect structures is still lacking due to the difficulty in understanding dynamic defect behavior under different resistance states. Here, we unravel the existence of threshold behavior by studying model, single-crystal devices: resistive switching requires that themore » pristine oxygen vacancy concentration reside near a critical value. Theoretical calculations show that the threshold oxygen vacancy concentration lies at the boundary for both electronic and atomic phase transitions. Through operando, multimodal X-ray imaging, we show that field tuning of the local oxygen vacancy concentration below or above the threshold value is responsible for switching between different electrical states. These results provide a general strategy for designing functional defect structures around threshold concentrations to create dynamic, field-controlled phases for memristive devices.« less

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

DOEpatents

Asaad, Sameh W.; Kapur, Mohit

2016-03-15

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

Memory and Spin Injection Devices Involving Half Metals

DOE PAGES

Shaughnessy, M.; Snow, Ryan; Damewood, L.; ...

2011-01-01

We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

NASA Technical Reports Server (NTRS)

Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)

2000-01-01

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

High-Performance Flexible Organic Nano-Floating Gate Memory Devices Functionalized with Cobalt Ferrite Nanoparticles.

PubMed

Jung, Ji Hyung; Kim, Sunghwan; Kim, Hyeonjung; Park, Jongnam; Oh, Joon Hak

2015-10-07

Nano-floating gate memory (NFGM) devices are transistor-type memory devices that use nanostructured materials as charge trap sites. They have recently attracted a great deal of attention due to their excellent performance, capability for multilevel programming, and suitability as platforms for integrated circuits. Herein, novel NFGM devices have been fabricated using semiconducting cobalt ferrite (CoFe2O4) nanoparticles (NPs) as charge trap sites and pentacene as a p-type semiconductor. Monodisperse CoFe2O4 NPs with different diameters have been synthesized by thermal decomposition and embedded in NFGM devices. The particle size effects on the memory performance have been investigated in terms of energy levels and particle-particle interactions. CoFe2O4 NP-based memory devices exhibit a large memory window (≈73.84 V), a high read current on/off ratio (read I(on)/I(off)) of ≈2.98 × 10(3), and excellent data retention. Fast switching behaviors are observed due to the exceptional charge trapping/release capability of CoFe2O4 NPs surrounded by the oleate layer, which acts as an alternative tunneling dielectric layer and simplifies the device fabrication process. Furthermore, the NFGM devices show excellent thermal stability, and flexible memory devices fabricated on plastic substrates exhibit remarkable mechanical and electrical stability. This study demonstrates a viable means of fabricating highly flexible, high-performance organic memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

On Nibbles and Bytes: The Conundrum of Memory for Space Systems - NASA Electronic Parts and Packaging (NEPP) and Efforts in Memories

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Ladbury, Ray; Pellish, Jonathan; Sheldon, Douglas; Oldham, Timothy; Berg, Melanie D.; Cohn, Lewis M.

2009-01-01

Radiation requirements and trends. TID: 1) >90% of NASA applications are < 100 krads-Si in piecepart requirements. a) Many commercial devices (NVM and SDRAMs) meet or come close to this. b) Charge pump TID tolerance has improved an order magnitude over the last 10 years. 2) There are always a few programs with higher level needs and, of course, defense needs SEL: 1) Prefer none or rates that are considered low risk. a) Latent damage is a bear to deal with. 2) As we re packing cells tighter and even with lower Vdd, we re seeing SEL on commercial devices regularly (<90nm). a) Often in power conversion, I/O, or control areas. SEU: 1) It s not the bit errors, it s the SEFIs errors that are the biggest issues. a) Scrubbing concerns for risk, power, speed.

Resistive switching mechanism of Ag/ZrO2:Cu/Pt memory cell

NASA Astrophysics Data System (ADS)

Long, Shibing; Liu, Qi; Lv, Hangbing; Li, Yingtao; Wang, Yan; Zhang, Sen; Lian, Wentai; Zhang, Kangwei; Wang, Ming; Xie, Hongwei; Liu, Ming

2011-03-01

Resistive switching mechanism of zirconium oxide-based resistive random access memory (RRAM) devices composed of Cu-doped ZrO2 film sandwiched between an oxidizable electrode and an inert electrode was investigated. The Ag/ZrO2:Cu/Pt RRAM devices with crosspoint structure fabricated by e-beam evaporation and e-beam lithography show reproducible bipolar resistive switching. The linear I- V relationship of low resistance state (LRS) and the dependence of LRS resistance ( R ON) and reset current ( I reset) on the set current compliance ( I comp) indicate that the observed resistive switching characteristics of the Ag/ZrO2:Cu/Pt device should be ascribed to the formation and annihilation of localized conductive filaments (CFs). The physical origin of CF was further analyzed by transmission electron microscopy (TEM) and energy dispersive X-ray spectroscopy (EDS). CFs were directly observed by cross-sectional TEM. According to EDS and elemental mapping analysis, the main chemical composition of CF is determined by Ag atoms, coming from the Ag top electrode. On the basis of these experiments, we propose that the set and reset process of the device stem from the electrochemical reactions in the zirconium oxide under different external electrical stimuli.

Octonary resistance states in La 0.7Sr 0.3MnO 3/BaTiO 3/La 0.7Sr 0.3MnO 3 multiferroic tunnel junctions

DOE PAGES

Yue -Wei Yin; Tao, Jing; Huang, Wei -Chuan; ...

2015-10-06

General drawbacks of current electronic/spintronic devices are high power consumption and low density storage. A multiferroic tunnel junction (MFTJ), employing a ferroelectric barrier layer sandwiched between two ferromagnetic layers, presents four resistance states in a single device and therefore provides an alternative way to achieve high density memories. Here, an MFTJ device with eight nonvolatile resistance states by further integrating the design of noncollinear magnetization alignments between the ferromagnetic layers is demonstrated. Through the angle-resolved tunneling magnetoresistance investigations on La 0.7Sr 0.3MnO 3/BaTiO 3/La 0.7Sr 0.3MnO 3 junctions, it is found that, besides collinear parallel/antiparallel magnetic configurations, the MFTJ showsmore » at least two other stable noncollinear (45° and 90°) magnetic configurations. As a result, combining the tunneling electroresistance effect caused by the ferroelectricity reversal of the BaTiO 3 barrier, an octonary memory device is obtained, representing potential applications in high density nonvolatile storage in the future.« less

Oxygen plasma immersion ion implantation treatment to enhance data retention of tungsten nanocrystal nonvolatile memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Jer-Chyi, E-mail: jcwang@mail.cgu.edu.tw; Chang, Wei-Cheng; Lai, Chao-Sung, E-mail: cslai@mail.cgu.edu.tw

Data retention characteristics of tungsten nanocrystal (W-NC) memory devices using an oxygen plasma immersion ion implantation (PIII) treatment are investigated. With an increase of oxygen PIII bias voltage and treatment time, the capacitance–voltage hysteresis memory window is increased but the data retention characteristics become degraded. High-resolution transmission electron microscopy images show that this poor data retention is a result of plasma damage on the tunneling oxide layer, which can be prevented by lowering the bias voltage to 7 kV. In addition, by using the elevated temperature retention measurement technique, the effective charge trapping level of the WO{sub 3} film surrounding themore » W-NCs can be extracted. This measurement reveals that a higher oxygen PIII bias voltage and treatment time induces more shallow traps within the WO{sub 3} film, degrading the retention behavior of the W-NC memory.« less

1T1R Nonvolatile Memory with Al/TiO₂/Au and Sol-Gel-Processed Insulator for Barium Zirconate Nickelate Gate in Pentacene Thin Film Transistor.

PubMed

Lee, Ke-Jing; Chang, Yu-Chi; Lee, Cheng-Jung; Wang, Li-Wen; Wang, Yeong-Her

2017-12-09

A one-transistor and one-resistor (1T1R) architecture with a resistive random access memory (RRAM) cell connected to an organic thin-film transistor (OTFT) device is successfully demonstrated to avoid the cross-talk issues of only one RRAM cell. The OTFT device, which uses barium zirconate nickelate (BZN) as a dielectric layer, exhibits favorable electrical properties, such as a high field-effect mobility of 5 cm²/Vs, low threshold voltage of -1.1 V, and low leakage current of 10 -12 A, for a driver in the 1T1R operation scheme. The 1T1R architecture with a TiO₂-based RRAM cell connected with a BZN OTFT device indicates a low operation current (10 μA) and reliable data retention (over ten years). This favorable performance of the 1T1R device can be attributed to the additional barrier heights introduced by using Ni (II) acetylacetone as a substitute for acetylacetone, and the relatively low leakage current of a BZN dielectric layer. The proposed 1T1R device with low leakage current OTFT and excellent uniform resistance distribution of RRAM exhibits a good potential for use in practical low-power electronic applications.

Conductive bridging random access memory—materials, devices and applications

NASA Astrophysics Data System (ADS)

Kozicki, Michael N.; Barnaby, Hugh J.

2016-11-01

We present a review and primer on the subject of conductive bridging random access memory (CBRAM), a metal ion-based resistive switching technology, in the context of current research and the near-term requirements of the electronics industry in ultra-low energy devices and new computing paradigms. We include extensive discussions of the materials involved, the underlying physics and electrochemistry, the critical roles of ion transport and electrode reactions in conducting filament formation and device switching, and the electrical characteristics of the devices. Two general cation material systems are given—a fast ion chacogenide electrolyte and a lower ion mobility oxide ion conductor, and numerical examples are offered to enhance understanding of the operation of devices based on these. The effect of device conditioning on the activation energy for ion transport and consequent switching speed is discussed, as well as the mechanisms involved in the removal of the conducting bridge. The morphology of the filament and how this could be influenced by the solid electrolyte structure is described, and the electrical characteristics of filaments with atomic-scale constrictions are discussed. Consideration is also given to the thermal and mechanical environments within the devices. Finite element and compact modelling illustrations are given and aspects of CBRAM storage elements in memory circuits and arrays are included. Considerable emphasis is placed on the effects of ionizing radiation on CBRAM since this is important in various high reliability applications, and the potential uses of the devices in reconfigurable logic and neuromorphic systems is also discussed.

EDITORIAL: Synaptic electronics Synaptic electronics

NASA Astrophysics Data System (ADS)

Demming, Anna; Gimzewski, James K.; Vuillaume, Dominique

2013-09-01

Conventional computers excel in logic and accurate scientific calculations but make hard work of open ended problems that human brains handle easily. Even von Neumann—the mathematician and polymath who first developed the programming architecture that forms the basis of today's computers—was already looking to the brain for future developments before his death in 1957 [1]. Neuromorphic computing uses approaches that better mimic the working of the human brain. Recent developments in nanotechnology are now providing structures with very accommodating properties for neuromorphic approaches. This special issue, with guest editors James K Gimzewski and Dominique Vuillaume, is devoted to research at the serendipitous interface between the two disciplines. 'Synaptic electronics', looks at artificial devices with connections that demonstrate behaviour similar to synapses in the nervous system allowing a new and more powerful approach to computing. Synapses and connecting neurons respond differently to incident signals depending on the history of signals previously experienced, ultimately leading to short term and long term memory behaviour. The basic characteristics of a synapse can be replicated with around ten simple transistors. However with the human brain having around 1011 neurons and 1015 synapses, artificial neurons and synapses from basic transistors are unlikely to accommodate the scalability required. The discovery of nanoscale elements that function as 'memristors' has provided a key tool for the implementation of synaptic connections [2]. Leon Chua first developed the concept of the 'The memristor—the missing circuit element' in 1971 [3]. In this special issue he presents a tutorial describing how memristor research has fed into our understanding of synaptic behaviour and how they can be applied in information processing [4]. He also describes, 'The new principle of local activity, which uncovers a minuscule life-enabling "Goldilocks zone", dubbed the edge of chaos, where complex phenomena, including creativity and intelligence, may emerge'. Also in this issue R Stanley Williams and colleagues report results from simulations that demonstrate the potential for using Mott transistors as building blocks for scalable neuristor-based integrated circuits without transistors [5]. The scalability of neural chip designs is also tackled in the design reported by Narayan Srinivasa and colleagues in the US [6]. Meanwhile Carsten Timm and Massimiliano Di Ventra describe simulations of a molecular transistor in which electrons strongly coupled to a vibrational mode lead to a Franck-Condon (FC) blockade that mimics the spiking action potentials in synaptic memory behaviour [7]. The 'atomic switches' used to demonstrate synaptic behaviour by a collaboration of researchers in California and Japan also come under further scrutiny in this issue. James K Gimzewski and colleagues consider the difference between the behaviour of an atomic switch in isolation and in a network [8]. As the authors point out, 'The work presented represents steps in a unified approach of experimentation and theory of complex systems to make atomic switch networks a uniquely scalable platform for neuromorphic computing'. Researchers in Germany [9] and Sweden [10] also report on theoretical approaches to modelling networks of memristive elements and complementary resistive switches for synaptic devices. As Vincent Derycke and colleagues in France point out, 'Actual experimental demonstrations of neural network type circuits based on non-conventional/non-CMOS memory devices and displaying function learning capabilities remain very scarce'. They describe how their work using carbon nanotubes provides a rare demonstration of actual function learning with synapses based on nanoscale building blocks [11]. However, this is far from the only experimental work reported in this issue, others include: short-term memory of TiO2-based electrochemical capacitors [12]; a neuromorphic circuit composed of a nanoscale 1-kbit resistive random-access memory (RRAM) cross-point array of synapses and complementary metal-oxide-semiconductor (CMOS) neuron circuits [13]; a WO3-x-based nanoionics device from Masakazu Aono's group with a wide scale of reprogrammable memorization functions [14]; a new spike-timing dependent plasticity scheme based on a MOS transistor as a selector and a RRAM as a variable resistance device [15]; a new hybrid memristor-CMOS neuromorphic circuit [16]; and a photo-assisted atomic switch [17]. Synaptic electronics evidently has many emerging facets, and Duygu Kuzum, Shimeng Yu, and H-S Philip Wong in the US provide a review of the field, including the materials, devices and applications [18]. In embracing the expertise acquired over thousands of years of evolution, biomimetics and bio-inspired design is a common, smart approach to technological innovation. Yet in successfully mimicking the physiological mechanisms of the human mind synaptic electronics research has a potential impact that is arguably unprecedented. That the quirks and eccentricities recently unearthed in the behaviour of nanomaterials should lend themselves so accommodatingly to emulating synaptic functions promises some very exciting developments in the field, as the articles in this special issue emphasize. References [1] von Neumann J (ed) 2012 The Computer and the Brain 3rd edn (Yale: Yale University Press) [2] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 The missing memristor found Nature 453 80-3 [3] Chua L O 1971 Memristor—the missing circuit element IEEE Trans. Circuit Theory 18 507-19 [4] Chua L O 2013 Memristor, Hodgkin-Huxley, and Edge of Chaos Nanotechnology 24 383001 [5] Pickett M D and Williams R S 2013 Phase transitions enable computational universality in neuristor-based cellular automata Nanotechnology 24 384002 [6] Cruz-Albrecht J M, Derosier T and Srinivasa N 2013 Scalable neural chip with synaptic electronics using CMOS integrated memristors Nanotechnology 24 384011 [7] Timm C and Di Ventra M 2013 Molecular neuron based on the Franck-Condon blockade Nanotechnology 24 384001 [8] Sillin H O, Aguilera R, Shieh H-H, Avizienis A V, Aono M, Stieg A Z and Gimzewski J K 2013 A theoretical and experimental study of neuromorphic atomic switch networks for reservoir computing Nanotechnology 24 384004 [9] Linn E, Menzel S, Ferch S and Waser R 2013 Compact modeling of CRS devices based on ECM cells for memory, logic and neuromorphic applications Nanotechnology 24 384008 [10] Konkoli Z and Wendin G 2013 A generic simulator for large networks of memristive elements Nanotechnology 24 384007 [11] Gacem K, Retrouvey J-M, Chabi D, Filoramo A, Zhao W, Klein J-O and Derycke V 2013 Neuromorphic function learning with carbon nanotube-based synapses Nanotechnology 24 384013 [12] Lim H, Kim I, Kim J-S, Hwang C S and Jeong D S 2013 Short-term memory of TiO2-based electrochemical capacitors: empirical analysis with adoption of a sliding threshold Nanotechnology 24 384005 [13] Park S, Noh J, Choo M-L, Sheri A M, Chang M, Kim Y-B, Kim C J, Jeon M, Lee B-G, Lee B H and Hwang H 2013 Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device Nanotechnology 24 384009 [14] Yang R, Terabe K, Yao Y, Tsuruoka T, Hasegawa T, Gimzewski J K and Aono M 2013 Synaptic plasticity and memory functions achieved in WO3-x-based nanoionics device by using principle of atomic switch operation Nanotechnology 24 384002 [15] Ambrogio S, Balatti S, Nardi F, Facchinetti S and Ielmini D 2013 Spike-timing dependent plasticity in a transistor-selected resistive switching memory Nanotechnology 24 384012 [16] Indiveria G, Linares-Barranco B, Legenstein R, Deligeorgis G and Prodromakise T 2013 Integration of nanoscale memristor synapses in neuromorphic computing architectures Nanotechnology 24 384010 [17] Hino T, Hasegawa T, Tanaka H, Tsuruoka T, Terabe K, Ogawa T and Aono M 2013 Volatile and nonvolatile selective switching of a photo-assited initialized atomic switch Nanotechnology 24 384006 [18] Kuzum D, Yu S and Wong H-S P 2013 Synaptic electronics: materials, devices and applications Nanotechnology 24 382001

Computational Nanotechnology of Materials, Devices, and Machines: Carbon Nanotubes

NASA Technical Reports Server (NTRS)

Srivastava, Deepak; Kwak, Dolhan (Technical Monitor)

2000-01-01

The mechanics and chemistry of carbon nanotubes have relevance for their numerous electronic applications. Mechanical deformations such as bending and twisting affect the nanotube's conductive properties, and at the same time they possess high strength and elasticity. Two principal techniques were utilized including the analysis of large scale classical molecular dynamics on a shared memory architecture machine and a quantum molecular dynamics methodology. In carbon based electronics, nanotubes are used as molecular wires with topological defects which are mediated through various means. Nanotubes can be connected to form junctions.

A software upgrade method for micro-electronics medical implants.

PubMed

Cao, Yang; Hao, Hongwei; Xue, Lin; Li, Luming; Ma, Bozhi

2006-01-01

A software upgrade method for micro-electronics medical implants is designed to enhance the devices' function or renew the software if there are some bugs found, the software updating or some memory units disabled. The implants needn't be replaced by operations if the faults can be corrected through reprogramming, which reduces the patients' pain and improves the safety effectively. This paper introduces the software upgrade method using in-application programming (IAP) and emphasizes how to insure the system, especially the implanted part's reliability and stability while upgrading.

One bipolar transistor selector - One resistive random access memory device for cross bar memory array

NASA Astrophysics Data System (ADS)

Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

2017-09-01

A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

Satellite Test of Radiation Impact on Ramtron 512K FRAM

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Sayyah, Rana; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

2009-01-01

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

Nanomaterials for Electronics and Optoelectronics

NASA Technical Reports Server (NTRS)

Koehne, Jessica E.; Meyyappan, M.

2011-01-01

Nanomaterials such as carbon nanotubes(CNTs), graphene, and inorganic nanowires(INWs) have shown interesting electronic, mechanical, optical, thermal, and other properties and therefore have been pursued for a variety of applications by the nanotechnology community ranging from electronics to nanocomposites. While the first two are carbon-based materials, the INWs in the literature include silicon, germanium, III-V, II-VI, a variety of oxides, nitrides, antimonides and others. In this talk, first an overview of growth of these three classes of materials by CVD and PECVD will be presented along with results from characterization. Then applications in development of chemical sensors, biosensors, energy storage devices and novel memory architectures will be discussed.

Spiers memorial lecture. Organic electronics: an organic materials perspective.

PubMed

Wudl, Fred

2014-01-01

This Introductory Lecture is intended to provide a background to Faraday Discussion 174: "Organic Photonics and Electronics" and will consist of a chronological, subjective review of organic electronics. Starting with "ancient history" (1888) and history (1950-present), the article will take us to the present. The principal developments involved the processes of charge carrier generation and charge transport in molecular solids, starting with insulators (photoconductors) and moving to metals, to semiconductors and ending with the most popular semiconductor devices, such as organic light-emitting diodes (OLEDs), organic field effect transistors (OFETs) and organic photovoltaics (OPVs). The presentation will be from an organic chemistry/materials point of view.

Synthesis and electron storage characteristics of isolated silver nanodots on/embedded in Al 2O 3 gate dielectric

NASA Astrophysics Data System (ADS)

Wang, Q.; Song, Z. T.; Liu, W. L.; Lin, C. L.; Wang, T. H.

2004-05-01

Monolayer-isolated silver (Ag) nanodots with the average diameter down to 7 nm are synthesized on Al 2O 3/Si substrate by vacuum electron-beam evaporation followed by annealing at 400 °C in N 2 ambient. Metal-insulator-silicon (MIS) structures with Ag nanodots embedded in Al 2O 3 gate dielectric are fabricated. Clear electron storage effect with the flatband voltage shift of 1.3 eV is observed through capacitance-conductance and conductance-voltage measurements. Our results demonstrate the feasibility of applying Ag nanodots for nanocrystal floating-gate memory devices.

Xyce Parallel Electronic Simulator : users' guide, version 2.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hoekstra, Robert John; Waters, Lon J.; Rankin, Eric Lamont

2004-06-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator capable of simulating electrical circuits at a variety of abstraction levels. Primarily, Xyce has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability the current state-of-the-art in the following areas: {sm_bullet} Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers. {sm_bullet} Improved performance for allmore » numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-art algorithms and novel techniques. {sm_bullet} Device models which are specifically tailored to meet Sandia's needs, including many radiation-aware devices. {sm_bullet} A client-server or multi-tiered operating model wherein the numerical kernel can operate independently of the graphical user interface (GUI). {sm_bullet} Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing of computing platforms. These include serial, shared-memory and distributed-memory parallel implementation - which allows it to run efficiently on the widest possible number parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. One feature required by designers is the ability to add device models, many specific to the needs of Sandia, to the code. To this end, the device package in the Xyce These input formats include standard analytical models, behavioral models look-up Parallel Electronic Simulator is designed to support a variety of device model inputs. tables, and mesh-level PDE device models. Combined with this flexible interface is an architectural design that greatly simplifies the addition of circuit models. One of the most important feature of Xyce is in providing a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia now has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods) research and development can be performed. Ultimately, these capabilities are migrated to end users.« less

Excellent Resistive Switching Performance of Cu-Se-Based Atomic Switch Using Lanthanide Metal Nanolayer at the Cu-Se/Al2O3 Interface.

PubMed

Woo, Hyunsuk; Vishwanath, Sujaya Kumar; Jeon, Sanghun

2018-03-07

The next-generation electronic society is dependent on the performance of nonvolatile memory devices, which has been continuously improving. In the last few years, many memory devices have been introduced. However, atomic switches are considered to be a simple and reliable basis for next-generation nonvolatile devices. In general, atomic switch-based resistive switching is controlled by electrochemical metallization. However, excess ion injection from the entire area of the active electrode into the switching layer causes device nonuniformity and degradation of reliability. Here, we propose the fabrication of a high-performance atomic switch based on Cu x -Se 1- x by inserting lanthanide (Ln) metal buffer layers such as neodymium (Nd), samarium (Sm), dysprosium (Dy), or lutetium (Lu) between the active metal layer and the electrolyte. Current-atomic force microscopy results confirm that Cu ions penetrate through the Ln-buffer layer and form thin conductive filaments inside the switching layer. Compared with the Pt/Cu x -Se 1- x /Al 2 O 3 /Pt device, the optimized Pt/Cu x -Se 1- x /Ln/Al 2 O 3 /Pt devices show improvement in the on/off resistance ratio (10 2 -10 7 ), retention (10 years/85 °C), endurance (∼10 000 cycles), and uniform resistance state distribution.

Material Engineering for Phase Change Memory

NASA Astrophysics Data System (ADS)

Cabrera, David M.

As semiconductor devices continue to scale downward, and portable consumer electronics become more prevalent there is a need to develop memory technology that will scale with devices and use less energy, while maintaining performance. One of the leading prototypical memories that is being investigated is phase change memory. Phase change memory (PCM) is a non-volatile memory composed of 1 transistor and 1 resistor. The resistive structure includes a memory material alloy which can change between amorphous and crystalline states repeatedly using current/voltage pulses of different lengths and magnitudes. The most widely studied PCM materials are chalcogenides - Germanium-Antimony-Tellerium (GST) with Ge2Sb2Te3 and Germanium-Tellerium (GeTe) being some of the most popular stochiometries. As these cells are scaled downward, the current/voltage needed to switch these materials becomes comparable to the voltage needed to sense the cell's state. The International Roadmap for Semiconductors aims to raise the threshold field of these devices from 66.6 V/mum to be at least 375 V/mum for the year 2024. These cells are also prone to resistance drift between states, leading to bit corruption and memory loss. Phase change material properties are known to influence PCM device performance such as crystallization temperature having an effect on data retention and litetime, while resistivity values in the amorphous and crystalline phases have an effect on the current/voltage needed to write/erase the cell. Addition of dopants is also known to modify the phase change material parameters. The materials G2S2T5, GeTe, with dopants - nitrogen, silicon, titanium, and aluminum oxide and undoped Gallium-Antimonide (GaSb) are studied for these desired characteristics. Thin films of these compositions are deposited via physical vapor deposition at IBM Watson Research Center. Crystallization temperatures are investigated using time resolved x-ray diffraction at Brookhaven National Laboratory. Subsequently, these are incorporated into PCM cells with structure designed as shown in Fig.1. A photolithographic lift-off process is developed to realize these devices. Electrical parameters such as the voltage needed to switch the device between memory states, the difference in resistance between these memory states, and the amount of time to switch are studied using HP4145 equipped with a pulsed generator. The results show that incorporating aluminum oxide dopant into G2S2T 5 raises its threshold field from 60 V/mum to 96 V/mum, while for GeTe, nitrogen doping raises its threshold field from 143 V/mum to 248 V/mum. It is found that GaSb at comparable volume devices has a threshold field of 130 V/mum. It was also observed that nitrogen and silicon doping made G 2S2T5 more resistant to drift, raising time to drift from 2 to 16.6 minutes while titanium and aluminum oxide doping made GeTe drift time rise from 3 to 20 minutes. It was also found that shrinking the cell area in GaSb from 1 mum2 to 0.5 mum2 lengthened drift time from 45s to over 24 hours. The PCM process developed in this study is extended to GeTe/Sb2 Te3 multilayers called the superlattice (SL) structure that opens opportunities for future work. Recent studies have shown that the superlattice structure exhibits low switching energies, therefore has potential for low power operation.

Electric-field-controlled interface dipole modulation for Si-based memory devices.

PubMed

Miyata, Noriyuki

2018-05-31

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Resistive switching effect in the planar structure of all-printed, flexible and rewritable memory device based on advanced 2D nanocomposite of graphene quantum dots and white graphene flakes

NASA Astrophysics Data System (ADS)

Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Kim, Sowon; Choi, Kyung Hyun

2017-08-01

Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al2O3) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications.

Distributed multiport memory architecture

NASA Technical Reports Server (NTRS)

Kohl, W. H. (Inventor)

1983-01-01

A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

Retention modeling for ultra-thin density of Cu-based conductive bridge random access memory (CBRAM)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aga, Fekadu Gochole; Woo, Jiyong; Lee, Sangheon

We investigate the effect of Cu concentration On-state resistance retention characteristics of W/Cu/Ti/HfO{sub 2}/Pt memory cell. The development of RRAM device for application depends on the understanding of the failure mechanism and the key parameters for device optimization. In this study, we develop analytical expression for cations (Cu{sup +}) diffusion model using Gaussian distribution for detailed analysis of data retention time at high temperature. It is found that the improvement of data retention time depends not only on the conductive filament (CF) size but also on Cu atoms concentration density in the CF. Based on the simulation result, better datamore » retention time is observed for electron wave function associated with Cu{sup +} overlap and an extended state formation. This can be verified by analytical calculation of Cu atom defects inside the filament, based on Cu{sup +} diffusion model. The importance of Cu diffusion for the device reliability and the corresponding local temperature of the filament were analyzed by COMSOL Multiphysics simulation.« less

Memory device for two-dimensional radiant energy array computers

NASA Technical Reports Server (NTRS)

Schaefer, D. H.; Strong, J. P., III (Inventor)

1977-01-01

A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

Transistor and memory devices based on novel organic and biomaterials

NASA Astrophysics Data System (ADS)

Tseng, Jia-Hung

Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with platinum nanoparticles. It is established that the effective barrier height in the materials systems needs to be further engineered in order to have sufficiently long retention times. Finally other novel architectures such as negative differential resistance devices and high density memory arrays are investigated for their influence on memory technology.

Interface engineered ferrite@ferroelectric core-shell nanostructures: A facile approach to impart superior magneto-electric coupling

NASA Astrophysics Data System (ADS)

Abraham, Ann Rose; Raneesh, B.; Das, Dipankar; Oluwafemi, Oluwatobi Samuel; Thomas, Sabu; Kalarikkal, Nandakumar

2018-04-01

The electric field control of magnetism in multiferroics is attractive for the realization of ultra-fast and miniaturized low power device applications like nonvolatile memories. Room temperature hybrid multiferroic heterostructures with core-shell (0-0) architecture (ferrite core and ferroelectric shell) were developed via a two-step method. High-Resolution Transmission Electron Microscopy (HRTEM) images confirm the core-shell structure. The temperature dependant magnetization measurements and Mossbauer spectra reveal superparamagnetic nature of the core-shell sample. The ferroelectric hysteresis loops reveal leaky nature of the samples. The results indicate the promising applications of the samples for magneto-electric memories and spintronics.

Redundant single event upset supression system

DOEpatents

Hoff, James R.

2006-04-04

CMOS transistors are configured to operate as either a redundant, SEU-tolerant, positive-logic, cross-coupled Nor Gate SR-flip flop or a redundant, SEU-tolerant, negative-logic, cross-coupled Nand Gate SR-flip flop. The register can operate as a memory, and further as a memory that can overcome the effects of radiation. As an SR-flip flop, the invention can be altered into any known type of latch or flip-flop by the application of external logic, thereby extending radiation tolerance to devices previously incapable of radiation tolerance. Numerous registers can be logically connected and replicated thereby being electronically configured to operate as a redundant circuit.

An electronic pan/tilt/zoom camera system

NASA Technical Reports Server (NTRS)

Zimmermann, Steve; Martin, H. Lee

1991-01-01

A camera system for omnidirectional image viewing applications that provides pan, tilt, zoom, and rotational orientation within a hemispherical field of view (FOV) using no moving parts was developed. The imaging device is based on the effect that from a fisheye lens, which produces a circular image of an entire hemispherical FOV, can be mathematically corrected using high speed electronic circuitry. An incoming fisheye image from any image acquisition source is captured in memory of the device, a transformation is performed for the viewing region of interest and viewing direction, and a corrected image is output as a video image signal for viewing, recording, or analysis. As a result, this device can accomplish the functions of pan, tilt, rotation, and zoom throughout a hemispherical FOV without the need for any mechanical mechanisms. A programmable transformation processor provides flexible control over viewing situations. Multiple images, each with different image magnifications and pan tilt rotation parameters, can be obtained from a single camera. The image transformation device can provide corrected images at frame rates compatible with RS-170 standard video equipment.

Nanopatterned ferroelectrics for ultrahigh density rad-hard nonvolatile memories.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Brennecka, Geoffrey L.; Stevens, Jeffrey; Scrymgeour, David

2010-09-01

Radiation hard nonvolatile random access memory (NVRAM) is a crucial component for DOE and DOD surveillance and defense applications. NVRAMs based upon ferroelectric materials (also known as FERAMs) are proven to work in radiation-rich environments and inherently require less power than many other NVRAM technologies. However, fabrication and integration challenges have led to state-of-the-art FERAMs still being fabricated using a 130nm process while competing phase-change memory (PRAM) has been demonstrated with a 20nm process. Use of block copolymer lithography is a promising approach to patterning at the sub-32nm scale, but is currently limited to self-assembly directly on Si or SiO{submore » 2} layers. Successful integration of ferroelectrics with discrete and addressable features of {approx}15-20nm would represent a 100-fold improvement in areal memory density and would enable more highly integrated electronic devices required for systems advances. Towards this end, we have developed a technique that allows us to carry out block copolymer self-assembly directly on a huge variety of different materials and have investigated the fabrication, integration, and characterization of electroceramic materials - primarily focused on solution-derived ferroelectrics - with discrete features of {approx}20nm and below. Significant challenges remain before such techniques will be capable of fabricating fully integrated NVRAM devices, but the tools developed for this effort are already finding broader use. This report introduces the nanopatterned NVRAM device concept as a mechanism for motivating the subsequent studies, but the bulk of the document will focus on the platform and technology development.« less

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.; Ladbury, Ray

2008-01-01

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

Photonic Potential of Haloarchaeal Pigment Bacteriorhodopsin for Future Electronics: A Review.

PubMed

Ashwini, Ravi; Vijayanand, S; Hemapriya, J

2017-08-01

Haloarchaea are known for its adaptation in extreme saline environment. Halophilic archaea produces carotenoid pigments and proton pumps to protect them from extremes of salinity. Bacteriorhodopsin (bR) is a light-driven proton pump that resides in the membrane of haloarchaea Halobacterium salinarum. The photocycle of Bacteriorhodopsin passes through several states from K to O, finally liberating ATP for host's survival. Extensive studies on Bacteriorhodopsin photocycle has provided in depth knowledge on their sequential mechanism of converting solar energy into chemical energy inside the cell. This ability of Bacteriorhodopsin to harvest sunlight has now been experimented to exploit the unexplored and extensively available solar energy in various biotechnological applications. Currently, bacteriorhodopsin finds its importance in dye-sensitized solar cell (DSSC), logic gates (integrated circuits, IC's), optical switching, optical memories, storage devices (random access memory, RAM), biosensors, electronic sensors and optical microcavities. This review deals with the optical and electrical applications of the purple pigment Bacteriorhodopsin.

Multifunctional wearable devices for diagnosis and therapy of movement disorders.

PubMed

Son, Donghee; Lee, Jongha; Qiao, Shutao; Ghaffari, Roozbeh; Kim, Jaemin; Lee, Ji Eun; Song, Changyeong; Kim, Seok Joo; Lee, Dong Jun; Jun, Samuel Woojoo; Yang, Shixuan; Park, Minjoon; Shin, Jiho; Do, Kyungsik; Lee, Mincheol; Kang, Kwanghun; Hwang, Cheol Seong; Lu, Nanshu; Hyeon, Taeghwan; Kim, Dae-Hyeong

2014-05-01

Wearable systems that monitor muscle activity, store data and deliver feedback therapy are the next frontier in personalized medicine and healthcare. However, technical challenges, such as the fabrication of high-performance, energy-efficient sensors and memory modules that are in intimate mechanical contact with soft tissues, in conjunction with controlled delivery of therapeutic agents, limit the wide-scale adoption of such systems. Here, we describe materials, mechanics and designs for multifunctional, wearable-on-the-skin systems that address these challenges via monolithic integration of nanomembranes fabricated with a top-down approach, nanoparticles assembled by bottom-up methods, and stretchable electronics on a tissue-like polymeric substrate. Representative examples of such systems include physiological sensors, non-volatile memory and drug-release actuators. Quantitative analyses of the electronics, mechanics, heat-transfer and drug-diffusion characteristics validate the operation of individual components, thereby enabling system-level multifunctionalities.

Projected phase-change memory devices.

PubMed

Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

2015-09-03

Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.

PubMed

Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei

2010-07-27

A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.

Forming-free performance of a-SiN x :H-based resistive switching memory obtained by oxygen plasma treatment.

PubMed

Zhang, Xinxin; Ma, Zhongyuan; Zhang, Hui; Liu, Jian; Yang, Huafeng; Sun, Yang; Tan, Dinwen; Li, Wei; Xu, Ling; Chen, Kuiji; Feng, Duan

2018-06-15

An a-SiN x -based resistive random access memory (RRAM) device with a forming-free characteristic has significant potentials for the industrialization of the next-generation memories. We demonstrate that a forming-free a-SiN x O y RRAM device can be achieved by an oxygen plasma treatment of ultra-thin a-SiN x :H films. Electron spin resonance spectroscopy reveals that Si dangling bonds with a high density (10 19 cm -3 ) are distributed in the initial state, which exist in the forms of Si 2 N≡Si·, SiO 2 ≡Si·, O 3 ≡Si·, and N 3 ≡Si·. X-ray photoelectron spectroscopy and temperature-dependent current analyses reveal that the silicon dangling bonds induced by the oxygen plasma treatment and external electric field contribute to the low resistance state (LRS). For the high resistance state (HRS), the rupture of the silicon dangling bond pathway is attributed to the partial passivation of Si dangling bonds by H + and O 2- . Both LRS and HRS transmissions obey the hopping conduction model. The proposed oxygen plasma treatment, introduced to generate a high density of Si dangling bonds in the SiN x O y :H films, provides a new approach to forming-free RRAM devices.

Forming-free performance of a-SiN x :H-based resistive switching memory obtained by oxygen plasma treatment

NASA Astrophysics Data System (ADS)

Zhang, Xinxin; Ma, Zhongyuan; Zhang, Hui; Liu, Jian; Yang, Huafeng; Sun, Yang; Tan, Dinwen; Li, Wei; Xu, Ling; Chen, Kuiji; Feng, Duan

2018-06-01

An a-SiN x -based resistive random access memory (RRAM) device with a forming-free characteristic has significant potentials for the industrialization of the next-generation memories. We demonstrate that a forming-free a-SiN x O y RRAM device can be achieved by an oxygen plasma treatment of ultra-thin a-SiN x :H films. Electron spin resonance spectroscopy reveals that Si dangling bonds with a high density (1019 cm‑3) are distributed in the initial state, which exist in the forms of Si2N≡Si·, SiO2≡Si·, O3≡Si·, and N3≡Si·. X-ray photoelectron spectroscopy and temperature-dependent current analyses reveal that the silicon dangling bonds induced by the oxygen plasma treatment and external electric field contribute to the low resistance state (LRS). For the high resistance state (HRS), the rupture of the silicon dangling bond pathway is attributed to the partial passivation of Si dangling bonds by H+ and O2‑. Both LRS and HRS transmissions obey the hopping conduction model. The proposed oxygen plasma treatment, introduced to generate a high density of Si dangling bonds in the SiN x O y :H films, provides a new approach to forming-free RRAM devices.

Microscopic origin of read current noise in TaO{sub x}-based resistive switching memory by ultra-low temperature measurement

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pan, Yue; Cai, Yimao, E-mail: caiyimao@pku.edu.cn; Liu, Yefan

TaO{sub x}-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaO{sub x}-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25 K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaO{sub x} RRAM devices. A statisticalmore » comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaO{sub x} RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activation of conduction centers that form the percolation network. At last, a unified model in the framework of hopping conduction is proposed to explain the underlying mechanism of both RTN and ACF noise, which can provide meaningful guidelines for designing noise-immune RRAM devices.« less

Excellent resistive memory characteristics and switching mechanism using a Ti nanolayer at the Cu/TaOx interface

PubMed Central

2012-01-01

Excellent resistive switching memory characteristics were demonstrated for an Al/Cu/Ti/TaOx/W structure with a Ti nanolayer at the Cu/TaOx interface under low voltage operation of ± 1.5 V and a range of current compliances (CCs) from 0.1 to 500 μA. Oxygen accumulation at the Ti nanolayer and formation of a defective high-κ TaOx film were confirmed by high-resolution transmission electron microscopy, energy dispersive X-ray spectroscopy, and X-ray photo-electron spectroscopy. The resistive switching memory characteristics of the Al/Cu/Ti/TaOx/W structure, such as HRS/LRS (approximately 104), stable switching cycle stability (>106) and multi-level operation, were improved compared with those of Al/Cu/TaOx/W devices. These results were attributed to the control of Cu migration/dissolution by the insertion of a Ti nanolayer at the Cu/TaOx interface. In contrast, CuOx formation at the Cu/TaOx interface was observed in an Al/Cu/TaOx/W structure, which hindered dissolution of the Cu filament and resulted in a small resistance ratio of approximately 10 at a CC of 500 μA. A high charge-trapping density of 6.9 × 1016 /cm2 was observed in the Al/Cu/Ti/TaOx/W structure from capacitance-voltage hysteresis characteristics, indicating the migration of Cu ions through defect sites. The switching mechanism was successfully explained for structures with and without the Ti nanolayer. By using a new approach, the nanoscale diameter of Cu filament decreased from 10.4 to 0.17 nm as the CC decreased from 500 to 0.1 μA, resulting in a large memory size of 7.6 T to 28 Pbit/sq in. Extrapolated 10-year data retention of the Ti nanolayer device was also obtained. The findings of this study will not only improve resistive switching memory performance but also aid future design of nanoscale nonvolatile memory. PMID:22734564

Systems and methods to control multiple peripherals with a single-peripheral application code

DOEpatents

Ransom, Ray M.

2013-06-11

Methods and apparatus are provided for enhancing the BIOS of a hardware peripheral device to manage multiple peripheral devices simultaneously without modifying the application software of the peripheral device. The apparatus comprises a logic control unit and a memory in communication with the logic control unit. The memory is partitioned into a plurality of ranges, each range comprising one or more blocks of memory, one range being associated with each instance of the peripheral application and one range being reserved for storage of a data pointer related to each peripheral application of the plurality. The logic control unit is configured to operate multiple instances of the control application by duplicating one instance of the peripheral application for each peripheral device of the plurality and partitioning a memory device into partitions comprising one or more blocks of memory, one partition being associated with each instance of the peripheral application. The method then reserves a range of memory addresses for storage of a data pointer related to each peripheral device of the plurality, and initializes each of the plurality of peripheral devices.

Electrically programmable-erasable In-Ga-Zn-O thin-film transistor memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Qian, Shi-Bing; Zhang, Wen-Peng; Liu, Wen-Jun

Amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistor (TFT) memory is very promising for transparent and flexible system-on-panel displays; however, electrical erasability has always been a severe challenge for this memory. In this article, we demonstrated successfully an electrically programmable-erasable memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack under a maximal processing temperature of 300 {sup o}C. As the programming voltage was enhanced from 14 to 19 V for a constant pulse of 0.2 ms, the threshold voltage shift increased significantly from 0.89 to 4.67 V. When the programmed device was subjected to an appropriate pulse under negative gatemore » bias, it could return to the original state with a superior erasing efficiency. The above phenomena could be attributed to Fowler-Nordheim tunnelling of electrons from the IGZO channel to the Pt nanocrystals during programming, and inverse tunnelling of the trapped electrons during erasing. In terms of 0.2-ms programming at 16 V and 350-ms erasing at −17 V, a large memory window of 3.03 V was achieved successfully. Furthermore, the memory exhibited stable repeated programming/erasing (P/E) characteristics and good data retention, i.e., for 2-ms programming at 14 V and 250-ms erasing at −14 V, a memory window of 2.08 V was still maintained after 10{sup 3} P/E cycles, and a memory window of 1.1 V was retained after 10{sup 5} s retention time.« less

Thin film Heusler compounds manganese nickel gallium

NASA Astrophysics Data System (ADS)

Jenkins, Catherine Ann

Multiferroic Heusler compounds Mn3--xNi xGa (x=0,1,2) have a tetragonal unit cell that can variously be used for magneto-mechanically coupled shape memory ( x=1,2) and spin-mechanical applications (x=0). The first fabrication of fully epitaxial thin films of these and electronically related compounds by sputtering is discussed. Traditional and custom lab characterization of the magnetic and temperature driven multiferroic behavior is augmented by more detailed synchrotron-based high energy photoemission spectroscopic techniques to describe the atomic and electronic structure. Integration of the MnNi2Ga magnetic shape memory compound in microwave patch antennas and active free-standing structures represents a fraction of the available and promising applications for these compounds. Prototype magnetic tunnel junctions are demonstrated by Mn3Ga electrodes with perpendicular anisotropy for spin torque transfer memory structures. The main body of the work concentrates on the definition and exploration of the material series Mn3--xNi xGa (x=0,1,2) and the relevant multiferroic phenomena exhibited as a function of preparation and external stimuli. Engineering results on each x=0,1,2 are presented with device prototypes where relevant. In the appendices the process of the materials design undertaken with the goal of developing new ternary intermetallics with enhanced properties is presented with a full exploration of the road from band structure calculations to device implementation. Cobalt based compounds in single crystal and nanoparticle form are fabricated with an eye to developing the production methods for new cobalt- and iron-based magnetic shape memory compounds for device applications in different forms. Mn2CoSn, a compound isolectronic and with similar atomic ordering to Mn2NiGa is experimentally determined to be a nearly half-metallic ferromagnet in contrast to the metallic ferrimagnetism in the parent compound. High energy photoemission spectroscopy is shown to be applicable to the analysis and observation of deeply buried metallic and semiconducting interface in an analysis of chalcopyrite solar cell heterolayers and model magnetic tunnel junctions with half-metalic Heusler electrodes.

Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

NASA Astrophysics Data System (ADS)

Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

2017-12-01

Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

A flexible nonvolatile resistive switching memory device based on ZnO film fabricated on a foldable PET substrate.

PubMed

Sun, Bai; Zhang, Xuejiao; Zhou, Guangdong; Yu, Tian; Mao, Shuangsuo; Zhu, Shouhui; Zhao, Yong; Xia, Yudong

2018-06-15

In this work, a flexible resistive switching memory device based on ZnO film was fabricated using a foldable Polyethylene terephthalate (PET) film as substrate while Ag and Ti acts top and bottom electrode. Our as-prepared device represents an outstanding nonvolatile memory behavior with good "write-read-erase-read" stability at room temperature. Finally, a physical model of Ag conductive filament is constructed to understanding the observed memory characteristics. The work provides a new way for the preparation of flexible memory devices based on ZnO films, and especially provides an experimental basis for the exploration of high-performance and portable nonvolatile resistance random memory (RRAM). Copyright © 2018 Elsevier Inc. All rights reserved.

Functional carbon nitride materials — design strategies for electrochemical devices

NASA Astrophysics Data System (ADS)

Kessler, Fabian K.; Zheng, Yun; Schwarz, Dana; Merschjann, Christoph; Schnick, Wolfgang; Wang, Xinchen; Bojdys, Michael J.

2017-06-01

In the past decade, research in the field of artificial photosynthesis has shifted from simple, inorganic semiconductors to more abundant, polymeric materials. For example, polymeric carbon nitrides have emerged as promising materials for metal-free semiconductors and metal-free photocatalysts. Polymeric carbon nitride (melon) and related carbon nitride materials are desirable alternatives to industrially used catalysts because they are easily synthesized from abundant and inexpensive starting materials. Furthermore, these materials are chemically benign because they do not contain heavy metal ions, thereby facilitating handling and disposal. In this Review, we discuss the building blocks of carbon nitride materials and examine how strategies in synthesis, templating and post-processing translate from the molecular level to macroscopic properties, such as optical and electronic bandgap. Applications of carbon nitride materials in bulk heterojunctions, laser-patterned memory devices and energy storage devices indicate that photocatalytic overall water splitting on an industrial scale may be realized in the near future and reveal a new avenue of 'post-silicon electronics'.

Optical bistability for optical signal processing and computing

NASA Astrophysics Data System (ADS)

Peyghambarian, N.; Gibbs, H. M.

1985-02-01

Optical bistability (OB) is a phenomenon in which a nonlinear medium responds to an optical input beam by changing its transmission abruptly from one value to another. A 'nonlinear medium' is a medium in which the index of refraction depends on the incident light intensity. A device is said to be optically bistable if two stable output states exist for the same value of the input. Optically bistable devices can perform a number of logic functions related to optical memory, optical transistor, optical discriminator, optical limiter, optical oscillator, and optical gate. They also have the potential for subpicosecond switching, greatly exceeding the capability of electronics. This potential is one of several advantages of optical data processing over electronic processing. Other advantages are greater immunity to electromagnetic interference and crosstalk, and highly parallel processing capability. The present investigation is mainly concerned with all-optical etalon devices. The considered materials, include GaAs, ZnS and ZnSe, CuCl, InSb, InAs, and CdS.

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

NASA Technical Reports Server (NTRS)

Li, Yue (Inventor); Bruck, Jehoshua (Inventor)

2018-01-01

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Impacts of Co doping on ZnO transparent switching memory device characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar

2016-05-02

The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less

Creating a transducer electronic datasheet using I2C serial EEPROM memory and PIC32-based microcontroller development board

NASA Astrophysics Data System (ADS)

Croitoru, Bogdan; Tulbure, Adrian; Abrudean, Mihail; Secara, Mihai

2015-02-01

The present paper describes a software method for creating / managing one type of Transducer Electronic Datasheet (TEDS) according to IEEE 1451.4 standard in order to develop a prototype of smart multi-sensor platform (with up to ten different analog sensors simultaneously connected) with Plug and Play capabilities over ETHERNET and Wi-Fi. In the experiments were used: one analog temperature sensor, one analog light sensor, one PIC32-based microcontroller development board with analog and digital I/O ports and other computing resources, one 24LC256 I2C (Inter Integrated Circuit standard) serial Electrically Erasable Programmable Read Only Memory (EEPROM) memory with 32KB available space and 3 bytes internal buffer for page writes (1 byte for data and 2 bytes for address). It was developed a prototype algorithm for writing and reading TEDS information to / from I2C EEPROM memories using the standard C language (up to ten different TEDS blocks coexisting in the same EEPROM device at once). The algorithm is able to write and read one type of TEDS: transducer information with standard TEDS content. A second software application, written in VB.NET platform, was developed in order to access the EEPROM sensor information from a computer through a serial interface (USB).

The Periodic Table as a Mnemonic Device for Writing Electronic Configurations

NASA Astrophysics Data System (ADS)

Mabrouk, Suzanne T.

2003-08-01

Lectures on electronic configurations often appear boring and intangible to many students. This topic can become engaging and interesting through the use of an interactive method based on the periodic table. Using a periodic table with shell and subshell designations in each square, students learn the patterns or the periodicity to the electronic configurations of the elements. Students are then encouraged to commit these patterns to memory through rehearsal in class. With the standard periodic table and the memorized patterns, students are shown that electronic configurations can be determined. Although students often appear mystified by the topic of electronic configurations, especially when its relevance to chemistry is absent, students' understanding can be improved easily by making connections and using analogy as the activity described here does.

Initial Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

NASA Technical Reports Server (NTRS)

MacLeond, Todd C.; Sims, W. Herb; Varnavas,Kosta A.; Ho, Fat D.

2011-01-01

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite that launched in November 2010. The memory device being tested is a commercial Ramtron Inc. 512K memory device. The circuit was designed into the satellite avionics and is not used to control the satellite. The test consists of writing and reading data with the ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is sent to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test is one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The initial data from the test is presented. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

Smart photodetector arrays for error control in page-oriented optical memory

NASA Astrophysics Data System (ADS)

Schaffer, Maureen Elizabeth

1998-12-01

Page-oriented optical memories (POMs) have been proposed to meet high speed, high capacity storage requirements for input/output intensive computer applications. This technology offers the capability for storage and retrieval of optical data in two-dimensional pages resulting in high throughput data rates. Since currently measured raw bit error rates for these systems fall several orders of magnitude short of industry requirements for binary data storage, powerful error control codes must be adopted. These codes must be designed to take advantage of the two-dimensional memory output. In addition, POMs require an optoelectronic interface to transfer the optical data pages to one or more electronic host systems. Conventional charge coupled device (CCD) arrays can receive optical data in parallel, but the relatively slow serial electronic output of these devices creates a system bottleneck thereby eliminating the POM advantage of high transfer rates. Also, CCD arrays are "unintelligent" interfaces in that they offer little data processing capabilities. The optical data page can be received by two-dimensional arrays of "smart" photo-detector elements that replace conventional CCD arrays. These smart photodetector arrays (SPAs) can perform fast parallel data decoding and error control, thereby providing an efficient optoelectronic interface between the memory and the electronic computer. This approach optimizes the computer memory system by combining the massive parallelism and high speed of optics with the diverse functionality, low cost, and local interconnection efficiency of electronics. In this dissertation we examine the design of smart photodetector arrays for use as the optoelectronic interface for page-oriented optical memory. We review options and technologies for SPA fabrication, develop SPA requirements, and determine SPA scalability constraints with respect to pixel complexity, electrical power dissipation, and optical power limits. Next, we examine data modulation and error correction coding for the purpose of error control in the POM system. These techniques are adapted, where possible, for 2D data and evaluated as to their suitability for a SPA implementation in terms of BER, code rate, decoder time and pixel complexity. Our analysis shows that differential data modulation combined with relatively simple block codes known as array codes provide a powerful means to achieve the desired data transfer rates while reducing error rates to industry requirements. Finally, we demonstrate the first smart photodetector array designed to perform parallel error correction on an entire page of data and satisfy the sustained data rates of page-oriented optical memories. Our implementation integrates a monolithic PN photodiode array and differential input receiver for optoelectronic signal conversion with a cluster error correction code using 0.35-mum CMOS. This approach provides high sensitivity, low electrical power dissipation, and fast parallel correction of 2 x 2-bit cluster errors in an 8 x 8 bit code block to achieve corrected output data rates scalable to 102 Gbps in the current technology increasing to 1.88 Tbps in 0.1-mum CMOS.

Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

NASA Astrophysics Data System (ADS)

Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

2016-05-01

The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr00505e

Possible designs of medication monitors. Final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moulding, T.S.

A medication monitor is a device which utilizes radioactive material and photographic film to determine when patients remove medication from a dispenser. The material presents multiple, largely mechanical, ideas for making this type of dispenser so it can be used for a wide range of medication regimens. The description includes using the idea of a digital clock and memory chips for the time recording system. It also includes details on (1) choice of radioactive source and method of sealing source, (2) methods of locking or sealing medication monitors, (3) detailed instructions for using existing devices, (4) a simplified film developmentmore » system, (5) a mechanical and electronic means for creating a dispenser to reduce the chance of suicidal overdosage, and (6) an electronic means to allow a patient to compensate for medication forgotten without taking an excessive dose of medication.« less

Charge retention in scaled SONOS nonvolatile semiconductor memory devices—Modeling and characterization

NASA Astrophysics Data System (ADS)

Hu, Yin; White, Marvin H.

1993-10-01

A new analytical model is developed to investigate the influence of the charge loss processes in the retention mode of the SONOS NVSM device. The model considers charge loss by the following processes: (1) electron back-tunneling from the nitride traps to the Si conduction band, (2) electron back-tunneling from the nitride traps to the Si/SiO 2 interface traps and (3) hole injection from the Si valence band to the nitride traps. An amphoteric trap charge distribution is used in this model. The new charge retention model predicts that process (1) determines the short term retention, while processes (2) and (3) determine the long term retention. Good agreement has been reached between the results of analytical calculations and the experimental retention data on both surface channel and buried channel SONOS devices.

Programmable DMA controller

NASA Technical Reports Server (NTRS)

Hendry, David F. (Inventor)

1993-01-01

In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.

Overview of Probe-based Storage Technologies

NASA Astrophysics Data System (ADS)

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-07-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

Overview of Probe-based Storage Technologies.

PubMed

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-12-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

Characterizing filamentary switching in resistive memories (Presentation Recording)

NASA Astrophysics Data System (ADS)

Busby, Yan; Pireaux, Jean-Jacques

2015-09-01

Characterizing filamentary switching in resistive memories For many organic, inorganic and hybrid memory devices the resistive switching mechanism is well known to rely on filament formation [1]. This implies that localized conductive paths are established between the two terminal electrodes during the forming step. This filaments sustain the current flow when the memory is in the low conductive state and they can be ruptured and possibly re-formed for more than hundreds of I-V cycles. The nature and morphology of filaments has been long time debated especially for organic memories. The filament size, density and formation mechanism have been very challenging to be characterized, and need appropriate experimental techniques. However, filaments in organic memories have been recently identified and characterized by cross-section transmission electron microscopy (TEM), conductive-AFM, AFM-tomography and through depth profile analysis combining Time-of-flight secondary ions mass spectrometry (SIMS) and X-ray photoelectron spectroscopy (XPS). In particular, 3D spectroscopic images obtained with ToF-SIMS give access for the first time to filament formation process and rupture mechanism. From these results, a clear picture of the filament(s) dynamics during memory operation can be drawn. In this contribution, recent results showing filaments in memories based on different structures and architectures will be discussed. The memories are based on insulating polymers (polystyrene [2] and poly methyl methacrylate [3]), conductive polymers/nanocomposites (polyera N1400 with metal NPs [4]), and small semiconducting molecules (Tris(8-hydroxyquinolinato)aluminium - Alq3 [5]). The results show that resistive switching clearly involves the inhomogeneous metal diffusion in the organic layer taking place during the top electrode deposition and during memory operation. This may be of great relevance in many other organic electronics applications. REFERENCES [1] S. Nau, S. Sax, E.J.W. List-Kratochvil, Adv. Mater. 2014, 26, 2508-2513. [2] Y. Busby, N. Crespo-Monteiro, M. Girleanu, M. Brinkmann, O. Ersen, J.-J. Pireaux, Organic Electronics 2015, 16, 40-45. [3] C. Wolf, S. Nau, S. Sax, Y. Busby, J.-J. Pireaux, E.J.W. List-Kratochvil (under submission). [4] G. Casula, P. Cosseddu, Y. Busby, J.-J. Pireaux, M. Rosowski, B. Tkacz Szczesna, K. Soliwoda, G. Celichowski, J. Grobelny, J. Novák, R. Banerjee, F. Schreiber, A. Bonfiglio, Organic Electronics, 2015, 18, 17-23. [5] Y. Busby, S. Nau, S. Sax, E.J.W. List- Kratochvil, J. Novak, R. Banerjee, F. Schreiber, J.-J. Pireaux, (under submission)

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Low-temperature atomic layer deposition of TiO{sub 2} thin layers for the processing of memristive devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Porro, Samuele, E-mail: samuele.porro@polito.it; Conti, Daniele; Guastella, Salvatore

2016-01-15

Atomic layer deposition (ALD) represents one of the most fundamental techniques capable of satisfying the strict technological requirements imposed by the rapidly evolving electronic components industry. The actual scaling trend is rapidly leading to the fabrication of nanoscaled devices able to overcome limits of the present microelectronic technology, of which the memristor is one of the principal candidates. Since their development in 2008, TiO{sub 2} thin film memristors have been identified as the future technology for resistive random access memories because of their numerous advantages in producing dense, low power-consuming, three-dimensional memory stacks. The typical features of ALD, such asmore » self-limiting and conformal deposition without line-of-sight requirements, are strong assets for fabricating these nanosized devices. This work focuses on the realization of memristors based on low-temperature ALD TiO{sub 2} thin films. In this process, the oxide layer was directly grown on a polymeric photoresist, thus simplifying the fabrication procedure with a direct liftoff patterning instead of a complex dry etching process. The TiO{sub 2} thin films deposited in a temperature range of 120–230 °C were characterized via Raman spectroscopy and x-ray photoelectron spectroscopy, and electrical current–voltage measurements taken in voltage sweep mode were employed to confirm the existence of resistive switching behaviors typical of memristors. These measurements showed that these low-temperature devices exhibit an ON/OFF ratio comparable to that of a high-temperature memristor, thus exhibiting similar performances with respect to memory applications.« less

Electric-Field-Driven Dual Vacancies Evolution in Ultrathin Nanosheets Realizing Reversible Semiconductor to Half-Metal Transition.

PubMed

Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi

2015-12-02

Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.

A Strategy to Design High-Density Nanoscale Devices utilizing Vapor Deposition of Metal Halide Perovskite Materials.

PubMed

Hwang, Bohee; Lee, Jang-Sik

2017-08-01

The demand for high memory density has increased due to increasing needs of information storage, such as big data processing and the Internet of Things. Organic-inorganic perovskite materials that show nonvolatile resistive switching memory properties have potential applications as the resistive switching layer for next-generation memory devices, but, for practical applications, these materials should be utilized in high-density data-storage devices. Here, nanoscale memory devices are fabricated by sequential vapor deposition of organolead halide perovskite (OHP) CH 3 NH 3 PbI 3 layers on wafers perforated with 250 nm via-holes. These devices have bipolar resistive switching properties, and show low-voltage operation, fast switching speed (200 ns), good endurance, and data-retention time >10 5 s. Moreover, the use of sequential vapor deposition is extended to deposit CH 3 NH 3 PbI 3 as the memory element in a cross-point array structure. This method to fabricate high-density memory devices could be used for memory cells that occupy large areas, and to overcome the scaling limit of existing methods; it also presents a way to use OHPs to increase memory storage capacity. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Vacancy structures and melting behavior in rock-salt GeSbTe

DOE PAGES

Zhang, Bin; Wang, Xue -Peng; Shen, Zhen -Ju; ...

2016-05-03

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) atmore » an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Furthermore, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe.« less

Vacancy Structures and Melting Behavior in Rock-Salt GeSbTe

PubMed Central

Zhang, Bin; Wang, Xue-Peng; Shen, Zhen-Ju; Li, Xian-Bin; Wang, Chuan-Shou; Chen, Yong-Jin; Li, Ji-Xue; Zhang, Jin-Xing; Zhang, Ze; Zhang, Sheng-Bai; Han, Xiao-Dong

2016-01-01

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) at an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Moreover, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe. PMID:27140674

A Review on Disorder-Driven Metal–Insulator Transition in Crystalline Vacancy-Rich GeSbTe Phase-Change Materials

PubMed Central

Wang, Jiang-Jing; Xu, Ya-Zhi; Mazzarello, Riccardo; Wuttig, Matthias; Zhang, Wei

2017-01-01

Metal–insulator transition (MIT) is one of the most essential topics in condensed matter physics and materials science. The accompanied drastic change in electrical resistance can be exploited in electronic devices, such as data storage and memory technology. It is generally accepted that the underlying mechanism of most MITs is an interplay of electron correlation effects (Mott type) and disorder effects (Anderson type), and to disentangle the two effects is difficult. Recent progress on the crystalline Ge1Sb2Te4 (GST) compound provides compelling evidence for a disorder-driven MIT. In this work, we discuss the presence of strong disorder in GST, and elucidate its effects on electron localization and transport properties. We also show how the degree of disorder in GST can be reduced via thermal annealing, triggering a disorder-driven metal–insulator transition. The resistance switching by disorder tuning in crystalline GST may enable novel multilevel data storage devices. PMID:28773222

A Review on Disorder-Driven Metal-Insulator Transition in Crystalline Vacancy-Rich GeSbTe Phase-Change Materials.

PubMed

Wang, Jiang-Jing; Xu, Ya-Zhi; Mazzarello, Riccardo; Wuttig, Matthias; Zhang, Wei

2017-07-27

Metal-insulator transition (MIT) is one of the most essential topics in condensed matter physics and materials science. The accompanied drastic change in electrical resistance can be exploited in electronic devices, such as data storage and memory technology. It is generally accepted that the underlying mechanism of most MITs is an interplay of electron correlation effects (Mott type) and disorder effects (Anderson type), and to disentangle the two effects is difficult. Recent progress on the crystalline Ge₁Sb₂Te₄ (GST) compound provides compelling evidence for a disorder-driven MIT. In this work, we discuss the presence of strong disorder in GST, and elucidate its effects on electron localization and transport properties. We also show how the degree of disorder in GST can be reduced via thermal annealing, triggering a disorder-driven metal-insulator transition. The resistance switching by disorder tuning in crystalline GST may enable novel multilevel data storage devices.

A non-destructive crossbar architecture of multi-level memory-based resistor

NASA Astrophysics Data System (ADS)

Sahebkarkhorasani, Seyedmorteza

Nowadays, researchers are trying to shrink the memory cell in order to increase the capacity of the memory system and reduce the hardware costs. In recent years, there has been a revolution in electronics by using fundamentals of physics to build a new memory for computer application in order to increase the capacity and decrease the power consumption. Increasing the capacity of the memory causes a growth in the chip area. From 1971 to 2012 semiconductor manufacturing process improved from 6mum to 22 mum. In May 2008, S.Williams stated that "it is time to stop shrinking". In his paper, he declared that the process of shrinking memory element has recently become very slow and it is time to use another alternative in order to create memory elements [9]. In this project, we present a new design of a memory array using the new element named Memristor [3]. Memristor is a two-terminal passive electrical element that relates the charge and magnetic flux to each other. The device remained unknown since 1971 when it was discovered by Chua and introduced as the fourth fundamental passive element like capacitor, inductor and resistor [3]. Memristor has a dynamic resistance and it can retain its previous value even after disconnecting the power supply. Due to this interesting behavior of the Memristor, it can be a good replacement for all of the Non-Volatile Memories (NVMs) in the near future. Combination of this newly introduced element with the nanowire crossbar architecture would be a great structure which is called Crossbar Memristor. Some frameworks have recently been introduced in literature that utilized Memristor crossbar array, but there are many challenges to implement the Memristor crossbar array due to fabrication and device limitations. In this work, we proposed a simple design of Memristor crossbar array architecture which uses input feedback in order to preserve its data after each read operation.

Oxide-based thin film transistors for flexible electronics

NASA Astrophysics Data System (ADS)

He, Yongli; Wang, Xiangyu; Gao, Ya; Hou, Yahui; Wan, Qing

2018-01-01

The continuous progress in thin film materials and devices has greatly promoted the development in the field of flexible electronics. As one of the most common thin film devices, thin film transistors (TFTs) are significant building blocks for flexible platforms. Flexible oxide-based TFTs are well compatible with flexible electronic systems due to low process temperature, high carrier mobility, and good uniformity. The present article is a review of the recent progress and major trends in the field of flexible oxide-based thin film transistors. First, an introduction of flexible electronics and flexible oxide-based thin film transistors is given. Next, we introduce oxide semiconductor materials and various flexible oxide-based TFTs classified by substrate materials including polymer plastics, paper sheets, metal foils, and flexible thin glass. Afterwards, applications of flexible oxide-based TFTs including bendable sensors, memories, circuits, and displays are presented. Finally, we give conclusions and a prospect for possible development trends. Project supported in part by the National Science Foundation for Distinguished Young Scholars of China (No. 61425020), in part by the National Natural Science Foundation of China (No. 11674162).

Programmable synaptic devices for electronic neural nets

NASA Technical Reports Server (NTRS)

Moopenn, A.; Thakoor, A. P.

1990-01-01

The architecture, design, and operational characteristics of custom VLSI and thin film synaptic devices are described. The devices include CMOS-based synaptic chips containing 1024 reprogrammable synapses with a 6-bit dynamic range, and nonvolatile, write-once, binary synaptic arrays based on memory switching in hydrogenated amorphous silicon films. Their suitability for embodiment of fully parallel and analog neural hardware is discussed. Specifically, a neural network solution to an assignment problem of combinatorial global optimization, implemented in fully parallel hardware using the synaptic chips, is described. The network's ability to provide optimal and near optimal solutions over a time scale of few neuron time constants has been demonstrated and suggests a speedup improvement of several orders of magnitude over conventional search methods.

High performance nonvolatile memory devices based on Cu2-xSe nanowires

NASA Astrophysics Data System (ADS)

Wu, Chun-Yan; Wu, Yi-Liang; Wang, Wen-Jian; Mao, Dun; Yu, Yong-Qiang; Wang, Li; Xu, Jun; Hu, Ji-Gang; Luo, Lin-Bao

2013-11-01

We report on the rational synthesis of one-dimensional Cu2-xSe nanowires (NWs) via a solution method. Electrical analysis of Cu2-xSe NWs based memory device exhibits a stable and reproducible bipolar resistive switching behavior with a low set voltage (0.3-0.6 V), which can enable the device to write and erase data efficiently. Remarkably, the memory device has a record conductance switching ratio of 108, much higher than other devices ever reported. At last, a conducting filaments model is introduced to account for the resistive switching behavior. The totality of this study suggests that the Cu2-xSe NWs are promising building blocks for fabricating high-performance and low-consumption nonvolatile memory devices.

1T1R Nonvolatile Memory with Al/TiO2/Au and Sol-Gel-Processed Insulator for Barium Zirconate Nickelate Gate in Pentacene Thin Film Transistor

PubMed Central

Lee, Ke-Jing; Chang, Yu-Chi; Lee, Cheng-Jung; Wang, Li-Wen; Wang, Yeong-Her

2017-01-01

A one-transistor and one-resistor (1T1R) architecture with a resistive random access memory (RRAM) cell connected to an organic thin-film transistor (OTFT) device is successfully demonstrated to avoid the cross-talk issues of only one RRAM cell. The OTFT device, which uses barium zirconate nickelate (BZN) as a dielectric layer, exhibits favorable electrical properties, such as a high field-effect mobility of 2.5 cm2/Vs, low threshold voltage of −2.8 V, and low leakage current of 10−12 A, for a driver in the 1T1R operation scheme. The 1T1R architecture with a TiO2-based RRAM cell connected with a BZN OTFT device indicates a low operation current (10 μA) and reliable data retention (over ten years). This favorable performance of the 1T1R device can be attributed to the additional barrier heights introduced by using Ni (II) acetylacetone as a substitute for acetylacetone, and the relatively low leakage current of a BZN dielectric layer. The proposed 1T1R device with low leakage current OTFT and excellent uniform resistance distribution of RRAM exhibits a good potential for use in practical low-power electronic applications. PMID:29232828

Proposal for an IT Security Standard for Preventing Tax Fraud in Cash Registers

NASA Astrophysics Data System (ADS)

Neuhaus, Mathias; Wolff, Jörg; Zisky, Norbert

This paper describes a technology solution for preventing tax fraud in electronic cash registers (ECR) and point of sale (POS) systems. The solution is based on electronic signatures, and as a result, any alterations to protected data will be detected. The signed transaction data can be stored on various electronic memory devices. Technical provisions enable the estimation of transaction volumes, even after tampering or loss of data. In this way the solution presented here differs significantly from other fiscal solutions where a pattern of approvals for ECRs and permanent technical supervision of the market is necessary. This paper is focused on the architecture, the protocols and the usability of the proposed system.

Discrete-state phasor neural networks

NASA Astrophysics Data System (ADS)

Noest, André J.

1988-08-01

An associative memory network with local variables assuming one of q equidistant positions on the unit circle (q-state phasors) is introduced, and its recall behavior is solved exactly for any q when the interactions are sparse and asymmetric. Such models can describe natural or artifical networks of (neuro-)biological, chemical, or electronic limit-cycle oscillators with q-fold instead of circular symmetry, or similar optical computing devices using a phase-encoded data representation.

Industry Study, Electronics Industry, Spring 2009

DTIC Science & Technology

2009-01-01

Toshiba, Samsung , and NEC.7 The microprocessor is a central processing unit containing hundreds of millions of transistors and logic to perform...business with an 11.7% market share followed closely by Samsung with a 10.3% market share.40 Intel is the leader in the production of microprocessors...while Samsung is the leading memory chip producer. Other US chip manufacturers include Texas Instruments (TI), Advanced Micro Devices (AMD), Micron

Brownmillerite thin films as fast ion conductors for ultimate-performance resistance switching memory.

PubMed

Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk

2017-07-27

An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.

Magnetization switching schemes for nanoscale three-terminal spintronics devices

NASA Astrophysics Data System (ADS)

Fukami, Shunsuke; Ohno, Hideo

2017-08-01

Utilizing spintronics-based nonvolatile memories in integrated circuits offers a promising approach to realize ultralow-power and high-performance electronics. While two-terminal devices with spin-transfer torque switching have been extensively developed nowadays, there has been a growing interest in devices with a three-terminal structure. Of primary importance for applications is the efficient manipulation of magnetization, corresponding to information writing, in nanoscale devices. Here we review the studies of current-induced domain wall motion and spin-orbit torque-induced switching, which can be applied to the write operation of nanoscale three-terminal spintronics devices. For domain wall motion, the size dependence of device properties down to less than 20 nm will be shown and the underlying mechanism behind the results will be discussed. For spin-orbit torque-induced switching, factors governing the threshold current density and strategies to reduce it will be discussed. A proof-of-concept demonstration of artificial intelligence using an analog spin-orbit torque device will also be reviewed.

Thermally activated hysteresis in high quality graphene/h-BN devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cadore, A. R., E-mail: alissoncadore@gmail.com, E-mail: lccampos@fisica.ufmg.br; Mania, E.; Lacerda, R. G.

2016-06-06

We report on gate hysteresis of resistance in high quality graphene/hexagonal boron nitride (h-BN) devices. We observe a thermally activated hysteretic behavior in resistance as a function of the applied gate voltage at temperatures above 375 K. In order to investigate the origin of the hysteretic phenomenon, we compare graphene/h-BN heterostructure devices with SiO{sub 2}/Si back gate electrodes to devices with graphite back gate electrodes. The gate hysteretic behavior of the resistance is present only in devices with an h-BN/SiO{sub 2} interface and is dependent on the orientation of the applied gate electric field and sweep rate. We describe a phenomenologicalmore » model which captures all of our findings based on charges trapped at the h-BN/SiO{sub 2} interface. Such hysteretic behavior in graphene resistance must be considered in high temperature applications for graphene devices and may open new routes for applications in digital electronics and memory devices.« less

Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

2017-12-01

Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

General purpose programmable accelerator board

DOEpatents

Robertson, Perry J.; Witzke, Edward L.

2001-01-01

A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.

76 FR 4375 - In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-25

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-683] In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... the United States after importation of certain MLC flash memory devices and products containing same...

Electrochemical metallization memories--fundamentals, applications, prospects.

PubMed

Valov, Ilia; Waser, Rainer; Jameson, John R; Kozicki, Michael N

2011-06-24

This review focuses on electrochemical metallization memory cells (ECM), highlighting their advantages as the next generation memories. In a brief introduction, the basic switching mechanism of ECM cells is described and the historical development is sketched. In a second part, the full spectra of materials and material combinations used for memory device prototypes and for dedicated studies are presented. In a third part, the specific thermodynamics and kinetics of nanosized electrochemical cells are described. The overlapping of the space charge layers is found to be most relevant for the cell properties at rest. The major factors determining the functionality of the ECM cells are the electrode reaction and the transport kinetics. Depending on electrode and/or electrolyte material electron transfer, electro-crystallization or slow diffusion under strong electric fields can be rate determining. In the fourth part, the major device characteristics of ECM cells are explained. Emphasis is placed on switching speed, forming and SET/RESET voltage, R(ON) to R(OFF) ratio, endurance and retention, and scaling potentials. In the last part, circuit design aspects of ECM arrays are discussed, including the pros and cons of active and passive arrays. In the case of passive arrays, the fundamental sneak path problem is described and as well as a possible solution by two anti-serial (complementary) interconnected resistive switches per cell. Furthermore, the prospects of ECM with regard to further scalability and the ability for multi-bit data storage are addressed.

Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

NASA Astrophysics Data System (ADS)

Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

2007-04-01

Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

Carrier transport mechanisms of nonvolatile write-once-read-many-times memory devices with InP-ZnS core-shell nanoparticles embedded in a polymethyl methacrylate layer

NASA Astrophysics Data System (ADS)

Ham, Jung Hoon; Oh, Do Hyun; Cho, Sung Hwan; Jung, Jae Hun; Kim, Tae Whan; Ryu, Eui Dock; Kim, Sang Wook

2009-03-01

Current-voltage (I-V) curves at 300 K for Al/InP-ZnS nanoparticles embedded in a polymethyl methacrylate layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. From the I-V curves, the ON/OFF ratio for the device with InP-ZnS nanoparticles was significantly larger than that for the device without InP-ZnS nanoparticles, indicative of the existence of charge capture in the InP nanoparticles. The estimated retention time of the ON state for the WORM memory device was more than 10 years. The carrier transport mechanisms for the WORM memory devices are described by using several models to fit the experimental I-V data.

Giant Electroresistance in Edge Metal-Insulator-Metal Tunnel Junctions Induced by Ferroelectric Fringe Fields

PubMed Central

Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog

2016-01-01

An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475

Wide memory window in graphene oxide charge storage nodes

NASA Astrophysics Data System (ADS)

Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping

2010-04-01

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

Fully inkjet-printed two-dimensional material field-effect heterojunctions for wearable and textile electronics.

PubMed

Carey, Tian; Cacovich, Stefania; Divitini, Giorgio; Ren, Jiesheng; Mansouri, Aida; Kim, Jong M; Wang, Chaoxia; Ducati, Caterina; Sordan, Roman; Torrisi, Felice

2017-10-31

Fully printed wearable electronics based on two-dimensional (2D) material heterojunction structures also known as heterostructures, such as field-effect transistors, require robust and reproducible printed multi-layer stacks consisting of active channel, dielectric and conductive contact layers. Solution processing of graphite and other layered materials provides low-cost inks enabling printed electronic devices, for example by inkjet printing. However, the limited quality of the 2D-material inks, the complexity of the layered arrangement, and the lack of a dielectric 2D-material ink able to operate at room temperature, under strain and after several washing cycles has impeded the fabrication of electronic devices on textile with fully printed 2D heterostructures. Here we demonstrate fully inkjet-printed 2D-material active heterostructures with graphene and hexagonal-boron nitride (h-BN) inks, and use them to fabricate all inkjet-printed flexible and washable field-effect transistors on textile, reaching a field-effect mobility of ~91 cm 2  V -1  s -1 , at low voltage (<5 V). This enables fully inkjet-printed electronic circuits, such as reprogrammable volatile memory cells, complementary inverters and OR logic gates.

Electrical generation and control of the valley carriers in a monolayer transition metal dichalcogenide

NASA Astrophysics Data System (ADS)

Ye, Yu; Xiao, Jun; Wang, Hailong; Ye, Ziliang; Zhu, Hanyu; Zhao, Mervin; Wang, Yuan; Zhao, Jianhua; Yin, Xiaobo; Zhang, Xiang

2016-07-01

Electrically controlling the flow of charge carriers is the foundation of modern electronics. By accessing the extra spin degree of freedom (DOF) in electronics, spintronics allows for information processes such as magnetoresistive random-access memory. Recently, atomic membranes of transition metal dichalcogenides (TMDCs) were found to support unequal and distinguishable carrier distribution in different crystal momentum valleys. This valley polarization of carriers enables a new DOF for information processing. A variety of valleytronic devices such as valley filters and valves have been proposed, and optical valley excitation has been observed. However, to realize its potential in electronics it is necessary to electrically control the valley DOF, which has so far remained a significant challenge. Here, we experimentally demonstrate the electrical generation and control of valley polarization. This is achieved through spin injection via a diluted ferromagnetic semiconductor and measured through the helicity of the electroluminescence due to the spin-valley locking in TMDC monolayers. We also report a new scheme of electronic devices that combine both the spin and valley DOFs. Such direct electrical generation and control of valley carriers opens up new dimensions in utilizing both the spin and valley DOFs for next-generation electronics and computing.

On the Mechanisms of Formation of Memory Channels and Development of Negative Differential Resistance in Solid Solutions of the TlInTe2-TlYbTe2 System

NASA Astrophysics Data System (ADS)

Akhmedova, A. M.

2018-04-01

The behavior of an electronic subsystem is investigated in the course of formation and development of a memory channel in solid solutions of the TlInTe2-TlYbTe2 system. An analysis of the current-voltage characteristics allows getting an insight into the reason for a sharp change in electrical conductance of the specimens under study during their transition from the high-resistance to high-conductance state and the reasons for the well known instability of threshold converters, which makes it possible to design devices with high threshold voltage stability.

Sb-rich Si-Sb-Te phase change material for multilevel data storage: The degree of disorder in the crystalline state

NASA Astrophysics Data System (ADS)

Zhou, Xilin; Wu, Liangcai; Song, Zhitang; Rao, Feng; Cheng, Yan; Peng, Cheng; Yao, Dongning; Song, Sannian; Liu, Bo; Feng, Songlin; Chen, Bomy

2011-07-01

The phase change memory with monolayer chalcogenide film (Si18Sb52Te30) is investigated for the feasibility of multilevel data storage. During the annealing of the film, a relatively stable intermediate resistance can be obtained at an appropriate heating rate. The transmission electron microscopy in situ analysis reveals a conversion of crystallization mechanism from nucleation to crystal growth, which leads a continuous reduction in the degree of disorder. It is indicated from the electrical properties of the devices that the fall edge of the voltage pulse is the critical factor that determines a reliable triple-level resistance state of the phase change memory cell.

Floating-gate memory based on an organic metal-insulator-semiconductor capacitor

NASA Astrophysics Data System (ADS)

William, S.; Mabrook, M. F.; Taylor, D. M.

2009-08-01

A floating gate memory element is described which incorporates an evaporated gold film embedded in the gate dielectric of a metal-insulator-semiconductor capacitor based on poly(3-hexylthiophene). On exceeding a critical amplitude in the voltage sweep, hysteresis is observed in the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of the device. The anticlockwise hysteresis in C-V is consistent with strong electron trapping during the positive cycle but little hole trapping during the negative cycle. We argue that the clockwise hysteresis observed in the negative cycle of the I-V plot, arises from leakage of trapped holes through the underlying insulator to the control gate.

A chiral-based magnetic memory device without a permanent magnet

PubMed Central

Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

A chiral-based magnetic memory device without a permanent magnet.

PubMed

Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

Large-area, flexible imaging arrays constructed by light-charge organic memories

PubMed Central

Zhang, Lei; Wu, Ti; Guo, Yunlong; Zhao, Yan; Sun, Xiangnan; Wen, Yugeng; Yu, Gui; Liu, Yunqi

2013-01-01

Existing organic imaging circuits, which offer attractive benefits of light weight, low cost and flexibility, are exclusively based on phototransistor or photodiode arrays. One shortcoming of these photo-sensors is that the light signal should keep invariant throughout the whole pixel-addressing and reading process. As a feasible solution, we synthesized a new charge storage molecule and embedded it into a device, which we call light-charge organic memory (LCOM). In LCOM, the functionalities of photo-sensor and non-volatile memory are integrated. Thanks to the deliberate engineering of electronic structure and self-organization process at the interface, 92% of the stored charges, which are linearly controlled by the quantity of light, retain after 20000 s. The stored charges can also be non-destructively read and erased by a simple voltage program. These results pave the way to large-area, flexible imaging circuits and demonstrate a bright future of small molecular materials in non-volatile memory. PMID:23326636

Printing Electronic Components from Copper-Infused Ink and Thermoplastic Mediums

NASA Astrophysics Data System (ADS)

Flowers, Patrick F.

The demand for printable electronics has sharply increased in recent years and is projected to continue to rise. Unfortunately, electronic materials which are suitable for desired applications while being compatible with available printing techniques are still often lacking. This thesis addresses two such challenging areas. In the realm of two-dimensional ink-based printing of electronics, a major barrier to the realization of printable computers that can run programs is the lack of a solution-coatable non-volatile memory with performance metrics comparable to silicon-based devices. To address this deficiency, I developed a nonvolatile memory based on Cu-SiO2 core-shell nanowires that can be printed from solution and exhibits on-off ratios of 106, switching speeds of 50 ns, a low operating voltage of 2 V, and operates for at least 104 cycles without failure. Each of these metrics is similar to or better than Flash memory (the write speed is 20 times faster than Flash). Memory architectures based on the individual memory cells demonstrated here could enable the printing of the more complex, embedded computing devices that are expected to make up an internet of things. Recently, the exploration of three-dimensional printing techniques to fabricate electronic materials began. A suitable general-purpose conductive thermoplastic filament was not available, however. In this work I examine the current state of conductive thermoplastic filaments, including a newly-released highly conductive filament that my lab has produced which we call Electrifi. I focus on the use of dual-material fused filament fabrication (FFF) to 3D print electronic components (conductive traces, resistors, capacitors, inductors) and circuits (a fully-printed high-pass filter). The resistivity of traces printed from conductive thermoplastic filaments made with carbon-black, graphene, and copper as conductive fillers was found to be 12, 0.78, and 0.014 ohm cm, respectively, enabling the creation of resistors with resistances spanning 3 orders of magnitude. The carbon black and graphene filaments were brittle and fractured easily, but the copper-based filament could be bent at least 500 times with little change in its resistance. Impedance measurements made on the thermoplastic filaments demonstrate that the copper-based filament had an impedance similar to a conductive PCB trace at 1 MHz. Dual material 3D printing was used to fabricate a variety of inductors and capacitors with properties that could be predictably tuned by modifying either the geometry of the components, or the materials used to fabricate the components. These resistors, capacitors, and inductors were combined to create a fully 3D printed high-pass filter with properties comparable to its conventional counterparts. The relatively low impedance of the copper-based filament enable its use to 3D print a receiver coil for wireless power transfer. We also demonstrate the ability to embed and connect surface mounted components in 3D printed objects with a low-cost ($1,000 in parts), open source dual-material 3D printer. This work thus demonstrates the potential for FFF 3D printing to create complex, three-dimensional circuits composed of either embedded or fully-printed electronic components.

Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2007-01-01

Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

MoSbTe for high-speed and high-thermal-stability phase-change memory applications

NASA Astrophysics Data System (ADS)

Liu, Wanliang; Wu, Liangcai; Li, Tao; Song, Zhitang; Shi, Jianjun; Zhang, Jing; Feng, Songlin

2018-04-01

Mo-doped Sb1.8Te materials and electrical devices were investigated for high-thermal-stability and high-speed phase-change memory applications. The crystallization temperature (t c = 185 °C) and 10-year data retention (t 10-year = 112 °C) were greatly enhanced compared with those of Ge2Sb2Te5 (t c = 150 °C, t 10-year = 85 °C) and pure Sb1.8Te (t c = 166 °C, t 10-year = 74 °C). X-ray diffraction and transmission electron microscopy results show that the Mo dopant suppresses crystallization, reducing the crystalline grain size. Mo2.0(Sb1.8Te)98.0-based devices were fabricated to evaluate the reversible phase transition properties. SET/RESET with a large operation window can be realized using a 10 ns pulse, which is considerably better than that required for Ge2Sb2Te5 (∼50 ns). Furthermore, ∼1 × 106 switching cycles were achieved.

Biomaterial-based Memory Device Development by Conducting Metallic DNA

DTIC Science & Technology

2013-05-28

time. Therefore, we have created a multiple-states memory system . This is the first multi-states resistance memory device by using bio-nanowire of the...world. Based on this achievement, logic device and application will be developed in the near future, too. Moreover, by using Ni-DNA detection system ...ions in DNA can change the resistance of Ni-DNA by applying different polar bias and time. Therefore, we have created a multiple-states memory system

Novel nano materials for high performance logic and memory devices

NASA Astrophysics Data System (ADS)

Das, Saptarshi

After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the device area -- in this way ultimately improving the packing density and leading towards high performance memory devices.

Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices

NASA Astrophysics Data System (ADS)

Yadav, Manoj; Velampati, Ravi Shankar R.; Mandal, D.; Sharma, Rohit

2018-03-01

Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance-voltage (C-V) and capacitance-time (C-t) response of the fabricated MOS NVM capacitor. The C-V and C-t characteristics depict a large flat band voltage shift (V FB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.

Time-resolved photoluminescence of SiOx encapsulated Si

NASA Astrophysics Data System (ADS)

Kalem, Seref; Hannas, Amal; Österman, Tomas; Sundström, Villy

Silicon and its oxide SiOx offer a number of exciting electrical and optical properties originating from defects and size reduction enabling engineering new electronic devices including resistive switching memories. Here we present the results of photoluminescence dynamics relevant to defects and quantum confinement effects. Time-resolved luminescence at room temperature exhibits an ultrafast decay component of less than 10 ps at around 480 nm and a slower component of around 60 ps as measured by streak camera. Red shift at the initial stages of the blue luminescence decay confirms the presence of a charge transfer to long lived states. Time-correlated single photon counting measurements revealed a life-time of about 5 ns for these states. The same quantum structures emit in near infrared close to optical communication wavelengths. Nature of the emission is described and modeling is provided for the luminescence dynamics. The electrical characteristics of metal-oxide-semiconductor devices were correlated with the optical and vibrational measurement results in order to have better insight into the switching mechanisms in such resistive devices as possible next generation RAM memory elements. ``This work was supported by ENIAC Joint Undertaking and Laser-Lab Europe''.

Video System for Viewing From a Remote or Windowless Cockpit

NASA Technical Reports Server (NTRS)

Banerjee, Amamath

2009-01-01

A system of electronic hardware and software synthesizes, in nearly real time, an image of a portion of a scene surveyed by as many as eight video cameras aimed, in different directions, at portions of the scene. This is a prototype of systems that would enable a pilot to view the scene outside a remote or windowless cockpit. The outputs of the cameras are digitized. Direct memory addressing is used to store the data of a few captured images in sequence, and the sequence is repeated in cycles. Cylindrical warping is used in merging adjacent images at their borders to construct a mosaic image of the scene. The mosaic-image data are written to a memory block from which they can be rendered on a head-mounted display (HMD) device. A subsystem in the HMD device tracks the direction of gaze of the wearer, providing data that are used to select, for display, the portion of the mosaic image corresponding to the direction of gaze. The basic functionality of the system has been demonstrated by mounting the cameras on the roof of a van and steering the van by use of the images presented on the HMD device.

Space and power efficient hybrid counters array

DOEpatents

Gara, Alan G [Mount Kisco, NY; Salapura, Valentina [Chappaqua, NY

2009-05-12

A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.

Space and power efficient hybrid counters array

DOEpatents

Gara, Alan G.; Salapura, Valentina

2010-03-30

A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.

Electrical studies of Ge4Sb1Te5 devices for memory applications

NASA Astrophysics Data System (ADS)

Sangeetha, B. G.; Shylashree, N.

2018-05-01

In this paper, the Ge4Sb1Te5 thin film device preparation and electrical studies for memory devices were carried out. The device was deposited using vapor-evaporation technique. RESET to SET state switching was shown using current-voltage characterization. The current-voltage characterization shows the switching between SET to RESET state and it was found that it requires a low energy for transition. Switching between amorphous to crystalline nature was studied using resistance-voltage characteristics. The endurance showed the effective use of this composition for memory device.

Intermediate memory devices

NASA Technical Reports Server (NTRS)

Basalayev, G. V.; Kmet, A. B.; Rakov, M. A.; Tarasevich, V. A.

1974-01-01

Several methods of transfer and processing of data whose practical implementation requires operational memory devices are described. Devices incorporating multistable elements are proposed and their main parameters are given. The possibility of using the proposed devices for storing information for transmission in space radio communications channels is examined.

Interface engineering of semiconductor/dielectric heterojunctions toward functional organic thin-film transistors.

PubMed

Zhang, Hongtao; Guo, Xuefeng; Hui, Jingshu; Hu, Shuxin; Xu, Wei; Zhu, Daoben

2011-11-09

Interface modification is an effective and promising route for developing functional organic field-effect transistors (OFETs). In this context, however, researchers have not created a reliable method of functionalizing the interfaces existing in OFETs, although this has been crucial for the technological development of high-performance CMOS circuits. Here, we demonstrate a novel approach that enables us to reversibly photocontrol the carrier density at the interface by using photochromic spiropyran (SP) self-assembled monolayers (SAMs) sandwiched between active semiconductors and gate insulators. Reversible changes in dipole moment of SPs in SAMs triggered by lights with different wavelengths produce two distinct built-in electric fields on the OFET that can modulate the channel conductance and consequently threshold voltage values, thus leading to a low-cost noninvasive memory device. This concept of interface functionalization offers attractive new prospects for the development of organic electronic devices with tailored electronic and other properties.

Growth of low temperature silicon nano-structures for electronic and electrical energy generation applications.

PubMed

Gabrielyan, Nare; Saranti, Konstantina; Manjunatha, Krishna Nama; Paul, Shashi

2013-02-15

This paper represents the lowest growth temperature for silicon nano-wires (SiNWs) via a vapour-liquid-solid method, which has ever been reported in the literature. The nano-wires were grown using plasma-enhanced chemical vapour deposition technique at temperatures as low as 150°C using gallium as the catalyst. This study investigates the structure and the size of the grown silicon nano-structure as functions of growth temperature and catalyst layer thickness. Moreover, the choice of the growth temperature determines the thickness of the catalyst layer to be used.The electrical and optical characteristics of the nano-wires were tested by incorporating them in photovoltaic solar cells, two terminal bistable memory devices and Schottky diode. With further optimisation of the growth parameters, SiNWs, grown by our method, have promising future for incorporation into high performance electronic and optical devices.

Growth of low temperature silicon nano-structures for electronic and electrical energy generation applications

PubMed Central

2013-01-01

This paper represents the lowest growth temperature for silicon nano-wires (SiNWs) via a vapour-liquid–solid method, which has ever been reported in the literature. The nano-wires were grown using plasma-enhanced chemical vapour deposition technique at temperatures as low as 150°C using gallium as the catalyst. This study investigates the structure and the size of the grown silicon nano-structure as functions of growth temperature and catalyst layer thickness. Moreover, the choice of the growth temperature determines the thickness of the catalyst layer to be used. The electrical and optical characteristics of the nano-wires were tested by incorporating them in photovoltaic solar cells, two terminal bistable memory devices and Schottky diode. With further optimisation of the growth parameters, SiNWs, grown by our method, have promising future for incorporation into high performance electronic and optical devices. PMID:23413969

Layered memristive and memcapacitive switches for printable electronics

NASA Astrophysics Data System (ADS)

Bessonov, Alexander A.; Kirikova, Marina N.; Petukhov, Dmitrii I.; Allen, Mark; Ryhänen, Tapani; Bailey, Marc J. A.

2015-02-01

Novel computing technologies that imitate the principles of biological neural systems may offer low power consumption along with distinct cognitive and learning advantages. The development of reliable memristive devices capable of storing multiple states of information has opened up new applications such as neuromorphic circuits and adaptive systems. At the same time, the explosive growth of the printed electronics industry has expedited the search for advanced memory materials suitable for manufacturing flexible devices. Here, we demonstrate that solution-processed MoOx/MoS2 and WOx/WS2 heterostructures sandwiched between two printed silver electrodes exhibit an unprecedentedly large and tunable electrical resistance range from 102 to 108 Ω combined with low programming voltages of 0.1-0.2 V. The bipolar resistive switching, with a concurrent capacitive contribution, is governed by an ultrathin (<3 nm) oxide layer. With strong nonlinearity in switching dynamics, different mechanisms of synaptic plasticity are implemented by applying a sequence of electrical pulses.

Reversal of spontaneous magnetization and spontaneous exchange bias for Sm1-xYxCrO3: The effect of Y doping

NASA Astrophysics Data System (ADS)

Zhang, Hongguang; Wang, Jianhua; Xie, Liang; Fu, Dexiang; Guo, Yanyan; Li, Yongtao

2017-11-01

We report the crystal and electronic structures and magnetic properties of non-magnetic Y3+ ion doped SmCrO3 crystals. Structural distortion and electronic structure variation are caused by cation disorder due to Y doping. Although the spin moment of Sm3+ is diluted by nonmagnetic Y ions, spin reorientation continues to exist, and the temperature-dependent magnetization reversal effect and the spontaneous exchange bias effect under zero field cooling are simultaneously induced below Neel temperature. Significantly, the method of doping promotes the achievement of temperature dependent tunable switching of magnetization and sign of a spontaneous exchange bias from positive to negative. Our work provides more tunable ways to the sign reversal of magnetization and exchange bias, which have potential application in designing magnetic random access memory devices, thermomagnetic switches and spin-valve devices.

Neuromorphic computing enabled by physics of electron spins: Prospects and perspectives

NASA Astrophysics Data System (ADS)

Sengupta, Abhronil; Roy, Kaushik

2018-03-01

“Spintronics” refers to the understanding of the physics of electron spin-related phenomena. While most of the significant advancements in this field has been driven primarily by memory, recent research has demonstrated that various facets of the underlying physics of spin transport and manipulation can directly mimic the functionalities of the computational primitives in neuromorphic computation, i.e., the neurons and synapses. Given the potential of these spintronic devices to implement bio-mimetic computations at very low terminal voltages, several spin-device structures have been proposed as the core building blocks of neuromorphic circuits and systems to implement brain-inspired computing. Such an approach is expected to play a key role in circumventing the problems of ever-increasing power dissipation and hardware requirements for implementing neuro-inspired algorithms in conventional digital CMOS technology. Perspectives on spin-enabled neuromorphic computing, its status, and challenges and future prospects are outlined in this review article.

Smart trigger logic for focal plane arrays

DOEpatents

Levy, James E; Campbell, David V; Holmes, Michael L; Lovejoy, Robert; Wojciechowski, Kenneth; Kay, Randolph R; Cavanaugh, William S; Gurrieri, Thomas M

2014-03-25

An electronic device includes a memory configured to receive data representing light intensity values from pixels in a focal plane array and a processor that analyzes the received data to determine which light values correspond to triggered pixels, where the triggered pixels are those pixels that meet a predefined set of criteria, and determines, for each triggered pixel, a set of neighbor pixels for which light intensity values are to be stored. The electronic device also includes a buffer that temporarily stores light intensity values for at least one previously processed row of pixels, so that when a triggered pixel is identified in a current row, light intensity values for the neighbor pixels in the previously processed row and for the triggered pixel are persistently stored, as well as a data transmitter that transmits the persistently stored light intensity values for the triggered and neighbor pixels to a data receiver.

Charge Carrier Transport Mechanism Based on Stable Low Voltage Organic Bistable Memory Device.

PubMed

Ramana, V V; Moodley, M K; Kumar, A B V Kiran; Kannan, V

2015-05-01

A solution processed two terminal organic bistable memory device was fabricated utilizing films of polymethyl methacrylate PMMA/ZnO/PMMA on top of ITO coated glass. Electrical characterization of the device structure showed that the two terminal device exhibited favorable switching characteristics with an ON/OFF ratio greater than 1 x 10(4) when the voltage was swept between - 2 V and +3 V. The device maintained its state after removal of the bias voltage. The device did not show degradation after a 1-h retention test at 120 degrees C. The memory functionality was consistent even after fifty cycles of operation. The charge transport switching mechanism is discussed on the basis of carrier transport mechanism and our analysis of the data shows that the charge carrier trans- port mechanism of the device during the writing process can be explained by thermionic emission (TE) and space-charge-limited-current (SCLC) mechanism models while erasing process could be explained by the FN tunneling mechanism. This demonstration provides a class of memory devices with the potential for low-cost, low-power consumption applications, such as a digital memory cell.

In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory.

PubMed

Hwang, Eun Suk; Kim, Jun Shik; Jeon, Seok Min; Lee, Seung Jun; Jang, Younjin; Cho, Deok-Yong; Hwang, Cheol Seong

2018-04-01

The programming characteristics of charge trap flash memory device adopting amorphous In 2 Ga 2 ZnO 7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm thick a-IGZO layer on a 20 nm thick SiO 2 (blocking oxide)/p ++ -Si (control gate) substrate, where 3 nm thick atomic layer deposited Al 2 O 3 (tunneling oxide) and 5 nm thick low-pressure CVD Si 3 N 4 (charge trap) layers were intervened between the a-IGZO and substrate. Despite the identical stoichiometry and other physicochemical properties of the MOCVD and sputtered a-IGZO, a much faster programming speed of MOCVD a-IGZO was observed. A comparable amount of oxygen vacancies was found in both MOCVD and sputtered a-IGZO, confirmed by x-ray photoelectron spectroscopy and bias-illumination-instability test measurements. Ultraviolet photoelectron spectroscopy analysis revealed a higher Fermi level (E F ) of the MOCVD a-IGZO (∼0.3 eV) film than that of the sputtered a-IGZO, which could be ascribed to the higher hydrogen concentration in the MOCVD a-IGZO film. Since the programming in a flash memory device is governed by the tunneling of electrons from the channel to charge trapping layer, the faster programming performance could be the result of a higher E F of MOCVD a-IGZO.

In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory

NASA Astrophysics Data System (ADS)

Hwang, Eun Suk; Kim, Jun Shik; Jeon, Seok Min; Lee, Seung Jun; Jang, Younjin; Cho, Deok-Yong; Hwang, Cheol Seong

2018-04-01

The programming characteristics of charge trap flash memory device adopting amorphous In2Ga2ZnO7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm thick a-IGZO layer on a 20 nm thick SiO2 (blocking oxide)/p++-Si (control gate) substrate, where 3 nm thick atomic layer deposited Al2O3 (tunneling oxide) and 5 nm thick low-pressure CVD Si3N4 (charge trap) layers were intervened between the a-IGZO and substrate. Despite the identical stoichiometry and other physicochemical properties of the MOCVD and sputtered a-IGZO, a much faster programming speed of MOCVD a-IGZO was observed. A comparable amount of oxygen vacancies was found in both MOCVD and sputtered a-IGZO, confirmed by x-ray photoelectron spectroscopy and bias-illumination-instability test measurements. Ultraviolet photoelectron spectroscopy analysis revealed a higher Fermi level (E F) of the MOCVD a-IGZO (∼0.3 eV) film than that of the sputtered a-IGZO, which could be ascribed to the higher hydrogen concentration in the MOCVD a-IGZO film. Since the programming in a flash memory device is governed by the tunneling of electrons from the channel to charge trapping layer, the faster programming performance could be the result of a higher E F of MOCVD a-IGZO.

Spintronic Nanodevices for Bioinspired Computing

PubMed Central

Grollier, Julie; Querlioz, Damien; Stiles, Mark D.

2016-01-01

Bioinspired hardware holds the promise of low-energy, intelligent, and highly adaptable computing systems. Applications span from automatic classification for big data management, through unmanned vehicle control, to control for biomedical prosthesis. However, one of the major challenges of fabricating bioinspired hardware is building ultra-high-density networks out of complex processing units interlinked by tunable connections. Nanometer-scale devices exploiting spin electronics (or spintronics) can be a key technology in this context. In particular, magnetic tunnel junctions (MTJs) are well suited for this purpose because of their multiple tunable functionalities. One such functionality, non-volatile memory, can provide massive embedded memory in unconventional circuits, thus escaping the von-Neumann bottleneck arising when memory and processors are located separately. Other features of spintronic devices that could be beneficial for bioinspired computing include tunable fast nonlinear dynamics, controlled stochasticity, and the ability of single devices to change functions in different operating conditions. Large networks of interacting spintronic nanodevices can have their interactions tuned to induce complex dynamics such as synchronization, chaos, soliton diffusion, phase transitions, criticality, and convergence to multiple metastable states. A number of groups have recently proposed bioinspired architectures that include one or several types of spintronic nanodevices. In this paper, we show how spintronics can be used for bioinspired computing. We review the different approaches that have been proposed, the recent advances in this direction, and the challenges toward fully integrated spintronics complementary metal–oxide–semiconductor (CMOS) bioinspired hardware. PMID:27881881

Radiation-tolerant imaging device

DOEpatents

Colella, Nicholas J.; Kimbrough, Joseph R.

1996-01-01

A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconductor logic or memory device from entering the collection volume of each pixel in the imaging device. The charge barrier is a physical barrier, a potential barrier, or a combination of both. The physical barrier is formed by an SiO.sub.2 insulator. The potential barrier is formed by increasing the concentration of majority carriers (holes) to combine with the electron's generated by the ionizing radiation. A manufacturer of CCD imaging devices can produce radiation-tolerant devices by merely changing the wafer type fed into his process stream from a standard wafer to one possessing a barrier beneath its surface, thus introducing a very small added cost to his production cost. An effective barrier type is an SiO.sub.2 layer.

Free energy barrier for molecular motions in bistable [2]rotaxane molecular electronic devices.

PubMed

Kim, Hyungjun; Goddard, William A; Jang, Seung Soon; Dichtel, William R; Heath, James R; Stoddart, J Fraser

2009-03-12

Donor-acceptor binding of the pi-electron-poor cyclophane cyclobis(paraquat-p-phenylene) (CBPQT(4+)) with the pi-electron-rich tetrathiafulvalene (TTF) and 1,5-dioxynaphthalene (DNP) stations provides the basis for electrochemically switchable, bistable [2]rotaxanes, which have been incorporated and operated within solid-state devices to form ultradense memory circuits (ChemPhysChem 2002, 3, 519-525; Nature 2007, 445, 414-417) and nanoelectromechanical systems. The rate of CBPQT(4+) shuttling at each oxidation state of the [2]rotaxane dictates critical write-and-retention time parameters within the devices, which can be tuned through chemical synthesis. To validate how well computational chemistry methods can estimate these rates for use in designing new devices, we used molecular dynamics simulations to calculate the free energy barrier for the shuttling of the CBPQT(4+) ring between the TTF and the DNP. The approach used here was to calculate the potential of mean force along the switching pathway, from which we calculated free energy barriers. These calculations find a turn-on time after the rotaxane is doubly oxidized of approximately 10(-7) s (suggesting that the much longer experimental turn-on time is determined by the time scale of oxidization). The return barrier from the DNP to the TTF leads to a predicted lifetime of 2.1 s, which is compatible with experiments.