Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang; , Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2013-03-12

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G [Champaign, IL; Rogers, John A [Champaign, IL; Menard, Etienne [Durham, NC; Lee, Keon Jae [Tokyo, JP; Khang, Dahl-Young [Urbana, IL; Sun, Yugang [Westmont, IL; Meitl, Matthew [Raleigh, NC; Zhu, Zhengtao [Rapid City, SD; Ko, Heung Cho [Urbana, IL; Mack, Shawn [Goleta, CA

2011-10-18

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2010-09-21

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Standardization of Schwarz-Christoffel transformation for engineering design of semiconductor and hybrid integrated-circuit elements

NASA Astrophysics Data System (ADS)

Yashin, A. A.

1985-04-01

A semiconductor or hybrid structure into a calculable two-dimensional region mapped by the Schwarz-Christoffel transformation and a universal algorithm can be constructed on the basis of Maxwell's electro-magnetic-thermal similarity principle for engineering design of integrated-circuit elements. The design procedure involves conformal mapping of the original region into a polygon and then the latter into a rectangle with uniform field distribution, where conductances and capacitances are calculated, using tabulated standard mapping functions. Subsequent synthesis of a device requires inverse conformal mapping. Devices adaptable as integrated-circuit elements are high-resistance film resistors with periodic serration, distributed-resistance film attenuators with high transformation ratio, coplanar microstrip lines, bipolar transistors, directional couplers with distributed coupling to microstrip lines for microwave bulk devices, and quasirregular smooth matching transitions from asymmetric to coplanar microstrip lines.

Multi-harmonic quantum dot optomechanics in fused LiNbO3-(Al)GaAs hybrids

NASA Astrophysics Data System (ADS)

Nysten, Emeline D. S.; Huo, Yong Heng; Yu, Hailong; Song, Guo Feng; Rastelli, Armando; Krenner, Hubert J.

2017-11-01

We fabricated an acousto-optic semiconductor hybrid device for strong optomechanical coupling of individual quantum emitters and a surface acoustic wave. Our device comprises of a surface acoustic wave chip made from highly piezoelectric LiNbO3 and a GaAs-based semiconductor membrane with an embedded layer of quantum dots. Employing multi-harmonic transducers, we generated sound waves on LiNbO3 over a wide range of radio frequencies. We monitored their coupling to and propagation across the semiconductor membrane, both in the electrical and optical domain. We demonstrate the enhanced optomechanical tuning of the embedded quantum dots with increasing frequencies. This effect was verified by finite element modelling of our device geometry and attributed to an increased localization of the acoustic field within the semiconductor membrane. For moderately high acoustic frequencies, our simulations predict strong optomechanical coupling, making our hybrid device ideally suited for applications in semiconductor based quantum acoustics.

The Physics of Semiconductors

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

1999-02-01

Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.

Semiconductor apparatus utilizing gradient freeze and liquid-solid techniques

NASA Technical Reports Server (NTRS)

Fleurial, Jean-Pierre (Inventor); Caillat, Thierry F. (Inventor); Borshchevsky, Alexander (Inventor)

1998-01-01

Transition metals of Group VIII (Co, Rh and Ir) have been prepared as semiconductor compounds with the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freezing techniques and/or liquid phase sintering techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 1200 cm.sup.2.V.sup.-1.s.sup.-1) and good Seebeck coefficients (up to 150 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a substantial increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Minority carrier device comprising a passivating layer including a Group 13 element and a chalcogenide component

NASA Technical Reports Server (NTRS)

Barron, Andrew R. (Inventor); Hepp, Aloysius F. (Inventor); Jenkins, Phillip P. (Inventor); MacInnes, Andrew N. (Inventor)

1999-01-01

A minority carrier device includes at least one junction of at least two dissimilar materials, at least one of which is a semiconductor, and a passivating layer on at least one surface of the device. The passivating layer includes a Group 13 element and a chalcogenide component. Embodiments of the minority carrier device include, for example, laser diodes, light emitting diodes, heterojunction bipolar transistors, and solar cells.

III-V aresenide-nitride semiconductor materials and devices

NASA Technical Reports Server (NTRS)

Major, Jo S. (Inventor); Welch, David F. (Inventor); Scifres, Donald R. (Inventor)

1997-01-01

III-V arsenide-nitride semiconductor crystals, methods for producing such crystals and devices employing such crystals. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

A splitting scheme based on the space-time CE/SE method for solving multi-dimensional hydrodynamical models of semiconductor devices

NASA Astrophysics Data System (ADS)

Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul

2016-08-01

Numerical solutions of the hydrodynamical model of semiconductor devices are presented in one and two-space dimension. The model describes the charge transport in semiconductor devices. Mathematically, the models can be written as a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the conservation element and solution element (CE/SE) method for hyperbolic step, and a semi-implicit scheme for the relaxation step. The numerical results of the suggested scheme are compared with the splitting scheme based on Nessyahu-Tadmor (NT) central scheme for convection step and the same semi-implicit scheme for the relaxation step. The effects of various parameters such as low field mobility, device length, lattice temperature and voltages for one-space dimensional hydrodynamic model are explored to further validate the generic applicability of the CE/SE method for the current model equations. A two dimensional simulation is also performed by CE/SE method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.

Electron counting and a large family of two-dimensional semiconductors

NASA Astrophysics Data System (ADS)

Miao, Maosheng; Botana, Jorge; Zurek, Eva; Liu, Jingyao; Yang, Wen

Two-dimensional semiconductors (2DSC) are currently the focus of many studies, thanks to their novel and superior transport properties that may greatly influence future electronic devices. The potential applications of 2DSCs range from low-dimensional electronics, topological insulators and vallytronics all the way to novel photolysis. However, compared with the conventional semiconductors that are comprised of main group elements and cover a large range of band gaps and lattice constants, the choice of 2D materials is very limited. In this work, we propose and demonstrate a large family of 2DSCs, all adopting the same structure and consisting of only main group elements. Using advanced density functional calculations, we demonstrate the attainability of these materials, and show that they cover a large range of lattice constants, band gaps and band edge states, making them good candidate materials for heterojunctions. This family of two dimensional materials may be instrumental in the fabrication of 2DSC devices that may rival the currently employed 3D semiconductors.

Method For Growth of Crystal Surfaces and Growth of Heteroepitaxial Single Crystal Films Thereon

NASA Technical Reports Server (NTRS)

Powell, J. Anthony (Inventor); Larkin, David J. (Inventor); Neudeck, Philip G. (Inventor); Matus, Lawrence G. (Inventor)

2000-01-01

A method of growing atomically-flat surfaces and high quality low-defect crystal films of semiconductor materials and fabricating improved devices thereon is discussed. The method is also suitable for growing films heteroepitaxially on substrates that are different than the film. The method is particularly suited for growth of elemental semiconductors (such as Si), compounds of Groups III and V elements of the Periodic Table (such as GaN), and compounds and alloys of Group IV elements of the Periodic Table (such as SiC).

Layered semiconductor neutron detectors

DOEpatents

Mao, Samuel S; Perry, Dale L

2013-12-10

Room temperature operating solid state hand held neutron detectors integrate one or more relatively thin layers of a high neutron interaction cross-section element or materials with semiconductor detectors. The high neutron interaction cross-section element (e.g., Gd, B or Li) or materials comprising at least one high neutron interaction cross-section element can be in the form of unstructured layers or micro- or nano-structured arrays. Such architecture provides high efficiency neutron detector devices by capturing substantially more carriers produced from high energy .alpha.-particles or .gamma.-photons generated by neutron interaction.

Crystal growth of device quality GaAs in space

NASA Technical Reports Server (NTRS)

Gatos, H. C.; Lagowski, J.

1986-01-01

It was established that the findings on elemental semiconductors Ge and Si regarding crystal growth, segregation, chemical composition, defect interactions, and materials properties-electronic properties relationships are not necessarily applicable to GaAs (and to other semiconductor compounds). In many instances totally unexpected relationships were found to prevail. It was further established that in compound semiconductors with a volatile constituent, control of stoichiometry is far more critical than any other crystal growth parameter. It was also shown that, due to suppression of nonstoichiometric fluctuations, the advantages of space for growth of semiconductor compounds extend far beyond those observed in elemental semiconductors. A novel configuration was discovered for partial confinement of GaAs melt in space which overcomes the two major problems associated with growth of semiconductors in total confinement. They are volume expansion during solidification and control of pressure of the volatile constituent. These problems are discussed in detail.

Optoelectronic Devices and Materials

NASA Astrophysics Data System (ADS)

Sweeney, Stephen; Adams, Alfred

Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.

A 500 A device characterizer utilizing a pulsed-linear amplifier

NASA Astrophysics Data System (ADS)

Lacouture, Shelby; Bayne, Stephen

2016-02-01

With the advent of modern power semiconductor switching elements, the envelope defining "high power" is an ever increasing quantity. Characterization of these semiconductor power devices generally falls into two categories: switching, or transient characteristics, and static, or DC characteristics. With the increasing native voltage and current levels that modern power devices are capable of handling, characterization equipment meant to extract quasi-static IV curves has not kept pace, often leaving researchers with no other option than to construct ad hoc curve tracers from disparate pieces of equipment. In this paper, a dedicated 10 V, 500 A curve tracer was designed and constructed for use with state of the art high power semiconductor switching and control elements. The characterizer is a physically small, pulsed power system at the heart of which is a relatively high power linear amplifier operating in a switched manner in order to deliver well defined square voltage pulses. These actively shaped pulses are used to obtain device's quasi-static DC characteristics accurately without causing any damage to the device tested. Voltage and current waveforms from each pulse are recorded simultaneously by two separate high-speed analog to digital converters and averaged over a specified interval to obtain points in the reconstructed IV graph.

Pattern transfer printing by kinetic control of adhesion to an elastomeric stamp

DOEpatents

Nuzzo, Ralph G [Champaign, IL; Rogers, John A [Champaign, IL; Menard, Etienne [Urbana, IL; Lee, Keon Jae [Tokyo, JP; Khang, Dahl-Young [Urbana, IL; Sun, Yugang [Champaign, IL; Meitl, Matthew [Champaign, IL; Zhu, Zhengtao [Urbana, IL

2011-05-17

The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of `soft adhesion` to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

MM&T Program to Establish Production Techniques for the Automatic Detection and Qualification of Trace Elements Present in the Production of Microwave Semiconductors.

DTIC Science & Technology

1981-03-01

lots. A single store of partially processed devices may serve as a source for several different product lines. Because the manufacture of microwave...matrix, or react chem- ically with some of the semiconductor materials. In some cases these element impurities may migrate to an interface inducing... different viscosity, the background intensity varied independently of the signal, a significant error could be introduced. A more effec- tive method

Photoconductive circuit element pulse generator

DOEpatents

Rauscher, Christen

1989-01-01

A pulse generator for characterizing semiconductor devices at millimeter wavelength frequencies where a photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test.

Finite element simulations of electrostatic dopant potentials in thin semiconductor specimens for electron holography.

PubMed

Somodi, P K; Twitchett-Harrison, A C; Midgley, P A; Kardynał, B E; Barnes, C H W; Dunin-Borkowski, R E

2013-11-01

Two-dimensional finite element simulations of electrostatic dopant potentials in parallel-sided semiconductor specimens that contain p-n junctions are used to assess the effect of the electrical state of the surface of a thin specimen on projected potentials measured using off-axis electron holography in the transmission electron microscope. For a specimen that is constrained to have an equipotential surface, the simulations show that the step in the projected potential across a p-n junction is always lower than would be predicted from the properties of the bulk device, but is relatively insensitive to the value of the surface state energy, especially for thicker specimens and higher dopant concentrations. The depletion width measured from the projected potential, however, has a complicated dependence on specimen thickness. The results of the simulations are of broader interest for understanding the influence of surfaces and interfaces on electrostatic potentials in nanoscale semiconductor devices. © 2013 Elsevier B.V. All rights reserved.

High performance thermoelectric materials and methods of preparation

NASA Technical Reports Server (NTRS)

Fleurial, Jean-Pierre (Inventor); Caillat, Thierry F. (Inventor); Borshchevsky, Alexander (Inventor)

1997-01-01

Transition metals (T) of Group VIII (Co, Rh and Ir) have been prepared as semiconductor alloys with Sb having the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor alloys and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor alloys having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freeze techniques, liquid-solid phase sintering techniques, low temperature powder sintering and/or hot-pressing. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 8000 cm.sup.2.V.sup.-1.s.sup.-1), good Seebeck coefficients (up to 400 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.), and low thermal conductivities (as low as 15 mW/cmK). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a two fold increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Theoretical study of piezo-phototronic nano-LEDs.

PubMed

Liu, Ying; Niu, Simiao; Yang, Qing; Klein, Benjamin D B; Zhou, Yu Sheng; Wang, Zhong Lin

2014-11-12

Two-dimensional finite-element simulation of the piezo-phototronic effect in p-n-junction-based devices is carried out for the first time. A charge channel can be induced at the p-n junction interface when strain is applied, given the n-side is a piezoelectric semiconductor and the p-type side is non-piezoelectric semiconductor. This provides the first simulated evidence supporting the previously suggested mechanism responsible for the experimentally observed gigantic change of light-emission efficiency in piezo-phototronic light-emitting devices. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Zinc Alloys for the Fabrication of Semiconductor Devices

NASA Technical Reports Server (NTRS)

Ryu, Yungryel; Lee, Tae S.

2009-01-01

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

The measurement of alpha particle emissions from semiconductor memory materials

NASA Astrophysics Data System (ADS)

Bouldin, D. P.

1981-07-01

With the increasing concern for the affects of alpha particles on the reliability of semiconductor memories, an interest has arisen in characterizing semiconductor manufacturing materials for extremely low-level alpha-emitting contaminants. It is shown that four elements are of primary concern: uranium, thorium, radium, and polonium. Measurement of contamination levels are given relevance by first correlating them with alpha flux emission levels and then corre1ating these flux values with device soft error rates. Measurement techniques involve either measurements of elemental concentrations-applicable to only uranium and thorium - or direct measurements of alpha emission fluxes. Alpha fluxes are most usefully measured by means of ZnS scintillation counting, practical details of which are discussed. Materials measurements are reported for ceramics, solder, silicon, quartz, and various metals and organic materials. Ceramics and most metals have contamination levels of concern, but the high temperature processing normally used in semiconductor manufacturing and low total amounts reduce problems, at least for metals. Silicon, silicon compounds, and organic materials have been found to have no detectable alpha emitters. Finally, a brief discussion of the calibration of alpha sources for accelerated device testing is given, including practical details on the affects of source/chip separation and alignment variations.

Synchrotron-based soft X-ray spectroscopic studies of the electronic structure of organic semiconducting molecules

NASA Astrophysics Data System (ADS)

Demasi, Alexander

Organic molecules have been the subject of many scientific studies due to their potential for use in a new generation of optoelectronic and semiconducting devices, such as organic photovoltaics and organic light emitting diodes. These studies are motivated by the fact that organic semiconductor devices have several advantages over traditional inorganic semiconductor devices. Unlike inorganic semiconductors, where the electronic properties are a result of the deliberate introduction of dopants to the material, the properties of organic semiconductors are often intrinsic to the molecules themselves. As a result, organic semiconductor devices are frequently less susceptible to contamination by impurities than their inorganic counterparts, which results in the relatively lower cost of producing such devices. Accurate experimental determination of the bulk and surface electronic structure of organic semiconductors is a prerequisite in developing a comprehensive understanding of such materials. The organic materials studied in this thesis were N,N-Ethylene-bis(1,1,1trifluoropentane-2,4-dioneiminato)-copper(ii) (abbreviated Cu-TFAC), aluminum tris-8hydroxyquinoline (A1g3), lithium quinolate (Liq), tetracyanoquinodimethane (TCNQ), and tetrafluorotetracyanoquinodimethane (F4TCNQ). The electronic structures of these materials were measured with several synchrotron-based x-ray spectroscopies. X-ray photoemission spectroscopy was used to measure the occupied total density of states and the core-level states of the aforementioned materials. X-ray absorption spectroscopy (XAS) was used to probe the element-specific unoccupied partial density of states (PDOS); its angle-resolved variant was used to measure the orientation of the molecules in a film and, in some circumstances, to gauge the extent of an organic film's crystallinity. Most notably, x-ray emission spectroscopy (XES) measures the element- specific occupied PDOS and, when aided by XAS, resonant XES can additionally be used to probe the electronic structure of individual atomic sites within a molecule. Most of the results in this thesis are accompanied by the results of electronic structure calculations determined with density functional theory (DFT). DFT is a useful aid in interpreting the results of the x-ray spectroscopies employed. The experimental results, combined with DFT calculations, provide a wealth of information regarding the electronic structures of these organic materials. v

Three- and Two-Dimensional Tin and Lead Halide Perovskite Semiconductors: Synthesis and Application in Photovoltaics

NASA Astrophysics Data System (ADS)

Cao, Duyen Hanh

Halide perovskites, AMX3 (A = monocation, B = Ge, Sn, or Pb, and X = halogen), present a versatile class of solution-processable semiconductors made from earth abundant materials with outstanding electrical and optical properties. Their solar cell efficiencies have dramatically increased from 9% to 22% in less than five years since 2012, a rate that has never been seen before in photovoltaic research. Critical to the final goal of commercializing perovskite solar cell technology is achieving device long-term stability and eliminating toxic elements in device components. This thesis uses 3D AMX 3 perovskites as a stand-in to develop a new class of lead-free, moisture stable, functional and highly tunable 2D Ruddlesden-Popper (BA) 2(MA)n-1SnnI3n+1 (n is an integer) perovskite semiconductors. Synthesis, thin film fabrication, extensive characterization, and solar cell device structure-performance relationships are presented throughout the entire thesis.

Research and Development Strategies in the Semiconductor Industry

NASA Astrophysics Data System (ADS)

Bowling, Allen

2003-03-01

In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.

Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

NASA Astrophysics Data System (ADS)

Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

2015-09-01

Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

Macroporous Semiconductors

PubMed Central

Föll, Helmut; Leisner, Malte; Cojocaru, Ala; Carstensen, Jürgen

2010-01-01

Pores in single crystalline semiconductors come in many forms (e.g., pore sizes from 2 nm to > 10 µm; morphologies from perfect pore crystal to fractal) and exhibit many unique properties directly or as nanocompounds if the pores are filled. The various kinds of pores obtained in semiconductors like Ge, Si, III-V, and II-VI compound semiconductors are systematically reviewed, emphasizing macropores. Essentials of pore formation mechanisms will be discussed, focusing on differences and some open questions but in particular on common properties. Possible applications of porous semiconductors, including for example high explosives, high efficiency electrodes for Li ion batteries, drug delivery systems, solar cells, thermoelectric elements and many novel electronic, optical or sensor devices, will be introduced and discussed.

Clean graphene electrodes on organic thin-film devices via orthogonal fluorinated chemistry.

PubMed

Beck, Jonathan H; Barton, Robert A; Cox, Marshall P; Alexandrou, Konstantinos; Petrone, Nicholas; Olivieri, Giorgia; Yang, Shyuan; Hone, James; Kymissis, Ioannis

2015-04-08

Graphene is a promising flexible, highly transparent, and elementally abundant electrode for organic electronics. Typical methods utilized to transfer large-area films of graphene synthesized by chemical vapor deposition on metal catalysts are not compatible with organic thin-films, limiting the integration of graphene into organic optoelectronic devices. This article describes a graphene transfer process onto chemically sensitive organic semiconductor thin-films. The process incorporates an elastomeric stamp with a fluorinated polymer release layer that can be removed, post-transfer, via a fluorinated solvent; neither fluorinated material adversely affects the organic semiconductor materials. We used Raman spectroscopy, atomic force microscopy, and scanning electron microscopy to show that chemical vapor deposition graphene can be successfully transferred without inducing defects in the graphene film. To demonstrate our transfer method's compatibility with organic semiconductors, we fabricate three classes of organic thin-film devices: graphene field effect transistors without additional cleaning processes, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices. These experiments demonstrate the potential of hybrid graphene/organic devices in which graphene is deposited directly onto underlying organic thin-film structures.

Mixed-RKDG Finite Element Methods for the 2-D Hydrodynamic Model for Semiconductor Device Simulation

DOE PAGES

Chen, Zhangxin; Cockburn, Bernardo; Jerome, Joseph W.; ...

1995-01-01

In this paper we introduce a new method for numerically solving the equations of the hydrodynamic model for semiconductor devices in two space dimensions. The method combines a standard mixed finite element method, used to obtain directly an approximation to the electric field, with the so-called Runge-Kutta Discontinuous Galerkin (RKDG) method, originally devised for numerically solving multi-dimensional hyperbolic systems of conservation laws, which is applied here to the convective part of the equations. Numerical simulations showing the performance of the new method are displayed, and the results compared with those obtained by using Essentially Nonoscillatory (ENO) finite difference schemes. Frommore » the perspective of device modeling, these methods are robust, since they are capable of encompassing broad parameter ranges, including those for which shock formation is possible. The simulations presented here are for Gallium Arsenide at room temperature, but we have tested them much more generally with considerable success.« less

Diode and method of making the same

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dickerson, Jeramy Ray; Wierer, Jr., Jonathan; Kaplar, Robert

2018-03-13

A diode includes a second semiconductor layer over a first semiconductor layer. The diode further includes a third semiconductor layer over the second semiconductor layer, where the third semiconductor layer includes a first semiconductor element over the second semiconductor layer. The third semiconductor layer additionally includes a second semiconductor element over the second semiconductor layer, wherein the second semiconductor element surrounds the first semiconductor element. Further, the third semiconductor layer includes a third semiconductor element over the second semiconductor element. Furthermore, a hole concentration of the second semiconductor element is less than a hole concentration of the first semiconductor element.

Flexible non-volatile memory devices based on organic semiconductors

NASA Astrophysics Data System (ADS)

Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

2015-09-01

The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

Long-Term Stability of Mold Compounds and the Influence on Semiconductor Device Reliability

NASA Astrophysics Data System (ADS)

Mahler, Joachim; Mengel, Manfred

2012-07-01

Lifetimes of semiconductor devices are specified according to the products and their applications to ensure safe operation, for instance as part of an automobile product. The long-term stability of the device is strongly dependent on the chip encapsulation and its adhesion to the chip and substrate. Molded silicon strips that act as a model system for molded chips inside semiconductor devices were investigated. Four commercially available mold compounds were applied on silicon strips and stored over 5 years at room temperature (RT), and changes in the thermomechanical behavior were analyzed. After storage, all molded strips exhibited warpage reduction in the range of 11% to 14% at RT with respect to the initial warpage. The temperatures for the stress-free state also changed during storage and were located between 228°C and 235°C for each mold. Additional stress applied to the stored modules, by temperature cycling as well as high-temperature storage, increased the warpage of the molded silicon samples. For further interpretation of measured results, finite-element method calculations were performed.

Epitaxy of advanced nanowire quantum devices

NASA Astrophysics Data System (ADS)

Gazibegovic, Sasa; Car, Diana; Zhang, Hao; Balk, Stijn C.; Logan, John A.; de Moor, Michiel W. A.; Cassidy, Maja C.; Schmits, Rudi; Xu, Di; Wang, Guanzhong; Krogstrup, Peter; Op Het Veld, Roy L. M.; Zuo, Kun; Vos, Yoram; Shen, Jie; Bouman, Daniël; Shojaei, Borzoyeh; Pennachio, Daniel; Lee, Joon Sue; van Veldhoven, Petrus J.; Koelling, Sebastian; Verheijen, Marcel A.; Kouwenhoven, Leo P.; Palmstrøm, Chris J.; Bakkers, Erik P. A. M.

2017-08-01

Semiconductor nanowires are ideal for realizing various low-dimensional quantum devices. In particular, topological phases of matter hosting non-Abelian quasiparticles (such as anyons) can emerge when a semiconductor nanowire with strong spin-orbit coupling is brought into contact with a superconductor. To exploit the potential of non-Abelian anyons—which are key elements of topological quantum computing—fully, they need to be exchanged in a well-controlled braiding operation. Essential hardware for braiding is a network of crystalline nanowires coupled to superconducting islands. Here we demonstrate a technique for generic bottom-up synthesis of complex quantum devices with a special focus on nanowire networks with a predefined number of superconducting islands. Structural analysis confirms the high crystalline quality of the nanowire junctions, as well as an epitaxial superconductor-semiconductor interface. Quantum transport measurements of nanowire ‘hashtags’ reveal Aharonov-Bohm and weak-antilocalization effects, indicating a phase-coherent system with strong spin-orbit coupling. In addition, a proximity-induced hard superconducting gap (with vanishing sub-gap conductance) is demonstrated in these hybrid superconductor-semiconductor nanowires, highlighting the successful materials development necessary for a first braiding experiment. Our approach opens up new avenues for the realization of epitaxial three-dimensional quantum architectures which have the potential to become key components of various quantum devices.

Evaluation of semiconductor devices for Electric and Hybrid Vehicle (EHV) ac-drive applications, volume 1

NASA Technical Reports Server (NTRS)

Lee, F. C.; Chen, D. Y.; Jovanovic, M.; Hopkins, D. C.

1985-01-01

The results of evaluation of power semiconductor devices for electric hybrid vehicle ac drive applications are summarized. Three types of power devices are evaluated in the effort: high power bipolar or Darlington transistors, power MOSFETs, and asymmetric silicon control rectifiers (ASCR). The Bipolar transistors, including discrete device and Darlington devices, range from 100 A to 400 A and from 400 V to 900 V. These devices are currently used as key switching elements inverters for ac motor drive applications. Power MOSFETs, on the other hand, are much smaller in current rating. For the 400 V device, the current rating is limited to 25 A. For the main drive of an electric vehicle, device paralleling is normally needed to achieve practical power level. For other electric vehicle (EV) related applications such as battery charger circuit, however, MOSFET is advantageous to other devices because of drive circuit simplicity and high frequency capability. Asymmetrical SCR is basically a SCR device and needs commutation circuit for turn off. However, the device poses several advantages, i.e., low conduction drop and low cost.

Advanced thermoelectric materials with enhanced crystal lattice structure and methods of preparation

NASA Technical Reports Server (NTRS)

Fleurial, Jean-Pierre (Inventor); Caillat, Thierry F. (Inventor); Borshchevsky, Alexander (Inventor)

1998-01-01

New skutterudite phases including Ru.sub.0.5 Pd.sub.0.5 Sb.sub.3, RuSb.sub.2 Te, and FeSb.sub.2 Te, have been prepared having desirable thermoelectric properties. In addition, a novel thermoelectric device has been prepared using skutterudite phase Fe.sub.0.5 Ni.sub.0.5 Sb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using powder metallurgy techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities and good Seebeck coefficients. These materials have low thermal conductivity and relatively low electrical resistivity, and are good candidates for low temperature thermoelectric applications.

All-semiconductor metamaterial-based optical circuit board at the microscale

DOE Office of Scientific and Technical Information (OSTI.GOV)

Min, Li; Huang, Lirong, E-mail: lrhuang@hust.edu.cn

2015-07-07

The newly introduced metamaterial-based optical circuit, an analogue of electronic circuit, is becoming a forefront topic in the fields of electronics, optics, plasmonics, and metamaterials. However, metals, as the commonly used plasmonic elements in an optical circuit, suffer from large losses at the visible and infrared wavelengths. We propose here a low-loss, all-semiconductor metamaterial-based optical circuit board at the microscale by using interleaved intrinsic GaAs and doped GaAs, and present the detailed design process for various lumped optical circuit elements, including lumped optical inductors, optical capacitors, optical conductors, and optical insulators. By properly combining these optical circuit elements and arrangingmore » anisotropic optical connectors, we obtain a subwavelength optical filter, which can always hold band-stop filtering function for various polarization states of the incident electromagnetic wave. All-semiconductor optical circuits may provide a new opportunity in developing low-power and ultrafast components and devices for optical information processing.« less

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass

NASA Astrophysics Data System (ADS)

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-An; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V.; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-12-01

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III-V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co28.6Fe12.4Ta4.3B8.7O46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p-n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm2 V-1 s-1. Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities.

MBE Growth of Ferromagnetic Metal/Compound Semiconductor Heterostructures for Spintronics

ScienceCinema

Palmstrom, Chris [University of California, Santa Barbara, California, United States

2017-12-09

Electrical transport and spin-dependent transport across ferromagnet/semiconductor contacts is crucial in the realization of spintronic devices. Interfacial reactions, the formation of non-magnetic interlayers, and conductivity mismatch have been attributed to low spin injection efficiency. MBE has been used to grow epitaxial ferromagnetic metal/GA(1-x)AL(x)As heterostructures with the aim of controlling the interfacial structural, electronic, and magnetic properties. In situ, STM, XPS, RHEED and LEED, and ex situ XRD, RBS, TEM, magnetotransport, and magnetic characterization have been used to develop ferromagnetic elemental and metallic compound/compound semiconductor tunneling contacts for spin injection. The efficiency of the spin polarized current injected from the ferromagnetic contact has been determined by measuring the electroluminescence polarization of the light emitted from/GA(1-x)AL(x)As light-emitting diodes as a function of applied magnetic field and temperature. Interfacial reactions during MBE growth and post-growth anneal, as well as the semiconductor device band structure, were found to have a dramatic influence on the measured spin injection, including sign reversal. Lateral spin-transport devices with epitaxial ferromagnetic metal source and drain tunnel barrier contacts have been fabricated with the demonstration of electrical detection and the bias dependence of spin-polarized electron injection and accumulation at the contacts. This talk emphasizes the progress and achievements in the epitaxial growth of a number of ferromagnetic compounds/III-V semiconductor heterostructures and the progress towards spintronic devices.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Advanced Electronic Structure Calculations For Nanoelectronics Using Finite Element Bases and Effective Mass Theory.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gamble, John King; Nielsen, Erik; Baczewski, Andrew David

This paper describes our work over the past few years to use tools from quantum chemistry to describe electronic structure of nanoelectronic devices. These devices, dubbed "artificial atoms", comprise a few electrons, con ned by semiconductor heterostructures, impurities, and patterned electrodes, and are of intense interest due to potential applications in quantum information processing, quantum sensing, and extreme-scale classical logic. We detail two approaches we have employed: nite-element and Gaussian basis sets, exploring the interesting complications that arise when techniques that were intended to apply to atomic systems are instead used for artificial, solid-state devices.

Influence of rare earth elements (Nd, Sm, Gd) on the physicochemical properties of ges crystal

NASA Astrophysics Data System (ADS)

Madatov, R. S.; Alekperov, A. S.; Magerramova, Dzh. A.

2015-11-01

Layered semiconductors (including GeS), which are widely used in modern electronics, are of great interest for researchers. New GeS-based devices have been developed for holographic recording, optical processing, and storage of information. In the last few years, American scientists have developed a unique GeS-based device that makes it possible to accumulate an immense amount of solar energy. The introduction of rare earth elements (REEs) facilitates the healing of metal and chalcogenide vacancies, removes polytypism, and enhances interlayer interaction.

Questing and the application for silicon based ternary compound within ultra-thin layer of SIS intermediate region

NASA Astrophysics Data System (ADS)

Chen, Shumin; Gao, Ming; Wan, Yazhou; Du, Huiwei; Li, Yong; Ma, Zhongquan

2016-12-01

A silicon based ternary compound was supposed to be solid synthesized with In, Si and O elements by magnetron sputtering of indium tin oxide target (ITO) onto crystal silicon substrate at 250 °C. To make clear the configuration of the intermediate region, a potential method to obtain the chemical bonding of Si with other existing elements was exploited by X-ray photoelectron spectroscopy (XPS) instrument combined with other assisted techniques. The phase composition and solid structure of the interfacial region between ITO and Si substrate were investigated by X-ray diffraction (XRD) and high resolution cross sectional transmission electron microscope (HR-TEM). A photovoltaic device with structure of Al/Ag/ITO/SiOx/p-Si/Al was assembled by depositing ITO films onto the p-Si substrate by using magnetron sputtering. The new matter has been assumed to be a buffer layer for semiconductor-insulator-semiconductor (SIS) photovoltaic device and plays critical role for the promotion of optoelectronic conversion performance from the view point of device physics.

GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu

2015-06-24

Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less

Chemical-mechanical polishing of recessed microelectromechanical devices

DOEpatents

Barron, Carole C.; Hetherington, Dale L.; Montague, Stephen

1999-01-01

A method is disclosed for micromachining recessed layers (e.g. sacrificial layers) of a microelectromechanical system (MEMS) device formed in a cavity etched into a semiconductor substrate. The method uses chemical-mechanical polishing (CMP) with a resilient polishing pad to locally planarize one or more of the recessed layers within the substrate cavity. Such local planarization using the method of the present invention is advantageous for improving the patterning of subsequently deposited layers, for eliminating mechanical interferences between functional elements (e.g. linkages) of the MEMS device, and for eliminating the formation of stringers. After the local planarization of one or more of the recessed layers, another CMP step can be provided for globally planarizing the semiconductor substrate to form a recessed MEMS device which can be integrated with electronic circuitry (e.g. CMOS, BiCMOS or bipolar circuitry) formed on the surface of the substrate.

Chemical-mechanical polishing of recessed microelectromechanical devices

DOEpatents

Barron, C.C.; Hetherington, D.L.; Montague, S.

1999-07-06

A method is disclosed for micromachining recessed layers (e.g. sacrificial layers) of a microelectromechanical system (MEMS) device formed in a cavity etched into a semiconductor substrate. The method uses chemical-mechanical polishing (CMP) with a resilient polishing pad to locally planarize one or more of the recessed layers within the substrate cavity. Such local planarization using the method of the present invention is advantageous for improving the patterning of subsequently deposited layers, for eliminating mechanical interferences between functional elements (e.g. linkages) of the MEMS device, and for eliminating the formation of stringers. After the local planarization of one or more of the recessed layers, another CMP step can be provided for globally planarizing the semiconductor substrate to form a recessed MEMS device which can be integrated with electronic circuitry (e.g., CMOS, BiCMOS or bipolar circuitry) formed on the surface of the substrate. 23 figs.

Mobile glasses-free 3D using compact waveguide hologram

NASA Astrophysics Data System (ADS)

Pyun, K.; Choi, C.; Morozov, A.; Putilin, A.; Bovsunovskiy, I.; Kim, S.; Ahn, J.; Lee, H.-S.; Lee, S.

2013-02-01

The exploding mobile communication devices make 3D data available anywhere anytime. However, to record and reconstruct 3D, the huge number of optical components is often required, which makes overall device size bulky and image quality degraded due to the error-prone tuning. In addition, if additional glass is required, then user experience of 3D is exhausting and unpleasant. Holography is the ultimate 3D that users experience natural 3D in every direction. For mobile glasses-free 3D experience, it is critical to make holography device that can be as compact and integrated as possible. For reliable and economical mass production, integrated optics is needed as integrated circuits in semiconductor industry. Thus, we propose mobile glasses-free 3D using compact waveguide hologram in terms of overall device sizes, quantity of elements and combined functionality of each element. The main advantages of proposed solution are as follows: First, this solution utilizes various integral optical elements, where each of them is a united not adjustable optical element, replacing separate and adjustable optical elements with various forms and configurations. Second, geometrical form of integral elements provides small sizes of whole device. Third, geometrical form of integral elements allows creating flat device. And finally, absence of adjustable elements provide rigidly of whole device. The usage of integrated optical means based on waveguide holographic elements allows creating a new type of compact and high functional devices for mobile glasses-free 3D applications such as mobile medical 3D data visualization.

Separating semiconductor devices from substrate by etching graded composition release layer disposed between semiconductor devices and substrate including forming protuberances that reduce stiction

DOEpatents

Tauke-Pedretti, Anna; Nielson, Gregory N; Cederberg, Jeffrey G; Cruz-Campa, Jose Luis

2015-05-12

A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.

Finite Element Modeling of Micromachined MEMS Photon Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Datskos, P.G.; Evans, B.M.; Schonberger, D.

1999-09-20

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We havemore » used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.« less

Finite element modeling of micromachined MEMS photon devices

NASA Astrophysics Data System (ADS)

Evans, Boyd M., III; Schonberger, D. W.; Datskos, Panos G.

1999-09-01

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We have used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.

Batch-fabricated high-performance graphene Hall elements

PubMed Central

Xu, Huilong; Zhang, Zhiyong; Shi, Runbo; Liu, Honggang; Wang, Zhenxing; Wang, Sheng; Peng, Lian-Mao

2013-01-01

Hall elements are by far the most widely used magnetic sensor. In general, the higher the mobility and the thinner the active region of the semiconductor used, the better the Hall device. While most common magnetic field sensors are Si-based Hall sensors, devices made from III-V compounds tend to favor over that based on Si. However these devices are more expensive and difficult to manufacture than Si, and hard to be integrated with signal-processing circuits for extending function and enforcing performance. In this article we show that graphene is intrinsically an ideal material for Hall elements which may harness the remarkable properties of graphene, i.e. extremely high carrier mobility and atomically thin active body, to create ideal magnetic sensors with high sensitivity, excellent linearity and remarkable thermal stability. PMID:23383375

III-V arsenide-nitride semiconductor

NASA Technical Reports Server (NTRS)

Major, Jo S. (Inventor); Welch, David F. (Inventor); Scifres, Donald R. (Inventor)

2000-01-01

III-V arsenide-nitride semiconductor are disclosed. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V materials varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V material can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Methods for forming group III-arsenide-nitride semiconductor materials

NASA Technical Reports Server (NTRS)

Major, Jo S. (Inventor); Welch, David F. (Inventor); Scifres, Donald R. (Inventor)

2002-01-01

Methods are disclosed for forming Group III-arsenide-nitride semiconductor materials. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Methods for forming group III-V arsenide-nitride semiconductor materials

NASA Technical Reports Server (NTRS)

Major, Jo S. (Inventor); Welch, David F. (Inventor); Scifres, Donald R. (Inventor)

2000-01-01

Methods are disclosed for forming Group III--arsenide-nitride semiconductor materials. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Unitary lens semiconductor device

DOEpatents

Lear, Kevin L.

1997-01-01

A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

Inductively Coupled Plasma and Electron Cyclotron Resonance Plasma Etching of InGaAlP Compound Semiconductor System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Abernathy, C.R.; Hobson, W.S.; Hong, J.

1998-11-04

Current and future generations of sophisticated compound semiconductor devices require the ability for submicron scale patterning. The situation is being complicated since some of the new devices are based on a wider diversity of materials to be etched. Conventional IUE (Reactive Ion Etching) has been prevalent across the industry so far, but has limitations for materials with high bond strengths or multiple elements. IrI this paper, we suggest high density plasmas such as ECR (Electron Cyclotron Resonance) and ICP (Inductively Coupled Plasma), for the etching of ternary compound semiconductors (InGaP, AIInP, AlGaP) which are employed for electronic devices like heterojunctionmore » bipolar transistors (HBTs) or high electron mobility transistors (HEMTs), and photonic devices such as light-emitting diodes (LEDs) and lasers. High density plasma sources, opeiating at lower pressure, are expected to meet target goals determined in terms of etch rate, surface morphology, surface stoichiometry, selectivity, etc. The etching mechanisms, which are described in this paper, can also be applied to other III-V (GaAs-based, InP-based) as well as III-Nitride since the InGaAIP system shares many of the same properties.« less

Enhanced adhesion of films to semiconductors or metals by high energy bombardment

NASA Technical Reports Server (NTRS)

Tombrello, Thomas A. (Inventor); Qiu, Yuanxun (Inventor); Mendenhall, Marcus H. (Inventor)

1985-01-01

Films (12) of a metal such as gold or other non-insulator materials are firmly bonded to other non-insulators such as semiconductor substrates (10), suitably silicon or gallium arsenide by irradiating the interface with high energy ions. The process results in improved adhesion without excessive doping and provides a low resistance contact to the semiconductor. Thick layers can be bonded by depositing or doping the interfacial surfaces with fissionable elements or alpha emitters. The process can be utilized to apply very small, low resistance electrodes (78) to light-emitting solid state laser diodes (60) to form a laser device 70.

Improved Electrostatic Optical System

NASA Technical Reports Server (NTRS)

Lewis, B. F.

1984-01-01

Device suitable for molecular epitaxial formation of semiconductor components. Improved electrostatic lens system uses cylindrical mirror as central element between two tubular lenses. Abberations introduced by mirror tend to cancel those introduced by tubular lenses. Result is order-of-magnitude improvement in chromatic or spherical compensation.

Method of producing strained-layer semiconductor devices via subsurface-patterning

DOEpatents

Dodson, Brian W.

1993-01-01

A method is described for patterning subsurface features in a semiconductor device, wherein the semiconductor device includes an internal strained layer. The method comprises creating a pattern of semiconductor material over the semiconductor device, the semiconductor material having a predetermined thickness which stabilizes areas of the strained semiconductor layer that lie beneath the pattern. Subsequently, a heating step is applied to the semiconductor device to cause a relaxation in areas of the strained layer which do not lie beneath the semiconductor material pattern, whereby dislocations result in the relaxed areas and impair electrical transport therethrough.

Atomic layer deposition: an enabling technology for the growth of functional nanoscale semiconductors

NASA Astrophysics Data System (ADS)

Biyikli, Necmi; Haider, Ali

2017-09-01

In this paper, we present the progress in the growth of nanoscale semiconductors grown via atomic layer deposition (ALD). After the adoption by semiconductor chip industry, ALD became a widespread tool to grow functional films and conformal ultra-thin coatings for various applications. Based on self-limiting and ligand-exchange-based surface reactions, ALD enabled the low-temperature growth of nanoscale dielectric, metal, and semiconductor materials. Being able to deposit wafer-scale uniform semiconductor films at relatively low-temperatures, with sub-monolayer thickness control and ultimate conformality, makes ALD attractive for semiconductor device applications. Towards this end, precursors and low-temperature growth recipes are developed to deposit crystalline thin films for compound and elemental semiconductors. Conventional thermal ALD as well as plasma-assisted and radical-enhanced techniques have been exploited to achieve device-compatible film quality. Metal-oxides, III-nitrides, sulfides, and selenides are among the most popular semiconductor material families studied via ALD technology. Besides thin films, ALD can grow nanostructured semiconductors as well using either template-assisted growth methods or bottom-up controlled nucleation mechanisms. Among the demonstrated semiconductor nanostructures are nanoparticles, nano/quantum-dots, nanowires, nanotubes, nanofibers, nanopillars, hollow and core-shell versions of the afore-mentioned nanostructures, and 2D materials including transition metal dichalcogenides and graphene. ALD-grown nanoscale semiconductor materials find applications in a vast amount of applications including functional coatings, catalysis and photocatalysis, renewable energy conversion and storage, chemical sensing, opto-electronics, and flexible electronics. In this review, we give an overview of the current state-of-the-art in ALD-based nanoscale semiconductor research including the already demonstrated and future applications.

Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

2018-01-01

In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

Tunable organic transistors that use microfluidic source and drain electrodes

NASA Astrophysics Data System (ADS)

Maltezos, George; Nortrup, Robert; Jeon, Seokwoo; Zaumseil, Jana; Rogers, John A.

2003-09-01

This letter describes a type of transistor that uses conducting fluidic source and drain electrodes of mercury which flow on top of a thin film of the organic semiconductor pentacene. Pumping the mercury through suitably designed microchannels changes the width of the transistor channel and, therefore, the electrical characteristics of the device. Measurements on transistors with a range of channel lengths reveal low contact resistances between mercury and pentacene. Data collected before, during, and after pumping the mercury through the microchannels demonstrate reversible and systematic tuning of the devices. This unusual type of organic transistor has the potential to be useful in plastic microfluidic devices that require active elements for pumps, sensors, or other components. It also represents a noninvasive way to build transistor test structures that incorporate certain classes of chemically and mechanically fragile organic semiconductors.

Nature of size effects in compact models of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torkhov, N. A., E-mail: trkf@mail.ru; Scientific-Research Institute of Semiconductor Devices, Tomsk 634050; Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050

Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of themore » equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.« less

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass.

PubMed

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-An; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-12-08

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III-V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co 28.6 Fe 12.4 Ta 4.3 B 8.7 O 46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p-n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm 2  V -1  s -1 . Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities.

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass

PubMed Central

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-an; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V.; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-01-01

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III–V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co28.6Fe12.4Ta4.3B8.7O46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p–n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm2 V−1 s−1. Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities. PMID:27929059

Proceedings of the Conference on Emerging Technologies in Optical Sciences (ETOS 2004) held at University College Cork, Ireland on July 26-29, 2004

DTIC Science & Technology

2004-07-29

coherent coupling in large element arrays . 16 Characterisation of Picosecond Pulses Propagating through a Semiconductor Optical Amplifier...Effect is used. QSCE is widely used in optical intensity and phase modula- Oiz et • to tors [i]. The speed of reverse-biased devices is po- tentially...such devices generally have poor beam quality . The out-of- phase mode is In fact typically favoured in these devices because of the better

Antiferromagnetic phase of the gapless semiconductor V3Al

NASA Astrophysics Data System (ADS)

Jamer, M. E.; Assaf, B. A.; Sterbinsky, G. E.; Arena, D.; Lewis, L. H.; Saúl, A. A.; Radtke, G.; Heiman, D.

2015-03-01

Discovering new antiferromagnetic (AF) compounds is at the forefront of developing future spintronic devices without fringing magnetic fields. The AF gapless semiconducting D 03 phase of V3Al was successfully synthesized via arc-melting and annealing. The AF properties were established through synchrotron measurements of the atom-specific magnetic moments, where the magnetic dichroism reveals large and oppositely oriented moments on individual V atoms. Density functional theory calculations confirmed the stability of a type G antiferromagnetism involving only two-thirds of the V atoms, while the remaining V atoms are nonmagnetic. Magnetization, x-ray diffraction, and transport measurements also support the antiferromagnetism. This archetypal gapless semiconductor may be considered as a cornerstone for future spintronic devices containing AF elements.

Reflective optical imaging system

DOEpatents

Shafer, David R.

2000-01-01

An optical system compatible with short wavelength (extreme ultraviolet) radiation comprising four reflective elements for projecting a mask image onto a substrate. The four optical elements are characterized in order from object to image as convex, concave, convex and concave mirrors. The optical system is particularly suited for step and scan lithography methods. The invention increases the slit dimensions associated with ringfield scanning optics, improves wafer throughput and allows higher semiconductor device density.

Reflective optical imaging method and circuit

DOEpatents

Shafer, David R.

2001-01-01

An optical system compatible with short wavelength (extreme ultraviolet) radiation comprising four reflective elements for projecting a mask image onto a substrate. The four optical elements are characterized in order from object to image as convex, concave, convex and concave mirrors. The optical system is particularly suited for step and scan lithography methods. The invention increases the slit dimensions associated with ringfield scanning optics, improves wafer throughput and allows higher semiconductor device density.

Sintered silver joints via controlled topography of electronic packaging subcomponents

DOEpatents

Wereszczak, Andrew A.

2014-09-02

Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

Computational insights into charge transfer across functionalized semiconductor surfaces

NASA Astrophysics Data System (ADS)

Kearney, Kara; Rockett, Angus; Ertekin, Elif

2017-12-01

Photoelectrochemical water-splitting is a promising carbon-free fuel production method for producing H2 and O2 gas from liquid water. These cells are typically composed of at least one semiconductor photoelectrode which is prone to degradation and/or oxidation. Various surface modifications are known for stabilizing semiconductor photoelectrodes, yet stabilization techniques are often accompanied by a decrease in photoelectrode performance. However, the impact of surface modification on charge transport and its consequence on performance is still lacking, creating a roadblock for further improvements. In this review, we discuss how density functional theory and finite-element device simulations are reliable tools for providing insight into charge transport across modified photoelectrodes.

Reducing leakage current in semiconductor devices

DOEpatents

Lu, Bin; Matioli, Elison de Nazareth; Palacios, Tomas Apostol

2018-03-06

A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.

Crystal growth of device quality GaAs in space

NASA Technical Reports Server (NTRS)

Gatos, H. C.; Lagowski, J.

1985-01-01

The present program has been aimed at solving the fundamental and technological problems associated with Crystal Growth of Device Quality in Space. The initial stage of the program was devoted strictly to ground-based research. The unsolved problems associated with the growth of bulk GaAs in the presence of gravitational forces were explored. Reliable chemical, structural and electronic characterization methods were developed which would permit the direct relation of the salient materials parameters (particularly those affected by zero gravity conditions) to the electronic characteristics of single crystal GaAs, in turn to device performance. These relationships are essential for the development of optimum approaches and techniques. It was concluded that the findings on elemental semiconductors Ge and Si regarding crystal growth, segregation, chemical composition, defect interactions, and materials properties-electronic properties relationships are not necessarily applicable to GaAs (and to other semiconductor compounds). In many instances totally unexpected relationships were found to prevail.

High-temperature electronics

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Seng, Gary T.

1990-01-01

To meet the needs of the aerospace propulsion and space power communities, the high temperature electronics program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. This program supports a major element of the Center's mission - to perform basic and developmental research aimed at improving aerospace propulsion systems. Research is focused on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of SiC devices.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

NASA Astrophysics Data System (ADS)

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-02-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

Two-Axis Direct Fluid Shear Stress Sensor for Aerodynamic Applications

NASA Technical Reports Server (NTRS)

Bajikar, Sateesh S.; Scott, Michael A.; Adcock, Edward E.

2011-01-01

This miniature or micro-sized semiconductor sensor design provides direct, nonintrusive measurement of skin friction or wall shear stress in fluid flow situations in a two-axis configuration. The sensor is fabricated by microelectromechanical system (MEMS) technology, enabling small size and multiple, low-cost reproductions. The sensors may be fabricated by bonding a sensing element wafer to a fluid-coupling element wafer. Using this layered machine structure provides a truly three-dimensional device.

Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates

DOEpatents

Ptak, Aaron Joseph; Lin, Yong; Norman, Andrew; Alberi, Kirstin

2015-05-26

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.

Elemental and compound semiconductor surface chemistry: Intelligent interfacial design facilitated through novel functionalization and deposition strategies

NASA Astrophysics Data System (ADS)

Porter, Lon Alan, Jr.

The fundamental understanding of silicon surface chemistry is an essential tool for silicon's continued dominance of the semiconductor industry in the years to come. By tapping into the vast library of organic functionalities, the synthesis of organic monolayers may be utilized to prepare interfaces, tailored to a myriad of applications ranging from silicon VLSI device optimization and MEMS to physiological implants and chemical sensors. Efforts in our lab to form stable organic monolayers on porous silicon through direct silicon-carbon linkages have resulted in several efficient functionalization methods. In the first chapter of this thesis a comprehensive review of these methods, and many others is presented. The following chapter and the appendix serve to demonstrate both potential applications and studies aimed at developing a fundamental understanding of the chemistry behind the organic functionalization of silicon surfaces. The remainder of this thesis attempts to demonstrate new methods of metal deposition onto both elemental and compound semiconductor surfaces. Currently, there is considerable interest in producing patterned metallic structures with reduced dimensions for use in technologies such as ULSI device fabrication, MEMS, and arrayed nanosensors, without sacrificing throughput or cost effectiveness. Research in our laboratory has focused on the preparation of precious metal thin films on semiconductor substrates via electroless deposition. Continuous metallic films form spontaneously under ambient conditions, in the absence of a fluoride source or an externally applied current. In order to apply this metallization method toward the development of useful technologies, patterning utilizing photolithography, microcontact printing, and scanning probe nanolithography has been demonstrated.

A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

NASA Astrophysics Data System (ADS)

Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

2017-12-01

Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (<40° C) on a variety of substrates (including many kinds of plastic substrates) by an industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

Problems of the design of low-noise input devices. [parametric amplifiers

NASA Technical Reports Server (NTRS)

Manokhin, V. M.; Nemlikher, Y. A.; Strukov, I. A.; Sharfov, Y. A.

1974-01-01

An analysis is given of the requirements placed on the elements of parametric centimeter waveband amplifiers for achievement of minimal noise temperatures. A low-noise semiconductor parametric amplifier using germanium parametric diodes for a receiver operating in the 4 GHz band was developed and tested confirming the possibility of satisfying all requirements.

PLL jitter reduction by utilizing a ferroelectric capacitor as a VCO timing element.

PubMed

Pauls, Greg; Kalkur, Thottam S

2007-06-01

Ferroelectric capacitors have steadily been integrated into semiconductor processes due to their potential as storage elements within memory devices. Polarization reversal within ferroelectric capacitors creates a high nonlinear dielectric constant along with a hysteresis profile. Due to these attributes, a phase-locked loop (PLL), when based on a ferroelectric capacitor, has the advantage of reduced cycle-to-cycle jitter. PLLs based on ferroelectric capacitors represent a new research area for reduction of oscillator jitter.

Controlling the stoichiometry and doping of semiconductor materials

DOEpatents

Albin, David; Burst, James; Metzger, Wyatt; Duenow, Joel; Farrell, Stuart; Colegrove, Eric

2016-08-16

Methods for treating a semiconductor material are provided. According to an aspect of the invention, the method includes annealing the semiconductor material in the presence of a compound that includes a first element and a second element. The first element provides an overpressure to achieve a desired stoichiometry of the semiconductor material, and the second element provides a dopant to the semiconductor material.

Processing approach towards the formation of thin-film Cu(In,Ga)Se2

DOEpatents

Beck, Markus E.; Noufi, Rommel

2003-01-01

A two-stage method of producing thin-films of group IB-IIIA-VIA on a substrate for semiconductor device applications includes a first stage of depositing an amorphous group IB-IIIA-VIA precursor onto an unheated substrate, wherein the precursor contains all of the group IB and group IIIA constituents of the semiconductor thin-film to be produced in the stoichiometric amounts desired for the final product, and a second stage which involves subjecting the precursor to a short thermal treatment at 420.degree. C.-550.degree. C. in a vacuum or under an inert atmosphere to produce a single-phase, group IB-III-VIA film. Preferably the precursor also comprises the group VIA element in the stoichiometric amount desired for the final semiconductor thin-film. The group IB-IIIA-VIA semiconductor films may be, for example, Cu(In,Ga)(Se,S).sub.2 mixed-metal chalcogenides. The resultant supported group IB-IIIA-VIA semiconductor film is suitable for use in photovoltaic applications.

Semiconductor-Based Photoelectrochemical Conversion of Carbon Dioxide: Stepping Towards Artificial Photosynthesis.

PubMed

Pang, Hong; Masuda, Takuya; Ye, Jinhua

2018-01-18

The photoelectrochemical (PEC) carbon dioxide reduction process stands out as a promising avenue for the conversion of solar energy into chemical feedstocks, among various methods available for carbon dioxide mitigation. Semiconductors derived from cheap and abundant elements are interesting candidates for catalysis. Whether employed as intrinsic semiconductors or hybridized with metallic cocatalysts, biocatalysts, and metal molecular complexes, semiconductor photocathodes exhibit good performance and low overpotential during carbon dioxide reduction. Apart from focusing on carbon dioxide reduction materials and chemistry, PEC cells towards standalone devices that use photohybrid electrodes or solar cells have also been a hot topic in recent research. An overview of the state-of-the-art progress in PEC carbon dioxide reduction is presented and a deep understanding of the catalysts of carbon dioxide reduction is also given. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

In-situ integrated processing and characterization of thin films of high temperature superconductors, dielectrics and semiconductors by MOCVD

NASA Technical Reports Server (NTRS)

Singh, R.; Sinha, S.; Hsu, N. J.; Thakur, R. P. S.; Chou, P.; Kumar, A.; Narayan, J.

1990-01-01

In this strategy of depositing the basic building blocks of superconductors, semiconductors, and dielectric having common elements, researchers deposited superconducting films of Y-Ba-Cu-O, semiconductor films of Cu2O, and dielectric films of BaF2 and Y2O3 by metal oxide chemical vapor deposition (MOCVD). By switching source materials entering the chamber, and by using direct writting capability, complex device structures like three-terminal hybrid semiconductors/superconductors transistors can be fabricated. The Y-Ba-Cu-O superconducting thin films on BaF2/YSZ substrates show a T(sub c) of 80 K and are textured with most of the grains having their c-axis or a-axis perpendicular to the substrate. Electrical characteristics as well as structural characteristics of superconductors and related materials obtained by x-ray defraction, electron microscopy, and energy dispersive x-ray analysis are discussed.

In-situ integrated processing and characterization of thin films of high temperature superconductors, dielectrics and semiconductors by MOCVD

NASA Technical Reports Server (NTRS)

Singh, R.; Sinha, S.; Hsu, N. J.; Thakur, R. P. S.; Chou, P.; Kumar, A.; Narayan, J.

1991-01-01

In this strategy of depositing the basic building blocks of superconductors, semiconductors, and dielectrics having common elements, researchers deposited superconducting films of Y-Ba-Cu-O, semiconductor films of Cu2O, and dielectric films of BaF2 and Y2O3 by metal oxide chemical vapor deposition (MOCVD). By switching source materials entering the chamber, and by using direct writing capability, complex device structures like three terminal hybrid semiconductor/superconductor transistors can be fabricated. The Y-Ba-Cu-O superconducting thin films on BaF2/YSZ substrates show a T(sub c) of 80 K and are textured with most of the grains having their c-axis or a-axis perpendicular to the substrate. Electrical characteristics as well as structural characteristics of superconductors and related materials obtained by x-ray deffraction, electron microscopy, and energy dispersive x-ray analysis are discussed.

High-performance all-printed amorphous oxide FETs and logics with electronically compatible electrode/ channel interface.

PubMed

Sharma, Bhupendra Kumar; Stoesser, Anna; Mondal, Sandeep Kumar; Garlapati, Suresh K; Fawey, Mohammed H; Chakravadhanula, Venkata Sai Kiran; Kruk, Robert; Hahn, Horst; Dasgupta, Subho

2018-06-12

Oxide semiconductors typically show superior device performance compared to amorphous silicon or organic counterparts, especially, when they are physical vapor deposited. However, it is not easy to reproduce identical device characteristics when the oxide field-effect transistors (FETs) are solution-processed/ printed; the level of complexity further intensifies with the need to print the passive elements as well. Here, we developed a protocol for designing the most electronically compatible electrode/ channel interface based on the judicious material selection. Exploiting this newly developed fabrication schemes, we are now able to demonstrate high-performance all-printed FETs and logic circuits using amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor, indium tin oxide (ITO) as electrodes and composite solid polymer electrolyte as the gate insulator. Interestingly, all-printed FETs demonstrate an optimal electrical performance in terms of threshold voltages and device mobility and may very well be compared with devices fabricated using sputtered ITO electrodes. This observation originates from the selection of electrode/ channel materials from the same transparent semiconductor oxide family, resulting in the formation of In-Sn-Zn-O (ITZO) based diffused a-IGZO/ ITO interface that controls doping density while ensuring high electrical performance. Compressive spectroscopic studies reveal that Sn doping mediated excellent band alignment of IGZO with ITO electrodes is responsible for the excellent device performance observed. All-printed n-MOS based logic circuits have also been demonstrated towards new-generation portable electronics.

Thermoelectric generator and method for the fabrication thereof

DOEpatents

Benson, David K.; Tracy, C. Edwin

1987-01-01

A thermoelectric generator using semiconductor elements for responding to a temperature gradient to produce electrical energy with all of the semiconductor elements being of the same type is disclosed. A continuous process for forming substrates on which the semiconductor elements and superstrates are deposited and a process for forming the semiconductor elements on the substrates are also disclosed. The substrates with the semiconductor elements thereon are combined with superstrates to form modules for use thermoelectric generators.

Thermoelectric generator and method for the fabrication thereof

DOEpatents

Benson, D.K.; Tracy, C.E.

1984-08-01

A thermoelectric generator using semiconductor elements for responding to a temperature gradient to produce electrical energy with all of the semiconductor elements being of the same type is disclosed. A continuous process for forming substrates on which the semiconductor elements and superstrates are deposited and a process for forming the semiconductor elements on the substrates are also disclosed. The substrates with the semiconductor elements thereon are combined with superstrates to form modules for use as thermoelectric generators.

Low-Cost and Large-Area Electronics, Roll-to-Roll Processing and Beyond

NASA Astrophysics Data System (ADS)

Wiesenhütter, Katarzyna; Skorupa, Wolfgang

In the following chapter, the authors conduct a literature survey of current advances in state-of-the-art low-cost, flexible electronics. A new emerging trend in the design of modern semiconductor devices dedicated to scaling-up, rather than reducing, their dimensions is presented. To realize volume manufacturing, alternative semiconductor materials with superior performance, fabricated by innovative processing methods, are essential. This review provides readers with a general overview of the material and technology evolution in the area of macroelectronics. Herein, the term macroelectronics (MEs) refers to electronic systems that can cover a large area of flexible media. In stark contrast to well-established micro- and nano-scale semiconductor devices, where property improvement is associated with downscaling the dimensions of the functional elements, in macroelectronic systems their overall size defines the ultimate performance (Sun and Rogers in Adv. Mater. 19:1897-1916, 2007). The major challenges of large-scale production are discussed. Particular attention has been focused on describing advanced, short-term heat treatment approaches, which offer a range of advantages compared to conventional annealing methods. There is no doubt that large-area, flexible electronic systems constitute an important research topic for the semiconductor industry. The ability to fabricate highly efficient macroelectronics by inexpensive processes will have a significant impact on a range of diverse technology sectors. A new era "towards semiconductor volume manufacturing…" has begun.

Designing new classes of high-power, high-brightness VECSELs

NASA Astrophysics Data System (ADS)

Moloney, J. V.; Zakharian, A. R.; Hader, J.; Koch, Stephan W.

2005-10-01

Optically-pumped vertical external cavity semiconductor lasers offer the exciting possibility of designing kW-class solid state lasers that provide significant advantages over their doped YAG, thin-disk YAG and fiber counterparts. The basic VECSEL/OPSL (optically-pumped semiconductor laser) structure consists of a very thin (approximately 6 micron thick) active mirror consisting of a DBR high-reflectivity stack followed by a multiple quantum well resonant periodic (RPG) structure. An external mirror (reflectivity typically between 94%-98%) provides conventional optical feedback to the active semiconductor mirror chip. The "cold" cavity needs to be designed to take into account the semiconductor sub-cavity resonance shift with temperature and, importantly, the more rapid shift of the semiconductor material gain peak with temperature. Thermal management proves critical in optimizing the device for serious power scaling. We will describe a closed-loop procedure that begins with a design of the semiconductor active epi structure. This feeds into the sub-cavity optimization, optical and thermal transport within the active structure and thermal transport though the various heat sinking elements. Novel schemes for power scaling beyond current record performances will be discussed.

Biodegradable elastomers and silicon nanomembranes/nanoribbons for stretchable, transient electronics, and biosensors.

PubMed

Hwang, Suk-Won; Lee, Chi Hwan; Cheng, Huanyu; Jeong, Jae-Woong; Kang, Seung-Kyun; Kim, Jae-Hwan; Shin, Jiho; Yang, Jian; Liu, Zhuangjian; Ameer, Guillermo A; Huang, Yonggang; Rogers, John A

2015-05-13

Transient electronics represents an emerging class of technology that exploits materials and/or device constructs that are capable of physically disappearing or disintegrating in a controlled manner at programmed rates or times. Inorganic semiconductor nanomaterials such as silicon nanomembranes/nanoribbons provide attractive choices for active elements in transistors, diodes and other essential components of overall systems that dissolve completely by hydrolysis in biofluids or groundwater. We describe here materials, mechanics, and design layouts to achieve this type of technology in stretchable configurations with biodegradable elastomers for substrate/encapsulation layers. Experimental and theoretical results illuminate the mechanical properties under large strain deformation. Circuit characterization of complementary metal-oxide-semiconductor inverters and individual transistors under various levels of applied loads validates the design strategies. Examples of biosensors demonstrate possibilities for stretchable, transient devices in biomedical applications.

Operation and biasing for single device equivalent to CMOS

DOEpatents

Welch, James D.

2001-01-01

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

PubMed Central

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-01-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters. PMID:26842997

Novel room temperature ferromagnetic semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gupta, Amita

2004-06-01

Today's information world, bits of data are processed by semiconductor chips, and stored in the magnetic disk drives. But tomorrow's information technology may see magnetism (spin) and semiconductivity (charge) combined in one 'spintronic' device that exploits both charge and 'spin' to carry data (the best of two worlds). Spintronic devices such as spin valve transistors, spin light emitting diodes, non-volatile memory, logic devices, optical isolators and ultra-fast optical switches are some of the areas of interest for introducing the ferromagnetic properties at room temperature in a semiconductor to make it multifunctional. The potential advantages of such spintronic devices will bemore » higher speed, greater efficiency, and better stability at a reduced power consumption. This Thesis contains two main topics: In-depth understanding of magnetism in Mn doped ZnO, and our search and identification of at least six new above room temperature ferromagnetic semiconductors. Both complex doped ZnO based new materials, as well as a number of nonoxides like phosphides, and sulfides suitably doped with Mn or Cu are shown to give rise to ferromagnetism above room temperature. Some of the highlights of this work are discovery of room temperature ferromagnetism in: (1) ZnO:Mn (paper in Nature Materials, Oct issue, 2003); (2) ZnO doped with Cu (containing no magnetic elements in it); (3) GaP doped with Cu (again containing no magnetic elements in it); (4) Enhancement of Magnetization by Cu co-doping in ZnO:Mn; (5) CdS doped with Mn, and a few others not reported in this thesis. We discuss in detail the first observation of ferromagnetism above room temperature in the form of powder, bulk pellets, in 2-3 mu-m thick transparent pulsed laser deposited films of the Mn (<4 at. percent) doped ZnO. High-resolution transmission electron microscopy (HRTEM) and electron energy loss spectroscopy (EELS) spectra recorded from 2 to 200nm areas showed homogeneous distribution of Mn substituting for Zn a 2 + state in the ZnO lattice. Ferromagnetic Resonance (FMR) technique is used to confirm the existence of ferromagnetic ordering at temperatures as high as 425K. The ab initio calculations were found to be consistent with the observation of ferromagnetism arising from fully polarized Mn 2 + state. The key to observed room temperature ferromagnetism in this system is the low temperature processing, which prevents formation of clusters, secondary phases and the host ZnO from becoming n-type. The electronic structure of the same Mn doped ZnO thin films studied using XAS, XES and RIXS, revealed a strong hybridization between Mn 3d and O 2p states, which is an important characteristic of a Dilute magnetic Semiconductor (DMS). It is shown that the various processing conditions like sintering temperature, dopant concentration and the properties of precursors used for making of DMS have a great influence on the final properties. Use of various experimental techniques to verify the physical properties, and to understand the mechanism involved to give rise to ferromagnetism is presented. Methods to improve the magnetic moment in Mn doped ZnO are also described. New promising DMS materials (such as Cu doped ZnO are explored). The demonstrated new capability to fabricate powder, pellets, and thin films of room temperature ferromagnetic semiconductors thus makes possible the realization of a wide range of complex elements for a variety of new multifunctional phenomena related to Spintronic devices as well as magneto-optic components.« less

Optically switched graphene/4H-SiC junction bipolar transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chandrashekhar, MVS; Sudarshan, Tangali S.; Omar, Sabih U.

A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on amore » first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.« less

Efficient Suppression of Defects and Charge Trapping in High Density In-Sn-Zn-O Thin Film Transistor Prepared using Microwave-Assisted Sputter.

PubMed

Goh, Youngin; Ahn, Jaehan; Lee, Jeong Rak; Park, Wan Woo; Ko Park, Sang-Hee; Jeon, Sanghun

2017-10-25

Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultrahigh mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise, and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the subgap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low subgap density of states. High-density plasma MWA sputtering method has high deposition rate even at low working pressure and control the ion bombardment energy, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.

Semiconductor devices having a recessed electrode structure

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2015-05-26

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Performance of an MPI-only semiconductor device simulator on a quad socket/quad core InfiniBand platform.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shadid, John Nicolas; Lin, Paul Tinphone

2009-01-01

This preliminary study considers the scaling and performance of a finite element (FE) semiconductor device simulator on a capacity cluster with 272 compute nodes based on a homogeneous multicore node architecture utilizing 16 cores. The inter-node communication backbone for this Tri-Lab Linux Capacity Cluster (TLCC) machine is comprised of an InfiniBand interconnect. The nonuniform memory access (NUMA) nodes consist of 2.2 GHz quad socket/quad core AMD Opteron processors. The performance results for this study are obtained with a FE semiconductor device simulation code (Charon) that is based on a fully-coupled Newton-Krylov solver with domain decomposition and multilevel preconditioners. Scaling andmore » multicore performance results are presented for large-scale problems of 100+ million unknowns on up to 4096 cores. A parallel scaling comparison is also presented with the Cray XT3/4 Red Storm capability platform. The results indicate that an MPI-only programming model for utilizing the multicore nodes is reasonably efficient on all 16 cores per compute node. However, the results also indicated that the multilevel preconditioner, which is critical for large-scale capability type simulations, scales better on the Red Storm machine than the TLCC machine.« less

Exploration of Gas Discharges with GaAs, GaP and ZnSe Electrodes Under Atmospheric Pressure

NASA Astrophysics Data System (ADS)

Kurt, H. Hilal

2018-03-01

This work reports on the electrical and optical characterization of the atmospheric pressure glow discharge regimes for different semiconductor electrodes made of GaAs, GaP and ZnSe. The discharge cell is driven by DC feeding voltages at a wide pressure range of 0.66-120 kPa in argon and air media for different interelectrode gaps. The discharge phenomena including different stages of discharges such as glow and Townsend breakdown have been examined. In addition, the infrared sensitivities of the semiconducting materials are evaluated in the micro-discharge cell and discharge light emission measurements have been performed. The qualities of the semiconducting electrode samples can be determined by seeking the homogeneity of the discharge light emission for the optoelectronic device applications. Operation of optical devices under atmospheric pressures gives certain advantages for manufacturing of the devices including the material processing and surface treatment procedures. Besides, finite element analyses of the overall experimental system have been performed for the abovementioned semiconductors. The electron densities and potential patterns have been determined on the discharge cell plane between the electrodes. The findings have proven that the electron densities along the plasma cell depend on both the semiconductor type and plasma parameters.

Room-temperature preparation of trisilver-copper-sulfide/polymer based heterojunction thin film for solar cell application

NASA Astrophysics Data System (ADS)

Lei, Yan; Yang, Xiaogang; Gu, Longyan; Jia, Huimin; Ge, Suxiang; Xiao, Pin; Fan, Xiaoli; Zheng, Zhi

2015-04-01

Solar cells devices based on inorganic/polymer heterojunction can be a possible solution to harvest solar energy and convert to electric energy with high efficiency through a cost-effective fabrication. The solution-process method can be easily used to produce large area devices. Moreover, due to the intrinsic different charge separation, diffusion or recombination in various semiconductors, the interfaces between each component may strongly influence the inorganic/polymer heterojunction performance. Here we prepared a n-type Ag3CuS2 (Eg = 1.25 eV) nanostructured film through a room-temperature element reaction process, which was confirmed as direct bandgap semiconductor through density function theory simulation. This Ag3CuS2 film was spin-coated with an organic semiconducting poly(3-hexythiophene) (P3HT) or polythieno[3,4-b]-thiophene-co-benzodithiophene (PTB7) film, which formed an inorganic/polymer heterojunction. After constructing it to a solar cell device, the power conversion efficiencies of 0.79% and 0.31% were achieved with simulated solar illumination on Ag3CuS2/P3HT and Ag3CuS2/PTB7, respectively. A possible mechanism was discussed and we showed the charge separation at interface of inorganic and polymer semiconductors played an important role.

A multigrid solver for the semiconductor equations

NASA Technical Reports Server (NTRS)

Bachmann, Bernhard

1993-01-01

We present a multigrid solver for the exponential fitting method. The solver is applied to the current continuity equations of semiconductor device simulation in two dimensions. The exponential fitting method is based on a mixed finite element discretization using the lowest-order Raviart-Thomas triangular element. This discretization method yields a good approximation of front layers and guarantees current conservation. The corresponding stiffness matrix is an M-matrix. 'Standard' multigrid solvers, however, cannot be applied to the resulting system, as this is dominated by an unsymmetric part, which is due to the presence of strong convection in part of the domain. To overcome this difficulty, we explore the connection between Raviart-Thomas mixed methods and the nonconforming Crouzeix-Raviart finite element discretization. In this way we can construct nonstandard prolongation and restriction operators using easily computable weighted L(exp 2)-projections based on suitable quadrature rules and the upwind effects of the discretization. The resulting multigrid algorithm shows very good results, even for real-world problems and for locally refined grids.

Effectiveness of X-ray grating interferometry for non-destructive inspection of packaged devices

NASA Astrophysics Data System (ADS)

Uehara, Masato; Yashiro, Wataru; Momose, Atsushi

2013-10-01

It is difficult to inspect packaged devices such as IC packages and power modules because the devices contain various components, such as semiconductors, metals, ceramics, and resin. In this paper, we demonstrated the effectiveness of X-ray grating interferometry (XGI) using a laboratory X-ray tube for the industrial inspection of packaged devices. The obtained conventional absorption image showed heavy-elemental components such as metal wires and electrodes, but the image did not reveal the defects in the light-elemental components. On the other hand, the differential phase-contrast image obtained by XGI revealed microvoids and scars in the encapsulant of the samples. The visibility contrast image also obtained by XGI showed some cracks in the ceramic insulator of power module sample. In addition, the image showed the silicon plate surrounded by the encapsulant having the same X-ray absorption coefficient. While these defects and components are invisible in the conventional industrial X-ray imaging, XGI thus has an attractive potential for the industrial inspection of the packaged devices.

Nanostructure and optoelectronic phenomena in germanium-transparent conductive oxide (Ge:TCO) composites

NASA Astrophysics Data System (ADS)

Shih, Grace Hwei-Pyng

Nanostructured composites are attracting intense interest for electronic and optoelectronic device applications, specifically as active elements in thin film photovoltaic (PV) device architectures. These systems implement fundamentally different concepts of enhancing energy conversion efficiencies compared to those seen in current commercial devices. This is possible through considerable flexibility in the manipulation of device-relevant properties through control of the interplay between the nanostructure and the optoelectronic response. In the present work, inorganic nanocomposites of semiconductor Ge embedded in transparent conductive indium tin oxide (ITO) as well as Ge in zinc oxide (ZnO) were produced by a single step RF-magnetron sputter deposition process. It is shown that, by controlling the design of the nanocomposites as well as heat treatment conditions, decreases in the physical dimensions of Ge nanophase size provided an effective tuning of the optical absorption and charge transport properties. This effect of changes in the optical properties of nanophase semiconductors with respect to size is known as the quantum confinement effect. Variation in the embedding matrix material between ITO and ZnO with corresponding characterization of optoelectronic properties exhibit notable differences in the presence and evolution of an interfacial oxide within these composites. Further studies of interfacial structures were performed using depth-profiling XPS and Raman spectroscopy, while study of the corresponding electronic effects were performed using room temperature and temperature-dependent Hall Effect. Optical absorption was noted to shift to higher onset energies upon heat treatment with a decrease in the observed Ge domain size, indicating quantum confinement effects within these systems. This contrasts to previous investigations that have involved the introduction of nanoscale Ge into insulating, amorphous oxides. Comparison of these different matrix chemistries highlights the overarching role of interfacial structures on quantum-size characteristics. The opportunity to tune the spectral response of these PV materials, via control of semiconductor phase assembly in the nanocomposite, directly impacts the potential for the use of these materials as sensitizing elements for enhanced solar cell conversion efficiency.

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

Light-matter Interactions in Semiconductors and Metals: From Nitride Optoelectronics to Quantum Plasmonics

NASA Astrophysics Data System (ADS)

Narang, Prineha

This thesis puts forth a theory-directed approach coupled with spectroscopy aimed at the discovery and understanding of light-matter interactions in semiconductors and metals. The first part of the thesis presents the discovery and development of Zn-IV nitride materials. The commercial prominence in the optoelectronics industry of tunable semiconductor alloy materials based on nitride semiconductor devices, specifically InGaN, motivates the search for earth-abundant alternatives for use in efficient, high-quality optoelectronic devices. II-IV-N2 compounds, which are closely related to the wurtzite-structured III-N semiconductors, have similar electronic and optical properties to InGaN namely direct band gaps, high quantum efficiencies and large optical absorption coefficients. The choice of different group II and group IV elements provides chemical diversity that can be exploited to tune the structural and electronic properties through the series of alloys. The first theoretical and experimental investigation of the ZnSnxGe1--xN2 series as a replacement for III-nitrides is discussed here. The second half of the thesis shows ab-initio calculations for surface plasmons and plasmonic hot carrier dynamics. Surface plasmons, electromagnetic modes confined to the surface of a conductor-dielectric interface, have sparked renewed interest because of their quantum nature and their broad range of applications. The decay of surface plasmons is usually a detriment in the field of plasmonics, but the possibility to capture the energy normally lost to heat would open new opportunities in photon sensors, energy conversion devices and switching. A theoretical understanding of plasmon-driven hot carrier generation and relaxation dynamics in the ultrafast regime is presented here. Additionally calculations for plasmon-mediated upconversion as well as an energy-dependent transport model for these non-equilibrium carriers are shown. Finally, this thesis gives an outlook on the potential of non-equilibrium phenomena in metals and semiconductors for future light-based technologies.

Nondestructive Memory Elements Based on Polymeric Langmuir-Blodgett Thin Films

NASA Astrophysics Data System (ADS)

Reece, T. J.; Ducharme, S.

2007-03-01

Ferroelectric field effect transistors (FeFETs) have attracted much attention recently because of their low power consumption and fast nondestructive readout. Among the ferroelectric thin films used in FET devices; the ferroelectric copolymer of polyvinylidene fluoride, PVDF (C2H2F2), with trifluoroethylene, TrFE (C2HF3), has distinct advantages, including low dielectric constant, low processing temperature, low cost and compatibility with organic semiconductors. By employing the Langmuir-Blodgett technique, we are able to deposit films as thin as 1.8 nm. We discuss the characterization, modeling and fabrication of metal-ferroelectric-insulator-semiconductor (MFIS) structures incorporating these films.

Contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication

DOEpatents

Sopori, Bhushan

2014-05-27

Methods for contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication are provided. In one embodiment, a method for fabricating an electrical semiconductor device comprises: a first step that includes gettering of impurities from a semiconductor wafer and forming a backsurface field; and a second step that includes forming a front contact for the semiconductor wafer, wherein the second step is performed after completion of the first step.

Shockwave generation by a semiconductor bridge operation in water

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zvulun, E.; Toker, G.; Gurovich, V. Tz.

2014-05-28

A semiconductor bridge (SCB) is a silicon device, used in explosive systems as the electrical initiator element. In recent years, SCB plasma has been extensively studied, both electrically and using fast photography and spectroscopic imaging. However, the value of the pressure buildup at the bridge remains unknown. In this study, we operated SCB devices in water and, using shadow imaging and reference beam interferometry, obtained the velocity of the shock wave propagation and distribution of the density of water. These results, together with a self-similar hydrodynamic model, were used to calculate the pressure generated by the exploding SCB. In addition,more » the results obtained showed that the energy of the water flow exceeds significantly the energy deposited into the exploded SCB. The latter can be explained by the combustion of the aluminum and silicon atoms released in water, which acts as an oxidizing medium.« less

Composition-Dependent Energy Splitting between Bright and Dark Excitons in Lead Halide Perovskite Nanocrystals.

PubMed

Chen, Lan; Li, Bin; Zhang, Chunfeng; Huang, Xinyu; Wang, Xiaoyong; Xiao, Min

2018-03-14

Perovskite semiconductor nanocrystals with different compositions have shown promise for applications in light-emitting devices. Dark excitonic states may suppress light emission from such nanocrystals by providing an additional nonradiative recombination channel. Here, we study the composition dependence of dark exciton dynamics in nanocrystals of lead halides by time-resolved photoluminescence spectroscopy at cryogenic temperatures. The presence of a spin-related dark state is revealed by magneto-optical spectroscopy. The energy splitting between bright and dark states is found to be highly sensitive to both halide elements and organic cations, which is explained by considering the effects of size confinement and charge screening, respectively, on the exchange interaction. These findings suggest the possibility of manipulating dark exciton dynamics in perovskite semiconductor nanocrystals by composition engineering, which will be instrumental in the design of highly efficient light-emitting devices.

Spin-Based Devices for Magneto-Optoelectronic Integrated Circuits

DTIC Science & Technology

2009-04-29

bulk material and matches that in quantum wells. While these simple linear relationships hold for spin-polarized light-emitting diodes (spin-LEDs...temperature. The quantum efficiency and hence r| increases with decreasing temperature. The individual circuit elements, 33 therefore, exhibit the...Injection, Threshold Reduction and Output Circular Polarization Modulation in Quantum Well and Quantum Dot Semiconductor Spin Polarized Lasers working

Epidermal Inorganic Optoelectronics for Blood Oxygen Measurement.

PubMed

Li, Haicheng; Xu, Yun; Li, Xiaomin; Chen, Ying; Jiang, Yu; Zhang, Changxing; Lu, Bingwei; Wang, Jian; Ma, Yinji; Chen, Yihao; Huang, Yin; Ding, Minquang; Su, Honghong; Song, Guofeng; Luo, Yi; Feng, X

2017-05-01

Flexible and stretchable optoelectronics, built-in inorganic semiconductor materials, offer a wide range of unprecedented opportunities and will redefine the conventional rigid optoelectronics in biological application and medical measurement. However, a significant bottleneck lies in the brittleness nature of rigid semiconductor materials and the performance's extreme sensitivity to the light intensity variation due to human skin deformation while measuring physical parameters. In this study, the authors demonstrate a systematic strategy to design an epidermal inorganic optoelectronic device by using specific strain-isolation design, nanodiamond thinning, and hybrid transfer printing. The authors propose all-in-one suspension structure to achieve the stretchability and conformability for surrounding environment, and they propose a two-step transfer printing method for hybrid integrating III-V group emitting elements, Si-based photodetector, and interconnects. Owing to the excellent flexibility and stretchability, such device is totally conformal to skin and keeps the constant light transmission between emitting element and photodetector as well as the signal stability due to skin deformation. This method opens a route for traditional inorganic optoelectronics to achieve flexibility and stretchability and improve the performance of optoelectronics for biomedical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Metal-core/semiconductor-shell nanocones for broadband solar absorption enhancement.

PubMed

Zhou, Lin; Yu, Xiaoqiang; Zhu, Jia

2014-02-12

Nanostructure-based photovoltaic devices have exhibited several advantages, such as reduced reflection, extraordinary light trapping, and so forth. In particular, semiconductor nanostructures provide optical modes that have strong dependence on the size and geometry. Metallic nanostructures also attract a lot of attention because of the appealing plasmonic effect on the near-field enhancement. In this study, we propose a novel design, the metal-core/semiconductor-shell nanocones with the core radius varying in a linearly gradient style. With a thin layer of semiconductor absorber coated on a metallic cone, such a design can lead to significant and broadband absorption enhancement across the entire visible and near-infrared solar spectrum. As an example of demonstration, a layer of 16 nm thick crystalline silicon (c-Si) coated on a silver nanocone can absorb 27% of standard solar radiation across a broad spectral range of 300-1100 nm, which is equivalent to a 700 nm thick flat c-Si film. Therefore, the absorption enhancement factor approaching the Yablonovitch limit is achieved with this design. The significant absorption enhancement can be ascribed to three types of optical modes, that is, Fabry-Perot modes, plasmonic modes, and hybrid modes that combine the features of the previous two. In addition, the unique nanocone geometry enables the linearly gradient radius of the semiconductor shell, which can support multiple optical resonances, critical for the broadband absorption. Our design may find general usage as elements for the low cost, high efficiency solar conversion and water-splitting devices.

A study to investigate the chemical stability of gallium phosphate oxide/gallium arsenide phosphide

NASA Technical Reports Server (NTRS)

Kuhlman, G. J.

1979-01-01

The elemental composition with depth into the oxide films was examined using secondary ion mass spectrometry. Results indicate that the layers are arsenic-deficient through the bulk of the oxide and arsenic-rich near both the oxide surface and the oxide-semiconductor interface region. Phosphorus is incorporated into the oxide in an approximately uniform manner. The MIS capacitor structures exhibited deep-depletion characteristics and hysteresis indicative of electron trapping at the oxide-semiconductor interface. Post-oxidation annealing of the films in argon or nitrogen generally results in slightly increased dielectric leakage currents and decreased C-V hysteresis effects, and is associated with arsenic loss at the oxide surface. The results of bias-temperature stress experiments indicate that the major instability effects are due to changes in the electron trapping behavior. No changes were observed in the elemental profiles following electrical stressing, indicating that the grown films are chemically stable under device operating conditions.

Semiconductor nanomembrane-based sensors for high frequency pressure measurements

NASA Astrophysics Data System (ADS)

Ruan, Hang; Kang, Yuhong; Homer, Michelle; Claus, Richard O.; Mayo, David; Sibold, Ridge; Jones, Tyler; Ng, Wing

2017-04-01

This paper demonstrates improvements on semiconductor nanomembrane based high frequency pressure sensors that utilize silicon on insulator techniques in combination with nanocomposite materials. The low-modulus, conformal nanomembrane sensor skins with integrated interconnect elements and electronic devices could be applied to vehicles or wind tunnel models for full spectrum pressure analysis. Experimental data demonstrates that: 1) silicon nanomembrane may be used as single pressure sensor transducers and elements in sensor arrays, 2) the arrays may be instrumented to map pressure over the surfaces of test articles over a range of Reynolds numbers, temperature and other environmental conditions, 3) in the high frequency range, the sensor is comparable to the commercial high frequency sensor, and 4) in the low frequency range, the sensor is much better than the commercial sensor. This supports the claim that nanomembrane pressure sensors may be used for wide bandwidth flow analysis.

Soft x ray window encapsulant for HgI2 detectors

NASA Technical Reports Server (NTRS)

Entine, G.; Shah, K.; Squillante, M.

1987-01-01

HgI2 is an excellent semiconductor material for a low energy, room temperature x-ray spectrometer. The high values of the atomic numbers for its constituent elements gives high x-ray and gamma ray stopping power. The band gap of HgI2 is significantly higher than other commonly used semiconductors. Owing to the large value band gap, the leakage current for HgI2 devices is smaller, thus allowing low noise performance. Devices fabricated from HgI2 crystals have demonstrated energy resolution sufficient to distinguish the x-ray emission from the neighboring elements on the periodic table. Also the power requirements of HgI2 are very low. These characteristics make a HgI2 spectrometer an ideal component in a satellite based detection system. Unfortunately, HgI2 crystals tend to deteriorate with time, even if protected by standard semiconductor encapsulants. This degradation ruins the performance of the device in terms of its energy resolution and pulse amplitude. The degrading mechanism is believed to be material loss occurring from below the electrodes, due to high vapor pressure of HgI2 at room temperature. To address this major obstacle to rapid expansion of HgI2 technology, a research program aimed at improving device stability by encapsulation with inert polymeric materials was carried out. The program focused specifically on optimizing the encapsulant materials and their deposition techniques. The principal objectives for this program were device encapsulation, device testing, and accelerated testing to ensure very long term stability of these high resolution sensors. A variety of encapsulants were investigated with the selection criteria based on their chemical diffusion barrier properties, mechanical stability, reactivity, and morphology of encapsulant films. The investigation covered different classes of encapsulants including solvent based encapsulants, vapor deposited encapsulants, and plasma polymerized encapsulants. A variety of characterization techniques were employed to examine their effectiveness in stabilizing HgI2 devices; these included permeability evaluation, vacuum and heat testing, scanning electron microscopy (SEM) as well as studying the detector performance of coated detectors. The plasma polymerized films appear to have entirely solved the HgI2 degradation problem. Another achievement of this program was the development of an accelerated testing technique which correlates extremely well with long term tesing.

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, Kent D.; Lear, Kevin L.; Schneider, Jr., Richard P.

1996-01-01

A semiconductor light-emitting device and method. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL).

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, K.D.; Lear, K.L.; Schneider, R.P. Jr.

1996-02-20

A semiconductor light-emitting device and method are disclosed. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL). 12 figs.

Electrical characterization of organic thin film transistors and alternative device architectures

NASA Astrophysics Data System (ADS)

Newman, Christopher R.

In the last 10--15 years, organic semiconductors have evolved from experimental curiosities into viable alternatives for practical applications involving large-area and low-cost electronics such as display backplanes, electronic paper, radio frequency identification (RFID) tags, and solar cells. Many of the initially-stated goals in this field have been achieved; organic semconductors have demonstrated performance comparable to or greater than amorphous silicon (a-Si), the entrenched technology for most of the applications listed above. At present, the major obstacles remaining to commercialization of devices based on organic semiconductors involve material stability, processing considerations and optimization of the other device components (e.g. metal contacts and dielectric materials). Despite these technical achievements, significant gaps remain in our understanding of the underlying transport physics in these devices. This thesis summarizes experiments performed on organic field-effect transistors (OFETs) in an attempt to address some of these knowledge gaps. The FET, in addition to being a very useful device for practical applications (such as the driving elements in pixel backplanes), is also a very flexible architecture from an experimental standpoint. The presence of a capacitively-coupled gate electrode allows the investigation of transport physics as a function of carrier concentration. For devices in which non-idealities (i.e. carrier traps) largely dictate the observed characteristics, this is a very useful feature. Although practical OFETs are fabricated as conventional single-gate structures on an organic thin film (OTFTs), more exotic structures can often provide insights that standard OTFTs cannot. Specifically, single-crystal OFETs allow the investigation of carrier transport in the absence of grain boundaries, and double-gated OTFTs facilitate the investigation and comparison of properties across two discrete interfaces. One of the remaining challenges in terms of achieving stability inorganic semiconductors involves understanding, and hopefully minimizing, the bias stress effect of operating OTFTs. Largely ignored during the years in which research groups sought to optimize the standard device metrics of field-effect mobility, current on/off ratio, and threshold voltage, operational stability is emerging as a dominant consideration in these materials. Experiments performed with the goal of quantifying and understanding the bias-stress effect in organic semiconductors are described at the end of this thesis.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Electromagnetic field enhancement effects in group IV semiconductor nanowires. A Raman spectroscopy approach

NASA Astrophysics Data System (ADS)

Pura, J. L.; Anaya, J.; Souto, J.; Prieto, A. C.; Rodríguez, A.; Rodríguez, T.; Periwal, P.; Baron, T.; Jiménez, J.

2018-03-01

Semiconductor nanowires (NWs) are the building blocks of future nanoelectronic devices. Furthermore, their large refractive index and reduced dimension make them suitable for nanophotonics. The study of the interaction between nanowires and visible light reveals resonances that promise light absorption/scattering engineering for photonic applications. Micro-Raman spectroscopy has been used as a characterization tool for semiconductor nanowires. The light/nanowire interaction can be experimentally assessed through the micro-Raman spectra of individual nanowires. As compared to both metallic and dielectric nanowires, semiconductor nanowires add additional tools for photon engineering. In particular, one can grow heterostructured nanowires, both axial and radial, and also one could modulate the doping level and the surface condition among other factors than can affect the light/NW interaction. We present herein a study of the optical response of group IV semiconductor nanowires to visible photons. The study is experimentally carried out through micro-Raman spectroscopy of different group IV nanowires, both homogeneous and axially heterostructured (SiGe/Si). The results are analyzed in terms of the electromagnetic modelling of the light/nanowire interaction using finite element methods. The presence of axial heterostructures is shown to produce electromagnetic resonances promising new photon engineering capabilities of semiconductor nanowires.

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

The electronic band structures of gadolinium chalcogenides: a first-principles prediction for neutron detecting

NASA Astrophysics Data System (ADS)

Li, Kexue; Liu, Lei; Yu, Peter Y.; Chen, Xiaobo; Shen, D. Z.

2016-05-01

By converting the energy of nuclear radiation to excited electrons and holes, semiconductor detectors have provided a highly efficient way for detecting them, such as photons or charged particles. However, for detecting the radiated neutrons, those conventional semiconductors hardly behave well, as few of them possess enough capability for capturing these neutral particles. While the element Gd has the highest nuclear cross section, here for searching proper neutron-detecting semiconductors, we investigate theoretically the Gd chalcogenides whose electronic band structures have never been characterized clearly. Among them, we identify that γ-phase Gd2Se3 should be the best candidate for neutron detecting since it possesses not only the right bandgap of 1.76 eV for devices working under room temperature but also the desired indirect gap nature for charge carriers surviving longer. We propose further that semiconductor neutron detectors with single-neutron sensitivity can be realized with such a Gd-chalcogenide on the condition that their crystals can be grown with good quality.

The electronic band structures of gadolinium chalcogenides: a first-principles prediction for neutron detecting.

PubMed

Li, Kexue; Liu, Lei; Yu, Peter Y; Chen, Xiaobo; Shen, D Z

2016-05-11

By converting the energy of nuclear radiation to excited electrons and holes, semiconductor detectors have provided a highly efficient way for detecting them, such as photons or charged particles. However, for detecting the radiated neutrons, those conventional semiconductors hardly behave well, as few of them possess enough capability for capturing these neutral particles. While the element Gd has the highest nuclear cross section, here for searching proper neutron-detecting semiconductors, we investigate theoretically the Gd chalcogenides whose electronic band structures have never been characterized clearly. Among them, we identify that γ-phase Gd2Se3 should be the best candidate for neutron detecting since it possesses not only the right bandgap of 1.76 eV for devices working under room temperature but also the desired indirect gap nature for charge carriers surviving longer. We propose further that semiconductor neutron detectors with single-neutron sensitivity can be realized with such a Gd-chalcogenide on the condition that their crystals can be grown with good quality.

Beta cell device using icosahedral boride compounds

DOEpatents

Aselage, Terrence L.; Emin, David

2002-01-01

A beta cell for converting beta-particle energies into electrical energy having a semiconductor junction that incorporates an icosahedral boride compound selected from B.sub.12 As.sub.2, B.sub.12 P.sub.2, elemental boron having an .alpha.-rhombohedral structure, elemental boron having a .beta.-rhombohedral structure, and boron carbides of the chemical formula B.sub.12-x C.sub.3-x, where 0.15

Reflective optical imaging systems with balanced distortion

DOEpatents

Hudyma, Russell M.

2001-01-01

Optical systems compatible with extreme ultraviolet radiation comprising four reflective elements for projecting a mask image onto a substrate are described. The four optical elements comprise, in order from object to image, convex, concave, convex and concave mirrors. The optical systems are particularly suited for step and scan lithography methods. The invention enables the use of larger slit dimensions associated with ring field scanning optics, improves wafer throughput, and allows higher semiconductor device density. The inventive optical systems are characterized by reduced dynamic distortion because the static distortion is balanced across the slit width.

Metal oxide semiconductor thin-film transistors for flexible electronics

NASA Astrophysics Data System (ADS)

Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

2016-06-01

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

Metal oxide semiconductor thin-film transistors for flexible electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Petti, Luisa; Vogt, Christian; Büthe, Lars

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This reviewmore » reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.« less

Voltage-induced Interface Reconstruction and Electrical Instability of the Ferromagnet-Semiconductor Device.

PubMed

Chang, Shu-Jui; Chang, Po-Chun; Lin, Wen-Chin; Lo, Shao-Hua; Chang, Liang-Chun; Lee, Shang-Fan; Tseng, Yuan-Chieh

2017-03-23

Using x-ray magnetic spectroscopy with in-situ electrical characterizations, we investigated the effects of external voltage on the spin-electronic and transport properties at the interface of a Fe/ZnO device. Layer-, element-, and spin-resolved information of the device was obtained by cross-tuning of the x-ray mode and photon energy, when voltage was applied. At the early stage of the operation, the device exhibited a low-resistance state featuring robust Fe-O bonds. However, the Fe-O bonds were broken with increasing voltage. Breaking of the Fe-O bonds caused the formation of oxygen vacancies and resulted in a high-resistance state. Such interface reconstruction was coupled to a charge-transfer effect via Fe-O hybridization, which suppressed/enhanced the magnetization/coercivity of Fe electronically. Nevertheless, the interface became stabilized with the metallic phase if the device was continuously polarized. During this stage, the spin-polarization of Fe was enhanced whereas the coercivity was lowered by voltage, but changes of both characteristics were reversible. This stage is desirable for spintronic device applications, owing to a different voltage-induced electronic transition compared to the first stage. The study enabled a straightforward detection of the spin-electronic state at the ferromagnet-semiconductor interface in relation to the transport and reversal properties during operation process of the device.

GaN/NbN epitaxial semiconductor/superconductor heterostructures.

PubMed

Yan, Rusen; Khalsa, Guru; Vishwanath, Suresh; Han, Yimo; Wright, John; Rouvimov, Sergei; Katzer, D Scott; Nepal, Neeraj; Downey, Brian P; Muller, David A; Xing, Huili G; Meyer, David J; Jena, Debdeep

2018-03-07

Epitaxy is a process by which a thin layer of one crystal is deposited in an ordered fashion onto a substrate crystal. The direct epitaxial growth of semiconductor heterostructures on top of crystalline superconductors has proved challenging. Here, however, we report the successful use of molecular beam epitaxy to grow and integrate niobium nitride (NbN)-based superconductors with the wide-bandgap family of semiconductors-silicon carbide, gallium nitride (GaN) and aluminium gallium nitride (AlGaN). We apply molecular beam epitaxy to grow an AlGaN/GaN quantum-well heterostructure directly on top of an ultrathin crystalline NbN superconductor. The resulting high-mobility, two-dimensional electron gas in the semiconductor exhibits quantum oscillations, and thus enables a semiconductor transistor-an electronic gain element-to be grown and fabricated directly on a crystalline superconductor. Using the epitaxial superconductor as the source load of the transistor, we observe in the transistor output characteristics a negative differential resistance-a feature often used in amplifiers and oscillators. Our demonstration of the direct epitaxial growth of high-quality semiconductor heterostructures and devices on crystalline nitride superconductors opens up the possibility of combining the macroscopic quantum effects of superconductors with the electronic, photonic and piezoelectric properties of the group III/nitride semiconductor family.

a Brief Survey on Basic Properties of Thin Films for Device Application

NASA Astrophysics Data System (ADS)

Rao, M. C.; Shekhawat, M. S.

Thin film materials are the key elements of continued technological advances made in the fields of optoelectronic, photonic and magnetic devices. Thin film studies have directly or indirectly advanced many new areas of research in solid state physics and chemistry which are based on phenomena uniquely characteristic of the thickness, geometry and structure of the film. The processing of materials into thin films allows easy integration into various types of devices. Thin films are extremely thermally stable and reasonably hard, but they are fragile. On the other hand organic materials have reasonable thermal stability and are tough, but are soft. Thin film mechanical properties can be measured by tensile testing of freestanding films and by the micro beam cantilever deflection technique, but the easiest way is by means of nanoindentation. Optical experiments provide a good way of examining the properties of semiconductors. Particularly measuring the absorption coefficient for various energies gives information about the band gaps of the material. Thin film materials have been used in semiconductor devices, wireless communications, telecommunications, integrated circuits, rectifiers, transistors, solar cells, light-emitting diodes, photoconductors and light crystal displays, lithography, micro- electromechanical systems (MEMS) and multifunctional emerging coatings, as well as other emerging cutting technologies.

Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications

DOEpatents

Hui, Rongqing [Lenexa, KS; Jiang, Hong-Xing [Manhattan, KS; Lin, Jing-Yu [Manhattan, KS

2008-03-18

The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.

Reliability Prediction Models for Discrete Semiconductor Devices

DTIC Science & Technology

1988-07-01

influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application., a plication...found to influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application...MFA Airbreathlng 14issile, Flight MFF Missile, Free Flight ML Missile, Launch MMIC Monolithic Microwave Integrated Circuits MOS Metal-Oxide

Transferable tight binding model for strained group IV and III-V heterostructures

NASA Astrophysics Data System (ADS)

Tan, Yaohua; Povolotskyi, Micheal; Kubis, Tillmann; Boykin, Timothy; Klimeck, Gerhard

Modern semiconductor devices have reached critical device dimensions in the range of several nanometers. For reliable prediction of device performance, it is critical to have a numerical efficient model that are transferable to material interfaces. In this work, we present an empirical tight binding (ETB) model with transferable parameters for strained IV and III-V group semiconductors. The ETB model is numerically highly efficient as it make use of an orthogonal sp3d5s* basis set with nearest neighbor inter-atomic interactions. The ETB parameters are generated from HSE06 hybrid functional calculations. Band structures of strained group IV and III-V materials by ETB model are in good agreement with corresponding HSE06 calculations. Furthermore, the ETB model is applied to strained superlattices which consist of group IV and III-V elements. The ETB model turns out to be transferable to nano-scale hetero-structure. The ETB band structures agree with the corresponding HSE06 results in the whole Brillouin zone. The ETB band gaps of superlattices with common cations or common anions have discrepancies within 0.05eV.

Charge Separation at Mixed-Dimensional Single and Multilayer MoS2/Silicon Nanowire Heterojunctions.

PubMed

Henning, Alex; Sangwan, Vinod K; Bergeron, Hadallia; Balla, Itamar; Sun, Zhiyuan; Hersam, Mark C; Lauhon, Lincoln J

2018-05-16

Layered two-dimensional (2-D) semiconductors can be combined with other low-dimensional semiconductors to form nonplanar mixed-dimensional van der Waals (vdW) heterojunctions whose charge transport behavior is influenced by the heterojunction geometry, providing a new degree of freedom to engineer device functions. Toward that end, we investigated the photoresponse of Si nanowire/MoS 2 heterojunction diodes with scanning photocurrent microscopy and time-resolved photocurrent measurements. Comparison of n-Si/MoS 2 isotype heterojunctions with p-Si/MoS 2 heterojunction diodes under varying biases shows that the depletion region in the p-n heterojunction promotes exciton dissociation and carrier collection. We measure an instrument-limited response time of 1 μs, which is 10 times faster than the previously reported response times for planar Si/MoS 2 devices, highlighting the advantages of the 1-D/2-D heterojunction. Finite element simulations of device models provide a detailed understanding of how the electrostatics affect charge transport in nanowire/vdW heterojunctions and inform the design of future vdW heterojunction photodetectors and transistors.

Thermophysical Properties of Polymer Materials with High Thermal Conductivity

NASA Astrophysics Data System (ADS)

Lebedev, S. M.; Gefle, O. S.; Dneprovskii, S. N.; Amitov, E. T.

2015-06-01

Results of studies on the main thermophysical properties of new thermally conductive polymer materials are presented. It is shown that modification of polymer dielectrics by micron-sized fillers allows thermally conductive materials with thermal conductivity not less than 2 W/(m K) to be produced, which makes it possible to use such materials as cooling elements of various electrical engineering and semiconductor equipment and devices.

40-Gbit/s all-optical circulating shift register with an inverter.

PubMed

Hall, K L; Donnelly, J P; Groves, S H; Fennelly, C I; Bailey, R J; Napoleone, A

1997-10-01

We report what is believed to be the first demonstration of an all-optical circulating shift register using an ultrafast nonlinear interferometer with a polarization-insensitive semiconductor optical amplifier as the nonlinear switching element. The device operates at 40 Gbits/s, to our knowledge the highest speed demonstrated to date. Also, the demonstration proves the cascadability of the ultrafast nonlinear interferometric switch.

Optimization Problem of Thermal Field on Surface of Revolving Susceptor in Vapor-Phase Epitaxy Reactor

NASA Astrophysics Data System (ADS)

Zhilenkov, A. A.; Chernyi, S. G.; Nyrkov, A. P.; Sokolov, S. S.

2017-10-01

Nitrides of group III elements are a very suitable basis for deriving light-emitting devices with the radiating modes lengths of 200-600 nm. The use of such semiconductors allows obtaining full-color RGB light sources, increasing record density of a digital data storage device, getting high-capacity and efficient sources of white light. Electronic properties of such semi-conductors allow using them as a basis for high-power and high-frequency transistors and other electronic devices, the specifications of which are competitive with those of SiC-based devices. Only since 2000, the technology of cultivation of crystals III-N of group has come to the level of wide recognition by both abstract science, and the industry that has led to the creation of the multi-billion dollar market. And this is despite a rather low level of development of the production technology of devices on the basis of III-N of materials. The progress that has happened in the last decade requires the solution of the main problem, constraining further development of this technology today - ensuring cultivation of III-N structures of necessary quality. For this purpose, it is necessary to solve problems of the analysis and optimization of processes in installations of epitaxial growth, and, as a result, optimization of its constructions.

Self-Aligned van der Waals Heterojunction Diodes and Transistors.

PubMed

Sangwan, Vinod K; Beck, Megan E; Henning, Alex; Luo, Jiajia; Bergeron, Hadallia; Kang, Junmo; Balla, Itamar; Inbar, Hadass; Lauhon, Lincoln J; Hersam, Mark C

2018-02-14

A general self-aligned fabrication scheme is reported here for a diverse class of electronic devices based on van der Waals materials and heterojunctions. In particular, self-alignment enables the fabrication of source-gated transistors in monolayer MoS 2 with near-ideal current saturation characteristics and channel lengths down to 135 nm. Furthermore, self-alignment of van der Waals p-n heterojunction diodes achieves complete electrostatic control of both the p-type and n-type constituent semiconductors in a dual-gated geometry, resulting in gate-tunable mean and variance of antiambipolar Gaussian characteristics. Through finite-element device simulations, the operating principles of source-gated transistors and dual-gated antiambipolar devices are elucidated, thus providing design rules for additional devices that employ self-aligned geometries. For example, the versatility of this scheme is demonstrated via contact-doped MoS 2 homojunction diodes and mixed-dimensional heterojunctions based on organic semiconductors. The scalability of this approach is also shown by fabricating self-aligned short-channel transistors with subdiffraction channel lengths in the range of 150-800 nm using photolithography on large-area MoS 2 films grown by chemical vapor deposition. Overall, this self-aligned fabrication method represents an important step toward the scalable integration of van der Waals heterojunction devices into more sophisticated circuits and systems.

Self-Assembly of Nanostructured Electronic Devices (454th Brookhaven Lecture)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Black, Charles

2009-12-16

Given suitable atmospheric conditions, water vapor from the air will crystallize into beautiful structures: snowflakes. Nature provides many other examples of spontaneous organization of materials into regular patterns, which is a process known as self-assembly. Since self-assembly works at all levels, it can be a useful tool for organizing materials on the nanometer scale. In particular, self-assembly provides a precise method for designing materials with improved electronic properties, thereby enabling advances in semiconductor electronics and solar devices. On Wednesday, December 16, at 4 p.m. in Berkner Hall, Charles Black of the Center for Functional Nanomaterials (CFN) will explore this topicmore » during the 454th Brookhaven Lecture, entitled “Self-Assembly of Nanostructured Electronic Devices.” Refreshments will be offered before and after the lecture. To attend this open-to-the-public event, visitors to the Lab ages 16 and older must present photo ID at the Main Gate. During this talk, Dr. Black will discuss examples of how self-assembly is being integrated into semiconductor microelectronics, as advances in the ability to define circuit elements at higher resolution have fueled more than 40 years of performance improvements. Self-assembly also promises advances in the performance of solar devices; thus he will describe his group’s recent results with nanostructured photovoltaic devices.« less

Methods of forming semiconductor devices and devices formed using such methods

DOEpatents

Fox, Robert V; Rodriguez, Rene G; Pak, Joshua

2013-05-21

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

DOEpatents

Norman, Andrew

2016-08-23

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

Microwave GaAs Integrated Circuits On Quartz Substrates

NASA Technical Reports Server (NTRS)

Siegel, Peter H.; Mehdi, Imran; Wilson, Barbara

1994-01-01

Integrated circuits for use in detecting electromagnetic radiation at millimeter and submillimeter wavelengths constructed by bonding GaAs-based integrated circuits onto quartz-substrate-based stripline circuits. Approach offers combined advantages of high-speed semiconductor active devices made only on epitaxially deposited GaAs substrates with low-dielectric-loss, mechanically rugged quartz substrates. Other potential applications include integration of antenna elements with active devices, using carrier substrates other than quartz to meet particular requirements using lifted-off GaAs layer in membrane configuration with quartz substrate supporting edges only, and using lift-off technique to fabricate ultrathin discrete devices diced separately and inserted into predefined larger circuits. In different device concept, quartz substrate utilized as transparent support for GaAs devices excited from back side by optical radiation.

Carbon nanotube active-matrix backplanes for conformal electronics and sensors.

PubMed

Takahashi, Toshitake; Takei, Kuniharu; Gillies, Andrew G; Fearing, Ronald S; Javey, Ali

2011-12-14

In this paper, we report a promising approach for fabricating large-scale flexible and stretchable electronics using a semiconductor-enriched carbon nanotube solution. Uniform semiconducting nanotube networks with superb electrical properties (mobility of ∼20 cm2 V(-1) s(-1) and ION/IOFF of ∼10(4)) are obtained on polyimide substrates. The substrate is made stretchable by laser cutting a honeycomb mesh structure, which combined with nanotube-network transistors enables highly robust conformal electronic devices with minimal device-to-device stochastic variations. The utility of this device concept is demonstrated by fabricating an active-matrix backplane (12×8 pixels, physical size of 6×4 cm2) for pressure mapping using a pressure sensitive rubber as the sensor element.

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2012 CFR

2012-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2013 CFR

2013-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2014 CFR

2014-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

Wafer-scale micro-optics fabrication

NASA Astrophysics Data System (ADS)

Voelkel, Reinhard

2012-07-01

Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

NASA Technical Reports Server (NTRS)

1996-01-01

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality, and 4-A turn-on and 150-V rectification. The high operating current was achieved despite severe device size limitations imposed by present-day SiC wafer defect densities. Further substantial increases in device performance can be expected when SiC wafer defect densities decrease as SiC wafer production technology matures.

Floating-gate memory based on an organic metal-insulator-semiconductor capacitor

NASA Astrophysics Data System (ADS)

William, S.; Mabrook, M. F.; Taylor, D. M.

2009-08-01

A floating gate memory element is described which incorporates an evaporated gold film embedded in the gate dielectric of a metal-insulator-semiconductor capacitor based on poly(3-hexylthiophene). On exceeding a critical amplitude in the voltage sweep, hysteresis is observed in the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of the device. The anticlockwise hysteresis in C-V is consistent with strong electron trapping during the positive cycle but little hole trapping during the negative cycle. We argue that the clockwise hysteresis observed in the negative cycle of the I-V plot, arises from leakage of trapped holes through the underlying insulator to the control gate.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Photoemission-based microelectronic devices

PubMed Central

Forati, Ebrahim; Dill, Tyler J.; Tao, Andrea R.; Sievenpiper, Dan

2016-01-01

The vast majority of modern microelectronic devices rely on carriers within semiconductors due to their integrability. Therefore, the performance of these devices is limited due to natural semiconductor properties such as band gap and electron velocity. Replacing the semiconductor channel in conventional microelectronic devices with a gas or vacuum channel may scale their speed, wavelength and power beyond what is available today. However, liberating electrons into gas/vacuum in a practical microelectronic device is quite challenging. It often requires heating, applying high voltages, or using lasers with short wavelengths or high powers. Here, we show that the interaction between an engineered resonant surface and a low-power infrared laser can cause enough photoemission via electron tunnelling to implement feasible microelectronic devices such as transistors, switches and modulators. The proposed photoemission-based devices benefit from the advantages of gas-plasma/vacuum electronic devices while preserving the integrability of semiconductor-based devices. PMID:27811946

Penta-SiC5 monolayer: A novel quasi-planar indirect semiconductor with a tunable wide band gap

NASA Astrophysics Data System (ADS)

Naseri, Mosayeb

2018-03-01

In this paper, by using of the first principles calculations in the framework of the density functional theory, we systematically investigated the structure, stability, electronic and optical properties of a novel two-dimensional pentagonal monolayer semiconductors namely penta-SiC5 monolayer. Comparing elemental silicon, diamond, and previously reported 2D carbon allotropes, our calculation shows that the predicted penta-SiC5 monolayer has a metastable nature. The calculated results indicate that the predicted monolayer is an indirect semiconductor with a wide band gap of about 2.82 eV by using Heyd-Scuseria-Ernzerhof (HSE06) hybrid functional level of theory which can be effectively tuned by external biaxial strains. The obtained exceptional electronic properties suggest penta-SiC5 monolayer as promising candidates for application in new electronic devices in nano scale.

Opto-valleytronic imaging of atomically thin semiconductors

DOE PAGES

Neumann, Andre; Lindlau, Jessica; Colombier, Léo; ...

2017-01-16

Transition metal dichalcogenide semiconductors represent elementary components of layered heterostructures for emergent technologies beyond conventional opto-electronics. In their monolayer form they host electrons with quantized circular motion and associated valley polarization and valley coherence as key elements of opto-valleytronic functionality. Here, we introduce two-dimensional polarimetry as means of direct imaging of the valley pseudospin degree of freedom in monolayer transition metal dichalcogenides. Using MoS 2 as a representative material with valley-selective optical transitions, we establish quantitative image analysis for polarimetric maps of extended crystals, and identify valley polarization and valley coherence as sensitive probes of crystalline disorder. Moreover, we findmore » site-dependent thermal and non-thermal regimes of valley-polarized excitons in perpendicular magnetic fields. Finally, we demonstrate the potential of widefield polarimetry for rapid inspection of opto-valleytronic devices based on atomically thin semiconductors and heterostructures.« less

Opto-valleytronic imaging of atomically thin semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Neumann, Andre; Lindlau, Jessica; Colombier, Léo

Transition metal dichalcogenide semiconductors represent elementary components of layered heterostructures for emergent technologies beyond conventional opto-electronics. In their monolayer form they host electrons with quantized circular motion and associated valley polarization and valley coherence as key elements of opto-valleytronic functionality. Here, we introduce two-dimensional polarimetry as means of direct imaging of the valley pseudospin degree of freedom in monolayer transition metal dichalcogenides. Using MoS 2 as a representative material with valley-selective optical transitions, we establish quantitative image analysis for polarimetric maps of extended crystals, and identify valley polarization and valley coherence as sensitive probes of crystalline disorder. Moreover, we findmore » site-dependent thermal and non-thermal regimes of valley-polarized excitons in perpendicular magnetic fields. Finally, we demonstrate the potential of widefield polarimetry for rapid inspection of opto-valleytronic devices based on atomically thin semiconductors and heterostructures.« less

Bonding and electronics of the MoTe2/Ge interface under strain

NASA Astrophysics Data System (ADS)

Szary, Maciej J.; Michalewicz, Marek T.; Radny, Marian W.

2017-05-01

Understanding the interface formation of a conventional semiconductor with a monolayer of transition-metal dichalcogenides provides a necessary platform for the anticipated applications of dichalcogenides in electronics and optoelectronics. We report here, based on the density functional theory, that under in-plane tensile strain, a 2H semiconducting phase of the molybdenum ditelluride (MoTe2) monolayer undergoes a semiconductor-to-metal transition and in this form bonds covalently to bilayers of Ge stacked in the [111] crystal direction. This gives rise to the stable bonding configuration of the MoTe2/Ge interface with the ±K valley metallic, electronic interface states exclusively of a Mo 4 d character. The atomically sharp Mo layer represents therefore an electrically active (conductive) subsurface δ -like two-dimensional profile that can exhibit a valley-Hall effect. Such system can develop into a key element of advanced semiconductor technology or a novel device concept.

III-V compound semiconductor growth on silicon via germanium buffer and surface passivation for CMOS technology

NASA Astrophysics Data System (ADS)

Choi, Donghun

Integration of III-V compound semiconductors on silicon substrates has recently received much attention for the development of optoelectronic and high speed electronic devices. However, it is well known that there are some key challenges for the realization of III-V device fabrication on Si substrates: (i) the large lattice mismatch (in case of GaAs: 4.1%), and (ii) the formation of antiphase domain (APD) due to the polar compound semiconductor growth on non-polar elemental structure. Besides these growth issues, the lack of a useful surface passivation technology for compound semiconductors has precluded development of metal-oxide-semiconductor (MOS) devices and causes high surface recombination parasitics in scaled devices. This work demonstrates the growth of high quality III-V materials on Si via an intermediate Ge buffer layer and some surface passivation methods to reduce interface defect density for the fabrication of MOS devices. The initial goal was to achieve both low threading dislocation density (TDD) and low surface roughness on Ge-on-Si heterostructure growth. This was achieved by repeating a deposition-annealing cycle consisting of low temperature deposition + high temperature-high rate deposition + high temperature hydrogen annealing, using reduced-pressure chemical-vapor deposition (CVD). We then grew III-V materials on the Ge/Si virtual substrates using molecular-beam epitaxy (MBE). The relationship between initial Ge surface configuration and antiphase boundary formation was investigated using surface reflection high-energy electron diffraction (RHEED) patterns and atomic force microscopy (AFM) image analysis. In addition, some MBE growth techniques, such as migration enhanced epitaxy (MEE) and low temperature GaAs growth, were adopted to improve surface roughness and solve the Ge self-doping problem. Finally, an Al2O3 gate oxide layer was deposited using atomic-layer-deposition (ALD) system after HCl native oxide etching and ALD in-situ pre-annealing at 400 °C. A 100 nm thick aluminum layer was deposited to form the gate contact for a MOS device fabrication. C-V measurement results show very small frequency dispersion and 200-300 mV hysteresis, comparable to our best results for InGaAs/GaAs MOS structures on GaAs substrate. Most notably, the quasi-static C-V curve demonstrates clear inversion layer formation. I-V curves show a reasonable leakage current level. The inferred midgap interface state density, Dit, of 2.4 x 1012 eV-1cm-2 was calculated by combined high-low frequency capacitance method. In addition, we investigated the interface properties of amorphous LaAlO 3/GaAs MOS capacitors fabricated on GaAs substrate. The surface was protected during sample transfer between III-V and oxide molecular beam deposition (MBD) chambers by a thick arsenic-capping layer. An annealing method, a low temperature-short time RTA followed by a high temperature RTA, was developed, yielding extremely small hysteresis (˜ 30 mV), frequency dispersion (˜ 60 mV), and interface trap density (mid 1010 eV-1cm -2). We used capacitance-voltage (C-V) and current-voltage (I-V) measurements for electrical characterization of MOS devices, tapping-mode AFM for surface morphology analysis, X-ray photoelectron spectroscopy (XPS) for chemical elements analysis of interface, cross section transmission-electron microscopy (TEM), X-ray diffraction (XRD), secondary ion mass spectrometry (SIMS), and photoluminescence (PL) measurement for film quality characterization. This successful growth and appropriate surface treatments of III-V materials provides a first step for the fabrication of III-V optical and electrical devices on the same Si-based electronic circuits.

Near-infrared light emitting device using semiconductor nanocrystals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Supran, Geoffrey J.S.; Song, Katherine W.; Hwang, Gyuweon

A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 .mu.m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.

Introduction to Semiconductor Devices

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

2005-03-01

This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.

Apparatus for forming thin-film heterojunction solar cells employing materials selected from the class of I-III-VI.sub.2 chalcopyrite compounds

DOEpatents

Mickelsen, Reid A.; Chen, Wen S.

1983-01-01

Apparatus for forming thin-film, large area solar cells having a relatively high light-to-electrical energy conversion efficiency and characterized in that the cell comprises a p-n-type heterojunction formed of: (i) a first semiconductor layer comprising a photovoltaic active material selected from the class of I-III-VI.sub.2 chalcopyrite ternary materials which is vacuum deposited in a thin "composition-graded" layer ranging from on the order of about 2.5 microns to about 5.0 microns (.congruent.2.5 .mu.m to .congruent.5.0 .mu.m) and wherein the lower region of the photovoltaic active material preferably comprises a low resistivity region of p-type semiconductor material having a superimposed region of relatively high resistivity, transient n-type semiconductor material defining a transient p-n homojunction; and (ii), a second semiconductor layer comprising a low resistivity n-type semiconductor material wherein interdiffusion (a) between the elemental constituents of the two discrete juxtaposed regions of the first semiconductor layer defining a transient p-n homojunction layer, and (b) between the transient n-type material in the first semiconductor layer and the second n-type semiconductor layer, causes the transient n-type material in the first semiconductor layer to evolve into p-type material, thereby defining a thin layer heterojunction device characterized by the absence of voids, vacancies and nodules which tend to reduce the energy conversion efficiency of the system.

High density submicron magnetoresistive random access memory (invited)

NASA Astrophysics Data System (ADS)

Tehrani, S.; Chen, E.; Durlam, M.; DeHerrera, M.; Slaughter, J. M.; Shi, J.; Kerszykowski, G.

1999-04-01

Various giant magnetoresistance material structures were patterned and studied for their potential as memory elements. The preferred memory element, based on pseudo-spin valve structures, was designed with two magnetic stacks (NiFeCo/CoFe) of different thickness with Cu as an interlayer. The difference in thickness results in dissimilar switching fields due to the shape anisotropy at deep submicron dimensions. It was found that a lower switching current can be achieved when the bits have a word line that wraps around the bit 1.5 times. Submicron memory elements integrated with complementary metal-oxide-semiconductor (CMOS) transistors maintained their characteristics and no degradation to the CMOS devices was observed. Selectivity between memory elements in high-density arrays was demonstrated.

Energy storage device with large charge separation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Energy storage device with large charge separation

DOEpatents

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei

2016-04-12

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Electronic and optoelectronic materials and devices inspired by nature

NASA Astrophysics Data System (ADS)

Meredith, P.; Bettinger, C. J.; Irimia-Vladu, M.; Mostert, A. B.; Schwenn, P. E.

2013-03-01

Inorganic semiconductors permeate virtually every sphere of modern human existence. Micro-fabricated memory elements, processors, sensors, circuit elements, lasers, displays, detectors, etc are ubiquitous. However, the dawn of the 21st century has brought with it immense new challenges, and indeed opportunities—some of which require a paradigm shift in the way we think about resource use and disposal, which in turn directly impacts our ongoing relationship with inorganic semiconductors such as silicon and gallium arsenide. Furthermore, advances in fields such as nano-medicine and bioelectronics, and the impending revolution of the ‘ubiquitous sensor network’, all require new functional materials which are bio-compatible, cheap, have minimal embedded manufacturing energy plus extremely low power consumption, and are mechanically robust and flexible for integration with tissues, building structures, fabrics and all manner of hosts. In this short review article we summarize current progress in creating materials with such properties. We focus primarily on organic and bio-organic electronic and optoelectronic systems derived from or inspired by nature, and outline the complex charge transport and photo-physics which control their behaviour. We also introduce the concept of electrical devices based upon ion or proton flow (‘ionics and protonics’) and focus particularly on their role as a signal interface with biological systems. Finally, we highlight recent advances in creating working devices, some of which have bio-inspired architectures, and summarize the current issues, challenges and potential solutions. This is a rich new playground for the modern materials physicist.

Nanopatterning of Group V Elements for Tailoring the Electronic Properties of Semiconductors by Monolayer Doping.

PubMed

Thissen, Peter; Cho, Kyeongjae; Longo, Roberto C

2017-01-18

Control of the electronic properties of semiconductors is primarily achieved through doping. While scaling down the device dimensions to the molecular regime presents an increasing number of difficulties, doping control at the nanoscale is still regarded as one of the major challenges of the electronic industry. Within this context, new techniques such as monolayer doping (MLD) represent a substantial improvement toward surface doping with atomic and specific doping dose control at the nanoscale. Our previous work has explained in detail the atomistic mechanism behind MLD by means of density-functional theory calculations (Chem. Mater. 2016, 28, 1975). Here, we address the key questions that will ultimately allow one to optimize the scalability of the MLD process. First, we show that dopant coverage control cannot be achieved by simultaneous reaction of several group V elements, but stepwise reactions make it possible. Second, using ab initio molecular dynamics, we investigate the thermal decomposition of the molecular precursors, together with the stability of the corresponding binary and ternary dopant oxides, prior to the dopant diffusion into the semiconductor surface. Finally, the effect of the coverage and type of dopant on the electronic properties of the semiconductor is also analyzed. Furthermore, the atomistic characterization of the MLD process raises unexpected questions regarding possible crystal damage effects by dopant exchange with the semiconductor ions or the final distribution of the doping impurities within the crystal structure. By combining all our results, optimization recipes to create ultrashallow doped junctions at the nanoscale are finally proposed.

Diode having trenches in a semiconductor region

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2016-03-22

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Semiconductor Terahertz Technology

DTIC Science & Technology

2009-06-15

is found in IJI-V quantum cascade lasers (QCLs). 1.I Brief overview of 5i-based QCL development Various groups have obtained electroluminescence from...sources and detectors of far-IR radiation in the range of 12-30 flm. These devices, especially quantum cascade lasers (QCLs) require efficient ...elements and their alloys that can be developed on Si substrates. The design work focused on the structure of the so-called quantum cascade laser

Performance of a parallel algebraic multilevel preconditioner for stabilized finite element semiconductor device modeling

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lin, Paul T.; Shadid, John N.; Sala, Marzio

In this study results are presented for the large-scale parallel performance of an algebraic multilevel preconditioner for solution of the drift-diffusion model for semiconductor devices. The preconditioner is the key numerical procedure determining the robustness, efficiency and scalability of the fully-coupled Newton-Krylov based, nonlinear solution method that is employed for this system of equations. The coupled system is comprised of a source term dominated Poisson equation for the electric potential, and two convection-diffusion-reaction type equations for the electron and hole concentration. The governing PDEs are discretized in space by a stabilized finite element method. Solution of the discrete system ismore » obtained through a fully-implicit time integrator, a fully-coupled Newton-based nonlinear solver, and a restarted GMRES Krylov linear system solver. The algebraic multilevel preconditioner is based on an aggressive coarsening graph partitioning of the nonzero block structure of the Jacobian matrix. Representative performance results are presented for various choices of multigrid V-cycles and W-cycles and parameter variations for smoothers based on incomplete factorizations. Parallel scalability results are presented for solution of up to 10{sup 8} unknowns on 4096 processors of a Cray XT3/4 and an IBM POWER eServer system.« less

Monolayer-Mediated Growth of Organic Semiconductor Films with Improved Device Performance.

PubMed

Huang, Lizhen; Hu, Xiaorong; Chi, Lifeng

2015-09-15

Increased interest in wearable and smart electronics is driving numerous research works on organic electronics. The control of film growth and patterning is of great importance when targeting high-performance organic semiconductor devices. In this Feature Article, we summarize our recent work focusing on the growth, crystallization, and device operation of organic semiconductors intermediated by ultrathin organic films (in most cases, only a monolayer). The site-selective growth, modified crystallization and morphology, and improved device performance of organic semiconductor films are demonstrated with the help of the inducing layers, including patterned and uniform Langmuir-Blodgett monolayers, crystalline ultrathin organic films, and self-assembled polymer brush films. The introduction of the inducing layers could dramatically change the diffusion of the organic semiconductors on the surface and the interactions between the active layer with the inducing layer, leading to improved aggregation/crystallization behavior and device performance.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Reflective optical imaging system with balanced distortion

DOEpatents

Chapman, Henry N.; Hudyma, Russell M.; Shafer, David R.; Sweeney, Donald W.

1999-01-01

An optical system compatible with short wavelength (extreme ultraviolet) An optical system compatible with short wavelength (extreme ultraviolet) radiation comprising four reflective elements for projecting a mask image onto a substrate. The four optical elements comprise, in order from object to image, convex, concave, convex and concave mirrors. The optical system is particularly suited for step and scan lithography methods. The invention enables the use of larger slit dimensions associated with ring field scanning optics, improves wafer throughput and allows higher semiconductor device density. The inventive optical system is characterized by reduced dynamic distortion because the static distortion is balanced across the slit width.

Materials and processing approaches for foundry-compatible transient electronics.

PubMed

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A; Song, Enming; Yu, Xinge; Rogers, John A

2017-07-11

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for "green" electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are ( i ) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, ( ii ) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and ( iii ) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Materials and processing approaches for foundry-compatible transient electronics

NASA Astrophysics Data System (ADS)

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-07-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

Photoelectrochemical cell including Ga(Sb.sub.x)N.sub.1-x semiconductor electrode

DOEpatents

Menon, Madhu; Sheetz, Michael; Sunkara, Mahendra Kumar; Pendyala, Chandrashekhar; Sunkara, Swathi; Jasinski, Jacek B.

2017-09-05

The composition of matter comprising Ga(Sb.sub.x)N.sub.1-x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.

T-gate geometric (solution for submicrometer gate length) HEMT: Physical analysis, modeling and implementation as parasitic elements and its usage as dual gate for variable gain amplifiers

NASA Astrophysics Data System (ADS)

Gupta, Ritesh; Rathi, Servin; Kaur, Ravneet; Gupta, Mridula; Gupta, R. S.

2009-03-01

In order to achieve superior RF performance, short gate length is required for the compound semiconductor field effect transistors, but the limitation in lithography for submicrometer gate lengths leads to the formation of various metal-insulator geometries like T-gate [Sandeep R. Bahl, Jesus A. del Alamo, Physics of breakdown in InAlAs/ n +-InGaAs heterostructure field-effect transistors, IEEE Trans. Electron Devices 41 (12) (1994) 2268-2275]. These geometries are the combination of various Metal-Semiconductor (MS)/Metal-Air-Semiconductor (MAS) contacts. Moreover, field plates [S. Karmalkar, M.S. Shur, G. Simin, M. Asif Khan, Field-plate engineering for HFETs, IEEE Trans. Electron Devices 52 (2005) 2534-2540] are also being fabricated these days, mainly at the drain end ( Γ-gate) having Metal-Insulator-Semiconductor (MIS) instead of MAS contact with the intention of increasing the breakdown voltage of the device. To realize the effect of upper gate electrode in the T-gate structure and field plates, an analytical model has been proposed in the present article by dividing the whole structure into MS/MIS contact regions, applying current continuity among them and solving iteratively. The model proposed for Metal-Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) [R. Gupta, S.K. Aggarwal, M. Gupta, R.S. Gupta, Analytical model for metal insulator semiconductor high electron mobility transistor (MISHEMT) for its high frequency and high power applications, J. Semicond. Technol. Sci. 6 (3) (2006) 189-198], is equally applicable to High Electron Mobility Transistors (HEMT) and has been used to formulate this model. In this paper, various structures and geometries have been compared to anticipate the need of T-gate modeling. The effect of MIS contacts has been implemented as parasitic resistance and capacitance and has also been studied to control the middle conventional gate as in dual gate technology by applying separate voltages across it. The results obtained using the proposed analytical scheme has been compared with simulated and experimental results, to prove the validity of our model.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Method of preparing nitrogen containing semiconductor material

DOEpatents

Barber, Greg D.; Kurtz, Sarah R.

2004-09-07

A method of combining group III elements with group V elements that incorporates at least nitrogen from a nitrogen halide for use in semiconductors and in particular semiconductors in photovoltaic cells.

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Total-dose radiation effects data for semiconductor devices, volume 1. [radiation resistance of components for the Galileo Project

NASA Technical Reports Server (NTRS)

Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.

1981-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.

Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Epitaxial growth of 100-μm thick M-type hexaferrite crystals on wide bandgap semiconductor GaN/Al{sub 2}O{sub 3} substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hu, Bolin; Su, Zhijuan; Bennett, Steve

2014-05-07

Thick barium hexaferrite BaFe{sub 12}O{sub 19} (BaM) films having thicknesses of ∼100 μm were epitaxially grown on GaN/Al{sub 2}O{sub 3} substrates from a molten-salt solution by vaporizing the solvent. X-ray diffraction measurement verified the growth of BaM (001) textured growth of thick films. Saturation magnetization, 4πM{sub s}, was measured for as-grown films to be 4.6 ± 0.2 kG and ferromagnetic resonance measurements revealed a microwave linewidth of ∼100 Oe at X-band. Scanning electron microscopy indicated clear hexagonal crystals distributed on the semiconductor substrate. These results demonstrate feasibility of growing M-type hexaferrite crystal films on wide bandgap semiconductor substrates by using a simplemore » powder melting method. It also presents a potential pathway for the integration of ferrite microwave passive devices with active semiconductor circuit elements creating system-on-a-wafer architectures.« less

Processes for multi-layer devices utilizing layer transfer

DOEpatents

Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J

2015-02-03

A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.

Environment, health and safety issues for sources used in MOVPE growth of compound semiconductors

NASA Astrophysics Data System (ADS)

Shenai-Khatkhate, Deodatta V.; Goyette, Randall J.; DiCarlo, Ronald L., Jr.; Dripps, Gregory

2004-12-01

As metalorganic vapor-phase epitaxy (MOVPE) is becoming well-established production technology, there are equally growing concerns associated with its bearing on personnel and community safety, environmental impact and maximum quantities of hazardous materials permissible in the device fabrication operations. Safety as well as responsible environmental care has always been of paramount importance in the MOVPE-based crystal growth of compound semiconductors. In this paper, we present the findings from workplace exposure monitoring studies on conventional MOVPE sources such as trimethylgallium, triethylgallium, trimethylantimony and diethylzinc. Also reviewed are the environmental, health and safety hazard aspects for metalorganic sources of routine elements, and the means to minimize the risks (i.e., engineering controls) involved while using these MOVPE sources.

Photovoltaic healing of non-uniformities in semiconductor devices

DOEpatents

Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.

2006-08-29

A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Dynamic carrier transport modulation for constructing advanced devices with improved performance by piezotronic and piezo-phototronic effects: a brief review

NASA Astrophysics Data System (ADS)

Guo, Zhen; Pan, Haixi; Li, Chuanyu; Zhang, Lili; Yan, Shuai; Zhang, Wei; Yao, Jia; Tang, Yuguo; Yang, Hongbo; Wu, Yihui; Feng, Liping; Zhou, Lianqun

2017-08-01

Carrier generation, transport, separation, and recombination behaviors can be modulated for improving the performance of semiconductor devices by using piezotronic and piezo-phototronic effects with creating piezopotential in crystals based on non-centrosymmetric semiconductor materials such as group II-VI and III-V semiconductors and transition metal dichalcogenides (TMDCs), which have emerged as attractive materials for electronic/photonic applications because of their novel properties. Until now, much effort has been devoted to improving the performance of devices based on the aforementioned materials through modulation of the carrier behavior. However, due to existing drawbacks, it has been difficult to further enhance the device performance for a built structure. However, effective exploration of the piezotronic and piezo-phototronic effects in these semiconducting materials could pave the way to the realization of high-performance devices. In general, the effective modulation of carrier behavior dynamically in devices such as light-emitting diodes, photodetectors, solar cells, nanogenerators, and so on, remains a key challenge. Due to the polarization of ions in semiconductor materials with noncentral symmetry under external strain, a piezopotential is created considering piezotronic and piezo-photoronic effects, which could dynamically modulate charge carrier transport behaviors across p-n junctions or metal-semiconductor interfaces. Through a combination of these effects and semiconductor properties, the performance of the related devices could be improved and new types of devices such as piezoelectric field-effect transistors and sensors have emerged, with potential applications in self-driven devices for effective energy harvesting and biosensing with high sensitivity, which are different from those traditionally designed and may have potential applications in strained triggered devices. The objective of this review is to briefly introduce the corresponding mechanisms for modulating carrier behavior on the basis of piezotronic and piezo-phototronic effects in materials such as group II-VI and group III-V semiconductors and TMDCs, as well as to discuss possible solutions to effectively enhance the performance of the devices via carrier modulation.

Solid state photosensitive devices which employ isolated photosynthetic complexes

DOEpatents

Peumans, Peter; Forrest, Stephen R.

2009-09-22

Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.

‘Symbiotic’ semiconductors: unusual and counter-intuitive Ge/Si/O interactions

NASA Astrophysics Data System (ADS)

George, T.; Li, P. W.; Chen, K. H.; Peng, K. P.; Lai, W. T.

2017-03-01

Since the inception of the first transistors in the 1940s, the immense body of work on the Group IV semiconductors, Si and Ge, has spearheaded spectacular advances in modern integrated-circuit (IC) technology that has enabled a vast landscape of device applications in logic, memory, and computing. Although initially Si supplanted Ge as the material of choice for metal-oxide-semiconductor field-effect transistors, Ge-based devices are now breaking new ground. Widespread and innovative Ge-based applications exist in optoelectronics, communications, microelectro-mechanical systems, and energy harvesting/savings. On the fundamental, materials science front, while it is well known that Ge and Si are fully miscible in each other, the nature and extent of their attraction for each other has largely been unexplored. In this paper, we report a rather curious interplay between Ge and Si that occurs at high temperature (~900 °C) and that can be best described as ‘symbiotic’. Each element appears to facilitate reactions in the other which would otherwise not be possible. Oxygen intersititials also appear to play a major role in these reactions. Our experimental work has allowed us to classify four distinct regimes where these reactions occur. We describe these conditions and provide the necessary theoretical explanations for these results.

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Ultra-Low Threshold Vertical-Cavity Surface-Emitting Lasers for USAF Applications

DTIC Science & Technology

2005-01-01

molecular beam epitaxy , semiconductors, finite element method, modeling and simulation, oxidation furnace 16. SECURITY CLASSIFICATION OF: 19a. NAME OF...Patterson Air Force Base). Device material growth was accomplished by means of molecular beam epitaxy (MBE) using a Varian GENII MBE system owned by the...grown by molecular beam epitaxy on a GaAs substrate. Vertical posts, with square and circular cross sections ranging in size from 5 to 40 microns

Tapered rib fiber coupler for semiconductor optical devices

DOEpatents

Vawter, Gregory A.; Smith, Robert Edward

2001-01-01

A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

Epitaxial Growth of Cubic Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)

2011-01-01

Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

Wafer-level micro-optics: trends in manufacturing, testing, packaging, and applications

NASA Astrophysics Data System (ADS)

Voelkel, Reinhard; Gong, Li; Rieck, Juergen; Zheng, Alan

2012-11-01

Micro-optics is an indispensable key enabling technology (KET) for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the last decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks (supercomputer, ROADM), bringing high-speed internet to our homes (FTTH). Even our modern smart phones contain a variety of micro-optical elements. For example, LED flashlight shaping elements, the secondary camera, and ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by semiconductor industry. Thousands of components are fabricated in parallel on a wafer. We report on the state of the art in wafer-based manufacturing, testing, packaging and present examples and applications for micro-optical components and systems.

Interconnected semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1990-10-23

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems

DOEpatents

Welch, James D.

2003-09-23

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.

A Thermal and Electrical Analysis of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Vafai, Kambiz

1997-01-01

The state-of-art power semiconductor devices require a thorough understanding of the thermal behavior for these devices. Traditional thermal analysis have (1) failed to account for the thermo-electrical interaction which is significant for power semiconductor devices operating at high temperature, and (2) failed to account for the thermal interactions among all the levels involved in, from the entire device to the gate micro-structure. Furthermore there is a lack of quantitative studies of the thermal breakdown phenomenon which is one of the major failure mechanisms for power electronics. This research work is directed towards addressing. Using a coupled thermal and electrical simulation, in which the drift-diffusion equations for the semiconductor and the energy equation for temperature are solved simultaneously, the thermo-electrical interactions at the micron scale of various junction structures are thoroughly investigated. The optimization of gate structure designs and doping designs is then addressed. An iterative numerical procedure which incorporates the thermal analysis at the device, chip and junction levels of the power device is proposed for the first time and utilized in a BJT power semiconductor device. In this procedure, interactions of different levels are fully considered. The thermal stability issue is studied both analytically and numerically in this research work in order to understand the mechanism for thermal breakdown.

A low cost igniter utilizing an SCB and titanium sub-hydride potassium perchlorate pyrotechnic

NASA Technical Reports Server (NTRS)

Bickes, R. W., Jr.; Grubelich, M. C.; Hartman, J. K.; McCampbell, C. B.; Churchill, J. K.

1994-01-01

A conventional NSI (NASA Standard Initiator) normally employs a hot-wire ignition element to ignite ZPP (zirconium potassium perchlorate). With minor modifications to the interior of a header similar to an NSI device to accommodate an SCB (semiconductor bridge), a low cost initiator was obtained. In addition, the ZPP was replaced with THKP (titanium sub-hydride potassium perchlorate) to obtain increased overall gas production and reduced static-charge sensitivity. This paper reports on the all-fire and no-fire levels obtained and on a dual mix device that uses THKP as the igniter mix and a thermite as the output mix.

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

PubMed

Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley

2009-10-01

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

neutron-Induced Failures in semiconductor Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wender, Stephen Arthur

2017-03-13

Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Novel method of optical image registration in wide wavelength range using matrix of piezoelectric crystals

NASA Astrophysics Data System (ADS)

Pigarev, Aleksey V.; Bazarov, Timur O.; Fedorov, Vladimir V.; Ryabushkin, Oleg A.

2018-02-01

Most modern systems of the optical image registration are based on the matrices of photosensitive semiconductor heterostructures. However, measurement of radiation intensities up to several MW/cm2 -level using such detectors is a great challenge because semiconductor elements have low optical damage threshold. Reflecting or absorbing filters that can be used for attenuation of radiation intensity, as a rule, distort beam profile. Furthermore, semiconductor based devices have relatively narrow measurement wavelength bandwidth. We introduce a novel matrix method of optical image registration. This approach doesn't require any attenuation when measuring high radiation intensities. A sensitive element is the matrix made of thin transparent piezoelectric crystals that absorb just a small part of incident optical power. Each crystal element has its own set of intrinsic (acoustic) vibration modes. These modes can be exited due to the inverse piezoelectric effect when the external electric field is applied to the crystal sample providing that the field frequency corresponds to one of the vibration mode frequencies. Such piezoelectric resonances (PR) can be observed by measuring the radiofrequency response spectrum of the crystal placed between the capacitor plates. PR frequencies strongly depend on the crystal temperature. Temperature calibration of PR frequencies is conducted in the uniform heating conditions. In the case a crystal matrix is exposed to the laser radiation the incident power can be obtained separately for each crystal element by measuring its PR frequency kinetics providing that the optical absorption coefficient is known. The operating wavelength range of such sensor is restricted by the transmission bandwidth of the applied crystals. A plane matrix constituting of LiNbO3 crystals was assembled in order to demonstrate the possibility of application of the proposed approach. The crystal elements were placed between two electrodes forming a capacitor which was interconnected to the lock-in detection system. The radiofrequency response to the applied voltage from the generator was measured simultaneously for all elements.

Semiconductor Quantum Electron Wave Transport, Diffraction, and Interference: Analysis, Device, and Measurement.

NASA Astrophysics Data System (ADS)

Henderson, Gregory Newell

Semiconductor device dimensions are rapidly approaching a fundamental limit where drift-diffusion equations and the depletion approximation are no longer valid. In this regime, quantum effects can dominate device response. To increase further device density and speed, new devices must be designed that use these phenomena to positive advantage. In addition, quantum effects provide opportunities for a new class of devices which can perform functions previously unattainable with "conventional" semiconductor devices. This thesis has described research in the analysis of electron wave effects in semiconductors and the development of methods for the design, fabrication, and characterization of quantum devices based on these effects. First, an exact set of quantitative analogies are presented which allow the use of well understood optical design and analysis tools for the development of electron wave semiconductor devices. Motivated by these analogies, methods are presented for modeling electron wave grating diffraction using both an exact rigorous coupled-wave analysis and approximate analyses which are useful for grating design. Example electron wave grating switch and multiplexer designs are presented. In analogy to thin-film optics, the design and analysis of electron wave Fabry-Perot interference filters are also discussed. An innovative technique has been developed for testing these (and other) electron wave structures using Ballistic Electron Emission Microscopy (BEEM). This technique uses a liquid-helium temperature scanning tunneling microscope (STM) to perform spectroscopy of the electron transmittance as a function of electron energy. Experimental results show that BEEM can resolve even weak quantum effects, such as the reflectivity of a single interface between materials. Finally, methods are discussed for incorporating asymmetric electron wave Fabry-Perot filters into optoelectronic devices. Theoretical and experimental results show that such structures could be the basis for a new type of electrically pumped mid - to far-infrared semiconductor laser.

Electric field induced spin-polarized current

DOEpatents

Murakami, Shuichi; Nagaosa, Naoto; Zhang, Shoucheng

2006-05-02

A device and a method for generating an electric-field-induced spin current are disclosed. A highly spin-polarized electric current is generated using a semiconductor structure and an applied electric field across the semiconductor structure. The semiconductor structure can be a hole-doped semiconductor having finite or zero bandgap or an undoped semiconductor of zero bandgap. In one embodiment, a device for injecting spin-polarized current into a current output terminal includes a semiconductor structure including first and second electrodes, along a first axis, receiving an applied electric field and a third electrode, along a direction perpendicular to the first axis, providing the spin-polarized current. The semiconductor structure includes a semiconductor material whose spin orbit coupling energy is greater than room temperature (300 Kelvin) times the Boltzmann constant. In one embodiment, the semiconductor structure is a hole-doped semiconductor structure, such as a p-type GaAs semiconductor layer.

Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.

PubMed

Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang

2008-01-21

A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J

2013-08-13

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Design and fabrication of 6.1-.ANG. family semiconductor devices using semi-insulating A1Sb substrate

DOEpatents

Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA

2007-05-29

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.

Porous Diblock Copolymer Thin Films in High-Performance Semiconductor Microelectronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Black, C.T.

2011-02-01

The engine fueling more than 40 years of performance improvements in semiconductor integrated circuits (ICs) has been industry's ability to pattern circuit elements at ever-higher resolution and with ever-greater precision. Steady advances in photolithography - the process wherein ultraviolet light chemically changes a photosensitive polymer resist material in order to create a latent image - have resulted in scaling of minimum printed feature sizes from tens of microns during the 1980s to sub-50 nanometer transistor gate lengths in today's state-of-the-art ICs. The history of semiconductor technology scaling as well as future technology requirements is documented in the International Technology Roadmapmore » for Semiconductors (ITRS). The progression of the semiconductor industry to the realm of nanometer-scale sizes has brought enormous challenges to device and circuit fabrication, rendering performance improvements by conventional scaling alone increasingly difficult. Most often this discussion is couched in terms of field effect transistor (FET) feature sizes such as the gate length or gate oxide thickness, however these challenges extend to many other aspects of the IC, including interconnect dimensions and pitch, device packing density, power consumption, and heat dissipation. The ITRS Technology Roadmap forecasts a difficult set of scientific and engineering challenges with no presently-known solutions. The primary focus of this chapter is the research performed at IBM on diblock copolymer films composed of polystyrene (PS) and poly(methyl-methacrylate) (PMMA) (PS-b-PMMA) with total molecular weights M{sub n} in the range of {approx}60K (g/mol) and polydispersities (PD) of {approx}1.1. These materials self assemble to form patterns having feature sizes in the range of 15-20nm. PS-b-PMMA was selected as a self-assembling patterning material due to its compatibility with the semiconductor microelectronics manufacturing infrastructure, as well as the significant body of existing research on understanding its material properties.« less

Architectures for Improved Organic Semiconductor Devices

NASA Astrophysics Data System (ADS)

Beck, Jonathan H.

Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

Photoconductive circuit element reflectometer

DOEpatents

Rauscher, Christen

1990-01-01

A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

Photoconductive circuit element reflectometer

DOEpatents

Rauscher, C.

1987-12-07

A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a determinable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line. 4 figs.

Toward active-matrix lab-on-a-chip: programmable electrofluidic control enabled by arrayed oxide thin film transistors.

PubMed

Noh, Joo Hyon; Noh, Jiyong; Kreit, Eric; Heikenfeld, Jason; Rack, Philip D

2012-01-21

Agile micro- and nano-fluidic control is critical to numerous life science and chemical science synthesis as well as kinetic and thermodynamic studies. To this end, we have demonstrated the use of thin film transistor arrays as an active matrix addressing method to control an electrofluidic array. Because the active matrix method minimizes the number of control lines necessary (m + n lines for the m×n element array), the active matrix addressing method integrated with an electrofluidic platform can be a significant breakthrough for complex electrofluidic arrays (increased size or resolution) with enhanced function, agility and programmability. An amorphous indium gallium zinc oxide (a-IGZO) semiconductor active layer is used because of its high mobility of 1-15 cm(2) V(-1) s(-1), low-temperature processing and transparency for potential spectroscopy and imaging. Several electrofluidic functionalities are demonstrated using a simple 2 × 5 electrode array connected to a 2 × 5 IGZO thin film transistor array with the semiconductor channel width of 50 μm and mobility of 6.3 cm(2) V(-1) s(-1). Additionally, using the TFT device characteristics, active matrix addressing schemes are discussed as the geometry of the electrode array can be tailored to act as a storage capacitor element. Finally, requisite material and device parameters are discussed in context with a VGA scale active matrix addressed electrofluidic platform.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Materials and processing approaches for foundry-compatible transient electronics

PubMed Central

Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

2017-01-01

Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries. PMID:28652373

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.

Metal-organic semiconductor interfacial barrier height determination from internal photoemission signal in spectral response measurements

NASA Astrophysics Data System (ADS)

Kumar, Sandeep; Iyer, S. Sundar Kumar

2017-04-01

Accurate and convenient evaluation methods of the interfacial barrier ϕb for charge carriers in metal semiconductor (MS) junctions are important for designing and building better opto-electronic devices. This becomes more critical for organic semiconductor devices where a plethora of molecules are in use and standardised models applicable to myriads of material combinations for the different devices may have limited applicability. In this paper, internal photoemission (IPE) from spectral response (SR) in the ultra-violet to near infra-red range of different MS junctions of metal-organic semiconductor-metal (MSM) test structures is used to determine more realistic MS ϕb values. The representative organic semiconductor considered is [6, 6]-phenyl C61 butyric acid methyl ester, and the metals considered are Al and Au. The IPE signals in the SR measurement of the MSM device are identified and separated before it is analysed to estimate ϕb for the MS junction. The analysis of IPE signals under different bias conditions allows the evaluation of ϕb for both the front and back junctions, as well as for symmetric MSM devices.

Organic Semiconductor Photovoltaics

NASA Astrophysics Data System (ADS)

Sariciftci, Niyazi Serdar

2005-03-01

Recent developments on organic photovoltaic elements are reviewed. Semiconducting conjugated polymers and molecules as well as nanocrystalline inorganic semiconductors are used in composite thin films. The photophysics of such photoactive devices is based on the photoinduced charge transfer from donor type semiconducting molecules onto acceptor type molecules such as Buckminsterfullerene, C60 and/or nanoparticles. Similar to the first steps in natural photosynthesis, this photoinduced electron transfer leads to a number of potentially interesting applications which include sensitization of the photoconductivity and photovoltaic phenomena. Examples of photovoltaic architectures are discussed with their potential in terrestrial solar energy conversion. Several materials are introduced and discussed for their photovoltaic activities. Furthermore, nanomorphology has been investigated with AFM, SEM and TEM. The morphology/property relationship for a given photoactive system is found to be a major effect.

Method for fabricating an interconnected array of semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1989-10-10

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Methods of Measurement for Semiconductor Materials, Process Control, and Devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

New developments in power semiconductors

NASA Technical Reports Server (NTRS)

Sundberg, G. R.

1983-01-01

This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

Rational Design of ZnO:H/ZnO Bilayer Structure for High-Performance Thin-Film Transistors.

PubMed

Abliz, Ablat; Huang, Chun-Wei; Wang, Jingli; Xu, Lei; Liao, Lei; Xiao, Xiangheng; Wu, Wen-Wei; Fan, Zhiyong; Jiang, Changzhong; Li, Jinchai; Guo, Shishang; Liu, Chuansheng; Guo, Tailiang

2016-03-01

The intriguing properties of zinc oxide-based semiconductors are being extensively studied as they are attractive alternatives to current silicon-based semiconductors for applications in transparent and flexible electronics. Although they have promising properties, significant improvements on performance and electrical reliability of ZnO-based thin film transistors (TFTs) should be achieved before they can be applied widely in practical applications. This work demonstrates a rational and elegant design of TFT, composed of poly crystalline ZnO:H/ZnO bilayer structure without using other metal elements for doping. The field-effect mobility and gate bias stability of the bilayer structured devices have been improved. In this device structure, the hydrogenated ultrathin ZnO:H active layer (∼3 nm) could provide suitable carrier concentration and decrease the interface trap density, while thick pure-ZnO layer could control channel conductance. Based on this novel structure, a high field-effect mobility of 42.6 cm(2) V(-1) s(-1), a high on/off current ratio of 10(8) and a small subthreshold swing of 0.13 V dec(-1) have been achieved. Additionally, the bias stress stability of the bilayer structured devices is enhanced compared to the simple single channel layer ZnO device. These results suggest that the bilayer ZnO:H/ZnO TFTs have a great potential for low-cost thin-film electronics.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

1990-01-01

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Multiphysics modeling of non-linear laser-matter interactions for optically active semiconductors

NASA Astrophysics Data System (ADS)

Kraczek, Brent; Kanp, Jaroslaw

Development of photonic devices for sensors and communications devices has been significantly enhanced by computational modeling. We present a new computational method for modelling laser propagation in optically-active semiconductors within the paraxial wave approximation (PWA). Light propagation is modeled using the Streamline-upwind/Petrov-Galerkin finite element method (FEM). Material response enters through the non-linear polarization, which serves as the right-hand side of the FEM calculation. Maxwell's equations for classical light propagation within the PWA can be written solely in terms of the electric field, producing a wave equation that is a form of the advection-diffusion-reaction equations (ADREs). This allows adaptation of the computational machinery developed for solving ADREs in fluid dynamics to light-propagation modeling. The non-linear polarization is incorporated using a flexible framework to enable the use of multiple methods for carrier-carrier interactions (e.g. relaxation-time-based or Monte Carlo) to enter through the non-linear polarization, as appropriate to the material type. We demonstrate using a simple carrier-carrier model approximating the response of GaN. Supported by ARL Materials Enterprise.

Air-gating and chemical-gating in transistors and sensing devices made from hollow TiO2 semiconductor nanotubes

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Funke, Hans; Nagpal, Prashant

2015-07-01

Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

1987-08-31

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

Lattice matched semiconductor growth on crystalline metallic substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2013-11-05

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

Mineral resource of the month: germanium

USGS Publications Warehouse

Guberman, David

2010-01-01

The article provides information on germanium, an element with electrical properties between those of a metal and an insulator. Applications of germanium include its use as a component of the glass in fiber-optic cable, in infrared optics devices and as a semiconductor and substrate used in electronic and solar applications. Germanium was first isolated by German chemist Clemens Winkler in 1886 and was named after Winkler's native country. In 2008, the leading sources of primary germanium from coal or zinc include Canada, China and Russia.

Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide-Semiconductor (MOS) Devices

DTIC Science & Technology

1982-02-01

Ephrath F.L. Pesavento MDA903-81-C-0100 D.J. DiMaria C. Falcony D.R. Young 9. PERFORMING ORGANIZATION NAME AND ADDRESS 10. PROGRAM ELEMENT, PROJECT...Etching (RIE) Apparatus can generate neutral electron traps in SiO 2. The paper by Ephrath, DiMaria and Pesavento discusses the dependence of the...layers. Considerable work remains to be done to correlate the results of these various investigations. A report by Pesavento , Lai and Calise is included

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Non- contacting capacitive diagnostic device

DOEpatents

Ellison, Timothy

2005-07-12

A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Fluorene-based macromolecular nanostructures and nanomaterials for organic (opto)electronics.

PubMed

Xie, Ling-Hai; Yang, Su-Hui; Lin, Jin-Yi; Yi, Ming-Dong; Huang, Wei

2013-10-13

Nanotechnology not only opens up the realm of nanoelectronics and nanophotonics, but also upgrades organic thin-film electronics and optoelectronics. In this review, we introduce polymer semiconductors and plastic electronics briefly, followed by various top-down and bottom-up nano approaches to organic electronics. Subsequently, we highlight the progress in polyfluorene-based nanoparticles and nanowires (nanofibres), their tunable optoelectronic properties as well as their applications in polymer light-emitting devices, solar cells, field-effect transistors, photodetectors, lasers, optical waveguides and others. Finally, an outlook is given with regard to four-element complex devices via organic nanotechnology and molecular manufacturing that will spread to areas such as organic mechatronics in the framework of robotic-directed science and technology.

Insulator Charging in RF MEMS Capacitive Switches

DTIC Science & Technology

2005-06-01

and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A

A memristor-based nonvolatile latch circuit

NASA Astrophysics Data System (ADS)

Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

2010-06-01

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Complementary resistive switching in BaTiO3/NiO bilayer with opposite switching polarities

NASA Astrophysics Data System (ADS)

Li, Shuo; Wei, Xianhua; Lei, Yao; Yuan, Xincai; Zeng, Huizhong

2016-12-01

Resistive switching behaviors have been investigated in the Au/BaTiO3/NiO/Pt structure by stacking the two elements with different switching types. The conducting atomic force microscope measurements on BaTiO3 thin films and NiO thin films suggest that with the same active resistive switching region, the switching polarities in the two semiconductors are opposite to each other. It is in agreement with the bipolar hysteresis I-V curves with opposite switching polarities for single-layer devices. The bilayer devices show complementary resistive switching (CRS) without electroforming and unipolar resistive switching (URS) after electroforming. The coexistence of CRS and URS is mainly ascribed to the co-effect of electric field and Joule heating mechanisms, indicating that changeable of resistance in this device is dominated by the redistribution of oxygen vacancies in BaTiO3 and the formation, disruption, restoration of conducting filaments in NiO. CRS in bilayer with opposite switching polarities is effective to solve the sneak current without the introduction of any selector elements or an additional metal electrode.

Charge dissipative dielectric for cryogenic devices

NASA Technical Reports Server (NTRS)

Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)

2007-01-01

A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

Suppressing molecular vibrations in organic semiconductors by inducing strain

PubMed Central

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-01-01

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501

Suppressing molecular vibrations in organic semiconductors by inducing strain.

PubMed

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-04-04

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

Self bleaching photoelectrochemical-electrochromic device

DOEpatents

Bechinger, Clemens S.; Gregg, Brian A.

2002-04-09

A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Rational Design of Zinc Phosphide Heterojunction Photovoltaics

NASA Astrophysics Data System (ADS)

Bosco, Jeffrey Paul

The prospect of terawatt-scale electricity generation using a photovoltaic (PV) device places strict requirements on the active semiconductor optoelectronic properties and elemental abundance. After reviewing the constraints placed on an ``earth-abundant'' solar absorber, we find zinc phosphide (α-Zn 3P2) to be an ideal candidate. In addition to its near-optimal direct band gap of 1.5 eV, high visible-light absorption coefficient (>10. 4cm-1), and long minority-carrier diffusion length (>5 μm), Zn3P 2 is composed of abundant Zn and P elements and has excellent physical properties for scalable thin-film deposition. However, to date, a Zn 3P2 device of sufficient efficiency for commercial applications has not been demonstrated. Record efficiencies of 6.0% for multicrystalline and 4.3% for thin-film cells have been reported, respectively. Performance has been limited by the intrinsic p-type conductivity of Zn3P 2 which restricts us to Schottky and heterojunction device designs. Due to our poor understanding of Zn3P2 interfaces, an ideal heterojunction partner has not yet been found. The goal of this thesis is to explore the upper limit of solar conversion efficiency achievable with a Zn3P2 absorber through the design of an optimal heterojunction PV device. To do so, we investigate three key aspects of material growth, interface energetics, and device design. First, the growth of Zn3P2 on GaAs(001) is studied using compound-source molecular-beam epitaxy (MBE). We successfully demonstrate the pseudomorphic growth of Zn3P2 epilayers of controlled orientation and optoelectronic properties. Next, the energy-band alignments of epitaxial Zn3P2 and II-VI and III-V semiconductor interfaces are measured via high-resolution x-ray photoelectron spectroscopy in order to determine the most appropriate heterojunction partner. From this work, we identify ZnSe as a nearly ideal n-type emitter for a Zn3P 2 PV device. Finally, various II-VI/Zn3P2 heterojunction solar cells designs are fabricated, including substrate and superstrate architectures, and evaluated based on their solar conversion efficiency.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M.

1980-01-01

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J

2014-11-25

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL

2011-04-26

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew

2016-05-24

Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Spectroscopic Studies of the Electronic Structure of Metal-Semiconductor and Vacuum-Semiconductor Interfaces.

DTIC Science & Technology

1982-12-31

interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water

Semiconductor quantum wells: old technology or new device functionalities

NASA Astrophysics Data System (ADS)

Kolbas, R. M.; Lo, Y. C.; Hsieh, K. Y.; Lee, J. H.; Reed, F. E.; Zhang, D.; Zhang, T.

2009-08-01

The introduction of semiconductor quantum wells in the 1970s created a revolution in optoelectronic devices. A large fraction of today's lasers and light emitting diodes are based on quantum wells. It has been more than 30 years but novel ideas and new device functions have recently been demonstrated using quantum well heterostructures. This paper provides a brief overview of the subject and then focuses on the physics of quantum wells that the lead author believes holds the key to new device functionalities. The data and figures contained within are not new. They have been assembled from 30 years of work. They are presented to convey the story of why quantum wells continue to fuel the engine that drives the semiconductor optoelectronic business. My apologies in advance to my students and co-workers that contributed so much that could not be covered in such a short manuscript. The explanations provided are based on the simplest models possible rather than the very sophisticated mathematical models that have evolved over many years. The intended readers are those involved with semiconductor optoelectronic devices and are interested in new device possibilities.

Surface breakdown igniter for mercury arc devices

DOEpatents

Bayless, John R.

1977-01-01

Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Semiconductor Materials for High Frequency Solid State Sources.

DTIC Science & Technology

1985-01-18

saturation on near and submicron-scale device performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or...basis of all FET scaling procedures; and is a major motivating factor for going to submicron structures. This scaling was tested with the 4 following...performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or rejected as candidate device materials based, in

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

PubMed Central

2009-01-01

The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

Main principles of developing exploitation models of semiconductor devices

NASA Astrophysics Data System (ADS)

Gradoboev, A. V.; Simonova, A. V.

2018-05-01

The paper represents primary tasks, solutions of which allow to develop the exploitation modes of semiconductor devices taking into account complex and combined influence of ionizing irradiation and operation factors. The structure of the exploitation model of the semiconductor device is presented, which is based on radiation and reliability models. Furthermore, it was shown that the exploitation model should take into account complex and combine influence of various ionizing irradiation types and operation factors. The algorithm of developing the exploitation model of the semiconductor devices is proposed. The possibility of creating the radiation model of Schottky barrier diode, Schottky field-effect transistor and Gunn diode is shown based on the available experimental data. The basic exploitation model of IR-LEDs based upon double AlGaAs heterostructures is represented. The practical application of the exploitation models will allow to output the electronic products with guaranteed operational properties.

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.

1999-01-01

A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

High voltage semiconductor devices and methods of making the devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less

High voltage semiconductor devices and methods of making the devices

DOEpatents

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

2017-02-28

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Wide Bandgap Extrinsic Photoconductive Switches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, James S.

2012-01-20

Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less

NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL

Science.gov Websites

photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

The gatemon: a transmon with a voltage-variable superconductor-semiconductor junction

NASA Astrophysics Data System (ADS)

Petersson, Karl

We have developed a superconducting transmon qubit with a semiconductor-based Josephson junction element. The junction is made from an InAs nanowire with in situ molecular beam epitaxy-grown superconducting Al contacts. This gate-controlled transmon, or gatemon, allows simple tuning of the qubit transition frequency using a gate voltage to vary the density of carriers in the semiconductor region. In the first generations of devices we have measured coherence times up to ~10 μs. These coherence times, combined with stable qubit operation, permit single qubit rotations with fidelities of ~99.5 % for all gates including voltage-controlled Z rotations. Towards multi-qubit operation we have also implemented a two qubit voltage-controlled cPhase gate. In contrast to flux-tuned transmons, voltage-tunable gatemons may simplify the task of scaling to multi-qubit circuits and enable new means of control for many qubit architectures. In collaboration with T.W. Larsen, L. Casparis, M.S. Olsen, F. Kuemmeth, T.S. Jespersen, P. Krogstrup, J. Nygard and C.M. Marcus. Research was supported by Microsoft Project Q, Danish National Research Foundation and a Marie Curie Fellowship.

Cadmium-free junction fabrication process for CuInSe.sub.2 thin film solar cells

DOEpatents

Ramanathan, Kannan V.; Contreras, Miguel A.; Bhattacharya, Raghu N.; Keane, James; Noufi, Rommel

1999-01-01

The present invention provides an economical, simple, dry and controllable semiconductor layer junction forming process to make cadmium free high efficiency photovoltaic cells having a first layer comprised primarily of copper indium diselenide having a thin doped copper indium diselenide n-type region, generated by thermal diffusion with a group II(b) element such as zinc, and a halide, such as chlorine, and a second layer comprised of a conventional zinc oxide bilayer. A photovoltaic device according the present invention includes a first thin film layer of semiconductor material formed primarily from copper indium diselenide. Doping of the copper indium diselenide with zinc chloride is accomplished using either a zinc chloride solution or a solid zinc chloride material. Thermal diffusion of zinc chloride into the copper indium diselenide upper region creates the thin n-type copper indium diselenide surface. A second thin film layer of semiconductor material comprising zinc oxide is then applied in two layers. The first layer comprises a thin layer of high resistivity zinc oxide. The second relatively thick layer of zinc oxide is doped to exhibit low resistivity.

Semiconductor composition containing iron, dysprosium, and terbium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pooser, Raphael C.; Lawrie, Benjamin J.; Baddorf, Arthur P.

An amorphous semiconductor composition includes 1 to 70 atomic percent iron, 15 to 65 atomic percent dysprosium, 15 to 35 atomic percent terbium, balance X, wherein X is at least one of an oxidizing element and a reducing element. The composition has an essentially amorphous microstructure, an optical transmittance of at least 50% in at least the visible spectrum and semiconductor electrical properties.

Thermovoltaic semiconductor device including a plasma filter

DOEpatents

Baldasaro, Paul F.

1999-01-01

A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.

Semiconductor cooling by thin-film thermocouples

NASA Technical Reports Server (NTRS)

Tick, P. A.; Vilcans, J.

1970-01-01

Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.

Multiple gap photovoltaic device

DOEpatents

Dalal, Vikram L.

1981-01-01

A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.

High efficiency photovoltaic device

DOEpatents

Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang

1999-11-02

An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.

New Concentric Electrode Metal-Semiconductor-Metal Photodetectors

NASA Technical Reports Server (NTRS)

Towe, Elias

1996-01-01

A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.

Organic photosensitive cells grown on rough electrode with nano-scale morphology control

DOEpatents

Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI

2011-06-07

An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.

1999-07-13

A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.

The role of Mg dopant on the morphological, structural and optical properties of Mg doped zinc oxide grown through hydrothermal method

NASA Astrophysics Data System (ADS)

Susetyo, P.; Fauzia, V.; Sugihartono, I.

2017-04-01

ZnO nanorods is a low cost II-VI semiconductor compound with huge potential to be applied in optoelectronic devices i.e. light emitting diodes, solar cells, gas sensor, spintronic devices and lasers. In order to improve the electrical and optical properties, group II, III and IV elements were widely investigated as dopand elements on ZnO. In this work, magnesium (Mg) was doped into ZnO nanorods. Samples were prepared firstly by deposition of undoped ZnO seed layer on indium thin oxide coated glass substrates by ultrasonic spray pyrolysis method and then followed by the growth of ZnO nanorods doped by three different Mg concentrations by hydrothermal method. Based on the morphological, microstructural and optical characterizations results, it is concluded that the increase of magnesium concentration tends to reduce the diameter of ZnO nanorods, increases the bandgap energy and decreases the UV absorption the luminescence in UV and visible range.

Two dimensional thermal and charge mapping of power thyristors

NASA Technical Reports Server (NTRS)

Hu, S. P.; Rabinovici, B. M.

1975-01-01

The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.

Creating Active Device Materials for Nanoelectronics Using Block Copolymer Lithography

PubMed Central

Morris, Michael A.

2017-01-01

The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO3) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP soft template. We outline WO3 nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO3 nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance. PMID:28973987

Creating Active Device Materials for Nanoelectronics Using Block Copolymer Lithography.

PubMed

Cummins, Cian; Bell, Alan P; Morris, Michael A

2017-09-30

The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO₃) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)- block -poly(4-vinylpyridine) (PS- b -P4VP) BCP soft template. We outline WO₃ nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO₃ nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance.

Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge

DOEpatents

Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.

2001-01-01

A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.

Imaging the motion of electrons in 2D semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Dani, Keshav

Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions.

PubMed

Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions

NASA Astrophysics Data System (ADS)

Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Demonstration of Al:ZnO as a plasmonic component for near-infrared metamaterials

PubMed Central

Naik, Gururaj V.; Liu, Jingjing; Kildishev, Alexander V.; Shalaev, Vladimir M.; Boltasseva, Alexandra

2012-01-01

Noble metals such as gold and silver are conventionally used as the primary plasmonic building blocks of optical metamaterials. Making subwavelength-scale structural elements from these metals not only seriously limits the optical performance of a device due to high absorption, it also substantially complicates the manufacturing process of nearly all metamaterial devices in the optical wavelength range. As an alternative to noble metals, we propose to use heavily doped oxide semiconductors that offer both functional and fabrication advantages in the near-infrared wavelength range. In this letter, we replace a metal with aluminum-doped zinc oxide as a new plasmonic material and experimentally demonstrate negative refraction in an Al:ZnO/ZnO metamaterial in the near-infrared range. PMID:22611188

A strain-isolation design for stretchable electronics

NASA Astrophysics Data System (ADS)

Wu, Jian; Li, Ming; Chen, Wei-Qiu; Kim, Dae-Hyeong; Kim, Yun-Soung; Huang, Yong-Gang; Hwang, Keh-Chih; Kang, Zhan; Rogers, John A.

2010-12-01

Stretchable electronics represents a direction of recent development in next-generation semiconductor devices. Such systems have the potential to offer the performance of conventional wafer-based technologies, but they can be stretched like a rubber band, twisted like a rope, bent over a pencil, and folded like a piece of paper. Isolating the active devices from strains associated with such deformations is an important aspect of design. One strategy involves the shielding of the electronics from deformation of the substrate through insertion of a compliant adhesive layer. This paper establishes a simple, analytical model and validates the results by the finite element method. The results show that a relatively thick, compliant adhesive is effective to reduce the strain in the electronics, as is a relatively short film.

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Modeling of Quantum Transport in Semiconductor Devices (The Physics and Operation of Ultra-Submicron Length Semiconductor Devices).

DTIC Science & Technology

1994-05-01

Open Systems and Contacts ...................... 16 A Ballistic Transport .......................... 17 B Role of the Boundaries and Contacts...15 Other Devices ................................ 90 V Modeling with the Green’s Functions 91 16 Homogeneous, Low-Field Systems .................. 93 A...The Retarded Function ..................... 95 B The "Less-Than" Function ................... 99 17 Homogeneous, High-Field Systems

Semiconductor crystal high resolution imager

NASA Technical Reports Server (NTRS)

Matteson, James (Inventor); Levin, Craig S. (Inventor)

2011-01-01

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Optical devices featuring nonpolar textured semiconductor layers

DOEpatents

Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua

2013-11-26

A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.

PubMed

Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A

2016-09-14

We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.

Noise And Charge Transport In Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.

2005-11-01

The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

NASA Astrophysics Data System (ADS)

Häusermann, R.; Batlogg, B.

2011-08-01

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.

Monolayer borophene electrode for effective elimination of both the Schottky barrier and strong electric field effect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn

2016-08-08

The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.

Piezotronic effect in 1D van der Waals solid of elemental tellurium nanobelt for smart adaptive electronics

NASA Astrophysics Data System (ADS)

Gao, Shengjie; Wang, Yixiu; Wang, Ruoxing; Wu, Wenzhuo

2017-10-01

Emerging technologies in wearable systems demand that functional devices can adaptively interact with the human body, where mechanical stimuli are ubiquitous and abundant. However, the electrical manipulation of charge carriers underpins the operations of state-of-the-art devices, and the effective control of interfacial energetics for charge carriers by the dynamic mechanical stimuli is still a relatively unexplored degree of freedom for semiconductor nanodevices. Piezotronic effect in nanostructured piezoelectric semiconductors offers exciting opportunities in addressing the above challenges. Here we report the first experimental exploration of piezotronic effect in 1D van der Waals solid of p-type tellurium nanobelt and systematically investigate the strain-gated charge carriers transport properties. The strain-induced polarization charges at the [10\\bar{1}0] surfaces of Te nanobelt can modulate the electronic transport through the interfacial effect on the Schottky contacts and the volumetric effect on the conducting channel. The competing phenomenon between interfacial and volumetric effects has been studied for the first time in piezotronics. Our research allows the access to a broad range of characterization and application of Te nanomaterials for piezotronics and could guide the future study of piezotronic effect in other materials. This progress in piezotronics, together with emerging methods for deterministic production and assembly of nanomaterials, leads to compelling opportunities for research from basic studies of piezoelectricity and semiconductor properties in functional nanomaterials to the development of ‘smarter’ electronics and optoelectronics.

Outline and comparison of the possible effects present in a metal-thin-film-insulator-semiconductor solar cell

NASA Technical Reports Server (NTRS)

Fonash, S. J.

1976-01-01

The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.

SOI MESFETs on high-resistivity, trap-rich substrates

NASA Astrophysics Data System (ADS)

Mehr, Payam; Zhang, Xiong; Lepkowski, William; Li, Chaojiang; Thornton, Trevor J.

2018-04-01

The DC and RF characteristics of metal-semiconductor field-effect-transistors (MESFETs) on conventional CMOS silicon-on-insulator (SOI) substrates are compared to nominally identical devices on high-resistivity, trap-rich SOI substrates. While the DC transfer characteristics are statistically identical on either substrate, the maximum available gain at GHz frequencies is enhanced by ∼2 dB when using the trap-rich substrates, with maximum operating frequencies, fmax, that are approximately 5-10% higher. The increased fmax is explained by the reduced substrate conduction at GHz frequencies using a lumped-element, small-signal model.

Computer modeling of inversion layer MOS solar cells and arrays

NASA Technical Reports Server (NTRS)

Ho, Fat Duen

1991-01-01

A two dimensional numerical model of the inversion layer metal insulator semiconductor (IL/MIS) solar cell is proposed by using the finite element method. The two-dimensional current flow in the device is taken into account in this model. The electrostatic potential distribution, the electron concentration distribution, and the hole concentration distribution for different terminal voltages are simulated. The results of simple calculation are presented. The existing problems for this model are addressed. Future work is proposed. The MIS structures are studied and some of the results are reported.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

PubMed

Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

2017-10-11

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

78 FR 40427 - Foreign-Trade Zone (FTZ) 183-Austin, Texas; Notification of Proposed Production Activity; Samsung...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-05

..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...

Semiconductor Laser Low Frequency Noise Characterization

NASA Technical Reports Server (NTRS)

Maleki, Lute; Logan, Ronald T.

1996-01-01

This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J. Charles; Dimos, Duane B.

1999-01-01

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Power semiconductor device with negative thermal feedback

NASA Technical Reports Server (NTRS)

Borky, J. M.; Thornton, R. D.

1970-01-01

Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Materials for n-type organic electronics: synthesis and properties of fluoroarene-thiophene semiconductors

NASA Astrophysics Data System (ADS)

Facchetti, Antonio; Yoon, Myung-Han; Katz, Howard E.; Marks, Tobin J.

2003-11-01

Recent progress in the field of organic electronics is due to a fruitful combination of both innovative molecular design and promising low-cost material/device assembly. Targeting the first strategy, we present here the general synthesis of fluoroarene-containing thiophene-based semiconductors and the study of their properties with respect to the corresponding fluorine-free hole-transporting analogues. The new compounds have been characterized by elemental analysis, mass spectrometry, and 1H- and 19F NMR. The dramatic influence of fluorine substitution and molecular architecture has been investigated by solution/film optical absorption, fluorescence emission, and cyclic voltammetry. Single crystal data for all of the oligomers have been obtained and will be presented. Film microstructure and morphology of this new class of materials have been studied by XRD and SEM. Particular emphasis will be posed on the solution-processable oligomers and polymers.

Structural analysis of the epitaxial interface Ag/ZnO in hierarchical nanoantennas.

PubMed

Sanchez, John Eder; Santiago, Ulises; Benitez, Alfredo; Yacamán, Miguel José; González, Francisco Javier; Ponce, Arturo

2016-10-10

Detectors, photo-emitter, and other high order radiation devices work under the principle of directionality to enhance the power of emission/transmission in a particular direction. In order to understand such directionality, it is important to study their coupling mechanism of their active elements. In this work, we present a crystalline orientation analysis of ZnO nanorods grown epitaxially on the pentagonal faces of silver nanowires. The analysis of the crystalline orientation at the metal-semiconductor interface (ZnO/Ag) is performed with precession electron diffraction under assisted scanning mode. In addition, high resolution X-ray diffraction on a Bragg-Brentano configuration has been used to identify the crystalline phases of the arrangement between ZnO rods and silver nanowires. The work presented herein provides a fundamental knowledge to understand the metal-semiconductor behavior related to the receiving/transmitting mechanisms of ZnO/Ag nanoantennas.

Comparative study of bolometric and non-bolometric switching elements for microwave phase shifters

NASA Technical Reports Server (NTRS)

Tabib-Azar, Massood; Bhasin, Kul B.; Romanofsky, Robert R.

1991-01-01

The performance of semiconductor and high critical temperature superconductor switches is compared as they are used in delay-line-type microwave and millimeter-wave phase shifters. Such factors as their ratios of the off-to-on resistances, parasitic reactances, power consumption, speed, input-to-output isolation, ease of fabrication, and physical dimensions are compared. Owing to their almost infinite off-to-on resistance ratio and excellent input-to-output isolation, bolometric superconducting switches appear to be quite suitable for use in microwave phase shifters; their only drawbacks are their speed and size. The SUPERFET, a novel device whose operation is based on the electric field effect in high critical temperature ceramic superconductors is also discussed. Preliminary results indicate that the SUPERFET is fast and that it can be scaled; therefore, it can be fabricated with dimensions comparable to semiconductor field-effect transistors.

Spatially selective hydrogen irradiation of dilute nitride semiconductors: a brief review

NASA Astrophysics Data System (ADS)

Felici, Marco; Pettinari, Giorgio; Biccari, Francesco; Capizzi, Mario; Polimeni, Antonio

2018-05-01

We provide a brief survey of the most recent results obtained by performing spatially selective hydrogen irradiation of dilute nitride semiconductors. The striking effects of the formation of stable N–H complexes in these compounds—coupled to the ultrasharp diffusion profile of H therein—can be exploited to tailor the structural (lattice constant) and optoelectronic (energy gap, refractive index, electron effective mass) properties of the material in the growth plane, with a spatial resolution of a few nm. This can be applied to the fabrication of site-controlled quantum dots (QDs) and wires, but also to the realization of the optical elements required for the on-chip manipulation and routing of qubits in fully integrated photonic circuits. The fabricated QDs—which have shown the ability to emit single photons—can also be deterministically coupled with photonic crystal microcavities, proving their inherent suitability to act as integrated light sources in complex nanophotonic devices.

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Spatially controlled doping of two-dimensional SnS 2 through intercalation for electronics

DOE PAGES

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan; ...

2018-02-26

Doped semiconductors are the most important building elements for modern electronic devices. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturallymore » grown n-type S-vacancy SnS 2, Cu intercalated bilayer SnS 2 obtained by this technique displays a hole field-effect mobility of ~40 cm 2 V -1 s -1, and the obtained Co-SnS 2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene. Combining this intercalation technique with lithography, an atomically seamless p–n–metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.« less

Spatially controlled doping of two-dimensional SnS 2 through intercalation for electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan

Doped semiconductors are the most important building elements for modern electronic devices. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturallymore » grown n-type S-vacancy SnS 2, Cu intercalated bilayer SnS 2 obtained by this technique displays a hole field-effect mobility of ~40 cm 2 V -1 s -1, and the obtained Co-SnS 2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene. Combining this intercalation technique with lithography, an atomically seamless p–n–metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.« less

Spatially controlled doping of two-dimensional SnS2 through intercalation for electronics

NASA Astrophysics Data System (ADS)

Gong, Yongji; Yuan, Hongtao; Wu, Chun-Lan; Tang, Peizhe; Yang, Shi-Ze; Yang, Ankun; Li, Guodong; Liu, Bofei; van de Groep, Jorik; Brongersma, Mark L.; Chisholm, Matthew F.; Zhang, Shou-Cheng; Zhou, Wu; Cui, Yi

2018-04-01

Doped semiconductors are the most important building elements for modern electronic devices1. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface2,3. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits4-9. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development10. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturally grown n-type S-vacancy SnS2, Cu intercalated bilayer SnS2 obtained by this technique displays a hole field-effect mobility of 40 cm2 V-1 s-1, and the obtained Co-SnS2 exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene5. Combining this intercalation technique with lithography, an atomically seamless p-n-metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.

Semiconductor millimeter wavelength electronics

NASA Astrophysics Data System (ADS)

Rosenbaum, F. J.

1985-12-01

This final report summarizes the results of research carried out on topics in millimeter wavelength semiconductor electronics under an ONR Selected Research Opportunity program. Study areas included III-V compound semiconductor growth and characterization, microwave and millimeter wave device modeling, fabrication and testing, and the development of new device concepts. A new millimeter wave mixer and detector, the Gap diode was invented. Topics reported on include ballistic transport, Zener oscillations, impurities in GaAs, electron velocity-electric field calculation and measurements, etc., calculations.

Implications of Analytical Investigations about the Semiconductor Equations on Device Modeling Programs.

DTIC Science & Technology

1983-04-01

34.. .. . ...- "- -,-. SIGNIFICANCE AND EXPLANATION Many different codes for the simulation of semiconductor devices such as transitors , diodes, thyristors are already circulated...partially take into account the consequences introduced by degenerate semiconductors (e.g. invalidity of Boltzmann’s statistics , bandgap narrowing). These...ft - ni p nep /Ut(2.10) Sni *e p nie 2.11) .7. (2.10) can be physically interpreted as the application of Boltzmann statistics . However (2.10) a.,zo

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Carson, R. F.

1985-01-01

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

NASA Astrophysics Data System (ADS)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Methods for forming particles from single source precursors

DOEpatents

Fox, Robert V [Idaho Falls, ID; Rodriguez, Rene G [Pocatello, ID; Pak, Joshua [Pocatello, ID

2011-08-23

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.

PubMed

Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S

2006-01-01

Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.

Semiconductor technology program: Progress briefs

NASA Technical Reports Server (NTRS)

Galloway, K. F.; Scace, R. I.; Walters, E. J.

1981-01-01

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J.C.; Dimos, D.B.

1999-01-12

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region. 4 figs.

General Electronics Technician: Semiconductor Devices and Circuits.

ERIC Educational Resources Information Center

Hilley, Robert

These instructional materials include a teacher's guide designed to assist instructors in organizing and presenting an introductory course in general electronics focusing on semiconductor devices and circuits and a student guide. The materials are based on the curriculum-alignment concept of first stating the objectives, developing instructional…

High transconductance organic electrochemical transistors

NASA Astrophysics Data System (ADS)

Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

2013-07-01

The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications.

Thermoelectric microdevice fabricated by a MEMS-like electrochemical process

NASA Technical Reports Server (NTRS)

Snyder, G. Jeffrey; Lim, James R.; Huang, Chen-Kuo; Fleurial, Jean-Pierre

2003-01-01

Microelectromechanical systems (MEMS) are the basis of many rapidly growing technologies, because they combine miniature sensors and actuators with communications and electronics at low cost. Commercial MEMS fabrication processes are limited to silicon-based materials or two-dimensional structures. Here we show an inexpensive, electrochemical technique to build MEMS-like structures that contain several different metals and semiconductors with three-dimensional bridging structures. We demonstrate this technique by building a working microthermoelectric device. Using repeated exposure and development of multiple photoresist layers, several different metals and thermoelectric materials are fabricated in a three-dimensional structure. A device containing 126 n-type and p-type (Bi, Sb)2Te3 thermoelectric elements, 20 microm tall and 60 microm in diameter with bridging metal interconnects, was fabricated and cooling demonstrated. Such a device should be of technological importance for precise thermal control when operating as a cooler, and for portable power when operating as a micro power generator.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

Self-activated ultrahigh chemosensitivity of oxide thin film nanostructures for transparent sensors

PubMed Central

Moon, Hi Gyu; Shim, Young-Soek; Kim, Do Hong; Jeong, Hu Young; Jeong, Myoungho; Jung, Joo Young; Han, Seung Min; Kim, Jong Kyu; Kim, Jin-Sang; Park, Hyung-Ho; Lee, Jong-Heun; Tuller, Harry L.; Yoon, Seok-Jin; Jang, Ho Won

2012-01-01

One of the top design priorities for semiconductor chemical sensors is developing simple, low-cost, sensitive and reliable sensors to be built in handheld devices. However, the need to implement heating elements in sensor devices, and the resulting high power consumption, remains a major obstacle for the realization of miniaturized and integrated chemoresistive thin film sensors based on metal oxides. Here we demonstrate structurally simple but extremely efficient all oxide chemoresistive sensors with ~90% transmittance at visible wavelengths. Highly effective self-activation in anisotropically self-assembled nanocolumnar tungsten oxide thin films on glass substrate with indium-tin oxide electrodes enables ultrahigh response to nitrogen dioxide and volatile organic compounds with detection limits down to parts per trillion levels and power consumption less than 0.2 microwatts. Beyond the sensing performance, high transparency at visible wavelengths creates opportunities for their use in transparent electronic circuitry and optoelectronic devices with avenues for further functional convergence. PMID:22905319

Electronics for Deep Space Cryogenic Applications

NASA Technical Reports Server (NTRS)

Patterson, R. L.; Hammond, A.; Dickman, J. E.; Gerber, S. S.; Elbuluk, M. E.; Overton, E.

2002-01-01

Deep space probes and planetary exploration missions require electrical power management and control systems that are capable of efficient and reliable operation in very cold temperature environments. Typically, in deep space probes, heating elements are used to keep the spacecraft electronics near room temperature. The utilization of power electronics designed for and operated at low temperature will contribute to increasing efficiency and improving reliability of space power systems. At NASA Glenn Research Center, commercial-off-the-shelf devices as well as developed components are being investigated for potential use at low temperatures. These devices include semiconductor switching devices, magnetics, and capacitors. Integrated circuits such as digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being evaluated. In this paper, results will be presented for selected analog-to-digital converters, oscillators, DC/DC converters, and pulse width modulation (PWM) controllers.

High transconductance organic electrochemical transistors

PubMed Central

Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

2013-01-01

The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications. PMID:23851620

Turning Perspective in Photoelectrocatalytic Cells for Solar Fuels.

PubMed

Perathoner, Siglinda; Centi, Gabriele; Su, Dangsheng

2016-02-19

The development of new devices for the use and storage of solar energy is a key step to enable a new sustainable energy scenario. The route for direct solar-to-chemical energy transformation, especially to produce liquid fuels, represents a necessary element to realize transition from the actual energy infrastructure. Photoelectrocatalytic (PECa) devices for the production of solar fuels are a key element to enable this sustainable scenario. The development of PECa devices and related materials is of increasing scientific and applied interest. This concept paper introduces the need to turn the viewpoint of research in terms of PECa cell design and related materials with respect to mainstream activities in the field of artificial photosynthesis and leaves. As an example of a new possible direction, the concept of electrolyte-less cell design for PECa cells to produce solar fuels by reduction of CO2 is presented. The fundamental and applied development of new materials and electrodes for these cells should proceed fully integrated with PECa cell design and systematic analysis. A new possible approach to develop semiconductors with improved performances by using visible light is also shortly presented. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Narrow band gap amorphous silicon semiconductors

DOEpatents

Madan, A.; Mahan, A.H.

1985-01-10

Disclosed is a narrow band gap amorphous silicon semiconductor comprising an alloy of amorphous silicon and a band gap narrowing element selected from the group consisting of Sn, Ge, and Pb, with an electron donor dopant selected from the group consisting of P, As, Sb, Bi and N. The process for producing the narrow band gap amorphous silicon semiconductor comprises the steps of forming an alloy comprising amorphous silicon and at least one of the aforesaid band gap narrowing elements in amount sufficient to narrow the band gap of the silicon semiconductor alloy below that of amorphous silicon, and also utilizing sufficient amounts of the aforesaid electron donor dopant to maintain the amorphous silicon alloy as an n-type semiconductor.

Precise, Self-Limited Epitaxy of Ultrathin Organic Semiconductors and Heterojunctions Tailored by van der Waals Interactions.

PubMed

Wu, Bing; Zhao, Yinghe; Nan, Haiyan; Yang, Ziyi; Zhang, Yuhan; Zhao, Huijuan; He, Daowei; Jiang, Zonglin; Liu, Xiaolong; Li, Yun; Shi, Yi; Ni, Zhenhua; Wang, Jinlan; Xu, Jian-Bin; Wang, Xinran

2016-06-08

Precise assembly of semiconductor heterojunctions is the key to realize many optoelectronic devices. By exploiting the strong and tunable van der Waals (vdW) forces between graphene and organic small molecules, we demonstrate layer-by-layer epitaxy of ultrathin organic semiconductors and heterostructures with unprecedented precision with well-defined number of layers and self-limited characteristics. We further demonstrate organic p-n heterojunctions with molecularly flat interface, which exhibit excellent rectifying behavior and photovoltaic responses. The self-limited organic molecular beam epitaxy (SLOMBE) is generically applicable for many layered small-molecule semiconductors and may lead to advanced organic optoelectronic devices beyond bulk heterojunctions.

Microsensors based on GaN semiconductors covalently functionalized with luminescent Ru(II) complexes.

PubMed

López-Gejo, Juan; Arranz, Antonio; Navarro, Alvaro; Palacio, Carlos; Muñoz, Elías; Orellana, Guillermo

2010-02-17

Covalent tethering of a Ru(II) dye to gallium nitride surfaces has been accomplished as a key step in the development of innovative sensing devices in which the indicator support (semiconductor) plays the role of both support and excitation source. Luminescence emission decays and time-resolved emission spectra confirm the presence of the dye on the semiconductor surfaces, while X-ray photoelectron spectroscopy proves its covalent bonding. The O(2) sensitivity of the new device is comparable to those of other ruthenium-based sensor systems. This achievement paves the way to a new generation of integrable ultracompact microsensors that combine semiconductor emitter-probe assemblies.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, Bhushan L.

1995-01-01

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

Controlled growth of larger heterojunction interface area for organic photosensitive devices

DOEpatents

Yang, Fan [Somerset, NJ; Forrest, Stephen R [Ann Arbor, MI

2009-12-29

An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater than an underlying lateral cross-sectional area; depositing a second organic semiconductor material directly on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing a third organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; depositing a fourth organic semiconductor material on the third layer to form a continuous fourth layer, filling any exposed gaps and recesses in the first, second, and third layers; and depositing a second electrode on the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first and third organic semiconductor materials are both of a donor-type or an acceptor-type relative to second and fourth organic semiconductor materials, which are of the other material type.

VLSI (Very Large Scale Integrated Circuits) Device Reliability Models.

DTIC Science & Technology

1984-12-01

CIRCUIT COMPLEXITY FAILURE RATES FOR... A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: C1 AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR...A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: Cl AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR... A-41 LINEAR DEVICES IN...19 National Semiconductor 20 Nitron 21 Raytheon 22 Sprague 23 Synertek 24 Teledyne Crystalonics 25 TRW Semiconductor 26 Zilog The following companies

Whatever happened to silicon carbide. [semiconductor devices

NASA Technical Reports Server (NTRS)

Campbell, R. B.

1981-01-01

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Oxygen Impurities Link Bistability and Magnetoresistance in Organic Spin Valves.

PubMed

Bergenti, Ilaria; Borgatti, Francesco; Calbucci, Marco; Riminucci, Alberto; Cecchini, Raimondo; Graziosi, Patrizio; MacLaren, Donald A; Giglia, Angelo; Rueff, Jean Pascal; Céolin, Denis; Pasquali, Luca; Dediu, Valentin

2018-03-07

Vertical crossbar devices based on manganite and cobalt injecting electrodes and a metal-quinoline molecular transport layer are known to manifest both magnetoresistance (MR) and electrical bistability. The two effects are strongly interwoven, inspiring new device applications such as electrical control of the MR and magnetic modulation of bistability. To explain the device functionality, we identify the mechanism responsible for electrical switching by associating the electrical conductivity and the impedance behavior with the chemical states of buried layers obtained by in operando photoelectron spectroscopy. These measurements revealed that a significant fraction of oxygen ions migrate under voltage application, resulting in a modification of the electronic properties of the organic material and of the oxidation state of the interfacial layer with the ferromagnetic contacts. Variable oxygen doping of the organic molecules represents the key element for correlating bistability and MR, and our measurements provide the first experimental evidence in favor of the impurity-driven model describing the spin transport in organic semiconductors in similar devices.

Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.

PubMed

García de Arquer, F Pelayo; Konstantatos, Gerasimos

2015-06-01

Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.

Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices

DOEpatents

Horn, Kevin M.

2013-07-09

A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.

Progress in silicon carbide semiconductor technology

NASA Technical Reports Server (NTRS)

Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.

1992-01-01

Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.

Spatially Mapping Energy Transfer from Single Plasmonic Particles to Semiconductor Substrates via STEM/EELS.

PubMed

Li, Guoliang; Cherqui, Charles; Bigelow, Nicholas W; Duscher, Gerd; Straney, Patrick J; Millstone, Jill E; Masiello, David J; Camden, Jon P

2015-05-13

Energy transfer from plasmonic nanoparticles to semiconductors can expand the available spectrum of solar energy-harvesting devices. Here, we spatially and spectrally resolve the interaction between single Ag nanocubes with insulating and semiconducting substrates using electron energy-loss spectroscopy, electrodynamics simulations, and extended plasmon hybridization theory. Our results illustrate a new way to characterize plasmon-semiconductor energy transfer at the nanoscale and bear impact upon the design of next-generation solar energy-harvesting devices.

Programme and Abstracts. Workshop on Expert Evaluation and Control of Compound Semiconductor Materials and Technologies (1st) Held in Ecole Centrale De Lyon, France on 19 -22 May 1992. (EXAMTEC’ 92)

DTIC Science & Technology

1992-05-22

Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC󈨠) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major

Photovoltaic Device Including A Boron Doping Profile In An I-Type Layer

DOEpatents

Yang, Liyou

1993-10-26

A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.

Organic semiconductor crystals.

PubMed

Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping

2018-01-22

Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures.

PubMed

Yan, Xiao; Zhang, David Wei; Liu, Chunsen; Bao, Wenzhong; Wang, Shuiyuan; Ding, Shijin; Zheng, Gengfeng; Zhou, Peng

2018-04-01

2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field-effect transistors. However, 2DLM-based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS 2 /GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM-based integrated circuits based on amplifier circuits.

A fast low-power optical memory based on coupled micro-ring lasers

NASA Astrophysics Data System (ADS)

Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

2004-11-01

The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures

PubMed Central

Yan, Xiao; Zhang, David Wei; Liu, Chunsen; Bao, Wenzhong; Wang, Shuiyuan; Ding, Shijin; Zheng, Gengfeng

2018-01-01

Abstract 2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field‐effect transistors. However, 2DLM‐based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS2/GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM‐based integrated circuits based on amplifier circuits. PMID:29721428

Device having two optical ports for switching applications

DOEpatents

Rosen, Ayre; Stabile, Paul J.

1991-09-24

A two-sided light-activatable semiconductor switch device having an optical port on each side thereof. The semiconductor device may be a p-i-n diode or of bulk intrinsic material. A two ported p-i-n diode, reverse-biased to "off" by a 1.3 kV dc power supply, conducted 192 A when activated by two 1 kW laser diode arrays, one for each optical port.

Series resonance inverter with triggered vacuum gaps

NASA Astrophysics Data System (ADS)

Damstra, Geert C.; Zhang, X.

1994-05-01

Series resonance inverters based on semi-conductor switching elements are well-known and have a wide range of application, mainly for lower voltages. For high voltage application many switching elements have to be put in series to obtain sufficient blocking voltage. Voltage grinding and multiple gate control elements are needed. There is much experience with the triggered vacuum gaps as high voltage/high current single shot elements, for example in reignition circuits for synthetic circuit breaker tests. These elements have a blocking voltage of 50 - 100 kV and are triggerable by a light fiber control device. A prototype inverter has been developed that generates 0.1 Hz, 30 kV AC voltages with a flat top for tests on cables and capacitors of many micro farads fed from a low voltage supply of about 600 V. Only two TVG elements are needed to switch the resonant circuit alternatively on the positive or negative supply. The resonant circuit itself consists of the capacitance of the testobject and a high quality inductor that determines the frequency and the peak current of the voltage reversing process.

Implantable biomedical devices on bioresorbable substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A; Kim, Dae-Hyeong; Omenetto, Fiorenzo

Provided herein are implantable biomedical devices, methods of administering implantable biomedical devices, methods of making implantable biomedical devices, and methods of using implantable biomedical devices to actuate a target tissue or sense a parameter associated with the target tissue in a biological environment. Each implantable biomedical device comprises a bioresorbable substrate, an electronic device having a plurality of inorganic semiconductor components supported by the bioresorbable substrate, and a barrier layer encapsulating at least a portion of the inorganic semiconductor components. Upon contact with a biological environment the bioresorbable substrate is at least partially resorbed, thereby establishing conformal contact between themore » implantable biomedical device and the target tissue in the biological environment.« less

Defect Characterization, Imaging, and Control in Wide-Bandgap Semiconductors and Devices

NASA Astrophysics Data System (ADS)

Brillson, L. J.; Foster, G. M.; Cox, J.; Ruane, W. T.; Jarjour, A. B.; Gao, H.; von Wenckstern, H.; Grundmann, M.; Wang, B.; Look, D. C.; Hyland, A.; Allen, M. W.

2018-03-01

Wide-bandgap semiconductors are now leading the way to new physical phenomena and device applications at nanoscale dimensions. The impact of defects on the electronic properties of these materials increases as their size decreases, motivating new techniques to characterize and begin to control these electronic states. Leading these advances have been the semiconductors ZnO, GaN, and related materials. This paper highlights the importance of native point defects in these semiconductors and describes how a complement of spatially localized surface science and spectroscopy techniques in three dimensions can characterize, image, and begin to control these electronic states at the nanoscale. A combination of characterization techniques including depth-resolved cathodoluminescence spectroscopy, surface photovoltage spectroscopy, and hyperspectral imaging can describe the nature and distribution of defects at interfaces at both bulk and nanoscale surfaces, their metal interfaces, and inside nanostructures themselves. These features as well as temperature and mechanical strain inside wide-bandgap device structures at the nanoscale can be measured even while these devices are operating. These advanced capabilities enable several new directions for describing defects at the nanoscale, showing how they contribute to device degradation, and guiding growth processes to control them.

Thermal modeling of wide bandgap semiconductor devices for high frequency power converters

NASA Astrophysics Data System (ADS)

Sharath Sundar Ram, S.; Vijayakumari, A.

2018-02-01

The emergence of wide bandgap semiconductors has led to development of new generation semiconductor switches that are highly efficient and scalable. To exploit the advantages of GaNFETs in power converters, in terms of reduction in the size of heat sinks and filters, a thorough understanding of the thermal behavior of the device is essential. This paper aims to establish a thermal model for wideband gap semiconductor GaNFETs commercially available, which will enable power electronic designers to obtain the thermal characteristics of the device more effectively. The model parameters is obtained from the manufacturer’s data sheet by adopting an exponential curve fitting technique and the thermal model is validated using PSPICE simulations. The model was developed based on the parametric equivalence that exists between the thermal and electrical components, such that it responds for transient thermal stresses. A suitable power profile has been generated to evaluate the GaNFET model under different power dissipation scenarios. The results were compared with a Silicon MOSFETs to further highlight the advantages of the GaN devices. The proposed modeling approach can be extended for other GaN devices and can provide a platform for the thermal study and heat sink optimization.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures.

PubMed

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-10-27

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures.

Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.

PubMed

Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing

2015-01-28

The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures

PubMed Central

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-01-01

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures. PMID:28335321

Achieving Optimal Self-Adaptivity for Dynamic Tuning of Organic Semiconductors through Resonance Engineering.

PubMed

Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei

2016-08-03

Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.

Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics

PubMed Central

Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.

2014-01-01

Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322

Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

PubMed

Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

2016-11-09

Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

Resistive field structures for semiconductor devices and uses therof

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marinella, Matthew; DasGupta, Sandeepan; Kaplar, Robert

The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additionalmore » methods and architectures are described herein.« less

Electrical Characterization of Semiconductor Materials and Devices

NASA Astrophysics Data System (ADS)

Deen, M.; Pascal, Fabien

Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

Effective enhancement of hydrophilicity of solution indium zinc oxide-based thin-film transistors by oxygen plasma treatment of deposition layer surface

NASA Astrophysics Data System (ADS)

You, Hsin-Chiang; Wang, Yu-Chih

2016-06-01

In this paper, we describe the use of a simple and efficient sol-gel solution method for synthesizing indium zinc oxide (IZO) films for use as semiconductor channel layers in thin-film transistors (TFTs) on p-type silicon substrates. The performance of IZO-based TFTs was investigated, and the effect of oxygen plasma treatment on the surface of dielectric SiN x was observed. Oxygen plasma treatment effectively enhanced the electron mobility in IZO-based TFT devices from 0.005 to 1.56 cm2 V-1 s-1, an increase of more than 312 times, and effectively enhanced device performance. X-ray photoelectron spectroscopy analysis of the IZO film was performed to clarify element bonding.

Theoretical discovery of stable structures of group III-V monolayers: The materials for semiconductor devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suzuki, Tatsuo, E-mail: dr.tatsuosuzuki@gmail.com

Group III-V compounds are very important as the materials of semiconductor devices. Stable structures of the monolayers of group III-V binary compounds have been discovered by using first-principles calculations. The primitive unit cell of the discovered structures is a rectangle, which includes four group-III atoms and four group-V atoms. A group-III atom and its three nearest-neighbor group-V atoms are placed on the same plane; however, these connections are not the sp{sup 2} hybridization. The bond angles around the group-V atoms are less than the bond angle of sp{sup 3} hybridization. The discovered structure of GaP is an indirect transition semiconductor,more » while the discovered structures of GaAs, InP, and InAs are direct transition semiconductors. Therefore, the discovered structures of these compounds have the potential of the materials for semiconductor devices, for example, water splitting photocatalysts. The discovered structures may become the most stable structures of monolayers which consist of other materials.« less

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

Study on the photoresponse of amorphous In-Ga-Zn-O and zinc oxynitride semiconductor devices by the extraction of sub-gap-state distribution and device simulation.

PubMed

Jang, Jun Tae; Park, Jozeph; Ahn, Byung Du; Kim, Dong Myong; Choi, Sung-Jin; Kim, Hyun-Suk; Kim, Dae Hwan

2015-07-22

Persistent photoconduction (PPC) is a phenomenon that limits the application of oxide semiconductor thin-film transistors (TFTs) in optical sensor-embedded displays. In the present work, a study on zinc oxynitride (ZnON) semiconductor TFTs based on the combination of experimental results and device simulation is presented. Devices incorporating ZnON semiconductors exhibit negligible PPC effects compared with amorphous In-Ga-Zn-O (a-IGZO) TFTs, and the difference between the two types of materials are examined by monochromatic photonic C-V spectroscopy (MPCVS). The latter method allows the estimation of the density of subgap states in the semiconductor, which may account for the different behavior of ZnON and IGZO materials with respect to illumination and the associated PPC. In the case of a-IGZO TFTs, the oxygen flow rate during the sputter deposition of a-IGZO is found to influence the amount of PPC. Small oxygen flow rates result in pronounced PPC, and large densities of valence band tail (VBT) states are observed in the corresponding devices. This implies a dependence of PPC on the amount of oxygen vacancies (VO). On the other hand, ZnON has a smaller bandgap than a-IGZO and contains a smaller density of VBT states over the entire range of its bandgap energy. Here, the concept of activation energy window (AEW) is introduced to explain the occurrence of PPC effects by photoinduced electron doping, which is likely to be associated with the formation of peroxides in the semiconductor. The analytical methodology presented in this report accounts well for the reduction of PPC in ZnON TFTs, and provides a quantitative tool for the systematic development of phototransistors for optical sensor-embedded interactive displays.

High efficiency, low cost, thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

2001-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

1999-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2006-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2007-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Low temperature junction growth using hot-wire chemical vapor deposition

DOEpatents

Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa

2014-02-04

A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, Peter T.

1985-01-01

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer.

Semiconductors: In Situ Processing of Photovoltaic Devices

NASA Technical Reports Server (NTRS)

Curreri, Peter A.

1998-01-01

The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.

Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications

DTIC Science & Technology

2003-01-01

Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, B.L.

1995-07-04

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.

Photonic Switching Devices Using Light Bullets

NASA Technical Reports Server (NTRS)

Goorjian, Peter M. (Inventor)

1999-01-01

A unique ultra-fast, all-optical switching device or switch is made with readily available, relatively inexpensive, highly nonlinear optical materials. which includes highly nonlinear optical glasses, semiconductor crystals and/or multiple quantum well semiconductor materials. At the specified wavelengths. these optical materials have a sufficiently negative group velocity dispersion and high nonlinear index of refraction to support stable light bullets. The light bullets counter-propagate through, and interact within the waveguide to selectively change each others' directions of propagation into predetermined channels. In one embodiment, the switch utilizes a rectangularly planar slab waveguide. and further includes two central channels and a plurality of lateral channels for guiding the light bullets into and out of the waveguide. An advantage of the present all-optical switching device lies in its practical use of light bullets, thus preventing the degeneration of the pulses due to dispersion and diffraction at the front and back of the pulses. Another advantage of the switching device is the relative insensitivity of the collision process to the time difference in which the counter-propagating pulses enter the waveguide. since. contrary to conventional co-propagating spatial solitons, the relative phase of the colliding pulses does not affect the interaction of these pulses. Yet another feature of the present all-optical switching device is the selection of the light pulse parameters which enables the generation of light bullets in nonlinear optical materials. including highly nonlinear optical glasses and semiconductor materials such as semiconductor crystals and/or multiple quantum well semiconductor materials.

Functionalization of semiconductors for biosensing applications

NASA Astrophysics Data System (ADS)

Estephan, E.; Larroque, C.; Martineau, P.; Cloitre, T.; Gergely, Cs.

2007-05-01

Functionalization of semiconductors (SC) has been widely used for various electronic, photonic and biomedical applications. In this paper, we report on selective functionalization achieved by peptides that reveal specific recognition of the SC surfaces. A M13 bacteriophage library was used to screen 10 10 different 12-mer peptide on various SC substrates to successfully isolate after 3 cycles one specific peptide for the majority of semiconductors. Our results conclude that GaAs(100) and GaN(0001) retain the same sequence of 12-mer peptide, suggesting that the specificity does not depend on the crystallographic structure but it depends on the chemical composition and the electronegativity of the surface, thus on the orientation of the material. We also note the presence of at least one proline (Pro) amino acid in each peptide, and the presence of the histidine (His) in the specific peptides for the II-VI class SC. Pro imprints a constraint to the peptide to facilitate adhesion to the surface, whereas the basic side chain His is known for its affinity towards some of the elements of class II SC. Finally, fluorescence microscopy has been employed to demonstrate the preferential attachment of the peptide to their specific SC surface in close proximity to a surface of different chemical and structural composition. The use of selected peptides expressed by phage display can be extended to encompass a variety of nanostructured semiconductor based devices.

Metal-doped semiconductor nanoparticles and methods of synthesis thereof

NASA Technical Reports Server (NTRS)

Ren, Zhifeng (Inventor); Wang, Wenzhong (Inventor); Chen, Gang (Inventor); Dresselhaus, Mildred (Inventor); Poudel, Bed (Inventor); Kumar, Shankar (Inventor)

2009-01-01

The present invention generally relates to binary or higher order semiconductor nanoparticles doped with a metallic element, and thermoelectric compositions incorporating such nanoparticles. In one aspect, the present invention provides a thermoelectric composition comprising a plurality of nanoparticles each of which includes an alloy matrix formed of a Group IV element and Group VI element and a metallic dopant distributed within the matrix.

Metal-doped semiconductor nanoparticles and methods of synthesis thereof

DOEpatents

Ren, Zhifeng [Newton, MA; Chen, Gang [Carlisle, MA; Poudel, Bed [West Newton, MA; Kumar, Shankar [Newton, MA; Wang, Wenzhong [Beijing, CN; Dresselhaus, Mildred [Arlington, MA

2009-09-08

The present invention generally relates to binary or higher order semiconductor nanoparticles doped with a metallic element, and thermoelectric compositions incorporating such nanoparticles. In one aspect, the present invention provides a thermoelectric composition comprising a plurality of nanoparticles each of which includes an alloy matrix formed of a Group IV element and Group VI element and a metallic dopant distributed within the matrix.

Multi-physics analysis of hybrid graphene/semiconductor plasmonic terahertz sources (Conference Presentation)

NASA Astrophysics Data System (ADS)

Nafari, Mona; Aizin, Gregory R.; Jornet, Josep M.

2017-05-01

Wireless data rates have doubled every eighteen months for the last three decades. Following this trend, Terabit-per-second links will become a reality within the next five years. In this context, Terahertz (THz) band (0.1-10 THz) communication is envisioned as a key technology of the next decade. Despite major progress towards developing THz sources, compact signal generators above 1 THz able to efficiently work at room temperature are still missing. Recently, the use of hybrid graphene/semiconductor high-electron-mobility transistors (HEMT) has been proposed as a way to generate Surface Plasmon Polariton (SPP) waves at THz frequencies. Compact size, room-temperature operation and tunability of the graphene layer, in addition to possibility for large scale integration, motivate the exploration of this approach. In this paper, a simulation model of hybrid graphene/semiconductor HEMT-based THz sources is developed. More specifically, first, the necessary conditions for the so-called Dyakonov-Shur instability to arise within the HEMT channel are derived, and the impact of imperfect boundary conditions is analyzed. Second, the required conditions for coupling between a confined plasma wave in the HEMT channel and a SPP wave in graphene are derived, by starting from the coupling analysis between two 2DEG. Multi-physics simulation are conducted by integrating the hydrodynamic equations for the description of the HEMT device with Maxwell's equations for SPP modeling. Extensive results are provided to analyze the impact of different design elements on the THz signal source. This work will guide the experimental fabrication and characterization of the devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Dry etching method for compound semiconductors

DOEpatents

Shul, Randy J.; Constantine, Christopher

1997-01-01

A dry etching method. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators.

Dry etching method for compound semiconductors

DOEpatents

Shul, R.J.; Constantine, C.

1997-04-29

A dry etching method is disclosed. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators. 1 fig.

Mechanical Properties of Organic Semiconductors for Stretchable, Highly Flexible, and Mechanically Robust Electronics.

PubMed

Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J

2017-05-10

Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.

European Specialist Workshop on ’Active Microwave Semiconductor Devices’ (8th) Held at Maidenhead, Berks., UK on 4-6 May 1983.

DTIC Science & Technology

1983-05-06

wafers were annealed at either 7500C or 850 0C. Carrier concentration and mobility pro - files of the annealed samples were obtained by differential Hall...spite of a high value of the source resistance (2.30/mm). By applying the Fukui equation F = I + 2Cgs fK.R sR/ gmo , the K factor has been found to be...allowances during the design stage for the effects of parasitic elements. As such, phase shifters of this type represent a con - siderable challenge to the

Quantitative measuring system for combustible gas with audible tick rate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Batz, J.E.

1979-09-04

Northern Illinois Gas Co.'s new gas-detection instrument is lightweight, portable, easy to use, and in compliance with industry standards as an intrinsically safe device. The instrument uses a semiconductor gas-sensor element energyzed with the regulated voltage source. Placed in the atmosphere to be tested, the detector generates a signal representative of the concentration of natural gas in the air. A meter displays the signal to determine whether the area is hazardous; a variable-repetition-rate blocking oscillator feeding a speaker responds to the signal, generating an audible tick rate useful in locating a leak.

Slow-wave propagation on monolithic microwave integrated circuits with layered and non-layered structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tzuang, C.K.C.

1986-01-01

Various MMIC (monolithic microwave integrated circuit) planar waveguides have shown possible existence of a slow-wave propagation. In many practical applications of these slow-wave circuits, the semiconductor devices have nonuniform material properties that may affect the slow-wave propagation. In the first part of the dissertation, the effects of the nonuniform material properties are studied by a finite-element method. In addition, the transient pulse excitations of these slow-wave circuits also have great theoretical and practical interests. In the second part, the time-domain analysis of a slow-wave coplanar waveguide is presented.

Method for sputtering a PIN amorphous silicon semi-conductor device having partially crystallized P and N-layers

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-07-09

A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.

Semiconductor superlattice photodetectors

NASA Technical Reports Server (NTRS)

Chuang, S. L.; Hess, K.; Coleman, J. J.; Leburton, J. P.

1984-01-01

A superlattice photomultiplier and a photodetector based on the real space transfer mechanism were studied. The wavelength for the first device is of the order of a micron or flexible corresponding to the bandgap absorption in a semiconductor. The wavelength for the second device is in the micron range (about 2 to 12 microns) corresponding to the energy of the conduction band edge discontinuity between an Al/(sub x)Ga(sub 1-x)As and GaAs interface. Both devices are described.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Development of a Handmade Conductivity Measurement Device for a Thin-Film Semiconductor and Its Application to Polypyrrole

ERIC Educational Resources Information Center

Seng, Set; Shinpei, Tomita; Yoshihiko, Inada; Masakazu, Kita

2014-01-01

The precise measurement of conductivity of a semiconductor film such as polypyrrole (Ppy) should be carried out by the four-point probe method; however, this is difficult for classroom application. This article describes the development of a new, convenient, handmade conductivity device from inexpensive materials that can measure the conductivity…

Color selective photodetector and methods of making

DOEpatents

Walker, Brian J.; Dorn, August; Bulovic, Vladimir; Bawendi, Moungi G.

2013-03-19

A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.

Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-04-02

A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, P.T.

1985-03-05

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer. 5 figs.

JESD57 Test Standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation Revision Update

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2016-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.

Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography

NASA Astrophysics Data System (ADS)

Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.

2017-06-01

The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.

Recent progress in high-mobility thin-film transistors based on multilayer 2D materials

NASA Astrophysics Data System (ADS)

Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki

2017-04-01

Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.

Thermally robust semiconductor optical amplifiers and laser diodes

DOEpatents

Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

2002-01-01

A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, C.I.H.; Myers, D.R.; Vook, F.L.

1988-06-16

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.

1989-01-01

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Proton Nonionizing Energy Loss (NIEL) for Device Applications

NASA Technical Reports Server (NTRS)

Jun, Insoo; Xapsos, Michael A.; Messenger, Scott R.; Burke, Edward A.; Walters, Robert J.; Summers, Geoff; Jordan, Thomas

2003-01-01

Nonionizing energy loss (NIEL) is a quantity that describes the rate of energy loss due to atomic displacements as a particle traverses a material. The product of the NIEL and the particle fluence (time integrated flux) gives the displacement damage energy deposition per unit mass of material. NIEL plays the same role to the displacement damage energy deposition as the stopping power to the total ionizing dose (TID). The concept of NIEL has been very useful for correlating particle induced displacement damage effects in semiconductor and optical devices. Many studies have successfully demonstrated that the degradation of semiconductor devices or optical sensors in a radiation field can be linearly correlated to the displacement damage energy, and subsequently to the NIEL deposited in the semiconductor devices or optical sensors. In addition, the NIEL concept was also useful in the study of both Si and GaAs solar cells and of high temperature superconductors, and at predicting the survivability of detectors used at the LHC at CERN. On the other hand, there are some instances where discrepancies are observed in the application of NIEL, most notably in GaAs semiconductor devices. However, NIEL is still a valuable tool, and can be used to scale damages produced by different particles and in different environments, even though this is not understood at the microscopic level.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Excitons and the lifetime of organic semiconductor devices.

PubMed

Forrest, Stephen R

2015-06-28

While excitons are responsible for the many beneficial optical properties of organic semiconductors, their non-radiative recombination within the material can result in material degradation due to the dumping of energy onto localized molecular bonds. This presents a challenge in developing strategies to exploit the benefits of excitons without negatively impacting the device operational stability. Here, we will briefly review the fundamental mechanisms leading to excitonic energy-driven device ageing in two example devices: blue emitting electrophosphorescent organic light emitting devices (PHOLEDs) and organic photovoltaic (OPV) cells. We describe strategies used to minimize or even eliminate this fundamental device degradation pathway. © 2015 The Author(s) Published by the Royal Society. All rights reserved.

Resonant Tunneling Spin Pump

NASA Technical Reports Server (NTRS)

Ting, David Z.

2007-01-01

The resonant tunneling spin pump is a proposed semiconductor device that would generate spin-polarized electron currents. The resonant tunneling spin pump would be a purely electrical device in the sense that it would not contain any magnetic material and would not rely on an applied magnetic field. Also, unlike prior sources of spin-polarized electron currents, the proposed device would not depend on a source of circularly polarized light. The proposed semiconductor electron-spin filters would exploit the Rashba effect, which can induce energy splitting in what would otherwise be degenerate quantum states, caused by a spin-orbit interaction in conjunction with a structural-inversion asymmetry in the presence of interfacial electric fields in a semiconductor heterostructure. The magnitude of the energy split is proportional to the electron wave number. Theoretical studies have suggested the possibility of devices in which electron energy states would be split by the Rashba effect and spin-polarized currents would be extracted by resonant quantum-mechanical tunneling.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1984-02-24

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying functions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, Pavel; Gatti, Emilio

1987-01-01

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1987-08-18

A semiconductor charge transport device and method for making same are disclosed, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution. 16 figs.

High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector

PubMed Central

Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef

2013-01-01

One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598

Titanium-dioxide nanotube p-n homojunction diode

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Ding, Yuchen; Singh, Vivek; Nagpal, Prashant

2014-12-01

Application of semiconductors in functional optoelectronic devices requires precise control over their doping and formation of junction between p- and n-doped semiconductors. While doped thin films have led to several semiconductor devices, need for high-surface area nanostructured devices for photovoltaic, photoelectrochemical, and photocatalytic applications has been hindered by lack of desired doping in nanostructures. Here, we show titanium-dioxide (TiO2) nanotubes doped with nitrogen (N) and niobium (Nb) as acceptors and donors, respectively, and formation of TiO2 nanotubes p-n homojunction. This TiO2:N/TiO2:Nb homojunction showed distinct diode-like behaviour with rectification ratio of 1115 at ±5 V and exhibited good photoresponse for ultraviolet light (λ = 365 nm) with sensitivity of 0.19 A/W at reverse bias of -5 V. These results can have important implications for development of nanostructured metal-oxide solar-cells, photodiodes, LED's, photocatalysts, and photoelectrochemical devices.

Photo-reactive charge trapping memory based on lanthanide complex.

PubMed

Zhuang, Jiaqing; Lo, Wai-Sum; Zhou, Li; Sun, Qi-Jun; Chan, Chi-Fai; Zhou, Ye; Han, Su-Ting; Yan, Yan; Wong, Wing-Tak; Wong, Ka-Leung; Roy, V A L

2015-10-09

Traditional utilization of photo-induced excitons is popularly but restricted in the fields of photovoltaic devices as well as photodetectors, and efforts on broadening its function have always been attempted. However, rare reports are available on organic field effect transistor (OFET) memory employing photo-induced charges. Here, we demonstrate an OFET memory containing a novel organic lanthanide complex Eu(tta)3ppta (Eu(tta)3 = Europium(III) thenoyltrifluoroacetonate, ppta = 2-phenyl-4,6-bis(pyrazol-1-yl)-1,3,5-triazine), in which the photo-induced charges can be successfully trapped and detrapped. The luminescent complex emits intense red emission upon ultraviolet (UV) light excitation and serves as a trapping element of holes injected from the pentacene semiconductor layer. Memory window can be significantly enlarged by light-assisted programming and erasing procedures, during which the photo-induced excitons in the semiconductor layer are separated by voltage bias. The enhancement of memory window is attributed to the increasing number of photo-induced excitons by the UV light. The charges are stored in this luminescent complex for at least 10(4) s after withdrawing voltage bias. The present study on photo-assisted novel memory may motivate the research on a new type of light tunable charge trapping photo-reactive memory devices.

Photo-reactive charge trapping memory based on lanthanide complex

NASA Astrophysics Data System (ADS)

Zhuang, Jiaqing; Lo, Wai-Sum; Zhou, Li; Sun, Qi-Jun; Chan, Chi-Fai; Zhou, Ye; Han, Su-Ting; Yan, Yan; Wong, Wing-Tak; Wong, Ka-Leung; Roy, V. A. L.

2015-10-01

Traditional utilization of photo-induced excitons is popularly but restricted in the fields of photovoltaic devices as well as photodetectors, and efforts on broadening its function have always been attempted. However, rare reports are available on organic field effect transistor (OFET) memory employing photo-induced charges. Here, we demonstrate an OFET memory containing a novel organic lanthanide complex Eu(tta)3ppta (Eu(tta)3 = Europium(III) thenoyltrifluoroacetonate, ppta = 2-phenyl-4,6-bis(pyrazol-1-yl)-1,3,5-triazine), in which the photo-induced charges can be successfully trapped and detrapped. The luminescent complex emits intense red emission upon ultraviolet (UV) light excitation and serves as a trapping element of holes injected from the pentacene semiconductor layer. Memory window can be significantly enlarged by light-assisted programming and erasing procedures, during which the photo-induced excitons in the semiconductor layer are separated by voltage bias. The enhancement of memory window is attributed to the increasing number of photo-induced excitons by the UV light. The charges are stored in this luminescent complex for at least 104 s after withdrawing voltage bias. The present study on photo-assisted novel memory may motivate the research on a new type of light tunable charge trapping photo-reactive memory devices.

Semiconductor optoelectronic devices for free-space optical communications

NASA Technical Reports Server (NTRS)

Katz, J.

1983-01-01

The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

Tunable surface plasmon devices

DOEpatents

Shaner, Eric A [Rio Rancho, NM; Wasserman, Daniel [Lowell, MA

2011-08-30

A tunable extraordinary optical transmission (EOT) device wherein the tunability derives from controlled variation of the dielectric constant of a semiconducting material (semiconductor) in evanescent-field contact with a metallic array of sub-wavelength apertures. The surface plasmon resonance wavelength can be changed by changing the dielectric constant of the dielectric material. In embodiments of this invention, the dielectric material is a semiconducting material. The dielectric constant of the semiconducting material in the metal/semiconductor interfacial region is controllably adjusted by adjusting one or more of the semiconductor plasma frequency, the concentration and effective mass of free carriers, and the background high-frequency dielectric constant in the interfacial region. Thermal heating and/or voltage-gated carrier-concentration changes may be used to variably adjust the value of the semiconductor dielectric constant.

Screenable contact structure and method for semiconductor devices

DOEpatents

Ross, Bernd

1980-08-26

An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.

Large Bandgap Shrinkage from Doping and Dielectric Interface in Semiconducting Carbon Nanotubes

NASA Astrophysics Data System (ADS)

Comfort, Everett; Lee, Ji Ung

2016-06-01

The bandgap of a semiconductor is one of its most important electronic properties. It is often considered to be a fixed property of the semiconductor. As the dimensions of semiconductors reduce, however, many-body effects become dominant. Here, we show that doping and dielectric, two critical features of semiconductor device manufacturing, can dramatically shrink (renormalize) the bandgap. We demonstrate this in quasi-one-dimensional semiconducting carbon nanotubes. Specifically, we use a four-gated device, configured as a p-n diode, to investigate the fundamental electronic structure of individual, partially supported nanotubes of varying diameter. The four-gated construction allows us to combine both electrical and optical spectroscopic techniques to measure the bandgap over a wide doping range.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, B.L.

1999-04-27

A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.

Estimation of carrier mobility and charge behaviors of organic semiconductor films in metal-insulator-semiconductor diodes consisting of high-k oxide/organic semiconductor double layers

NASA Astrophysics Data System (ADS)

Chosei, Naoya; Itoh, Eiji

2018-02-01

We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.

Measurement and Modeling of Blocking Contacts for Cadmium Telluride Gamma Ray Detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Beck, Patrick R.

2010-01-07

Gamma ray detectors are important in national security applications, medicine, and astronomy. Semiconductor materials with high density and atomic number, such as Cadmium Telluride (CdTe), offer a small device footprint, but their performance is limited by noise at room temperature; however, improved device design can decrease detector noise by reducing leakage current. This thesis characterizes and models two unique Schottky devices: one with an argon ion sputter etch before Schottky contact deposition and one without. Analysis of current versus voltage characteristics shows that thermionic emission alone does not describe these devices. This analysis points to reverse bias generation current ormore » leakage through an inhomogeneous barrier. Modeling the devices in reverse bias with thermionic field emission and a leaky Schottky barrier yields good agreement with measurements. Also numerical modeling with a finite-element physics-based simulator suggests that reverse bias current is a combination of thermionic emission and generation. This thesis proposes further experiments to determine the correct model for reverse bias conduction. Understanding conduction mechanisms in these devices will help develop more reproducible contacts, reduce leakage current, and ultimately improve detector performance.« less

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Evaluation of Intrinsic Charge Carrier Transport at Insulator-Semiconductor Interfaces Probed by a Non-Contact Microwave-Based Technique

PubMed Central

Honsho, Yoshihito; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Seki, Shu

2013-01-01

We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified. PMID:24212382

Center for Semiconductor Materials and Device Modeling: expanding collaborative research opportunities between government, academia, and industry

NASA Astrophysics Data System (ADS)

Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

2016-09-01

To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.

76 FR 65751 - Notice of intent to grant exclusive license

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-24

... Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal,'' U.S. Patent Application No. 12/254,134 entitled ``Hybrid Bandgap Engineering for Super-Hetero- Epitaxial Semiconductor Materials... Semiconductor Materials on Trigonal Substrate with Single Crystal Properties and Devices Based on Such Materials...

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, A.J.; Montague, S.; Sniegowski, J.J.; Smith, J.H.; McWhorter, P.J.

1998-07-21

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, Anthony J.; Montague, Stephen; Sniegowski, Jeffry J.; Smith, James H.; McWhorter, Paul J.

1998-01-01

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.

A review of the physics and response models for burnout of semiconductor devices

NASA Astrophysics Data System (ADS)

Orvis, W. J.; Khanaka, G. H.; Yee, J. H.

1984-12-01

Physical mechanisms that cause semiconductor devices to fail from electrical overstress--particularly, EMP-induced electrical stress--are described in light of the current literature and the authors' own research. A major concern is the cause and effects of second breakdown phenomena in p-n junction devices. Models of failure thresholds are evaluated for their inherent errors and for their ability to represent the relevant physics. Finally, the response models that relate electromagnetic stress parameters to appropriate failure-threshold parameters are discussed.

Towards bioelectronic logic (Conference Presentation)

NASA Astrophysics Data System (ADS)

Meredith, Paul; Mostert, Bernard; Sheliakina, Margarita; Carrad, Damon J.; Micolich, Adam P.

2016-09-01

One of the critical tasks in realising a bioelectronic interface is the transduction of ion and electron signals at high fidelity, and with appropriate speed, bandwidth and signal-to-noise ratio [1]. This is a challenging task considering ions and electrons (or holes) have drastically different physics. For example, even the lightest ions (protons) have mobilities much smaller than electrons in the best semiconductors, effective masses are quite different, and at the most basic level, ions are `classical' entities and electrons `quantum mechanical'. These considerations dictate materials and device strategies for bioelectronic interfaces alongside practical aspects such as integration and biocompatibility [2]. In my talk I will detail these `differences in physics' that are pertinent to the ion-electron transduction challenge. From this analysis, I will summarise the basic categories of device architecture that are possibilities for transducing elements and give recent examples of their realisation. Ultimately, transducing elements need to be combined to create `bioelectronic logic' capable of signal processing at the interface level. In this regard, I will extend the discussion past the single element concept, and discuss our recent progress in delivering all-solids-state logic circuits based upon transducing interfaces. [1] "Ion bipolar junction transistors", K. Tybrandt, K.C. Larsson, A. Richter-Dahlfors and M. Berggren, Proc. Natl Acad. Sci., 107, 9929 (2010). [2] "Electronic and optoelectronic materials and devices inspired by nature", P Meredith, C.J. Bettinger, M. Irimia-Vladu, A.B. Mostert and P.E. Schwenn, Reports on Progress in Physics, 76, 034501 (2013).

Comprehensive mass spectrometric analysis of novel organic semiconductor molecules

NASA Astrophysics Data System (ADS)

Prada, Svitlana

This work presents a comprehensive mass spectrometry (MS) study of novel organic semiconductor molecules including ion mobility/reactivity measurements and trace elemental analysis. The organic molecules investigated here are important semiconductor materials for molecular electronic devices such as Organic Field-Effect Transistors (OFETs) and Light Emitted Diodes (LED). A high-performance orthogonal time-of flight mass spectrometer (TOF-MS) in combination with a matrix assisted laser desorption/ionization (MALDI) source operating at elevated pressure was used to perform MALDI/TOF analyses of pentacene and some of its derivatives with and without an added matrix. The observation of ion-molecule reactions between "cold" analyte ions and neutral analyte molecules in the gas phase has provided some insight into the mechanism of pentacene cluster formation and its functionalized derivatives. Furthermore, some of the matrices employed to assist the desorption/ionization process of these compounds were observed to influence the outcome via ion-molecule reactions of analyte ions and matrix molecules in the gas phase. The stability and reactivity of the compounds and their clusters in the MALDI plume during gas-phase expansion were evaluated; possible structures of the resulting clusters are discussed. The MALDI/TOF technique was also helpful in distinguishing between two isomeric forms of bis-[(triisopropylsilyl)-ethynyl]-pentacene. Furthermore, we reported ion mobility measurements of functionalized pentacene ions with a modified triple quadrupole mass spectrometer fitted with an ion molecule reactor (IMR). The IMR is equipped with a variable axial electrostatic drift field (ADF) and is able to trap ions for a prolong period of time. These capabilities were successfully employed in the measurement of ion mobilities in different modes of the IMR operation. Theoretical modeling of the drift dynamics and the special localization of the large ion packet was successfully implemented. The contribution of the quadrupole RF field to the drift dynamics also was taken into consideration. The IMR was successfully employed in the ion-molecule reactions study of four functionalized pentacene derivatives such as TIPS, o-TIPS, 6,13-bis-[(triisopropylsilyl)-ethynyl]-pentacene-2,3-dicarbonitrile (TIPS(CN)2), and 6,13-bis-[(triisopropylsilyl)-ethynyl]-pentacene-2,3,9,10-tetracarbonitrile (TIPS(CN)4). Details of the IMR operation in this mode are extensively discussed. The purity of the starting material is one of the most important parameters for the fabrication of a molecular electronic device. We report the method of determination of trace elemental impurities (Li, Na, Al, Mg, Be, Pb, Mn, Co, Ti, Sn, Cu, Cr, V, Zn, Fe, Ca, K and Ni) in organic semiconductor materials, such as Tetracene, Anthracene, Pentacene, TIPS and Rubrene, using an inductively coupled plasma quadrupole mass spectrometer (ICP-MS) fitted with a dynamic reaction cell (DRC). The determination of Fe, Ca, K and Ni in the organic semiconductor materials was carried out using NH3 as a reaction gas in the DRC mode to obviate the effect of polyatomic isobaric interferences. The other trace elements such as Li, Na, Al, Mg, Be, Pb, Mn, Co, Ti, Sn, Cu, Cr, V and Zn have been determined under standard operating conditions.

Advanced applications of scatterometry based optical metrology

NASA Astrophysics Data System (ADS)

Dixit, Dhairya; Keller, Nick; Kagalwala, Taher; Recchia, Fiona; Lifshitz, Yevgeny; Elia, Alexander; Todi, Vinit; Fronheiser, Jody; Vaid, Alok

2017-03-01

The semiconductor industry continues to drive patterning solutions that enable devices with higher memory storage capacity, faster computing performance, and lower cost per transistor. These developments in the field of semiconductor manufacturing along with the overall minimization of the size of transistors require continuous development of metrology tools used for characterization of these complex 3D device architectures. Optical scatterometry or optical critical dimension (OCD) is one of the most prevalent inline metrology techniques in semiconductor manufacturing because it is a quick, precise and non-destructive metrology technique. However, at present OCD is predominantly used to measure the feature dimensions such as line-width, height, side-wall angle, etc. of the patterned nano structures. Use of optical scatterometry for characterizing defects such as pitch-walking, overlay, line edge roughness, etc. is fairly limited. Inspection of process induced abnormalities is a fundamental part of process yield improvement. It provides process engineers with important information about process errors, and consequently helps optimize materials and process parameters. Scatterometry is an averaging technique and extending it to measure the position of local process induced defectivity and feature-to-feature variation is extremely challenging. This report is an overview of applications and benefits of using optical scatterometry for characterizing defects such as pitch-walking, overlay and fin bending for advanced technology nodes beyond 7nm. Currently, the optical scatterometry is based on conventional spectroscopic ellipsometry and spectroscopic reflectometry measurements, but generalized ellipsometry or Mueller matrix spectroscopic ellipsometry data provides important, additional information about complex structures that exhibit anisotropy and depolarization effects. In addition the symmetry-antisymmetry properties associated with Mueller matrix (MM) elements provide an excellent means of measuring asymmetry present in the structure. The useful additional information as well as symmetry-antisymmetry properties of MM elements is used to characterize fin bending, overlay defects and design improvements in the OCD test structures are used to boost OCDs' sensitivity to pitch-walking. In addition, the validity of the OCD based results is established by comparing the results to the top down critical dimensionscanning electron microscope (CD-SEM) and cross-sectional transmission electron microscope (TEM) images.

Doping of epitaxial III-V semiconductors for optoelectronic and magnetoelectronic applications

NASA Astrophysics Data System (ADS)

Overberg, Mark Eddy

Doped III-V semiconducting materials were studied in this dissertation for use in optoelectronic and magnetoelectronic applications. The specific areas of use are emitters for fiber optic communication and room temperature ferromagnetic layers for spintronic devices. The general requirement for both application areas is the ability to heavily dope (or alloy) the III-Vs with the intended active element, while still maintaining good crystallinity and semiconducting properties. Four dopant/semiconductor systems were investigated: erbium in gallium nitride (GaN:Er), europium in gallium nitride (GaN:Eu), manganese in gallium nitride (GaMnN), and manganese in gallium phosphide (GaMnP). These materials were fabricated using variants of the molecular beam epitaxy (MBE) technique, where beams of the constituent elements are produced in a high vacuum environment. The technique allows for a wide variety of parameters to be adjusted during the material preparation. The materials were deposited on sapphire, gallium nitride, and gallium phosphide surfaces; with particular emphasis on the correlation between growth conditions and the final chemical, structural, morphological, electronic, optical, and magnetic properties. The materials were characterized using a variety of techniques. Results with the GaN:Er material indicated that several percent of Er could be successfully incorporated into the material, and that the optical emission could be increased by incorporating C impurities into the film. These impurities were found to increase the overall emission and decrease the quenching of the emission with temperature. Optical emission results for GaN:Eu indicated that this material produced a visible red emission that was brighter under optical excitation than the AlGaAs used in commercial red emitting devices. The dilute magnetic semiconductors n-GaMnN and p-GaMnP were produced for the first time by the MBE technique. The SQUID magnetometry and magnetotransport results for n-GaMnN indicated the presence of ferromagnetic ordering with a Curie temperature between 20 K and 25 K. Magnetic measurements of the p-GaMnP indicated the presence of ferromagnetic ordering to 250 K, far above the theoretically predicted value of 100 K. Similar results were also produced by the direct implantation of Mn into GaP.

Technology modules from micro- and nano-electronics for the life sciences.

PubMed

Birkholz, M; Mai, A; Wenger, C; Meliani, C; Scholz, R

2016-05-01

The capabilities of modern semiconductor manufacturing offer remarkable possibilities to be applied in life science research as well as for its commercialization. In this review, the technology modules available in micro- and nano-electronics are exemplarily presented for the case of 250 and 130 nm technology nodes. Preparation procedures and the different transistor types as available in complementary metal-oxide-silicon devices (CMOS) and BipolarCMOS (BiCMOS) technologies are introduced as key elements of comprehensive chip architectures. Techniques for circuit design and the elements of completely integrated bioelectronics systems are outlined. The possibility for life scientists to make use of these technology modules for their research and development projects via so-called multi-project wafer services is emphasized. Various examples from diverse fields such as (1) immobilization of biomolecules and cells on semiconductor surfaces, (2) biosensors operating by different principles such as affinity viscosimetry, impedance spectroscopy, and dielectrophoresis, (3) complete systems for human body implants and monitors for bioreactors, and (4) the combination of microelectronics with microfluidics either by chip-in-polymer integration as well as Si-based microfluidics are demonstrated from joint developments with partners from biotechnology and medicine. WIREs Nanomed Nanobiotechnol 2016, 8:355-377. doi: 10.1002/wnan.1367 For further resources related to this article, please visit the WIREs website. © 2015 Wiley Periodicals, Inc.

Reactively-sputtered zinc semiconductor films of high conductivity for heterojunction devices

NASA Technical Reports Server (NTRS)

Stirn, Richard J. (Inventor)

1986-01-01

A high conductivity, n-doped semiconductor film is produced from zinc, or Zn and Cd, and group VI elements selected from Se, S and Te in a reactive magnetron sputtering system having a chamber with one or two targets, a substrate holder, means for heating the substrate holder, and an electric field for ionizing gases in the chamber. Zinc or a compound of Zn and Cd is placed in the position of one of the two targets and doping material in the position of the other of the two targets. Zn and Cd may be placed in separate targets while a dopant is placed in the third target. Another possibility is to place an alloy of Zn and dopant, or Zn, Cd and dopant in one target, thus using only one target. A flow of the inert gas is ionized and directed toward said targets, while a flow of a reactant gas consisting of hydrides of the group VI elements is directed toward a substrate on the holder. The targets are biased to attract negatively ionized inert gas. The desired stochiometry for high conductivity is achieved by controlling the temperature of the substrate, and partial pressures of the gases, and the target power and total pressure of the gases in the chamber.

Single MoO3 nanoribbon waveguides: good building blocks as elements and interconnects for nanophotonic applications

NASA Astrophysics Data System (ADS)

Zhang, Li; Wu, Guoqing; Gu, Fuxing; Zeng, Heping

2015-11-01

Exploring new nanowaveguide materials and structures is of great scientific interest and technological significance for optical and photonic applications. In this work, high-quality single-crystal MoO3 nanoribbons (NRs) are synthesized and used for optical guiding. External light sources are efficiently launched into the single MoO3 NRs using silica fiber tapers. It is found that single MoO3 NRs are as good nanowaveguides with loss optical losses (typically less than 0.1 dB/μm) and broadband optical guiding in the visible/near-infrared region. Single MoO3 NRs have good Raman gains that are comparable to those of semiconductor nanowaveguides, but the second harmonic generation efficiencies are about 4 orders less than those of semiconductor nanowaveguides. And also no any third-order nonlinear optical effects are observed at high pump power. A hybrid Fabry-Pérot cavity containing an active CdSe nanowire and a passive MoO3 NR is also demonstrated, and the ability of coupling light from other active nanostructures and fluorescent liquid solutions has been further demonstrated. These optical properties make single MoO3 NRs attractive building blocks as elements and interconnects in miniaturized photonic circuitries and devices.

Integrated three-dimensional module heat exchanger for power electronics cooling

DOEpatents

Bennion, Kevin; Lustbader, Jason

2013-09-24

Embodiments discussed herein are directed to a power semiconductor packaging that removes heat from a semiconductor package through one or more cooling zones that are located in a laterally oriented position with respect to the semiconductor package. Additional embodiments are directed to circuit elements that are constructed from one or more modular power semiconductor packages.

Bi-Se doped with Cu, p-type semiconductor

DOEpatents

Bhattacharya, Raghu Nath; Phok, Sovannary; Parilla, Philip Anthony

2013-08-20

A Bi--Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.

Doping-Induced Interband Gain in InAs/AlSb Quantum Wells

NASA Technical Reports Server (NTRS)

Kolokolov, K. I.; Ning, C. Z.

2005-01-01

A paper describes a computational study of effects of doping in a quantum well (QW) comprising a 10-nm-thick layer of InAs sandwiched between two 21-nm-thick AlSb layers. Heretofore, InAs/AlSb QWs have not been useful as interband gain devices because they have type-II energy-band-edge alignment, which causes spatial separation of electrons and holes, thereby leading to weak interband dipole matrix elements. In the doping schemes studied, an interior sublayer of each AlSb layer was doped at various total areal densities up to 5 X 10(exp 12) / square cm. It was found that (1) proper doping converts the InAs layer from a barrier to a well for holes, thereby converting the heterostructure from type II to type I; (2) the resultant dipole matrix elements and interband gains are comparable to those of typical type-I heterostructures; and (3) dipole moments and optical gain increase with the doping level. Optical gains in the transverse magnetic mode can be almost ten times those of other semiconductor material systems in devices used to generate medium-wavelength infrared (MWIR) radiation. Hence, doped InAs/AlSb QWs could be the basis of an alternative material system for devices to generate MWIR radiation.

Single-mode very wide tunability in laterally coupled semiconductor lasers with electrically controlled reflectivities

NASA Astrophysics Data System (ADS)

Griffel, Giora; Chen, Howard Z.; Grave, Ilan; Yariv, Amnon

1991-04-01

The operation of a novel multisection structure comprised of laterally coupled gain-guided semiconductor lasers is demonstrated. It is shown that tunable single longitudinal mode operation can be achieved with a high degree of frequency selectivity. The device has a tuning range of 14.5 nm, the widest observed to date in a monolithic device.

Total-dose radiation effects data for semiconductor devices (1989 supplement)

NASA Technical Reports Server (NTRS)

Martin, Keith E.; Coss, James R.; Goben, Charles A.; Shaw, David C.; Farmanesh, Sam; Davarpanah, Michael M.; Craft, Leroy H.; Price, William E.

1990-01-01

Steady state, total dose radiation test data are provided for electronic designers and other personnel using semiconductor devices in a radiation environment. The data are presented in graphic and narrative formats. Two primary radiation source types were used: Cobalt-60 gamma rays and a Dynamitron electron accelerator capable of delivering 2.5 MeV electrons at a steady rate.

Voyager electronic parts radiation program, volume 1

NASA Technical Reports Server (NTRS)

Stanley, A. G.; Martin, K. E.; Price, W. E.

1977-01-01

The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.

Improvement of screening methods for silicon planar semiconductor devices

NASA Technical Reports Server (NTRS)

Berger, W. M.

1972-01-01

The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Tuning charge carrier transport and optical birefringence in liquid-crystalline thin films: A new design space for organic light-emitting diodes.

PubMed

Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn

2018-01-15

Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.

Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.

PubMed

Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen

2017-04-12

Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.

Dismantling and chemical characterization of spent Peltier thermoelectric devices for antimony, bismuth and tellurium recovery.

PubMed

Balva, Maxime; Legeai, Sophie; Garoux, Laetitia; Leclerc, Nathalie; Meux, Eric

2017-04-01

Major uses of thermoelectricity concern refrigeration purposes, using Peltier devices, mainly composed of antimony, bismuth and tellurium. Antimony was identified as a critical raw material by EU and resources of bismuth and tellurium are not inexhaustible, so it is necessary to imagine the recycling of thermoelectric devices. That for, a complete characterization is needed, which is the aim of this work. Peltier devices were manually dismantled in three parts: the thermoelectric legs, the alumina plates on which remain the electrical contacts and the silicone paste used to connect the plates. The characterization was performed using five Peltier devices. It includes mass balances of the components, X-ray diffraction analysis of the thermoelectric legs and elemental analysis of each part of the device. It appears that alumina represents 45% of a Peltier device in weight. The electrical contacts are mainly composed of copper and tin, and the thermoelectric legs of bismuth, tellurium and antimony. Thermoelectric legs appear to be Se-doped Bi 2 Te 3 and (Bi 0,5 Sb 1,5 )Te 3 for n type and p type semiconductors, respectively. This work shows that Peltier devices can be considered as a copper ore and that thermoelectric legs contain high amounts of bismuth, tellurium and antimony compared to their traditional resources.

Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

2017-12-01

Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.