NASA Technical Reports Server (NTRS)
Keymeulen, D.; Klimeck, G.; Zebulum, R.; Stoica, A.; Jin, Y.; Lazaro, C.
2000-01-01
This paper describes the EHW development system, a tool that performs the evolutionary synthesis of electronic circuits, using the SPICE simulator and the Field Programmable Transistor Array hardware (FPTA) developed at JPL.
Rapid evolution of analog circuits configured on a field programmable transistor array
NASA Technical Reports Server (NTRS)
Stoica, A.; Ferguson, M. I.; Zebulum, R. S.; Keymeulen, D.; Duong, V.; Daud, T.
2002-01-01
The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.
Electrically Erasable Programmable Integrated Circuits for Replacement of Obsolete TTL Logic
1991-12-01
different discrete devices" [7]. Fowler-Nordheim Tunneling Simplified Theory. Electrons in polysilicon are usually prevented from entering SiO 2 by an...overcomes the energy barrier, the tunneling electrons will not return to the polysilicon but will be carried by the electric field, causing a current to flow...Floating Gate Transistors A floating gate transistor is an insulated-gate field effect transistor (FET) that has a gate, usually made of polysilicon , which
Pruttivarasin, Thaned; Katori, Hidetoshi
2015-11-01
We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.
Evolutionary Multiobjective Design Targeting a Field Programmable Transistor Array
NASA Technical Reports Server (NTRS)
Aguirre, Arturo Hernandez; Zebulum, Ricardo S.; Coello, Carlos Coello
2004-01-01
This paper introduces the ISPAES algorithm for circuit design targeting a Field Programmable Transistor Array (FPTA). The use of evolutionary algorithms is common in circuit design problems, where a single fitness function drives the evolution process. Frequently, the design problem is subject to several goals or operating constraints, thus, designing a suitable fitness function catching all requirements becomes an issue. Such a problem is amenable for multi-objective optimization, however, evolutionary algorithms lack an inherent mechanism for constraint handling. This paper introduces ISPAES, an evolutionary optimization algorithm enhanced with a constraint handling technique. Several design problems targeting a FPTA show the potential of our approach.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Pruttivarasin, Thaned, E-mail: thaned.pruttivarasin@riken.jp; Katori, Hidetoshi; Innovative Space-Time Project, ERATO, JST, Bunkyo-ku, Tokyo 113-8656
We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.
G4-FETs as Universal and Programmable Logic Gates
NASA Technical Reports Server (NTRS)
Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin
2007-01-01
An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.
NASA Astrophysics Data System (ADS)
Horowitz, Paul; Hill, Winfield
2015-04-01
1. Foundations; 2. Bipolar transistors; 3. Field effect transistors; 4. Operational amplifiers; 5. Precision circuits; 6. Filters; 7. Oscillators and timers; 8. Low noise techniques and transimpedance; 9. Power regulation; 10. Digital electronics; 11. Programmable logic devices; 12. Logical interfacing; 13. Digital meets analog; 14. Computers, controllers, and data links; 15. Microcontrollers.
Efficient Multiplexer FPGA Block Structures Based on G4FETs
NASA Technical Reports Server (NTRS)
Vatan, Farrokh; Fijany, Amir
2009-01-01
Generic structures have been conceived for multiplexer blocks to be implemented in field-programmable gate arrays (FPGAs) based on four-gate field-effect transistors (G(sup 4)FETs). This concept is a contribution to the continuing development of digital logic circuits based on G4FETs and serves as a further demonstration that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. Results in this line of development at earlier stages were summarized in two previous NASA Tech Briefs articles: "G(sup 4)FETs as Universal and Programmable Logic Gates" (NPO-41698), Vol. 31, No. 7 (July 2007), page 44, and "Efficient G4FET-Based Logic Circuits" (NPO-44407), Vol. 32, No. 1 ( January 2008), page 38 . As described in the first-mentioned previous article, a G4FET can be made to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer components than are required for conventional transistor-based circuits performing the same logic functions. The second-mentioned previous article reported results of a comparative study of NOT-majority-gate (G(sup 4)FET)-based logic-circuit designs and equivalent NOR- and NAND-gate-based designs utilizing conventional transistors. [NOT gates (inverters) were also included, as needed, in both the G(sup 4)FET- and the NOR- and NAND-based designs.] In most of the cases studied, fewer logic gates (and, hence, fewer transistors), were required in the G(sup 4)FET-based designs. There are two popular categories of FPGA block structures or architectures: one based on multiplexers, the other based on lookup tables. In standard multiplexer- based architectures, the basic building block is a tree-like configuration of multiplexers, with possibly a few additional logic gates such as ANDs or ORs. Interconnections are realized by means of programmable switches that may connect the input terminals of a block to output terminals of other blocks, may bridge together some of the inputs, or may connect some of the input terminals to signal sources representing constant logical levels 0 or 1. The left part of the figure depicts a four-to-one G(sup 4)FET-based multiplexer tree; the right part of the figure depicts a functionally equivalent four-to-one multiplexer based on conventional transistors. The G(sup 4)FET version would contains 54 transistors; the conventional version contains 70 transistors.
Giusi, G; Giordano, O; Scandurra, G; Rapisarda, M; Calvi, S; Ciofi, C
2016-04-01
Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz(1/2), while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Giusi, G.; Giordano, O.; Scandurra, G.
Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz{sup 1/2}, while DC performances are limited only bymore » the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.« less
Evolution of Analog Circuits on Field Programmable Transistor Arrays
NASA Technical Reports Server (NTRS)
Stoica, A.; Keymeulen, D.; Zebulum, R.; Thakoor, A.; Daud, T.; Klimeck, G.; Jin, Y.; Tawel, R.; Duong, V.
2000-01-01
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing also a set of selected applications.
Jung, Soon-Won; Na, Bock Soon; Park, Chan Woo; Koo, Jae Bon
2014-11-01
We demonstrate an organic one-time programmable memory cell formed entirely at plastic-compatible temperatures. All the processes are performed at below 130 degrees C. Our memory cell consists of a printed organic transistor and an organic capacitor. Inkjet-printed organic transistors are fabricated by using high-k polymer dielectric blends comprising poly(vinylidenefluoride-trifluoroethylene) [P(VDF-TrFE)] and poly(methyl methacrylate) (PMMA) for low-voltage operation. P(NDI2OD-T2) transistors have a high field-effect mobility of 0.2 cm2/Vs and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE):PMMA blended film. The data in the memory cell are programmed by electrically breaking the organic capacitor. The organic capacitor acts like an antifuse capacitor, because it is initially open, and it becomes permanently short-circuited by applying a high voltage. The organic memory cells are programmed with 4 V, and they are read out with 2 V. The memory data are read out by sensing the current in the memory cell. The printed organic one-time programmable memory is suitable for applications storing small amount of data, such as low-cost radio-frequency identification (RFID) tag.
Kalinin, Stanislav; Kühnemuth, Ralf; Vardanyan, Hayk; Seidel, Claus A M
2012-09-01
We present a fast hardware photon correlator implemented in a field-programmable gate array (FPGA) combined with a compact confocal fluorescence setup. The correlator has two independent units with a time resolution of 4 ns while utilizing less than 15% of a low-end FPGA. The device directly accepts transistor-transistor logic (TTL) signals from two photon counting detectors and calculates two auto- or cross-correlation curves in real time. Test measurements demonstrate that the performance of our correlator is comparable with the current generation of commercial devices. The sensitivity of the optical setup is identical or even superior to current commercial devices. The FPGA design and the optical setup both allow for a straightforward extension to multi-color applications. This inexpensive and compact solution with a very good performance can serve as a versatile platform for uses in education, applied sciences, and basic research.
NASA Astrophysics Data System (ADS)
Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin
2018-04-01
In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.
NASA Astrophysics Data System (ADS)
Kalinin, Stanislav; Kühnemuth, Ralf; Vardanyan, Hayk; Seidel, Claus A. M.
2012-09-01
We present a fast hardware photon correlator implemented in a field-programmable gate array (FPGA) combined with a compact confocal fluorescence setup. The correlator has two independent units with a time resolution of 4 ns while utilizing less than 15% of a low-end FPGA. The device directly accepts transistor-transistor logic (TTL) signals from two photon counting detectors and calculates two auto- or cross-correlation curves in real time. Test measurements demonstrate that the performance of our correlator is comparable with the current generation of commercial devices. The sensitivity of the optical setup is identical or even superior to current commercial devices. The FPGA design and the optical setup both allow for a straightforward extension to multi-color applications. This inexpensive and compact solution with a very good performance can serve as a versatile platform for uses in education, applied sciences, and basic research.
G(sup 4)FET Implementations of Some Logic Circuits
NASA Technical Reports Server (NTRS)
Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan
2009-01-01
Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET
Efficient G(sup 4)FET-Based Logic Circuits
NASA Technical Reports Server (NTRS)
Vatan, Farrokh
2008-01-01
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.
Programmable, automated transistor test system
NASA Technical Reports Server (NTRS)
Truong, L. V.; Sundburg, G. R.
1986-01-01
A programmable, automated transistor test system was built to supply experimental data on new and advanced power semiconductors. The data will be used for analytical models and by engineers in designing space and aircraft electric power systems. A pulsed power technique was used at low duty cycles in a nondestructive test to examine the dynamic switching characteristic curves of power transistors in the 500 to 1000 V, 10 to 100 A range. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software.
Performance characteristics of a nanoscale double-gate reconfigurable array
NASA Astrophysics Data System (ADS)
Beckett, Paul
2008-12-01
The double gate transistor is a promising device applicable to deep sub-micron design due to its inherent resistance to short-channel effects and superior subthreshold performance. Using both TCAD and SPICE circuit simulation, it is shown that the characteristics of fully depleted dual-gate thin-body Schottky barrier silicon transistors will not only uncouple the conflicting requirements of high performance and low standby power in digital logic, but will also allow the development of a locally-connected reconfigurable computing mesh. The magnitude of the threshold shift effect will scale with device dimensions and will remain compatible with oxide reliability constraints. A field-programmable architecture based on the double gate transistor is described in which the operating point of the circuit is biased via one gate while the other gate is used to form the logic array, such that complex heterogeneous computing functions may be developed from this homogeneous, mesh-connected organization.
Intrinsic evolution of controllable oscillators in FPTA-2
NASA Technical Reports Server (NTRS)
Sekanina, Lukas; Zebulum, Ricardo S.
2005-01-01
Simple one- and two-bit controllable oscillators were intrinsically evolved using only four cells of Field Programmable Transistor Array (FPTA-2). These oscillators can produce different oscillations for different setting of control signals. Therefore, they could be used, in principle, to compose complex networks of oscillators that could exhibit rich dynamical behavior in order to perform a computation or to model a desired system.
Programmable resistive-switch nanowire transistor logic circuits.
Shim, Wooyoung; Yao, Jun; Lieber, Charles M
2014-09-10
Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a well-defined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.
Hardware Evolution of Analog Speed Controllers for a DC Motor
NASA Technical Reports Server (NTRS)
Gwaltney, David A.; Ferguson, Michael I.
2003-01-01
Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a Field Programmable Transistor Array (FPTA). The performance of these evolved controllers is compared to that of a conventional proportional-integral (PI) controller.
CMOS-micromachined, two-dimenisional transistor arrays for neural recording and stimulation.
Lin, J S; Chang, S R; Chang, C H; Lu, S C; Chen, H
2007-01-01
In-plane microelectrode arrays have proven to be useful tools for studying the connectivities and the functions of neural tissues. However, seldom microelectrode arrays are monolithically-integrated with signal-processing circuits, without which the maximum number of electrodes is limited by the compromise with routing complexity and interferences. This paper proposes a CMOS-compatible, two-dimensional array of oxide-semiconductor field-effect transistors(OSFETs), capable of both recording and stimulating neuronal activities. The fabrication of the OSFETs not only requires simply die-level, post-CMOS micromachining process, but also retains metal layers for monolithic integration with signal-processing circuits. A CMOS microsystem containing the OSFET arrays and gain-programmable recording circuits has been fabricated and tested. The preliminary testing results are presented and discussed.
Memory Device and Nanofabrication Techniques Using Electrically Configurable Materials
NASA Astrophysics Data System (ADS)
Ascenso Simões, Bruno
Development of novel nanofabrication techniques and single-walled carbon nanotubes field configurable transistor (SWCNT-FCT) memory devices using electrically configurable materials is presented. A novel lithographic technique, electric lithography (EL), that uses electric field for pattern generation has been demonstrated. It can be used for patterning of biomolecules on a polymer surface and patterning of resist as well. Using electrical resist composed of a polymer having Boc protected amine group and iodonium salt, Boc group on the surface of polymer was modified to free amine by applying an electric field. On the modified surface of the polymer, Streptavidin pattern was fabricated with a sub-micron scale. Also patterning of polymer resin composed of epoxy monomers and diaryl iodonium salt by EL has been demonstrated. Reaction mechanism for electric resist configuration is believed to be induced by an acid generation via electrochemical reduction in the resist. We show a novel field configurable transistor (FCT) based on single-walled carbon nanotube network field-effect transistors in which poly (ethylene glycol) crosslinked by electron-beam is incorporated into the gate. The device conductance can be configured to arbitrary states reversibly and repeatedly by applying external gate voltages. Raman spectroscopy revealed that evolution of the ratio of D- to G-band intensity in the SWCNTs of the FCT progressively increases as the device is configured to lower conductance states. Electron transport studies at low temperatures showed a strong temperature dependence of the resistance. Band gap widening of CNTs up to ˜ 4 eV has been observed by examining the differential conductance-gate voltage-bias voltage relationship. The switching mechanism of the FCT is attributed a structural transformation of CNTs via reversible hydrogenation and dehydrogenations induced by gate voltages, which tunes the CNT bandgap continuously and reversibly to non-volatile analog values. The CNT transistors with field tunable band gaps would facilitate field programmable circuits based on the self-organized CNTs, and might also lead to novel analog memory, neuromorphic, and photonic devices.
Programmable Schottky Junctions Based on Ferroelectric Gated MoS2 Transistors
NASA Astrophysics Data System (ADS)
Xiao, Zhiyong; Song, Jingfeng; Drcharme, Stephen; Hong, Xia
We report a programmable Schottky junction based on MoS2 field effect transistors with a SiO2 back gate and a ferroelectric copolymer poly(vinylidene-fluoride-trifluorethylene) (PVDF) top gate. We fabricated mechanically exfoliated single layer MoS2 flakes into two point devices via e-beam lithography, and deposited on the top of the devices ~20 nm PVDF thin films. The polarization of the PVDF layer is controlled locally by conducting atomic force microscopy. The devices exhibit linear ID-VD characteristics when the ferroelectric gate is uniformly polarized in one direction. We then polarized the gate into two domains with opposite polarization directions, and observed that the ID-VD characteristics of the MoS2 channel can be modulated between linear and rectified behaviors depending on the back gate voltage. The nonlinear ID-VD relation emerges when half of the channel is in the semiconductor phase while the other half is in the metallic phase, and it can be well described by the thermionic emission model with a Schottky barrier of ~0.5 eV. The Schottky junction can be erased by re-write the entire channel in the uniform polarization state. Our study facilitates the development of programmable, multifunctional nanoelectronics based on layered 2D TMDs..
NASA Astrophysics Data System (ADS)
Zuo, Chao; Sun, Jiasong; Feng, Shijie; Hu, Yan; Chen, Qian
2016-03-01
Programmable colored illumination microscopy (PCIM) has been proposed as a flexible optical staining technique for microscopic contrast enhancement. In this method, we replace the condenser diaphragm of a conventional microscope with a programmable thin film transistor-liquid crystal display (TFT-LCD). By displaying different patterns on the LCD, numerous established imaging modalities can be realized, such as bright field, dark field, phase contrast, oblique illumination, and Rheinberg illuminations, which conventionally rely on intricate alterations in the respective microscope setups. Furthermore, the ease of modulating both the color and the intensity distribution at the aperture of the condenser opens the possibility to combine multiple microscopic techniques, or even realize completely new methods for optical color contrast staining, such as iridescent dark-field and iridescent phase-contrast imaging. The versatility and effectiveness of PCIM is demonstrated by imaging of several transparent colorless specimens, such as unstained lung cancer cells, diatom, textile fibers, and a cryosection of mouse kidney. Finally, the potentialities of PCIM for RGB-splitting imaging with stained samples are also explored by imaging stained red blood cells and a histological section.
Design of a Ferroelectric Programmable Logic Gate Array
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Ho, Fat Duen
2003-01-01
A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.
Self-Recovery Experiments in Extreme Environments Using a Field Programmable Transistor Array
NASA Technical Reports Server (NTRS)
Stoica, Adrian; Keymeulen, Didier; Arslan, Tughrul; Duong, Vu; Zebulum, Ricardo; Ferguson, Ian; Guo, Xin
2004-01-01
Temperature and radiation tolerant electronics, as well as long life survivability are key capabilities required for future NASA missions. Current approaches to electronics for extreme environments focus on component level robustness and hardening. However, current technology can only ensure very limited lifetime in extreme environments. This paper describes novel experiments that allow adaptive in-situ circuit redesign/reconfiguration during operation in extreme temperature and radiation environments. This technology would complement material/device advancements and increase the mission capability to survive harsh environments. The approach is demonstrated on a mixed-signal programmable chip (FPTA-2), which recovers functionality for temperatures until 28 C and with total radiation dose up to 250kRad.
Programmable nanowire circuits for nanoprocessors.
Yan, Hao; Choe, Hwan Sung; Nam, SungWoo; Hu, Yongjie; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M
2011-02-10
A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.
Field Programmable Gate Array for Implementation of Redundant Advanced Digital Feedback Control
NASA Technical Reports Server (NTRS)
King, K. D.
2003-01-01
The goal of this effort was to develop a digital motor controller using field programmable gate arrays (FPGAs). This is a more rugged approach than a conventional microprocessor digital controller. FPGAs typically have higher radiation (rad) tolerance than both the microprocessor and memory required for a conventional digital controller. Furthermore, FPGAs can typically operate at higher speeds. (While speed is usually not an issue for motor controllers, it can be for other system controllers.) Other than motor power, only a 3.3-V digital power supply was used in the controller; no analog bias supplies were used. Since most of the circuit was implemented in the FPGA, no additional parts were needed other than the power transistors to drive the motor. The benefits that FPGAs provide over conventional designs-lower power and fewer parts-allow for smaller packaging and reduced weight and cost.
Characterization and recovery of Deep Sub Micron (DSM) technologies behavior under radiation
NASA Technical Reports Server (NTRS)
Stoica, Adrian; Wang, Xiao
2005-01-01
This paper serves a twofold purpose: characterize the behavior of a reconfigurable chip exposed to radiation; and demonstrate a method for functionality recovery due to Total Ionizing Dose (TID) effects. The experiments are performed using a PL developed reconfigurable device, a Field Programmable Transistor Array (FPTA). The paper initially describes experiments on the characterization of the NMOS transistor behavior for TID values up to 300krad. The behavior of analog and digital circuits downloaded onto the FPTA chip is also assessed for TID effects. This paper also presents a novel approach for circuit functionality recovery due to radiation effects based on Evolvable Hardware. The key idea is to reconfigure a programmable device, in-situ, to compensate, or bypass its degraded or damaged components. Experiments with total radiation dose up to 300kRad show that while the functionality of a variety of circuits, including digital gates, a rectifier and a Digital to Analog Converter implemented on a FPTA-2 chip is degraded/lost at levels before 200kRad, the correct functionality can be recovered through the proposed evolutionary approach and the chips are able to survive higher radiation, for several functions in excess of total radiation dose of 250kRad.
John, Rohit Abraham; Ko, Jieun; Kulkarni, Mohit R; Tiwari, Naveen; Chien, Nguyen Anh; Ing, Ng Geok; Leong, Wei Lin; Mathews, Nripan
2017-08-01
Emulation of biological synapses is necessary for future brain-inspired neuromorphic computational systems that could look beyond the standard von Neuman architecture. Here, artificial synapses based on ionic-electronic hybrid oxide-based transistors on rigid and flexible substrates are demonstrated. The flexible transistors reported here depict a high field-effect mobility of ≈9 cm 2 V -1 s -1 with good mechanical performance. Comprehensive learning abilities/synaptic rules like paired-pulse facilitation, excitatory and inhibitory postsynaptic currents, spike-time-dependent plasticity, consolidation, superlinear amplification, and dynamic logic are successfully established depicting concurrent processing and memory functionalities with spatiotemporal correlation. The results present a fully solution processable approach to fabricate artificial synapses for next-generation transparent neural circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Nanowire systems: technology and design
Gaillardon, Pierre-Emmanuel; Amarù, Luca Gaetano; Bobba, Shashikanth; De Marchi, Michele; Sacchetto, Davide; De Micheli, Giovanni
2014-01-01
Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this study, we consider double independent gate, vertically stacked nanowire field effect transistors (FETs) with gate-all-around structures and typical diameter of 20 nm. These devices, which we have successfully fabricated and evaluated, control the ambipolar behaviour of the nanostructure by selectively enabling one type of carriers. These transistors work as switches with electrically programmable polarity and thus realize an exclusive or operation. The intrinsic higher expressive power of these FETs, when compared with standard complementary metal oxide semiconductor technology, enables us to realize more efficient logic gates, which we organize as tiles to realize nanowire systems by regular arrays. This article surveys both the technology for double independent gate FETs as well as physical and logic design tools to realize digital systems with this fabrication technology. PMID:24567471
Low electron mobility of field-effect transistor determined by modulated magnetoresistance
NASA Astrophysics Data System (ADS)
Tauk, R.; Łusakowski, J.; Knap, W.; Tiberj, A.; Bougrioua, Z.; Azize, M.; Lorenzini, P.; Sakowicz, M.; Karpierz, K.; Fenouillet-Beranger, C.; Cassé, M.; Gallon, C.; Boeuf, F.; Skotnicki, T.
2007-11-01
Room temperature magnetotransport experiments were carried out on field-effect transistors in magnetic fields up to 10 T. It is shown that measurements of the transistor magnetoresistance and its first derivative with respect to the gate voltage allow the derivation of the electron mobility in the gated part of the transistor channel, while the access/contact resistances and the transistor gate length need not be known. We demonstrate the potential of this method using GaN and Si field-effect transistors and discuss its importance for mobility measurements in transistors with nanometer gate length.
Proton Damage Effects on Carbon Nanotube Field-Effect Transistors
2014-06-19
PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Evan R. Kemp, Ctr...United States. AFIT-ENP-T-14-J-39 PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Presented to...PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS Evan R. Kemp, BS Ctr, USAF Approved: // Signed
High performance organic transistor active-matrix driver developed on paper substrate
NASA Astrophysics Data System (ADS)
Peng, Boyu; Ren, Xiaochen; Wang, Zongrong; Wang, Xinyu; Roberts, Robert C.; Chan, Paddy K. L.
2014-09-01
The fabrication of electronic circuits on unconventional substrates largely broadens their application areas. For example, green electronics achieved through utilization of biodegradable or recyclable substrates, can mitigate the solid waste problems that arise at the end of their lifespan. Here, we combine screen-printing, high precision laser drilling and thermal evaporation, to fabricate organic field effect transistor (OFET) active-matrix (AM) arrays onto standard printer paper. The devices show a mobility and on/off ratio as high as 0.56 cm2V-1s-1 and 109 respectively. Small electrode overlap gives rise to a cut-off frequency of 39 kHz, which supports that our AM array is suitable for novel practical applications. We demonstrate an 8 × 8 AM light emitting diode (LED) driver with programmable scanning and information display functions. The AM array structure has excellent potential for scaling up.
High performance organic transistor active-matrix driver developed on paper substrate
Peng, Boyu; Ren, Xiaochen; Wang, Zongrong; Wang, Xinyu; Roberts, Robert C.; Chan, Paddy K. L.
2014-01-01
The fabrication of electronic circuits on unconventional substrates largely broadens their application areas. For example, green electronics achieved through utilization of biodegradable or recyclable substrates, can mitigate the solid waste problems that arise at the end of their lifespan. Here, we combine screen-printing, high precision laser drilling and thermal evaporation, to fabricate organic field effect transistor (OFET) active-matrix (AM) arrays onto standard printer paper. The devices show a mobility and on/off ratio as high as 0.56 cm2V−1s−1 and 109 respectively. Small electrode overlap gives rise to a cut-off frequency of 39 kHz, which supports that our AM array is suitable for novel practical applications. We demonstrate an 8 × 8 AM light emitting diode (LED) driver with programmable scanning and information display functions. The AM array structure has excellent potential for scaling up. PMID:25234244
Electrophoretic and field-effect graphene for all-electrical DNA array technology.
Xu, Guangyu; Abbott, Jeffrey; Qin, Ling; Yeung, Kitty Y M; Song, Yi; Yoon, Hosang; Kong, Jing; Ham, Donhee
2014-09-05
Field-effect transistor biomolecular sensors based on low-dimensional nanomaterials boast sensitivity, label-free operation and chip-scale construction. Chemical vapour deposition graphene is especially well suited for multiplexed electronic DNA array applications, since its large two-dimensional morphology readily lends itself to top-down fabrication of transistor arrays. Nonetheless, graphene field-effect transistor DNA sensors have been studied mainly at single-device level. Here we create, from chemical vapour deposition graphene, field-effect transistor arrays with two features representing steps towards multiplexed DNA arrays. First, a robust array yield--seven out of eight transistors--is achieved with a 100-fM sensitivity, on par with optical DNA microarrays and at least 10 times higher than prior chemical vapour deposition graphene transistor DNA sensors. Second, each graphene acts as an electrophoretic electrode for site-specific probe DNA immobilization, and performs subsequent site-specific detection of target DNA as a field-effect transistor. The use of graphene as both electrode and transistor suggests a path towards all-electrical multiplexed graphene DNA arrays.
Acoustic charge transport technology investigation for advanced development transponder
NASA Technical Reports Server (NTRS)
Kayalar, S.
1993-01-01
Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.
NASA Technical Reports Server (NTRS)
Lee, F. C.; Chen, D. Y.; Jovanic, M.; Hopkins, D. C.
1985-01-01
Test data of switching times characterization of bipolar transistors, of field effect transistor's switching times on-resistance and characterization, comparative data of field effect transistors, and test data of field effect transistor's parallel operation characterization are given. Data is given in the form of graphs.
Field-effect transistors (2nd revised and enlarged edition)
NASA Astrophysics Data System (ADS)
Bocharov, L. N.
The design, principle of operation, and principal technical characteristics of field-effect transistors produced in the USSR are described. Problems related to the use of field-effect transistors in various radioelectronic devices are examined, and tables of parameters and mean statistical characteristics are presented for the main types of field-effect transistors. Methods for calculating various circuit components are discussed and illustrated by numerical examples.
On Polymorphic Circuits and Their Design Using Evolutionary Algorithms
NASA Technical Reports Server (NTRS)
Stoica, Adrian; Zebulum, Ricardo; Keymeulen, Didier; Lohn, Jason; Clancy, Daniel (Technical Monitor)
2002-01-01
This paper introduces the concept of polymorphic electronics (polytronics) - referring to electronics with superimposed built-in functionality. A function change does not require switches/reconfiguration as in traditional approaches. Instead the change comes from modifications in the characteristics of devices involved in the circuit, in response to controls such as temperature, power supply voltage (VDD), control signals, light, etc. The paper illustrates polytronic circuits in which the control is done by temperature, morphing signals, and VDD respectively. Polytronic circuits are obtained by evolutionary design/evolvable hardware techniques. These techniques are ideal for the polytronics design, a new area that lacks design guidelines, know-how,- yet the requirements/objectives are easy to specify and test. The circuits are evolved/synthesized in two different modes. The first mode explores an unstructured space, in which transistors can be interconnected freely in any arrangement (in simulations only). The second mode uses a Field Programmable Transistor Array (FPTA) model, and the circuit topology is sought as a mapping onto a programmable architecture (these experiments are performed both in simulations and on FPTA chips). The experiments demonstrated the synthesis. of polytronic circuits by evolution. The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications.
Two-dimensional non-volatile programmable p-n junctions
NASA Astrophysics Data System (ADS)
Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing
2017-09-01
Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.
Two-dimensional non-volatile programmable p-n junctions.
Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M; Zhang, Zengxing
2017-09-01
Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe 2 /hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 10 4 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.
CMOS-based carbon nanotube pass-transistor logic integrated circuits
Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao
2012-01-01
Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080
Ultra-high gain diffusion-driven organic transistor.
Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio
2016-02-01
Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal-semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics.
Ultra-high gain diffusion-driven organic transistor
NASA Astrophysics Data System (ADS)
Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio
2016-02-01
Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal-semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics.
NASA Astrophysics Data System (ADS)
Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal
2018-06-01
Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.
Complementary spin transistor using a quantum well channel.
Park, Youn Ho; Choi, Jun Woo; Kim, Hyung-Jun; Chang, Joonyeon; Han, Suk Hee; Choi, Heon-Jin; Koo, Hyun Cheol
2017-04-20
In order to utilize the spin field effect transistor in logic applications, the development of two types of complementary transistors, which play roles of the n- and p-type conventional charge transistors, is an essential prerequisite. In this research, we demonstrate complementary spin transistors consisting of two types of devices, namely parallel and antiparallel spin transistors using InAs based quantum well channels and exchange-biased ferromagnetic electrodes. In these spin transistors, the magnetization directions of the source and drain electrodes are parallel or antiparallel, respectively, depending on the exchange bias field direction. Using this scheme, we also realize a complementary logic operation purely with spin transistors controlled by the gate voltage, without any additional n- or p-channel transistor.
A steep-slope transistor based on abrupt electronic phase transition
NASA Astrophysics Data System (ADS)
Shukla, Nikhil; Thathachary, Arun V.; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G.; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman
2015-08-01
Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep (`sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.
A steep-slope transistor based on abrupt electronic phase transition.
Shukla, Nikhil; Thathachary, Arun V; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman
2015-08-07
Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep ('sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.
Lange, A.C.
1995-04-04
An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.
NASA Technical Reports Server (NTRS)
Franke, Ralph J. (Inventor)
1996-01-01
A current sensing circuit is described in which a pair of bipolar transistors are arranged with a pair of field effect transistors such that the field effect transistors absorb most of the supply voltage associated with a load.
Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R
2012-01-01
Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.
Light programmable organic transistor memory device based on hybrid dielectric
NASA Astrophysics Data System (ADS)
Ren, Xiaochen; Chan, Paddy K. L.
2013-09-01
We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.
Ultra-high gain diffusion-driven organic transistor
Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio
2016-01-01
Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal–semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics. PMID:26829567
Lagore, Russell L; Roberts, Brodi Roduta; Possanzini, Cecilia; Saylor, Charles; Fallone, B Gino; De Zanche, Nicola
2014-08-01
A noise figure and noise parameter measurement system was developed that consists of a combination spectrum and network analyzer, preamplifier, programmable power supply, noise source, tuning board, and desktop computer. The system uses the Y-factor method for noise figure calculation and allows calibrations to correct for a decrease in excess noise ratio between the noise source and device under test, second stage (system) noise, ambient temperature variations, and available gain of the device under test. Noise parameters are extracted by performing noise figure measurements at several source impedance values obtained by adjusting an electronically controlled tuner. Results for several amplifiers at 128 MHz and 200 MHz agree with independent measurements and with the corresponding datasheets. With some modifications, the system was also used to characterize the noise figure of MRI preamplifiers in strong static magnetic fields up to 9.4 T. In most amplifiers tested the gain was found to be reduced by the magnetic field, while the noise figure increased. These changes are detrimental to signal quality (SNR) and are dependent on the electron mobility and design of the amplifier's semiconductor devices. Consequently, gallium arsenide (GaAs) field-effect transistors are most sensitive to magnetic fields due to their high electron mobility and long, narrow channel, while silicon-germanium (SiGe) bipolar transistor amplifiers are largely immune due to their very thin base. Copyright © 2014 John Wiley & Sons, Ltd.
Toward Evolvable Hardware Chips: Experiments with a Programmable Transistor Array
NASA Technical Reports Server (NTRS)
Stoica, Adrian
1998-01-01
Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm. We search for a hardware configuration can be performed using software models or, faster and more accurate, directly in reconfigurable hardware. Several experiments have demonstrated the possibility to automatically synthesize both digital and analog circuits. The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA). The approach is illustrated with a software experiment showing evolutionary synthesis of a circuit with a desired DC characteristic. A hardware implementation of a test PTA chip is then described, and the same evolutionary experiment is performed on the chip demonstrating circuit synthesis/self-configuration directly in hardware.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Vostokov, N. V., E-mail: vostokov@ipm.sci-nnov.ru; Shashkin, V. I.
2015-11-28
We consider the problem of non-resonant detection of terahertz signals in a short gate length field-effect transistor having a two-dimensional electron channel with zero external bias between the source and the drain. The channel resistance, gate-channel capacitance, and quadratic nonlinearity parameter of the transistor during detection as a function of the gate bias voltage are studied. Characteristics of detection of the transistor connected in an antenna with real impedance are analyzed. The consideration is based on both a simple one-dimensional model of the transistor and allowance for the two-dimensional distribution of the electric field in the transistor structure. The resultsmore » given by the different models are discussed.« less
Electrochemical doping for lowering contact barriers in organic field effect transistors
Schaur, Stefan; Stadler, Philipp; Meana-Esteban, Beatriz; Neugebauer, Helmut; Serdar Sariciftci, N.
2012-01-01
By electrochemically p-doping pentacene in the vicinity of the source-drain electrodes in organic field effect transistors the injection barrier for holes is decreased. The focus of this work is put on the influence of the p-doping process on the transistor performance. Cyclic voltammetry performed on a pentacene based transistor exhibits a reversible p-doping response. This doped state is evoked at the transistor injection electrodes. An improvement is observed when comparing transistor characteristics before and after the doping process apparent by an improved transistor on-current. This effect is reflected in the analysis of the contact resistances of the devices. PMID:23483101
High-frequency noise characterization of graphene field effect transistors on SiC substrates
NASA Astrophysics Data System (ADS)
Yu, C.; He, Z. Z.; Song, X. B.; Liu, Q. B.; Dun, S. B.; Han, T. T.; Wang, J. J.; Zhou, C. J.; Guo, J. C.; Lv, Y. J.; Cai, S. J.; Feng, Z. H.
2017-07-01
Considering its high carrier mobility and high saturation velocity, a low-noise amplifier is thought of as being the most attractive analogue application of graphene field-effect transistors. The noise performance of graphene field-effect transistors at frequencies in the K-band remains unknown. In this work, the noise parameters of a graphene transistor are measured from 10 to 26 GHz and noise models are built with the data. The extrinsic minimum noise figure for a graphene transistor reached 1.5 dB, and the intrinsic minimum noise figure was as low as 0.8 dB at a frequency of 10 GHz, which were comparable with the results from tests on Si CMOS and started to approach those for GaAs and InP transistors. Considering the short development time, the current results are a significant step forward for graphene transistors and show their application potential in high-frequency electronics.
Complementary junction heterostructure field-effect transistor
Baca, Albert G.; Drummond, Timothy J.; Robertson, Perry J.; Zipperian, Thomas E.
1995-01-01
A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.
Complementary junction heterostructure field-effect transistor
Baca, A.G.; Drummond, T.J.; Robertson, P.J.; Zipperian, T.E.
1995-12-26
A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits. 10 figs.
N Channel JFET Based Digital Logic Gate Structure
NASA Technical Reports Server (NTRS)
Krasowski, Michael J (Inventor)
2013-01-01
An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.
Multiple-channel detection of cellular activities by ion-sensitive transistors
NASA Astrophysics Data System (ADS)
Machida, Satoru; Shimada, Hideto; Motoyama, Yumi
2018-04-01
An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.
Lange, Arnold C.
1995-01-01
An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).
Programmable, very low noise current source.
Scandurra, G; Cannatà, G; Giusi, G; Ciofi, C
2014-12-01
We propose a new approach for the realization of very low noise programmable current sources mainly intended for application in the field of low frequency noise measurements. The design is based on a low noise Junction Field Effect Transistor (JFET) acting as a high impedance current source and programmability is obtained by resorting to a low noise, programmable floating voltage source that allows to set the sourced current at the desired value. The floating voltage source is obtained by exploiting the properties of a standard photovoltaic MOSFET driver. Proper filtering and a control network employing super-capacitors allow to reduce the low frequency output noise to that due to the low noise JFET down to frequencies as low as 100 mHz while allowing, at the same time, to set the desired current by means of a standard DA converter with an accuracy better than 1%. A prototype of the system capable of supplying currents from a few hundreds of μA up to a few mA demonstrates the effectiveness of the approach we propose. When delivering a DC current of about 2 mA, the power spectral density of the current fluctuations at the output is found to be less than 25 pA/√Hz at 100 mHz and less than 6 pA/√Hz for f > 1 Hz, resulting in an RMS noise in the bandwidth from 0.1 to 10 Hz of less than 14 pA.
Programmable, very low noise current source
NASA Astrophysics Data System (ADS)
Scandurra, G.; Cannatà, G.; Giusi, G.; Ciofi, C.
2014-12-01
We propose a new approach for the realization of very low noise programmable current sources mainly intended for application in the field of low frequency noise measurements. The design is based on a low noise Junction Field Effect Transistor (JFET) acting as a high impedance current source and programmability is obtained by resorting to a low noise, programmable floating voltage source that allows to set the sourced current at the desired value. The floating voltage source is obtained by exploiting the properties of a standard photovoltaic MOSFET driver. Proper filtering and a control network employing super-capacitors allow to reduce the low frequency output noise to that due to the low noise JFET down to frequencies as low as 100 mHz while allowing, at the same time, to set the desired current by means of a standard DA converter with an accuracy better than 1%. A prototype of the system capable of supplying currents from a few hundreds of μA up to a few mA demonstrates the effectiveness of the approach we propose. When delivering a DC current of about 2 mA, the power spectral density of the current fluctuations at the output is found to be less than 25 pA/√Hz at 100 mHz and less than 6 pA/√Hz for f > 1 Hz, resulting in an RMS noise in the bandwidth from 0.1 to 10 Hz of less than 14 pA.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dib, E., E-mail: elias.dib@for.unipi.it; Carrillo-Nuñez, H.; Cavassilas, N.
Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.
Turner, Steven Richard
2006-12-26
A method and apparatus for measuring current, and particularly bi-directional current, in a field-effect transistor (FET) using drain-to-source voltage measurements. The drain-to-source voltage of the FET is measured and amplified. This signal is then compensated for variations in the temperature of the FET, which affects the impedance of the FET when it is switched on. The output is a signal representative of the direction of the flow of current through the field-effect transistor and the level of the current through the field-effect transistor. Preferably, the measurement only occurs when the FET is switched on.
Recent progress in photoactive organic field-effect transistors.
Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok
2014-04-01
Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.
Enhanced transconductance in a double-gate graphene field-effect transistor
NASA Astrophysics Data System (ADS)
Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu
2018-03-01
Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.
High-mobility field-effect transistor based on crystalline ZnSnO3 thin films
NASA Astrophysics Data System (ADS)
Minato, Hiroya; Fujiwara, Kohei; Tsukazaki, Atsushi
2018-05-01
We propose crystalline ZnSnO3 as a new channel material for field-effect transistors. By molecular-beam epitaxy on LiNbO3(0001) substrates, we synthesized films of ZnSnO3, which crystallizes in the LiNbO3-type polar structure. Field-effect transistors on ZnSnO3 exhibit n-type operation with field-effect mobility of as high as 45 cm2V-1s-1 at room temperature. Systematic examination of the transistor operation for channels with different Zn/Sn compositional ratios revealed that the observed high-mobility reflects the nature of stoichiometric ZnSnO3 phase. Moreover, we found an indication of coupling of transistor characteristics with intrinsic spontaneous polarization in ZnSnO3, potentially leading to a distinct type of polarization-induced conduction.
Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons.
Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela; Shi, Wu; Lee, Kyunghoon; Wu, Shuang; Yong Choi, Byung; Braganza, Rohit; Lear, Jordan; Kau, Nicholas; Choi, Wonwoo; Chen, Chen; Pedramrazi, Zahra; Dumslaff, Tim; Narita, Akimitsu; Feng, Xinliang; Müllen, Klaus; Fischer, Felix; Zettl, Alex; Ruffieux, Pascal; Yablonovitch, Eli; Crommie, Michael; Fasel, Roman; Bokor, Jeffrey
2017-09-21
Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and high I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.Graphene nanoribbons show promise for high-performance field-effect transistors, however they often suffer from short lengths and wide band gaps. Here, the authors use a bottom-up synthesis approach to fabricate 9- and 13-atom wide ribbons, enabling short-channel transistors with 10 5 on-off current ratio.
Field effect transistors improve buffer amplifier
NASA Technical Reports Server (NTRS)
1967-01-01
Unity gain buffer amplifier with a Field Effect Transistor /FET/ differential input stage responds much faster than bipolar transistors when operated at low current levels. The circuit uses a dual FET in a unity gain buffer amplifier having extremely high input impedance, low bias current requirements, and wide bandwidth.
I-V Characteristics of a Ferroelectric Field Effect Transistor
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Ho, Fat Duen
1999-01-01
There are many possible uses for ferroelectric field effect transistors.To understand their application, a fundamental knowledge of their basic characteristics must first be found. In this research, the current and voltage characteristics of a field effect transistor are described. The effective gate capacitance and charge are derived from experimental data on an actual FFET. The general equation for a MOSFET is used to derive the internal characteristics of the transistor: This equation is modified slightly to describe the FFET characteristics. Experimental data derived from a Radiant Technologies FFET is used to calculate the internal transistor characteristics using fundamental MOSFET equations. The drain current was measured under several different gate and drain voltages and with different initial polarizations on the ferroelectric material in the transistor. Two different polarization conditions were used. One with the gate ferroelectric material polarized with a +9.0 volt write pulse and one with a -9.0 volt pulse.
Lüssem, Björn; Keum, Chang-Min; Kasemann, Daniel; Naab, Ben; Bao, Zhenan; Leo, Karl
2016-11-23
Organic field-effect transistors hold the promise of enabling low-cost and flexible electronics. Following its success in organic optoelectronics, the organic doping technology is also used increasingly in organic field-effect transistors. Doping not only increases device performance, but it also provides a way to fine-control the transistor behavior, to develop new transistor concepts, and even improve the stability of organic transistors. This Review summarizes the latest progress made in the understanding of the doping technology and its application to organic transistors. It presents the most successful doping models and an overview of the wide variety of materials used as dopants. Further, the influence of doping on charge transport in the most relevant polycrystalline organic semiconductors is reviewed, and a concise overview on the influence of doping on transistor behavior and performance is given. In particular, recent progress in the understanding of contact doping and channel doping is summarized.
Carrier mobility in organic field-effect transistors
NASA Astrophysics Data System (ADS)
Xu, Yong; Benwadih, Mohamed; Gwoziecki, Romain; Coppard, Romain; Minari, Takeo; Liu, Chuan; Tsukagoshi, Kazuhito; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard
2011-11-01
A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density dependences of mobility in organic transistors.
Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey
2017-01-01
In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development. PMID:28350370
Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey
2017-03-28
In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development.
Doped organic transistors operating in the inversion and depletion regime
Lüssem, Björn; Tietze, Max L.; Kleemann, Hans; Hoßbach, Christoph; Bartha, Johann W.; Zakhidov, Alexander; Leo, Karl
2013-01-01
The inversion field-effect transistor is the basic device of modern microelectronics and is nowadays used more than a billion times on every state-of-the-art computer chip. In the future, this rigid technology will be complemented by flexible electronics produced at extremely low cost. Organic field-effect transistors have the potential to be the basic device for flexible electronics, but still need much improvement. In particular, despite more than 20 years of research, organic inversion mode transistors have not been reported so far. Here we discuss the first realization of organic inversion transistors and the optimization of organic depletion transistors by our organic doping technology. We show that the transistor parameters—in particular, the threshold voltage and the ON/OFF ratio—can be controlled by the doping concentration and the thickness of the transistor channel. Injection of minority carriers into the doped transistor channel is achieved by doped contacts, which allows forming an inversion layer. PMID:24225722
2014-01-01
This paper studies the effect of atomic layer deposition (ALD) temperature on the performance of top-down ZnO nanowire transistors. Electrical characteristics are presented for 10-μm ZnO nanowire field-effect transistors (FETs) and for deposition temperatures in the range 120°C to 210°C. Well-behaved transistor output characteristics are obtained for all deposition temperatures. It is shown that the maximum field-effect mobility occurs for an ALD temperature of 190°C. This maximum field-effect mobility corresponds with a maximum Hall effect bulk mobility and with a ZnO film that is stoichiometric. The optimized transistors have a field-effect mobility of 10 cm2/V.s, which is approximately ten times higher than can typically be achieved in thin-film amorphous silicon transistors. Furthermore, simulations indicate that the drain current and field-effect mobility extraction are limited by the contact resistance. When the effects of contact resistance are de-embedded, a field-effect mobility of 129 cm2/V.s is obtained. This excellent result demonstrates the promise of top-down ZnO nanowire technology for a wide variety of applications such as high-performance thin-film electronics, flexible electronics, and biosensing. PMID:25276107
Organic field effect transistor with ultra high amplification
NASA Astrophysics Data System (ADS)
Torricelli, Fabrizio
2016-09-01
High-gain transistors are essential for the large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show organic transistors fabricated on plastic foils enabling unipolar amplifiers with ultra-gain. The proposed approach is general and opens up new opportunities for ultra-large signal amplification in organic circuits and sensors.
NASA Astrophysics Data System (ADS)
Kanaki, Toshiki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki
2016-10-01
We propose a current-in-plane spin-valve field-effect transistor (CIP-SV-FET), which is composed of a ferromagnet/nonferromagnet/ferromagnet trilayer structure and a gate electrode. This is a promising device alternative to spin metal-oxide-semiconductor field-effect transistors. Here, we fabricate a ferromagnetic-semiconductor GaMnAs-based CIP-SV-FET and demonstrate its basic operation of the resistance modulation both by the magnetization configuration and by the gate electric field. Furthermore, we present the electric-field-assisted magnetization reversal in this device.
NASA Astrophysics Data System (ADS)
Jacobs, J. L.
1993-04-01
Erasable programmable logic devices (EPLD's) were investigated to determine their advantages and/or disadvantages in Test Equipment Engineering applications. It was found that EPLD's performed as well as or better than identical circuits using standard transistor transistor logic (TTL). The chip count in these circuits was reduced, saving printed circuit board space and shortening fabrication and prove-in time. Troubleshooting circuits of EPLD's was also easier with 10 to 100 times fewer wires needed. The reduced number of integrated circuits (IC's) contributed to faster system speeds and an overall lower power consumption. In some cases changes to the circuit became software changes using EPLD's instead of hardware changes for standard logic. Using EPLD's was fairly easy; however, as with any new technology, a learning curve must be overcome before EPLD's can be used efficiently. The many benefits of EPLD's outweighed this initial inconvenience.
Reprogrammable read only variable threshold transistor memory with isolated addressing buffer
Lodi, Robert J.
1976-01-01
A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.
Analysis of long-channel nanotube field-effect-transistors (NT FETs)
NASA Technical Reports Server (NTRS)
Toshishige, Yamada; Kwak, Dochan (Technical Monitor)
2001-01-01
This viewgraph presentation provides an analysis of long-channel nanotube (NT) field effect transistors (FET) from NASA's Ames Research Center. The structure of such a transistor including the electrode contact, 1D junction, and the planar junction is outlined. Also mentioned are various characteristics of a nanotube tip-equipped scanning tunnel microscope (STM).
Direct observation of single-charge-detection capability of nanowire field-effect transistors.
Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E
2010-10-01
A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.
Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons
DOE Office of Scientific and Technical Information (OSTI.GOV)
Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela
Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and highmore » I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.« less
Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons
Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela; ...
2017-09-21
Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and highmore » I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.« less
Neural dynamics in reconfigurable silicon.
Basu, A; Ramakrishnan, S; Petre, C; Koziol, S; Brink, S; Hasler, P E
2010-10-01
A neuromorphic analog chip is presented that is capable of implementing massively parallel neural computations while retaining the programmability of digital systems. We show measurements from neurons with Hopf bifurcations and integrate and fire neurons, excitatory and inhibitory synapses, passive dendrite cables, coupled spiking neurons, and central pattern generators implemented on the chip. This chip provides a platform for not only simulating detailed neuron dynamics but also uses the same to interface with actual cells in applications such as a dynamic clamp. There are 28 computational analog blocks (CAB), each consisting of ion channels with tunable parameters, synapses, winner-take-all elements, current sources, transconductance amplifiers, and capacitors. There are four other CABs which have programmable bias generators. The programmability is achieved using floating gate transistors with on-chip programming control. The switch matrix for interconnecting the components in CABs also consists of floating-gate transistors. Emphasis is placed on replicating the detailed dynamics of computational neural models. Massive computational area efficiency is obtained by using the reconfigurable interconnect as synaptic weights, resulting in more than 50 000 possible 9-b accurate synapses in 9 mm(2).
NASA Technical Reports Server (NTRS)
Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.
1992-01-01
Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K are presented. It is shown that the CHFET exhibits normal transistor operation down to 6 K. Some of the details of the transistor operation, such as the gate-voltage dependence of the channel potential, are analyzed. The gate current is examined and is shown to be due to several mechanisms acting in parallel. These include field-emission and thermionic-field-emission, conduction through a temperature-activated resistance, and thermionic emission. The input referred noise for n-channel CHFETs is presented and discussed. The noise has the spectral dependence of 1/f noise, but does not exhibit the usual area dependence.
NASA Astrophysics Data System (ADS)
Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.
2012-06-01
High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.
Ambipolar pentacene field-effect transistor with double-layer organic insulator
NASA Astrophysics Data System (ADS)
Kwak, Jeong-Hun; Baek, Heume-Il; Lee, Changhee
2006-08-01
Ambipolar conduction in organic field-effect transistor is very important feature to achieve organic CMOS circuitry. We fabricated an ambipolar pentacene field-effect transistors consisted of gold source-drain electrodes and double-layered PMMA (Polymethylmethacrylate) / PVA (Polyvinyl Alcohol) organic insulator on the ITO(Indium-tin-oxide)-patterned glass substrate. These top-contact geometry field-effect transistors were fabricated in the vacuum of 10 -6 Torr and minimally exposed to atmosphere before its measurement and characterized in the vacuum condition. Our device showed reasonable p-type characteristics of field-effect hole mobility of 0.2-0.9 cm2/Vs and the current ON/OFF ratio of about 10 6 compared to prior reports with similar configurations. For the n-type characteristics, field-effect electron mobility of 0.004-0.008 cm2/Vs and the current ON/OFF ratio of about 10 3 were measured, which is relatively high performance for the n-type conduction of pentacene field-effect transistors. We attributed these ambipolar properties mainly to the hydroxyl-free PMMA insulator interface with the pentacene active layer. In addition, an increased insulator capacitance due to double-layer insulator structure with high-k PVA layer also helped us to observe relatively good n-type characteristics.
NASA Astrophysics Data System (ADS)
Jayant, Krishna; Auluck, Kshitij; Rodriguez, Sergio; Cao, Yingqiu; Kan, Edwin C.
2014-05-01
We report on factors that affect DNA hybridization detection using ion-sensitive field-effect transistors (ISFETs). Signal generation at the interface between the transistor and immobilized biomolecules is widely ascribed to unscreened molecular charges causing a shift in surface potential and hence the transistor output current. Traditionally, the interaction between DNA and the dielectric or metal sensing interface is modeled by treating the molecular layer as a sheet charge and the ionic profile with a Poisson-Boltzmann distribution. The surface potential under this scenario is described by the Graham equation. This approximation, however, often fails to explain large hybridization signals on the order of tens of mV. More realistic descriptions of the DNA-transistor interface which include factors such as ion permeation, exclusion, and packing constraints have been proposed with little or no corroboration against experimental findings. In this study, we examine such physical models by their assumptions, range of validity, and limitations. We compare simulations against experiments performed on electrolyte-oxide-semiconductor capacitors and foundry-ready floating-gate ISFETs. We find that with weakly charged interfaces (i.e., low intrinsic interface charge), pertinent to the surfaces used in this study, the best agreement between theory and experiment exists when ions are completely excluded from the DNA layer. The influence of various factors such as bulk pH, background salinity, chemical reactivity of surface groups, target molecule concentration, and surface coatings on signal generation is studied. Furthermore, in order to overcome Debye screening limited detection, we suggest two signal enhancement strategies. We first describe frequency domain biosensing, highlighting the ability to sort short DNA strands based on molecular length, and then describe DNA biosensing in multielectrolytes comprising trace amounts of higher-valency salt in a background of monovalent saline. Our study provides guidelines for optimized interface design, signal enhancement, and the interpretation of FET-based biosensor signals.
Magnetophoretic transistors in a tri-axial magnetic field.
Abedini-Nassab, Roozbeh; Joh, Daniel Y; Albarghouthi, Faris; Chilkoti, Ashutosh; Murdoch, David M; Yellen, Benjamin B
2016-10-18
The ability to direct and sort individual biological and non-biological particles into spatially addressable locations is fundamentally important to the emerging field of single cell biology. Towards this goal, we demonstrate a new class of magnetophoretic transistors, which can switch single magnetically labeled cells and magnetic beads between different paths in a microfluidic chamber. Compared with prior work on magnetophoretic transistors driven by a two-dimensional in-plane rotating field, the addition of a vertical magnetic field bias provides significant advantages in preventing the formation of particle clumps and in better replicating the operating principles of circuits in general. However, the three-dimensional driving field requires a complete redesign of the magnetic track geometry and switching electrodes. We have solved this problem by developing several types of transistor geometries which can switch particles between two different tracks by either presenting a local energy barrier or by repelling magnetic objects away from a given track, hereby denoted as "barrier" and "repulsion" transistors, respectively. For both types of transistors, we observe complete switching of magnetic objects with currents of ∼40 mA, which is consistent over a range of particle sizes (8-15 μm). The switching efficiency was also tested at various magnetic field strengths (50-90 Oe) and driving frequencies (0.1-0.6 Hz); however, we again found that the device performance only weakly depended on these parameters. These findings support the use of these novel transistor geometries to form circuit architectures in which cells can be placed in defined locations and retrieved on demand.
EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor
NASA Astrophysics Data System (ADS)
Demming, Anna
2012-09-01
Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor behaviour in devices fabricated from chemically reduced graphene oxide. The work provided an important step forward for graphene electronics, which has been hampered by difficulties in scaling up the mechanical exfoliation techniques required to produce the high-quality graphene often needed for functioning devices [8]. In Sweden, researchers have developed a transistor design that they fabricate using standard III-V parallel processing, which also has great promise for scaling up production. Their transistor is based on a vertical array of InAs nanowires, which provide high electron mobility and the possibility of high-speed and low-power operation [9]. Different fabrication techniques and design parameters can influence the properties of transistors. Researchers in Belgium used a new method based on high-vacuum scanning spreading resistance microscopy to study the effect of diameter on carrier profile in nanowire transistors [10]. They then used experimental data and simulations to gain a better understanding of how this influenced the transistor performance. In Japan, Y Ohno and colleagues at Nagoya University have reported how atomic layer deposition of an insulating layer of HfO2 on carbon nanotube field effect transistors can change the carrier from p-type to n-type [11]. Carrier type switching—'ambipolar behaviour'—and hysteresis of carbon nanotube network transistors can make achieving reliable device performance challenging. However studies have also suggested that the hysteretic properties may be exploited in non-volatile memory applications. A collaboration of researchers in Italy and the US demonstrated transistor and memory cell behaviour in a system based on a carbon nanotube network [13]. Their device had relatively fast programming, good endurance and the charge retention was successfully enhanced by limiting exposure to air. Progress in understanding transistor behaviour has inspired other innovations in device applications. Nanowires are notoriously sensitive to gases such as CO, opening opportunities for applications in sensing using one-dimensional nanostructure transistors [12]. The pyroelectric transistor reported in this issue represents an intriguing development for device applications of this versatile and ubiquitous electronics component [3]. As the researchers point out, 'By combining the photocurrent feature and optothermal gating effect, the wide range of response to light covering ultraviolet and infrared radiation can lead to new nanoscale optoelectronic devices that are suitable for remote or wireless applications.' In nanotechnology research and development, often the race is on to achieve reliable device behaviour in the smallest possible systems. But sometimes it is the innovations in the approach used that revolutionize technology in industry. The pyroelectric transistor reported in this issue is a neat example of the ingenious innovations in this field of research. While in research the race is never really over, as this work demonstrates the journey itself remains an inspiration. References [1] Bardeen J and Brattain W H 1948 The transistor, a semi-conductor triode Phys. Rev 74 230-1 [2] Shockley W B, Bardeen J and Brattain W H 1956 The nobel prize in physics www.nobelprize.org/nobel_prizes/physics/laureates/1956/# [3] Hsieh C-Y, Lu M-L, Chen J-Y, Chen Y-T, Chen Y-F, Shih W Y and Shih W-H 2012 Single ZnO nanowire-PZT optothermal field effect transistors Nanotechnology 23 355201 [4] Tans S J, Verschueren A R M and Dekker C 1998 Room-temperature transistor based on a single carbon nanotube Nature 393 49-52 [5] Cui Y, Zhong Z, Wang D, Wang W U and Lieber C M 2003 High performance silicon nanowire field effect transistors Nano Lett. 3 149-52 [6]Stafford C A, Cardamone D M and Mazumdar S 2007 The quantum interference effect transistor Nanotechnology 18 424014 [7] Garnier F, Hajlaoui R, Yassar A and Srivastava P 1994 All-polymer field-effect transistor realized by printing techniques Science 265 1684-6 [8] Joung D, Chunder A, Zhai L and Khondaker S I 2010 High yield fabrication of chemically reduced graphene oxide field effect transistors by dielectrophoresis Nanotechnology 21 165202 [9] Bryllert T, Wernersson L-E, L¨owgren T and Samuelson L 2006 Vertical wrap-gated nanowire transistors Nanotechnology 17 S227-30 [10] Schulze A et al 2011 Observation of diameter dependent carrier distribution in nanowire-based transistors Nanotechnology 22 185701 [11] Moriyama N, Ohno Y, Kitamura T, Kishimoto S and Mizutani T 2010 Change in carrier type in high-k gate carbon nanotube field-effect transistors by interface fixed charges Nanotechnology 21 165201 [12] Bartolomeo A D, Rinzan M, Boyd A K, Yang Y, Guadagno L, Giubileo F and Barbara P 2010 Electrical properties and memory effects of field-effect transistors from networks of single-and double-walled carbon nanotubes Nanotechnology 21 115204 [13] Liao L et al 2009 Multifunctional CuO nanowire devices: P-type field effect transistors and CO gas sensors Nanotechnology 20 085203
Electrical coupling of single cardiac rat myocytes to field-effect and bipolar transistors.
Kind, Thomas; Issing, Matthias; Arnold, Rüdiger; Müller, Bernt
2002-12-01
A novel bipolar transistor for extracellular recording the electrical activity of biological cells is presented, and the electrical behavior compared with the field-effect transistor (FET). Electrical coupling is examined between single cells separated from the heart of adults rats (cardiac myocytes) and both types of transistors. To initiate a local extracellular voltage, the cells are periodically stimulated by a patch pipette in voltage clamp and current clamp mode. The local extracellular voltage is measured by the planar integrated electronic sensors: the bipolar and the FET. The small signal transistor currents correspond to the local extracellular voltage. The two types of sensor transistors used here were developed and manufactured in the laboratory of our institute. The manufacturing process and the interfaces between myocytes and transistors are described. The recordings are interpreted by way of simulation based on the point-contact model and the single cardiac myocyte model.
NASA Astrophysics Data System (ADS)
Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung
2008-11-01
In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.
Interband Lateral Resonant Tunneling Transistor.
1994-11-14
INTERBAND LATERAL RESONANT TUNNELING TRANSISTOR 10 BACKGROUND OF THE INVENTION Field of the Invention This invention pertains to a tunneling transistor...and in 15 particular to an interband lateral resonant tunneling transistor. Description of Related Art Conventional semiconductor technologies are... interband lateral resonant tunneling transistor along the cross-section B-B of Figure 2c. Figure 4 is another preferred embodiment cross-sectional 20
Benzocyclobutene (BCB) Polymer as Amphibious Buffer Layer for Graphene Field-Effect Transistor.
Wu, Yun; Zou, Jianjun; Huo, Shuai; Lu, Haiyan; Kong, Yuecan; Chen, Tangshen; Wu, Wei; Xu, Jingxia
2015-08-01
Owing to the scattering and trapping effects, the interfaces of dielectric/graphene or substrate/graphene can tailor the performance of field-effect transistor (FET). In this letter, the polymer of benzocyclobutene (BCB) was used as an amphibious buffer layer and located at between the layers of substrate and graphene and between the layers of dielectric and graphene. Interestingly, with the help of nonpolar and hydrophobic BCB buffer layer, the large-scale top-gated, chemical vapor deposited (CVD) graphene transistors was prepared on Si/SiO2 substrate, its cutoff frequency (fT) and the maximum cutoff frequency (fmax) of the graphene field-effect transistor (GFET) can be reached at 12 GHz and 11 GHz, respectively.
A hydrogel capsule as gate dielectric in flexible organic field-effect transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Dumitru, L. M.; Manoli, K.; Magliulo, M.
2015-01-01
A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.
Low-power bacteriorhodopsin-silicon n-channel metal-oxide field-effect transistor photoreceiver.
Shin, Jonghyun; Bhattacharya, Pallab; Yuan, Hao-Chih; Ma, Zhenqiang; Váró, György
2007-03-01
A bacteriorhodopsin (bR)-silicon n-channel metal-oxide field-effect transistor (NMOSFET) monolithically integrated photoreceiver is demonstrated. The bR film is selectively formed on an external gate electrode of the transistor by electrophoretic deposition. A modified biasing circuit is incorporated, which helps to match the resistance of the bR film to the input impedance of the NMOSFET and to shift the operating point of the transistor to coincide with the maximum gain. The photoreceiver exhibits a responsivity of 4.7 mA/W.
Charge transport and trapping in organic field effect transistors exposed to polar analytes
NASA Astrophysics Data System (ADS)
Duarte, Davianne; Sharma, Deepak; Cobb, Brian; Dodabalapur, Ananth
2011-03-01
Pentacene based organic thin-film transistors were used to study the effects of polar analytes on charge transport and trapping behavior during vapor sensing. Three sets of devices with differing morphology and mobility (0.001-0.5 cm2/V s) were employed. All devices show enhanced trapping upon exposure to analyte molecules. The organic field effect transistors with different mobilities also provide evidence for morphology dependent partition coefficients. This study helps provide a physical basis for many reports on organic transistor based sensor response.
Mixed protonic and electronic conductors hybrid oxide synaptic transistors
NASA Astrophysics Data System (ADS)
Fu, Yang Ming; Zhu, Li Qiang; Wen, Juan; Xiao, Hui; Liu, Rui
2017-05-01
Mixed ionic and electronic conductor hybrid devices have attracted widespread attention in the field of brain-inspired neuromorphic systems. Here, mixed protonic and electronic conductor (MPEC) hybrid indium-tungsten-oxide (IWO) synaptic transistors gated by nanogranular phosphorosilicate glass (PSG) based electrolytes were obtained. Unique field-configurable proton self-modulation behaviors were observed on the MPEC hybrid transistor with extremely strong interfacial electric-double-layer effects. Temporally coupled synaptic plasticities were demonstrated on the MPEC hybrid IWO synaptic transistor, including depolarization/hyperpolarization, synaptic facilitation and depression, facilitation-stead/depression-stead behaviors, spiking rate dependent plasticity, and high-pass/low-pass synaptic filtering behaviors. MPEC hybrid synaptic transistors may find potential applications in neuron-inspired platforms.
A nanoscale piezoelectric transformer for low-voltage transistors.
Agarwal, Sapan; Yablonovitch, Eli
2014-11-12
A novel piezoelectric voltage transformer for low-voltage transistors is proposed. Placing a piezoelectric transformer on the gate of a field-effect transistor results in the piezoelectric transformer field-effect transistor that can switch at significantly lower voltages than a conventional transistor. The piezoelectric transformer operates by using one piezoelectric to squeeze another piezoelectric to generate a higher output voltage than the input voltage. Multiple piezoelectrics can be used to squeeze a single piezoelectric layer to generate an even higher voltage amplification. Coupled electrical and mechanical modeling in COMSOL predicts a 12.5× voltage amplification for a six-layer piezoelectric transformer. This would lead to more than a 150× reduction in the power needed for communications.
Field-effect transistor improves electrometer amplifier
NASA Technical Reports Server (NTRS)
Munoz, R.
1964-01-01
An electrometer amplifier uses a field effect transistor to measure currents of low amperage. The circuit, developed as an ac amplifier, is used with an external filter which limits bandwidth to achieve optimum noise performance.
Lv, Aifeng; Freitag, Matthias; Chepiga, Kathryn M; Schäfer, Andreas H; Glorius, Frank; Chi, Lifeng
2018-04-16
N-Heterocyclic carbenes (NHCs), which react with the surface of Au electrodes, have been successfully applied in pentacene transistors. With the application of NHCs, the charge-carrier mobility of pentacene transistors increased by five times, while the contact resistance at the pentacene-Au interface was reduced by 85 %. Even after annealing the NHC-Au electrodes at 200 °C for 2 h before pentacene deposition, the charge-carrier mobility of the pentacene transistors did not decrease. The distinguished performance makes NHCs as excellent alternatives to thiols as metal modifiers for the application in organic field-effect transistors (OFETs). © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Influence of polymer dielectrics on C60-based field-effect transistors
NASA Astrophysics Data System (ADS)
Zhou, Jianlin; Zhang, Fujia; Lan, Lifeng; Wen, Shangsheng; Peng, Junbiao
2007-12-01
Fullerene C60 organic field-effect transistors (OFETs) have been fabricated based on two different polymer dielectric materials, poly(methylmethacrylate) (PMMA) and cross-linkable poly(4-vinylphenol). The large grain size of C60 film and small number of traps at the interface of PMMA /C60 were obtained with high electron mobility of 0.66cm2/Vs in the PMMA transistor. The result suggests that the C60 semiconductor cooperating with polymer dielectric is a promising application in the fabrication of n-type organic transistors because of low threshold voltage and high electron mobility.
A Field-Effect Transistor (FET) model for ASAP
NASA Technical Reports Server (NTRS)
Ming, L.
1965-01-01
The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.
Aluminum nitride insulating films for MOSFET devices
NASA Technical Reports Server (NTRS)
Lewicki, G. W.; Maserjian, J.
1972-01-01
Application of aluminum nitrides as electrical insulator for electric capacitors is discussed. Electrical properties of aluminum nitrides are analyzed and specific use with field effect transistors is defined. Operational limits of field effect transistors are developed.
Park, Rebecca Sejung; Shulaker, Max Marcel; Hills, Gage; Suriyasena Liyanage, Luckshitha; Lee, Seunghyun; Tang, Alvin; Mitra, Subhasish; Wong, H-S Philip
2016-04-26
We present a measurement technique, which we call the Pulsed Time-Domain Measurement, for characterizing hysteresis in carbon nanotube field-effect transistors, and demonstrate its applicability for a broad range of 1D and 2D nanomaterials beyond carbon nanotubes. The Pulsed Time-Domain Measurement enables the quantification (density, energy level, and spatial distribution) of charged traps responsible for hysteresis. A physics-based model of the charge trapping process for a carbon nanotube field-effect transistor is presented and experimentally validated using the Pulsed Time-Domain Measurement. Leveraging this model, we discover a source of traps (surface traps) unique to devices with low-dimensional channels such as carbon nanotubes and nanowires (beyond interface traps which exist in today's silicon field-effect transistors). The different charge trapping mechanisms for interface traps and surface traps are studied based on their temperature dependencies. Through these advances, we are able to quantify the interface trap density for carbon nanotube field-effect transistors (∼3 × 10(13) cm(-2) eV(-1) near midgap), and compare this against a range of previously studied dielectric/semiconductor interfaces.
Probing organic field effect transistors in situ during operation using SFG.
Ye, Hongke; Abu-Akeel, Ashraf; Huang, Jia; Katz, Howard E; Gracias, David H
2006-05-24
In this communication, we report results obtained using surface-sensitive IR+Visible Sum Frequency Generation (SFG) nonlinear optical spectroscopy on interfaces of organic field effect transistors during operation. We observe remarkable correlations between trends in the surface vibrational spectra and electrical properties of the transistor, with changes in gate voltage (VG). These results suggest that field effects on electronic conduction in thin film organic semiconductor devices are correlated to interfacial nonlinear optical characteristics and point to the possibility of using SFG spectroscopy to monitor electronic properties of OFETs.
1993-09-01
SENSITIVE FIELD- EFFECT TRANSISTOR (CHEMFET) TO DETECT NITROGEN DIOXIDE, DIMETHYL METHYLPHOSPHONATE, AND BORON TRIFLUORIDE CHAPTER 1 1 Introduction Our rapidly...AND REVERSIBILITY OF THE CHEMICALLY-SENSITIVE FIELD- EFFECT TRANSISTOR (CHEMFET) TO DETECT NITROGEN 3 E I1• DIOXIDE, DIMETHYL METHYLPHOSPHONATE, ELECTE...AND BORON TRIFLUORIDE Neal Terence Hauschild Second Lieutenant, USAF AFIT/GE/ENG/9 3S-10 93-23815I II11l11l11 l gll I 1i 1111 11 I DEPARTMENT OF THE
NASA Astrophysics Data System (ADS)
Hu, Ai-Bin; Xu, Qiu-Xia
2010-05-01
Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.
A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design
NASA Technical Reports Server (NTRS)
Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen
2004-01-01
The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.
An embedded measurement system for the electrical characterization of EGFET as a pH sensor
NASA Astrophysics Data System (ADS)
Diniz Batista, Pablo
2014-02-01
This work presents the development of an electronic system for the electrical characterization of pH sensors based on the extended gate field effect transistor (EGFET). We designed an electronic circuit with a microcontroller (PIC15F14K50) as the main component in order to provide two programmable output voltages as well as circuits to measure electric current and voltages. The instrument performance analysis was carried out using a glass electrode as a sensitive membrane for investigating the EGFET operation as a pH sensor. The results show that the system is an alternative to the commercial equipment for the electrical characterization of sensors based on field effect devices. In addition, some of the key features expected of this electronic module are: low cost, flexibility, portability and communication with a personal computer using a USB port.
NASA Technical Reports Server (NTRS)
Cunningham, Thomas J.; Gee, Russell C.; Fossum, Eric R.; Baier, Steven M.
1993-01-01
This paper discusses the electrical properties of the complementary heterojunction field-effect transistor (CHFET) at 4K, including the gate leakage current, the subthreshold transconductance, and the input-referred noise voltage.
Cryogenic measurements of aerojet GaAs n-JFETs
NASA Technical Reports Server (NTRS)
Goebel, John H.; Weber, Theodore T.
1993-01-01
The spectral noise characteristics of Aerojet gallium arsenide (GaAs) junction field effect transistors (JFET's) have been investigated down to liquid-helium temperatures. Noise characterization was performed with the field effect transistor (FET) in the floating-gate mode, in the grounded-gate mode to determine the lowest noise readings possible, and with an extrinsic silicon photodetector at various detector bias voltages to determine optimum operating conditions. The measurements indicate that the Aerojet GaAs JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to silicon (Si) metal oxide semiconductor field effect transistor (MOSFET's) operating at liquid helium temperatures, and is equal to the best Si n channel junction field effect transistor (n-JFET's) operating at 300 K.
Graphene Field Effect Transistor for Radiation Detection
NASA Technical Reports Server (NTRS)
Li, Mary J. (Inventor); Chen, Zhihong (Inventor)
2016-01-01
The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.
A photonic transistor device based on photons and phonons in a cavity electromechanical system
NASA Astrophysics Data System (ADS)
Jiang, Cheng; Zhu, Ka-Di
2013-01-01
We present a scheme for photonic transistors based on photons and phonons in a cavity electromechanical system, which is composed of a superconducting microwave cavity coupled to a nanomechanical resonator. Control of the propagation of photons is achieved through the interaction of microwave field (photons) and nanomechanical vibrations (phonons). By calculating the transmission spectrum of the signal field, we show that the signal field can be efficiently attenuated or amplified, depending on the power of a second ‘gating’ (pump) field. This scheme may be a promising candidate for single-photon transistors and pave the way for numerous applications in telecommunication and quantum information technologies.
Quantum structures for recombination control in the light-emitting transistor
NASA Astrophysics Data System (ADS)
Chen, Kanuo; Hsiao, Fu-Chen; Joy, Brittany; Dallesasse, John M.
2017-02-01
Recombination of carriers in the direct-bandgap base of a transistor-injected quantum cascade laser (TI-QCL) is shown to be controllable through the field applied across the quantum cascade region located in the transistor's base-collector junction. The influence of the electric field on the quantum states in the cascade region's superlattice allows free flow of electrons out of the transistor base only for field values near the design field that provides optimal QCL gain. Quantum modulation of base recombination in the light-emitting transistor is therefore observed. In a GaAs-based light-emitting transistor, a periodic superlattice is grown between the p-type base and the n-type collector. Under different base-collector biasing conditions the distribution of quantum states, and as a consequence transition probabilities through the wells and barriers forming the cascade region, leads to strong field-dependent mobility for electrons in transit through the base-collector junction. The radiative base recombination, which is influenced by minority carrier transition lifetime, can be modulated through the quantum states alignment in the superlattice. A GaAs-based transistor-injected quantum cascade laser with AlGaAs/GaAs superlattice is designed and fabricated. Radiative base recombination is measured under both common-emitter and common-base configuration. In both configurations the optical output from the base is proportional to the emitter injection. When the quantum states in the superlattice are aligned the optical output in the base is reduced as electrons encounter less impedance entering the collector; when the quantum states are misaligned electrons have longer lifetime in the base and the radiative base recombination process is enhanced.
Silicon Field Effect Transistors as Dual-Use Sensor-Heater Hybrids
Reddy, Bobby; Elibol, Oguz H.; Nair, Pradeep R.; Dorvel, Brian R.; Butler, Felice; Ahsan, Zahab; Bergstrom, Donald E.; Alam, Muhammad A.; Bashir, Rashid
2011-01-01
We demonstrate the temperature mediated applications of a previously proposed novel localized dielectric heating method on the surface of dual purpose silicon field effect transistor (FET) sensor-heaters and perform modeling and characterization of the underlying mechanisms. The FETs are first shown to operate as electrical sensors via sensitivity to changes in pH in ionic fluids. The same devices are then demonstrated as highly localized heaters via investigation of experimental heating profiles and comparison to simulation results. These results offer further insight into the heating mechanism and help determine the spatial resolution of the technique. Two important biosensor platform applications spanning different temperature ranges are then demonstrated: a localized heat-mediated DNA exchange reaction and a method for dense selective functionalization of probe molecules via the heat catalyzed complete desorption and reattachment of chemical functionalization to the transistor surfaces. Our results show that the use of silicon transistors can be extended beyond electrical switching and field-effect sensing to performing localized temperature controlled chemical reactions on the transistor itself. PMID:21214189
Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model.
Penumatcha, Ashish V; Salazar, Ramon B; Appenzeller, Joerg
2015-11-13
Owing to the difficulties associated with substitutional doping of low-dimensional nanomaterials, most field-effect transistors built from carbon nanotubes, two-dimensional crystals and other low-dimensional channels are Schottky barrier MOSFETs (metal-oxide-semiconductor field-effect transistors). The transmission through a Schottky barrier-MOSFET is dominated by the gate-dependent transmission through the Schottky barriers at the metal-to-channel interfaces. This makes the use of conventional transistor models highly inappropriate and has lead researchers in the past frequently to extract incorrect intrinsic properties, for example, mobility, for many novel nanomaterials. Here we propose a simple modelling approach to quantitatively describe the transfer characteristics of Schottky barrier-MOSFETs from ultra-thin body materials accurately in the device off-state. In particular, after validating the model through the analysis of a set of ultra-thin silicon field-effect transistor data, we have successfully applied our approach to extract Schottky barrier heights for electrons and holes in black phosphorus devices for a large range of body thicknesses.
Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model
Penumatcha, Ashish V.; Salazar, Ramon B.; Appenzeller, Joerg
2015-01-01
Owing to the difficulties associated with substitutional doping of low-dimensional nanomaterials, most field-effect transistors built from carbon nanotubes, two-dimensional crystals and other low-dimensional channels are Schottky barrier MOSFETs (metal-oxide-semiconductor field-effect transistors). The transmission through a Schottky barrier-MOSFET is dominated by the gate-dependent transmission through the Schottky barriers at the metal-to-channel interfaces. This makes the use of conventional transistor models highly inappropriate and has lead researchers in the past frequently to extract incorrect intrinsic properties, for example, mobility, for many novel nanomaterials. Here we propose a simple modelling approach to quantitatively describe the transfer characteristics of Schottky barrier-MOSFETs from ultra-thin body materials accurately in the device off-state. In particular, after validating the model through the analysis of a set of ultra-thin silicon field-effect transistor data, we have successfully applied our approach to extract Schottky barrier heights for electrons and holes in black phosphorus devices for a large range of body thicknesses. PMID:26563458
High voltage power transistor development
NASA Technical Reports Server (NTRS)
Hower, P. L.
1981-01-01
Design considerations, fabrication procedures, and methods of evaluation for high-voltage power-transistor development are discussed. Technique improvements such as controlling the electric field at the surface and perserving lifetimes in the collector region which have advanced the state of the art in high-voltage transistors are discussed. These improvements can be applied directly to the development of 1200 volt, 200 ampere transistors.
Method for Providing Semiconductors Having Self-Aligned Ion Implant
NASA Technical Reports Server (NTRS)
Neudeck, Philip G. (Inventor)
2014-01-01
A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.
Method for Providing Semiconductors Having Self-Aligned Ion Implant
NASA Technical Reports Server (NTRS)
Neudeck, Philip G. (Inventor)
2011-01-01
A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.
NASA Astrophysics Data System (ADS)
Feng, M.; Holonyak, N.; Wang, C. Y.
2017-09-01
Optical bistable devices are fundamental to digital photonics as building blocks of switches, logic gates, and memories in future computer systems. Here, we demonstrate both optical and electrical bistability and capability for switching in a single transistor operated at room temperature. The electro-optical hysteresis is explained by the interaction of electron-hole (e-h) generation and recombination dynamics with the cavity photon modulation in different switching paths. The switch-UP and switch-DOWN threshold voltages are determined by the rate difference of photon generation at the base quantum-well and the photon absorption via intra-cavity photon-assisted tunneling controlled by the collector voltage. Thus, the transistor laser electro-optical bistable switching is programmable with base current and collector voltage, and the basis for high speed optical logic processors.
Gallium nitride junction field-effect transistor
Zolper, John C.; Shul, Randy J.
1999-01-01
An all-ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorous co-implantation, in selected III-V semiconductor materials.
NASA Technical Reports Server (NTRS)
Rippel, W. E.; Edwards, D. B.
1984-01-01
Commutation by field-effect transistor allows more efficient operation. High voltage field-effect transistor (FET) controls silicon controlled rectifiers (SCR's). Circuit requires only one capacitor and one inductor in commutation circuit: simpler, more efficient, and more economical than conventional inverters. Adaptable to dc-to-dc converters.
Okada, Jun; Nagase, Takashi; Kobayashi, Takashi; Naito, Hiroyoshi
2016-04-01
Carrier transport in solution-processed organic thin-film transistors (OTFTs) based on dioctylbenzothienobenzothiophene (C8-BTBT) has been investigated in a wide temperature range from 296 to 10 K. The field-effect mobility shows thermally activated behavior whose activation energy becomes smaller with decreasing temperature. The temperature dependence of field-effect mobility found in C8-BTBT is similar to that of others materials: organic semiconducting polymers, amorphous oxide semiconductors and hydrogenated amorphous silicon. These results indicate that hopping transport between isoenergetic localized states becomes dominated in a low temperature regime in these materials.
Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.
Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan
2015-09-22
This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.
A Probe for Measuring Spacecraft Surface Potentials Using a Direct-Gate Field Effect Transistor.
1983-09-30
SURFACE POTENTIALS USING A DIRECT-GATE FIELD EFFECT TRANSISTOR Mark N. Horenstein Anton Havretic Trustees of Boston University 881 Commonwealth Avenue...1933 Transistor 6. PERFORMING ORG. REPORT NUMBER 7. AUTHOR(s) S. CONTRACT OR GRANT NUMBER(&) ’_5 Mark N. Horenstein Anton Mavretic F19628-82-K-00 34...at AFGL. These tests can be considered the bench mark tests for device performance, with all elements of the monitoring system optimized to eliminate
Lee, Wonryung; Kim, Dongmin; Rivnay, Jonathan; Matsuhisa, Naoji; Lonjaret, Thomas; Yokota, Tomoyuki; Yawo, Hiromu; Sekino, Masaki; Malliaras, George G; Someya, Takao
2016-11-01
Integration of organic electrochemical transistors and organic field-effect transistors is successfully realized on a 600 nm thick parylene film toward an electrophysiology array. A single cell of an integrated device and a 2 × 2 electrophysiology array succeed in detecting electromyogram with local stimulation of the motor nerve bundle of a transgenic rat by a laser pulse. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Starting Circuit For Erasable Programmable Logic Device
NASA Technical Reports Server (NTRS)
Cole, Steven W.
1990-01-01
Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.
Nonvolatile programmable neural network synaptic array
NASA Technical Reports Server (NTRS)
Tawel, Raoul (Inventor)
1994-01-01
A floating-gate metal oxide semiconductor (MOS) transistor is implemented for use as a nonvolatile analog storage element of a synaptic cell used to implement an array of processing synaptic cells. These cells are based on a four-quadrant analog multiplier requiring both X and Y differential inputs, where one Y input is UV programmable. These nonvolatile synaptic cells are disclosed fully connected in a 32 x 32 synaptic cell array using standard very large scale integration (VLSI) complementary MOS (CMOS) technology.
A programmable CCD driver circuit for multiphase CCD operation
NASA Technical Reports Server (NTRS)
Ewin, Audrey J.; Reed, Kenneth V.
1989-01-01
A programmable CCD (charge-coupled device) driver circuit was designed to drive CCDs in multiphased modes. The purpose of the drive electronics is to operate developmental CCD imaging arrays for NASA's tiltable moderate resolution imaging spectrometer (MODIS-T). Five objectives for the driver were considered during its design: (1) the circuit drives CCD electrode voltages between 0 V and +30 V to produce reasonable potential wells, (2) the driving sequence is started with one input signal, (3) the driving sequence is started with one input signal, (4) the circuit allows programming of frame sequences required by arrays of any size, (5) it produces interfacing signals for the CCD and the DTF (detector test facility). Simulation of the driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400,000 pixels/s. Timing and packaging parameters were verified. The design uses 54 TTL (transistor-transistor logic) chips. Two versions of hardware were fabricated: wirewrap and printed circuit board. Both were verified functionally with a logic analyzer.
Photocurable Polymers for Ion Selective Field Effect Transistors. 20 Years of Applications
Abramova, Natalia; Bratov, Andrei
2009-01-01
Application of photocurable polymers for encapsulation of ion selective field effect transistors (ISFET) and for membrane formation in chemical sensitive field effect transistors (ChemFET) during the last 20 years is discussed. From a technological point of view these materials are quite interesting because they allow the use of standard photo-lithographic processes, which reduces significantly the time required for sensor encapsulation and membrane deposition and the amount of manual work required for this, all items of importance for sensor mass production. Problems associated with the application of this kind of polymers in sensors are analysed and estimation of future trends in this field of research are presented. PMID:22399988
NASA Astrophysics Data System (ADS)
Wang, Xiaonan; Fu, Tingting; Wang, Zhe
2018-04-01
In this paper, we demonstrate a novel method for fabricating metal nanopatterns using cracking to address the limitations of traditional techniques. Parallel crack arrays were created in a polydimethylsiloxane (PDMS) mold using a combination of surface modification and control of strain fields. The elastic PDMS containing the crack arrays was subsequently used as a stamp to prepare nanoscale metal patterns on a substrate by transfer printing. To illustrate the functionality of this technique, we employed the metal patterns as the source and drain contacts of an organic field effect transistor. Using this approach, we fabricated transistors with channel lengths ranging from 70-600 nm. The performance of these devices when the channel length was reduced was studied. The drive current density increases as expected, indicating the creation of operational transistors with recognizable properties.
Elibol, Oguz H; Reddy, Bobby; Nair, Pradeep R; Dorvel, Brian; Butler, Felice; Ahsan, Zahab S; Bergstrom, Donald E; Alam, Muhammad A; Bashir, Rashid
2009-10-07
We demonstrate electrically addressable localized heating in fluid at the dielectric surface of silicon-on-insulator field-effect transistors via radio-frequency Joule heating of mobile ions in the Debye layer. Measurement of fluid temperatures in close vicinity to surfaces poses a challenge due to the localized nature of the temperature profile. To address this, we developed a localized thermometry technique based on the fluorescence decay rate of covalently attached fluorophores to extract the temperature within 2 nm of any oxide surface. We demonstrate precise spatial control of voltage dependent temperature profiles on the transistor surfaces. Our results introduce a new dimension to present sensing systems by enabling dual purpose silicon transistor-heaters that serve both as field effect sensors as well as temperature controllers that could perform localized bio-chemical reactions in Lab on Chip applications.
Application of the Johnson criteria to graphene transistors
NASA Astrophysics Data System (ADS)
Kelly, M. J.
2013-12-01
For 60 years, the Johnson criteria have guided the development of materials and the materials choices for field-effect and bipolar transistor technology. Intrinsic graphene is a semi-metal, precluding transistor applications, but only under lateral bias is a gap opened and transistor action possible. This first application of the Johnson criteria to biased graphene suggests that this material will struggle to ever achieve competitive commercial applications.
Assessment of Phospohrene Field Effect Transistors
2018-01-28
electronics industry. To this end, transistor test structures would initially be fabricated on phosphorene exfoliated from black phosphorus and, later, on...34Phosphorene FETs-Promising Transistors Based on a few Layers of Phosphorus Atoms," Nanjing Electronic Devices Institute, Nanjing, China, Jul. 2015...OH, Nov. 2015. J.C. M. Hwang, "Phosphorene Transistors-Transient or Lasting Electronics ?" Workshop Frontier Electronics , San Juan, PR, Dec. 2015
Sander, H.H.
1959-10-01
A pressure or mechanical force transducer particularly adaptable to miniature telemetering systems is described. Basically the device consists of a transistor located within a magnetic field adapted to change in response to mechanical force. The conduction characteristics of the transistor in turn vary proportionally with changes in the magnetic flux across the transistor such that the output (either frequency of amplitude) of the transistor circuit is proportional to mechanical force or pressure.
Improved Field-Effect Transistor Equations for Computer Simulation.
ERIC Educational Resources Information Center
Kidd, Richard; Ardini, James
1979-01-01
Presents a laboratory experiment that was developed to acquaint physics students with field-effect transistor characteristics and circuits. Computer-drawn curves supplementing student laboratory exercises can be generated to provide more permanent, usable data than those taken from a curve tracer. (HM)
Detection beyond Debye's length with an electrolyte-gated organic field-effect transistor.
Palazzo, Gerardo; De Tullio, Donato; Magliulo, Maria; Mallardi, Antonia; Intranuovo, Francesca; Mulla, Mohammad Yusuf; Favia, Pietro; Vikholm-Lundin, Inger; Torsi, Luisa
2015-02-04
Electrolyte-gated organic field-effect transistors are successfully used as biosensors to detect binding events occurring at distances from the transistor electronic channel that are much larger than the Debye length in highly concentrated solutions. The sensing mechanism is mainly capacitive and is due to the formation of Donnan's equilibria within the protein layer, leading to an extra capacitance (CDON) in series to the gating system. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Santi, C. de; Meneghini, M., E-mail: matteo.meneghini@dei.unipd.it; Meneghesso, G.
2014-08-18
With this paper we propose a test method for evaluating the dynamic performance of GaN-based transistors, namely, gate-frequency sweep measurements: the effectiveness of the method is verified by characterizing the dynamic performance of Gate Injection Transistors. We demonstrate that this method can provide an effective description of the impact of traps on the transient performance of Heterojunction Field Effect Transistors, and information on the properties (activation energy and cross section) of the related defects. Moreover, we discuss the relation between the results obtained by gate-frequency sweep measurements and those collected by conventional drain current transients and double pulse characterization.
Passi, Vikram; Gahoi, Amit; Senkovskiy, Boris V; Haberer, Danny; Fischer, Felix R; Grüneis, Alexander; Lemme, Max C
2018-03-28
We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percolation threshold. The long channel transistors exhibit a maximum I ON / I OFF current ratio of 87.5.
Noh, Joo Hyon; Noh, Jiyong; Kreit, Eric; Heikenfeld, Jason; Rack, Philip D
2012-01-21
Agile micro- and nano-fluidic control is critical to numerous life science and chemical science synthesis as well as kinetic and thermodynamic studies. To this end, we have demonstrated the use of thin film transistor arrays as an active matrix addressing method to control an electrofluidic array. Because the active matrix method minimizes the number of control lines necessary (m + n lines for the m×n element array), the active matrix addressing method integrated with an electrofluidic platform can be a significant breakthrough for complex electrofluidic arrays (increased size or resolution) with enhanced function, agility and programmability. An amorphous indium gallium zinc oxide (a-IGZO) semiconductor active layer is used because of its high mobility of 1-15 cm(2) V(-1) s(-1), low-temperature processing and transparency for potential spectroscopy and imaging. Several electrofluidic functionalities are demonstrated using a simple 2 × 5 electrode array connected to a 2 × 5 IGZO thin film transistor array with the semiconductor channel width of 50 μm and mobility of 6.3 cm(2) V(-1) s(-1). Additionally, using the TFT device characteristics, active matrix addressing schemes are discussed as the geometry of the electrode array can be tailored to act as a storage capacitor element. Finally, requisite material and device parameters are discussed in context with a VGA scale active matrix addressed electrofluidic platform.
Gallium nitride junction field-effect transistor
Zolper, J.C.; Shul, R.J.
1999-02-02
An ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same are disclosed. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorus co-implantation, in selected III-V semiconductor materials. 19 figs.
Organic Field Effect Transistor Using Amorphous Fluoropolymer as Gate Insulating Film
NASA Astrophysics Data System (ADS)
Kitajima, Yosuke; Kojima, Kenzo; Mizutani, Teruyoshi; Ochiai, Shizuyasu
Organic field effect transistors are fabricated by the active layer of Regioregular poly (3-hexylthiophene-2,5-diy)(P3HT) thin film. CYTOP thin film made from Amorphous Fluoropolymer and fabricated by spin-coating is adopted to a gate dielectric layer on Polyethylenenaphthalate (PEN) thin film that is the substrate of an organic field effect transistor. The surface morphology and molecular orientation of P3HT thin films is observed by atomic force microscope (AFM) and X-Ray diffractometer (XRD). Grains are observed on the CYTOP thin film via an AFM image and the P3HT molecule is oriented perpendicularly on the CYTOP thin film. Based on the performance of the organic field effect transistor, the carrier mobility is 0.092 cm2/Vs, the ON/OFF ratio is 7, and the threshold voltage is -12 V. The ON/OFF ratio is relatively low and to improve On/Off ratio, the CYTOP/Polyimide double gate insulating layer is adopted to OFET.
Current crowding mediated large contact noise in graphene field-effect transistors
Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam
2016-01-01
The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene–metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V−1 s−1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal–channel interface, which could be generic to two-dimensional material-based electronic devices. PMID:27929087
NASA Astrophysics Data System (ADS)
Zhou, Hong; Maize, Kerry; Qiu, Gang; Shakouri, Ali; Ye, Peide D.
2017-08-01
We have demonstrated that depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors can achieve a record high drain current density of 1.5/1.0 A/mm by utilizing a highly doped β-Ga2O3 nano-membrane as the channel. β-Ga2O3 on insulator field-effect transistor (GOOI FET) shows a high on/off ratio of 1010 and low subthreshold slope of 150 mV/dec even with 300 nm thick SiO2. The enhancement-mode GOOI FET is achieved through surface depletion. An ultra-fast, high resolution thermo-reflectance imaging technique is applied to study the self-heating effect by directly measuring the local surface temperature. High drain current, low Rc, and wide bandgap make the β-Ga2O3 on insulator field-effect transistor a promising candidate for future power electronics applications.
NASA Astrophysics Data System (ADS)
Xia, Jing; Huang, Yangqi; Zhang, Xichao; Kang, Wang; Zheng, Chentian; Liu, Xiaoxi; Zhao, Weisheng; Zhou, Yan
2017-10-01
Magnetic skyrmion is a topologically protected domain-wall structure at nanoscale, which could serve as a basic building block for advanced spintronic devices. Here, we propose a microwave field-driven skyrmionic device with the transistor-like function, where the motion of a skyrmion in a voltage-gated ferromagnetic nanotrack is studied by micromagnetic simulations. It is demonstrated that the microwave field can drive the motion of a skyrmion by exciting the propagating spin waves, and the skyrmion motion can be governed by a gate voltage. We also investigate the microwave current-assisted creation of a skyrmion to facilitate the operation of the transistor-like skyrmionic device on the source terminal. It is found that the microwave current with an appropriate frequency can reduce the threshold current density required for the creation of a skyrmion from the ferromagnetic background. The proposed transistor-like skyrmionic device operated with the microwave field and current could be useful for building future skyrmion-based circuits.
Progress of new label-free techniques for biosensors: a review.
Sang, Shengbo; Wang, Yajun; Feng, Qiliang; Wei, Ye; Ji, Jianlong; Zhang, Wendong
2016-01-01
The detection techniques used in biosensors can be broadly classified into label-based and label-free. Label-based detection relies on the specific properties of labels for detecting a particular target. In contrast, label-free detection is suitable for the target molecules that are not labeled or the screening of analytes which are not easy to tag. Also, more types of label-free biosensors have emerged with developments in biotechnology. The latest developed techniques in label-free biosensors, such as field-effect transistors-based biosensors including carbon nanotube field-effect transistor biosensors, graphene field-effect transistor biosensors and silicon nanowire field-effect transistor biosensors, magnetoelastic biosensors, optical-based biosensors, surface stress-based biosensors and other type of biosensors based on the nanotechnology are discussed. The sensing principles, configurations, sensing performance, applications, advantages and restriction of different label-free based biosensors are considered and discussed in this review. Most concepts included in this survey could certainly be applied to the development of this kind of biosensor in the future.
Current crowding mediated large contact noise in graphene field-effect transistors
NASA Astrophysics Data System (ADS)
Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam
2016-12-01
The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V-1 s-1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.
Lead iodide perovskite light-emitting field-effect transistor
Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare
2015-01-01
Despite the widespread use of solution-processable hybrid organic–inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature. PMID:26108967
Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit
NASA Astrophysics Data System (ADS)
Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong
2018-06-01
A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.
Design of transient light signal simulator based on FPGA
NASA Astrophysics Data System (ADS)
Kang, Jing; Chen, Rong-li; Wang, Hong
2014-11-01
A design scheme of transient light signal simulator based on Field Programmable gate Array (FPGA) was proposed in this paper. Based on the characteristics of transient light signals and measured feature points of optical intensity signals, a fitted curve was created in MATLAB. And then the wave data was stored in a programmed memory chip AT29C1024 by using SUPERPRO programmer. The control logic was realized inside one EP3C16 FPGA chip. Data readout, data stream cache and a constant current buck regulator for powering high-brightness LEDs were all controlled by FPGA. A 12-Bit multiplying CMOS digital-to-analog converter (DAC) DAC7545 and an amplifier OPA277 were used to convert digital signals to voltage signals. A voltage-controlled current source constituted by a NPN transistor and an operational amplifier controlled LED array diming to achieve simulation of transient light signal. LM3405A, 1A Constant Current Buck Regulator for Powering LEDs, was used to simulate strong background signal in space. Experimental results showed that the scheme as a transient light signal simulator can satisfy the requests of the design stably.
'Soft' amplifier circuits based on field-effect ionic transistors.
Boon, Niels; Olvera de la Cruz, Monica
2015-06-28
Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.
Theory and Device Modeling for Nano-Structured Transistor Channels
2011-06-01
zinc oxide ( ZnO ) thin film transistors ( TFTs ) that contain nanocrystalline grains on the order of ~20nm. The authors of ref. 1 present results...problem in order to determine the threshold voltage. 15. SUBJECT TERMS nano-structured transistor , mesoscopic, zinc oxide , ZnO , field-effect...and R. Neidhard, “Microwave ZnO Thin - Film Transistors ”, IEEE Electron Dev. Lett. 29, 1024 (2008); doi: 10.1109/LED.2008.2001635.
AlGaSb Buffer Layers for Sb-Based Transistors
2010-01-01
transistor ( HEMT ), molecular beam epitaxy (MBE), field-effect transistor (FET), buffer layer INTRODUCTION High-electron-mobility transistors ( HEMTs ) with InAs...monolayers/s. The use of thinner buffer layers reduces molecular beam epitaxial growth time and source consumption. The buffer layers also exhibit...source. In addition, some of the flux from an Sb cell in a molecular beam epitaxy (MBE) system will deposit near the mouth of the cell, eventually
NASA Technical Reports Server (NTRS)
Kleinberg, L. L. (Inventor)
1984-01-01
A bandpass amplifier employing a field effect transistor amplifier first stage is described with a resistive load either a.c. or directly coupled to the non-inverting input of an operational amplifier second stage which is loaded in a Wien Bridge configuration. The bandpass amplifier may be operated with a signal injected into the gate terminal of the field effect transistor and the signal output taken from the output terminal of the operational amplifier. The operational amplifier stage appears as an inductive reactance, capacitive reactance and negative resistance at the non-inverting input of the operational amplifier, all of which appear in parallel with the resistive load of the field effect transistor.
Reconfigurable Complementary Monolayer MoTe2 Field-Effect Transistors for Integrated Circuits.
Larentis, Stefano; Fallahazad, Babak; Movva, Hema C P; Kim, Kyounghwan; Rai, Amritesh; Taniguchi, Takashi; Watanabe, Kenji; Banerjee, Sanjay K; Tutuc, Emanuel
2017-05-23
Transition metal dichalcogenides are of interest for next generation switches, but the lack of low resistance electron and hole contacts in the same material has hindered the development of complementary field-effect transistors and circuits. We demonstrate an air-stable, reconfigurable, complementary monolayer MoTe 2 field-effect transistor encapsulated in hexagonal boron nitride, using electrostatically doped contacts. The introduction of a multigate design with prepatterned bottom contacts allows us to independently achieve low contact resistance and threshold voltage tuning, while also decoupling the Schottky contacts and channel gating. We illustrate a complementary inverter and a p-i-n diode as potential applications.
Interaction of solid organic acids with carbon nanotube field effect transistors
NASA Astrophysics Data System (ADS)
Klinke, Christian; Afzali, Ali; Avouris, Phaedon
2006-10-01
A series of solid organic acids were used to p-dope carbon nanotubes. The extent of doping is shown to be dependent on the pKa value of the acids. Highly fluorinated carboxylic acids and sulfonic acids are very effective in shifting the threshold voltage and making carbon nanotube field effect transistors to be more p-type devices. Weaker acids like phosphonic or hydroxamic acids had less effect. The doping of the devices was accompanied by a reduction of the hysteresis in the transfer characteristics. In-solution doping survives standard fabrication processes and renders p-doped carbon nanotube field effect transistors with good transport characteristics.
Fabrication and electrical properties of MoS2 nanodisc-based back-gated field effect transistors.
Gu, Weixia; Shen, Jiaoyan; Ma, Xiying
2014-02-28
Two-dimensional (2D) molybdenum disulfide (MoS2) is an attractive alternative semiconductor material for next-generation low-power nanoelectronic applications, due to its special structure and large bandgap. Here, we report the fabrication of large-area MoS2 nanodiscs and their incorporation into back-gated field effect transistors (FETs) whose electrical properties we characterize. The MoS2 nanodiscs, fabricated via chemical vapor deposition (CVD), are homogeneous and continuous, and their thickness of around 5 nm is equal to a few layers of MoS2. In addition, we find that the MoS2 nanodisc-based back-gated field effect transistors with nickel electrodes achieve very high performance. The transistors exhibit an on/off current ratio of up to 1.9 × 105, and a maximum transconductance of up to 27 μS (5.4 μS/μm). Moreover, their mobility is as high as 368 cm2/Vs. Furthermore, the transistors have good output characteristics and can be easily modulated by the back gate. The electrical properties of the MoS2 nanodisc transistors are better than or comparable to those values extracted from single and multilayer MoS2 FETs.
Single board system for fuzzy inference
NASA Technical Reports Server (NTRS)
Symon, James R.; Watanabe, Hiroyuki
1991-01-01
The very large scale integration (VLSI) implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. Researchers designed a full custom VLSI inference engine. The chip was fabricated using CMOS technology. The chip consists of 688,000 transistors of which 476,000 are used for RAM memory. The fuzzy logic inference engine board system incorporates the custom designed integrated circuit into a standard VMEbus environment. The Fuzzy Logic system uses Transistor-Transistor Logic (TTL) parts to provide the interface between the Fuzzy chip and a standard, double height VMEbus backplane, allowing the chip to perform application process control through the VMEbus host. High level C language functions hide details of the hardware system interface from the applications level programmer. The first version of the board was installed on a robot at Oak Ridge National Laboratory in January of 1990.
A Low Power Linear Phase Programmable Long Delay Circuit.
Rodriguez-Villegas, Esther; Logesparan, Lojini; Casson, Alexander J
2014-06-01
A novel linear phase programmable delay is being proposed and implemented in a 0.35 μm CMOS process. The delay line consists of N cascaded cells, each of which delays the input signal by Td/N, where Td is the total line delay. The delay generated by each cell is programmable by changing a clock frequency and is also fully independent of the frequency of the input signal. The total delay hence depends only on the chosen clock frequency and the total number of cascaded cells. The minimum clock frequency is limited by the maximum time a voltage signal can effectively be held by an individual cell. The maximum number of cascaded cells will be limited by the effects of accumulated offset due to transistor mismatch, which eventually will affect the operating mode of the individual transistors in a cell. This latter limitation has however been dealt with in the topology by having an offset compensation mechanism that makes possible having a large number of cascaded cells and hence a long resulting delay. The delay line has been designed for scalp-based neural activity analysis that is predominantly in the sub-100 Hz frequency range. For these signals, the delay generated by a 31-cell cascade has been demonstrated to be programmable from 30 ms to 3 s. Measurement results demonstrate a 31 stage, 50 Hz bandwidth, 0.3 s delay that operates from a 1.1 V supply with power consumption of 270 nW.
Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju
2014-12-24
We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Pasadas, Francisco, E-mail: Francisco.Pasadas@uab.cat; Jiménez, David
2015-12-28
Bilayer graphene is a promising material for radio-frequency transistors because its energy gap might result in a better current saturation than the monolayer graphene. Because the great deal of interest in this technology, especially for flexible radio-frequency applications, gaining control of it requires the formulation of appropriate models for the drain current, charge, and capacitance. In this work, we have developed them for a dual-gated bilayer graphene field-effect transistor. A drift-diffusion mechanism for the carrier transport has been considered coupled with an appropriate field-effect model taking into account the electronic properties of the bilayer graphene. Extrinsic resistances have been includedmore » considering the formation of a Schottky barrier at the metal-bilayer graphene interface. The proposed model has been benchmarked against experimental prototype transistors, discussing the main figures of merit targeting radio-frequency applications.« less
Elibol, Oguz H.; Reddy, Bobby; Nair, Pradeep R.; Dorvel, Brian; Butler, Felice; Ahsan, Zahab; Bergstrom, Donald E.; Alam, Muhammad A.; Bashir, Rashid
2010-01-01
We demonstrate electrically addressable localized heating in fluid at the dielectric surface of silicon-on-insulator field-effect transistors via radio-frequency Joule heating of mobile ions in the Debye layer. Measurement of fluid temperatures in close vicinity to surfaces poses a challenge due to the localized nature of the temperature profile. To address this, we developed a localized thermometry technique based on the fluorescence decay rate of covalently attached fluorophores to extract the temperature within 2 nm of any oxide surface. We demonstrate precise spatial control of voltage dependent temperature profiles on the transistor surfaces. Our results introduce a new dimension to present sensing systems by enabling dual purpose silicon transistor-heaters that serve both as field effect sensors as well as temperature controllers that could perform localized bio-chemical reactions in Lab on Chip applications. PMID:19967115
Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications
Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.
2001-01-01
A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.
Current saturation and voltage gain in bilayer graphene field effect transistors.
Szafranek, B N; Fiori, G; Schall, D; Neumaier, D; Kurz, H
2012-03-14
The emergence of graphene with its unique electrical properties has triggered hopes in the electronic devices community regarding its exploitation as a channel material in field effect transistors. Graphene is especially promising for devices working at frequencies in the 100 GHz range. So far, graphene field effect transistors (GFETs) have shown cutoff frequencies up to 300 GHz, while exhibiting poor voltage gains, another important figure of merit for analog high frequency applications. In the present work, we show that the voltage gain of GFETs can be improved significantly by using bilayer graphene, where a band gap is introduced through a vertical electric displacement field. At a displacement field of -1.7 V/nm the bilayer GFETs exhibit an intrinsic voltage gain up to 35, a factor of 6 higher than the voltage gain in corresponding monolayer GFETs. The transconductance, which limits the cutoff frequency of a transistor, is not degraded by the displacement field and is similar in both monolayer and bilayer GFETs. Using numerical simulations based on an atomistic p(z) tight-binding Hamiltonian we demonstrate that this approach can be extended to sub-100 nm gate lengths. © 2012 American Chemical Society
Gate Tunable Transport in Graphene/MoS₂/(Cr/Au) Vertical Field-Effect Transistors.
Nazir, Ghazanfar; Khan, Muhammad Farooq; Aftab, Sikandar; Afzal, Amir Muhammad; Dastgeer, Ghulam; Rehman, Malik Abdul; Seo, Yongho; Eom, Jonghwa
2017-12-28
Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS₂/(Cr/Au) vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr), the electrical transport in our Gr/MoS₂/(Cr/Au) vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS₂ can be modified by back-gate voltage and the current bias. Vertical resistance (R vert ) of a Gr/MoS₂/(Cr/Au) transistor is compared with planar resistance (R planar ) of a conventional lateral MoS₂ field-effect transistor. We have also studied electrical properties for various thicknesses of MoS₂ channels in both vertical and lateral transistors. As the thickness of MoS₂ increases, R vert increases, but R planar decreases. The increase of R vert in the thicker MoS₂ film is attributed to the interlayer resistance in the vertical direction. However, R planar shows a lower value for a thicker MoS₂ film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.
Use of cermet thin film resistors with nitride passivated metal insulator field effect transistor
NASA Technical Reports Server (NTRS)
Brown, G. A.; Harrap, V.
1971-01-01
Film deposition of cermet resistors on same chip with metal nitride oxide silicon field effect transistors permits protection of contamination sensitive active devices from contaminants produced in cermet deposition and definition processes. Additional advantages include lower cost, greater reliability, and space savings.
NASA Astrophysics Data System (ADS)
Kim, Do-Kyung; Lee, Gyu-Jeong; Lee, Jae-Hyun; Kim, Min-Hoi; Bae, Jin-Hyuk
2018-05-01
We suggest a viable surface control method to improve the electrical properties of organic nonvolatile memory transistors. For viable surface control, the surface of the ferroelectric insulator in the memory field-effect transistors was modified using a smooth-contact-curing process. For the modification of the ferroelectric polymer, during the curing of the ferroelectric insulators, the smooth surface of a soft elastomer contacts intimately with the ferroelectric surface. This smooth-contact-curing process reduced the surface roughness of the ferroelectric insulator without degrading its ferroelectric properties. The reduced roughness of the ferroelectric insulator increases the mobility of the organic field-effect transistor by approximately eight times, which results in a high memory on–off ratio and a low-voltage reading operation.
Cui, Nan; Ren, Hang; Tang, Qingxin; Zhao, Xiaoli; Tong, Yanhong; Hu, Wenping; Liu, Yichun
2018-02-22
A fully transparent conformal organic thin-film field-effect transistor array is demonstrated based on a photolithography-compatible ultrathin metallic grid gate electrode and a solution-processed C 8 -BTBT film. The resulting organic field-effect transistor array exhibits a high optical transparency of >80% over the visible spectrum, mobility up to 2 cm 2 V -1 s -1 , on/off ratio of 10 5 -10 6 , switching current of >0.1 mA, and excellent light stability. The transparent conformal transistor array is demonstrated to adhere well to flat and curved LEDs as front driving. These results present promising applications of the solution-processed wide-bandgap organic semiconductor thin films in future large-scale transparent conformal active-matrix displays.
NASA Technical Reports Server (NTRS)
MacLeod, Todd, C.; Ho, Fat Duen
2006-01-01
All present ferroelectric transistors have been made on the micrometer scale. Existing models of these devices do not take into account effects of nanoscale ferroelectric transistors. Understanding the characteristics of these nanoscale devices is important in developing a strategy for building and using future devices. This paper takes an existing microscale ferroelectric field effect transistor (FFET) model and adds effects that become important at a nanoscale level, including electron velocity saturation and direct tunneling. The new model analyzed FFETs ranging in length from 40,000 nanometers to 4 nanometers and ferroelectric thickness form 200 nanometers to 1 nanometer. The results show that FFETs can operate on the nanoscale but have some undesirable characteristics at very small dimensions.
A III-V nanowire channel on silicon for high-performance vertical transistors.
Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi
2012-08-09
Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.
Hsu, Ben B Y; Seifter, Jason; Takacs, Christopher J; Zhong, Chengmei; Tseng, Hsin-Rong; Samuel, Ifor D W; Namdas, Ebinazar B; Bazan, Guillermo C; Huang, Fei; Cao, Yong; Heeger, Alan J
2013-03-26
Polymer light emitting field effect transistors are a class of light emitting devices that reveal interesting device physics. Device performance can be directly correlated to the most fundamental polymer science. Control over surface properties of the transistor dielectric can dramatically change the polymer morphology, introducing ordered phase. Electronic properties such as carrier mobility and injection efficiency on the interface can be promoted by ordered nanofibers in the polymer. Moreover, by controlling space charge in the polymer interface, the recombination zone can be spatially extended and thereby enhance the optical output.
Analytic model for low-frequency noise in nanorod devices.
Lee, Jungil; Yu, Byung Yong; Han, Ilki; Choi, Kyoung Jin; Ghibaudo, Gerard
2008-10-01
In this work analytic model for generation of excess low-frequency noise in nanorod devices such as field-effect transistors are developed. In back-gate field-effect transistors where most of the surface area of the nanorod is exposed to the ambient, the surface states could be the major noise source via random walk of electrons for the low-frequency or 1/f noise. In dual gate transistors, the interface states and oxide traps can compete with each other as the main noise source via random walk and tunneling, respectively.
Conjugated polymers and their use in optoelectronic devices
Marks, Tobin J.; Guo, Xugang; Zhou, Nanjia; Chang, Robert P. H.; Drees, Martin; Facchetti, Antonio
2016-10-18
The present invention relates to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The present compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The present compounds can have good solubility in common solvents enabling device fabrication via solution processes.
Adhikari, Jwala M; Gadinski, Matthew R; Li, Qi; Sun, Kaige G; Reyes-Martinez, Marcos A; Iagodkine, Elissei; Briseno, Alejandro L; Jackson, Thomas N; Wang, Qing; Gomez, Enrique D
2016-12-01
A novel photopatternable high-k fluoropolymer, poly(vinylidene fluoride-bromotrifluoroethylene) P(VDF-BTFE), with a dielectric constant (k) between 8 and 11 is demonstrated in thin-film transistors. Crosslinking P(VDF-BTFE) reduces energetic disorder at the dielectric-semiconductor interface by controlling the chain conformations of P(VDF-BTFE), thereby leading to approximately a threefold enhancement in the charge mobility of rubrene single-crystal field-effect transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
High on/off ratios in bilayer graphene field effect transistors realized by surface dopants.
Szafranek, B N; Schall, D; Otto, M; Neumaier, D; Kurz, H
2011-07-13
The unique property of bilayer graphene to show a band gap tunable by external electrical fields enables a variety of different device concepts with novel functionalities for electronic, optoelectronic, and sensor applications. So far the operation of bilayer graphene-based field effect transistors requires two individual gates to vary the channel's conductance and to create a band gap. In this paper, we report on a method to increase the on/off ratio in single gated bilayer graphene field effect transistors by adsorbate doping. The adsorbate dopants on the upper side of the graphene establish a displacement field perpendicular to the graphene surface breaking the inversion symmetry of the two graphene layers. Low-temperature measurements indicate that the increased on/off ratio is caused by the opening of a mobility gap.
Berger, Andrew J; Page, Michael R; Jacob, Jan; Young, Justin R; Lewis, Jim; Wenzel, Lothar; Bhallamudi, Vidya P; Johnston-Halperin, Ezekiel; Pelekhov, Denis V; Hammel, P Chris
2014-12-01
Understanding the complex properties of electronic and spintronic devices at the micro- and nano-scale is a topic of intense current interest as it becomes increasingly important for scientific progress and technological applications. In operando characterization of such devices by scanning probe techniques is particularly well-suited for the microscopic study of these properties. We have developed a scanning probe microscope (SPM) which is capable of both standard force imaging (atomic, magnetic, electrostatic) and simultaneous electrical transport measurements. We utilize flexible and inexpensive FPGA (field-programmable gate array) hardware and a custom software framework developed in National Instrument's LabVIEW environment to perform the various aspects of microscope operation and device measurement. The FPGA-based approach enables sensitive, real-time cantilever frequency-shift detection. Using this system, we demonstrate electrostatic force microscopy of an electrically biased graphene field-effect transistor device. The combination of SPM and electrical transport also enables imaging of the transport response to a localized perturbation provided by the scanned cantilever tip. Facilitated by the broad presence of LabVIEW in the experimental sciences and the openness of our software solution, our system permits a wide variety of combined scanning and transport measurements by providing standardized interfaces and flexible access to all aspects of a measurement (input and output signals, and processed data). Our system also enables precise control of timing (synchronization of scanning and transport operations) and implementation of sophisticated feedback protocols, and thus should be broadly interesting and useful to practitioners in the field.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Berger, Andrew J., E-mail: berger.156@osu.edu; Page, Michael R.; Young, Justin R.
Understanding the complex properties of electronic and spintronic devices at the micro- and nano-scale is a topic of intense current interest as it becomes increasingly important for scientific progress and technological applications. In operando characterization of such devices by scanning probe techniques is particularly well-suited for the microscopic study of these properties. We have developed a scanning probe microscope (SPM) which is capable of both standard force imaging (atomic, magnetic, electrostatic) and simultaneous electrical transport measurements. We utilize flexible and inexpensive FPGA (field-programmable gate array) hardware and a custom software framework developed in National Instrument's LabVIEW environment to perform themore » various aspects of microscope operation and device measurement. The FPGA-based approach enables sensitive, real-time cantilever frequency-shift detection. Using this system, we demonstrate electrostatic force microscopy of an electrically biased graphene field-effect transistor device. The combination of SPM and electrical transport also enables imaging of the transport response to a localized perturbation provided by the scanned cantilever tip. Facilitated by the broad presence of LabVIEW in the experimental sciences and the openness of our software solution, our system permits a wide variety of combined scanning and transport measurements by providing standardized interfaces and flexible access to all aspects of a measurement (input and output signals, and processed data). Our system also enables precise control of timing (synchronization of scanning and transport operations) and implementation of sophisticated feedback protocols, and thus should be broadly interesting and useful to practitioners in the field.« less
Hafnium transistor design for neural interfacing.
Parent, David W; Basham, Eric J
2008-01-01
A design methodology is presented that uses the EKV model and the g(m)/I(D) biasing technique to design hafnium oxide field effect transistors that are suitable for neural recording circuitry. The DC gain of a common source amplifier is correlated to the structural properties of a Field Effect Transistor (FET) and a Metal Insulator Semiconductor (MIS) capacitor. This approach allows a transistor designer to use a design flow that starts with simple and intuitive 1-D equations for gain that can be verified in 1-D MIS capacitor TCAD simulations, before final TCAD process verification of transistor properties. The DC gain of a common source amplifier is optimized by using fast 1-D simulations and using slower, complex 2-D simulations only for verification. The 1-D equations are used to show that the increased dielectric constant of hafnium oxide allows a higher DC gain for a given oxide thickness. An additional benefit is that the MIS capacitor can be employed to test additional performance parameters important to an open gate transistor such as dielectric stability and ionic penetration.
Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis
NASA Technical Reports Server (NTRS)
Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.
2006-01-01
Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.
NASA Astrophysics Data System (ADS)
Morita, Yukinori; Mori, Takahiro; Migita, Shinji; Mizubayashi, Wataru; Tanabe, Akihito; Fukuda, Koichi; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shin-ichi; Liu, Yongxun; Masahara, Meishoku; Ota, Hiroyuki
2014-12-01
The performance of parallel electric field tunnel field-effect transistors (TFETs), in which band-to-band tunneling (BTBT) was initiated in-line to the gate electric field was evaluated. The TFET was fabricated by inserting an epitaxially-grown parallel-plate tunnel capacitor between heavily doped source wells and gate insulators. Analysis using a distributed-element circuit model indicated there should be a limit of the drain current caused by the self-voltage-drop effect in the ultrathin channel layer.
PbSe Nanocrystal Solids for n- and p-Channel Thin Film Field-Effect Transistors
NASA Astrophysics Data System (ADS)
Talapin, Dmitri V.; Murray, Christopher B.
2005-10-01
Initially poorly conducting PbSe nanocrystal solids (quantum dot arrays or superlattices) can be chemically ``activated'' to fabricate n- and p-channel field effect transistors with electron and hole mobilities of 0.9 and 0.2 square centimeters per volt-second, respectively; with current modulations of about 103 to 104; and with current density approaching 3 × 104 amperes per square centimeter. Chemical treatments engineer the interparticle spacing, electronic coupling, and doping while passivating electronic traps. These nanocrystal field-effect transistors allow reversible switching between n- and p-transport, providing options for complementary metal oxide semiconductor circuits and enabling a range of low-cost, large-area electronic, optoelectronic, thermoelectric, and sensing applications.
Catalytic activity of enzymes immobilized on AlGaN /GaN solution gate field-effect transistors
NASA Astrophysics Data System (ADS)
Baur, B.; Howgate, J.; von Ribbeck, H.-G.; Gawlina, Y.; Bandalo, V.; Steinhoff, G.; Stutzmann, M.; Eickhoff, M.
2006-10-01
Enzyme-modified field-effect transistors (EnFETs) were prepared by immobilization of penicillinase on AlGaN /GaN solution gate field-effect transistors. The influence of the immobilization process on enzyme functionality was analyzed by comparing covalent immobilization and physisorption. Covalent immobilization by Schiff base formation on GaN surfaces modified with an aminopropyltriethoxysilane monolayer exhibits high reproducibility with respect to the enzyme/substrate affinity. Reductive amination of the Schiff base bonds to secondary amines significantly increases the stability of the enzyme layer. Electronic characterization of the EnFET response to penicillin G indicates that covalent immobilization leads to the formation of an enzyme (sub)monolayer.
Ultrathin strain-gated field effect transistor based on In-doped ZnO nanobelts
NASA Astrophysics Data System (ADS)
Zhang, Zheng; Du, Junli; Li, Bing; Zhang, Shuhao; Hong, Mengyu; Zhang, Xiaomei; Liao, Qingliang; Zhang, Yue
2017-08-01
In this work, we fabricated a strain-gated piezoelectric transistor based on single In-doped ZnO nanobelt with ±(0001) top/bottom polar surfaces. In the vertical structured transistor, the Pt tip of the AFM and Au film are used as source and drain electrode. The electrical transport performance of the transistor is gated by compressive strains. The working mechanism is attributed to the Schottky barrier height changed under the coupling effect of piezoresistive and piezoelectric. Uniquely, the transistor turns off under the compressive stress of 806 nN. The strain-gated transistor is likely to have important applications in high resolution mapping device and MEMS devices.
Graphene-based flexible and stretchable thin film transistors.
Yan, Chao; Cho, Jeong Ho; Ahn, Jong-Hyun
2012-08-21
Graphene has been attracting wide attention owing to its superb electronic, thermal and mechanical properties. These properties allow great applications in the next generation of optoelectronics, where flexibility and stretchability are essential. In this context, the recent development of graphene growth/transfer and its applications in field-effect transistors are involved. In particular, we provide a detailed review on the state-of-the-art of graphene-based flexible and stretchable thin film transistors. We address the principles of fabricating high-speed graphene analog transistors and the key issues of producing an array of graphene-based transistors on flexible and stretchable substrates. It provides a platform for future work to focus on understanding and realizing high-performance graphene-based transistors.
Cheng-Yin Wang; Canek Fuentes-Hernandez; Jen-Chieh Liu; Amir Dindar; Sangmoo Choi; Jeffrey P. Youngblood; Robert J. Moon; Bernard Kippelen
2015-01-01
We report on the performance and the characterization of top-gate organic field-effect transistors (OFETs), comprising a bilayer gate dielectric of CYTOP/ Al2O3 and a solution-processed semiconductor layer made of a blend of TIPS-pentacene:PTAA, fabricated on recyclable cellulose nanocrystal−glycerol (CNC/glycerol...
An Organic Vertical Field-Effect Transistor with Underside-Doped Graphene Electrodes.
Kim, Jong Su; Kim, Beom Joon; Choi, Young Jin; Lee, Moo Hyung; Kang, Moon Sung; Cho, Jeong Ho
2016-06-01
High-performance vertical field-effect transistors are developed, which are based on graphene electrodes doped using the underside doping method. The underside doping method enables effective tuning of the graphene work function while maintaining the surface properties of the pristine graphene. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Organic field-effect transistors using single crystals.
Hasegawa, Tatsuo; Takeya, Jun
2009-04-01
Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.
Organic field-effect transistors using single crystals
Hasegawa, Tatsuo; Takeya, Jun
2009-01-01
Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for ‘plastic electronics’. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. PMID:27877287
Hardware realization of an SVM algorithm implemented in FPGAs
NASA Astrophysics Data System (ADS)
Wiśniewski, Remigiusz; Bazydło, Grzegorz; Szcześniak, Paweł
2017-08-01
The paper proposes a technique of hardware realization of a space vector modulation (SVM) of state function switching in matrix converter (MC), oriented on the implementation in a single field programmable gate array (FPGA). In MC the SVM method is based on the instantaneous space-vector representation of input currents and output voltages. The traditional computation algorithms usually involve digital signal processors (DSPs) which consumes the large number of power transistors (18 transistors and 18 independent PWM outputs) and "non-standard positions of control pulses" during the switching sequence. Recently, hardware implementations become popular since computed operations may be executed much faster and efficient due to nature of the digital devices (especially concurrency). In the paper, we propose a hardware algorithm of SVM computation. In opposite to the existing techniques, the presented solution applies COordinate Rotation DIgital Computer (CORDIC) method to solve the trigonometric operations. Furthermore, adequate arithmetic modules (that is, sub-devices) used for intermediate calculations, such as code converters or proper sectors selectors (for output voltages and input current) are presented in detail. The proposed technique has been implemented as a design described with the use of Verilog hardware description language. The preliminary results of logic implementation oriented on the Xilinx FPGA (particularly, low-cost device from Artix-7 family from Xilinx was used) are also presented.
Highly Crumpled All-Carbon Transistors for Brain Activity Recording.
Yang, Long; Zhao, Yan; Xu, Wenjing; Shi, Enzheng; Wei, Wenjing; Li, Xinming; Cao, Anyuan; Cao, Yanping; Fang, Ying
2017-01-11
Neural probes based on graphene field-effect transistors have been demonstrated. Yet, the minimum detectable signal of graphene transistor-based probes is inversely proportional to the square root of the active graphene area. This fundamentally limits the scaling of graphene transistor-based neural probes for improved spatial resolution in brain activity recording. Here, we address this challenge using highly crumpled all-carbon transistors formed by compressing down to 16% of its initial area. All-carbon transistors, chemically synthesized by seamless integration of graphene channels and hybrid graphene/carbon nanotube electrodes, maintained structural integrity and stable electronic properties under large mechanical deformation, whereas stress-induced cracking and junction failure occurred in conventional graphene/metal transistors. Flexible, highly crumpled all-carbon transistors were further verified for in vivo recording of brain activity in rats. These results highlight the importance of advanced material and device design concepts to make improvements in neuroelectronics.
Method for double-sided processing of thin film transistors
Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang
2008-04-08
This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia
2018-06-15
Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.
NASA Astrophysics Data System (ADS)
Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia
2018-06-01
Top-gated and bottom-gated transistors with multilayer MoS2 channel fully encapsulated by stacked Al2O3/HfO2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on–off current ratio of 108, high field-effect mobility of 102 cm2 V‑1 s‑1, and low subthreshold swing of 93 mV dec–1. Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10‑3–10‑2 V MV–1 cm–1 after 6 MV cm‑1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS2 channel fully encapsulated by stacked Al2O3/HfO2 is a promising way to fabricate high-performance ML MoS2 field-effect transistors for practical electron device applications.
Noda, Kei; Wada, Yasuo; Toyabe, Toru
2015-10-28
Effects of contact-area-limited doping for pentacene thin-film transistors with a bottom-gate, top-contact configuration were investigated. The increase in the drain current and the effective field-effect mobility was achieved by preparing hole-doped layers underneath the gold contact electrodes by coevaporation of pentacene and 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F4TCNQ), confirmed by using a thin-film organic transistor advanced simulator (TOTAS) incorporating Schottky contact with a thermionic field emission (TFE) model. Although the simulated electrical characteristics fit the experimental results well only in the linear regime of the transistor operation, the barrier height for hole injection and the gate-voltage-dependent hole mobility in the pentacene transistors were evaluated with the aid of the device simulation. This experimental data analysis with the simulation indicates that the highly-doped semiconducting layers prepared in the contact regions can enhance the charge carrier injection into the active semiconductor layer and concurrent trap filling in the transistor channel, caused by the mitigation of a Schottky energy barrier. This study suggests that both the contact-area-limited doping and the device simulation dealing with Schottky contact are indispensable in designing and developing high-performance organic thin-film transistors.
Reconfigurable logic via gate controlled domain wall trajectory in magnetic network structure
Murapaka, C.; Sethi, P.; Goolaup, S.; Lew, W. S.
2016-01-01
An all-magnetic logic scheme has the advantages of being non-volatile and energy efficient over the conventional transistor based logic devices. In this work, we present a reconfigurable magnetic logic device which is capable of performing all basic logic operations in a single device. The device exploits the deterministic trajectory of domain wall (DW) in ferromagnetic asymmetric branch structure for obtaining different output combinations. The programmability of the device is achieved by using a current-controlled magnetic gate, which generates a local Oersted field. The field generated at the magnetic gate influences the trajectory of the DW within the structure by exploiting its inherent transverse charge distribution. DW transformation from vortex to transverse configuration close to the output branch plays a pivotal role in governing the DW chirality and hence the output. By simply switching the current direction through the magnetic gate, two universal logic gate functionalities can be obtained in this device. Using magnetic force microscopy imaging and magnetoresistance measurements, all basic logic functionalities are demonstrated. PMID:26839036
Phase-locked loop based on nanoelectromechanical resonant-body field effect transistor
NASA Astrophysics Data System (ADS)
Bartsch, S. T.; Rusu, A.; Ionescu, A. M.
2012-10-01
We demonstrate the room-temperature operation of a silicon nanoelectromechanical resonant-body field effect transistor (RB-FET) embedded into phase-locked loop (PLL). The very-high frequency resonator uses on-chip electrostatic actuation and transistor-based displacement detection. The heterodyne frequency down-conversion based on resistive FET mixing provides a loop feedback signal with high signal-to-noise ratio. We identify key parameters for PLL operation, and analyze the performance of the RB-FET at the system level. Used as resonant mass detector, the experimental frequency stability in the ppm-range translates into sub atto-gram (10-18 g) sensitivity in high vacuum. The feedback and control system are generic and may be extended to other mechanical resonators with transistor properties, such as graphene membranes and carbon nanotubes.
NASA Astrophysics Data System (ADS)
Butko, A. V.; Butko, V. Yu.; Lebedev, S. P.; Lebedev, A. A.; Kumzerov, Yu. A.
2017-10-01
For the creation of new promising chemical sensors, it is very important to study the influence of the interface between graphene and aqueous solutions of acids and alkalis on the transistor characteristics of graphene. Transistor structures on the basis of graphene grown by thermal decomposition of silicon carbide were created and studied. For the interface of graphene with aqueous solutions of acetic acid and potassium hydroxide in the transistor geometry, with a variation in the gate-to-source voltage, the field effect corresponding to the hole type of charge carriers in graphene was observed. It is established that an increase in the concentration of molecular ions in these solutions leads to an increase in the dependence of the resistance of the transistor on the gate voltage.
Atom transistor from the point of view of nonequilibrium dynamics
NASA Astrophysics Data System (ADS)
Zhang, Z.; Dunjko, V.; Olshanii, M.
2015-12-01
We analyze the atom field-effect transistor scheme (Stickney et al 2007 Phys. Rev. A 75 013608) using the standard tools of quantum and classical nonequlilibrium dynamics. We first study the correspondence between the quantum and the mean-field descriptions of this system by computing, both ab initio and by using their mean-field analogs, the deviations from the Eigenstate Thermalization Hypothesis, quantum fluctuations, and the density of states. We find that, as far as the quantities that interest us, the mean-field model can serve as a semi-classical emulator of the quantum system. Then, using the mean-field model, we interpret the point of maximal output signal in our transistor as the onset of ergodicity—the point where the system becomes, in principle, able to attain the thermal values of the former integrals of motion, albeit not being fully thermalized yet.
Mao, Ling-Feng; Ning, Huansheng; Li, Xijun
2015-12-01
We report theoretical study of the effects of energy relaxation on the tunneling current through the oxide layer of a two-dimensional graphene field-effect transistor. In the channel, when three-dimensional electron thermal motion is considered in the Schrödinger equation, the gate leakage current at a given oxide field largely increases with the channel electric field, electron mobility, and energy relaxation time of electrons. Such an increase can be especially significant when the channel electric field is larger than 1 kV/cm. Numerical calculations show that the relative increment of the tunneling current through the gate oxide will decrease with increasing the thickness of oxide layer when the oxide is a few nanometers thick. This highlights that energy relaxation effect needs to be considered in modeling graphene transistors.
Lee, Tae Hoon; Kim, Kwanpyo; Kim, Gwangwoo; ...
2017-02-27
Organic field-effect transistors have attracted much attention because of their potential use in low-cost, large-area, flexible electronics. High-performance organic transistors require a low density of grain boundaries in their organic films and a decrease in the charge trap density at the semiconductor–dielectric interface for efficient charge transport. In this respect, the role of the dielectric material is crucial because it primarily determines the growth of the film and the interfacial trap density. Here, we demonstrate the use of chemical vapor-deposited hexagonal boron nitride (CVD h-BN) as a scalable growth template/dielectric for high-performance organic field-effect transistors. The field-effect transistors based onmore » C60 films grown on single-layer CVD h-BN exhibit an average mobility of 1.7 cm 2 V –1 s –1 and a maximal mobility of 2.9 cm 2 V –1 s –1 with on/off ratios of 10 7. The structural and morphology analysis shows that the epitaxial, two-dimensional growth of C 60 on CVD h-BN is mainly responsible for the superior charge transport behavior. In conclusion, we believe that CVD h-BN can serve as a growth template for various organic semiconductors, allowing the development of large-area, high-performance flexible electronics.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lee, Tae Hoon; Kim, Kwanpyo; Kim, Gwangwoo
Organic field-effect transistors have attracted much attention because of their potential use in low-cost, large-area, flexible electronics. High-performance organic transistors require a low density of grain boundaries in their organic films and a decrease in the charge trap density at the semiconductor–dielectric interface for efficient charge transport. In this respect, the role of the dielectric material is crucial because it primarily determines the growth of the film and the interfacial trap density. Here, we demonstrate the use of chemical vapor-deposited hexagonal boron nitride (CVD h-BN) as a scalable growth template/dielectric for high-performance organic field-effect transistors. The field-effect transistors based onmore » C60 films grown on single-layer CVD h-BN exhibit an average mobility of 1.7 cm 2 V –1 s –1 and a maximal mobility of 2.9 cm 2 V –1 s –1 with on/off ratios of 10 7. The structural and morphology analysis shows that the epitaxial, two-dimensional growth of C 60 on CVD h-BN is mainly responsible for the superior charge transport behavior. In conclusion, we believe that CVD h-BN can serve as a growth template for various organic semiconductors, allowing the development of large-area, high-performance flexible electronics.« less
Patterning technology for solution-processed organic crystal field-effect transistors
Li, Yun; Sun, Huabin; Shi, Yi; Tsukagoshi, Kazuhito
2014-01-01
Organic field-effect transistors (OFETs) are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recentdevelopment in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed. PMID:27877656
NASA Astrophysics Data System (ADS)
Chang, Ingram Yin-ku; Chen, Chun-Heng; Chiu, Fu-Chien; Lee, Joseph Ya-min
2007-11-01
Metal-oxide-semiconductor field-effect transistors with CeO2/HfO2 laminated gate dielectrics were fabricated. The transistors have a subthreshold slope of 74.9mV/decade. The interfacial properties were measured using gated diodes. The surface state density Dit was 9.78×1011cm-2eV-1. The surface-recombination velocity (s0) and the minority carrier lifetime in the field-induced depletion region (τ0,FIJ) measured from the gated diode were about 6.11×103cm /s and 1.8×10-8s, respectively. The effective capture cross section of surface state (σs) extracted using the subthreshold-swing measurement and the gated diode was about 7.69×10-15cm2. The effective electron mobility of CeO2/HfO2 laminated gated transistors was determined to be 212cm2/Vs.
Mobility overestimation due to gated contacts in organic field-effect transistors
Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.
2016-01-01
Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271
Light-Stimulated Synaptic Devices Utilizing Interfacial Effect of Organic Field-Effect Transistors.
Dai, Shilei; Wu, Xiaohan; Liu, Dapeng; Chu, Yingli; Wang, Kai; Yang, Ben; Huang, Jia
2018-06-14
Synaptic transistors stimulated by light waves or photons may offer advantages to the devices, such as wide bandwidth, ultrafast signal transmission, and robustness. However, previously reported light-stimulated synaptic devices generally require special photoelectric properties from the semiconductors and sophisticated device's architectures. In this work, a simple and effective strategy for fabricating light-stimulated synaptic transistors is provided by utilizing interface charge trapping effect of organic field-effect transistors (OFETs). Significantly, our devices exhibited highly synapselike behaviors, such as excitatory postsynaptic current (EPSC) and pair-pulse facilitation (PPF), and presented memory and learning ability. The EPSC decay, PPF curves, and forgetting behavior can be well expressed by mathematical equations for synaptic devices, indicating that interfacial charge trapping effect of OFETs can be utilized as a reliable strategy to realize organic light-stimulated synapses. Therefore, this work provides a simple and effective strategy for fabricating light-stimulated synaptic transistors with both memory and learning ability, which enlightens a new direction for developing neuromorphic devices.
Fused thiophene-based conjugated polymers and their use in optoelectronic devices
Facchetti, Antonio; Marks, Tobin J; Takai, Atsuro; Seger, Mark; Chen, Zhihua
2015-11-03
The present teachings relate to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The disclosed compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The disclosed compounds can have good solubility in common solvents enabling device fabrication via solution processes.
Triple-mode single-transistor graphene amplifier and its applications.
Yang, Xuebei; Liu, Guanxiong; Balandin, Alexander A; Mohanram, Kartik
2010-10-26
We propose and experimentally demonstrate a triple-mode single-transistor graphene amplifier utilizing a three-terminal back-gated single-layer graphene transistor. The ambipolar nature of electronic transport in graphene transistors leads to increased amplifier functionality as compared to amplifiers built with unipolar semiconductor devices. The ambipolar graphene transistors can be configured as n-type, p-type, or hybrid-type by changing the gate bias. As a result, the single-transistor graphene amplifier can operate in the common-source, common-drain, or frequency multiplication mode, respectively. This in-field controllability of the single-transistor graphene amplifier can be used to realize the modulation necessary for phase shift keying and frequency shift keying, which are widely used in wireless applications. It also offers new opportunities for designing analog circuits with simpler structure and higher integration densities for communications applications.
Single event burnout sensitivity of embedded field effect transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Koga, R.; Crain, S.H.; Crawford, K.B.
Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described.
Single event burnout sensitivity of embedded field effect transistors
NASA Astrophysics Data System (ADS)
Koga, R.; Crain, S. H.; Crawford, K. B.; Yu, P.; Gordon, M. J.
1999-12-01
Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described.
An innovative large scale integration of silicon nanowire-based field effect transistors
NASA Astrophysics Data System (ADS)
Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.
2018-05-01
Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.
Graphene-graphite oxide field-effect transistors.
Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc
2012-03-14
Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society
pH-sensitive ion-selective field-effect transistor with zirconium dioxide film
DOE Office of Scientific and Technical Information (OSTI.GOV)
Vlasov, Yu.G.; Bratov, A.V.; Tarantov, Yu.A.
1988-09-20
Miniature semiconductor pH sensors for liquid media, i.e., ion-selective field-effect transistors (ISFETs), are silicon field-effect transistors with a two-layer dielectric consisting of a passivating SiO/sub 2/ layer adjoining the silicon and a layer of pH-sensitive material in contact with the electrolyte solution to be tested. This study was devoted to the characteristics of pH-sensitive ISFETs with ZrO/sub 2/ films. The base was p-type silicon (KDB-10) with a (100) surface orientation. A ZrO/sub 2/ layer 10-50 nm thick was applied over the SiO/sub 2/ layer by electron-beam deposition. The measurements were made in aqueous KNO/sub 3/ or KCl solutions.
A Single Polyaniline Nanofiber Field Effect Transistor and Its Gas Sensing Mechanisms
Chen, Dajing; Lei, Sheng; Chen, Yuquan
2011-01-01
A single polyaniline nanofiber field effect transistor (FET) gas sensor fabricated by means of electrospinning was investigated to understand its sensing mechanisms and optimize its performance. We studied the morphology, field effect characteristics and gas sensitivity of conductive nanofibers. The fibers showed Schottky and Ohmic contacts based on different electrode materials. Higher applied gate voltage contributes to an increase in gas sensitivity. The nanofiber transistor showed a 7% reversible resistance change to 1 ppm NH3 with 10 V gate voltage. The FET characteristics of the sensor when exposed to different gas concentrations indicate that adsorption of NH3 molecules reduces the carrier mobility in the polyaniline nanofiber. As such, nanofiber-based sensors could be promising for environmental and industrial applications. PMID:22163969
NASA Astrophysics Data System (ADS)
Cao, Jingchen; Peng, Songang; Liu, Wei; Wu, Quantan; Li, Ling; Geng, Di; Yang, Guanhua; Ji, Zhouyu; Lu, Nianduan; Liu, Ming
2018-02-01
We present a continuous surface-potential-based compact model for molybdenum disulfide (MoS2) field effect transistors based on the multiple trapping release theory and the variable-range hopping theory. We also built contact resistance and velocity saturation models based on the analytical surface potential. This model is verified with experimental data and is able to accurately predict the temperature dependent behavior of the MoS2 field effect transistor. Our compact model is coded in Verilog-A, which can be implemented in a computer-aided design environment. Finally, we carried out an active matrix display simulation, which suggested that the proposed model can be successfully applied to circuit design.
Photon-triggered nanowire transistors
NASA Astrophysics Data System (ADS)
Kim, Jungkil; Lee, Hoo-Cheol; Kim, Kyoung-Ho; Hwang, Min-Soo; Park, Jin-Sung; Lee, Jung Min; So, Jae-Pil; Choi, Jae-Hyuck; Kwon, Soon-Hong; Barrelet, Carl J.; Park, Hong-Gyu
2017-10-01
Photon-triggered electronic circuits have been a long-standing goal of photonics. Recent demonstrations include either all-optical transistors in which photons control other photons or phototransistors with the gate response tuned or enhanced by photons. However, only a few studies report on devices in which electronic currents are optically switched and amplified without an electrical gate. Here we show photon-triggered nanowire (NW) transistors, photon-triggered NW logic gates and a single NW photodetection system. NWs are synthesized with long crystalline silicon (CSi) segments connected by short porous silicon (PSi) segments. In a fabricated device, the electrical contacts on both ends of the NW are connected to a single PSi segment in the middle. Exposing the PSi segment to light triggers a current in the NW with a high on/off ratio of >8 × 106. A device that contains two PSi segments along the NW can be triggered using two independent optical input signals. Using localized pump lasers, we demonstrate photon-triggered logic gates including AND, OR and NAND gates. A photon-triggered NW transistor of diameter 25 nm with a single 100 nm PSi segment requires less than 300 pW of power. Furthermore, we take advantage of the high photosensitivity and fabricate a submicrometre-resolution photodetection system. Photon-triggered transistors offer a new venue towards multifunctional device applications such as programmable logic elements and ultrasensitive photodetectors.
Photon-triggered nanowire transistors.
Kim, Jungkil; Lee, Hoo-Cheol; Kim, Kyoung-Ho; Hwang, Min-Soo; Park, Jin-Sung; Lee, Jung Min; So, Jae-Pil; Choi, Jae-Hyuck; Kwon, Soon-Hong; Barrelet, Carl J; Park, Hong-Gyu
2017-10-01
Photon-triggered electronic circuits have been a long-standing goal of photonics. Recent demonstrations include either all-optical transistors in which photons control other photons or phototransistors with the gate response tuned or enhanced by photons. However, only a few studies report on devices in which electronic currents are optically switched and amplified without an electrical gate. Here we show photon-triggered nanowire (NW) transistors, photon-triggered NW logic gates and a single NW photodetection system. NWs are synthesized with long crystalline silicon (CSi) segments connected by short porous silicon (PSi) segments. In a fabricated device, the electrical contacts on both ends of the NW are connected to a single PSi segment in the middle. Exposing the PSi segment to light triggers a current in the NW with a high on/off ratio of >8 × 10 6 . A device that contains two PSi segments along the NW can be triggered using two independent optical input signals. Using localized pump lasers, we demonstrate photon-triggered logic gates including AND, OR and NAND gates. A photon-triggered NW transistor of diameter 25 nm with a single 100 nm PSi segment requires less than 300 pW of power. Furthermore, we take advantage of the high photosensitivity and fabricate a submicrometre-resolution photodetection system. Photon-triggered transistors offer a new venue towards multifunctional device applications such as programmable logic elements and ultrasensitive photodetectors.
High-performance carbon nanotube thin-film transistors on flexible paper substrates
DOE Office of Scientific and Technical Information (OSTI.GOV)
Liu, Na; Yun, Ki Nam; Yu, Hyun-Yong
Single-walled carbon nanotubes (SWCNTs) are promising materials as active channels for flexible transistors owing to their excellent electrical and mechanical properties. However, flexible SWCNT transistors have never been realized on paper substrates, which are widely used, inexpensive, and recyclable. In this study, we fabricated SWCNT thin-film transistors on photo paper substrates. The devices exhibited a high on/off current ratio of more than 10{sup 6} and a field-effect mobility of approximately 3 cm{sup 2}/V·s. The proof-of-concept demonstration indicates that SWCNT transistors on flexible paper substrates could be applied as low-cost and recyclable flexible electronics.
A 50Mbit/Sec. CMOS Video Linestore System
NASA Astrophysics Data System (ADS)
Jeung, Yeun C.
1988-10-01
This paper reports the architecture, design and test results of a CMOS single chip programmable video linestore system which has 16-bit data words with 1024 bit depth. The delay is fully programmable from 9 to 1033 samples by a 10 bit binary control word. The large 16 bit data word width makes the chip useful for a wide variety of digital video signal processing applications such as DPCM coding, High-Definition TV, and Video scramblers/descramblers etc. For those applications, the conventional large fixed-length shift register or static RAM scheme is not very popular because of its lack of versatility, high power consumption, and required support circuitry. The very high throughput of 50Mbit/sec is made possible by a highly parallel, pipelined dynamic memory architecture implemented in a 2-um N-well CMOS technology. The basic cell of the programmable video linestore chip is an four transistor dynamic RAM element. This cell comprises the majority of the chip's real estate, consumes no static power, and gives good noise immunity to the simply designed sense amplifier. The chip design was done using Bellcore's version of the MULGA virtual grid symbolic layout system. The chip contains approximately 90,000 transistors in an area of 6.5 x 7.5 square mm and the I/Os are TTL compatible. The chip is packaged in a 68-pin leadless ceramic chip carrier package.
Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate
NASA Technical Reports Server (NTRS)
Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen
2009-01-01
Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.
Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao
2018-01-01
Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Outlook and emerging semiconducting materials for ambipolar transistors.
Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta
2014-02-26
Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great interest in exotic semiconductors, such as organic semiconductors, nanostructured materials, and carbon nanotubes. The ability to utilize both holes and electrons inside one device opens new possibilities for the development of more compact complementary metal-oxide semiconductor (CMOS) circuits, and new kinds of optoelectronic device, namely, ambipolar light-emitting transistors. This progress report highlights the recent progresses in the field of ambipolar transistors, both from the fundamental physics and application viewpoints. Attention is devoted to the challenges that should be faced for the realization of ambipolar transistors with different material systems, beginning with the understanding of the importance of interface modification, which heavily affects injections and trapping of both holes and electrons. The recent development of advanced gating applications, including ionic liquid gating, that open up more possibility to realize ambipolar transport in materials in which one type of charge carrier is highly dominant is highlighted. Between the possible applications of ambipolar field-effect transistors, we focus on ambipolar light-emitting transistors. We put this new device in the framework of its prospective for general lightings, embedded displays, current-driven laser, as well as for photonics-electronics interconnection. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
A transistor based on 2D material and silicon junction
NASA Astrophysics Data System (ADS)
Kim, Sanghoek; Lee, Seunghyun
2017-07-01
A new type of graphene-silicon junction transistor based on bipolar charge-carrier injection was designed and investigated. In contrast to many recent studies on graphene field-effect transistor (FET), this device is a new type of bipolar junction transistor (BJT). The transistor fully utilizes the Fermi level tunability of graphene under bias to increase the minority-carrier injection efficiency of the base-emitter junction in the BJT. Single-layer graphene was used to form the emitter and the collector, and a p-type silicon was used as the base. The output of this transistor was compared with a metal-silicon junction transistor ( i.e. surface-barrier transistor) to understand the difference between a graphene-silicon junction and metal-silicon Schottky junction. A significantly higher current gain was observed in the graphene-silicon junction transistor as the base current was increased. The graphene-semiconductor heterojunction transistor offers several unique advantages, such as an extremely thin device profile, a low-temperature (< 110 °C) fabrication process, low cost (no furnace process), and high-temperature tolerance due to graphene's stability. A transistor current gain ( β) of 33.7 and a common-emitter amplifier voltage gain of 24.9 were achieved.
The Design and Development of the SMEX-Lite Power System
NASA Technical Reports Server (NTRS)
Rakow, Glenn P.; Schnurr, Richard G., Jr.; Solly, Michael A.
1998-01-01
This paper describes the design and development of a 250W orbit average electrical power system electronic Power Node and software for use in Low Earth Orbit missions. The mass of the Power Node is 3.6 Kg (8 lb.). The dimensions of the Power Node are 30cm x 26cm x 7.9cm (11 in. x 10.25 in x 3.1 in.) The design was realized using software, Field Programmable Gate Array (FPGA) digital logic and surface mount technology. The design is generic enough to reduce the non-recurring engineering for different mission configurations. The Power Node charges one to five, low cost, 22-cell 4 AH D-cell battery packs independently. The battery charging algorithms are executed in the power software to reduce the mass and size of the power electronic. The Power Node implements a peak-power tracking algorithm using an innovative hardware/software approach. The power software task is hosted on the spacecraft processor. The power software task generates a MIL-STD-1553 command packet to update the Power Node control settings. The settings for the battery voltage and current limits, as well as minimum solar array voltage used to implement peak power tracking are contained in this packet. Several advanced topologies are used in the Power Node. These include synchronous rectification in the bus regulators, average current control in the battery chargers and quasi-resonant converters for the Field Effect Transistor (FET) transistor drive electronics. Lastly, the main bus regulator uses a feed-forward topology with the PWM implemented in an FPGA.
Silicon Carbide Transistor For Detecting Hydrocarbon Gases
NASA Technical Reports Server (NTRS)
Shields, Virgil B.; Ryan, Margaret A.; Williams, Roger M.
1996-01-01
Proposed silicon carbide variable-potential insulated-gate field-effect transistor specially designed for use in measuring concentrations of hydrocarbon gases. Devices like this prove useful numerous automotive, industrial, aeronautical, and environmental monitoring applications.
NASA Astrophysics Data System (ADS)
Lin, Chung-Han; Doutt, D. R.; Mishra, U. K.; Merz, T. A.; Brillson, L. J.
2010-11-01
Nanoscale Kelvin probe force microscopy and depth-resolved cathodoluminescence spectroscopy reveal an electronic defect evolution inside operating AlGaN/GaN high electron mobility transistors with degradation under electric-field-induced stress. Off-state electrical stress results in micron-scale areas within the extrinsic drain expanding and decreasing in electric potential, midgap defects increasing by orders-of-magnitude at the AlGaN layer, and local Fermi levels lowering as gate-drain voltages increase above a characteristic stress threshold. The pronounced onset of defect formation, Fermi level movement, and transistor degradation at the threshold gate-drain voltage of J. A. del Alamo and J. Joh [Microelectron. Reliab. 49, 1200 (2009)] is consistent with crystal deformation and supports the inverse piezoelectric model of high electron mobility transistor degradation.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Naquin, Clint; Lee, Mark; Edwards, Hal
2014-11-24
Introducing explicit quantum transport into Si transistors in a manner amenable to industrial fabrication has proven challenging. Hybrid field-effect/bipolar Si transistors fabricated on an industrial 45 nm process line are shown to demonstrate explicit quantum transport signatures. These transistors incorporate a lateral ion implantation-defined quantum well (QW) whose potential depth is controlled by a gate voltage (V{sub G}). Quantum transport in the form of negative differential transconductance (NDTC) is observed to temperatures >200 K. The NDTC is tied to a non-monotonic dependence of bipolar current gain on V{sub G} that reduces drain-source current through the QW. These devices establish the feasibility ofmore » exploiting quantum transport to transform the performance horizons of Si devices fabricated in an industrially scalable manner.« less
NASA Technical Reports Server (NTRS)
Gwaltney, David A.; Ferguson, Michael I.
2003-01-01
Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.
Huang, Yifeng; Deng, Zexiang; Wang, Weiliang; Liang, Chaolun; She, Juncong; Deng, Shaozhi; Xu, Ningsheng
2015-01-01
Nano-scale vacuum channel transistors possess merits of higher cutoff frequency and greater gain power as compared with the conventional solid-state transistors. The improvement in cathode reliability is one of the major challenges to obtain high performance vacuum channel transistors. We report the experimental findings and the physical insight into the field induced crystalline-to-amorphous phase transformation on the surface of the Si nano-cathode. The crystalline Si tip apex deformed to amorphous structure at a low macroscopic field (0.6~1.65 V/nm) with an ultra-low emission current (1~10 pA). First-principle calculation suggests that the strong electrostatic force exerting on the electrons in the surface lattices would take the account for the field-induced atomic migration that result in an amorphization. The arsenic-dopant in the Si surface lattice would increase the inner stress as well as the electron density, leading to a lower amorphization field. Highly reliable Si nano-cathodes were obtained by employing diamond like carbon coating to enhance the electron emission and thus decrease the surface charge accumulation. The findings are crucial for developing highly reliable Si-based nano-scale vacuum channel transistors and have the significance for future Si nano-electronic devices with narrow separation. PMID:25994377
Hydrothermally Processed Photosensitive Field-Effect Transistor Based on ZnO Nanorod Networks
NASA Astrophysics Data System (ADS)
Kumar, Ashish; Bhargava, Kshitij; Dixit, Tejendra; Palani, I. A.; Singh, Vipul
2016-11-01
Formation of a stable, reproducible zinc oxide (ZnO) nanorod-network-based photosensitive field-effect transistor using a hydrothermal process at low temperature has been demonstrated. K2Cr2O7 additive was used to improve adhesion and facilitate growth of the ZnO nanorod network over the SiO2/Si substrate. Transistor characteristics obtained in the dark resemble those of the n-channel-mode field-effect transistor (FET). The devices showed I on/ I off ratio above 8 × 102 under dark condition, field-effect mobility of 4.49 cm2 V-1 s-1, and threshold voltage of -12 V. Further, under ultraviolet (UV) illumination, the FET exhibited sensitivity of 2.7 × 102 in off-state (-10 V) versus 1.4 in on-state (+9.7 V) of operation. FETs based on such nanorod networks showed good photoresponse, which is attributed to the large surface area of the nanorod network. The growth temperature for ZnO nanorod networks was kept at 110°C, enabling a low-temperature, cost-effective, simple approach for high-performance ZnO-based FETs for large-scale production. The role of network interfaces in the FET performance is also discussed.
Nanopore extended field-effect transistor for selective single-molecule biosensing.
Ren, Ren; Zhang, Yanjun; Nadappuram, Binoy Paulose; Akpinar, Bernice; Klenerman, David; Ivanov, Aleksandar P; Edel, Joshua B; Korchev, Yuri
2017-09-19
There has been a significant drive to deliver nanotechnological solutions to biosensing, yet there remains an unmet need in the development of biosensors that are affordable, integrated, fast, capable of multiplexed detection, and offer high selectivity for trace analyte detection in biological fluids. Herein, some of these challenges are addressed by designing a new class of nanoscale sensors dubbed nanopore extended field-effect transistor (nexFET) that combine the advantages of nanopore single-molecule sensing, field-effect transistors, and recognition chemistry. We report on a polypyrrole functionalized nexFET, with controllable gate voltage that can be used to switch on/off, and slow down single-molecule DNA transport through a nanopore. This strategy enables higher molecular throughput, enhanced signal-to-noise, and even heightened selectivity via functionalization with an embedded receptor. This is shown for selective sensing of an anti-insulin antibody in the presence of its IgG isotype.Efficient detection of single molecules is vital to many biosensing technologies, which require analytical platforms with high selectivity and sensitivity. Ren et al. combine a nanopore sensor and a field-effect transistor, whereby gate voltage mediates DNA and protein transport through the nanopore.
NASA Astrophysics Data System (ADS)
Rodriguez, Alvar; Singh, Simranjeet; Haque, Firoze; Del Barco, Enrique; Nguyen, Tu; Christou, George
2012-02-01
Dependence of magnetic field and electronic transport of Mn4 Single-molecule magnet in a Single-Electron Transistor A. Rodriguez, S. Singh, F. Haque and E. del Barco Department of Physics, University of Central Florida, 4000 Central Florida Blvd., Orlando, Florida 32816 USA T. Nguyen and G. Christou Department of Chemistry, University of Florida, Gainesville, Florida 32611 USA Abstract We have performed single-electron transport measurements on a series of Mn-based low-nuclearity single-molecule magnets (SMM) observing Coulomb blockade. SMMs with well isolated and low ground spin states, i.e. S = 9/2 (Mn4) and S = 6 (Mn3) were chosen for these studies, such that the ground spin multiplet does not mix with levels of other excited spin states for the magnetic fields (H = 0-8 T) employed in the experiments. Different functionalization groups were employed to change the mechanical, geometrical and transport characteristics of the molecules when deposited from liquid solution on the transistors. Electromigration-broken three-terminal single-electron transistors were used. Results obtained at temperatures down to 240 mK and in the presence of high magnetic fields will be shown.
1986-06-30
features of computer aided design systems and statistical quality control procedures that are generic to chip sets and processes. RADIATION HARDNESS -The...System PSP Programmable Signal Processor SSI Small Scale Integration ." TOW Tube Launched, Optically Tracked, Wire Guided TTL Transistor Transitor Logic
Impact of source height on the characteristic of U-shaped channel tunnel field-effect transistor
NASA Astrophysics Data System (ADS)
Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei
2017-11-01
Tunnel field-effect transistor (TFET) is very attractive in replacing a MOSFET, particularly for low-power nanoelectronic circuits. The U-shaped channel TFET (U-TFET) was proposed to improve the drain-source current with a reduced footprint. In this work, the impact of the source height (HS) on the characteristic of the U-shaped channel tunnel field-effect transistor (U-TFET) is investigated by using TCAD simulation. It is found that with a fixed gate height (HG) the drain-source current has a negative correlation with HS. This is because when the gate region is deeper than the source region, the electric field near the corner of the tunneling junction can be enhanced and the tunneling rate is increased. When HS becomes very thin, the drain-source current is limited by the source region volume. The U-TFET with an n+ pocket is also studied and the same trend is observed.
Kim, Jaekyun; Kang, Jingu; Cho, Sangho; Yoo, Byungwook; Kim, Yong-Hoon; Park, Sung Kyu
2014-11-01
High-performance microrod single crystal organic transistors based on a p-type 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) semiconductor are fabricated and the effects of grain boundaries on the carrier transport have been investigated. The spin-coating of C8-BTBT and subsequent solvent vapor annealing process enabled the formation of organic single crystals with high aspect ratio in the range of 10 - 20. It was found that the organic field-effect transistors (OFETs) based on these single crystals yield a field-effect mobility and an on/off current ratio of 8.04 cm2/Vs and > 10(5), respectively. However, single crystal OFETs with a kink, in which two single crystals are fused together, exhibited a noticeable drop of field-effect mobility, and we claim that this phenomenon results from the carrier scattering at the grain boundary.
NASA Technical Reports Server (NTRS)
Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.
2013-01-01
Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric- semiconductor field effect transistors (MOSFETs) are developed in this paper. The models are compared against data collected with MOSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth as well as differences and advantages as compared to the performance of each circuit using a MOSFET.
Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors
Kagan; Mitzi; Dimitrakopoulos
1999-10-29
Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.
NASA Astrophysics Data System (ADS)
Tanaka, Takahisa; Uchida, Ken
2018-06-01
Band tails in heavily doped semiconductors are one of the important parameters that determine transfer characteristics of tunneling field-effect transistors. In this study, doping concentration and doing profile dependences of band tails in heavily doped Si nanowires were analyzed by a nonequilibrium Green function method. From the calculated band tails, transfer characteristics of nanowire tunnel field-effect transistors were numerically analyzed by Wentzel–Kramer–Brillouin approximation with exponential barriers. The calculated transfer characteristics demonstrate that the band tails induced by dopants degrade the subthreshold slopes of Si nanowires from 5 to 56 mV/dec in the worst case. On the other hand, surface doping leads to a high drain current while maintaining a small subthreshold slope.
Shintani, Yukihiro; Kobayashi, Mikinori; Kawarada, Hiroshi
2017-05-05
A fluorine-terminated polycrystalline boron-doped diamond surface is successfully employed as a pH-insensitive SGFET (solution-gate field-effect transistor) for an all-solid-state pH sensor. The fluorinated polycrystalline boron-doped diamond (BDD) channel possesses a pH-insensitivity of less than 3mV/pH compared with a pH-sensitive oxygenated channel. With differential FET (field-effect transistor) sensing, a sensitivity of 27 mv/pH was obtained in the pH range of 2-10; therefore, it demonstrated excellent performance for an all-solid-state pH sensor with a pH-sensitive oxygen-terminated polycrystalline BDD SGFET and a platinum quasi-reference electrode, respectively.
Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors
NASA Astrophysics Data System (ADS)
Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.
2018-04-01
Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.
NASA Technical Reports Server (NTRS)
Krasowski, Michael J. (Inventor); Prokop, Norman F. (Inventor)
2017-01-01
A current source logic gate with depletion mode field effect transistor ("FET") transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.
Maskless writing of a flexible nanoscale transistor with Au-contacted carbon nanotube electrodes
NASA Astrophysics Data System (ADS)
Dockendorf, Cedric P. R.; Poulikakos, Dimos; Hwang, Gilgueng; Nelson, Bradley J.; Grigoropoulos, Costas P.
2007-12-01
A flexible polymer field effect transistor with a nanoscale carbon nanotube channel is conceptualized and realized herein. Carbon nanotubes (CNTs) were dispersed on a polyimide substrate and marked in an scanning electron microscope with focused ion beam such that they could be contacted with gold nanoink. The CNTs were divided into two parts forming the source and drain of the transistor. A micropipette writing method was used to contact the carbon nanotube electrodes with gold nanoink and to deposit the poly(3-hexylthiophene) as an active layer. The mobility of the transistors is of the order of 10-5cm/Vs. After fabrication, the flexible transistors can be peeled off the substrate.
NASA Astrophysics Data System (ADS)
Na, Jong H.; Kitamura, M.; Arakawa, Y.
2007-11-01
We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.
Top-gate organic depletion and inversion transistors with doped channel and injection contact
NASA Astrophysics Data System (ADS)
Liu, Xuhai; Kasemann, Daniel; Leo, Karl
2015-03-01
Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.
NASA Astrophysics Data System (ADS)
Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana
2015-08-01
Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.
Flexible black phosphorus ambipolar transistors, circuits and AM demodulator.
Zhu, Weinan; Yogeesh, Maruthi N; Yang, Shixuan; Aldave, Sandra H; Kim, Joon-Seok; Sonde, Sushant; Tao, Li; Lu, Nanshu; Akinwande, Deji
2015-03-11
High-mobility two-dimensional (2D) semiconductors are desirable for high-performance mechanically flexible nanoelectronics. In this work, we report the first flexible black phosphorus (BP) field-effect transistors (FETs) with electron and hole mobilities superior to what has been previously achieved with other more studied flexible layered semiconducting transistors such as MoS2 and WSe2. Encapsulated bottom-gated BP ambipolar FETs on flexible polyimide afforded maximum carrier mobility of about 310 cm(2)/V·s with field-effect current modulation exceeding 3 orders of magnitude. The device ambipolar functionality and high-mobility were employed to realize essential circuits of electronic systems for flexible technology including ambipolar digital inverter, frequency doubler, and analog amplifiers featuring voltage gain higher than other reported layered semiconductor flexible amplifiers. In addition, we demonstrate the first flexible BP amplitude-modulated (AM) demodulator, an active stage useful for radio receivers, based on a single ambipolar BP transistor, which results in audible signals when connected to a loudspeaker or earphone. Moreover, the BP transistors feature mechanical robustness up to 2% uniaxial tensile strain and up to 5000 bending cycles.
Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai
2012-10-24
Composite films of pentacene and a series of azobenzene derivatives are prepared and used as the active channel material in top-contact, bottom-gate field-effect transistors. The transistors exhibit high field-effect mobility as well as large I-V hysteresis as a function of the gate bias history. The azobenzene moieties, incorporated either in the form of self-assembled monolayer or discrete multilayer clusters at the dielectric surface, result in electric bistability of the pentacene-based transistor either by photoexcitation or gate biasing. The direction of threshold voltage shifts, size of hysteresis, response time, and retention characteristics all strongly depend on the substituent on the benzene ring. The results show that introducing a monolayer of azobenzene moieties results in formation of charge carrier traps responsible for slower switching between the bistable states and longer retention time. With clusters of azobenzene moieties as the trap sites, the switching is faster but the retention is shorter. Detailed film structure analyses and correlation with the transistor/memory properties of these devices are provided.
MOSFET's for Cryogenic Amplifiers
NASA Technical Reports Server (NTRS)
Dehaye, R.; Ventrice, C. A.
1987-01-01
Study seeks ways to build transistors that function effectively at liquid-helium temperatures. Report discusses physics of metaloxide/semiconductor field-effect transistors (MOSFET's) and performances of these devices at cryogenic temperatures. MOSFET's useful in highly sensitive cryogenic preamplifiers for infrared astronomy.
Leydecker, Tim; Trong Duong, Duc; Salleo, Alberto; Orgiu, Emanuele; Samorì, Paolo
2014-12-10
Solution-processable oligothiophenes are model systems for charge transport and fabrication of organic field-effect transistors (OFET) . Herein we report a structure vs function relationship study focused on the electrical characteristics of solution-processed dihexylquaterthiophene (DH4T)-based OFET. We show that by combining the tailoring of all interfaces in the bottom-contact bottom-gate transistor, via chemisorption of ad hoc molecules on electrodes and dielectric, with suitable choice of the film preparation conditions (including solvent type, concentration, volume, and deposition method), it is possible to fabricate devices exhibiting field-effect mobilities exceeding those of vacuum-processed DH4T transistors. In particular, the evaporation rate of the solvent, the processing temperature, as well as the concentration of the semiconducting material were found to hold a paramount importance in driving the self-assembly toward the formation of highly ordered and low-dimensional supramolecular architectures, confirming the kinetically governed nature of the self-assembly process. Among the various architectures, hundreds-of-micrometers long and thin DH4T crystallites exhibited enhanced charge transport.
Performance limits of tunnel transistors based on mono-layer transition-metal dichalcogenides
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jiang, Xiang-Wei, E-mail: xwjiang@semi.ac.cn; Li, Shu-Shen; Synergetic Innovation Center of Quantum Information and Quantum Physics, University of Science and Technology of China, Hefei, Anhui 230026
2014-05-12
Performance limits of tunnel field-effect transistors based on mono-layer transition metal dichalcogenides are investigated through numerical quantum mechanical simulations. The atomic mono-layer nature of the devices results in a much smaller natural length λ, leading to much larger electric field inside the tunneling diodes. As a result, the inter-band tunneling currents are found to be very high as long as ultra-thin high-k gate dielectric is possible. The highest on-state driving current is found to be close to 600 μA/μm at V{sub g} = V{sub d} = 0.5 V when 2 nm thin HfO{sub 2} layer is used for gate dielectric, outperforming most of the conventional semiconductor tunnelmore » transistors. In the five simulated transition-metal dichalcogenides, mono-layer WSe{sub 2} based tunnel field-effect transistor shows the best potential. Deep analysis reveals that there is plenty room to further enhance the device performance by either geometry, alloy, or strain engineering on these mono-layer materials.« less
Tetzner, Kornelius; Bose, Indranil R.; Bock, Karlheinz
2014-01-01
In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor. PMID:28788243
NASA Astrophysics Data System (ADS)
Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David
2017-04-01
We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.
NASA Astrophysics Data System (ADS)
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto
2018-04-01
Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.
Pseudo-diode based on protonic/electronic hybrid oxide transistor
NASA Astrophysics Data System (ADS)
Fu, Yang Ming; Liu, Yang Hui; Zhu, Li Qiang; Xiao, Hui; Song, An Ran
2018-01-01
Current rectification behavior has been proved to be essential in modern electronics. Here, a pseudo-diode is proposed based on protonic/electronic hybrid indium-gallium-zinc oxide electric-double-layer (EDL) transistor. The oxide EDL transistors are fabricated by using phosphorous silicate glass (PSG) based proton conducting electrolyte as gate dielectric. A diode operation mode is established on the transistor, originating from field configurable proton fluxes within the PSG electrolyte. Current rectification ratios have been modulated to values ranged between ˜4 and ˜50 000 with gate electrode biased at voltages ranged between -0.7 V and 0.1 V. Interestingly, the proposed pseudo-diode also exhibits field reconfigurable threshold voltages. When the gate is biased at -0.5 V and 0.3 V, threshold voltages are set to ˜-1.3 V and -0.55 V, respectively. The proposed pseudo-diode may find potential applications in brain-inspired platforms and low-power portable systems.
Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min
2014-10-20
In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.
NASA Astrophysics Data System (ADS)
Chianese, F.; Candini, A.; Affronte, M.; Mishra, N.; Coletti, C.; Cassinese, A.
2018-05-01
In this work, we test graphene electrodes in nanometric channel n-type Organic Field Effect Transistors (OFETs) based on thermally evaporated thin films of the perylene-3,4,9,10-tetracarboxylic acid diimide derivative. By a thorough comparison with short channel transistors made with reference gold electrodes, we found that the output characteristics of the graphene-based devices respond linearly to the applied bias, in contrast with the supralinear trend of gold-based transistors. Moreover, short channel effects are considerably suppressed in graphene electrode devices. More specifically, current on/off ratios independent of the channel length (L) and enhanced response for high longitudinal biases are demonstrated for L down to ˜140 nm. These results are rationalized taking into account the morphological and electronic characteristics of graphene, showing that the use of graphene electrodes may help to overcome the problem of Space Charge Limited Current in short channel OFETs.
Tetzner, Kornelius; Bose, Indranil R; Bock, Karlheinz
2014-10-29
In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor.
Graphene-based field-effect transistor biosensors
Chen; , Junhong; Mao, Shun; Lu, Ganhua
2017-06-14
The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.
Low-voltage self-assembled monolayer field-effect transistors on flexible substrates.
Schmaltz, Thomas; Amin, Atefeh Y; Khassanov, Artoem; Meyer-Friedrichsen, Timo; Steinrück, Hans-Georg; Magerl, Andreas; Segura, Juan José; Voitchovsky, Kislon; Stellacci, Francesco; Halik, Marcus
2013-08-27
Self-assembled monolayer field-effect transistors (SAMFETs) of BTBT functionalized phosphonic acids are fabricated. The molecular design enables device operation with charge carrier mobilities up to 10(-2) cm(2) V(-1) s(-1) and for the first time SAMFETs which operate on rough, flexible PEN substrates even under mechanical substrate bending. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Field-Induced Disorder and Carrier Localization in Molecular Organic Transistors
NASA Astrophysics Data System (ADS)
Ando, M.; Minakata, T.; Duffy, C.; Sirringhaus, H.
2009-06-01
We propose a "field-induced polymorphous disorder" model to explain bias-stress instability in molecular organic thin-film transistors, based on the experimental results showing the strong correlation between the micro-structural change in semiconductor layer composed of penrtacene molecules and the threshold voltage (Vth) shift due to electron trapping in a reversible manner under the successive bias-stress, thermal annealing, and light irradiation.
Importance of the Debye Screening Length on Nanowire Field Effect Transistor Sensors
Stern, Eric; Wagner, Robin; Sigworth, Fred J.; Breaker, Ronald; Fahmy, Tarek M.; Reed, Mark A.
2009-01-01
Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors. PMID:17914853
Importance of the Debye screening length on nanowire field effect transistor sensors.
Stern, Eric; Wagner, Robin; Sigworth, Fred J; Breaker, Ronald; Fahmy, Tarek M; Reed, Mark A
2007-11-01
Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors.
Yi, H T; Chen, Y; Czelen, K; Podzorov, V
2011-12-22
A novel vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors has been developed. The non-destructive nature of this method allows a direct comparison of field-effect mobilities achieved with various gate dielectrics using the same single-crystal sample. The method also allows gating delicate systems, such as n -type crystals and SAM-coated surfaces, without perturbation. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Current and emerging challenges of field effect transistor based bio-sensing
NASA Astrophysics Data System (ADS)
Matsumoto, Akira; Miyahara, Yuji
2013-10-01
Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed ``Bio-FETs'', provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.
Current and emerging challenges of field effect transistor based bio-sensing.
Matsumoto, Akira; Miyahara, Yuji
2013-11-21
Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed "Bio-FETs", provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.
Sainato, Michela; Strambini, Lucanos Marsilio; Rella, Simona; Mazzotta, Elisabetta; Barillaro, Giuseppe
2015-04-08
Surface doping of nano/mesostructured materials with metal nanoparticles to promote and optimize chemi-transistor sensing performance represents the most advanced research trend in the field of solid-state chemical sensing. In spite of the promising results emerging from metal-doping of a number of nanostructured semiconductors, its applicability to silicon-based chemi-transistor sensors has been hindered so far by the difficulties in integrating the composite metal-silicon nanostructures using the complementary metal-oxide-semiconductor (CMOS) technology. Here we propose a facile and effective top-down method for the high-yield fabrication of chemi-transistor sensors making use of composite porous silicon/gold nanostructures (cSiAuNs) acting as sensing gate. In particular, we investigate the integration of cSiAuNs synthesized by metal-assisted etching (MAE), using gold nanoparticles (NPs) as catalyst, in solid-state junction-field-effect transistors (JFETs), aimed at the detection of NO2 down to 100 parts per billion (ppb). The chemi-transistor sensors, namely cSiAuJFETs, are CMOS compatible, operate at room temperature, and are reliable, sensitive, and fully recoverable for the detection of NO2 at concentrations between 100 and 500 ppb, up to 48 h of continuous operation.
NASA Astrophysics Data System (ADS)
Mookerjea, Saurabh A.
Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.
Intrinsically stretchable and healable semiconducting polymer for organic transistors
NASA Astrophysics Data System (ADS)
Oh, Jin Young; Rondeau-Gagné, Simon; Chiu, Yu-Cheng; Chortos, Alex; Lissel, Franziska; Wang, Ging-Ji Nathan; Schroeder, Bob C.; Kurosawa, Tadanori; Lopez, Jeffrey; Katsumata, Toru; Xu, Jie; Zhu, Chenxin; Gu, Xiaodan; Bae, Won-Gyu; Kim, Yeongin; Jin, Lihua; Chung, Jong Won; Tok, Jeffrey B.-H.; Bao, Zhenan
2016-11-01
Thin-film field-effect transistors are essential elements of stretchable electronic devices for wearable electronics. All of the materials and components of such transistors need to be stretchable and mechanically robust. Although there has been recent progress towards stretchable conductors, the realization of stretchable semiconductors has focused mainly on strain-accommodating engineering of materials, or blending of nanofibres or nanowires into elastomers. An alternative approach relies on using semiconductors that are intrinsically stretchable, so that they can be fabricated using standard processing methods. Molecular stretchability can be enhanced when conjugated polymers, containing modified side-chains and segmented backbones, are infused with more flexible molecular building blocks. Here we present a design concept for stretchable semiconducting polymers, which involves introducing chemical moieties to promote dynamic non-covalent crosslinking of the conjugated polymers. These non-covalent crosslinking moieties are able to undergo an energy dissipation mechanism through breakage of bonds when strain is applied, while retaining high charge transport abilities. As a result, our polymer is able to recover its high field-effect mobility performance (more than 1 square centimetre per volt per second) even after a hundred cycles at 100 per cent applied strain. Organic thin-film field-effect transistors fabricated from these materials exhibited mobility as high as 1.3 square centimetres per volt per second and a high on/off current ratio exceeding a million. The field-effect mobility remained as high as 1.12 square centimetres per volt per second at 100 per cent strain along the direction perpendicular to the strain. The field-effect mobility of damaged devices can be almost fully recovered after a solvent and thermal healing treatment. Finally, we successfully fabricated a skin-inspired stretchable organic transistor operating under deformations that might be expected in a wearable device.
Intrinsically stretchable and healable semiconducting polymer for organic transistors.
Oh, Jin Young; Rondeau-Gagné, Simon; Chiu, Yu-Cheng; Chortos, Alex; Lissel, Franziska; Wang, Ging-Ji Nathan; Schroeder, Bob C; Kurosawa, Tadanori; Lopez, Jeffrey; Katsumata, Toru; Xu, Jie; Zhu, Chenxin; Gu, Xiaodan; Bae, Won-Gyu; Kim, Yeongin; Jin, Lihua; Chung, Jong Won; Tok, Jeffrey B-H; Bao, Zhenan
2016-11-17
Thin-film field-effect transistors are essential elements of stretchable electronic devices for wearable electronics. All of the materials and components of such transistors need to be stretchable and mechanically robust. Although there has been recent progress towards stretchable conductors, the realization of stretchable semiconductors has focused mainly on strain-accommodating engineering of materials, or blending of nanofibres or nanowires into elastomers. An alternative approach relies on using semiconductors that are intrinsically stretchable, so that they can be fabricated using standard processing methods. Molecular stretchability can be enhanced when conjugated polymers, containing modified side-chains and segmented backbones, are infused with more flexible molecular building blocks. Here we present a design concept for stretchable semiconducting polymers, which involves introducing chemical moieties to promote dynamic non-covalent crosslinking of the conjugated polymers. These non-covalent crosslinking moieties are able to undergo an energy dissipation mechanism through breakage of bonds when strain is applied, while retaining high charge transport abilities. As a result, our polymer is able to recover its high field-effect mobility performance (more than 1 square centimetre per volt per second) even after a hundred cycles at 100 per cent applied strain. Organic thin-film field-effect transistors fabricated from these materials exhibited mobility as high as 1.3 square centimetres per volt per second and a high on/off current ratio exceeding a million. The field-effect mobility remained as high as 1.12 square centimetres per volt per second at 100 per cent strain along the direction perpendicular to the strain. The field-effect mobility of damaged devices can be almost fully recovered after a solvent and thermal healing treatment. Finally, we successfully fabricated a skin-inspired stretchable organic transistor operating under deformations that might be expected in a wearable device.
Hopping and trapping mechanisms in organic field-effect transistors
NASA Astrophysics Data System (ADS)
Konezny, S. J.; Bussac, M. N.; Zuppiroli, L.
2010-01-01
A charge carrier in the channel of an organic field-effect transistor (OFET) is coupled to the electric polarization of the gate in the form of a surface Fröhlich polaron [N. Kirova and M. N. Bussac, Phys. Rev. B 68, 235312 (2003)]. We study the effects of the dynamical field of polarization on both small-polaron hopping and trap-limited transport mechanisms. We present numerical calculations of polarization energies, band-narrowing effects due to polarization, hopping barriers, and interface trap depths in pentacene and rubrene transistors as functions of the dielectric constant of the gate insulator and demonstrate that a trap-and-release mechanism more appropriately describes transport in high-mobility OFETs. For mobilities on the order 0.1cm2/Vs and below, all states are highly localized and hopping becomes the predominant mechanism.
NASA Astrophysics Data System (ADS)
Liewald, C.; Reiser, D.; Westermeier, C.; Nickel, B.
2016-08-01
We use a pentacene transistor with asymmetric source drain contacts to test the sensitivity of scanning photocurrent microscopy (SPCM) for contact resistance and charge traps. The drain current of the device strongly depends on the choice of the drain electrode. In one case, more than 94% of the source drain voltage is lost due to contact resistance. Here, SPCM maps show an enhanced photocurrent signal at the hole-injecting contact. For the other bias condition, i.e., for ohmic contacts, the SPCM signal peaks heterogeneously along the channel. We argue from basic transport models that bright areas in SPCM maps indicate areas of large voltage gradients or high electric field strength caused by injection barriers or traps. Thus, SPCM allows us to identify and image the dominant voltage loss mechanism in organic field-effect transistors.
AlN metal-semiconductor field-effect transistors using Si-ion implantation
NASA Astrophysics Data System (ADS)
Okumura, Hironori; Suihkonen, Sami; Lemettinen, Jori; Uedono, Akira; Zhang, Yuhao; Piedra, Daniel; Palacios, Tomás
2018-04-01
We report on the electrical characterization of Si-ion implanted AlN layers and the first demonstration of metal-semiconductor field-effect transistors (MESFETs) with an ion-implanted AlN channel. The ion-implanted AlN layers with Si dose of 5 × 1014 cm-2 exhibit n-type characteristics after thermal annealing at 1230 °C. The ion-implanted AlN MESFETs provide good drain current saturation and stable pinch-off operation even at 250 °C. The off-state breakdown voltage is 2370 V for drain-to-gate spacing of 25 µm. These results show the great potential of AlN-channel transistors for high-temperature and high-power applications.
NASA Technical Reports Server (NTRS)
Tabory, Charles N.; Young, Paul G.; Smith, Edwyn D.; Alterovitz, Samuel A.
1994-01-01
Metal-insulator-semiconductor (MIS) field effect transistors were fabricated on InP substrates using a planar self-aligned gate process. A 700-1000 A gate insulator of Si02 doped with phosphorus was deposited by a direct plasma enhanced chemical vapor deposition at 400 mTorr, 275 C, 5 W, and power density of 8.5 MW/sq cm. High frequency capacitance-voltage measurements were taken on MIS capacitors which have been subjected to a 700 C anneal and an interface state density of lxl0(exp 11)/eV/cq cm was found. Current-voltage measurements of the capacitors show a breakdown voltage of 107 V/cm and a insulator resistivity of 10(exp 14) omega cm. Transistors were fabricated on semi-insulating InP using a standard planar self-aligned gate process in which the gate insulator was subjected to an ion implantation activation anneal of 700 C. MIS field effect transistors gave a maximum extrinsic transconductance of 23 mS/mm for a gate length of 3 microns. The drain current drift saturated at 87.5% of the initial current, while reaching to within 1% of the saturated value after only 1x10(exp 3). This is the first reported viable planar InP self-aligned gate transistor process reported to date.
NASA Astrophysics Data System (ADS)
Liu, Chuan; Li, Gongtan; Di Pietro, Riccardo; Huang, Jie; Noh, Yong-Young; Liu, Xuying; Minari, Takeo
2017-09-01
Very high values of carrier mobility have been recently reported in newly developed materials for field-effect transistors (FETs) or thin-film transistors (TFTs). However, there is an increasing concern of whether the values are overestimated. In this paper, we investigate how much contact resistance a FET or TFT can tolerate to allow the conventional current-voltage equations, which is derived for no contact resistance. We contend that mobility in transistors with resistive contact can be underestimated with the presence of the injection barrier, whereas mobility in transistors with gated Schottky contact can be overestimated by more than 10 times. The latter phenomenon occurs even in long-channel devices, and it becomes more severe when using low-k dielectrics. This is because the band bending and injection barrier experience a complicated evolution on account of electrostatic doping in the semiconducting layer; thus, they do not follow a capacitance approximation. When the band bending is weak, the accumulation is as weak as that in the subthreshold regime. Accordingly, the carrier concentration nonlinearly increases with the gate field. This mechanism can occur with or without exhibiting the "kink" feature in the transfer curves, which has been suggested as the signature of overestimation. For precision, carrier mobility should be presented against gate voltage and should be examined by other recommended extraction methods.
Farhadi, Rozita; Farhadi, Bita
2014-01-01
Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines. PMID:25763152
Farhadi, Rozita; Farhadi, Bita
2014-01-01
Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.
Enhanced Amplification and Fan-Out Operation in an All-Magnetic Transistor
Barman, Saswati; Saha, Susmita; Mondal, Sucheta; Kumar, Dheeraj; Barman, Anjan
2016-01-01
Development of all-magnetic transistor with favorable properties is an important step towards a new paradigm of all-magnetic computation. Recently, we showed such possibility in a Magnetic Vortex Transistor (MVT). Here, we demonstrate enhanced amplification in MVT achieved by introducing geometrical asymmetry in a three vortex sequence. The resulting asymmetry in core to core distance in the three vortex sequence led to enhanced amplification of the MVT output. A cascade of antivortices travelling in different trajectories including a nearly elliptical trajectory through the dynamic stray field is found to be responsible for this amplification. This asymmetric vortex transistor is further used for a successful fan-out operation, which gives large and nearly equal gains in two output branches. This large amplification in magnetic vortex gyration in magnetic vortex transistor is proposed to be maintained for a network of vortex transistor. The above observations promote the magnetic vortex transistors to be used in complex circuits and logic operations. PMID:27624662
Improvement and Analysis of the Radiation Response of RADFET Dosimeters
1992-06-15
TLD ), silicon p-i-n diode responses and silicon calorimetry (AWE Dosimetry Service). Intensive preparations were made by REM and the experiments were...SUB-GROUP dose: RADFET : tactical dosimetry silicon : metal-oxide- 0705 emiconductor (MOS) field effect transistor (FET) : silicon Idioxide space...1.1 Principle of a dosimetry system, based on the RADFET (radiation-sensitive field-effect transistor) (a) microscopic cross-section of chip (b) chip
Nonlinear Transport in Organic Thin Film Transistors with Soluble Small Molecule Semiconductor.
Kim, Hyeok; Song, Dong-Seok; Kwon, Jin-Hyuk; Jung, Ji-Hoon; Kim, Do-Kyung; Kim, SeonMin; Kang, In Man; Park, Jonghoo; Tae, Heung-Sik; Battaglini, Nicolas; Lang, Philippe; Horowitz, Gilles; Bae, Jin-Hyuk
2016-03-01
Nonlinear transport is intensively explained through Poole-Frenkel (PF) transport mechanism in organic thin film transistors with solution-processed small molecules, which is, 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene. We outline a detailed electrical study that identifies the source to drain field dependent mobility. Devices with diverse channel lengths enable the extensive exhibition of field dependent mobility due to thermal activation of carriers among traps.
Borshchev, O V; Sizov, A S; Agina, E V; Bessonov, A A; Ponomarenko, S A
2017-01-16
For the first time, the synthesis of organosilicon derivatives of dialkyl[1]benzothieno[3,2-b][1]-benzothiophene (BTBT) capable of forming a semiconducting monolayer at the water-air interface is reported. Self-assembled monolayer organic field-effect transistors prepared from these materials using the Langmuir-Blodgett technique showed high hole mobilities and excellent air stability.
Nanowire nanocomputer as a finite-state machine.
Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M
2014-02-18
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.
Nanowire nanocomputer as a finite-state machine
Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F.; Ellenbogen, James C.; Lieber, Charles M.
2014-01-01
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom–up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future. PMID:24469812
Developing Low-Noise GaAs JFETs For Cryogenic Operation
NASA Technical Reports Server (NTRS)
Cunningham, Thomas J.
1995-01-01
Report discusses aspects of effort to develop low-noise, low-gate-leakage gallium arsenide-based junction field-effect transistors (JFETs) for operation at temperature of about 4 K as readout amplifiers and multiplexing devices for infrared-imaging devices. Transistors needed to replace silicon transistors, relatively noisy at 4 K. Report briefly discusses basic physical principles of JFETs and describes continuing process of optimization of designs of GaAs JFETs for cryogenic operation.
Solid-state X-band Combiner Study
NASA Technical Reports Server (NTRS)
Pitzalis, O., Jr.; Russell, K. J.
1979-01-01
The feasibility of developing solid-state amplifiers at 4 and 10 GHz for application in spacecraft altimeters was studied. Bipolar-transistor, field-effect-transistor, and Impatt-diode amplifier designs based on 1980 solid-state technology are investigated. Several output power levels of the pulsed, low-duty-factor amplifiers are considered at each frequency. Proposed transistor and diode amplifier designs are illustrated in block diagrams. Projections of size, weight, and primary power requirements are given for each design.
NASA Technical Reports Server (NTRS)
Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.
1992-01-01
The temperature dependence of the gate current versus the gate voltage in complementary heterojunction field-effect transistors (CHFET's) is examined. An analysis indicates that the gate conduction is due to a combination of thermionic emission, thermionic-field emission, and conduction through a temperature-activated resistance. The thermionic-field emission is consistent with tunneling through the AlGaAs insulator. The activation energy of the resistance is consistent with the ionization energy associated with the DX center in the AlGaAs. Methods reducing the gate current are discussed.
Back bias induced dynamic and steep subthreshold swing in junctionless transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Parihar, Mukta Singh; Kranti, Abhinav, E-mail: akranti@iiti.ac.in
In this work, we analyze back bias induced steep and dynamic subthreshold swing in junctionless double gate transistors operated in the asymmetric mode. This impact ionization induced dynamic subthreshold swing is explained in terms of the ratio between minimum hole concentration and peak electron concentration, and the dynamic change in the location of the conduction channel with applied front gate voltage. The reason for the occurrence of impact ionization at sub-bandgap drain voltages in silicon junctionless transistors is also accounted for. The optimum junctionless transistor operating at a back gate bias of −0.9 V, achieves over 5 orders of change inmore » drain current at a gate overdrive of 200 mV and drain bias of 1 V. These results for junctionless transistors are significantly better than those exhibited by silicon tunnel field effect transistors operating at the same drain bias.« less
Heavy-Ion Microbeam Fault Injection into SRAM-Based FPGA Implementations of Cryptographic Circuits
NASA Astrophysics Data System (ADS)
Li, Huiyun; Du, Guanghua; Shao, Cuiping; Dai, Liang; Xu, Guoqing; Guo, Jinlong
2015-06-01
Transistors hit by heavy ions may conduct transiently, thereby introducing transient logic errors. Attackers can exploit these abnormal behaviors and extract sensitive information from the electronic devices. This paper demonstrates an ion irradiation fault injection attack experiment into a cryptographic field-programmable gate-array (FPGA) circuit. The experiment proved that the commercial FPGA chip is vulnerable to low-linear energy transfer carbon irradiation, and the attack can cause the leakage of secret key bits. A statistical model is established to estimate the possibility of an effective fault injection attack on cryptographic integrated circuits. The model incorporates the effects from temporal, spatial, and logical probability of an effective attack on the cryptographic circuits. The rate of successful attack calculated from the model conforms well to the experimental results. This quantitative success rate model can help evaluate security risk for designers as well as for the third-party assessment organizations.
High-voltage, high-power, solid-state remote power controllers for aerospace applications
NASA Technical Reports Server (NTRS)
Sturman, J. C.
1985-01-01
Two general types of remote power controller (RPC) that combine the functions of a circuit breaker and a switch were developed for use in direct-current (dc) aerospace systems. Power-switching devices used in these designs are the relatively new gate-turnoff thyristor (GTO) and poweer metal-oxide-semiconductor field-effect transistors (MOSFET). The various RPC's can switch dc voltages to 1200 V and currents to 100 A. Seven different units were constructed and subjected to comprehensive laboratory and thermal vacuum testing. Two of these were dual units that switch both positive and negative voltages simultaneously. The RPC's using MOSFET's have slow turnon and turnoff times to limit voltage spiking from high di/dt. The GTO's have much faster transition times. All RPC's have programmable overload tripout and microsecond tripout for large overloads. The basic circuits developed can be used to build switchgear limited only by the ratings of the switching device used.
NASA Astrophysics Data System (ADS)
Borza, Dan N.; Gautrelet, Christophe
2015-01-01
The paper describes a measurement system based on time-resolved speckle interferometry, able to record long series of thermally induced full-field deformation maps of die and wire bonds inside an operating power transistor. The origin of the deformation is the transistor heating during its normal operation. The full-field results consist in completely unwrapped deformation maps for out-of-plane displacements greater than 14 μm, with nanometer resolution, in presence of discontinuities due to structural and material inhomogeneity. These measurements are synchronized with the measurement of heatsink temperature and of base-emitter junction temperature, so as to provide data related to several interacting physical parameters. The temporal histories of the displacement are also accessible for any point. They are correlated with the thermal and electrical time series. Mechanical full-field curvatures may also be estimated, making these measurements useful for inspecting physical origins of thermomechanical stresses and for interacting with numerical models used in reliability-related studies.
Poly(methyl methacrylate) as a self-assembled gate dielectric for graphene field-effect transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Sanne, A.; Movva, H. C. P.; Kang, S.
We investigate poly(methyl methacrylate) (PMMA) as a low thermal budget organic gate dielectric for graphene field effect-transistors (GFETs) based on a simple process flow. We show that high temperature baking steps above the glass transition temperature (∼130 °C) can leave a self-assembled, thin PMMA film on graphene, where we get a gate dielectric almost for “free” without additional atomic layer deposition type steps. Electrical characterization of GFETs with PMMA as a gate dielectric yields a dielectric constant of k = 3.0. GFETs with thinner PMMA dielectrics have a lower dielectric constant due to decreased polarization arising from neutralization of dipoles and charged carriersmore » as baking temperatures increase. The leakage through PMMA gate dielectric increases with decreasing dielectric thickness and increasing electric field. Unlike conventional high-k gate dielectrics, such low-k organic gate dielectrics are potentially attractive for devices such as the proposed Bilayer pseudoSpin Field-Effect Transistor or flexible high speed graphene electronics.« less
25th Anniversary Article: Organic Field-Effect Transistors: The Path Beyond Amorphous Silicon
Sirringhaus, Henning
2014-01-01
Over the past 25 years, organic field-effect transistors (OFETs) have witnessed impressive improvements in materials performance by 3–4 orders of magnitude, and many of the key materials discoveries have been published in Advanced Materials. This includes some of the most recent demonstrations of organic field-effect transistors with performance that clearly exceeds that of benchmark amorphous silicon-based devices. In this article, state-of-the-art in OFETs are reviewed in light of requirements for demanding future applications, in particular active-matrix addressing for flexible organic light-emitting diode (OLED) displays. An overview is provided over both small molecule and conjugated polymer materials for which field-effect mobilities exceeding > 1 cm2 V–1 s–1 have been reported. Current understanding is also reviewed of their charge transport physics that allows reaching such unexpectedly high mobilities in these weakly van der Waals bonded and structurally comparatively disordered materials with a view towards understanding the potential for further improvement in performance in the future. PMID:24443057
P-type field effect transistor based on Na-doped BaSnO3
NASA Astrophysics Data System (ADS)
Jang, Yeaju; Hong, Sungyun; Park, Jisung; Char, Kookrin
We fabricated field effect transistors (FET) based on the p-type Na-doped BaSnO3 (BNSO) channel layer. The properties of epitaxial BNSO channel layer were controlled by the doping rate. In order to modulate the p-type FET, we used amorphous HfOx and epitaxial BaHfO3 (BHO) gate oxides, both of which have high dielectric constants. HfOx was deposited by atomic-layer-deposition and BHO was epitaxially grown by pulsed laser deposition. The pulsed laser deposited SrRuO3 (SRO) was used as the source and the drain contacts. Indium-tin oxide and La-doped BaSnO3 were used as the gate electrodes on top of the HfOx and the BHO gate oxides, respectively. We will analyze and present the performances of the BNSO field effect transistor such as the IDS-VDS, the IDS-VGS, the Ion/Ioff ratio, and the field effect mobility. Samsung Science and Technology Foundation.
NASA Astrophysics Data System (ADS)
Lee, Keanchuan; Weis, Martin; Taguchi, Dai; Manaka, Takaaki; Iwamoto, Mitsumasa
2013-08-01
We investigated the injection and transport properties of pentacene organic field-effect transistors (OFETs) with inclined and lamellar pentacene grains at various mutual ratios. Although the threshold voltage was conserved and no additional trapping on grain boundaries was suggested from the current-voltage measurements, the contact resistance and mobility increased linearly with the lamellar phase content. We showed that a model based on the coupling between both transport and injection properties via a space charge field caused by injected and trapped carriers accounts for these results.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Yeluri, Ramya, E-mail: ramyay@ece.ucsb.edu; Lu, Jing; Keller, Stacia
2015-05-04
The Current Aperture Vertical Electron Transistor (CAVET) combines the high conductivity of the two dimensional electron gas channel at the AlGaN/GaN heterojunction with better field distribution offered by a vertical design. In this work, CAVETs with buried, conductive p-GaN layers as the current blocking layer are reported. The p-GaN layer was regrown by metalorganic chemical vapor deposition and the subsequent channel regrowth was done by ammonia molecular beam epitaxy to maintain the p-GaN conductivity. Transistors with high ON current (10.9 kA/cm{sup 2}) and low ON-resistance (0.4 mΩ cm{sup 2}) are demonstrated. Non-planar selective area regrowth is identified as the limiting factormore » to transistor breakdown, using planar and non-planar n/p/n structures. Planar n/p/n structures recorded an estimated electric field of 3.1 MV/cm, while non-planar structures showed a much lower breakdown voltage. Lowering the p-GaN regrowth temperature improved breakdown in the non-planar n/p/n structure. Combining high breakdown voltage with high current will enable GaN vertical transistors with high power densities.« less
Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate
NASA Technical Reports Server (NTRS)
Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen
2005-01-01
Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.
Photosensitive graphene transistors.
Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng
2014-08-20
High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Held, Martin; Schießl, Stefan P.; Gannott, Florentina
Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less
NASA Astrophysics Data System (ADS)
Kalb, Wolfgang L.; Haas, Simon; Krellner, Cornelius; Mathis, Thomas; Batlogg, Bertram
2010-04-01
We show that it is possible to reach one of the ultimate goals of organic electronics: producing organic field-effect transistors with trap densities as low as in the bulk of single crystals. We studied the spectral density of localized states in the band gap [trap density of states (trap DOS)] of small-molecule organic semiconductors as derived from electrical characteristics of organic field-effect transistors or from space-charge-limited current measurements. This was done by comparing data from a large number of samples including thin-film transistors (TFT’s), single crystal field-effect transistors (SC-FET’s) and bulk samples. The compilation of all data strongly suggests that structural defects associated with grain boundaries are the main cause of “fast” hole traps in TFT’s made with vacuum-evaporated pentacene. For high-performance transistors made with small-molecule semiconductors such as rubrene it is essential to reduce the dipolar disorder caused by water adsorbed on the gate dielectric surface. In samples with very low trap densities, we sometimes observe a steep increase in the trap DOS very close (<0.15eV) to the mobility edge with a characteristic slope of 10-20 meV. It is discussed to what degree band broadening due to the thermal fluctuation of the intermolecular transfer integral is reflected in this steep increase in the trap DOS. Moreover, we show that the trap DOS in TFT’s with small-molecule semiconductors is very similar to the trap DOS in hydrogenated amorphous silicon even though polycrystalline films of small-molecules with van der Waals-type interaction on the one hand are compared with covalently bound amorphous silicon on the other hand.
Nature of size effects in compact models of field effect transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Torkhov, N. A., E-mail: trkf@mail.ru; Scientific-Research Institute of Semiconductor Devices, Tomsk 634050; Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050
Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of themore » equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.« less
Vertical field-effect transistor based on wave-function extension
NASA Astrophysics Data System (ADS)
Sciambi, A.; Pelliccione, M.; Lilly, M. P.; Bank, S. R.; Gossard, A. C.; Pfeiffer, L. N.; West, K. W.; Goldhaber-Gordon, D.
2011-08-01
We demonstrate a mechanism for a dual layer, vertical field-effect transistor, in which nearly depleting one layer will extend its wave function to overlap the other layer and increase tunnel current. We characterize this effect in a specially designed GaAs/AlGaAs device, observing a tunnel current increase of two orders of magnitude at cryogenic temperatures, and we suggest extrapolations of the design to other material systems such as graphene.
2013-11-25
a ballistic one-dimensional conductor is / = £>(£) ■ VgiE)[fR(E) - fdEME , (1) where Vg(E) is the group velocity, D(E) is the density of states... AEROSPACE REPORT NO. ATR-2013-01138 Electrical Transport and Channel Length Modulation in Semiconducting Carbon Nanotube Field-Effect Transistors...SCIENCES LABORATORIES The Aerospace Corporation functions as an "architect-engineer" for national security programs, specializing in advanced military
2011-04-30
University of Tennessee) 3. "An ambipolar to n-type transformation in pentacene -based organic field-effect transistors" Org. Electron. 12, 509 (2011...OFETs). An ambipolar to n-type transformation in pentacene -based organic field-effect transistors (OFETs) of Al source-drain electrodes had been...correlated with the interfacial interactions between Al electrodes and pentacene , as characterized by analyzing Near-edge X-ray absorption fine structure
2014-01-01
A possibility of the creation of potentiometric biosensor by adsorption of enzyme urease on zeolite was investigated. Several variants of zeolites (nano beta, calcinated nano beta, silicalite, and nano L) were chosen for experiments. The surface of pH-sensitive field-effect transistors was modified with particles of zeolites, and then the enzyme was adsorbed. As a control, we used the method of enzyme immobilization in glutaraldehyde vapour (without zeolites). It was shown that all used zeolites can serve as adsorbents (with different effectiveness). The biosensors obtained by urease adsorption on zeolites were characterized by good analytical parameters (signal reproducibility, linear range, detection limit and the minimal drift factor of a baseline). In this work, it was shown that modification of the surface of pH-sensitive field-effect transistors with zeolites can improve some characteristics of biosensors. PMID:24636423
Near-field thermal rectification devices using phase change periodic nanostructure.
Ghanekar, Alok; Tian, Yanpei; Ricci, Matthew; Zhang, Sinong; Gregory, Otto; Zheng, Yi
2018-01-22
We theoretically analyze two near-field thermal rectification devices: a radiative thermal diode and a thermal transistor that utilize a phase change material to achieve dynamic control over heat flow by exploiting metal-insulator transition of VO 2 near 341 K. The thermal analogue of electronic diode allows high heat flow in one direction while it restricts the heat flow when the polarity of temperature gradient is reversed. We show that with the introduction of 1-D rectangular grating, thermal rectification is dramatically enhanced in the near-field due to reduced tunneling of surface waves across the interfaces for negative polarity. The radiative thermal transistor also works around phase transition temperature of VO 2 and controls heat flow. We demonstrate a transistor-like behavior wherein heat flow across the source and the drain can be greatly varied by making a small change in gate temperature.
Ballistic Spin Field Effect Transistor Based on Silicon Nanowires
NASA Astrophysics Data System (ADS)
Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried
2011-03-01
We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.
Reducing flicker noise in chemical vapor deposition graphene field-effect transistors
NASA Astrophysics Data System (ADS)
Arnold, Heather N.; Sangwan, Vinod K.; Schmucker, Scott W.; Cress, Cory D.; Luck, Kyle A.; Friedman, Adam L.; Robinson, Jeremy T.; Marks, Tobin J.; Hersam, Mark C.
2016-02-01
Single-layer graphene derived from chemical vapor deposition (CVD) holds promise for scalable radio frequency (RF) electronic applications. However, prevalent low-frequency flicker noise (1/f noise) in CVD graphene field-effect transistors is often up-converted to higher frequencies, thus limiting RF device performance. Here, we achieve an order of magnitude reduction in 1/f noise in field-effect transistors based on CVD graphene transferred onto silicon oxide substrates by utilizing a processing protocol that avoids aqueous chemistry after graphene transfer. Correspondingly, the normalized noise spectral density (10-7-10-8 μm2 Hz-1) and noise amplitude (4 × 10-8-10-7) in these devices are comparable to those of exfoliated and suspended graphene. We attribute the reduction in 1/f noise to a decrease in the contribution of fluctuations in the scattering cross-sections of carriers arising from dynamic redistribution of interfacial disorder.
NASA Astrophysics Data System (ADS)
Roelofs, W. S. C.; Mathijssen, S. G. J.; Janssen, R. A. J.; de Leeuw, D. M.; Kemerink, M.
2012-02-01
The width and shape of the density of states (DOS) are key parameters to describe the charge transport of organic semiconductors. Here we extract the DOS using scanning Kelvin probe microscopy on a self-assembled monolayer field effect transistor (SAMFET). The semiconductor is only a single monolayer which has allowed extraction of the DOS over a wide energy range, pushing the methodology to its fundamental limit. The measured DOS consists of an exponential distribution of deep states with additional localized states on top. The charge transport has been calculated in a generic variable range-hopping model that allows any DOS as input. We show that with the experimentally extracted DOS an excellent agreement between measured and calculated transfer curves is obtained. This shows that detailed knowledge of the density of states is a prerequisite to consistently describe the transfer characteristics of organic field effect transistors.
Kanbur, Yasin; Irimia-Vladu, Mihai; Głowacki, Eric D.; Voss, Gundula; Baumgartner, Melanie; Schwabegger, Günther; Leonat, Lucia; Ullah, Mujeeb; Sarica, Hizir; Erten-Ela, Sule; Schwödiauer, Reinhard; Sitter, Helmut; Küçükyavuz, Zuhal; Bauer, Siegfried; Sariciftci, Niyazi Serdar
2012-01-01
We report on the fabrication and performance of vacuum-processed organic field effect transistors utilizing evaporated low-density polyethylene (LD-PE) as a dielectric layer. With C60 as the organic semiconductor, we demonstrate low operating voltage transistors with field effect mobilities in excess of 4 cm2/Vs. Devices with pentacene showed a mobility of 0.16 cm2/Vs. Devices using tyrian Purple as semiconductor show low-voltage ambipolar operation with equal electron and hole mobilities of ∼0.3 cm2/Vs. These devices demonstrate low hysteresis and operational stability over at least several months. Grazing-angle infrared spectroscopy of evaporated thin films shows that the structure of the polyethylene is similar to solution-cast films. We report also on the morphological and dielectric properties of these films. Our experiments demonstrate that polyethylene is a stable dielectric supporting both hole and electron channels. PMID:23483783
Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan
2012-08-19
The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.
Hutzler, Michael; Fromherz, Peter
2004-04-01
Probing projections between brain areas and their modulation by synaptic potentiation requires dense arrays of contacts for noninvasive electrical stimulation and recording. Semiconductor technology is able to provide planar arrays with high spatial resolution to be used with planar neuronal structures such as organotypic brain slices. To address basic methodical issues we developed a silicon chip with simple arrays of insulated capacitors and field-effect transistors for stimulation of neuronal activity and recording of evoked field potentials. Brain slices from rat hippocampus were cultured on that substrate. We achieved local stimulation of the CA3 region by applying defined voltage pulses to the chip capacitors. Recording of resulting local field potentials in the CA1 region was accomplished with transistors. The relationship between stimulation and recording was rationalized by a sheet conductor model. By combining a row of capacitors with a row of transistors we determined a simple stimulus-response matrix from CA3 to CA1. Possible contributions of inhomogeneities of synaptic projection, of tissue structure and of neuroelectronic interfacing were considered. The study provides the basis for a development of semiconductor chips with high spatial resolution that are required for long-term studies of topographic mapping.
All-Electrical Spin Field Effect Transistor in van der Waals Heterostructures at Room Temperature
NASA Astrophysics Data System (ADS)
Dankert, André; Dash, Saroj
Spintronics aims to exploit the spin degree of freedom in solid state devices for data storage and information processing. Its fundamental concepts (creation, manipulation and detection of spin polarization) have been demonstrated in semiconductors and spin transistor structures using electrical and optical methods. However, an unsolved challenge is the realization of all-electrical methods to control the spin polarization in a transistor manner at ambient temperatures. Here we combine graphene and molybdenum disulfide (MoS2) in a van der Waals heterostructure to realize a spin field-effect transistor (spin-FET) at room temperature. These two-dimensional crystals offer a unique platform due to their contrasting properties, such as weak spin-orbit coupling (SOC) in graphene and strong SOC in MoS2. The gate-tuning of the Schottky barrier at the MoS2/graphene interface and MoS2 channel yields spins to interact with high SOC material and allows us to control the spin polarization and lifetime. This all-electrical spin-FET at room temperature is a substantial step in the field of spintronics and opens a new platform for testing a plethora of exotic physical phenomena, which can be key building blocks in future device architectures.
NASA Astrophysics Data System (ADS)
Lisauskas, Alvydas; Ikamas, Kestutis; Massabeau, Sylvain; Bauer, Maris; ČibiraitÄ--, DovilÄ--; Matukas, Jonas; Mangeney, Juliette; Mittendorff, Martin; Winnerl, Stephan; Krozer, Viktor; Roskos, Hartmut G.
2018-05-01
We propose to exploit rectification in field-effect transistors as an electrically controllable higher-order nonlinear phenomenon for the convenient monitoring of the temporal characteristics of THz pulses, for example, by autocorrelation measurements. This option arises because of the existence of a gate-bias-controlled super-linear response at sub-threshold operation conditions when the devices are subjected to THz radiation. We present measurements for different antenna-coupled transistor-based THz detectors (TeraFETs) employing (i) AlGaN/GaN high-electron-mobility and (ii) silicon CMOS field-effect transistors and show that the super-linear behavior in the sub-threshold bias regime is a universal phenomenon to be expected if the amplitude of the high-frequency voltage oscillations exceeds the thermal voltage. The effect is also employed as a tool for the direct determination of the speed of the intrinsic TeraFET response which allows us to avoid limitations set by the read-out circuitry. In particular, we show that the build-up time of the intrinsic rectification signal of a patch-antenna-coupled CMOS detector changes from 20 ps in the deep sub-threshold voltage regime to below 12 ps in the vicinity of the threshold voltage.
NASA Astrophysics Data System (ADS)
Shokri-Kojori, Hossein; Ji, Yiwen; Han, Xu; Paik, Younghun; Braunschweig, Adam; Kim, Sung Jin
2016-03-01
Localized surface Plasmon Resonance (LSPR) is a nanoscale phenomenon which presents strong resonance associated with noble metal nanostructures. This plasmon resonance based technology enables highly sensitive detection for chemical and biological applications. Recently, we have developed a plasmon field effect transistor (FET) that enables direct plasmonic-to-electric signal conversion with signal amplification. The plasmon FET consists of back-gated field effect transistor incorporated with gold nanoparticles on top of the FET channel. The gold nanostructures are physically separated from transistor electrodes and can be functionalized for a specific biological application. In this presentation, we report a successful demonstration of a model system to detect Con A proteins using Carbohydrate linkers as a capture molecule. The plasmon FET detected a very low concentration of Con A (0.006 mg/L) while it offers a wide dynamic range of 0.006-50 mg/L. In this demonstration, we used two-color light sources instead of a bulky spectrometer to achieve high sensitivity and wide dynamic range. The details of two-color based differential measurement method will be discussed. This novel protein-based sensor has several advantages such as extremely small size for point-of-care system, multiplexing capability, no need of complex optical geometry.
A gallium phosphide high-temperature bipolar junction transistor
NASA Technical Reports Server (NTRS)
Zipperian, T. E.; Dawson, L. R.; Chaffin, R. J.
1981-01-01
Preliminary results are reported on the development of a high temperature (350 C) gallium phosphide bipolar junction transistor (BJT) for geothermal and other energy applications. This four-layer p(+)n(-)pp(+) structure was formed by liquid phase epitaxy using a supercooling technique to insure uniform nucleation of the thin layers. Magnesium was used as the p-type dopant to avoid excessive out-diffusion into the lightly doped base. By appropriate choice of electrodes, the device may also be driven as an n-channel junction field-effect transistor. The initial design suffers from a series resistance problem which limits the transistor's usefulness at high temperatures.
Ambipolar nonvolatile memory based on a quantum-dot transistor with a nanoscale floating gate
DOE Office of Scientific and Technical Information (OSTI.GOV)
Che, Yongli; Zhang, Yating, E-mail: yating@tju.edu.cn; Song, Xiaoxian
2016-07-04
Using only solution processing methods, we developed ambipolar quantum-dot (QD) transistor floating-gate memory (FGM) that uses Au nanoparticles as a floating gate. Because of the bipolarity of the active channel of PbSe QDs, the memory could easily trap holes or electrons in the floating gate by programming/erasing (P/E) operations, which could shift the threshold voltage both up and down. As a result, the memory exhibited good programmable memory characteristics: a large memory window (ΔV{sub th} ∼ 15 V) and a long retention time (>10{sup 5 }s). The magnitude of ΔV{sub th} depended on both P/E voltages and the bias voltage (V{sub DS}): ΔV{sub th}more » was a cubic function to V{sub P/E} and linearly depended on V{sub DS}. Therefore, this FGM based on a QD transistor is a promising alternative to its inorganic counterparts owing to its advantages of bipolarity, high mobility, low cost, and large-area production.« less
Carbon nanotube nanoradios: The field emission and transistor configurations
NASA Astrophysics Data System (ADS)
Vincent, Pascal; Ayari, Anthony; Poncharal, Philippe; Barois, Thomas; Perisanu, Sorin; Gouttenoire, V.; Purcell, Stephen T.
2012-06-01
In this article, we explore and compare two distinct configurations of the "nanoradio" concept where individual carbon nanotube resonators are the central electromechanical element permitting signal demodulation. The two configurations of singly-clamped field emitters and doubly-clamped field effect transistors are examined which at first glance are quite different, but in fact involve quite similar physical concepts. Amplitude, frequency and digital demodulation are demonstrated and the analytical formulae describing the demodulation are derived as functions of the system parameters. The crucial role played by the mechanical resonance in demodulation is clearly demonstrated. For the field emission configuration we particularly concentrate on how the demodulation depends on the variation of the field amplification factor during resonance and show that amplitude demodulation results in the best transmitted signal. For the transistor configuration the important aspect is the variation of the nanotube conductance as a function of its distance to the gate. In this case frequency demodulation is much more effective and digital signal processing was achieved. The respective strengths and weaknesses of each configuration are discussed throughout the article.
Bistable metamaterial for switching and cascading elastic vibrations
Foehr, André; Daraio, Chiara
2017-01-01
The realization of acoustic devices analogous to electronic systems, like diodes, transistors, and logic elements, suggests the potential use of elastic vibrations (i.e., phonons) in information processing, for example, in advanced computational systems, smart actuators, and programmable materials. Previous experimental realizations of acoustic diodes and mechanical switches have used nonlinearities to break transmission symmetry. However, existing solutions require operation at different frequencies or involve signal conversion in the electronic or optical domains. Here, we show an experimental realization of a phononic transistor-like device using geometric nonlinearities to switch and amplify elastic vibrations, via magnetic coupling, operating at a single frequency. By cascading this device in a tunable mechanical circuit board, we realize the complete set of mechanical logic elements and interconnect selected ones to execute simple calculations. PMID:28416663
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jin, Sung Hun, E-mail: harin74@gmail.com, E-mail: jhl@snu.ac.kr, E-mail: jrogers@illinois.edu; Shin, Jongmin; Cho, In-Tak
2014-07-07
This paper presents materials, device designs, and physical/electrical characteristics of a form of nanotube electronics that is physically transient, in the sense that all constituent elements dissolve and/or disperse upon immersion into water. Studies of contact effects illustrate the ability to use water soluble metals such as magnesium for source/drain contacts in nanotube based field effect transistors. High mobilities and on/off ratios in transistors that use molybdenum, silicon nitride, and silicon oxide enable full swing characteristics for inverters at low voltages (∼5 V) and with high gains (∼30). Dissolution/disintegration tests of such systems on water soluble sheets of polyvinyl alcohol demonstratemore » physical transience within 30 min.« less
Modulation-doped β-(Al0.2Ga0.8)2O3/Ga2O3 field-effect transistor
NASA Astrophysics Data System (ADS)
Krishnamoorthy, Sriram; Xia, Zhanbo; Joishi, Chandan; Zhang, Yuewei; McGlone, Joe; Johnson, Jared; Brenner, Mark; Arehart, Aaron R.; Hwang, Jinwoo; Lodha, Saurabh; Rajan, Siddharth
2017-07-01
Modulation-doped heterostructures are a key enabler for realizing high mobility and better scaling properties for high performance transistors. We report the realization of a modulation-doped two-dimensional electron gas (2DEG) at the β-(Al0.2Ga0.8)2O3/Ga2O3 heterojunction by silicon delta doping. The formation of a 2DEG was confirmed using capacitance voltage measurements. A modulation-doped 2DEG channel was used to realize a modulation-doped field-effect transistor. The demonstration of modulation doping in the β-(Al0.2Ga0.8)2O3/Ga2O3 material system could enable heterojunction devices for high performance electronics.
Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E
2007-05-01
Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.
NASA Astrophysics Data System (ADS)
Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck
2017-09-01
The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.
Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck
2017-09-15
The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.
Triggering Mechanism for Neutron Induced Single-Event Burnout in Power Devices
NASA Astrophysics Data System (ADS)
Shoji, Tomoyuki; Nishida, Shuichi; Hamada, Kimimori
2013-04-01
Cosmic ray neutrons can trigger catastrophic failures in power devices. It has been reported that parasitic transistor action causes single-event burnout (SEB) in power metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated gate bipolar transistors (IGBTs). However, power diodes do not have an inherent parasitic transistor. In this paper, we describe the mechanism triggering SEB in power diodes for the first time using transient device simulation. Initially, generated electron-hole pairs created by incident recoil ions generate transient current, which increases the electron density in the vicinity of the n-/n+ boundary. The space charge effect of the carriers leads to an increase in the strength of the electric field at the n-/n+ boundary. Finally, the onset of impact ionization at the n-/n+ boundary can trigger SEB. Furthermore, this failure is closely related to diode secondary breakdown. It was clarified that the impact ionization at the n-/n+ boundary is a key point of the mechanism triggering SEB in power devices.
Nanomechanical silicon resonators with intrinsic tunable gain and sub-nW power consumption.
Bartsch, Sebastian T; Lovera, Andrea; Grogg, Daniel; Ionescu, Adrian M
2012-01-24
Nanoelectromechanical systems (NEMS) as integrated components for ultrasensitive sensing, time keeping, or radio frequency applications have driven the search for scalable nanomechanical transduction on-chip. Here, we present a hybrid silicon-on-insulator platform for building NEM oscillators in which fin field effect transistors (FinFETs) are integrated into nanomechanical silicon resonators. We demonstrate transistor amplification and signal mixing, coupled with mechanical motion at very high frequencies (25-80 MHz). By operating the transistor in the subthreshold region, the power consumption of resonators can be reduced to record-low nW levels, opening the way for the parallel operation of hundreds of thousands of NEM oscillators. The electromechanical charge modulation due to the field effect in a resonant transistor body constitutes a scalable nanomechanical motion detection all-on-chip and at room temperature. The new class of tunable NEMS represents a major step toward their integration in resonator arrays for applications in sensing and signal processing. © 2011 American Chemical Society
Standard Transistor Array (Star): SIMLOG/TESTGN programmer's guide, volume 2, addendum 2
NASA Technical Reports Server (NTRS)
Carroll, B. D.
1979-01-01
A brief introduction to the SIMLOG/TESTGN system of programs is given. SIMLOG is a logic simulation program, whereas TESTGN is a program for generating test sequences from output produced by SIMLOG. The structures of the two programs are described. Data base, main program, and subprogram details are also given. Guidelines for program modifications are discussed. Commented program listings are included.
Event-Driven Random-Access-Windowing CCD Imaging System
NASA Technical Reports Server (NTRS)
Monacos, Steve; Portillo, Angel; Ortiz, Gerardo; Alexander, James; Lam, Raymond; Liu, William
2004-01-01
A charge-coupled-device (CCD) based high-speed imaging system, called a realtime, event-driven (RARE) camera, is undergoing development. This camera is capable of readout from multiple subwindows [also known as regions of interest (ROIs)] within the CCD field of view. Both the sizes and the locations of the ROIs can be controlled in real time and can be changed at the camera frame rate. The predecessor of this camera was described in High-Frame-Rate CCD Camera Having Subwindow Capability (NPO- 30564) NASA Tech Briefs, Vol. 26, No. 12 (December 2002), page 26. The architecture of the prior camera requires tight coupling between camera control logic and an external host computer that provides commands for camera operation and processes pixels from the camera. This tight coupling limits the attainable frame rate and functionality of the camera. The design of the present camera loosens this coupling to increase the achievable frame rate and functionality. From a host computer perspective, the readout operation in the prior camera was defined on a per-line basis; in this camera, it is defined on a per-ROI basis. In addition, the camera includes internal timing circuitry. This combination of features enables real-time, event-driven operation for adaptive control of the camera. Hence, this camera is well suited for applications requiring autonomous control of multiple ROIs to track multiple targets moving throughout the CCD field of view. Additionally, by eliminating the need for control intervention by the host computer during the pixel readout, the present design reduces ROI-readout times to attain higher frame rates. This camera (see figure) includes an imager card consisting of a commercial CCD imager and two signal-processor chips. The imager card converts transistor/ transistor-logic (TTL)-level signals from a field programmable gate array (FPGA) controller card. These signals are transmitted to the imager card via a low-voltage differential signaling (LVDS) cable assembly. The FPGA controller card is connected to the host computer via a standard peripheral component interface (PCI).
3D modeling of dual-gate FinFET.
Mil'shtein, Samson; Devarakonda, Lalitha; Zanchi, Brian; Palma, John
2012-11-13
The tendency to have better control of the flow of electrons in a channel of field-effect transistors (FETs) did lead to the design of two gates in junction field-effect transistors, field plates in a variety of metal semiconductor field-effect transistors and high electron mobility transistors, and finally a gate wrapping around three sides of a narrow fin-shaped channel in a FinFET. With the enhanced control, performance trends of all FETs are still challenged by carrier mobility dependence on the strengths of the electrical field along the channel. However, in cases when the ratio of FinFET volume to its surface dramatically decreases, one should carefully consider the surface boundary conditions of the device. Moreover, the inherent non-planar nature of a FinFET demands 3D modeling for accurate analysis of the device performance. Using the Silvaco modeling tool with quantization effects, we modeled a physical FinFET described in the work of Hisamoto et al. (IEEE Tran. Elec. Devices 47:12, 2000) in 3D. We compared it with a 2D model of the same device. We demonstrated that 3D modeling produces more accurate results. As 3D modeling results came close to experimental measurements, we made the next step of the study by designing a dual-gate FinFET biased at Vg1 >Vg2. It is shown that the dual-gate FinFET carries higher transconductance than the single-gate device.
3D modeling of dual-gate FinFET
NASA Astrophysics Data System (ADS)
Mil'shtein, Samson; Devarakonda, Lalitha; Zanchi, Brian; Palma, John
2012-11-01
The tendency to have better control of the flow of electrons in a channel of field-effect transistors (FETs) did lead to the design of two gates in junction field-effect transistors, field plates in a variety of metal semiconductor field-effect transistors and high electron mobility transistors, and finally a gate wrapping around three sides of a narrow fin-shaped channel in a FinFET. With the enhanced control, performance trends of all FETs are still challenged by carrier mobility dependence on the strengths of the electrical field along the channel. However, in cases when the ratio of FinFET volume to its surface dramatically decreases, one should carefully consider the surface boundary conditions of the device. Moreover, the inherent non-planar nature of a FinFET demands 3D modeling for accurate analysis of the device performance. Using the Silvaco modeling tool with quantization effects, we modeled a physical FinFET described in the work of Hisamoto et al. (IEEE Tran. Elec. Devices 47:12, 2000) in 3D. We compared it with a 2D model of the same device. We demonstrated that 3D modeling produces more accurate results. As 3D modeling results came close to experimental measurements, we made the next step of the study by designing a dual-gate FinFET biased at V g1 > V g2. It is shown that the dual-gate FinFET carries higher transconductance than the single-gate device.
Kwon, Jimin; Takeda, Yasunori; Fukuda, Kenjiro; Cho, Kilwon; Tokito, Shizuo; Jung, Sungjune
2016-11-22
In this paper, we demonstrate three-dimensional (3D) integrated circuits (ICs) based on a 3D complementary organic field-effect transistor (3D-COFET). The transistor-on-transistor structure was achieved by vertically stacking a p-type OFET over an n-type OFET with a shared gate joining the two transistors, effectively halving the footprint of printed transistors. All the functional layers including organic semiconductors, source/drain/gate electrodes, and interconnection paths were fully inkjet-printed except a parylene dielectric which was deposited by chemical vapor deposition. An array of printed 3D-COFETs and their inverter logic gates comprising over 100 transistors showed 100% yield, and the uniformity and long-term stability of the device were also investigated. A full-adder circuit, the most basic computing unit, has been successfully demonstrated using nine NAND gates based on the 3D structure. The present study fulfills the essential requirements for the fabrication of organic printed complex ICs (increased transistor density, 100% yield, high uniformity, and long-term stability), and the findings can be applied to realize more complex digital/analogue ICs and intelligent devices.
Scaling of Device Variability and Subthreshold Swing in Ballistic Carbon Nanotube Transistors
NASA Astrophysics Data System (ADS)
Cao, Qing; Tersoff, Jerry; Han, Shu-Jen; Penumatcha, Ashish V.
2015-08-01
In field-effect transistors, the inherent randomness of dopants and other charges is a major cause of device-to-device variability. For a quasi-one-dimensional device such as carbon nanotube transistors, even a single charge can drastically change the performance, making this a critical issue for their adoption as a practical technology. Here we calculate the effect of the random charges at the gate-oxide surface in ballistic carbon nanotube transistors, finding good agreement with the variability statistics in recent experiments. A combination of experimental and simulation results further reveals that these random charges are also a major factor limiting the subthreshold swing for nanotube transistors fabricated on thin gate dielectrics. We then establish that the scaling of the nanotube device uniformity with the gate dielectric, fixed-charge density, and device dimension is qualitatively different from conventional silicon transistors, reflecting the very different device physics of a ballistic transistor with a quasi-one-dimensional channel. The combination of gate-oxide scaling and improved control of fixed-charge density should provide the uniformity needed for large-scale integration of such novel one-dimensional transistors even at extremely scaled device dimensions.
Multifunctional Self-Assembled Monolayers for Organic Field-Effect Transistors
NASA Astrophysics Data System (ADS)
Cernetic, Nathan
Organic field effect transistors (OFETs) have the potential to reach commercialization for a wide variety of applications such as active matrix display circuitry, chemical and biological sensing, radio-frequency identification devices and flexible electronics. In order to be commercially competitive with already at-market amorphous silicon devices, OFETs need to approach similar performance levels. Significant progress has been made in developing high performance organic semiconductors and dielectric materials. Additionally, a common route to improve the performance metric of OFETs is via interface modification at the critical dielectric/semiconductor and electrode/semiconductor interface which often play a significant role in charge transport properties. These metal oxide interfaces are typically modified with rationally designed multifunctional self-assembled monolayers. As means toward improving the performance metrics of OFETs, rationally designed multifunctional self-assembled monolayers are used to explore the relationship between surface energy, SAM order, and SAM dipole on OFET performance. The studies presented within are (1) development of a multifunctional SAM capable of simultaneously modifying dielectric and metal surface while maintaining compatibility with solution processed techniques (2) exploration of the relationship between SAM dipole and anchor group on graphene transistors, and (3) development of self-assembled monolayer field-effect transistor in which the traditional thick organic semiconductor is replaced by a rationally designed self-assembled monolayer semiconductor. The findings presented within represent advancement in the understanding of the influence of self-assembled monolayers on OFETs as well as progress towards rationally designed monolayer transistors.
Hudait, Mantu K.; Clavel, Michael; Goley, Patrick; Jain, Nikhil; Zhu, Yan
2014-01-01
Germanium-based materials and device architectures have recently appeared as exciting material systems for future low-power nanoscale transistors and photonic devices. Heterogeneous integration of germanium (Ge)-based materials on silicon (Si) using large bandgap buffer architectures could enable the monolithic integration of electronics and photonics. In this paper, we report on the heterogeneous integration of device-quality epitaxial Ge on Si using composite AlAs/GaAs large bandgap buffer, grown by molecular beam epitaxy that is suitable for fabricating low-power fin field-effect transistors required for continuing transistor miniaturization. The superior structural quality of the integrated Ge on Si using AlAs/GaAs was demonstrated using high-resolution x-ray diffraction analysis. High-resolution transmission electron microscopy confirmed relaxed Ge with high crystalline quality and a sharp Ge/AlAs heterointerface. X-ray photoelectron spectroscopy demonstrated a large valence band offset at the Ge/AlAs interface, as compared to Ge/GaAs heterostructure, which is a prerequisite for superior carrier confinement. The temperature-dependent electrical transport properties of the n-type Ge layer demonstrated a Hall mobility of 370 cm2/Vs at 290 K and 457 cm2/Vs at 90 K, which suggests epitaxial Ge grown on Si using an AlAs/GaAs buffer architecture would be a promising candidate for next-generation high-performance and energy-efficient fin field-effect transistor applications. PMID:25376723
Magnetomicrofluidics Circuits for Organizing Bioparticle Arrays
NASA Astrophysics Data System (ADS)
Abedini-Nassab, Roozbeh
Single-cell analysis (SCA) tools have important applications in the analysis of phenotypic heterogeneity, which is difficult or impossible to analyze in bulk cell culture or patient samples. SCA tools thus have a myriad of applications ranging from better credentialing of drug therapies to the analysis of rare latent cells harboring HIV infection or in Cancer. However, existing SCA systems usually lack the required combination of programmability, flexibility, and scalability necessary to enable the study of cell behaviors and cell-cell interactions at the scales sufficient to analyze extremely rare events. To advance the field, I have developed a novel, programmable, and massively-parallel SCA tool which is based on the principles of computer circuits. By integrating these magnetic circuits with microfluidics channels, I developed a platform that can organize a large number of single particles into an array in a controlled manner. My magnetophoretic circuits use passive elements constructed in patterned magnetic thin films to move cells along programmed tracks with an external rotating magnetic field. Cell motion along these tracks is analogous to the motion of charges in an electrical conductor, following a rule similar to Ohm's law. I have also developed asymmetric conductors, similar to electrical diodes, and storage sites for cells that behave similarly to electrical capacitors. I have also developed magnetophoretic circuits which use an overlaid pattern of microwires to switch single cells between different tracks. This switching mechanism, analogous to the operation of electronic transistors, is achieved by establishing a semiconducting gap in the magnetic pattern which can be changed from an insulating state to a conducting state by application of electrical current to an overlaid electrode. I performed an extensive study on the operation of transistors to optimize their geometry and minimize the required gate currents. By combining these elements into integrated circuits, I have built devices which are capable of organizing a precise number of cells into individually addressable array sites, similar to how a random access memory (RAM) stores electronic data. My programmable magnetic circuits allow for the organization of both cells and single-cell pairs into large arrays. Single cells can also potentially be retrieved for downstream high-throughput genomic analysis. In order to enhance the efficiency of the tool and to increase the delivery speed of the particles, I have also developed microfluidics systems that are combined with the magnetophoretic circuits. This hybrid system, called magnetomicrofluidics, is capable of rapidly organizing an array of particles and cells with the high precision and control. I have also shown that cells can be grown inside these chips for multiple days, enabling the long-term phenotypic analysis of rare cellular events. These types of studies can reveal important insights about the intercellular signaling networks and answer crucial questions in biology and immunology.
Vertical GaN Devices for Power Electronics in Extreme Environments
2016-03-31
electronics applications. In this paper vertical p-n diodes and transistors fabricated on pseudo bulk low defect density (104 to 106 cm-2) GaN substrates are...holes in p-GaN has deleterious effect on p-n junction behavior (Fig. 2), p-GaN contacts, and channel control in junction field-effect transistors at...and transistors ) utilizing p-n junctions are suitable for most practical applications including automotive (210K < T < 423K) but may have limitations
Ideal Channel Field Effect Transistors
2010-03-01
well as on /?-GaAs/w-GaAs homojunctions grown by molecular beam epitaxy (MBE). The diode I-Vs at reverse bias are plotted below. The measured breakdown...transistors and composite channel InAlAs/InGaAs/lnP/InAlAs high electron mobility transistors ( HEMTs ), which have taken the full advantage of the matched...result in a large number of dislocations in GaAs films epitaxially grown on wurtzite GaN. In this work, we have successfully integrated GaAs with GaN
Atomic-Monolayer MoS2 Band-to-Band Tunneling Field-Effect Transistor.
Lan, Yann-Wen; Torres, Carlos M; Tsai, Shin-Hung; Zhu, Xiaodan; Shi, Yumeng; Li, Ming-Yang; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L
2016-11-01
The experimental observation of band-to-band tunneling in novel tunneling field-effect transistors utilizing a monolayer of MoS 2 as the conducting channel is demonstrated. Our results indicate that the strong gate-coupling efficiency enabled by two-dimensional materials, such as monolayer MoS 2 , results in the direct manifestation of a band-to-band tunneling current and an ambipolar transport. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Oku, Takeo, E-mail: oku@mat.usp.ac.jp; Matsumoto, Taisuke; Ohishi, Yuya
A power storage system using spherical silicon (Si) solar cells, maximum power point tracking charge controller, lithium-ion battery and a direct current-alternating current (DC-AC) inverter was constructed. Performance evaluation of the DC-AC inverter was carried out, and the DC-AC conversion efficiencies of the SiC field-effect transistor (FET) inverter was improved compared with those of the ordinary Si-FET based inverter.
Novel Field-Effect Schottky Barrier Transistors Based on Graphene-MoS2 Heterojunctions
Tian, He; Tan, Zhen; Wu, Can; Wang, Xiaomu; Mohammad, Mohammad Ali; Xie, Dan; Yang, Yi; Wang, Jing; Li, Lain-Jong; Xu, Jun; Ren, Tian-Ling
2014-01-01
Recently, two-dimensional materials such as molybdenum disulphide (MoS2) have been demonstrated to realize field effect transistors (FET) with a large current on-off ratio. However, the carrier mobility in backgate MoS2 FET is rather low (typically 0.5–20 cm2/V·s). Here, we report a novel field-effect Schottky barrier transistors (FESBT) based on graphene-MoS2 heterojunction (GMH), where the characteristics of high mobility from graphene and high on-off ratio from MoS2 are properly balanced in the novel transistors. Large modulation on the device current (on/off ratio of 105) is achieved by adjusting the backgate (through 300 nm SiO2) voltage to modulate the graphene-MoS2 Schottky barrier. Moreover, the field effective mobility of the FESBT is up to 58.7 cm2/V·s. Our theoretical analysis shows that if the thickness of oxide is further reduced, a subthreshold swing (SS) of 40 mV/decade can be maintained within three orders of drain current at room temperature. This provides an opportunity to overcome the limitation of 60 mV/decade for conventional CMOS devices. The FESBT implemented with a high on-off ratio, a relatively high mobility and a low subthreshold promises low-voltage and low-power applications for future electronics. PMID:25109609
Within the 3 -year effort, we have established several major findings:
Front and backside processed thin film electronic devices
Evans, Paul G [Madison, WI; Lagally, Max G [Madison, WI; Ma, Zhenqiang [Middleton, WI; Yuan, Hao-Chih [Lakewood, CO; Wang, Guogong [Madison, WI; Eriksson, Mark A [Madison, WI
2012-01-03
This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Osteoblastic cells trigger gate currents on nanocrystalline diamond transistor.
Izak, Tibor; Krátká, Marie; Kromka, Alexander; Rezek, Bohuslav
2015-05-01
We show the influence of osteoblastic SAOS-2 cells on the transfer characteristics of nanocrystalline diamond solution-gated field-effect transistors (SGFET) prepared on glass substrates. Channels of these fully transparent SGFETs are realized by hydrogen termination of undoped diamond film. After cell cultivation, the transistors exhibit about 100× increased leakage currents (up to 10nA). During and after the cell delamination, the transistors return to original gate currents. We propose a mechanism where this triggering effect is attributed to ions released from adhered cells, which depends on the cell adhesion morphology, and could be used for cell culture monitoring. Copyright © 2015 Elsevier B.V. All rights reserved.
Equivalent input spectrum and drain current spectrum for 1/ƒ noise in short channel MOS transistors
NASA Astrophysics Data System (ADS)
Gentil, P.; Mounib, A.
1981-05-01
Flicker noise in MOS transistors can be evaluated by measuring the spectrum SID of the drain current fluctuation or the spectrum Sve of an equivalent gate fluctuation. We show here that experimental variations of {S I D}/{Sve} are in good agreement with gm2 by considering a model of the transconductance gm which takes into account the variations of the channel carriers mobility with the surface electric field. The model agrees with the experimental results obtained on short channel MOS transistors which exhibit large variations of mobility with the gate voltage. The validity of physical interpretations of noise data on MOS transistors is examined.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Liu, Ning; Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201; Hui Liu, Yang
2015-02-16
The sensitivity of a standard ion-sensitive field-effect transistor is limited to be 59.2 mV/pH (Nernst limit) at room temperature. Here, a concept based on laterally synergic electric-double-layer (EDL) modulation is proposed in order to overcome the Nernst limit. Indium-zinc-oxide EDL transistors with two laterally coupled gates are fabricated, and the synergic modulation behaviors of the two asymmetric gates are investigated. A high sensitivity of ∼168 mV/pH is realized in the dual-gate operation mode. Laterally synergic modulation in oxide-based EDL transistors is interesting for high-performance bio-chemical sensors.
NASA Astrophysics Data System (ADS)
Kim, Yun Ji; Kim, Seung Mo; Heo, Sunwoo; Lee, Hyeji; In Lee, Ho; Chang, Kyoung Eun; Lee, Byoung Hun
2018-02-01
High-pressure annealing in oxygen ambient at low temperatures (∼300 °C) was effective in improving the performance of graphene field-effect transistors. The field-effect mobility was improved by 45% and 83% for holes and electrons, respectively. The improvement in the quality of Al2O3 and the reduction in oxygen-related charge generation at the Al2O3-graphene interface, are suggested as the reasons for this improvement. This process can be useful for the commercial implementation of graphene-based electronic devices.
Ion-Sensitive Field-Effect Transistor for Biological Sensing
Lee, Chang-Soo; Kim, Sang Kyu; Kim, Moonil
2009-01-01
In recent years there has been great progress in applying FET-type biosensors for highly sensitive biological detection. Among them, the ISFET (ion-sensitive field-effect transistor) is one of the most intriguing approaches in electrical biosensing technology. Here, we review some of the main advances in this field over the past few years, explore its application prospects, and discuss the main issues, approaches, and challenges, with the aim of stimulating a broader interest in developing ISFET-based biosensors and extending their applications for reliable and sensitive analysis of various biomolecules such as DNA, proteins, enzymes, and cells. PMID:22423205
Charge transport in organic multi-layer devices under electric and optical fields
NASA Astrophysics Data System (ADS)
Park, June Hyoung
2007-12-01
Charge transport in small organic molecules and conjugated conducting polymers under electric or optical fields is studied by using field effect transistors and photo-voltaic cells with multiple thin layers. With these devices, current under electric field, photo-current under optical field, and luminescence of optical materials are measured to characterize organic and polymeric materials. For electric transport studies, poly(3,4-ethylenedioxythiophene) doped by polystyrenesulfonic acid is used, which is conductive with conductivity of approximately 25 S/cm. Despite their high conductance, field effect transistors based on the films are successfully built and characterized by monitoring modulations of drain current by gate voltage and IV characteristic curves. Due to very thin insulating layers of poly(vinylphenol), the transistors are relative fast under small gate voltage variation although heavy ions are involved in charge transport. In IV characteristic curves, saturation effects can be observed. Analysis using conventional field effect transistor model indicates high mobility of charge carriers, 10 cm2/V·sec, which is not consistent with the mobility of the conducting polymer. It is proposed that the effect of a small density of ions injected via polymer dielectric upon application of gate voltage and the ion compensation of key hopping sites accounts for the operation of the field effect transistors. For the studies of transport under optical field, photovoltaic cells with 3 different dendrons, which are efficient to harvest photo-excited electrons, are used. These dendrons consist of two electron-donors (tetraphenylporphyrin) and one electron-accepter (naphthalenediimide). Steady-state fluorescence measurements show that inter-molecular interaction is dominant in solid dendron film, although intra-molecular interaction is still present. Intra-molecular interaction is suggested by different fluorescence lifetimes between solutions of donor and dendrons. This intra-molecular interaction has two processes, transport via pi-stackings and transport via linking functional groups in the dendrons. IV characteristic spectra of the photovoltaic cells suggest that the transport route of photo-excited charges depends on wavelength of incident light on the cells. For excitation by the Soret band and the lowest Q band, a photo-excited electron can transport directly to a neighbor dendron. For excitation by high-energy Q bands, a photo-excited electron transports via the electron-accepters.
Monolithically integrated bacteriorhodopsin-GaAs/GaAlAs phototransceiver.
Shin, Jonghyun; Bhattacharya, Pallab; Xu, Jian; Váró, György
2004-10-01
A monolithically integrated bacteriorhodopsin-semiconductor phototransceiver is demonstrated for the first time to the authors' knowledge. In this novel biophotonic optical interconnect, the input photoexcitation is detected by bacteriorhodopsin (bR) that has been selectively deposited onto the gate of a GaAs-based field-effect transistor. The photovoltage developed across the bR is converted by the transistor into an amplified photocurrent, which drives an integrated light-emitting diode with a Ga0.37Al0.63As active region. Advantage is taken of the high-input impedance of the field-effect transistor, which matches the high internal resistance of bR. The input and output wavelengths are 594 and 655 nm, respectively. The transient response of the optoelectronic circuit to modulated input light has also been studied.
Quantum simulation of an ultrathin body field-effect transistor with channel imperfections
NASA Astrophysics Data System (ADS)
Vyurkov, V.; Semenikhin, I.; Filippov, S.; Orlikovsky, A.
2012-04-01
An efficient program for the all-quantum simulation of nanometer field-effect transistors is elaborated. The model is based on the Landauer-Buttiker approach. Our calculation of transmission coefficients employs a transfer-matrix technique involving the arbitrary precision (multiprecision) arithmetic to cope with evanescent modes. Modified in such way, the transfer-matrix technique turns out to be much faster in practical simulations than that of scattering-matrix. Results of the simulation demonstrate the impact of realistic channel imperfections (random charged centers and wall roughness) on transistor characteristics. The Landauer-Buttiker approach is developed to incorporate calculation of the noise at an arbitrary temperature. We also validate the ballistic Landauer-Buttiker approach for the usual situation when heavily doped contacts are indispensably included into the simulation region.
NASA Astrophysics Data System (ADS)
Hu, Zhaoying; Tulevski, George S.; Hannon, James B.; Afzali, Ali; Liehr, Michael; Park, Hongsik
2015-06-01
Carbon nanotubes (CNTs) have been widely studied as a channel material of scaled transistors for high-speed and low-power logic applications. In order to have sufficient drive current, it is widely assumed that CNT-based logic devices will have multiple CNTs in each channel. Understanding the effects of the number of CNTs on device performance can aid in the design of CNT field-effect transistors (CNTFETs). We have fabricated multi-CNT-channel CNTFETs with an 80-nm channel length using precise self-assembly methods. We describe compact statistical models and Monte Carlo simulations to analyze failure probability and the variability of the on-state current and threshold voltage. The results show that multichannel CNTFETs are more resilient to process variation and random environmental fluctuations than single-CNT devices.
A manufacturable process integration approach for graphene devices
NASA Astrophysics Data System (ADS)
Vaziri, Sam; Lupina, Grzegorz; Paussa, Alan; Smith, Anderson D.; Henkel, Christoph; Lippert, Gunther; Dabrowski, Jarek; Mehr, Wolfgang; Östling, Mikael; Lemme, Max C.
2013-06-01
In this work, we propose an integration approach for double gate graphene field effect transistors. The approach includes a number of process steps that are key for future integration of graphene in microelectronics: bottom gates with ultra-thin (2 nm) high-quality thermally grown SiO2 dielectrics, shallow trench isolation between devices and atomic layer deposited Al2O3 top gate dielectrics. The complete process flow is demonstrated with fully functional GFET transistors and can be extended to wafer scale processing. We assess, through simulation, the effects of the quantum capacitance and band bending in the silicon substrate on the effective electric fields in the top and bottom gate oxide. The proposed process technology is suitable for other graphene-based devices such as graphene-based hot electron transistors and photodetectors.
Li, Dehui; Cheng, Hung-Chieh; Wang, Yiliu; Zhao, Zipeng; Wang, Gongming; Wu, Hao; He, Qiyuan; Huang, Yu; Duan, Xiangfeng
2017-01-01
Transformation of unipolar n-type semiconductor behavior to ambipolar and finally to unipolar p-type behavior in CH 3 NH 3 PbI 3 microplate field-effect transistors by thermal annealing is reported. The photoluminescence spectra essentially maintain the same features before and after the thermal annealing process, demonstrating that the charge transport measurement provides a sensitive way to probe low-concentration defects in perovskite materials. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Scanning gate study of organic thin-film field-effect transistor
NASA Astrophysics Data System (ADS)
Aoki, N.; Sudou, K.; Matsusaki, K.; Okamoto, K.; Ochiai, Y.
2008-03-01
Scanning gate microscopy (SGM) has been applied for a study of organic thin-film field effect transistor (OFET). In contrast to one-dimensional nano-material such a carbon nanonube or nano-structure such a quantum point contact, visualization a transport characteristic of OFET channel is basically rather difficult since the channel width is much larger than the size of the SGM tip. Nevertheless, Schottky barriers are successfully visualized at the boundary between the metal electrodes and the OFET channel at ambient atmosphere.
1988-03-01
Results, ATR-86A(8501)-1, The Aerospace Corporation: El Segundo, Calif. (20 May 1987). 3. D. Neaman , W. Shedd, and B. Buchanan, "Permanently Ionizing...Radiation Effects in Dielectrically Bounded Field-Effect Transistors," IEEE Trans.. Nucl. Sci. NS-20 [6], 158-165 (Decembe. 1973). 4. D. Neaman , W. Shedd...1974). 5. D. Neaman , W. Shedd, and B. Buchanan, "Silicon-Sapphire Interface Charge Trapping -- Effects of Sapphire Type and Epi Growth Conditions
Integrated materials design of organic semiconductors for field-effect transistors.
Mei, Jianguo; Diao, Ying; Appleton, Anthony L; Fang, Lei; Bao, Zhenan
2013-05-08
The past couple of years have witnessed a remarkable burst in the development of organic field-effect transistors (OFETs), with a number of organic semiconductors surpassing the benchmark mobility of 10 cm(2)/(V s). In this perspective, we highlight some of the major milestones along the way to provide a historical view of OFET development, introduce the integrated molecular design concepts and process engineering approaches that lead to the current success, and identify the challenges ahead to make OFETs applicable in real applications.
The analysis of ion-selective field-effect transistor operation in chemical sensors
NASA Astrophysics Data System (ADS)
Hotra, Zenon; Holyaka, Roman; Hladun, Michael; Humenuk, Iryna
2003-09-01
In this paper we present the research results of influence of substrate potential in ion-selective field-effect transistors (ISFET) on output signal of chemical sensors, e.g. PH-meters. It is shown that the instability of substrate-source p-n junction bias in well-known chemical sensors, which use grounded reference electrode - ISFET gate, affect on sensor characteristics in negative way. The analytical description and research results of 'substrate effect' on ISFET characteristics are considered.
Yuan, Shuoguo; Yang, Zhibin; Xie, Chao; Yan, Feng; Dai, Jiyan; Lau, Shu Ping; Chan, Helen L W; Hao, Jianhua
2016-12-01
A vertical graphene heterostructure field-effect transistor (VGHFET) using an ultrathin ferroelectric film as a tunnel barrier is developed. The heterostructure is capable of providing new degrees of tunability and functionality via coupling between the ferroelectricity and the tunnel current of the VGHFET, which results in a high-performance device. The results pave the way for developing novel atomic-scale 2D heterostructures and devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Charge carrier transport in polycrystalline organic thin film based field effect transistors
NASA Astrophysics Data System (ADS)
Rani, Varsha; Sharma, Akanksha; Ghosh, Subhasis
2016-05-01
The charge carrier transport mechanism in polycrystalline thin film based organic field effect transistors (OFETs) has been explained using two competing models, multiple trapping and releases (MTR) model and percolation model. It has been shown that MTR model is most suitable for explaining charge carrier transport in grainy polycrystalline organic thin films. The energetic distribution of traps determined independently using Mayer-Neldel rule (MNR) is in excellent agreement with the values obtained by MTR model for copper phthalocyanine and pentacene based OFETs.
Magnetic field enhanced resonant tunneling in a silicon nanowire single-electron-transistor.
Aravind, K; Lin, M C; Ho, I L; Wu, C S; Kuo, Watson; Kuan, C H; Chang-Liao, K S; Chen, C D
2012-03-01
We report fabrication, measurement and simulation of silicon single-electron-transistors made on silicon-on-insulator wafers. At T-2 K, these devices showed clear Coulomb blockade structures. An external perpendicular magnetic field was found to enhance the resonant tunneling peak and was used to predict the presence of two laterally coupled quantum dots in the narrow constriction between the source-drain electrodes. The proposed model and measured experimental data were consistently explained using numerical simulations.
Kim, Jiye; Jang, Jaeyoung; Kim, Kyunghun; Kim, Haekyoung; Kim, Se Hyun; Park, Chan Eon
2014-11-12
Tuning of the energetic barriers to charge transfer at the semiconductor/dielectric interface in organic field-effect transistors (OFETs) is achieved by varying the dielectric functionality. Based on this, the correlation between the magnitude of the energy barrier and the gate-bias stress stability of the OFETs is demonstrated, and the origin of the excellent device stability of OFETs employing fluorinated dielectrics is revealed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
2015-07-01
AFRL-AFOSR-UK-TR-2015-0034 Studies by Near Edge X-ray Absorption Spectroscopies of Bonding Dynamics at the Graphene /Guanine...Interface – A Proposal for High Mobility, Organic Graphene Field Effect Transistors Eva Campo BANGOR UNIVERSITY COLLEGE ROAD BANGOR...April 2015 4. TITLE AND SUBTITLE Studies by Near Edge X-ray Absorption Spectroscopies of Bonding Dynamics at the Graphene /Guanine Interface - A
N-Channel field-effect transistors with floating gates for extracellular recordings.
Meyburg, Sven; Goryll, Michael; Moers, Jürgen; Ingebrandt, Sven; Böcker-Meffert, Simone; Lüth, Hans; Offenhäusser, Andreas
2006-01-15
A field-effect transistor (FET) for recording extracellular signals from electrogenic cells is presented. The so-called floating gate architecture combines a complementary metal oxide semiconductor (CMOS)-type n-channel transistor with an independent sensing area. This concept allows the transistor and sensing area to be optimised separately. The devices are robust and can be reused several times. The noise level of the devices was smaller than of comparable non-metallised gate FETs. In addition to the usual drift of FET devices, we observed a long-term drift that has to be controlled for future long-term measurements. The device performance for extracellular signal recording was tested using embryonic rat cardiac myocytes cultured on fibronectin-coated chips. The extracellular cell signals were recorded before and after the addition of the cardioactive isoproterenol. The signal shapes of the measured action potentials were comparable to the non-metallised gate FETs previously used in similar experiments. The fabrication of the devices involved the process steps of standard CMOS that were necessary to create n-channel transistors. The implementation of a complete CMOS process would facilitate the integration of the logical circuits necessary for signal pre-processing on a chip, which is a prerequisite for a greater number of sensor spots in future layouts.
Transistors and tunnel diodes enabled by large-scale MoS2 nanosheets grown on GaN
NASA Astrophysics Data System (ADS)
San Yip, Pak; Zou, Xinbo; Cho, Wai Ching; Wu, Kam Lam; Lau, Kei May
2017-07-01
We report growth, fabrication, and device results of MoS2-based transistors and diodes implemented on a single 2D/3D material platform. The 2D/3D platform consists of a large-area MoS2 thin film grown on SiO2/p-GaN substrates. Atomic force microscopy, scanning electron microscopy, and Raman spectroscopy were used to characterize the thickness and quality of the as-grown MoS2 film, showing that the large-area MoS2 nanosheet has a smooth surface morphology constituted by small grains. Starting from the same material, both top-gated MoS2 field effect transistors and MoS2/SiO2/p-GaN heterojunction diodes were fabricated. The transistors exhibited a high on/off ratio of 105, a subthreshold swing of 74 mV dec-1, field effect mobility of 0.17 cm2 V-1 s-1, and distinctive current saturation characteristics. For the heterojunction diodes, current-rectifying characteristics were demonstrated with on-state current density of 29 A cm-2 and a current blocking property up to -25 V without breakdown. The reported transistors and diodes enabled by the same 2D/3D material stack present promising building blocks for constructing future nanoscale electronics.
Multimode Silicon Nanowire Transistors
2014-01-01
The combined capabilities of both a nonplanar design and nonconventional carrier injection mechanisms are subject to recent scientific investigations to overcome the limitations of silicon metal oxide semiconductor field effect transistors. In this Letter, we present a multimode field effect transistors device using silicon nanowires that feature an axial n-type/intrinsic doping junction. A heterostructural device design is achieved by employing a self-aligned nickel-silicide source contact. The polymorph operation of the dual-gate device enabling the configuration of one p- and two n-type transistor modes is demonstrated. Not only the type but also the carrier injection mode can be altered by appropriate biasing of the two gate terminals or by inverting the drain bias. With a combined band-to-band and Schottky tunneling mechanism, in p-type mode a subthreshold swing as low as 143 mV/dec and an ON/OFF ratio of up to 104 is found. As the device operates in forward bias, a nonconventional tunneling transistor is realized, enabling an effective suppression of ambipolarity. Depending on the drain bias, two different n-type modes are distinguishable. The carrier injection is dominated by thermionic emission in forward bias with a maximum ON/OFF ratio of up to 107 whereas in reverse bias a Schottky tunneling mechanism dominates the carrier transport. PMID:25303290
SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C
NASA Technical Reports Server (NTRS)
Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Okojie, Robert S.; Beheim, Glenn M.; Meredith, Roger; Ferrier, Terry
2006-01-01
While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.
Electrical characteristics of organic perylene single-crystal-based field-effect transistors
NASA Astrophysics Data System (ADS)
Lee, Jin-Woo; Kang, Han-Saem; Kim, Min-Ki; Kim, Kihyun; Cho, Mi-Yeon; Kwon, Young-Wan; Joo, Jinsoo; Kim, Jae-Il; Hong, Chang-Seop
2007-12-01
We report on the fabrication of organic field-effect transistors (OFETs) using perylene single crystal as the active material and their electrical characteristics. Perylene single crystals were directly grown from perylene powder in a furnace using a relatively short growth time of 1-3 h. The crystalline structure of the perylene single crystals was characterized by means of a single-crystal x-ray diffractometer. In order to place the perylene single crystal onto the Au electrodes of the field-effect transistor, a polymethlymethacrylate thin layer was spin-coated on top of the crystal surface. The OFETs fabricated using the perylene single crystal showed a typical p-type operating mode. The field-effect mobility of the perylene crystal based OFETs was measured to be ˜9.62×10-4 cm2/V s at room temperature. The anisotropy of the mobility implying the existence of different mobilities when applying currents in different directions was observed for the OFETs, and the existence of traps in the perylene crystal was found through the measurements of the temperature-dependent mobility at various operating drain voltages.
Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.
2016-01-01
Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315
25th anniversary article: organic field-effect transistors: the path beyond amorphous silicon.
Sirringhaus, Henning
2014-03-05
Over the past 25 years, organic field-effect transistors (OFETs) have witnessed impressive improvements in materials performance by 3-4 orders of magnitude, and many of the key materials discoveries have been published in Advanced Materials. This includes some of the most recent demonstrations of organic field-effect transistors with performance that clearly exceeds that of benchmark amorphous silicon-based devices. In this article, state-of-the-art in OFETs are reviewed in light of requirements for demanding future applications, in particular active-matrix addressing for flexible organic light-emitting diode (OLED) displays. An overview is provided over both small molecule and conjugated polymer materials for which field-effect mobilities exceeding > 1 cm(2) V(-1) s(-1) have been reported. Current understanding is also reviewed of their charge transport physics that allows reaching such unexpectedly high mobilities in these weakly van der Waals bonded and structurally comparatively disordered materials with a view towards understanding the potential for further improvement in performance in the future. © 2014 The Authors. Published by WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Deformable Organic Nanowire Field-Effect Transistors.
Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan
2018-02-01
Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
A scanning probe mounted on a field-effect transistor: Characterization of ion damage in Si.
Shin, Kumjae; Lee, Hoontaek; Sung, Min; Lee, Sang Hoon; Shin, Hyunjung; Moon, Wonkyu
2017-10-01
We have examined the capabilities of a Tip-On-Gate of Field-Effect Transistor (ToGoFET) probe for characterization of FIB-induced damage in Si surface. A ToGoFET probe is the SPM probe which the Field Effect Transistor(FET) is embedded at the end of a cantilever and a Pt tip was mounted at the gate of FET. The ToGoFET probe can detect the surface electrical properties by measuring source-drain current directly modulated by the charge on the tip. In this study, a Si specimen whose surface was processed with Ga+ ion beam was prepared. Irradiation and implantation with Ga+ ions induce highly localized modifications to the contact potential. The FET embedded on ToGoFET probe detected the surface electric field profile generated by schottky contact between the Pt tip and the sample surface. Experimentally, it was shown that significant differences of electric field due to the contact potential barrier in differently processed specimens were observed using ToGOFET probe. This result shows the potential that the local contact potential difference can be measured by simple working principle with high sensitivity. Copyright © 2017 Elsevier Ltd. All rights reserved.
Programmable ion-sensitive transistor interfaces. II. Biomolecular sensing and manipulation.
Jayant, Krishna; Auluck, Kshitij; Funke, Mary; Anwar, Sharlin; Phelps, Joshua B; Gordon, Philip H; Rajwade, Shantanu R; Kan, Edwin C
2013-07-01
The chemoreceptive neuron metal-oxide-semiconductor transistor described in the preceding paper is further used to monitor the adsorption and interaction of DNA molecules and subsequently manipulate the adsorbed biomolecules with injected static charge. Adsorption of DNA molecules onto poly-L-lysine-coated sensing gates (SGs) modulates the floating gate (FG) potential ψ(O), which is reflected as a threshold voltage shift measured from the control gate (CG) V(th_CG). The asymmetric capacitive coupling between the CG and SG to the FG results in V(th_CG) amplification. The electric field in the SG oxide E(SG_ox) is fundamentally different when we drive the current readout with V(CG) and V(ref) (i.e., the potential applied to the CG and reference electrode, respectively). The V(CG)-driven readout induces a larger E(SG_ox), leading to a larger V(th_CG) shift when DNA is present. Simulation studies indicate that the counterion screening within the DNA membrane is responsible for this effect. The DNA manipulation mechanism is enabled by tunneling electrons (program) or holes (erase) onto FGs to produce repulsive or attractive forces. Programming leads to repulsion and eventual desorption of DNA, while erasing reestablishes adsorption. We further show that injected holes or electrons prior to DNA addition either aids or disrupts the immobilization process, which can be used for addressable sensor interfaces. To further substantiate DNA manipulation, we used impedance spectroscopy with a split ac-dc technique to reveal the net interface impedance before and after charge injection.
NASA Astrophysics Data System (ADS)
Matulionis, Arvydas
2013-07-01
The problems in the realm of nitride heterostructure field-effect transistors (HFETs) are discussed in terms of a novel fluctuation-dissipation-based approach impelled by a recent demonstration of strong correlation of hot-electron fluctuations with frequency performance and degradation of the devices. The correlation has its genesis in the dissipation of the LO-mode heat accumulated by the non-equilibrium longitudinal optical phonons (hot phonons) confined in the channel that hosts the high-density hot-electron gas subjected to a high electric field. The LO-mode heat causes additional scattering of hot electrons and facilitates defect formation in a different manner than the conventional heat contained mainly in the acoustic phonon mode. We treat the heat dissipation problem in terms of the hot-phonon lifetime responsible for the conversion of the non-migrant hot phonons into migrant acoustic modes and other vibrations. The lifetime is measured over a wide range of electron density and supplied electric power. The optimal conditions for the dissipation of the LO-mode heat are associated with the plasmon-assisted disintegration of hot phonons. Signatures of plasmons are experimentally resolved in fluctuations, dissipation, hot-electron transport, transistor frequency performance, transistor phase noise and transistor reliability. In particular, a slower degradation and a faster operation of GaN-based HFETs take place inside the electron density window where the resonant plasmon-assisted ultrafast dissipation of the LO-mode heat comes into play. A novel heterostructure design for the possible improvement of HFET performance is proposed, implemented and tested.
Biomolecular detection using a metal semiconductor field effect transistor
NASA Astrophysics Data System (ADS)
Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry
2010-04-01
In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).
Kisner, Alexandre; Stockmann, Regina; Jansen, Michael; Yegin, Ugur; Offenhäusser, Andreas; Kubota, Lauro Tatsuo; Mourzina, Yulia
2012-01-15
Ion-sensitive field effect transistors with gates having a high density of nanopores were fabricated and employed to sense the neurotransmitter dopamine with high selectivity and detectability at micromolar range. The nanoporous structure of the gates was produced by applying a relatively simple anodizing process, which yielded a porous alumina layer with pores exhibiting a mean diameter ranging from 20 to 35 nm. Gate-source voltages of the transistors demonstrated a pH-dependence that was linear over a wide range and could be understood as changes in surface charges during protonation and deprotonation. The large surface area provided by the pores allowed the physical immobilization of tyrosinase, which is an enzyme that oxidizes dopamine, on the gates of the transistors, and thus, changes the acid-base behavior on their surfaces. Concentration-dependent dopamine interacting with immobilized tyrosinase showed a linear dependence into a physiological range of interest for dopamine concentration in the changes of gate-source voltages. In comparison with previous approaches, a response time relatively fast for detecting dopamine was obtained. Additionally, selectivity assays for other neurotransmitters that are abundantly found in the brain were examined. These results demonstrate that the nanoporous structure of ion-sensitive field effect transistors can easily be used to immobilize specific enzyme that can readily and selectively detect small neurotransmitter molecule based on its acid-base interaction with the receptor. Therefore, it could serve as a technology platform for molecular studies of neurotransmitter-enzyme binding and drugs screening. Copyright © 2011 Elsevier B.V. All rights reserved.
Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl
2015-11-11
Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.
Liquid crystals for organic transistors (Conference Presentation)
NASA Astrophysics Data System (ADS)
Hanna, Jun-ichi; Iino, Hiroaki
2016-09-01
Liquid crystals are a new type of organic semiconductors exhibiting molecular orientation in self-organizing manner, and have high potential for device applications. In fact, various device applications have been proposed so far, including photosensors, solar cells, light emitting diodes, field effect transistors, and so on.. However, device performance in those fabricated with liquid crystals is less than those of devices fabricated with conventional materials in spite of unique features of liquid crystals. Here we discuss how we can utilize the liquid crystallinity in organic transistors and how we can overcome conventional non-liquid crystalline organic transistor materials. Then, we demonstrate high performance organic transistors fabricated with a smectic E liquid crystal of Ph-BTBT-10, which show high mobility of over 10cm2/Vs and high thermal durability of over 200oC in OFETs fabricated with its spin-coated polycrystalline thin films.
Dramatic switching behavior in suspended MoS2 field-effect transistors
NASA Astrophysics Data System (ADS)
Chen, Huawei; Li, Jingyu; Chen, Xiaozhang; Zhang, David; Zhou, Peng
2018-02-01
When integrating MoS2 flakes into scaling-down transistors, the short-channel effect, which is severe in silicon technology below 5-nanometer, can be avoided effectively. MoS2 transistors not only exhibit a high on/off ratio but also demonstrate a rapid switching speed. According to the theoretical calculation, the thermionic limit subthreshold slope (SS) of the ideal device could reach 60 mV/dec. However, due to the confinement of defects from substrates or contamination during the process, the SS deteriorates to more than 300 mV/dec, causing serious power consumption. In this work, we optimize the SS through structure design of MoS2 transistors. The suspended transistors exhibit a high on/off ratio of 107 and a minimum SS of 63 mV/dec with an ultralow standby power at room temperature. This study demonstrates the promising potential of structure design for electronic devices with ultralow-power switching behaviors.
A Low-Cost CMOS Programmable Temperature Switch
Li, Yunlong; Wu, Nanjian
2008-01-01
A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature Tth can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature Tth variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 μm CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature Tths from 45—120°C with a 5°C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm2 and power consumption is 3.1 μA at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis. PMID:27879871
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rashid, A. Diyana; Ruslinda, A. Rahim, E-mail: ruslinda@unimap.edu.my; Fatin, M. F.
2016-07-06
The fabrication and characterization on reduced graphene oxide field effect transistor (RGO-FET) were demonstrated using a spray deposition method for biological sensing device purpose. A spray method is a fast, low-cost and simple technique to deposit graphene and the most promising technology due to ideal coating on variety of substrates and high production speed. The fabrication method was demonstrated for developing a label free aptamer reduced graphene oxide field effect transistor biosensor. Reduced graphene oxide (RGO) was obtained by heating on hot plate fixed at various temperatures of 100, 200 and 300°C, respectively. The surface morphology of RGO were examinedmore » via atomic force microscopy to observed the temperature effect of produced RGO. The electrical measurement verify the performance of electrical conducting RGO-FET at temperature 300°C is better as compared to other temperature due to the removal of oxygen groups in GO. Thus, reduced graphene oxide was a promising material for biosensor application.« less
Ambipolar transport of silver nanoparticles decorated graphene oxide field effect transistors
NASA Astrophysics Data System (ADS)
Sarkar, Kalyan Jyoti; Sarkar, K.; Pal, B.; Kumar, Aparabal; Das, Anish; Banerji, P.
2018-05-01
In this article, we report ambipolar field effect transistor (FET) by using graphene oxide (GO) as a gate dielectric material for silver nanoparticles (AgNPs) decorated GO channel layer. GO was synthesized by Hummers' method. The AgNPs were prepared via photochemical reduction of silver nitrate solution by using monoethanolamine as a reducing agent. Morphological properties of channel layer were characterized by Field Effect Scanning Electron Microscopy (FESEM). Fourier Transform Infrared Spectroscopy (FTIR) was carried out to characterize GO thin film. For device fabrication gold (Au) was deposited as source-drain contact and aluminum (Al) was taken as bottom contact. Electrical measurements were performed by back gate configuration. Ambipolar transport behavior was explained from transfer characteristics. A maximum electron mobiliy of 6.65 cm2/Vs and a hole mobility of 2.46 cm2/Vs were extracted from the transfer characteristics. These results suggest that GO is a potential candidate as a gate dielectric material for thin film transistor applications and also provides new insights in GO based research.
Low-frequency (1/f) noise in nanocrystal field-effect transistors.
Lai, Yuming; Li, Haipeng; Kim, David K; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R
2014-09-23
We investigate the origins and magnitude of low-frequency noise in high-mobility nanocrystal field-effect transistors and show the noise is of 1/f-type. Sub-band gap states, in particular, those introduced by nanocrystal surfaces, have a significant influence on the 1/f noise. By engineering the device geometry and passivating nanocrystal surfaces, we show that in the linear and saturation regimes the 1/f noise obeys Hooge's model of mobility fluctuations, consistent with transport of a high density of accumulated carriers in extended electronic states of the NC thin films. In the subthreshold regime, the Fermi energy moves deeper into the mobility gap and sub-band gap trap states give rise to a transition to noise dominated by carrier number fluctuations as described in McWhorter's model. CdSe nanocrystal field-effect transistors have a Hooge parameter of 3 × 10(-2), comparable to other solution-deposited, thin-film devices, promising high-performance, low-cost, low-noise integrated circuitry.
Exploring the Charge Transport in Conjugated Polymers.
Xu, Yong; Sun, Huabin; Li, Wenwu; Lin, Yen-Fu; Balestra, Francis; Ghibaudo, Gerard; Noh, Yong-Young
2017-11-01
Conjugated polymers came to an unprecedented epoch that the charge transport is limited only by small disorder within aggregated domains. Accurate evaluation of transport performance is thus vital to optimizing further molecule design. Yet, the routine method by means of the conventional field-effect transistors may not satisfy such a requirement. Here, it is shown that the extrinsic effects of Schottky barrier, access transport through semiconductor bulk, and concurrent ambipolar conduction seriously influence transport analysis. The planar transistors incorporating ohmic contacts free of access and ambipolar conduction afford an ideal access to charge transport. It is found, however, that only the planar transistors operating in low-field regime are reliable to explore the inherent transport properties due to the energetic disorder lowering by the lateral field induced by high drain voltage. This work opens up a robust approach to comprehend the delicate charge transport in conjugated polymers so as to develop high-performance semiconducting polymers for promising plastic electronics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Optomechanical transistor with mechanical gain
NASA Astrophysics Data System (ADS)
Zhang, X. Z.; Tian, Lin; Li, Yong
2018-04-01
We study an optomechanical transistor, where an input field can be transferred and amplified unidirectionally in a cyclic three-mode optomechanical system. In this system, the mechanical resonator is coupled simultaneously to two cavity modes. We show that it only requires a finite mechanical gain to achieve the nonreciprocal amplification. Here the nonreciprocity is caused by the phase difference between the linearized optomechanical couplings that breaks the time-reversal symmetry of this system. The amplification arises from the mechanical gain, which provides an effective phonon bath that pumps the mechanical mode coherently. This effect is analogous to the stimulated emission of atoms, where the probe field can be amplified when its frequency is in resonance with that of the anti-Stokes transition. We show that by choosing optimal parameters, this optomechanical transistor can reach perfect unidirectionality accompanied with strong amplification. In addition, the presence of the mechanical gain can result in ultralong delay in the phase of the probe field, which provides an alternative to controlling light transport in optomechanical systems.
Extended Gate Field-Effect Transistor Biosensors for Point-Of-Care Testing of Uric Acid.
Guan, Weihua; Reed, Mark A
2017-01-01
An enzyme-free redox potential sensor using off-chip extended-gate field effect transistor (EGFET) with a ferrocenyl-alkanethiol modified gold electrode has been used to quantify uric acid concentration in human serum and urine. Hexacyanoferrate (II) and (III) ions are used as redox reagent. The potentiometric sensor measures the interface potential on the ferrocene immobilized gold electrode, which is modulated by the redox reaction between uric acid and hexacyanoferrate ions. The device shows a near Nernstian response to uric acid and is highly specific to uric acid in human serum and urine. The interference that comes from glucose, bilirubin, ascorbic acid, and hemoglobin is negligible in the normal concentration range of these interferents. The sensor also exhibits excellent long term reliability and is regenerative. This extended gate field effect transistor based sensor is promising for point-of-care detection of uric acid due to the small size, low cost, and low sample volume consumption.
Phase transition and field effect topological quantum transistor made of monolayer MoS2
NASA Astrophysics Data System (ADS)
Simchi, H.; Simchi, M.; Fardmanesh, M.; Peeters, F. M.
2018-06-01
We study topological phase transitions and topological quantum field effect transistor in monolayer molybdenum disulfide (MoS2) using a two-band Hamiltonian model. Without considering the quadratic (q 2) diagonal term in the Hamiltonian, we show that the phase diagram includes quantum anomalous Hall effect, quantum spin Hall effect, and spin quantum anomalous Hall effect regions such that the topological Kirchhoff law is satisfied in the plane. By considering the q 2 diagonal term and including one valley, it is shown that MoS2 has a non-trivial topology, and the valley Chern number is non-zero for each spin. We show that the wave function is (is not) localized at the edges when the q 2 diagonal term is added (deleted) to (from) the spin-valley Dirac mass equation. We calculate the quantum conductance of zigzag MoS2 nanoribbons by using the nonequilibrium Green function method and show how this device works as a field effect topological quantum transistor.
Integrated digital inverters based on two-dimensional anisotropic ReS₂ field-effect transistors
Liu, Erfu; Fu, Yajun; Wang, Yaojia; ...
2015-05-07
Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS₂) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS₂ field-effect transistors, which exhibit competitive performance with large current on/off ratios (~10⁷) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconductingmore » materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS₂ anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications.« less
2012-01-01
The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. PMID:22901374
High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.
Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun
2012-08-01
A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.
High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure
2012-01-01
A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials. PMID:22853458
Large contact noise in graphene field-effect transistors
NASA Astrophysics Data System (ADS)
Karnatak, Paritosh; Sai, Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam
Fluctuations in the electrical resistance at the interface of atomically thin materials and metals, or the contact noise, can adversely affect the device performance but remains largely unexplored. We have investigated contact noise in graphene field effect transistors of varying device geometry and contact configuration, with channel carrier mobility ranging from 5,000 to 80,000 cm2V-1s-1. A phenomenological model developed for contact noise due to current crowding for two dimensional conductors, shows a dominant contact contribution to the measured resistance noise in all graphene field effect transistors when measured in the two-probe or invasive four probe configurations, and surprisingly, also in nearly noninvasive four probe (Hall bar) configuration in the high mobility devices. We identify the fluctuating electrostatic environment of the metal-channel interface as the major source of contact noise, which could be generic to two dimensional material-based electronic devices. The work was financially supported by the Department of Science and Technology, India and Tokyo Electron Limited.
Ultra-localized single cell electroporation using silicon nanowires.
Jokilaakso, Nima; Salm, Eric; Chen, Aaron; Millet, Larry; Guevara, Carlos Duarte; Dorvel, Brian; Reddy, Bobby; Karlstrom, Amelie Eriksson; Chen, Yu; Ji, Hongmiao; Chen, Yu; Sooryakumar, Ratnasingham; Bashir, Rashid
2013-02-07
Analysis of cell-to-cell variation can further the understanding of intracellular processes and the role of individual cell function within a larger cell population. The ability to precisely lyse single cells can be used to release cellular components to resolve cellular heterogeneity that might be obscured when whole populations are examined. We report a method to position and lyse individual cells on silicon nanowire and nanoribbon biological field effect transistors. In this study, HT-29 cancer cells were positioned on top of transistors by manipulating magnetic beads using external magnetic fields. Ultra-rapid cell lysis was subsequently performed by applying 600-900 mV(pp) at 10 MHz for as little as 2 ms across the transistor channel and the bulk substrate. We show that the fringing electric field at the device surface disrupts the cell membrane, leading to lysis from irreversible electroporation. This methodology allows rapid and simple single cell lysis and analysis with potential applications in medical diagnostics, proteome analysis and developmental biology studies.
Reconfigurable quadruple quantum dots in a silicon nanowire transistor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Betz, A. C., E-mail: ab2106@cam.ac.uk; Broström, M.; Gonzalez-Zalba, M. F.
2016-05-16
We present a reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consists of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the corner effect, we study the versatility of the structure in the single quantum dot and the serial double quantum dot regimes and extract the relevant capacitance parameters. We address the fabrication variability of the quadruple-gate approach which, paired with improved silicon fabrication techniques, makes the corner state quantum dot approach a promising candidate for a scalable quantum information architecture.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Feng, M.; Iverson, E. W.; Wang, C. Y.
2015-11-02
For a direct-gap semiconductor (e.g., a p-n junction), photon-assisted tunneling is known to exhibit a high nonlinear absorption. In a transistor laser, as discussed here, the coherent photons generated at the quantum well interact with the collector junction field and “assist” electron tunneling from base to collector, thus resulting in the nonlinear modulation of the laser and the realization of optical pulse generation. 1 and 2 GHz optical pulses are demonstrated in the transistor laser using collector voltage control.
Zinc oxide integrated area efficient high output low power wavy channel thin film transistor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.
2013-11-25
We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.
Switching Characteristics of Ferroelectric Transistor Inverters
NASA Technical Reports Server (NTRS)
Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.
2010-01-01
This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.
Static Characteristics of the Ferroelectric Transistor Inverter
NASA Technical Reports Server (NTRS)
Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.
2010-01-01
The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.
Silicon device performance measurements to support temperature range enhancement
NASA Technical Reports Server (NTRS)
Johnson, R. Wayne; Askew, Ray; Bromstead, James; Weir, Bennett
1991-01-01
The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.
Theoretical Investigation of Device Aspects of Semiconductor Superlattices.
1983-09-01
n-i-p-i devices include bulk field effect transistors, ultrasensitive or ultrafast IR photodetectors , tunable light-emitting devices, and ultrafast...transistor4 ultrasensitive or ultrafast IR photodetectors , tunable light-emitt tg devices, and ultrafast optical modulators. Particularlylppealing...differential conductivity ( NDC ) ......................... 19 3.2.2. Spontaneous and stimulated FIR emission from interlayer transitions
A Comparison of High-Energy Electron and Cobalt-60 Gamma-Ray Radiation Testing
NASA Technical Reports Server (NTRS)
Boutte, Alvin J.; Campola, Michael J.; Carts, Martin A.; Wilcox, Edward P.; Marshall, Cheryl J.; Phan, Anthony M.; Pellish, Jonathan A.; Powell, Wesley A.; Xapsos, Michael A.
2012-01-01
In this paper, a comparison between the effects of irradiating microelectronics with high energy electrons and Cobalt-60 gamma-rays is examined. Additionally, the effect of electron energy is also discussed. A variety of part types are investigated, including discrete bipolar transistors, hybrids, and junction field effect transistors
Oxide-based thin film transistors for flexible electronics
NASA Astrophysics Data System (ADS)
He, Yongli; Wang, Xiangyu; Gao, Ya; Hou, Yahui; Wan, Qing
2018-01-01
The continuous progress in thin film materials and devices has greatly promoted the development in the field of flexible electronics. As one of the most common thin film devices, thin film transistors (TFTs) are significant building blocks for flexible platforms. Flexible oxide-based TFTs are well compatible with flexible electronic systems due to low process temperature, high carrier mobility, and good uniformity. The present article is a review of the recent progress and major trends in the field of flexible oxide-based thin film transistors. First, an introduction of flexible electronics and flexible oxide-based thin film transistors is given. Next, we introduce oxide semiconductor materials and various flexible oxide-based TFTs classified by substrate materials including polymer plastics, paper sheets, metal foils, and flexible thin glass. Afterwards, applications of flexible oxide-based TFTs including bendable sensors, memories, circuits, and displays are presented. Finally, we give conclusions and a prospect for possible development trends. Project supported in part by the National Science Foundation for Distinguished Young Scholars of China (No. 61425020), in part by the National Natural Science Foundation of China (No. 11674162).
NASA Astrophysics Data System (ADS)
Oh, Seung Kyu; Cho, Moon Uk; Dallas, James; Jang, Taehoon; Lee, Dong Gyu; Pouladi, Sara; Chen, Jie; Wang, Weijie; Shervin, Shahab; Kim, Hyunsoo; Shin, Seungha; Choi, Sukwon; Kwak, Joon Seop; Ryou, Jae-Hyun
2017-09-01
We investigate thermo-electronic behaviors of flexible AlGaN/GaN heterostructure field-effect transistors (HFETs) for high-power operation of the devices using Raman thermometry, infrared imaging, and current-voltage characteristics. A large negative differential conductance observed in HFETs on polymeric flexible substrates is confirmed to originate from the decreasing mobility of the two-dimensional electron gas channel caused by the self-heating effect. We develop high-power transistors by suppressing the negative differential conductance in the flexible HFETs using chemical lift-off and modified Ti/Au/In metal bonding processes with copper (Cu) tapes for high thermal conductivity and low thermal interfacial resistance in the flexible hybrid structures. Among different flexible HFETs, the ID of the HFETs on Cu with Ni/Au/In structures decreases only by 11.3% with increasing drain bias from the peak current to the current at VDS = 20 V, which is close to that of the HFETs on Si (9.6%), solving the problem of previous flexible AlGaN/GaN transistors.
NASA Technical Reports Server (NTRS)
Mui, D. S. L.; Patil, M. B.; Morkoc, H.
1989-01-01
Three double-heterojunction modulation-doped field-effect transistor structures with different channel composition are investigated theoretically. All of these transistors have an In(x)Ga(1-x)As channel sandwiched between two doped Al(0.3)Ga(0.7)As barriers with undoped spacer layers. In one of the structures, x varies from 0 from either heterojunction to 0.15 at the center of the channel quadratically; in the other two, constant values of x of 0 and 0.15 are used. The Poisson and Schroedinger equations are solved self-consistently for the electron wave function in all three cases. The results showed that the two-dimensional electron gas (2DEG) concentration in the channel of the quadratically graded structure is higher than the x = 0 one and slightly lower than the x = 0.15 one, and the mean distance of the 2DEG is closer to the center of the channel for this transistor than the other two. These two effects have important implications on the electron mobility in the channel.
Memristive device based on a depletion-type SONOS field effect transistor
NASA Astrophysics Data System (ADS)
Himmel, N.; Ziegler, M.; Mähne, H.; Thiem, S.; Winterfeld, H.; Kohlstedt, H.
2017-06-01
State-of-the-art SONOS (silicon-oxide-nitride-oxide-polysilicon) field effect transistors were operated in a memristive switching mode. The circuit design is a variation of the MemFlash concept and the particular properties of depletion type SONOS-transistors were taken into account. The transistor was externally wired with a resistively shunted pn-diode. Experimental current-voltage curves show analog bipolar switching characteristics within a bias voltage range of ±10 V, exhibiting a pronounced asymmetric hysteresis loop. The experimental data are confirmed by SPICE simulations. The underlying memristive mechanism is purely electronic, which eliminates an initial forming step of the as-fabricated cells. This fact, together with reasonable design flexibility, in particular to adjust the maximum R ON/R OFF ratio, makes these cells attractive for neuromorphic applications. The relative large set and reset voltage around ±10 V might be decreased by using thinner gate-oxides. The all-electric operation principle, in combination with an established silicon manufacturing process of SONOS devices at the Semiconductor Foundry X-FAB, promise reliable operation, low parameter spread and high integration density.
Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis
NASA Technical Reports Server (NTRS)
Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat D.
2008-01-01
There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.
Balanced Ambipolar Organic Field-Effect Transistors by Polymer Preaggregation.
Janasz, Lukasz; Luczak, Adam; Marszalek, Tomasz; Dupont, Bertrand G R; Jung, Jaroslaw; Ulanski, Jacek; Pisula, Wojciech
2017-06-21
Ambipolar organic field-effect transistors (OFETs) based on heterojunction active films still suffer from an imbalance in the transport of electrons and holes. This problem is related to an uncontrolled phase separation between the donor and acceptor organic semiconductors in the thin films. In this work, we have developed a concept to improve the phase separation in heterojunction transistors to enhance their ambipolar performance. This concept is based on preaggregation of the donor polymer, in this case poly(3-hexylthiophene) (P3HT), before solution mixing with the small-molecular-weight acceptor, phenyl-C61-butyric acid methyl ester (PCBM). The resulting heterojunction transistor morphology consists of self-assembled P3HT fibers embedded in a PCBM matrix, ensuring balanced mobilities reaching 0.01 cm 2 /V s for both holes and electrons. These are the highest mobility values reported so far for ambipolar OFETs based on P3HT/PCBM blends. Preaggregation of the conjugated polymer before fabricating binary blends can be regarded as a general concept for a wider range of semiconducting systems applicable in organic electronic devices.
Tunable SnSe2 /WSe2 Heterostructure Tunneling Field Effect Transistor.
Yan, Xiao; Liu, Chunsen; Li, Chao; Bao, Wenzhong; Ding, Shijin; Zhang, David Wei; Zhou, Peng
2017-09-01
The burgeoning 2D semiconductors can maintain excellent device electrostatics with an ultranarrow channel length and can realize tunneling by electrostatic gating to avoid deprivation of band-edge sharpness resulting from chemical doping, which make them perfect candidates for tunneling field effect transistors. Here this study presents SnSe 2 /WSe 2 van der Waals heterostructures with SnSe 2 as the p-layer and WSe 2 as the n-layer. The energy band alignment changes from a staggered gap band offset (type-II) to a broken gap (type-III) when changing the negative back-gate voltage to positive, resulting in the device operating as a rectifier diode (rectification ratio ~10 4 ) or an n-type tunneling field effect transistor, respectively. A steep average subthreshold swing of 80 mV dec -1 for exceeding two decades of drain current with a minimum of 37 mV dec -1 at room temperature is observed, and an evident trend toward negative differential resistance is also accomplished for the tunneling field effect transistor due to the high gate efficiency of 0.36 for single gate devices. The I ON /I OFF ratio of the transfer characteristics is >10 6 , accompanying a high ON current >10 -5 A. This work presents original phenomena of multilayer 2D van der Waals heterostructures which can be applied to low-power consumption devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Vector electric field measurement via position-modulated Kelvin probe force microscopy
NASA Astrophysics Data System (ADS)
Dwyer, Ryan P.; Smieska, Louisa M.; Tirmzi, Ali Moeed; Marohn, John A.
2017-10-01
High-quality spatially resolved measurements of electric fields are critical to understanding charge injection, charge transport, and charge trapping in semiconducting materials. Here, we report a variation of frequency-modulated Kelvin probe force microscopy that enables spatially resolved measurements of the electric field. We measure electric field components along multiple directions simultaneously by employing position modulation and lock-in detection in addition to numeric differentiation of the surface potential. We demonstrate the technique by recording linescans of the in-plane electric field vector in the vicinity of a patch of trapped charge in a 2,7-diphenyl[1]benzothieno[3,2-b][1]benzothiophene (DPh-BTBT) organic field-effect transistor. This technique is simple to implement and should be especially useful for studying electric fields in spatially inhomogeneous samples like organic transistors and photovoltaic blends.
Polymer-based doping control for performance enhancement of wet-processed short-channel CNTFETs
NASA Astrophysics Data System (ADS)
Hartmann, Martin; Schubel, René; Claus, Martin; Jordan, Rainer; Schulz, Stefan E.; Hermann, Sascha
2018-01-01
The electrical transport properties of short-channel transistors based on single-walled carbon nanotubes (CNT) are significantly affected by bundling along with solution processing. We report that especially high off currents of CNT transistors are not only related to the incorporation of metallic CNTs but also to the incorporation of CNT bundles. By applying device passivation with poly(4-vinylpyridine), the impact of CNT bundling on the device performance can be strongly reduced due to increased gate efficiency as well as reduced oxygen and water-induced p-type doping, boosting essential field-effect transistor performance parameters by several orders of magnitude. Moreover, this passivation approach allows the hysteresis and threshold voltage of CNT transistors to be tuned.
Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki
2018-05-08
A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.
Toward low-power electronics: tunneling phenomena in transition metal dichalcogenides.
Das, Saptarshi; Prakash, Abhijith; Salazar, Ramon; Appenzeller, Joerg
2014-02-25
In this article, we explore, experimentally, the impact of band-to-band tunneling on the electronic transport of double-gated WSe2 field-effect transistors (FETs) and Schottky barrier tunneling of holes in back-gated MoS2 FETs. We show that by scaling the flake thickness and the thickness of the gate oxide, the tunneling current can be increased by several orders of magnitude. We also perform numerical calculations based on Landauer formalism and WKB approximation to explain our experimental findings. Based on our simple model, we discuss the impact of band gap and effective mass on the band-to-band tunneling current and evaluate the performance limits for a set of dichalcogenides in the context of tunneling transistors for low-power applications. Our findings suggest that WTe2 is an excellent choice for tunneling field-effect transistors.
Electroluminescence from single-wall carbon nanotube network transistors.
Adam, E; Aguirre, C M; Marty, L; St-Antoine, B C; Meunier, F; Desjardins, P; Ménard, D; Martel, R
2008-08-01
The electroluminescence (EL) properties from single-wall carbon nanotube network field-effect transistors (NNFETs) and small bundle carbon nanotube field effect transistors (CNFETs) are studied using spectroscopy and imaging in the near-infrared (NIR). At room temperature, NNFETs produce broad (approximately 180 meV) and structured NIR spectra, while they are narrower (approximately 80 meV) for CNFETs. EL emission from NNFETs is located in the vicinity of the minority carrier injecting contact (drain) and the spectrum of the emission is red shifted with respect to the corresponding absorption spectrum. A phenomenological model based on a Fermi-Dirac distribution of carriers in the nanotube network reproduces the spectral features observed. This work supports bipolar (electron-hole) current recombination as the main mechanism of emission and highlights the drastic influence of carrier distribution on the optoelectronic properties of carbon nanotube films.
Yuan, Yongbo; Dong, Qingfeng; Yang, Bin; Guo, Fawen; Zhang, Qi; Han, Ming; Huang, Jinsong
2013-01-01
High sensitivity photodetectors in ultraviolet (UV) and infrared (IR) range have broad civilian and military applications. Here we report on an un-cooled solution-processed UV-IR photon counter based on modified organic field-effect transistors. This type of UV detectors have light absorbing zinc oxide nanoparticles (NPs) sandwiched between two gate dielectric layers as a floating gate. The photon-generated charges on the floating gate cause high resistance regions in the transistor channel and tune the source-drain output current. This "super-float-gating" mechanism enables very high sensitivity photodetectors with a minimum detectable ultraviolet light intensity of 2.6 photons/μm(2)s at room temperature as well as photon counting capability. Based on same mechansim, infrared photodetectors with lead sulfide NPs as light absorbing materials have also been demonstrated.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey
2016-01-25
The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less
Yang, Chengdong; Fang, Renren; Yang, Xiongfa; Chen, Ru; Gao, Jianhua; Fan, Hanghong; Li, Hongxiang; Hu, Wenping
2018-04-04
It is very important to develop ambipolar field effect transistors to construct complementary circuits. To obtain balanced hole- and electron-transport properties, one of the key issues is to regulate the energy levels of the frontier orbitals of the semiconductor materials by structural tailoring, so that they match well with the electrode Fermi levels. Five conjugated copolymers were synthesized and exhibited low LUMO energy levels and narrow bandgaps on account of the strong electron-withdrawing effect of the carbonyl groups. Polymer thin film transistors were prepared by using a solution method and exhibited high and balanced hole and electron mobility of up to 0.46 cm 2 V -1 s -1 , which suggested that these copolymers are promising ambipolar semiconductor materials. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Yang, Hang; Qin, Shiqiao; Zheng, Xiaoming; Wang, Guang; Tan, Yuan; Peng, Gang; Zhang, Xueao
2017-09-22
We fabricated 70 nm Al₂O₃ gated field effect transistors based on two-dimensional (2D) materials and characterized their optical and electrical properties. Studies show that the optical contrast of monolayer graphene on an Al₂O₃/Si substrate is superior to that on a traditional 300 nm SiO₂/Si substrate (2.4 times). Significantly, the transconductance of monolayer graphene transistors on the Al₂O₃/Si substrate shows an approximately 10-fold increase, due to a smaller dielectric thickness and a higher dielectric constant. Furthermore, this substrate is also suitable for other 2D materials, such as WS₂, and can enhance the transconductance remarkably by 61.3 times. These results demonstrate a new and ideal substrate for the fabrication of 2D materials-based electronic logic devices.
Solution-Processed Organic and Halide Perovskite Transistors on Hydrophobic Surfaces.
Ward, Jeremy W; Smith, Hannah L; Zeidell, Andrew; Diemer, Peter J; Baker, Stephen R; Lee, Hyunsu; Payne, Marcia M; Anthony, John E; Guthold, Martin; Jurchescu, Oana D
2017-05-31
Solution-processable electronic devices are highly desirable due to their low cost and compatibility with flexible substrates. However, they are often challenging to fabricate due to the hydrophobic nature of the surfaces of the constituent layers. Here, we use a protein solution to modify the surface properties and to improve the wettability of the fluoropolymer dielectric Cytop. The engineered hydrophilic surface is successfully incorporated in bottom-gate solution-deposited organic field-effect transistors (OFETs) and hybrid organic-inorganic trihalide perovskite field-effect transistors (HTP-FETs) fabricated on flexible substrates. Our analysis of the density of trapping states at the semiconductor-dielectric interface suggests that the increase in the trap density as a result of the chemical treatment is minimal. As a result, the devices exhibit good charge carrier mobilities, near-zero threshold voltages, and low electrical hysteresis.
Natali, Dario; Caironi, Mario
2012-03-15
A high-mobility organic semiconductor employed as the active material in a field-effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll-to-roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte-gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution-processed and where the most common architectures are adopted, are ∼10 kΩ·cm for transistors with a field effect mobility in the 0.1-1 cm(2)/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case-by-case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the field for a long time. Only recently, as the understanding of the rather complex physical processes at the metal/semiconductor interfaces has improved, more general approaches, with a validity that extends to several materials, are being proposed and successfully tested in the literature. Only a combined scientific and technological effort, on the one side to fully understand contact phenomena and on the other to completely master the tailoring of interfaces, will enable the development of advanced organic electronics applications and their widespread adoption in low-cost, large-area printed circuits. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Zhang, Yuan Yuan; Shi, Yumeng; Chen, Fuming; Mhaisalkar, S. G.; Li, Lain-Jong; Ong, Beng S.; Wu, Yiliang
2007-11-01
A solution processable method for employing single-walled carbon nanotubes (SWCNTs) as bottom contact source/drain electrodes for a significant reduction of contact resistance in poly(3,3‴-didodecylquarterthiophene) based organic field effect transistors (OFETs) is proposed. A two order of magnitude reduction in contact resistance and up to a threefold improvement in field effect mobilities were observed in SWCNT contacted OFETs as opposed to similar devices with gold source/drain electrodes. Based on Kelvin probe measurements, this improvement was attributed to a reduction in the Schottky barrier for hole injection into organic semiconductor.
25th anniversary article: key points for high-mobility organic field-effect transistors.
Dong, Huanli; Fu, Xiaolong; Liu, Jie; Wang, Zongrui; Hu, Wenping
2013-11-20
Remarkable progress has been made in developing high performance organic field-effect transistors (OFETs) and the mobility of OFETs has been approaching the values of polycrystalline silicon, meeting the requirements of various electronic applications from electronic papers to integrated circuits. In this review, the key points for development of high mobility OFETs are highlighted from aspects of molecular engineering, process engineering and interface engineering. The importance of other factors, such as impurities and testing conditions is also addressed. Finally, the current challenges in this field for practical applications of OFETs are further discussed. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Technical Reports Server (NTRS)
Benumof, Reuben; Zoutendyk, John; Coss, James
1988-01-01
Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.
Unstable Resonator Mid-Infrared Laser Sources
2016-02-26
of individual materials depending on metal species and growth temperatures . Fig. 8 (a) Average power consumption and (b) delay of C2MOS and double...feedback lasers, chirped gratings, interferometric lithography, nanowire transistors, tunnel field- effect transistors, nanoscale epitaxial growth, nanowire...technical approaches. Approaches to wavelength tuning include thermal/operation temperature tuning [1], variable cavity length with cantilever/piezo
USDA-ARS?s Scientific Manuscript database
The use of field effect transistors (FETs) as the transduction element for the detection of DNA amplification reactions will enable portable and inexpensive nucleic acid analysis. Transistors used as biological sensors,or BioFETs, minimize the cost and size of detection platforms by leveraging fabri...
2010-11-01
Microscopy measurements on operating Pentacene Thin Film Transistor Rossi (Brazil) Organic Vertical Field Effect Transistor using DPIF as organic...Conductors and Related Quantum Matter Oral Session OSC7 12:00-12:20 12:20-12:40 Zulkifli (Malaysia) In-situ imaging of Structural Inhomogeneity and Local Jc
Front and backside processed thin film electronic devices
Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang
2010-10-12
This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Scattering effects on the performance of carbon nanotube field effect transistor in a compact model
NASA Astrophysics Data System (ADS)
Hamieh, S. D.; Desgreys, P.; Naviner, J. F.
2010-01-01
Carbon nanotube field-effect transistors (CNTFET) are being extensively studied as possible successors to CMOS. Device simulators have been developed to estimate their performance in sub-10-nm and device structures have been fabricated. In this work, a new compact model of single-walled semiconducting CNTFET is proposed implementing the calculation of energy conduction sub-band minima and the treatment of scattering effects through energy shift in CNTFET. The developed model has been used to simulate I-V characteristics using VHDL-AMS simulator.
Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor.
Nomura, Kenji; Ohta, Hiromichi; Ueda, Kazushige; Kamiya, Toshio; Hirano, Masahiro; Hosono, Hideo
2003-05-23
We report the fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO3(ZnO)5, as an electron channel and amorphous hafnium oxide as a gate insulator. The device exhibits an on-to-off current ratio of approximately 106 and a field-effect mobility of approximately 80 square centimeters per volt per second at room temperature, with operation insensitive to visible light irradiation. The result provides a step toward the realization of transparent electronics for next-generation optoelectronics.
Smithson, Chad S; Wu, Yiliang; Wigglesworth, Tony; Zhu, Shiping
2015-01-14
A more than six orders of magnitude UV-responsive organic field-effect transistor is developed using a benzothiophene (BTBT) semiconductor and strong donor-acceptor Disperse Red 1 as the traps to enhance charge separation. The device can be returned to its low drain current state by applying a short gate bias, and is completely reversible with excellent stability under ambient conditions. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Synthesis of bilayer MoS2 and corresponding field effect characteristics
NASA Astrophysics Data System (ADS)
Fang, Mingxu; Feng, Yulin; Wang, Fang; Yang, Zhengchun; Zhang, Kailiang
2017-06-01
Two-dimensional transition-metal dichalcogenides such as MoS2 are promising materials for next-generation nano-electronic devices. The physical properties of MoS2 are determined by layer number according to the variation of band-gap. Here, we synthesize large-size bilayer-MoS2 with triangle and hexagonal nanosheets in one step by chemical vapor deposition, Monolayer and bilayer-MoS2 back-gate field effect transistors are also fabricated and the performance including mobility and on/off ratios are compared. The bilayer-MoS2 back-gate field effect transistor shows superior performance with field effect mobility of ∼21.27cm2V-1s-1, and Ion/Ioff ratio of ∼3.9×107.
NASA Astrophysics Data System (ADS)
Es-Sakhi, Azzedin D.
Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.
Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures
NASA Technical Reports Server (NTRS)
Patterson, Richard; Hammoud, Ahmad
2009-01-01
Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures over the range of -190 C to +225 C in terms of its voltage/current characteristic curves. The test temperatures included +22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 C. Limited thermal cycling testing was also performed on the device. These tests consisted of subjecting the transistor to a total of twelve thermal cycles between -190 C and +225 C. A temperature rate of change of 10 C/min and a soak time at the test temperature of 10 minutes were used throughout this work. Post-cycling measurements were also performed at selected temperatures. In addition, re-start capability at extreme temperatures, i.e. power switched on while the device was soaking for a period of 20 minutes at the test temperatures of -190 C and +225 C, was investigated.
Model of a programmable quantum processing unit based on a quantum transistor effect
NASA Astrophysics Data System (ADS)
Ablayev, Farid; Andrianov, Sergey; Fetisov, Danila; Moiseev, Sergey; Terentyev, Alexandr; Urmanchev, Andrey; Vasiliev, Alexander
2018-02-01
In this paper we propose a model of a programmable quantum processing device realizable with existing nano-photonic technologies. It can be viewed as a basis for new high performance hardware architectures. Protocols for physical implementation of device on the controlled photon transfer and atomic transitions are presented. These protocols are designed for executing basic single-qubit and multi-qubit gates forming a universal set. We analyze the possible operation of this quantum computer scheme. Then we formalize the physical architecture by a mathematical model of a Quantum Processing Unit (QPU), which we use as a basis for the Quantum Programming Framework. This framework makes it possible to perform universal quantum computations in a multitasking environment.
New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.
Shih, Cheng Wei; Chin, Albert
2016-08-03
At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.
Qi, Qiong; Yu, Aifang; Wang, Liangmin; Jiang, Chao
2010-11-01
The influence of dielectric surface energy on the initial nucleation and the growth of pentacene films as well as the electrical properties of the pentacene-based field-effect transistors are investigated. We have examined a range of organic and inorganic dielectrics with different surface energies, such as polycarbonate/SiO2, polystyrene/SiO2, and PMMA/SiO2 bi-layered dielectrics and also the bare SiO2 dielectric. Atomic force microscopy measurements of sub-monolayer and thick pentacene films indicated that the growth of pentacene film was in Stranski-Kranstanow growth mode on all the dielectrics. However, the initial nucleation density and the size of the first-layered pentacene islands deposited on different dielectrics are drastically influenced by the dielectric surface energy. With the increasing of the surface energy, the nucleation density increased and thus the average size of pentacene islands for the first mono-layer deposition decreased. The performance of fabricated pentacene-based thin film transistors was found to be highly related to nucleation density and the island size of deposited Pentacene film, and it had no relationship to the final particle size of the thick pentacene film. The field effect mobility of the thin film transistor could be achieved as high as 1.38 cm2Ns with on/off ratio over 3 x 10(7) on the PS/SiO2 where the lowest surface energy existed among all the dielectrics. For comparison, the values of mobility and on/off ratio were 0.42 cm2Ns and 1 x 10(6) for thin film transistor deposited directly on bare SiO2 having the highest surface energy.
Multifunctional pulse generator for high-intensity focused ultrasound system
NASA Astrophysics Data System (ADS)
Tamano, Satoshi; Yoshizawa, Shin; Umemura, Shin-Ichiro
2017-07-01
High-intensity focused ultrasound (HIFU) can achieve high spatial resolution for the treatment of diseases. A major technical challenge in implementing a HIFU therapeutic system is to generate high-voltage high-current signals for effectively exciting a multichannel HIFU transducer at high efficiencies. In this paper, we present the development of a multifunctional multichannel generator/driver. The generator can produce a long burst as well as an extremely high-voltage short pulse of pseudosinusoidal waves (trigger HIFU) and second-harmonic superimposed waves for HIFU transmission. The transmission timing, waveform, and frequency can be controlled using a field-programmable gate array (FPGA) via a universal serial bus (USB) microcontroller. The hardware is implemented in a compact printed circuit board. The test results of trigger HIFU reveal that the power consumption and the temperature rise of metal-oxide semiconductor field-effect transistors were reduced by 19.9% and 38.2 °C, respectively, from the previous design. The highly flexible performance of the novel generator/driver is demonstrated in the generation of second-harmonic superimposed waves, which is useful for cavitation-enhanced HIFU treatment, although the previous design exhibited difficulty in generating it.
You, Hsin-Chiang; Wang, Cheng-Jyun
2017-02-26
A low temperature solution-processed thin-film transistor (TFT) using zinc oxide (ZnO) film as an exposed sensing semiconductor channel was fabricated to detect and identify various solution solvents. The TFT devices would offer applications for low-cost, rapid and highly compatible water-soluble detection and could replace conventional silicon field effect transistors (FETs) as bio-sensors. In this work, we demonstrate the utility of the TFT ZnO channel to sense various liquids, such as polar solvents (ethanol), non-polar solvents (toluene) and deionized (DI) water, which were dropped and adsorbed onto the channel. It is discussed how different dielectric constants of polar/non-polar solvents and DI water were associated with various charge transport properties, demonstrating the main detection mechanisms of the thin-film transistor.
Transport Mechanisms in Organic Thin-Film Transistors
NASA Astrophysics Data System (ADS)
Fung, A. W. P.
1996-03-01
Recent success in fabricating field-effect transistors with polycrystalline α-sexithiophene (α-6T) has allowed us to study charge transport in this organic semiconductor. The appealing structural property that the oligomer chains are seated almost perpendicular to the substrate provides a model π-conjugated system which we find exhibits band transport at low temperatures. We observe a behavioral transition around 50K which is consistent with the metal-insulator transition in Holstein's small-polaron theory. The fact that we can observe intrinsic behavior means that the ambient-temperature mobility obtained in these transistors is optimal for α-6T. Agreement with the Holstein theory provides us with a prescription for rational design of materials for organic transistor applications. Work done in collaboration with L. Torsi, A. Dodabalapur, L. J. Rothberg and H. E. Katz.
Optical Probe of the Density of Defect States in Organic Thin-Film Transistors
NASA Astrophysics Data System (ADS)
Breban, Mihaela; Romero, Danilo; Ballarotto, Vincent; Williams, Ellen
2006-03-01
We investigate the role of defect states associated with different gate dielectric materials on charge transport in organic thin film transistors. Using a modulation technique we measure the magnitude and the phase of the photocurrent^1 in pentacene thin film transistors as a function of the modulation frequency. The photocurrent generation process is modeled as exciton dissociation due to interaction with localized traps. A time domain analyses of this multi-step process allows us to extract the density of defect states. We use this technique to compare the physical mechanism underlying performances of pentacene devices fabricated with different dielectric materials. *Supported by the Laboratory for Physical Science ^1 M. Breban, et al. ``Photocurrent probe of field-dependent mobility in organic thin-film transistors'' Appl. Phys. Letts. 87, 203503 (2005)
Healing of voids in the aluminum metallization of integrated circuit chips
NASA Technical Reports Server (NTRS)
Cuddihy, Edward F.; Lawton, Russell A.; Gavin, Thomas R.
1990-01-01
The thermal stability of GaAs modulation-doped field effect transistors (MODFETs) is evaluated in order to identify failure mechanisms and validate the reliability of these devices. The transistors were exposed to thermal step-stress and characterized at ambient temperatures to indicate device reliability, especially that of the transistor ohmic contacts with and without molybdenum diffusion barriers. The devices without molybdenum exhibited important transconductance deterioration. MODFETs with molybdenum diffusion barriers were tolerant to temperatures above 300 C. This tolerance indicates that thermally activated failure mechanisms are slow at operational temperatures. Therefore, high-reliability MODFET-based circuits are possible.
NASA Technical Reports Server (NTRS)
Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya
2016-01-01
The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.
Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor
NASA Astrophysics Data System (ADS)
Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.
2017-12-01
Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.
Li, Dongwei; Hu, Yongsheng; Zhang, Nan; Lv, Ying; Lin, Jie; Guo, Xiaoyang; Fan, Yi; Luo, Jinsong; Liu, Xingyuan
2017-10-18
The near-infrared (NIR) to visible upconversion devices have attracted great attention because of their potential applications in the fields of night vision, medical imaging, and military security. Herein, a novel all-organic upconversion device architecture has been first proposed and developed by incorporating a NIR absorption layer between the carrier transport layer and the emission layer in heterostructured organic light-emitting field effect transistors (OLEFETs). The as-prepared devices show a typical photon-to-photon upconversion efficiency as high as 7% (maximum of 28.7% under low incident NIR power intensity) and millisecond-scale response time, which are the highest upconversion efficiency and one of the fastest response time among organic upconversion devices as referred to the previous reports up to now. The high upconversion performance mainly originates from the gain mechanism of field-effect transistor structures and the unique advantage of OLEFETs to balance between the photodetection and light emission. Meanwhile, the strategy of OLEFETs also offers the advantage of high integration so that no extra OLED is needed in the organic upconversion devices. The results would pave way for low-cost, flexible and portable organic upconversion devices with high efficiency and simplified processing.
Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis
2014-03-28
Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.
Anomalous Kondo transport in a single-electron transistor driven by microwave field
NASA Astrophysics Data System (ADS)
Cao, Zhan; Chen, Cheng; Chen, Fu-Zhou; Luo, Hong-Gang
2014-03-01
The Kondo transport in a single-electron transistor continues to provide unexpected physics due to the interplay between magnetic field and microwave applied, as shown in a recent experiment(B. Hemingway et al., arXiv:1304.0037). For a given microwave frequency, the Kondo differential conductance shows an anomalous magnetic field dependence, and a very sharp peak is observed for certain field applied. Additionally, the microwave frequency is found to be larger of about one order than the corresponding Zeeman energy. These two features are not understood in the current theory. Here we propose a phenomenological mechanism to explain these observations. When both magnetic field and microwave are applied in the SET, if the frequency matches the (renormalized) Zeeman energy, it is assumed that the microwave is able to induce spin-ip in the single-electron transistor, which leads to two consequences. One is the dot level shifts down and the other is the renormalization of the Zeeman energy. This picture can not only explain qualitatively the main findings in the experiment but also further stimulate the related experimental study of the Kondo transport. Additional microwave modulation may provide a novel way to explore the functional of the SET in nanotechnology and quantum information processing.
NASA Astrophysics Data System (ADS)
Hong, Xia
2016-03-01
Combining the nonvolatile, locally switchable polarization field of a ferroelectric thin film with a nanoscale electronic material in a field effect transistor structure offers the opportunity to examine and control a rich variety of mesoscopic phenomena and interface coupling. It is also possible to introduce new phases and functionalities into these hybrid systems through rational design. This paper reviews two rapidly progressing branches in the field of ferroelectric transistors, which employ two distinct classes of nanoscale electronic materials as the conducting channel, the two-dimensional (2D) electron gas graphene and the strongly correlated transition metal oxide thin films. The topics covered include the basic device physics, novel phenomena emerging in the hybrid systems, critical mechanisms that control the magnitude and stability of the field effect modulation and the mobility of the channel material, potential device applications, and the performance limitations of these devices due to the complex interface interactions and challenges in achieving controlled materials properties. Possible future directions for this field are also outlined, including local ferroelectric gate control via nanoscale domain patterning and incorporating other emergent materials in this device concept, such as the simple binary ferroelectrics, layered 2D transition metal dichalcogenides, and the 4d and 5d heavy metal compounds with strong spin-orbit coupling.
Isotropic differential phase contrast microscopy for quantitative phase bio-imaging.
Chen, Hsi-Hsun; Lin, Yu-Zi; Luo, Yuan
2018-05-16
Quantitative phase imaging (QPI) has been investigated to retrieve optical phase information of an object and applied to biological microscopy and related medical studies. In recent examples, differential phase contrast (DPC) microscopy can recover phase image of thin sample under multi-axis intensity measurements in wide-field scheme. Unlike conventional DPC, based on theoretical approach under partially coherent condition, we propose a new method to achieve isotropic differential phase contrast (iDPC) with high accuracy and stability for phase recovery in simple and high-speed fashion. The iDPC is simply implemented with a partially coherent microscopy and a programmable thin-film transistor (TFT) shield to digitally modulate structured illumination patterns for QPI. In this article, simulation results show consistency of our theoretical approach for iDPC under partial coherence. In addition, we further demonstrate experiments of quantitative phase images of a standard micro-lens array, as well as label-free live human cell samples. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Majority logic gate for 3D magnetic computing.
Eichwald, Irina; Breitkreutz, Stephan; Ziemys, Grazvydas; Csaba, György; Porod, Wolfgang; Becherer, Markus
2014-08-22
For decades now, microelectronic circuits have been exclusively built from transistors. An alternative way is to use nano-scaled magnets for the realization of digital circuits. This technology, known as nanomagnetic logic (NML), may offer significant improvements in terms of power consumption and integration densities. Further advantages of NML are: non-volatility, radiation hardness, and operation at room temperature. Recent research focuses on the three-dimensional (3D) integration of nanomagnets. Here we show, for the first time, a 3D programmable magnetic logic gate. Its computing operation is based on physically field-interacting nanometer-scaled magnets arranged in a 3D manner. The magnets possess a bistable magnetization state representing the Boolean logic states '0' and '1.' Magneto-optical and magnetic force microscopy measurements prove the correct operation of the gate over many computing cycles. Furthermore, micromagnetic simulations confirm the correct functionality of the gate even for a size in the nanometer-domain. The presented device demonstrates the potential of NML for three-dimensional digital computing, enabling the highest integration densities.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Warren, W.L.; Vanheusden, K.; Fleetwood, D.M.
Recently, the authors have demonstrated that annealing Si/SiO{sub 2}/Si structures in a hydrogen containing ambient introduces mobile H{sup +} ions into the buried SiO{sub 2} layer. Changes in the H{sup +} spatial distribution within the SiO{sub 2} layer were electrically monitored by current-voltage (I-V) measurements. The ability to directly probe reversible protonic motion in Si/SiO{sub 2}/Si structures makes this an exemplar system to explore the physics and chemistry of hydrogen in the technologically relevant Si/SiO{sub 2} structure. In this work, they illustrate that this effect can be used as the basis for a programmable nonvolatile field effect transistor (NVFET) memorymore » that may compete with other Si-based memory devices. The power of this novel device is its simplicity; it is based upon standard Si/SiO{sub 2}/Si technology and forming gas annealing, a common treatment used in integrated circuit processing. They also briefly discuss the effects of radiation on its retention properties.« less
Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis.
Zhang, Yanjun; Clausmeyer, Jan; Babakinejad, Babak; Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V; Korchev, Yuri
2016-03-22
Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements.
Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis
Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R. Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V.; Korchev, Yuri
2016-01-01
Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements. PMID:26816294
New Flexible Channels for Room Temperature Tunneling Field Effect Transistors.
Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L; Banyai, Douglas; Savaikar, Madhusudan A; Jaszczak, John A; Yap, Yoke Khin
2016-02-05
Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.
Fabiano, Simone; Crispin, Xavier; Berggren, Magnus
2014-01-08
The dense surface charges expressed by a ferroelectric polymeric thin film induce ion displacement within a polyelectrolyte layer and vice versa. This is because the density of dipoles along the surface of the ferroelectric thin film and its polarization switching time matches that of the (Helmholtz) electric double layers formed at the ferroelectric/polyelectrolyte and polyelectrolyte/semiconductor interfaces. This combination of materials allows for introducing hysteresis effects in the capacitance of an electric double layer capacitor. The latter is advantageously used to control the charge accumulation in the semiconductor channel of an organic field-effect transistor. The resulting memory transistors can be written at a gate voltage of around 7 V and read out at a drain voltage as low as 50 mV. The technological implication of this large difference between write and read-out voltages lies in the non-destructive reading of this ferroelectric memory.
Chen, Hu; Hurhangee, Michael; Nikolka, Mark; Zhang, Weimin; Kirkus, Mindaugas; Neophytou, Marios; Cryer, Samuel J; Harkin, David; Hayoz, Pascal; Abdi-Jalebi, Mojtaba; McNeill, Christopher R; Sirringhaus, Henning; McCulloch, Iain
2017-09-01
The charge-carrier mobility of organic semiconducting polymers is known to be enhanced when the energetic disorder of the polymer is minimized. Fused, planar aromatic ring structures contribute to reducing the polymer conformational disorder, as demonstrated by polymers containing the indacenodithiophene (IDT) repeat unit, which have both a low Urbach energy and a high mobility in thin-film-transistor (TFT) devices. Expanding on this design motif, copolymers containing the dithiopheneindenofluorene repeat unit are synthesized, which extends the fused aromatic structure with two additional phenyl rings, further rigidifying the polymer backbone. A range of copolymers are prepared and their electrical properties and thin-film morphology evaluated, with the co-benzothiadiazole polymer having a twofold increase in hole mobility when compared to the IDT analog, reaching values of almost 3 cm 2 V -1 s -1 in bottom-gate top-contact organic field-effect transistors. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Soft-type trap-induced degradation of MoS2 field effect transistors.
Cho, Young-Hoon; Ryu, Min-Yeul; Lee, Kook Jin; Park, So Jeong; Choi, Jun Hee; Lee, Byung-Chul; Kim, Wungyeon; Kim, Gyu-Tae
2018-06-01
The practical applicability of electronic devices is largely determined by the reliability of field effect transistors (FETs), necessitating constant searches for new and better-performing semiconductors. We investigated the stress-induced degradation of MoS 2 multilayer FETs, revealing a steady decrease of drain current by 56% from the initial value after 30 min. The drain current recovers to the initial state when the transistor is completely turned off, indicating the roles of soft-traps in the apparent degradation. The noise current power spectrum follows the model of carrier number fluctuation-correlated mobility fluctuation (CNF-CMF) regardless of stress time. However, the reduction of the drain current was well fitted to the increase of the trap density based on the CNF-CMF model, attributing the presence of the soft-type traps of dielectric oxides to the degradation of the MoS 2 FETs.
Soft-type trap-induced degradation of MoS2 field effect transistors
NASA Astrophysics Data System (ADS)
Cho, Young-Hoon; Ryu, Min-Yeul; Lee, Kook Jin; Park, So Jeong; Choi, Jun Hee; Lee, Byung-Chul; Kim, Wungyeon; Kim, Gyu-Tae
2018-06-01
The practical applicability of electronic devices is largely determined by the reliability of field effect transistors (FETs), necessitating constant searches for new and better-performing semiconductors. We investigated the stress-induced degradation of MoS2 multilayer FETs, revealing a steady decrease of drain current by 56% from the initial value after 30 min. The drain current recovers to the initial state when the transistor is completely turned off, indicating the roles of soft-traps in the apparent degradation. The noise current power spectrum follows the model of carrier number fluctuation–correlated mobility fluctuation (CNF–CMF) regardless of stress time. However, the reduction of the drain current was well fitted to the increase of the trap density based on the CNF–CMF model, attributing the presence of the soft-type traps of dielectric oxides to the degradation of the MoS2 FETs.
Removing the current-limit of vertical organic field effect transistors
NASA Astrophysics Data System (ADS)
Sheleg, Gil; Greenman, Michael; Lussem, Bjorn; Tessler, Nir
2017-11-01
The reported Vertical Organic Field Effect Transistors (VOFETs) show either superior current and switching speeds or well-behaved transistor performance, especially saturation in the output characteristics. Through the study of the relationship between the device architecture or dimensions and the device performance, we find that achieving a saturation regime in the output characteristics requires that the device operates in the injection limited regime. In current structures, the existence of the injection limited regime depends on the source's injection barrier as well as on the buried semiconductor layer thickness. To overcome the injection limit imposed by the necessity of injection barrier, we suggest a new architecture to realize VOFETs. This architecture shows better gate control and is independent of the injection barrier at the source, thus allowing for several A cm-2 for a semiconductor having a mobility value of 0.1 cm2 V-1 s-1.
Effects of Various Passivation Layers on Electrical Properties of Multilayer MoS₂ Transistors.
Ma, Jiyeon; Yoo, Geonwook
2018-09-01
So far many of research on transition metal dichalcogenides (TMDCs) are based on a bottomgate device structure due to difficulty with depositing a dielectric film on top of TMDs channel layer. In this work, we study different effects of various passivation layers on electrical properties of multilayer MoS2 transistors: spin-coated CYTOP, SU-8, and thermal evaporated MoOX. The SU-8 passivation layer alters device performance least significantly, and MoOX induces positive threshold voltage shift of ~8.0 V due to charge depletion at the interface, and the device with CYTOP layer exhibits decreased field-effect mobility by ~50% due to electric dipole field effect of C-F bonds in the end groups. Our results imply that electrical properties of the multilayer MoS2 transistors can be modulated using a passivation layer, and therefore a proper passivation layer should be considered for MoS2 device structures.
Zheng, Xiaoming; Wang, Guang; Tan, Yuan; Zhang, Xueao
2017-01-01
We fabricated 70 nm Al2O3 gated field effect transistors based on two-dimensional (2D) materials and characterized their optical and electrical properties. Studies show that the optical contrast of monolayer graphene on an Al2O3/Si substrate is superior to that on a traditional 300 nm SiO2/Si substrate (2.4 times). Significantly, the transconductance of monolayer graphene transistors on the Al2O3/Si substrate shows an approximately 10-fold increase, due to a smaller dielectric thickness and a higher dielectric constant. Furthermore, this substrate is also suitable for other 2D materials, such as WS2, and can enhance the transconductance remarkably by 61.3 times. These results demonstrate a new and ideal substrate for the fabrication of 2D materials-based electronic logic devices. PMID:28937619
NASA Astrophysics Data System (ADS)
Gupta, Ritesh; Rathi, Servin; Kaur, Ravneet; Gupta, Mridula; Gupta, R. S.
2009-03-01
In order to achieve superior RF performance, short gate length is required for the compound semiconductor field effect transistors, but the limitation in lithography for submicrometer gate lengths leads to the formation of various metal-insulator geometries like T-gate [Sandeep R. Bahl, Jesus A. del Alamo, Physics of breakdown in InAlAs/ n +-InGaAs heterostructure field-effect transistors, IEEE Trans. Electron Devices 41 (12) (1994) 2268-2275]. These geometries are the combination of various Metal-Semiconductor (MS)/Metal-Air-Semiconductor (MAS) contacts. Moreover, field plates [S. Karmalkar, M.S. Shur, G. Simin, M. Asif Khan, Field-plate engineering for HFETs, IEEE Trans. Electron Devices 52 (2005) 2534-2540] are also being fabricated these days, mainly at the drain end ( Γ-gate) having Metal-Insulator-Semiconductor (MIS) instead of MAS contact with the intention of increasing the breakdown voltage of the device. To realize the effect of upper gate electrode in the T-gate structure and field plates, an analytical model has been proposed in the present article by dividing the whole structure into MS/MIS contact regions, applying current continuity among them and solving iteratively. The model proposed for Metal-Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) [R. Gupta, S.K. Aggarwal, M. Gupta, R.S. Gupta, Analytical model for metal insulator semiconductor high electron mobility transistor (MISHEMT) for its high frequency and high power applications, J. Semicond. Technol. Sci. 6 (3) (2006) 189-198], is equally applicable to High Electron Mobility Transistors (HEMT) and has been used to formulate this model. In this paper, various structures and geometries have been compared to anticipate the need of T-gate modeling. The effect of MIS contacts has been implemented as parasitic resistance and capacitance and has also been studied to control the middle conventional gate as in dual gate technology by applying separate voltages across it. The results obtained using the proposed analytical scheme has been compared with simulated and experimental results, to prove the validity of our model.
Liang, Jiajie; Li, Lu; Chen, Dustin; Hajagos, Tibor; Ren, Zhi; Chou, Shu-Yu; Hu, Wei; Pei, Qibing
2015-01-01
Thin-film field-effect transistor is a fundamental component behind various mordern electronics. The development of stretchable electronics poses fundamental challenges in developing new electronic materials for stretchable thin-film transistors that are mechanically compliant and solution processable. Here we report the fabrication of transparent thin-film transistors that behave like an elastomer film. The entire fabrication is carried out by solution-based techniques, and the resulting devices exhibit a mobility of ∼30 cm2 V−1 s−1, on/off ratio of 103–104, switching current >100 μA, transconductance >50 μS and relative low operating voltages. The devices can be stretched by up to 50% strain and subjected to 500 cycles of repeated stretching to 20% strain without significant loss in electrical property. The thin-film transistors are also used to drive organic light-emitting diodes. The approach and results represent an important progress toward the development of stretchable active-matrix displays. PMID:26173436
Thickness-dependent electron mobility of single and few-layer MoS{sub 2} thin-film transistors
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kim, Ji Heon; Kim, Tae Ho; Lee, Hyunjea
We investigated the dependence of electron mobility on the thickness of MoS{sub 2} nanosheets by fabricating bottom-gate single and few-layer MoS{sub 2} thin-film transistors with SiO{sub 2} gate dielectrics and Au electrodes. All the fabricated MoS{sub 2} transistors showed on/off-current ratio of ∼10{sup 7} and saturated output characteristics without high-k capping layers. As the MoS{sub 2} thickness increased from 1 to 6 layers, the field-effect mobility of the fabricated MoS{sub 2} transistors increased from ∼10 to ∼18 cm{sup 2}V{sup −1}s{sup −1}. The increased subthreshold swing of the fabricated transistors with MoS{sub 2} thickness suggests that the increase of MoS{sub 2}more » mobility with thickness may be related to the dependence of the contact resistance and the dielectric constant of MoS{sub 2} layer on its thickness.« less
NASA Astrophysics Data System (ADS)
Hori, Yasuko; Kuzuhara, Masaaki; Ando, Yuji; Mizuta, Masashi
2000-04-01
Electric field distribution in the channel of a field effect transistor (FET) with a field-modulating plate (FP) has been theoretically investigated using a two-dimensional ensemble Monte Carlo simulation. This analysis revealed that the introduction of FP is effective in canceling the influence of surface traps under forward bias conditions and in reducing the electric field intensity at the drain side of the gate edge under pinch-off bias conditions. This study also found that a partial overlap of the high-field region under the gate and that at the FP electrode is important for reducing the electric field intensity. The optimized metal-semiconductor FET with FP (FPFET) (LGF˜0.2 μm) exhibited a much lower peak electric field intensity than a conventional metal-semiconductor FET. Based on these numerically calculated results, we have proposed a design procedure to optimize the power FPFET structure with extremely high breakdown voltages while maintaining reasonable gain performance.
NASA Astrophysics Data System (ADS)
Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.
2018-05-01
We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.
NASA Astrophysics Data System (ADS)
Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong
2015-03-01
Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.
NASA Astrophysics Data System (ADS)
Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man
2018-04-01
In this work, we present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on an asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor (TFET) for DRAM applications. The n-doped boosting layer and gate2 drain-underlap structure is employed in the device to obtain an excellent 1T-DRAM performance. The n-doped layer inserted between the source and channel regions improves the sensing margin because of a high rate of increase in the band-to-band tunneling (BTBT) probability. Furthermore, because the gate2 drain-underlap structure reduces the recombination rate that occurs between the gate2 and drain regions, a device with a gate2 drain-underlap length (L G2_D-underlap) of 10 nm exhibited a longer retention performance. As a result, by applying the n-doped layer and gate2 drain-underlap structure, the proposed device exhibited not only a high sensing margin of 1.11 µA/µm but also a long retention time of greater than 100 ms at a temperature of 358 K (85 °C).
NASA Astrophysics Data System (ADS)
Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish
2017-01-01
Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor.
Spanu, A.; Lai, S.; Cosseddu, P.; Tedesco, M.; Martinoia, S.; Bonfiglio, A.
2015-01-01
In the last four decades, substantial advances have been done in the understanding of the electrical behavior of excitable cells. From the introduction in the early 70's of the Ion Sensitive Field Effect Transistor (ISFET), a lot of effort has been put in the development of more and more performing transistor-based devices to reliably interface electrogenic cells such as, for example, cardiac myocytes and neurons. However, depending on the type of application, the electronic devices used to this aim face several problems like the intrinsic rigidity of the materials (associated with foreign body rejection reactions), lack of transparency and the presence of a reference electrode. Here, an innovative system based on a novel kind of organic thin film transistor (OTFT), called organic charge modulated FET (OCMFET), is proposed as a flexible, transparent, reference-less transducer of the electrical activity of electrogenic cells. The exploitation of organic electronics in interfacing the living matters will open up new perspectives in the electrophysiological field allowing us to head toward a modern era of flexible, reference-less, and low cost probes with high-spatial and high-temporal resolution for a new generation of in-vitro and in-vivo monitoring platforms. PMID:25744085
Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish
2017-01-01
Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor. PMID:28134275
Hannah, Stuart; Cardona, Javier; Lamprou, Dimitrios A; Šutta, Pavol; Baran, Peter; Al Ruzaiqi, Afra; Johnston, Karen; Gleskova, Helena
2016-09-28
Monolayers of six alkylphosphonic acids ranging from C8 to C18 were prepared by vacuum evaporation and incorporated into low-voltage organic field-effect transistors based on dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). Similar to solution-assembled monolayers, the molecular order for vacuum-deposited monolayers improved with increasing length of the aliphatic tail. At the same time, Fourier transform infrared (FTIR) measurements suggested lower molecular coverage for longer phosphonic acids. The comparison of FTIR and vibration frequencies calculated by density functional theory indicated that monodentate bonding does not occur for any phosphonic acid. All monolayers exhibited low surface energy of ∼17.5 mJ/m(2) with a dominating Lifshitz-van der Waals component. Their surface roughness was comparable, while the nanomechanical properties were varied but not correlated to the length of the molecule. However, large improvement in transistor performance was observed with increasing length of the aliphatic tail. Upon going from C8 to C18, the mean threshold voltage decreased from -1.37 to -1.24 V, the field-effect mobility increased from 0.03 to 0.33 cm(2)/(V·s), the off-current decreased from ∼8 × 10(-13) to ∼3 × 10(-13) A, and for transistors with L = 30 μm the on-current increased from ∼3 × 10(-8) to ∼2 × 10(-6) A, and the on/off-current ratio increased from ∼3 × 10(4) to ∼4 × 10(6). Similarly, transistors with longer phosphonic acids exhibited much better air and bias-stress stability. The achieved transistor performance opens up a completely "dry" fabrication route for ultrathin dielectrics and low-voltage organic transistors.
Dehzangi, Arash; Abedini, Alam; Abdullah, Ahmad Makarimi; Saion, Elias; Hutagalung, Sabar D; Hamidon, Mohd N; Hassan, Jumiah
2012-01-01
Summary A double-lateral-gate p-type junctionless transistor is fabricated on a low-doped (1015) silicon-on-insulator wafer by a lithography technique based on scanning probe microscopy and two steps of wet chemical etching. The experimental transfer characteristics are obtained and compared with the numerical characteristics of the device. The simulation results are used to investigate the pinch-off mechanism, from the flat band to the off state. The study is based on the variation of the carrier density and the electric-field components. The device is a pinch-off transistor, which is normally in the on state and is driven into the off state by the application of a positive gate voltage. We demonstrate that the depletion starts from the bottom corner of the channel facing the gates and expands toward the center and top of the channel. Redistribution of the carriers due to the electric field emanating from the gates creates an electric field perpendicular to the current, toward the bottom of the channel, which provides the electrostatic squeezing of the current. PMID:23365794
NASA Astrophysics Data System (ADS)
Tsai, Jung-Hui
2014-01-01
DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.
Degradation Mechanisms for GaN and GaAs High Speed Transistors
Cheney, David J.; Douglas, Erica A.; Liu, Lu; Lo, Chien-Fong; Gila, Brent P.; Ren, Fan; Pearton, Stephen J.
2012-01-01
We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs) as well as Heterojunction Bipolar Transistors (HBTs) in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate), and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kawanago, Takamasa, E-mail: kawanago.t.ab@m.titech.ac.jp; Oda, Shunri
In this study, we apply self-assembled-monolayer (SAM)-based gate dielectrics to the fabrication of molybdenum disulfide (MoS{sub 2}) field-effect transistors. A simple fabrication process involving the selective formation of a SAM on metal oxides in conjunction with the dry transfer of MoS{sub 2} flakes was established. A subthreshold slope (SS) of 69 mV/dec and no hysteresis were demonstrated with the ultrathin SAM-based gate dielectrics accompanied by a low gate leakage current. The small SS and no hysteresis indicate the superior interfacial properties of the MoS{sub 2}/SAM structure. Cross-sectional transmission electron microscopy revealed a sharp and abrupt interface of the MoS{sub 2}/SAM structure.more » The SAM-based gate dielectrics are found to be applicable to the fabrication of low-voltage MoS{sub 2} field-effect transistors and can also be extended to various layered semiconductor materials. This study opens up intriguing possibilities of SAM-based gate dielectrics in functional electronic devices.« less
Microwave-signal generation in a planar Gunn diode with radiation exposure taken into account
DOE Office of Scientific and Technical Information (OSTI.GOV)
Obolenskaya, E. S., E-mail: bess009@mail.ru, E-mail: obolensk@rf.unn.ru; Tarasova, E. A.; Churin, A. Yu.
2016-12-15
Microwave-signal generation in planar Gunn diodes with a two-dimensional electron gas, in which we previously studied steady-state electron transport, is theoretically studied. The applicability of a control electrode similar to a field-effect transistor gate to control the parameters of the output diode microwave signal is considered. The results of physical-topological modeling of semiconductor structures with different diode active-region structures, i.e., without a quantum well, with one and two quantum wells separated by a potential barrier, are compared. The calculated results are compared with our previous experimental data on recording Gunn generation in a Schottky-gate field-effect transistor. It is theoretically andmore » experimentally shown that the power of the signal generated by the planar Gunn diode with a quantum well and a control electrode is sufficient to implement monolithic integrated circuits of different functionalities. It is theoretically and experimentally shown that the use of a control electrode on account of the introduction of corrective feedback allows a significant increase in the radiation resistance of a microwave generator with Schottky-gate field-effect transistors.« less
The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing
NASA Astrophysics Data System (ADS)
Chang, Yi-Kuei; Hong, Franklin Chau-Nan
2009-05-01
A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min-1), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 105, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm2 V-1 s-1. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.
The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing.
Chang, Yi-Kuei; Hong, Franklin Chau-Nan
2009-05-13
A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min(-1)), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10(5), a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm(2) V(-1) s(-1). The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.
Integrated digital inverters based on two-dimensional anisotropic ReS2 field-effect transistors
Liu, Erfu; Fu, Yajun; Wang, Yaojia; Feng, Yanqing; Liu, Huimei; Wan, Xiangang; Zhou, Wei; Wang, Baigeng; Shao, Lubin; Ho, Ching-Hwa; Huang, Ying-Sheng; Cao, Zhengyi; Wang, Laiguo; Li, Aidong; Zeng, Junwen; Song, Fengqi; Wang, Xinran; Shi, Yi; Yuan, Hongtao; Hwang, Harold Y.; Cui, Yi; Miao, Feng; Xing, Dingyu
2015-01-01
Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS2) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS2 field-effect transistors, which exhibit competitive performance with large current on/off ratios (∼107) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconducting materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS2 anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications. PMID:25947630
NASA Astrophysics Data System (ADS)
Bauer, Thilo; Jäger, Christof M.; Jordan, Meredith J. T.; Clark, Timothy
2015-07-01
We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localize charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bauer, Thilo; Jäger, Christof M.; Jordan, Meredith J. T.
2015-07-28
We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localizemore » charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.« less
Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax
Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He
2016-01-01
In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009
Cohen, Ariel; Spira, Micha E; Yitshaik, Shlomo; Borghs, Gustaaf; Shwartzglass, Ofer; Shappir, Joseph
2004-07-15
We report the realization of electrical coupling between neurons and depletion type floating gate (FG) p-channel MOS transistors. The devices were realized in a shortened 0.5 microm CMOS technology. Increased boron implant dose was used to form the depletion type devices. Post-CMOS processing steps were added to expose the devices sensing area. The neurons are coupled to the polycrystalline silicon (PS) FG through 420A thermal oxide in an area which is located over the thick field oxide away from the transistor. The combination of coupling area pad having a diameter of 10 or 15 microm and sensing transistor with W/L of 50/0.5 microm results in capacitive coupling ratio of the neuron signal of about 0.5 together with relatively large transistor transconductance. The combination of the FG structure with a depletion type device, leads to the following advantages. (a) No need for dc bias between the solution in which the neurons are cultured and the transistor with expected consequences to the neuron as well as the silicon die durability. (b) The sensing area of the neuron activity is separated from the active area of the transistor. Thus, it is possible to design the sensing area and the channel area separately. (c) The channel area, which is the most sensitive part of the transistor, can be insulated and shielded from the ionic solution in which the neurons are cultured. (d) There is an option to add a switching transistor to the FG and use the FG also for the neuron stimulation.
Modeling of charge transport in ion bipolar junction transistors.
Volkov, Anton V; Tybrandt, Klas; Berggren, Magnus; Zozoulenko, Igor V
2014-06-17
Spatiotemporal control of the complex chemical microenvironment is of great importance to many fields within life science. One way to facilitate such control is to construct delivery circuits, comprising arrays of dispensing outlets, for ions and charged biomolecules based on ionic transistors. This allows for addressability of ionic signals, which opens up for spatiotemporally controlled delivery in a highly complex manner. One class of ionic transistors, the ion bipolar junction transistors (IBJTs), is especially attractive for these applications because these transistors are functional at physiological conditions and have been employed to modulate the delivery of neurotransmitters to regulate signaling in neuronal cells. Further, the first integrated complementary ionic circuits were recently developed on the basis of these ionic transistors. However, a detailed understanding of the device physics of these transistors is still lacking and hampers further development of components and circuits. Here, we report on the modeling of IBJTs using Poisson's and Nernst-Planck equations and the finite element method. A two-dimensional model of the device is employed that successfully reproduces the main characteristics of the measurement data. On the basis of the detailed concentration and potential profiles provided by the model, the different modes of operation of the transistor are analyzed as well as the transitions between the different modes. The model correctly predicts the measured threshold voltage, which is explained in terms of membrane potentials. All in all, the results provide the basis for a detailed understanding of IBJT operation. This new knowledge is employed to discuss potential improvements of ion bipolar junction transistors in terms of miniaturization and device parameters.
NASA Astrophysics Data System (ADS)
Kar-Roy, Arjun; Hurwitz, Paul; Mann, Richard; Qamar, Yasir; Chaudhry, Samir; Zwingman, Robert; Howard, David; Racanelli, Marco
2012-06-01
Increasingly complex specifications for next-generation focal plane arrays (FPAs) require smaller pixels, larger array sizes, reduced power consumption and lower cost. We have previously reported on the favorable features available in the commercially available TowerJazz CA18 0.18μm mixed-signal CMOS technology platform for advanced read-out integrated circuit (ROIC) applications. In his paper, new devices in development for commercial purposes and which may have applications in advanced ROICs are reported. First, results of buried-channel 3.3V field effect transistors (FETs) are detailed. The buried-channel pFETs show flicker (1/f) noise reductions of ~5X in comparison to surface-channel pFETs along with a significant reduction of the body constant parameter. The buried-channel nFETs show ~2X reduction of 1/f noise versus surface-channel nFETs. Additional reduced threshold voltage nFETs and pFETs are also described. Second, a high-density capacitor solution with a four-stacked linear (metal-insulator-metal) MIM capacitor having capacitance density of 8fF/μm2 is reported. Additional stacking with MOS capacitor in a 5V tolerant process results in >50fC/μm2 charge density. Finally, one-time programmable (OTP) and multi-time programmable (MTP) non-volatile memory options in the CA18 technology platform are outlined.
Dey, Anil W; Svensson, Johannes; Ek, Martin; Lind, Erik; Thelander, Claes; Wernersson, Lars-Erik
2013-01-01
The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1-4 and Cho et al., IEEE Int. Devices Meeting 2011, 15.1.1-15.1.4). The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties (del Alamo, Nature 2011, 479, 317-323, and Liao et al., Nature 2010, 467, 305-308). In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects; however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak current, Jpeak = 2310 kA/cm(2), than the maximum peak current of axial GaSb/InAs(Sb) Esaki diodes per unit chip area. The radial TFETs also deliver high peak current densities Jpeak = 1210 kA/cm(2), while their axial counterparts at most carry Jpeak = 77 kA/cm(2), normalized to the largest cross-sectional area of the nanowire.
NASA Astrophysics Data System (ADS)
Kim, Youngjun; Cho, Seongeun; Kim, Hyeran; Seo, Soonjoo; Lee, Hyun Uk; Lee, Jouhahn; Ko, Hyungduk; Chang, Mincheol; Park, Byoungnam
2017-09-01
Electric field-induced charge trapping and exciton dissociation were demonstrated at a penatcene/grapheme quantum dot (GQD) interface using a bottom contact bi-layer field effect transistor (FET) as an electrical nano-probe. Large threshold voltage shift in a pentacene/GQD FET in the dark arises from field-induced carrier trapping in the GQD layer or GQD-induced trap states at the pentacene/GQD interface. As the gate electric field increases, hysteresis characterized by the threshold voltage shift depending on the direction of the gate voltage scan becomes stronger due to carrier trapping associated with the presence of a GQD layer. Upon illumination, exciton dissociation and gate electric field-induced charge trapping simultaneously contribute to increase the threshold voltage window, which can potentially be exploited for photoelectric memory and/or photovoltaic devices through interface engineering.
The Integration and Applications of Organic Thin Film Transistors and Ferroelectric Polymers
NASA Astrophysics Data System (ADS)
Hsu, Yu-Jen
Organic thin film transistors and ferroelectric polymer (polyvinylidene difluoride) sheet material are integrated to form various sensors for stress/strain, acoustic wave, and Infrared (heat) sensing applications. Different from silicon-based transistors, organic thin film transistors can be fabricated and processed in room-temperature and integrated with a variety of substrates. On the other hand, polyvinylidene difluoride (PVDF) exhibits ferroelectric properties that are highly useful for sensor applications. The wide frequency bandwidth (0.001 Hz to 10 GHz), vast dynamic range (100n to 10M psi), and high elastic compliance (up to 3 percent) make PVDF a more suitable candidate over ceramic piezoelectric materials for thin and flexible sensor applications. However, the low Curie temperature may have impeded its integration with silicon technology. Organic thin film transistors, however, do not have the limitation of processing temperature, hence can serve as transimpedance amplifiers to convert the charge signal generated by PVDF into current signal that are more measurable and less affected by any downstream parasitics. Piezoelectric sensors are useful for a range of applications, but passive arrays suffer from crosstalk and signal attenuation which have complicated the development of array-based PVDF sensors. We have used organic field effect transistors, which are compatible with the low Curie temperature of a flexible piezoelectric polymer,PVDF, to monolithically fabricate transimpedance amplifiers directly on the sensor surface and convert the piezoelectric charge signal into a current signal which can be detected even in the presence of parasitic capacitances. The device couples the voltage generated by the PVDF film under strain into the gate of the organic thin film transistors (OFET) using an arrangement that allows the full piezoelectric voltage to couple to the channel, while also increasing the charge retention time. A bipolar detector is created by using a UV-Ozone treatment to shift the threshold voltage and increase the current of the transistor under both compressive and tensile strain. An array of strain sensors which maps the strain field on a PVDF film surface is demonstrated in this work. The strain sensor experience inspires a tone analyzer built using distributed resonator architecture on a tensioned piezoelectric PVDF sheet. This sheet is used as both the resonator and detection element. Two architectures are demonstrated; one uses distributed directly addressed elements as a proof of concept, and the other integrates organic thin film transistor-based transimpedance amplifiers monolithically with the PVDF sheet to convert the piezoelectric charge signal into a current signal for future applications such as sound field imaging. The PVDF sheet material is instrumented along its length and the amplitude response at 15 sites is recorded and analyzed as a function of the frequency of excitation. The determination of the dominant frequency component of an incoming sound is demonstrated using linear system decomposition of the time-averaged response of the sheet using no time domain detection. Our design allows for the determination of the spectral composition of a sound using the mechanical signal processing provided by the amplitude response and eliminates the need for time-domain electronic signal processing of the incoming signal. The concepts of the PVDF strain sensor and the tone analyzer trigger the idea of an active matrix microphone through the integration of organic thin film transistors with a freestanding piezoelectric polymer sheet. Localized acoustic pressure detection is enabled by switch transistors and local transimpedance amplification built into the active matrix architecture. The frequency of detection ranges from DC to 15KHz; the bandwidth is extended using an architecture that provides for virtually zero gate/source and gate/drain capacitance at the sensing transistors and low overlap capacitance at the switch transistors. A series of measurements are taken to demonstrate localized acoustic wave detection, high pitch sound diffraction pattern mapping, and directional listening. This system permits the direct visualization of a two dimensional sound field in a format that was previously inaccessible. In addition to the piezoelectric property, pyroelectricity is also exhibited by PVDF and is essential in the world of sensors. An integration of PVDF and OFET for the IR heat sensing is demonstrated to prove the concept of converting pyroelectric charge signal to a electric current signal. The basic pyroelectricity of PVDF sheet is first examined before making a organic transistor integrated IR sensor. Then, two types of architectures are designed and tested. The first one uses the structure similar to the PVDF strain sensor, and the second one uses a PVDF capacitor to gate the integrated OFETs. The conversion from pyroelectric signal to transistor current signal is observed and characterized. This design provides a flexible and gain-tunable version for IR heat sensors.
NASA Astrophysics Data System (ADS)
Yan, Shi-Li; Xie, Zhi-Jian; Chen, Jian-Hao; Taniguchi, Takashi; Watanabe, Kenji
2017-03-01
The energy bandgap is an intrinsic character of semiconductors, which largely determines their properties. The ability to continuously and reversibly tune the bandgap of a single device during real time operation is of great importance not only to device physics but also to technological applications. Here we demonstrate a widely tunable bandgap of few-layer black phosphorus (BP) by the application of vertical electric field in dual-gated BP field-effect transistors. A total bandgap reduction of 124 meV is observed when the electrical displacement field is increased from 0.10V/nm to 0.83V/nm. Our results suggest appealing potential for few-layer BP as a tunable bandgap material in infrared optoelectronics, thermoelectric power generation and thermal imaging.
NASA Astrophysics Data System (ADS)
Kawasaki, Naoko; Nagano, Takayuki; Kubozono, Yoshihiro; Sako, Yuuki; Morimoto, Yu; Takaguchi, Yutaka; Fujiwara, Akihiko; Chu, Chih-Chien; Imae, Toyoko
2007-12-01
Field-effect transistor (FET) device has been fabricated with Langmuir-Blodgett films of C60 dendrimer. The device showed n-channel normally off characteristics with the field-effect mobility of 2.7×10-3cm2V-1s-1 at 300K, whose value is twice as high as that (1.4×10-3cm2V-1s-1) for the FET with spin-coated films of C60 dendrimer. This originates from the formation of ordered π-conduction network of C60 moieties. From the temperature dependence of field-effect mobility, a structural phase transition has been observed at around 300K. Furthermore, the density of states for impurity levels was estimated in the Langmuir-Blodgett films.
Kim, Hyungsoo; Bong, Jihye; Mikael, Solomon; Kim, Tong June; Williams, Justin C.; Ma, Zhenqiang
2016-01-01
Flexible graphene transistors built on a biocompatible Parylene C substrate would enable active circuitry to be integrated into flexible implantable biomedical devices. An annealing method to improve the performance of a flexible transistor without damaging the flexible substrate is also desirable. Here, we present a fabrication method of a flexible graphene transistor with a bottom-gate coplanar structure on a Parylene C substrate. Also, a current annealing method and its effect on the device performance have been studied. The localized heat generated by the current annealing method improves the drain current, which is attributed to the decreased contact resistance between graphene and S/D electrodes. A maximum current annealing power in the Parylene C-based graphene transistor has been extracted to provide a guideline for an appropriate current annealing. The fabricated flexible graphene transistor shows a field-effect mobility, maximum transconductance, and a Ion/Ioff ratio of 533.5 cm2/V s, 58.1 μS, and 1.76, respectively. The low temperature process and the current annealing method presented here would be useful to fabricate two-dimensional materials-based flexible electronics. PMID:27795570
Liquid-Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing.
Zhang, Yu; Li, Jun; Li, Rui; Sbircea, Dan-Tiberiu; Giovannitti, Alexander; Xu, Junling; Xu, Huihua; Zhou, Guodong; Bian, Liming; McCulloch, Iain; Zhao, Ni
2017-11-08
Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid-liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the "sensing channel" can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.
Error correcting circuit design with carbon nanotube field effect transistors
NASA Astrophysics Data System (ADS)
Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong
2018-03-01
In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.
NASA Astrophysics Data System (ADS)
Kobayashi, Shigeki; Saitoh, Masumi; Nakabayashi, Yukio; Uchida, Ken
2007-11-01
Uniaxial stress effects on Coulomb-limited mobility (μCoulomb) in Si metal-oxide-semiconductor field-effect transistors (MOSFETs) are investigated experimentally. By using the four-point bending method, uniaxial stress corresponding to 0.1% strain is applied to MOSFETs along the channel direction. It is found that μCoulomb in p-type MOSFETs is enhanced greatly by uniaxial stress; μCoulomb is as sensitive as phonon-limited mobility. The high sensitivity of μCoulomb in p-type MOSFETs to stress arises from the stress-induced change of hole effective mass.
Wu, Yuchen; Su, Bin; Jiang, Lei; Heeger, Alan J
2013-12-03
Precisely aligned organic-liquid-soluble semiconductor microwire arrays have been fabricated by "liquid-liquid-solid" type superoleophobic surfaces directed fluid drying. Aligned organic 1D micro-architectures can be built as high-quality organic field-effect transistors with high mobilities of >10 cm(2) ·V(-1) ·s(-1) and current on/off ratio of more than 10(6) . All these studies will boost the development of 1D microstructures of organic semiconductor materials for potential application in organic electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.