Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

NASA Astrophysics Data System (ADS)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Benzocyclobutene (BCB) Polymer as Amphibious Buffer Layer for Graphene Field-Effect Transistor.

PubMed

Wu, Yun; Zou, Jianjun; Huo, Shuai; Lu, Haiyan; Kong, Yuecan; Chen, Tangshen; Wu, Wei; Xu, Jingxia

2015-08-01

Owing to the scattering and trapping effects, the interfaces of dielectric/graphene or substrate/graphene can tailor the performance of field-effect transistor (FET). In this letter, the polymer of benzocyclobutene (BCB) was used as an amphibious buffer layer and located at between the layers of substrate and graphene and between the layers of dielectric and graphene. Interestingly, with the help of nonpolar and hydrophobic BCB buffer layer, the large-scale top-gated, chemical vapor deposited (CVD) graphene transistors was prepared on Si/SiO2 substrate, its cutoff frequency (fT) and the maximum cutoff frequency (fmax) of the graphene field-effect transistor (GFET) can be reached at 12 GHz and 11 GHz, respectively.

Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

PubMed

Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

2014-12-24

We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

Silicon Field Effect Transistors as Dual-Use Sensor-Heater Hybrids

PubMed Central

Reddy, Bobby; Elibol, Oguz H.; Nair, Pradeep R.; Dorvel, Brian R.; Butler, Felice; Ahsan, Zahab; Bergstrom, Donald E.; Alam, Muhammad A.; Bashir, Rashid

2011-01-01

We demonstrate the temperature mediated applications of a previously proposed novel localized dielectric heating method on the surface of dual purpose silicon field effect transistor (FET) sensor-heaters and perform modeling and characterization of the underlying mechanisms. The FETs are first shown to operate as electrical sensors via sensitivity to changes in pH in ionic fluids. The same devices are then demonstrated as highly localized heaters via investigation of experimental heating profiles and comparison to simulation results. These results offer further insight into the heating mechanism and help determine the spatial resolution of the technique. Two important biosensor platform applications spanning different temperature ranges are then demonstrated: a localized heat-mediated DNA exchange reaction and a method for dense selective functionalization of probe molecules via the heat catalyzed complete desorption and reattachment of chemical functionalization to the transistor surfaces. Our results show that the use of silicon transistors can be extended beyond electrical switching and field-effect sensing to performing localized temperature controlled chemical reactions on the transistor itself. PMID:21214189

Recent progress in photoactive organic field-effect transistors.

PubMed

Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

2014-04-01

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

Chemical Vapor-Deposited Hexagonal Boron Nitride as a Scalable Template for High-Performance Organic Field-Effect Transistors

DOE PAGES

Lee, Tae Hoon; Kim, Kwanpyo; Kim, Gwangwoo; ...

2017-02-27

Organic field-effect transistors have attracted much attention because of their potential use in low-cost, large-area, flexible electronics. High-performance organic transistors require a low density of grain boundaries in their organic films and a decrease in the charge trap density at the semiconductor–dielectric interface for efficient charge transport. In this respect, the role of the dielectric material is crucial because it primarily determines the growth of the film and the interfacial trap density. Here, we demonstrate the use of chemical vapor-deposited hexagonal boron nitride (CVD h-BN) as a scalable growth template/dielectric for high-performance organic field-effect transistors. The field-effect transistors based onmore » C60 films grown on single-layer CVD h-BN exhibit an average mobility of 1.7 cm 2 V –1 s –1 and a maximal mobility of 2.9 cm 2 V –1 s –1 with on/off ratios of 10 7. The structural and morphology analysis shows that the epitaxial, two-dimensional growth of C 60 on CVD h-BN is mainly responsible for the superior charge transport behavior. In conclusion, we believe that CVD h-BN can serve as a growth template for various organic semiconductors, allowing the development of large-area, high-performance flexible electronics.« less

Chemical Vapor-Deposited Hexagonal Boron Nitride as a Scalable Template for High-Performance Organic Field-Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Tae Hoon; Kim, Kwanpyo; Kim, Gwangwoo

Organic field-effect transistors have attracted much attention because of their potential use in low-cost, large-area, flexible electronics. High-performance organic transistors require a low density of grain boundaries in their organic films and a decrease in the charge trap density at the semiconductor–dielectric interface for efficient charge transport. In this respect, the role of the dielectric material is crucial because it primarily determines the growth of the film and the interfacial trap density. Here, we demonstrate the use of chemical vapor-deposited hexagonal boron nitride (CVD h-BN) as a scalable growth template/dielectric for high-performance organic field-effect transistors. The field-effect transistors based onmore » C60 films grown on single-layer CVD h-BN exhibit an average mobility of 1.7 cm 2 V –1 s –1 and a maximal mobility of 2.9 cm 2 V –1 s –1 with on/off ratios of 10 7. The structural and morphology analysis shows that the epitaxial, two-dimensional growth of C 60 on CVD h-BN is mainly responsible for the superior charge transport behavior. In conclusion, we believe that CVD h-BN can serve as a growth template for various organic semiconductors, allowing the development of large-area, high-performance flexible electronics.« less

Ambipolar pentacene field-effect transistor with double-layer organic insulator

NASA Astrophysics Data System (ADS)

Kwak, Jeong-Hun; Baek, Heume-Il; Lee, Changhee

2006-08-01

Ambipolar conduction in organic field-effect transistor is very important feature to achieve organic CMOS circuitry. We fabricated an ambipolar pentacene field-effect transistors consisted of gold source-drain electrodes and double-layered PMMA (Polymethylmethacrylate) / PVA (Polyvinyl Alcohol) organic insulator on the ITO(Indium-tin-oxide)-patterned glass substrate. These top-contact geometry field-effect transistors were fabricated in the vacuum of 10 -6 Torr and minimally exposed to atmosphere before its measurement and characterized in the vacuum condition. Our device showed reasonable p-type characteristics of field-effect hole mobility of 0.2-0.9 cm2/Vs and the current ON/OFF ratio of about 10 6 compared to prior reports with similar configurations. For the n-type characteristics, field-effect electron mobility of 0.004-0.008 cm2/Vs and the current ON/OFF ratio of about 10 3 were measured, which is relatively high performance for the n-type conduction of pentacene field-effect transistors. We attributed these ambipolar properties mainly to the hydroxyl-free PMMA insulator interface with the pentacene active layer. In addition, an increased insulator capacitance due to double-layer insulator structure with high-k PVA layer also helped us to observe relatively good n-type characteristics.

Vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors.

PubMed

Yi, H T; Chen, Y; Czelen, K; Podzorov, V

2011-12-22

A novel vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors has been developed. The non-destructive nature of this method allows a direct comparison of field-effect mobilities achieved with various gate dielectrics using the same single-crystal sample. The method also allows gating delicate systems, such as n -type crystals and SAM-coated surfaces, without perturbation. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

An Organic Vertical Field-Effect Transistor with Underside-Doped Graphene Electrodes.

PubMed

Kim, Jong Su; Kim, Beom Joon; Choi, Young Jin; Lee, Moo Hyung; Kang, Moon Sung; Cho, Jeong Ho

2016-06-01

High-performance vertical field-effect transistors are developed, which are based on graphene electrodes doped using the underside doping method. The underside doping method enables effective tuning of the graphene work function while maintaining the surface properties of the pristine graphene. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.

PubMed

Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan

2015-09-22

This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.

Enhanced transconductance in a double-gate graphene field-effect transistor

NASA Astrophysics Data System (ADS)

Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

2018-03-01

Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

PubMed

Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan

2012-08-19

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

Stable Low-Voltage Operation Top-Gate Organic Field-Effect Transistors on Cellulose Nanocrystal Substrates

Treesearch

Cheng-Yin Wang; Canek Fuentes-Hernandez; Jen-Chieh Liu; Amir Dindar; Sangmoo Choi; Jeffrey P. Youngblood; Robert J. Moon; Bernard Kippelen

2015-01-01

We report on the performance and the characterization of top-gate organic field-effect transistors (OFETs), comprising a bilayer gate dielectric of CYTOP/ Al2O3 and a solution-processed semiconductor layer made of a blend of TIPS-pentacene:PTAA, fabricated on recyclable cellulose nanocrystal−glycerol (CNC/glycerol...

Direct observation of single-charge-detection capability of nanowire field-effect transistors.

PubMed

Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E

2010-10-01

A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.

25th Anniversary Article: Organic Field-Effect Transistors: The Path Beyond Amorphous Silicon

PubMed Central

Sirringhaus, Henning

2014-01-01

Over the past 25 years, organic field-effect transistors (OFETs) have witnessed impressive improvements in materials performance by 3–4 orders of magnitude, and many of the key materials discoveries have been published in Advanced Materials. This includes some of the most recent demonstrations of organic field-effect transistors with performance that clearly exceeds that of benchmark amorphous silicon-based devices. In this article, state-of-the-art in OFETs are reviewed in light of requirements for demanding future applications, in particular active-matrix addressing for flexible organic light-emitting diode (OLED) displays. An overview is provided over both small molecule and conjugated polymer materials for which field-effect mobilities exceeding > 1 cm2 V–1 s–1 have been reported. Current understanding is also reviewed of their charge transport physics that allows reaching such unexpectedly high mobilities in these weakly van der Waals bonded and structurally comparatively disordered materials with a view towards understanding the potential for further improvement in performance in the future. PMID:24443057

MOSFET's for Cryogenic Amplifiers

NASA Technical Reports Server (NTRS)

Dehaye, R.; Ventrice, C. A.

1987-01-01

Study seeks ways to build transistors that function effectively at liquid-helium temperatures. Report discusses physics of metaloxide/semiconductor field-effect transistors (MOSFET's) and performances of these devices at cryogenic temperatures. MOSFET's useful in highly sensitive cryogenic preamplifiers for infrared astronomy.

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

PubMed

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

DOEpatents

Lodi, Robert J.

1976-01-01

A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

Patterning technology for solution-processed organic crystal field-effect transistors

PubMed Central

Li, Yun; Sun, Huabin; Shi, Yi; Tsukagoshi, Kazuhito

2014-01-01

Organic field-effect transistors (OFETs) are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recentdevelopment in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed. PMID:27877656

High-pressure oxygen annealing of Al2O3 passivation layer for performance enhancement of graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Yun Ji; Kim, Seung Mo; Heo, Sunwoo; Lee, Hyeji; In Lee, Ho; Chang, Kyoung Eun; Lee, Byoung Hun

2018-02-01

High-pressure annealing in oxygen ambient at low temperatures (∼300 °C) was effective in improving the performance of graphene field-effect transistors. The field-effect mobility was improved by 45% and 83% for holes and electrons, respectively. The improvement in the quality of Al2O3 and the reduction in oxygen-related charge generation at the Al2O3-graphene interface, are suggested as the reasons for this improvement. This process can be useful for the commercial implementation of graphene-based electronic devices.

Hydrothermally Processed Photosensitive Field-Effect Transistor Based on ZnO Nanorod Networks

NASA Astrophysics Data System (ADS)

Kumar, Ashish; Bhargava, Kshitij; Dixit, Tejendra; Palani, I. A.; Singh, Vipul

2016-11-01

Formation of a stable, reproducible zinc oxide (ZnO) nanorod-network-based photosensitive field-effect transistor using a hydrothermal process at low temperature has been demonstrated. K2Cr2O7 additive was used to improve adhesion and facilitate growth of the ZnO nanorod network over the SiO2/Si substrate. Transistor characteristics obtained in the dark resemble those of the n-channel-mode field-effect transistor (FET). The devices showed I on/ I off ratio above 8 × 102 under dark condition, field-effect mobility of 4.49 cm2 V-1 s-1, and threshold voltage of -12 V. Further, under ultraviolet (UV) illumination, the FET exhibited sensitivity of 2.7 × 102 in off-state (-10 V) versus 1.4 in on-state (+9.7 V) of operation. FETs based on such nanorod networks showed good photoresponse, which is attributed to the large surface area of the nanorod network. The growth temperature for ZnO nanorod networks was kept at 110°C, enabling a low-temperature, cost-effective, simple approach for high-performance ZnO-based FETs for large-scale production. The role of network interfaces in the FET performance is also discussed.

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording

PubMed Central

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-01-01

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development. PMID:28350370

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording.

PubMed

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-03-28

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development.

N-Heterocyclic-Carbene-Treated Gold Surfaces in Pentacene Organic Field-Effect Transistors: Improved Stability and Contact at the Interface.

PubMed

Lv, Aifeng; Freitag, Matthias; Chepiga, Kathryn M; Schäfer, Andreas H; Glorius, Frank; Chi, Lifeng

2018-04-16

N-Heterocyclic carbenes (NHCs), which react with the surface of Au electrodes, have been successfully applied in pentacene transistors. With the application of NHCs, the charge-carrier mobility of pentacene transistors increased by five times, while the contact resistance at the pentacene-Au interface was reduced by 85 %. Even after annealing the NHC-Au electrodes at 200 °C for 2 h before pentacene deposition, the charge-carrier mobility of the pentacene transistors did not decrease. The distinguished performance makes NHCs as excellent alternatives to thiols as metal modifiers for the application in organic field-effect transistors (OFETs). © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Lead iodide perovskite light-emitting field-effect transistor

PubMed Central

Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

2015-01-01

Despite the widespread use of solution-processable hybrid organic–inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature. PMID:26108967

Proton Damage Effects on Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2014-06-19

PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Evan R. Kemp, Ctr...United States. AFIT-ENP-T-14-J-39 PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Presented to...PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS Evan R. Kemp, BS Ctr, USAF Approved: // Signed

Scattering effects on the performance of carbon nanotube field effect transistor in a compact model

NASA Astrophysics Data System (ADS)

Hamieh, S. D.; Desgreys, P.; Naviner, J. F.

2010-01-01

Carbon nanotube field-effect transistors (CNTFET) are being extensively studied as possible successors to CMOS. Device simulators have been developed to estimate their performance in sub-10-nm and device structures have been fabricated. In this work, a new compact model of single-walled semiconducting CNTFET is proposed implementing the calculation of energy conduction sub-band minima and the treatment of scattering effects through energy shift in CNTFET. The developed model has been used to simulate I-V characteristics using VHDL-AMS simulator.

Localized heating on silicon field effect transistors: device fabrication and temperature measurements in fluid.

PubMed

Elibol, Oguz H; Reddy, Bobby; Nair, Pradeep R; Dorvel, Brian; Butler, Felice; Ahsan, Zahab S; Bergstrom, Donald E; Alam, Muhammad A; Bashir, Rashid

2009-10-07

We demonstrate electrically addressable localized heating in fluid at the dielectric surface of silicon-on-insulator field-effect transistors via radio-frequency Joule heating of mobile ions in the Debye layer. Measurement of fluid temperatures in close vicinity to surfaces poses a challenge due to the localized nature of the temperature profile. To address this, we developed a localized thermometry technique based on the fluorescence decay rate of covalently attached fluorophores to extract the temperature within 2 nm of any oxide surface. We demonstrate precise spatial control of voltage dependent temperature profiles on the transistor surfaces. Our results introduce a new dimension to present sensing systems by enabling dual purpose silicon transistor-heaters that serve both as field effect sensors as well as temperature controllers that could perform localized bio-chemical reactions in Lab on Chip applications.

Multifunctional Self-Assembled Monolayers for Organic Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Cernetic, Nathan

Organic field effect transistors (OFETs) have the potential to reach commercialization for a wide variety of applications such as active matrix display circuitry, chemical and biological sensing, radio-frequency identification devices and flexible electronics. In order to be commercially competitive with already at-market amorphous silicon devices, OFETs need to approach similar performance levels. Significant progress has been made in developing high performance organic semiconductors and dielectric materials. Additionally, a common route to improve the performance metric of OFETs is via interface modification at the critical dielectric/semiconductor and electrode/semiconductor interface which often play a significant role in charge transport properties. These metal oxide interfaces are typically modified with rationally designed multifunctional self-assembled monolayers. As means toward improving the performance metrics of OFETs, rationally designed multifunctional self-assembled monolayers are used to explore the relationship between surface energy, SAM order, and SAM dipole on OFET performance. The studies presented within are (1) development of a multifunctional SAM capable of simultaneously modifying dielectric and metal surface while maintaining compatibility with solution processed techniques (2) exploration of the relationship between SAM dipole and anchor group on graphene transistors, and (3) development of self-assembled monolayer field-effect transistor in which the traditional thick organic semiconductor is replaced by a rationally designed self-assembled monolayer semiconductor. The findings presented within represent advancement in the understanding of the influence of self-assembled monolayers on OFETs as well as progress towards rationally designed monolayer transistors.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET

PubMed Central

2012-01-01

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. PMID:22901374

Ordered polymer nanofibers enhance output brightness in bilayer light-emitting field-effect transistors.

PubMed

Hsu, Ben B Y; Seifter, Jason; Takacs, Christopher J; Zhong, Chengmei; Tseng, Hsin-Rong; Samuel, Ifor D W; Namdas, Ebinazar B; Bazan, Guillermo C; Huang, Fei; Cao, Yong; Heeger, Alan J

2013-03-26

Polymer light emitting field effect transistors are a class of light emitting devices that reveal interesting device physics. Device performance can be directly correlated to the most fundamental polymer science. Control over surface properties of the transistor dielectric can dramatically change the polymer morphology, introducing ordered phase. Electronic properties such as carrier mobility and injection efficiency on the interface can be promoted by ordered nanofibers in the polymer. Moreover, by controlling space charge in the polymer interface, the recombination zone can be spatially extended and thereby enhance the optical output.

Conjugated polymers and their use in optoelectronic devices

DOEpatents

Marks, Tobin J.; Guo, Xugang; Zhou, Nanjia; Chang, Robert P. H.; Drees, Martin; Facchetti, Antonio

2016-10-18

The present invention relates to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The present compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The present compounds can have good solubility in common solvents enabling device fabrication via solution processes.

25th anniversary article: organic field-effect transistors: the path beyond amorphous silicon.

PubMed

Sirringhaus, Henning

2014-03-05

Over the past 25 years, organic field-effect transistors (OFETs) have witnessed impressive improvements in materials performance by 3-4 orders of magnitude, and many of the key materials discoveries have been published in Advanced Materials. This includes some of the most recent demonstrations of organic field-effect transistors with performance that clearly exceeds that of benchmark amorphous silicon-based devices. In this article, state-of-the-art in OFETs are reviewed in light of requirements for demanding future applications, in particular active-matrix addressing for flexible organic light-emitting diode (OLED) displays. An overview is provided over both small molecule and conjugated polymer materials for which field-effect mobilities exceeding > 1 cm(2) V(-1) s(-1) have been reported. Current understanding is also reviewed of their charge transport physics that allows reaching such unexpectedly high mobilities in these weakly van der Waals bonded and structurally comparatively disordered materials with a view towards understanding the potential for further improvement in performance in the future. © 2014 The Authors. Published by WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Performance limits of tunnel transistors based on mono-layer transition-metal dichalcogenides

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Xiang-Wei, E-mail: xwjiang@semi.ac.cn; Li, Shu-Shen; Synergetic Innovation Center of Quantum Information and Quantum Physics, University of Science and Technology of China, Hefei, Anhui 230026

2014-05-12

Performance limits of tunnel field-effect transistors based on mono-layer transition metal dichalcogenides are investigated through numerical quantum mechanical simulations. The atomic mono-layer nature of the devices results in a much smaller natural length λ, leading to much larger electric field inside the tunneling diodes. As a result, the inter-band tunneling currents are found to be very high as long as ultra-thin high-k gate dielectric is possible. The highest on-state driving current is found to be close to 600 μA/μm at V{sub g} = V{sub d} = 0.5 V when 2 nm thin HfO{sub 2} layer is used for gate dielectric, outperforming most of the conventional semiconductor tunnelmore » transistors. In the five simulated transition-metal dichalcogenides, mono-layer WSe{sub 2} based tunnel field-effect transistor shows the best potential. Deep analysis reveals that there is plenty room to further enhance the device performance by either geometry, alloy, or strain engineering on these mono-layer materials.« less

Organic Field Effect Transistor Using Amorphous Fluoropolymer as Gate Insulating Film

NASA Astrophysics Data System (ADS)

Kitajima, Yosuke; Kojima, Kenzo; Mizutani, Teruyoshi; Ochiai, Shizuyasu

Organic field effect transistors are fabricated by the active layer of Regioregular poly (3-hexylthiophene-2,5-diy)(P3HT) thin film. CYTOP thin film made from Amorphous Fluoropolymer and fabricated by spin-coating is adopted to a gate dielectric layer on Polyethylenenaphthalate (PEN) thin film that is the substrate of an organic field effect transistor. The surface morphology and molecular orientation of P3HT thin films is observed by atomic force microscope (AFM) and X-Ray diffractometer (XRD). Grains are observed on the CYTOP thin film via an AFM image and the P3HT molecule is oriented perpendicularly on the CYTOP thin film. Based on the performance of the organic field effect transistor, the carrier mobility is 0.092 cm2/Vs, the ON/OFF ratio is 7, and the threshold voltage is -12 V. The ON/OFF ratio is relatively low and to improve On/Off ratio, the CYTOP/Polyimide double gate insulating layer is adopted to OFET.

Current crowding mediated large contact noise in graphene field-effect transistors

PubMed Central

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-01-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene–metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V−1 s−1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal–channel interface, which could be generic to two-dimensional material-based electronic devices. PMID:27929087

Progress of new label-free techniques for biosensors: a review.

PubMed

Sang, Shengbo; Wang, Yajun; Feng, Qiliang; Wei, Ye; Ji, Jianlong; Zhang, Wendong

2016-01-01

The detection techniques used in biosensors can be broadly classified into label-based and label-free. Label-based detection relies on the specific properties of labels for detecting a particular target. In contrast, label-free detection is suitable for the target molecules that are not labeled or the screening of analytes which are not easy to tag. Also, more types of label-free biosensors have emerged with developments in biotechnology. The latest developed techniques in label-free biosensors, such as field-effect transistors-based biosensors including carbon nanotube field-effect transistor biosensors, graphene field-effect transistor biosensors and silicon nanowire field-effect transistor biosensors, magnetoelastic biosensors, optical-based biosensors, surface stress-based biosensors and other type of biosensors based on the nanotechnology are discussed. The sensing principles, configurations, sensing performance, applications, advantages and restriction of different label-free based biosensors are considered and discussed in this review. Most concepts included in this survey could certainly be applied to the development of this kind of biosensor in the future.

Current crowding mediated large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-12-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V-1 s-1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.

Ferroelectric-Driven Performance Enhancement of Graphene Field-Effect Transistors Based on Vertical Tunneling Heterostructures.

PubMed

Yuan, Shuoguo; Yang, Zhibin; Xie, Chao; Yan, Feng; Dai, Jiyan; Lau, Shu Ping; Chan, Helen L W; Hao, Jianhua

2016-12-01

A vertical graphene heterostructure field-effect transistor (VGHFET) using an ultrathin ferroelectric film as a tunnel barrier is developed. The heterostructure is capable of providing new degrees of tunability and functionality via coupling between the ferroelectricity and the tunnel current of the VGHFET, which results in a high-performance device. The results pave the way for developing novel atomic-scale 2D heterostructures and devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

PubMed

Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

2012-08-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure

PubMed Central

2012-01-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials. PMID:22853458

Localized Heating on Silicon Field Effect Transistors: Device Fabrication and Temperature Measurements in Fluid

PubMed Central

Elibol, Oguz H.; Reddy, Bobby; Nair, Pradeep R.; Dorvel, Brian; Butler, Felice; Ahsan, Zahab; Bergstrom, Donald E.; Alam, Muhammad A.; Bashir, Rashid

2010-01-01

We demonstrate electrically addressable localized heating in fluid at the dielectric surface of silicon-on-insulator field-effect transistors via radio-frequency Joule heating of mobile ions in the Debye layer. Measurement of fluid temperatures in close vicinity to surfaces poses a challenge due to the localized nature of the temperature profile. To address this, we developed a localized thermometry technique based on the fluorescence decay rate of covalently attached fluorophores to extract the temperature within 2 nm of any oxide surface. We demonstrate precise spatial control of voltage dependent temperature profiles on the transistor surfaces. Our results introduce a new dimension to present sensing systems by enabling dual purpose silicon transistor-heaters that serve both as field effect sensors as well as temperature controllers that could perform localized bio-chemical reactions in Lab on Chip applications. PMID:19967115

EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor

NASA Astrophysics Data System (ADS)

Demming, Anna

2012-09-01

Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor behaviour in devices fabricated from chemically reduced graphene oxide. The work provided an important step forward for graphene electronics, which has been hampered by difficulties in scaling up the mechanical exfoliation techniques required to produce the high-quality graphene often needed for functioning devices [8]. In Sweden, researchers have developed a transistor design that they fabricate using standard III-V parallel processing, which also has great promise for scaling up production. Their transistor is based on a vertical array of InAs nanowires, which provide high electron mobility and the possibility of high-speed and low-power operation [9]. Different fabrication techniques and design parameters can influence the properties of transistors. Researchers in Belgium used a new method based on high-vacuum scanning spreading resistance microscopy to study the effect of diameter on carrier profile in nanowire transistors [10]. They then used experimental data and simulations to gain a better understanding of how this influenced the transistor performance. In Japan, Y Ohno and colleagues at Nagoya University have reported how atomic layer deposition of an insulating layer of HfO2 on carbon nanotube field effect transistors can change the carrier from p-type to n-type [11]. Carrier type switching—'ambipolar behaviour'—and hysteresis of carbon nanotube network transistors can make achieving reliable device performance challenging. However studies have also suggested that the hysteretic properties may be exploited in non-volatile memory applications. A collaboration of researchers in Italy and the US demonstrated transistor and memory cell behaviour in a system based on a carbon nanotube network [13]. Their device had relatively fast programming, good endurance and the charge retention was successfully enhanced by limiting exposure to air. Progress in understanding transistor behaviour has inspired other innovations in device applications. Nanowires are notoriously sensitive to gases such as CO, opening opportunities for applications in sensing using one-dimensional nanostructure transistors [12]. The pyroelectric transistor reported in this issue represents an intriguing development for device applications of this versatile and ubiquitous electronics component [3]. As the researchers point out, 'By combining the photocurrent feature and optothermal gating effect, the wide range of response to light covering ultraviolet and infrared radiation can lead to new nanoscale optoelectronic devices that are suitable for remote or wireless applications.' In nanotechnology research and development, often the race is on to achieve reliable device behaviour in the smallest possible systems. But sometimes it is the innovations in the approach used that revolutionize technology in industry. The pyroelectric transistor reported in this issue is a neat example of the ingenious innovations in this field of research. While in research the race is never really over, as this work demonstrates the journey itself remains an inspiration. References [1] Bardeen J and Brattain W H 1948 The transistor, a semi-conductor triode Phys. Rev 74 230-1 [2] Shockley W B, Bardeen J and Brattain W H 1956 The nobel prize in physics www.nobelprize.org/nobel_prizes/physics/laureates/1956/# [3] Hsieh C-Y, Lu M-L, Chen J-Y, Chen Y-T, Chen Y-F, Shih W Y and Shih W-H 2012 Single ZnO nanowire-PZT optothermal field effect transistors Nanotechnology 23 355201 [4] Tans S J, Verschueren A R M and Dekker C 1998 Room-temperature transistor based on a single carbon nanotube Nature 393 49-52 [5] Cui Y, Zhong Z, Wang D, Wang W U and Lieber C M 2003 High performance silicon nanowire field effect transistors Nano Lett. 3 149-52 [6]Stafford C A, Cardamone D M and Mazumdar S 2007 The quantum interference effect transistor Nanotechnology 18 424014 [7] Garnier F, Hajlaoui R, Yassar A and Srivastava P 1994 All-polymer field-effect transistor realized by printing techniques Science 265 1684-6 [8] Joung D, Chunder A, Zhai L and Khondaker S I 2010 High yield fabrication of chemically reduced graphene oxide field effect transistors by dielectrophoresis Nanotechnology 21 165202 [9] Bryllert T, Wernersson L-E, L¨owgren T and Samuelson L 2006 Vertical wrap-gated nanowire transistors Nanotechnology 17 S227-30 [10] Schulze A et al 2011 Observation of diameter dependent carrier distribution in nanowire-based transistors Nanotechnology 22 185701 [11] Moriyama N, Ohno Y, Kitamura T, Kishimoto S and Mizutani T 2010 Change in carrier type in high-k gate carbon nanotube field-effect transistors by interface fixed charges Nanotechnology 21 165201 [12] Bartolomeo A D, Rinzan M, Boyd A K, Yang Y, Guadagno L, Giubileo F and Barbara P 2010 Electrical properties and memory effects of field-effect transistors from networks of single-and double-walled carbon nanotubes Nanotechnology 21 115204 [13] Liao L et al 2009 Multifunctional CuO nanowire devices: P-type field effect transistors and CO gas sensors Nanotechnology 20 085203

Synthesis of bilayer MoS2 and corresponding field effect characteristics

NASA Astrophysics Data System (ADS)

Fang, Mingxu; Feng, Yulin; Wang, Fang; Yang, Zhengchun; Zhang, Kailiang

2017-06-01

Two-dimensional transition-metal dichalcogenides such as MoS2 are promising materials for next-generation nano-electronic devices. The physical properties of MoS2 are determined by layer number according to the variation of band-gap. Here, we synthesize large-size bilayer-MoS2 with triangle and hexagonal nanosheets in one step by chemical vapor deposition, Monolayer and bilayer-MoS2 back-gate field effect transistors are also fabricated and the performance including mobility and on/off ratios are compared. The bilayer-MoS2 back-gate field effect transistor shows superior performance with field effect mobility of ∼21.27cm2V-1s-1, and Ion/Ioff ratio of ∼3.9×107.

Effect of grain boundary on the field-effect mobility of microrod single crystal organic transistors.

PubMed

Kim, Jaekyun; Kang, Jingu; Cho, Sangho; Yoo, Byungwook; Kim, Yong-Hoon; Park, Sung Kyu

2014-11-01

High-performance microrod single crystal organic transistors based on a p-type 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) semiconductor are fabricated and the effects of grain boundaries on the carrier transport have been investigated. The spin-coating of C8-BTBT and subsequent solvent vapor annealing process enabled the formation of organic single crystals with high aspect ratio in the range of 10 - 20. It was found that the organic field-effect transistors (OFETs) based on these single crystals yield a field-effect mobility and an on/off current ratio of 8.04 cm2/Vs and > 10(5), respectively. However, single crystal OFETs with a kink, in which two single crystals are fused together, exhibited a noticeable drop of field-effect mobility, and we claim that this phenomenon results from the carrier scattering at the grain boundary.

Fabrication of metal nanopatterns for organic field effect transistor electrodes by cracking and transfer printing

NASA Astrophysics Data System (ADS)

Wang, Xiaonan; Fu, Tingting; Wang, Zhe

2018-04-01

In this paper, we demonstrate a novel method for fabricating metal nanopatterns using cracking to address the limitations of traditional techniques. Parallel crack arrays were created in a polydimethylsiloxane (PDMS) mold using a combination of surface modification and control of strain fields. The elastic PDMS containing the crack arrays was subsequently used as a stamp to prepare nanoscale metal patterns on a substrate by transfer printing. To illustrate the functionality of this technique, we employed the metal patterns as the source and drain contacts of an organic field effect transistor. Using this approach, we fabricated transistors with channel lengths ranging from 70-600 nm. The performance of these devices when the channel length was reduced was studied. The drive current density increases as expected, indicating the creation of operational transistors with recognizable properties.

Fused thiophene-based conjugated polymers and their use in optoelectronic devices

DOEpatents

Facchetti, Antonio; Marks, Tobin J; Takai, Atsuro; Seger, Mark; Chen, Zhihua

2015-11-03

The present teachings relate to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The disclosed compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The disclosed compounds can have good solubility in common solvents enabling device fabrication via solution processes.

An innovative large scale integration of silicon nanowire-based field effect transistors

NASA Astrophysics Data System (ADS)

Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

2018-05-01

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

A Single Polyaniline Nanofiber Field Effect Transistor and Its Gas Sensing Mechanisms

PubMed Central

Chen, Dajing; Lei, Sheng; Chen, Yuquan

2011-01-01

A single polyaniline nanofiber field effect transistor (FET) gas sensor fabricated by means of electrospinning was investigated to understand its sensing mechanisms and optimize its performance. We studied the morphology, field effect characteristics and gas sensitivity of conductive nanofibers. The fibers showed Schottky and Ohmic contacts based on different electrode materials. Higher applied gate voltage contributes to an increase in gas sensitivity. The nanofiber transistor showed a 7% reversible resistance change to 1 ppm NH3 with 10 V gate voltage. The FET characteristics of the sensor when exposed to different gas concentrations indicate that adsorption of NH3 molecules reduces the carrier mobility in the polyaniline nanofiber. As such, nanofiber-based sensors could be promising for environmental and industrial applications. PMID:22163969

Low electron mobility of field-effect transistor determined by modulated magnetoresistance

NASA Astrophysics Data System (ADS)

Tauk, R.; Łusakowski, J.; Knap, W.; Tiberj, A.; Bougrioua, Z.; Azize, M.; Lorenzini, P.; Sakowicz, M.; Karpierz, K.; Fenouillet-Beranger, C.; Cassé, M.; Gallon, C.; Boeuf, F.; Skotnicki, T.

2007-11-01

Room temperature magnetotransport experiments were carried out on field-effect transistors in magnetic fields up to 10 T. It is shown that measurements of the transistor magnetoresistance and its first derivative with respect to the gate voltage allow the derivation of the electron mobility in the gated part of the transistor channel, while the access/contact resistances and the transistor gate length need not be known. We demonstrate the potential of this method using GaN and Si field-effect transistors and discuss its importance for mobility measurements in transistors with nanometer gate length.

Modulation-doped β-(Al0.2Ga0.8)2O3/Ga2O3 field-effect transistor

NASA Astrophysics Data System (ADS)

Krishnamoorthy, Sriram; Xia, Zhanbo; Joishi, Chandan; Zhang, Yuewei; McGlone, Joe; Johnson, Jared; Brenner, Mark; Arehart, Aaron R.; Hwang, Jinwoo; Lodha, Saurabh; Rajan, Siddharth

2017-07-01

Modulation-doped heterostructures are a key enabler for realizing high mobility and better scaling properties for high performance transistors. We report the realization of a modulation-doped two-dimensional electron gas (2DEG) at the β-(Al0.2Ga0.8)2O3/Ga2O3 heterojunction by silicon delta doping. The formation of a 2DEG was confirmed using capacitance voltage measurements. A modulation-doped 2DEG channel was used to realize a modulation-doped field-effect transistor. The demonstration of modulation doping in the β-(Al0.2Ga0.8)2O3/Ga2O3 material system could enable heterojunction devices for high performance electronics.

Ultrathin strain-gated field effect transistor based on In-doped ZnO nanobelts

NASA Astrophysics Data System (ADS)

Zhang, Zheng; Du, Junli; Li, Bing; Zhang, Shuhao; Hong, Mengyu; Zhang, Xiaomei; Liao, Qingliang; Zhang, Yue

2017-08-01

In this work, we fabricated a strain-gated piezoelectric transistor based on single In-doped ZnO nanobelt with ±(0001) top/bottom polar surfaces. In the vertical structured transistor, the Pt tip of the AFM and Au film are used as source and drain electrode. The electrical transport performance of the transistor is gated by compressive strains. The working mechanism is attributed to the Schottky barrier height changed under the coupling effect of piezoresistive and piezoelectric. Uniquely, the transistor turns off under the compressive stress of 806 nN. The strain-gated transistor is likely to have important applications in high resolution mapping device and MEMS devices.

Surface engineering of ferroelectric polymer for the enhanced electrical performance of organic transistor memory

NASA Astrophysics Data System (ADS)

Kim, Do-Kyung; Lee, Gyu-Jeong; Lee, Jae-Hyun; Kim, Min-Hoi; Bae, Jin-Hyuk

2018-05-01

We suggest a viable surface control method to improve the electrical properties of organic nonvolatile memory transistors. For viable surface control, the surface of the ferroelectric insulator in the memory field-effect transistors was modified using a smooth-contact-curing process. For the modification of the ferroelectric polymer, during the curing of the ferroelectric insulators, the smooth surface of a soft elastomer contacts intimately with the ferroelectric surface. This smooth-contact-curing process reduced the surface roughness of the ferroelectric insulator without degrading its ferroelectric properties. The reduced roughness of the ferroelectric insulator increases the mobility of the organic field-effect transistor by approximately eight times, which results in a high memory on–off ratio and a low-voltage reading operation.

Numerical analysis of band tails in nanowires and their effects on the performance of tunneling field-effect transistors

NASA Astrophysics Data System (ADS)

Tanaka, Takahisa; Uchida, Ken

2018-06-01

Band tails in heavily doped semiconductors are one of the important parameters that determine transfer characteristics of tunneling field-effect transistors. In this study, doping concentration and doing profile dependences of band tails in heavily doped Si nanowires were analyzed by a nonequilibrium Green function method. From the calculated band tails, transfer characteristics of nanowire tunnel field-effect transistors were numerically analyzed by Wentzel–Kramer–Brillouin approximation with exponential barriers. The calculated transfer characteristics demonstrate that the band tails induced by dopants degrade the subthreshold slopes of Si nanowires from 5 to 56 mV/dec in the worst case. On the other hand, surface doping leads to a high drain current while maintaining a small subthreshold slope.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

PubMed

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-15

Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2

NASA Astrophysics Data System (ADS)

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-01

Top-gated and bottom-gated transistors with multilayer MoS2 channel fully encapsulated by stacked Al2O3/HfO2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on–off current ratio of 108, high field-effect mobility of 102 cm2 V‑1 s‑1, and low subthreshold swing of 93 mV dec–1. Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10‑3–10‑2 V MV–1 cm–1 after 6 MV cm‑1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS2 channel fully encapsulated by stacked Al2O3/HfO2 is a promising way to fabricate high-performance ML MoS2 field-effect transistors for practical electron device applications.

Field-effect transistors (2nd revised and enlarged edition)

NASA Astrophysics Data System (ADS)

Bocharov, L. N.

The design, principle of operation, and principal technical characteristics of field-effect transistors produced in the USSR are described. Problems related to the use of field-effect transistors in various radioelectronic devices are examined, and tables of parameters and mean statistical characteristics are presented for the main types of field-effect transistors. Methods for calculating various circuit components are discussed and illustrated by numerical examples.

High performance n-channel thin-film transistors with an amorphous phase C60 film on plastic substrate

NASA Astrophysics Data System (ADS)

Na, Jong H.; Kitamura, M.; Arakawa, Y.

2007-11-01

We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.

Toward low-power electronics: tunneling phenomena in transition metal dichalcogenides.

PubMed

Das, Saptarshi; Prakash, Abhijith; Salazar, Ramon; Appenzeller, Joerg

2014-02-25

In this article, we explore, experimentally, the impact of band-to-band tunneling on the electronic transport of double-gated WSe2 field-effect transistors (FETs) and Schottky barrier tunneling of holes in back-gated MoS2 FETs. We show that by scaling the flake thickness and the thickness of the gate oxide, the tunneling current can be increased by several orders of magnitude. We also perform numerical calculations based on Landauer formalism and WKB approximation to explain our experimental findings. Based on our simple model, we discuss the impact of band gap and effective mass on the band-to-band tunneling current and evaluate the performance limits for a set of dichalcogenides in the context of tunneling transistors for low-power applications. Our findings suggest that WTe2 is an excellent choice for tunneling field-effect transistors.

Fabrication of High-Performance Polymer Bulk-Heterojunction Solar Cells by the Interfacial Modifications III

DTIC Science & Technology

2011-04-30

University of Tennessee) 3. "An ambipolar to n-type transformation in pentacene -based organic field-effect transistors" Org. Electron. 12, 509 (2011...OFETs). An ambipolar to n-type transformation in pentacene -based organic field-effect transistors (OFETs) of Al source-drain electrodes had been...correlated with the interfacial interactions between Al electrodes and pentacene , as characterized by analyzing Near-edge X-ray absorption fine structure

Evaluation of semiconductor devices for Electric and Hybrid Vehicle (EHV) ac-drive applications, volume 2

NASA Technical Reports Server (NTRS)

Lee, F. C.; Chen, D. Y.; Jovanic, M.; Hopkins, D. C.

1985-01-01

Test data of switching times characterization of bipolar transistors, of field effect transistor's switching times on-resistance and characterization, comparative data of field effect transistors, and test data of field effect transistor's parallel operation characterization are given. Data is given in the form of graphs.

Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors

PubMed

Kagan; Mitzi; Dimitrakopoulos

1999-10-29

Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.

An All-Solid-State pH Sensor Employing Fluorine-Terminated Polycrystalline Boron-Doped Diamond as a pH-Insensitive Solution-Gate Field-Effect Transistor.

PubMed

Shintani, Yukihiro; Kobayashi, Mikinori; Kawarada, Hiroshi

2017-05-05

A fluorine-terminated polycrystalline boron-doped diamond surface is successfully employed as a pH-insensitive SGFET (solution-gate field-effect transistor) for an all-solid-state pH sensor. The fluorinated polycrystalline boron-doped diamond (BDD) channel possesses a pH-insensitivity of less than 3mV/pH compared with a pH-sensitive oxygenated channel. With differential FET (field-effect transistor) sensing, a sensitivity of 27 mv/pH was obtained in the pH range of 2-10; therefore, it demonstrated excellent performance for an all-solid-state pH sensor with a pH-sensitive oxygen-terminated polycrystalline BDD SGFET and a platinum quasi-reference electrode, respectively.

Mathematical Models of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric- semiconductor field effect transistors (MOSFETs) are developed in this paper. The models are compared against data collected with MOSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth as well as differences and advantages as compared to the performance of each circuit using a MOSFET.

Phase-locked loop based on nanoelectromechanical resonant-body field effect transistor

NASA Astrophysics Data System (ADS)

Bartsch, S. T.; Rusu, A.; Ionescu, A. M.

2012-10-01

We demonstrate the room-temperature operation of a silicon nanoelectromechanical resonant-body field effect transistor (RB-FET) embedded into phase-locked loop (PLL). The very-high frequency resonator uses on-chip electrostatic actuation and transistor-based displacement detection. The heterodyne frequency down-conversion based on resistive FET mixing provides a loop feedback signal with high signal-to-noise ratio. We identify key parameters for PLL operation, and analyze the performance of the RB-FET at the system level. Used as resonant mass detector, the experimental frequency stability in the ppm-range translates into sub atto-gram (10-18 g) sensitivity in high vacuum. The feedback and control system are generic and may be extended to other mechanical resonators with transistor properties, such as graphene membranes and carbon nanotubes.

Integrated digital inverters based on two-dimensional anisotropic ReS₂ field-effect transistors

DOE PAGES

Liu, Erfu; Fu, Yajun; Wang, Yaojia; ...

2015-05-07

Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS₂) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS₂ field-effect transistors, which exhibit competitive performance with large current on/off ratios (~10⁷) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconductingmore » materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS₂ anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications.« less

High-performance a-IGZO thin-film transistor with conductive indium-tin-oxide buried layer

NASA Astrophysics Data System (ADS)

Ahn, Min-Ju; Cho, Won-Ju

2017-10-01

In this study, we fabricated top-contact top-gate (TCTG) structure of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a thin buried conductive indium-tin oxide (ITO) layer. The electrical performance of a-IGZO TFTs was improved by inserting an ITO buried layer under the IGZO channel. Also, the effect of the buried layer's length on the electrical characteristics of a-IGZO TFTs was investigated. The electrical performance of the transistors improved with increasing the buried layer's length: a large on/off current ratio of 1.1×107, a high field-effect mobility of 35.6 cm2/Vs, a small subthreshold slope of 116.1 mV/dec, and a low interface trap density of 4.2×1011 cm-2eV-1 were obtained. The buried layer a-IGZO TFTs exhibited enhanced transistor performance and excellent stability against the gate bias stress.

Construction and evaluation of photovoltaic power generation and power storage system using SiC field-effect transistor inverter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Oku, Takeo, E-mail: oku@mat.usp.ac.jp; Matsumoto, Taisuke; Ohishi, Yuya

A power storage system using spherical silicon (Si) solar cells, maximum power point tracking charge controller, lithium-ion battery and a direct current-alternating current (DC-AC) inverter was constructed. Performance evaluation of the DC-AC inverter was carried out, and the DC-AC conversion efficiencies of the SiC field-effect transistor (FET) inverter was improved compared with those of the ordinary Si-FET based inverter.

Fabrication and electrical properties of MoS2 nanodisc-based back-gated field effect transistors.

PubMed

Gu, Weixia; Shen, Jiaoyan; Ma, Xiying

2014-02-28

Two-dimensional (2D) molybdenum disulfide (MoS2) is an attractive alternative semiconductor material for next-generation low-power nanoelectronic applications, due to its special structure and large bandgap. Here, we report the fabrication of large-area MoS2 nanodiscs and their incorporation into back-gated field effect transistors (FETs) whose electrical properties we characterize. The MoS2 nanodiscs, fabricated via chemical vapor deposition (CVD), are homogeneous and continuous, and their thickness of around 5 nm is equal to a few layers of MoS2. In addition, we find that the MoS2 nanodisc-based back-gated field effect transistors with nickel electrodes achieve very high performance. The transistors exhibit an on/off current ratio of up to 1.9 × 105, and a maximum transconductance of up to 27 μS (5.4 μS/μm). Moreover, their mobility is as high as 368 cm2/Vs. Furthermore, the transistors have good output characteristics and can be easily modulated by the back gate. The electrical properties of the MoS2 nanodisc transistors are better than or comparable to those values extracted from single and multilayer MoS2 FETs.

Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

PubMed

Choi, Woo Young; Lee, Hyun Kook

2016-01-01

The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

NASA Astrophysics Data System (ADS)

Sangwan, Vinod K.; Jariwala, Deep; Everaerts, Ken; McMorrow, Julian J.; He, Jianting; Grayson, Matthew; Lauhon, Lincoln J.; Marks, Tobin J.; Hersam, Mark C.

2014-02-01

Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

Artificial semiconductor/insulator superlattice channel structure for high-performance oxide thin-film transistors

PubMed Central

Ahn, Cheol Hyoun; Senthil, Karuppanan; Cho, Hyung Koun; Lee, Sang Yeol

2013-01-01

High-performance thin-film transistors (TFTs) are the fundamental building blocks in realizing the potential applications of the next-generation displays. Atomically controlled superlattice structures are expected to induce advanced electric and optical performance due to two-dimensional electron gas system, resulting in high-electron mobility transistors. Here, we have utilized a semiconductor/insulator superlattice channel structure comprising of ZnO/Al2O3 layers to realize high-performance TFTs. The TFT with ZnO (5 nm)/Al2O3 (3.6 nm) superlattice channel structure exhibited high field effect mobility of 27.8 cm2/Vs, and threshold voltage shift of only < 0.5 V under positive/negative gate bias stress test during 2 hours. These properties showed extremely improved TFT performance, compared to ZnO TFTs. The enhanced field effect mobility and stability obtained for the superlattice TFT devices were explained on the basis of layer-by-layer growth mode, improved crystalline nature of the channel layers, and passivation effect of Al2O3 layers. PMID:24061388

3D modeling of dual-gate FinFET.

PubMed

Mil'shtein, Samson; Devarakonda, Lalitha; Zanchi, Brian; Palma, John

2012-11-13

The tendency to have better control of the flow of electrons in a channel of field-effect transistors (FETs) did lead to the design of two gates in junction field-effect transistors, field plates in a variety of metal semiconductor field-effect transistors and high electron mobility transistors, and finally a gate wrapping around three sides of a narrow fin-shaped channel in a FinFET. With the enhanced control, performance trends of all FETs are still challenged by carrier mobility dependence on the strengths of the electrical field along the channel. However, in cases when the ratio of FinFET volume to its surface dramatically decreases, one should carefully consider the surface boundary conditions of the device. Moreover, the inherent non-planar nature of a FinFET demands 3D modeling for accurate analysis of the device performance. Using the Silvaco modeling tool with quantization effects, we modeled a physical FinFET described in the work of Hisamoto et al. (IEEE Tran. Elec. Devices 47:12, 2000) in 3D. We compared it with a 2D model of the same device. We demonstrated that 3D modeling produces more accurate results. As 3D modeling results came close to experimental measurements, we made the next step of the study by designing a dual-gate FinFET biased at Vg1 >Vg2. It is shown that the dual-gate FinFET carries higher transconductance than the single-gate device.

3D modeling of dual-gate FinFET

NASA Astrophysics Data System (ADS)

Mil'shtein, Samson; Devarakonda, Lalitha; Zanchi, Brian; Palma, John

2012-11-01

The tendency to have better control of the flow of electrons in a channel of field-effect transistors (FETs) did lead to the design of two gates in junction field-effect transistors, field plates in a variety of metal semiconductor field-effect transistors and high electron mobility transistors, and finally a gate wrapping around three sides of a narrow fin-shaped channel in a FinFET. With the enhanced control, performance trends of all FETs are still challenged by carrier mobility dependence on the strengths of the electrical field along the channel. However, in cases when the ratio of FinFET volume to its surface dramatically decreases, one should carefully consider the surface boundary conditions of the device. Moreover, the inherent non-planar nature of a FinFET demands 3D modeling for accurate analysis of the device performance. Using the Silvaco modeling tool with quantization effects, we modeled a physical FinFET described in the work of Hisamoto et al. (IEEE Tran. Elec. Devices 47:12, 2000) in 3D. We compared it with a 2D model of the same device. We demonstrated that 3D modeling produces more accurate results. As 3D modeling results came close to experimental measurements, we made the next step of the study by designing a dual-gate FinFET biased at V g1 > V g2. It is shown that the dual-gate FinFET carries higher transconductance than the single-gate device.

Polymer-based doping control for performance enhancement of wet-processed short-channel CNTFETs

NASA Astrophysics Data System (ADS)

Hartmann, Martin; Schubel, René; Claus, Martin; Jordan, Rainer; Schulz, Stefan E.; Hermann, Sascha

2018-01-01

The electrical transport properties of short-channel transistors based on single-walled carbon nanotubes (CNT) are significantly affected by bundling along with solution processing. We report that especially high off currents of CNT transistors are not only related to the incorporation of metallic CNTs but also to the incorporation of CNT bundles. By applying device passivation with poly(4-vinylpyridine), the impact of CNT bundling on the device performance can be strongly reduced due to increased gate efficiency as well as reduced oxygen and water-induced p-type doping, boosting essential field-effect transistor performance parameters by several orders of magnitude. Moreover, this passivation approach allows the hysteresis and threshold voltage of CNT transistors to be tuned.

Negative differential transconductance in silicon quantum well metal-oxide-semiconductor field effect/bipolar hybrid transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Naquin, Clint; Lee, Mark; Edwards, Hal

2014-11-24

Introducing explicit quantum transport into Si transistors in a manner amenable to industrial fabrication has proven challenging. Hybrid field-effect/bipolar Si transistors fabricated on an industrial 45 nm process line are shown to demonstrate explicit quantum transport signatures. These transistors incorporate a lateral ion implantation-defined quantum well (QW) whose potential depth is controlled by a gate voltage (V{sub G}). Quantum transport in the form of negative differential transconductance (NDTC) is observed to temperatures >200 K. The NDTC is tied to a non-monotonic dependence of bipolar current gain on V{sub G} that reduces drain-source current through the QW. These devices establish the feasibility ofmore » exploiting quantum transport to transform the performance horizons of Si devices fabricated in an industrially scalable manner.« less

Electron density window for best frequency performance, lowest phase noise and slowest degradation of GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Matulionis, Arvydas

2013-07-01

The problems in the realm of nitride heterostructure field-effect transistors (HFETs) are discussed in terms of a novel fluctuation-dissipation-based approach impelled by a recent demonstration of strong correlation of hot-electron fluctuations with frequency performance and degradation of the devices. The correlation has its genesis in the dissipation of the LO-mode heat accumulated by the non-equilibrium longitudinal optical phonons (hot phonons) confined in the channel that hosts the high-density hot-electron gas subjected to a high electric field. The LO-mode heat causes additional scattering of hot electrons and facilitates defect formation in a different manner than the conventional heat contained mainly in the acoustic phonon mode. We treat the heat dissipation problem in terms of the hot-phonon lifetime responsible for the conversion of the non-migrant hot phonons into migrant acoustic modes and other vibrations. The lifetime is measured over a wide range of electron density and supplied electric power. The optimal conditions for the dissipation of the LO-mode heat are associated with the plasmon-assisted disintegration of hot phonons. Signatures of plasmons are experimentally resolved in fluctuations, dissipation, hot-electron transport, transistor frequency performance, transistor phase noise and transistor reliability. In particular, a slower degradation and a faster operation of GaN-based HFETs take place inside the electron density window where the resonant plasmon-assisted ultrafast dissipation of the LO-mode heat comes into play. A novel heterostructure design for the possible improvement of HFET performance is proposed, implemented and tested.

Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene

NASA Astrophysics Data System (ADS)

Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal

2018-06-01

Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.

Theoretical investigation of performance of armchair graphene nanoribbon field effect transistors

NASA Astrophysics Data System (ADS)

Hur, Ji-Hyun; Kim, Deok-Kee

2018-05-01

In this paper, we theoretically investigate the highest possible expected performance for graphene nanoribbon field effect transistors (GNRFETs) for a wide range of operation voltages and device structure parameters, such as the width of the graphene nanoribbon and gate length. We formulated a self-consistent, non-equilibrium Green’s function method in conjunction with the Poisson equation and modeled the operation of nanometer sized GNRFETs, of which GNR channels have finite bandgaps so that the GNRFET can operate as a switch. We propose a metric for competing with the current silicon CMOS high performance or low power devices and explain that this can vary greatly depending on the GNRFET structure parameters.

Theoretical investigation of performance of armchair graphene nanoribbon field effect transistors.

PubMed

Hur, Ji-Hyun; Kim, Deok-Kee

2018-05-04

In this paper, we theoretically investigate the highest possible expected performance for graphene nanoribbon field effect transistors (GNRFETs) for a wide range of operation voltages and device structure parameters, such as the width of the graphene nanoribbon and gate length. We formulated a self-consistent, non-equilibrium Green's function method in conjunction with the Poisson equation and modeled the operation of nanometer sized GNRFETs, of which GNR channels have finite bandgaps so that the GNRFET can operate as a switch. We propose a metric for competing with the current silicon CMOS high performance or low power devices and explain that this can vary greatly depending on the GNRFET structure parameters.

Hafnium transistor design for neural interfacing.

PubMed

Parent, David W; Basham, Eric J

2008-01-01

A design methodology is presented that uses the EKV model and the g(m)/I(D) biasing technique to design hafnium oxide field effect transistors that are suitable for neural recording circuitry. The DC gain of a common source amplifier is correlated to the structural properties of a Field Effect Transistor (FET) and a Metal Insulator Semiconductor (MIS) capacitor. This approach allows a transistor designer to use a design flow that starts with simple and intuitive 1-D equations for gain that can be verified in 1-D MIS capacitor TCAD simulations, before final TCAD process verification of transistor properties. The DC gain of a common source amplifier is optimized by using fast 1-D simulations and using slower, complex 2-D simulations only for verification. The 1-D equations are used to show that the increased dielectric constant of hafnium oxide allows a higher DC gain for a given oxide thickness. An additional benefit is that the MIS capacitor can be employed to test additional performance parameters important to an open gate transistor such as dielectric stability and ionic penetration.

Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.

2006-01-01

Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

Strategies for Improving the Performance of Sensors Based on Organic Field-Effect Transistors.

PubMed

Wu, Xiaohan; Mao, Shun; Chen, Junhong; Huang, Jia

2018-04-01

Organic semiconductors (OSCs) have been extensively studied as sensing channel materials in field-effect transistors due to their unique charge transport properties. Stimulation caused by its environmental conditions can readily change the charge-carrier density and mobility of OSCs. Organic field-effect transistors (OFETs) can act as both signal transducers and signal amplifiers, which greatly simplifies the device structure. Over the past decades, various sensors based on OFETs have been developed, including physical sensors, chemical sensors, biosensors, and integrated sensor arrays with advanced functionalities. However, the performance of OFET-based sensors still needs to be improved to meet the requirements from various practical applications, such as high sensitivity, high selectivity, and rapid response speed. Tailoring molecular structures and micro/nanofilm structures of OSCs is a vital strategy for achieving better sensing performance. Modification of the dielectric layer and the semiconductor/dielectric interface is another approach for improving the sensor performance. Moreover, advanced sensory functionalities have been achieved by developing integrated device arrays. Here, a brief review of strategies used for improving the performance of OFET sensors is presented, which is expected to inspire and provide guidance for the design of future OFET sensors for various specific and practical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

P-type field effect transistor based on Na-doped BaSnO3

NASA Astrophysics Data System (ADS)

Jang, Yeaju; Hong, Sungyun; Park, Jisung; Char, Kookrin

We fabricated field effect transistors (FET) based on the p-type Na-doped BaSnO3 (BNSO) channel layer. The properties of epitaxial BNSO channel layer were controlled by the doping rate. In order to modulate the p-type FET, we used amorphous HfOx and epitaxial BaHfO3 (BHO) gate oxides, both of which have high dielectric constants. HfOx was deposited by atomic-layer-deposition and BHO was epitaxially grown by pulsed laser deposition. The pulsed laser deposited SrRuO3 (SRO) was used as the source and the drain contacts. Indium-tin oxide and La-doped BaSnO3 were used as the gate electrodes on top of the HfOx and the BHO gate oxides, respectively. We will analyze and present the performances of the BNSO field effect transistor such as the IDS-VDS, the IDS-VGS, the Ion/Ioff ratio, and the field effect mobility. Samsung Science and Technology Foundation.

Graphene-based flexible and stretchable thin film transistors.

PubMed

Yan, Chao; Cho, Jeong Ho; Ahn, Jong-Hyun

2012-08-21

Graphene has been attracting wide attention owing to its superb electronic, thermal and mechanical properties. These properties allow great applications in the next generation of optoelectronics, where flexibility and stretchability are essential. In this context, the recent development of graphene growth/transfer and its applications in field-effect transistors are involved. In particular, we provide a detailed review on the state-of-the-art of graphene-based flexible and stretchable thin film transistors. We address the principles of fabricating high-speed graphene analog transistors and the key issues of producing an array of graphene-based transistors on flexible and stretchable substrates. It provides a platform for future work to focus on understanding and realizing high-performance graphene-based transistors.

Exploring the Charge Transport in Conjugated Polymers.

PubMed

Xu, Yong; Sun, Huabin; Li, Wenwu; Lin, Yen-Fu; Balestra, Francis; Ghibaudo, Gerard; Noh, Yong-Young

2017-11-01

Conjugated polymers came to an unprecedented epoch that the charge transport is limited only by small disorder within aggregated domains. Accurate evaluation of transport performance is thus vital to optimizing further molecule design. Yet, the routine method by means of the conventional field-effect transistors may not satisfy such a requirement. Here, it is shown that the extrinsic effects of Schottky barrier, access transport through semiconductor bulk, and concurrent ambipolar conduction seriously influence transport analysis. The planar transistors incorporating ohmic contacts free of access and ambipolar conduction afford an ideal access to charge transport. It is found, however, that only the planar transistors operating in low-field regime are reliable to explore the inherent transport properties due to the energetic disorder lowering by the lateral field induced by high drain voltage. This work opens up a robust approach to comprehend the delicate charge transport in conjugated polymers so as to develop high-performance semiconducting polymers for promising plastic electronics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

PubMed Central

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

Experimental and numerical investigation of contact-area-limited doping for top-contact pentacene thin-film transistors with Schottky contact.

PubMed

Noda, Kei; Wada, Yasuo; Toyabe, Toru

2015-10-28

Effects of contact-area-limited doping for pentacene thin-film transistors with a bottom-gate, top-contact configuration were investigated. The increase in the drain current and the effective field-effect mobility was achieved by preparing hole-doped layers underneath the gold contact electrodes by coevaporation of pentacene and 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F4TCNQ), confirmed by using a thin-film organic transistor advanced simulator (TOTAS) incorporating Schottky contact with a thermionic field emission (TFE) model. Although the simulated electrical characteristics fit the experimental results well only in the linear regime of the transistor operation, the barrier height for hole injection and the gate-voltage-dependent hole mobility in the pentacene transistors were evaluated with the aid of the device simulation. This experimental data analysis with the simulation indicates that the highly-doped semiconducting layers prepared in the contact regions can enhance the charge carrier injection into the active semiconductor layer and concurrent trap filling in the transistor channel, caused by the mitigation of a Schottky energy barrier. This study suggests that both the contact-area-limited doping and the device simulation dealing with Schottky contact are indispensable in designing and developing high-performance organic thin-film transistors.

Investigation of transport properties of coronene.TCNQ cocrystal microrods with coronene microrods and TCNQ microsheets

NASA Astrophysics Data System (ADS)

Wu, Hao-Di; Wang, Feng-Xia; Zhang, Meng; Pan, Ge-Bo

2015-07-01

Coronene.TCNQ cocrystal microrods, coronene microrods, and TCNQ microsheets were constructed by a drop-casting method. Prototype devices were fabricated and their field-effect-transistor (FET) performances were investigated. It is found that coronene.TCNQ microrods had exhibited an n-type characteristic and showed better FET performances than TCNQ microsheets.Coronene.TCNQ cocrystal microrods, coronene microrods, and TCNQ microsheets were constructed by a drop-casting method. Prototype devices were fabricated and their field-effect-transistor (FET) performances were investigated. It is found that coronene.TCNQ microrods had exhibited an n-type characteristic and showed better FET performances than TCNQ microsheets. Electronic supplementary information (ESI) available: Device fabrication and measurements. See DOI: 10.1039/c5nr02778k

Angular-Shaped Naphthalene Bis(1,5-diamide-2,6-diylidene)malononitrile for High-Performance, Air-Stable N-Type Organic Field-Effect Transistors.

PubMed

Dhondge, Attrimuni P; Tsai, Pei-Chung; Nien, Chiao-Yun; Xu, Wei-Yu; Chen, Po-Ming; Hsu, Yu-Hung; Li, Kan-Wei; Yen, Feng-Ming; Tseng, Shin-Lun; Chang, Yu-Chang; Chen, Henry J H; Kuo, Ming-Yu

2018-05-04

The synthesis, characterization, and application of two angular-shaped naphthalene bis(1,5-diamide-2,6-diylidene)malononitriles (NBAMs) as high-performance air-stable n-type organic field effect transistor (OFET) materials are reported. NBAM derivatives exhibit deep lowest-unoccupied molecular orbital (LUMO) levels, suitable for air-stable n-type OFETs. The OFET device based on NBAM-EH fabricated by vapor deposition exhibits a maximum electron mobility of 0.63 cm 2 V -1 s -1 in air with an on/off current ratio ( I on / I off ) of 10 5 .

Reducing flicker noise in chemical vapor deposition graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Arnold, Heather N.; Sangwan, Vinod K.; Schmucker, Scott W.; Cress, Cory D.; Luck, Kyle A.; Friedman, Adam L.; Robinson, Jeremy T.; Marks, Tobin J.; Hersam, Mark C.

2016-02-01

Single-layer graphene derived from chemical vapor deposition (CVD) holds promise for scalable radio frequency (RF) electronic applications. However, prevalent low-frequency flicker noise (1/f noise) in CVD graphene field-effect transistors is often up-converted to higher frequencies, thus limiting RF device performance. Here, we achieve an order of magnitude reduction in 1/f noise in field-effect transistors based on CVD graphene transferred onto silicon oxide substrates by utilizing a processing protocol that avoids aqueous chemistry after graphene transfer. Correspondingly, the normalized noise spectral density (10-7-10-8 μm2 Hz-1) and noise amplitude (4 × 10-8-10-7) in these devices are comparable to those of exfoliated and suspended graphene. We attribute the reduction in 1/f noise to a decrease in the contribution of fluctuations in the scattering cross-sections of carriers arising from dynamic redistribution of interfacial disorder.

Vacuum-processed polyethylene as a dielectric for low operating voltage organic field effect transistors

PubMed Central

Kanbur, Yasin; Irimia-Vladu, Mihai; Głowacki, Eric D.; Voss, Gundula; Baumgartner, Melanie; Schwabegger, Günther; Leonat, Lucia; Ullah, Mujeeb; Sarica, Hizir; Erten-Ela, Sule; Schwödiauer, Reinhard; Sitter, Helmut; Küçükyavuz, Zuhal; Bauer, Siegfried; Sariciftci, Niyazi Serdar

2012-01-01

We report on the fabrication and performance of vacuum-processed organic field effect transistors utilizing evaporated low-density polyethylene (LD-PE) as a dielectric layer. With C60 as the organic semiconductor, we demonstrate low operating voltage transistors with field effect mobilities in excess of 4 cm2/Vs. Devices with pentacene showed a mobility of 0.16 cm2/Vs. Devices using tyrian Purple as semiconductor show low-voltage ambipolar operation with equal electron and hole mobilities of ∼0.3 cm2/Vs. These devices demonstrate low hysteresis and operational stability over at least several months. Grazing-angle infrared spectroscopy of evaporated thin films shows that the structure of the polyethylene is similar to solution-cast films. We report also on the morphological and dielectric properties of these films. Our experiments demonstrate that polyethylene is a stable dielectric supporting both hole and electron channels. PMID:23483783

Solution-processed field-effect transistors based on dihexylquaterthiophene films with performances exceeding those of vacuum-sublimed films.

PubMed

Leydecker, Tim; Trong Duong, Duc; Salleo, Alberto; Orgiu, Emanuele; Samorì, Paolo

2014-12-10

Solution-processable oligothiophenes are model systems for charge transport and fabrication of organic field-effect transistors (OFET) . Herein we report a structure vs function relationship study focused on the electrical characteristics of solution-processed dihexylquaterthiophene (DH4T)-based OFET. We show that by combining the tailoring of all interfaces in the bottom-contact bottom-gate transistor, via chemisorption of ad hoc molecules on electrodes and dielectric, with suitable choice of the film preparation conditions (including solvent type, concentration, volume, and deposition method), it is possible to fabricate devices exhibiting field-effect mobilities exceeding those of vacuum-processed DH4T transistors. In particular, the evaporation rate of the solvent, the processing temperature, as well as the concentration of the semiconducting material were found to hold a paramount importance in driving the self-assembly toward the formation of highly ordered and low-dimensional supramolecular architectures, confirming the kinetically governed nature of the self-assembly process. Among the various architectures, hundreds-of-micrometers long and thin DH4T crystallites exhibited enhanced charge transport.

High-performance carbon nanotube thin-film transistors on flexible paper substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Na; Yun, Ki Nam; Yu, Hyun-Yong

Single-walled carbon nanotubes (SWCNTs) are promising materials as active channels for flexible transistors owing to their excellent electrical and mechanical properties. However, flexible SWCNT transistors have never been realized on paper substrates, which are widely used, inexpensive, and recyclable. In this study, we fabricated SWCNT thin-film transistors on photo paper substrates. The devices exhibited a high on/off current ratio of more than 10{sup 6} and a field-effect mobility of approximately 3 cm{sup 2}/V·s. The proof-of-concept demonstration indicates that SWCNT transistors on flexible paper substrates could be applied as low-cost and recyclable flexible electronics.

Base drive circuit

DOEpatents

Lange, A.C.

1995-04-04

An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.

Removing the current-limit of vertical organic field effect transistors

NASA Astrophysics Data System (ADS)

Sheleg, Gil; Greenman, Michael; Lussem, Bjorn; Tessler, Nir

2017-11-01

The reported Vertical Organic Field Effect Transistors (VOFETs) show either superior current and switching speeds or well-behaved transistor performance, especially saturation in the output characteristics. Through the study of the relationship between the device architecture or dimensions and the device performance, we find that achieving a saturation regime in the output characteristics requires that the device operates in the injection limited regime. In current structures, the existence of the injection limited regime depends on the source's injection barrier as well as on the buried semiconductor layer thickness. To overcome the injection limit imposed by the necessity of injection barrier, we suggest a new architecture to realize VOFETs. This architecture shows better gate control and is independent of the injection barrier at the source, thus allowing for several A cm-2 for a semiconductor having a mobility value of 0.1 cm2 V-1 s-1.

Integrated digital inverters based on two-dimensional anisotropic ReS2 field-effect transistors

PubMed Central

Liu, Erfu; Fu, Yajun; Wang, Yaojia; Feng, Yanqing; Liu, Huimei; Wan, Xiangang; Zhou, Wei; Wang, Baigeng; Shao, Lubin; Ho, Ching-Hwa; Huang, Ying-Sheng; Cao, Zhengyi; Wang, Laiguo; Li, Aidong; Zeng, Junwen; Song, Fengqi; Wang, Xinran; Shi, Yi; Yuan, Hongtao; Hwang, Harold Y.; Cui, Yi; Miao, Feng; Xing, Dingyu

2015-01-01

Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS2) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS2 field-effect transistors, which exhibit competitive performance with large current on/off ratios (∼107) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconducting materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS2 anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications. PMID:25947630

Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics on Flexible Substrates

PubMed Central

Tetzner, Kornelius; Bose, Indranil R.; Bock, Karlheinz

2014-01-01

In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor. PMID:28788243

Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

PubMed

Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

2014-10-20

In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.

Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics onFlexible Substrates.

PubMed

Tetzner, Kornelius; Bose, Indranil R; Bock, Karlheinz

2014-10-29

In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor.

Variability and reliability analysis in self-assembled multichannel carbon nanotube field-effect transistors

NASA Astrophysics Data System (ADS)

Hu, Zhaoying; Tulevski, George S.; Hannon, James B.; Afzali, Ali; Liehr, Michael; Park, Hongsik

2015-06-01

Carbon nanotubes (CNTs) have been widely studied as a channel material of scaled transistors for high-speed and low-power logic applications. In order to have sufficient drive current, it is widely assumed that CNT-based logic devices will have multiple CNTs in each channel. Understanding the effects of the number of CNTs on device performance can aid in the design of CNT field-effect transistors (CNTFETs). We have fabricated multi-CNT-channel CNTFETs with an 80-nm channel length using precise self-assembly methods. We describe compact statistical models and Monte Carlo simulations to analyze failure probability and the variability of the on-state current and threshold voltage. The results show that multichannel CNTFETs are more resilient to process variation and random environmental fluctuations than single-CNT devices.

Influence of the morphology of the copper(II) phthalocyanine thin film on the performance of organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Jing; Liu, Xueqiang; Wang, Hailong; Hou, Wenlong; Zhao, Lele; Zhang, Haiquan

2017-01-01

Organic thin-film transistors (OTFTs) with high crystallization copper phthalocyanine (CuPc) active layers were fabricated. The performance of CuPc OTFTs was studied without and with treatment by Solvent Vapor Annealing on CuPc film. The values of the threshold voltage without and with solvent-vapor annealing are -17 V and -10.5 V respectively. The field-effect mobility values in saturation region of CuPc thin-film transistors without and with Solvent Vapor Annealing are 0.00027 cm2/V s and 0.0025 cm2/V s respectively. Meanwhile, the high crystallization of the CuPc film with a larger grain size and less grain boundaries can be observed by investigating the morphology of the CuPc active layer through scanning electron microscopy and X-ray diffraction. The experimental results showed the decreased of the resistance of the conducting channel, that led to a performance improvement of the OTFTs.

High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors.

PubMed

Giusi, G; Giordano, O; Scandurra, G; Rapisarda, M; Calvi, S; Ciofi, C

2016-04-01

Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz(1/2), while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.

High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Giusi, G.; Giordano, O.; Scandurra, G.

Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz{sup 1/2}, while DC performances are limited only bymore » the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.« less

Current sensing circuit

NASA Technical Reports Server (NTRS)

Franke, Ralph J. (Inventor)

1996-01-01

A current sensing circuit is described in which a pair of bipolar transistors are arranged with a pair of field effect transistors such that the field effect transistors absorb most of the supply voltage associated with a load.

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

PubMed

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

A III-V nanowire channel on silicon for high-performance vertical transistors.

PubMed

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures over the range of -190 C to +225 C in terms of its voltage/current characteristic curves. The test temperatures included +22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 C. Limited thermal cycling testing was also performed on the device. These tests consisted of subjecting the transistor to a total of twelve thermal cycles between -190 C and +225 C. A temperature rate of change of 10 C/min and a soak time at the test temperature of 10 minutes were used throughout this work. Post-cycling measurements were also performed at selected temperatures. In addition, re-start capability at extreme temperatures, i.e. power switched on while the device was soaking for a period of 20 minutes at the test temperatures of -190 C and +225 C, was investigated.

N Channel JFET Based Digital Logic Gate Structure

NASA Technical Reports Server (NTRS)

Krasowski, Michael J (Inventor)

2013-01-01

An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.

Design of double gate vertical tunnel field effect transistor using HDB and its performance estimation

NASA Astrophysics Data System (ADS)

Seema; Chauhan, Sudakar Singh

2018-05-01

In this paper, we demonstrate the double gate vertical tunnel field-effect transistor using homo/hetero dielectric buried oxide (HDB) to obtain the optimized device characteristics. In this concern, the existence of double gate, HDB and electrode work-function engineering enhances DC performance and Analog/RF performance. The use of electrostatic doping helps to achieve higher on-current owing to occurrence of higher tunneling generation rate of charge carriers at the source/epitaxial interface. Further, lightly doped drain region and high- k dielectric below channel and drain region are responsible to suppress the ambipolar current. Simulated results clarifies that proposed device have achieved the tremendous performance in terms of driving current capability, steeper subthreshold slope (SS), drain induced barrier lowering (DIBL), hot carrier effects (HCEs) and high frequency parameters for better device reliability.

Doping Polymer Semiconductors by Organic Salts: Toward High-Performance Solution-Processed Organic Field-Effect Transistors.

PubMed

Hu, Yuanyuan; Rengert, Zachary D; McDowell, Caitlin; Ford, Michael J; Wang, Ming; Karki, Akchheta; Lill, Alexander T; Bazan, Guillermo C; Nguyen, Thuc-Quyen

2018-04-24

Solution-processed organic field-effect transistors (OFETs) were fabricated with the addition of an organic salt, trityl tetrakis(pentafluorophenyl)borate (TrTPFB), into thin films of donor-acceptor copolymer semiconductors. The performance of OFETs is significantly enhanced after the organic salt is incorporated. TrTPFB is confirmed to p-dope the organic semiconductors used in this study, and the doping efficiency as well as doping physics was investigated. In addition, systematic electrical and structural characterizations reveal how the doping enhances the performance of OFETs. Furthermore, it is shown that this organic salt doping method is feasible for both p- and n-doping by using different organic salts and, thus, can be utilized to achieve high-performance OFETs and organic complementary circuits.

Extended Characterization of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and varying device sizes compared to earlier characterizations. The effects of the ferroelectric layer's capacitance and variation load, quiescent point, or input signal on each circuit are discussed. Comparisons between the MFSFET and MOSFET circuit operation and performance are discussed at length as well as applications and advantages for the MFSFETs.

Flexible bottom-gate graphene transistors on Parylene C substrate and the effect of current annealing

PubMed Central

Kim, Hyungsoo; Bong, Jihye; Mikael, Solomon; Kim, Tong June; Williams, Justin C.; Ma, Zhenqiang

2016-01-01

Flexible graphene transistors built on a biocompatible Parylene C substrate would enable active circuitry to be integrated into flexible implantable biomedical devices. An annealing method to improve the performance of a flexible transistor without damaging the flexible substrate is also desirable. Here, we present a fabrication method of a flexible graphene transistor with a bottom-gate coplanar structure on a Parylene C substrate. Also, a current annealing method and its effect on the device performance have been studied. The localized heat generated by the current annealing method improves the drain current, which is attributed to the decreased contact resistance between graphene and S/D electrodes. A maximum current annealing power in the Parylene C-based graphene transistor has been extracted to provide a guideline for an appropriate current annealing. The fabricated flexible graphene transistor shows a field-effect mobility, maximum transconductance, and a Ion/Ioff ratio of 533.5 cm2/V s, 58.1 μS, and 1.76, respectively. The low temperature process and the current annealing method presented here would be useful to fabricate two-dimensional materials-based flexible electronics. PMID:27795570

Fabrication and characterization on reduced graphene oxide field effect transistor (RGOFET) based biosensor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rashid, A. Diyana; Ruslinda, A. Rahim, E-mail: ruslinda@unimap.edu.my; Fatin, M. F.

2016-07-06

The fabrication and characterization on reduced graphene oxide field effect transistor (RGO-FET) were demonstrated using a spray deposition method for biological sensing device purpose. A spray method is a fast, low-cost and simple technique to deposit graphene and the most promising technology due to ideal coating on variety of substrates and high production speed. The fabrication method was demonstrated for developing a label free aptamer reduced graphene oxide field effect transistor biosensor. Reduced graphene oxide (RGO) was obtained by heating on hot plate fixed at various temperatures of 100, 200 and 300°C, respectively. The surface morphology of RGO were examinedmore » via atomic force microscopy to observed the temperature effect of produced RGO. The electrical measurement verify the performance of electrical conducting RGO-FET at temperature 300°C is better as compared to other temperature due to the removal of oxygen groups in GO. Thus, reduced graphene oxide was a promising material for biosensor application.« less

Effect of multi-dimensional ultraviolet light exposure on the growth of pentacene film and application to organic field-effect transistors.

PubMed

Bae, Jin-Hyuk; Lee, Sin-Doo; Choi, Jong Sun; Park, Jaehoon

2012-05-01

We report on the multi-dimensional alignment of pentacene molecules on a poly(methyl methacrylate)-based photosensitive polymer (PMMA-polymer) and its effect on the electrical performance of the pentacene-based field-effect transistor (FET). Pentacene molecules are shown to be preferentially aligned on the linearly polarized ultraviolet (LPUV)-exposed PMMA-polymer layer, which is contrast to an isotropic alignment on the bare PMMA-polymer layer. Multi-dimensional alignment of pentacene molecules in the film could be achieved by adjusting the direction of LPUV exposed to the PMMA-polymer. The control of pentacene molecular alignment is found to be promising for the field-effect mobility enhancement in the pentacene FET.

25th anniversary article: key points for high-mobility organic field-effect transistors.

PubMed

Dong, Huanli; Fu, Xiaolong; Liu, Jie; Wang, Zongrui; Hu, Wenping

2013-11-20

Remarkable progress has been made in developing high performance organic field-effect transistors (OFETs) and the mobility of OFETs has been approaching the values of polycrystalline silicon, meeting the requirements of various electronic applications from electronic papers to integrated circuits. In this review, the key points for development of high mobility OFETs are highlighted from aspects of molecular engineering, process engineering and interface engineering. The importance of other factors, such as impurities and testing conditions is also addressed. Finally, the current challenges in this field for practical applications of OFETs are further discussed. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Complementary junction heterostructure field-effect transistor

DOEpatents

Baca, Albert G.; Drummond, Timothy J.; Robertson, Perry J.; Zipperian, Thomas E.

1995-01-01

A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.

Complementary junction heterostructure field-effect transistor

DOEpatents

Baca, A.G.; Drummond, T.J.; Robertson, P.J.; Zipperian, T.E.

1995-12-26

A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits. 10 figs.

Measuring bi-directional current through a field-effect transistor by virtue of drain-to-source voltage measurement

DOEpatents

Turner, Steven Richard

2006-12-26

A method and apparatus for measuring current, and particularly bi-directional current, in a field-effect transistor (FET) using drain-to-source voltage measurements. The drain-to-source voltage of the FET is measured and amplified. This signal is then compensated for variations in the temperature of the FET, which affects the impedance of the FET when it is switched on. The output is a signal representative of the direction of the flow of current through the field-effect transistor and the level of the current through the field-effect transistor. Preferably, the measurement only occurs when the FET is switched on.

Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

PubMed Central

Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

2016-01-01

Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Flexible black phosphorus ambipolar transistors, circuits and AM demodulator.

PubMed

Zhu, Weinan; Yogeesh, Maruthi N; Yang, Shixuan; Aldave, Sandra H; Kim, Joon-Seok; Sonde, Sushant; Tao, Li; Lu, Nanshu; Akinwande, Deji

2015-03-11

High-mobility two-dimensional (2D) semiconductors are desirable for high-performance mechanically flexible nanoelectronics. In this work, we report the first flexible black phosphorus (BP) field-effect transistors (FETs) with electron and hole mobilities superior to what has been previously achieved with other more studied flexible layered semiconducting transistors such as MoS2 and WSe2. Encapsulated bottom-gated BP ambipolar FETs on flexible polyimide afforded maximum carrier mobility of about 310 cm(2)/V·s with field-effect current modulation exceeding 3 orders of magnitude. The device ambipolar functionality and high-mobility were employed to realize essential circuits of electronic systems for flexible technology including ambipolar digital inverter, frequency doubler, and analog amplifiers featuring voltage gain higher than other reported layered semiconductor flexible amplifiers. In addition, we demonstrate the first flexible BP amplitude-modulated (AM) demodulator, an active stage useful for radio receivers, based on a single ambipolar BP transistor, which results in audible signals when connected to a loudspeaker or earphone. Moreover, the BP transistors feature mechanical robustness up to 2% uniaxial tensile strain and up to 5000 bending cycles.

Intrinsically stretchable and healable semiconducting polymer for organic transistors

NASA Astrophysics Data System (ADS)

Oh, Jin Young; Rondeau-Gagné, Simon; Chiu, Yu-Cheng; Chortos, Alex; Lissel, Franziska; Wang, Ging-Ji Nathan; Schroeder, Bob C.; Kurosawa, Tadanori; Lopez, Jeffrey; Katsumata, Toru; Xu, Jie; Zhu, Chenxin; Gu, Xiaodan; Bae, Won-Gyu; Kim, Yeongin; Jin, Lihua; Chung, Jong Won; Tok, Jeffrey B.-H.; Bao, Zhenan

2016-11-01

Thin-film field-effect transistors are essential elements of stretchable electronic devices for wearable electronics. All of the materials and components of such transistors need to be stretchable and mechanically robust. Although there has been recent progress towards stretchable conductors, the realization of stretchable semiconductors has focused mainly on strain-accommodating engineering of materials, or blending of nanofibres or nanowires into elastomers. An alternative approach relies on using semiconductors that are intrinsically stretchable, so that they can be fabricated using standard processing methods. Molecular stretchability can be enhanced when conjugated polymers, containing modified side-chains and segmented backbones, are infused with more flexible molecular building blocks. Here we present a design concept for stretchable semiconducting polymers, which involves introducing chemical moieties to promote dynamic non-covalent crosslinking of the conjugated polymers. These non-covalent crosslinking moieties are able to undergo an energy dissipation mechanism through breakage of bonds when strain is applied, while retaining high charge transport abilities. As a result, our polymer is able to recover its high field-effect mobility performance (more than 1 square centimetre per volt per second) even after a hundred cycles at 100 per cent applied strain. Organic thin-film field-effect transistors fabricated from these materials exhibited mobility as high as 1.3 square centimetres per volt per second and a high on/off current ratio exceeding a million. The field-effect mobility remained as high as 1.12 square centimetres per volt per second at 100 per cent strain along the direction perpendicular to the strain. The field-effect mobility of damaged devices can be almost fully recovered after a solvent and thermal healing treatment. Finally, we successfully fabricated a skin-inspired stretchable organic transistor operating under deformations that might be expected in a wearable device.

Intrinsically stretchable and healable semiconducting polymer for organic transistors.

PubMed

Oh, Jin Young; Rondeau-Gagné, Simon; Chiu, Yu-Cheng; Chortos, Alex; Lissel, Franziska; Wang, Ging-Ji Nathan; Schroeder, Bob C; Kurosawa, Tadanori; Lopez, Jeffrey; Katsumata, Toru; Xu, Jie; Zhu, Chenxin; Gu, Xiaodan; Bae, Won-Gyu; Kim, Yeongin; Jin, Lihua; Chung, Jong Won; Tok, Jeffrey B-H; Bao, Zhenan

2016-11-17

Thin-film field-effect transistors are essential elements of stretchable electronic devices for wearable electronics. All of the materials and components of such transistors need to be stretchable and mechanically robust. Although there has been recent progress towards stretchable conductors, the realization of stretchable semiconductors has focused mainly on strain-accommodating engineering of materials, or blending of nanofibres or nanowires into elastomers. An alternative approach relies on using semiconductors that are intrinsically stretchable, so that they can be fabricated using standard processing methods. Molecular stretchability can be enhanced when conjugated polymers, containing modified side-chains and segmented backbones, are infused with more flexible molecular building blocks. Here we present a design concept for stretchable semiconducting polymers, which involves introducing chemical moieties to promote dynamic non-covalent crosslinking of the conjugated polymers. These non-covalent crosslinking moieties are able to undergo an energy dissipation mechanism through breakage of bonds when strain is applied, while retaining high charge transport abilities. As a result, our polymer is able to recover its high field-effect mobility performance (more than 1 square centimetre per volt per second) even after a hundred cycles at 100 per cent applied strain. Organic thin-film field-effect transistors fabricated from these materials exhibited mobility as high as 1.3 square centimetres per volt per second and a high on/off current ratio exceeding a million. The field-effect mobility remained as high as 1.12 square centimetres per volt per second at 100 per cent strain along the direction perpendicular to the strain. The field-effect mobility of damaged devices can be almost fully recovered after a solvent and thermal healing treatment. Finally, we successfully fabricated a skin-inspired stretchable organic transistor operating under deformations that might be expected in a wearable device.

Effects of Various Passivation Layers on Electrical Properties of Multilayer MoS₂ Transistors.

PubMed

Ma, Jiyeon; Yoo, Geonwook

2018-09-01

So far many of research on transition metal dichalcogenides (TMDCs) are based on a bottomgate device structure due to difficulty with depositing a dielectric film on top of TMDs channel layer. In this work, we study different effects of various passivation layers on electrical properties of multilayer MoS2 transistors: spin-coated CYTOP, SU-8, and thermal evaporated MoOX. The SU-8 passivation layer alters device performance least significantly, and MoOX induces positive threshold voltage shift of ~8.0 V due to charge depletion at the interface, and the device with CYTOP layer exhibits decreased field-effect mobility by ~50% due to electric dipole field effect of C-F bonds in the end groups. Our results imply that electrical properties of the multilayer MoS2 transistors can be modulated using a passivation layer, and therefore a proper passivation layer should be considered for MoS2 device structures.

Liquid crystals for organic transistors (Conference Presentation)

NASA Astrophysics Data System (ADS)

Hanna, Jun-ichi; Iino, Hiroaki

2016-09-01

Liquid crystals are a new type of organic semiconductors exhibiting molecular orientation in self-organizing manner, and have high potential for device applications. In fact, various device applications have been proposed so far, including photosensors, solar cells, light emitting diodes, field effect transistors, and so on.. However, device performance in those fabricated with liquid crystals is less than those of devices fabricated with conventional materials in spite of unique features of liquid crystals. Here we discuss how we can utilize the liquid crystallinity in organic transistors and how we can overcome conventional non-liquid crystalline organic transistor materials. Then, we demonstrate high performance organic transistors fabricated with a smectic E liquid crystal of Ph-BTBT-10, which show high mobility of over 10cm2/Vs and high thermal durability of over 200oC in OFETs fabricated with its spin-coated polycrystalline thin films.

Effect of dielectric layers on device stability of pentacene-based field-effect transistors.

PubMed

Di, Chong-an; Yu, Gui; Liu, Yunqi; Guo, Yunlong; Sun, Xiangnan; Zheng, Jian; Wen, Yugeng; Wang, Ying; Wu, Weiping; Zhu, Daoben

2009-09-07

We report stable organic field-effect transistors (OFETs) based on pentacene. It was found that device stability strongly depends on the dielectric layer. Pentacene thin-film transistors based on the bare or polystyrene-modified SiO(2) gate dielectrics exhibit excellent electrical stabilities. In contrast, the devices with the octadecyltrichlorosilane (OTS)-treated SiO(2) dielectric layer showed the worst stabilities. The effects of the different dielectrics on the device stabilities were investigated. We found that the surface energy of the gate dielectric plays a crucial role in determining the stability of the pentacene thin film, device performance and degradation of electrical properties. Pentacene aggregation, phase transfer and film morphology are also important factors that influence the device stability of pentacene devices. As a result of the surface energy mismatch between the dielectric layer and organic semiconductor, the electronic performance was degraded. Moreover, when pentacene was deposited on the OTS-treated SiO(2) dielectric layer with very low surface energy, pentacene aggregation occurred and resulted in a dramatic decrease of device performance. These results demonstrated that the stable OFETs could be obtained by using pentacene as a semiconductor layer.

Effect of In Situ Annealing Treatment on the Mobility and Morphology of TIPS-Pentacene-Based Organic Field-Effect Transistors.

PubMed

Yang, Fuqiang; Wang, Xiaolin; Fan, Huidong; Tang, Ying; Yang, Jianjun; Yu, Junsheng

2017-08-23

In this work, organic field-effect transistors (OFETs) with a bottom gate top contact structure were fabricated by using a spray-coating method, and the influence of in situ annealing treatment on the OFET performance was investigated. Compared to the conventional post-annealing method, the field-effect mobility of OFET with 60 °C in situ annealing treatment was enhanced nearly four times from 0.056 to 0.191 cm 2 /Vs. The surface morphologies and the crystallization of TIPS-pentacene films were characterized by optical microscope, atomic force microscope, and X-ray diffraction. We found that the increased mobility was mainly attributed to the improved crystallization and highly ordered TIPS-pentacene molecules.

Effect of In Situ Annealing Treatment on the Mobility and Morphology of TIPS-Pentacene-Based Organic Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Yang, Fuqiang; Wang, Xiaolin; Fan, Huidong; Tang, Ying; Yang, Jianjun; Yu, Junsheng

2017-08-01

In this work, organic field-effect transistors (OFETs) with a bottom gate top contact structure were fabricated by using a spray-coating method, and the influence of in situ annealing treatment on the OFET performance was investigated. Compared to the conventional post-annealing method, the field-effect mobility of OFET with 60 °C in situ annealing treatment was enhanced nearly four times from 0.056 to 0.191 cm2/Vs. The surface morphologies and the crystallization of TIPS-pentacene films were characterized by optical microscope, atomic force microscope, and X-ray diffraction. We found that the increased mobility was mainly attributed to the improved crystallization and highly ordered TIPS-pentacene molecules.

Base drive circuit

DOEpatents

Lange, Arnold C.

1995-01-01

An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

Ferroelectric-induced carrier modulation for ambipolar transition metal dichalcogenide transistors

NASA Astrophysics Data System (ADS)

Yin, Lei; Wang, Zhenxing; Wang, Feng; Xu, Kai; Cheng, Ruiqing; Wen, Yao; Li, Jie; He, Jun

2017-03-01

For multifarious electronic and optoelectronic applications, it is indispensable exploration of stable and simple method to modulate electrical behavior of transition metal dichalcogenides (TMDs). In this study, an effective method to adjust the electrical properties of ambipolar TMDs is developed by introducing the dipole electric field from poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric polymer. The transition from ambipolar to p-type conductive characteristics is realized, and the transistor performances are also significantly enhanced. Hole density of MoTe2- and WSe2-based back-gate field effect transistors increases by 4.4 and 2.5 times. Moreover, the corresponding hole mobilities are strikingly improved from 0.27 to 10.7 cm2 V-1 s-1 and from 1.6 to 59.8 cm2 V-1 s-1, respectively. After optimizing, p-channel MoTe2 phototransistors present ultrahigh responsivity of 3521 A/W, which is superior to most layered phototransistors. The remarkable control of conductive type, carrier concentration, and field-effect mobility of ambipolar TMDs via P(VDF-TrFE) treatment paves a way for realization of high-performance and versatile electronic and optoelectronic devices.

Ambipolar transport of silver nanoparticles decorated graphene oxide field effect transistors

NASA Astrophysics Data System (ADS)

Sarkar, Kalyan Jyoti; Sarkar, K.; Pal, B.; Kumar, Aparabal; Das, Anish; Banerji, P.

2018-05-01

In this article, we report ambipolar field effect transistor (FET) by using graphene oxide (GO) as a gate dielectric material for silver nanoparticles (AgNPs) decorated GO channel layer. GO was synthesized by Hummers' method. The AgNPs were prepared via photochemical reduction of silver nitrate solution by using monoethanolamine as a reducing agent. Morphological properties of channel layer were characterized by Field Effect Scanning Electron Microscopy (FESEM). Fourier Transform Infrared Spectroscopy (FTIR) was carried out to characterize GO thin film. For device fabrication gold (Au) was deposited as source-drain contact and aluminum (Al) was taken as bottom contact. Electrical measurements were performed by back gate configuration. Ambipolar transport behavior was explained from transfer characteristics. A maximum electron mobiliy of 6.65 cm2/Vs and a hole mobility of 2.46 cm2/Vs were extracted from the transfer characteristics. These results suggest that GO is a potential candidate as a gate dielectric material for thin film transistor applications and also provides new insights in GO based research.

Low-frequency (1/f) noise in nanocrystal field-effect transistors.

PubMed

Lai, Yuming; Li, Haipeng; Kim, David K; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2014-09-23

We investigate the origins and magnitude of low-frequency noise in high-mobility nanocrystal field-effect transistors and show the noise is of 1/f-type. Sub-band gap states, in particular, those introduced by nanocrystal surfaces, have a significant influence on the 1/f noise. By engineering the device geometry and passivating nanocrystal surfaces, we show that in the linear and saturation regimes the 1/f noise obeys Hooge's model of mobility fluctuations, consistent with transport of a high density of accumulated carriers in extended electronic states of the NC thin films. In the subthreshold regime, the Fermi energy moves deeper into the mobility gap and sub-band gap trap states give rise to a transition to noise dominated by carrier number fluctuations as described in McWhorter's model. CdSe nanocrystal field-effect transistors have a Hooge parameter of 3 × 10(-2), comparable to other solution-deposited, thin-film devices, promising high-performance, low-cost, low-noise integrated circuitry.

Large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

Fluctuations in the electrical resistance at the interface of atomically thin materials and metals, or the contact noise, can adversely affect the device performance but remains largely unexplored. We have investigated contact noise in graphene field effect transistors of varying device geometry and contact configuration, with channel carrier mobility ranging from 5,000 to 80,000 cm2V-1s-1. A phenomenological model developed for contact noise due to current crowding for two dimensional conductors, shows a dominant contact contribution to the measured resistance noise in all graphene field effect transistors when measured in the two-probe or invasive four probe configurations, and surprisingly, also in nearly noninvasive four probe (Hall bar) configuration in the high mobility devices. We identify the fluctuating electrostatic environment of the metal-channel interface as the major source of contact noise, which could be generic to two dimensional material-based electronic devices. The work was financially supported by the Department of Science and Technology, India and Tokyo Electron Limited.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN bipolar junction transistors (BJTs), metal-oxide-semiconductor field effect transistors (MOSFETs), and static induction transistors (SITs) are given. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Postirradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

High-mobility field-effect transistor based on crystalline ZnSnO3 thin films

NASA Astrophysics Data System (ADS)

Minato, Hiroya; Fujiwara, Kohei; Tsukazaki, Atsushi

2018-05-01

We propose crystalline ZnSnO3 as a new channel material for field-effect transistors. By molecular-beam epitaxy on LiNbO3(0001) substrates, we synthesized films of ZnSnO3, which crystallizes in the LiNbO3-type polar structure. Field-effect transistors on ZnSnO3 exhibit n-type operation with field-effect mobility of as high as 45 cm2V-1s-1 at room temperature. Systematic examination of the transistor operation for channels with different Zn/Sn compositional ratios revealed that the observed high-mobility reflects the nature of stoichiometric ZnSnO3 phase. Moreover, we found an indication of coupling of transistor characteristics with intrinsic spontaneous polarization in ZnSnO3, potentially leading to a distinct type of polarization-induced conduction.

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Tang, Fengzai; Lee, Kean B.; Guiney, Ivor; Frentrup, Martin; Barnard, Jonathan S.; Divitini, Giorgio; Zaidi, Zaffar H.; Martin, Tomas L.; Bagot, Paul A.; Moody, Michael P.; Humphreys, Colin J.; Houston, Peter A.; Oliver, Rachel A.; Wallis, David J.

2018-01-01

We investigate the impact of a fluorine plasma treatment used to obtain enhancement-mode operation on the structure and chemistry at the nanometer and atomic scales of an InAlN/GaN field effect transistor. The fluorine plasma treatment is successful in that enhancement mode operation is achieved with a +2.8 V threshold voltage. However, the InAlN barrier layers are observed to have been damaged by the fluorine treatment with their thickness being reduced by up to 50%. The treatment also led to oxygen incorporation within the InAlN barrier layers. Furthermore, even in the as-grown structure, Ga was unintentionally incorporated during the growth of the InAlN barrier. The impact of both the reduced barrier thickness and the incorporated Ga within the barrier on the transistor properties has been evaluated theoretically and compared to the experimentally determined two-dimensional electron gas density and threshold voltage of the transistor. For devices without fluorine treatment, the two-dimensional electron gas density is better predicted if the quaternary nature of the barrier is taken into account. For the fluorine treated device, not only the changes to the barrier layer thickness and composition, but also the fluorine doping needs to be considered to predict device performance. These studies reveal the factors influencing the performance of these specific transistor structures and highlight the strengths of the applied nanoscale characterisation techniques in revealing information relevant to device performance.

Capacitorless one-transistor dynamic random-access memory based on asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor with n-doped boosting layer and drain-underlap structure

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-04-01

In this work, we present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on an asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor (TFET) for DRAM applications. The n-doped boosting layer and gate2 drain-underlap structure is employed in the device to obtain an excellent 1T-DRAM performance. The n-doped layer inserted between the source and channel regions improves the sensing margin because of a high rate of increase in the band-to-band tunneling (BTBT) probability. Furthermore, because the gate2 drain-underlap structure reduces the recombination rate that occurs between the gate2 and drain regions, a device with a gate2 drain-underlap length (L G2_D-underlap) of 10 nm exhibited a longer retention performance. As a result, by applying the n-doped layer and gate2 drain-underlap structure, the proposed device exhibited not only a high sensing margin of 1.11 µA/µm but also a long retention time of greater than 100 ms at a temperature of 358 K (85 °C).

Error correcting circuit design with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong

2018-03-01

In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.

Ultralow-power complementary metal-oxide-semiconductor inverters constructed on Schottky barrier modified nanowire metal-oxide-semiconductor field-effect-transistors.

PubMed

Ma, R M; Peng, R M; Wen, X N; Dai, L; Liu, C; Sun, T; Xu, W J; Qin, G G

2010-10-01

We show that the threshold voltages of both n- and p-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) can be lowered to close to zero by adding extra Schottky contacts on top of nanowires (NWs). Novel complementary metal-oxide-semiconductor (CMOS) inverters are constructed on these Schottky barrier modified n- and p-channel NW MOSFETs. Based on the high performances of the modified n- and p-channel MOSFETs, especially the low threshold voltages, the as-fabricated CMOS inverters have low operating voltage, high voltage gain, and ultra-low static power dissipation.

Photosensitive graphene transistors.

PubMed

Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng

2014-08-20

High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Review on analog/radio frequency performance of advanced silicon MOSFETs

NASA Astrophysics Data System (ADS)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Influence of trap-assisted tunneling on trap-assisted tunneling current in double gate tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Zhi, Jiang; Yi-Qi, Zhuang; Cong, Li; Ping, Wang; Yu-Qi, Liu

2016-02-01

Trap-assisted tunneling (TAT) has attracted more and more attention, because it seriously affects the sub-threshold characteristic of tunnel field-effect transistor (TFET). In this paper, we assess subthreshold performance of double gate TFET (DG-TFET) through a band-to-band tunneling (BTBT) model, including phonon-assisted scattering and acoustic surface phonons scattering. Interface state density profile (Dit) and the trap level are included in the simulation to analyze their effects on TAT current and the mechanism of gate leakage current. Project supported by the National Natural Science Foundation of China (Grant Nos. 61574109 and 61204092).

Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

NASA Astrophysics Data System (ADS)

She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

2013-09-01

Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

All-dry transferred single- and few-layer MoS2 field effect transistor with enhanced performance by thermal annealing

NASA Astrophysics Data System (ADS)

Islam, Arnob; Lee, Jaesung; Feng, Philip X.-L.

2018-01-01

We report on the experimental demonstration of all-dry stamp transferred single- and few-layer (1L to 3L) molybdenum disulfide (MoS2) field effect transistors (FETs), with a significant enhancement of device performance by employing thermal annealing in moderate vacuum. Three orders of magnitude reduction in both contact and channel resistances have been attained via thermal annealing. We obtain a low contact resistance of 22 kΩ μm after thermal annealing of 1L MoS2 FETs stamp-transferred onto gold (Au) contact electrodes. Furthermore, nearly two orders of magnitude enhancement of field effect mobility are also observed after thermal annealing. Finally, we employ Raman and photoluminescence measurements to reveal the phenomena of alloying or hybridization between 1L MoS2 and its contacting electrodes during annealing, which is responsible for attaining the low contact resistance.

Field effect transistors improve buffer amplifier

NASA Technical Reports Server (NTRS)

1967-01-01

Unity gain buffer amplifier with a Field Effect Transistor /FET/ differential input stage responds much faster than bipolar transistors when operated at low current levels. The circuit uses a dual FET in a unity gain buffer amplifier having extremely high input impedance, low bias current requirements, and wide bandwidth.

I-V Characteristics of a Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen

1999-01-01

There are many possible uses for ferroelectric field effect transistors.To understand their application, a fundamental knowledge of their basic characteristics must first be found. In this research, the current and voltage characteristics of a field effect transistor are described. The effective gate capacitance and charge are derived from experimental data on an actual FFET. The general equation for a MOSFET is used to derive the internal characteristics of the transistor: This equation is modified slightly to describe the FFET characteristics. Experimental data derived from a Radiant Technologies FFET is used to calculate the internal transistor characteristics using fundamental MOSFET equations. The drain current was measured under several different gate and drain voltages and with different initial polarizations on the ferroelectric material in the transistor. Two different polarization conditions were used. One with the gate ferroelectric material polarized with a +9.0 volt write pulse and one with a -9.0 volt pulse.

Thin-film transistors with a graphene oxide nanocomposite channel.

PubMed

Jilani, S Mahaboob; Gamot, Tanesh D; Banerji, P

2012-12-04

Graphene oxide (GO) and graphene oxide-zinc oxide nanocomposites (GO-ZnO) were used as channel materials on SiO(2)/Si to fabricate thin-film transistors (TFT) with an aluminum source and drain. Pure GO-based TFT showed poor field-effect characteristics. However, GO-ZnO-nanocomposite-based TFT showed better field-effect performance because of the anchoring of ZnO nanostructures in the GO matrix, which causes a partial reduction in GO as is found from X-ray photoelectron spectroscopic data. The field-effect mobility of charge carriers at a drain voltage of 1 V was found to be 1.94 cm(2)/(V s). The transport of charge carriers in GO-ZnO was explained by a fluctuation-induced tunneling mechanism.

Triggering the Electrolyte-Gated Organic Field-Effect Transistor output characteristics through gate functionalization using diazonium chemistry: Application to biodetection of 2,4-dichlorophenoxyacetic acid.

PubMed

Nguyen, T T K; Nguyen, T N; Anquetin, G; Reisberg, S; Noël, V; Mattana, G; Touzeau, J; Barbault, F; Pham, M C; Piro, B

2018-08-15

We investigated an Electrolyte-Gated Organic Field-Effect transistor based on poly(N-alkyldiketopyrrolo-pyrrole dithienylthieno[3,2-b]thiophene) as organic semiconductor whose gate electrode was functionalized by electrografting a functional diazonium salt capable to bind an antibody specific to 2,4-dichlorophenoxyacetic acid (2,4-D), an herbicide well-known to be a soil and water pollutant. Molecular docking computations were performed to design the functional diazonium salt to rationalize the antibody capture on the gate surface. Sensing of 2,4-D was performed through a displacement immunoassay. The limit of detection was estimated at around 2.5 fM. Copyright © 2018 Elsevier B.V. All rights reserved.

Terahertz signal detection in a short gate length field-effect transistor with a two-dimensional electron gas

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vostokov, N. V., E-mail: vostokov@ipm.sci-nnov.ru; Shashkin, V. I.

2015-11-28

We consider the problem of non-resonant detection of terahertz signals in a short gate length field-effect transistor having a two-dimensional electron channel with zero external bias between the source and the drain. The channel resistance, gate-channel capacitance, and quadratic nonlinearity parameter of the transistor during detection as a function of the gate bias voltage are studied. Characteristics of detection of the transistor connected in an antenna with real impedance are analyzed. The consideration is based on both a simple one-dimensional model of the transistor and allowance for the two-dimensional distribution of the electric field in the transistor structure. The resultsmore » given by the different models are discussed.« less

Organic field effect transistors - Study of performance parameters for different dielectric layer thickness

NASA Astrophysics Data System (ADS)

Assis, Anu; Shahul Hameed T., A.; Predeep, P.

2017-06-01

Mobility and current handling capabilities of Organic Field Effect Transistor (OFET) are vitally important parameters in the electrical performance where the material parameters and thickness of different layers play significant role. In this paper, we report the simulation of an OFET using multi physics tool, where the active layer is pentacene and Poly Methyl Methacrylate (PMMA) forms the dielectric. Electrical characterizations of the OFET on varying the thickness of the dielectric layer from 600nm to 400nm are simulated and drain current, transconductance and mobility are analyzed. In the study it is found that even though capacitance increases with reduction in dielectric layer thickness, the transconductance effect is reflected many more times in the mobility which in turn could be attributed to the variations in transverse electric field. The layer thickness below 300nm may result in gate leakage current points to the requirement of optimizing the thickness of different layers for better performance.

Performance improvement for solution-processed high-mobility ZnO thin-film transistors

NASA Astrophysics Data System (ADS)

Sha Li, Chen; Li, Yu Ning; Wu, Yi Liang; Ong, Beng S.; Loutfy, Rafik O.

2008-06-01

The fabrication technology of stable, non-toxic, transparent, high performance zinc oxide (ZnO) thin-film semiconductors via the solution process was investigated. Two methods, which were, respectively, annealing a spin-coated precursor solution and annealing a drop-coated precursor solution, were compared. The prepared ZnO thin-film semiconductor transistors have well-controlled, preferential crystal orientation and exhibit superior field-effect performance characteristics. But the ZnO thin-film transistor (TFT) fabricated by annealing a drop-coated precursor solution has a distinctly elevated linear mobility, which further approaches the saturated mobility, compared with that fabricated by annealing a spin-coated precursor solution. The performance of the solution-processed ZnO TFT was further improved when substituting the spin-coating process by the drop-coating process.

Silicon device performance measurements to support temperature range enhancement

NASA Technical Reports Server (NTRS)

Johnson, R. Wayne; Askew, Ray; Bromstead, James; Weir, Bennett

1991-01-01

The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

Carrier mobility in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Benwadih, Mohamed; Gwoziecki, Romain; Coppard, Romain; Minari, Takeo; Liu, Chuan; Tsukagoshi, Kazuhito; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-11-01

A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density dependences of mobility in organic transistors.

An Al₂O₃ Gating Substrate for the Greater Performance of Field Effect Transistors Based on Two-Dimensional Materials.

PubMed

Yang, Hang; Qin, Shiqiao; Zheng, Xiaoming; Wang, Guang; Tan, Yuan; Peng, Gang; Zhang, Xueao

2017-09-22

We fabricated 70 nm Al₂O₃ gated field effect transistors based on two-dimensional (2D) materials and characterized their optical and electrical properties. Studies show that the optical contrast of monolayer graphene on an Al₂O₃/Si substrate is superior to that on a traditional 300 nm SiO₂/Si substrate (2.4 times). Significantly, the transconductance of monolayer graphene transistors on the Al₂O₃/Si substrate shows an approximately 10-fold increase, due to a smaller dielectric thickness and a higher dielectric constant. Furthermore, this substrate is also suitable for other 2D materials, such as WS₂, and can enhance the transconductance remarkably by 61.3 times. These results demonstrate a new and ideal substrate for the fabrication of 2D materials-based electronic logic devices.

Field Effect Transistors Based on Composite Films of Poly(4-vinylphenol) with ZnO Nanoparticles

NASA Astrophysics Data System (ADS)

Boughias, Ouiza; Belkaid, Mohammed Said; Zirmi, Rachid; Trigaud, Thierry; Ratier, Bernard; Ayoub, Nouh

2018-04-01

In order to adjust the characteristic of pentacene thin film transistor, we modified the dielectric properties of the gate insulator, poly(4-vinylphenol), or PVP. PVP is an organic polymer with a low dielectric constant, limiting the performance of organic thin film transistors (OTFTs). To increase the dielectric constant of PVP, a controlled amount of ZnO nanoparticles was homogeneously dispersed in a dielectric layer. The effect of the concentration of ZnO on the relative permittivity of PVP was measured using impedance spectroscopy and it has been demonstrated that the permittivity increases from 3.6 to 5.5 with no percolation phenomenon even at a concentration of 50 vol.%. The performance of OTFTs in terms of charge carrier mobility, threshold voltage and linkage current was evaluated. The results indicate a dramatic increase in both the field effect mobility and the linkage current by a factor of 10. It has been demonstrated that the threshold voltage can be adjusted. It shifts from 8 to 0 when the volume concentration of ZnO varied from 0 vol.% to 50 vol.%.

Sub-parts per million NO2 chemi-transistor sensors based on composite porous silicon/gold nanostructures prepared by metal-assisted etching.

PubMed

Sainato, Michela; Strambini, Lucanos Marsilio; Rella, Simona; Mazzotta, Elisabetta; Barillaro, Giuseppe

2015-04-08

Surface doping of nano/mesostructured materials with metal nanoparticles to promote and optimize chemi-transistor sensing performance represents the most advanced research trend in the field of solid-state chemical sensing. In spite of the promising results emerging from metal-doping of a number of nanostructured semiconductors, its applicability to silicon-based chemi-transistor sensors has been hindered so far by the difficulties in integrating the composite metal-silicon nanostructures using the complementary metal-oxide-semiconductor (CMOS) technology. Here we propose a facile and effective top-down method for the high-yield fabrication of chemi-transistor sensors making use of composite porous silicon/gold nanostructures (cSiAuNs) acting as sensing gate. In particular, we investigate the integration of cSiAuNs synthesized by metal-assisted etching (MAE), using gold nanoparticles (NPs) as catalyst, in solid-state junction-field-effect transistors (JFETs), aimed at the detection of NO2 down to 100 parts per billion (ppb). The chemi-transistor sensors, namely cSiAuJFETs, are CMOS compatible, operate at room temperature, and are reliable, sensitive, and fully recoverable for the detection of NO2 at concentrations between 100 and 500 ppb, up to 48 h of continuous operation.

Spin-dependent transport and current modulation in a current-in-plane spin-valve field-effect transistor

NASA Astrophysics Data System (ADS)

Kanaki, Toshiki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2016-10-01

We propose a current-in-plane spin-valve field-effect transistor (CIP-SV-FET), which is composed of a ferromagnet/nonferromagnet/ferromagnet trilayer structure and a gate electrode. This is a promising device alternative to spin metal-oxide-semiconductor field-effect transistors. Here, we fabricate a ferromagnetic-semiconductor GaMnAs-based CIP-SV-FET and demonstrate its basic operation of the resistance modulation both by the magnetization configuration and by the gate electric field. Furthermore, we present the electric-field-assisted magnetization reversal in this device.

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

2014-05-21

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Organic field-effect transistors: a combined study on short-channel effects and the influence of substrate pre-treatment on ambient stability

NASA Astrophysics Data System (ADS)

Klug, A.; Meingast, A.; Wurzinger, G.; Blümel, A.; Schmoltner, K.; Scherf, U.; List, E. J. W.

2011-10-01

For high-performance low-cost applications based on organic field-effect transistors (OFETs) and corresponding sensors essential properties of the applied semiconducting materials include solution-processability, high field-effect mobility, compatibility with adjacent layers and stability with respect to ambient conditions. In this combined study regioregular poly(3-hexylthiophene)- and pentacene-based bottom-gate bottom-contact OFETs with various channel lengths are thoroughly investigated with respect to short-channel effects and the implications of dielectric surface modification with hexamethyldisilazane (HMDS) on device performance. In addition, the influences of oxygen, moisture and HMDStreatment on the ambient stability of the devices are evaluated in detail. While OFETs without surface modification exhibited the expected degradation behavior upon air exposure mainly due to oxygen/moisture-induced doping or charge-carrier trapping, the stability of the investigated semiconductors was found to be distinctly increased when the substrate surface was hydrophobized. The presented results thoroughly summarize important issues which have to be considered when selecting semiconducting materials for high-performance OFETs and OFET-based sensors.

Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

NASA Astrophysics Data System (ADS)

Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

2017-04-01

A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

Dependence of interface charge trapping on channel engineering in pentacene field effect transistors.

PubMed

Lee, Sunwoo; Park, Junghyuck; Park, In-Sung; Ahn, Jinho

2014-07-01

We investigate the dependence of charge carrier mobility by trap states at various interface regions through channel engineering. Prior to evaluation of interface trap density, the electrical performance in pentaene field effect transistors (FET) with high-k gate oxide are also investigated depending on four channel engineering. As a channel engineering, gas treatment, coatings of thin polymer layer, and chemical surface modification using small molecules were carried out. After channel engineering, the performance of device as well as interface trap density calculated by conductance method are remarkably improved. It is found that the reduced interface trap density is closely related to decreasing the sub-threshold swing and improving the mobility. Particularly, we also found that performance of device such as mobility, subthreshold swing, and interface trap density after gas same is comparable to those of OTS.

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

2005-01-01

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less

Performance characteristics of a nanoscale double-gate reconfigurable array

NASA Astrophysics Data System (ADS)

Beckett, Paul

2008-12-01

The double gate transistor is a promising device applicable to deep sub-micron design due to its inherent resistance to short-channel effects and superior subthreshold performance. Using both TCAD and SPICE circuit simulation, it is shown that the characteristics of fully depleted dual-gate thin-body Schottky barrier silicon transistors will not only uncouple the conflicting requirements of high performance and low standby power in digital logic, but will also allow the development of a locally-connected reconfigurable computing mesh. The magnitude of the threshold shift effect will scale with device dimensions and will remain compatible with oxide reliability constraints. A field-programmable architecture based on the double gate transistor is described in which the operating point of the circuit is biased via one gate while the other gate is used to form the logic array, such that complex heterogeneous computing functions may be developed from this homogeneous, mesh-connected organization.

Human dopamine receptor nanovesicles for gate-potential modulators in high-performance field-effect transistor biosensors

NASA Astrophysics Data System (ADS)

Park, Seon Joo; Song, Hyun Seok; Kwon, Oh Seok; Chung, Ji Hyun; Lee, Seung Hwan; An, Ji Hyun; Ahn, Sae Ryun; Lee, Ji Eun; Yoon, Hyeonseok; Park, Tai Hyun; Jang, Jyongsik

2014-03-01

The development of molecular detection that allows rapid responses with high sensitivity and selectivity remains challenging. Herein, we demonstrate the strategy of novel bio-nanotechnology to successfully fabricate high-performance dopamine (DA) biosensor using DA Receptor-containing uniform-particle-shaped Nanovesicles-immobilized Carboxylated poly(3,4-ethylenedioxythiophene) (CPEDOT) NTs (DRNCNs). DA molecules are commonly associated with serious diseases, such as Parkinson's and Alzheimer's diseases. For the first time, nanovesicles containing a human DA receptor D1 (hDRD1) were successfully constructed from HEK-293 cells, stably expressing hDRD1. The nanovesicles containing hDRD1 as gate-potential modulator on the conducting polymer (CP) nanomaterial transistors provided high-performance responses to DA molecule owing to their uniform, monodispersive morphologies and outstanding discrimination ability. Specifically, the DRNCNs were integrated into a liquid-ion gated field-effect transistor (FET) system via immobilization and attachment processes, leading to high sensitivity and excellent selectivity toward DA in liquid state. Unprecedentedly, the minimum detectable level (MDL) from the field-induced DA responses was as low as 10 pM in real- time, which is 10 times more sensitive than that of previously reported CP based-DA biosensors. Moreover, the FET-type DRNCN biosensor had a rapid response time (<1 s) and showed excellent selectivity in human serum.

Analysis of electric field distribution in GaAs metal-semiconductor field effect transistor with a field-modulating plate

NASA Astrophysics Data System (ADS)

Hori, Yasuko; Kuzuhara, Masaaki; Ando, Yuji; Mizuta, Masashi

2000-04-01

Electric field distribution in the channel of a field effect transistor (FET) with a field-modulating plate (FP) has been theoretically investigated using a two-dimensional ensemble Monte Carlo simulation. This analysis revealed that the introduction of FP is effective in canceling the influence of surface traps under forward bias conditions and in reducing the electric field intensity at the drain side of the gate edge under pinch-off bias conditions. This study also found that a partial overlap of the high-field region under the gate and that at the FP electrode is important for reducing the electric field intensity. The optimized metal-semiconductor FET with FP (FPFET) (LGF˜0.2 μm) exhibited a much lower peak electric field intensity than a conventional metal-semiconductor FET. Based on these numerically calculated results, we have proposed a design procedure to optimize the power FPFET structure with extremely high breakdown voltages while maintaining reasonable gain performance.

Interplay between Vacuum-Grown Monolayers of Alkylphosphonic Acids and the Performance of Organic Transistors Based on Dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene.

PubMed

Hannah, Stuart; Cardona, Javier; Lamprou, Dimitrios A; Šutta, Pavol; Baran, Peter; Al Ruzaiqi, Afra; Johnston, Karen; Gleskova, Helena

2016-09-28

Monolayers of six alkylphosphonic acids ranging from C8 to C18 were prepared by vacuum evaporation and incorporated into low-voltage organic field-effect transistors based on dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). Similar to solution-assembled monolayers, the molecular order for vacuum-deposited monolayers improved with increasing length of the aliphatic tail. At the same time, Fourier transform infrared (FTIR) measurements suggested lower molecular coverage for longer phosphonic acids. The comparison of FTIR and vibration frequencies calculated by density functional theory indicated that monodentate bonding does not occur for any phosphonic acid. All monolayers exhibited low surface energy of ∼17.5 mJ/m(2) with a dominating Lifshitz-van der Waals component. Their surface roughness was comparable, while the nanomechanical properties were varied but not correlated to the length of the molecule. However, large improvement in transistor performance was observed with increasing length of the aliphatic tail. Upon going from C8 to C18, the mean threshold voltage decreased from -1.37 to -1.24 V, the field-effect mobility increased from 0.03 to 0.33 cm(2)/(V·s), the off-current decreased from ∼8 × 10(-13) to ∼3 × 10(-13) A, and for transistors with L = 30 μm the on-current increased from ∼3 × 10(-8) to ∼2 × 10(-6) A, and the on/off-current ratio increased from ∼3 × 10(4) to ∼4 × 10(6). Similarly, transistors with longer phosphonic acids exhibited much better air and bias-stress stability. The achieved transistor performance opens up a completely "dry" fabrication route for ultrathin dielectrics and low-voltage organic transistors.

Analysis of long-channel nanotube field-effect-transistors (NT FETs)

NASA Technical Reports Server (NTRS)

Toshishige, Yamada; Kwak, Dochan (Technical Monitor)

2001-01-01

This viewgraph presentation provides an analysis of long-channel nanotube (NT) field effect transistors (FET) from NASA's Ames Research Center. The structure of such a transistor including the electrode contact, 1D junction, and the planar junction is outlined. Also mentioned are various characteristics of a nanotube tip-equipped scanning tunnel microscope (STM).

Improvement in top-gate MoS2 transistor performance due to high quality backside Al2O3 layer

NASA Astrophysics Data System (ADS)

Bolshakov, Pavel; Zhao, Peng; Azcatl, Angelica; Hurley, Paul K.; Wallace, Robert M.; Young, Chadwin D.

2017-07-01

A high quality Al2O3 layer is developed to achieve high performance in top-gate MoS2 transistors. Compared with top-gate MoS2 field effect transistors on a SiO2 layer, the intrinsic mobility and subthreshold slope were greatly improved in high-k backside layer devices. A forming gas anneal is found to enhance device performance due to a reduction in the charge trap density of the backside dielectric. The major improvements in device performance are ascribed to the forming gas anneal and the high-k dielectric screening effect of the backside Al2O3 layer. Top-gate devices built upon these stacks exhibit a near-ideal subthreshold slope of ˜69 mV/dec and a high Y-Function extracted intrinsic carrier mobility (μo) of 145 cm2/V.s, indicating a positive influence on top-gate device performance even without any backside bias.

Optimization of L-shaped tunneling field-effect transistor for ambipolar current suppression and Analog/RF performance enhancement

NASA Astrophysics Data System (ADS)

Li, Cong; Zhao, Xiaolong; Zhuang, Yiqi; Yan, Zhirui; Guo, Jiaming; Han, Ru

2018-03-01

L-shaped tunneling field-effect transistor (LTFET) has larger tunnel area than planar TFET, which leads to enhanced on-current ION . However, LTFET suffers from severe ambipolar behavior, which needs to be further optimized for low power and high-frequency applications. In this paper, both hetero-gate-dielectric (HGD) and lightly doped drain (LDD) structures are introduced into LTFET for suppression of ambipolarity and improvement of analog/RF performance of LTFET. Current-voltage characteristics, the variation of energy band diagrams, distribution of band-to-band tunneling (BTBT) generation and distribution of electric field are analyzed for our proposed HGD-LDD-LTFET. In addition, the effect of LDD on the ambipolar behavior of LTFET is investigated, the length and doping concentration of LDD is also optimized for better suppression of ambipolar current. Finally, analog/RF performance of HGD-LDD-LTFET are studied in terms of gate-source capacitance, gate-drain capacitance, cut-off frequency, and gain bandwidth production. TCAD simulation results show that HGD-LDD-LTFET not only drastically suppresses ambipolar current but also improves analog/RF performance compared with conventional LTFET.

Enhancing the pH sensitivity by laterally synergic modulation in dual-gate electric-double-layer transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Ning; Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201; Hui Liu, Yang

2015-02-16

The sensitivity of a standard ion-sensitive field-effect transistor is limited to be 59.2 mV/pH (Nernst limit) at room temperature. Here, a concept based on laterally synergic electric-double-layer (EDL) modulation is proposed in order to overcome the Nernst limit. Indium-zinc-oxide EDL transistors with two laterally coupled gates are fabricated, and the synergic modulation behaviors of the two asymmetric gates are investigated. A high sensitivity of ∼168 mV/pH is realized in the dual-gate operation mode. Laterally synergic modulation in oxide-based EDL transistors is interesting for high-performance bio-chemical sensors.

Enhancing Photoresponsivity of Self-Aligned MoS2 Field-Effect Transistors by Piezo-Phototronic Effect from GaN Nanowires.

PubMed

Liu, Xingqiang; Yang, Xiaonian; Gao, Guoyun; Yang, Zhenyu; Liu, Haitao; Li, Qiang; Lou, Zheng; Shen, Guozhen; Liao, Lei; Pan, Caofeng; Lin Wang, Zhong

2016-08-23

We report high-performance self-aligned MoS2 field-effect transistors (FETs) with enhanced photoresponsivity by the piezo-phototronic effect. The FETs are fabricated based on monolayer MoS2 with a piezoelectric GaN nanowire (NW) as the local gate, and a self-aligned process is employed to define the source/drain electrodes. The fabrication method allows the preservation of the intrinsic property of MoS2 and suppresses the scattering center density in the MoS2/GaN interface, which results in high electrical and photoelectric performances. MoS2 FETs with channel lengths of ∼200 nm have been fabricated with a small subthreshold slope of 64 mV/dec. The photoresponsivity is 443.3 A·W(-1), with a fast response and recovery time of ∼5 ms under 550 nm light illumination. When strain is introduced into the GaN NW, the photoresponsivity is further enhanced to 734.5 A·W(-1) and maintains consistent response and recovery time, which is comparable with that of the mechanical exfoliation of MoS2 transistors. The approach presented here opens an avenue to high-performance top-gated piezo-enhanced MoS2 photodetectors.

Influence of thermocleavable functionality on organic field-effect transistor performance of small molecules

NASA Astrophysics Data System (ADS)

Mahale, Rajashree Y.; Dharmapurikar, Satej S.; Chini, Mrinmoy Kumar; Venugopalan, Vijay

2017-06-01

Diketopyrrolopyrrole based donor-acceptor-donor conjugated small molecules using ethylene dioxythiophene as a donor was synthesized. Electron deficient diketopyrrolopyrrole unit was substituted with thermocleavable (tert-butyl acetate) side chains. The thermal treatment of the molecules at 160 °C eliminated the tert-butyl ester group results in the formation of corresponding acid. Optical and theoretical studies revealed that the molecules adopted a change in molecular arrangement after thermolysis. The conjugated small molecules possessed p-channel charge transport characteristics in organic field effect transistors. The charge carrier mobility was increased after thermolysis of tert-butyl ester group to 5.07 × 10-5 cm2/V s.

Rylene and related diimides for organic electronics.

PubMed

Zhan, Xiaowei; Facchetti, Antonio; Barlow, Stephen; Marks, Tobin J; Ratner, Mark A; Wasielewski, Michael R; Marder, Seth R

2011-01-11

Organic electron-transporting materials are essential for the fabrication of organic p-n junctions, photovoltaic cells, n-channel field-effect transistors, and complementary logic circuits. Rylene diimides are a robust, versatile class of polycyclic aromatic electron-transport materials with excellent thermal and oxidative stability, high electron affinities, and, in many cases, high electron mobilities; they are, therefore, promising candidates for a variety of organic electronics applications. In this review, recent developments in the area of high-electron-mobility diimides based on rylenes and related aromatic cores, particularly perylene- and naphthalene-diimide-based small molecules and polymers, for application in high-performance organic field-effect transistors and photovoltaic cells are summarized and analyzed.

Scaling of Device Variability and Subthreshold Swing in Ballistic Carbon Nanotube Transistors

NASA Astrophysics Data System (ADS)

Cao, Qing; Tersoff, Jerry; Han, Shu-Jen; Penumatcha, Ashish V.

2015-08-01

In field-effect transistors, the inherent randomness of dopants and other charges is a major cause of device-to-device variability. For a quasi-one-dimensional device such as carbon nanotube transistors, even a single charge can drastically change the performance, making this a critical issue for their adoption as a practical technology. Here we calculate the effect of the random charges at the gate-oxide surface in ballistic carbon nanotube transistors, finding good agreement with the variability statistics in recent experiments. A combination of experimental and simulation results further reveals that these random charges are also a major factor limiting the subthreshold swing for nanotube transistors fabricated on thin gate dielectrics. We then establish that the scaling of the nanotube device uniformity with the gate dielectric, fixed-charge density, and device dimension is qualitatively different from conventional silicon transistors, reflecting the very different device physics of a ballistic transistor with a quasi-one-dimensional channel. The combination of gate-oxide scaling and improved control of fixed-charge density should provide the uniformity needed for large-scale integration of such novel one-dimensional transistors even at extremely scaled device dimensions.

Heterogeneous Integration of Epitaxial Ge on Si using AlAs/GaAs Buffer Architecture: Suitability for Low-power Fin Field-Effect Transistors

PubMed Central

Hudait, Mantu K.; Clavel, Michael; Goley, Patrick; Jain, Nikhil; Zhu, Yan

2014-01-01

Germanium-based materials and device architectures have recently appeared as exciting material systems for future low-power nanoscale transistors and photonic devices. Heterogeneous integration of germanium (Ge)-based materials on silicon (Si) using large bandgap buffer architectures could enable the monolithic integration of electronics and photonics. In this paper, we report on the heterogeneous integration of device-quality epitaxial Ge on Si using composite AlAs/GaAs large bandgap buffer, grown by molecular beam epitaxy that is suitable for fabricating low-power fin field-effect transistors required for continuing transistor miniaturization. The superior structural quality of the integrated Ge on Si using AlAs/GaAs was demonstrated using high-resolution x-ray diffraction analysis. High-resolution transmission electron microscopy confirmed relaxed Ge with high crystalline quality and a sharp Ge/AlAs heterointerface. X-ray photoelectron spectroscopy demonstrated a large valence band offset at the Ge/AlAs interface, as compared to Ge/GaAs heterostructure, which is a prerequisite for superior carrier confinement. The temperature-dependent electrical transport properties of the n-type Ge layer demonstrated a Hall mobility of 370 cm2/Vs at 290 K and 457 cm2/Vs at 90 K, which suggests epitaxial Ge grown on Si using an AlAs/GaAs buffer architecture would be a promising candidate for next-generation high-performance and energy-efficient fin field-effect transistor applications. PMID:25376723

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

Repurposing compact discs as master molds to fabricate high-performance organic nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Kyunghun; Cho, Jinhwi; Jhon, Heesauk; Jeon, Jongwook; Kang, Myounggon; Eon Park, Chan; Lee, Jihoon; An, Tae Kyu

2017-05-01

Organic field-effect transistors (OFETs) have been developed over the past few decades due to their potential applications in future electronics such as wearable and foldable electronics. As the electrical performance of OFETs has improved, patterning organic semiconducting crystals has become a key issue for their commercialization. However, conventional soft lithographic techniques have required the use of expensive processes to fabricate high-resolution master molds. In this study, we demonstrated a cost-effective method to prepare nanopatterned master molds for the fabrication of high-performance nanowire OFETs. We repurposed commercially available compact discs (CDs) as master molds because they already have linear nanopatterns on their surface. Flexible nanopatterned templates were replicated from the CDs using UV-imprint lithography. Subsequently, 6,13-bis-(triisopropylsilylethynyl) pentacene nanowires (NWs) were grown from the templates using a capillary force-assisted lithographic technique. The NW-based OFETs showed a high average field-effect mobility of 2.04 cm2 V-1 s-1. This result was attributed to the high crystallinity of the NWs and to their crystal orientation favorable for charge transport.

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE PAGES

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng; ...

2017-07-06

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

Computational study of graphene-based vertical field effect transistor

NASA Astrophysics Data System (ADS)

Chen, Wenchao; Rinzler, Andrew; Guo, Jing

2013-03-01

Poisson and drift-diffusion equations are solved in a three-dimensional device structure to simulate graphene-based vertical field effect transistors (GVFETs). Operation mechanisms of the GVFET with and without punched holes in the graphene source contact are presented and compared. The graphene-channel Schottky barrier can be modulated by gate electric field due to graphene's low density of states. For the graphene contact with punched holes, the contact barrier thinning and lowering around punched hole edge allow orders of magnitude higher tunneling current compared to the region away from the punched hole edge, which is responsible for significant performance improvement as already verified by experiments. Small hole size is preferred due to less electrostatic screening from channel inversion layer, which gives large electric field around the punched hole edge, thus, leading to a thinner and lower barrier. Bilayer and trilayer graphenes as the source contact degrade the performance improvement because stronger electrostatic screening leads to smaller contact barrier lowering and thinning. High punched hole area percentage improves current performance by allowing more gate electric field to modulate the graphene-channel barrier. Low effective mass channel material gives better on-off current ratio.

Organic field effect transistor with ultra high amplification

NASA Astrophysics Data System (ADS)

Torricelli, Fabrizio

2016-09-01

High-gain transistors are essential for the large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show organic transistors fabricated on plastic foils enabling unipolar amplifiers with ultra-gain. The proposed approach is general and opens up new opportunities for ultra-large signal amplification in organic circuits and sensors.

EHWPACK: An evolvable hardware environment using the SPICE simulator and the Field Programmable Transistor Array

NASA Technical Reports Server (NTRS)

Keymeulen, D.; Klimeck, G.; Zebulum, R.; Stoica, A.; Jin, Y.; Lazaro, C.

2000-01-01

This paper describes the EHW development system, a tool that performs the evolutionary synthesis of electronic circuits, using the SPICE simulator and the Field Programmable Transistor Array hardware (FPTA) developed at JPL.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis.

PubMed

Zhang, Yanjun; Clausmeyer, Jan; Babakinejad, Babak; Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V; Korchev, Yuri

2016-03-22

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis

PubMed Central

Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R. Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V.; Korchev, Yuri

2016-01-01

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements. PMID:26816294

Soft-type trap-induced degradation of MoS2 field effect transistors.

PubMed

Cho, Young-Hoon; Ryu, Min-Yeul; Lee, Kook Jin; Park, So Jeong; Choi, Jun Hee; Lee, Byung-Chul; Kim, Wungyeon; Kim, Gyu-Tae

2018-06-01

The practical applicability of electronic devices is largely determined by the reliability of field effect transistors (FETs), necessitating constant searches for new and better-performing semiconductors. We investigated the stress-induced degradation of MoS 2 multilayer FETs, revealing a steady decrease of drain current by 56% from the initial value after 30 min. The drain current recovers to the initial state when the transistor is completely turned off, indicating the roles of soft-traps in the apparent degradation. The noise current power spectrum follows the model of carrier number fluctuation-correlated mobility fluctuation (CNF-CMF) regardless of stress time. However, the reduction of the drain current was well fitted to the increase of the trap density based on the CNF-CMF model, attributing the presence of the soft-type traps of dielectric oxides to the degradation of the MoS 2 FETs.

Soft-type trap-induced degradation of MoS2 field effect transistors

NASA Astrophysics Data System (ADS)

Cho, Young-Hoon; Ryu, Min-Yeul; Lee, Kook Jin; Park, So Jeong; Choi, Jun Hee; Lee, Byung-Chul; Kim, Wungyeon; Kim, Gyu-Tae

2018-06-01

The practical applicability of electronic devices is largely determined by the reliability of field effect transistors (FETs), necessitating constant searches for new and better-performing semiconductors. We investigated the stress-induced degradation of MoS2 multilayer FETs, revealing a steady decrease of drain current by 56% from the initial value after 30 min. The drain current recovers to the initial state when the transistor is completely turned off, indicating the roles of soft-traps in the apparent degradation. The noise current power spectrum follows the model of carrier number fluctuation–correlated mobility fluctuation (CNF–CMF) regardless of stress time. However, the reduction of the drain current was well fitted to the increase of the trap density based on the CNF–CMF model, attributing the presence of the soft-type traps of dielectric oxides to the degradation of the MoS2 FETs.

An Al2O3 Gating Substrate for the Greater Performance of Field Effect Transistors Based on Two-Dimensional Materials

PubMed Central

Zheng, Xiaoming; Wang, Guang; Tan, Yuan; Zhang, Xueao

2017-01-01

We fabricated 70 nm Al2O3 gated field effect transistors based on two-dimensional (2D) materials and characterized their optical and electrical properties. Studies show that the optical contrast of monolayer graphene on an Al2O3/Si substrate is superior to that on a traditional 300 nm SiO2/Si substrate (2.4 times). Significantly, the transconductance of monolayer graphene transistors on the Al2O3/Si substrate shows an approximately 10-fold increase, due to a smaller dielectric thickness and a higher dielectric constant. Furthermore, this substrate is also suitable for other 2D materials, such as WS2, and can enhance the transconductance remarkably by 61.3 times. These results demonstrate a new and ideal substrate for the fabrication of 2D materials-based electronic logic devices. PMID:28937619

Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Nigam, Kaushal; Pandey, Sunil; Kondekar, P. N.; Sharma, Dheeraj

2016-09-01

The conventional tunnel field-effect transistors (TFETs) have shown potential to scale down in sub-22 nm regime due to its lower sub-threshold slope and robustness against short-channel effects (SCEs), however, sensitivity towards temperature variation is a major concern. Therefore, for the first time, we investigate temperature sensitivity analysis of a polarity controlled electrostatically doped tunnel field-effect transistor (ED-TFET). Different performance metrics and analog/RF figure-of-merits were considered and compared for both devices, and simulations were performed using Silvaco ATLAS device tool. We found that the variation in ON-state current in ED-TFET is almost temperature independent due to electrostatically doped mechanism, while, it increases in conventional TFET at higher temperature. Above room temperature, the variation in ION, IOFF, and SS sensitivity in ED-TFET are only 0.11%/K, 2.21%/K, and 0.63%/K, while, in conventional TFET the variations are 0.43%/K, 2.99%/K, and 0.71%/K, respectively. However, below room temperature, the variation in ED-TFET ION is 0.195%/K compared to 0.27%/K of conventional TFET. Moreover, it is analysed that the incomplete ionization effect in conventional TFET severely affects the drive current and the threshold voltage, while, ED-TFET remains unaffected. Hence, the proposed ED-TFET is less sensitive towards temperature variation and can be used for cryogenics as well as for high temperature applications.

Investigation of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors for logic application

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2014-01-01

DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.

The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

NASA Astrophysics Data System (ADS)

Chang, Yi-Kuei; Hong, Franklin Chau-Nan

2009-05-01

A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min-1), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 105, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm2 V-1 s-1. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing.

PubMed

Chang, Yi-Kuei; Hong, Franklin Chau-Nan

2009-05-13

A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min(-1)), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10(5), a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm(2) V(-1) s(-1). The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

Charge transport and trapping in organic field effect transistors exposed to polar analytes

NASA Astrophysics Data System (ADS)

Duarte, Davianne; Sharma, Deepak; Cobb, Brian; Dodabalapur, Ananth

2011-03-01

Pentacene based organic thin-film transistors were used to study the effects of polar analytes on charge transport and trapping behavior during vapor sensing. Three sets of devices with differing morphology and mobility (0.001-0.5 cm2/V s) were employed. All devices show enhanced trapping upon exposure to analyte molecules. The organic field effect transistors with different mobilities also provide evidence for morphology dependent partition coefficients. This study helps provide a physical basis for many reports on organic transistor based sensor response.

Multiple-channel detection of cellular activities by ion-sensitive transistors

NASA Astrophysics Data System (ADS)

Machida, Satoru; Shimada, Hideto; Motoyama, Yumi

2018-04-01

An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.

Enhanced performance of solution-processed organic thin-film transistors with a low-temperature-annealed alumina interlayer between the polyimide gate insulator and the semiconductor.

PubMed

Yoon, Jun-Young; Jeong, Sunho; Lee, Sun Sook; Kim, Yun Ho; Ka, Jae-Won; Yi, Mi Hye; Jang, Kwang-Suk

2013-06-12

We studied a low-temperature-annealed sol-gel-derived alumina interlayer between the organic semiconductor and the organic gate insulator for high-performance organic thin-film transistors. The alumina interlayer was deposited on the polyimide gate insulator by a simple spin-coating and 200 °C-annealing process. The leakage current density decreased by the interlayer deposition: at 1 MV/cm, the leakage current densities of the polyimide and the alumina/polyimide gate insulators were 7.64 × 10(-7) and 3.01 × 10(-9) A/cm(2), respectively. For the first time, enhancement of the organic thin-film transistor performance by introduction of an inorganic interlayer between the organic semiconductor and the organic gate insulator was demonstrated: by introducing the interlayer, the field-effect mobility of the solution-processed organic thin-film transistor increased from 0.35 ± 0.15 to 1.35 ± 0.28 cm(2)/V·s. Our results suggest that inorganic interlayer deposition could be a simple and efficient surface treatment of organic gate insulators for enhancing the performance of solution-processed organic thin-film transistors.

A comparative study of spin coated and floating film transfer method coated poly (3-hexylthiophene)/poly (3-hexylthiophene)-nanofibers based field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tiwari, Shashi; Balasubramanian, S. K.; Takashima, Wataru

2014-09-07

A comparative study on electrical performance, optical properties, and surface morphology of poly(3-hexylthiophene) (P3HT) and P3HT-nanofibers based “normally on” type p-channel field effect transistors (FETs), fabricated by two different coating techniques has been reported here. Nanofibers are prepared in the laboratory with the approach of self-assembly of P3HT molecules into nanofibers in an appropriate solvent. P3HT (0.3 wt. %) and P3HT-nanofibers (∼0.25 wt. %) are used as semiconductor transport materials for deposition over FETs channel through spin coating as well as through our recently developed floating film transfer method (FTM). FETs fabricated using FTM show superior performance compared to spin coated devices;more » however, the mobility of FTM films based FETs is comparable to the mobility of spin coated one. The devices based on P3HT-nanofibers (using both the techniques) show much better performance in comparison to P3HT FETs. The best performance among all the fabricated organic field effect transistors are observed for FTM coated P3HT-nanofibers FETs. This improved performance of nanofiber-FETs is due to ordering of fibers and also due to the fact that fibers offer excellent charge transport facility because of point to point transmission. The optical properties and structural morphologies (P3HT and P3HT-nanofibers) are studied using UV-visible absorption spectrophotometer and atomic force microscopy , respectively. Coating techniques and effect of fiber formation for organic conductors give information for fabrication of organic devices with improved performance.« less

Trap density of states in small-molecule organic semiconductors: A quantitative comparison of thin-film transistors with single crystals

NASA Astrophysics Data System (ADS)

Kalb, Wolfgang L.; Haas, Simon; Krellner, Cornelius; Mathis, Thomas; Batlogg, Bertram

2010-04-01

We show that it is possible to reach one of the ultimate goals of organic electronics: producing organic field-effect transistors with trap densities as low as in the bulk of single crystals. We studied the spectral density of localized states in the band gap [trap density of states (trap DOS)] of small-molecule organic semiconductors as derived from electrical characteristics of organic field-effect transistors or from space-charge-limited current measurements. This was done by comparing data from a large number of samples including thin-film transistors (TFT’s), single crystal field-effect transistors (SC-FET’s) and bulk samples. The compilation of all data strongly suggests that structural defects associated with grain boundaries are the main cause of “fast” hole traps in TFT’s made with vacuum-evaporated pentacene. For high-performance transistors made with small-molecule semiconductors such as rubrene it is essential to reduce the dipolar disorder caused by water adsorbed on the gate dielectric surface. In samples with very low trap densities, we sometimes observe a steep increase in the trap DOS very close (<0.15eV) to the mobility edge with a characteristic slope of 10-20 meV. It is discussed to what degree band broadening due to the thermal fluctuation of the intermolecular transfer integral is reflected in this steep increase in the trap DOS. Moreover, we show that the trap DOS in TFT’s with small-molecule semiconductors is very similar to the trap DOS in hydrogenated amorphous silicon even though polycrystalline films of small-molecules with van der Waals-type interaction on the one hand are compared with covalently bound amorphous silicon on the other hand.

Electrolyte-gated transistors based on conducting polymer nanowire junction arrays.

PubMed

Alam, Maksudul M; Wang, Jun; Guo, Yaoyao; Lee, Stephanie P; Tseng, Hsian-Rong

2005-07-07

In this study, we describe the electrolyte gating and doping effects of transistors based on conducting polymer nanowire electrode junction arrays in buffered aqueous media. Conducting polymer nanowires including polyaniline, polypyrrole, and poly(ethylenedioxythiophene) were investigated. In the presence of a positive gate bias, the device exhibits a large on/off current ratio of 978 for polyaniline nanowire-based transistors; these values vary according to the acidity of the gate medium. We attribute these efficient electrolyte gating and doping effects to the electrochemically fabricated nanostructures of conducting polymer nanowires. This study demonstrates that two-terminal devices can be easily converted into three-terminal transistors by simply immersing the device into an electrolyte solution along with a gate electrode. Here, the field-induced modulation can be applied for signal amplification to enhance the device performance.

Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat D.

2008-01-01

There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.

Balanced Ambipolar Organic Field-Effect Transistors by Polymer Preaggregation.

PubMed

Janasz, Lukasz; Luczak, Adam; Marszalek, Tomasz; Dupont, Bertrand G R; Jung, Jaroslaw; Ulanski, Jacek; Pisula, Wojciech

2017-06-21

Ambipolar organic field-effect transistors (OFETs) based on heterojunction active films still suffer from an imbalance in the transport of electrons and holes. This problem is related to an uncontrolled phase separation between the donor and acceptor organic semiconductors in the thin films. In this work, we have developed a concept to improve the phase separation in heterojunction transistors to enhance their ambipolar performance. This concept is based on preaggregation of the donor polymer, in this case poly(3-hexylthiophene) (P3HT), before solution mixing with the small-molecular-weight acceptor, phenyl-C61-butyric acid methyl ester (PCBM). The resulting heterojunction transistor morphology consists of self-assembled P3HT fibers embedded in a PCBM matrix, ensuring balanced mobilities reaching 0.01 cm 2 /V s for both holes and electrons. These are the highest mobility values reported so far for ambipolar OFETs based on P3HT/PCBM blends. Preaggregation of the conjugated polymer before fabricating binary blends can be regarded as a general concept for a wider range of semiconducting systems applicable in organic electronic devices.

Effect of direct current sputtering power on the behavior of amorphous indium-gallium-zinc-oxide thin-film transistors under negative bias illumination stress: A combination of experimental analyses and device simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jang, Jun Tae; Kim, Dong Myong; Choi, Sung-Jin

The effect of direct current sputtering power of indium-gallium-zinc-oxide (IGZO) on the performance and stability of the corresponding thin-film transistor devices was studied. The field effect mobility increases as the IGZO sputter power increases, at the expense of device reliability under negative bias illumination stress (NBIS). Device simulation based on the extracted sub-gap density of states indicates that the field effect mobility is improved as a result of the number of acceptor-like states decreasing. The degradation by NBIS is suggested to be induced by the formation of peroxides in IGZO rather than charge trapping.

Near-Infrared to Visible Organic Upconversion Devices Based on Organic Light-Emitting Field Effect Transistors.

PubMed

Li, Dongwei; Hu, Yongsheng; Zhang, Nan; Lv, Ying; Lin, Jie; Guo, Xiaoyang; Fan, Yi; Luo, Jinsong; Liu, Xingyuan

2017-10-18

The near-infrared (NIR) to visible upconversion devices have attracted great attention because of their potential applications in the fields of night vision, medical imaging, and military security. Herein, a novel all-organic upconversion device architecture has been first proposed and developed by incorporating a NIR absorption layer between the carrier transport layer and the emission layer in heterostructured organic light-emitting field effect transistors (OLEFETs). The as-prepared devices show a typical photon-to-photon upconversion efficiency as high as 7% (maximum of 28.7% under low incident NIR power intensity) and millisecond-scale response time, which are the highest upconversion efficiency and one of the fastest response time among organic upconversion devices as referred to the previous reports up to now. The high upconversion performance mainly originates from the gain mechanism of field-effect transistor structures and the unique advantage of OLEFETs to balance between the photodetection and light emission. Meanwhile, the strategy of OLEFETs also offers the advantage of high integration so that no extra OLED is needed in the organic upconversion devices. The results would pave way for low-cost, flexible and portable organic upconversion devices with high efficiency and simplified processing.

A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell.

PubMed

Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis

2014-03-28

Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

Quasi-free-standing bilayer epitaxial graphene field-effect transistors on 4H-SiC (0001) substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yu, C.; Li, J.; Song, X. B.

2016-01-04

Quasi-free-standing epitaxial graphene grown on wide band gap semiconductor SiC demonstrates high carrier mobility and good material uniformity, which make it promising for graphene-based electronic devices. In this work, quasi-free-standing bilayer epitaxial graphene is prepared and its transistors with gate lengths of 100 nm and 200 nm are fabricated and characterized. The 100 nm gate length graphene transistor shows improved DC and RF performances including a maximum current density I{sub ds} of 4.2 A/mm, and a peak transconductance g{sub m} of 2880 mS/mm. Intrinsic current-gain cutoff frequency f{sub T} of 407 GHz is obtained. The exciting DC and RF performances obtained in the quasi-free-standingmore » bilayer epitaxial graphene transistor show the great application potential of this material system.« less

Top-gate organic depletion and inversion transistors with doped channel and injection contact

NASA Astrophysics Data System (ADS)

Liu, Xuhai; Kasemann, Daniel; Leo, Karl

2015-03-01

Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

Lateral energy band profile modulation in tunnel field effect transistors based on gate structure engineering

NASA Astrophysics Data System (ADS)

Cui, Ning; Liang, Renrong; Wang, Jing; Xu, Jun

2012-06-01

Choosing novel materials and structures is important for enhancing the on-state current in tunnel field-effect transistors (TFETs). In this paper, we reveal that the on-state performance of TFETs is mainly determined by the energy band profile of the channel. According to this interpretation, we present a new concept of energy band profile modulation (BPM) achieved with gate structure engineering. It is believed that this approach can be used to suppress the ambipolar effect. Based on this method, a Si TFET device with a symmetrical tri-material-gate (TMG) structure is proposed. Two-dimensional numerical simulations demonstrated that the special band profile in this device can boost on-state performance, and it also suppresses the off-state current induced by the ambipolar effect. These unique advantages are maintained over a wide range of gate lengths and supply voltages. The BPM concept can serve as a guideline for improving the performance of nanoscale TFET devices.

A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dumitru, L. M.; Manoli, K.; Magliulo, M.

2015-01-01

A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.

Improved integration of ultra-thin high-k dielectrics in few-layer MoS2 FET by remote forming gas plasma pretreatment

NASA Astrophysics Data System (ADS)

Wang, Xiao; Zhang, Tian-Bao; Yang, Wen; Zhu, Hao; Chen, Lin; Sun, Qing-Qing; Zhang, David Wei

2017-01-01

The effective and high-quality integration of high-k dielectrics on two-dimensional (2D) crystals is essential to the device structure engineering and performance improvement of field-effect transistor (FET) based on the 2D semiconductors. We report a 2D MoS2 transistor with ultra-thin Al2O3 top-gate dielectric (6.1 nm) and extremely low leakage current. Remote forming gas plasma pretreatment was carried out prior to the atomic layer deposition, providing nucleation sites with the physically adsorbed ions on the MoS2 surface. The top gate MoS2 FET exhibited excellent electrical performance, including high on/off current ratio over 109, subthreshold swing of 85 mV/decade and field-effect mobility of 45.03 cm2/V s. Top gate leakage current less than 0.08 pA/μm2 at 4 MV/cm has been obtained, which is the smallest compared with the reported top-gated MoS2 transistors. Such an optimized integration of high-k dielectric in 2D semiconductor FET with enhanced performance is very attractive, and it paves the way towards the realization of more advanced 2D nanoelectronic devices and integrated circuits.

Position-dependent performance of copper phthalocyanine based field-effect transistors by gold nanoparticles modification.

PubMed

Luo, Xiao; Li, Yao; Lv, Wenli; Zhao, Feiyu; Sun, Lei; Peng, Yingquan; Wen, Zhanwei; Zhong, Junkang; Zhang, Jianping

2015-01-21

A facile fabrication and characteristics of copper phthalocyanine (CuPc)-based organic field-effect transistor (OFET) using the gold nanoparticles (Au NPs) modification is reported, thereby achieving highly improved performance. The effect of Au NPs located at three different positions, that is, at the SiO2/CuPc interface (device B), embedding in the middle of CuPc layer (device C), and on the top of CuPc layer (device D), is investigated, and the results show that device D has the best performance. Compared with the device without Au NPs (reference device A), device D displays an improvement of field-effect mobility (μ(sat)) from 1.65 × 10(-3) to 5.51 × 10(-3) cm(2) V(-1) s(-1), and threshold voltage decreases from -23.24 to -16.12 V. Therefore, a strategy for the performance improvement of the CuPc-based OFET with large field-effect mobility and saturation drain current is developed, on the basis of the concept of nanoscale Au modification. The model of an additional electron transport channel formation by FET operation at the Au NPs/CuPc interface is therefore proposed to explain the observed performance improvement. Optimum CuPc thickness is confirmed to be about 50 nm in the present study. The device-to-device uniformity and time stability are discussed for future application.

Electrostatic melting in a single-molecule field-effect transistor with applications in genomic identification

PubMed Central

Vernick, Sefi; Trocchia, Scott M.; Warren, Steven B.; Young, Erik F.; Bouilly, Delphine; Gonzalez, Ruben L.; Nuckolls, Colin; Shepard, Kenneth L.

2017-01-01

The study of biomolecular interactions at the single-molecule level holds great potential for both basic science and biotechnology applications. Single-molecule studies often rely on fluorescence-based reporting, with signal levels limited by photon emission from single optical reporters. The point-functionalized carbon nanotube transistor, known as the single-molecule field-effect transistor, is a bioelectronics alternative based on intrinsic molecular charge that offers significantly higher signal levels for detection. Such devices are effective for characterizing DNA hybridization kinetics and thermodynamics and enabling emerging applications in genomic identification. In this work, we show that hybridization kinetics can be directly controlled by electrostatic bias applied between the device and the surrounding electrolyte. We perform the first single-molecule experiments demonstrating the use of electrostatics to control molecular binding. Using bias as a proxy for temperature, we demonstrate the feasibility of detecting various concentrations of 20-nt target sequences from the Ebolavirus nucleoprotein gene in a constant-temperature environment. PMID:28516911

Efficient Defect Engineering for Solution Combustion Processed In-Zn-O thin films for high performance transistors

NASA Astrophysics Data System (ADS)

Liang, Xiaoci; Wang, Chengcai; Liang, Jun; Liu, Chuan; Pei, Yanli

2017-09-01

The oxygen related defects in the solution combustion-processed InZnO vitally affect the field-effect mobility and on-off characteristics in thin film transistors (TFTs). We use photoelectron spectroscopy to reveal that these defects can be well controlled by adjusting the atmosphere and flow rate during the combustion reaction, but are hardly affected by further post-annealing after the reaction. In device performance, the threshold voltage of the InZnO-TFTs was regulated in a wide range from 3.5 V to 11.0 V. To compromise the high field-effect mobility and good subthreshold properties, we fabricate the TFTs with double active layers of InZnO to achieve vertical gradience in defect distribution. The resulting TFT exhibits much higher field-effect mobility as 17.5 cm2 · V-1 · s-1, a low reversed sub-threshold slope as 0.35 V/decade, and a high on-off ratio as 107. The presented understandings and methods on defect engineering are efficient in improving the device performance of TFTs made from the combustion reaction process.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Unraveling the physics of vertical organic field effect transistors through nanoscale engineering of a self-assembled transparent electrode.

PubMed

Ben-Sasson, Ariel J; Tessler, Nir

2012-09-12

While organic transistors' performances are continually pushed to achieve lower power consumption, higher working frequencies, and higher current densities, a new type of organic transistors characterized by a vertical architecture offers a radically different design approach to outperform its traditional counterparts. Naturally, the distinct vertical architecture gives way to different governing physical ground rules and structural key features such as the need for an embedded transparent electrode. In this paper, we make use of a zero-frequency electric field-transparent patterned electrode produced through block-copolymer self-assembly based lithography to control the performances of the vertical organic field effect transistor (VOFET) and to study its governing physical mechanisms. Unlike other VOFET structures, this design, involving well-defined electrode architecture, is fully tractable, allowing for detailed modeling, analysis, and optimization. We provide for the first time a complete account of the physics underpinning the VOFET operation, considering two complementary mechanisms: the virtual contact formation (Schottky barrier lowering) and the induced potential barrier (solid-state triode-like shielding). We demonstrate how each mechanism, separately, accounts for the link between controllable nanoscale structural modifications in the patterned electrode and the VOFET performances. For example, the ON/OFF current ratio increases by up to 2 orders of magnitude when the perforations aspect ratio (height/width) decreases from ∼0.2 to ∼0.1. The patterned electrode is demonstrated to be not only penetrable to zero-frequency electric fields but also transparent in the visible spectrum, featuring uniformity, spike-free structure, material diversity, amenability with flexible surfaces, low sheet resistance (20-2000 Ω sq(-1)) and high transparency (60-90%). The excellent layer transparency of the patterned electrode and the VOFET's exceptional electrical performances make them both promising elements for future transparent and/or efficient organic electronics.

CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Effects of concentration and annealing on the performance of regioregular poly(3-hexylthiophene) field-effect transistors

NASA Astrophysics Data System (ADS)

Tian, Xue-Yan; Xu, Zheng; Zhao, Su-Ling; Zhang, Fu-Jun; Yuan, Guang-Cai; Xu, Xu-Rong

2009-08-01

This paper investigates the effects of concentration on the crystalline structure, the morphology, and the charge carrier mobility of regioregular poly(3-hexylthiophene) (RR-P3HT) field-effect transistors (FETs). The RR-P3HT FETs with RR-P3HT as an active layer with different concentrations of RR-P3HT solution from 0.5 wt% to 2 wt% are prepared. The results indicate that the performance of RR-P3HT FETs improves drastically with the increase of RR-P3HT weight percentages in chloroform solution due to the formation of more microcrystalline lamellae and bigger nanoscale islands. It finds that the field-effect mobility of RR-P3HT FET with 2 wt% can reach 5.78 × 10-3 cm2/Vs which is higher by a factor of 13 than that with 0.5 wt%. Further, an appropriate thermal annealing is adopted to improve the performance of RR-P3HT FETs. The field-effect mobility of RR-P3HT FETs increases drastically to 0.09 cm2/Vs by thermal annealing at 150 °C, and the value of on/off current ratio can reach 104.

Solvent-free directed patterning of a highly ordered liquid crystalline organic semiconductor via template-assisted self-assembly for organic transistors.

PubMed

Kim, Aryeon; Jang, Kwang-Suk; Kim, Jinsoo; Won, Jong Chan; Yi, Mi Hye; Kim, Hanim; Yoon, Dong Ki; Shin, Tae Joo; Lee, Myong-Hoon; Ka, Jae-Won; Kim, Yun Ho

2013-11-20

Highly ordered organic semiconductor micropatterns of the liquid-crystalline small molecule 2,7-didecylbenzothienobenzothiophene (C10 -BTBT) are fabricated using a simple method based on template-assisted self-assembly (TASA). The liquid crystallinity of C10 -BTBT allows solvent-free fabrication of high-performance printed organic field-effect transistors (OFETs). © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Complementary spin transistor using a quantum well channel.

PubMed

Park, Youn Ho; Choi, Jun Woo; Kim, Hyung-Jun; Chang, Joonyeon; Han, Suk Hee; Choi, Heon-Jin; Koo, Hyun Cheol

2017-04-20

In order to utilize the spin field effect transistor in logic applications, the development of two types of complementary transistors, which play roles of the n- and p-type conventional charge transistors, is an essential prerequisite. In this research, we demonstrate complementary spin transistors consisting of two types of devices, namely parallel and antiparallel spin transistors using InAs based quantum well channels and exchange-biased ferromagnetic electrodes. In these spin transistors, the magnetization directions of the source and drain electrodes are parallel or antiparallel, respectively, depending on the exchange bias field direction. Using this scheme, we also realize a complementary logic operation purely with spin transistors controlled by the gate voltage, without any additional n- or p-channel transistor.

A Field-Effect Transistor (FET) model for ASAP

NASA Technical Reports Server (NTRS)

Ming, L.

1965-01-01

The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.

Aluminum nitride insulating films for MOSFET devices

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Maserjian, J.

1972-01-01

Application of aluminum nitrides as electrical insulator for electric capacitors is discussed. Electrical properties of aluminum nitrides are analyzed and specific use with field effect transistors is defined. Operational limits of field effect transistors are developed.

Confinement-induced InAs/GaSb heterojunction electron-hole bilayer tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Padilla, J. L.; Medina-Bailon, C.; Alper, C.; Gamiz, F.; Ionescu, A. M.

2018-04-01

Electron-Hole Bilayer Tunneling Field-Effect Transistors are typically based on band-to-band tunneling processes between two layers of opposite charge carriers where tunneling directions and gate-induced electric fields are mostly aligned (so-called line tunneling). However, the presence of intense electric fields associated with the band bending required to trigger interband tunneling, along with strong confinement effects, has made these types of devices to be regarded as theoretically appealing but technologically impracticable. In this work, we propose an InAs/GaSb heterostructure configuration that, although challenging in terms of process flow design and fabrication, could be envisaged for alleviating the electric fields inside the channel, whereas, at the same time, making quantum confinement become the mechanism that closes the broken gap allowing the device to switch between OFF and ON states. The utilization of induced doping prevents the harmful effect of band tails on the device performance. Simulation results lead to extremely steep slope characteristics endorsing its potential interest for ultralow power applications.

Effects of negative gate-bias stress on the performance of solution-processed zinc-oxide transistors

NASA Astrophysics Data System (ADS)

Kim, Dongwook; Lee, Woo-Sub; Shin, Hyunji; Choi, Jong Sun; Zhang, Xue; Park, Jaehoon; Hwang, Jaeeun; Kim, Hongdoo; Bae, Jin-Hyuk

2014-08-01

We studied the effects of negative gate-bias stress on the electrical characteristics of top-contact zinc-oxide (ZnO) thin-film transistors (TFTs), which were fabricated by spin coating a ZnO solution onto a silicon-nitride gate dielectric layer. The negative gate-bias stress caused characteristic degradations in the on-state currents and the field-effect mobility of the fabricated ZnO TFTs. Additionally, a decrease in the off-state currents and a positive shift in the threshold voltage occurred with increasing stress time. These results indicate that the negative gate-bias stress caused an injection of electrons into the gate dielectric, thereby deteriorating the TFT's performance.

Performance analysis of InGaAs/GaAsP heterojunction double gate tunnel field effect transistor

NASA Astrophysics Data System (ADS)

Ahish, S.; Sharma, Dheeraj; Vasantha, M. H.; Kumar, Y. B. N.

2017-03-01

In this paper, analog/RF performance of InGaAs/GaAsP heterojunction double gate tunnel field effect transistor (HJTFET) has been explored. A highly doped n+ layer is placed at the Source-Channel junction in order to improve the horizontal electric field component and thus, improve the realiability of the device. The analog performance of the device is analysed by extracting current-voltage characteristics, transcondutance (gm), gate-to-drain capacitance (Cgd) and gate-to-source capacitance (Cgs). Further, RF performance of the device is evaluated by obtaining cut-off frequency (fT) and Gain Bandwidth (GBW) product. ION /IOFF ratio equal to ≈ 109, subthreshold slope of 27 mV/dec, maximum fT of 2.1 THz and maximum GBW of 484 GHz were achieved. Also, the impact of temperature variation on the linearity performance of the device has been investigated. Furthermore, the circuit level performance of the device is performed by implementing a Common Source (CS) amplifier; maximum gain of 31.11 dB and 3-dB cut-off frequency equal to 91.2 GHz were achieved for load resistance (RL) = 17.5 KΩ.

N-Channel field-effect transistors with floating gates for extracellular recordings.

PubMed

Meyburg, Sven; Goryll, Michael; Moers, Jürgen; Ingebrandt, Sven; Böcker-Meffert, Simone; Lüth, Hans; Offenhäusser, Andreas

2006-01-15

A field-effect transistor (FET) for recording extracellular signals from electrogenic cells is presented. The so-called floating gate architecture combines a complementary metal oxide semiconductor (CMOS)-type n-channel transistor with an independent sensing area. This concept allows the transistor and sensing area to be optimised separately. The devices are robust and can be reused several times. The noise level of the devices was smaller than of comparable non-metallised gate FETs. In addition to the usual drift of FET devices, we observed a long-term drift that has to be controlled for future long-term measurements. The device performance for extracellular signal recording was tested using embryonic rat cardiac myocytes cultured on fibronectin-coated chips. The extracellular cell signals were recorded before and after the addition of the cardioactive isoproterenol. The signal shapes of the measured action potentials were comparable to the non-metallised gate FETs previously used in similar experiments. The fabrication of the devices involved the process steps of standard CMOS that were necessary to create n-channel transistors. The implementation of a complete CMOS process would facilitate the integration of the logical circuits necessary for signal pre-processing on a chip, which is a prerequisite for a greater number of sensor spots in future layouts.

Probing organic field effect transistors in situ during operation using SFG.

PubMed

Ye, Hongke; Abu-Akeel, Ashraf; Huang, Jia; Katz, Howard E; Gracias, David H

2006-05-24

In this communication, we report results obtained using surface-sensitive IR+Visible Sum Frequency Generation (SFG) nonlinear optical spectroscopy on interfaces of organic field effect transistors during operation. We observe remarkable correlations between trends in the surface vibrational spectra and electrical properties of the transistor, with changes in gate voltage (VG). These results suggest that field effects on electronic conduction in thin film organic semiconductor devices are correlated to interfacial nonlinear optical characteristics and point to the possibility of using SFG spectroscopy to monitor electronic properties of OFETs.

Investigation of the Sensitivity, Selectivity, and Reversibility of the Chemically-Sensitive Field-Effect Transistor (CHEMFET) to Detect Nitrogen Dioxide, Dimethyl Methylphosphonate, and Boron Trifluoride

DTIC Science & Technology

1993-09-01

SENSITIVE FIELD- EFFECT TRANSISTOR (CHEMFET) TO DETECT NITROGEN DIOXIDE, DIMETHYL METHYLPHOSPHONATE, AND BORON TRIFLUORIDE CHAPTER 1 1 Introduction Our rapidly...AND REVERSIBILITY OF THE CHEMICALLY-SENSITIVE FIELD- EFFECT TRANSISTOR (CHEMFET) TO DETECT NITROGEN 3 E I1• DIOXIDE, DIMETHYL METHYLPHOSPHONATE, ELECTE...AND BORON TRIFLUORIDE Neal Terence Hauschild Second Lieutenant, USAF AFIT/GE/ENG/9 3S-10 93-23815I II11l11l11 l gll I 1i 1111 11 I DEPARTMENT OF THE

Silicon nanodisk array with a fin field-effect transistor for time-domain weighted sum calculation toward massively parallel spiking neural networks

NASA Astrophysics Data System (ADS)

Tohara, Takashi; Liang, Haichao; Tanaka, Hirofumi; Igarashi, Makoto; Samukawa, Seiji; Endo, Kazuhiko; Takahashi, Yasuo; Morie, Takashi

2016-03-01

A nanodisk array connected with a fin field-effect transistor is fabricated and analyzed for spiking neural network applications. This nanodevice performs weighted sums in the time domain using rising slopes of responses triggered by input spike pulses. The nanodisk arrays, which act as a resistance of several giga-ohms, are fabricated using a self-assembly bio-nano-template technique. Weighted sums are achieved with an energy dissipation on the order of 1 fJ, where the number of inputs can be more than one hundred. This amount of energy is several orders of magnitude lower than that of conventional digital processors.

A numerical study of the nanoribbon field-effect transistors under the ballistic and dissipative transport

NASA Astrophysics Data System (ADS)

Ghoreishi, Seyed Saleh; Yousefi, Reza; Saghafi, Kamyar; Aderang, Habib

2017-08-01

In this article, a detailed performance comparison is made between ballistic and dissipative quantum transport of metal oxide semicondutor-like graphene nanoribbon field-effect transistor, in ON and OFF-state conditions. By the self-consistent mode-space non-equilibrium Green's function approach, inter- and intraband scattering is accounted and the role of acoustic and optical phonon scattering on the performance of the devices is evaluated. We found that in this structure the dominant mechanism of scattering changes according to the ranges of voltage bias. Under large biasing conditions, the influence of optical phonon scattering becomes important. Also, the ambipolar and OFF-current are impressed by the phonon-assisted band-to-band tunneling and increased considerably compared to the ballistic conditions, although sub-threshold swing degrades due to optical phonon scattering.

Charge Transport in Hybrid Halide Perovskite Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Jurchescu, Oana

Hybrid organic-inorganic trihalide perovskite (HTP) materials exhibit a strong optical absorption, tunable band gap, long carrier lifetimes and fast charge carrier transport. These remarkable properties, coupled with their reduced complexity processing, make the HTPs promising contenders for large scale, low-cost thin film optoelectronic applications. But in spite of the remarkable demonstrations of high performance solar cells, light-emitting diodes and field-effect transistor devices, all of which took place in a very short time period, numerous questions related to the nature and dynamics of the charge carriers and their relation to device performance, stability and reliability still remain. This presentation describes the electrical properties of HTPs evaluated from field-effect transistor measurements. The electrostatic gating of provides an unique platform for the study of intrinsic charge transport in these materials, and, at the same time, expand the use of HTPs towards switching electronic devices, which have not been explored previously. We fabricated FETs on SiO2 and polymer dielectrics from spin coating, thermal evaporation and spray deposition and compare their properties. CH3NH3PbI3-xClx can reach balanced electron and hole mobilities of 10 cm2/Vs upon tuning the thin-film microstructure, injection and the defect density at the semiconductor/dielectric interface. The work was performed in collaboration with Yaochuan Mei (Wake Forest University), Chuang Zhang, and Z. Valy Vardeny (University of Utah). The work is supported by ONR Grant N00014-15-1-2943.

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K

NASA Technical Reports Server (NTRS)

Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.

1992-01-01

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K are presented. It is shown that the CHFET exhibits normal transistor operation down to 6 K. Some of the details of the transistor operation, such as the gate-voltage dependence of the channel potential, are analyzed. The gate current is examined and is shown to be due to several mechanisms acting in parallel. These include field-emission and thermionic-field-emission, conduction through a temperature-activated resistance, and thermionic emission. The input referred noise for n-channel CHFETs is presented and discussed. The noise has the spectral dependence of 1/f noise, but does not exhibit the usual area dependence.

Charge injection in solution-processed organic field-effect transistors: physics, models and characterization methods.

PubMed

Natali, Dario; Caironi, Mario

2012-03-15

A high-mobility organic semiconductor employed as the active material in a field-effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll-to-roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte-gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution-processed and where the most common architectures are adopted, are ∼10 kΩ·cm for transistors with a field effect mobility in the 0.1-1 cm(2)/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case-by-case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the field for a long time. Only recently, as the understanding of the rather complex physical processes at the metal/semiconductor interfaces has improved, more general approaches, with a validity that extends to several materials, are being proposed and successfully tested in the literature. Only a combined scientific and technological effort, on the one side to fully understand contact phenomena and on the other to completely master the tailoring of interfaces, will enable the development of advanced organic electronics applications and their widespread adoption in low-cost, large-area printed circuits. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

NASA Astrophysics Data System (ADS)

Ullah, A. R.; Carrad, D. J.; Krogstrup, P.; Nygârd, J.; Micolich, A. P.

2018-02-01

Doping is a common route to reducing nanowire transistor on-resistance but it has limits. A high doping level gives significant loss in gate performance and ultimately complete gate failure. We show that electrolyte gating remains effective even when the Be doping in our GaAs nanowires is so high that traditional metal-oxide gates fail. In this regime we obtain a combination of subthreshold swing and contact resistance that surpasses the best existing p -type nanowire metal-oxide semiconductor field-effect transistors (MOSFETs). Our subthreshold swing of 75 mV/dec is within 25 % of the room-temperature thermal limit and comparable with n -InP and n -GaAs nanowire MOSFETs. Our results open a new path to extending the performance and application of nanowire transistors, and motivate further work on improved solid electrolytes for nanoscale device applications.

Low Temperature Noise and Electrical Characterization of the Company Heterojunction Field-Effect Transistor

NASA Technical Reports Server (NTRS)

Cunningham, Thomas J.; Gee, Russell C.; Fossum, Eric R.; Baier, Steven M.

1993-01-01

This paper discusses the electrical properties of the complementary heterojunction field-effect transistor (CHFET) at 4K, including the gate leakage current, the subthreshold transconductance, and the input-referred noise voltage.

Device optimization and scaling properties of a gate-on-germanium source tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Chattopadhyay, Avik; Mallik, Abhijit; Omura, Yasuhisa

2015-06-01

A gate-on-germanium source (GoGeS) tunnel field-effect transistor (TFET) shows great promise for low-power (sub-0.5 V) applications. A detailed investigation, with the help of a numerical device simulator, on the effects of variation in different structural parameters of a GoGeS TFET on its electrical performance is reported in this paper. Structural parameters such as κ-value of the gate dielectric, length and κ-value of the spacer, and doping concentrations of both the substrate and source are considered. A low-κ symmetric spacer and a high-κ gate dielectric are found to yield better device performance. The substrate doping influences only the p-i-n leakage floor. The source doping is found to significantly affect performance parameters such as OFF-state current, ON-state current and subthreshold swing, in addition to a threshold voltage shift. Results of the investigation on the gate length scaling of such devices are also reported in this paper.

High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

2017-08-01

Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

Junctionless Thin-Film Transistors Gated by an H₃PO₄-Incorporated Chitosan Proton Conductor.

PubMed

Liu, Huixuan; Xun, Damao

2018-04-01

We fabricated an H3PO4-incorporated chitosan proton conductor film that exhibited the electric double layer effect and showed a high specific capacitance of 4.42 μF/cm2. Transparent indium tin oxide thin-film transistors gated by H3PO4-incorporated chitosan films were fabricated by sputtering through a shadow mask. The operating voltage was as low as 1.2 V because of the high specific capacitance of the H3PO4-incorporated chitosan dielectrics. The junctionless transparent indium tin oxide thin film transistors exhibited good performance, including an estimated current on/off ratio and field-effect mobility of 1.2 × 106 and 6.63 cm2V-1s-1, respectively. These low-voltage thin-film electric-double-layer transistors gated by H3PO4-incorporated chitosan are promising for next generation battery-powered "see-through" portable sensors.

Low-power bacteriorhodopsin-silicon n-channel metal-oxide field-effect transistor photoreceiver.

PubMed

Shin, Jonghyun; Bhattacharya, Pallab; Yuan, Hao-Chih; Ma, Zhenqiang; Váró, György

2007-03-01

A bacteriorhodopsin (bR)-silicon n-channel metal-oxide field-effect transistor (NMOSFET) monolithically integrated photoreceiver is demonstrated. The bR film is selectively formed on an external gate electrode of the transistor by electrophoretic deposition. A modified biasing circuit is incorporated, which helps to match the resistance of the bR film to the input impedance of the NMOSFET and to shift the operating point of the transistor to coincide with the maximum gain. The photoreceiver exhibits a responsivity of 4.7 mA/W.

Transferred wrinkled Al2O3 for highly stretchable and transparent graphene-carbon nanotube transistors

NASA Astrophysics Data System (ADS)

Chae, Sang Hoon; Yu, Woo Jong; Bae, Jung Jun; Duong, Dinh Loc; Perello, David; Jeong, Hye Yun; Ta, Quang Huy; Ly, Thuc Hue; Vu, Quoc An; Yun, Minhee; Duan, Xiangfeng; Lee, Young Hee

2013-05-01

Despite recent progress in producing transparent and bendable thin-film transistors using graphene and carbon nanotubes, the development of stretchable devices remains limited either by fragile inorganic oxides or polymer dielectrics with high leakage current. Here we report the fabrication of highly stretchable and transparent field-effect transistors combining graphene/single-walled carbon nanotube (SWCNT) electrodes and a SWCNT-network channel with a geometrically wrinkled inorganic dielectric layer. The wrinkled Al2O3 layer contained effective built-in air gaps with a small gate leakage current of 10-13 A. The resulting devices exhibited an excellent on/off ratio of ~105, a high mobility of ~40 cm2 V-1 s-1 and a low operating voltage of less than 1 V. Importantly, because of the wrinkled dielectric layer, the transistors retained performance under strains as high as 20% without appreciable leakage current increases or physical degradation. No significant performance loss was observed after stretching and releasing the devices for over 1,000 times. The sustainability and performance advances demonstrated here are promising for the adoption of stretchable electronics in a wide variety of future applications.

Hysteresis in Carbon Nanotube Transistors: Measurement and Analysis of Trap Density, Energy Level, and Spatial Distribution.

PubMed

Park, Rebecca Sejung; Shulaker, Max Marcel; Hills, Gage; Suriyasena Liyanage, Luckshitha; Lee, Seunghyun; Tang, Alvin; Mitra, Subhasish; Wong, H-S Philip

2016-04-26

We present a measurement technique, which we call the Pulsed Time-Domain Measurement, for characterizing hysteresis in carbon nanotube field-effect transistors, and demonstrate its applicability for a broad range of 1D and 2D nanomaterials beyond carbon nanotubes. The Pulsed Time-Domain Measurement enables the quantification (density, energy level, and spatial distribution) of charged traps responsible for hysteresis. A physics-based model of the charge trapping process for a carbon nanotube field-effect transistor is presented and experimentally validated using the Pulsed Time-Domain Measurement. Leveraging this model, we discover a source of traps (surface traps) unique to devices with low-dimensional channels such as carbon nanotubes and nanowires (beyond interface traps which exist in today's silicon field-effect transistors). The different charge trapping mechanisms for interface traps and surface traps are studied based on their temperature dependencies. Through these advances, we are able to quantify the interface trap density for carbon nanotube field-effect transistors (∼3 × 10(13) cm(-2) eV(-1) near midgap), and compare this against a range of previously studied dielectric/semiconductor interfaces.

Doped organic transistors operating in the inversion and depletion regime

PubMed Central

Lüssem, Björn; Tietze, Max L.; Kleemann, Hans; Hoßbach, Christoph; Bartha, Johann W.; Zakhidov, Alexander; Leo, Karl

2013-01-01

The inversion field-effect transistor is the basic device of modern microelectronics and is nowadays used more than a billion times on every state-of-the-art computer chip. In the future, this rigid technology will be complemented by flexible electronics produced at extremely low cost. Organic field-effect transistors have the potential to be the basic device for flexible electronics, but still need much improvement. In particular, despite more than 20 years of research, organic inversion mode transistors have not been reported so far. Here we discuss the first realization of organic inversion transistors and the optimization of organic depletion transistors by our organic doping technology. We show that the transistor parameters—in particular, the threshold voltage and the ON/OFF ratio—can be controlled by the doping concentration and the thickness of the transistor channel. Injection of minority carriers into the doped transistor channel is achieved by doped contacts, which allows forming an inversion layer. PMID:24225722

Microwave assisted synthesis and characterisation of a zinc oxide/tobacco mosaic virus hybrid material. An active hybrid semiconductor in a field-effect transistor device.

PubMed

Sanctis, Shawn; Hoffmann, Rudolf C; Eiben, Sabine; Schneider, Jörg J

2015-01-01

Tobacco mosaic virus (TMV) has been employed as a robust functional template for the fabrication of a TMV/zinc oxide field effect transistor (FET). A microwave based approach, under mild conditions was employed to synthesize stable zinc oxide (ZnO) nanoparticles, employing a molecular precursor. Insightful studies of the decomposition of the precursor were done using NMR spectroscopy and material characterization of the hybrid material derived from the decomposition was achieved using dynamic light scattering (DLS), transmission electron microscopy (TEM), grazing incidence X-ray diffractometry (GI-XRD) and atomic force microscopy (AFM). TEM and DLS data confirm the formation of crystalline ZnO nanoparticles tethered on top of the virus template. GI-XRD investigations exhibit an orientated nature of the deposited ZnO film along the c-axis. FET devices fabricated using the zinc oxide mineralized virus template material demonstrates an operational transistor performance which was achieved without any high-temperature post-processing steps. Moreover, a further improvement in FET performance was observed by adjusting an optimal layer thickness of the deposited ZnO on top of the TMV. Such a bio-inorganic nanocomposite semiconductor material accessible using a mild and straightforward microwave processing technique could open up new future avenues within the field of bio-electronics.

Air-Flow Navigated Crystal Growth for TIPS Pentacene-Based Organic Thin-Film Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

He, Zhengran; Chen, Jihua; Sun, Zhenzhong

2012-01-01

6,13-bis(triisopropylsilylethynyl)pentacene (TIPS pentacene) is a promising active channel material of organic thin-film transistors (OTFTs) due to its solubility, stability, and high mobility. However, the growth of TIPS pentacene crystals is intrinsically anisotropic and thus leads to significant variation in the performance of OTFTs. In this paper, air flow is utilized to effectively reduce the TIPS pentacene crystal anisotropy and enhance performance consistency in OTFTs, and the resulted films are examined with optical microscopy, grazing-incidence X-ray diffraction, and thin-film transistor measurements. Under air-flow navigation (AFN), TIPS pentacene drop-cast from toluene solution has been observed to form thin films with improved crystalmore » orientation and increased areal coverage on substrates, which subsequently lead to a four-fold increase of average hole mobility and one order of magnitude enhancement in performance consistency defined by the ratio of average mobility to the standard deviation of the field-effect mobilities.« less

Behavior of pentacene initial nucleation on various dielectrics and its effect on carrier transport in organic field-effect transistor.

PubMed

Qi, Qiong; Yu, Aifang; Wang, Liangmin; Jiang, Chao

2010-11-01

The influence of dielectric surface energy on the initial nucleation and the growth of pentacene films as well as the electrical properties of the pentacene-based field-effect transistors are investigated. We have examined a range of organic and inorganic dielectrics with different surface energies, such as polycarbonate/SiO2, polystyrene/SiO2, and PMMA/SiO2 bi-layered dielectrics and also the bare SiO2 dielectric. Atomic force microscopy measurements of sub-monolayer and thick pentacene films indicated that the growth of pentacene film was in Stranski-Kranstanow growth mode on all the dielectrics. However, the initial nucleation density and the size of the first-layered pentacene islands deposited on different dielectrics are drastically influenced by the dielectric surface energy. With the increasing of the surface energy, the nucleation density increased and thus the average size of pentacene islands for the first mono-layer deposition decreased. The performance of fabricated pentacene-based thin film transistors was found to be highly related to nucleation density and the island size of deposited Pentacene film, and it had no relationship to the final particle size of the thick pentacene film. The field effect mobility of the thin film transistor could be achieved as high as 1.38 cm2Ns with on/off ratio over 3 x 10(7) on the PS/SiO2 where the lowest surface energy existed among all the dielectrics. For comparison, the values of mobility and on/off ratio were 0.42 cm2Ns and 1 x 10(6) for thin film transistor deposited directly on bare SiO2 having the highest surface energy.

Graphene Field Effect Transistor for Radiation Detection

NASA Technical Reports Server (NTRS)

Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

2016-01-01

The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

Vertical organic transistors.

PubMed

Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

2015-11-11

Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.

High-mobility pyrene-based semiconductor for organic thin-film transistors.

PubMed

Cho, Hyunduck; Lee, Sunyoung; Cho, Nam Sung; Jabbour, Ghassan E; Kwak, Jeonghun; Hwang, Do-Hoon; Lee, Changhee

2013-05-01

Numerous conjugated oligoacenes and polythiophenes are being heavily studied in the search for high-mobility organic semiconductors. Although many researchers have designed fused aromatic compounds as organic semiconductors for organic thin-film transistors (OTFTs), pyrene-based organic semiconductors with high mobilities and on-off current ratios have not yet been reported. Here, we introduce a new pyrene-based p-type organic semiconductor showing liquid crystal behavior. The thin film characteristics of this material are investigated by varying the substrate temperature during the deposition and the gate dielectric condition using the surface modification with a self-assembled monolayer, and systematically studied in correlation with the performances of transistor devices with this compound. OTFT fabricated under the optimum deposition conditions of this compound, namely, 1,6-bis(5'-octyl-2,2'-bithiophen-5-yl)pyrene (BOBTP) shows a high-performance transistor behavior with a field-effect mobility of 2.1 cm(2) V(-1) s(-1) and an on-off current ratio of 7.6 × 10(6) and enhanced long-term stability compared to the pentacene thin-film transistor.

Interaction of solid organic acids with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Klinke, Christian; Afzali, Ali; Avouris, Phaedon

2006-10-01

A series of solid organic acids were used to p-dope carbon nanotubes. The extent of doping is shown to be dependent on the pKa value of the acids. Highly fluorinated carboxylic acids and sulfonic acids are very effective in shifting the threshold voltage and making carbon nanotube field effect transistors to be more p-type devices. Weaker acids like phosphonic or hydroxamic acids had less effect. The doping of the devices was accompanied by a reduction of the hysteresis in the transfer characteristics. In-solution doping survives standard fabrication processes and renders p-doped carbon nanotube field effect transistors with good transport characteristics.

β-Ga2O3 on insulator field-effect transistors with drain currents exceeding 1.5 A/mm and their self-heating effect

NASA Astrophysics Data System (ADS)

Zhou, Hong; Maize, Kerry; Qiu, Gang; Shakouri, Ali; Ye, Peide D.

2017-08-01

We have demonstrated that depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors can achieve a record high drain current density of 1.5/1.0 A/mm by utilizing a highly doped β-Ga2O3 nano-membrane as the channel. β-Ga2O3 on insulator field-effect transistor (GOOI FET) shows a high on/off ratio of 1010 and low subthreshold slope of 150 mV/dec even with 300 nm thick SiO2. The enhancement-mode GOOI FET is achieved through surface depletion. An ultra-fast, high resolution thermo-reflectance imaging technique is applied to study the self-heating effect by directly measuring the local surface temperature. High drain current, low Rc, and wide bandgap make the β-Ga2O3 on insulator field-effect transistor a promising candidate for future power electronics applications.

High-gain subnanowatt power consumption hybrid complementary logic inverter with WSe2 nanosheet and ZnO nanowire transistors on glass.

PubMed

Shokouh, Seyed Hossein Hosseini; Pezeshki, Atiye; Ali Raza, Syed Raza; Lee, Hee Sung; Min, Sung-Wook; Jeon, Pyo Jin; Shin, Jae Min; Im, Seongil

2015-01-07

A 1D-2D hybrid complementary logic inverter comprising of ZnO nanowire and WSe2 nanosheet field-effect transistors (FETs) is fabricated on glass, which shows excellent static and dynamic electrical performances with a voltage gain of ≈60, sub-nanowatt power consumption, and at least 1 kHz inverting speed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Environmental Effects on Hysteresis of Transfer Characteristics in Molybdenum Disulfide Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Shimazu, Yoshihiro; Tashiro, Mitsuki; Sonobe, Satoshi; Takahashi, Masaki

2016-07-01

Molybdenum disulfide (MoS2) has recently received much attention for nanoscale electronic and photonic applications. To explore the intrinsic properties and enhance the performance of MoS2-based field-effect transistors, thorough understanding of extrinsic effects such as environmental gas and contact resistance of the electrodes is required. Here, we report the effects of environmental gases on the transport properties of back-gated multilayered MoS2 field-effect transistors. Comparisons between different gases (oxygen, nitrogen, and air and nitrogen with varying relative humidities) revealed that water molecules acting as charge-trapping centers are the main cause of hysteresis in the transfer characteristics. While the hysteresis persisted even after pumping out the environmental gas for longer than 10 h at room temperature, it disappeared when the device was cooled to 240 K, suggesting a considerable increase in the time constant of the charge trapping/detrapping at these modestly low temperatures. The suppression of the hysteresis or instability in the easily attainable temperature range without surface passivation is highly advantageous for the device application of this system. The humidity dependence of the threshold voltages in the transfer curves indicates that the water molecules dominantly act as hole-trapping centers. A strong dependence of the on-state current on oxygen pressure was also observed.

Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials

NASA Astrophysics Data System (ADS)

Ilatikhameneh, Hesameddin; Tan, Yaohua; Novakovic, Bozidar; Klimeck, Gerhard; Rahman, Rajib; Appenzeller, Joerg

2015-12-01

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2D material based TFETs can have tight gate control and high electric fields at the tunnel junction, and can in principle generate high ON-currents along with a sub-threshold swing smaller than 60 mV/dec. Our simulations reveal that high performance TMD TFETs, not only require good gate control, but also rely on the choice of the right channel material with optimum band gap, effective mass and source/drain doping level. Unlike previous works, a full band atomistic tight binding method is used self-consistently with 3D Poisson equation to simulate ballistic quantum transport in these devices. The effect of the choice of TMD material on the performance of the device and its transfer characteristics are discussed. Moreover, the criteria for high ON-currents are explained with a simple analytic model, showing the related fundamental factors. Finally, the subthreshold swing and energy-delay of these TFETs are compared with conventional CMOS devices.

Carbon Nanotubes as FET Channel: Analog Design Optimization considering CNT Parameter Variability

NASA Astrophysics Data System (ADS)

Samar Ansari, Mohd.; Tripathi, S. K.

2017-08-01

Carbon nanotubes (CNTs), both single-walled as well as multi-walled, have been employed in a plethora of applications pertinent to semiconductor materials and devices including, but not limited to, biotechnology, material science, nanoelectronics and nano-electro mechanical systems (NEMS). The Carbon Nanotube Field Effect Transistor (CNFET) is one such electronic device which effectively utilizes CNTs to achieve a boost in the channel conduction thereby yielding superior performance over standard MOSFETs. This paper explores the effects of variability in CNT physical parameters viz. nanotube diameter, pitch, and number of CNT in the transistor channel, on the performance of a chosen analog circuit. It is further shown that from the analyses performed, an optimal design of the CNFETs can be derived for optimizing the performance of the analog circuit as per a given specification set.

Improving the Stability of High-Performance Multilayer MoS2 Field-Effect Transistors.

PubMed

Liu, Na; Baek, Jongyeol; Kim, Seung Min; Hong, Seongin; Hong, Young Ki; Kim, Yang Soo; Kim, Hyun-Suk; Kim, Sunkook; Park, Jozeph

2017-12-13

In this study, we propose a method for improving the stability of multilayer MoS 2 field-effect transistors (FETs) by O 2 plasma treatment and Al 2 O 3 passivation while sustaining the high performance of bulk MoS 2 FET. The MoS 2 FETs were exposed to O 2 plasma for 30 s before Al 2 O 3 encapsulation to achieve a relatively small hysteresis and high electrical performance. A MoO x layer formed during the plasma treatment was found between MoS 2 and the top passivation layer. The MoO x interlayer prevents the generation of excess electron carriers in the channel, owing to Al 2 O 3 passivation, thereby minimizing the shift in the threshold voltage (V th ) and increase of the off-current leakage. However, prolonged exposure of the MoS 2 surface to O 2 plasma (90 and 120 s) was found to introduce excess oxygen into the MoO x interlayer, leading to more pronounced hysteresis and a high off-current. The stable MoS 2 FETs were also subjected to gate-bias stress tests under different conditions. The MoS 2 transistors exhibited negligible decline in performance under positive bias stress, positive bias illumination stress, and negative bias stress, but large negative shifts in V th were observed under negative bias illumination stress, which is attributed to the presence of sulfur vacancies. This simple approach can be applied to other transition metal dichalcogenide materials to understand their FET properties and reliability, and the resulting high-performance hysteresis-free MoS 2 transistors are expected to open up new opportunities for the development of sophisticated electronic applications.

A nanoscale piezoelectric transformer for low-voltage transistors.

PubMed

Agarwal, Sapan; Yablonovitch, Eli

2014-11-12

A novel piezoelectric voltage transformer for low-voltage transistors is proposed. Placing a piezoelectric transformer on the gate of a field-effect transistor results in the piezoelectric transformer field-effect transistor that can switch at significantly lower voltages than a conventional transistor. The piezoelectric transformer operates by using one piezoelectric to squeeze another piezoelectric to generate a higher output voltage than the input voltage. Multiple piezoelectrics can be used to squeeze a single piezoelectric layer to generate an even higher voltage amplification. Coupled electrical and mechanical modeling in COMSOL predicts a 12.5× voltage amplification for a six-layer piezoelectric transformer. This would lead to more than a 150× reduction in the power needed for communications.

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

NASA Astrophysics Data System (ADS)

Hu, Ai-Bin; Xu, Qiu-Xia

2010-05-01

Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.

Gallium nitride junction field-effect transistor

DOEpatents

Zolper, John C.; Shul, Randy J.

1999-01-01

An all-ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorous co-implantation, in selected III-V semiconductor materials.

Energy-Saving Inverter

NASA Technical Reports Server (NTRS)

Rippel, W. E.; Edwards, D. B.

1984-01-01

Commutation by field-effect transistor allows more efficient operation. High voltage field-effect transistor (FET) controls silicon controlled rectifiers (SCR's). Circuit requires only one capacitor and one inductor in commutation circuit: simpler, more efficient, and more economical than conventional inverters. Adaptable to dc-to-dc converters.

Temperature Dependence of Field-Effect Mobility in Organic Thin-Film Transistors: Similarity to Inorganic Transistors.

PubMed

Okada, Jun; Nagase, Takashi; Kobayashi, Takashi; Naito, Hiroyoshi

2016-04-01

Carrier transport in solution-processed organic thin-film transistors (OTFTs) based on dioctylbenzothienobenzothiophene (C8-BTBT) has been investigated in a wide temperature range from 296 to 10 K. The field-effect mobility shows thermally activated behavior whose activation energy becomes smaller with decreasing temperature. The temperature dependence of field-effect mobility found in C8-BTBT is similar to that of others materials: organic semiconducting polymers, amorphous oxide semiconductors and hydrogenated amorphous silicon. These results indicate that hopping transport between isoenergetic localized states becomes dominated in a low temperature regime in these materials.

Structured-gate organic field-effect transistors

NASA Astrophysics Data System (ADS)

Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

2012-06-01

We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

Detection of the Odor Signature of Ovarian Cancer using DNA-Decorated Carbon Nanotube Field Effect Transistor Arrays

NASA Astrophysics Data System (ADS)

Kehayias, Christopher; Kybert, Nicholas; Yodh, Jeremy; Johnson, A. T. Charlie

Carbon nanotubes are low-dimensional materials that exhibit remarkable chemical and bio-sensing properties and have excellent compatibility with electronic systems. Here, we present a study that uses an electronic olfaction system based on a large array of DNA-carbon nanotube field effect transistors vapor sensors to analyze the VOCs of blood plasma samples collected from patients with malignant ovarian cancer, patients with benign ovarian lesions, and age-matched healthy subjects. Initial investigations involved coating each CNT sensor with single-stranded DNA of a particular base sequence. 10 distinct DNA oligomers were used to functionalize the carbon nanotube field effect transistors, providing a 10-dimensional sensor array output response. Upon performing a statistical analysis of the 10-dimensional sensor array responses, we showed that blood samples from patients with malignant cancer can be reliably differentiated from those of healthy control subjects with a p-value of 3 x 10-5. The results provide preliminary evidence that the blood of ovarian cancer patients contains a discernable volatile chemical signature that can be detected using DNA-CNT nanoelectronic vapor sensors, a first step towards a minimally invasive electronic diagnostic technology for ovarian cancer.

Improved performance of graphene transistors by strain engineering.

PubMed

Nguyen, V Hung; Nguyen, Huy-Viet; Dollfus, P

2014-04-25

By means of numerical simulation, in this work we study the effects of uniaxial strain on the transport properties of strained graphene heterojunctions and explore the possibility of achieving good performance of graphene transistors using these hetero-channels. It is shown that a finite conduction gap can open in the strain junctions due to strain-induced deformation of the graphene bandstructure. These hetero-channels are then demonstrated to significantly improve the operation of graphene field-effect transistors (FETs). In particular, the ON/OFF current ratio can reach a value of over 10(5). In graphene normal FETs, the transconductance, although reduced compared to the case of unstrained devices, is still high, while good saturation of current can be obtained. This results in a high voltage gain and a high transition frequency of a few hundreds of GHz for a gate length of 80 nm. In graphene tunneling FETs, subthreshold swings lower than 30 mV /dec, strong nonlinear effects such as gate-controllable negative differential conductance, and current rectification are observed.

Electrical coupling of single cardiac rat myocytes to field-effect and bipolar transistors.

PubMed

Kind, Thomas; Issing, Matthias; Arnold, Rüdiger; Müller, Bernt

2002-12-01

A novel bipolar transistor for extracellular recording the electrical activity of biological cells is presented, and the electrical behavior compared with the field-effect transistor (FET). Electrical coupling is examined between single cells separated from the heart of adults rats (cardiac myocytes) and both types of transistors. To initiate a local extracellular voltage, the cells are periodically stimulated by a patch pipette in voltage clamp and current clamp mode. The local extracellular voltage is measured by the planar integrated electronic sensors: the bipolar and the FET. The small signal transistor currents correspond to the local extracellular voltage. The two types of sensor transistors used here were developed and manufactured in the laboratory of our institute. The manufacturing process and the interfaces between myocytes and transistors are described. The recordings are interpreted by way of simulation based on the point-contact model and the single cardiac myocyte model.

Improved transfer of graphene for gated Schottky-junction, vertical, organic, field-effect transistors.

PubMed

Lemaitre, Maxime G; Donoghue, Evan P; McCarthy, Mitchell A; Liu, Bo; Tongay, Sefaattin; Gila, Brent; Kumar, Purushottam; Singh, Rajiv K; Appleton, Bill R; Rinzler, Andrew G

2012-10-23

An improved process for graphene transfer was used to demonstrate high performance graphene enabled vertical organic field effect transistors (G-VFETs). The process reduces disorder and eliminates the polymeric residue that typically plagues transferred films. The method also allows for purposely creating pores in the graphene of a controlled areal density. Transconductance observed in G-VFETs fabricated with a continuous (pore-free) graphene source electrode is attributed to modulation of the contact barrier height between the graphene and organic semiconductor due to a gate field induced Fermi level shift in the low density of electronic-states graphene electrode. Pores introduced in the graphene source electrode are shown to boost the G-VFET performance, which scales with the areal pore density taking advantage of both barrier height lowering and tunnel barrier thinning. Devices with areal pore densities of 20% exhibit on/off ratios and output current densities exceeding 10(6) and 200 mA/cm(2), respectively, at drain voltages below 5 V.

Comparison between Field Effect Transistors and Bipolar Junction Transistors as Transducers in Electrochemical Sensors

NASA Astrophysics Data System (ADS)

Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish

2017-01-01

Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor.

Comparison between Field Effect Transistors and Bipolar Junction Transistors as Transducers in Electrochemical Sensors

PubMed Central

Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish

2017-01-01

Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor. PMID:28134275

Ultrasensitive label-free detection of DNA hybridization by sapphire-based graphene field-effect transistor biosensor

NASA Astrophysics Data System (ADS)

Xu, Shicai; Jiang, Shouzhen; Zhang, Chao; Yue, Weiwei; Zou, Yan; Wang, Guiying; Liu, Huilan; Zhang, Xiumei; Li, Mingzhen; Zhu, Zhanshou; Wang, Jihua

2018-01-01

Graphene has attracted much attention in biosensing applications for its unique properties. Because of one-atom layer structure, every atom of graphene is exposed to the environment, making the electronic properties of graphene are very sensitive to charged analytes. Therefore, graphene is an ideal material for transistors in high-performance sensors. Chemical vapor deposition (CVD) method has been demonstrated the most successful method for fabricating large area graphene. However, the conventional CVD methods can only grow graphene on metallic substrate and the graphene has to be transferred to the insulating substrate for further device fabrication. The transfer process creates wrinkles, cracks, or tears on the graphene, which severely degrade electrical properties of graphene. These factors severely degrade the sensing performance of graphene. Here, we directly fabricated graphene on sapphire substrate by high temperature CVD without the use of metal catalysts. The sapphire-based graphene was patterned and make into a DNA biosensor in the configuration of field-effect transistor. The sensors show high performance and achieve the DNA detection sensitivity as low as 100 fM (10-13 M), which is at least 10 times lower than prior transferred CVD G-FET DNA sensors. The use of the sapphire-based G-FETs suggests a promising future for biosensing applications.

Growth-substrate induced performance degradation in chemically synthesized monolayer MoS{sub 2} field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Amani, Matin; Chin, Matthew L.; Mazzoni, Alexander L.

2014-05-19

We report on the electronic transport properties of single-layer thick chemical vapor deposition (CVD) grown molybdenum disulfide (MoS{sub 2}) field-effect transistors (FETs) on Si/SiO{sub 2} substrates. MoS{sub 2} has been extensively investigated for the past two years as a potential semiconductor analogue to graphene. To date, MoS{sub 2} samples prepared via mechanical exfoliation have demonstrated field-effect mobility values which are significantly higher than that of CVD-grown MoS{sub 2}. In this study, we will show that the intrinsic electronic performance of CVD-grown MoS{sub 2} is equal or superior to that of exfoliated material and has been possibly masked by a combinationmore » of interfacial contamination on the growth substrate and residual tensile strain resulting from the high-temperature growth process. We are able to quantify this strain in the as-grown material using pre- and post-transfer metrology and microscopy of the same crystals. Moreover, temperature-dependent electrical measurements made on as-grown and transferred MoS{sub 2} devices following an identical fabrication process demonstrate the improvement in field-effect mobility.« less

Ion-selective electrolyte-gated field-effect transistors: prerequisites for proper functioning

NASA Astrophysics Data System (ADS)

Kofler, Johannes; Schmoltner, Kerstin; List-Kratochvil, Emil J. W.

2014-10-01

Electrolyte-gated organic field-effect transistors (EGOFETs) used as transducers and amplifiers in potentiometric sensors have recently attracted a significant amount of scientific interest. For that reason, the fundamental prerequisites to achieve a proper potentiometric signal amplification and transduction are examined. First, polarizable as well as non-polarizable semiconductor- and gate-electrolyte- interface combinations are investigated by normal pulse voltammetry. The results of these measurements are correlated with the corresponding transistor characteristics, clarifying the functional principle of EGOFETs and the requirements for high signal amplification. In addition to a good electrical performance, the EGOFET-transducers should also be compatible with the targeted sensing application. Accordingly, the influence of different gate materials and electrolytes on the sensing abilities, are discussed. Even though all physical requirements are met, EGOFETs typically exhibit irreversible degradation, if the gate potential exceeds a certain level. For that reason, EGOFETs have to be operated using a constant source-drain operation mode which is presented by means of an H+ (pH) sensitive ion-sensor.

Improving performance of armchair graphene nanoribbon field effect transistors via boron nitride doping

NASA Astrophysics Data System (ADS)

Goharrizi, A. Yazdanpanah; Sanaeepur, M.; Sharifi, M. J.

2015-09-01

Device performance of 10 nm length armchair graphene nanoribbon field effect transistors with 1.5 nm and 4 nm width (13 and 33 atoms in width respectively) are compared in terms of Ion /Ioff , trans-conductance, and sub-threshold swing. While narrow devices suffer from edge roughness wider devices are subject to more substrate surface roughness and reduced bandgap. Boron Nitride doping is employed to compensate reduced bandgap in wider devices. Simultaneous effects of edge and substrate surface roughness are considered. Results show that in the presence of both the edge and substrate surface roughness the 4 nm wide device with boron nitride doping shows improved performance with respect to the 1.5 nm one (both of which incorporate the same bandgap AGNR as channel material). Electronic simulations are performed via NEGF method along with tight-binding Hamiltonian. Edge and surface roughness are created by means of one and two dimensional auto correlation functions respectively. Electronic characteristics are averaged over a large number of devices due to statistic nature of both the edge and surface roughness.

Understanding charge transport in lead iodide perovskite thin-film field-effect transistors

PubMed Central

Senanayak, Satyaprasad P.; Yang, Bingyan; Thomas, Tudor H.; Giesbrecht, Nadja; Huang, Wenchao; Gann, Eliot; Nair, Bhaskaran; Goedel, Karl; Guha, Suchi; Moya, Xavier; McNeill, Christopher R.; Docampo, Pablo; Sadhanala, Aditya; Friend, Richard H.; Sirringhaus, Henning

2017-01-01

Fundamental understanding of the charge transport physics of hybrid lead halide perovskite semiconductors is important for advancing their use in high-performance optoelectronics. We use field-effect transistors (FETs) to probe the charge transport mechanism in thin films of methylammonium lead iodide (MAPbI3). We show that through optimization of thin-film microstructure and source-drain contact modifications, it is possible to significantly minimize instability and hysteresis in FET characteristics and demonstrate an electron field-effect mobility (μFET) of 0.5 cm2/Vs at room temperature. Temperature-dependent transport studies revealed a negative coefficient of mobility with three different temperature regimes. On the basis of electrical and spectroscopic studies, we attribute the three different regimes to transport limited by ion migration due to point defects associated with grain boundaries, polarization disorder of the MA+ cations, and thermal vibrations of the lead halide inorganic cages. PMID:28138550

Directionally Aligned Amorphous Polymer Chains via Electrohydrodynamic-Jet Printing: Analysis of Morphology and Polymer Field-Effect Transistor Characteristics.

PubMed

Kim, Yebyeol; Bae, Jaehyun; Song, Hyun Woo; An, Tae Kyu; Kim, Se Hyun; Kim, Yun-Hi; Park, Chan Eon

2017-11-15

Electrohydrodynamic-jet (EHD-jet) printing provides an opportunity to directly assembled amorphous polymer chains in the printed pattern. Herein, an EHD-jet printed amorphous polymer was employed as the active layer for fabrication of organic field-effect transistors (OFETs). Under optimized conditions, the field-effect mobility (μ FET ) of the EHD-jet printed OFETs was 5 times higher than the highest μ FET observed in the spin-coated OFETs, and this improvement was achieved without the use of complex surface templating or additional pre- or post-deposition processing. As the chain alignment can be affected by the surface energy of the dielectric layer in EHD-jet printed OFETs, dielectric layers with varying wettability were examined. Near-edge X-ray absorption fine structure measurements were performed to compare the amorphous chain alignment in OFET active layers prepared by EHD-jet printing and spin coating.

Chemical potential shift in organic field-effect transistors identified by soft X-ray operando nano-spectroscopy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nagamura, Naoka, E-mail: NAGAMURA.Naoka@nims.go.jp; Kitada, Yuta; Honma, Itaru

2015-06-22

A chemical potential shift in an organic field effect transistor (OFET) during operation has been revealed by soft X-ray operando nano-spectroscopy analysis performed using a three-dimensional nanoscale electron-spectroscopy chemical analysis system. OFETs were fabricated using ultrathin (3 ML or 12 nm) single-crystalline C10-DNBDT-NW films on SiO{sub 2} (200 nm)/Si substrates with a backgate electrode and top source/drain Au electrodes, and C 1s line profiles under biasing at the backgate and drain electrodes were measured. When applying −30 V to the backgate, there is C 1s core level shift of 0.1 eV; this shift can be attributed to a chemical potential shift correspondingmore » to band bending by the field effect, resulting in p-type doping.« less

Fabricating metal-oxide-semiconductor field-effect transistors on a polyethylene terephthalate substrate by applying low-temperature layer transfer of a single-crystalline silicon layer by meniscus force

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sakaike, Kohei; Akazawa, Muneki; Nakamura, Shogo

2013-12-02

A low-temperature local-layer technique for transferring a single-crystalline silicon (c-Si) film by using a meniscus force was proposed, and an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) was fabricated on polyethylene terephthalate (PET) substrate. It was demonstrated that it is possible to transfer and form c-Si films in the required shape at the required position on PET substrates at extremely low temperatures by utilizing a meniscus force. The proposed technique for layer transfer was applied for fabricating high-performance c-Si MOSFETs on a PET substrate. The fabricated MOSFET showed a high on/off ratio of more than 10{sup 8} and a high field-effect mobilitymore » of 609 cm{sup 2} V{sup −1} s{sup −1}.« less

Influence of polymer dielectrics on C60-based field-effect transistors

NASA Astrophysics Data System (ADS)

Zhou, Jianlin; Zhang, Fujia; Lan, Lifeng; Wen, Shangsheng; Peng, Junbiao

2007-12-01

Fullerene C60 organic field-effect transistors (OFETs) have been fabricated based on two different polymer dielectric materials, poly(methylmethacrylate) (PMMA) and cross-linkable poly(4-vinylphenol). The large grain size of C60 film and small number of traps at the interface of PMMA /C60 were obtained with high electron mobility of 0.66cm2/Vs in the PMMA transistor. The result suggests that the C60 semiconductor cooperating with polymer dielectric is a promising application in the fabrication of n-type organic transistors because of low threshold voltage and high electron mobility.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Improved Field-Effect Transistor Equations for Computer Simulation.

ERIC Educational Resources Information Center

Kidd, Richard; Ardini, James

1979-01-01

Presents a laboratory experiment that was developed to acquaint physics students with field-effect transistor characteristics and circuits. Computer-drawn curves supplementing student laboratory exercises can be generated to provide more permanent, usable data than those taken from a curve tracer. (HM)

α,ω-dihexyl-sexithiophene thin films for solution-gated organic field-effect transistors

NASA Astrophysics Data System (ADS)

Schamoni, Hannah; Noever, Simon; Nickel, Bert; Stutzmann, Martin; Garrido, Jose A.

2016-02-01

While organic semiconductors are being widely investigated for chemical and biochemical sensing applications, major drawbacks such as the poor device stability and low charge carrier mobility in aqueous electrolytes have not yet been solved to complete satisfaction. In this work, solution-gated organic field-effect transistors (SGOFETs) based on the molecule α,ω-dihexyl-sexithiophene (DH6T) are presented as promising platforms for in-electrolyte sensing. Thin films of DH6T were investigated with regard to the influence of the substrate temperature during deposition on the grain size and structural order. The performance of SGOFETs can be improved by choosing suitable growth parameters that lead to a two-dimensional film morphology and a high degree of structural order. Furthermore, the capability of the SGOFETs to detect changes in the pH or ionic strength of the gate electrolyte is demonstrated and simulated. Finally, excellent transistor stability is confirmed by continuously operating the device over a period of several days, which is a consequence of the low threshold voltage of DH6T-based SGOFETs. Altogether, our results demonstrate the feasibility of high performance and highly stable organic semiconductor devices for chemical or biochemical applications.

High gain, low noise, fully complementary logic inverter based on bi-layer WSe{sub 2} field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Das, Saptarshi; Roelofs, Andreas; Dubey, Madan

2014-08-25

In this article, first, we show that by contact work function engineering, electrostatic doping and proper scaling of both the oxide thickness and the flake thickness, high performance p- and n-type WSe{sub 2} field effect transistors (FETs) can be realized. We report record high drive current of 98 μA/μm for the electron conduction and 110 μA/μm for the hole conduction in Schottky barrier WSe{sub 2} FETs. Then, we combine high performance WSe{sub 2} PFET with WSe{sub 2} NFET in double gated transistor geometry to demonstrate a fully complementary logic inverter. We also show that by adjusting the threshold voltages for themore » NFET and the PFET, the gain and the noise margin of the inverter can be significantly enhanced. The maximum gain of our chemical doping free WSe{sub 2} inverter was found to be ∼25 and the noise margin was close to its ideal value of ∼2.5 V for a supply voltage of V{sub DD} = 5.0 V.« less

The Effect of Aptamer Concetration towards Reduced Graphene Oxide-Field Effect Transistor Surface Channel for Biosensor Application

NASA Astrophysics Data System (ADS)

Syafiq Zainol Abidin, Azrul; Rahim, Ruslinda Abdul; Huan, Chow Yong; Maidin, Nur Nasyifa Mohd; Atiqah Ahmad, Nurul; Hashwan, Saeed S. Ba; Faudzi, Fatin Nabilah Mohd; Hong, Voon Chun

2018-03-01

Aptamer are artificially produce bioreceptor that has been developed to bind with various target biomolecules such as ion, cells, protein and small molecules. In this research, an aptamer concentration of 0.5 nM, 1 nM, 5 nM, 10 nM, and 50 nM were immobilized on reduced graphene oxide (rGO) integrated with field effect transistor (FET) respectively to study the effect of aptamer concentration toward rGO surface for stable biosensing platform. The 0.5 nM concentration of aptamer shows the highest current result of 84.3 µA at 1 V applied through the source and drain. After immobilized with aminated aptamer, the conductivity shows significant reduction due to the formation of amide bond on rGO surface between aminated aptamer and carboxyl group on rGO. The electrical performance of FET integrated with rGO shows stable electrical performance suitable to be used in the biosensing application.

Improved Performance of h-BN Encapsulated Double Gate Graphene Nanomesh Field Effect Transistor for Short Channel Length

NASA Astrophysics Data System (ADS)

Tiwari, Durgesh Laxman; Sivasankaran, K.

This paper presents improved performance of Double Gate Graphene Nanomesh Field Effect Transistor (DG-GNMFET) with h-BN as substrate and gate oxide material. The DC characteristics of 0.95μm and 5nm channel length devices are studied for SiO2 and h-BN substrate and oxide material. For analyzing the ballistic behavior of electron for 5nm channel length, von Neumann boundary condition is considered near source and drain contact region. The simulated results show improved saturation current for h-BN encapsulated structure with two times higher on current value (0.375 for SiO2 and 0.621 for h-BN) as compared to SiO2 encapsulated structure. The obtained result shows h-BN to be a better substrate and oxide material for graphene electronics with improved device characteristics.

The fundamental downscaling limit of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mamaluy, Denis, E-mail: mamaluy@sandia.gov; Gao, Xujiao

2015-05-11

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

The fundamental downscaling limit of field effect transistors

DOE PAGES

Mamaluy, Denis; Gao, Xujiao

2015-05-12

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

Device simulation of GeSn/GeSiSn pocket n-type tunnel field-effect transistor for analog and RF applications

NASA Astrophysics Data System (ADS)

Wang, Suyuan; Zheng, Jun; Xue, Chunlai; Li, Chuanbo; Zuo, Yuhua; Cheng, Buwen; Wang, Qiming

2017-11-01

We present the device simulations of analog and radio frequency (RF) performances of four double-gate pocket n-type tunneling field-effect transistors (NTFETs). The direct current (DC), analog and RF performances of the Ge-homo, GeSn-homo, GeSn/Ge and GeSn/GeSiSn NTFETs, are compared. The GeSn NTFETs greatly improve the on-state current (ION) and average subthreshold slope (SS), when compared with the Ge NTFET. Moreover, the GeSn/GeSiSn NTFET has the largest intrinsic gain (Av), and exhibits a suppressed ambipolar behavior, improved cut-off frequency (fT), and gain bandwidth product (GBW), according to the analyzed analog and RF figures of merit (FOM). Therefore, it can be concluded that the GeSn/GeSiSn NTFET has great potential as a promising candidate for the realization of future generation low-power analog/RF applications.

Germanium Based Field-Effect Transistors: Challenges and Opportunities

PubMed Central

Goley, Patrick S.; Hudait, Mantu K.

2014-01-01

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed. PMID:28788569

Ultra-localized single cell electroporation using silicon nanowires.

PubMed

Jokilaakso, Nima; Salm, Eric; Chen, Aaron; Millet, Larry; Guevara, Carlos Duarte; Dorvel, Brian; Reddy, Bobby; Karlstrom, Amelie Eriksson; Chen, Yu; Ji, Hongmiao; Chen, Yu; Sooryakumar, Ratnasingham; Bashir, Rashid

2013-02-07

Analysis of cell-to-cell variation can further the understanding of intracellular processes and the role of individual cell function within a larger cell population. The ability to precisely lyse single cells can be used to release cellular components to resolve cellular heterogeneity that might be obscured when whole populations are examined. We report a method to position and lyse individual cells on silicon nanowire and nanoribbon biological field effect transistors. In this study, HT-29 cancer cells were positioned on top of transistors by manipulating magnetic beads using external magnetic fields. Ultra-rapid cell lysis was subsequently performed by applying 600-900 mV(pp) at 10 MHz for as little as 2 ms across the transistor channel and the bulk substrate. We show that the fringing electric field at the device surface disrupts the cell membrane, leading to lysis from irreversible electroporation. This methodology allows rapid and simple single cell lysis and analysis with potential applications in medical diagnostics, proteome analysis and developmental biology studies.

A delta-doped amorphous silicon thin-film transistor with high mobility and stability

NASA Astrophysics Data System (ADS)

Kim, Pyunghun; Lee, Kyung Min; Lee, Eui-Wan; Jo, Younjung; Kim, Do-Hyung; Kim, Hong-jae; Yang, Key Young; Son, Hyunji; Choi, Hyun Chul

2012-12-01

Ultrathin doped layers, known as delta-doped layers, were introduced within the intrinsic amorphous silicon (a-Si) active layer to fabricate hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with enhanced field-effect mobility. The performance of the delta-doped a-Si:H TFTs depended on the phosphine (PH3) flow rate and the distance from the n+ a-Si to the deltadoping layer. The delta-doped a-Si:H TFTs fabricated using a commercial manufacturing process exhibited an enhanced field-effect mobility of approximately ˜0.23 cm2/Vs (compared to a conventional a-Si:H TFT with 0.15 cm2/Vs) and a desirable stability under a bias-temperature stress test.

Single-Walled Carbon Nanotube Dominated Micron-Wide Stripe Patterned-Based Ferroelectric Field-Effect Transistors with HfO2 Defect Control Layer

NASA Astrophysics Data System (ADS)

Tan, Qiuhong; Wang, Qianjin; Liu, Yingkai; Yan, Hailong; Cai, Wude; Yang, Zhikun

2018-04-01

Ferroelectric field-effect transistors (FeFETs) with single-walled carbon nanotube (SWCNT) dominated micron-wide stripe patterned as channel, (Bi,Nd)4Ti3O12 films as insulator, and HfO2 films as defect control layer were developed and fabricated. The prepared SWCNT-FeFETs possess excellent properties such as large channel conductance, high on/off current ratio, high channel carrier mobility, great fatigue endurance performance, and data retention. Despite its thin capacitance equivalent thickness, the gate insulator with HfO2 defect control layer shows a low leakage current density of 3.1 × 10-9 A/cm2 at a gate voltage of - 3 V.

Single-Walled Carbon Nanotube Dominated Micron-Wide Stripe Patterned-Based Ferroelectric Field-Effect Transistors with HfO2 Defect Control Layer.

PubMed

Tan, Qiuhong; Wang, Qianjin; Liu, Yingkai; Yan, Hailong; Cai, Wude; Yang, Zhikun

2018-04-27

Ferroelectric field-effect transistors (FeFETs) with single-walled carbon nanotube (SWCNT) dominated micron-wide stripe patterned as channel, (Bi,Nd) 4 Ti 3 O 12 films as insulator, and HfO 2 films as defect control layer were developed and fabricated. The prepared SWCNT-FeFETs possess excellent properties such as large channel conductance, high on/off current ratio, high channel carrier mobility, great fatigue endurance performance, and data retention. Despite its thin capacitance equivalent thickness, the gate insulator with HfO 2 defect control layer shows a low leakage current density of 3.1 × 10 -9  A/cm 2 at a gate voltage of - 3 V.

Emerging ferroelectric transistors with nanoscale channel materials: the possibilities, the limitations

NASA Astrophysics Data System (ADS)

Hong, Xia

2016-03-01

Combining the nonvolatile, locally switchable polarization field of a ferroelectric thin film with a nanoscale electronic material in a field effect transistor structure offers the opportunity to examine and control a rich variety of mesoscopic phenomena and interface coupling. It is also possible to introduce new phases and functionalities into these hybrid systems through rational design. This paper reviews two rapidly progressing branches in the field of ferroelectric transistors, which employ two distinct classes of nanoscale electronic materials as the conducting channel, the two-dimensional (2D) electron gas graphene and the strongly correlated transition metal oxide thin films. The topics covered include the basic device physics, novel phenomena emerging in the hybrid systems, critical mechanisms that control the magnitude and stability of the field effect modulation and the mobility of the channel material, potential device applications, and the performance limitations of these devices due to the complex interface interactions and challenges in achieving controlled materials properties. Possible future directions for this field are also outlined, including local ferroelectric gate control via nanoscale domain patterning and incorporating other emergent materials in this device concept, such as the simple binary ferroelectrics, layered 2D transition metal dichalcogenides, and the 4d and 5d heavy metal compounds with strong spin-orbit coupling.

Influence of the gate position on source-to-drain resistance in AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Yan; Lin, Zhaojun; Cui, Peng; Zhao, Jingtao; Fu, Chen; Yang, Ming; Lv, Yuanjie

2017-08-01

Using a suitable dual-gate structure, the source-to-drain resistance (RSD) of AlGaN/AlN/GaN heterostructure field-effect transistor (HFET) with varying gate position has been studied at room temperature. The theoretical and experimental results have revealed a dependence of RSD on the gate position. The variation of RSD with the gate position is found to stem from the polarization Coulomb field (PCF) scattering. This finding is of great benefit to the optimization of the performance of AlGaN/AlN/GaN HFET. Especially, when the AlGaN/AlN/GaN HFET works as a microwave device, it is beneficial to achieve the impedance matching by designing the appropriate gate position based on PCF scattering.

Photocurable Polymers for Ion Selective Field Effect Transistors. 20 Years of Applications

PubMed Central

Abramova, Natalia; Bratov, Andrei

2009-01-01

Application of photocurable polymers for encapsulation of ion selective field effect transistors (ISFET) and for membrane formation in chemical sensitive field effect transistors (ChemFET) during the last 20 years is discussed. From a technological point of view these materials are quite interesting because they allow the use of standard photo-lithographic processes, which reduces significantly the time required for sensor encapsulation and membrane deposition and the amount of manual work required for this, all items of importance for sensor mass production. Problems associated with the application of this kind of polymers in sensors are analysed and estimation of future trends in this field of research are presented. PMID:22399988

Effective mobility enhancement of amorphous In-Ga-Zn-O thin-film transistors by holographically generated periodic conductor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jeong, Jaewook; Kim, Joonwoo; Jeong, Soon Moon

In this study, we demonstrate a mobility enhancement structure for fully transparent amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) by embedding a holographically generated periodic nano-conductor in the back-channel regions. The intrinsic field-effect mobility was enhanced up to 2 times compared to that of a reference sample. The enhancement originated from a decrease in the effective channel length due to the highly conductive nano-conductor region. By combining conventional and holographic lithography, the performance of the a-IGZO TFT can be effectively improved without varying the composition of the channel layer.

Effective mobility enhancement of amorphous In-Ga-Zn-O thin-film transistors by holographically generated periodic conductor

NASA Astrophysics Data System (ADS)

Jeong, Jaewook; Kim, Joonwoo; Kim, Donghyun; Jeon, Heonsu; Jeong, Soon Moon; Hong, Yongtaek

2016-08-01

In this study, we demonstrate a mobility enhancement structure for fully transparent amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) by embedding a holographically generated periodic nano-conductor in the back-channel regions. The intrinsic field-effect mobility was enhanced up to 2 times compared to that of a reference sample. The enhancement originated from a decrease in the effective channel length due to the highly conductive nano-conductor region. By combining conventional and holographic lithography, the performance of the a-IGZO TFT can be effectively improved without varying the composition of the channel layer.

Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model.

PubMed

Penumatcha, Ashish V; Salazar, Ramon B; Appenzeller, Joerg

2015-11-13

Owing to the difficulties associated with substitutional doping of low-dimensional nanomaterials, most field-effect transistors built from carbon nanotubes, two-dimensional crystals and other low-dimensional channels are Schottky barrier MOSFETs (metal-oxide-semiconductor field-effect transistors). The transmission through a Schottky barrier-MOSFET is dominated by the gate-dependent transmission through the Schottky barriers at the metal-to-channel interfaces. This makes the use of conventional transistor models highly inappropriate and has lead researchers in the past frequently to extract incorrect intrinsic properties, for example, mobility, for many novel nanomaterials. Here we propose a simple modelling approach to quantitatively describe the transfer characteristics of Schottky barrier-MOSFETs from ultra-thin body materials accurately in the device off-state. In particular, after validating the model through the analysis of a set of ultra-thin silicon field-effect transistor data, we have successfully applied our approach to extract Schottky barrier heights for electrons and holes in black phosphorus devices for a large range of body thicknesses.

Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model

PubMed Central

Penumatcha, Ashish V.; Salazar, Ramon B.; Appenzeller, Joerg

2015-01-01

Owing to the difficulties associated with substitutional doping of low-dimensional nanomaterials, most field-effect transistors built from carbon nanotubes, two-dimensional crystals and other low-dimensional channels are Schottky barrier MOSFETs (metal-oxide-semiconductor field-effect transistors). The transmission through a Schottky barrier-MOSFET is dominated by the gate-dependent transmission through the Schottky barriers at the metal-to-channel interfaces. This makes the use of conventional transistor models highly inappropriate and has lead researchers in the past frequently to extract incorrect intrinsic properties, for example, mobility, for many novel nanomaterials. Here we propose a simple modelling approach to quantitatively describe the transfer characteristics of Schottky barrier-MOSFETs from ultra-thin body materials accurately in the device off-state. In particular, after validating the model through the analysis of a set of ultra-thin silicon field-effect transistor data, we have successfully applied our approach to extract Schottky barrier heights for electrons and holes in black phosphorus devices for a large range of body thicknesses. PMID:26563458

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

Direct Effect of Dielectric Surface Energy on Carrier Transport in Organic Field-Effect Transistors.

PubMed

Zhou, Shujun; Tang, Qingxin; Tian, Hongkun; Zhao, Xiaoli; Tong, Yanhong; Barlow, Stephen; Marder, Seth R; Liu, Yichun

2018-05-09

The understanding of the characteristics of gate dielectric that leads to optimized carrier transport remains controversial, and the conventional studies applied organic semiconductor thin films, which introduces the effect of dielectric on the growth of the deposited semiconductor thin films and hence only can explore the indirect effects. Here, we introduce pregrown organic single crystals to eliminate the indirect effect (semiconductor growth) in the conventional studies and to undertake an investigation of the direct effect of dielectric on carrier transport. It is shown that the matching of the polar and dispersive components of surface energy between semiconductor and dielectric is favorable for higher mobility. This new empirical finding may show the direct relationship between dielectric and carrier transport for the optimized mobility of organic field-effect transistors and hence show a promising potential for the development of next-generation high-performance organic electronic devices.

Gallium nitride junction field-effect transistor

DOEpatents

Zolper, J.C.; Shul, R.J.

1999-02-02

An ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same are disclosed. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorus co-implantation, in selected III-V semiconductor materials. 19 figs.

Internal additive noise effects in stochastic resonance using organic field effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suzuki, Yoshiharu; Asakawa, Naoki; Matsubara, Kiyohiko

Stochastic resonance phenomenon was observed in organic field effect transistor using poly(3-hexylthiophene), which enhances performance of signal transmission with application of noise. The enhancement of correlation coefficient between the input and output signals was low, and the variation of correlation coefficient was not remarkable with respect to the intensity of external noise, which was due to the existence of internal additive noise following the nonlinear threshold response. In other words, internal additive noise plays a positive role on the capability of approximately constant signal transmission regardless of noise intensity, which can be said “homeostatic” behavior or “noise robustness” against externalmore » noise. Furthermore, internal additive noise causes emergence of the stochastic resonance effect even on the threshold unit without internal additive noise on which the correlation coefficient usually decreases monotonically.« less

Improved Hot Carrier Reliability Characteristics of Metal Oxide Semiconductor Field Effect Transistors with High-k Gate Dielectric by Using High Pressure Deuterium Post Metallization Annealing

NASA Astrophysics Data System (ADS)

Park, Hokyung; Choi, Rino; Lee, Byoung Hun; Hwang, Hyunsang

2007-09-01

High pressure deuterium annealing on the hot carrier reliability characteristics of HfSiO metal oxide semiconductor field effect transistor (MOSFET) was investigated. Comparing with the conventional forming gas (H2/Ar=10%/96%, 480 °C, 30 min) annealed sample, MOSFET annealed in 5 atm pure deuterium ambient at 400 °C showed the improvement of linear drain current, reduction of interface trap density, and improvement of the hot carrier reliability characteristics. These improvements can be attributed to the effective passivation of the interface trap site after high pressure annealing and heavy mass effect of deuterium. These results indicate that high pressure pure deuterium annealing can be a promising process for improving device performance as well as hot carrier reliability, together.

Engineering the mobility increment in pentacene-based field-effect transistors by fast cooling of polymeric modification layer

NASA Astrophysics Data System (ADS)

Ling, Haifeng; Zhang, Chenxi; Chen, Yan; Shao, Yaqing; Li, Wen; Li, Huanqun; Chen, Xudong; Yi, Mingdong; Xie, Linghai; Huang, Wei

2017-06-01

In this work, we investigate the effect of the cooling rate of polymeric modification layers (PMLs) on the mobility improvement of pentacene-based organic field-effect transistors (OFETs). In contrast to slow cooling (SC), the OFETs fabricated through fast cooling (FC) with PMLs containing side chain-phenyl rings, such as polystyrene (PS) and poly (4-vinylphenol) (PVP), show an obvious mobility incensement compared with that of π-group free polymethylmethacrylate (PMMA). Atomic force microscopy (AFM) images and x-ray diffraction (XRD) characterizations have showed that fast-cooled PMLs could effectively enhance the crystallinity of pentacene, which might be related to the optimized homogeneity of surface energy on the surface of polymeric dielectrics. Our work has demonstrated that FC treatment could be a potential strategy for performance modulation of OFETs.

Study on copper phthalocyanine and perylene-based ambipolar organic light-emitting field-effect transistors produced using neutral beam deposition method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Dae-Kyu; Oh, Jeong-Do; Shin, Eun-Sol

2014-04-28

The neutral cluster beam deposition (NCBD) method has been applied to the production and characterization of ambipolar, heterojunction-based organic light-emitting field-effect transistors (OLEFETs) with a top-contact, multi-digitated, long-channel geometry. Organic thin films of n-type N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide and p-type copper phthalocyanine were successively deposited on the hydroxyl-free polymethyl-methacrylate (PMMA)-coated SiO{sub 2} dielectrics using the NCBD method. Characterization of the morphological and structural properties of the organic active layers was performed using atomic force microscopy and X-ray diffraction. Various device parameters such as hole- and electron-carrier mobilities, threshold voltages, and electroluminescence (EL) were derived from the fits of the observed current-voltage andmore » current-voltage-light emission characteristics of OLEFETs. The OLEFETs demonstrated good field-effect characteristics, well-balanced ambipolarity, and substantial EL under ambient conditions. The device performance, which is strongly correlated with the surface morphology and the structural properties of the organic active layers, is discussed along with the operating conduction mechanism.« less

Heterostructured semiconductor single-walled carbon nanotube films for solution-processed high-performance field-effect transistors

NASA Astrophysics Data System (ADS)

Park, Noh-Hwal; Lee, Seung-Hoon; Jeong, Seung-Hyeon; Khim, Dongyoon; Kim, Yun Ho; Yoo, Sungmi; Noh, Yong-Young; Kim, Jang-Joo

2018-03-01

In this paper, we report a simple and effective method to simultaneously achieve a high charge-carrier mobility and low off current in conjugated polymer-wrapped semiconducting single-walled carbon nanotube (s-SWNT) transistors by applying a SWNT bilayer. To achieve the high mobility and low off current, highly purified and less purified s-SWNTs are successively coated to form the semiconducting layer consisting of poly (3-dodecylthiophene-2,5-diyl) (P3DDT)-wrapped high-pressure carbon mono oxide (HiPCO) SWNT (P3DDT-HiPCO) and poly (9, 9-di-n-dodecylfluorene) (PFDD)-wrapped plasma discharge (PD) SWNT (PFDD-PD). The SWNT transistors with bilayer SWNT networked film showed highly improved hole field-effect mobility (6.18 ± 0.85 cm2V-1s-1 average), on/off current ratio (107), and off current (˜1 pA). Thus, the combination of less purified PFDD-PD (98%-99%) charge-injection layer and highly purified s-P3DDT-HiPCO (>99%) charge-transport layer as the bi-layered semiconducting film achieved high mobility and low off current simultaneously.

Integration of Organic Electrochemical and Field-Effect Transistors for Ultraflexible, High Temporal Resolution Electrophysiology Arrays.

PubMed

Lee, Wonryung; Kim, Dongmin; Rivnay, Jonathan; Matsuhisa, Naoji; Lonjaret, Thomas; Yokota, Tomoyuki; Yawo, Hiromu; Sekino, Masaki; Malliaras, George G; Someya, Takao

2016-11-01

Integration of organic electrochemical transistors and organic field-effect transistors is successfully realized on a 600 nm thick parylene film toward an electrophysiology array. A single cell of an integrated device and a 2 × 2 electrophysiology array succeed in detecting electromyogram with local stimulation of the motor nerve bundle of a transgenic rat by a laser pulse. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Investigation of Electronic and Opto-Electronic Properties of Two-Dimensional (2D) Layers of Copper Indium Selenide Field Effect Transistors

NASA Astrophysics Data System (ADS)

Patil, Prasanna Dnyaneshwar

Investigations performed in order to understand the electronic and optoelectronic properties of field effect transistors based on few layers of 2D Copper Indium Selenide (CuIn7Se11) are reported. In general, field effect transistors (FETs), electric double layer field effect transistors (EDL-FETs), and photodetectors are crucial part of several electronics based applications such as tele-communication, bio-sensing, and opto-electronic industry. After the discovery of graphene, several 2D semiconductor materials like TMDs (MoS2, WS2, and MoSe2 etc.), group III-VI materials (InSe, GaSe, and SnS2 etc.) are being studied rigorously in order to develop them as components in next generation FETs. Traditionally, thin films of ternary system of Copper Indium Selenide have been extensively studied and used in optoelectronics industry as photoactive component in solar cells. Thus, it is expected that atomically thin 2D layered structure of Copper Indium Selenide can have optical properties that could potentially be more advantageous than its thin film counterpart and could find use for developing next generation nano devices with utility in opto/nano electronics. Field effect transistors were fabricated using few-layers of CuIn7Se11 flakes, which were mechanically exfoliated from bulk crystals grown using chemical vapor transport technique. Our FET transport characterization measurements indicate n-type behavior with electron field effect mobility microFE ≈ 36 cm2 V-1 s-1 at room temperature when Silicon dioxide (SiO2) is used as a back gate. We found that in such back gated field effect transistor an on/off ratio of 104 and a subthreshold swing ≈ 1 V/dec can be obtained. Our investigations further indicate that Electronic performance of these materials can be increased significantly when gated from top using an ionic liquid electrolyte [1-Butyl-3-methylimidazolium hexafluorophosphate (BMIM-PF6)]. We found that electron field effect mobility microFE can be increased from 3 cm2 V-1 s-11 in SiO2 back gated device to 18 cm2 V-1 s-11 in top gated electrolyte devices. Similarly, subthreshold swing can be improved from 30 V/dec to 0.2 V/dec and on/off ratio can be increased from 102 to 103 by using an electrolyte as a top gate. These FETs were also tested as phototransistors. Our photo-response characterization indicate photo-responsivity 32 A/W with external quantum efficiency exceeding 103 % when excited with a 658 nm wavelength laser at room temperature. Our phototransistor also exhibit response times tens of micros with specific detectivity (D*) values reaching 1012 Jones. The CuIn7Se11 phototransistor properties can be further tuned & enhanced by applying a back gate voltage along with increased source drain bias. For example, photo-responsivity can gain substantial improvement up to 320 A/W upon application of a gate voltage (Vg = 30 V) and/or increased source-drain bias. The photo-responsivity exhibited by these photo detectors are at least an order of magnitude better than commercially available conventional Si based photo detectors coupled with response times that are orders of magnitude better than several other family of layered materials investigated so far. Further photocurrent generation mechanisms, effect of traps is discussed in detail.

Ferroelectric Material Application: Modeling Ferroelectric Field Effect Transistor Characteristics from Micro to Nano

NASA Technical Reports Server (NTRS)

MacLeod, Todd, C.; Ho, Fat Duen

2006-01-01

All present ferroelectric transistors have been made on the micrometer scale. Existing models of these devices do not take into account effects of nanoscale ferroelectric transistors. Understanding the characteristics of these nanoscale devices is important in developing a strategy for building and using future devices. This paper takes an existing microscale ferroelectric field effect transistor (FFET) model and adds effects that become important at a nanoscale level, including electron velocity saturation and direct tunneling. The new model analyzed FFETs ranging in length from 40,000 nanometers to 4 nanometers and ferroelectric thickness form 200 nanometers to 1 nanometer. The results show that FFETs can operate on the nanoscale but have some undesirable characteristics at very small dimensions.

Organic-inorganic proximity effect in the magneto-conductance of vertical organic field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Khachatryan, B.; Devir-Wolfman, A. H.; Ehrenfreund, E., E-mail: eitane@technion.ac.il

Vertical organic field effect transistors having a patterned source electrode and an a-SiO{sub 2} insulation layer show high performance as a switching element with high transfer characteristics. By measuring the low field magneto-conductance under ambient conditions at room temperature, we show here that the proximity of the inorganic a-SiO{sub 2} insulation to the organic conducting channel affects considerably the magnetic response. We propose that in n-type devices, electrons in the organic conducting channel and spin bearing charged defects in the inorganic a-SiO{sub 2} insulation layer (e.g., O{sub 2} = Si{sup +·}) form oppositely charged spin pairs whose singlet-triplet spin configurations are mixedmore » through the relatively strong hyperfine field of {sup 29}Si. By increasing the contact area between the insulation layer and the conducting channel, the ∼2% magneto-conductance response may be considerably enhanced.« less

Low noise tuned amplifier

NASA Technical Reports Server (NTRS)

Kleinberg, L. L. (Inventor)

1984-01-01

A bandpass amplifier employing a field effect transistor amplifier first stage is described with a resistive load either a.c. or directly coupled to the non-inverting input of an operational amplifier second stage which is loaded in a Wien Bridge configuration. The bandpass amplifier may be operated with a signal injected into the gate terminal of the field effect transistor and the signal output taken from the output terminal of the operational amplifier. The operational amplifier stage appears as an inductive reactance, capacitive reactance and negative resistance at the non-inverting input of the operational amplifier, all of which appear in parallel with the resistive load of the field effect transistor.

Reconfigurable Complementary Monolayer MoTe2 Field-Effect Transistors for Integrated Circuits.

PubMed

Larentis, Stefano; Fallahazad, Babak; Movva, Hema C P; Kim, Kyounghwan; Rai, Amritesh; Taniguchi, Takashi; Watanabe, Kenji; Banerjee, Sanjay K; Tutuc, Emanuel

2017-05-23

Transition metal dichalcogenides are of interest for next generation switches, but the lack of low resistance electron and hole contacts in the same material has hindered the development of complementary field-effect transistors and circuits. We demonstrate an air-stable, reconfigurable, complementary monolayer MoTe 2 field-effect transistor encapsulated in hexagonal boron nitride, using electrostatically doped contacts. The introduction of a multigate design with prepatterned bottom contacts allows us to independently achieve low contact resistance and threshold voltage tuning, while also decoupling the Schottky contacts and channel gating. We illustrate a complementary inverter and a p-i-n diode as potential applications.

The Nanoelectric Modeling Tool (NEMO) and Its Expansion to High Performance Parallel Computing

NASA Technical Reports Server (NTRS)

Klimeck, G.; Bowen, C.; Boykin, T.; Oyafuso, F.; Salazar-Lazaro, C.; Stoica, A.; Cwik, T.

1998-01-01

Material variations on an atomic scale enable the quantum mechanical functionality of devices such as resonant tunneling diodes (RTDs), quantum well infrared photodetectors (QWIPs), quantum well lasers, and heterostructure field effect transistors (HFETs).

Light-Stimulated Synaptic Devices Utilizing Interfacial Effect of Organic Field-Effect Transistors.

PubMed

Dai, Shilei; Wu, Xiaohan; Liu, Dapeng; Chu, Yingli; Wang, Kai; Yang, Ben; Huang, Jia

2018-06-14

Synaptic transistors stimulated by light waves or photons may offer advantages to the devices, such as wide bandwidth, ultrafast signal transmission, and robustness. However, previously reported light-stimulated synaptic devices generally require special photoelectric properties from the semiconductors and sophisticated device's architectures. In this work, a simple and effective strategy for fabricating light-stimulated synaptic transistors is provided by utilizing interface charge trapping effect of organic field-effect transistors (OFETs). Significantly, our devices exhibited highly synapselike behaviors, such as excitatory postsynaptic current (EPSC) and pair-pulse facilitation (PPF), and presented memory and learning ability. The EPSC decay, PPF curves, and forgetting behavior can be well expressed by mathematical equations for synaptic devices, indicating that interfacial charge trapping effect of OFETs can be utilized as a reliable strategy to realize organic light-stimulated synapses. Therefore, this work provides a simple and effective strategy for fabricating light-stimulated synaptic transistors with both memory and learning ability, which enlightens a new direction for developing neuromorphic devices.

G4-FETs as Universal and Programmable Logic Gates

NASA Technical Reports Server (NTRS)

Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin

2007-01-01

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Study on the Hydrogenated ZnO-Based Thin Film Transistors. Part 1

DTIC Science & Technology

2011-04-30

IGZO film on the performance of thin film transistors 5 Chapter 2. Hydrogenation of a- IGZO channel layer in the thin film transistors 12...effect of substrate temperature during the deposition of a- IGZO film on the performance of thin film transistors Introduction The effect of substrate...temperature during depositing IGZO channel layer on the performance of amorphous indium-gallium-zinc oxide (a- IGZO

Noise characteristics of single-walled carbon nanotube network transistors.

PubMed

Kim, Un Jeong; Kim, Kang Hyun; Kim, Kyu Tae; Min, Yo-Sep; Park, Wanjun

2008-07-16

The noise characteristics of randomly networked single-walled carbon nanotubes grown directly by plasma enhanced chemical vapor deposition (PECVD) are studied with field effect transistors (FETs). Due to the geometrical complexity of nanotube networks in the channel area and the large number of tube-tube/tube-metal junctions, the inverse frequency, 1/f, dependence of the noise shows a similar level to that of a single single-walled carbon nanotube transistor. Detailed analysis is performed with the parameters of number of mobile carriers and mobility in the different environment. This shows that the change in the number of mobile carriers resulting in the mobility change due to adsorption and desorption of gas molecules (mostly oxygen molecules) to the tube surface is a key factor in the 1/f noise level for carbon nanotube network transistors.

Gate insulator effects on the electrical performance of ZnO thin film transistor on a polyethersulphone substrate.

PubMed

Lee, Jae-Kyu; Choi, Duck-Kyun

2012-07-01

Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.

Performance enhancement of pentacene-based organic thin-film transistors using 6,13-pentacenequinone as a carrier injection interlayer

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Wei-Chun; Chen, Hao-Wei

2018-06-01

This work demonstrates pentacene-based organic thin-film transistors (OTFTs) fabricated by inserting a 6,13-pentacenequinone (PQ) carrier injection layer between the source/drain (S/D) metal Au electrodes and pentacene channel layer. Compared to devices without a PQ layer, the performance characteristics including field-effect mobility, threshold voltage, and On/Off current ratio were significantly improved for the device with a 5-nm-thick PQ interlayer. These improvements are attributed to significant reduction of hole barrier height at the Au/pentacene channel interfaces. Therefore, it is believed that using PQ as the carrier injection layer is a good candidate to improve the pentacene-based OTFTs electrical performance.

Method for Providing Semiconductors Having Self-Aligned Ion Implant

NASA Technical Reports Server (NTRS)

Neudeck, Philip G. (Inventor)

2014-01-01

A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.

Method for Providing Semiconductors Having Self-Aligned Ion Implant

NASA Technical Reports Server (NTRS)

Neudeck, Philip G. (Inventor)

2011-01-01

A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

T-gate geometric (solution for submicrometer gate length) HEMT: Physical analysis, modeling and implementation as parasitic elements and its usage as dual gate for variable gain amplifiers

NASA Astrophysics Data System (ADS)

Gupta, Ritesh; Rathi, Servin; Kaur, Ravneet; Gupta, Mridula; Gupta, R. S.

2009-03-01

In order to achieve superior RF performance, short gate length is required for the compound semiconductor field effect transistors, but the limitation in lithography for submicrometer gate lengths leads to the formation of various metal-insulator geometries like T-gate [Sandeep R. Bahl, Jesus A. del Alamo, Physics of breakdown in InAlAs/ n +-InGaAs heterostructure field-effect transistors, IEEE Trans. Electron Devices 41 (12) (1994) 2268-2275]. These geometries are the combination of various Metal-Semiconductor (MS)/Metal-Air-Semiconductor (MAS) contacts. Moreover, field plates [S. Karmalkar, M.S. Shur, G. Simin, M. Asif Khan, Field-plate engineering for HFETs, IEEE Trans. Electron Devices 52 (2005) 2534-2540] are also being fabricated these days, mainly at the drain end ( Γ-gate) having Metal-Insulator-Semiconductor (MIS) instead of MAS contact with the intention of increasing the breakdown voltage of the device. To realize the effect of upper gate electrode in the T-gate structure and field plates, an analytical model has been proposed in the present article by dividing the whole structure into MS/MIS contact regions, applying current continuity among them and solving iteratively. The model proposed for Metal-Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) [R. Gupta, S.K. Aggarwal, M. Gupta, R.S. Gupta, Analytical model for metal insulator semiconductor high electron mobility transistor (MISHEMT) for its high frequency and high power applications, J. Semicond. Technol. Sci. 6 (3) (2006) 189-198], is equally applicable to High Electron Mobility Transistors (HEMT) and has been used to formulate this model. In this paper, various structures and geometries have been compared to anticipate the need of T-gate modeling. The effect of MIS contacts has been implemented as parasitic resistance and capacitance and has also been studied to control the middle conventional gate as in dual gate technology by applying separate voltages across it. The results obtained using the proposed analytical scheme has been compared with simulated and experimental results, to prove the validity of our model.

A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen

2004-01-01

The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.

Improving the radiation hardness of graphene field effect transistors

DOE PAGES

Alexandrou, Konstantinos; Masurkar, Amrita; Edrees, Hassan; ...

2016-10-11

Ionizing radiation poses a significant challenge to the operation and reliability of conventional silicon-based devices. In this paper, we report the effects of gamma radiation on graphene field-effect transistors (GFETs), along with a method to mitigate those effects by developing a radiation-hardened version of our back-gated GFETs. We demonstrate that activated atmospheric oxygen from the gamma ray interaction with air damages the semiconductor device, and damage to the substrate contributes additional threshold voltage instability. Our radiation-hardened devices, which have protection against these two effects, exhibit minimal performance degradation, improved stability, and significantly reduced hysteresis after prolonged gamma radiation exposure. Finally,more » we believe this work provides an insight into graphene's interactions with ionizing radiation that could enable future graphene-based electronic devices to be used for space, military, and other radiation-sensitive applications.« less

Improving the radiation hardness of graphene field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alexandrou, Konstantinos; Masurkar, Amrita; Edrees, Hassan

Ionizing radiation poses a significant challenge to the operation and reliability of conventional silicon-based devices. In this paper, we report the effects of gamma radiation on graphene field-effect transistors (GFETs), along with a method to mitigate those effects by developing a radiation-hardened version of our back-gated GFETs. We demonstrate that activated atmospheric oxygen from the gamma ray interaction with air damages the semiconductor device, and damage to the substrate contributes additional threshold voltage instability. Our radiation-hardened devices, which have protection against these two effects, exhibit minimal performance degradation, improved stability, and significantly reduced hysteresis after prolonged gamma radiation exposure. Finally,more » we believe this work provides an insight into graphene's interactions with ionizing radiation that could enable future graphene-based electronic devices to be used for space, military, and other radiation-sensitive applications.« less

Detection beyond Debye's length with an electrolyte-gated organic field-effect transistor.

PubMed

Palazzo, Gerardo; De Tullio, Donato; Magliulo, Maria; Mallardi, Antonia; Intranuovo, Francesca; Mulla, Mohammad Yusuf; Favia, Pietro; Vikholm-Lundin, Inger; Torsi, Luisa

2015-02-04

Electrolyte-gated organic field-effect transistors are successfully used as biosensors to detect binding events occurring at distances from the transistor electronic channel that are much larger than the Debye length in highly concentrated solutions. The sensing mechanism is mainly capacitive and is due to the formation of Donnan's equilibria within the protein layer, leading to an extra capacitance (CDON) in series to the gating system. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Use of cermet thin film resistors with nitride passivated metal insulator field effect transistor

NASA Technical Reports Server (NTRS)

Brown, G. A.; Harrap, V.

1971-01-01

Film deposition of cermet resistors on same chip with metal nitride oxide silicon field effect transistors permits protection of contamination sensitive active devices from contaminants produced in cermet deposition and definition processes. Additional advantages include lower cost, greater reliability, and space savings.

Scaling of graphene field-effect transistors supported on hexagonal boron nitride: radio-frequency stability as a limiting factor

NASA Astrophysics Data System (ADS)

Feijoo, Pedro C.; Pasadas, Francisco; Iglesias, José M.; Martín, María J.; Rengel, Raúl; Li, Changfeng; Kim, Wonjae; Riikonen, Juha; Lipsanen, Harri; Jiménez, David

2017-12-01

The quality of graphene in nanodevices has increased hugely thanks to the use of hexagonal boron nitride as a supporting layer. This paper studies to which extent hBN together with channel length scaling can be exploited in graphene field-effect transistors (GFETs) to get a competitive radio-frequency (RF) performance. Carrier mobility and saturation velocity were obtained from an ensemble Monte Carlo simulator that accounted for the relevant scattering mechanisms (intrinsic phonons, scattering with impurities and defects, etc). This information is fed into a self-consistent simulator, which solves the drift-diffusion equation coupled with the two-dimensional Poisson’s equation to take full account of short channel effects. Simulated GFET characteristics were benchmarked against experimental data from our fabricated devices. Our simulations show that scalability is supposed to bring to RF performance an improvement that is, however, highly limited by instability. Despite the possibility of a lower performance, a careful choice of the bias point can avoid instability. Nevertheless, maximum oscillation frequencies are still achievable in the THz region for channel lengths of a few hundreds of nanometers.

Effects of Energy Relaxation via Quantum Coupling Among Three-Dimensional Motion on the Tunneling Current of Graphene Field-Effect Transistors.

PubMed

Mao, Ling-Feng; Ning, Huansheng; Li, Xijun

2015-12-01

We report theoretical study of the effects of energy relaxation on the tunneling current through the oxide layer of a two-dimensional graphene field-effect transistor. In the channel, when three-dimensional electron thermal motion is considered in the Schrödinger equation, the gate leakage current at a given oxide field largely increases with the channel electric field, electron mobility, and energy relaxation time of electrons. Such an increase can be especially significant when the channel electric field is larger than 1 kV/cm. Numerical calculations show that the relative increment of the tunneling current through the gate oxide will decrease with increasing the thickness of oxide layer when the oxide is a few nanometers thick. This highlights that energy relaxation effect needs to be considered in modeling graphene transistors.

Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers.

PubMed

Dell' Anna, Francesco; Dong, Tao; Li, Ping; Wen, Yumei; Azadmehr, Mehdi; Casu, Mario; Berg, Yngvar

2018-04-17

This paper presents a novel threshold-compensation technique for multi-stage voltage multipliers employed in low power applications such as passive and autonomous wireless sensing nodes (WSNs) powered by energy harvesters. The proposed threshold-reduction technique enables a topological design methodology which, through an optimum control of the trade-off among transistor conductivity and leakage losses, is aimed at maximizing the voltage conversion efficiency (VCE) for a given ac input signal and physical chip area occupation. The conducted simulations positively assert the validity of the proposed design methodology, emphasizing the exploitable design space yielded by the transistor connection scheme in the voltage multiplier chain. An experimental validation and comparison of threshold-compensation techniques was performed, adopting 2N5247 N-channel junction field effect transistors (JFETs) for the realization of the voltage multiplier prototypes. The attained measurements clearly support the effectiveness of the proposed threshold-reduction approach, which can significantly reduce the chip area occupation for a given target output performance and ac input signal.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

NASA Astrophysics Data System (ADS)

Es-Sakhi, Azzedin D.

Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Organic field-effect transistors using single crystals.

PubMed

Hasegawa, Tatsuo; Takeya, Jun

2009-04-01

Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

Organic field-effect transistors using single crystals

PubMed Central

Hasegawa, Tatsuo; Takeya, Jun

2009-01-01

Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for ‘plastic electronics’. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. PMID:27877287

Continuous adjustment of threshold voltage in carbon nanotube field-effect transistors through gate engineering

NASA Astrophysics Data System (ADS)

Zhong, Donglai; Zhao, Chenyi; Liu, Lijun; Zhang, Zhiyong; Peng, Lian-Mao

2018-04-01

In this letter, we report a gate engineering method to adjust threshold voltage of carbon nanotube (CNT) based field-effect transistors (FETs) continuously in a wide range, which makes the application of CNT FETs especially in digital integrated circuits (ICs) easier. Top-gated FETs are fabricated using solution-processed CNT network films with stacking Pd and Sc films as gate electrodes. By decreasing the thickness of the lower layer metal (Pd) from 20 nm to zero, the effective work function of the gate decreases, thus tuning the threshold voltage (Vt) of CNT FETs from -1.0 V to 0.2 V. The continuous adjustment of threshold voltage through gate engineering lays a solid foundation for multi-threshold technology in CNT based ICs, which then can simultaneously provide high performance and low power circuit modules on one chip.

Improved performance of InSe field-effect transistors by channel encapsulation

NASA Astrophysics Data System (ADS)

Liang, Guangda; Wang, Yiming; Han, Lin; Yang, Zai-Xing; Xin, Qian; Kudrynskyi, Zakhar R.; Kovalyuk, Zakhar D.; Patanè, Amalia; Song, Aimin

2018-06-01

Due to the high electron mobility and photo-responsivity, InSe is considered as an excellent candidate for next generation electronics and optoelectronics. In particular, in contrast to many high-mobility two-dimensional (2D) materials, such as phosphorene, InSe is more resilient to oxidation in air. Nevertheless, its implementation in future applications requires encapsulation techniques to prevent the adsorption of gas molecules on its surface. In this work, we use a common lithography resist, poly(methyl methacrylate) (PMMA) to encapsulate InSe-based field-effect transistors (FETs). The encapsulation of InSe by PMMA improves the electrical stability of the FETs under a gate bias stress, and increases both the drain current and electron mobility. These findings indicate the effectiveness of the PMMA encapsulation method, which could be applied to other 2D materials.

Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

PubMed Central

Feng, Ping; Shao, Feng; Shi, Yi; Wan, Qing

2014-01-01

One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs) are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed. PMID:25232915

Nitrogen anion doping as a strategy to suppress negative gate-bias illumination instability of ZnSnO thin film transistor

NASA Astrophysics Data System (ADS)

Li, Jun; Fu, Yi-Zhou; Huang, Chuan-Xin; Zhang, Jian-Hua; Jiang, Xue-Yin; Zhang, Zhi-Lin

2016-04-01

This work presents a strategy of nitrogen anion doping to suppress negative gate-bias illumination instability. The electrical performance and negative gate-bias illumination stability of the ZnSnON thin film transistors (TFTs) are investigated. Compared with ZnSnO-TFT, ZnSnON-TFT has a 53% decrease in the threshold voltage shift under negative bias illumination stress and electrical performance also progresses obviously. The stability improvement of ZnSnON-TFT is attributed to the reduction in ionized oxygen vacancy defects and the photodesorption of oxygen-related molecules. It suggests that anion doping can provide an effective solution to the adverse tradeoff between field effect mobility and negative bias illumination stability.

Large-signal model of the bilayer graphene field-effect transistor targeting radio-frequency applications: Theory versus experiment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pasadas, Francisco, E-mail: Francisco.Pasadas@uab.cat; Jiménez, David

2015-12-28

Bilayer graphene is a promising material for radio-frequency transistors because its energy gap might result in a better current saturation than the monolayer graphene. Because the great deal of interest in this technology, especially for flexible radio-frequency applications, gaining control of it requires the formulation of appropriate models for the drain current, charge, and capacitance. In this work, we have developed them for a dual-gated bilayer graphene field-effect transistor. A drift-diffusion mechanism for the carrier transport has been considered coupled with an appropriate field-effect model taking into account the electronic properties of the bilayer graphene. Extrinsic resistances have been includedmore » considering the formation of a Schottky barrier at the metal-bilayer graphene interface. The proposed model has been benchmarked against experimental prototype transistors, discussing the main figures of merit targeting radio-frequency applications.« less

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NASA Astrophysics Data System (ADS)

Houin, G.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-09-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance with hysteresis-free characteristics. A number of approaches were applied to simplify the process, improve device performance and decrease the operating voltage: they include an oxide interfacial layer to decrease contact resistance; a polymer passivation layer to optimize semiconductor/dielectric interface and an anodized high-k oxide as dielectric layer for low voltage operation. The devices fabricated on plastic substrate yielded excellent electrical characteristics, showing mobility of 1.6 cm2/Vs, lack of hysteresis, operation below 5 V and on/off current ratio above 105. An OFET model based on variable ranging hopping theory was used to extract the relevant parameters from the transfer and output characteristics, which enabled us to simulate our devices achieving reasonable agreement with the measurements

Performance comparison between p–i–n and p–n junction tunneling field-effect transistors

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-06-01

In this study, we investigated the direct-current (DC) and radio-frequency (RF) performances of p–i–n and p–n junction tunneling field-effect transistors (TFETs). Compared to the p–i–n junction TFET, the p–n junction TFET exhibited higher on-state current (I on) because the channel formation mechanism of the p–n junction TFET resulted in a narrower tunneling barrier and an expanded tunneling area. Further, the reduction of I on of the p–n junction TFET by the interface trap was smaller. Moreover, the p–n junction TFET exhibited lower gate-to-drain capacitance (C gd) because a depletion capacitance (C gd,dep) was formed by the depletion region under gate dielectric. Consequently, the p–n junction TFET achieved an improvement of cut-off frequency (f T) and intrinsic delay time (τ), which are related to the current performance and total gate capacitance (C gg). We confirmed the enhancement of device performances in terms of I on, f T, and τ by the conduction mechanism of the p–n junction TFET.

Single event burnout sensitivity of embedded field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koga, R.; Crain, S.H.; Crawford, K.B.

Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described.

Single event burnout sensitivity of embedded field effect transistors

NASA Astrophysics Data System (ADS)

Koga, R.; Crain, S. H.; Crawford, K. B.; Yu, P.; Gordon, M. J.

1999-12-01

Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described.

Low-frequency electronic noise in single-layer MoS2 transistors.

PubMed

Sangwan, Vinod K; Arnold, Heather N; Jariwala, Deep; Marks, Tobin J; Lauhon, Lincoln J; Hersam, Mark C

2013-09-11

Ubiquitous low-frequency 1/f noise can be a limiting factor in the performance and application of nanoscale devices. Here, we quantitatively investigate low-frequency electronic noise in single-layer transition metal dichalcogenide MoS2 field-effect transistors. The measured 1/f noise can be explained by an empirical formulation of mobility fluctuations with the Hooge parameter ranging between 0.005 and 2.0 in vacuum (<10(-5) Torr). The field-effect mobility decreased, and the noise amplitude increased by an order of magnitude in ambient conditions, revealing the significant influence of atmospheric adsorbates on charge transport. In addition, single Lorentzian generation-recombination noise was observed to increase by an order of magnitude as the devices were cooled from 300 to 6.5 K.

Low-voltage organic transistors on plastic comprising high-dielectric constant gate insulators

PubMed

Dimitrakopoulos; Purushothaman; Kymissis; Callegari; Shaw

1999-02-05

The gate bias dependence of the field-effect mobility in pentacene-based insulated gate field-effect transistors (IGFETs) was interpreted on the basis of the interaction of charge carriers with localized trap levels in the band gap. This understanding was used to design and fabricate IGFETs with mobility of more than 0.3 square centimeter per volt per second and current modulation of 10(5), with the use of amorphous metal oxide gate insulators. These values were obtained at operating voltage ranges as low as 5 volts, which are much smaller than previously reported results. An all-room-temperature fabrication process sequence was used, which enabled the demonstration of high-performance organic IGFETs on transparent plastic substrates, at low operating voltages for organic devices.

Analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Hui Fang; Sun, Wen; Han, Xin Feng

2018-06-01

An analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors (HS-TFETs) is presented for the first time, where hetero stacked materials are composed of two different bandgaps. The bandgap of the underlying layer is smaller than that of the upper layer. Under different device parameters (upper layer thickness, underlying layer thickness, and hetero stacked materials) and temperature, the validity of the model is demonstrated by the agreement of its results with the simulation results. Moreover, the results show that the HS-TFETs can obtain predominant performance with relatively slow changes of subthreshold swing (SS) over a wide drain current range, steep average subthreshold swing, high on-state current, and large on–off state current ratio.

Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

DOEpatents

Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

2001-01-01

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Coulomb blockade based field-effect transistors exploiting stripe-shaped channel geometries of self-assembled metal nanoparticles.

PubMed

Lehmann, Hauke; Willing, Svenja; Möller, Sandra; Volkmann, Mirjam; Klinke, Christian

2016-08-14

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging energy. Thus, a Coulomb-energy gap emerges during transport experiments that can be shifted by electric fields, allowing for charge transport whenever energy levels of neighboring particles match. Hence, the state of the device changes sequentially between conducting and non-conducting instead of just one transition from conducting to pinch-off as in semiconductors. To exploit this behavior for field-effect transistors, it is necessary to use uniform nanoparticles in ordered arrays separated by well-defined tunnel barriers. In this work, CoPt nanoparticles with a narrow size distribution are synthesized by colloidal chemistry. These particles are deposited via the scalable Langmuir-Blodgett technique as ordered, homogeneous monolayers onto Si/SiO2 substrates with pre-patterned gold electrodes. The resulting nanoparticle arrays are limited to stripes of adjustable lengths and widths. In such a defined channel with a limited number of conduction paths the current can be controlled precisely by a gate voltage. Clearly pronounced Coulomb oscillations are observed up to temperatures of 150 K. Using such systems as field-effect transistors yields unprecedented oscillating current modulations with on/off-ratios of around 70%.

Multi-turn transmit coil to increase b1 efficiency in current source amplification.

PubMed

Gudino, N; Griswold, M A

2013-04-01

A multi-turn transmit surface coil design was presented to improve B1 efficiency when used with current source amplification. Three different coil designs driven by an on-coil current-mode class-D amplifier with current envelope feedback were tested on the benchtop and through imaging in a 1.5 T scanner. Case temperature of the power field-effect transistor at the amplifier output stage was measured to evaluate heat dissipation for the different current levels and coil configurations. In addition, a lower power rated device was tested to exploit the potential gain in B1 obtained with the multi-turn coil. As shown both on the benchtop and in a 1.5 T scanner, B1 was increased by almost 3-fold without increasing heat dissipation on the power device at the amplifier's output using a multi-turn surface coil. Similar gain was obtained when connecting a lower power rated field-effect transistor to the multi-turn coil. In addition to reduce heat dissipation per B1 in the device, higher B1 per current efficiency allows the use of field-effect transistors with lower current ratings and lower port capacitances, which could improve the overall performance of the on-coil current source transmit system. Copyright © 2013 Wiley Periodicals, Inc.

PbSe Nanocrystal Solids for n- and p-Channel Thin Film Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Talapin, Dmitri V.; Murray, Christopher B.

2005-10-01

Initially poorly conducting PbSe nanocrystal solids (quantum dot arrays or superlattices) can be chemically ``activated'' to fabricate n- and p-channel field effect transistors with electron and hole mobilities of 0.9 and 0.2 square centimeters per volt-second, respectively; with current modulations of about 103 to 104; and with current density approaching 3 × 104 amperes per square centimeter. Chemical treatments engineer the interparticle spacing, electronic coupling, and doping while passivating electronic traps. These nanocrystal field-effect transistors allow reversible switching between n- and p-transport, providing options for complementary metal oxide semiconductor circuits and enabling a range of low-cost, large-area electronic, optoelectronic, thermoelectric, and sensing applications.

Catalytic activity of enzymes immobilized on AlGaN /GaN solution gate field-effect transistors

NASA Astrophysics Data System (ADS)

Baur, B.; Howgate, J.; von Ribbeck, H.-G.; Gawlina, Y.; Bandalo, V.; Steinhoff, G.; Stutzmann, M.; Eickhoff, M.

2006-10-01

Enzyme-modified field-effect transistors (EnFETs) were prepared by immobilization of penicillinase on AlGaN /GaN solution gate field-effect transistors. The influence of the immobilization process on enzyme functionality was analyzed by comparing covalent immobilization and physisorption. Covalent immobilization by Schiff base formation on GaN surfaces modified with an aminopropyltriethoxysilane monolayer exhibits high reproducibility with respect to the enzyme/substrate affinity. Reductive amination of the Schiff base bonds to secondary amines significantly increases the stability of the enzyme layer. Electronic characterization of the EnFET response to penicillin G indicates that covalent immobilization leads to the formation of an enzyme (sub)monolayer.

Radiation and Thermal Cycling Effects on EPC1001 Gallium Nitride Power Transistors

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Scheick, Leif Z.; Lauenstein, Jean M.; Casey, Megan C.; Hammoud, Ahmad

2012-01-01

Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These include radiation, extreme temperatures, and thermal cycling, to name a few. Information pertaining to performance of electronic parts and systems under hostile environments is very scarce, especially for new devices. Such data is very critical so that proper design is implemented in order to ensure mission success and to mitigate risks associated with exposure of on-board systems to the operational environment. In this work, newly-developed enhancement-mode field effect transistors (FET) based on gallium nitride (GaN) technology were exposed to various particles of ionizing radiation and to long-term thermal cycling over a wide temperature range. Data obtained on control (un-irradiated) and irradiated samples of these power transistors are presented and the results are discussed.

Effects of HfO2 encapsulation on electrical performances of few-layered MoS2 transistor with ALD HfO2 as back-gate dielectric.

PubMed

Xu, Jingping; Wen, Ming; Zhao, Xinyuan; Liu, Lu; Song, Xingjuan; Lai, Pui-To; Tang, Wing-Man

2018-08-24

The carrier mobility of MoS 2 transistors can be greatly improved by the screening role of high-k gate dielectric. In this work, atomic-layer deposited (ALD) HfO 2 annealed in NH 3 is used to replace SiO 2 as the gate dielectric to fabricate back-gated few-layered MoS 2 transistors, and good electrical properties are achieved with field-effect mobility (μ) of 19.1 cm 2 V -1 s -1 , subthreshold swing (SS) of 123.6 mV dec -1 and on/off ratio of 3.76 × 10 5 . Furthermore, enhanced device performance is obtained when the surface of the MoS 2 channel is coated by an ALD HfO 2 layer with different thicknesses (10, 15 and 20 nm), where the transistor with a 15 nm HfO 2 encapsulation layer exhibits the best overall electrical properties: μ = 42.1 cm 2 V -1 s -1 , SS = 87.9 mV dec -1 and on/off ratio of 2.72 × 10 6 . These improvements should be associated with the enhanced screening effect on charged-impurity scattering and protection from absorption of environmental gas molecules by the high-k encapsulation. The capacitance equivalent thickness of the back-gate dielectric (HfO 2 ) is only 6.58 nm, which is conducive to scaling of the MoS 2 transistors.

The role of contact resistance in graphene field-effect devices

NASA Astrophysics Data System (ADS)

Giubileo, Filippo; Di Bartolomeo, Antonio

2017-08-01

The extremely high carrier mobility and the unique band structure, make graphene very useful for field-effect transistor applications. According to several works, the primary limitation to graphene based transistor performance is not related to the material quality, but to extrinsic factors that affect the electronic transport properties. One of the most important parasitic element is the contact resistance appearing between graphene and the metal electrodes functioning as the source and the drain. Ohmic contacts to graphene, with low contact resistances, are necessary for injection and extraction of majority charge carriers to prevent transistor parameter fluctuations caused by variations of the contact resistance. The International Technology Roadmap for Semiconductors, toward integration and down-scaling of graphene electronic devices, identifies as a challenge the development of a CMOS compatible process that enables reproducible formation of low contact resistance. However, the contact resistance is still not well understood despite it is a crucial barrier towards further improvements. In this paper, we review the experimental and theoretical activity that in the last decade has been focusing on the reduction of the contact resistance in graphene transistors. We will summarize the specific properties of graphene-metal contacts with particular attention to the nature of metals, impact of fabrication process, Fermi level pinning, interface modifications induced through surface processes, charge transport mechanism, and edge contact formation.

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

A study of effects of electrode contacts on performance of organic-based light-emitting field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Dae-Kyu; Choi, Jong-Ho

2018-02-01

Herein is presented a comparative performance analysis of heterojunction organic-based light-emitting field-effect transistors (OLEFETs) with symmetric (Au only) and asymmetric (Au and LiF/Al) electrode contacts. The devices had a top source-drain contact with long-channel geometry and were produced by sequentially depositing p-type pentacene and n-type N,N‧-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13) using a neutral cluster beam deposition apparatus. The spectroscopic, structural and morphological properties of the organic thin films were examined using photoluminescence (PL) spectroscopy, X-ray diffraction (XRD) method, laser scanning confocal and atomic force microscopy (LSCM, AFM). Based upon the growth of high-quality, well-packed crystalline thin films, the devices demonstrated ambipolar field-effect characteristics, stress-free operational stability, and light emission under ambient conditions. Various device parameters were derived from the fits of the observed characteristics. The hole mobilities were nearly equal irrespective of the electrode contacts, whereas the electron mobilities of the transistors with LiF/Al drain electrodes were higher due to the low injection barrier. For the OLEFETs with symmetric electrodes, electroluminescence (EL) occurred only in the vicinity of the hole-injecting electrode, whereas for the OLEFETs with asymmetric electrodes, the emission occurred in the vicinity of both hole- and electron-injecting electrodes. By tuning the carrier injection and transport through high- and low-work function metals, the hole-electron recombination sites could be controlled. The operating conduction and light emission mechanism are discussed with the aid of EL images obtained using a charge-coupled device (CCD) camera.

High on/off ratios in bilayer graphene field effect transistors realized by surface dopants.

PubMed

Szafranek, B N; Schall, D; Otto, M; Neumaier, D; Kurz, H

2011-07-13

The unique property of bilayer graphene to show a band gap tunable by external electrical fields enables a variety of different device concepts with novel functionalities for electronic, optoelectronic, and sensor applications. So far the operation of bilayer graphene-based field effect transistors requires two individual gates to vary the channel's conductance and to create a band gap. In this paper, we report on a method to increase the on/off ratio in single gated bilayer graphene field effect transistors by adsorbate doping. The adsorbate dopants on the upper side of the graphene establish a displacement field perpendicular to the graphene surface breaking the inversion symmetry of the two graphene layers. Low-temperature measurements indicate that the increased on/off ratio is caused by the opening of a mobility gap.

A hybrid nanomemristor/transistor logic circuit capable of self-programming

PubMed Central

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A. A.; Wu, Wei; Stewart, Duncan R.; Williams, R. Stanley

2009-01-01

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing. PMID:19171903

A hybrid nanomemristor/transistor logic circuit capable of self-programming.

PubMed

Borghetti, Julien; Li, Zhiyong; Straznicky, Joseph; Li, Xuema; Ohlberg, Douglas A A; Wu, Wei; Stewart, Duncan R; Williams, R Stanley

2009-02-10

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally configured by setting the state of a nonvolatile switch. Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing.

Low-temperature solution-processed zinc oxide field effect transistor by blending zinc hydroxide and zinc oxide nanoparticle in aqueous solutions

NASA Astrophysics Data System (ADS)

Shin, Hyeonwoo; Kang, Chan-mo; Baek, Kyu-Ha; Kim, Jun Young; Do, Lee-Mi; Lee, Changhee

2018-05-01

We present a novel methods of fabricating low-temperature (180 °C), solution-processed zinc oxide (ZnO) transistors using a ZnO precursor that is blended with zinc hydroxide [Zn(OH)2] and zinc oxide hydrate (ZnO • H2O) in an ammonium solution. By using the proposed method, we successfully improved the electrical performance of the transistor in terms of the mobility (μ), on/off current ratio (I on/I off), sub-threshold swing (SS), and operational stability. Our new approach to forming a ZnO film was systematically compared with previously proposed methods. An atomic forced microscopic (AFM) image and an X-ray photoelectron spectroscopy (XPS) analysis showed that our method increases the ZnO crystallite size with less OH‑ impurities. Thus, we attribute the improved electrical performance to the better ZnO film formation using the blending methods.

Vertical InAs nanowire wrap gate transistors with f(t) > 7 GHz and f(max) > 20 GHz.

PubMed

Egard, M; Johansson, S; Johansson, A-C; Persson, K-M; Dey, A W; Borg, B M; Thelander, C; Wernersson, L-E; Lind, E

2010-03-10

In this letter we report on high-frequency measurements on vertically standing III-V nanowire wrap-gate MOSFETs (metal-oxide-semiconductor field-effect transistors). The nanowire transistors are fabricated from InAs nanowires that are epitaxially grown on a semi-insulating InP substrate. All three terminals of the MOSFETs are defined by wrap around contacts. This makes it possible to perform high-frequency measurements on the vertical InAs MOSFETs. We present S-parameter measurements performed on a matrix consisting of 70 InAs nanowire MOSFETs, which have a gate length of about 100 nm. The highest unity current gain cutoff frequency, f(t), extracted from these measurements is 7.4 GHz and the maximum frequency of oscillation, f(max), is higher than 20 GHz. This demonstrates that this is a viable technique for fabricating high-frequency integrated circuits consisting of vertical nanowires.

Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

PubMed

Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

2015-01-14

Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

Enzyme-polyelectrolyte multilayer assemblies on reduced graphene oxide field-effect transistors for biosensing applications.

PubMed

Piccinini, Esteban; Bliem, Christina; Reiner-Rozman, Ciril; Battaglini, Fernando; Azzaroni, Omar; Knoll, Wolfgang

2017-06-15

We present the construction of layer-by-layer (LbL) assemblies of polyethylenimine and urease onto reduced-graphene-oxide based field-effect transistors (rGO FETs) for the detection of urea. This versatile biosensor platform simultaneously exploits the pH dependency of liquid-gated graphene-based transistors and the change in the local pH produced by the catalyzed hydrolysis of urea. The use of an interdigitated microchannel resulted in transistors displaying low noise, high pH sensitivity (20.3µA/pH) and transconductance values up to 800 µS. The modification of rGO FETs with a weak polyelectrolyte improved the pH response because of its transducing properties by electrostatic gating effects. In the presence of urea, the urease-modified rGO FETs showed a shift in the Dirac point due to the change in the local pH close to the graphene surface. Markedly, these devices operated at very low voltages (less than 500mV) and were able to monitor urea in the range of 1-1000µm, with a limit of detection (LOD) down to 1µm, fast response and good long-term stability. The urea-response of the transistors was enhanced by increasing the number of bilayers due to the increment of the enzyme surface coverage onto the channel. Moreover, quantification of the heavy metal Cu 2+ (with a LOD down to 10nM) was performed in aqueous solution by taking advantage of the urease specific inhibition. Copyright © 2016 The Authors. Published by Elsevier B.V. All rights reserved.

Magnetophoretic transistors in a tri-axial magnetic field.

PubMed

Abedini-Nassab, Roozbeh; Joh, Daniel Y; Albarghouthi, Faris; Chilkoti, Ashutosh; Murdoch, David M; Yellen, Benjamin B

2016-10-18

The ability to direct and sort individual biological and non-biological particles into spatially addressable locations is fundamentally important to the emerging field of single cell biology. Towards this goal, we demonstrate a new class of magnetophoretic transistors, which can switch single magnetically labeled cells and magnetic beads between different paths in a microfluidic chamber. Compared with prior work on magnetophoretic transistors driven by a two-dimensional in-plane rotating field, the addition of a vertical magnetic field bias provides significant advantages in preventing the formation of particle clumps and in better replicating the operating principles of circuits in general. However, the three-dimensional driving field requires a complete redesign of the magnetic track geometry and switching electrodes. We have solved this problem by developing several types of transistor geometries which can switch particles between two different tracks by either presenting a local energy barrier or by repelling magnetic objects away from a given track, hereby denoted as "barrier" and "repulsion" transistors, respectively. For both types of transistors, we observe complete switching of magnetic objects with currents of ∼40 mA, which is consistent over a range of particle sizes (8-15 μm). The switching efficiency was also tested at various magnetic field strengths (50-90 Oe) and driving frequencies (0.1-0.6 Hz); however, we again found that the device performance only weakly depended on these parameters. These findings support the use of these novel transistor geometries to form circuit architectures in which cells can be placed in defined locations and retrieved on demand.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high-power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Low-temperature phase transitions in a soluble oligoacene and their effect on device performance and stability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ward, J. W.; Goetz, K. P.; Obaid, A.

The use of organic semiconductors in high-performance organic field-effect transistors requires a thorough understanding of the effects that processing conditions, thermal, and bias-stress history have on device operation. Here, we evaluate the temperature dependence of the electrical properties of transistors fabricated with 2,8-difluoro-5,11-bis(triethylsilylethynyl)anthradithiophene, a material that has attracted much attention recently due to its exceptional electrical properties. We have discovered a phase transition at T = 205 K and discuss its implications on device performance and stability. We examined the impact of this low-temperature phase transition on the thermodynamic, electrical, and structural properties of both single crystals and thin films of this material.more » Our results show that while the changes to the crystal structure are reversible, the induced thermal stress yields irreversible degradation of the devices.« less

Field-Effect Transistors Based on Networks of Highly Aligned, Chemically Synthesized N = 7 Armchair Graphene Nanoribbons.

PubMed

Passi, Vikram; Gahoi, Amit; Senkovskiy, Boris V; Haberer, Danny; Fischer, Felix R; Grüneis, Alexander; Lemme, Max C

2018-03-28

We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percolation threshold. The long channel transistors exhibit a maximum I ON / I OFF current ratio of 87.5.

Organic Power Electronics: Transistor Operation in the kA/cm2 Regime

PubMed Central

Klinger, Markus P.; Fischer, Axel; Kaschura, Felix; Widmer, Johannes; Kheradmand-Boroujeni, Bahman; Ellinger, Frank; Leo, Karl

2017-01-01

In spite of interesting features as flexibility, organic thin-film transistors have commercially lagged behind due to the low mobilities of organic semiconductors associated with hopping transport. Furthermore, organic transistors usually have much larger channel lengths than their inorganic counterparts since high-resolution structuring is not available in low-cost production schemes. Here, we present an organic permeable-base transistor (OPBT) which, despite extremely simple processing without any high-resolution structuring, achieve a performance beyond what has so far been possible using organic semiconductors. With current densities above 1 kA cm−2 and switching speeds towards 100 MHz, they open the field of organic power electronics. Finding the physical limits and an effective mobility of only 0.06 cm2 V−1 s−1, this OPBT device architecture has much more potential if new materials optimized for its geometry will be developed. PMID:28303924

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures.

PubMed

Yan, Xiao; Zhang, David Wei; Liu, Chunsen; Bao, Wenzhong; Wang, Shuiyuan; Ding, Shijin; Zheng, Gengfeng; Zhou, Peng

2018-04-01

2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field-effect transistors. However, 2DLM-based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS 2 /GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM-based integrated circuits based on amplifier circuits.

Ultrasound-Induced Organogel Formation Followed by Thin Film Fabrication via Simple Doctor Blading Technique for Field-Effect Transistor Applications.

PubMed

Xu, Jiaju; Wang, Yulong; Shan, Haiquan; Lin, Yiwei; Chen, Qian; Roy, V A L; Xu, Zongxiang

2016-07-27

We demonstrate doctor blading technique to fabricate high performance transistors made up of printed small molecular materials. In this regard, we synthesize a new soluble phthalocyanine, tetra-n-butyl peripheral substituted copper(II) phthalocaynine (CuBuPc), that can easily undergo gel formation upon ultrasonic irradiation, leading to the formation of three-dimensional (3D) network composed of one-dimensional (1D) nanofibers structure. Finally, taking the advantage of thixotropic nature of the CuBuPc organogel, we use the doctor blade processing technique that limits the material wastage for the fabrication of transistor devices. Due to the ultrasound induced stronger π-π interaction, the transistor fabricated by doctor blading based on CuBuPc organogel exhibits significant increase in charge carrier mobility in comparison with other solution process techniques, thus paving a way for a simple and economically viable preparation of electronic circuits.

Organic Power Electronics: Transistor Operation in the kA/cm2 Regime.

PubMed

Klinger, Markus P; Fischer, Axel; Kaschura, Felix; Widmer, Johannes; Kheradmand-Boroujeni, Bahman; Ellinger, Frank; Leo, Karl

2017-03-17

In spite of interesting features as flexibility, organic thin-film transistors have commercially lagged behind due to the low mobilities of organic semiconductors associated with hopping transport. Furthermore, organic transistors usually have much larger channel lengths than their inorganic counterparts since high-resolution structuring is not available in low-cost production schemes. Here, we present an organic permeable-base transistor (OPBT) which, despite extremely simple processing without any high-resolution structuring, achieve a performance beyond what has so far been possible using organic semiconductors. With current densities above 1 kA cm -2 and switching speeds towards 100 MHz, they open the field of organic power electronics. Finding the physical limits and an effective mobility of only 0.06 cm 2  V -1  s -1 , this OPBT device architecture has much more potential if new materials optimized for its geometry will be developed.

Evaluation of Anisotropic Biaxial Stress Induced Around Trench Gate of Si Power Transistor Using Water-Immersion Raman Spectroscopy

NASA Astrophysics Data System (ADS)

Suzuki, Takahiro; Yokogawa, Ryo; Oasa, Kohei; Nishiwaki, Tatsuya; Hamamoto, Takeshi; Ogura, Atsushi

2018-05-01

The trench gate structure is one of the promising techniques to reduce on-state resistance (R on) for silicon power devices, such as insulated gate bipolar transistors and power metal-oxide-semiconductor field-effect transistors. In addition, it has been reported that stress is induced around the trench gate area, modifying the carrier mobilities. We evaluated the one-dimensional distribution and anisotropic biaxial stress by quasi-line excitation and water-immersion Raman spectroscopy, respectively. The results clearly confirmed anisotropic biaxial stress in state-of-the-art silicon power devices. It is theoretically possible to estimate carrier mobility using piezoresistance coefficients and anisotropic biaxial stress. The electron mobility was increased while the hole mobility was decreased or remained almost unchanged in the silicon (Si) power device. The stress significantly modifies the R on of silicon power transistors. Therefore, their performance can be improved using the stress around the trench gate.

A crystalline germanium flexible thin-film transistor

NASA Astrophysics Data System (ADS)

Higashi, H.; Nakano, M.; Kudo, K.; Fujita, Y.; Yamada, S.; Kanashima, T.; Tsunoda, I.; Nakashima, H.; Hamaya, K.

2017-11-01

We experimentally demonstrate a flexible thin-film transistor (TFT) with (111)-oriented crystalline germanium (Ge) layers grown by a gold-induced crystallization method. Accumulation-mode metal source/drain p-channel Ge TFTs are fabricated on a polyimide film at ≤ 400 ° C . A field-effect mobility (μFE) of 10.7 cm2/Vs is obtained, meaning the highest μFE in the p-TFTs fabricated at ≤ 400 ° C on flexible plastic substrates. This study will lead to high-performance flexible electronics based on an inorganic-semiconductor channel.

High-Performance Flexible Thin-Film Transistors Based on Single-Crystal-like Silicon Epitaxially Grown on Metal Tape by Roll-to-Roll Continuous Deposition Process.

PubMed

Gao, Ying; Asadirad, Mojtaba; Yao, Yao; Dutta, Pavel; Galstyan, Eduard; Shervin, Shahab; Lee, Keon-Hwa; Pouladi, Sara; Sun, Sicong; Li, Yongkuan; Rathi, Monika; Ryou, Jae-Hyun; Selvamanickam, Venkat

2016-11-02

Single-crystal-like silicon (Si) thin films on bendable and scalable substrates via direct deposition are a promising material platform for high-performance and cost-effective devices of flexible electronics. However, due to the thick and unintentionally highly doped semiconductor layer, the operation of transistors has been hampered. We report the first demonstration of high-performance flexible thin-film transistors (TFTs) using single-crystal-like Si thin films with a field-effect mobility of ∼200 cm 2 /V·s and saturation current, I/l W > 50 μA/μm, which are orders-of-magnitude higher than the device characteristics of conventional flexible TFTs. The Si thin films with a (001) plane grown on a metal tape by a "seed and epitaxy" technique show nearly single-crystalline properties characterized by X-ray diffraction, Raman spectroscopy, reflection high-energy electron diffraction, and transmission electron microscopy. The realization of flexible and high-performance Si TFTs can establish a new pathway for extended applications of flexible electronics such as amplification and digital circuits, more than currently dominant display switches.

Limits on silicon nanoelectronics for terascale integration.

PubMed

Meindl, J D; Chen, Q; Davis, J A

2001-09-14

Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

Length separation of single-walled carbon nanotubes and its impact on structural and electrical properties of wafer-level fabricated carbon nanotube-field-effect transistors

NASA Astrophysics Data System (ADS)

Böttger, Simon; Hermann, Sascha; Schulz, Stefan E.; Gessner, Thomas

2016-10-01

For an industrial realization of devices based on single-walled carbon nanotube (SWCNTs) such as field-effect transistors (FETs) it becomes increasingly important to consider technological aspects such as intrinsic device structure, integration process controllability as well as yield. From the perspective of a wafer-level integration technology, the influence of SWCNT length on the performance of short-channel CNT-FETs is demonstrated by means of a statistical and comparative study. Therefore, a methodological development of a length separation process based on size-exclusion chromatography was conducted in order to extract well-separated SWCNT dispersions with narrowed length distribution. It could be shown that short SWCNTs adversely affect integrability and reproducibility, underlined by a 25% decline of the integration yield with respect to long SWCNTs. Furthermore, it turns out that the significant changes in electrical performance are directly linked to a SWCNT chain formation in the transistor channel. In particular, CNT-FETs with long SWCNTs outperform reference and short SWCNTs with respect to hole mobility and subthreshold controllability by up to 300% and up to 140%, respectively. As a whole, this study provides a statistical and comparative analysis towards chain-less CNT-FETs fabricated with a wafer-level technology.

Electron and hole photoemission detection for band offset determination of tunnel field-effect transistor heterojunctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Wei; Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871; Zhang, Qin

2014-11-24

We report experimental methods to ascertain a complete energy band alignment of a broken-gap tunnel field-effect transistor based on an InAs/GaSb hetero-junction. By using graphene as an optically transparent electrode, both the electron and hole barrier heights at the InAs/GaSb interface can be quantified. For a Al{sub 2}O{sub 3}/InAs/GaSb layer structure, the barrier height from the top of the InAs and GaSb valence bands to the bottom of the Al{sub 2}O{sub 3} conduction band is inferred from electron emission whereas hole emissions reveal the barrier height from the top of the Al{sub 2}O{sub 3} valence band to the bottom ofmore » the InAs and GaSb conduction bands. Subsequently, the offset parameter at the broken gap InAs/GaSb interface is extracted and thus can be used to facilitate the development of predicted models of electron quantum tunneling efficiency and transistor performance.« less

Modeling of static electrical properties in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Minari, Takeo; Tsukagoshi, Kazuhito; Gwoziecki, Romain; Coppard, Romain; Benwadih, Mohamed; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-07-01

A modeling of organic field-effect transistors' (OFETs') electrical characteristics is presented. This model is based on a one-dimensional (1-D) Poisson's equation solution that solves the potential profile in the organic semiconducting film. Most importantly, it demonstrates that, due to the common open-surface configuration used in organic transistors, the conduction occurs in the film volume below threshold. This is because the potential at the free surface is not fixed to zero but rather rises also with the gate bias. The tail of carrier concentration at the free surface is therefore significantly modulated by the gate bias, which partially explains the gate-voltage dependent contact resistance. At the same time in the so-called subthreshold region, we observe a clear charge trapping from the difference between C-V and I-V measurements; hence a traps study by numerical simulation is also performed. By combining the analytical modeling and the traps analysis, the questions on the C-V and I-V characteristics are answered. Finally, the combined results obtained with traps fit well the experimental data in both pentacene and bis(triisopropylsilylethynyl)-pentacene OFETs.

MoS2 /Rubrene van der Waals Heterostructure: Toward Ambipolar Field-Effect Transistors and Inverter Circuits.

PubMed

He, Xuexia; Chow, WaiLeong; Liu, Fucai; Tay, BengKang; Liu, Zheng

2017-01-01

2D transition metal dichalcogenides are promising channel materials for the next-generation electronic device. Here, vertically 2D heterostructures, so called van der Waals solids, are constructed using inorganic molybdenum sulfide (MoS 2 ) few layers and organic crystal - 5,6,11,12-tetraphenylnaphthacene (rubrene). In this work, ambipolar field-effect transistors are successfully achieved based on MoS 2 and rubrene crystals with the well balanced electron and hole mobilities of 1.27 and 0.36 cm 2 V -1 s -1 , respectively. The ambipolar behavior is explained based on the band alignment of MoS 2 and rubrene. Furthermore, being a building block, the MoS 2 /rubrene ambipolar transistors are used to fabricate CMOS (complementary metal oxide semiconductor) inverters that show good performance with a gain of 2.3 at a switching threshold voltage of -26 V. This work paves a way to the novel organic/inorganic ultrathin heterostructure based flexible electronics and optoelectronic devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polymer-Sorted Semiconducting Carbon Nanotube Networks for High-Performance Ambipolar Field-Effect Transistors

PubMed Central

2014-01-01

Efficient selection of semiconducting single-walled carbon nanotubes (SWNTs) from as-grown nanotube samples is crucial for their application as printable and flexible semiconductors in field-effect transistors (FETs). In this study, we use atactic poly(9-dodecyl-9-methyl-fluorene) (a-PF-1-12), a polyfluorene derivative with asymmetric side-chains, for the selective dispersion of semiconducting SWNTs with large diameters (>1 nm) from plasma torch-grown SWNTs. Lowering the molecular weight of the dispersing polymer leads to a significant improvement of selectivity. Combining dense semiconducting SWNT networks deposited from an enriched SWNT dispersion with a polymer/metal-oxide hybrid dielectric enables transistors with balanced ambipolar, contact resistance-corrected mobilities of up to 50 cm2·V–1·s–1, low ohmic contact resistance, steep subthreshold swings (0.12–0.14 V/dec) and high on/off ratios (106) even for short channel lengths (<10 μm). These FETs operate at low voltages (<3 V) and show almost no current hysteresis. The resulting ambipolar complementary-like inverters exhibit gains up to 61. PMID:25493421

Investigation of InP/In0.65Ga0.35As metamorphic p-channel doped-channel field-effect transistor

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2016-07-01

In this article, the device mechanism and characteristics of InP/InGaAs metamorphic p-channel field-effect transistor (FET), which has a high indium mole fraction of InGaAs channel, grown on the GaAs substrate is demonstrated. The device was fabricated on the top of the InxGa1-xP graded metamorphic buffer layer, and the In0.65Ga0.35As pseudomorphic channel was employed to elevate the transistor performance. For the p-type FET, due to the considerably large valence band discontinuity at InP/In0.65Ga0.35As heterojunction and a relatively thin as well as heavily doped pseudomorphic In0.65Ga0.35As channel between two undoped InP layers, a maximum extrinsic transconductance of 27.3 mS/mm and a maximum saturation current density of -54.3 mA/mm are obtained. Consequently, the studied metamorphic FET is suitable for the development in signal amplification, integrated circuits, and low supply-voltage complementary logic inverters.

Combining axial and radial nanowire heterostructures: radial Esaki diodes and tunnel field-effect transistors.

PubMed

Dey, Anil W; Svensson, Johannes; Ek, Martin; Lind, Erik; Thelander, Claes; Wernersson, Lars-Erik

2013-01-01

The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1-4 and Cho et al., IEEE Int. Devices Meeting 2011, 15.1.1-15.1.4). The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties (del Alamo, Nature 2011, 479, 317-323, and Liao et al., Nature 2010, 467, 305-308). In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects; however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak current, Jpeak = 2310 kA/cm(2), than the maximum peak current of axial GaSb/InAs(Sb) Esaki diodes per unit chip area. The radial TFETs also deliver high peak current densities Jpeak = 1210 kA/cm(2), while their axial counterparts at most carry Jpeak = 77 kA/cm(2), normalized to the largest cross-sectional area of the nanowire.

The electrical and interfacial properties of metal-high-k oxide-semiconductor field effect transistors with CeO2/HfO2 laminated gate dielectrics

NASA Astrophysics Data System (ADS)

Chang, Ingram Yin-ku; Chen, Chun-Heng; Chiu, Fu-Chien; Lee, Joseph Ya-min

2007-11-01

Metal-oxide-semiconductor field-effect transistors with CeO2/HfO2 laminated gate dielectrics were fabricated. The transistors have a subthreshold slope of 74.9mV/decade. The interfacial properties were measured using gated diodes. The surface state density Dit was 9.78×1011cm-2eV-1. The surface-recombination velocity (s0) and the minority carrier lifetime in the field-induced depletion region (τ0,FIJ) measured from the gated diode were about 6.11×103cm /s and 1.8×10-8s, respectively. The effective capture cross section of surface state (σs) extracted using the subthreshold-swing measurement and the gated diode was about 7.69×10-15cm2. The effective electron mobility of CeO2/HfO2 laminated gated transistors was determined to be 212cm2/Vs.

Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors

NASA Astrophysics Data System (ADS)

Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.

2018-04-01

Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.

Effect of Al2O3 encapsulation on multilayer MoSe2 thin-film transistors

NASA Astrophysics Data System (ADS)

Lee, Hyun Ah; Yeoul Kim, Seong; Kim, Jiyoung; Choi, Woong

2017-03-01

We report the effect of Al2O3 encapsulation on the device performance of multilayer MoSe2 thin-film transistors based on statistical investigation of 29 devices with a SiO2 bottom-gate dielectric. On average, Al2O3 encapsulation by atomic layer deposition increased the field-effect mobility from 10.1 cm2 V-1 s-1 to 14.8 cm2 V-1 s-1, decreased the on/off-current ratio from 8.5  ×  105 to 2.3  ×  105 and negatively shifted the threshold voltage from  -1.1 V to  -8.1 V. Calculation based on the Y-function method indicated that the enhancement of intrinsic carrier mobility occurred independently of the reduction of contact resistance after Al2O3 encapsulation. Furthermore, contrary to previous reports in the literature, we observe a negligible effect of thermal annealing on contact resistance and carrier mobility during the atomic layer deposition of Al2O3. These results demonstrate that Al2O3 encapsulation is a useful method for improving the carrier mobility of multilayer MoSe2 transistors, providing important implications on the application of MoSe2 and other 2D materials into high-performance transistors.

Current saturation and voltage gain in bilayer graphene field effect transistors.

PubMed

Szafranek, B N; Fiori, G; Schall, D; Neumaier, D; Kurz, H

2012-03-14

The emergence of graphene with its unique electrical properties has triggered hopes in the electronic devices community regarding its exploitation as a channel material in field effect transistors. Graphene is especially promising for devices working at frequencies in the 100 GHz range. So far, graphene field effect transistors (GFETs) have shown cutoff frequencies up to 300 GHz, while exhibiting poor voltage gains, another important figure of merit for analog high frequency applications. In the present work, we show that the voltage gain of GFETs can be improved significantly by using bilayer graphene, where a band gap is introduced through a vertical electric displacement field. At a displacement field of -1.7 V/nm the bilayer GFETs exhibit an intrinsic voltage gain up to 35, a factor of 6 higher than the voltage gain in corresponding monolayer GFETs. The transconductance, which limits the cutoff frequency of a transistor, is not degraded by the displacement field and is similar in both monolayer and bilayer GFETs. Using numerical simulations based on an atomistic p(z) tight-binding Hamiltonian we demonstrate that this approach can be extended to sub-100 nm gate lengths. © 2012 American Chemical Society

Analytic model for low-frequency noise in nanorod devices.

PubMed

Lee, Jungil; Yu, Byung Yong; Han, Ilki; Choi, Kyoung Jin; Ghibaudo, Gerard

2008-10-01

In this work analytic model for generation of excess low-frequency noise in nanorod devices such as field-effect transistors are developed. In back-gate field-effect transistors where most of the surface area of the nanorod is exposed to the ambient, the surface states could be the major noise source via random walk of electrons for the low-frequency or 1/f noise. In dual gate transistors, the interface states and oxide traps can compete with each other as the main noise source via random walk and tunneling, respectively.

Controlling Chain Conformations of High-k Fluoropolymer Dielectrics to Enhance Charge Mobilities in Rubrene Single-Crystal Field-Effect Transistors.

PubMed

Adhikari, Jwala M; Gadinski, Matthew R; Li, Qi; Sun, Kaige G; Reyes-Martinez, Marcos A; Iagodkine, Elissei; Briseno, Alejandro L; Jackson, Thomas N; Wang, Qing; Gomez, Enrique D

2016-12-01

A novel photopatternable high-k fluoropolymer, poly(vinylidene fluoride-bromotrifluoroethylene) P(VDF-BTFE), with a dielectric constant (k) between 8 and 11 is demonstrated in thin-film transistors. Crosslinking P(VDF-BTFE) reduces energetic disorder at the dielectric-semiconductor interface by controlling the chain conformations of P(VDF-BTFE), thereby leading to approximately a threefold enhancement in the charge mobility of rubrene single-crystal field-effect transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Effect of Dielectric Interface on the Performance of MoS2 Transistors.

PubMed

Li, Xuefei; Xiong, Xiong; Li, Tiaoyang; Li, Sichao; Zhang, Zhenfeng; Wu, Yanqing

2017-12-27

Because of their wide bandgap and ultrathin body properties, two-dimensional materials are currently being pursued for next-generation electronic and optoelectronic applications. Although there have been increasing numbers of studies on improving the performance of MoS 2 field-effect transistors (FETs) using various methods, the dielectric interface, which plays a decisive role in determining the mobility, interface traps, and thermal transport of MoS 2 FETs, has not been well explored and understood. In this article, we present a comprehensive experimental study on the effect of high-k dielectrics on the performance of few-layer MoS 2 FETs from 300 to 4.3 K. Results show that Al 2 O 3 /HfO 2 could boost the mobility and drain current. Meanwhile, MoS 2 transistors with Al 2 O 3 /HfO 2 demonstrate a 2× reduction in oxide trap density compared to that of the devices with the conventional SiO 2 substrate. Also, we observe a negative differential resistance effect on the device with 1 μm-channel length when using conventional SiO 2 as the gate dielectric due to self-heating, and this is effectively eliminated by using the Al 2 O 3 /HfO 2 gate dielectric. This dielectric engineering provides a highly viable route to realizing high-performance transition metal dichalcogenide-based FETs.

Low noise charge sensitive preamplifier DC stabilized without a physical resistor

DOEpatents

Bertuccio, Giuseppe; Rehak, Pavel; Xi, Deming

1994-09-13

The invention is a novel charge sensitive preamplifier (CSP) which has no resistor in parallel with the feedback capacitor. No resetting circuit is required to discharge the feedback capacitor. The DC stabilization of the preamplifier is obtained by means of a second feedback loop between the preamplifier output and the common base transistor of the input cascode. The input transistor of the preamplifier is a Junction Field Transistor (JFET) with the gate-source junction forward biased. The detector leakage current flows into this junction. This invention is concerned with a new circuit configuration for a charge sensitive preamplifier and a novel use of the input Field Effect Transistor of the CSP itself. In particular this invention, in addition to eliminating the feedback resistor, eliminates the need for external devices between the detector and the preamplifier, and it eliminates the need for external circuitry to sense the output voltage and reset the CSP. Furthermore, the noise level of the novel CSP is very low, comparable with the performance achieved with other solutions. Experimental tests prove that this configuration for the charge sensitive preamplifier permits an excellent noise performance at temperatures including room temperature. An equivalent noise charge of less than 20 electrons r.m.s. has been measured at room temperature by using a commercial JFET as input device of the preamplifier.

Low noise charge sensitive preamplifier DC stabilized without a physical resistor

DOEpatents

Bertuccio, G.; Rehak, P.; Xi, D.

1994-09-13

The invention is a novel charge sensitive preamplifier (CSP) which has no resistor in parallel with the feedback capacitor. No resetting circuit is required to discharge the feedback capacitor. The DC stabilization of the preamplifier is obtained by means of a second feedback loop between the preamplifier output and the common base transistor of the input cascode. The input transistor of the preamplifier is a Junction Field Transistor (JFET) with the gate-source junction forward biased. The detector leakage current flows into this junction. This invention is concerned with a new circuit configuration for a charge sensitive preamplifier and a novel use of the input Field Effect Transistor of the CSP itself. In particular this invention, in addition to eliminating the feedback resistor, eliminates the need for external devices between the detector and the preamplifier, and it eliminates the need for external circuitry to sense the output voltage and reset the CSP. Furthermore, the noise level of the novel CSP is very low, comparable with the performance achieved with other solutions. Experimental tests prove that this configuration for the charge sensitive preamplifier permits an excellent noise performance at temperatures including room temperature. An equivalent noise charge of less than 20 electrons r.m.s. has been measured at room temperature by using a commercial JFET as input device of the preamplifier. 6 figs.

Mixed protonic and electronic conductors hybrid oxide synaptic transistors

NASA Astrophysics Data System (ADS)

Fu, Yang Ming; Zhu, Li Qiang; Wen, Juan; Xiao, Hui; Liu, Rui

2017-05-01

Mixed ionic and electronic conductor hybrid devices have attracted widespread attention in the field of brain-inspired neuromorphic systems. Here, mixed protonic and electronic conductor (MPEC) hybrid indium-tungsten-oxide (IWO) synaptic transistors gated by nanogranular phosphorosilicate glass (PSG) based electrolytes were obtained. Unique field-configurable proton self-modulation behaviors were observed on the MPEC hybrid transistor with extremely strong interfacial electric-double-layer effects. Temporally coupled synaptic plasticities were demonstrated on the MPEC hybrid IWO synaptic transistor, including depolarization/hyperpolarization, synaptic facilitation and depression, facilitation-stead/depression-stead behaviors, spiking rate dependent plasticity, and high-pass/low-pass synaptic filtering behaviors. MPEC hybrid synaptic transistors may find potential applications in neuron-inspired platforms.

Solution-processed zinc oxide field-effect transistors based on self-assembly of colloidal nanorods.

PubMed

Sun, Baoquan; Sirringhaus, Henning

2005-12-01

Colloidal zinc oxide (ZnO) nanocrystals are attractive candidates for a low-temperature and solution-processible semiconductor for high-performance thin-film field-effect transistors (TFTs). Here we show that by controlling the shape of the nanocrystals from spheres to rods the semiconducting properties of spin-coated ZnO films can be much improved as a result of increasing particle size and self-alignment of the nanorods along the substrate. Postdeposition hydrothermal growth in an aqueous zinc ion solution has been found to further enhance grain size and connectivity and improve device performance. TFT devices made from 65-nm-long and 10-nm-wide nanorods deposited by spin coating have been fabricated at moderate temperatures of 230 degrees C with mobilities of 0.61 cm(2)V(-1)s(-1) and on/off ratios of 3 x 10(5) after postdeposition growth, which is comparable to the characteristics of TFTs fabricated by traditional sputtering methods.

High-performance, low-operating voltage, and solution-processable organic field-effect transistor with silk fibroin as the gate dielectric

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shi, Leilei; Xu, Xinjun, E-mail: xuxj@mater.ustb.edu.cn, E-mail: lidong@mater.ustb.edu.cn; Ma, Mingchao

2014-01-13

We report the use of silk fibroin as the gate dielectric material in solution-processed organic field-effect transistors (OFETs) with poly(3-hexylthiophene) (P3HT) as the semiconducting layer. Such OFETs exhibit a low threshold of −0.77 V and a low-operating voltage (0 to −3 V) compatible with the voltage level commonly-used in current electronic industry. The carrier mobility of such OFETs is as high as 0.21 cm{sup 2} V{sup −1} s{sup −1} in the saturation regime, comparable to the best value of P3HT-based OFETs with dielectric layer that is not solution-processed. The high-performance of this kind of OFET is related with the high contentmore » of β strands in fibroin dielectric which leads to an array of fibers in a highly ordered structure, thus reducing the trapping sites at the semiconductor/dielectric interface.« less

Thin film three-dimensional topological insulator metal-oxide-semiconductor field-effect-transistors: A candidate for sub-10 nm devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akhavan, N. D., E-mail: nima.dehdashti@uwa.edu.au; Jolley, G.; Umana-Membreno, G. A.

2014-08-28

Three-dimensional (3D) topological insulators (TI) are a new state of quantum matter in which surface states reside in the bulk insulating energy bandgap and are protected by time-reversal symmetry. It is possible to create an energy bandgap as a consequence of the interaction between the conduction band and valence band surface states from the opposite surfaces of a TI thin film, and the width of the bandgap can be controlled by the thin film thickness. The formation of an energy bandgap raises the possibility of thin-film TI-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). In this paper, we explore the performance of MOSFETs basedmore » on thin film 3D-TI structures by employing quantum ballistic transport simulations using the effective continuous Hamiltonian with fitting parameters extracted from ab-initio calculations. We demonstrate that thin film transistors based on a 3D-TI structure provide similar electrical characteristics compared to a Si-MOSFET for gate lengths down to 10 nm. Thus, such a device can be a potential candidate to replace Si-based MOSFETs in the sub-10 nm regime.« less

Ultrashort channel silicon nanowire transistors with nickel silicide source/drain contacts.

PubMed

Tang, Wei; Dayeh, Shadi A; Picraux, S Tom; Huang, Jian Yu; Tu, King-Ning

2012-08-08

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Facile fabrication of high-performance InGaZnO thin film transistor using hydrogen ion irradiation at room temperature

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Byung Du; Park, Jin-Seong; Chung, K. B., E-mail: kbchung@dongguk.edu

Device performance of InGaZnO (IGZO) thin film transistors (TFTs) are investigated as a function of hydrogen ion irradiation dose at room temperature. Field effect mobility is enhanced, and subthreshold gate swing is improved with the increase of hydrogen ion irradiation dose, and there is no thermal annealing. The electrical device performance is correlated with the electronic structure of IGZO films, such as chemical bonding states, features of the conduction band, and band edge states below the conduction band. The decrease of oxygen deficient bonding and the changes in electronic structure of the conduction band leads to the improvement of devicemore » performance in IGZO TFT with an increase of the hydrogen ion irradiation dose.« less

pH-sensitive ion-selective field-effect transistor with zirconium dioxide film

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vlasov, Yu.G.; Bratov, A.V.; Tarantov, Yu.A.

1988-09-20

Miniature semiconductor pH sensors for liquid media, i.e., ion-selective field-effect transistors (ISFETs), are silicon field-effect transistors with a two-layer dielectric consisting of a passivating SiO/sub 2/ layer adjoining the silicon and a layer of pH-sensitive material in contact with the electrolyte solution to be tested. This study was devoted to the characteristics of pH-sensitive ISFETs with ZrO/sub 2/ films. The base was p-type silicon (KDB-10) with a (100) surface orientation. A ZrO/sub 2/ layer 10-50 nm thick was applied over the SiO/sub 2/ layer by electron-beam deposition. The measurements were made in aqueous KNO/sub 3/ or KCl solutions.

A new surface-potential-based compact model for the MoS2 field effect transistors in active matrix display applications

NASA Astrophysics Data System (ADS)

Cao, Jingchen; Peng, Songang; Liu, Wei; Wu, Quantan; Li, Ling; Geng, Di; Yang, Guanhua; Ji, Zhouyu; Lu, Nianduan; Liu, Ming

2018-02-01

We present a continuous surface-potential-based compact model for molybdenum disulfide (MoS2) field effect transistors based on the multiple trapping release theory and the variable-range hopping theory. We also built contact resistance and velocity saturation models based on the analytical surface potential. This model is verified with experimental data and is able to accurately predict the temperature dependent behavior of the MoS2 field effect transistor. Our compact model is coded in Verilog-A, which can be implemented in a computer-aided design environment. Finally, we carried out an active matrix display simulation, which suggested that the proposed model can be successfully applied to circuit design.

Broadening of Distribution of Trap States in PbS Quantum Dot Field-Effect Transistors with High-k Dielectrics

PubMed Central

2017-01-01

We perform a quantitative analysis of the trap density of states (trap DOS) in PbS quantum dot field-effect transistors (QD-FETs), which utilize several polymer gate insulators with a wide range of dielectric constants. With increasing gate dielectric constant, we observe increasing trap DOS close to the lowest unoccupied molecular orbital (LUMO) of the QDs. In addition, this increase is also consistently followed by broadening of the trap DOS. We rationalize that the increase and broadening of the spectral trap distribution originate from dipolar disorder as well as polaronic interactions, which are appearing at strong dielectric polarization. Interestingly, the increased polaron-induced traps do not show any negative effect on the charge carrier mobility in our QD devices at the highest applied gate voltage, giving the possibility to fabricate efficient low-voltage QD devices without suppressing carrier transport. PMID:28084725

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

NASA Astrophysics Data System (ADS)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

Phosphorus Doping Effect in a Zinc Oxide Channel Layer to Improve the Performance of Oxide Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Han, Dong-Suk; Moon, Yeon-Keon; Lee, Sih; Kim, Kyung-Taek; Moon, Dae-Yong; Lee, Sang-Ho; Kim, Woong-Sun; Park, Jong-Wan

2012-09-01

In this study, we fabricated phosphorus-doped zinc oxide-based thin-film transistors (TFTs) using direct current (DC) magnetron sputtering at a relatively low temperature of 100°C. To improve the TFT device performance, including field-effect mobility and bias stress stability, phosphorus dopants were employed to suppress the generation of intrinsic defects in the ZnO-based semiconductor. The positive and negative bias stress stabilities were dramatically improved by introducing the phosphorus dopants, which could prevent turn-on voltage ( V ON) shift in the TFTs caused by charge trapping within the active channel layer. The study showed that phosphorus doping in ZnO was an effective method to control the electrical properties of the active channel layers and improve the bias stress stability of oxide-based TFTs.

Impact of device engineering on analog/RF performances of tunnel field effect transistors

NASA Astrophysics Data System (ADS)

Vijayvargiya, V.; Reniwal, B. S.; Singh, P.; Vishvakarma, S. K.

2017-06-01

The tunnel field effect transistor (TFET) and its analog/RF performance is being aggressively studied at device architecture level for low power SoC design. Therefore, in this paper we have investigated the influence of the gate-drain underlap (UL) and different dielectric materials for the spacer and gate oxide on DG-TFET (double gate TFET) and its analog/RF performance for low power applications. Here, it is found that the drive current behavior in DG-TFET with a UL feature while implementing dielectric material for the spacer is different in comparison to that of DG-FET. Further, hetero gate dielectric-based DG-TFET (HGDG-TFET) is more resistive against drain-induced barrier lowering (DIBL) as compared to DG-TFET with high-k (HK) gate dielectric. Along with that, as compared to DG-FET, this paper also analyses the attributes of UL and dielectric material on analog/RF performance of DG-TFET in terms of transconductance (gm ), transconductance generation factor (TGF), capacitance, intrinsic resistance (Rdcr), cut-off frequency (F T), and maximum oscillation frequency (F max). The LK spacer-based HGDG-TFET with a gate-drain UL has the potential to improve the RF performance of device.

Development of high-performance printed organic field-effect transistors and integrated circuits.

PubMed

Xu, Yong; Liu, Chuan; Khim, Dongyoon; Noh, Yong-Young

2015-10-28

Organic electronics is regarded as an important branch of future microelectronics especially suited for large-area, flexible, transparent, and green devices, with their low cost being a key benefit. Organic field-effect transistors (OFETs), the primary building blocks of numerous expected applications, have been intensively studied, and considerable progress has recently been made. However, there are still a number of challenges to the realization of high-performance OFETs and integrated circuits (ICs) using printing technologies. Therefore, in this perspective article, we investigate the main issues concerning developing high-performance printed OFETs and ICs and seek strategies for further improvement. Unlike many other studies in the literature that deal with organic semiconductors (OSCs), printing technology, and device physics, our study commences with a detailed examination of OFET performance parameters (e.g., carrier mobility, threshold voltage, and contact resistance) by which the related challenges and potential solutions to performance development are inspected. While keeping this complete understanding of device performance in mind, we check the printed OFETs' components one by one and explore the possibility of performance improvement regarding device physics, material engineering, processing procedure, and printing technology. Finally, we analyze the performance of various organic ICs and discuss ways to optimize OFET characteristics and thus develop high-performance printed ICs for broad practical applications.

Investigation of performance enhancement in InAs/InGaAs heterojunction-enhanced N-channel tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Han, Genquan; Zhao, Bin; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Hu, Shengdong; Hao, Yue

2015-12-01

We design a heterojunction-enhanced n-channel tunneling field effect transistor (HE-TFET) with an InAs/In1-xGaxAs heterojunction located in channel region with a distance of LT-H from source/channel tunneling junction. The influence of LT-H on the performance of HE-TFETs is investigated by simulation. Compared with InAs homo-NTFET, the positive shift of onset voltage, the steeper subthreshold swing (SS), and the enhanced on-state current ION are achieved in HE-NTFETs, which is attributed to the modulation of the heterojunction on band-to-band tunneling. At a supply voltage of 0.3 V, ION of InAs/In0.9Ga0.1As HE-NTFET with a LT-H of 6 nm demonstrates an enhancement of 119.3% in comparison with the homo device. Furthermore, the impact of Ga composition on the performance of HE-NTFETs is studied. As the Ga composition increases, the average SS characteristics of HE-NTFETs are improved, while the drive current of devices is reduced due to the increasing of tunneling barrier.

Performance regeneration of InGaZnO transistors with ultra-thin channels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Binglei; Li, He; Zhang, Xijian, E-mail: zhangxijian@sdu.edu.cn, E-mail: songam@sdu.edu.cn

2015-03-02

Thin-film transistors (TFTs) based on ultra-thin amorphous indium gallium zinc oxide (a-IGZO) semiconductors down to 4 nm were studied motivated by the increasing cost of indium. At and below 5 nm, it was found that the field-effect mobility was severely degraded, the threshold voltage increased, and the output characteristics became abnormal showing no saturated current. By encapsulating a layer of polymethyl methacrylate on the IGZO TFTs, the performance of the 5-nm-thick device was effectively recovered. The devices also showed much higher on/off ratios, improved hysteresis, and normal output characteristic curves as compared with devices not encapsulated. The stability of the encapsulated devicesmore » was also studied over a four month period.« less

Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori

2016-07-18

The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulationmore » by the gate and pinch off.« less

Increased mobility and on/off ratio in organic field-effect transistors using low-cost guanine-pentacene multilayers

NASA Astrophysics Data System (ADS)

Shi, Wei; Zheng, Yifan; Taylor, André D.; Yu, Junsheng; Katz, Howard E.

2017-07-01

Layer-by-layer deposited guanine and pentacene in organic field-effect transistors (OFETs) is introduced. Through adjusting the layer thickness ratio of guanine and pentacene, the tradeoff of two electronic parameters in OFETs, charge carrier mobility and current on/off ratio, was controlled. The charge mobility was enhanced by depositing pentacene over and between guanine layers and by increasing the proportion of pentacene in the layer-by-layer system, while the current on/off ratio was increased via the decreased off current induced by the guanine layers. The tunable device performance was mainly ascribed to the trap and dopant neutralizing properties of the guanine layers, which would decrease the density of free hydroxyl groups in the OFETs. Furthermore, the cost of the devices could be reduced remarkably via the adoption of low-cost guanine.

Drying Temperature Dependence of Sol-gel Spin Coated Bilayer Composite ZnO/TiO2 Thin Films for Extended Gate Field Effect Transistor pH Sensor

NASA Astrophysics Data System (ADS)

Rahman, R. A.; Zulkefle, M. A.; Yusoff, K. A.; Abdullah, W. F. H.; Rusop, M.; Herman, S. H.

2018-03-01

This study presents an investigation on zinc oxide (ZnO) and titanium dioxide (TiO2) bilayer film applied as the sensing membrane for extended-gate field effect transistor (EGFET) for pH sensing application. The influences of the drying temperatures on the pH sensing capability of ZnO/TiO2 were investigated. The sensing performance of the thin films were measured by connecting the thin film to a commercial MOSFET to form the extended gates. By varying the drying temperature, we found that the ZnO/TiO2 thin film dried at 150°C gave the highest sensitivity compared to other drying conditions, with the sensitivity value of 48.80 mV/pH.

An organic transistor-based system for reference-less electrophysiological monitoring of excitable cells

PubMed Central

Spanu, A.; Lai, S.; Cosseddu, P.; Tedesco, M.; Martinoia, S.; Bonfiglio, A.

2015-01-01

In the last four decades, substantial advances have been done in the understanding of the electrical behavior of excitable cells. From the introduction in the early 70's of the Ion Sensitive Field Effect Transistor (ISFET), a lot of effort has been put in the development of more and more performing transistor-based devices to reliably interface electrogenic cells such as, for example, cardiac myocytes and neurons. However, depending on the type of application, the electronic devices used to this aim face several problems like the intrinsic rigidity of the materials (associated with foreign body rejection reactions), lack of transparency and the presence of a reference electrode. Here, an innovative system based on a novel kind of organic thin film transistor (OTFT), called organic charge modulated FET (OCMFET), is proposed as a flexible, transparent, reference-less transducer of the electrical activity of electrogenic cells. The exploitation of organic electronics in interfacing the living matters will open up new perspectives in the electrophysiological field allowing us to head toward a modern era of flexible, reference-less, and low cost probes with high-spatial and high-temporal resolution for a new generation of in-vitro and in-vivo monitoring platforms. PMID:25744085

Fully transparent conformal organic thin-film transistor array and its application as LED front driving.

PubMed

Cui, Nan; Ren, Hang; Tang, Qingxin; Zhao, Xiaoli; Tong, Yanhong; Hu, Wenping; Liu, Yichun

2018-02-22

A fully transparent conformal organic thin-film field-effect transistor array is demonstrated based on a photolithography-compatible ultrathin metallic grid gate electrode and a solution-processed C 8 -BTBT film. The resulting organic field-effect transistor array exhibits a high optical transparency of >80% over the visible spectrum, mobility up to 2 cm 2 V -1 s -1 , on/off ratio of 10 5 -10 6 , switching current of >0.1 mA, and excellent light stability. The transparent conformal transistor array is demonstrated to adhere well to flat and curved LEDs as front driving. These results present promising applications of the solution-processed wide-bandgap organic semiconductor thin films in future large-scale transparent conformal active-matrix displays.

Gate Tunable Transport in Graphene/MoS₂/(Cr/Au) Vertical Field-Effect Transistors.

PubMed

Nazir, Ghazanfar; Khan, Muhammad Farooq; Aftab, Sikandar; Afzal, Amir Muhammad; Dastgeer, Ghulam; Rehman, Malik Abdul; Seo, Yongho; Eom, Jonghwa

2017-12-28

Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS₂/(Cr/Au) vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr), the electrical transport in our Gr/MoS₂/(Cr/Au) vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS₂ can be modified by back-gate voltage and the current bias. Vertical resistance (R vert ) of a Gr/MoS₂/(Cr/Au) transistor is compared with planar resistance (R planar ) of a conventional lateral MoS₂ field-effect transistor. We have also studied electrical properties for various thicknesses of MoS₂ channels in both vertical and lateral transistors. As the thickness of MoS₂ increases, R vert increases, but R planar decreases. The increase of R vert in the thicker MoS₂ film is attributed to the interlayer resistance in the vertical direction. However, R planar shows a lower value for a thicker MoS₂ film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.

Inkjet-Printed In-Ga-Zn Oxide Thin-Film Transistors with Laser Spike Annealing

NASA Astrophysics Data System (ADS)

Huang, Hang; Hu, Hailong; Zhu, Jingguang; Guo, Tailiang

2017-07-01

Inkjet-printed In-Ga-Zn oxide (IGZO) thin-film transistors (TFTs) have been fabricated at low temperature using laser spike annealing (LSA) treatment. Coffee-ring effects during the printing process were eliminated to form uniform IGZO films by simply increasing the concentration of solute in the ink. The impact of LSA on the TFT performance was studied. The field-effect mobility, threshold voltage, and on/off current ratio were greatly influenced by the LSA treatment. With laser scanning at 1 mm/s for 40 times, the 30-nm-thick IGZO TFT baked at 200°C showed mobility of 1.5 cm2/V s, threshold voltage of -8.5 V, and on/off current ratio >106. Our findings demonstrate the feasibility of rapid LSA treatment of low-temperature inkjet-printed oxide semiconductor transistors, being comparable to those obtained by conventional high-temperature annealing.

Recent Progress in Obtaining Semiconducting Single-Walled Carbon Nanotubes for Transistor Applications.

PubMed

Islam, Ahmad E; Rogers, John A; Alam, Muhammad A

2015-12-22

High purity semiconducting single-walled carbon nanotubes (s-SWCNTs) with a narrow diameter distribution are required for high-performance transistors. Achieving this goal is extremely challenging because the as-grown material contains mixtures of s-SWCNTs and metallic- (m-) SWCNTs with wide diameter distributions, typically inadequate for integrated circuits. Since 2000, numerous ex situ methods have been proposed to improve the purity of the s-SWCNTs. The majority of these techniques fail to maintain the quality and integrity of the s-SWCNTs with a few notable exceptions. Here, the progress in realizing high purity s-SWCNTs in as-grown and post-processed materials is highlighted. A comparison of transistor parameters (such as on/off ratio and field-effect mobility) obtained from test structures establishes the effectiveness of various methods and suggests opportunities for future improvements. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Effects of Gold Nanoparticles on Pentacene Organic Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Lee, Keanchuan; Weis, Martin; Ou-Yang, Wei; Taguchi, Dai; Manaka, Takaaki; Iwamoto, Mitsumasa

2011-04-01

The effect of gold nanoparticles (NPs) on pentacene organic field-effect transistors (OFETs) was being investigated by both DC and AC methods, which are current-voltage (I-V) measurements in steady-state and impedance spectroscopy (IS) respectively. Here poly(vinyl alcohol) (PVA) and PVA blended with Au NPs as composite are spin-coated on SiO2 as gate-insulator for top-contact pentacene OFET. The characteristics of the device were being investigated based on the contact resistance, trapped charges, effective mobility and threshold voltage based on transfer characteristics of OFET. Results revealed that OFET with NPs exhibited larger hysteresis and higher contact resistance at high voltage region. IS measurements were performed and the fitting of results by the Maxwell-Wagner equivalent circuit showed that for device with NPs a series of capacitance and resistance which represents trapping must be introduced in order to have agreeable fitting. The fitting had helped to clarify the reason behind the higher contact resistance and bigger hysteresis which was mainly caused by the space charge field formed by the traps when Au NPs were introduced into the device.

Mobility overestimation due to gated contacts in organic field-effect transistors

PubMed Central

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Ge/IIIV fin field-effect transistor common gate process and numerical simulations

NASA Astrophysics Data System (ADS)

Chen, Bo-Yuan; Chen, Jiann-Lin; Chu, Chun-Lin; Luo, Guang-Li; Lee, Shyong; Chang, Edward Yi

2017-04-01

This study investigates the manufacturing process of thermal atomic layer deposition (ALD) and analyzes its thermal and physical mechanisms. Moreover, experimental observations and computational fluid dynamics (CFD) are both used to investigate the formation and deposition rate of a film for precisely controlling the thickness and structure of the deposited material. First, the design of the TALD system model is analyzed, and then CFD is used to simulate the optimal parameters, such as gas flow and the thermal, pressure, and concentration fields, in the manufacturing process to assist the fabrication of oxide-semiconductors and devices based on them, and to improve their characteristics. In addition, the experiment applies ALD to grow films on Ge and GaAs substrates with three-dimensional (3-D) transistors having high electric performance. The electrical analysis of dielectric properties, leakage current density, and trapped charges for the transistors is conducted by high- and low-frequency measurement instruments to determine the optimal conditions for 3-D device fabrication. It is anticipated that the competitive strength of such devices in the semiconductor industry will be enhanced by the reduction of cost and improvement of device performance through these optimizations.

Automated System Tests High-Power MOSFET's

NASA Technical Reports Server (NTRS)

Huston, Steven W.; Wendt, Isabel O.

1994-01-01

Computer-controlled system tests metal-oxide/semiconductor field-effect transistors (MOSFET's) at high voltages and currents. Measures seven parameters characterizing performance of MOSFET, with view toward obtaining early indication MOSFET defective. Use of test system prior to installation of power MOSFET in high-power circuit saves time and money.

Current and emerging challenges of field effect transistor based bio-sensing

NASA Astrophysics Data System (ADS)

Matsumoto, Akira; Miyahara, Yuji

2013-10-01

Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed ``Bio-FETs'', provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.

Current and emerging challenges of field effect transistor based bio-sensing.

PubMed

Matsumoto, Akira; Miyahara, Yuji

2013-11-21

Field-effect-transistor (FET) based electrical signal transduction is an increasingly prevalent strategy for bio-sensing. This technique, often termed "Bio-FETs", provides an essentially label-free and real-time based bio-sensing platform effective for a variety of targets. This review highlights recent progress and challenges in the field. A special focus is on the comprehension of emerging nanotechnology-based approaches to facilitate signal-transduction and amplification. Some new targets of Bio-FETs and the future perspectives are also discussed.

Application of the Johnson criteria to graphene transistors

NASA Astrophysics Data System (ADS)

Kelly, M. J.

2013-12-01

For 60 years, the Johnson criteria have guided the development of materials and the materials choices for field-effect and bipolar transistor technology. Intrinsic graphene is a semi-metal, precluding transistor applications, but only under lateral bias is a gap opened and transistor action possible. This first application of the Johnson criteria to biased graphene suggests that this material will struggle to ever achieve competitive commercial applications.

Assessment of Phospohrene Field Effect Transistors

DTIC Science & Technology

2018-01-28

electronics industry. To this end, transistor test structures would initially be fabricated on phosphorene exfoliated from black phosphorus and, later, on...34Phosphorene FETs-Promising Transistors Based on a few Layers of Phosphorus Atoms," Nanjing Electronic Devices Institute, Nanjing, China, Jul. 2015...OH, Nov. 2015. J.C. M. Hwang, "Phosphorene Transistors-Transient or Lasting Electronics ?" Workshop Frontier Electronics , San Juan, PR, Dec. 2015

Liquid-Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing.

PubMed

Zhang, Yu; Li, Jun; Li, Rui; Sbircea, Dan-Tiberiu; Giovannitti, Alexander; Xu, Junling; Xu, Huihua; Zhou, Guodong; Bian, Liming; McCulloch, Iain; Zhao, Ni

2017-11-08

Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid-liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the "sensing channel" can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.

Efficient G(sup 4)FET-Based Logic Circuits

NASA Technical Reports Server (NTRS)

Vatan, Farrokh

2008-01-01

A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

NASA Astrophysics Data System (ADS)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

Electrically Erasable Programmable Integrated Circuits for Replacement of Obsolete TTL Logic

DTIC Science & Technology

1991-12-01

different discrete devices" [7]. Fowler-Nordheim Tunneling Simplified Theory. Electrons in polysilicon are usually prevented from entering SiO 2 by an...overcomes the energy barrier, the tunneling electrons will not return to the polysilicon but will be carried by the electric field, causing a current to flow...Floating Gate Transistors A floating gate transistor is an insulated-gate field effect transistor (FET) that has a gate, usually made of polysilicon , which

Variations of Contact Resistance in Dual-Gated Monolayer Molybdenum Disulfide Transistors Depending on Gate Bias Selection

NASA Astrophysics Data System (ADS)

Tran, P. X.

2017-06-01

Monolayer molybdenum disulfide (MoS2) is considered an alternative two-dimensional material for high performance ultra-thin field-effect transistors. MoS2 is a triple atomic layer with a direct 1.8 eV bandgap. Bulk MoS2 has an additional indirect bandgap of 1.2 eV, which leads to high current on/off ratio around 108. Flakes of MoS2 can be obtained by mechanical exfoliation or grown by chemical vapor deposition. Intrinsic cut-off frequency of multilayer MoS2 transistor has reached 42 GHz. Chemical doping of MoS2 is challenging and results in reduction of contact resistance. This paper focuses on modeling of dual-gated monolayer MoS2 transistors with effective mobility of carriers varying from 0.6 cm2/V s to 750 cm2/V s. In agreement with experimental data, the model demonstrates that in back-gate bias devices, the contact resistance decreases almost exponentially with increasing gate bias, whereas in top-gate bias devices, the contact resistance stays invariant when varying gate bias.

Effect of graded InGaN drain region and 'In' fraction in InGaN channel on performances of InGaN tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Duan, Xiaoling; Zhang, Jincheng; Wang, Shulong; Quan, Rudai; Hao, Yue

2017-12-01

An InGaN-based graded drain region tunnel field-effect transistor (GD-TFET) is proposed to suppress the ambipolar behavior. The simulation results with the trade-off between on-state current (Ion) and ambipolar current (Iambipolar) show decreased Iambipolar (1.9 × 10-14 A/μm) in comparison with that of conventional TFETs (2.0 × 10-8 A/μm). Furthermore, GD-TFET with high 'In' fraction InxGa1-xN source-side channel (SC- GD-TFET) is explored and exhibits 5.3 times Ion improvement and 60% average subthreshold swing (SSavg) reduction in comparison with GD-TFET by adjusting 'In' fraction in the InxGa1-xN source-side channel. The improvement is attributed to the confinement of BTBT in the source-side channel by the heterojunction. And then, the optimum value for source-side channel length (Lsc) is researched by DC performances results, which shows it falls into the range between Lsc = 10 nm and 20 nm.

Nanopore extended field-effect transistor for selective single-molecule biosensing.

PubMed

Ren, Ren; Zhang, Yanjun; Nadappuram, Binoy Paulose; Akpinar, Bernice; Klenerman, David; Ivanov, Aleksandar P; Edel, Joshua B; Korchev, Yuri

2017-09-19

There has been a significant drive to deliver nanotechnological solutions to biosensing, yet there remains an unmet need in the development of biosensors that are affordable, integrated, fast, capable of multiplexed detection, and offer high selectivity for trace analyte detection in biological fluids. Herein, some of these challenges are addressed by designing a new class of nanoscale sensors dubbed nanopore extended field-effect transistor (nexFET) that combine the advantages of nanopore single-molecule sensing, field-effect transistors, and recognition chemistry. We report on a polypyrrole functionalized nexFET, with controllable gate voltage that can be used to switch on/off, and slow down single-molecule DNA transport through a nanopore. This strategy enables higher molecular throughput, enhanced signal-to-noise, and even heightened selectivity via functionalization with an embedded receptor. This is shown for selective sensing of an anti-insulin antibody in the presence of its IgG isotype.Efficient detection of single molecules is vital to many biosensing technologies, which require analytical platforms with high selectivity and sensitivity. Ren et al. combine a nanopore sensor and a field-effect transistor, whereby gate voltage mediates DNA and protein transport through the nanopore.

Flexible thin-film transistors on plastic substrate at room temperature.

PubMed

Han, Dedong; Wang, Wei; Cai, Jian; Wang, Liangliang; Ren, Yicheng; Wang, Yi; Zhang, Shengdong

2013-07-01

We have fabricated flexible thin-film transistors (TFTs) on plastic substrates using Aluminum-doped ZnO (AZO) as an active channel layer at room temperature. The AZO-TFTs showed n-channel device characteristics and operated in enhancement mode. The device shows a threshold voltage of 1.3 V, an on/off ratio of 2.7 x 10(7), a field effect mobility of 21.3 cm2/V x s, a subthreshold swing of 0.23 V/decade, and the off current of less than 10(-12) A at room temperature. Recently, the flexible displays have become a very hot topic. Flexible thin film transistors are key devices for realizing flexible displays. We have investigated AZO-TFT on flexible plastic substrate, and high performance flexible TFTs have been obtained.

Photovoltage field-effect transistors

NASA Astrophysics Data System (ADS)

Adinolfi, Valerio; Sargent, Edward H.

2017-02-01

The detection of infrared radiation enables night vision, health monitoring, optical communications and three-dimensional object recognition. Silicon is widely used in modern electronics, but its electronic bandgap prevents the detection of light at wavelengths longer than about 1,100 nanometres. It is therefore of interest to extend the performance of silicon photodetectors into the infrared spectrum, beyond the bandgap of silicon. Here we demonstrate a photovoltage field-effect transistor that uses silicon for charge transport, but is also sensitive to infrared light owing to the use of a quantum dot light absorber. The photovoltage generated at the interface between the silicon and the quantum dot, combined with the high transconductance provided by the silicon device, leads to high gain (more than 104 electrons per photon at 1,500 nanometres), fast time response (less than 10 microseconds) and a widely tunable spectral response. Our photovoltage field-effect transistor has a responsivity that is five orders of magnitude higher at a wavelength of 1,500 nanometres than that of previous infrared-sensitized silicon detectors. The sensitization is achieved using a room-temperature solution process and does not rely on traditional high-temperature epitaxial growth of semiconductors (such as is used for germanium and III-V semiconductors). Our results show that colloidal quantum dots can be used as an efficient platform for silicon-based infrared detection, competitive with state-of-the-art epitaxial semiconductors.

Pursuing Polymer Dielectric Interfacial Effect in Organic Transistors for Photosensing Performance Optimization.

PubMed

Wu, Xiaohan; Chu, Yingli; Liu, Rui; Katz, Howard E; Huang, Jia

2017-12-01

Polymer dielectrics in organic field-effect transistors (OFETs) are essential to provide the devices with overall flexibility, stretchability, and printability and simultaneously introduce charge interaction on the interface with organic semiconductors (OSCs). The interfacial effect between various polymer dielectrics and OSCs significantly and intricately influences device performance. However, understanding of this effect is limited because the interface is buried and the interfacial charge interaction is difficult to stimulate and characterize. Here, this challenge is overcome by utilizing illumination to stimulate the interfacial effect in various OFETs and to characterize the responses of the effect by measuring photoinduced changes of the OFETs performances. This systemic investigation reveals the mechanism of the intricate interfacial effect in detail, and mathematically explains how the photosensitive OFETs characteristics are determined by parameters including polar group of the polymer dielectric and the OSC side chain. By utilizing this mechanism, performance of organic electronics can be precisely controlled and optimized. OFETs with strong interfacial effect can also show a signal additivity caused by repeated light pulses, which is applicable for photostimulated synapse emulator. Therefore, this work enlightens a detailed understanding on the interface effect and provides novel strategies for optimizing OFET photosensory performances.

Investigations on the effects of electrode materials on the device characteristics of ferroelectric memory thin film transistors fabricated on flexible substrates

NASA Astrophysics Data System (ADS)

Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min

2018-03-01

For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.

Effects of channel thickness on oxide thin film transistor with double-stacked channel layer

NASA Astrophysics Data System (ADS)

Lee, Kimoon; Kim, Yong-Hoon; Yoon, Sung-Min; Kim, Jiwan; Oh, Min Suk

2017-11-01

To improve the field effect mobility and control the threshold voltage ( V th ) of oxide thin film transistors (TFTs), we fabricated the oxide TFTs with double-stacked channel layers which consist of thick Zn-Sn-O (ZTO) and very thin In-Zn-O (IZO) layers. We investigated the effects of the thickness of thin conductive layer and the conductivity of thick layer on oxide TFTs with doublestacked channel layer. When we changed the thickness of thin conductive IZO channel layer, the resistivity values were changed. This resistivity of thin channel layer affected on the saturation field effect mobility and the off current of TFTs. In case of the thick ZTO channel layer which was deposited by sputtering in Ar: O2 = 10: 1, the device showed better performances than that which was deposited in Ar: O2 = 1: 1. Our TFTs showed high mobility ( μ FE ) of 40.7 cm2/Vs and V th of 4.3 V. We assumed that high mobility and the controlled V th were caused by thin conductive IZO layer and thick stable ZTO layer. Therefore, this double-stacked channel structure can be very promising way to improve the electrical characteristics of various oxide thin film transistors.

Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

NASA Astrophysics Data System (ADS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

2015-10-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

Pentacene-based organic thin film transistors, integrated circuits, and active matrix displays on polymeric substrates

NASA Astrophysics Data System (ADS)

Sheraw, Christopher Duncan

2003-10-01

Organic thin film transistors are attractive candidates for a variety of low cost, large area commercial electronics including smart cards, RF identification tags, and flat panel displays. Of particular interest are high performance organic thin film transistors (TFTs) that can be fabricated on flexible polymeric substrates allowing low-cost, lightweight, rugged electronics such as flexible active matrix displays. This thesis reports pentacene organic thin film transistors fabricated on flexible polymeric substrates with record performance, the fastest photolithographically patterned organic TFT integrated circuits on polymeric substrates reported to date, and the fabrication of the organic TFT backplanes used to build the first organic TFT-driven active matrix liquid crystal display (AMLCD), also the first AMLCD on a flexible substrate, ever reported. In addition, the first investigation of functionalized pentacene derivatives used as the active layer in organic thin film transistors is reported. A low temperature (<110°C) process technology was developed allowing the fabrication of high performance organic TFTs, integrated circuits, and large TFT arrays on flexible polymeric substrates. This process includes the development of a novel water-based photolithographic active layer patterning process using polyvinyl alcohol that allows the patterning of organic semiconductor materials for elimination of active layer leakage current without causing device degradation. The small molecule aromatic hydrocarbon pentacene was used as the active layer material to fabricate organic TFTs on the polymeric material polyethylene naphthalate with field-effect mobility as large as 2.1 cm2/V-s and on/off current ratio of 108. These are the best values reported for organic TFTs on polymeric substrates and comparable to organic TFTs on rigid substrates. Analog and digital integrated circuits were also fabricated on polymeric substrates using pentacene TFTs with propagation delay as low as 38 musec and clocked digital circuits that operated at 1.1 kHz. These are the fastest photolithographically patterned organic TFT circuits on polymeric substrates reported to date. Finally, 16 x 16 pentacene TFT pixel arrays were fabricated on polymeric substrates and integrated with polymer dispersed liquid crystal to build an AMLCD. The pixel arrays showed good optical response to changing data signals when standard quarter-VGA display waveforms were applied. This result marks the first organic TFT-driven active matrix liquid crystal display ever reported as well as the first active matrix liquid crystal display on a flexible polymeric substrate. Lastly, functionalized pentacene derivatives were used as the active layer in organic thin film transistor materials. Functional groups were added to the pentacene molecule to influence the molecular ordering so that the amount of pi-orbital overlap would be increased allowing the potential for improved field-effect mobility. The functionalization of these materials also improves solubility allowing for the possibility of solution-processed devices and increased oxidative stability. Organic thin film transistors were fabricated using five different functionalized pentacene active layers. Devices based on the pentacene derivative triisopropylsilyl pentacene were found to have the best performance with field-effect mobility as large as 0.4 cm 2/V-s.

Hopping and trapping mechanisms in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Konezny, S. J.; Bussac, M. N.; Zuppiroli, L.

2010-01-01

A charge carrier in the channel of an organic field-effect transistor (OFET) is coupled to the electric polarization of the gate in the form of a surface Fröhlich polaron [N. Kirova and M. N. Bussac, Phys. Rev. B 68, 235312 (2003)]. We study the effects of the dynamical field of polarization on both small-polaron hopping and trap-limited transport mechanisms. We present numerical calculations of polarization energies, band-narrowing effects due to polarization, hopping barriers, and interface trap depths in pentacene and rubrene transistors as functions of the dielectric constant of the gate insulator and demonstrate that a trap-and-release mechanism more appropriately describes transport in high-mobility OFETs. For mobilities on the order 0.1cm2/Vs and below, all states are highly localized and hopping becomes the predominant mechanism.

Inkjet-Printed Organic Transistors Based on Organic Semiconductor/Insulating Polymer Blends.

PubMed

Kwon, Yoon-Jung; Park, Yeong Don; Lee, Wi Hyoung

2016-08-02

Recent advances in inkjet-printed organic field-effect transistors (OFETs) based on organic semiconductor/insulating polymer blends are reviewed in this article. Organic semiconductor/insulating polymer blends are attractive ink candidates for enhancing the jetting properties, inducing uniform film morphologies, and/or controlling crystallization behaviors of organic semiconductors. Representative studies using soluble acene/insulating polymer blends as an inkjet-printed active layer in OFETs are introduced with special attention paid to the phase separation characteristics of such blended films. In addition, inkjet-printed semiconducting/insulating polymer blends for fabricating high performance printed OFETs are reviewed.

Inkjet-Printed Organic Transistors Based on Organic Semiconductor/Insulating Polymer Blends

PubMed Central

Kwon, Yoon-Jung; Park, Yeong Don; Lee, Wi Hyoung

2016-01-01

Recent advances in inkjet-printed organic field-effect transistors (OFETs) based on organic semiconductor/insulating polymer blends are reviewed in this article. Organic semiconductor/insulating polymer blends are attractive ink candidates for enhancing the jetting properties, inducing uniform film morphologies, and/or controlling crystallization behaviors of organic semiconductors. Representative studies using soluble acene/insulating polymer blends as an inkjet-printed active layer in OFETs are introduced with special attention paid to the phase separation characteristics of such blended films. In addition, inkjet-printed semiconducting/insulating polymer blends for fabricating high performance printed OFETs are reviewed. PMID:28773772

A highly manufacturable 0.2 {mu}m AlGaAs/InGaAs PHEMT fabricated using the single-layer integrated-metal FET (SLIMFET) process

DOE Office of Scientific and Technical Information (OSTI.GOV)

Havasy, C.K.; Quach, T.K.; Bozada, C.A.

1995-12-31

This work is the development of a single-layer integrated-metal field effect transistor (SLIMFET) process for a high performance 0.2 {mu}m AlGaAs/InGaAs pseudomorphic high electron mobility transistor (PHEMT). This process is compatible with MMIC fabrication and minimizes process variations, cycle time, and cost. This process uses non-alloyed ohmic contacts, a selective gate-recess etching process, and a single gate/source/drain metal deposition step to form both Schottky and ohmic contacts at the same time.

CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Bilayer Photoresist Insulator for High Performance Organic Thin-Film Transistors on Plastic Films

NASA Astrophysics Data System (ADS)

Wang, He; Li, Chun-Hong; Pan, Feng; Wang, Hai-Bo; Yan, Dong-Hang

2009-11-01

A novel bilayer photoresist insulator is applied in flexible vanadyl-phthalocyanine (VOPc) organic thin-film transistors (OTFTs). The micron-size patterns of this photoresisit insulator can be directly defined only by photolithography without the etching process. Furthermore, these OTFTs exhibit high field-effect mobility (about 0.8 cm2/Vs) and current on/off ratio (about 106). In particular, they show rather low hysteresis (< 1 V). The results demonstrate that this bilayer photoresist insulator can be applied in large-area electronics and in the facilitation of patterning insulators.

Achievement of High-Response Organic Field-Effect Transistor NO₂ Sensor by Using the Synergistic Effect of ZnO/PMMA Hybrid Dielectric and CuPc/Pentacene Heterojunction.

PubMed

Han, Shijiao; Cheng, Jiang; Fan, Huidong; Yu, Junsheng; Li, Lu

2016-10-21

High-response organic field-effect transistor (OFET)-based NO₂ sensors were fabricated using the synergistic effect the synergistic effect of zinc oxide/poly(methyl methacrylate) (ZnO/PMMA) hybrid dielectric and CuPc/Pentacene heterojunction. Compared with the OFET sensors without synergistic effect, the fabricated OFET sensors showed a remarkable shift of saturation current, field-effect mobility and threshold voltage when exposed to various concentrations of NO₂ analyte. Moreover, after being stored in atmosphere for 30 days, the variation of saturation current increased more than 10 folds at 0.5 ppm NO₂. By analyzing the electrical characteristics, and the morphologies of organic semiconductor films of the OFET-based sensors, the performance enhancement was ascribed to the synergistic effect of the dielectric and organic semiconductor. The ZnO nanoparticles on PMMA dielectric surface decreased the grain size of pentacene formed on hybrid dielectric, facilitating the diffusion of CuPc molecules into the grain boundary of pentacene and the approach towards the conducting channel of OFET. Hence, NO₂ molecules could interact with CuPc and ZnO nanoparticles at the interface of dielectric and organic semiconductor. Our results provided a promising strategy for the design of high performance OFET-based NO₂ sensors in future electronic nose and environment monitoring.

Achievement of High-Response Organic Field-Effect Transistor NO2 Sensor by Using the Synergistic Effect of ZnO/PMMA Hybrid Dielectric and CuPc/Pentacene Heterojunction

PubMed Central

Han, Shijiao; Cheng, Jiang; Fan, Huidong; Yu, Junsheng; Li, Lu

2016-01-01

High-response organic field-effect transistor (OFET)-based NO2 sensors were fabricated using the synergistic effect the synergistic effect of zinc oxide/poly(methyl methacrylate) (ZnO/PMMA) hybrid dielectric and CuPc/Pentacene heterojunction. Compared with the OFET sensors without synergistic effect, the fabricated OFET sensors showed a remarkable shift of saturation current, field-effect mobility and threshold voltage when exposed to various concentrations of NO2 analyte. Moreover, after being stored in atmosphere for 30 days, the variation of saturation current increased more than 10 folds at 0.5 ppm NO2. By analyzing the electrical characteristics, and the morphologies of organic semiconductor films of the OFET-based sensors, the performance enhancement was ascribed to the synergistic effect of the dielectric and organic semiconductor. The ZnO nanoparticles on PMMA dielectric surface decreased the grain size of pentacene formed on hybrid dielectric, facilitating the diffusion of CuPc molecules into the grain boundary of pentacene and the approach towards the conducting channel of OFET. Hence, NO2 molecules could interact with CuPc and ZnO nanoparticles at the interface of dielectric and organic semiconductor. Our results provided a promising strategy for the design of high performance OFET-based NO2 sensors in future electronic nose and environment monitoring. PMID:27775653

Passivation of GaSb using molecular beam epitaxy Y{sub 2}O{sub 3} to achieve low interfacial trap density and high-performance self-aligned inversion-channel p-metal-oxide-semiconductor field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chu, R. L.; Chiang, T. H.; Hsueh, W. J.

2014-11-03

Molecular beam epitaxy deposited rare-earth oxide of Y{sub 2}O{sub 3} has effectively passivated GaSb, leading to low interfacial trap densities of (1–4) × 10{sup 12 }cm{sup −2} eV{sup −1} across the energy bandgap of GaSb. A high saturation drain current density of 130 μA/μm, a peak transconductance of 90 μS/μm, a low subthreshold slope of 147 mV/decade, and a peak field-effect hole mobility of 200 cm{sup 2}/V-s were obtained in 1 μm-gate-length self-aligned inversion-channel GaSb p-Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). In this work, high-κ/GaSb interfacial properties were better in samples with a high substrate temperature of 200 °C than in those with high κ's deposited at room temperature, in terms of themore » interfacial electrical properties, particularly, the reduction of interfacial trap densities near the conduction band and the MOSFET device performance.« less

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

Morphological Influence of Solution-Processed Zinc Oxide Films on Electrical Characteristics of Thin-Film Transistors.

PubMed

Lee, Hyeonju; Zhang, Xue; Hwang, Jaeeun; Park, Jaehoon

2016-10-19

We report on the morphological influence of solution-processed zinc oxide (ZnO) semiconductor films on the electrical characteristics of ZnO thin-film transistors (TFTs). Different film morphologies were produced by controlling the spin-coating condition of a precursor solution, and the ZnO films were analyzed using atomic force microscopy, X-ray diffraction, X-ray photoemission spectroscopy, and Hall measurement. It is shown that ZnO TFTs have a superior performance in terms of the threshold voltage and field-effect mobility, when ZnO crystallites are more densely packed in the film. This is attributed to lower electrical resistivity and higher Hall mobility in a densely packed ZnO film. In the results of consecutive TFT operations, a positive shift in the threshold voltage occurred irrespective of the film morphology, but the morphological influence on the variation in the field-effect mobility was evident. The field-effect mobility in TFTs having a densely packed ZnO film increased continuously during consecutive TFT operations, which is in contrast to the mobility decrease observed in the less packed case. An analysis of the field-effect conductivities ascribes these results to the difference in energetic traps, which originate from structural defects in the ZnO films. Consequently, the morphological influence of solution-processed ZnO films on the TFT performance can be understood through the packing property of ZnO crystallites.

Morphological Influence of Solution-Processed Zinc Oxide Films on Electrical Characteristics of Thin-Film Transistors

PubMed Central

Lee, Hyeonju; Zhang, Xue; Hwang, Jaeeun; Park, Jaehoon

2016-01-01

We report on the morphological influence of solution-processed zinc oxide (ZnO) semiconductor films on the electrical characteristics of ZnO thin-film transistors (TFTs). Different film morphologies were produced by controlling the spin-coating condition of a precursor solution, and the ZnO films were analyzed using atomic force microscopy, X-ray diffraction, X-ray photoemission spectroscopy, and Hall measurement. It is shown that ZnO TFTs have a superior performance in terms of the threshold voltage and field-effect mobility, when ZnO crystallites are more densely packed in the film. This is attributed to lower electrical resistivity and higher Hall mobility in a densely packed ZnO film. In the results of consecutive TFT operations, a positive shift in the threshold voltage occurred irrespective of the film morphology, but the morphological influence on the variation in the field-effect mobility was evident. The field-effect mobility in TFTs having a densely packed ZnO film increased continuously during consecutive TFT operations, which is in contrast to the mobility decrease observed in the less packed case. An analysis of the field-effect conductivities ascribes these results to the difference in energetic traps, which originate from structural defects in the ZnO films. Consequently, the morphological influence of solution-processed ZnO films on the TFT performance can be understood through the packing property of ZnO crystallites. PMID:28773973

Impact of source height on the characteristic of U-shaped channel tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei

2017-11-01

Tunnel field-effect transistor (TFET) is very attractive in replacing a MOSFET, particularly for low-power nanoelectronic circuits. The U-shaped channel TFET (U-TFET) was proposed to improve the drain-source current with a reduced footprint. In this work, the impact of the source height (HS) on the characteristic of the U-shaped channel tunnel field-effect transistor (U-TFET) is investigated by using TCAD simulation. It is found that with a fixed gate height (HG) the drain-source current has a negative correlation with HS. This is because when the gate region is deeper than the source region, the electric field near the corner of the tunneling junction can be enhanced and the tunneling rate is increased. When HS becomes very thin, the drain-source current is limited by the source region volume. The U-TFET with an n+ pocket is also studied and the same trend is observed.

Field effects in graphene in an interface contact with aqueous solutions of acetic acid and potassium hydroxide

NASA Astrophysics Data System (ADS)

Butko, A. V.; Butko, V. Yu.; Lebedev, S. P.; Lebedev, A. A.; Kumzerov, Yu. A.

2017-10-01

For the creation of new promising chemical sensors, it is very important to study the influence of the interface between graphene and aqueous solutions of acids and alkalis on the transistor characteristics of graphene. Transistor structures on the basis of graphene grown by thermal decomposition of silicon carbide were created and studied. For the interface of graphene with aqueous solutions of acetic acid and potassium hydroxide in the transistor geometry, with a variation in the gate-to-source voltage, the field effect corresponding to the hole type of charge carriers in graphene was observed. It is established that an increase in the concentration of molecular ions in these solutions leads to an increase in the dependence of the resistance of the transistor on the gate voltage.

Theory and Device Modeling for Nano-Structured Transistor Channels

DTIC Science & Technology

2011-06-01

zinc oxide ( ZnO ) thin film transistors ( TFTs ) that contain nanocrystalline grains on the order of ~20nm. The authors of ref. 1 present results...problem in order to determine the threshold voltage. 15. SUBJECT TERMS nano-structured transistor , mesoscopic, zinc oxide , ZnO , field-effect...and R. Neidhard, “Microwave ZnO Thin - Film Transistors ”, IEEE Electron Dev. Lett. 29, 1024 (2008); doi: 10.1109/LED.2008.2001635.

AlGaSb Buffer Layers for Sb-Based Transistors

DTIC Science & Technology

2010-01-01

transistor ( HEMT ), molecular beam epitaxy (MBE), field-effect transistor (FET), buffer layer INTRODUCTION High-electron-mobility transistors ( HEMTs ) with InAs...monolayers/s. The use of thinner buffer layers reduces molecular beam epitaxial growth time and source consumption. The buffer layers also exhibit...source. In addition, some of the flux from an Sb cell in a molecular beam epitaxy (MBE) system will deposit near the mouth of the cell, eventually

Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena

This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{supmore » 11} cm{sup −2}).« less

Real-time detection of mercury ions in water using a reduced graphene oxide/DNA field-effect transistor with assistance of a passivation layer

DOE PAGES

Chang, Jingbo; Zhou, Guihua; Gao, Xianfeng; ...

2015-08-01

Field-effect transistor (FET) sensors based on reduced graphene oxide (rGO) for detecting chemical species provide a number of distinct advantages, such as ultrasensitivity, label-free, and real-time response. However, without a passivation layer, channel materials directly exposed to an ionic solution could generate multiple signals from ionic conduction through the solution droplet, doping effect, and gating effect. Therefore, a method that provides a passivation layer on the surface of rGO without degrading device performance will significantly improve device sensitivity, in which the conductivity changes solely with the gating effect. In this work, we report rGO FET sensor devices with Hg 2+-dependentmore » DNA as a probe and the use of an Al 2O 3 layer to separate analytes from conducting channel materials. The device shows good electronic stability, excellent lower detection limit (1 nM), and high sensitivity for real-time detection of Hg 2+ in an underwater environment. Our work shows that optimization of an rGO FET structure can provide significant performance enhancement and profound fundamental understanding for the sensor mechanism.« less

Organic-inorganic field effect transistor with SnI-based perovskite channel layer using vapor phase deposition technique

NASA Astrophysics Data System (ADS)

Matsushima, Toshinori; Yasuda, Takeshi; Fujita, Katsuhiko; Tsutsui, Tetsuo

2003-11-01

High field-effect hole mobility of (formula available in paper)and threshold voltage is -3.2 V) in organic-inorganic layered perovskite film (formula available in paper)prepared by a vapor phase deposition technique have been demonstrated through the octadecyltrichlorosilane treatment of substrate. Previously, the (formula available in paper)films prepared on the octadecyltrichlorosilane-covered substrates using a vapor evaporation showed not only intense exciton absorption and photoluminescence in the optical spectroscopy but also excellent crystallinity and large grain structure in X-ray and atomic force microscopic studies. Especially, the (formula available in paper)structure in the region below few nm closed to the surface of octadecyltrichlorosilane monolayer was drastically improved in comparison with that on the non-covered substrate. Though our initial (formula available in paper)films via a same sequence of preparation of (formula available in paper)and octadecyltrichlorosilane monolayer did not show the field-effect properties because of a lack of spectral, structural, and morphological features. The unformation of favorable (formula available in paper)structure in the very thin region, that is very important for the field-effect transistors to transport electrons or holes, closed to the surface of non-covered (formula available in paper)dielectric layer was also one of the problems for no observation of them. By adding further optimization and development, such as deposition rate of perovskite, substrate heating during deposition, and tuning device architecture, with hydrophobic treatment, the vacuum-deposited (formula available in paper)have achieved above-described high performance in organic-inorganic hybrid transistors.

CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Vacuum relaxation and annealing-induced enhancement of mobility of regioregular poly (3-hexylthiophene) field-effect transistors

NASA Astrophysics Data System (ADS)

Tian, Xue-Yan; Xu, Zheng; Zhao, Su-Ling; Zhang, Fu-Jun; Xu, Xu-Rong; Yuan, Guang-Cai; Li, Jing; Sun, Qin-Jun; Wang, Ying

2009-11-01

In order to enhance the performance of regioregular poly(3-hexylthiophene) (RR-P3HT) field-effect transistors (FETs), RR-P3HT FETs are prepared by the spin-coating method followed by vacuum placement and annealing. This paper reports that the crystal structure, the molecule interconnection, the surface morphology, and the charge carrier mobility of RR-P3HT films are affected by vacuum relaxation and annealing. The results reveal that the field-effect mobility of RR-P3HT FETs can reach 4.17 × 10-2 m2/(V · s) by vacuum relaxation at room temperature due to an enhanced local self-organization. Furthermore, it reports that an appropriate annealing temperature can facilitate the crystal structure, the orientation and the interconnection of polymer molecules. These results show that the field-effect mobility of device annealed at 150 °C for 10 minutes in vacuum at atmosphere and followed by placement for 20 hours in vacuum at room temperature is enhanced dramatically to 9.00 × 10-2 cm2/(V · s).

Graphene-based field-effect transistor biosensors

DOEpatents

Chen; , Junhong; Mao, Shun; Lu, Ganhua

2017-06-14

The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

Low-voltage self-assembled monolayer field-effect transistors on flexible substrates.

PubMed

Schmaltz, Thomas; Amin, Atefeh Y; Khassanov, Artoem; Meyer-Friedrichsen, Timo; Steinrück, Hans-Georg; Magerl, Andreas; Segura, Juan José; Voitchovsky, Kislon; Stellacci, Francesco; Halik, Marcus

2013-08-27

Self-assembled monolayer field-effect transistors (SAMFETs) of BTBT functionalized phosphonic acids are fabricated. The molecular design enables device operation with charge carrier mobilities up to 10(-2) cm(2) V(-1) s(-1) and for the first time SAMFETs which operate on rough, flexible PEN substrates even under mechanical substrate bending. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Biologically templated assembly of hybrid semiconducting nanomesh for high performance field effect transistors and sensors

NASA Astrophysics Data System (ADS)

Byeon, Hye-Hyeon; Lee, Seung-Woo; Lee, Eun-Hee; Kim, Woong; Yi, Hyunjung

2016-10-01

Delicately assembled composites of semiconducting nanomaterials and biological materials provide an attractive interface for emerging applications, such as chemical/biological sensors, wearable health monitoring devices, and therapeutic agent releasing devices. The nanostructure of composites as a channel and a sensing material plays a critical role in the performance of field effect transistors (FETs). Therefore, it is highly desirable to prepare elaborate composite that can allow the fabrication of high performance FETs and also provide high sensitivity and selectivity in detecting specific chemical/biological targets. In this work, we demonstrate that high performance FETs can be fabricated with a hydrodynamically assembled composite, a semiconducting nanomesh, of semiconducting single-walled carbon nanotubes (S-SWNTs) and a genetically engineered M13 phage to show strong binding affinity toward SWNTs. The semiconducting nanomesh enables a high on/off ratio (~104) of FETs. We also show that the threshold voltage and the channel current of the nanomesh FETs are sensitive to the change of the M13 phage surface charge. This biological gate effect of the phage enables the detection of biologically important molecules such as dopamine and bisphenol A using nanomesh-based FETs. Our results provide a new insight for the preparation of composite material platform for highly controllable bio/electronics interfaces.

Graphene-graphite oxide field-effect transistors.

PubMed

Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

2012-03-14

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

Molecular Strategies for Morphology Control in Semiconducting Polymers for Optoelectronics.

PubMed

Rahmanudin, Aiman; Sivula, Kevin

2017-06-28

Solution-processable semiconducting polymers have been explored over the last decades for their potential applications in inexpensively fabricated transistors, diodes and photovoltaic cells. However, a remaining challenge in the field is to control the solid-state self-assembly of polymer chains in thin films devices, as the aspects of (semi)crystallinity, grain boundaries, and chain entanglement can drastically affect intra-and inter-molecular charge transport/transfer and thus device performance. In this short review we examine how the aspects of molecular weight and chain rigidity affect solid-state self-assembly and highlight molecular engineering strategies to tune thin film morphology. Side chain engineering, flexibly linking conjugation segments, and block co-polymer strategies are specifically discussed with respect to their effect on field effect charge carrier mobility in transistors and power conversion efficiency in solar cells. Example systems are taken from recent literature including work from our laboratories to illustrate the potential of molecular engineering semiconducting polymers.

Design and fabrication of high-performance diamond triple-gate field-effect transistors

PubMed Central

Liu, Jiangwei; Ohsato, Hirotaka; Wang, Xi; Liao, Meiyong; Koide, Yasuo

2016-01-01

The lack of large-area single-crystal diamond wafers has led us to downscale diamond electronic devices. Here, we design and fabricate a hydrogenated diamond (H-diamond) triple-gate metal-oxide-semiconductor field-effect transistor (MOSFET) to extend device downscaling and increase device output current. The device’s electrical properties are compared with those of planar-type MOSFETs, which are fabricated simultaneously on the same substrate. The triple-gate MOSFET’s output current (174.2 mA mm−1) is much higher than that of the planar-type device (45.2 mA mm−1), and the on/off ratio and subthreshold swing are more than 108 and as low as 110 mV dec−1, respectively. The fabrication of these H-diamond triple-gate MOSFETs will drive diamond electronic device development forward towards practical applications. PMID:27708372

Interface engineering of semiconductor/dielectric heterojunctions toward functional organic thin-film transistors.

PubMed

Zhang, Hongtao; Guo, Xuefeng; Hui, Jingshu; Hu, Shuxin; Xu, Wei; Zhu, Daoben

2011-11-09

Interface modification is an effective and promising route for developing functional organic field-effect transistors (OFETs). In this context, however, researchers have not created a reliable method of functionalizing the interfaces existing in OFETs, although this has been crucial for the technological development of high-performance CMOS circuits. Here, we demonstrate a novel approach that enables us to reversibly photocontrol the carrier density at the interface by using photochromic spiropyran (SP) self-assembled monolayers (SAMs) sandwiched between active semiconductors and gate insulators. Reversible changes in dipole moment of SPs in SAMs triggered by lights with different wavelengths produce two distinct built-in electric fields on the OFET that can modulate the channel conductance and consequently threshold voltage values, thus leading to a low-cost noninvasive memory device. This concept of interface functionalization offers attractive new prospects for the development of organic electronic devices with tailored electronic and other properties.

III-V heterostructure tunnel field-effect transistor.

PubMed

Convertino, C; Zota, C B; Schmid, H; Ionescu, A M; Moselund, K E

2018-07-04

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III-V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

Investigation of silicide-induced-dopant-activation for steep tunnel junction in tunnel field effect transistor (TFET)

NASA Astrophysics Data System (ADS)

Kim, Sihyun; Kwon, Dae Woong; Park, Euyhwan; Lee, Junil; Lee, Roongbin; Lee, Jong-Ho; Park, Byung-Gook

2018-02-01

Numerous researches for making steep tunnel junction within tunnel field-effect transistor (TFET) have been conducted. One of the ways to make an abrupt junction is source/drain silicidation, which uses the phenomenon often called silicide-induced-dopant-segregation. It is revealed that the silicide process not only helps dopants to pile up adjacent to the metal-silicon alloy, also induces the dopant activation, thereby making it possible to avoid additional high temperature process. In this report, the availability of dopant activation induced by metal silicide process was thoroughly investigated by diode measurement and device simulation. Metal-silicon (MS) diodes having p+ and n+ silicon formed on the p- substrate exhibit the characteristics of ohmic and pn diodes respectively, for both the samples with and without high temperature annealing. The device simulation for TFETs with dopant-segregated source was also conducted, which verified enhanced DC performance.

A carrier-based analytical theory for negative capacitance symmetric double-gate field effect transistors and its simulation verification

NASA Astrophysics Data System (ADS)

Jiang, Chunsheng; Liang, Renrong; Wang, Jing; Xu, Jun

2015-09-01

A carrier-based analytical drain current model for negative capacitance symmetric double-gate field effect transistors (NC-SDG FETs) is proposed by solving the differential equation of the carrier, the Pao-Sah current formulation, and the Landau-Khalatnikov equation. The carrier equation is derived from Poisson’s equation and the Boltzmann distribution law. According to the model, an amplified semiconductor surface potential and a steeper subthreshold slope could be obtained with suitable thicknesses of the ferroelectric film and insulator layer at room temperature. Results predicted by the analytical model agree well with those of the numerical simulation from a 2D simulator without any fitting parameters. The analytical model is valid for all operation regions and captures the transitions between them without any auxiliary variables or functions. This model can be used to explore the operating mechanisms of NC-SDG FETs and to optimize device performance.

Operation of the GaSb p-channel metal-oxide-semiconductor field-effect transistors fabricated on (111)A surfaces

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nishi, K., E-mail: nishi@mosfet.t.u-tokyo.ac.jp; Takenaka, M.; Takagi, S.

2014-12-08

We demonstrate the operation of GaSb p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on (111)A surfaces with Al{sub 2}O{sub 3} gate dielectrics formed by atomic-layer deposition at 150 °C. The p-MOSFETs on (111)A surfaces exhibit higher drain current and lower subthreshold swing than those on (100) surfaces. We find that the interface-state density (D{sub it}) values at the Al{sub 2}O{sub 3}/GaSb MOS interfaces on the (111)A surfaces are lower than those on the (100) surfaces, which can lead to performance enhancement of the GaSb p-MOSFETs on (111)A surfaces. The mobility of the GaSb p-MOSFETs on (111)A surfaces is 80% higher than that onmore » (100) surfaces.« less

III–V heterostructure tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Convertino, C.; Zota, C. B.; Schmid, H.; Ionescu, A. M.; Moselund, K. E.

2018-07-01

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III–V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

Linear conduction in N-type organic field effect transistors with nanometric channel lengths and graphene as electrodes

NASA Astrophysics Data System (ADS)

Chianese, F.; Candini, A.; Affronte, M.; Mishra, N.; Coletti, C.; Cassinese, A.

2018-05-01

In this work, we test graphene electrodes in nanometric channel n-type Organic Field Effect Transistors (OFETs) based on thermally evaporated thin films of the perylene-3,4,9,10-tetracarboxylic acid diimide derivative. By a thorough comparison with short channel transistors made with reference gold electrodes, we found that the output characteristics of the graphene-based devices respond linearly to the applied bias, in contrast with the supralinear trend of gold-based transistors. Moreover, short channel effects are considerably suppressed in graphene electrode devices. More specifically, current on/off ratios independent of the channel length (L) and enhanced response for high longitudinal biases are demonstrated for L down to ˜140 nm. These results are rationalized taking into account the morphological and electronic characteristics of graphene, showing that the use of graphene electrodes may help to overcome the problem of Space Charge Limited Current in short channel OFETs.

Decoding the Vertical Phase Separation and Its Impact on C8-BTBT/PS Transistor Properties.

PubMed

Pérez-Rodríguez, Ana; Temiño, Inés; Ocal, Carmen; Mas-Torrent, Marta; Barrena, Esther

2018-02-28

Disentangling the details of the vertical distribution of small semiconductor molecules blended with polystyrene (PS) and the contact properties are issues of fundamental value for designing strategies to optimize small-molecule:polymer blend organic transistors. These questions are addressed here for ultrathin blends of 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) and PS processed by a solution-shearing technique using three different blend composition ratios. We show that friction force microscopy (FFM) allows the determination of the lateral and vertical distribution of the two materials at the nanoscale. Our results demonstrate a three-layer stratification of the blend: a film of C8-BTBT of few molecular layers with crystalline order sandwiched between a PS-rich layer at the bottom (a few nm thick) acting as a passivating dielectric layer and a PS-rich skin layer on the top (∼1 nm) conferring stability to the devices. Kelvin probe force microscopy (KPFM) measurements performed in operating organic field-effect transistors (OFETs) reveal that the devices are strongly contact-limited and suggest contact doping as a route for device optimization. By excluding the effect of the contacts, field-effect mobility values in the channel as high as 10 cm 2 V -1 s -1 are obtained. Our findings, obtained via a combination of FFM and KPFM, provide a satisfactory explanation of the different electrical performances of the OFETs as a function of the blend composition ratio and by doping the contacts.

Vertical field-effect transistor based on wave-function extension

NASA Astrophysics Data System (ADS)

Sciambi, A.; Pelliccione, M.; Lilly, M. P.; Bank, S. R.; Gossard, A. C.; Pfeiffer, L. N.; West, K. W.; Goldhaber-Gordon, D.

2011-08-01

We demonstrate a mechanism for a dual layer, vertical field-effect transistor, in which nearly depleting one layer will extend its wave function to overlap the other layer and increase tunnel current. We characterize this effect in a specially designed GaAs/AlGaAs device, observing a tunnel current increase of two orders of magnitude at cryogenic temperatures, and we suggest extrapolations of the design to other material systems such as graphene.

Low-frequency noise in MoSe{sub 2} field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Das, Suprem R., E-mail: srdaspurdue@gmail.com, E-mail: janes@purdue.edu; Kwon, Jiseok; Prakash, Abhijith

One of the important performance metrics of emerging nanoelectronic devices, including low dimensional Field Effect Transistors (FETs), is the magnitude of the low-frequency noise. Atomically thin 2D semiconductor channel materials such as MoX{sub 2} (X ≡ S, Se) have shown promising transistor characteristics such as I{sub ON}/I{sub OFF} ratio exceeding 10{sup 6} and low I{sub OFF}, making them attractive as channel materials for next generation nanoelectronic devices. However, MoS{sub 2} FETs demonstrated to date exhibit high noise levels under ambient conditions. In this letter, we report at least two orders of magnitude smaller values of Hooge parameter in a back-gatedmore » MoSe{sub 2} FET (10 atomic layers) with nickel S/D contacts and measured at atmospheric pressure and temperature. The channel dominated regime of noise was extracted from the total noise spectrum and is shown to follow a mobility fluctuation model with 1/f dependence. The low noise in MoSe{sub 2} FETs is comparable to other 1D nanoelectronic devices such as carbon nanotube FETs (CNT-FETs) and paves the way for use in future applications in precision sensing and communications.« less

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

NASA Astrophysics Data System (ADS)

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-02-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

Highly Sensitive Flexible Pressure Sensors Based on Printed Organic Transistors with Centro-Apically Self-Organized Organic Semiconductor Microstructures.

PubMed

Yeo, So Young; Park, Sangsik; Yi, Yeon Jin; Kim, Do Hwan; Lim, Jung Ah

2017-12-13

A highly sensitive pressure sensor based on printed organic transistors with three-dimensionally self-organized organic semiconductor microstructures (3D OSCs) was demonstrated. A unique organic transistor with semiconductor channels positioned at the highest summit of printed cylindrical microstructures was achieved simply by printing an organic semiconductor and polymer blend on the plastic substrate without the use of additional etching or replication processes. A combination of the printed organic semiconductor microstructure and an elastomeric top-gate dielectric resulted in a highly sensitive organic field-effect transistor (FET) pressure sensor with a high pressure sensitivity of 1.07 kPa -1 and a rapid response time of <20 ms with a high reliability over 1000 cycles. The flexibility and high performance of the 3D OSC FET pressure sensor were exploited in the successful application of our sensors to real-time monitoring of the radial artery pulse, which is useful for healthcare monitoring, and to touch sensing in the e-skin of a realistic prosthetic hand.

Cycling excitation process: An ultra efficient and quiet signal amplification mechanism in semiconductor

NASA Astrophysics Data System (ADS)

Liu, Yu-Hsin; Yan, Lujiang; Zhang, Alex Ce; Hall, David; Niaz, Iftikhar Ahmad; Zhou, Yuchun; Sham, L. J.; Lo, Yu-Hwa

2015-08-01

Signal amplification, performed by transistor amplifiers with its merit rated by the efficiency and noise characteristics, is ubiquitous in all electronic systems. Because of transistor thermal noise, an intrinsic signal amplification mechanism, impact ionization was sought after to complement the limits of transistor amplifiers. However, due to the high operation voltage (30-200 V typically), low power efficiency, limited scalability, and, above all, rapidly increasing excess noise with amplification factor, impact ionization has been out of favor for most electronic systems except for a few applications such as avalanche photodetectors and single-photon Geiger detectors. Here, we report an internal signal amplification mechanism based on the principle of the phonon-assisted cycling excitation process (CEP). Si devices using this concept show ultrahigh gain, low operation voltage, CMOS compatibility, and, above all, quantum limit noise performance that is 30 times lower than devices using impact ionization. Established on a unique physical effect of attractive properties, CEP-based devices can potentially revolutionize the fields of semiconductor electronics.

Precursor-route ZnO films from a mixed casting solvent for high performance aqueous electrolyte-gated transistors.

PubMed

Althagafi, Talal M; Algarni, Saud A; Al Naim, Abdullah; Mazher, Javed; Grell, Martin

2015-12-14

We significantly improved the performance of precursor-route semiconducting zinc oxide (ZnO) films in electrolyte-gated thin film transistors (TFTs). We find that the organic precursor to ZnO, zinc acetate (ZnAc), dissolves more readily in a 1 : 1 mixture of ethanol (EtOH) and acetone than in pure EtOH, pure acetone, or pure isopropanol. XPS and SEM characterisation show improved morphology of ZnO films converted from a mixed solvent cast ZnAc precursor compared to the EtOH cast precursor. When gated with a biocompatible electrolyte, phosphate buffered saline (PBS), ZnO thin film transistors (TFTs) derived from mixed solvent cast ZnAc give 4 times larger field effect current than similar films derived from ZnAc cast from pure EtOH. The sheet resistance at VG = VD = 1 V is 30 kΩ □(-1), lower than for any organic TFT, and lower than for any electrolyte-gated ZnO TFT reported to date.

High-performance a MoS2 nanosheet-based nonvolatile memory transistor with a ferroelectric polymer and graphene source-drain electrode

NASA Astrophysics Data System (ADS)

Lee, Young Tack; Hwang, Do Kyung; Im, Seongil

2015-11-01

Two-dimensional (2D) van der Waals (vdWs) materials are a class of new materials due to their unique physical properties. Of the many 2D vdWs materials, molybdenum disulfide (MoS2) is a representative n-type transition-metal dichalcogenide (TMD) semiconductor. Here, we report on a high-performance MoS2 nanosheet-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. In order to enhance the ohmic contact property, we use graphene flakes as source/drain electrodes prepared by using the direct imprinting method with an elastomer stamp. The MoS2 ferroelectric field-effect transistor (FeFET) shows the highest linear electron mobility value of 175 cm2/Vs with a high on/off current ratio of more than 107, and a very clear memory window of more than 15 V. The program and erase dynamics and the static retention properties are also well demonstrated.

Sub-THz Imaging Using Non-Resonant HEMT Detectors.

PubMed

Delgado-Notario, Juan A; Velazquez-Perez, Jesus E; Meziani, Yahya M; Fobelets, Kristel

2018-02-10

Plasma waves in gated 2-D systems can be used to efficiently detect THz electromagnetic radiation. Solid-state plasma wave-based sensors can be used as detectors in THz imaging systems. An experimental study of the sub-THz response of II-gate strained-Si Schottky-gated MODFETs (Modulation-doped Field-Effect Transistor) was performed. The response of the strained-Si MODFET has been characterized at two frequencies: 150 and 300 GHz: The DC drain-to-source voltage transducing the THz radiation (photovoltaic mode) of 250-nm gate length transistors exhibited a non-resonant response that agrees with theoretical models and physics-based simulations of the electrical response of the transistor. When imposing a weak source-to-drain current of 5 μA, a substantial increase of the photoresponse was found. This increase is translated into an enhancement of the responsivity by one order of magnitude as compared to the photovoltaic mode, while the NEP (Noise Equivalent Power) is reduced in the subthreshold region. Strained-Si MODFETs demonstrated an excellent performance as detectors in THz imaging.