Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Alewine, Neal Jon

1993-01-01

Multiple instruction rollback (MIR) is a technique to provide rapid recovery from transient processor failures and was implemented in hardware by researchers and slow in mainframe computers. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs were also developed which remove rollback data hazards directly with data flow manipulations, thus eliminating the need for most data redundancy hardware. Compiler-assisted techniques to achieve multiple instruction rollback recovery are addressed. It is observed that data some hazards resulting from instruction rollback can be resolved more efficiently by providing hardware redundancy while others are resolved more efficiently with compiler transformations. A compiler-assisted multiple instruction rollback scheme is developed which combines hardware-implemented data redundancy with compiler-driven hazard removal transformations. Experimental performance evaluations were conducted which indicate improved efficiency over previous hardware-based and compiler-based schemes. Various enhancements to the compiler transformations and to the data redundancy hardware developed for the compiler-assisted MIR scheme are described and evaluated. The final topic deals with the application of compiler-assisted MIR techniques to aid in exception repair and branch repair in a speculative execution architecture.

Apollo experience report: Command and service module communications subsystem

NASA Technical Reports Server (NTRS)

Lattier, E. E., Jr.

1974-01-01

The development of spacecraft communications hardware from design to operation is described. Programs, requirements, specifications, and design approaches for a variety of functions (such as voice, telemetry, television, and antennas) are reviewed. Equipment environmental problems such as vibration, extreme temperature variation, and zero gravity are discussed. A review of the development of managerial techniques used in refining the roles of prime and subcontractors is included. The hardware test program is described in detail as it progressed from breadboard design to manned flight system evaluations. Finally, a series of actions is recommended to managers of similar projects to facilitate administration.

Leadership Development Program Final Project

NASA Technical Reports Server (NTRS)

Parrish, Teresa C.

2016-01-01

TOSC is NASA's prime contractor tasked to successfully assemble, test, and launch the EM1 spacecraft. TOSC success is highly dependent on design products from the other NASA Programs manufacturing and delivering the flight hardware; Space Launch System(SLS) and Multi-Purpose Crew Vehicle(MPCV). Design products directly feed into TOSC's: Procedures, Personnel training, Hardware assembly, Software development, Integrated vehicle test and checkout, Launch. TOSC senior management recognized a significant schedule risk as these products are still being developed by the other two (2) programs; SVE and ACE positions were created.

A novel method about detecting missing holes on the motor carling

NASA Astrophysics Data System (ADS)

Xu, Hongsheng; Tan, Hao; Li, Guirong

2018-03-01

After a deep analysis on how to use an image processing system to detect the missing holes on the motor carling, we design the whole system combined with the actual production conditions of the motor carling. Afterwards we explain the whole system's hardware and software in detail. We introduce the general functions for the system's hardware and software. Analyzed these general functions, we discuss the modules of the system's hardware and software and the theory to design these modules in detail. The measurement to confirm the area to image processing, edge detection, randomized Hough transform to circle detecting is explained in detail. Finally, the system result tested in the laboratory and in the factory is given out.

[Integrated Development of Full-automatic Fluorescence Analyzer].

PubMed

Zhang, Mei; Lin, Zhibo; Yuan, Peng; Yao, Zhifeng; Hu, Yueming

2015-10-01

In view of the fact that medical inspection equipment sold in the domestic market is mainly imported from abroad and very expensive, we developed a full-automatic fluorescence analyzer in our center, presented in this paper. The present paper introduces the hardware architecture design of FPGA/DSP motion controlling card+PC+ STM32 embedded micro processing unit, software system based on C# multi thread, design and implementation of double-unit communication in detail. By simplifying the hardware structure, selecting hardware legitimately and adopting control system software to object-oriented technology, we have improved the precision and velocity of the control system significantly. Finally, the performance test showed that the control system could meet the needs of automated fluorescence analyzer on the functionality, performance and cost.

Applying Additive Manufacturing to a New Liquid Oxygen Turbopump Design

NASA Technical Reports Server (NTRS)

O'Neal, Derek

2016-01-01

A liquid oxygen turbopump has been designed at Marshall Space Flight Center as part of the in-house, Advanced Manufacturing Demonstrator Engine (AMDE) project. Additive manufacturing, specifically direct metal laser sintering (DMLS) of Inconel 718, is used for 77% of the parts by mass. These parts include the impeller, turbine components, and housings. The near-net shape DMLS parts have been delivered and final machining is underway. Fabrication of the traditionally manufactured hardware is also proceeding. Testing in liquid oxygen is planned for Q2 of FY2017. This topic explores the design of the turbopump along with fabrication and material testing of the DMLS hardware.

Function-based design process for an intelligent ground vehicle vision system

NASA Astrophysics Data System (ADS)

Nagel, Robert L.; Perry, Kenneth L.; Stone, Robert B.; McAdams, Daniel A.

2010-10-01

An engineering design framework for an autonomous ground vehicle vision system is discussed. We present both the conceptual and physical design by following the design process, development and testing of an intelligent ground vehicle vision system constructed for the 2008 Intelligent Ground Vehicle Competition. During conceptual design, the requirements for the vision system are explored via functional and process analysis considering the flows into the vehicle and the transformations of those flows. The conceptual design phase concludes with a vision system design that is modular in both hardware and software and is based on a laser range finder and camera for visual perception. During physical design, prototypes are developed and tested independently, following the modular interfaces identified during conceptual design. Prototype models, once functional, are implemented into the final design. The final vision system design uses a ray-casting algorithm to process camera and laser range finder data and identify potential paths. The ray-casting algorithm is a single thread of the robot's multithreaded application. Other threads control motion, provide feedback, and process sensory data. Once integrated, both hardware and software testing are performed on the robot. We discuss the robot's performance and the lessons learned.

High-Power Microwave Transmission and Mode Conversion Program

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vernon, Ronald J.

2015-08-14

This is a final technical report for a long term project to develop improved designs and design tools for the microwave hardware and components associated with the DOE Plasma Fusion Program. We have developed basic theory, software, fabrication techniques, and low-power measurement techniques for the design of microwave hardware associated gyrotrons, microwave mode converters and high-power microwave transmission lines. Specifically, in this report we discuss our work on designing quasi-optical mode converters for single and multiple frequencies, a new method for the analysis of perturbed-wall waveguide mode converters, perturbed-wall launcher design for TE0n mode gyrotrons, quasi-optical traveling-wave resonator design formore » high-power testing of microwave components, and possible improvements to the HSX microwave transmission line.« less

Computer-Aided Authoring of Programmed Instruction for Teaching Symbol Recognition. Final Report.

ERIC Educational Resources Information Center

Braby, Richard; And Others

This description of AUTHOR, a computer program for the automated authoring of programmed texts designed to teach symbol recognition, includes discussions of the learning strategies incorporated in the design of the instructional materials, hardware description and the algorithm for the software, and current and future developments. Appendices…

ExaSAT: An exascale co-design tool for performance modeling

DOE PAGES

Unat, Didem; Chan, Cy; Zhang, Weiqun; ...

2015-02-09

One of the emerging challenges to designing HPC systems is understanding and projecting the requirements of exascale applications. In order to determine the performance consequences of different hardware designs, analytic models are essential because they can provide fast feedback to the co-design centers and chip designers without costly simulations. However, current attempts to analytically model program performance typically rely on the user manually specifying a performance model. Here we introduce the ExaSAT framework that automates the extraction of parameterized performance models directly from source code using compiler analysis. The parameterized analytic model enables quantitative evaluation of a broad range ofmore » hardware design trade-offs and software optimizations on a variety of different performance metrics, with a primary focus on data movement as a metric. Finally, we demonstrate the ExaSAT framework’s ability to perform deep code analysis of a proxy application from the Department of Energy Combustion Co-design Center to illustrate its value to the exascale co-design process. ExaSAT analysis provides insights into the hardware and software trade-offs and lays the groundwork for exploring a more targeted set of design points using cycle-accurate architectural simulators.« less

Design and Smartphone-Based Implementation of a Chaotic Video Communication Scheme via WAN Remote Transmission

NASA Astrophysics Data System (ADS)

Lin, Zhuosheng; Yu, Simin; Li, Chengqing; Lü, Jinhu; Wang, Qianxue

This paper proposes a chaotic secure video remote communication scheme that can perform on real WAN networks, and implements it on a smartphone hardware platform. First, a joint encryption and compression scheme is designed by embedding a chaotic encryption scheme into the MJPG-Streamer source codes. Then, multiuser smartphone communications between the sender and the receiver are implemented via WAN remote transmission. Finally, the transmitted video data are received with the given IP address and port in an Android smartphone. It should be noted that, this is the first time that chaotic video encryption schemes are implemented on such a hardware platform. The experimental results demonstrate that the technical challenges on hardware implementation of secure video communication are successfully solved, reaching a balance amongst sufficient security level, real-time processing of massive video data, and utilization of available resources in the hardware environment. The proposed scheme can serve as a good application example of chaotic secure communications for smartphone and other mobile facilities in the future.

Hardware test program for evaluation of baseline range/range rate sensor concept

NASA Technical Reports Server (NTRS)

1985-01-01

The Hardware Test Program for evaluation of the baseline range/range rate sensor concept was initiated 11 September 1984. This ninth report covers the period 12 May through 11 June 1885. A contract amendment adding a second phase has extended the Hardware Test Program through 10 December 1985. The objective of the added program phase is to establish range and range measurement accuracy and radar signature characteristics for a typical spacecraft target. Phase I of the Hardware Test Program was designed to reduce the risks associated with the Range/Range Rate (R/R) Sensor baseline design approach. These risks are associated with achieving the sensor performance required for the two modes of operation, the Interrupted CW (ICW) mode for initial acquisition and tracking to close-in ranges, and the CW mode, providing coverage during the final docking maneuver. The risks associated with these modes of operation have to do with the realization of adequate sensitivity to operate to their individual maximum ranges.

Programs for Testing Processor-in-Memory Computing Systems

NASA Technical Reports Server (NTRS)

Katz, Daniel S.

2006-01-01

The Multithreaded Microbenchmarks for Processor-In-Memory (PIM) Compilers, Simulators, and Hardware are computer programs arranged in a series for use in testing the performances of PIM computing systems, including compilers, simulators, and hardware. The programs at the beginning of the series test basic functionality; the programs at subsequent positions in the series test increasingly complex functionality. The programs are intended to be used while designing a PIM system, and can be used to verify that compilers, simulators, and hardware work correctly. The programs can also be used to enable designers of these system components to examine tradeoffs in implementation. Finally, these programs can be run on non-PIM hardware (either single-threaded or multithreaded) using the POSIX pthreads standard to verify that the benchmarks themselves operate correctly. [POSIX (Portable Operating System Interface for UNIX) is a set of standards that define how programs and operating systems interact with each other. pthreads is a library of pre-emptive thread routines that comply with one of the POSIX standards.

Sterilization of space hardware.

NASA Technical Reports Server (NTRS)

Pflug, I. J.

1971-01-01

Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

Hardware and Programmatic Progress on the Ares I-X Flight Test

NASA Technical Reports Server (NTRS)

Davis, Stephan R.

2008-01-01

In less than two years, the National Aeronautics and Space Administration (NASA) will execute the Ares I-X mission. This will be the first flight of the Ares I crew launch vehicle; which, together with the Ares V cargo launch vehicle (Figure 1), will eventually send humans to the Moon, Mars, and beyond. As the countdown to this first Ares mission continues, personnel from across the Ares I-X Mission Management Office (MMO) are finalizing designs and, in some cases, already fabricating vehicle hardware in preparation for an April 2009 launch. This paper will discuss the hardware and programmatic progress of the Ares I-X mission.

Study on the Preliminary Design of ARGO-M Operation System

NASA Astrophysics Data System (ADS)

Seo, Yoon-Kyung; Lim, Hyung-Chul; Rew, Dong-Young; Jo, Jung Hyun; Park, Jong-Uk; Park, Eun-Seo; Park, Jang-Hyun

2010-12-01

Korea Astronomy and Space Science Institute has been developing one mobile satellite laser ranging system named as accurate ranging system for geodetic observation-mobile (ARGO-M). Preliminary design of ARGO-M operation system (AOS) which is one of the ARGO-M subsystems was completed in 2009. Preliminary design results are applied to the following development phase by performing detailed design with analysis of pre-defined requirements and analysis of the derived specifications. This paper addresses the preliminary design of the whole AOS. The design results in operation and control part which is a key part in the operation system are described in detail. Analysis results of the interface between operation-supporting hardware and the control computer are summarized, which is necessary in defining the requirements for the operation-supporting hardware. Results of this study are expected to be used in the critical design phase to finalize the design process.

Some research advances in computer graphics that will enhance applications to engineering design

NASA Technical Reports Server (NTRS)

Allan, J. J., III

1975-01-01

Research in man/machine interactions and graphics hardware/software that will enhance applications to engineering design was described. Research aspects of executive systems, command languages, and networking used in the computer applications laboratory are mentioned. Finally, a few areas where little or no research is being done were identified.

Use of CCSDS Packets Over SpaceWire to Control Hardware

NASA Technical Reports Server (NTRS)

Haddad, Omar; Blau, Michael; Haghani, Noosha; Yuknis, William; Albaijes, Dennis

2012-01-01

For the Lunar Reconnaissance Orbiter, the Command and Data Handling subsystem consisted of several electronic hardware assemblies that were connected with SpaceWire serial links. Electronic hardware would be commanded/controlled and telemetry data was obtained using the SpaceWire links. Prior art focused on parallel data buses and other types of serial buses, which were not compatible with the SpaceWire and the core flight executive (CFE) software bus. This innovation applies to anything that utilizes both SpaceWire networks and the CFE software. The CCSDS (Consultative Committee for Space Data Systems) packet contains predetermined values in its payload fields that electronic hardware attached at the terminus of the SpaceWire node would decode, interpret, and execute. The hardware s interpretation of the packet data would enable the hardware to change its state/configuration (command) or generate status (telemetry). The primary purpose is to provide an interface that is compatible with the hardware and the CFE software bus. By specifying the format of the CCSDS packet, it is possible to specify how the resulting hardware is to be built (in terms of digital logic) that results in a hardware design that can be controlled by the CFE software bus in the final application

Student Drop Tower Competitions: Dropping In a Microgravity Environment (DIME) and What If No Gravity? (WING)

NASA Technical Reports Server (NTRS)

Hall, Nancy R.; Stocker, Dennis P.; DeLombard, Richard

2011-01-01

This paper describes two student competition programs that allow student teams to conceive a science or engineering experiment for a microgravity environment. Selected teams design and build their experimental hardware, conduct baseline tests, and ship their experiment to NASA where it is operated in the 2.2 Second Drop Tower. The hardware and acquired data is provided to the teams after the tests are conducted so that the teams can prepare their final reports about their findings.

A Low Cost, Self Acting, Liquid Hydrogen Boil-Off Recovery System

NASA Technical Reports Server (NTRS)

Pelfrey, Joy W.; Sharp, Kirk V. (Technical Monitor)

2001-01-01

The purpose of this research was to develop a prototype liquid hydrogen boll-off recovery system. Perform analyses to finalize recovery system cycle, design detail components, fabricate hardware, and conduct sub-component, component, and system level tests leading to the delivery of a prototype system. The design point and off-design analyses identified cycle improvements to increase the robustness of the system by adding a by-pass heat exchanger. Based on the design, analysis, and testing conducted, the recovery system will liquefy 31% of the gaseous boil off from a liquid hydrogen storage tank. All components, including a high speed, miniature turbocompressor, were designed and manufacturing drawings were created. All hardware was fabricated and tests were conducted in air, helium, and hydrogen. Testing validated the design, except for the turbocompressor. A rotor-to-stator clearance issue was discovered as a result of a concentricity tolerance stack-up.

Design of a Computer-Controlled, Random-Access Slide Projector Interface. Final Report (April 1974 - November 1974).

ERIC Educational Resources Information Center

Kirby, Paul J.; And Others

The design, development, test, and evaluation of an electronic hardware device interfacing a commercially available slide projector with a plasma panel computer terminal is reported. The interface device allows an instructional computer program to select slides for viewing based upon the lesson student situation parameters of the instructional…

Moving formal methods into practice. Verifying the FTPP Scoreboard: Results, phase 1

NASA Technical Reports Server (NTRS)

Srivas, Mandayam; Bickford, Mark

1992-01-01

This report documents the Phase 1 results of an effort aimed at formally verifying a key hardware component, called Scoreboard, of a Fault-Tolerant Parallel Processor (FTPP) being built at Charles Stark Draper Laboratory (CSDL). The Scoreboard is part of the FTPP virtual bus that guarantees reliable communication between processors in the presence of Byzantine faults in the system. The Scoreboard implements a piece of control logic that approves and validates a message before it can be transmitted. The goal of Phase 1 was to lay the foundation of the Scoreboard verification. A formal specification of the functional requirements and a high-level hardware design for the Scoreboard were developed. The hardware design was based on a preliminary Scoreboard design developed at CSDL. A main correctness theorem, from which the functional requirements can be established as corollaries, was proved for the Scoreboard design. The goal of Phase 2 is to verify the final detailed design of Scoreboard. This task is being conducted as part of a NASA-sponsored effort to explore integration of formal methods in the development cycle of current fault-tolerant architectures being built in the aerospace industry.

High speed bus technology development

NASA Astrophysics Data System (ADS)

Modrow, Marlan B.; Hatfield, Donald W.

1989-09-01

The development and demonstration of the High Speed Data Bus system, a 50 Million bits per second (Mbps) local data network intended for avionics applications in advanced military aircraft is described. The Advanced System Avionics (ASA)/PAVE PILLAR program provided the avionics architecture concept and basic requirements. Designs for wire and fiber optic media were produced and hardware demonstrations were performed. An efficient, robust token-passing protocol was developed and partially demonstrated. The requirements specifications, the trade-offs made, and the resulting designs for both a coaxial wire media system and a fiber optics design are examined. Also, the development of a message-oriented media access protocol is described, from requirements definition through analysis, simulation and experimentation. Finally, the testing and demonstrations conducted on the breadboard and brassboard hardware is presented.

Simulation verification techniques study: Simulation self test hardware design and techniques report

NASA Technical Reports Server (NTRS)

1974-01-01

The final results are presented of the hardware verification task. The basic objectives of the various subtasks are reviewed along with the ground rules under which the overall task was conducted and which impacted the approach taken in deriving techniques for hardware self test. The results of the first subtask and the definition of simulation hardware are presented. The hardware definition is based primarily on a brief review of the simulator configurations anticipated for the shuttle training program. The results of the survey of current self test techniques are presented. The data sources that were considered in the search for current techniques are reviewed, and results of the survey are presented in terms of the specific types of tests that are of interest for training simulator applications. Specifically, these types of tests are readiness tests, fault isolation tests and incipient fault detection techniques. The most applicable techniques were structured into software flows that are then referenced in discussions of techniques for specific subsystems.

Design and Evolution of a Modular Tensegrity Robot Platform

NASA Technical Reports Server (NTRS)

Bruce, Jonathan; Caluwaerts, Ken; Iscen, Atil; Sabelhaus, Andrew P.; SunSpiral, Vytas

2014-01-01

NASA Ames Research Center is developing a compliant modular tensegrity robotic platform for planetary exploration. In this paper we present the design and evolution of the platform's main hardware component, an untethered, robust tensegrity strut, with rich sensor feedback and cable actuation. Each strut is a complete robot, and multiple struts can be combined together to form a wide range of complex tensegrity robots. Our current goal for the tensegrity robotic platform is the development of SUPERball, a 6-strut icosahedron underactuated tensegrity robot aimed at dynamic locomotion for planetary exploration rovers and landers, but the aim is for the modular strut to enable a wide range of tensegrity morphologies. SUPERball is a second generation prototype, evolving from the tensegrity robot ReCTeR, which is also a modular, lightweight, highly compliant 6-strut tensegrity robot that was used to validate our physics based NASA Tensegrity Robot Toolkit (NTRT) simulator. Many hardware design parameters of the SUPERball were driven by locomotion results obtained in our validated simulator. These evolutionary explorations helped constrain motor torque and speed parameters, along with strut and string stress. As construction of the hardware has finalized, we have also used the same evolutionary framework to evolve controllers that respect the built hardware parameters.

Apollo experience report: Television system

NASA Technical Reports Server (NTRS)

Coan, P. P.

1973-01-01

The progress of the Apollo television systems from the early definition of requirements through the development and inflight use of color television hardware is presented. Television systems that have been used during the Apollo Program are discussed, beginning with a description of the specifications for each system. The document describes the technical approach taken for the development of each system and discusses the prototype and engineering hardware built to test the system itself and to perform the testing to verify compatibility with the spacecraft systems. Problems that occurred during the design and development phase are described. Finally, the flight hardware, operational characteristics, and performance during several Apollo missions are described, and specific recommendations for the remaining Apollo flights and future space missions are made.

Initial SVS Integrated Technology Evaluation Flight Test Requirements and Hardware Architecture

NASA Technical Reports Server (NTRS)

Harrison, Stella V.; Kramer, Lynda J.; Bailey, Randall E.; Jones, Denise R.; Young, Steven D.; Harrah, Steven D.; Arthur, Jarvis J.; Parrish, Russell V.

2003-01-01

This document presents the flight test requirements for the Initial Synthetic Vision Systems Integrated Technology Evaluation flight Test to be flown aboard NASA Langley's ARIES aircraft and the final hardware architecture implemented to meet these requirements. Part I of this document contains the hardware, software, simulator, and flight operations requirements for this light test as they were defined in August 2002. The contents of this section are the actual requirements document that was signed for this flight test. Part II of this document contains information pertaining to the hardware architecture that was realized to meet these requirements as presented to and approved by a Critical Design Review Panel prior to installation on the B-757 Airborne Research Integrated Experiments Systems (ARIES) airplane. This information includes a description of the equipment, block diagrams of the architecture, layouts of the workstations, and pictures of the actual installations.

Applications of artificial intelligence to space station: General purpose intelligent sensor interface

NASA Technical Reports Server (NTRS)

Mckee, James W.

1988-01-01

This final report describes the accomplishments of the General Purpose Intelligent Sensor Interface task of the Applications of Artificial Intelligence to Space Station grant for the period from October 1, 1987 through September 30, 1988. Portions of the First Biannual Report not revised will not be included but only referenced. The goal is to develop an intelligent sensor system that will simplify the design and development of expert systems using sensors of the physical phenomena as a source of data. This research will concentrate on the integration of image processing sensors and voice processing sensors with a computer designed for expert system development. The result of this research will be the design and documentation of a system in which the user will not need to be an expert in such areas as image processing algorithms, local area networks, image processor hardware selection or interfacing, television camera selection, voice recognition hardware selection, or analog signal processing. The user will be able to access data from video or voice sensors through standard LISP statements without any need to know about the sensor hardware or software.

Metrics for Analyzing Quantifiable Differentiation of Designs with Varying Integrity for Hardware Assurance

DTIC Science & Technology

2017-03-01

proposed. Expected profiles can incorporate a level of overdesign. Finally, the Design Integrity measuring techniques are applied to five Test Article ...Inserted into Test System Table 2 presents the results of the analysis applied to each of the test article designs. Each of the domains are...the lowest integrities. Based on the analysis, the DI metric shows measurable differentiation between all five Test Article Error Location Error

NASA Wallops Flight Center GEOS-3 altimeter data processing report

NASA Technical Reports Server (NTRS)

Stanley, H. R.; Dwyer, R. E.

1980-01-01

The procedures used to process the GEOS-3 radar altimeter data from raw telemetry data to a final user data product are described. In addition, the radar altimeter hardware design and operating parameters are presented to aid the altimeter user in understanding the altimeter data.

HSCT Sector Combustor Hardware Modifications for Improved Combustor Design

NASA Technical Reports Server (NTRS)

Greenfield, Stuart C.; Heberling, Paul V.; Moertle, George E.

2005-01-01

An alternative to the stepped-dome design for the lean premixed prevaporized (LPP) combustor has been developed. The new design uses the same premixer types as the stepped-dome design: integrated mixer flameholder (IMFH) tubes and a cyclone swirler pilot. The IMFH fuel system has been taken to a new level of development. Although the IMFH fuel system design developed in this Task is not intended to be engine-like hardware, it does have certain characteristics of engine hardware, including separate fuel circuits for each of the fuel stages. The four main stage fuel circuits are integrated into a single system which can be withdrawn from the combustor as a unit. Additionally, two new types of liner cooling have been designed. The resulting lean blowout data was found to correlate well with the Lefebvre parameter. As expected, CO and unburned hydrocarbons emissions were shown to have an approximately linear relationship, even though some scatter was present in the data, and the CO versus flame temperature data showed the typical cupped shape. Finally, the NOx emissions data was shown to agree well with a previously developed correlation based on emissions data from Configuration 3 tests performed at GEAE. The design variations of the cyclone swirler pilot that were investigated in this study did not significantly change the NOx emissions from the baseline design (GEAE Configuration 3) at supersonic cruise conditions.

Spacecraft design project: Low Earth orbit communications satellite

NASA Technical Reports Server (NTRS)

Moroney, Dave; Lashbrook, Dave; Mckibben, Barry; Gardener, Nigel; Rivers, Thane; Nottingham, Greg; Golden, Bill; Barfield, Bill; Bruening, Joe; Wood, Dave

1991-01-01

This is the final product of the spacecraft design project completed to fulfill the academic requirements of the Spacecraft Design and Integration 2 course (AE-4871) taught at the U.S. Naval Postgraduate School. The Spacecraft Design and Integration 2 course is intended to provide students detailed design experience in selection and design of both satellite system and subsystem components, and their location and integration into a final spacecraft configuration. The design team pursued a design to support a Low Earth Orbiting (LEO) communications system (GLOBALSTAR) currently under development by the Loral Cellular Systems Corporation. Each of the 14 team members was assigned both primary and secondary duties in program management or system design. Hardware selection, spacecraft component design, analysis, and integration were accomplished within the constraints imposed by the 11 week academic schedule and the available design facilities.

Force sharing in high-power parallel servo-actuators

NASA Technical Reports Server (NTRS)

Neal, T. P.

1974-01-01

The various existing force sharing schemes were examined by conducting a literature survey. A list of potentially applicable concepts was compiled from this survey, and a brief analysis was then made of each concept, which resulted in two competing schemes being selected for in-depth evaluation. A functional design of the equalization logic for the two schemes was undertaken and specific space shuttle application was chosen for experimental evaluation. The application was scaled down so that existing hardware could be utilized. Next, an analog computer study was conducted to evaluate the more important characteristics of the two competing force sharing schemes. On the basis of the computers study, a final configuration was selected. A load simulator was then designed to evaluate this configuration on actual hardware.

ICESat-2 laser technology development

NASA Astrophysics Data System (ADS)

Edwards, Ryan; Sawruk, Nick W.; Hovis, Floyd E.; Burns, Patrick; Wysocki, Theodore; Rudd, Joe; Walters, Brooke; Fakhoury, Elias; Prisciandaro, Vincent

2013-09-01

A number of ICESat-2 system requirements drove the technology evolution and the system architecture for the laser transmitter Fibertek has developed for the mission.. These requirements include the laser wall plug efficiency, laser reliability, high PRF (10kHz), short-pulse (<1.5ns), relatively narrow spectral line-width, and wave length tunability. In response to these requirements Fibertek developed a frequency-doubled, master oscillator/power amplifier (MOPA) laser that incorporates direct pumped diode pumped Nd:YVO4 as the gain media, Another guiding force in the system design has been extensive hardware life testing that Fibertek has completed. This ongoing hardware testing and development evolved the system from the original baseline brass board design to the more robust flight laser system. The final design meets or exceeds all NASA requirements and is scalable to support future mission requirements.

Naval Remote Ocean Sensing System (NROSS) study

NASA Technical Reports Server (NTRS)

1983-01-01

A set of hardware similar to the SEASAT A configuration requirement, suitable for installation and operation aboard a NOAA-D bus and a budgetary cost for one (1) protoflight model was provided. The scatterometer sensor is conceived as one of several sensors for the Navy Remote Ocean Sensing System (NROSS) Satellite Program. Deliverables requested were to include a final report with appropriate sketches and block diagrams showing the scatterometer design/configuration and a budgetary cost for all labor and materials to design, fabricate, test, and integrate this hardware into a NOAA-D satellite bus. This configuration consists of two (2) hardware assembles - a transmitter/receiver (T/R) assembly and an integrated electronics assembly (IEA). The T/R assembly as conceived is best located at the extreme opposite end of the satellite away from the solar array assembly and oriented in position to enable one surface of the assembly to have unobstructed exposure to space. The IEA is planned to be located at the bottom (Earth viewing) side of the satellite and requires a radiating plate.

A new approach to telemetry data processing. Ph.D. Thesis - Maryland Univ.

NASA Technical Reports Server (NTRS)

Broglio, C. J.

1973-01-01

An approach for a preprocessing system for telemetry data processing was developed. The philosophy of the approach is the development of a preprocessing system to interface with the main processor and relieve it of the burden of stripping information from a telemetry data stream. To accomplish this task, a telemetry preprocessing language was developed. Also, a hardware device for implementing the operation of this language was designed using a cellular logic module concept. In the development of the hardware device and the cellular logic module, a distributed form of control was implemented. This is accomplished by a technique of one-to-one intermodule communications and a set of privileged communication operations. By transferring this control state from module to module, the control function is dispersed through the system. A compiler for translating the preprocessing language statements into an operations table for the hardware device was also developed. Finally, to complete the system design and verify it, a simulator for the collular logic module was written using the APL/360 system.

Results of solar electric thrust vector control system design, development and tests

NASA Technical Reports Server (NTRS)

Fleischer, G. E.

1973-01-01

Efforts to develop and test a thrust vector control system TVCS for a solar-energy-powered ion engine array are described. The results of solar electric propulsion system technology (SEPST) III real-time tests of present versions of TVCS hardware in combination with computer-simulated attitude dynamics of a solar electric multi-mission spacecraft (SEMMS) Phase A-type spacecraft configuration are summarized. Work on an improved solar electric TVCS, based on the use of a state estimator, is described. SEPST III tests of TVCS hardware have generally proved successful and dynamic response of the system is close to predictions. It appears that, if TVCS electronic hardware can be effectively replaced by control computer software, a significant advantage in control capability and flexibility can be gained in future developmental testing, with practical implications for flight systems as well. Finally, it is concluded from computer simulations that TVCS stabilization using rate estimation promises a substantial performance improvement over the present design.

A novel visual hardware behavioral language

NASA Technical Reports Server (NTRS)

Li, Xueqin; Cheng, H. D.

1992-01-01

Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

Pressure fed thrust chamber technology program

NASA Technical Reports Server (NTRS)

Dunn, Glenn M.

1992-01-01

This is the final report for the Pressure Fed Technology Program. It details the design, fabrication and testing of subscale hardware which successfully characterized LOX/RP combustion for a low cost pressure fed design. The innovative modular injector design is described in detail as well as hot-fire test results which showed excellent performance. The program summary identifies critical LOX/RP design issues that have been resolved by this testing, and details the low risk development requirements for a low cost engine for future Expendable Launch Vehicles (ELVi).

Ares I-X Flight Test--The Future Begins Here

NASA Technical Reports Server (NTRS)

Davis, Stephan R.; Tuma, Margaret L.; Heitzman, Keith

2007-01-01

In less than two years, the National Aeronautics and Space Administration (NASA) will launch the Ares I-X mission. This will be the first flight of the Ares I crew launch vehicle, which, together with the Ares V cargo launch vehicle, will eventually send humans to the Moon, Mars, and beyond. As the countdown to this first Ares mission continues, personnel from across the Ares I-X Mission Management Office (MMO) are finalizing designs and fabricating vehicle hardware for a 2009 launch. This paper will discuss the hardware and programmatic progress of the Ares I-X mission.

Holistic Design for Total Product Well Being

NASA Technical Reports Server (NTRS)

Adams, Chris W.; Hamilton, George S.

2004-01-01

Recent hardware development work at NASA's Marshall Space Flight Center creates and argument for the use of a holistic design approach as opposed to a piece part design approach. A piece part design approach being one where individual pieces are developed to their finished state having to meet certain interface and human engineering requirements without much consideration to the final product as a whole. A holistic design approach being one where the final product is evaluated early and frequently during the design process, and individual parts are developed with consideration to how they interact a whole,and how they interact with the user and environment. Examples from the development of the Materials Science Research Rack - 1 will illustrate: a design failure due to piece part design; a design save, due to a failure of piece part design, but saved by evaluating the design holistically; and a design success due to a holistic design approach.

Mission Management Computer and Sequencing Hardware for RLV-TD HEX-01 Mission

NASA Astrophysics Data System (ADS)

Gupta, Sukrat; Raj, Remya; Mathew, Asha Mary; Koshy, Anna Priya; Paramasivam, R.; Mookiah, T.

2017-12-01

Reusable Launch Vehicle-Technology Demonstrator Hypersonic Experiment (RLV-TD HEX-01) mission posed some unique challenges in the design and development of avionics hardware. This work presents the details of mission critical avionics hardware mainly Mission Management Computer (MMC) and sequencing hardware. The Navigation, Guidance and Control (NGC) chain for RLV-TD is dual redundant with cross-strapped Remote Terminals (RTs) interfaced through MIL-STD-1553B bus. MMC is Bus Controller on the 1553 bus, which does the function of GPS aided navigation, guidance, digital autopilot and sequencing for the RLV-TD launch vehicle in different periodicities (10, 20, 500 ms). Digital autopilot execution in MMC with a periodicity of 10 ms (in ascent phase) is introduced for the first time and successfully demonstrated in the flight. MMC is built around Intel i960 processor and has inbuilt fault tolerance features like ECC for memories. Fault Detection and Isolation schemes are implemented to isolate the failed MMC. The sequencing hardware comprises Stage Processing System (SPS) and Command Execution Module (CEM). SPS is `RT' on the 1553 bus which receives the sequencing and control related commands from MMCs and posts to downstream modules after proper error handling for final execution. SPS is designed as a high reliability system by incorporating various fault tolerance and fault detection features. CEM is a relay based module for sequence command execution.

Managing Risk for Thermal Vacuum Testing of the International Space Station Radiators

NASA Technical Reports Server (NTRS)

Carek, Jerry A.; Beach, Duane E.; Remp, Kerry L.

2000-01-01

The International Space Station (ISS) is designed with large deployable radiator panels that are used to reject waste heat from the habitation modules. Qualification testing of the Heat Rejection System (HRS) radiators was performed using qualification hardware only. As a result of those tests, over 30 design changes were made to the actual flight hardware. Consequently, a system level test of the flight hardware was needed to validate its performance in the final configuration. A full thermal vacuum test was performed on the flight hardware in order to demonstrate its ability to deploy on-orbit. Since there is an increased level of risk associated with testing flight hardware, because of cost and schedule limitations, special risk mitigation procedures were developed and implemented for the test program, This paper introduces the Continuous Risk Management process that was utilized for the ISS HRS test program. Testing was performed in the Space Power Facility at the NASA Glenn Research Center, Plum Brook Station located in Sandusky, Ohio. The radiator system was installed in the 100-foot diameter by 122-foot tall vacuum chamber on a special deployment track. Radiator deployments were performed at several thermal conditions similar to those expected on-orbit using both the primary deployment mechanism and the back-up deployment mechanism. The tests were highly successful and were completed without incident.

Integrated control system environment for high-throughput tomography

NASA Astrophysics Data System (ADS)

Khokhriakov, Igor; Lottermoser, Lars; Beckmann, Felix

2017-10-01

The extensive progress in hardware in recent years makes it now possible to develop nearly real time control system for tomography experiments. Such system can perform all the routines that are necessary for the experiment and provide real time feedback to the user. This feedback can be used for instant monitoring and/or for real time reconstruction. The initial design and implementation of such system was presented in the SPIE publication in 2014 [1]. In this paper an update to the system is presented. The paper will cover the following 4 topics. The first topic simply gives an overview of the system. The second topic presents the way how we integrate different software components to achieve simplicity and flexibility. As it is still in research and design phase we need a possibility to easily adjust the system to our needs introducing new components or removing old ones. The third topic presents a hardware driven tomography experiment design implemented at one of our beamlines. The basic idea is that a hardware signal is sent to the instrument hardware (camera, shutter etc). This signal is emitted by the controller of the sample axis which defines the moment when the system is ready to capture the next image i.e. next rotation angle. Finally as our software is in a constant process of evaluation a continuous integration process was implemented to reduce the time cost of redeployment and configuration of new versions.

A High-Speed Design of Montgomery Multiplier

NASA Astrophysics Data System (ADS)

Fan, Yibo; Ikenaga, Takeshi; Goto, Satoshi

With the increase of key length used in public cryptographic algorithms such as RSA and ECC, the speed of Montgomery multiplication becomes a bottleneck. This paper proposes a high speed design of Montgomery multiplier. Firstly, a modified scalable high-radix Montgomery algorithm is proposed to reduce critical path. Secondly, a high-radix clock-saving dataflow is proposed to support high-radix operation and one clock cycle delay in dataflow. Finally, a hardware-reused architecture is proposed to reduce the hardware cost and a parallel radix-16 design of data path is proposed to accelerate the speed. By using HHNEC 0.25μm standard cell library, the implementation results show that the total cost of Montgomery multiplier is 130 KGates, the clock frequency is 180MHz and the throughput of 1024-bit RSA encryption is 352kbps. This design is suitable to be used in high speed RSA or ECC encryption/decryption. As a scalable design, it supports any key-length encryption/decryption up to the size of on-chip memory.

Common modular avionics - Partitioning and design philosophy

NASA Astrophysics Data System (ADS)

Scott, D. M.; Mulvaney, S. P.

The design objectives and definition criteria for common modular hardware that will perform digital processing functions in multiple avionic subsystems are examined. In particular, attention is given to weapon system-level objectives, such as increased supportability, reduced life cycle costs, and increased upgradability. These objectives dictate the following overall modular design goals: reduce test equipment requirements; have a large number of subsystem applications; design for architectural growth; and standardize for technology transparent implementations. Finally, specific partitioning criteria are derived on the basis of the weapon system-level objectives and overall design goals.

Data flow modeling techniques

NASA Technical Reports Server (NTRS)

Kavi, K. M.

1984-01-01

There have been a number of simulation packages developed for the purpose of designing, testing and validating computer systems, digital systems and software systems. Complex analytical tools based on Markov and semi-Markov processes have been designed to estimate the reliability and performance of simulated systems. Petri nets have received wide acceptance for modeling complex and highly parallel computers. In this research data flow models for computer systems are investigated. Data flow models can be used to simulate both software and hardware in a uniform manner. Data flow simulation techniques provide the computer systems designer with a CAD environment which enables highly parallel complex systems to be defined, evaluated at all levels and finally implemented in either hardware or software. Inherent in data flow concept is the hierarchical handling of complex systems. In this paper we will describe how data flow can be used to model computer system.

Reuse and Interoperability of Avionics for Space Systems

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

2007-01-01

The space environment presents unique challenges for avionics. Launch survivability, thermal management, radiation protection, and other factors are important for successful space designs. Many existing avionics designs use custom hardware and software to meet the requirements of space systems. Although some space vendors have moved more towards a standard product line approach to avionics, the space industry still lacks similar standards and common practices for avionics development. This lack of commonality manifests itself in limited reuse and a lack of interoperability. To address NASA s need for interoperable avionics that facilitate reuse, several hardware and software approaches are discussed. Experiences with existing space boards and the application of terrestrial standards is outlined. Enhancements and extensions to these standards are considered. A modular stack-based approach to space avionics is presented. Software and reconfigurable logic cores are considered for extending interoperability and reuse. Finally, some of the issues associated with the design of reusable interoperable avionics are discussed.

Opportunities and choice in a new vector era

NASA Astrophysics Data System (ADS)

Nowak, A.

2014-06-01

This work discusses the significant changes in computing landscape related to the progression of Moore's Law, and the implications on scientific computing. Particular attention is devoted to the High Energy Physics domain (HEP), which has always made good use of threading, but levels of parallelism closer to the hardware were often left underutilized. Findings of the CERN openlab Platform Competence Center are reported in the context of expanding "performance dimensions", and especially the resurgence of vectors. These suggest that data oriented designs are feasible in HEP and have considerable potential for performance improvements on multiple levels, but will rarely trump algorithmic enhancements. Finally, an analysis of upcoming hardware and software technologies identifies heterogeneity as a major challenge for software, which will require more emphasis on scalable, efficient design.

Hardware Acceleration of Adaptive Neural Algorithms.

DOE Office of Scientific and Technical Information (OSTI.GOV)

James, Conrad D.

As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - worldmore » conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.« less

SSME Main Combustion Chamber (MCC) hot oil dewaxing

NASA Technical Reports Server (NTRS)

Akpati, Anthony U.

1995-01-01

In an attempt to comply with the changing environmental regulations, a process was developed for the replacement of perchloroethylene in the dewaxing of the Space Shuttle Main Engine (SSME) Main Combustion Chamber (MCC) and other associated hardware filled with the Rigidax (R) casting compound. Rigidax (R) is a hard blue-dyed, calcium carbonate filled thermoplastic casting compound (melting point 77 C) that is melted and poured into hardware cavities to prevent contamination during material removal processes, i.e. machining, grinding, drilling, and deburring. Additionally, it serves as a maskant for designated areas during electroforming processes. Laboratory testing was conducted to evaluate seven alternate fluids for the replacement of perchloroethylene in the dewaxing process. Based upon successful laboratory results, a mineral oil was selected for testing on actual hardware. The final process developed involves simultaneous immersion and flushing of the MCC channels using a distinct eight stage process. A nonvolatile hydrocarbon analysis of a solvent flush sample is performed to determine the hardware cleanliness for comparison to the previous perchloroethylene dewaxing process.

SSME Main Combustion Chamber (MCC) 'Hot Oil' Dewaxing

NASA Technical Reports Server (NTRS)

Akpati, Anthony U.

1994-01-01

In an attempt to comply with the changing environmental regulations, a process was developed for the replacement of perchloroethylene in the dewaxing of the Space Shuttle Main Engine (SSME) Main Combustion Chamber (MCC) and other associated hardware filled with the Rigidax(registered mark) casting compound. Rigidax(registered mark) is a hard blue-dyed, calcium carbonate filled thermoplastic casting compound (melting point 77 C) that is melted and poured into hardware cavities to prevent contamination during material removal processes, i.e. machining, grinding, drilling, and deburring. Additionally, it serves as a maskant for designated areas during electroforming processes. Laboratory testing was conducted to evaluate seven alternate fluids for the replacement of perchloroethylene in the dewaxing process. Based upon successful laboratory results, a mineral oil was selected for testing on actual hardware. The final process developed involves simultaneous immersion and flushing of the MCC channels using a distinct eight stage process. A nonvolatile hydrocarbon analysis of a solvent flush sample is performed to determine the hardware cleanliness for comparison to the previous perchloroethylene dewaxing process.

Primary and secondary electrical space power based on advanced PEM systems

NASA Technical Reports Server (NTRS)

Vanderborgh, N. E.; Hedstrom, J. C.; Stroh, K. R.; Huff, J. R.

1993-01-01

For new space ventures, power continues to be a pacing function for mission planning and experiment endurance. Although electrochemical power is a well demonstrated space power technology, current hardware limitations impact future mission viability. In order to document and augment electrochemical technology, a series of experiments for the National Aeronautics and Space Administration Lewis Research Center (NASA LeRC) are underway at the Los Alamos National Laboratory that define operational parameters on contemporary proton exchange membrane (PEM) hardware operating with hydrogen and oxygen reactants. Because of the high efficiency possible for water electrolysis, this hardware is also thought part of a secondary battery design built around stored reactants - the so-called regenerative fuel cell. An overview of stack testing at Los Alamos and of analyses related to regenerative fuel cell systems are provided in this paper. Finally, this paper describes work looking at innovative concepts that remove complexity from stack hardware with the specific intent of higher system reliability. This new concept offers the potential for unprecedented electrochemical power system energy densities.

Pressure fed thrust chamber technology program

NASA Technical Reports Server (NTRS)

Dunn, Glen M.

1992-01-01

This is the final report for the Pressure Fed Technology Program. It details the design, fabrication, and testing of subscale hardware which successfully characterized Liquid Oxygen Rocket Propulsion (LOX/RP) combustion for low cost pressure fed design. The innovative modular injector design is described in detail as well as hot-fire test results which showed excellent performance. The program summary identifies critical LOX/RP design issues that have been resolved in this testing, and details the low risk development requirements for low cost engines for future Expandable Launch Vehicles (ELV).

Safety and Efficacy of the BrainPort V100 Device in Individuals Blinded by Traumatic Injury

DTIC Science & Technology

2015-10-01

within the next quarter. 15 . SUBJECT TERMS BrainPort, V100, V200, blindness, visual impairment, assistive device, assistive technology, visual aid, non...2. Keywords 4 3. Accomplishments 4 4. Impact 10 5 . Changes/Problems 10 6. Products 10 7. Participants & Other...design were finalized during the 4 th quarter. The headset frame design (plastic and silicone components) was completed and device hardware 5 and

Protein Crystal Growth With the Aid of Microfluidics

NASA Technical Reports Server (NTRS)

vanderWoerd, Mark

2003-01-01

Protein crystallography is one of three well-known methods to obtain the structure of proteins. A major rate limiting step in protein crystallography is protein crystal nucleation and growth, which is still largely a process conducted by trial-and-error methods. Many attempts have been made to improve protein crystal growth by performing growth in microgravity. Although the use of microgravity appears to improve crystal quality in some attempts, this method has been inefficient because several reasons: we lack a fundamental understanding of macromolecular crystal growth in general and of the influence of microgravity in particular, we have to start with crystal growth conditions in microgravity based on conditions on the ground and finally the hardware does not allow for experimental iteration without reloading samples on the ground. To partially accommodate the disadvantages of the current hardware, we have used microfluidic technology (Lab-on-a-Chip devices) to design the concept of a more efficient crystallization device, suitable for use on the International Space Station and in high-throughput applications on the ground. The concept and properties of microfluidics, the application design process, and the advances in protein crystal growth hardware will be discussed in this presentation. Some examples of proteins crystallized in the new hardware will be discussed, including the differences between conventional crystallization versus crystallization in microfluidics.

An Embedded Sensor Node Microcontroller with Crypto-Processors.

PubMed

Panić, Goran; Stecklina, Oliver; Stamenković, Zoran

2016-04-27

Wireless sensor network applications range from industrial automation and control, agricultural and environmental protection, to surveillance and medicine. In most applications, data are highly sensitive and must be protected from any type of attack and abuse. Security challenges in wireless sensor networks are mainly defined by the power and computing resources of sensor devices, memory size, quality of radio channels and susceptibility to physical capture. In this article, an embedded sensor node microcontroller designed to support sensor network applications with severe security demands is presented. It features a low power 16-bitprocessor core supported by a number of hardware accelerators designed to perform complex operations required by advanced crypto algorithms. The microcontroller integrates an embedded Flash and an 8-channel 12-bit analog-to-digital converter making it a good solution for low-power sensor nodes. The article discusses the most important security topics in wireless sensor networks and presents the architecture of the proposed hardware solution. Furthermore, it gives details on the chip implementation, verification and hardware evaluation. Finally, the chip power dissipation and performance figures are estimated and analyzed.

An Embedded Sensor Node Microcontroller with Crypto-Processors

PubMed Central

Panić, Goran; Stecklina, Oliver; Stamenković, Zoran

2016-01-01

Wireless sensor network applications range from industrial automation and control, agricultural and environmental protection, to surveillance and medicine. In most applications, data are highly sensitive and must be protected from any type of attack and abuse. Security challenges in wireless sensor networks are mainly defined by the power and computing resources of sensor devices, memory size, quality of radio channels and susceptibility to physical capture. In this article, an embedded sensor node microcontroller designed to support sensor network applications with severe security demands is presented. It features a low power 16-bitprocessor core supported by a number of hardware accelerators designed to perform complex operations required by advanced crypto algorithms. The microcontroller integrates an embedded Flash and an 8-channel 12-bit analog-to-digital converter making it a good solution for low-power sensor nodes. The article discusses the most important security topics in wireless sensor networks and presents the architecture of the proposed hardware solution. Furthermore, it gives details on the chip implementation, verification and hardware evaluation. Finally, the chip power dissipation and performance figures are estimated and analyzed. PMID:27128925

PCI bus content-addressable-memory (CAM) implementation on FPGA for pattern recognition/image retrieval in a distributed environment

NASA Astrophysics Data System (ADS)

Megherbi, Dalila B.; Yan, Yin; Tanmay, Parikh; Khoury, Jed; Woods, C. L.

2004-11-01

Recently surveillance and Automatic Target Recognition (ATR) applications are increasing as the cost of computing power needed to process the massive amount of information continues to fall. This computing power has been made possible partly by the latest advances in FPGAs and SOPCs. In particular, to design and implement state-of-the-Art electro-optical imaging systems to provide advanced surveillance capabilities, there is a need to integrate several technologies (e.g. telescope, precise optics, cameras, image/compute vision algorithms, which can be geographically distributed or sharing distributed resources) into a programmable system and DSP systems. Additionally, pattern recognition techniques and fast information retrieval, are often important components of intelligent systems. The aim of this work is using embedded FPGA as a fast, configurable and synthesizable search engine in fast image pattern recognition/retrieval in a distributed hardware/software co-design environment. In particular, we propose and show a low cost Content Addressable Memory (CAM)-based distributed embedded FPGA hardware architecture solution with real time recognition capabilities and computing for pattern look-up, pattern recognition, and image retrieval. We show how the distributed CAM-based architecture offers a performance advantage of an order-of-magnitude over RAM-based architecture (Random Access Memory) search for implementing high speed pattern recognition for image retrieval. The methods of designing, implementing, and analyzing the proposed CAM based embedded architecture are described here. Other SOPC solutions/design issues are covered. Finally, experimental results, hardware verification, and performance evaluations using both the Xilinx Virtex-II and the Altera Apex20k are provided to show the potential and power of the proposed method for low cost reconfigurable fast image pattern recognition/retrieval at the hardware/software co-design level.

Neurolab: Final Report for the Ames Research Center Payload

NASA Technical Reports Server (NTRS)

Maese, A. Christopher (Editor); Ostrach, Louis H. (Editor); Dalton, Bonnie P. (Technical Monitor)

2002-01-01

Neurolab, the final Spacelab mission, launched on STS-90 on April 17, 1998, was dedicated to studying the nervous system. NASA cooperated with domestic and international partners to conduct the mission. ARC's (Ames Research Center's) Payload included 15 experiments designed to study the adaptation and development of the nervous system in microgravity. The payload had the largest number of Principal and Co-Investigators, largest complement of habitats and experiment unique equipment flown to date, and most diverse distribution of live specimens ever undertaken by ARC, including rodents, toadfish, swordtail fish, water snails, hornweed and crickets To facilitate tissue sharing and optimization of science objectives, investigators were grouped into four science discipline teams: Neuronal Plasticity, Mammalian Development, Aquatic, and Neurobiology. Several payload development challenges were experienced and required an extraordinary effort, by all involved, to meet the launch schedule. With respect to hardware and the total amount of recovered science, Neurolab was regarded as an overall success. However, a high mortality rate in one rodent group and several hardware anomalies occurred inflight that warranted postflight investigations. Hardware, science, and operations lessons were learned that should be taken into consideration by payload teams developing payloads for future Shuttle missions and the International Space Station.

Verification of an on line in vivo semiconductor dosimetry system for TBI with two TLD procedures.

PubMed

Sánchez-Doblado, F; Terrón, J A; Sánchez-Nieto, B; Arráns, R; Errazquin, L; Biggs, D; Lee, C; Núñez, L; Delgado, A; Muñiz, J L

1995-01-01

This work presents the verification of an on line in vivo dosimetry system based on semiconductors. Software and hardware has been designed to convert the diode signal into absorbed dose. Final verification was made in the form of an intercomparison with two independent thermoluminiscent (TLD) dosimetry systems, under TBI conditions.

Functional Specifications for Computer Aided Training Systems Development and Management (CATSDM) Support Functions. Final Report.

ERIC Educational Resources Information Center

Hughes, John; And Others

This report provides a description of a Computer Aided Training System Development and Management (CATSDM) environment based on state-of-the-art hardware and software technology, and including recommendations for off the shelf systems to be utilized as a starting point in addressing the particular systematic training and instruction design and…

Functional Design of an Automated Instructional Support System for Operational Flight Trainers. Final Report, June 1976 through September 1977.

ERIC Educational Resources Information Center

Semple, Clarence A.; And Others

Functional requirements for a highly automated, flexible, instructional support system for aircrew training simulators are presented. Automated support modes and associated features and capabilities are described, along with hardware and software functional requirements for implementing a baseline system in an operational flight training context.…

[The development of an intelligent four-channel aggregometer].

PubMed

Guan, X; Wang, M

1998-07-01

The paper introduces the hardware and software design of the instrument. We use 89C52 single-chip computer as the microprocessor to control the amplifier, AD and DA conversion chip to realize the sampling, data process, printout and supervision. The final result is printed out in form of data and aggregation curve from PP40 plotter.

Design by Prototype: Examples from the National Aeronautics and Space Administration

NASA Technical Reports Server (NTRS)

Mulenburg, Gerald M.; Gundo, Daniel P.

2002-01-01

This paper describes and provides exa.mples of a technique called Design-by-Prototype used in the development of research hardware at the National Aeronautics and Space Administration's (NASA) Ames Research Center. This is not a new idea. Artisans and great masters have used prototyping as a design technique for centuries. They created prototypes to try out their ideas before making the primary artifact they were planning. This abstract is itself a prototype for others to use in determining the value of the paper it describes. At the Ames Research Center Design-by-Prototype is used for developing unique, one-of-a-kind hardware for small, high-risk projects. The need tor this new/old process is the proliferation of computer "design tools" that can result in both excessive time expended in design, and a lack of imbedded reality in the final product. Despite creating beautiful three-dimensional models and detailed computer drawings that can consume hundreds of engineering hours, the resulting designs can be extremely difficult to make, requiring many changes that add to the cost and schedule. Much design time can be saved and expensive rework eliminated using Design-by-Prototype.

Energy resource alternatives competition. Progress report for the period February 1, 1975--December 31, 1975. [Space heating and cooling, hot water, and electricity for homes, farms, and light industry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matzke, D.J.; Osowski, D.M.; Radtke, M.L.

1976-01-01

This progress report describes the objectives and results of the intercollegiate Energy Resource Alternatives competition. The one-year program concluded in August 1975, with a final testing program of forty student-built alternative energy projects at the Sandia Laboratories in Albuquerque, New Mexico. The goal of the competition was to design and build prototype hardware which could provide space heating and cooling, hot water, and electricity at a level appropriate to the needs of homes, farms, and light industry. The hardware projects were powered by such nonconventional energy sources as solar energy, wind, biologically produced gas, coal, and ocean waves. The competitionmore » rules emphasized design innovation, economic feasibility, practicality, and marketability. (auth)« less

Postflight hardware evaluation 360T021 (RSRM-21, STS-45), revision A

NASA Technical Reports Server (NTRS)

Maccauly, Linda E.

1992-01-01

The Final Postflight Hardware Evaluation Report 360T021 (RSRM-21, STS-45) is included. All observed hardware conditions were documented on Postflight Observation Reports (PFOR's) and included in Appendices A through E. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report represents a summary of the 360T021 hardware evaluation.

Experimental demonstration of the control of flexible structures

NASA Technical Reports Server (NTRS)

Schaechter, D. B.; Eldred, D. B.

1984-01-01

The Large Space Structure Technology Flexible Beam Experiment employs a pinned-free flexible beam to demonstrate such required methods as dynamic and adaptive control, as well as various control law design approaches and hardware requirements. An attempt is made to define the mechanization difficulties that may inhere in flexible structures. Attention is presently given to analytical work performed in support of the test facility's development, the final design's specifications, the control laws' synthesis, and experimental results obtained.

Design and realization of tourism spatial decision support system based on GIS

NASA Astrophysics Data System (ADS)

Ma, Zhangbao; Qi, Qingwen; Xu, Li

2008-10-01

In this paper, the existing problems of current tourism management information system are analyzed. GIS, tourism as well as spatial decision support system are introduced, and the application of geographic information system technology and spatial decision support system to tourism management and the establishment of tourism spatial decision support system based on GIS are proposed. System total structure, system hardware and software environment, database design and structure module design of this system are introduced. Finally, realization methods of this systemic core functions are elaborated.

Optimal Controller Design for the Microgravity Isolation Mount (MIM)

NASA Technical Reports Server (NTRS)

Hampton, R. David

1998-01-01

H2 controllers, when designed using an appropriate design model and carefully chosen frequency weightings, appear to provide robust performance and robust stability for Microgravity Isolation Mount (MIM). The STS-85 flight data will be used to evaluate the H2 controllers' performance on the actual hardware under working conditions. Next, full-order H-infinity controllers will be developed, as an intermediate step, in order to determine appropriate H-infinity performance weights for use in the mixed-norm design. Finally the basic procedure outlined above will be used to develop fixed-order mixed-norm controllers for MIM.

75 FR 32972 - Office of New Reactors: Notice of Availability of the Final Staff Guidance; Section 14.3.12 on...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-06-10

... the Final Staff Guidance; Section 14.3.12 on Physical Security Hardware Inspections, Tests, Analyses...: The NRC is issuing its Final Revision 1 to NUREG-0800, ``Standard Review Plan (SRP) for the Review of Safety Analysis Reports for Nuclear Power Plants,'' Section 14.3.12 on ``Physical Security Hardware...

Life sciences payload definition and integration study. Volume 2: Requirements, design, and planning studies for the carry-on laboratories. [for Spacelab

NASA Technical Reports Server (NTRS)

1974-01-01

The task phase concerned with the requirements, design, and planning studies for the carry-on laboratory (COL) began with a definition of biomedical research areas and candidate research equipment, and then went on to develop conceptual layouts for COL which were each evaluated in order to arrive at a final conceptual design. Each step in this design/evaluation process concerned itself with man/systems integration research and hardware, and life support and protective systems research and equipment selection. COL integration studies were also conducted and include attention to electrical power and data management requirements, operational considerations, and shuttle/Spacelab interface specifications. A COL program schedule was compiled, and a cost analysis was finalized which takes into account work breakdown, annual funding, and cost reduction guidelines.

Analysis and test of a breadboard cryogenic hydrogen/Freon heat exchanger

NASA Technical Reports Server (NTRS)

Desjardins, L. F.; Hooper, J.

1973-01-01

System studies required to verify a tube-in-tube cryogenic heat exchanger as optimum for the space shuttle mission are described. Design of the optimum configuration, which could be fabricated from commercially available hardware, is discussed. Finally, testing of the proposed configuration with supercritical hydrogen and Freon 21 is discussed and results are compared with thermal and dynamic analysis.

Extension of TVCAI Project to Include Demonstration of Intelligent Videodisc System. Hardware, Software, and Courseware Implementation Component. Final Report.

ERIC Educational Resources Information Center

Brandt, Richard C.; Knapp, Barbara H.

This project, stemming from work started under the National Science Foundation grant "Development of a Television Computer Assisted Instruction (TVCAI) System" SER-7806412, called for the transfer to videodisc of some of the videotape materials developed under the grant. Three efforts were included in the proposal: design and development…

MSFC Skylab Orbital Workshop, volume 1. [systems analysis and equipment specifications for orbital laboratory

NASA Technical Reports Server (NTRS)

1974-01-01

The technical aspects of the Skylab-Orbital Workshop are discussed. Original concepts, goals, design philosophy, hardware, and testing are reported. The final flight configuration, overall test program, and mission performance are analyzed. The systems which are examined are: (1) the structural system, (2) the meteoroid shield systems, and (3) the environmental/thermal control subsystem.

Infrastructure for deployment of power systems

NASA Technical Reports Server (NTRS)

Sprouse, Kenneth M.

1991-01-01

A preliminary effort in characterizing the types of stationary lunar power systems which may be considered for emplacement on the lunar surface from the proposed initial 100-kW unit in 2003 to later units ranging in power from 25 to 825 kW is presented. Associated with these power systems are their related infrastructure hardware including: (1) electrical cable, wiring, switchgear, and converters; (2) deployable radiator panels; (3) deployable photovoltaic (PV) panels; (4) heat transfer fluid piping and connection joints; (5) power system instrumentation and control equipment; and (6) interface hardware between lunar surface construction/maintenance equipment and power system. This report: (1) presents estimates of the mass and volumes associated with these power systems and their related infrastructure hardware; (2) provides task breakdown description for emplacing this equipment; (3) gives estimated heat, forces, torques, and alignment tolerances for equipment assembly; and (4) provides other important equipment/machinery requirements where applicable. Packaging options for this equipment will be discussed along with necessary site preparation requirements. Design and analysis issues associated with the final emplacement of this power system hardware are also described.

Shuttle Entry Air Data System (SEADS) hardware development. Volume 1: Summary

NASA Technical Reports Server (NTRS)

While, D. M.

1983-01-01

Hardware development of the Shuttle Entry Data System (SEADS) is described. The system consists of an array of fourteen pressure ports, installed in an Orbiter nose cap, which, when coupled with existing fuselage mounted static pressure ports permits computation of entry flight parameters. Elements of the system that are described include the following: (1) penetration assemblies to place pressure port openings at the surface of the nose cap; (2) pressure tubes to transmit the surface pressure to transducers; (3) support posts or manifolds to provide support for, and reduce the length of, the individual pressure tubes; (4) insulation for the manifolds; and (5) a SEADS nose cap. Design, analyses, and tests to develop and certify design for flight are described. Specific tests include plasma arc exposure, radiant thermal, vibration, and structural. Volume one summarizes highlights of the program, particularly as they relate to the final design of SEADS. Volume two summarizes all of the Vought responsible activities in essentially a chronological order.

Shuttle Entry Air Data System (SEADS) hardware development. Volume 2: History

NASA Technical Reports Server (NTRS)

While, D. M.

1983-01-01

Hardware development of the Shuttle Entry Air Data System (SEADS) is described. The system consists of an array of fourteen pressure ports, installed in an Orbiter nose cap, which, when coupled with existing fuselage mounted static pressure ports permits computation of entry flight parameters. Elements of the system that are described include the following: (1) penetration assemblies to place pressure port openings at the surface of the nose cap; (2) pressure tubes to transmit the surface pressure to transducers; (3) support posts or manifolds to provide support for, and reduce the length of, the individual pressure tubes; (4) insulation for the manifolds; and (5) a SEADS nose cap. Design, analyses, and tests to develop and certify design for flight are described. Specific tests included plasma arc exposure, radiant thermal, vibration, and structural. Volume one summarizes highlights of the program, particularly as they relate to the final design of SEADS. Volume two summarizes all of the Vought responsible activities in essentially a chronological order.

Study of the effect of static/dynamic Coulomb friction variation at the tape-head interface of a spacecraft tape recorder by non-linear time response simulation

NASA Technical Reports Server (NTRS)

Mukhopadhyay, A. K.

1978-01-01

A description is presented of six simulation cases investigating the effect of the variation of static-dynamic Coulomb friction on servo system stability/performance. The upper and lower levels of dynamic Coulomb friction which allowed operation within requirements were determined roughly to be three times and 50% respectively of nominal values considered in a table. A useful application for the nonlinear time response simulation is the sensitivity analysis of final hardware design with respect to such system parameters as cannot be varied realistically or easily in the actual hardware. Parameters of the static/dynamic Coulomb friction fall in this category.

Miniature Exoplanet Radial Velocity Array (MINERVA) I. Design, Commissioning, and First Science Results

NASA Astrophysics Data System (ADS)

Swift, Jonathan J.; Bottom, Michael; Johnson, John A.; Wright, Jason T.; McCrady, Nate; Wittenmyer, Robert A.; Plavchan, Peter; Riddle, Reed; Muirhead, Philip S.; Herzig, Erich; Myles, Justin; Blake, Cullen H.; Eastman, Jason; Beatty, Thomas G.; Barnes, Stuart I.; Gibson, Steven R.; Lin, Brian; Zhao, Ming; Gardner, Paul; Falco, Emilio; Criswell, Stephen; Nava, Chantanelle; Robinson, Connor; Sliski, David H.; Hedrick, Richard; Ivarsen, Kevin; Hjelstrom, Annie; de Vera, Jon; Szentgyorgyi, Andrew

2015-04-01

The Miniature Exoplanet Radial Velocity Array (MINERVA) is a U.S.-based observational facility dedicated to the discovery and characterization of exoplanets around a nearby sample of bright stars. MINERVA employs a robotic array of four 0.7-m telescopes outfitted for both high-resolution spectroscopy and photometry, and is designed for completely autonomous operation. The primary science program is a dedicated radial velocity survey and the secondary science objective is to obtain high-precision transit light curves. The modular design of the facility and the flexibility of our hardware allows for both science programs to be pursued simultaneously, while the robotic control software provides a robust and efficient means to carry out nightly observations. We describe the design of MINERVA, including major hardware components, software, and science goals. The telescopes and photometry cameras are characterized at our test facility on the Caltech campus in Pasadena, California, and their on-sky performance is validated. The design and simulated performance of the spectrograph is briefly discussed as we await its completion. New observations from our test facility demonstrate sub-mmag photometric precision of one of our radial velocity survey targets, and we present new transit observations and fits of WASP-52b-a known hot-Jupiter with an inflated radius and misaligned orbit. The process of relocating the MINERVA hardware to its final destination at the Fred Lawrence Whipple Observatory in southern Arizona has begun, and science operations are expected to commence in 2015.

Hardware acceleration and verification of systems designed with hardware description languages (HDL)

NASA Astrophysics Data System (ADS)

Wisniewski, Remigiusz; Wegrzyn, Marek

2005-02-01

Hardware description languages (HDLs) allow creating bigger and bigger designs nowadays. The size of prototyped systems very often exceeds million gates. Therefore verification process of the designs takes several hours or even days. The solution for this problem can be solved by hardware acceleration of simulation.

Modular neural networks: a survey.

PubMed

Auda, G; Kamel, M

1999-04-01

Modular Neural Networks (MNNs) is a rapidly growing field in artificial Neural Networks (NNs) research. This paper surveys the different motivations for creating MNNs: biological, psychological, hardware, and computational. Then, the general stages of MNN design are outlined and surveyed as well, viz., task decomposition techniques, learning schemes and multi-module decision-making strategies. Advantages and disadvantages of the surveyed methods are pointed out, and an assessment with respect to practical potential is provided. Finally, some general recommendations for future designs are presented.

Case study: Lockheed-Georgia Company integrated design process

NASA Technical Reports Server (NTRS)

Waldrop, C. T.

1980-01-01

A case study of the development of an Integrated Design Process is presented. The approach taken in preparing for the development of an integrated design process includes some of the IPAD approaches such as developing a Design Process Model, cataloging Technical Program Elements (TPE's), and examining data characteristics and interfaces between contiguous TPE's. The implementation plan is based on an incremental development of capabilities over a period of time with each step directed toward, and consistent with, the final architecture of a total integrated system. Because of time schedules and different computer hardware, this system will not be the same as the final IPAD release; however, many IPAD concepts will no doubt prove applicable as the best approach. Full advantage will be taken of the IPAD development experience. A scenario that could be typical for many companies, even outside the aerospace industry, in developing an integrated design process for an IPAD-type environment is represented.

J-2X Gas Generator Development Testing at NASA Marshall Space Flight Center

NASA Technical Reports Server (NTRS)

Reynolds, D. C.; Hormonzian, Carlo

2010-01-01

NASA is developing a liquid oxygen/liquid hydrogen rocket engine for upper stage and trans-lunar applications of the Ares vehicles for the Constellation program. This engine, designated the J-2X, is a higher pressure, higher thrust variant of the Apollo-era J-2 engine. Development was contracted to Pratt & Whitney Rocketdyne in 2006. Over the past several years, two phases of testing have been completed on the development of the gas generator for the J-2X engine. The hardware has progressed through a variety of workhorse injector, chamber, and feed system configurations. Several of these configurations have resulted in combustion instability of the gas generator assembly. Development of the final configuration of workhorse hardware (which will ultimately be used to verify critical requirements on a component level) has required a balance between changes in the injector and chamber hardware in order to successfully mitigate the combustion instability without sacrificing other engine system requirements. This paper provides an overview of the two completed test series, performed at NASA s Marshall Space Flight Center. The requirements, facility setup, hardware configurations, and test series progression are detailed. Significant levels of analysis have been performed in order to provide design solutions to mitigate the combustion stability issues, and these are briefly covered. Also discussed are the results of analyses related to either anomalous readings or off-nominal testing throughout the two test series.

Experiences with Extra-Vehicular Activities in Response to Critical ISS Contingencies

NASA Technical Reports Server (NTRS)

Van Cise, E. A.; Kelly, B. J.; Radigan, J. P.; Cranmer, C. W.

2016-01-01

The maturation of the International Space Station (ISS) design from the proposed Space Station Freedom to today's current implementation resulted in external hardware redundancy vulnerabilities in the final design. Failure to compensate for or respond to these vulnerabilities could put the ISS in a posture to where it could no longer function as a habitable space station. In the first years of ISS assembly, these responses were to largely be addressed by the continued resupply and Extra-Vehicular Activity (EVA) capabilities of the Space Shuttle. Even prior to the decision to retire the Space Shuttle, it was realized that ISS needed to have its own capability to be able to rapidly repair or replace external hardware without needing to wait for the next cargo resupply mission. As documented in a previous publicatoin5, in 2006 development was started to baseline Extra- Vehicular Activity (EVA, or spacewalk) procedures to replace hardware components whose failure would expose some of the ISS vulnerabilities should a second failure occur. This development work laid the groundwork for the onboard crews and the ground operations and engineering teams to be ready to replace any of this failed hardware. In 2010, this development work was put to the test when one of these pieces of hardware failed. This paper will provide a brief summary of the planning and processes established in the original Contingency EVA development phase. It will then review how those plans and processes were implemented in 2010, highlighting what went well as well as where there were deficiencies between theory and reality. This paper will show that the original approach and analyses, though sound, were not as thorough as they should have been in the realm of planning for next worse failures, for documenting Programmatic approval of key assumptions, and not pursuing sufficient engineering analysis prior to the failure of the hardware. The paper will further highlight the changes made to the Contingency EVA preparation team structure, approach, goals, and the resources allocated to its work after the 2010 events. Finally, the authors will overview the implementation of these updates in addressing failures onboard the ISS in 2012, 2013, and 2014. The successful use of the updated approaches, and the application of the approaches to other spacewalks, will demonstrate the effectiveness of this additional work and make a case for putting significant time and resources into pre-failure planning and analysis for critical hardware items on human-tended spacecraft.

Experiences with Extra-Vehicular Activities in Response to Critical ISS Contingencies

NASA Technical Reports Server (NTRS)

Van Cise, E. A.; Kelly, B. J.; Radigan, J. P.; Cranmer, C. W.

2016-01-01

The maturation of the International Space Station (ISS) design from the proposed Space Station Freedom to today's current implementation resulted in external hardware redundancy vulnerabilities in the final design. Failure to compensate for or respond to these vulnerabilities could put the ISS in a posture where it could no longer function as a habitable space station. In the first years of ISS assembly, these responses were to largely be addressed by the continued resupply and Extra-Vehicular Activity (EVA) capabilities of the Space Shuttle. Even prior to the decision to retire the Space Shuttle, it was realized that ISS needed to have its own capability to be able to rapidly repair or replace external hardware without needing to wait for the next cargo resupply mission. As documented in a previous publication, in 2006 development was started to baseline Extra-Vehicular Activity (EVA, or spacewalk) procedures to replace hardware components whose failure would expose some of the ISS vulnerabilities should a second failure occur. This development work laid the groundwork for the onboard crews and the ground operations and engineering teams to be ready to replace any of this failed hardware. In 2010, this development work was put to the test when one of these pieces of hardware failed. This paper will provide a brief summary of the planning and processes established in the original Contingency EVA development phase. It will then review how those plans and processes were implemented in 2010, highlighting what went well as well as where there were deficiencies between theory and reality. This paper will show that the original approach and analyses, though sound, were not as thorough as they should have been in the realm of planning for next worse failures, for documenting Programmatic approval of key assumptions, and not pursuing sufficient engineering analysis prior to the failure of the hardware. The paper will further highlight the changes made to the Contingency EVA preparation team structure, approach, goals, and the resources allocated to its work after the 2010 events. Finally, the authors will overview the implementation of these updates in addressing failures onboard the ISS in 2012, 2013, and 2014. The successful use of the updated approaches, and the application of the approaches to other spacewalks, will demonstrate the effectiveness of this additional work and make a case for putting significant time and resources into pre-failure planning and analysis for critical hardware items on human-tended spacecraft.

A CLIPS based personal computer hardware diagnostic system

NASA Technical Reports Server (NTRS)

Whitson, George M.

1991-01-01

Often the person designated to repair personal computers has little or no knowledge of how to repair a computer. Described here is a simple expert system to aid these inexperienced repair people. The first component of the system leads the repair person through a number of simple system checks such as making sure that all cables are tight and that the dip switches are set correctly. The second component of the system assists the repair person in evaluating error codes generated by the computer. The final component of the system applies a large knowledge base to attempt to identify the component of the personal computer that is malfunctioning. We have implemented and tested our design with a full system to diagnose problems for an IBM compatible system based on the 8088 chip. In our tests, the inexperienced repair people found the system very useful in diagnosing hardware problems.

DDL:Digital systems design language

NASA Technical Reports Server (NTRS)

Shival, S. G.

1980-01-01

Hardware description languages are valuable tools in such applications as hardware design, system documentation, and logic design training. DDL is convenient medium for inputting design details into hardware-design automation system. It is suitable for describing digital systems at gate, register transfer, and major combinational block level.

A Framework for Assessing the Reusability of Hardware (Reusable Rocket Engines)

NASA Technical Reports Server (NTRS)

Childress-Thompson, Rhonda; Farrington, Philip; Thomas, Dale

2016-01-01

Within the space flight community, reusability has taken center stage as the new buzzword. In order for reusable hardware to be competitive with its expendable counterpart, two major elements must be closely scrutinized. First, recovery and refurbishment costs must be lower than the development and acquisition costs. Additionally, the reliability for reused hardware must remain the same (or nearly the same) as "first use" hardware. Therefore, it is imperative that a systematic approach be established to enhance the development of reusable systems. However, before the decision can be made on whether it is more beneficial to reuse hardware or to replace it, the parameters that are needed to deem hardware worthy of reuse must be identified. For reusable hardware to be successful, the factors that must be considered are reliability (integrity, life, number of uses), operability (maintenance, accessibility), and cost (procurement, retrieval, refurbishment). These three factors are essential to the successful implementation of reusability while enabling the ability to meet performance goals. Past and present strategies and attempts at reuse within the space industry will be examined to identify important attributes of reusability that can be used to evaluate hardware when contemplating reusable versus expendable options. This paper will examine why reuse must be stated as an initial requirement rather than included as an afterthought in the final design. Late in the process, changes in the overall objective/purpose of components typically have adverse effects that potentially negate the benefits. A methodology for assessing the viability of reusing hardware will be presented by using the Space Shuttle Main Engine (SSME) to validate the approach. Because reliability, operability, and costs are key drivers in making this critical decision, they will be used to assess requirements for reuse as applied to components of the SSME.

Design and performance test of NIRS-based spinal cord lesion detector

NASA Astrophysics Data System (ADS)

Li, Nanxi; Li, Ting

2018-02-01

Spinal cord lesions can cause a series of severe complications, which can even lead to paralysis with high mortality. However, the traditional diagnosis of spinal cord lesion relies on complicated imaging modalities and other invasive and dangerous methods. Here, we have designed a small monitor based on NIRS technology for noninvasive monitoring for spinal cord lesions. The development of the instrument system includes the design of hardware circuits and the program of software. In terms of hardware, OPT1011 is selected as the light detector, and the appropriate probe distribution structure is selected according to the simulation result of Monte Carlo Simulation. At the same time, the powerful controller is selected as our system's central processing chip for the circuit design, and the data is transmitted by serial port to the host computer for post processing. Finally, we verify the stability and feasibility of the instrument system. It is found that the spinal signal could be obviously detected in the system, which indicates that our monitor based on NIRS technology has the potential to monitor the spinal lesion.

Design of a signal conditioner for the Fermilab Magnet Test Facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

Giannelli, Pietro

2012-01-01

This thesis describes the design of a remotely-programmable signal conditioner for the harmonic measurement of accelerator magnets. A 10-channel signal conditioning circuit featuring bucking capabilities was designed from scratch and implemented to the level of the printed circuit board layout. Other system components were chosen from those available on the market. Software design was started with the definition of routine procedures. This thesis is part of an upgrade project for replacing obsolescent automated test equipment belonging to the Fermilab Magnet Test Facility. The design started with a given set of requirements. Using a top-down approach, all the circuits were designedmore » and their expected performances were theoretically predicted and simulated. A limited prototyping phase followed. The printed circuit boards were laid out and routed using a CAD software and focusing the design on maximum electromagnetic interference immunity. An embedded board was selected for controlling and interfacing the signal conditioning circuitry with the instrumentation network. Basic low level routines for hardware access were defined. This work covered the entire design process of the signal conditioner, resulting in a project ready for manufacturing. The expected performances are in line with the requirements and, in the cases where this was not possible, approval of trade-offs was sought and received from the end users. Part I deals with the global structure of the signal conditioner and the subdivision in functional macro-blocks. Part II treats the hardware design phase in detail, covering the analog and digital circuits, the printed circuit layouts, the embedded controller and the power supply selection. Part III deals with the basic hardware-related routines to be implemented in the final software.« less

Multiple video sequences synchronization during minimally invasive surgery

NASA Astrophysics Data System (ADS)

Belhaoua, Abdelkrim; Moreau, Johan; Krebs, Alexandre; Waechter, Julien; Radoux, Jean-Pierre; Marescaux, Jacques

2016-03-01

Hybrid operating rooms are an important development in the medical ecosystem. They allow integrating, in the same procedure, the advantages of radiological imaging and surgical tools. However, one of the challenges faced by clinical engineers is to support the connectivity and interoperability of medical-electrical point-of-care devices. A system that could enable plug-and-play connectivity and interoperability for medical devices would improve patient safety, save hospitals time and money, and provide data for electronic medical records. In this paper, we propose a hardware platform dedicated to collect and synchronize multiple videos captured from medical equipment in real-time. The final objective is to integrate augmented reality technology into an operation room (OR) in order to assist the surgeon during a minimally invasive operation. To the best of our knowledge, there is no prior work dealing with hardware based video synchronization for augmented reality applications on OR. Whilst hardware synchronization methods can embed temporal value, so called timestamp, into each sequence on-the-y and require no post-processing, they require specialized hardware. However the design of our hardware is simple and generic. This approach was adopted and implemented in this work and its performance is evaluated by comparison to the start-of-the-art methods.

A hardware implementation of the discrete Pascal transform for image processing

NASA Astrophysics Data System (ADS)

Goodman, Thomas J.; Aburdene, Maurice F.

2006-02-01

The discrete Pascal transform is a polynomial transform with applications in pattern recognition, digital filtering, and digital image processing. It already has been shown that the Pascal transform matrix can be decomposed into a product of binary matrices. Such a factorization leads to a fast and efficient hardware implementation without the use of multipliers, which consume large amounts of hardware. We recently developed a field-programmable gate array (FPGA) implementation to compute the Pascal transform. Our goal was to demonstrate the computational efficiency of the transform while keeping hardware requirements at a minimum. Images are uploaded into memory from a remote computer prior to processing, and the transform coefficients can be offloaded from the FPGA board for analysis. Design techniques like as-soon-as-possible scheduling and adder sharing allowed us to develop a fast and efficient system. An eight-point, one-dimensional transform completes in 13 clock cycles and requires only four adders. An 8x8 two-dimensional transform completes in 240 cycles and requires only a top-level controller in addition to the one-dimensional transform hardware. Finally, through minor modifications to the controller, the transform operations can be pipelined to achieve 100% utilization of the four adders, allowing one eight-point transform to complete every seven clock cycles.

An Environmental for Hardware-in-the-Loop Formation Navigation and Control

NASA Technical Reports Server (NTRS)

Burns, Rich; Naasz, Bo; Gaylor, Dave; Higinbotham, John

2004-01-01

Recent interest in formation flying satellite systems has spurred a considerable amount of research in the relative navigation and control of satellites. Development in this area has included new estimation and control algorithms as well as sensor and actuator development specifically geared toward the relative control problem. This paper describes a simulation facility, the Formation Flying Test Bed (FFTB) at NASA Goddard Space Flight Center, which allows engineers to test new algorithms for the formation flying problem with relevant GN&C hardware in a closed loop simulation. The FFTB currently supports the inclusion of GPS receiver hardware in the simulation loop. Support for satellite crosslink ranging technology is at a prototype stage. This closed-loop, hardware inclusive simulation capability permits testing of navigation and control software in the presence of the actual hardware with which the algorithms must interact. This capability provides the navigation or control developer with a perspective on how the algorithms perform as part of the closed-loop system. In this paper, the overall design and evolution of the FFTB are presented. Each component of the FFTB is then described. Interfaces between the components of the FFTB are shown and the interfaces to and between navigation and control software are described. Finally, an example of closed-loop formation control with GPS receivers in the loop is presented.

Life sciences payload definition and integration study. Volume 3: Preliminary equipment item specification catalog for the carry-on laboratories. [for Spacelab

NASA Technical Reports Server (NTRS)

1974-01-01

All general purpose equipment items contained in the final carry-on laboratory (COL) design concepts are described in terms of specific requirements identified for COL use, hardware status, and technical parameters such as weight, volume, power, range, and precision. Estimated costs for each item are given, along with projected development times.

Phased-array-fed antenna configuration study, volume 2

NASA Technical Reports Server (NTRS)

Sorbello, R. M.; Zaghloul, A. I.; Lee, B. S.; Siddiqi, S.; Geller, B. D.

1983-01-01

Increased capacity in future satellite systems can be achieved through antenna systems which provide multiplicity of frequency reuses at K sub a band. A number of antenna configurations which can provide multiple fixed spot beams and multiple independent spot scanning beams at 20 GHz are addressed. Each design incorporates a phased array with distributed MMIC amplifiers and phasesifters feeding a two reflector optical system. The tradeoffs required for the design of these systems and the corresponding performances are presented. Five final designs are studied. In so doing, a type of MMIC/waveguide transition is described, and measured results of the breadboard model are presented. Other hardware components developed are described. This includes a square orthomode transducer, a subarray fed with a beamforming network to measure scanning performance, and another subarray used to study mutual coupling considerations. Discussions of the advantages and disadvantages of the final design are included.

Guidance, navigation, and control subsystem for the EOS-AM spacecraft

NASA Technical Reports Server (NTRS)

Linder, David M.; Tolek, Joseph T.; Lombardo, John

1992-01-01

This paper presents the preliminary design of the Guidance, Navigation, and Control (GN&C) subsystem for the EOS-AM spacecraft and specifically focuses on the GN&C Normal Mode design. First, a brief description of the EOS-AM science mission, instruments, and system-level spacecraft design is provided. Next, an overview of the GN&C subsystem functional and performance requirements, hardware, and operating modes is presented. Then, the GN&C Normal Mode attitude determination, attitude control, and navigation systems are detailed. Finally, descriptions of the spacecraft's overall jitter performance and Safe Mode are provided.

Open-source hardware for medical devices

PubMed Central

2016-01-01

Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device. PMID:27158528

Open-source hardware for medical devices.

PubMed

Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

2016-04-01

Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

Process and assembly plans for low cost commercial fuselage structure

NASA Technical Reports Server (NTRS)

Willden, Kurtis; Metschan, Stephen; Starkey, Val

1991-01-01

Cost and weight reduction for a composite structure is a result of selecting design concepts that can be built using efficient low cost manufacturing and assembly processes. Since design and manufacturing are inherently cost dependent, concurrent engineering in the form of a Design-Build Team (DBT) is essential for low cost designs. Detailed cost analysis from DBT designs and hardware verification must be performed to identify the cost drivers and relationships between design and manufacturing processes. Results from the global evaluation are used to quantitatively rank design, identify cost centers for higher ranking design concepts, define and prioritize a list of technical/economic issues and barriers, and identify parameters that control concept response. These results are then used for final design optimization.

Reactor Operations Monitoring System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hart, M.M.

1989-01-01

The Reactor Operations Monitoring System (ROMS) is a VME based, parallel processor data acquisition and safety action system designed by the Equipment Engineering Section and Reactor Engineering Department of the Savannah River Site. The ROMS will be analyzing over 8 million signal samples per minute. Sixty-eight microprocessors are used in the ROMS in order to achieve a real-time data analysis. The ROMS is composed of multiple computer subsystems. Four redundant computer subsystems monitor 600 temperatures with 2400 thermocouples. Two computer subsystems share the monitoring of 600 reactor coolant flows. Additional computer subsystems are dedicated to monitoring 400 signals from assortedmore » process sensors. Data from these computer subsystems are transferred to two redundant process display computer subsystems which present process information to reactor operators and to reactor control computers. The ROMS is also designed to carry out safety functions based on its analysis of process data. The safety functions include initiating a reactor scram (shutdown), the injection of neutron poison, and the loadshed of selected equipment. A complete development Reactor Operations Monitoring System has been built. It is located in the Program Development Center at the Savannah River Site and is currently being used by the Reactor Engineering Department in software development. The Equipment Engineering Section is designing and fabricating the process interface hardware. Upon proof of hardware and design concept, orders will be placed for the final five systems located in the three reactor areas, the reactor training simulator, and the hardware maintenance center.« less

Essential SpaceWire Hardware Capabilities for a Robust Network

NASA Technical Reports Server (NTRS)

Birmingham, Michael; Krimchansky, Alexander; Anderson, William; Lombardi, Matthew

2016-01-01

The Geostationary Operational Environmental Satellite R-Series Program (GOES-R) mission is a joint program between National Oceanic & Atmospheric Administration (NOAA) and National Aeronautics & Space Administration (NASA) Goddard Space Flight Center (GSFC). GOES-R project selected SpaceWire as the best solution to satisfy the desire for simple and flexible instrument to spacecraft command and telemetry communications. GOES-R development and integration is complete and the observatory is scheduled for launch October 2016. The spacecraft design was required to support redundant SpaceWire links for each instrument side, as well as to route the fewest number of connections through a Slip Ring Assembly necessary to support Solar pointing instruments. The final design utilized two different router designs. The SpaceWire standard alone does not ensure the most practical or reliable network. On GOES-R a few key hardware capabilities were identified that merit serious consideration for future designs. Primarily these capabilities address persistent port stalls and the prevention of receive buffer overflows. Workarounds were necessary to overcome shortcomings that could be avoided in future designs if they utilize the capabilities, discussed in this paper, above and beyond the requirements of the SpaceWire standard.

A Nonlinear Digital Control Solution for a DC/DC Power Converter

NASA Technical Reports Server (NTRS)

Zhu, Minshao

2002-01-01

A digital Nonlinear Proportional-Integral-Derivative (NPID) control algorithm was proposed to control a 1-kW, PWM, DC/DC, switching power converter. The NPID methodology is introduced and a practical hardware control solution is obtained. The design of the controller was completed using Matlab (trademark) Simulink, while the hardware-in-the-loop testing was performed using both the dSPACE (trademark) rapid prototyping system, and a stand-alone Texas Instruments (trademark) Digital Signal Processor (DSP)-based system. The final Nonlinear digital control algorithm was implemented and tested using the ED408043-1 Westinghouse DC-DC switching power converter. The NPID test results are discussed and compared to the results of a standard Proportional-Integral (PI) controller.

The signal extraction of fetal heart rate based on wavelet transform and BP neural network

NASA Astrophysics Data System (ADS)

Yang, Xiao Hong; Zhang, Bang-Cheng; Fu, Hu Dai

2005-04-01

This paper briefly introduces the collection and recognition of bio-medical signals, designs the method to collect FM signals. A detailed discussion on the system hardware, structure and functions is also given. Under LabWindows/CVI,the hardware and the driver do compatible, the hardware equipment work properly actively. The paper adopts multi threading technology for real-time analysis and makes use of latency time of CPU effectively, expedites program reflect speed, improves the program to perform efficiency. One threading is collecting data; the other threading is analyzing data. Using the method, it is broaden to analyze the signal in real-time. Wavelet transform to remove the main interference in the FM and by adding time-window to recognize with BP network; Finally the results of collecting signals and BP networks are discussed. 8 pregnant women's signals of FM were collected successfully by using the sensor. The correctness rate of BP network recognition is about 83.3% by using the above measure.

Unpressurized Logistics Carriers for the International Space Station: Lessons Learned

NASA Technical Reports Server (NTRS)

Robbins, William W., Jr.

1999-01-01

The International Space Station has been in development since 1984, and has recently begun on orbit assembly. Most of the hardware for the Space Station has been manufactured and the rest is well along in design. The major sets of hardware that are still to be developed for Space Station are the pallets and interfacing hardware for resupply of unpressurized spares and scientific payloads. Over the last ten years, there have been numerous starts, stops, difficulties and challenges encountered in this effort. The Space Station program is now entering the beginning of orbital operations. The Program is only now addressing plans to design and build the carriers that will be needed to carry the unpressurized cargo for the Space Station lifetime. Unpressurized carrier development has been stalled due to a broad range of problems that occurred over the years. These problems were not in any single area, but encompassed budgetary, programmatic, and technical difficulties. Some lessons of hindsight can be applied to developing carriers for the Space Station. Space Station teams are now attempting to incorporate the knowledge gained into the current development efforts for external carriers. In some cases, the impacts of these lessons are unrecoverable for Space Station, but can and should be applied to future programs. This paper examines the progress and problems to date with unpressurized carrier development identifies the lessons to be learned, and charts the course for finally accomplishing the delivery of these critical hardware sets.

Qualification of Engineering Camera for Long-Duration Deep Space Missions

NASA Technical Reports Server (NTRS)

Ramesham, Rajeshuni; Maki, Justin N.; Pourangi, Ali M.; Lee, Steven W.

2012-01-01

Qualification and verification of advanced electronic packaging and interconnect technologies, and various other types of hardware elements for the Mars Exploration Rover s Spirit and Opportunity (MER)/Mars Science Laboratory (MSL) flight projects, has been performed to enhance the mission assurance. The qualification of hardware (engineering camera) under extreme cold temperatures has been performed with reference to various Mars-related project requirements. The flight-like packages, sensors, and subassemblies have been selected for the study to survive three times the total number of expected diurnal temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware, including all relevant manufacturing, ground operations, and mission phases. Qualification has been performed by subjecting above flight-like hardware to the environmental temperature extremes, and assessing any structural failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Engineering camera packaging designs, charge-coupled devices (CCDs), and temperature sensors were successfully qualified for MER and MSL per JPL design principles. Package failures were observed during qualification processes and the package redesigns were then made to enhance the reliability and subsequent mission assurance. These results show the technology certainly is promising for MSL, and especially for longterm extreme temperature missions to the extreme temperature conditions. The engineering camera has been completely qualified for the MSL project, with the proven ability to survive on Mars for 2010 sols, or 670 sols times three. Finally, the camera continued to be functional, even after 2010 thermal cycles.

A study of universal modulation techniques applied to satellite data collection

NASA Technical Reports Server (NTRS)

1980-01-01

A universal modulation and frequency control system for use with data collection platform (DCP) transmitters is examined. The final design discussed can, under software/firmwave control, generate all of the specific digital data modulation formats currently used in the NASA satellite data collection service and can simultaneously synthesize the proper RF carrier frequencies employed. A novel technique for DCP time and frequency control is presented. The emissions of NBS radio station WWV/WWVH are received, detected, and finally decoded in microcomputer software to generate a highly accurate time base for the platform; with the assistance of external hardware, the microcomputer also directs the recalibration of all DCP oscillators to achieve very high frequency accuracies and low drift rates versus temperature, supply voltage, and time. The final programmable DCP design also employs direct microcomputer control of data reduction, formatting, transmitter switching, and system power management.

Final design and fabrication of an active control system for flutter suppression on a supercritical aeroelastic research wing

NASA Technical Reports Server (NTRS)

Hodges, G. E.; Mcgehee, C. R.

1981-01-01

The final design and hardware fabrication was completed for an active control system capable of the required flutter suppression, compatible with and ready for installation in the NASA aeroelastic research wing number 1 (ARW-1) on Firebee II drone flight test vehicle. The flutter suppression system uses vertical acceleration at win buttock line 1.930 (76), with fuselage vertical and roll accelerations subtracted out, to drive wing outboard aileron control surfaces through appropriate symmetric and antisymmetric shaping filters. The goal of providing an increase of 20 percent above the unaugmented vehicle flutter velocity but below the maximum operating condition at Mach 0.98 is exceeded by the final flutter suppression system. Results indicate that the flutter suppression system mechanical and electronic components are ready for installation on the DAST ARW-1 wing and BQM-34E/F drone fuselage.

Space biology initiative program definition review. Trade study 4: Design modularity and commonality

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Herbert, Frank J.; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

1989-01-01

The relative cost impacts (up or down) of developing Space Biology hardware using design modularity and commonality is studied. Recommendations for how the hardware development should be accomplished to meet optimum design modularity requirements for Life Science investigation hardware will be provided. In addition, the relative cost impacts of implementing commonality of hardware for all Space Biology hardware are defined. Cost analysis and supporting recommendations for levels of modularity and commonality are presented. A mathematical or statistical cost analysis method with the capability to support development of production design modularity and commonality impacts to parametric cost analysis is provided.

Space Shuttle Abort Evolution

NASA Technical Reports Server (NTRS)

Henderson, Edward M.; Nguyen, Tri X.

2011-01-01

This paper documents some of the evolutionary steps in developing a rigorous Space Shuttle launch abort capability. The paper addresses the abort strategy during the design and development and how it evolved during Shuttle flight operations. The Space Shuttle Program made numerous adjustments in both the flight hardware and software as the knowledge of the actual flight environment grew. When failures occurred, corrections and improvements were made to avoid a reoccurrence and to provide added capability for crew survival. Finally some lessons learned are summarized for future human launch vehicle designers to consider.

RASSP Final Technical Report.

DTIC Science & Technology

1992-10-21

Virtual Prototyping Support 5-27 5.3.6.3 Hardware/Software Co-design Support 5-27 5.3.6.4 Mixed Analog/Digital Design Support 5-28 5.3.6.5 VHDL Modeling...0.6 0.3 50 1 1 1 73.2 23.4 19.6" 84 "kIuded $11.M p•rmhed undwe contr" "kh"ded SUM pcsed undr c SDollm Include purchae of poducts , malntenmce, ard...year on utilization of standards and COTS technology however does result in an achievable system performance which is less that what would be

Hardware design for the Autonomous Visibility Monitoring (AVM) observatory

NASA Technical Reports Server (NTRS)

Cowles, K.

1993-01-01

The hardware for the three Autonomous Visibility Monitoring (AVM) observatories was redesigned. Changes in hardware design include electronics components, weather sensors, and the telescope drive system. Operation of the new hardware is discussed, as well as some of its features. The redesign will allow reliable automated operation.

History and Benefits of Engine Level Testing Throughout the Space Shuttle Main Engine Program

NASA Technical Reports Server (NTRS)

VanHooser, Katherine; Kan, Kenneth; Maddux, Lewis; Runkle, Everett

2010-01-01

Rocket engine testing is important throughout a program s life and is essential to the overall success of the program. Space Shuttle Main Engine (SSME) testing can be divided into three phases: development, certification, and operational. Development tests are conducted on the basic design and are used to develop safe start and shutdown transients and to demonstrate mainstage operation. This phase helps form the foundation of the program, demands navigation of a very steep learning curve, and yields results that shape the final engine design. Certification testing involves multiple engine samples and more aggressive test profiles that explore the boundaries of the engine to vehicle interface requirements. The hardware being tested may have evolved slightly from that in the development phase. Operational testing is conducted with mature hardware and includes acceptance testing of flight assets, resolving anomalies that occur in flight, continuing to expand the performance envelope, and implementing design upgrades. This paper will examine these phases of testing and their importance to the SSME program. Examples of tests conducted in each phase will also be presented.

Newman Unit 1 advanced solar repowering advanced conceptual design. Final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

1982-04-01

The Newman Unit 1 solar repowering design is a water/steam central receiver concept supplying superheated steam. The work reported is to develop a refined baseline conceptual design that has potential for construction and operation by 1986, makes use of existing solar thermal technology, and provides the best economics for this application. Trade studies performed in the design effort are described, both for the conceptual design of the overall system and for the subsystem conceptual design. System-level functional requirements, design, operation, performance, cost, safety, environmental, institutional, and regulatory considerations are described. Subsystems described include the collector, receiver, fossil energy, electrical powermore » generating, and master control subsystems, site and site facilities. The conceptual design, cost, and performance of each subsystem is discussed at length. A detailed economic analysis of the repowered unit is made to realistically assess the economics of the first repowered unit using present cost data for a limited production level for solar hardware. Finally, a development plan is given, including the design, procurement, construction, checkout, startup, performance validation, and commercial operation. (LEW)« less

Parameterized hardware description as object oriented hardware model implementation

NASA Astrophysics Data System (ADS)

Drabik, Pawel K.

2010-09-01

The paper introduces novel model for design, visualization and management of complex, highly adaptive hardware systems. The model settles component oriented environment for both hardware modules and software application. It is developed on parameterized hardware description research. Establishment of stable link between hardware and software, as a purpose of designed and realized work, is presented. Novel programming framework model for the environment, named Graphic-Functional-Components is presented. The purpose of the paper is to present object oriented hardware modeling with mentioned features. Possible model implementation in FPGA chips and its management by object oriented software in Java is described.

Orion Orbit Control Design and Analysis

NASA Technical Reports Server (NTRS)

Jackson, Mark; Gonzalez, Rodolfo; Sims, Christopher

2007-01-01

The analysis of candidate thruster configurations for the Crew Exploration Vehicle (CEV) is presented. Six candidate configurations were considered for the prime contractor baseline design. The analysis included analytical assessments of control authority, control precision, efficiency and robustness, as well as simulation assessments of control performance. The principles used in the analytic assessments of controllability, robustness and fuel performance are covered and results provided for the configurations assessed. Simulation analysis was conducted using a pulse width modulated, 6 DOF reaction system control law with a simplex-based thruster selection algorithm. Control laws were automatically derived from hardware configuration parameters including thruster locations, directions, magnitude and specific impulse, as well as vehicle mass properties. This parameterized controller allowed rapid assessment of multiple candidate layouts. Simulation results are presented for final phase rendezvous and docking, as well as low lunar orbit attitude hold. Finally, on-going analysis to consider alternate Service Module designs and to assess the pilot-ability of the baseline design are discussed to provide a status of orbit control design work to date.

New Ways Of Doing Business (NWODB) cost quantification analysis

NASA Technical Reports Server (NTRS)

Hamaker, Joseph W.; Rosmait, Russell L.

1992-01-01

The cost of designing, producing, and operating typical aerospace flight hardware is necessarily more expensive than most other human endeavors. Because of the more stringent environment of space, hardware designed to operate there will probably always be more expensive than similar hardware which is designed for less taxing environments. It is the thesis of this study that there are very significant improvements that can be made in the cost of aerospace flight hardware.

Final postflight hardware evaluation report RSRM-28 (STS-53)

NASA Technical Reports Server (NTRS)

Starrett, William David, Jr.

1993-01-01

The final report for the Clearfield disassembly evaluation and a continuation of the KSC postflight assessment for the RSRM-28 (STS-53) RSRM flight set is presented. All observed hardware conditions were documented on PFOR's and are included in Appendices A through C. Appendices D and E contain the measurements and safety factor data for the nozzle and insulation components. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report (TWR-64215), represents a summary of the RSRM-28 hardware evaluation. The as-flown hardware configuration is documented in TWR-63638. Disassembly evaluation photograph numbers are logged in TWA-1989. The RSRM-28 flight set disassembly evaluations described were performed at the RSRM Refurbishment Facility in Clearfield, Utah. The final factory joint demate occurred on July 15, 1993. Additional time was required to perform the evaluation of the stiffener rings per special issue 4.1.5.2 because of the washout schedule. The release of this report was after completion of all special issues per program management direction. Detailed evaluations were performed in accordance with the Clearfield PEEP, TWR-50051, Revision A. All observations were compared against limits that are also defined in the PEEP. These limits outline the criteria for categorizing the observations as acceptable, reportable, or critical. Hardware conditions that were unexpected and/or determined to be reportable or critical were evaluated by the applicable team and tracked through the PFAR system.

Hardware description languages

NASA Technical Reports Server (NTRS)

Tucker, Jerry H.

1994-01-01

Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

Space Station Freedom biomedical monitoring and countermeasures: Biomedical facility hardware catalog

NASA Technical Reports Server (NTRS)

1990-01-01

This hardware catalog covers that hardware proposed under the Biomedical Monitoring and Countermeasures Development Program supported by the Johnson Space Center. The hardware items are listed separately by item, and are in alphabetical order. Each hardware item specification consists of four pages. The first page describes background information with an illustration, definition and a history/design status. The second page identifies the general specifications, performance, rack interface requirements, problems, issues, concerns, physical description, and functional description. The level of hardware design reliability is also identified under the maintainability and reliability category. The third page specifies the mechanical design guidelines and assumptions. Described are the material types and weights, modules, and construction methods. Also described is an estimation of percentage of construction which utilizes a particular method, and the percentage of required new mechanical design is documented. The fourth page analyzes the electronics, the scope of design effort, and the software requirements. Electronics are described by percentages of component types and new design. The design effort, as well as, the software requirements are identified and categorized.

Development of a hardware-based AC microgrid for AC stability assessment

NASA Astrophysics Data System (ADS)

Swanson, Robert R.

As more power electronic-based devices enable the development of high-bandwidth AC microgrids, the topic of microgrid power distribution stability has become of increased interest. Recently, researchers have proposed a relatively straightforward method to assess the stability of AC systems based upon the time-constants of sources, the net bus capacitance, and the rate limits of sources. In this research, a focus has been to develop a hardware test system to evaluate AC system stability. As a first step, a time domain model of a two converter microgrid was established in which a three phase inverter acts as a power source and an active rectifier serves as an adjustable constant power AC load. The constant power load can be utilized to create rapid power flow transients to the generating system. As a second step, the inverter and active rectifier were designed using a Smart Power Module IGBT for switching and an embedded microcontroller as a processor for algorithm implementation. The inverter and active rectifier were designed to operate simultaneously using a synchronization signal to ensure each respective local controller operates in a common reference frame. Finally, the physical system was created and initial testing performed to validate the hardware functionality as a variable amplitude and variable frequency AC system.

Modeling and Development of INS-Aided PLLs in a GNSS/INS Deeply-Coupled Hardware Prototype for Dynamic Applications

PubMed Central

Zhang, Tisheng; Niu, Xiaoji; Ban, Yalong; Zhang, Hongping; Shi, Chuang; Liu, Jingnan

2015-01-01

A GNSS/INS deeply-coupled system can improve the satellite signals tracking performance by INS aiding tracking loops under dynamics. However, there was no literature available on the complete modeling of the INS branch in the INS-aided tracking loop, which caused the lack of a theoretical tool to guide the selections of inertial sensors, parameter optimization and quantitative analysis of INS-aided PLLs. This paper makes an effort on the INS branch in modeling and parameter optimization of phase-locked loops (PLLs) based on the scalar-based GNSS/INS deeply-coupled system. It establishes the transfer function between all known error sources and the PLL tracking error, which can be used to quantitatively evaluate the candidate inertial measurement unit (IMU) affecting the carrier phase tracking error. Based on that, a steady-state error model is proposed to design INS-aided PLLs and to analyze their tracking performance. Based on the modeling and error analysis, an integrated deeply-coupled hardware prototype is developed, with the optimization of the aiding information. Finally, the performance of the INS-aided PLLs designed based on the proposed steady-state error model is evaluated through the simulation and road tests of the hardware prototype. PMID:25569751

Test results and description of a 1-kW free-piston Stirling engine with a dashpot load

NASA Technical Reports Server (NTRS)

Schreiber, J.

1983-01-01

A 1 kW (1.33 hp) single cylinder free piston Stirling engine was installed in the test facilities at the Lewis laboratory. The engine was designed specifically for research of the dynamics of its operation. A more complete description of the engine and its instrumentation is provided in a prior NASA paper TM-82999 by J. G. Schreiber. Initial tests at Lewis showed the power level and efficiency of the engine to be below design level. Tests were performed to help determine the specific problems in the engine causing the below design level performance. Modifications to engine hardware and to the facility where performed in an effort to bring the power output and efficiency to their design values. As finally configured the engine generated more than 1250 watts of output power at an engine efficiency greater than 32 percent. This report presents the tests performed to help determine the specific problems, the results if the problem was eliminated, the fix performed to the hardware, and the test results after the engine was tested. In cases where the fix did not cause the anticipated effects, a possible explanation is given.

An Environment for Hardware-in-the-Loop Formation Navigation and Control Simulation

NASA Technical Reports Server (NTRS)

Burns, Rich

2004-01-01

Recent interest in formation flying satellite systems has spurred a considerable amount of research in the relative navigation and control of satellites. Development in this area has included new estimation and control algorithms as well as sensor and actuator development specifically geared toward the relative control problem. This paper describes a simulation facility, the Formation Flying Testbed (FFTB) at NASA's Goddard Space Flight Center, which allows engineers to test new algorithms for the formation flying problem with relevant GN&C hardware in a closed loop simulation. The FFTB currently supports the injection of GPS receiver hardware into the simulation loop, and support for satellite crosslink ranging technology is at a prototype stage. This closed-loop, hardware inclusive simulation capability permits testing of navigation and control software in the presence of the actual hardware with which the algorithms must interact. This capability provides the navigation or control developer with a perspective on how the algorithms perform as part of the closed-loop system. In this paper, the overall design and evolution of the FFTB are presented. Each component of the FFTB is then described in detail. Interfaces between the components of the FFTB are shown and the interfaces to and between navigation and control software are described in detail. Finally, an example of closed-loop formation control with GPS receivers in the loop is presented and results are analyzed.

Color postprocessing for 3-dimensional finite element mesh quality evaluation and evolving graphical workstation

NASA Technical Reports Server (NTRS)

Panthaki, Malcolm J.

1987-01-01

Three general tasks on general-purpose, interactive color graphics postprocessing for three-dimensional computational mechanics were accomplished. First, the existing program (POSTPRO3D) is ported to a high-resolution device. In the course of this transfer, numerous enhancements are implemented in the program. The performance of the hardware was evaluated from the point of view of engineering postprocessing, and the characteristics of future hardware were discussed. Second, interactive graphical tools implemented to facilitate qualitative mesh evaluation from a single analysis. The literature was surveyed and a bibliography compiled. Qualitative mesh sensors were examined, and the use of two-dimensional plots of unaveraged responses on the surface of three-dimensional continua was emphasized in an interactive color raster graphics environment. Finally, a postprocessing environment was designed for state-of-the-art workstation technology. Modularity, personalization of the environment, integration of the engineering design processes, and the development and use of high-level graphics tools are some of the features of the intended environment.

An electrostatic deceleration lens for highly charged ions.

PubMed

Rajput, J; Roy, A; Kanjilal, D; Ahuja, R; Safvan, C P

2010-04-01

The design and implementation of a purely electrostatic deceleration lens used to obtain beams of highly charged ions at very low energies is presented. The design of the lens is such that it can be used with parallel as well as diverging incoming beams and delivers a well focused low energy beam at the target. In addition, tuning of the final energy of the beam over a wide range (1 eV/q to several hundred eV/q, where q is the beam charge state) is possible without any change in hardware configuration. The deceleration lens was tested with Ar(8+), extracted from an electron cyclotron resonance ion source, having an initial energy of 30 keV/q and final energies as low as 70 eV/q have been achieved.

[Advances of portable electrocardiogram monitor design].

PubMed

Ding, Shenping; Wang, Yinghai; Wu, Weirong; Deng, Lingli; Lu, Jidong

2014-06-01

Portable electrocardiogram monitor is an important equipment in the clinical diagnosis of cardiovascular diseases due to its portable, real-time features. It has a broad application and development prospects in China. In the present review, previous researches on the portable electrocardiogram monitors have been arranged, analyzed and summarized. According to the characteristics of the electrocardiogram (ECG), this paper discusses the ergonomic design of the portable electrocardiogram monitor, including hardware and software. The circuit components and software modules were parsed from the ECG features and system functions. Finally, the development trend and reference are provided for the portable electrocardiogram monitors and for the subsequent research and product design.

Design and demonstration of an advanced data collection/position location system

NASA Technical Reports Server (NTRS)

1977-01-01

The final report on a breadboard evaluation and demonstration program is reported concerning the applicability of MSK modulation and chirp-z transformer technology in Advanced Data Collection/Position Location (ADC/PL) systems. The program effort consisted of three phases - design, testing, and evaluation. Section 2 describes the breadboard hardware built during the design phase of the program, Section 3 describes the tests conducted on the breadboard and the results of the tests, and Section 4 presents a brief analysis and summary of the findings of the breadboard tests and develops a sample ADC/PL system which incorporates both MSK modulation and a chirp-z transformer.

Topex Microwave Radiometer thermal control - Post-system-test modifications and on-orbit performance

NASA Technical Reports Server (NTRS)

Lin, Edward I.

1993-01-01

The Topex Microwave Radiometer has had an excellent thermal performance since launch. The instrument, however, went through a hardware modification right before launch to correct for a thermal design inadequacy that was uncovered during the spacecraft thermal vacuum test. This paper reports on how the initially obscure problem was tracked down, and how the thermal models were revised, validated, and utilized to investigate the solution options and guide the hardware modification decisions. Details related to test data interpretation, analytical uncertainties, and model-prediction vs. test-data correlation, are documented. Instrument/spacecraft interface issues, where the problem originated and where in general pitfalls abound, are dealt with specifically. Finally, on-orbit thermal performance data are presented, which exhibit good agreement with flight predictions, and lessons learned are discussed.

Pratt and Whitney Overview and Advanced Health Management Program

NASA Technical Reports Server (NTRS)

Inabinett, Calvin

2008-01-01

Hardware Development Activity: Design and Test Custom Multi-layer Circuit Boards for use in the Fault Emulation Unit; Logic design performed using VHDL; Layout power system for lab hardware; Work lab issues with software developers and software testers; Interface with Engine Systems personnel with performance of Engine hardware components; Perform off nominal testing with new engine hardware.

The Art of Space Flight Exercise Hardware: Design and Implementation

NASA Technical Reports Server (NTRS)

Beyene, Nahom M.

2004-01-01

The design of space flight exercise hardware depends on experience with crew health maintenance in a microgravity environment, history in development of flight-quality exercise hardware, and a foundation for certifying proper project management and design methodology. Developed over the past 40 years, the expertise in designing exercise countermeasures hardware at the Johnson Space Center stems from these three aspects of design. The medical community has steadily pursued an understanding of physiological changes in humans in a weightless environment and methods of counteracting negative effects on the cardiovascular and musculoskeletal system. The effects of weightlessness extend to the pulmonary and neurovestibular system as well with conditions ranging from motion sickness to loss of bone density. Results have shown losses in water weight and muscle mass in antigravity muscle groups. With the support of university-based research groups and partner space agencies, NASA has identified exercise to be the primary countermeasure for long-duration space flight. The history of exercise hardware began during the Apollo Era and leads directly to the present hardware on the International Space Station. Under the classifications of aerobic and resistive exercise, there is a clear line of development from the early devices to the countermeasures hardware used today. In support of all engineering projects, the engineering directorate has created a structured framework for project management. Engineers have identified standards and "best practices" to promote efficient and elegant design of space exercise hardware. The quality of space exercise hardware depends on how well hardware requirements are justified by exercise performance guidelines and crew health indicators. When considering the microgravity environment of the device, designers must consider performance of hardware separately from the combined human-in-hardware system. Astronauts are the caretakers of the hardware while it is deployed and conduct all sanitization, calibration, and maintenance for the devices. Thus, hardware designs must account for these issues with a goal of minimizing crew time on orbit required to complete these tasks. In the future, humans will venture to Mars and exercise countermeasures will play a critical role in allowing us to continue in our spirit of exploration. NASA will benefit from further experimentation on Earth, through the International Space Station, and with advanced biomechanical models to quantify how each device counteracts specific symptoms of weightlessness. With the continued support of international space agencies and the academic research community, we will usher the next frontier in human space exploration.

Research in software allocation for advanced manned mission communications and tracking systems

NASA Technical Reports Server (NTRS)

Warnagiris, Tom; Wolff, Bill; Kusmanoff, Antone

1990-01-01

An assessment of the planned processing hardware and software/firmware for the Communications and Tracking System of the Space Station Freedom (SSF) was performed. The intent of the assessment was to determine the optimum distribution of software/firmware in the processing hardware for maximum throughput with minimum required memory. As a product of the assessment process an assessment methodology was to be developed that could be used for similar assessments of future manned spacecraft system designs. The assessment process was hampered by changing requirements for the Space Station. As a result, the initial objective of determining the optimum software/firmware allocation was not fulfilled, but several useful conclusions and recommendations resulted from the assessment. It was concluded that the assessment process would not be completely successful for a system with changing requirements. It was also concluded that memory requirements and hardware requirements were being modified to fit as a consequence of the change process, and although throughput could not be quantitized, potential problem areas could be identified. Finally, inherent flexibility of the system design was essential for the success of a system design with changing requirements. Recommendations resulting from the assessment included development of common software for some embedded controller functions, reduction of embedded processor requirements by hardwiring some Orbital Replacement Units (ORUs) to make better use of processor capabilities, and improvement in communications between software development personnel to enhance the integration process. Lastly, a critical observation was made regarding the software integration tasks did not appear to be addressed in the design process to the degree necessary for successful satisfaction of the system requirements.

Aircrew Training Devices: Utility and Utilization of Advanced Instructional Features (Phase II-Air Training Command, Military Airlift Command, and Strategic Air Command [and] Phase III-Electronic Warfare Trainers).

ERIC Educational Resources Information Center

Polzella, Donald J.; Hubbard, David C.

This document consists of an interim report and a final report which describe the second and third phases of a project designed to determine the utility and utilization of sophisticated hardware and software capabilities known as advanced instructional features (AIFs). Used with an aircrew training device (ATD), AIFs permit a simulator instructor…

The role of hardware in learning engineering fundamentals: An empirical study of engineering design and product analysis activity

NASA Astrophysics Data System (ADS)

Brereton, Margot Felicity

A series of short engineering exercises and design projects was created to help students learn to apply abstract knowledge to physical experiences with hardware. The exercises involved designing machines from kits of materials and dissecting and analyzing familiar household products. Students worked in teams. During the activities students brought their knowledge of engineering fundamentals to bear. Videotape analysis was used to identify and characterize the ways in which hardware contributed to learning fundamental concepts. Structural and qualitative analyses of videotaped activities were undertaken. Structural analysis involved counting the references to theory and hardware and the extent of interleaving of references in activity. The analysis found that there was much more discussion linking fundamental concepts to hardware in some activities than in others. The analysis showed that the interleaving of references to theory and hardware in activity is observable and quantifiable. Qualitative analysis was used to investigate the dialog linking concepts and hardware. Students were found to advance their designs and their understanding of engineering fundamentals through a negotiation process in which they pitted abstract concepts against hardware behavior. Through this process students sorted out theoretical assumptions and causal relations. In addition they discovered design assumptions, functional connections and physical embodiments of abstract concepts in hardware, developing a repertoire of familiar hardware components and machines. Hardware was found to be integral to learning, affecting the course of inquiry and the dynamics of group interaction. Several case studies are presented to illustrate the processes at work. The research illustrates the importance of working across the boundary between abstractions and experiences with hardware in order to learn engineering and physical sciences. The research findings are: (a) the negotiation process by which students discover fundamental concepts in hardware (and three central causes of negotiation breakdown); (b) a characterization of the ways that material systems contribute to learning activities, (the seven roles of hardware in learning); (c) the characteristics of activities that support discovering fundamental concepts in hardware (plus several engineering exercises); (d) a research methodology to examine how students learn in practice.

Human factors certification in the development of future air traffic control systems

NASA Technical Reports Server (NTRS)

Evans, Alyson E.

1994-01-01

If human factors certification of aviation technologies aims to encompass the wide range of issues which need to be addressed for any new system, then human factors involvement must be present throughout the whole design process in a manner which relates to final certification. A certification process cannot simply be applied to the final product of design. Standards and guidelines will be required by designers at the outset of design for reference in preparing for certification. The most effective use of human factors principles, methods, and measures is made as part of an iterative design process, leading to a system which reflects these as far as possible. This particularly applies where the technology is complex and may be represented by a number of components or sub-systems. Some aspects of the system are best certified during early prototyping, when there is still scope to make changes to software or hardware. At this stage in design, financial and/or time pressures will not rule out the possibility of necessary changes, as may be the case later. Other aspects of the system will be best certified during the final phases of design when the system is in a more complete form and in a realistic environment.

Design, Fabrication, and Testing of a Hopper Spacecraft Simulator

NASA Astrophysics Data System (ADS)

Mucasey, Evan Phillip Krell

A robust test bed is needed to facilitate future development of guidance, navigation, and control software for future vehicles capable of vertical takeoff and landings. Specifically, this work aims to develop both a hardware and software simulator that can be used for future flight software development for extra-planetary vehicles. To achieve the program requirements of a high thrust to weight ratio with large payload capability, the vehicle is designed to have a novel combination of electric motors and a micro jet engine is used to act as the propulsion elements. The spacecraft simulator underwent several iterations of hardware development using different materials and fabrication methods. The final design used a combination of carbon fiber and fiberglass that was cured under vacuum to serve as the frame of the vehicle which provided a strong, lightweight platform for all flight components and future payloads. The vehicle also uses an open source software development platform, Arduino, to serve as the initial flight computer and has onboard accelerometers, gyroscopes, and magnetometers to sense the vehicles attitude. To prevent instability due to noise, a polynomial kalman filter was designed and this fed the sensed angles and rates into a robust attitude controller which autonomously control the vehicle' s yaw, pitch, and roll angles. In addition to the hardware development of the vehicle itself, both a software simulation and a real time data acquisition interface was written in MATLAB/SIMULINK so that real flight data could be taken and then correlated to the simulation to prove the accuracy of the analytical model. In result, the full scale vehicle was designed and own outside of the lab environment and data showed that the software model accurately predicted the flight dynamics of the vehicle.

Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; Ferguson, Michael I.

2003-01-01

Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

Blade Vibration Measurement System

NASA Technical Reports Server (NTRS)

Platt, Michael J.

2014-01-01

The Phase I project successfully demonstrated that an advanced noncontacting stress measurement system (NSMS) could improve classification of blade vibration response in terms of mistuning and closely spaced modes. The Phase II work confirmed the microwave sensor design process, modified the sensor so it is compatible as an upgrade to existing NSMS, and improved and finalized the NSMS software. The result will be stand-alone radar/tip timing radar signal conditioning for current conventional NSMS users (as an upgrade) and new users. The hybrid system will use frequency data and relative mode vibration levels from the radar sensor to provide substantially superior capabilities over current blade-vibration measurement technology. This frequency data, coupled with a reduced number of tip timing probes, will result in a system capable of detecting complex blade vibrations that would confound traditional NSMS systems. The hardware and software package was validated on a compressor rig at Mechanical Solutions, Inc. (MSI). Finally, the hybrid radar/tip timing NSMS software package and associated sensor hardware will be installed for use in the NASA Glenn spin pit test facility.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, John

Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

TADSim: Discrete Event-based Performance Prediction for Temperature Accelerated Dynamics

DOE PAGES

Mniszewski, Susan M.; Junghans, Christoph; Voter, Arthur F.; ...

2015-04-16

Next-generation high-performance computing will require more scalable and flexible performance prediction tools to evaluate software--hardware co-design choices relevant to scientific applications and hardware architectures. Here, we present a new class of tools called application simulators—parameterized fast-running proxies of large-scale scientific applications using parallel discrete event simulation. Parameterized choices for the algorithmic method and hardware options provide a rich space for design exploration and allow us to quickly find well-performing software--hardware combinations. We demonstrate our approach with a TADSim simulator that models the temperature-accelerated dynamics (TAD) method, an algorithmically complex and parameter-rich member of the accelerated molecular dynamics (AMD) family ofmore » molecular dynamics methods. The essence of the TAD application is captured without the computational expense and resource usage of the full code. We accomplish this by identifying the time-intensive elements, quantifying algorithm steps in terms of those elements, abstracting them out, and replacing them by the passage of time. We use TADSim to quickly characterize the runtime performance and algorithmic behavior for the otherwise long-running simulation code. We extend TADSim to model algorithm extensions, such as speculative spawning of the compute-bound stages, and predict performance improvements without having to implement such a method. Validation against the actual TAD code shows close agreement for the evolution of an example physical system, a silver surface. Finally, focused parameter scans have allowed us to study algorithm parameter choices over far more scenarios than would be possible with the actual simulation. This has led to interesting performance-related insights and suggested extensions.« less

NASA-STD-(I)-6016, Standard Materials and Processes Requirements for Spacecraft

NASA Technical Reports Server (NTRS)

Pedley, Michael; Griffin, Dennis

2006-01-01

This document is directed toward Materials and Processes (M&P) used in the design, fabrication, and testing of flight components for all NASA manned, unmanned, robotic, launch vehicle, lander, in-space and surface systems, and spacecraft program/project hardware elements. All flight hardware is covered by the M&P requirements of this document, including vendor designed, off-the-shelf, and vendor furnished items. Materials and processes used in interfacing ground support equipment (GSE); test equipment; hardware processing equipment; hardware packaging; and hardware shipment shall be controlled to prevent damage to or contamination of flight hardware.

Modular and Reusable Power System Design for the BRRISON Balloon Telescope

NASA Astrophysics Data System (ADS)

Truesdale, Nicholas A.

High altitude balloons are emerging as low-cost alternatives to orbital satellites in the field of telescopic observation. The near-space environment of balloons allows optics to perform near their diffraction limit. In practice, this implies that a telescope similar to the Hubble Space Telescope could be flown for a cost of tens of millions as opposed to billions. While highly feasible, the design of a balloon telescope to rival Hubble is limited by funding. Until a prototype is proven and more support for balloon science is gained, projects remain limited in both hardware costs and man hours. Thus, to effectively create and support balloon payloads, engineering designs must be efficient, modular, and if possible reusable. This thesis focuses specifically on a modular power system design for the BRRISON comet-observing balloon telescope. Time- and cost-saving techniques are developed that can be used for future missions. A modular design process is achieved through the development of individual circuit elements that span a wide range of capabilities. Circuits for power conversion, switching and sensing are designed to be combined in any configuration. These include DC-DC regulators, MOSFET drivers for switching, isolated switches, current sensors and voltage sensing ADCs. Emphasis is also given to commercially available hardware. Pre-fabricated DC-DC converters and an Arduino microcontroller simplify the design process and offer proven, cost-effective performance. The design of the BRRISON power system is developed from these low-level circuits elements. A board for main power distribution supports the majority of flight electronics, and is extensible to additional hardware in future applications. An ATX computer power supply is developed, allowing the use of a commercial ATX motherboard as the flight computer. The addition of new capabilities is explored in the form of a heater control board. Finally, the power system as a whole is described, and its overall performance analyzed. The success of the BRRISON power system during testing and flight proves its utility, both for BRRISON and for future balloon telescopes.

A Modular Robotic System with Applications to Space Exploration

NASA Technical Reports Server (NTRS)

Hancher, Matthew D.; Hornby, Gregory S.

2006-01-01

Modular robotic systems offer potential advantages as versatile, fault-tolerant, cost-effective platforms for space exploration, but a sufficiently mature system is not yet available. We describe the possible applications of such a system, and present prototype hardware intended as a step in the right direction. We also present elements of an automated design and optimization framework aimed at making modular robots easier to design and use, and discuss the results of applying the system to a gait optimization problem. Finally, we discuss the potential near-term applications of modular robotics to terrestrial robotics research.

Programming time-multiplexed reconfigurable hardware using a scalable neuromorphic compiler.

PubMed

Minkovich, Kirill; Srinivasa, Narayan; Cruz-Albrecht, Jose M; Cho, Youngkwan; Nogin, Aleksey

2012-06-01

Scalability and connectivity are two key challenges in designing neuromorphic hardware that can match biological levels. In this paper, we describe a neuromorphic system architecture design that addresses an approach to meet these challenges using traditional complementary metal-oxide-semiconductor (CMOS) hardware. A key requirement in realizing such neural architectures in hardware is the ability to automatically configure the hardware to emulate any neural architecture or model. The focus for this paper is to describe the details of such a programmable front-end. This programmable front-end is composed of a neuromorphic compiler and a digital memory, and is designed based on the concept of synaptic time-multiplexing (STM). The neuromorphic compiler automatically translates any given neural architecture to hardware switch states and these states are stored in digital memory to enable desired neural architectures. STM enables our proposed architecture to address scalability and connectivity using traditional CMOS hardware. We describe the details of the proposed design and the programmable front-end, and provide examples to illustrate its capabilities. We also provide perspectives for future extensions and potential applications.

Space Biology Initiative. Trade Studies, volume 2

NASA Technical Reports Server (NTRS)

1989-01-01

The six studies which are the subjects of this report are entitled: Design Modularity and Commonality; Modification of Existing Hardware (COTS) vs. New Hardware Build Cost Analysis; Automation Cost vs. Crew Utilization; Hardware Miniaturization versus Cost; Space Station Freedom/Spacelab Modules Compatibility vs. Cost; and Prototype Utilization in the Development of Space Hardware. The product of these six studies was intended to provide a knowledge base and methodology that enables equipment produced for the Space Biology Initiative program to meet specific design and functional requirements in the most efficient and cost effective form consistent with overall mission integration parameters. Each study promulgates rules of thumb, formulas, and matrices that serves as a handbook for the use and guidance of designers and engineers in design, development, and procurement of Space Biology Initiative (SBI) hardware and software.

Space Biology Initiative. Trade Studies, volume 1

NASA Technical Reports Server (NTRS)

1989-01-01

The six studies which are addressed are entitled: Design Modularity and Commonality; Modification of Existing Hardware (COTS) vs. New Hardware Build Cost Analysis; Automation Cost vs. Crew Utilization; Hardware Miniaturization versus Cost; Space Station Freedom/Spacelab Modules Compatibility vs. Cost; and Prototype Utilization in the Development of Space Hardware. The product of these six studies was intended to provide a knowledge base and methodology that enables equipment produced for the Space Biology Initiative program to meet specific design and functional requirements in the most efficient and cost effective form consistent with overall mission integration parameters. Each study promulgates rules of thumb, formulas, and matrices that serves has a handbook for the use and guidance of designers and engineers in design, development, and procurement of Space Biology Initiative (SBI) hardware and software.

Vehicle security encryption based on unlicensed encryption

NASA Astrophysics Data System (ADS)

Huang, Haomin; Song, Jing; Xu, Zhijia; Ding, Xiaoke; Deng, Wei

2018-03-01

The current vehicle key is easy to be destroyed and damage, proposing the use of elliptical encryption algorithm is improving the reliability of vehicle security system. Based on the encryption rules of elliptic curve, the chip's framework and hardware structure are designed, then the chip calculation process simulation has been analyzed by software. The simulation has been achieved the expected target. Finally, some issues pointed out in the data calculation about the chip's storage control and other modules.

Distributed Hybrid Information and Plan Consensus HIPC for Semi-autonomous UAV Teams

DTIC Science & Technology

2015-09-18

finalized. To do all of the onboard computations we are using Raspberry Pi B+’s (this hardware as shown in Fig. 16.) These computers are used to do all...public release. Figure 16: Raspberry Pi hardware Figure 17: Raspberry Pi hardware with case and DigiMesh Xbee Figure 18: Team of 11 Raspberry Pi powered...agents with Digimesh Xbee communication hardware. DISTRIBUTION A: Distribution approved for public release. Figure 19: Raspberry Pi network in real

Hardware architecture design of image restoration based on time-frequency domain computation

NASA Astrophysics Data System (ADS)

Wen, Bo; Zhang, Jing; Jiao, Zipeng

2013-10-01

The image restoration algorithms based on time-frequency domain computation is high maturity and applied widely in engineering. To solve the high-speed implementation of these algorithms, the TFDC hardware architecture is proposed. Firstly, the main module is designed, by analyzing the common processing and numerical calculation. Then, to improve the commonality, the iteration control module is planed for iterative algorithms. In addition, to reduce the computational cost and memory requirements, the necessary optimizations are suggested for the time-consuming module, which include two-dimensional FFT/IFFT and the plural calculation. Eventually, the TFDC hardware architecture is adopted for hardware design of real-time image restoration system. The result proves that, the TFDC hardware architecture and its optimizations can be applied to image restoration algorithms based on TFDC, with good algorithm commonality, hardware realizability and high efficiency.

SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain.

PubMed

Piromalis, Dimitrios; Arvanitis, Konstantinos

2016-08-04

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

A systematic FPGA acceleration design for applications based on convolutional neural networks

NASA Astrophysics Data System (ADS)

Dong, Hao; Jiang, Li; Li, Tianjian; Liang, Xiaoyao

2018-04-01

Most FPGA accelerators for convolutional neural network are designed to optimize the inner acceleration and are ignored of the optimization for the data path between the inner accelerator and the outer system. This could lead to poor performance in applications like real time video object detection. We propose a brand new systematic FPFA acceleration design to solve this problem. This design takes the data path optimization between the inner accelerator and the outer system into consideration and optimizes the data path using techniques like hardware format transformation, frame compression. It also takes fixed-point, new pipeline technique to optimize the inner accelerator. All these make the final system's performance very good, reaching about 10 times the performance comparing with the original system.

MIT's role in project Apollo. Volume 2: Optical, radar, and candidate subsystems

NASA Technical Reports Server (NTRS)

1972-01-01

The development of optical, radar, and candidate subsystems for Project Apollo is discussed. The design and development of the optical subsystems for both the Apollo command and lunar spacecraft are described. Design approaches, problems, and solutions are presented. The evolution of radar interfaces with the GN&C system is discussed; these interfaces involved both hardware and software in a relatively complex interrelationship. The design and development of three candidate subsystems are also described. The systems were considered for use in Apollo, but were not incorporated into the final GN&C system. The three subsystems discussed are the star tracker-horizon photometer, the map and data viewer and the lunar module optical rendezvous system.

Final postflight hardware evaluation report RSRM-32 (STS-57)

NASA Technical Reports Server (NTRS)

Nielson, Greg

1993-01-01

This document is the final report for the postflight assessment of the RSRM-32 (STS-57) flight set. This report presents the disassembly evaluations performed at the Thiokol facilities in Utah and is a continuation of the evaluations performed at KSC (TWR-64239). The PEEP for this assessment is outlined in TWR-50051, Revision B. The PEEP defines the requirements for evaluating RSRM hardware. Special hardware issues pertaining to this flight set requiring additional or modified assessment are outlined in TWR-64237. All observed hardware conditions were documented on PFOR's which are included in Appendix A. Observations were compared against limits defined in the PEEP. Any observation that was categorized as reportable or had no defined limits was documented on a preliminary PFAR by the assessment engineers. Preliminary PFAR's were reviewed by the Thiokol SPAT Executive Board to determine if elevation to PFAR's was required.

Performance of the Extravehicular Mobility Unit (EMU) Airlock Coolant Loop Remediation (A/L CLR) Hardware - Final

NASA Technical Reports Server (NTRS)

Steele, John W.; Rector, Tony; Gazda, Daniel; Lewis, John

2011-01-01

An EMU water processing kit (Airlock Coolant Loop Recovery -- A/L CLR) was developed as a corrective action to Extravehicular Mobility Unit (EMU) coolant flow disruptions experienced on the International Space Station (ISS) in May of 2004 and thereafter. A conservative duty cycle and set of use parameters for A/L CLR use and component life were initially developed and implemented based on prior analysis results and analytical modeling. Several initiatives were undertaken to optimize the duty cycle and use parameters of the hardware. Examination of post-flight samples and EMU Coolant Loop hardware provided invaluable information on the performance of the A/L CLR and has allowed for an optimization of the process. The intent of this paper is to detail the evolution of the A/L CLR hardware, efforts to optimize the duty cycle and use parameters, and the final recommendations for implementation in the post-Shuttle retirement era.

UWGSP6: a diagnostic radiology workstation of the future

NASA Astrophysics Data System (ADS)

Milton, Stuart W.; Han, Sang; Choi, Hyung-Sik; Kim, Yongmin

1993-06-01

The Univ. of Washington's Image Computing Systems Lab. (ICSL) has been involved in research into the development of a series of PACS workstations since the middle 1980's. The most recent research, a joint UW-IBM project, attempted to create a diagnostic radiology workstation using an IBM RISC System 6000 (RS6000) computer workstation and the X-Window system. While the results are encouraging, there are inherent limitations in the workstation hardware which prevent it from providing an acceptable level of functionality for diagnostic radiology. Realizing the RS6000 workstation's limitations, a parallel effort was initiated to design a workstation, UWGSP6 (Univ. of Washington Graphics System Processor #6), that provides the required functionality. This paper documents the design of UWGSP6, which not only addresses the requirements for a diagnostic radiology workstation in terms of display resolution, response time, etc., but also includes the processing performance necessary to support key functions needed in the implementation of algorithms for computer-aided diagnosis. The paper includes a description of the workstation architecture, and specifically its image processing subsystem. Verification of the design through hardware simulation is then discussed, and finally, performance of selected algorithms based on detailed simulation is provided.

Implementation of a Water Flow Control System into the ISS'S Planned Fluids & Combustion Facility

NASA Technical Reports Server (NTRS)

Edwards, Daryl A.

2003-01-01

The Fluids and Combustion Facility (FCF) will become an ISS facility capable of performing basic combustion and fluids research. The facility consists of two independent payload racks specifically configured to support multiple experiments over the life of the ISS. Both racks will depend upon the ISS's Moderate Temperature Loop (MTL) for removing waste heat generated by the avionics and experiments operating within the racks. By using the MTL, constraints are imposed by the ISS vehicle on how the coolant resource is used. On the other hand, the FCF depends upon effective thermal control for maximizing life of the hardware and for supplying proper boundary conditions for the experiments. In the implementation of a design solution, significant factors in the selection of the hardware included ability to measure and control relatively low flow rates, ability to throttle flow within the time constraints of the ISS MTL, conserve energy usage, observe low mass and small volume requirements. An additional factor in the final design solution selection was considering how the system would respond to a loss of power event. This paper describes the method selected to satisfy the FCF design requirements while maintaining the constraints applied by the ISS vehicle.

Achromatic beam transport of High Current Injector

NASA Astrophysics Data System (ADS)

Kumar, Sarvesh; Mandal, A.

2016-02-01

The high current injector (HCI) provides intense ion beams of high charge state using a high temperature superconducting ECR ion source. The ion beam is accelerated upto a final energy of 1.8 MeV/u due to an electrostatic potential, a radio frequency quadrupole (RFQ) and a drift tube linac (DTL). The ion beam has to be transported to superconducting LINAC which is around 50 m away from DTL. This section is termed as high energy beam transport section (HEBT) and is used to match the beam both in transverse and longitudinal phase space to the entrance of LINAC. The HEBT section is made up of four 90 deg. achromatic bends and interconnecting magnetic quadrupole triplets. Two RF bunchers have been used for longitudinal phase matching to the LINAC. The ion optical design of HEBT section has been simulated using different beam dynamics codes like TRACEWIN, GICOSY and TRACE 3D. The field computation code OPERA 3D has been utilized for hardware design of all the magnets. All the dipole and quadrupole magnets have been field mapped and their test results such as edge angles measurements, homogeneity and harmonic analysis etc. are reported. The whole design of HEBT section has been performed such that the most of the beam optical components share same hardware design and there is ample space for beam diagnostics as per geometry of the building. Many combination of achromatic bends have been simulated to transport the beam in HEBT section but finally the four 90 deg. achromatic bend configuration is found to be the best satisfying all the geometrical constraints with simplified beam tuning process in real time.

Hardware synthesis from DDL. [Digital Design Language for computer aided design and test of LSI

NASA Technical Reports Server (NTRS)

Shah, A. M.; Shiva, S. G.

1981-01-01

The details of the digital systems can be conveniently input into the design automation system by means of Hardware Description Languages (HDL). The Computer Aided Design and Test (CADAT) system at NASA MSFC is used for the LSI design. The Digital Design Language (DDL) has been selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. This paper addresses problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system.

Safe to Fly: Certifying COTS Hardware for Spaceflight

NASA Technical Reports Server (NTRS)

Fichuk, Jessica L.

2011-01-01

Providing hardware for the astronauts to use on board the Space Shuttle or International Space Station (ISS) involves a certification process that entails evaluating hardware safety, weighing risks, providing mitigation, and verifying requirements. Upon completion of this certification process, the hardware is deemed safe to fly. This process from start to finish can be completed as quickly as 1 week or can take several years in length depending on the complexity of the hardware and whether the item is a unique custom design. One area of cost and schedule savings that NASA implements is buying Commercial Off the Shelf (COTS) hardware and certifying it for human spaceflight as safe to fly. By utilizing commercial hardware, NASA saves time not having to develop, design and build the hardware from scratch, as well as a timesaving in the certification process. By utilizing COTS hardware, the current detailed certification process can be simplified which results in schedule savings. Cost savings is another important benefit of flying COTS hardware. Procuring COTS hardware for space use can be more economical than custom building the hardware. This paper will investigate the cost savings associated with certifying COTS hardware to NASA s standards rather than performing a custom build.

TRL Assessment of Solar Sail Technology Development Following the 20-Meter System Ground Demonstrator Hardware Testing

NASA Technical Reports Server (NTRS)

Young, Roy M.; Montgomery, Edward E.; Montgomery, Sandy; Adams, Charles L.

2007-01-01

The NASA In-Space Propulsion Technology (ISPT) Projects Office has been sponsoring 2 separate, independent system design and development hardware demonstration activities during 2002-2005. ATK Space Systems of Goleta, CA was the prime contractor for one development team and L'Garde, Inc. of Tustin, CA was the prime contractor for the other development team. The goal of these activities was to advance the technology readiness level (TRL) of solar sail propulsion from 3 towards 6 by the year 2006. Component and subsystem fabrication and testing were completed successfully, including the ground deployment of 10-meter and 20-meter ground demonstration hardware systems under vacuum conditions. The deployment and structural testing of the 20-meter solar sail systems was conducted in the 30 meter diameter Space Power Facility thermal-vacuum chamber at NASA Glenn Plum Brook in April though August, 2005. This paper will present the results of the TRL assessment following the solar sail technology development activities associated with the design, development, analysis and testing of the 20-meter system ground demonstrators. Descriptions of the system designs for both the ATK and L'Garde systems will be presented. Changes, additions and evolution of the system designs will be highlighted. A description of the modeling and analyses activities performed by both teams, as well as testing conducted to raise the TRL of solar sail technology will be presented. A summary of the results of model correlation activities will be presented. Finally, technology gaps identified during the assessment and gap closure plans will be presented, along with "lessons learned", subsequent planning activities and validation flight opportunities for solar sail propulsion technology.

An adaptable, low cost test-bed for unmanned vehicle systems research

NASA Astrophysics Data System (ADS)

Goppert, James M.

2011-12-01

An unmanned vehicle systems test-bed has been developed. The test-bed has been designed to accommodate hardware changes and various vehicle types and algorithms. The creation of this test-bed allows research teams to focus on algorithm development and employ a common well-tested experimental framework. The ArduPilotOne autopilot was developed to provide the necessary level of abstraction for multiple vehicle types. The autopilot was also designed to be highly integrated with the Mavlink protocol for Micro Air Vehicle (MAV) communication. Mavlink is the native protocol for QGroundControl, a MAV ground control program. Features were added to QGroundControl to accommodate outdoor usage. Next, the Mavsim toolbox was developed for Scicoslab to allow hardware-in-the-loop testing, control design and analysis, and estimation algorithm testing and verification. In order to obtain linear models of aircraft dynamics, the JSBSim flight dynamics engine was extended to use a probabilistic Nelder-Mead simplex method. The JSBSim aircraft dynamics were compared with wind-tunnel data collected. Finally, a structured methodology for successive loop closure control design is proposed. This methodology is demonstrated along with the rest of the test-bed tools on a quadrotor, a fixed wing RC plane, and a ground vehicle. Test results for the ground vehicle are presented.

Ares I-X Flight Test - On the Fast Track to the Future

NASA Technical Reports Server (NTRS)

Davis, Stephan R.; Robinson, Kimberly F.

2008-01-01

In less than two years, the National Aeronautics and Space Administration (NASA) will launch the Ares I-X mission. This will be the first flight of the Ares I crew launch vehicle, which, together with the Ares V cargo launch vehicle, will send humans to the Moon and beyond. Personnel from the Ares I-X Mission Management Office (MMO) are finalizing designs and fabricating vehicle hardware for an April 2009 launch. Ares I-X will be a suborbital development flight test that will gather critical data about the flight dynamics of the integrated launch vehicle stack; understand how to control its roll during flight; better characterize the severe stage separation environments that the upper stage engine will experience during future flights; and demonstrate the first stage recovery system. NASA also will modify the launch infrastructure and ground and mission operations. The Ares I-X Flight Test Vehicle (FTV) will incorporate flight and mockup hardware similar in mass and weight to the operational vehicle. It will be powered by a four-segment Solid Rocket Booster (SRB), which is currently in Shuttle inventory, and will include a fifth spacer segment and new forward structures to make the booster approximately the same size and weight as the five-segment SRB. The Ares I-X flight profile will closely approximate the flight conditions that the Ares I will experience through Mach 4.5, up to approximately130,OOO feet and through maximum dynamic pressure ("Max Q") of approximately 800 pounds per square foot. Data from the Ares I-X flight will support the Ares I Critical Design Review (CDR), scheduled for 2010. Work continues on Ares I-X design and hardware fabrication. All of the individual elements are undergoing CDRs, followed by an integrated vehicle CDR in March 2008. The various hardware elements are on schedule to begin deliveries to Kennedy Space Center (KSC) in early September 2008.

Modified ACES Portable Life Support Integration, Design, and Testing for Exploration Missions

NASA Technical Reports Server (NTRS)

Kelly, Cody

2014-01-01

NASA's next generation of exploration missions provide a unique challenge to designers of EVA life support equipment, especially in a fiscally-constrained environment. In order to take the next steps of manned space exploration, NASA is currently evaluating the use of the Modified ACES (MACES) suit in conjunction with the Advanced Portable Life Support System (PLSS) currently under development. This paper will detail the analysis and integration of the PLSS thermal and ventilation subsystems into the MACES pressure garment, design of prototype hardware, and hardware-in-the-loop testing during the spring 2014 timeframe. Prototype hardware was designed with a minimal impact philosophy in order to mitigate design constraints becoming levied on either the advanced PLSS or MACES subsystems. Among challenges faced by engineers were incorporation of life support thermal water systems into the pressure garment cavity, operational concept definition between vehicle/portable life support system hardware, and structural attachment mechanisms while still enabling maximum EVA efficiency from a crew member's perspective. Analysis was completed in late summer 2013 to 'bound' hardware development, with iterative analysis cycles throughout the hardware development process. The design effort will cumulate in the first ever manned integration of NASA's advanced PLSS system with a pressure garment originally intended primarily for use in a contingency survival scenario.

SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain

PubMed Central

Piromalis, Dimitrios; Arvanitis, Konstantinos

2016-01-01

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture. PMID:27527180

First Spacelab mission status and lessons learned

NASA Technical Reports Server (NTRS)

Craft, H. G., Jr.; Smith, M. J.; Mullinger, D.

1982-01-01

There are 38 experiments and/or facilities currently under development, or undergoing testing, which will be incorporated into Spacelab for its first mission. These experiments cover a range of scientific disciplines which includes atmospheric research, life sciences, space plasma research, materials science, and space industrialization technology. In addition to the full development of individual experiments, the final design of the integrated payload and the development of all requisite integration hardware have been accomplished. Attention is given to the project management lessons learned during payload integration development.

Status of 20 kHz space station power distribution technology

NASA Technical Reports Server (NTRS)

Hansen, Irving G.

1988-01-01

Power Distribution on the NASA Space Station will be accomplished by a 20 kHz sinusoidal, 440 VRMS, single phase system. In order to minimize both system complexity and the total power coversion steps required, high frequency power will be distributed end-to-end in the system. To support the final design of flight power system hardware, advanced development and demonstrations have been made on key system technologies and components. The current status of this program is discussed.

State of the art in pathology business process analysis, modeling, design and optimization.

PubMed

Schrader, Thomas; Blobel, Bernd; García-Rojo, Marcial; Daniel, Christel; Słodkowska, Janina

2012-01-01

For analyzing current workflows and processes, for improving them, for quality management and quality assurance, for integrating hardware and software components, but also for education, training and communication between different domains' experts, modeling business process in a pathology department is inevitable. The authors highlight three main processes in pathology: general diagnostic, cytology diagnostic, and autopsy. In this chapter, those processes are formally modeled and described in detail. Finally, specialized processes such as immunohistochemistry and frozen section have been considered.

The FONT5 Bunch-by-Bunch Position and Angle Feedback System at ATF2

NASA Astrophysics Data System (ADS)

Apsimon, R. J.; Bett, D. R.; Burrows, P. N.; Christian, G. B.; Constance, B.; Davis, M. R.; Gerbershagen, A.; Perry, C.; Resta-Lopez, J.

The FONT5 upstream beam-based feedback system at ATF2 is designed to correct the position and angle jitter at the entrance to the ATF2 final-focus system, and also to demonstrate a prototype intra-train feedback system for the International Linear Collider interaction point. We discuss the hardware, from stripline BPMs to kickers, and RF and digital signal processing, as well as presenting results from the latest beam tests at ATF2.

NASA Ames Research Center R and D Services Directorate Biomedical Systems Development

NASA Technical Reports Server (NTRS)

Pollitt, J.; Flynn, K.

1999-01-01

The Ames Research Center R&D Services Directorate teams with NASA, other government agencies and/or industry investigators for the development, design, fabrication, manufacturing and qualification testing of space-flight and ground-based experiment hardware for biomedical and general aerospace applications. In recent years, biomedical research hardware and software has been developed to support space-flight and ground-based experiment needs including the E 132 Biotelemetry system for the Research Animal Holding Facility (RAHF), E 100 Neurolab neuro-vestibular investigation systems, the Autogenic Feedback Systems, and the Standard Interface Glove Box (SIGB) experiment workstation module. Centrifuges, motion simulators, habitat design, environmental control systems, and other unique experiment modules and fixtures have also been developed. A discussion of engineered systems and capabilities will be provided to promote understanding of possibilities for future system designs in biomedical applications. In addition, an overview of existing engineered products will be shown. Examples of hardware and literature that demonstrate the organization's capabilities will be displayed. The Ames Research Center R&D Services Directorate is available to support the development of new hardware and software systems or adaptation of existing systems to meet the needs of academic, commercial/industrial, and government research requirements. The Ames R&D Services Directorate can provide specialized support for: System concept definition and feasibility Mathematical modeling and simulation of system performance Prototype hardware development Hardware and software design Data acquisition systems Graphical user interface development Motion control design Hardware fabrication and high-fidelity machining Composite materials development and application design Electronic/electrical system design and fabrication System performance verification testing and qualification.

Distributed digital signal processors for multi-body structures

NASA Technical Reports Server (NTRS)

Lee, Gordon K.

1990-01-01

Several digital filter designs were investigated which may be used to process sensor data from large space structures and to design digital hardware to implement the distributed signal processing architecture. Several experimental tests articles are available at NASA Langley Research Center to evaluate these designs. A summary of some of the digital filter designs is presented, an evaluation of their characteristics relative to control design is discussed, and candidate hardware microcontroller/microcomputer components are given. Future activities include software evaluation of the digital filter designs and actual hardware inplementation of some of the signal processor algorithms on an experimental testbed at NASA Langley.

Hardware synthesis from DDL description. [simulating a digital system for computerized design of large scale integrated circuits

NASA Technical Reports Server (NTRS)

Shiva, S. G.; Shah, A. M.

1980-01-01

The details of digital systems can be conveniently input into the design automation system by means of hardware description language (HDL). The computer aided design and test (CADAT) system at NASA MSFC is used for the LSI design. The digital design language (DDL) was selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. Problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system are addressed.

Design and development of data acquisition system based on WeChat hardware

NASA Astrophysics Data System (ADS)

Wang, Zhitao; Ding, Lei

2018-06-01

Data acquisition system based on WeChat hardware provides methods for popularization and practicality of data acquisition. The whole system is based on WeChat hardware platform, where the hardware part is developed on DA14580 development board and the software part is based on Alibaba Cloud. We designed service module, logic processing module, data processing module and database module. The communication between hardware and software uses AirSync Protocal. We tested this system by collecting temperature and humidity data, and the result shows that the system can aquisite the temperature and humidity in real time according to settings.

Space vehicle onboard command encoder

NASA Technical Reports Server (NTRS)

1975-01-01

A flexible onboard encoder system was designed for the space shuttle. The following areas were covered: (1) implementation of the encoder design into hardware to demonstrate the various encoding algorithms/code formats, (2) modulation techniques in a single hardware package to maintain comparable reliability and link integrity of the existing link systems and to integrate the various techniques into a single design using current technology. The primary function of the command encoder is to accept input commands, generated either locally onboard the space shuttle or remotely from the ground, format and encode the commands in accordance with the payload input requirements and appropriately modulate a subcarrier for transmission by the baseband RF modulator. The following information was provided: command encoder system design, brassboard hardware design, test set hardware and system packaging, and software.

On decoding of multi-level MPSK modulation codes

NASA Technical Reports Server (NTRS)

Lin, Shu; Gupta, Alok Kumar

1990-01-01

The decoding problem of multi-level block modulation codes is investigated. The hardware design of soft-decision Viterbi decoder for some short length 8-PSK block modulation codes is presented. An effective way to reduce the hardware complexity of the decoder by reducing the branch metric and path metric, using a non-uniform floating-point to integer mapping scheme, is proposed and discussed. The simulation results of the design are presented. The multi-stage decoding (MSD) of multi-level modulation codes is also investigated. The cases of soft-decision and hard-decision MSD are considered and their performance are evaluated for several codes of different lengths and different minimum squared Euclidean distances. It is shown that the soft-decision MSD reduces the decoding complexity drastically and it is suboptimum. The hard-decision MSD further simplifies the decoding while still maintaining a reasonable coding gain over the uncoded system, if the component codes are chosen properly. Finally, some basic 3-level 8-PSK modulation codes using BCH codes as component codes are constructed and their coding gains are found for hard decision multistage decoding.

A 181 GOPS AKAZE Accelerator Employing Discrete-Time Cellular Neural Networks for Real-Time Feature Extraction.

PubMed

Jiang, Guangli; Liu, Leibo; Zhu, Wenping; Yin, Shouyi; Wei, Shaojun

2015-09-04

This paper proposes a real-time feature extraction VLSI architecture for high-resolution images based on the accelerated KAZE algorithm. Firstly, a new system architecture is proposed. It increases the system throughput, provides flexibility in image resolution, and offers trade-offs between speed and scaling robustness. The architecture consists of a two-dimensional pipeline array that fully utilizes computational similarities in octaves. Secondly, a substructure (block-serial discrete-time cellular neural network) that can realize a nonlinear filter is proposed. This structure decreases the memory demand through the removal of data dependency. Thirdly, a hardware-friendly descriptor is introduced in order to overcome the hardware design bottleneck through the polar sample pattern; a simplified method to realize rotation invariance is also presented. Finally, the proposed architecture is designed in TSMC 65 nm CMOS technology. The experimental results show a performance of 127 fps in full HD resolution at 200 MHz frequency. The peak performance reaches 181 GOPS and the throughput is double the speed of other state-of-the-art architectures.

Design of a highly parallel board-level-interconnection with 320 Gbps capacity

NASA Astrophysics Data System (ADS)

Lohmann, U.; Jahns, J.; Limmer, S.; Fey, D.; Bauer, H.

2012-01-01

A parallel board-level interconnection design is presented consisting of 32 channels, each operating at 10 Gbps. The hardware uses available optoelectronic components (VCSEL, TIA, pin-diodes) and a combination of planarintegrated free-space optics, fiber-bundles and available MEMS-components, like the DMD™ from Texas Instruments. As a specific feature, we present a new modular inter-board interconnect, realized by 3D fiber-matrix connectors. The performance of the interconnect is evaluated with regard to optical properties and power consumption. Finally, we discuss the application of the interconnect for strongly distributed system architectures, as, for example, in high performance embedded computing systems and data centers.

Postflight hardware evaluation 360T026 (RSRM-26, STS-47)

NASA Technical Reports Server (NTRS)

Nielson, Greg

1993-01-01

The final report for the Clearfield disassembly evaluation and a continuation of the KSC postflight assessment for the 360T026 (STS-47) Redesigned Solid Rocket Motor (RSRM) flight set is provided. All observed hardware conditions were documented on PFOR's and are included in Appendices A, B, and C. Appendices D and E contain the measurements and safety factor data for the nozzle and insulation components. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report (TWR-64203), represents a summary of the 360T026 hardware evaluation. The as-flown hardware configuration is documented in TWR-60472. Disassembly evaluation photograph numbers are logged in TWA-1987. The 360T026 flight set disassembly evaluations described were performed at the RSRM Refurbishment Facility in Clearfield, Utah. The final factory joint demate occurred on 12 April 1993. Detailed evaluations were performed in accordance with the Clearfield Postflight Engineering Evaluation Plan (PEEP), TWR-50051, Revision A. All observations were compared against limits that are also defined in the PEEP. These limits outline the criteria for categorizing the observations as acceptable, reportable, or critical. Hardware conditions that were unexpected and/or determined to be reportable or critical were evaluated by the applicable CPT and tracked through the PFAR system.

Statistical Design Model (SDM) of satellite thermal control subsystem

NASA Astrophysics Data System (ADS)

Mirshams, Mehran; Zabihian, Ehsan; Aarabi Chamalishahi, Mahdi

2016-07-01

Satellites thermal control, is a satellite subsystem that its main task is keeping the satellite components at its own survival and activity temperatures. Ability of satellite thermal control plays a key role in satisfying satellite's operational requirements and designing this subsystem is a part of satellite design. In the other hand due to the lack of information provided by companies and designers still doesn't have a specific design process while it is one of the fundamental subsystems. The aim of this paper, is to identify and extract statistical design models of spacecraft thermal control subsystem by using SDM design method. This method analyses statistical data with a particular procedure. To implement SDM method, a complete database is required. Therefore, we first collect spacecraft data and create a database, and then we extract statistical graphs using Microsoft Excel, from which we further extract mathematical models. Inputs parameters of the method are mass, mission, and life time of the satellite. For this purpose at first thermal control subsystem has been introduced and hardware using in the this subsystem and its variants has been investigated. In the next part different statistical models has been mentioned and a brief compare will be between them. Finally, this paper particular statistical model is extracted from collected statistical data. Process of testing the accuracy and verifying the method use a case study. Which by the comparisons between the specifications of thermal control subsystem of a fabricated satellite and the analyses results, the methodology in this paper was proved to be effective. Key Words: Thermal control subsystem design, Statistical design model (SDM), Satellite conceptual design, Thermal hardware

Media processors using a new microsystem architecture designed for the Internet era

NASA Astrophysics Data System (ADS)

Wyland, David C.

1999-12-01

The demands of digital image processing, communications and multimedia applications are growing more rapidly than traditional design methods can fulfill them. Previously, only custom hardware designs could provide the performance required to meet the demands of these applications. However, hardware design has reached a crisis point. Hardware design can no longer deliver a product with the required performance and cost in a reasonable time for a reasonable risk. Software based designs running on conventional processors can deliver working designs in a reasonable time and with low risk but cannot meet the performance requirements. What is needed is a media processing approach that combines very high performance, a simple programming model, complete programmability, short time to market and scalability. The Universal Micro System (UMS) is a solution to these problems. The UMS is a completely programmable (including I/O) system on a chip that combines hardware performance with the fast time to market, low cost and low risk of software designs.

Spin-wave diode

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lan, Jin; Yu, Weichao; Wu, Ruqian

A diode, a device allowing unidirectional signal transmission, is a fundamental element of logic structures, and it lies at the heart of modern information systems. The spin wave or magnon, representing a collective quasiparticle excitation of the magnetic order in magnetic materials, is a promising candidate for an information carrier for the next-generation energy-saving technologies. Here, we propose a scalable and reprogrammable pure spin-wave logic hardware architecture using domain walls and surface anisotropy stripes as waveguides on a single magnetic wafer. We demonstrate theoretically the design principle of the simplest logic component, a spin-wave diode, utilizing the chiral bound statesmore » in a magnetic domain wall with a Dzyaloshinskii-Moriya interaction, and confirm its performance through micromagnetic simulations. As a result, these findings open a new vista for realizing different types of pure spin-wave logic components and finally achieving an energy-efficient and hardware-reprogrammable spin-wave computer.« less

Spin-wave diode

DOE PAGES

Lan, Jin; Yu, Weichao; Wu, Ruqian; ...

2015-12-28

A diode, a device allowing unidirectional signal transmission, is a fundamental element of logic structures, and it lies at the heart of modern information systems. The spin wave or magnon, representing a collective quasiparticle excitation of the magnetic order in magnetic materials, is a promising candidate for an information carrier for the next-generation energy-saving technologies. Here, we propose a scalable and reprogrammable pure spin-wave logic hardware architecture using domain walls and surface anisotropy stripes as waveguides on a single magnetic wafer. We demonstrate theoretically the design principle of the simplest logic component, a spin-wave diode, utilizing the chiral bound statesmore » in a magnetic domain wall with a Dzyaloshinskii-Moriya interaction, and confirm its performance through micromagnetic simulations. As a result, these findings open a new vista for realizing different types of pure spin-wave logic components and finally achieving an energy-efficient and hardware-reprogrammable spin-wave computer.« less

Development and Validation of a Spike Detection and Classification Algorithm Aimed at Implementation on Hardware Devices

PubMed Central

Biffi, E.; Ghezzi, D.; Pedrocchi, A.; Ferrigno, G.

2010-01-01

Neurons cultured in vitro on MicroElectrode Array (MEA) devices connect to each other, forming a network. To study electrophysiological activity and long term plasticity effects, long period recording and spike sorter methods are needed. Therefore, on-line and real time analysis, optimization of memory use and data transmission rate improvement become necessary. We developed an algorithm for amplitude-threshold spikes detection, whose performances were verified with (a) statistical analysis on both simulated and real signal and (b) Big O Notation. Moreover, we developed a PCA-hierarchical classifier, evaluated on simulated and real signal. Finally we proposed a spike detection hardware design on FPGA, whose feasibility was verified in terms of CLBs number, memory occupation and temporal requirements; once realized, it will be able to execute on-line detection and real time waveform analysis, reducing data storage problems. PMID:20300592

Standard cell-based implementation of a digital optoelectronic neural-network hardware.

PubMed

Maier, K D; Beckstein, C; Blickhan, R; Erhard, W

2001-03-10

A standard cell-based implementation of a digital optoelectronic neural-network architecture is presented. The overall structure of the multilayer perceptron network that was used, the optoelectronic interconnection system between the layers, and all components required in each layer are defined. The design process from VHDL-based modeling from synthesis and partly automatic placing and routing to the final editing of one layer of the circuit of the multilayer perceptrons are described. A suitable approach for the standard cell-based design of optoelectronic systems is presented, and shortcomings of the design tool that was used are pointed out. The layout for the microelectronic circuit of one layer in a multilayer perceptron neural network with a performance potential 1 magnitude higher than neural networks that are purely electronic based has been successfully designed.

Exploration and design of smart home circuit based on ZigBee

NASA Astrophysics Data System (ADS)

Luo, Huirong

2018-05-01

To apply ZigBee technique in smart home circuit design, in the hardware design link of ZigBee node, TI Company's ZigBee wireless communication chip CC2530 was used to complete the design of ZigBee RF module circuit and peripheral circuit. In addition, the function demand and the overall scheme of the intelligent system based on smart home furnishing were proposed. Finally, the smart home system was built by combining ZigBee network and intelligent gateway. The function realization, reliability and power consumption of ZigBee network were tested. The results showed that ZigBee technology was applied to smart home system, making it have some advantages in terms of flexibility, scalability, power consumption and indoor aesthetics. To sum up, the system has high application value.

Low-power hardware implementation of movement decoding for brain computer interface with reduced-resolution discrete cosine transform.

PubMed

Minho Won; Albalawi, Hassan; Xin Li; Thomas, Donald E

2014-01-01

This paper describes a low-power hardware implementation for movement decoding of brain computer interface. Our proposed hardware design is facilitated by two novel ideas: (i) an efficient feature extraction method based on reduced-resolution discrete cosine transform (DCT), and (ii) a new hardware architecture of dual look-up table to perform discrete cosine transform without explicit multiplication. The proposed hardware implementation has been validated for movement decoding of electrocorticography (ECoG) signal by using a Xilinx FPGA Zynq-7000 board. It achieves more than 56× energy reduction over a reference design using band-pass filters for feature extraction.

Energy efficient engine low-pressure compressor component test hardware detailed design report

NASA Technical Reports Server (NTRS)

Michael, C. J.; Halle, J. E.

1981-01-01

The aerodynamic and mechanical design description of the low pressure compressor component of the Energy Efficient Engine were used. The component was designed to meet the requirements of the Flight Propulsion System while maintaining a low cost approach in providing a low pressure compressor design for the Integrated Core/Low Spool test required in the Energy Efficient Engine Program. The resulting low pressure compressor component design meets or exceeds all design goals with the exception of surge margin. In addition, the expense of hardware fabrication for the Integrated Core/Low Spool test has been minimized through the use of existing minor part hardware.

Hierarchical image-based rendering using texture mapping hardware

DOE Office of Scientific and Technical Information (OSTI.GOV)

Max, N

1999-01-15

Multi-layered depth images containing color and normal information for subobjects in a hierarchical scene model are precomputed with standard z-buffer hardware for six orthogonal views. These are adaptively selected according to the proximity of the viewpoint, and combined using hardware texture mapping to create ''reprojected'' output images for new viewpoints. (If a subobject is too close to the viewpoint, the polygons in the original model are rendered.) Specific z-ranges are selected from the textures with the hardware alpha test to give accurate 3D reprojection. The OpenGL color matrix is used to transform the precomputed normals into their orientations in themore » final view, for hardware shading.« less

Online Learning Flight Control for Intelligent Flight Control Systems (IFCS)

NASA Technical Reports Server (NTRS)

Niewoehner, Kevin R.; Carter, John (Technical Monitor)

2001-01-01

The research accomplishments for the cooperative agreement 'Online Learning Flight Control for Intelligent Flight Control Systems (IFCS)' include the following: (1) previous IFC program data collection and analysis; (2) IFC program support site (configured IFC systems support network, configured Tornado/VxWorks OS development system, made Configuration and Documentation Management Systems Internet accessible); (3) Airborne Research Test Systems (ARTS) II Hardware (developed hardware requirements specification, developing environmental testing requirements, hardware design, and hardware design development); (4) ARTS II software development laboratory unit (procurement of lab style hardware, configured lab style hardware, and designed interface module equivalent to ARTS II faceplate); (5) program support documentation (developed software development plan, configuration management plan, and software verification and validation plan); (6) LWR algorithm analysis (performed timing and profiling on algorithm); (7) pre-trained neural network analysis; (8) Dynamic Cell Structures (DCS) Neural Network Analysis (performing timing and profiling on algorithm); and (9) conducted technical interchange and quarterly meetings to define IFC research goals.

Technical support package: Large, easily deployable structures. NASA Tech Briefs, Fall 1982, volume 7, no. 1

NASA Technical Reports Server (NTRS)

1982-01-01

Design and test data for packaging, deploying, and assembling structures for near term space platform systems, were provided by testing light type hardware in the Neutral Buoyancy Simulator. An optimum or near optimum structural configuration for varying degrees of deployment utilizing different levels of EVA and RMS was achieved. The design of joints and connectors and their lock/release mechanisms were refined to improve performance and operational convenience. The incorporation of utilities into structural modules to determine their effects on packaging and deployment was evaluated. By simulation tests, data was obtained for stowage, deployment, and assembly of the final structural system design to determine construction timelines, and evaluate system functioning and techniques.

The Evolution of Exercise Hardware on ISS: Past, Present, and Future

NASA Technical Reports Server (NTRS)

Buxton, R. E.; Kalogera, K. L.; Hanson, A. M.

2017-01-01

During 16 years in low-Earth orbit, the suite of exercise hardware aboard the International Space Station (ISS) has matured significantly. Today, the countermeasure system supports an array of physical-training protocols and serves as an extensive research platform. Future hardware designs are required to have smaller operational envelopes and must also mitigate known physiologic issues observed in long-duration spaceflight. Taking lessons learned from the long history of space exercise will be important to successful development and implementation of future, compact exercise hardware. The evolution of exercise hardware as deployed on the ISS has implications for future exercise hardware and operations. Key lessons learned from the early days of ISS have helped to: 1. Enhance hardware performance (increased speed and loads). 2. Mature software interfaces. 3. Compare inflight exercise workloads to pre-, in-, and post-flight musculoskeletal and aerobic conditions. 4. Improve exercise comfort. 5. Develop complimentary hardware for research and operations. Current ISS exercise hardware includes both custom and commercial-off-the-shelf (COTS) hardware. Benefits and challenges to this approach have prepared engineering teams to take a hybrid approach when designing and implementing future exercise hardware. Significant effort has gone into consideration of hardware instrumentation and wearable devices that provide important data to monitor crew health and performance.

PIPER: Performance Insight for Programmers and Exascale Runtimes: Guiding the Development of the Exascale Software Stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mellor-Crummey, John

The PIPER project set out to develop methodologies and software for measurement, analysis, attribution, and presentation of performance data for extreme-scale systems. Goals of the project were to support analysis of massive multi-scale parallelism, heterogeneous architectures, multi-faceted performance concerns, and to support both post-mortem performance analysis to identify program features that contribute to problematic performance and on-line performance analysis to drive adaptation. This final report summarizes the research and development activity at Rice University as part of the PIPER project. Producing a complete suite of performance tools for exascale platforms during the course of this project was impossible since bothmore » hardware and software for exascale systems is still a moving target. For that reason, the project focused broadly on the development of new techniques for measurement and analysis of performance on modern parallel architectures, enhancements to HPCToolkit’s software infrastructure to support our research goals or use on sophisticated applications, engaging developers of multithreaded runtimes to explore how support for tools should be integrated into their designs, engaging operating system developers with feature requests for enhanced monitoring support, engaging vendors with requests that they add hardware measure- ment capabilities and software interfaces needed by tools as they design new components of HPC platforms including processors, accelerators and networks, and finally collaborations with partners interested in using HPCToolkit to analyze and tune scalable parallel applications.« less

Performance/price estimates for cortex-scale hardware: a design space exploration.

PubMed

Zaveri, Mazad S; Hammerstrom, Dan

2011-04-01

In this paper, we revisit the concept of virtualization. Virtualization is useful for understanding and investigating the performance/price and other trade-offs related to the hardware design space. Moreover, it is perhaps the most important aspect of a hardware design space exploration. Such a design space exploration is a necessary part of the study of hardware architectures for large-scale computational models for intelligent computing, including AI, Bayesian, bio-inspired and neural models. A methodical exploration is needed to identify potentially interesting regions in the design space, and to assess the relative performance/price points of these implementations. As an example, in this paper we investigate the performance/price of (digital and mixed-signal) CMOS and hypothetical CMOL (nanogrid) technology based hardware implementations of human cortex-scale spiking neural systems. Through this analysis, and the resulting performance/price points, we demonstrate, in general, the importance of virtualization, and of doing these kinds of design space explorations. The specific results suggest that hybrid nanotechnology such as CMOL is a promising candidate to implement very large-scale spiking neural systems, providing a more efficient utilization of the density and storage benefits of emerging nano-scale technologies. In general, we believe that the study of such hypothetical designs/architectures will guide the neuromorphic hardware community towards building large-scale systems, and help guide research trends in intelligent computing, and computer engineering. Copyright © 2010 Elsevier Ltd. All rights reserved.

Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

NASA Technical Reports Server (NTRS)

Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

2013-01-01

This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

Propulsion/flight control integration technology (PROFIT) design analysis status

NASA Technical Reports Server (NTRS)

Carlin, C. M.; Hastings, W. J.

1978-01-01

The propulsion flight control integration technology (PROFIT) program was designed to develop a flying testbed dedicated to controls research. The preliminary design, analysis, and feasibility studies conducted in support of the PROFIT program are reported. The PROFIT system was built around existing IPCS hardware. In order to achieve the desired system flexibility and capability, additional interfaces between the IPCS hardware and F-15 systems were required. The requirements for additions and modifications to the existing hardware were defined. Those interfaces involving the more significant changes were studied. The DCU memory expansion to 32K with flight qualified hardware was completed on a brassboard basis. The uplink interface breadboard and a brassboard of the central computer interface were also tested. Two preliminary designs and corresponding program plans are presented.

An approach to the design and implementation of spacecraft attitude control systems

NASA Technical Reports Server (NTRS)

ODonnell, James R., Jr.; Mangus, David J.

1998-01-01

Over 39 years and a long list of missions, the guidance, navigation, and control (GN&C) groups at the Goddard Space Flight Center have gradually developed approaches to the design and implementation of successful spacecraft attitude control systems. With the recent creation of the Guidance, Navigation, and Control Center at Goddard, there is a desire to document some of these design practices to help to ensure their consistent application in the future. In this paper, we will discuss the beginnings of this effort, drawing primarily on the experience of one of the past attitude control system (ACS) groups at Goddard (what was formerly known as Code 712, the Guidance, Navigation, and Control Branch). We will discuss the analysis and design methods and criteria used, including guidelines for linear and nonlinear analysis, as well as the use of low- and high-fidelity simulation for system design and verification of performance. Descriptions of typical ACS sensor and actuator hardware will be shown, and typical sensor/actuator suites for a variety of mission types detailed. A description of the software and hardware test effort will be given, along with an attempt to make some qualitative estimates on how much effort is involved. The spacecraft and GN&C subsystem review cycles will be discussed, giving an outline of what design reviews are typically held and what information should be presented at each stage. Finally, we will point out some of the lessons learned at Goddard.

An Approach to the Design and Implementation of Spacecraft Attitude Control Systems

NASA Technical Reports Server (NTRS)

ODonnell, James R., Jr.; Mangus, David J.

1998-01-01

Over 39 years and a long list of missions, the guidance, navigation, and control (GN&C) groups at the Goddard Space Flight Center have gradually developed approaches to the design and implementation of successful spacecraft attitude control systems. With the recent creation of the Guidance, Navigation, and Control Center at Goddard, there is a desire to document some of these design practices to help to ensure their consistent application in the future. In this paper, we will discuss the beginnings of this effort, drawing primarily on the experience of one of the past attitude control system (ACS) groups at Goddard (what was formerly known as Code 712, the Guidance, Navigation, and Control Branch). We will discuss the analysis and design methods and criteria used, including guidelines for linear and nonlinear analysis, as well as the use of low- and high-fidelity simulation for system design and verification of performance. Descriptions of typical ACS sensor and actuator hardware will be shown, and typical sensor/actuator suites for a variety of mission types detailed. A description of the software and hardware test effort will be given, along with an attempt to make some qualitative estimates on how much effort is involved. The spacecraft and GN&C subsystem review cycles will be discussed, giving an outline of what design reviews are typically held and .what information should be presented at each stage. Finally, we will point out some of the lessons learned at Goddard.

Real-time optimizations for integrated smart network camera

NASA Astrophysics Data System (ADS)

Desurmont, Xavier; Lienard, Bruno; Meessen, Jerome; Delaigle, Jean-Francois

2005-02-01

We present an integrated real-time smart network camera. This system is composed of an image sensor, an embedded PC based electronic card for image processing and some network capabilities. The application detects events of interest in visual scenes, highlights alarms and computes statistics. The system also produces meta-data information that could be shared between other cameras in a network. We describe the requirements of such a system and then show how the design of the system is optimized to process and compress video in real-time. Indeed, typical video-surveillance algorithms as background differencing, tracking and event detection should be highly optimized and simplified to be used in this hardware. To have a good adequation between hardware and software in this light embedded system, the software management is written on top of the java based middle-ware specification established by the OSGi alliance. We can integrate easily software and hardware in complex environments thanks to the Java Real-Time specification for the virtual machine and some network and service oriented java specifications (like RMI and Jini). Finally, we will report some outcomes and typical case studies of such a camera like counter-flow detection.

FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine

NASA Astrophysics Data System (ADS)

Zaitsu, Kazuya; Yamamoto, Koji; Kuroda, Yasuto; Inoue, Kazunari; Ata, Shingo; Oka, Ikuo

Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on routers. However, TCAM has potential problems in terms of hardware and power costs, which limits its ability to deploy large amounts of capacity in IP routers. In this paper, we propose new hardware architecture for fast forwarding engines, called fast prefix search RAM-based hardware (FPS-RAM). We designed FPS-RAM hardware with the intent of maintaining the same search performance and physical user interface as TCAM because our objective is to replace the TCAM in the market. Our RAM-based hardware architecture is completely different from that of TCAM and has dramatically reduced the costs and power consumption to 62% and 52%, respectively. We implemented FPS-RAM on an FPGA to examine its lookup operation.

Functional design specification for Stowage List And Hardware Tracking System (SLAHTS). [space shuttles

NASA Technical Reports Server (NTRS)

Keltner, D. J.

1975-01-01

This functional design specification defines the total systems approach to meeting the requirements stated in the Detailed Requirements Document for Stowage List and Hardware Tracking System for the space shuttle program. The stowage list and hardware tracking system is identified at the system and subsystem level with each subsystem defined as a function of the total system.

Hardware Development Process for Human Research Facility Applications

NASA Technical Reports Server (NTRS)

Bauer, Liz

2000-01-01

The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. The source of hardware requirements is the science community and HRF program. The HRF Science Working Group, consisting of SCientists from various medical disciplines, defined a basic set of equipment with functional requirements. This established the performance requirements of the hardware. HRF program requirements focus on making the hardware safe and operational in a space environment. This includes structural, thermal, human factors, and material requirements. Science and HRF program requirements are defined in a hardware requirements document which includes verification methods. Once the hardware is fabricated, requirements are verified by inspection, test, analysis, or demonstration. All data is compiled and reviewed to certify the hardware for flight. Obviously, the basis for all hardware development activities is requirement definition. Full and complete requirement definition is ideal prior to initiating the hardware development. However, this is generally not the case, but the hardware team typically has functional inputs as a guide. The first step is for engineers to conduct market research based on the functional inputs provided by scientists. CommerCially available products are evaluated against the science requirements as well as modifications needed to meet program requirements. Options are consolidated and the hardware development team reaches a hardware development decision point. Within budget and schedule constraints, the team must decide whether or not to complete the hardware as an in-house, subcontract with vendor, or commercial-off-the-shelf (COTS) development. An in-house development indicates NASA personnel or a contractor builds the hardware at a NASA site. A subcontract development is completed off-site by a commercial company. A COTS item is a vendor product available by ordering a specific part number. The team evaluates the pros and cons of each development path. For example, in-bouse developments utilize existing corporate knowledge regarding bow to build equipment for use in space. However, technical expertise would be required to fully understand the medical equipment capabilities, such as for an ultrasound system. It may require additional time and funding to gain the expertise that commercially exists. The major benefit of subcontracting a hardware development is the product is delivered as an end-item and commercial expertise is utilized. On the other hand, NASA has limited control over schedule delays. The final option of COTS or modified COTS equipment is a compromise between in-house and subcontracts. A vendor product may exist that meets all functional requirements but req uires in-house modifications for successful operation in a space environment. The HRF utilizes equipment developed using all of the paths described: inhouse, subcontract, and modified COTS.

Airborne Electro-Optical Sensor Simulation System. Final Report.

ERIC Educational Resources Information Center

Hayworth, Don

The total system capability, including all the special purpose and general purpose hardware comprising the Airborne Electro-Optical Sensor Simulation (AEOSS) System, is described. The functional relationship between hardware portions is described together with interface to the software portion of the computer image generation. Supporting rationale…

Virtual Reality as Innovative Approach to the Interior Designing

NASA Astrophysics Data System (ADS)

Kaleja, Pavol; Kozlovská, Mária

2017-06-01

We can observe significant potential of information and communication technologies (ICT) in interior designing field, by development of software and hardware virtual reality tools. Using ICT tools offer realistic perception of proposal in its initial idea (the study). A group of real-time visualization, supported by hardware tools like Oculus Rift HTC Vive, provides free walkthrough and movement in virtual interior with the possibility of virtual designing. By improving of ICT software tools for designing in virtual reality we can achieve still more realistic virtual environment. The contribution presented proposal of an innovative approach of interior designing in virtual reality, using the latest software and hardware ICT virtual reality technologies

Computer architecture for efficient algorithmic executions in real-time systems: New technology for avionics systems and advanced space vehicles

NASA Technical Reports Server (NTRS)

Carroll, Chester C.; Youngblood, John N.; Saha, Aindam

1987-01-01

Improvements and advances in the development of computer architecture now provide innovative technology for the recasting of traditional sequential solutions into high-performance, low-cost, parallel system to increase system performance. Research conducted in development of specialized computer architecture for the algorithmic execution of an avionics system, guidance and control problem in real time is described. A comprehensive treatment of both the hardware and software structures of a customized computer which performs real-time computation of guidance commands with updated estimates of target motion and time-to-go is presented. An optimal, real-time allocation algorithm was developed which maps the algorithmic tasks onto the processing elements. This allocation is based on the critical path analysis. The final stage is the design and development of the hardware structures suitable for the efficient execution of the allocated task graph. The processing element is designed for rapid execution of the allocated tasks. Fault tolerance is a key feature of the overall architecture. Parallel numerical integration techniques, tasks definitions, and allocation algorithms are discussed. The parallel implementation is analytically verified and the experimental results are presented. The design of the data-driven computer architecture, customized for the execution of the particular algorithm, is discussed.

A simple approach to a vision-guided unmanned vehicle

NASA Astrophysics Data System (ADS)

Archibald, Christopher; Millar, Evan; Anderson, Jon D.; Archibald, James K.; Lee, Dah-Jye

2005-10-01

This paper describes the design and implementation of a vision-guided autonomous vehicle that represented BYU in the 2005 Intelligent Ground Vehicle Competition (IGVC), in which autonomous vehicles navigate a course marked with white lines while avoiding obstacles consisting of orange construction barrels, white buckets and potholes. Our project began in the context of a senior capstone course in which multi-disciplinary teams of five students were responsible for the design, construction, and programming of their own robots. Each team received a computer motherboard, a camera, and a small budget for the purchase of additional hardware, including a chassis and motors. The resource constraints resulted in a simple vision-based design that processes the sequence of images from the single camera to determine motor controls. Color segmentation separates white and orange from each image, and then the segmented image is examined using a 10x10 grid system, effectively creating a low resolution picture for each of the two colors. Depending on its position, each filled grid square influences the selection of an appropriate turn magnitude. Motor commands determined from the white and orange images are then combined to yield the final motion command for video frame. We describe the complete algorithm and the robot hardware and we present results that show the overall effectiveness of our control approach.

Computer architecture for efficient algorithmic executions in real-time systems: new technology for avionics systems and advanced space vehicles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carroll, C.C.; Youngblood, J.N.; Saha, A.

1987-12-01

Improvements and advances in the development of computer architecture now provide innovative technology for the recasting of traditional sequential solutions into high-performance, low-cost, parallel system to increase system performance. Research conducted in development of specialized computer architecture for the algorithmic execution of an avionics system, guidance and control problem in real time is described. A comprehensive treatment of both the hardware and software structures of a customized computer which performs real-time computation of guidance commands with updated estimates of target motion and time-to-go is presented. An optimal, real-time allocation algorithm was developed which maps the algorithmic tasks onto the processingmore » elements. This allocation is based on the critical path analysis. The final stage is the design and development of the hardware structures suitable for the efficient execution of the allocated task graph. The processing element is designed for rapid execution of the allocated tasks. Fault tolerance is a key feature of the overall architecture. Parallel numerical integration techniques, tasks definitions, and allocation algorithms are discussed. The parallel implementation is analytically verified and the experimental results are presented. The design of the data-driven computer architecture, customized for the execution of the particular algorithm, is discussed.« less

An executable specification for the message processor in a simple combining network

NASA Technical Reports Server (NTRS)

Middleton, David

1995-01-01

While the primary function of the network in a parallel computer is to communicate data between processors, it is often useful if the network can also perform rudimentary calculations. That is, some simple processing ability in the network itself, particularly for performing parallel prefix computations, can reduce both the volume of data being communicated and the computational load on the processors proper. Unfortunately, typical implementations of such networks require a large fraction of the hardware budget, and so combining networks are viewed as being impractical. The FFP Machine has such a combining network, and various characteristics of the machine allow a good deal of simplification in the network design. Despite being simple in construction however, the network relies on many subtle details to work correctly. This paper describes an executable model of the network which will serve several purposes. It provides a complete and detailed description of the network which can substantiate its ability to support necessary functions. It provides an environment in which algorithms to be run on the network can be designed and debugged more easily than they would on physical hardware. Finally, it provides the foundation for exploring the design of the message receiving facility which connects the network to the individual processors.

A review of principles in design and usability testing of tactile technology for individuals with visual impairments.

PubMed

Horton, Emily L; Renganathan, Ramkesh; Toth, Bryan N; Cohen, Alexa J; Bajcsy, Andrea V; Bateman, Amelia; Jennings, Mathew C; Khattar, Anish; Kuo, Ryan S; Lee, Felix A; Lim, Meilin K; Migasiuk, Laura W; Zhang, Amy; Zhao, Oliver K; Oliveira, Marcio A

2017-01-01

To lay the groundwork for devising, improving, and implementing new technologies to meet the needs of individuals with visual impairments, a systematic literature review was conducted to: a) describe hardware platforms used in assistive devices, b) identify their various applications, and c) summarize practices in user testing conducted with these devices. A search in relevant EBSCO databases for articles published between 1980 and 2014 with terminology related to visual impairment, technology, and tactile sensory adaptation yielded 62 articles that met the inclusion criteria for final review. It was found that while earlier hardware development focused on pin matrices, the emphasis then shifted toward force feedback haptics and accessible touch screens. The inclusion of interactive and multimodal features has become increasingly prevalent. The quantity and consistency of research on navigation, education, and computer accessibility suggest that these are pertinent areas of need for the visually impaired community. Methodologies for usability testing ranged from case studies to larger cross-sectional studies. Many studies used blindfolded sighted users to draw conclusions about design principles and usability. Altogether, the findings presented in this review provide insight on effective design strategies and user testing methodologies for future research on assistive technology for individuals with visual impairments.

Door Hardware and Installations; Carpentry: 901894.

ERIC Educational Resources Information Center

Dade County Public Schools, Miami, FL.

The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

Advanced Command Destruct System (ACDS) Enhanced Flight Termination System (EFTS)

NASA Technical Reports Server (NTRS)

Tow, David

2009-01-01

NASA Dryden started working towards a single vehicle enhanced flight termination system (EFTS) in January 2008. NASA and AFFTC combined their efforts to work towards final operating capability for multiple vehicle and multiple missions simultaneously, to be completed by the end of 2011. Initially, the system was developed to support one vehicle and one frequency per mission for unmanned aerial vehicles (UAVs) at NASA Dryden. By May 2008 95% of design and hardware builds were completed, however, NASA Dryden's change of software safety scope and requirements caused delays after May 2008. This presentation reviews the initial and final operating capabilities for the Advanced Command Destruct System (ACDS), including command controller and configuration software development. A requirements summary is also provided.

Design, Fabrication, and Testing of a Composite Rack Prototype in Support of the Deep Space Habitat Program

NASA Technical Reports Server (NTRS)

Smith, Russ; Hagen, Richard

2015-01-01

In support of the Deep Space Habitat project a number of composite rack prototypes were developed, designed, fabricated and tested to various extents ( with the International Standard Payload Rack configuration, or crew quarters, as a baseline). This paper focuses specifically on a composite rack prototype with a direct tie in to Space Station hardware. The outlined prototype is an all composite construction, excluding metallic fasteners, washers, and their associated inserts. The rack utilizes braided carbon composite tubing for the frame with the sidewalls, backwall and flooring sections utilizing aircraft grade composite honeycomb sandwich panels. Novel additively manufactured thermoplastic joints and tube inserts were also developed in support of this effort. Joint and tube insert screening tests were conducted at a preliminary level. The screening tests allowed for modification, and enhancement, of the fabrication and design approaches, which will be outlined. The initial joint tests did not include mechanical fasteners. Adhesives were utilized at the joint to composite tube interfaces, along with mechanical fasteners during final fabrication (thus creating a stronger joint than the adhesive only variant). In general the prototype was focused on a potential in-space assembly approach, or kit-of-parts construction concept, which would not necessarily require the inclusion of an adhesive in the joint regions. However, given the tie in to legacy Station hardware (and potential flight loads with imbedded hardware mass loadings), the rack was built as stiff and strong as possible. Preliminary torque down tests were also conducted to determine the feasibility of mounting the composite honeycomb panels to the composite tubing sections via the additively manufactured tube inserts. Additional fastener torque down tests were also conducted with inserts (helicoils) imbedded within the joints. Lessons learned are also included and discussed.

Integration of a Portfolio-based Approach to Evaluate Aerospace R and D Problem Formulation Into a Parametric Synthesis Tool

NASA Astrophysics Data System (ADS)

Oza, Amit R.

The focus of this study is to improve R&D effectiveness towards aerospace and defense planning in the early stages of the product development lifecycle. Emphasis is on: correct formulation of a decision problem, with special attention to account for data relationships between the individual design problem and the system capability required to size the aircraft, understanding of the meaning of the acquisition strategy objective and subjective data requirements that are required to arrive at a balanced analysis and/or "correct" mix of technology projects, understanding the meaning of the outputs that can be created from the technology analysis, and methods the researcher can use at effectively support decisions at the acquisition and conceptual design levels through utilization of a research and development portfolio strategy. The primary objectives of this study are to: (1) determine what strategy should be used to initialize conceptual design parametric sizing processes during requirements analysis for the materiel solution analysis stage of the product development lifecycle when utilizing data already constructed in the latter phase when working with a generic database management system synthesis tool integration architecture for aircraft design , and (2) assess how these new data relationships can contribute for innovative decision-making when solving acquisition hardware/technology portfolio problems. As such, an automated composable problem formulation system is developed to consider data interactions for the system architecture that manages acquisition pre-design concept refinement portfolio management, and conceptual design parametric sizing requirements. The research includes a way to: • Formalize the data storage and implement the data relationship structure with a system architecture automated through a database management system. • Allow for composable modeling, in terms of level of hardware abstraction, for the product model, mission model, and operational constraint model data blocks in the pre-design stages. • Allow the product model, mission model, and operational constraint model to be cross referenced with a generic aircraft synthesis capability to identify disciplinary analysis methods and processes. • Allow for matching, comparison, and balancing of the aircraft hardware portfolio to the associated developmental and technology risk metrics. • Allow for visualization technology portfolio decision space. The problem formulation architecture is finally implemented and verified for a generic hypersonic vehicle research demonstrator where a portfolio of technology hardware are measured for developmental and technology risks, prioritized by the researcher risk constraints, and the data generated delivered to a novel aircraft synthesis tool to confirm vehicle feasibility.

Satellite Communication Hardware Emulation System (SCHES)

NASA Technical Reports Server (NTRS)

Kaplan, Ted

1993-01-01

Satellite Communication Hardware Emulator System (SCHES) is a powerful simulator that emulates the hardware used in TDRSS links. SCHES is a true bit-by-bit simulator that models communications hardware accurately enough to be used as a verification mechanism for actual hardware tests on user spacecraft. As a credit to its modular design, SCHES is easily configurable to model any user satellite communication link, though some development may be required to tailor existing software to user specific hardware.

Real-Time Data Processing Onboard Remote Sensor Platforms: Annual Review #3 Data Package

NASA Technical Reports Server (NTRS)

Cook, Sid; Harsanyi, Joe

2003-01-01

The current program status reviewed by this viewgraph presentation includes: 1) New Evaluation Results; 2) Algorithm Improvement Investigations; 3) Electronic Hardware Design; 4) Software Hardware Interface Design.

Verification of the FtCayuga fault-tolerant microprocessor system. Volume 1: A case study in theorem prover-based verification

NASA Technical Reports Server (NTRS)

Srivas, Mandayam; Bickford, Mark

1991-01-01

The design and formal verification of a hardware system for a task that is an important component of a fault tolerant computer architecture for flight control systems is presented. The hardware system implements an algorithm for obtaining interactive consistancy (byzantine agreement) among four microprocessors as a special instruction on the processors. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, provided certain preconditions hold. An assumption is made that the processors execute synchronously. For verification, the authors used a computer aided design hardware design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover.

Advanced Analog Signal Processing for Fuzing Final Report CRADA No. TC-1306-96

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fu, C. Y.; Spencer, D.

The purpose of this CRADA between LLNL and Kaman Aerospace/Raymond Engineering Operations (Raymond) was to demonstrate the feasibility of using Analog/Digital Neural Network (ANN) Technology for advanced signal processing, fuzing, and other applications. This cooperation sought to Ieverage the expertise and capabilities of both parties--Raymond to develop the signature recognition hardware system, using Raymond’s extensive experience in the area of system development plus Raymond’s knowledge of military applications, and LLNL to apply ANN and related technologies to an area of significant interest to the United States government. This CRADA effort was anticipated to be a three-year project consisting of threemore » phases: Phase I, Proof-of-Principle Demonstration; Phase II, Proof-of-Design, involving the development of a form-factored integrated sensor and ANN technology processo~ and Phase III, Final Design and Release of the integrated sensor and ANN fabrication process: Under Phase I, to be conducted during calendar year 1996, Raymond was to deliver to LLNL an architecture (design) for an ANN chip. LLNL was to translate the design into a stepper mask and to produce and test a prototype chip from the Raymond design.« less

A spacecraft computer repairable via command.

NASA Technical Reports Server (NTRS)

Fimmel, R. O.; Baker, T. E.

1971-01-01

The MULTIPAC is a central data system developed for deep-space probes with the distinctive feature that it may be repaired during flight via command and telemetry links by reprogramming around the failed unit. The computer organization uses pools of identical modules which the program organizes into one or more computers called processors. The interaction of these modules is dynamically controlled by the program rather than hardware. In the event of a failure, new programs are entered which reorganize the central data system with a somewhat reduced total processing capability aboard the spacecraft. Emphasis is placed on the evolution of the system architecture and the final overall system design rather than the specific logic design.

Final Report: Enabling Exascale Hardware and Software Design through Scalable System Virtualization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bridges, Patrick G.

2015-02-01

In this grant, we enhanced the Palacios virtual machine monitor to increase its scalability and suitability for addressing exascale system software design issues. This included a wide range of research on core Palacios features, large-scale system emulation, fault injection, perfomrance monitoring, and VMM extensibility. This research resulted in large number of high-impact publications in well-known venues, the support of a number of students, and the graduation of two Ph.D. students and one M.S. student. In addition, our enhanced version of the Palacios virtual machine monitor has been adopted as a core element of the Hobbes operating system under active DOE-fundedmore » research and development.« less

Water recovery and solid waste processing for aerospace and domestic applications. Volume 1: Final report

NASA Technical Reports Server (NTRS)

Murray, R. W.

1973-01-01

A comprehensive study of advanced water recovery and solid waste processing techniques employed in both aerospace and domestic or commercial applications is reported. A systems approach was used to synthesize a prototype system design of an advanced water treatment/waste processing system. Household water use characteristics were studied and modified through the use of low water use devices and a limited amount of water reuse. This modified household system was then used as a baseline system for development of several water treatment waste processing systems employing advanced techniques. A hybrid of these systems was next developed and a preliminary design was generated to define system and hardware functions.

Hybrid Vehicle Program. Final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

1984-06-01

This report summarizes the activities on the Hybrid Vehicle Program. The program objectives and the vehicle specifications are reviewed. The Hybrid Vehicle has been designed so that maximum use can be made of existing production components with a minimum compromise to program goals. The program status as of the February 9-10 Hardware Test Review is presented, and discussions of the vehicle subsystem, the hybrid propulsion subsystem, the battery subsystem, and the test mule programs are included. Other program aspects included are quality assurance and support equipment. 16 references, 132 figures, 47 tables.

Feasiblity study for a 34 GHz (Ka band) gyroamplifier

NASA Technical Reports Server (NTRS)

Stone, D. S.; Bier, R. E.; Caplan, M.; Huey, H. E.; Pirkle, D. R.; Robinson, J. D.; Thompson, L.

1984-01-01

The feasibility of using a gyroklystron power tube as the final amplifier in a 400 kW CW 34 GHz transmitter on the Goldstone Antenna is investigated. A conceptual design of the gyroklystron and the transmission line connecting it with the antenna feed horn is presented. The performance characteristics of the tube and transmission line are compared to the transmitter requirements for a deep space radar system. Areas of technical risk for a follow-on hardware development program for the gyroklystron amplifier and overmoded transmission line components are discussed.

Digital Hardware Design Teaching: An Alternative Approach

ERIC Educational Resources Information Center

Benkrid, Khaled; Clayton, Thomas

2012-01-01

This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

Design verification and fabrication of active control systems for the DAST ARW-2 high aspect ratio wing, part 1

NASA Technical Reports Server (NTRS)

Mcgehee, C. R.

1986-01-01

A study was conducted under Drones for Aerodynamic and Structural Testing (DAST) program to accomplish the final design and hardware fabrication for four active control systems compatible with and ready for installation in the NASA Aeroelastic Research Wing No. 2 (ARW-2) and Firebee II drone flight test vehicle. The wing structure was designed so that Active Control Systems (ACS) are required in the normal flight envelope by integrating control system design with aerodynamics and structure technologies. The DAST ARW-2 configuration uses flutter suppression, relaxed static stability, and gust and maneuver load alleviation ACS systems, and an automatic flight control system. Performance goals and criteria were applied to individual systems and the systems collectively to assure that vehicle stability margins, flutter margins, flying qualities and load reductions are achieved.

Human factor implications of the Eurocopter AS332L-1 Super Puma cockpit

NASA Technical Reports Server (NTRS)

Padfield, R. Randall

1993-01-01

The purpose of this paper is to identify and describe some of the human factor problems which can occur in the cockpit of a modern civilian helicopter. After examining specific hardware and software problems in the cockpit design of the Eurocopter (Aerospatiale) AS332L-1 Super Puma, the author proposes several principles that can be used to avoid similar human factors problems in the design of future cockpits. These principles relate to the use and function of warning lights, the design of autopilots in two-pilot aircraft, and the labeling of switches and warning lights, specifically with respect to abbreviations and translations from languages other than English. In the final section of the paper, the author describes current trends in society which he suggests should be taken into consideration when designing future aircraft cockpits.

The HEAO experience - design through operations

NASA Technical Reports Server (NTRS)

Hoffman, D. P.

1983-01-01

The design process and performance of the NASA High Energy Astronomy Observatories (HEAO-1, 2, and 3) are surveyed from the initiation of the program in 1968 through the end of HEAO-3 operation in May, 1981, with a focus on the attitude control and determination subsystem (ACDS). The science objectives, original and revised overall design concepts, final design for each spacecraft, and details of the ACDS designs are discussed, and the stages of the ACDS design process, including redefinition to achieve 50 percent cost reduction, detailed design of common and mission-unique hardware and software, unit qualification, subsystem integration, and observatory-level testing, are described. Overall and ACDS performance is evaluated for each mission and found to meet or exceed design requirements despite some difficulties arising from errors in startracker-ACDS-interface coordination and from gyroscope failures. These difficulties were resolved by using the flexibility of the software design. The implicationns of the HEAO experience for the design process of future spacecraft are suggested.

Fifty Years of Observing Hardware and Human Behavior

NASA Technical Reports Server (NTRS)

McMann, Joe

2011-01-01

During this half-day workshop, Joe McMann presented the lessons learned during his 50 years of experience in both industry and government, which included all U.S. manned space programs, from Mercury to the ISS. He shared his thoughts about hardware and people and what he has learned from first-hand experience. Included were such topics as design, testing, design changes, development, failures, crew expectations, hardware, requirements, and meetings.

A Framework for an Automated Compilation System for Reconfigurable Architectures

DTIC Science & Technology

1997-03-01

HDLs, Hardware C requires the designer to be thoroughly familiar with digital hardware design. 48 Vahid, Gong, and Gajski focus on the partitioning...of hardware used. Vahid, Gong, and Gajski suggest that the greedy approach used by Gupta and De Micheli is easily trapped in local minimums [46:216...iterative algorithm. To overcome this limitation, the Vahid, Gong, and Gajski suggest a binary constraint partitioning approach. The partitioning

Environmental qualification testing of payload G-534, the Pool Boiling Experiment

NASA Technical Reports Server (NTRS)

Sexton, J. Andrew

1992-01-01

Payload G-534, the prototype Pool Boiling Experiment (PBE), is scheduled to fly on the STS-47 mission in September 1992. This paper describes the purpose of the experiment and the environmental qualification testing program that was used to prove the integrity of the hardware. Component and box level vibration and thermal cycling tests were performed to give an early level of confidence in the hardware designs. At the system level, vibration, thermal extreme soaks, and thermal vacuum cycling tests were performed to qualify the complete design for the expected shuttle environment. The system level vibration testing included three axis sine sweeps and random inputs. The system level hot and cold soak tests demonstrated the hardware's capability to operate over a wide range of temperatures and gave wider latitude in determining which shuttle thermal attitudes were compatible with the experiment. The system level thermal vacuum cycling tests demonstrated the hardware's capability to operate in a convection free environment. A unique environmental chamber was designed and fabricated by the PBE team and allowed most of the environmental testing to be performed within the hardware build laboratory. The completion of the test program gave the project team high confidence in the hardware's ability to function as designed during flight.

Readiness of the ATLAS Trigger and Data Acquisition system for the first LHC beams

NASA Astrophysics Data System (ADS)

Vandelli, W.; Atlas Tdaq Collaboration

2009-12-01

The ATLAS Trigger and Data Acquisition (TDAQ) system is based on O(2k) processing nodes, interconnected by a multi-layer Gigabit network, and consists of a combination of custom electronics and commercial products. In its final configuration, O(20k) applications will provide the needed capabilities in terms of event selection, data flow, local storage and data monitoring. In preparation for the first LHC beams, many TDAQ sub-systems already reached the final configuration and roughly one third of the final processing power has been deployed. Therefore, the current system allows for a sensible evaluation of the performance and scaling properties. In this paper we introduce the ATLAS TDAQ system requirements and architecture and we discuss the status of software and hardware component. We moreover present the results of performance measurements validating the system design and providing a figure for the ATLAS data acquisition capabilities in the initial data taking period.

Design Report for Low Power Acoustic Detector

DTIC Science & Technology

2013-08-01

high speed integrated circuit (VHSIC) hardware description language ( VHDL ) implementation of both the HED and DCD detectors. Figures 4 and 5 show the...the hardware design, target detection algorithm design in both MATLAB and VHDL , and typical performance results. 15. SUBJECT TERMS Acoustic low...5 2.4 Algorithm Implementation ..............................................................................................6 3. Testing

Design considerations for space flight hardware

NASA Technical Reports Server (NTRS)

Glover, Daniel

1990-01-01

The environmental and design constraints are reviewed along with some insight into the established design and quality assurance practices that apply to low earth orbit (LEO) space flight hardware. It is intended as an introduction for people unfamiliar with space flight considerations. Some basic data and a bibliography are included.

The Cryogenic, High-Accuracy, Refraction Measuring System (CHARMS): A New Facility for Cryogenic Infrared through Vacuum Far-Ultraviolet Refractive Index Measurements

NASA Technical Reports Server (NTRS)

Frey, Bradley J.; Leviton, Douglas B.

2004-01-01

The optical designs of future NASA infrared (IR) missions and instruments, such as the James Webb Space Telescope's (JWST) Near-Mixed Camera (NIRCam), will rely on accurate knowledge of the index of refraction of various IR optical materials at cryogenic temperatures. To meet this need, we have developed a Cryogenic, High-Accuracy Refraction Measuring System (CHARMS). In this paper we discuss the completion of the design and construction of CHARMS as well as the engineering details that constrained the final design and hardware implementation. In addition, we will present our first light, cryogenic, IR index of refraction data for LiF, BaF2, and CaF2, and compare our results to previously published data for these materials.

Multichannel reconfigurable measurement system for hot plasma diagnostics based on GEM-2D detector

NASA Astrophysics Data System (ADS)

Wojenski, A. J.; Kasprowicz, G.; Pozniak, K. T.; Byszuk, A.; Chernyshova, M.; Czarski, T.; Jablonski, S.; Juszczyk, B.; Zienkiewicz, P.

2015-12-01

In the future magnetically confined fusion research reactors (e.g. ITER tokamak), precise determination of the level of the soft X-ray radiation of plasma with temperature above 30 keV (around 350 mln K) will be very important in plasma parameters optimization. This paper presents the first version of a designed spectrography measurement system. The system is already installed at JET tokamak. Based on the experience gained from the project, the new generation of hardware for spectrography measurements, was designed and also described in the paper. The GEM detector readout structure was changed to 2D in order to perform measurements of i.e. laser generated plasma. The hardware structure of the system was redesigned in order to provide large number of high speed input channels. Finally, this paper also covers the issue of new control software, necessary to set-up a complete system of certain complexity and perform data acquisition. The main goal of the project was to develop a new version of the system, which includes upgraded structure and data transmission infrastructure (i.e. handling large number of measurement channels, high sampling rate).

Diagnostic and Hardware Upgrades for the US-PRC PMI Collaboration on EAST

NASA Astrophysics Data System (ADS)

Tritz, Kevin; Maingi, R.; Andruczyk, D.; Canik, J.; Wang, Z.; Wirth, B.; Zinkle, S.; Woller, K.; Hu, J. S.; Luo, G. N.; Gong, X. Z.; EAST Team

2017-10-01

Several collaborative diagnostic and hardware upgrades are planned to improve understanding and control of Plasma-Material Interactions on EAST, as part of the US-PRC PMI collaboration. Dual-band thermography adapters, designed by UT-K and ORNL, are being designed for existing IR cameras to improve the accuracy of the divertor heat flux measurements by reducing sensitivity to surface emissivity. These measurements should improve power accounting for EAST discharges, which can show a large gap between input power and divertor exhaust power. MIT is preparing tungsten tiles with fluorine depth markers to measure net erosion of PFC tiles. JHU plans to improve the electronics of the Multi-Energy Soft X-ray diagnostic as well as expand the present edge system to a full core-edge measurement; this will enhance the assessment of the effect of Li injection on tungsten accumulation and transport. In addition to PPPL-developed upgrades to the lithium granule and pellet delivery systems, LANL is assessing core-shell micropellets for pellet ablation analysis. Finally, UIUC and PPPL are developing flowing liquid lithium limiters, both with and without LiMIT tile features, for deployment on EAST. Work supported by DoE award DE-SC0016553.

Without Gravity: Designing Science Equipment for the International Space Station and Beyond

NASA Technical Reports Server (NTRS)

Sato, Kevin Y.

2016-01-01

This presentation discusses space biology research, the space flight factors needed to design hardware to conduct biological science in microgravity, and examples of NASA and commercial hardware that enable space biology study.

Extravehicular Activity training and hardware design considerations

NASA Technical Reports Server (NTRS)

Thuot, Pierre J.; Harbaugh, Gregory J.

1993-01-01

Designing hardware that can be successfully operated by EVA astronauts for EVA tasks required to assemble and maintain Space Station Freedom requires a thorough understanding of human factors and of the capabilities and limitations of the space-suited astronaut, as well as of the effect of microgravity environment on the crew member's capabilities and on the overhead associated with EVA. This paper describes various training methods and facilities that are being designed for training EVA astronauts for Space Station assembly and maintenance, taking into account the above discussed factors. Particular attention is given to the user-friendly hardware design for EVA and to recent EVA flight experience.

Comparative Modal Analysis of Sieve Hardware Designs

NASA Technical Reports Server (NTRS)

Thompson, Nathaniel

2012-01-01

The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

Technology Transfer Challenges: A Case Study of User-Centered Design in NASA's Systems Engineering Culture

NASA Technical Reports Server (NTRS)

Quick, Jason

2009-01-01

The Upper Stage (US) section of the National Aeronautics and Space Administration's (NASA) Ares I rocket will require internal access platforms for maintenance tasks performed by humans inside the vehicle. Tasks will occur during expensive critical path operations at Kennedy Space Center (KSC) including vehicle stacking and launch preparation activities. Platforms must be translated through a small human access hatch, installed in an enclosed worksite environment, support the weight of ground operators and be removed before flight - and their design must minimize additional vehicle mass at attachment points. This paper describes the application of a user-centered conceptual design process and the unique challenges encountered within NASA's systems engineering culture focused on requirements and "heritage hardware". The NASA design team at Marshall Space Flight Center (MSFC) initiated the user-centered design process by studying heritage internal access kits and proposing new design concepts during brainstorming sessions. Simultaneously, they partnered with the Technology Transfer/Innovative Partnerships Program to research inflatable structures and dynamic scaffolding solutions that could enable ground operator access. While this creative, technology-oriented exploration was encouraged by upper management, some design stakeholders consistently opposed ideas utilizing novel, untested equipment. Subsequent collaboration with an engineering consulting firm improved the technical credibility of several options, however, there was continued resistance from team members focused on meeting system requirements with pre-certified hardware. After a six-month idea-generating phase, an intensive six-week effort produced viable design concepts that justified additional vehicle mass while optimizing the human factors of platform installation and use. Although these selected final concepts closely resemble heritage internal access platforms, challenges from the application of the user-centered process provided valuable lessons for improving future collaborative conceptual design efforts.

Generalized Maintenance Trainer Simulator: Development of Hardware and Software. Final Report.

ERIC Educational Resources Information Center

Towne, Douglas M.; Munro, Allen

A general purpose maintenance trainer, which has the potential to simulate a wide variety of electronic equipments without hardware changes or new computer programs, has been developed and field tested by the Navy. Based on a previous laboratory model, the Generalized Maintenance Trainer Simulator (GMTS) is a relatively low cost trainer that…

A Stream lined Approach for the Payload Customer in Identifying Payload Design Requirements

NASA Technical Reports Server (NTRS)

Miller, Ladonna J.; Schneider, Walter F.; Johnson, Dexer E.; Roe, Lesa B.

2001-01-01

NASA payload developers from across various disciplines were asked to identify areas where process changes would simplify their task of developing and flying flight hardware. Responses to this query included a central location for consistent hardware design requirements for middeck payloads. The multidisciplinary team assigned to review the numerous payload interface design documents is assessing the Space Shuttle middeck, the SPACEHAB Inc. locker, as well as the MultiPurpose Logistics Module (MPLM) and EXpedite the PRocessing of Experiments to Space Station (EXPRESS) rack design requirements for the payloads. They are comparing the multiple carriers and platform requirements and developing a matrix which illustrates the individual requirements, and where possible, the envelope that encompasses all of the possibilities. The matrix will be expanded to form an overall envelope that the payload developers will have the option to utilize when designing their payload's hardware. This will optimize the flexibility for payload hardware and ancillary items to be manifested on multiple carriers and platforms with minimal impact to the payload developer.

Modular hardware synthesis using an HDL. [Hardware Description Language

NASA Technical Reports Server (NTRS)

Covington, J. A.; Shiva, S. G.

1981-01-01

Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

Representation and matching of knowledge to design digital systems

NASA Technical Reports Server (NTRS)

Jones, J. U.; Shiva, S. G.

1988-01-01

A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks. To design digital hardware systems from their high level VHDL (Very High Speed Integrated Circuit Hardware Description Language) representation to their finished form, a special data representation is required. This data representation as well as the functioning of the overall system is described.

Water Processor and Oxygen Generation Assembly

NASA Technical Reports Server (NTRS)

Bedard, John

1997-01-01

This report documents the results of the tasks which initiated efforts on design issues relating to the Water Processor (WP) and the Oxygen Generation Assembly (OGA) Flight Hardware for the International Space Station. This report fulfills the Statement of Work deliverables requirement for contract H-29387D. The following lists the tasks required by contract H-29387D: (1) HSSSI shall coordinate a detailed review of WP/OGA Flight Hardware program requirements with personnel from MSFC to identify requirements that can be eliminated without affecting the technical integrity of the WP/OGA Hardware; (2) HSSSI shall conduct the technical interchanges with personnel from MSFC to resolve design issues related to WP/OGA Flight Hardware; (3) HSSSI will initiate discussions with Zellwegger Analytics, Inc. to address design issues related to WP and PCWQM interfaces.

Loads and Structural Dynamics Requirements for Spaceflight Hardware

NASA Technical Reports Server (NTRS)

Schultz, Kenneth P.

2011-01-01

The purpose of this document is to establish requirements relating to the loads and structural dynamics technical discipline for NASA and commercial spaceflight launch vehicle and spacecraft hardware. Requirements are defined for the development of structural design loads and recommendations regarding methodologies and practices for the conduct of load analyses are provided. As such, this document represents an implementation of NASA STD-5002. Requirements are also defined for structural mathematical model development and verification to ensure sufficient accuracy of predicted responses. Finally, requirements for model/data delivery and exchange are specified to facilitate interactions between Launch Vehicle Providers (LVPs), Spacecraft Providers (SCPs), and the NASA Technical Authority (TA) providing insight/oversight and serving in the Independent Verification and Validation role. In addition to the analysis-related requirements described above, a set of requirements are established concerning coupling phenomena or other interaction between structural dynamics and aerodynamic environments or control or propulsion system elements. Such requirements may reasonably be considered structure or control system design criteria, since good engineering practice dictates consideration of and/or elimination of the identified conditions in the development of those subsystems. The requirements are included here, however, to ensure that such considerations are captured in the design space for launch vehicles (LV), spacecraft (SC) and the Launch Abort Vehicle (LAV). The requirements in this document are focused on analyses to be performed to develop data needed to support structural verification. As described in JSC 65828, Structural Design Requirements and Factors of Safety for Spaceflight Hardware, implementation of the structural verification requirements is expected to be described in a Structural Verification Plan (SVP), which should describe the verification of each structural item for the applicable requirements. The requirement for and expected contents of the SVP are defined in JSC 65828. The SVP may also document unique verifications that meet or exceed these requirements with Technical Authority approval.

Applying reconfigurable hardware to the analysis of multispectral and hyperspectral imagery

NASA Astrophysics Data System (ADS)

Leeser, Miriam E.; Belanovic, Pavle; Estlick, Michael; Gokhale, Maya; Szymanski, John J.; Theiler, James P.

2002-01-01

Unsupervised clustering is a powerful technique for processing multispectral and hyperspectral images. Last year, we reported on an implementation of k-means clustering for multispectral images. Our implementation in reconfigurable hardware processed 10 channel multispectral images two orders of magnitude faster than a software implementation of the same algorithm. The advantage of using reconfigurable hardware to accelerate k-means clustering is clear; the disadvantage is the hardware implementation worked for one specific dataset. It is a non-trivial task to change this implementation to handle a dataset with different number of spectral channels, bits per spectral channel, or number of pixels; or to change the number of clusters. These changes required knowledge of the hardware design process and could take several days of a designer's time. Since multispectral data sets come in many shapes and sizes, being able to easily change the k-means implementation for these different data sets is important. For this reason, we have developed a parameterized implementation of the k-means algorithm. Our design is parameterized by the number of pixels in an image, the number of channels per pixel, and the number of bits per channel as well as the number of clusters. These parameters can easily be changed in a few minutes by someone not familiar with the design process. The resulting implementation is very close in performance to the original hardware implementation. It has the added advantage that the parameterized design compiles approximately three times faster than the original.

A design methodology for portable software on parallel computers

NASA Technical Reports Server (NTRS)

Nicol, David M.; Miller, Keith W.; Chrisman, Dan A.

1993-01-01

This final report for research that was supported by grant number NAG-1-995 documents our progress in addressing two difficulties in parallel programming. The first difficulty is developing software that will execute quickly on a parallel computer. The second difficulty is transporting software between dissimilar parallel computers. In general, we expect that more hardware-specific information will be included in software designs for parallel computers than in designs for sequential computers. This inclusion is an instance of portability being sacrificed for high performance. New parallel computers are being introduced frequently. Trying to keep one's software on the current high performance hardware, a software developer almost continually faces yet another expensive software transportation. The problem of the proposed research is to create a design methodology that helps designers to more precisely control both portability and hardware-specific programming details. The proposed research emphasizes programming for scientific applications. We completed our study of the parallelizability of a subsystem of the NASA Earth Radiation Budget Experiment (ERBE) data processing system. This work is summarized in section two. A more detailed description is provided in Appendix A ('Programming Practices to Support Eventual Parallelism'). Mr. Chrisman, a graduate student, wrote and successfully defended a Ph.D. dissertation proposal which describes our research associated with the issues of software portability and high performance. The list of research tasks are specified in the proposal. The proposal 'A Design Methodology for Portable Software on Parallel Computers' is summarized in section three and is provided in its entirety in Appendix B. We are currently studying a proposed subsystem of the NASA Clouds and the Earth's Radiant Energy System (CERES) data processing system. This software is the proof-of-concept for the Ph.D. dissertation. We have implemented and measured the performance of a portion of this subsystem on the Intel iPSC/2 parallel computer. These results are provided in section four. Our future work is summarized in section five, our acknowledgements are stated in section six, and references for published papers associated with NAG-1-995 are provided in section seven.

Computer-aided design and computer science technology

NASA Technical Reports Server (NTRS)

Fulton, R. E.; Voigt, S. J.

1976-01-01

A description is presented of computer-aided design requirements and the resulting computer science advances needed to support aerospace design. The aerospace design environment is examined, taking into account problems of data handling and aspects of computer hardware and software. The interactive terminal is normally the primary interface between the computer system and the engineering designer. Attention is given to user aids, interactive design, interactive computations, the characteristics of design information, data management requirements, hardware advancements, and computer science developments.

Design guidelines for robotically serviceable hardware

NASA Technical Reports Server (NTRS)

Gordon, Scott A.

1988-01-01

Research being conducted at the Goddard Space Flight Center into the development of guidelines for the design of robotically serviceable spaceflight hardware is described. A mock-up was built based on an existing spaceflight system demonstrating how these guidelines can be applied to actual hardware. The report examines the basic servicing philosophy being studied and how this philosophy is reflected in the formulation of design guidelines for robotic servicing. A description of the mock-up is presented with emphasis on the design features that make it robot friendly. Three robotic servicing schemes fulfilling the design guidelines were developed for the mock-up. These servicing schemes are examined as to how their implementation was affected by the constraints of the spacecraft system on which the mock-up is based.

Vestibular Function Research (VFR) experiment. Phase B: Design definition study

NASA Technical Reports Server (NTRS)

1978-01-01

The Vestibular Functions Research (VFR) Experiment was established to investigate the neurosensory and related physiological processes believed to be associated with the space flight nausea syndrome and to develop logical means for its prediction, prevention and treatment. The VFR Project consists of ground and spaceflight experimentation using frogs as specimens. The phase B Preliminary Design Study provided for the preliminary design of the experiment hardware, preparation of performance and hardware specification and a Phase C/D development plan, establishment of STS (Space Transportation System) interfaces and mission operations, and the study of a variety of hardware, experiment and mission options. The study consist of three major tasks: (1) mission mode trade-off; (2) conceptual design; and (3) preliminary design.

Mitigating Communication Delays in Remotely Connected Hardware-in-the-loop Experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cale, James; Johnson, Brian; Dall'Anese, Emiliano

Here, this paper introduces a potential approach for mitigating the effects of communication delays between multiple, closed-loop hardware-in-the-loop experiments which are virtually connected, yet physically separated. The method consists of an analytical method for the compensation of communication delays, along with the supporting computational and communication infrastructure. The control design leverages tools for the design of observers for the compensation of measurement errors in systems with time-varying delays. The proposed methodology is validated through computer simulation and hardware experimentation connecting hardware-in-the-loop experiments conducted between laboratories separated by a distance of over 100 km.

Mitigating Communication Delays in Remotely Connected Hardware-in-the-loop Experiments

DOE PAGES

Cale, James; Johnson, Brian; Dall'Anese, Emiliano; ...

2018-03-30

Here, this paper introduces a potential approach for mitigating the effects of communication delays between multiple, closed-loop hardware-in-the-loop experiments which are virtually connected, yet physically separated. The method consists of an analytical method for the compensation of communication delays, along with the supporting computational and communication infrastructure. The control design leverages tools for the design of observers for the compensation of measurement errors in systems with time-varying delays. The proposed methodology is validated through computer simulation and hardware experimentation connecting hardware-in-the-loop experiments conducted between laboratories separated by a distance of over 100 km.

Applying a Genetic Algorithm to Reconfigurable Hardware

NASA Technical Reports Server (NTRS)

Wells, B. Earl; Weir, John; Trevino, Luis; Patrick, Clint; Steincamp, Jim

2004-01-01

This paper investigates the feasibility of applying genetic algorithms to solve optimization problems that are implemented entirely in reconfgurable hardware. The paper highlights the pe$ormance/design space trade-offs that must be understood to effectively implement a standard genetic algorithm within a modem Field Programmable Gate Array, FPGA, reconfgurable hardware environment and presents a case-study where this stochastic search technique is applied to standard test-case problems taken from the technical literature. In this research, the targeted FPGA-based platform and high-level design environment was the Starbridge Hypercomputing platform, which incorporates multiple Xilinx Virtex II FPGAs, and the Viva TM graphical hardware description language.

Dedicated hardware processor and corresponding system-on-chip design for real-time laser speckle imaging.

PubMed

Jiang, Chao; Zhang, Hongyan; Wang, Jia; Wang, Yaru; He, Heng; Liu, Rui; Zhou, Fangyuan; Deng, Jialiang; Li, Pengcheng; Luo, Qingming

2011-11-01

Laser speckle imaging (LSI) is a noninvasive and full-field optical imaging technique which produces two-dimensional blood flow maps of tissues from the raw laser speckle images captured by a CCD camera without scanning. We present a hardware-friendly algorithm for the real-time processing of laser speckle imaging. The algorithm is developed and optimized specifically for LSI processing in the field programmable gate array (FPGA). Based on this algorithm, we designed a dedicated hardware processor for real-time LSI in FPGA. The pipeline processing scheme and parallel computing architecture are introduced into the design of this LSI hardware processor. When the LSI hardware processor is implemented in the FPGA running at the maximum frequency of 130 MHz, up to 85 raw images with the resolution of 640×480 pixels can be processed per second. Meanwhile, we also present a system on chip (SOC) solution for LSI processing by integrating the CCD controller, memory controller, LSI hardware processor, and LCD display controller into a single FPGA chip. This SOC solution also can be used to produce an application specific integrated circuit for LSI processing.

Using Modern Design Tools for Digital Avionics Development

NASA Technical Reports Server (NTRS)

Hyde, David W.; Lakin, David R., II; Asquith, Thomas E.

2000-01-01

Using Modem Design Tools for Digital Avionics Development Shrinking development time and increased complexity of new avionics forces the designer to use modem tools and methods during hardware development. Engineers at the Marshall Space Flight Center have successfully upgraded their design flow and used it to develop a Mongoose V based radiation tolerant processor board for the International Space Station's Water Recovery System. The design flow, based on hardware description languages, simulation, synthesis, hardware models, and full functional software model libraries, allowed designers to fully simulate the processor board from reset, through initialization before any boards were built. The fidelity of a digital simulation is limited to the accuracy of the models used and how realistically the designer drives the circuit's inputs during simulation. By using the actual silicon during simulation, device modeling errors are reduced. Numerous design flaws were discovered early in the design phase when they could be easily fixed. The use of hardware models and actual MIPS software loaded into full functional memory models also provided checkout of the software development environment. This paper will describe the design flow used to develop the processor board and give examples of errors that were found using the tools. An overview of the processor board firmware will also be covered.

Reducing the Time and Cost of Testing Engines

NASA Technical Reports Server (NTRS)

2004-01-01

Producing a new aircraft engine currently costs approximately $1 billion, with 3 years of development time for a commercial engine and 10 years for a military engine. The high development time and cost make it extremely difficult to transition advanced technologies for cleaner, quieter, and more efficient new engines. To reduce this time and cost, NASA created a vision for the future where designers would use high-fidelity computer simulations early in the design process in order to resolve critical design issues before building the expensive engine hardware. To accomplish this vision, NASA's Glenn Research Center initiated a collaborative effort with the aerospace industry and academia to develop its Numerical Propulsion System Simulation (NPSS), an advanced engineering environment for the analysis and design of aerospace propulsion systems and components. Partners estimate that using NPSS has the potential to dramatically reduce the time, effort, and expense necessary to design and test jet engines by generating sophisticated computer simulations of an aerospace object or system. These simulations will permit an engineer to test various design options without having to conduct costly and time-consuming real-life tests. By accelerating and streamlining the engine system design analysis and test phases, NPSS facilitates bringing the final product to market faster. NASA's NPSS Version (V)1.X effort was a task within the Agency s Computational Aerospace Sciences project of the High Performance Computing and Communication program, which had a mission to accelerate the availability of high-performance computing hardware and software to the U.S. aerospace community for its use in design processes. The technology brings value back to NASA by improving methods of analyzing and testing space transportation components.

CD-ROM Hardware Configurations: Selection and Design.

ERIC Educational Resources Information Center

Jaffe, Lee David; Watkins, Steven G.

1992-01-01

Presents selection and design considerations to help libraries make informed decisions about hardware configurations of CD-ROM systems. Highlights include CD-ROM configurations, including single drive workstations, daisychains, and jukeboxes; network configurations, including remote access; microcomputer features; CD-ROM drive selection; and…

Stand-alone development system using a KIM-1 microcomputer module

NASA Technical Reports Server (NTRS)

Nickum, J. D.

1978-01-01

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Criticality as a Set-Point for Adaptive Behavior in Neuromorphic Hardware

PubMed Central

Srinivasa, Narayan; Stepp, Nigel D.; Cruz-Albrecht, Jose

2015-01-01

Neuromorphic hardware are designed by drawing inspiration from biology to overcome limitations of current computer architectures while forging the development of a new class of autonomous systems that can exhibit adaptive behaviors. Several designs in the recent past are capable of emulating large scale networks but avoid complexity in network dynamics by minimizing the number of dynamic variables that are supported and tunable in hardware. We believe that this is due to the lack of a clear understanding of how to design self-tuning complex systems. It has been widely demonstrated that criticality appears to be the default state of the brain and manifests in the form of spontaneous scale-invariant cascades of neural activity. Experiment, theory and recent models have shown that neuronal networks at criticality demonstrate optimal information transfer, learning and information processing capabilities that affect behavior. In this perspective article, we argue that understanding how large scale neuromorphic electronics can be designed to enable emergent adaptive behavior will require an understanding of how networks emulated by such hardware can self-tune local parameters to maintain criticality as a set-point. We believe that such capability will enable the design of truly scalable intelligent systems using neuromorphic hardware that embrace complexity in network dynamics rather than avoiding it. PMID:26648839

Introduction to the Navigation Team: Johnson Space Center EG6 Internship

NASA Technical Reports Server (NTRS)

Gualdoni, Matthew

2017-01-01

The EG6 navigation team at NASA Johnson Space Center, like any team of engineers, interacts with the engineering process from beginning to end; from exploring solutions to a problem, to prototyping and studying the implementations, all the way to polishing and verifying a final flight-ready design. This summer, I was privileged enough to gain exposure to each of these processes, while also getting to truly experience working within a team of engineers. My summer can be broken up into three projects: i) Initial study and prototyping: investigating a manual navigation method that can be utilized onboard Orion in the event of catastrophic failure of navigation systems; ii) Finalizing and verifying code: altering a software routine to improve its robustness and reliability, as well as designing unit tests to verify its performance; and iii) Development of testing equipment: assisting in developing and integrating of a high-fidelity testbed to verify the performance of software and hardware.

The software architecture of the camera for the ASTRI SST-2M prototype for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Sangiorgi, Pierluca; Capalbi, Milvia; Gimenes, Renato; La Rosa, Giovanni; Russo, Francesco; Segreto, Alberto; Sottile, Giuseppe; Catalano, Osvaldo

2016-07-01

The purpose of this contribution is to present the current status of the software architecture of the ASTRI SST-2M Cherenkov Camera. The ASTRI SST-2M telescope is an end-to-end prototype for the Small Size Telescope of the Cherenkov Telescope Array. The ASTRI camera is an innovative instrument based on SiPM detectors and has several internal hardware components. In this contribution we will give a brief description of the hardware components of the camera of the ASTRI SST-2M prototype and of their interconnections. Then we will present the outcome of the software architectural design process that we carried out in order to identify the main structural components of the camera software system and the relationships among them. We will analyze the architectural model that describes how the camera software is organized as a set of communicating blocks. Finally, we will show where these blocks are deployed in the hardware components and how they interact. We will describe in some detail, the physical communication ports and external ancillary devices management, the high precision time-tag management, the fast data collection and the fast data exchange between different camera subsystems, and the interfacing with the external systems.

KSC-08pd3834

NASA Image and Video Library

2008-11-25

CAPE CANAVERAL, Fla. - In the Parachute Refurbishment Facility at NASA's Kennedy Space Center, United Space Alliance senior aero composite technicians Marcia Jones-Clark (left) and Dior Hubel pack a main parachute slated for use on the Ares I-X test flight. The launch is targeted for July 2009 from Kennedy’s Launch Pad 39B and will provide an early opportunity to test and prove hardware, facilities and ground operations associated with the Ares I rocket. The Ares I-X rocket is a combination of existing and simulator hardware that will resemble the Ares I crew launch vehicle in size, shape and weight. It will provide valuable data to guide the final design of the Ares I, which will launch astronauts in the Orion crew exploration vehicle. The test flight also will bring NASA one step closer to its exploration goals of returning humans to the moon for sustained exploration of the lunar surface and missions to destinations beyond. Photo credit: NASA/Jack Pfaller

KSC-08pd3830

NASA Image and Video Library

2008-11-25

CAPE CANAVERAL, Fla. - In the Parachute Refurbishment Facility at NASA's Kennedy Space Center, United Space Alliance senior aero composite technicians Dior Hubel (kneeling) and Marcia Jones-Clark pack a main parachute slated for use on the Ares I-X test flight. The launch is targeted for July 2009 from Kennedy’s Launch Pad 39B and will provide an early opportunity to test and prove hardware, facilities and ground operations associated with the Ares I rocket. The Ares I-X rocket is a combination of existing and simulator hardware that will resemble the Ares I crew launch vehicle in size, shape and weight. It will provide valuable data to guide the final design of the Ares I, which will launch astronauts in the Orion crew exploration vehicle. The test flight also will bring NASA one step closer to its exploration goals of returning humans to the moon for sustained exploration of the lunar surface and missions to destinations beyond. Photo credit: NASA/Jack Pfaller

KSC-08pd3831

NASA Image and Video Library

2008-11-25

CAPE CANAVERAL, Fla. - In the Parachute Refurbishment Facility at NASA's Kennedy Space Center, United Space Alliance senior aero composite technicians Dior Hubel (left) and Marcia Jones-Clark pack a main parachute slated for use on the Ares I-X test flight. The launch is targeted for July 2009 from Kennedy’s Launch Pad 39B and will provide an early opportunity to test and prove hardware, facilities and ground operations associated with the Ares I rocket. The Ares I-X rocket is a combination of existing and simulator hardware that will resemble the Ares I crew launch vehicle in size, shape and weight. It will provide valuable data to guide the final design of the Ares I, which will launch astronauts in the Orion crew exploration vehicle. The test flight also will bring NASA one step closer to its exploration goals of returning humans to the moon for sustained exploration of the lunar surface and missions to destinations beyond. Photo credit: NASA/Jack Pfaller

Kennedy Space Center's Command and Control System - "Toasters to Rocket Ships"

NASA Technical Reports Server (NTRS)

Lougheed, Kirk; Mako, Cheryle

2011-01-01

This slide presentation reviews the history of the development of the command and control system at Kennedy Space Center. From a system that could be brought to Florida in the trunk of a car in the 1950's. Including the development of larger and more complex launch vehicles with the Apollo program where human launch controllers managed the launch process with a hardware only system that required a dedicated human interface to perform every function until the Apollo vehicle lifted off from the pad. Through the development of the digital computer that interfaced with ground launch processing systems with the Space Shuttle program. Finally, showing the future control room being developed to control the missions to return to the moon and Mars, which will maximize the use of Commercial-Off-The Shelf (COTS) hardware and software which was standards based and not tied to a single vendor. The system is designed to be flexible and adaptable to support the requirements of future spacecraft and launch vehicles.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gottesfeld, Shimshon; Dekel, Dario R.; Page, Miles

The anion exchange membrane fuel cell (AEMFC) is an attractive alternative to acidic proton exchange membrane fuel cells, which to date have required platinum-based catalysts, as well as acid-tolerant stack hardware. The AEMFC could use non-platinum-group metal catalysts and less expensive metal hardware thanks to the high pH of the electrolyte. Over the last decade, substantial progress has been made in improving the performance and durability of the AEMFC through the development of new materials and the optimization of system design and operation conditions. Here in this perspective article, we describe the current status of AEMFCs as having reached beginningmore » of life performance very close to that of PEMFCs when using ultra-low loadings of Pt, while advancing towards operation on non-platinum-group metal catalysts alone. In the latter sections, we identify the remaining technical challenges, which require further research and development, focusing on the materials and operational factors that critically impact AEMFC performance and/or durability. Finally, these perspectives may provide useful insights for the development of next-generation of AEMFCs.« less

Environmental qualification testing of the prototype pool boiling experiment

NASA Technical Reports Server (NTRS)

Sexton, J. Andrew

1992-01-01

The prototype Pool Boiling Experiment (PBE) flew on the STS-47 mission in September 1992. This report describes the purpose of the experiment and the environmental qualification testing program that was used to prove the integrity of the prototype hardware. Component and box level vibration and thermal cycling tests were performed to give an early level of confidence in the hardware designs. At the system level, vibration, thermal extreme soaks, and thermal vacuum cycling tests were performed to qualify the complete design for the expected shuttle environment. The system level vibration testing included three axis sine sweeps and random inputs. The system level hot and cold soak tests demonstrated the hardware's capability to operate over a wide range of temperatures and gave the project team a wider latitude in determining which shuttle thermal altitudes were compatible with the experiment. The system level thermal vacuum cycling tests demonstrated the hardware's capability to operate in a convection free environment. A unique environmental chamber was designed and fabricated by the PBE team and allowed most of the environmental testing to be performed within the project's laboratory. The completion of the test program gave the project team high confidence in the hardware's ability to function as designed during flight.

Analysis of systems hardware flown on LDEF: New findings and comparison to other retrieved spacecraft hardware

NASA Technical Reports Server (NTRS)

Dursch, Harry; Bohnhoff-Hlavacek, Gail; Blue, Donald; Hansen, Patricia

1995-01-01

The Long Duration Exposure Facility (LDEF) was retrieved in 1990 after spending 69 months in low-earth-orbit (LEO). A wide variety of mechanical, electrical, thermal, and optical systems, subsystems, and components were flown on LDEF. The Systems Special Investigation Group (Systems SIG) was formed by NASA to investigate the effects of the 69 month exposure on systems related hardware and to coordinate and collate all systems analysis of LDEF hardware. This report is the Systems SIG final report which updates earlier findings and compares LDEF systems findings to results from other retrieved spacecraft hardware such as Hubble Space Telescope. Also included are sections titled (1) Effects of Long Duration Space Exposure on Optical Scatter, (2) Contamination Survey of LDEF, and (3) Degradation of Optical Materials in Space.

Analysis of systems hardware flown on LDEF: New findings and comparison to other retrieved spacecraft hardware

NASA Astrophysics Data System (ADS)

Dursch, Harry; Bohnhoff-Hlavacek, Gail; Blue, Donald; Hansen, Patricia

1995-09-01

The Long Duration Exposure Facility (LDEF) was retrieved in 1990 after spending 69 months in low-earth-orbit (LEO). A wide variety of mechanical, electrical, thermal, and optical systems, subsystems, and components were flown on LDEF. The Systems Special Investigation Group (Systems SIG) was formed by NASA to investigate the effects of the 69 month exposure on systems related hardware and to coordinate and collate all systems analysis of LDEF hardware. This report is the Systems SIG final report which updates earlier findings and compares LDEF systems findings to results from other retrieved spacecraft hardware such as Hubble Space Telescope. Also included are sections titled (1) Effects of Long Duration Space Exposure on Optical Scatter, (2) Contamination Survey of LDEF, and (3) Degradation of Optical Materials in Space.

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ainsworth, Nathan; Hariri, Ali; Prabakar, Kumaraguru

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Prabakar, Kumaraguru; Ainsworth, Nathan; Pratt, Annabelle

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Onboard FPGA-based SAR processing for future spaceborne systems

NASA Technical Reports Server (NTRS)

Le, Charles; Chan, Samuel; Cheng, Frank; Fang, Winston; Fischman, Mark; Hensley, Scott; Johnson, Robert; Jourdan, Michael; Marina, Miguel; Parham, Bruce;

Servo Platform Circuit Design of Pendulous Gyroscope Based on DSP

NASA Astrophysics Data System (ADS)

Tan, Lilong; Wang, Pengcheng; Zhong, Qiyuan; Zhang, Cui; Liu, Yunfei

2018-03-01

In order to solve the problem when a certain type of pendulous gyroscope in the initial installation deviation more than 40 degrees, that the servo platform can not be up to the speed of the gyroscope in the rough north seeking phase. This paper takes the digital signal processor TMS320F28027 as the core, uses incremental digital PID algorithm, carries out the circuit design of the servo platform. Firstly, the hardware circuit is divided into three parts: DSP minimum system, motor driving circuit and signal processing circuit, then the mathematical model of incremental digital PID algorithm is established, based on the model, writes the PID control program in CCS3.3, finally, the servo motor tracking control experiment is carried out, it shows that the design can significantly improve the tracking ability of the servo platform, and the design has good engineering practice.

Design verification and fabrication of active control systems for the DAST ARW-2 high aspect ratio wing. Part 2: Appendices

NASA Technical Reports Server (NTRS)

Mcgehee, C. R.

1986-01-01

This is Part 2-Appendices of a study conducted under Drones for Aerodynamic and Structural Testing (DAST) Program to accomplish the final design and hardware fabrication for four active control systems compatible with and ready for installation in the NASA Aeroelastic Research Wing No. 2 (ARW-2) and Firebee II drone flight test vehicle. The wing structure was designed so that Active Control Systems (ACS) are required in the normal flight envelope by integrating control system design with aerodynamics and structure technologies. The DAST ARW-2 configuration uses flutter suppression, relaxed static stability, and gust and maneuver load alleviation ACS systems, and an automatic flight control system. Performance goals and criteria were applied to individual systems and the systems collectively to assure that vehicle stability margins, flutter margins, flying qualities, and load reductions were achieved.

Z-2 Prototype Space Suit Development

NASA Technical Reports Server (NTRS)

Ross, Amy; Rhodes, Richard; Graziosi, David; Jones, Bobby; Lee, Ryan; Haque, Bazle Z.; Gillespie, John W., Jr.

2014-01-01

NASA's Z-2 prototype space suit is the highest fidelity pressure garment from both hardware and systems design perspectives since the Shuttle Extravehicular Mobility Unit (EMU) was developed in the late 1970's. Upon completion it will be tested in the 11' humanrated vacuum chamber and the Neutral Buoyancy Laboratory (NBL) at the NASA Johnson Space Center to assess the design and to determine applicability of the configuration to micro-, low- (asteroid), and planetary- (surface) gravity missions. This paper discusses the 'firsts' the Z-2 represents. For example, the Z-2 sizes to the smallest suit scye bearing plane distance for at least the last 25 years and is being designed with the most intensive use of human models with the suit model. The paper also provides a discussion of significant Z-2 configuration features, and how these components evolved from proposal concepts to final designs.

Z-2 Prototype Space Suit Development

NASA Technical Reports Server (NTRS)

Ross, Amy; Rhodes, Richard; Graziosi, David

2014-01-01

NASA's Z-2 prototype space suit is the highest fidelity pressure garment from both hardware and systems design perspectives since the Shuttle Extravehicular Mobility Unit (EMU) was developed in the late 1970's. Upon completion it will be tested in the 11' human-rated vacuum chamber and the Neutral Buoyancy Laboratory (NBL) at the NASA Johnson Space Center to assess the design and to determine applicability of the configuration to micro-, low- (asteroid), and planetary- (surface) gravity missions. This paper discusses the 'firsts' the Z-2 represents. For example, the Z-2 sizes to the smallest suit scye bearing plane distance for at least the last 25 years and is being designed with the most intensive use of human models with the suit model. The paper also provides a discussion of significant Z-2 configuration features, and how these components evolved from proposal concepts to final designs.

HTTM - Design and Implementation of a Type-2 Hypervisor for MIPS64 Based Systems

NASA Astrophysics Data System (ADS)

Ain, Qurrat ul; Anwar, Usama; Mehmood, Muhammad Amir; Waheed, Abdul

2017-01-01

Virtualization has emerged as an attractive software solution for many problems in server domain. Recently, it has started to enrich embedded systems domain by offering features such as hardware consolidation, security, and isolation. Our objective is to bring virtualization to high-end MIPS64 based systems, such as network routers, switches, wireless base station, etc. For this purpose a Type-2 hypervisor is a viable software solution which is easy to deploy and requires no changes in host system. In this paper we present the internal design HTTM -A Type-2 hypervisor for MIPS64 based systems and demonstrate its functional correctness by using Linux Testing Project (LTP) tests. Finally, we performed LMbench tests for performance evaluation.

SIG Galileo final converter technical summary report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hinderman, J.D.

1979-05-01

The report is primarily concerned with the work performed for DOE on converter development and fabrication for the NASA Galileo Jupiter mission as a DOE prime contractor with interface primarily with Teledyne Energy Systems. The activities reported on were directed toward design, analysis and testing of modules and converters SN-1 thru SN-7 and attendant Quality Control and Reliability effort. Although assembly and testing of SN-1 was not accomplished due to the stop work order, the design was virtually completed and a significant amount of subcontracting and manufacturing of both module and converter components was underway. These subcontracting and manufacturing activitiesmore » were selectively closed down depending upon degree of completion and material or hardware potential usage in the Technology Program.« less

Advanced launch system. Advanced development oxidizer turbopump program

NASA Technical Reports Server (NTRS)

1993-01-01

On May 19, 1989, Pratt & Whitney was awarded contract NAS8-37595 by the National Aeronautics and Space Administration, Marshall Space Flight Center, Huntsville Alabama for an Advanced Development Program (ADP) to design, develop and demonstrate a highly reliable low cost, liquid oxygen turbopump for the Advanced Launch System (ALS). The ALS had an overall goal of reducing the cost of placing payloads in orbit by an order of magnitude. This goal would require a substantial reduction in life cycle costs, with emphasis on recurring costs, compared to current launch vehicles. Engine studies supporting these efforts were made for the Space Transportation Main Engine (STME). The emphasis on low cost required design simplification of components and subsystems such that the ground maintenance and test operations was minimized. The results of the Oxygen Turbopump ADP technology effort would provide data to be used in the STME. Initially the STME baseline was a gas generator cycle engine with a vacuum thrust level of 580,000 lbf. This was later increased to 650,000 lbf and the oxygen turbopump design approach was changed to reflect the new thrust level. It was intended that this ADP program be conducted in two phases. Phase 1, a basic phase, would encompass the preliminary design effort, and Phase II, an optional contract phase to cover design, fabrication and test evaluation of an oxygen turbopump at a component test facility at the NASA John C. Stennis Space Center in Mississippi. The basic phase included preliminary design and analysis, evaluation of low cost concepts, and evaluation of fabrication techniques. The option phase included design of the pump and support hardware, analysis of the final configuration to ensure design integrity, fabrication of hardware to demonstrate low cost, DVS Testing of hardware to verify the design, assembly of the turbopump and full scale turbopump testing. In December 1990, the intent of this ADP to support the design and development was changed. The design effort for the oxygen turbopump became part of the STME Phase B contract. The status of the pump design funded through this ADP was presented at the Preliminary Design Review (PDR) at the MSFC on October 24, 1990. Advancements in the design of the pump were subsequently continued under the Phase B Contract. The emphasis of this ADP became the demonstration of individual technologies that would have the greatest potential for reducing the recurring cost and increasing reliability. In October of 1992, overall program funding was reduced and work on this ADP was terminated.

Advanced launch system. Advanced development oxidizer turbopump program

NASA Astrophysics Data System (ADS)

1993-10-01

On May 19, 1989, Pratt & Whitney was awarded contract NAS8-37595 by the National Aeronautics and Space Administration, Marshall Space Flight Center, Huntsville Alabama for an Advanced Development Program (ADP) to design, develop and demonstrate a highly reliable low cost, liquid oxygen turbopump for the Advanced Launch System (ALS). The ALS had an overall goal of reducing the cost of placing payloads in orbit by an order of magnitude. This goal would require a substantial reduction in life cycle costs, with emphasis on recurring costs, compared to current launch vehicles. Engine studies supporting these efforts were made for the Space Transportation Main Engine (STME). The emphasis on low cost required design simplification of components and subsystems such that the ground maintenance and test operations was minimized. The results of the Oxygen Turbopump ADP technology effort would provide data to be used in the STME. Initially the STME baseline was a gas generator cycle engine with a vacuum thrust level of 580,000 lbf. This was later increased to 650,000 lbf and the oxygen turbopump design approach was changed to reflect the new thrust level. It was intended that this ADP program be conducted in two phases. Phase 1, a basic phase, would encompass the preliminary design effort, and Phase II, an optional contract phase to cover design, fabrication and test evaluation of an oxygen turbopump at a component test facility at the NASA John C. Stennis Space Center in Mississippi. The basic phase included preliminary design and analysis, evaluation of low cost concepts, and evaluation of fabrication techniques. The option phase included design of the pump and support hardware, analysis of the final configuration to ensure design integrity, fabrication of hardware to demonstrate low cost, DVS Testing of hardware to verify the design, assembly of the turbopump and full scale turbopump testing. In December 1990, the intent of this ADP to support the design and development was changed. The design effort for the oxygen turbopump became part of the STME Phase B contract. The status of the pump design funded through this ADP was presented at the Preliminary Design Review (PDR) at the MSFC on October 24, 1990. Advancements in the design of the pump were subsequently continued under the Phase B Contract. The emphasis of this ADP became the demonstration of individual technologies that would have the greatest potential for reducing the recurring cost and increasing reliability. In October of 1992, overall program funding was reduced and work on this ADP was terminated.

Use of robotics for nondestructive inspection of steel highway bridges and structures : final report.

DOT National Transportation Integrated Search

2005-01-01

This report presents the results of a project to finalize and apply a crawling robotic system for the remote visual inspection of high-mast light poles. The first part of the project focused on finalizing the prototype crawler robot hardware and cont...

VEG-01: Veggie Hardware Verification Testing

NASA Technical Reports Server (NTRS)

Massa, Gioia; Newsham, Gary; Hummerick, Mary; Morrow, Robert; Wheeler, Raymond

2013-01-01

The Veggie plant/vegetable production system is scheduled to fly on ISS at the end of2013. Since much of the technology associated with Veggie has not been previously tested in microgravity, a hardware validation flight was initiated. This test will allow data to be collected about Veggie hardware functionality on ISS, allow crew interactions to be vetted for future improvements, validate the ability of the hardware to grow and sustain plants, and collect data that will be helpful to future Veggie investigators as they develop their payloads. Additionally, food safety data on the lettuce plants grown will be collected to help support the development of a pathway for the crew to safely consume produce grown on orbit. Significant background research has been performed on the Veggie plant growth system, with early tests focusing on the development of the rooting pillow concept, and the selection of fertilizer, rooting medium and plant species. More recent testing has been conducted to integrate the pillow concept into the Veggie hardware and to ensure that adequate water is provided throughout the growth cycle. Seed sanitation protocols have been established for flight, and hardware sanitation between experiments has been studied. Methods for shipping and storage of rooting pillows and the development of crew procedures and crew training videos for plant activities on-orbit have been established. Science verification testing was conducted and lettuce plants were successfully grown in prototype Veggie hardware, microbial samples were taken, plant were harvested, frozen, stored and later analyzed for microbial growth, nutrients, and A TP levels. An additional verification test, prior to the final payload verification testing, is desired to demonstrate similar growth in the flight hardware and also to test a second set of pillows containing zinnia seeds. Issues with root mat water supply are being resolved, with final testing and flight scheduled for later in 2013.

Automated power distribution system hardware. [for space station power supplies

NASA Technical Reports Server (NTRS)

Anderson, Paul M.; Martin, James A.; Thomason, Cindy

1989-01-01

An automated power distribution system testbed for the space station common modules has been developed. It incorporates automated control and monitoring of a utility-type power system. Automated power system switchgear, control and sensor hardware requirements, hardware design, test results, and potential applications are discussed. The system is designed so that the automated control and monitoring of the power system is compatible with both a 208-V, 20-kHz single-phase AC system and a high-voltage (120 to 150 V) DC system.

MSFC Skylab structures and mechanical systems mission evaluation

NASA Technical Reports Server (NTRS)

1974-01-01

A performance analysis for structural and mechanical major hardware systems and components is presented. Development background testing, modifications, and requirement adjustments are included. Functional narratives are provided for comparison purposes as are predicted design performance criterion. Each item is evaluated on an individual basis: that is, (1) history (requirements, design, manufacture, and test); (2) in-orbit performance (description and analysis); and (3) conclusions and recommendations regarding future space hardware application. Overall, the structural and mechanical performance of the Skylab hardware was outstanding.

Hardware development process for Human Research facility applications

NASA Astrophysics Data System (ADS)

Bauer, Liz

2000-01-01

The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

Computer-Based Tools for Evaluating Graphical User Interfaces

NASA Technical Reports Server (NTRS)

Moore, Loretta A.

1997-01-01

The user interface is the component of a software system that connects two very complex system: humans and computers. Each of these two systems impose certain requirements on the final product. The user is the judge of the usability and utility of the system; the computer software and hardware are the tools with which the interface is constructed. Mistakes are sometimes made in designing and developing user interfaces because the designers and developers have limited knowledge about human performance (e.g., problem solving, decision making, planning, and reasoning). Even those trained in user interface design make mistakes because they are unable to address all of the known requirements and constraints on design. Evaluation of the user inter-face is therefore a critical phase of the user interface development process. Evaluation should not be considered the final phase of design; but it should be part of an iterative design cycle with the output of evaluation being feed back into design. The goal of this research was to develop a set of computer-based tools for objectively evaluating graphical user interfaces. The research was organized into three phases. The first phase resulted in the development of an embedded evaluation tool which evaluates the usability of a graphical user interface based on a user's performance. An expert system to assist in the design and evaluation of user interfaces based upon rules and guidelines was developed during the second phase. During the final phase of the research an automatic layout tool to be used in the initial design of graphical inter- faces was developed. The research was coordinated with NASA Marshall Space Flight Center's Mission Operations Laboratory's efforts in developing onboard payload display specifications for the Space Station.

Coherent receiver design based on digital signal processing in optical high-speed intersatellite links with M-phase-shift keying

NASA Astrophysics Data System (ADS)

Schaefer, Semjon; Gregory, Mark; Rosenkranz, Werner

2016-11-01

We present simulative and experimental investigations of different coherent receiver designs for high-speed optical intersatellite links. We focus on frequency offset (FO) compensation in homodyne and intradyne detection systems. The considered laser communication terminal uses an optical phase-locked loop (OPLL), which ensures stable homodyne detection. However, the hardware complexity increases with the modulation order. Therefore, we show that software-based intradyne detection is an attractive alternative for OPLL-based homodyne systems. Our approach is based on digital FO and phase noise compensation, in order to achieve a more flexible coherent detection scheme. Analytic results will further show the theoretical impact of the different detection schemes on the receiver sensitivity. Finally, we compare the schemes in terms of bit error ratio measurements and optimal receiver design.

Design Tools for Reconfigurable Hardware in Orbit (RHinO)

NASA Technical Reports Server (NTRS)

French, Mathew; Graham, Paul; Wirthlin, Michael; Larchev, Gregory; Bellows, Peter; Schott, Brian

2004-01-01

The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. These tools leverage an established FPGA design environment and focus primarily on space effects mitigation and power optimization. The project is creating software to automatically test and evaluate the single-event-upsets (SEUs) sensitivities of an FPGA design and insert mitigation techniques. Extensions into the tool suite will also allow evolvable algorithm techniques to reconfigure around single-event-latchup (SEL) events. In the power domain, tools are being created for dynamic power visualiization and optimization. Thus, this technology seeks to enable the use of Reconfigurable Hardware in Orbit, via an integrated design tool-suite aiming to reduce risk, cost, and design time of multimission reconfigurable space processors using SRAM-based FPGAs.

A survey of SAT solver

NASA Astrophysics Data System (ADS)

Gong, Weiwei; Zhou, Xu

2017-06-01

In Computer Science, the Boolean Satisfiability Problem(SAT) is the problem of determining if there exists an interpretation that satisfies a given Boolean formula. SAT is one of the first problems that was proven to be NP-complete, which is also fundamental to artificial intelligence, algorithm and hardware design. This paper reviews the main algorithms of the SAT solver in recent years, including serial SAT algorithms, parallel SAT algorithms, SAT algorithms based on GPU, and SAT algorithms based on FPGA. The development of SAT is analyzed comprehensively in this paper. Finally, several possible directions for the development of the SAT problem are proposed.

Design of neural networks for classification of remotely sensed imagery

NASA Technical Reports Server (NTRS)

Chettri, Samir R.; Cromp, Robert F.; Birmingham, Mark

1992-01-01

Classification accuracies of a backpropagation neural network are discussed and compared with a maximum likelihood classifier (MLC) with multivariate normal class models. We have found that, because of its nonparametric nature, the neural network outperforms the MLC in this area. In addition, we discuss techniques for constructing optimal neural nets on parallel hardware like the MasPar MP-1 currently at GSFC. Other important discussions are centered around training and classification times of the two methods, and sensitivity to the training data. Finally, we discuss future work in the area of classification and neural nets.

Selenide isotope generator for the Galileo Mission: SIG/Galileo hermetic receptable test program final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Roedel, S.

1979-06-01

The purpose of the receptacle test program was to test various types of hermetically sealed electrical receptacles and to select one model as the spaceflight hardware item for SIG/Galileo thermoelectric generators. The design goal of the program was to qualify a hermetic seal integrity of less than or equal to 1 x 10/sup -9/ std cc He/sec -atm at 400/sup 0/F (204/sup 0/C) and verify a reliability of 0.95 at a 50% confidence level for a flight mission in excess of 7 years.

Readout and Trigger for the AFP Detector at the ATLAS Experiment at LHC

NASA Astrophysics Data System (ADS)

Korcyl, K.; Kocian, M.; Lopez Paz, I.; Avoni, G.

2017-10-01

The ATLAS Forward Proton is a new detector system in ATLAS that allows study of events with protons scattered at very small angles. The final design assumes four stations at distances of 205 and 217 m from the ATLAS interaction point on both sides of the detector exploiting the Roman Pot technology. In 2016 two stations in one arm were installed; installation of the other two is planned for 2017. This article describes details of the installed hardware, firmware and software leading to the full integration with the ATLAS central trigger and data acquisition systems.

FPGA Based Reconfigurable ATM Switch Test Bed

NASA Technical Reports Server (NTRS)

Chu, Pong P.; Jones, Robert E.

1998-01-01

Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.

Space biology initiative program definition review. Trade study 2: Prototype utilization in the development of space biology hardware

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Schulze, Arthur E.; Wood, H. J., Jr.

1989-01-01

The objective was to define the factors which space flight hardware developers and planners should consider when determining: (1) the number of hardware units required to support program; (2) design level of the units; and (3) most efficient means of utilization of the units. The analysis considered technology risk, maintainability, reliability, and safety design requirements for achieving the delivery of highest quality flight hardware. Relative cost impacts of the utilization of prototyping were identified. The development of Space Biology Initiative research hardware will involve intertwined hardware/software activities. Experience has shown that software development can be an expensive portion of a system design program. While software prototyping could imply the development of a significantly different end item, an operational system prototype must be considered to be a combination of software and hardware. Hundreds of factors were identified that could be considered in determining the quantity and types of prototypes that should be constructed. In developing the decision models, these factors were combined and reduced by approximately ten-to-one in order to develop a manageable structure based on the major determining factors. The Baseline SBI hardware list of Appendix D was examined and reviewed in detail; however, from the facts available it was impossible to identify the exact types and quantities of prototypes required for each of these items. Although the factors that must be considered could be enumerated for each of these pieces of equipment, the exact status and state of development of the equipment is variable and uncertain at this time.

Mars Exploration Rover Entry, Descent, and Landing: A Thermal Perspective

NASA Technical Reports Server (NTRS)

Tsuyuki, Glenn T.; Sunada, Eric T.; Novak, Keith S.; Kinsella, Gary M.; Phillip, Charles J.

2005-01-01

Perhaps the most challenging mission phase for the Mars Exploration Rovers was the Entry, Descent, and Landing (EDL). During this phase, the entry vehicle attached to its cruise stage was transformed into a stowed tetrahedral Lander that was surrounded by inflated airbags through a series of complex events. There was only one opportunity to successfully execute an automated command sequence without any possible ground intervention. The success of EDL was reliant upon the system thermal design: 1) to thermally condition EDL hardware from cruise storage temperatures to operating temperature ranges; 2) to maintain the Rover electronics within operating temperature ranges without the benefit of the cruise single phase cooling loop, which had been evacuated in preparation for EDL; and 3) to maintain the cruise stage propulsion components for the critical turn to entry attitude. Since the EDL architecture was inherited from Mars Pathfinder (MPF), the initial EDL thermal design would be inherited from MPF. However, hardware and implementation differences from MPF ultimately changed the MPF inheritance approach for the EDL thermal design. With the lack of full inheritance, the verification and validation of the EDL thermal design took on increased significance. This paper will summarize the verification and validation approach for the EDL thermal design along with applicable system level thermal testing results as well as appropriate thermal analyses. In addition, the lessons learned during the system-level testing will be discussed. Finally, the in-flight EDL experiences of both MER-A and -B missions (Spirit and Opportunity, respectively) will be presented, demonstrated how lessons learned from Spirit were applied to Opportunity.

Phased Array-Fed Reflector (PAFR) Antenna Architectures for Space-Based Sensors

NASA Technical Reports Server (NTRS)

Cooley, Michael E.

2014-01-01

Communication link and target ranges for satellite communications (SATCOM) and space-based sensors (e.g. radars) vary from approximately 1000 km (for LEO satellites) to 35,800 km (for GEO satellites). At these long ranges, large antenna gains are required and legacy payloads have usually employed large reflectors with single beams that are either fixed or mechanically steered. For many applications, there are inherent limitations that are associated with the use of these legacy antennas/payloads. Hybrid antenna designs using Phased Array Fed Reflectors (PAFRs) provide a compromise between reflectors and Direct Radiating phased Arrays (DRAs). PAFRs provide many of the performance benefits of DRAs while utilizing much smaller, lower cost (feed) arrays. The primary limitation associated with hybrid PAFR architectures is electronic scan range; approximately +/-5 to +/- 10 degrees is typical, but this range depends on many factors. For LEO applications, the earth FOV is approximately +/-55 degrees which is well beyond the range of electronic scanning for PAFRs. However, for some LEO missions, limited scanning is sufficient or the CONOPS and space vehicle designs can be developed to incorporate a combination mechanical slewing and electronic scanning. In this paper, we review, compare and contrast various PAFR architectures with a focus on their general applicability to space missions. We compare the RF performance of various PAFR architectures and describe key hardware design and implementation trades. Space-based PAFR designs are highly multi-disciplinary and we briefly address key hardware engineering design areas. Finally, we briefly describe two PAFR antenna architectures that have been developed at Northrop Grumman.

Study of the adaptability of existing hardware designs to a Pioneer Saturn/Uranus probe

NASA Technical Reports Server (NTRS)

1973-01-01

The basic concept of designing a scientific entry probe for the expected range of environments at Saturn or Uranus and making the probe compatible with the interface constraints of the Pioneer spacecraft was investigated for launches in the early 1980's. It was found that the amount of hardware commonality between that used in the Pioneer Venus program and that for the Saturn/Uranus probe was approximately 85%. It is recommended that additional development studies be conducted to improve the hardware definitions of the probe design for the following: heat shield, battery, nose cap jettisoning, and thermal control insulation.

System-level protection and hardware Trojan detection using weighted voting.

PubMed

Amin, Hany A M; Alkabani, Yousra; Selim, Gamal M I

2014-07-01

The problem of hardware Trojans is becoming more serious especially with the widespread of fabless design houses and design reuse. Hardware Trojans can be embedded on chip during manufacturing or in third party intellectual property cores (IPs) during the design process. Recent research is performed to detect Trojans embedded at manufacturing time by comparing the suspected chip with a golden chip that is fully trusted. However, Trojan detection in third party IP cores is more challenging than other logic modules especially that there is no golden chip. This paper proposes a new methodology to detect/prevent hardware Trojans in third party IP cores. The method works by gradually building trust in suspected IP cores by comparing the outputs of different untrusted implementations of the same IP core. Simulation results show that our method achieves higher probability of Trojan detection over a naive implementation of simple voting on the output of different IP cores. In addition, experimental results show that the proposed method requires less hardware overhead when compared with a simple voting technique achieving the same degree of security.

Shuttle mission simulator hardware conceptual design report

NASA Technical Reports Server (NTRS)

Burke, J. F.

1973-01-01

The detailed shuttle mission simulator hardware requirements are discussed. The conceptual design methods, or existing technology, whereby those requirements will be fulfilled are described. Information of a general nature on the total design problem plus specific details on how these requirements are to be satisfied are reported. The configuration of the simulator is described and the capabilities for various types of training are identified.

Real-Time Hardware-in-the-Loop Simulation of Ares I Launch Vehicle

NASA Technical Reports Server (NTRS)

Tobbe, Patrick; Matras, Alex; Walker, David; Wilson, Heath; Fulton, Chris; Alday, Nathan; Betts, Kevin; Hughes, Ryan; Turbe, Michael

2009-01-01

The Ares Real-Time Environment for Modeling, Integration, and Simulation (ARTEMIS) has been developed for use by the Ares I launch vehicle System Integration Laboratory at the Marshall Space Flight Center. The primary purpose of the Ares System Integration Laboratory is to test the vehicle avionics hardware and software in a hardware - in-the-loop environment to certify that the integrated system is prepared for flight. ARTEMIS has been designed to be the real-time simulation backbone to stimulate all required Ares components for verification testing. ARTE_VIIS provides high -fidelity dynamics, actuator, and sensor models to simulate an accurate flight trajectory in order to ensure realistic test conditions. ARTEMIS has been designed to take advantage of the advances in underlying computational power now available to support hardware-in-the-loop testing to achieve real-time simulation with unprecedented model fidelity. A modular realtime design relying on a fully distributed computing architecture has been implemented.

A distributed, graphical user interface based, computer control system for atomic physics experiments

NASA Astrophysics Data System (ADS)

Keshet, Aviv; Ketterle, Wolfgang

2013-01-01

Atomic physics experiments often require a complex sequence of precisely timed computer controlled events. This paper describes a distributed graphical user interface-based control system designed with such experiments in mind, which makes use of off-the-shelf output hardware from National Instruments. The software makes use of a client-server separation between a user interface for sequence design and a set of output hardware servers. Output hardware servers are designed to use standard National Instruments output cards, but the client-server nature should allow this to be extended to other output hardware. Output sequences running on multiple servers and output cards can be synchronized using a shared clock. By using a field programmable gate array-generated variable frequency clock, redundant buffers can be dramatically shortened, and a time resolution of 100 ns achieved over effectively arbitrary sequence lengths.

A distributed, graphical user interface based, computer control system for atomic physics experiments.

PubMed

Keshet, Aviv; Ketterle, Wolfgang

2013-01-01

Atomic physics experiments often require a complex sequence of precisely timed computer controlled events. This paper describes a distributed graphical user interface-based control system designed with such experiments in mind, which makes use of off-the-shelf output hardware from National Instruments. The software makes use of a client-server separation between a user interface for sequence design and a set of output hardware servers. Output hardware servers are designed to use standard National Instruments output cards, but the client-server nature should allow this to be extended to other output hardware. Output sequences running on multiple servers and output cards can be synchronized using a shared clock. By using a field programmable gate array-generated variable frequency clock, redundant buffers can be dramatically shortened, and a time resolution of 100 ns achieved over effectively arbitrary sequence lengths.

Ares I-X: On the Threshold of Exploration

NASA Technical Reports Server (NTRS)

Davis, Stephan R.; Askins, Bruce

2009-01-01

Ares I-X, the first flight of the Ares I crew launch vehicle, is less than a year from launch. Ares I-X will test the flight characteristics of Ares I from liftoff to first stage separation and recovery. The flight also will demonstrate the computer hardware and software (avionics) needed to control the vehicle; deploy the parachutes that allow the first stage booster to land in the ocean safely; measure and control how much the rocket rolls during flight; test and measure the effects of first stage separation; and develop and try out new ground handling and rocket stacking procedures in the Vehicle Assembly Building (VAB) and first stage recovery procedures at Kennedy Space Center (KSC) in Florida. All Ares I-X major elements have completed their critical design reviews, and are nearing final fabrication. The first stage--four-segment solid rocket booster from the Space Shuttle inventory--incorporates new simulated forward structures to match the Ares I five-segment booster. The upper stage, Orion crew module, and launch abort system will comprise simulator hardware that incorporates developmental flight instrumentation for essential data collection during the mission. The upper stage simulator consists of smaller cylindrical segments, which were transported to KSC in fall 2008. The crew module and launch abort system simulator were shipped in December 2008. The first stage hardware, active roll control system (RoCS), and avionics components will be delivered to KSC in 2009. This paper will provide detailed statuses of the Ares I-X hardware elements as NASA's Constellation Program prepares for this first flight of a new exploration era in the summer of 2009.

Hardware architecture for projective model calculation and false match refining using random sample consensus algorithm

NASA Astrophysics Data System (ADS)

Azimi, Ehsan; Behrad, Alireza; Ghaznavi-Ghoushchi, Mohammad Bagher; Shanbehzadeh, Jamshid

2016-11-01

The projective model is an important mapping function for the calculation of global transformation between two images. However, its hardware implementation is challenging because of a large number of coefficients with different required precisions for fixed point representation. A VLSI hardware architecture is proposed for the calculation of a global projective model between input and reference images and refining false matches using random sample consensus (RANSAC) algorithm. To make the hardware implementation feasible, it is proved that the calculation of the projective model can be divided into four submodels comprising two translations, an affine model and a simpler projective mapping. This approach makes the hardware implementation feasible and considerably reduces the required number of bits for fixed point representation of model coefficients and intermediate variables. The proposed hardware architecture for the calculation of a global projective model using the RANSAC algorithm was implemented using Verilog hardware description language and the functionality of the design was validated through several experiments. The proposed architecture was synthesized by using an application-specific integrated circuit digital design flow utilizing 180-nm CMOS technology as well as a Virtex-6 field programmable gate array. Experimental results confirm the efficiency of the proposed hardware architecture in comparison with software implementation.

Portable parallel stochastic optimization for the design of aeropropulsion components

NASA Technical Reports Server (NTRS)

Sues, Robert H.; Rhodes, G. S.

1994-01-01

This report presents the results of Phase 1 research to develop a methodology for performing large-scale Multi-disciplinary Stochastic Optimization (MSO) for the design of aerospace systems ranging from aeropropulsion components to complete aircraft configurations. The current research recognizes that such design optimization problems are computationally expensive, and require the use of either massively parallel or multiple-processor computers. The methodology also recognizes that many operational and performance parameters are uncertain, and that uncertainty must be considered explicitly to achieve optimum performance and cost. The objective of this Phase 1 research was to initialize the development of an MSO methodology that is portable to a wide variety of hardware platforms, while achieving efficient, large-scale parallelism when multiple processors are available. The first effort in the project was a literature review of available computer hardware, as well as review of portable, parallel programming environments. The first effort was to implement the MSO methodology for a problem using the portable parallel programming language, Parallel Virtual Machine (PVM). The third and final effort was to demonstrate the example on a variety of computers, including a distributed-memory multiprocessor, a distributed-memory network of workstations, and a single-processor workstation. Results indicate the MSO methodology can be well-applied towards large-scale aerospace design problems. Nearly perfect linear speedup was demonstrated for computation of optimization sensitivity coefficients on both a 128-node distributed-memory multiprocessor (the Intel iPSC/860) and a network of workstations (speedups of almost 19 times achieved for 20 workstations). Very high parallel efficiencies (75 percent for 31 processors and 60 percent for 50 processors) were also achieved for computation of aerodynamic influence coefficients on the Intel. Finally, the multi-level parallelization strategy that will be needed for large-scale MSO problems was demonstrated to be highly efficient. The same parallel code instructions were used on both platforms, demonstrating portability. There are many applications for which MSO can be applied, including NASA's High-Speed-Civil Transport, and advanced propulsion systems. The use of MSO will reduce design and development time and testing costs dramatically.

Computer hardware description languages - A tutorial

NASA Technical Reports Server (NTRS)

Shiva, S. G.

1979-01-01

The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

Web-Compatible Graphics Visualization Framework for Online Instruction and Assessment of Hardware Concepts

ERIC Educational Resources Information Center

Chandramouli, Magesh; Chittamuru, Siva-Teja

2016-01-01

This paper explains the design of a graphics-based virtual environment for instructing computer hardware concepts to students, especially those at the beginner level. Photorealistic visualizations and simulations are designed and programmed with interactive features allowing students to practice, explore, and test themselves on computer hardware…

Automated biowaste sampling system improved feces collection, mass measurement and sampling. [by use of a breadboard model

NASA Technical Reports Server (NTRS)

Fogal, G. L.; Mangialardi, J. K.; Young, R.

1974-01-01

The capability of the basic automated Biowaste Sampling System (ABSS) hardware was extended and improved through the design, fabrication and test of breadboard hardware. A preliminary system design effort established the feasibility of integrating the breadboard concepts into the ABSS.

Bistatic radar sea state monitoring system design

NASA Technical Reports Server (NTRS)

Ruck, G. T.; Krichbaum, C. K.; Everly, J. O.

1975-01-01

Remote measurement of the two-dimensional surface wave height spectrum of the ocean by the use of bistatic radar techniques was examined. Potential feasibility and experimental verification by field experiment are suggested. The required experimental hardware is defined along with the designing, assembling, and testing of several required experimental hardware components.

When "Less is More": The Optimal Design of Language Laboratory Hardware.

ERIC Educational Resources Information Center

Kershaw, Gary; Boyd, Gary

1980-01-01

The results of a process of designing, building, and "de-bugging" two replacement language laboratory hardware systems at Concordia University (Montreal) are described. Because commercially available systems did not meet specifications within budgetary constraints, the systems were built by the university technical department. The systems replaced…

Programmable data collection platform study

NASA Technical Reports Server (NTRS)

1976-01-01

The results of a feasibility study incorporating microprocessors in data collection platforms in described. An introduction to microcomputer hardware and software concepts is provided. The influence of microprocessor technology on the design of programmable data collection platform hardware is discussed. A standard modular PDCP design capable of meeting the design goals is proposed, and the process of developing PDCP programs is examined. A description of design and construction of the UT PDCP development system is given.

Developments at the Advanced Design Technologies Testbed

NASA Technical Reports Server (NTRS)

VanDalsem, William R.; Livingston, Mary E.; Melton, John E.; Torres, Francisco J.; Stremel, Paul M.

2003-01-01

A report presents background and historical information, as of August 1998, on the Advanced Design Technologies Testbed (ADTT) at Ames Research Center. The ADTT is characterized as an activity initiated to facilitate improvements in aerospace design processes; provide a proving ground for product-development methods and computational software and hardware; develop bridging methods, software, and hardware that can facilitate integrated solutions to design problems; and disseminate lessons learned to the aerospace and information technology communities.

Environmental Controls and Life Support System (ECLSS) Design for a Multi-Mission Space Exploration Vehicle (MMSEV)

NASA Technical Reports Server (NTRS)

Stambaugh, Imelda; Baccus, Shelley; Buffington, Jessie; Hood, Andrew; Naids, Adam; Borrego, Melissa; Hanford, Anthony J.; Eckhardt, Brad; Allada, Rama Kumar; Yagoda, Evan

2013-01-01

Engineers at Johnson Space Center (JSC) are developing an Environmental Control and Life Support System (ECLSS) design for the Multi-Mission Space Exploration Vehicle (MMSEV). The purpose of the MMSEV is to extend the human exploration envelope for Lunar, Near Earth Object (NEO), or Deep Space missions by using pressurized exploration vehicles. The MMSEV, formerly known as the Space Exploration Vehicle (SEV), employs ground prototype hardware for various systems and tests it in manned and unmanned configurations. Eventually, the system hardware will evolve and become part of a flight vehicle capable of supporting different design reference missions. This paper will discuss the latest MMSEV ECLSS architectures developed for a variety of design reference missions, any work contributed toward the development of the ECLSS design, lessons learned from testing prototype hardware, and the plan to advance the ECLSS toward a flight design.

Environmental Controls and Life Support System (ECLSS) Design for a Multi-Mission Space Exploration Vehicle (MMSEV)

NASA Technical Reports Server (NTRS)

Stambaugh, Imelda; Baccus, Shelley; Naids, Adam; Hanford, Anthony

2012-01-01

Engineers at Johnson Space Center (JSC) are developing an Environmental Control and Life Support System (ECLSS) design for the Multi-Mission Space Exploration Vehicle (MMSEV). The purpose of the MMSEV is to extend the human exploration envelope for Lunar, Near Earth Object (NEO), or Deep Space missions by using pressurized exploration vehicles. The MMSEV, formerly known as the Space Exploration Vehicle (SEV), employs ground prototype hardware for various systems and tests it in manned and unmanned configurations. Eventually, the system hardware will evolve and become part of a flight vehicle capable of supporting different design reference missions. This paper will discuss the latest MMSEV ECLSS architectures developed for a variety of design reference missions, any work contributed toward the development of the ECLSS design, lessons learned from testing prototype hardware, and the plan to advance the ECLSS toward a flight design.

Autonomous Dynamically Self-Organizing and Self-Healing Distributed Hardware Architecture - the eDNA Concept

NASA Technical Reports Server (NTRS)

Boesen, Michael Reibel; Madsen, Jan; Keymeulen, Didier

2011-01-01

This paper presents the current state of the autonomous dynamically self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application is implemented on the eDNA architecture.

Impact of uniform electrode current distribution on ETF. [Engineering Test Facility MHD generator

NASA Technical Reports Server (NTRS)

Bents, D. J.

1982-01-01

A basic reason for the complexity and sheer volume of electrode consolidation hardware in the MHD ETF Powertrain system is the channel electrode current distribution, which is non-uniform. If the channel design is altered to provide uniform electrode current distribution, the amount of hardware required decreases considerably, but at the possible expense of degraded channel performance. This paper explains the design impacts on the ETF electrode consolidation network associated with uniform channel electrode current distribution, and presents the alternate consolidation designs which occur. They are compared to the baseline (non-uniform current) design with respect to performance, and hardware requirements. A rational basis is presented for comparing the requirements for the different designs and the savings that result from uniform current distribution. Performance and cost impacts upon the combined cycle plant are discussed.

Triana Safehold: A New Gyroless, Sun-Pointing Attitude Controller

NASA Technical Reports Server (NTRS)

Chen, J.; Morgenstern, Wendy; Garrick, Joseph

2001-01-01

Triana is a single-string spacecraft to be placed in a halo orbit about the sun-earth Ll Lagrangian point. The Attitude Control Subsystem (ACS) hardware includes four reaction wheels, ten thrusters, six coarse sun sensors, a star tracker, and a three-axis Inertial Measuring Unit (IMU). The ACS Safehold design features a gyroless sun-pointing control scheme using only sun sensors and wheels. With this minimum hardware approach, Safehold increases mission reliability in the event of a gyroscope anomaly. In place of the gyroscope rate measurements, Triana Safehold uses wheel tachometers to help provide a scaled estimation of the spacecraft body rate about the sun vector. Since Triana nominally performs momentum management every three months, its accumulated system momentum can reach a significant fraction of the wheel capacity. It is therefore a requirement for Safehold to maintain a sun-pointing attitude even when the spacecraft system momentum is reasonably large. The tachometer sun-line rate estimation enables the controller to bring the spacecraft close to its desired sun-pointing attitude even with reasonably high system momentum and wheel drags. This paper presents the design rationale behind this gyroless controller, stability analysis, and some time-domain simulation results showing performances with various initial conditions. Finally, suggestions for future improvements are briefly discussed.

Development and fabrication of large vented nickel--zinc cells. Final report. [300 Ah

DOE Office of Scientific and Technical Information (OSTI.GOV)

Donnel, C.P.I.

1975-12-01

A preliminary cell design for a 300-Ah vented nickel--zinc cell was established based on volume requirements and cell component materials selected by NASA Lewis Research Center. A 100-Ah cell configuration was derived from the 300-Ah cell design utilizing the same size electrodes, separators, and cell terminal hardware. The first cells fabricated were four groups of three cells each in the 100-Ah size. These 100-Ah experimental nickel--zinc cells had as common components the nickel positive electrodes (GFM), flexible inorganic separator (GFM) bags on the negative electrodes, pressed powder zinc oxide electrodes, and cell containers with hardware. The variations introduced were fourmore » differing electrolyte absorber (interseparator) systems used to encase the nickel positive electrodes of each cell group. The four groups of 100-Ah experimental vented nickel--zinc cells were tested to determine, based on cell performance, the best two interseparator systems. Using the two interseparator systems, two groups of experimental 300-AH cells were fabricated. Each group of three cells differed only in the interseparator material used. The six cells were filled, formed and tested to evaluate the interseparator materials and investigate the performance characteristics of the 300-Ah cell configuration and its components. (auth)« less

High-Speed Isolation Board for Flight Hardware Testing

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K.; Goodpasture, Richard L.

2011-01-01

There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 11-in. (.22 28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.

Enhancements and Algorithms for Avionic Information Processing System Design Methodology.

DTIC Science & Technology

1982-06-16

programming algorithm is enhanced by incorporating task precedence constraints and hardware failures. Stochastic network methods are used to analyze...allocations in the presence of random fluctuations. Graph theoretic methods are used to analyze hardware designs, and new designs are constructed with...There, spatial dynamic programming (SDP) was used to solve a static, deterministic software allocation problem. Under the current contract the SDP

The Triangle: a Multiprocessor Architecture for Fast Curve and Surface Generation.

DTIC Science & Technology

1987-08-01

design , curves and surfaces, graphics hardware. 20...curves, B-splines, computer-aided geometric design ; curves and sur- faces, graphics hardware. (k 12). -/ .... This work was supported in part by the...34 Electronic Design , October 30, 1986. 21. M. A. Penna and R. R. Patterson, Projective Geometry and its Applications to Computer Graphics , Prentice-Hall, Englewood Cliffs, N.J., 1985. 70,e, 41100vr -~ ~ - -- --

Human Systems Engineering for Launch processing at Kennedy Space Center (KSC)

NASA Technical Reports Server (NTRS)

Henderson, Gena; Stambolian, Damon B.; Stelges, Katrine

2012-01-01

Launch processing at Kennedy Space Center (KSC) is primarily accomplished by human users of expensive and specialized equipment. In order to reduce the likelihood of human error, to reduce personal injuries, damage to hardware, and loss of mission the design process for the hardware needs to include the human's relationship with the hardware. Just as there is electrical, mechanical, and fluids, the human aspect is just as important. The focus of this presentation is to illustrate how KSC accomplishes the inclusion of the human aspect in the design using human centered hardware modeling and engineering. The presentations also explain the current and future plans for research and development for improving our human factors analysis tools and processes.

Stretched Lens Array (SLA) Photovoltaic Concentrator Hardware Development and Testing

NASA Technical Reports Server (NTRS)

Piszczor, Michael; O'Neill, Mark J.; Eskenazi, Michael

2003-01-01

Over the past two years, the Stretched Lens Array (SLA) photovoltaic concentrator has evolved, under a NASA contract, from a concept with small component demonstrators to operational array hardware that is ready for space validation testing. A fully-functional four panel SLA solar array has been designed, built and tested. This paper will summarize the focus of the hardware development effort, discuss the results of recent testing conducted under this program and present the expected performance of a full size 7kW array designed to meet the requirements of future space missions.

A New Generation of Electrical Power Supply for Telecom Satellites

NASA Astrophysics Data System (ADS)

Bouhours, Gilles; Asplanato, Remi; Rebuffel, Christophe; Pasquet, Jean-Marie; Bardin, Bertrand; Deplus, Nicolas; Lempereur, Vincent

2014-08-01

This paper presents the main features of the new power subsystem generation for the Thales Alenia Space (TAS) Spacebus platforms.All its components (Solar Array, Solar Array Drive Mechanism, Power Conditioning Unit and Lithium-Ion batteries) have been upgraded, taking advantage of the latest available technologies. The modularity has been improved to perfectly match the sizing of each unit to the satellite power level requirement. These two improvements lead to optimal mass and cost over the whole power range.In addition, the customer benefits from a fully automatic operation of the subsystem, including redundancy, making the ground station workload negligible, even during eclipse periods. Finally, the capability to support any type of payload has been further improved, in terms of overall power level and operating modes. Payload pulsed operation capability has been especially increased to support all anticipated mission requirements. In parallel to the PCU hardware, a detailed electrical model has also been developed and correlated to analyse the regulation performance in any nominal or degraded mode. An extensive set of tests provides a verification of performances and interfaces, hardware as well as software.This paper will first describe the main requirements considered in this development. Then, the architecture will be detailed, showing how the requirements have been fulfilled. The design of each unit will be shortly presented, and finally the correlation between the regulation analysis model and the EQM measurements will be illustrated.

Vapor Compression Distillation Urine Processor Lessons Learned from Development and Life Testing

NASA Technical Reports Server (NTRS)

Hutchens, Cindy F.; Long, David A.

1999-01-01

Vapor Compression Distillation (VCD) is the chosen technology for urine processing aboard the International Space Station (155). Development and life testing over the past several years have brought to the forefront problems and solutions for the VCD technology. Testing between 1992 and 1998 has been instrumental in developing estimates of hardware life and reliability. It has also helped improve the hardware design in ways that either correct existing problems or enhance the existing design of the hardware. The testing has increased the confidence in the VCD technology and reduced technical and programmatic risks. This paper summarizes the test results and changes that have been made to the VCD design.

A software methodology for compiling quantum programs

NASA Astrophysics Data System (ADS)

Häner, Thomas; Steiger, Damian S.; Svore, Krysta; Troyer, Matthias

2018-04-01

Quantum computers promise to transform our notions of computation by offering a completely new paradigm. To achieve scalable quantum computation, optimizing compilers and a corresponding software design flow will be essential. We present a software architecture for compiling quantum programs from a high-level language program to hardware-specific instructions. We describe the necessary layers of abstraction and their differences and similarities to classical layers of a computer-aided design flow. For each layer of the stack, we discuss the underlying methods for compilation and optimization. Our software methodology facilitates more rapid innovation among quantum algorithm designers, quantum hardware engineers, and experimentalists. It enables scalable compilation of complex quantum algorithms and can be targeted to any specific quantum hardware implementation.

An Advanced Programming Technique for a Cost-Effective Hardware-Independent Realization of Naval Software Systems. Final Technical Report, Part II.

ERIC Educational Resources Information Center

Computer Symbolic, Inc., Washington, DC.

A pseudo assembly language, PAL, was developed and specified for use as the lowest level in a general, multilevel programing system for the realization of cost-effective, hardware-independent Naval software. The language was developed as part of the system called FIRMS (Fast Iterative Recursive Macro System) and is sufficiently general to allow…

James Webb Space Telescope Integrated Science Instrument Module Thermal Vacuum Thermal Balance Test Campaign at NASA's Goddard Space Flight Center

NASA Technical Reports Server (NTRS)

Glazer, Stuart; Comber, Brian (Inventor)

2016-01-01

The James Webb Space Telescope is a large infrared telescope with a 6.5-meter primary mirror, designed as a successor to the Hubble Space Telescope when launched in 2018. Three of the four science instruments contained within the Integrated Science Instrument Module (ISIM) are passively cooled to their operational temperature range of 36K to 40K with radiators, and the fourth instrument is actively cooled to its operational temperature of approximately 6K. Thermal-vacuum testing of the flight science instruments at the ISIM element level has taken place in three separate highly challenging and extremely complex thermal tests within a gaseous helium-cooled shroud inside Goddard Space Flight Centers Space Environment Simulator. Special data acquisition software was developed for these tests to monitor over 1700 flight and test sensor measurements, track over 50 gradients, component rates, and temperature limits in real time against defined constraints and limitations, and guide the complex transition from ambient to final cryogenic temperatures and back. This extremely flexible system has proven highly successful in safeguarding the nearly $2B science payload during the 3.5-month-long thermal tests. Heat flow measurement instrumentation, or Q-meters, were also specially developed for these tests. These devices provide thermal boundaries o the flight hardware while measuring instrument heat loads up to 600 mW with an estimated uncertainty of 2 mW in test, enabling accurate thermal model correlation, hardware design validation, and workmanship verification. The high accuracy heat load measurements provided first evidence of a potentially serious hardware design issue that was subsequently corrected. This paper provides an overview of the ISIM-level thermal-vacuum tests and thermal objectives; explains the thermal test configuration and thermal balances; describes special measurement instrumentation and monitoring and control software; presents key test thermal results; lists problems encountered during testing and lessons learned.

Design and realization of the baseband processor in satellite navigation and positioning receiver

NASA Astrophysics Data System (ADS)

Zhang, Dawei; Hu, Xiulin; Li, Chen

2007-11-01

The content of this paper is focused on the Design and realization of the baseband processor in satellite navigation and positioning receiver. Baseband processor is the most important part of the satellite positioning receiver. The design covers baseband processor's main functions include multi-channel digital signal DDC, acquisition, code tracking, carrier tracking, demodulation, etc. The realization is based on an Altera's FPGA device, that makes the system can be improved and upgraded without modifying the hardware. It embodies the theory of software defined radio (SDR), and puts the theory of the spread spectrum into practice. This paper puts emphasis on the realization of baseband processor in FPGA. In the order of choosing chips, design entry, debugging and synthesis, the flow is presented detailedly. Additionally the paper detailed realization of Digital PLL in order to explain a method of reducing the consumption of FPGA. Finally, the paper presents the result of Synthesis. This design has been used in BD-1, BD-2 and GPS.

Umbilical Connect Techniques Improvement-Technology Study

NASA Technical Reports Server (NTRS)

Valkema, Donald C.

1972-01-01

The objective of this study was to develop concepts, specifications, designs, techniques, and procedures capable of significantly reducing the time required to connect and verify umbilicals for ground services to the space shuttle. The desired goal was to reduce the current time requirement of several shifts for the Saturn 5/Apollo to an elapsed time of less than one hour to connect and verify all of the space shuttle ground service umbilicals. The study was conducted in four phases: (1) literature and hardware examination, (2) concept development, (3) concept evaluation and tradeoff analysis, and (4) selected concept design. The final product of this study was a detail design of a rise-off disconnect panel prototype test specimen for a LO2/LH2 booster (or an external oxygen/hydrogen tank for an orbiter), a detail design of a swing-arm mounted preflight umbilical carrier prototype test specimen, and a part 1 specification for the umbilical connect and verification design for the vehicles as defined in the space shuttle program.

Round Girls in Square Computers: Feminist Perspectives on the Aesthetics of Computer Hardware.

ERIC Educational Resources Information Center

Carr-Chellman, Alison A.; Marra, Rose M.; Roberts, Shari L.

2002-01-01

Considers issues related to computer hardware, aesthetics, and gender. Explores how gender has influenced the design of computer hardware and how these gender-driven aesthetics may have worked to maintain, extend, or alter gender distinctions, roles, and stereotypes; discusses masculine media representations; and presents an alternative model.…

Teaching Robotics Software with the Open Hardware Mobile Manipulator

ERIC Educational Resources Information Center

Vona, M.; Shekar, N. H.

2013-01-01

The "open hardware mobile manipulator" (OHMM) is a new open platform with a unique combination of features for teaching robotics software and algorithms. On-board low- and high-level processors support real-time embedded programming and motor control, as well as higher-level coding with contemporary libraries. Full hardware designs and…

Mechanically verified hardware implementing an 8-bit parallel IO Byzantine agreement processor

NASA Technical Reports Server (NTRS)

Moore, J. Strother

1992-01-01

Consider a network of four processors that use the Oral Messages (Byzantine Generals) Algorithm of Pease, Shostak, and Lamport to achieve agreement in the presence of faults. Bevier and Young have published a functional description of a single processor that, when interconnected appropriately with three identical others, implements this network under the assumption that the four processors step in synchrony. By formalizing the original Pease, et al work, Bevier and Young mechanically proved that such a network achieves fault tolerance. We develop, formalize, and discuss a hardware design that has been mechanically proven to implement their processor. In particular, we formally define mapping functions from the abstract state space of the Bevier-Young processor to a concrete state space of a hardware module and state a theorem that expresses the claim that the hardware correctly implements the processor. We briefly discuss the Brock-Hunt Formal Hardware Description Language which permits designs both to be proved correct with the Boyer-Moore theorem prover and to be expressed in a commercially supported hardware description language for additional electrical analysis and layout. We briefly describe our implementation.

Automated recognition of helium speech. Phase I: Investigation of microprocessor based analysis/synthesis system

NASA Astrophysics Data System (ADS)

Jelinek, H. J.

1986-01-01

This is the Final Report of Electronic Design Associates on its Phase I SBIR project. The purpose of this project is to develop a method for correcting helium speech, as experienced in diver-surface communication. The goal of the Phase I study was to design, prototype, and evaluate a real time helium speech corrector system based upon digital signal processing techniques. The general approach was to develop hardware (an IBM PC board) to digitize helium speech and software (a LAMBDA computer based simulation) to translate the speech. As planned in the study proposal, this initial prototype may now be used to assess expected performance from a self contained real time system which uses an identical algorithm. The Final Report details the work carried out to produce the prototype system. Four major project tasks were: a signal processing scheme for converting helium speech to normal sounding speech was generated. The signal processing scheme was simulated on a general purpose (LAMDA) computer. Actual helium speech was supplied to the simulation and the converted speech was generated. An IBM-PC based 14 bit data Input/Output board was designed and built. A bibliography of references on speech processing was generated.

Lab at Home: Hardware Kits for a Digital Design Lab

ERIC Educational Resources Information Center

Oliver, J. P.; Haim, F.

2009-01-01

An innovative laboratory methodology for an introductory digital design course is presented. Instead of having traditional lab experiences, where students have to come to school classrooms, a "lab at home" concept is proposed. Students perform real experiments in their own homes, using hardware kits specially developed for this purpose. They…

Microprocessor Design Using Hardware Description Language

ERIC Educational Resources Information Center

Mita, Rosario; Palumbo, Gaetano

2008-01-01

The following paper has been conceived to deal with the contents of some lectures aimed at enhancing courses on digital electronic, microelectronic or VLSI systems. Those lectures show how to use a hardware description language (HDL), such as the VHDL, to specify, design and verify a custom microprocessor. The general goal of this work is to teach…

49 CFR Appendix C to Part 236 - Safety Assurance Criteria and Processes

Code of Federal Regulations, 2010 CFR

2010-10-01

... system (all its elements including hardware and software) must be designed to assure safe operation with... unsafe errors in the software due to human error in the software specification, design, or coding phases... (hardware or software, or both) are used in combination to ensure safety. If a common mode failure exists...

Accelerating a MPEG-4 video decoder through custom software/hardware co-design

NASA Astrophysics Data System (ADS)

Díaz, Jorge L.; Barreto, Dacil; García, Luz; Marrero, Gustavo; Carballo, Pedro P.; Núñez, Antonio

2007-05-01

In this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel μC/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP) MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project and its main goal is the establishment of methodologies for the design of real-time complex digital systems using Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.

Onboard Monitoring and Reporting for Commercial Motor Vehicle Safety Final Report

DOT National Transportation Integrated Search

2008-02-01

This Final Report describes the process and product from the project, Onboard Monitoring and Reporting for Commercial Motor Vehicle Safety (OBMS), in which a prototypical suite of hardware and software on a class 8 truck was developed and tested. The...

IOTA (Integrable Optics Test Accelerator): Facility and experimental beam physics program

DOE Office of Scientific and Technical Information (OSTI.GOV)

Antipov, Sergei; Broemmelsiek, Daniel; Bruhwiler, David

The Integrable Optics Test Accelerator (IOTA) is a storage ring for advanced beam physics research currently being built and commissioned at Fermilab. It will operate with protons and electrons using injectors with momenta of 70 and 150 MeV/c, respectively. The research program includes the study of nonlinear focusing integrable optical beam lattices based on special magnets and electron lenses, beam dynamics of space-charge effects and their compensation, optical stochastic cooling, and several other experiments. In this article, we present the design and main parameters of the facility, outline progress to date and provide the timeline of the construction, commissioning andmore » research. Finally, the physical principles, design, and hardware implementation plans for the major IOTA experiments are also discussed.« less

IOTA (Integrable Optics Test Accelerator): Facility and experimental beam physics program

DOE PAGES

Antipov, Sergei; Broemmelsiek, Daniel; Bruhwiler, David; ...

2017-03-06

The Integrable Optics Test Accelerator (IOTA) is a storage ring for advanced beam physics research currently being built and commissioned at Fermilab. It will operate with protons and electrons using injectors with momenta of 70 and 150 MeV/c, respectively. The research program includes the study of nonlinear focusing integrable optical beam lattices based on special magnets and electron lenses, beam dynamics of space-charge effects and their compensation, optical stochastic cooling, and several other experiments. In this article, we present the design and main parameters of the facility, outline progress to date and provide the timeline of the construction, commissioning andmore » research. Finally, the physical principles, design, and hardware implementation plans for the major IOTA experiments are also discussed.« less

Energy Efficient Engine combustor test hardware detailed design report

NASA Technical Reports Server (NTRS)

Burrus, D. L.; Chahrour, C. A.; Foltz, H. L.; Sabla, P. E.; Seto, S. P.; Taylor, J. R.

1984-01-01

The Energy Efficient Engine (E3) Combustor Development effort was conducted as part of the overall NASA/GE E3 Program. This effort included the selection of an advanced double-annular combustion system design. The primary intent was to evolve a design which meets the stringent emissions and life goals of the E3 as well as all of the usual performance requirements of combustion systems for modern turbofan engines. Numerous detailed design studies were conducted to define the features of the combustion system design. Development test hardware was fabricated, and an extensive testing effort was undertaken to evaluate the combustion system subcomponents in order to verify and refine the design. Technology derived from this development effort will be incorporated into the engine combustion system hardware design. This advanced engine combustion system will then be evaluated in component testing to verify the design intent. What is evolving from this development effort is an advanced combustion system capable of satisfying all of the combustion system design objectives and requirements of the E3. Fuel nozzle, diffuser, starting, and emissions design studies are discussed.

An autonomous satellite architecture integrating deliberative reasoning and behavioural intelligence

NASA Technical Reports Server (NTRS)

Lindley, Craig A.

1993-01-01

This paper describes a method for the design of autonomous spacecraft, based upon behavioral approaches to intelligent robotics. First, a number of previous spacecraft automation projects are reviewed. A methodology for the design of autonomous spacecraft is then presented, drawing upon both the European Space Agency technological center (ESTEC) automation and robotics methodology and the subsumption architecture for autonomous robots. A layered competency model for autonomous orbital spacecraft is proposed. A simple example of low level competencies and their interaction is presented in order to illustrate the methodology. Finally, the general principles adopted for the control hardware design of the AUSTRALIS-1 spacecraft are described. This system will provide an orbital experimental platform for spacecraft autonomy studies, supporting the exploration of different logical control models, different computational metaphors within the behavioral control framework, and different mappings from the logical control model to its physical implementation.

A method for real-time implementation of HOG feature extraction

NASA Astrophysics Data System (ADS)

Luo, Hai-bo; Yu, Xin-rong; Liu, Hong-mei; Ding, Qing-hai

2011-08-01

Histogram of oriented gradient (HOG) is an efficient feature extraction scheme, and HOG descriptors are feature descriptors which is widely used in computer vision and image processing for the purpose of biometrics, target tracking, automatic target detection(ATD) and automatic target recognition(ATR) etc. However, computation of HOG feature extraction is unsuitable for hardware implementation since it includes complicated operations. In this paper, the optimal design method and theory frame for real-time HOG feature extraction based on FPGA were proposed. The main principle is as follows: firstly, the parallel gradient computing unit circuit based on parallel pipeline structure was designed. Secondly, the calculation of arctangent and square root operation was simplified. Finally, a histogram generator based on parallel pipeline structure was designed to calculate the histogram of each sub-region. Experimental results showed that the HOG extraction can be implemented in a pixel period by these computing units.

Space Station galley design

NASA Technical Reports Server (NTRS)

Trabanino, Rudy; Murphy, George L.; Yakut, M. M.

1986-01-01

An Advanced Food Hardware System galley for the initial operating capability (IOC) Space Station is discussed. Space Station will employ food hardware items that have never been flown in space, such as a dishwasher, microwave oven, blender/mixer, bulk food and beverage dispensers, automated food inventory management, a trash compactor, and an advanced technology refrigerator/freezer. These new technologies and designs are described and the trades, design, development, and testing associated with each are summarized.

Space biology initiative program definition review. Trade study 3: Hardware miniaturization versus cost

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Herbert, Frank J.; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

1989-01-01

The optimum hardware miniaturization level with the lowest cost impact for space biology hardware was determined. Space biology hardware and/or components/subassemblies/assemblies which are the most likely candidates for application of miniaturization are to be defined and relative cost impacts of such miniaturization are to be analyzed. A mathematical or statistical analysis method with the capability to support development of parametric cost analysis impacts for levels of production design miniaturization are provided.

No-hardware-signature cybersecurity-crypto-module: a resilient cyber defense agent

NASA Astrophysics Data System (ADS)

Zaghloul, A. R. M.; Zaghloul, Y. A.

2014-06-01

We present an optical cybersecurity-crypto-module as a resilient cyber defense agent. It has no hardware signature since it is bitstream reconfigurable, where single hardware architecture functions as any selected device of all possible ones of the same number of inputs. For a two-input digital device, a 4-digit bitstream of 0s and 1s determines which device, of a total of 16 devices, the hardware performs as. Accordingly, the hardware itself is not physically reconfigured, but its performance is. Such a defense agent allows the attack to take place, rendering it harmless. On the other hand, if the system is already infected with malware sending out information, the defense agent allows the information to go out, rendering it meaningless. The hardware architecture is immune to side attacks since such an attack would reveal information on the attack itself and not on the hardware. This cyber defense agent can be used to secure a point-to-point, point-to-multipoint, a whole network, and/or a single entity in the cyberspace. Therefore, ensuring trust between cyber resources. It can provide secure communication in an insecure network. We provide the hardware design and explain how it works. Scalability of the design is briefly discussed. (Protected by United States Patents No.: US 8,004,734; US 8,325,404; and other National Patents worldwide.)

Design of Measure and Control System for Precision Pesticide Deploying Dynamic Simulating Device

NASA Astrophysics Data System (ADS)

Liang, Yong; Liu, Pingzeng; Wang, Lu; Liu, Jiping; Wang, Lang; Han, Lei; Yang, Xinxin

A measure and control system for precision deploying pesticide simulating equipment is designed in order to study pesticide deployment technology. The system can simulate every state of practical pesticide deployment, and carry through precise, simultaneous measure to every factor affecting pesticide deployment effects. The hardware and software incorporates a structural design of modularization. The system is divided into many different function modules of hardware and software, and exploder corresponding modules. The modules’ interfaces are uniformly defined, which is convenient for module connection, enhancement of system’s universality, explodes efficiency and systemic reliability, and make the program’s characteristics easily extended and easy maintained. Some relevant hardware and software modules can be adapted to other measures and control systems easily. The paper introduces the design of special numeric control system, the main module of information acquisition system and the speed acquisition module in order to explain the design process of the module.

Ares I-X Flight Test--The Future Begins Here

NASA Technical Reports Server (NTRS)

Davis, Stephan R.; Robinson, Kimberly F.

2008-01-01

In less than one year, the National Aeronautics and Space Administration (NASA) will launch the Ares I-X mission. This will be the first flight of the Ares I crew launch vehicle, which, together with the Ares V cargo launch vehicle, will send humans to the Moon and beyond. Personnel from the Ares I-X Mission Management Office (MMO) are finalizing designs and fabricating vehicle hardware for a 2009 launch. Ares I-X will be a suborbital development flight test that will gather critical data about the flight dynamics of the integrated launch vehicle stack; understand how to control its roll during flight; better characterize the severe stage separation environments that the upper stage engine will experience during future flights; and demonstrate the first stage recovery system. NASA also will modify the launch infrastructure and ground and mission operations. The Ares I-X Flight Test Vehicle (FTV) will incorporate flight and mockup hardware similar in mass and weight to the operational vehicle. It will be powered by a four-segment Solid Rocket Booster (SRB), which is currently in Shuttle inventory, and will include a fifth spacer segment and new forward structures to make the booster approximately the same size and weight as the five-segment SRB. The Ares I-X flight profile will closely approximate the flight conditions that the Ares I will experience through Mach 4.5, up to approximately 130,000 feet (39,600 meters (m)) and through maximum dynamic pressure ('Max Q') of approximately 800 pounds per square foot (38.3 kilopascals (kPa)). Data from the Ares I-X flight will support the Ares I Critical Design Review (CDR), scheduled for 2010. Work continues on Ares I-X design and hardware fabrication. All of the individual elements are undergoing CDRs, followed by a two-part integrated vehicle CDR in March and July 2008. The various hardware elements are on schedule to begin deliveries to Kennedy Space Center (KSC) in early September 2008. Ares I-X is the first step in the long journey to the Moon and farther destinations. This suborbital test will be NASA's first flight of a new human-rated launch vehicle in more than a generation. This promises to be an exciting time for NASA and the nation, as we reach for new goals in space exploration. A visual presentation is included.

Compiler-assisted multiple instruction rollback recovery using a read buffer

NASA Technical Reports Server (NTRS)

Alewine, N. J.; Chen, S.-K.; Fuchs, W. K.; Hwu, W.-M.

1993-01-01

Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs have also been developed which remove rollback data hazards directly with data-flow transformations. This paper focuses on compiler-assisted techniques to achieve multiple instruction rollback recovery. We observe that some data hazards resulting from instruction rollback can be resolved efficiently by providing an operand read buffer while others are resolved more efficiently with compiler transformations. A compiler-assisted multiple instruction rollback scheme is developed which combines hardware-implemented data redundancy with compiler-driven hazard removal transformations. Experimental performance evaluations indicate improved efficiency over previous hardware-based and compiler-based schemes.

Effects of Augmented Reality on Student Achievement and Self-Efficacy in Vocational Education and Training

ERIC Educational Resources Information Center

Sirakaya, Mustafa; Cakmak, Ebru Kilic

2018-01-01

This study aimed to test the impact of augmented reality (AR) use on student achievement and self-efficacy in vocational education and training. For this purpose, a marker-based AR application, called HardwareAR, was developed. HardwareAR provides information about characteristics of hardware components, ports and assembly. The research design was…

A Flexible Hardware Test and Demonstration Platform for the Fractionated System Architecture YETE

NASA Astrophysics Data System (ADS)

Kempf, Florian; Haber, Roland; Tzschichholz, Tristan; Mikschl, Tobias; Hilgarth, Alexander; Montenegro, Sergio; Schilling, Klaus

2016-08-01

This paper introduces a hardware-in-the loop test and demonstration platform for the YETE system architecture for fractionated spacecraft. It is designed for rapid prototyping and testing of distributed control approaches for the YETE architecture subject to varying network topologies and transmission channel properties between the individual YETE hardware nodes.

Automated culture system experiments hardware: developing test results and design solutions.

PubMed

Freddi, M; Covini, M; Tenconi, C; Ricci, C; Caprioli, M; Cotronei, V

2002-07-01

The experiment proposed by Prof. Ricci University of Milan is funded by ASI with Laben as industrial Prime Contractor. ACS-EH (Automated Culture System-Experiment Hardware) will support the multigenerational experiment on weightlessness with rotifers and nematodes within four Experiment Containers (ECs) located inside the European Modular Cultivation System (EMCS) facility..Actually the Phase B is in progress and a concept design solution has been defined. The most challenging aspects for the design of such hardware are, from biological point of view the provision of an environment which permits animal's survival and to maintain desiccated generations separated and from the technical point of view, the miniaturisation of the hardware itself due to the reduce EC provided volume (160mmx60mmx60mm). The miniaturisation will allow a better use of the available EMCS Facility resources (e.g. volume. power etc.) and to fulfil the experiment requirements. ACS-EH, will be ready to fly in the year 2005 on boar the ISS.

Extending the Capture Volume of an Iris Recognition System Using Wavefront Coding and Super-Resolution.

PubMed

Hsieh, Sheng-Hsun; Li, Yung-Hui; Tien, Chung-Hao; Chang, Chin-Chen

2016-12-01

Iris recognition has gained increasing popularity over the last few decades; however, the stand-off distance in a conventional iris recognition system is too short, which limits its application. In this paper, we propose a novel hardware-software hybrid method to increase the stand-off distance in an iris recognition system. When designing the system hardware, we use an optimized wavefront coding technique to extend the depth of field. To compensate for the blurring of the image caused by wavefront coding, on the software side, the proposed system uses a local patch-based super-resolution method to restore the blurred image to its clear version. The collaborative effect of the new hardware design and software post-processing showed great potential in our experiment. The experimental results showed that such improvement cannot be achieved by using a hardware-or software-only design. The proposed system can increase the capture volume of a conventional iris recognition system by three times and maintain the system's high recognition rate.

Anthropometric Accommodation in Space Suit Design

NASA Technical Reports Server (NTRS)

Rajulu, Sudhakar; Thaxton, Sherry

2007-01-01

Design requirements for next generation hardware are in process at NASA. Anthropometry requirements are given in terms of minimum and maximum sizes for critical dimensions that hardware must accommodate. These dimensions drive vehicle design and suit design, and implicitly have an effect on crew selection and participation. At this stage in the process, stakeholders such as cockpit and suit designers were asked to provide lists of dimensions that will be critical for their design. In addition, they were asked to provide technically feasible minimum and maximum ranges for these dimensions. Using an adjusted 1988 Anthropometric Survey of U.S. Army (ANSUR) database to represent a future astronaut population, the accommodation ranges provided by the suit critical dimensions were calculated. This project involved participation from the Anthropometry and Biomechanics facility (ABF) as well as suit designers, with suit designers providing expertise about feasible hardware dimensions and the ABF providing accommodation analysis. The initial analysis provided the suit design team with the accommodation levels associated with the critical dimensions provided early in the study. Additional outcomes will include a comparison of principal components analysis as an alternate method for anthropometric analysis.

Cross-Platform Mobile Application Development: A Pattern-Based Approach

DTIC Science & Technology

2012-03-01

Additionally, developers should be aware of different hardware capabilities such as external SD cards and forward facing cameras. Finally, each...applications are written. Additionally, developers should be aware of different hardware capabilities such as external SD cards and forward facing cameras... iTunes library, allowing the user to update software and manage content on each device. However, in iOS5, the PC Free feature removes this constraint

Error detection method

DOEpatents

Olson, Eric J.

2013-06-11

An apparatus, program product, and method that run an algorithm on a hardware based processor, generate a hardware error as a result of running the algorithm, generate an algorithm output for the algorithm, compare the algorithm output to another output for the algorithm, and detect the hardware error from the comparison. The algorithm is designed to cause the hardware based processor to heat to a degree that increases the likelihood of hardware errors to manifest, and the hardware error is observable in the algorithm output. As such, electronic components may be sufficiently heated and/or sufficiently stressed to create better conditions for generating hardware errors, and the output of the algorithm may be compared at the end of the run to detect a hardware error that occurred anywhere during the run that may otherwise not be detected by traditional methodologies (e.g., due to cooling, insufficient heat and/or stress, etc.).

Long life assurance study for manned spacecraft long life hardware. Volume 1: Summary of long life assurance guidelines

NASA Technical Reports Server (NTRS)

1972-01-01

A long life assurance program for the development of design, process, test, and application guidelines for achieving reliable spacecraft hardware was conducted. The study approach consisted of a review of technical data performed concurrently with a survey of the aerospace industry. The data reviewed included design and operating characteristics, failure histories and solutions, and similar documents. The topics covered by the guidelines are reported. It is concluded that long life hardware is achieved through meticulous attention to many details and no simple set of rules can suffice.

Addressing hypertext design and conversion issues

NASA Technical Reports Server (NTRS)

Glusko, Robert J.

1990-01-01

Hypertext is a network of information units connected by relational links. A hypertext system is a configuration of hardware and software that presents a hypertext to users and allows them to manage and access the information that it contains. Hypertext is also a user interface concept that closely supports the ways that people use printed information. Hypertext concepts encourage modularity and the elimination of redundancy in data bases because information can be stored only once but viewed in any appropriate context. Hypertext is such a hot idea because it is an enabling technology in that workstations and personal computers finally provide enough local processing power for hypertext user interfaces.

Adaptive jammer nulling in EHF communications satellites

NASA Astrophysics Data System (ADS)

Bhagwan, Jai; Kavanagh, Stephen; Yen, J. L.

A preliminary investigation is reviewed concerning adaptive null steering multibeam uplink receiving system concepts for future extremely high frequency communications satellites. Primary alternatives in the design of the uplink antenna, the multibeam adaptive nulling receiver, and the processing algorithm and optimization criterion are discussed. The alternatives are phased array, lens or reflector antennas, nulling at radio frequency or an intermediate frequency, wideband versus narrowband nulling, and various adaptive nulling algorithms. A primary determinant of the hardware complexity is the receiving system architecture, which is described for the alternative antenna and nulling concepts. The final concept chosen will be influenced by the nulling performance requirements, cost, and technological readiness.

Development of the Space Debris Sensor (SDS)

NASA Technical Reports Server (NTRS)

Hamilton, Joe; Liou, J. -C.; Anz-Meador, P.; Matney, M.; Christiansen, E.

2017-01-01

Debris Resistive/Acoustic Grid Orbital Navy-NASA Sensor (DRAGONS) is an impact sensor designed to detect and characterize collisions with small orbital debris: from 50 microns to greater than 1millimeter debris size detection; Characterizes debris size, speed, direction, and density. The Space Debris Sensor (SDS) is a flight demonstration of DRAGONS on the International Space Station: Approximately 1 square meter of detection area facing the ISS velocity vector; Minimum two year mission on Columbus External Payloads Facility (EPF); Minimal obstruction from ISS hardware; Development is nearing final checkout and integration with the ISS; Current launch schedule is SpaceX13, about September 2017, or SpaceX14, about Jan 2018.

A survey of current solid state star tracker technology

NASA Astrophysics Data System (ADS)

Armstrong, R. W.; Staley, D. A.

1985-12-01

This paper is a survey of the current state of the art in design of star trackers for spacecraft attitude determination systems. Specific areas discussed are sensor technology, including the current state-of-the-art solid state sensors and techniques of mounting and cooling the sensor, analog image preprocessing electronics performance, and digital processing hardware and software. Three examples of area array solid state star tracker development are presented - ASTROS, developed by the Jet Propulsion Laboratory, the Retroreflector Field Tracker (RFT) by Ball Aerospace, and TRW's MADAN. Finally, a discussion of solid state line arrays explores the possibilities for one-dimensional imagers which offer simplified scan control electronics.

CSNS computing environment Based on OpenStack

NASA Astrophysics Data System (ADS)

Li, Yakang; Qi, Fazhi; Chen, Gang; Wang, Yanming; Hong, Jianshu

2017-10-01

Cloud computing can allow for more flexible configuration of IT resources and optimized hardware utilization, it also can provide computing service according to the real need. We are applying this computing mode to the China Spallation Neutron Source(CSNS) computing environment. So, firstly, CSNS experiment and its computing scenarios and requirements are introduced in this paper. Secondly, the design and practice of cloud computing platform based on OpenStack are mainly demonstrated from the aspects of cloud computing system framework, network, storage and so on. Thirdly, some improvments to openstack we made are discussed further. Finally, current status of CSNS cloud computing environment are summarized in the ending of this paper.

Flight set 360L003 instrumentation final test report, volume 9

NASA Technical Reports Server (NTRS)

1989-01-01

Post-flight instrumentation hardware and data evaluation for 360L003 is summarized. The 360L003 motors were equipped with Developmental Flight Instrumentation (DFI), Operational Flight Instrumentation (OFI), and Ground Environmental Instrumentation (GEI). The DFI was designed to measure strain, temperature, pressure, and vibration at various locations on the motor during flight. The DFI is used to validate engineering models in a flight environment. The OFI consists of six Operational Pressure Tranducers which monitor chamber pressure during flight. These pressure transducers are used in the SRB separation cue. GEI measures the motor case, igniter flange, and nozzle temperature prior to launch.

The CMS electron and photon trigger for the LHC Run 2

NASA Astrophysics Data System (ADS)

Dezoort, Gage; Xia, Fan

2017-01-01

The CMS experiment implements a sophisticated two-level triggering system composed of Level-1, instrumented by custom-design hardware boards, and a software High-Level-Trigger. A new Level-1 trigger architecture with improved performance is now being used to maintain the thresholds that were used in LHC Run I for the more challenging luminosity conditions experienced during Run II. The upgrades to the calorimetry trigger will be described along with performance data. The algorithms for the selection of final states with electrons and photons, both for precision measurements and for searches of new physics beyond the Standard Model, will be described in detail.

Diffusion-Weighted Imaging Outside the Brain: Consensus Statement From an ISMRM-Sponsored Workshop

PubMed Central

Taouli, Bachir; Beer, Ambros J.; Chenevert, Thomas; Collins, David; Lehman, Constance; Matos, Celso; Padhani, Anwar R.; Rosenkrantz, Andrew B.; Shukla-Dave, Amita; Sigmund, Eric; Tanenbaum, Lawrence; Thoeny, Harriet; Thomassin-Naggara, Isabelle; Barbieri, Sebastiano; Corcuera-Solano, Idoia; Orton, Matthew; Partridge, Savannah C.; Koh, Dow-Mu

2016-01-01

The significant advances in magnetic resonance imaging (MRI) hardware and software, sequence design, and postprocessing methods have made diffusion-weighted imaging (DWI) an important part of body MRI protocols and have fueled extensive research on quantitative diffusion outside the brain, particularly in the oncologic setting. In this review, we summarize the most up-to-date information on DWI acquisition and clinical applications outside the brain, as discussed in an ISMRM-sponsored symposium held in April 2015. We first introduce recent advances in acquisition, processing, and quality control; then review scientific evidence in major organ systems; and finally describe future directions. PMID:26892827

Optical Diagnostic System for Solar Sails: Phase 1 Final Report

NASA Technical Reports Server (NTRS)

Pappa, Richard S.; Blandino, Joseph R.; Caldwell, Douglas W.; Carroll, Joseph A.; Jenkins, Christopher H. M.; Pollock, Thomas C.

2004-01-01

NASA's In-Space Propulsion program recently selected AEC-ABLE Engineering and L'Garde, Inc. to develop scale-model solar sail hardware and demonstrate its functionality on the ground. Both are square sail designs with lightweight diagonal booms (<100 g/m) and ultra-thin membranes (<10 g/sq m). To support this technology, the authors are developing an integrated diagnostics instrumentation package for monitoring solar sail structures such as these in a near-term flight experiment. We refer to this activity as the "Optical Diagnostic System (ODS) for Solar Sails" project. The approach uses lightweight optics and photogrammetric techniques to measure solar sail membrane and boom shape and dynamics, thermography to map temperature, and non-optical sensors including MEMS accelerometers and load cells. The diagnostics package must measure key structural characteristics including deployment dynamics, sail support tension, boom and sail deflection, boom and sail natural frequencies, sail temperature, and sail integrity. This report summarizes work in the initial 6-month Phase I period (conceptual design phase) and complements the final presentation given in Huntsville, AL on January 14, 2004.

Three-Dimensional Nanobiocomputing Architectures With Neuronal Hypercells

DTIC Science & Technology

2007-06-01

Neumann architectures, and CMOS fabrication. Novel solutions of massive parallel distributed computing and processing (pipelined due to systolic... and processing platforms utilizing molecular hardware within an enabling organization and architecture. The design technology is based on utilizing a...Microsystems and Nanotechnologies investigated a novel 3D3 (Hardware Software Nanotechnology) technology to design super-high performance computing

Marketing and Distributive Education Curriculum Guide: Hardware-Building Materials, Farm and Garden.

ERIC Educational Resources Information Center

Cluck, Janice Bora

Designed to be used with the General Marketing Curriculum Planning Guide (ED 156 860), this guide is intended to provide the curriculum coordinator with a basis for planning a comprehensive program in the field of marketing for farm and garden hardware building materials; it is designed also to allow marketing and distributive education…

A Systematic Software, Firmware, and Hardware Codesign Methodology for Digital Signal Processing

DTIC Science & Technology

2014-03-01

possible mappings ...................................................60 Table 25. Possible optimal leaf -nodes... size weight and power UAV unmanned aerial vehicle UHF ultra-high frequency UML universal modeling language Verilog verify logic VHDL VHSIC...optimal leaf -nodes to some design patterns for embedded system design. Software and hardware partitioning is a very difficult challenge in the field of

Organizational Analysis of the United States Army Evaluation Center

DTIC Science & Technology

2014-12-01

analysis of qualitative or quantitative data obtained from design reviews, hardware inspections, M&S, hardware and software testing , metrics review... Research Development Test & Evaluation (RDT&E) appropriation account. The Defense Acquisition Portal ACQuipedia website describes RDT&E as “ one of the... research , design , development, test and evaluation, production, installation, operation, and maintenance; data collection; processing and analysis

Reliability achievement in high technology space systems

NASA Technical Reports Server (NTRS)

Lindstrom, D. L.

1981-01-01

The production of failure-free hardware is discussed. The elements required to achieve such hardware are: technical expertise to design, analyze, and fully understand the design; use of high reliability parts and materials control in the manufacturing process; and testing to understand the system and weed out defects. The durability of the Hughes family of satellites is highlighted.

Error protection capability of space shuttle data bus designs

NASA Technical Reports Server (NTRS)

Proch, G. E.

1974-01-01

Error protection assurance in the reliability of digital data communications is discussed. The need for error protection on the space shuttle data bus system has been recognized and specified as a hardware requirement. The error protection techniques of particular concern are those designed into the Shuttle Main Engine Interface (MEI) and the Orbiter Multiplex Interface Adapter (MIA). The techniques and circuit design details proposed for these hardware are analyzed in this report to determine their error protection capability. The capability is calculated in terms of the probability of an undetected word error. Calculated results are reported for a noise environment that ranges from the nominal noise level stated in the hardware specifications to burst levels which may occur in extreme or anomalous conditions.

Application of Pi Preform Composite Joints in Fabrication of NASA Composite Crew Module Demonstration Structure

NASA Technical Reports Server (NTRS)

Higgins, John E.; Pelham, Larry

2008-01-01

This paper will describe unique and extensive use of pre-woven and impregnated pi cross-sections in fabrication of a carbon composite demonstration structure for the Composite Crew Module (CCM) Program. The program is managed by the NASA Safety and Engineering Center with participants from ten NASA Centers and AFRL. Multiple aerospace contractors are participating in the design development, tooling and fabrication effort as well. The goal of the program is to develop an agency wide design team for composite habitable spacecraft. The specific goals for this development project are: a) To gain hands on experience in design, building and testing a composite crew module. b) To validate key assumptions by resolving composite spacecraft design details through fabrication and testing of hardware. This paper will focus on the design and fabrication issues supporting selection of the Lockheed Martin patented Pi pre-form to provide sound composite joints a numerous locations in the structure. This abstract is based on Preliminary Design data. The final design will continue to evolve through the fall of 2007 with fabrication mostly completed by conference date.

Altair Lander Life Support: Design Analysis Cycles 4 and 5

NASA Technical Reports Server (NTRS)

Anderson, Molly; Curley, Su; Rotter, Henry; Stambaugh, Imelda; Yagoda, Evan

2011-01-01

Life support systems are a critical part of human exploration beyond low earth orbit. NASA s Altair Lunar Lander team is pursuing efficient solutions to the technical challenges of human spaceflight. Life support design efforts up through Design Analysis Cycle (DAC) 4 focused on finding lightweight and reliable solutions for the Sortie and Outpost missions within the Constellation Program. In DAC-4 and later follow on work, changes were made to add functionality for new requirements accepted by the Altair project, and to update the design as knowledge about certain issues or hardware matured. In DAC-5, the Altair project began to consider mission architectures outside the Constellation baseline. Selecting the optimal life support system design is very sensitive to mission duration. When the mission goals and architecture change several trade studies must be conducted to determine the appropriate design. Finally, several areas of work developed through the Altair project may be applicable to other vehicle concepts for microgravity missions. Maturing the Altair life support system related analysis, design, and requirements can provide important information for developers of a wide range of other human vehicles.

Altair Lander Life Support: Design Analysis Cycles 4 and 5

NASA Technical Reports Server (NTRS)

Anderson, Molly; Curley, Su; Rotter, Henry; Yagoda, Evan

2010-01-01

Life support systems are a critical part of human exploration beyond low earth orbit. NASA s Altair Lunar Lander team is pursuing efficient solutions to the technical challenges of human spaceflight. Life support design efforts up through Design Analysis Cycle (DAC) 4 focused on finding lightweight and reliable solutions for the Sortie and Outpost missions within the Constellation Program. In DAC-4 and later follow on work, changes were made to add functionality for new requirements accepted by the Altair project, and to update the design as knowledge about certain issues or hardware matured. In DAC-5, the Altair project began to consider mission architectures outside the Constellation baseline. Selecting the optimal life support system design is very sensitive to mission duration. When the mission goals and architecture change several trade studies must be conducted to determine the appropriate design. Finally, several areas of work developed through the Altair project may be applicable to other vehicle concepts for microgravity missions. Maturing the Altair life support system related analysis, design, and requirements can provide important information for developers of a wide range of other human vehicles.

The use of COSMIC NASTRAN in an integrated conceptual design environment

NASA Technical Reports Server (NTRS)

White, Gil

1989-01-01

Changes in both software and hardware are rapidly bringing conceptual engineering tools like finite element analysis into mainstream mechanical design. Systems that integrate all phases of the manufacturing process provide the most cost benefits. The application of programming concepts like object oriented programming allow for the encapsulation of intelligent data within the design geometry. This combined with declining cost in per seat hardware bring new alternatives to the user.

High Frequency Adaptive Instability Suppression Controls in a Liquid-Fueled Combustor

NASA Technical Reports Server (NTRS)

Kopasakis, George

2003-01-01

This effort extends into high frequency (>500 Hz), an earlier developed adaptive control algorithm for the suppression of thermo-acoustic instabilities in a liquidfueled combustor. The earlier work covered the development of a controls algorithm for the suppression of a low frequency (280 Hz) combustion instability based on simulations, with no hardware testing involved. The work described here includes changes to the simulation and controller design necessary to control the high frequency instability, augmentations to the control algorithm to improve its performance, and finally hardware testing and results with an experimental combustor rig developed for the high frequency case. The Adaptive Sliding Phasor Averaged Control (ASPAC) algorithm modulates the fuel flow in the combustor with a control phase that continuously slides back and forth within the phase region that reduces the amplitude of the instability. The results demonstrate the power of the method - that it can identify and suppress the instability even when the instability amplitude is buried in the noise of the combustor pressure. The successful testing of the ASPAC approach helped complete an important NASA milestone to demonstrate advanced technologies for low-emission combustors.

Status of DSMT research program

NASA Technical Reports Server (NTRS)

Mcgowan, Paul E.; Javeed, Mehzad; Edighoffer, Harold H.

1991-01-01

The status of the Dynamic Scale Model Technology (DSMT) research program is presented. DSMT is developing scale model technology for large space structures as part of the Control Structure Interaction (CSI) program at NASA Langley Research Center (LaRC). Under DSMT a hybrid-scale structural dynamics model of Space Station Freedom was developed. Space Station Freedom was selected as the focus structure for DSMT since the station represents the first opportunity to obtain flight data on a complex, three-dimensional space structure. Included is an overview of DSMT including the development of the space station scale model and the resulting hardware. Scaling technology was developed for this model to achieve a ground test article which existing test facilities can accommodate while employing realistically scaled hardware. The model was designed and fabricated by the Lockheed Missile and Space Co., and is assembled at LaRc for dynamic testing. Also, results from ground tests and analyses of the various model components are presented along with plans for future subassembly and matted model tests. Finally, utilization of the scale model for enhancing analysis verification of the full-scale space station is also considered.

Autonomous vehicle navigation utilizing fuzzy controls concepts for a next generation wheelchair.

PubMed

Hansen, J D; Barrett, S F; Wright, C H G; Wilcox, M

2008-01-01

Three different positioning techniques were investigated to create an autonomous vehicle that could accurately navigate towards a goal: Global Positioning System (GPS), compass dead reckoning, and Ackerman steering. Each technique utilized a fuzzy logic controller that maneuvered a four-wheel car towards a target. The reliability and the accuracy of the navigation methods were investigated by modeling the algorithms in software and implementing them in hardware. To implement the techniques in hardware, positioning sensors were interfaced to a remote control car and a microprocessor. The microprocessor utilized the sensor measurements to orient the car with respect to the target. Next, a fuzzy logic control algorithm adjusted the front wheel steering angle to minimize the difference between the heading and bearing. After minimizing the heading error, the car maintained a straight steering angle along its path to the final destination. The results of this research can be used to develop applications that require precise navigation. The design techniques can also be implemented on alternate platforms such as a wheelchair to assist with autonomous navigation.

The ATLAS Level-1 Topological Trigger performance in Run 2

NASA Astrophysics Data System (ADS)

Riu, Imma; ATLAS Collaboration

2017-10-01

The Level-1 trigger is the first event rate reducing step in the ATLAS detector trigger system, with an output rate of up to 100 kHz and decision latency smaller than 2.5 μs. During the LHC shutdown after Run 1, the Level-1 trigger system was upgraded at hardware, firmware and software levels. In particular, a new electronics sub-system was introduced in the real-time data processing path: the Level-1 Topological trigger system. It consists of a single electronics shelf equipped with two Level-1 Topological processor blades. They receive real-time information from the Level-1 calorimeter and muon triggers, which is processed to measure angles between trigger objects, invariant masses or other kinematic variables. Complementary to other requirements, these measurements are taken into account in the final Level-1 trigger decision. The system was installed and commissioning started in 2015 and continued during 2016. As part of the commissioning, the decisions from individual algorithms were simulated and compared with the hardware response. An overview of the Level-1 Topological trigger system design, commissioning process and impact on several event selections are illustrated.

Anion exchange membrane fuel cells: Current status and remaining challenges

DOE PAGES

Gottesfeld, Shimshon; Dekel, Dario R.; Page, Miles; ...

2017-09-01

The anion exchange membrane fuel cell (AEMFC) is an attractive alternative to acidic proton exchange membrane fuel cells, which to date have required platinum-based catalysts, as well as acid-tolerant stack hardware. The AEMFC could use non-platinum-group metal catalysts and less expensive metal hardware thanks to the high pH of the electrolyte. Over the last decade, substantial progress has been made in improving the performance and durability of the AEMFC through the development of new materials and the optimization of system design and operation conditions. Here in this perspective article, we describe the current status of AEMFCs as having reached beginningmore » of life performance very close to that of PEMFCs when using ultra-low loadings of Pt, while advancing towards operation on non-platinum-group metal catalysts alone. In the latter sections, we identify the remaining technical challenges, which require further research and development, focusing on the materials and operational factors that critically impact AEMFC performance and/or durability. Finally, these perspectives may provide useful insights for the development of next-generation of AEMFCs.« less

Hardware problems encountered in solar heating and cooling systems

NASA Technical Reports Server (NTRS)

Cash, M.

1978-01-01

Numerous problems in the design, production, installation, and operation of solar energy systems are discussed. Described are hardware problems, which range from simple to obscure and complex, and their resolution.

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications

PubMed Central

Stoppe, Jannis; Drechsler, Rolf

2015-01-01

The complexity of hardware designs is still increasing according to Moore's law. With embedded systems being more and more intertwined and working together not only with each other, but also with their environments as cyber physical systems (CPSs), more streamlined development workflows are employed to handle the increasing complexity during a system's design phase. SystemC is a C++ library for the design of hardware/software systems, enabling the designer to quickly prototype, e.g., a distributed CPS without having to decide about particular implementation details (such as whether to implement a feature in hardware or in software) early in the design process. Thereby, this approach reduces the initial implementation's complexity by offering an abstract layer with which to build a working prototype. However, as SystemC is based on C++, analyzing designs becomes a difficult task due to the complex language features that are available to the designer. Several fundamentally different approaches for analyzing SystemC designs have been suggested. This work illustrates several different SystemC analysis approaches, including their specific advantages and shortcomings, allowing designers to pick the right tools to assist them with a specific problem during the design of a system using SystemC. PMID:25946632

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications.

PubMed

Stoppe, Jannis; Drechsler, Rolf

2015-05-04

The complexity of hardware designs is still increasing according to Moore's law. With embedded systems being more and more intertwined and working together not only with each other, but also with their environments as cyber physical systems (CPSs), more streamlined development workflows are employed to handle the increasing complexity during a system's design phase. SystemC is a C++ library for the design of hardware/software systems, enabling the designer to quickly prototype, e.g., a distributed CPS without having to decide about particular implementation details (such as whether to implement a feature in hardware or in software) early in the design process. Thereby, this approach reduces the initial implementation's complexity by offering an abstract layer with which to build a working prototype. However, as SystemC is based on C++, analyzing designs becomes a difficult task due to the complex language features that are available to the designer. Several fundamentally different approaches for analyzing SystemC designs have been suggested. This work illustrates several different SystemC analysis approaches, including their specific advantages and shortcomings, allowing designers to pick the right tools to assist them with a specific problem during the design of a system using SystemC.

Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

NASA Technical Reports Server (NTRS)

Slaughter, D. W.

1977-01-01

A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

Apollo experience report: Battery subsystem

NASA Technical Reports Server (NTRS)

Trout, J. B.

1972-01-01

Experience with the Apollo command service module and lunar module batteries is discussed. Significant hardware development concepts and hardware test results are summarized, and the operational performance of batteries on the Apollo 7 to 13 missions is discussed in terms of performance data, mission constraints, and basic hardware design and capability. Also, the flight performance of the Apollo battery charger is discussed. Inflight data are presented.

Composite fuselage crown panel manufacturing technology

NASA Technical Reports Server (NTRS)

Willden, Kurtis; Metschan, S.; Grant, C.; Brown, T.

1992-01-01

Commercial fuselage structures contain significant challenges in attempting to save manufacturing costs with advanced composite technology. Assembly issues, materials costs, and fabrication of elements with complex geometry are each expected to drive the cost of composite fuselage structure. Key technologies, such as large crown panel fabrication, were pursued for low cost. An intricate bond panel design and manufacturing concept were selected based on the efforts of the Design Build Team. The manufacturing processes selected for the intricate bond design include multiple large panel fabrication with Advanced Tow Placement (ATP) process, innovative cure tooling concepts, resin transfer molding of long fuselage frames, and use of low cost materials forms. The process optimization for final design/manufacturing configuration included factory simulations and hardware demonstrations. These efforts and other optimization tasks were instrumental in reducing costs by 18 pct. and weight by 45 pct. relative to an aluminum baseline. The qualitative and quantitative results of the manufacturing demonstrations were used to assess manufacturing risks and technology readiness.

Adapting the design of Anesthesia Information Management Systems to innovations depicted in Industrial Property documents.

PubMed

Spyropoulos, B; Tzavaras, A; Zogogianni, D; Botsivaly, M

2013-01-01

The purpose of this paper is to present the design and the current development status of an Anesthesia Information Management System (AIMS). For this system, the physical and technical advances, depicted in relevant, recently published Industrial Property documents, have been taken into account. Additional innovative sensors create further data-load to be managed. Novel wireless data-transmission modes demand eventually compliance to further proper standards, so that interoperability between AIMS and the existing Hospital Information Systems is being sustained. We attempted to define, the state-of-the-art concerning the functions, the design-prerequisites and the relevant standards and of an "emerging" AIMS that is combining hardware innovation, real-time data acquisition, processing and displaying and lastly enabling the necessary interoperability with the other components of the existing Hospital Information Systems. Finally, we report based on this approach, about the design and implementation status, of our "real-world" system under development and discuss the multifarious obstacles encountered during this still on-going project.

Design and Implementation of a New Real-Time Frequency Sensor Used as Hardware Countermeasure

PubMed Central

Jiménez-Naharro, Raúl; Gómez-Galán, Juan Antonio; Sánchez-Raya, Manuel; Gómez-Bravo, Fernando; Pedro-Carrasco, Manuel

2013-01-01

A new digital countermeasure against attacks related to the clock frequency is –presented. This countermeasure, known as frequency sensor, consists of a local oscillator, a transition detector, a measurement element and an output block. The countermeasure has been designed using a full-custom technique implemented in an Application-Specific Integrated Circuit (ASIC), and the implementation has been verified and characterized with an integrated design using a 0.35 μm standard Complementary Metal Oxide Semiconductor (CMOS) technology (Very Large Scale Implementation—VLSI implementation). The proposed solution is configurable in resolution time and allowed range of period, achieving a minimum resolution time of only 1.91 ns and an initialization time of 5.84 ns. The proposed VLSI implementation shows better results than other solutions, such as digital ones based on semi-custom techniques and analog ones based on band pass filters, all design parameters considered. Finally, a counter has been used to verify the good performance of the countermeasure in avoiding the success of an attack. PMID:24008285

SPANR planning and scheduling

NASA Astrophysics Data System (ADS)

Freund, Richard F.; Braun, Tracy D.; Kussow, Matthew; Godfrey, Michael; Koyama, Terry

2001-07-01

SPANR (Schedule, Plan, Assess Networked Resources) is (i) a pre-run, off-line planning and (ii) a runtime, just-in-time scheduling mechanism. It is designed to support primarily commercial applications in that it optimizes throughput rather than individual jobs (unless they have highest priority). Thus it is a tool for a commercial production manager to maximize total work. First the SPANR Planner is presented showing the ability to do predictive 'what-if' planning. It can answer such questions as, (i) what is the overall effect of acquiring new hardware or (ii) what would be the effect of a different scheduler. The ability of the SPANR Planner to formulate in advance tree-trimming strategies is useful in several commercial applications, such as electronic design or pharmaceutical simulations. The SPANR Planner is demonstrated using a variety of benchmarks. The SPANR Runtime Scheduler (RS) is briefly presented. The SPANR RS can provide benefit for several commercial applications, such as airframe design and financial applications. Finally a design is shown whereby SPANR can provide scheduling advice to most resource management systems.

Composite fuselage crown panel manufacturing technology

NASA Technical Reports Server (NTRS)

Willden, Kurtis; Metschan, S.; Grant, C.; Brown, T.

1992-01-01

Commercial fuselage structures contain significant challenges in attempting to save manufacturing costs with advanced composite technology. Assembly issues, material costs, and fabrication of elements with complex geometry are each expected to drive the cost of composite fuselage structures. Boeing's efforts under the NASA ACT program have pursued key technologies for low-cost, large crown panel fabrication. An intricate bond panel design and manufacturing concepts were selected based on the efforts of the Design Build Team (DBT). The manufacturing processes selected for the intricate bond design include multiple large panel fabrication with the Advanced Tow Placement (ATP) process, innovative cure tooling concepts, resin transfer molding of long fuselage frames, and utilization of low-cost material forms. The process optimization for final design/manufacturing configuration included factory simulations and hardware demonstrations. These efforts and other optimization tasks were instrumental in reducing cost by 18 percent and weight by 45 percent relative to an aluminum baseline. The qualitative and quantitative results of the manufacturing demonstrations were used to assess manufacturing risks and technology readiness.

Automatic mine detection based on multiple features

NASA Astrophysics Data System (ADS)

Yu, Ssu-Hsin; Gandhe, Avinash; Witten, Thomas R.; Mehra, Raman K.

2000-08-01

Recent research sponsored by the Army, Navy and DARPA has significantly advanced the sensor technologies for mine detection. Several innovative sensor systems have been developed and prototypes were built to investigate their performance in practice. Most of the research has been focused on hardware design. However, in order for the systems to be in wide use instead of in limited use by a small group of well-trained experts, an automatic process for mine detection is needed to make the final decision process on mine vs. no mine easier and more straightforward. In this paper, we describe an automatic mine detection process consisting of three stage, (1) signal enhancement, (2) pixel-level mine detection, and (3) object-level mine detection. The final output of the system is a confidence measure that quantifies the presence of a mine. The resulting system was applied to real data collected using radar and acoustic technologies.

[3D-TV health assessment system by the multi-modal physiological signals].

PubMed

Li, Zhongqiang; Xing, Lidong; Qian, Zhiyu; Wang, Xiao; Yu, Defei; Liu, Baoyu; Jin, Shuai

2014-03-01

In order to meet the requirements of the multi-physiological signal measurement of the 3D-TV health assessment, try to find the suitable biological acquisition chips and design the hardware system which can detect different physiological signals in real time. The systems mainly uses ARM11/S3C6410 microcontroller to control the EEG/EOG acquisition chip RHA2116 and the ECG acquisition chip ADS1298, and then the microcontroller transfer the data collected by the chips to the PC software by the USB port which can display and save the experimental data in real time, then use the Matlab software for further processing of the data, finally make a final health assessment. In the meantime, for the different varieties in the different brain regions of watching 3D-TV, developed the special brain electrode placement and the experimental data processing methods, then effectively disposed the multi-signal data in the multilevel.

Orion Post-Landing Crew Thermal Control Modeling and Analysis Results

NASA Technical Reports Server (NTRS)

Cross, Cynthia D.; Bue, Grant; Rains, George E.

2009-01-01

In a vehicle constrained by mass and power, it is necessary to ensure that during the process of reducing hardware mass and power that the health and well being of the crew is not compromised in the design process. To that end, it is necessary to ensure that in the final phase of flight - recovery, that the crew core body temperature remains below the crew cognitive deficit set by the Constellation program. This paper will describe the models used to calculate the thermal environment of the spacecraft after splashdown as well as the human thermal model used to calculate core body temperature. Then the results of these models will be examined to understand the key drivers for core body temperature. Finally, the analysis results will be used to show that additional cooling capability must be added to the vehicle to ensure crew member health post landing.

Thermal Hardware for the Thermal Analyst

NASA Technical Reports Server (NTRS)

Steinfeld, David

2015-01-01

The presentation will be given at the 26th Annual Thermal Fluids Analysis Workshop (TFAWS 2015) hosted by the Goddard Space Flight Center (GSFC) Thermal Engineering Branch (Code 545). NCTS 21070-1. Most Thermal analysts do not have a good background into the hardware which thermally controls the spacecraft they design. SINDA and Thermal Desktop models are nice, but knowing how this applies to the actual thermal hardware (heaters, thermostats, thermistors, MLI blanketing, optical coatings, etc...) is just as important. The course will delve into the thermal hardware and their application techniques on actual spacecraft. Knowledge of how thermal hardware is used and applied will make a thermal analyst a better engineer.

The scheme machine: A case study in progress in design derivation at system levels

NASA Technical Reports Server (NTRS)

Johnson, Steven D.

1995-01-01

The Scheme Machine is one of several design projects of the Digital Design Derivation group at Indiana University. It differs from the other projects in its focus on issues of system design and its connection to surrounding research in programming language semantics, compiler construction, and programming methodology underway at Indiana and elsewhere. The genesis of the project dates to the early 1980's, when digital design derivation research branched from the surrounding research effort in programming languages. Both branches have continued to develop in parallel, with this particular project serving as a bridge. However, by 1990 there remained little real interaction between the branches and recently we have undertaken to reintegrate them. On the software side, researchers have refined a mathematically rigorous (but not mechanized) treatment starting with the fully abstract semantic definition of Scheme and resulting in an efficient implementation consisting of a compiler and virtual machine model, the latter typically realized with a general purpose microprocessor. The derivation includes a number of sophisticated factorizations and representations and is also deep example of the underlying engineering methodology. The hardware research has created a mechanized algebra supporting the tedious and massive transformations often seen at lower levels of design. This work has progressed to the point that large scale devices, such as processors, can be derived from first-order finite state machine specifications. This is roughly where the language oriented research stops; thus, together, the two efforts establish a thread from the highest levels of abstract specification to detailed digital implementation. The Scheme Machine project challenges hardware derivation research in several ways, although the individual components of the system are of a similar scale to those we have worked with before. The machine has a custom dual-ported memory to support garbage collection. It consists of four tightly coupled processes--processor, collector, allocator, memory--with a very non-trivial synchronization relationship. Finally, there are deep issues of representation for the run-time objects of a symbolic processing language. The research centers on verification through integrated formal reasoning systems, but is also involved with modeling and prototyping environments. Since the derivation algebra is basd on an executable modeling language, there is opportunity to incorporate design animation in the design process. We are looking for ways to move smoothly and incrementally from executable specifications into hardware realization. For example, we can run the garbage collector specification, a Scheme program, directly against the physical memory prototype, and similarly, the instruction processor model against the heap implementation.

DRFM Cordic Processor and Sea Clutter Modeling for Enhancing Structured False Target Synthesis

DTIC Science & Technology

2017-09-01

was implemented using the Verilog hardware description language. The second investigation concerns generating sea clutter to impose on the false target...to achieve accuracy at 5.625o. The resulting design was implemented using the Verilog hardware description language. The second investigation...33 3. Initialization of the Angle Accumulator ....................................34 4. Design Methodology for I/Q Phase

Embedded algorithms within an FPGA-based system to process nonlinear time series data

NASA Astrophysics Data System (ADS)

Jones, Jonathan D.; Pei, Jin-Song; Tull, Monte P.

2008-03-01

This paper presents some preliminary results of an ongoing project. A pattern classification algorithm is being developed and embedded into a Field-Programmable Gate Array (FPGA) and microprocessor-based data processing core in this project. The goal is to enable and optimize the functionality of onboard data processing of nonlinear, nonstationary data for smart wireless sensing in structural health monitoring. Compared with traditional microprocessor-based systems, fast growing FPGA technology offers a more powerful, efficient, and flexible hardware platform including on-site (field-programmable) reconfiguration capability of hardware. An existing nonlinear identification algorithm is used as the baseline in this study. The implementation within a hardware-based system is presented in this paper, detailing the design requirements, validation, tradeoffs, optimization, and challenges in embedding this algorithm. An off-the-shelf high-level abstraction tool along with the Matlab/Simulink environment is utilized to program the FPGA, rather than coding the hardware description language (HDL) manually. The implementation is validated by comparing the simulation results with those from Matlab. In particular, the Hilbert Transform is embedded into the FPGA hardware and applied to the baseline algorithm as the centerpiece in processing nonlinear time histories and extracting instantaneous features of nonstationary dynamic data. The selection of proper numerical methods for the hardware execution of the selected identification algorithm and consideration of the fixed-point representation are elaborated. Other challenges include the issues of the timing in the hardware execution cycle of the design, resource consumption, approximation accuracy, and user flexibility of input data types limited by the simplicity of this preliminary design. Future work includes making an FPGA and microprocessor operate together to embed a further developed algorithm that yields better computational and power efficiency.

Special environmental control and life support equipment test analyses and hardware

NASA Technical Reports Server (NTRS)

Callahan, David M.

1995-01-01

This final report summarizes NAS8-38250 contract events, 'Special Environmental Control and Life Support Systems Test Analysis and Hardware'. This report is technical and includes programmatic development. Key to the success of this contract was the evaluation of Environmental Control and Life Support Systems (ECLSS) test results via sophisticated laboratory analysis capabilities. The history of the contract, including all subcontracts, is followed by the support and development of each Task.

Systems design study of the Pioneer Venus spacecraft. Appendices to volume 1, sections 8-11 (part 3 of 3). [power subsystem/cost tradeoffs for Venus probe

NASA Technical Reports Server (NTRS)

1973-01-01

Power subsystem cost/weight tradeoffs are discussed for the Venus probe spacecraft. The cost estimations of power subsystem units were based upon DSCS-2, DSP, and Pioneer 10 and 11 hardware design and development and manufacturing experience. Parts count and degree of modification of existing hardware were factored into the estimate of manufacturing and design and development costs. Cost data includes sufficient quantities of units to equip probe bus and orbiter versions. It was based on the orbiter complement of equipment, but the savings in fewer slices for the probe bus balance the cost of the different probe bus battery. The preferred systems for the Thor/Delta and for the Atlas/Centaur are discussed. The weights of the candidate designs were based upon slice or tray weights for functionally equivalent circuitry measured on existing hardware such as Pioneers 10 and 11, Intelsat 3, DSCS-2, or DSP programs. Battery weights were based on measured cell weight data adjusted for case weight or off-the-shelf battery weights. The solar array weight estimate was based upon recent hardware experience on DSCS-2 and DSP arrays.

Computerized atmospheric trace contaminant control simulation for manned spacecraft

NASA Technical Reports Server (NTRS)

Perry, J. L.

1993-01-01

Buildup of atmospheric trace contaminants in enclosed volumes such as a spacecraft may lead to potentially serious health problems for the crew members. For this reason, active control methods must be implemented to minimize the concentration of atmospheric contaminants to levels that are considered safe for prolonged, continuous exposure. Designing hardware to accomplish this has traditionally required extensive testing to characterize and select appropriate control technologies. Data collected since the Apollo project can now be used in a computerized performance simulation to predict the performance and life of contamination control hardware to allow for initial technology screening, performance prediction, and operations and contingency studies to determine the most suitable hardware approach before specific design and testing activities begin. The program, written in FORTRAN 77, provides contaminant removal rate, total mass removed, and per pass efficiency for each control device for discrete time intervals. In addition, projected cabin concentration is provided. Input and output data are manipulated using commercial spreadsheet and data graphing software. These results can then be used in analyzing hardware design parameters such as sizing and flow rate, overall process performance and program economics. Test performance may also be predicted to aid test design.

NASA's Space Launch System Program Update

NASA Technical Reports Server (NTRS)

May, Todd; Lyles, Garry

2015-01-01

Hardware and software for the world's most powerful launch vehicle for exploration is being welded, assembled, and tested today in high bays, clean rooms and test stands across the United States. NASA's Space Launch System (SLS) continued to make significant progress in the past year, including firing tests of both main propulsion elements, manufacturing of flight hardware, and the program Critical Design Review (CDR). Developed with the goals of safety, affordability, and sustainability, SLS will deliver unmatched capability for human and robotic exploration. The initial Block 1 configuration will deliver more than 70 metric tons (t) (154,000 pounds) of payload to low Earth orbit (LEO). The evolved Block 2 design will deliver some 130 t (286,000 pounds) to LEO. Both designs offer enormous opportunity and flexibility for larger payloads, simplifying payload design as well as ground and on-orbit operations, shortening interplanetary transit times, and decreasing overall mission risk. Over the past year, every vehicle element has manufactured or tested hardware, including flight hardware for Exploration Mission 1 (EM-1). This paper will provide an overview of the progress made over the past year and provide a glimpse of upcoming milestones on the way to a 2018 launch readiness date.

System and Mass Storage Study for Defense Mapping Agency Topographic Center (DMATC/HC)

DTIC Science & Technology

1977-04-01

34•»-—•—■»■—- view. The assessment should be based on carefully designed control condi- tions—data volume, resolution, function, etc...egories: hardware control and library management support. This software is designed to interface with IBM 360/370 OS and OS/VS. No interface with a...laser re- cording unit includes a programmable recorder control subsystem which can be designed to provide a hardware and software interface compatible

Project based, Collaborative, Algorithmic Robotics for High School Students: Programming Self Driving Race Cars at MIT

DTIC Science & Technology

2017-02-19

software systems: the students design and build robotics software towards real-world applications, without being distracted by hardware issues; (ii) it...high school students require the students to focus on building and integrating the hardware that make up the robot, at the expense of designing and...robotics programs focus on the mechanics; as a result, they do not have room for students to design and implement relatively complex software systems, as

Multi-Mission System Architecture Platform: Design and Verification of the Remote Engineering Unit

NASA Technical Reports Server (NTRS)

Sartori, John

2005-01-01

The Multi-Mission System Architecture Platform (MSAP) represents an effort to bolster efficiency in the spacecraft design process. By incorporating essential spacecraft functionality into a modular, expandable system, the MSAP provides a foundation on which future spacecraft missions can be developed. Once completed, the MSAP will provide support for missions with varying objectives, while maintaining a level of standardization that will minimize redesign of general system components. One subsystem of the MSAP, the Remote Engineering Unit (REU), functions by gathering engineering telemetry from strategic points on the spacecraft and providing these measurements to the spacecraft's Command and Data Handling (C&DH) subsystem. Before the MSAP Project reaches completion, all hardware, including the REU, must be verified. However, the speed and complexity of the REU circuitry rules out the possibility of physical prototyping. Instead, the MSAP hardware is designed and verified using the Verilog Hardware Definition Language (HDL). An increasingly popular means of digital design, HDL programming provides a level of abstraction, which allows the designer to focus on functionality while logic synthesis tools take care of gate-level design and optimization. As verification of the REU proceeds, errors are quickly remedied, preventing costly changes during hardware validation. After undergoing the careful, iterative processes of verification and validation, the REU and MSAP will prove their readiness for use in a multitude of spacecraft missions.

Thermal management of advanced fuel cell power systems

NASA Technical Reports Server (NTRS)

Vanderborgh, N. E.; Hedstrom, J.; Huff, J.

1990-01-01

It is shown that fuel cell devices are particularly attractive for the high-efficiency, high-reliability space hardware necessary to support upcoming space missions. These low-temperature hydrogen-oxygen systems necessarily operate with two-phase water. In either PEMFCs (proton exchange membrane fuel cells) or AFCs (alkaline fuel cells), engineering design must be critically focused on both stack temperature control and on the relative humidity control necessary to sustain appropriate conductivity within the ionic conductor. Water must also be removed promptly from the hardware. Present designs for AFC space hardware accomplish thermal management through two coupled cooling loops, both driven by a heat transfer fluid, and involve a recirculation fan to remove water and heat from the stack. There appears to be a certain advantage in using product water for these purposes within PEM hardware, because in that case a single fluid can serve both to control stack temperature, operating simultaneously as a heat transfer medium and through evaporation, and to provide the gas-phase moisture levels necessary to set the ionic conductor at appropriate performance levels. Moreover, the humidification cooling process automatically follows current loads. This design may remove the necessity for recirculation gas fans, thus demonstrating the long-term reliability essential for future space power hardware.

Hardware Removal in Craniomaxillofacial Trauma

PubMed Central

Cahill, Thomas J.; Gandhi, Rikesh; Allori, Alexander C.; Marcus, Jeffrey R.; Powers, David; Erdmann, Detlev; Hollenbeck, Scott T.; Levinson, Howard

2015-01-01

Background Craniomaxillofacial (CMF) fractures are typically treated with open reduction and internal fixation. Open reduction and internal fixation can be complicated by hardware exposure or infection. The literature often does not differentiate between these 2 entities; so for this study, we have considered all hardware exposures as hardware infections. Approximately 5% of adults with CMF trauma are thought to develop hardware infections. Management consists of either removing the hardware versus leaving it in situ. The optimal approach has not been investigated. Thus, a systematic review of the literature was undertaken and a resultant evidence-based approach to the treatment and management of CMF hardware infections was devised. Materials and Methods A comprehensive search of journal articles was performed in parallel using MEDLINE, Web of Science, and ScienceDirect electronic databases. Keywords and phrases used were maxillofacial injuries; facial bones; wounds and injuries; fracture fixation, internal; wound infection; and infection. Our search yielded 529 articles. To focus on CMF fractures with hardware infections, the full text of English-language articles was reviewed to identify articles focusing on the evaluation and management of infected hardware in CMF trauma. Each article’s reference list was manually reviewed and citation analysis performed to identify articles missed by the search strategy. There were 259 articles that met the full inclusion criteria and form the basis of this systematic review. The articles were rated based on the level of evidence. There were 81 grade II articles included in the meta-analysis. Result Our meta-analysis revealed that 7503 patients were treated with hardware for CMF fractures in the 81 grade II articles. Hardware infection occurred in 510 (6.8%) of these patients. Of those infections, hardware removal occurred in 264 (51.8%) patients; hardware was left in place in 166 (32.6%) patients; and in 80 (15.6%) cases, there was no report as to hardware management. Finally, our review revealed that there were no reported differences in outcomes between groups. Conclusions Management of CMF hardware infections should be performed in a sequential and consistent manner to optimize outcome. An evidence-based algorithm for management of CMF hardware infections based on this critical review of the literature is presented and discussed. PMID:25393499

Design, fabrication and acceptance testing of a zero gravity whole body shower, volume 1

NASA Technical Reports Server (NTRS)

1973-01-01

The effort to design whole body shower for the space station prototype is reported. Clothes and dish washer/dryer concepts were formulated with consideration given to integrating such a system with the overall shower design. Water recycling methods to effect vehicle weight savings were investigated and it was concluded that reusing wash and/or rinse water resulted in weight savings which were not sufficient to outweigh the added degree of hardware complexity. The formulation of preliminary and final designs for the shower are described. A detailed comparison of the air drag vs. vacuum pickup method was prepared that indicated the air drag concept results in more severe space station weight penalties; therefore, the preliminary system design was based on utilizing the vacuum pickup method. Tests were performed to determine the optimum methods of storing, heating and sterilizing the cleansing agent utilized in the shower; it was concluded that individual packages of pre-sterilized cleansing agent should be used. Integration features with the space station prototype system were defined and incorporated into the shower design as necessary.

Design and implementation of interface units for high speed fiber optics local area networks and broadband integrated services digital networks

NASA Technical Reports Server (NTRS)

Tobagi, Fouad A.; Dalgic, Ismail; Pang, Joseph

1990-01-01

The design and implementation of interface units for high speed Fiber Optic Local Area Networks and Broadband Integrated Services Digital Networks are discussed. During the last years, a number of network adapters that are designed to support high speed communications have emerged. This approach to the design of a high speed network interface unit was to implement package processing functions in hardware, using VLSI technology. The VLSI hardware implementation of a buffer management unit, which is required in such architectures, is described.

Optical System Design for the Next Generation Space Telescope

NASA Technical Reports Server (NTRS)

Solomon, Leonard H. (Principal Investigator); Kahan, Mark A.

1996-01-01

This report provides considerations and suggested approaches for design of the Optical Telescope Assembly and the segmented primary mirror of a Next Generation Space Telescope (NGST). Based on prior studies and hardware development, we provide data and design information on low-risk materials and hardware configurations most likely to meet low weight, low temperature and long-life requirements of the nominal 8-meter aperture NGST. We also provide preliminary data for cost and performance trades, and recommendations for technology development and demonstration required to support the system design effort.

System design of the Pioneer Venus spacecraft. Volume 7: Communication subsystem studies

NASA Technical Reports Server (NTRS)

Newlands, D. M.

1973-01-01

Communications subsystem tradeoffs were undertaken to establish a low cost and low weight design consistent with the mission requirements. Because of the weight constraint of the Thor/Delta launched configuration, minimum weight was emphasized in determining the Thor/Delta design. In contrast, because of the greatly relaxed weight constraint of the Atlas/Centaur launched configuration, minimum cost and off the shelf hardware were emphasized and the attendant weight penalities accepted. Communication subsystem hardware elements identified for study included probe and bus antennas (CM-6, CM-17), power amplifiers (CM-10), and the large probe transponder and small probe stable oscillator required for doppler tracking (CM-11, CM-16). In addition, particular hardware problems associated with the probe high temperature and high-g environment were investigated (CM-7).

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

NASA Astrophysics Data System (ADS)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

JSC Metal Finishing Waste Minimization Methods

NASA Technical Reports Server (NTRS)

Sullivan, Erica

2003-01-01

THe paper discusses the following: Johnson Space Center (JSC) has achieved VPP Star status and is ISO 9001 compliant. The Structural Engineering Division in the Engineering Directorate is responsible for operating the metal finishing facility at JSC. The Engineering Directorate is responsible for $71.4 million of space flight hardware design, fabrication and testing. The JSC Metal Finishing Facility processes flight hardware to support the programs in particular schedule and mission critical flight hardware. The JSC Metal Finishing Facility is operated by Rothe Joint Venture. The Facility provides following processes: anodizing, alodining, passivation, and pickling. JSC Metal Finishing Facility completely rebuilt in 1998. Total cost of $366,000. All new tanks, electrical, plumbing, and ventilation installed. Designed to meet modern safety, environmental, and quality requirements. Designed to minimize contamination and provide the highest quality finishes.

Coupled Loads Analysis of the Modified NASA Barge Pegasus and Space Launch System Hardware

NASA Technical Reports Server (NTRS)

Knight, J. Brent

2015-01-01

A Coupled Loads Analysis (CLA) has been performed for barge transport of Space Launch System hardware on the recently modified NASA barge Pegasus. The barge re-design was facilitated with detailed finite element analyses by the ARMY Corps of Engineers - Marine Design Center. The Finite Element Model (FEM) utilized in the design was also used in the subject CLA. The Pegasus FEM and CLA results are presented as well as a comparison of the analysis process to that of a payload being transported to space via the Space Shuttle. Discussion of the dynamic forcing functions is included as well. The process of performing a dynamic CLA of NASA hardware during marine transport is thought to be a first and can likely support minimization of undue conservatism.

High-pressure LOX/hydrocarbon preburners and gas generators

NASA Technical Reports Server (NTRS)

Huebner, A. W.

1981-01-01

The objective of the program was to conduct a small scale hardware test program to establish the technology base required for LOX/hydrocarbon preburners and gas generators. The program consisted of six major tasks; Task I reviewed and assessed the performance prediction models and defined a subscale test program. Task II designed and fabricated this subscale hardware. Task III tested and analyzed the data from this hardware. Task IV analyzed the hot fire results and formulated a preliminary design for 40K preburner assemblies. Task V took the preliminary design and detailed and fabricated three 40K size preburner assemblies, one each fuel-rich LOX/CH, and LOX/RP-1 and one oxidizer rich LOX/CH4. Task VI delivered these preburner assemblies to MSFC for subsequent evaluation.

VLSI 'smart' I/O module development

NASA Astrophysics Data System (ADS)

Kirk, Dan

The developmental history, design, and operation of the MIL-STD-1553A/B discrete and serial module (DSM) for the U.S. Navy AN/AYK-14(V) avionics computer are described and illustrated with diagrams. The ongoing preplanned product improvement for the AN/AYK-14(V) includes five dual-redundant MIL-STD-1553 channels based on DSMs. The DSM is a front-end processor for transferring data to and from a common memory, sharing memory with a host processor to provide improved 'smart' input/output performance. Each DSM comprises three hardware sections: three VLSI-6000 semicustomized CMOS arrays, memory units to support the arrays, and buffers and resynchronization circuits. The DSM hardware module design, VLSI-6000 design tools, controlware and test software, and checkout procedures (using a hardware simulator) are characterized in detail.

Interim Service ISDN Satellite (ISIS) hardware experiment design for advanced ISDN satellite design and experiments

NASA Technical Reports Server (NTRS)

Pepin, Gerard R.

1992-01-01

The Interim Service Integrated Services Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Design for Advanced Satellite Designs describes the design of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into time division multiple access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the V.35 interface for satellite uplink. The same ISTA converts in the opposite direction the V.35 to U-interface data with a simple switch setting.

Design of a nickel-hydrogen battery simulator for the NASA EOS testbed

NASA Technical Reports Server (NTRS)

Gur, Zvi; Mang, Xuesi; Patil, Ashok R.; Sable, Dan M.; Cho, Bo H.; Lee, Fred C.

1992-01-01

The hardware and software design of a nickel-hydrogen (Ni-H2) battery simulator (BS) with application to the NASA Earth Observation System (EOS) satellite is presented. The battery simulator is developed as a part of a complete testbed for the EOS satellite power system. The battery simulator involves both hardware and software components. The hardware component includes the capability of sourcing and sinking current at a constant programmable voltage. The software component includes the capability of monitoring the battery's ampere-hours (Ah) and programming the battery voltage according to an empirical model of the nickel-hydrogen battery stored in a computer.

Human Centered Hardware Modeling and Collaboration

NASA Technical Reports Server (NTRS)

Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

2013-01-01

In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

Prototype solar heating and combined heating and cooling systems

NASA Technical Reports Server (NTRS)

1978-01-01

Designs were completed, hardware was received, and hardware was shipped to two sites. A change was made in the heat pump working fluid. Problem investigation of shroud coatings for the collector received emphasis.

Hardware Evolution of Closed-Loop Controller Designs

NASA Technical Reports Server (NTRS)

Gwaltney, David; Ferguson, Ian

2002-01-01

Poster presentation will outline on-going efforts at NASA, MSFC to employ various Evolvable Hardware experimental platforms in the evolution of digital and analog circuitry for application to automatic control. Included will be information concerning the application of commercially available hardware and software along with the use of the JPL developed FPTA2 integrated circuit and supporting JPL developed software. Results to date will be presented.

Large - scale Rectangular Ruler Automated Verification Device

NASA Astrophysics Data System (ADS)

Chen, Hao; Chang, Luping; Xing, Minjian; Xie, Xie

2018-03-01

This paper introduces a large-scale rectangular ruler automated verification device, which consists of photoelectric autocollimator and self-designed mechanical drive car and data automatic acquisition system. The design of mechanical structure part of the device refer to optical axis design, drive part, fixture device and wheel design. The design of control system of the device refer to hardware design and software design, and the hardware mainly uses singlechip system, and the software design is the process of the photoelectric autocollimator and the automatic data acquisition process. This devices can automated achieve vertical measurement data. The reliability of the device is verified by experimental comparison. The conclusion meets the requirement of the right angle test procedure.

Ares I-X Flight Test - The Future Begins Here

NASA Technical Reports Server (NTRS)

Davis, Stephan R.

2008-01-01

In less than two years, the National Aeronautics and Space Administration (NASA) will launch the Ares I-X mission. This will be the first flight of the Ares I crew launch vehicle, which, together with the Ares V cargo launch vehicle, will eventually send humans to the Moon, Mars, and beyond. As the countdown to this first Ares mission continues, personnel from across the Ares I-X Mission Management Office (MMO) are finalizing designs and fabricating vehicle hardware for an April 2009 launch. This paper will discuss the hardware and programmatic progress of the Ares I-X mission. Like the Apollo program, the Ares launch vehicles will rely upon extensive ground, flight, and orbital testing before sending the Orion crew exploration vehicle into space with humans on board. The first flight of Ares I, designated Ares I-X, will be a suborbital development flight test. Ares I-X gives NASA its first opportunity to gather critical data about the flight dynamics of the integrated launch vehicle stack; understand how to control its roll during flight; better characterize the severe stage separation environments that the upper stage engine will experience during future operational flights; and demonstrate the first stage recovery system. NASA also will begin modifying the launch infrastructure and fine-tuning ground and mission operations, as the agency makes the transition from the Space Shuttle to the Ares/Orion system.

Integral Images: Efficient Algorithms for Their Computation and Storage in Resource-Constrained Embedded Vision Systems

PubMed Central

Ehsan, Shoaib; Clark, Adrian F.; ur Rehman, Naveed; McDonald-Maier, Klaus D.

2015-01-01

The integral image, an intermediate image representation, has found extensive use in multi-scale local feature detection algorithms, such as Speeded-Up Robust Features (SURF), allowing fast computation of rectangular features at constant speed, independent of filter size. For resource-constrained real-time embedded vision systems, computation and storage of integral image presents several design challenges due to strict timing and hardware limitations. Although calculation of the integral image only consists of simple addition operations, the total number of operations is large owing to the generally large size of image data. Recursive equations allow substantial decrease in the number of operations but require calculation in a serial fashion. This paper presents two new hardware algorithms that are based on the decomposition of these recursive equations, allowing calculation of up to four integral image values in a row-parallel way without significantly increasing the number of operations. An efficient design strategy is also proposed for a parallel integral image computation unit to reduce the size of the required internal memory (nearly 35% for common HD video). Addressing the storage problem of integral image in embedded vision systems, the paper presents two algorithms which allow substantial decrease (at least 44.44%) in the memory requirements. Finally, the paper provides a case study that highlights the utility of the proposed architectures in embedded vision systems. PMID:26184211

Virtual reality hardware for use in interactive 3D data fusion and visualization

NASA Astrophysics Data System (ADS)

Gourley, Christopher S.; Abidi, Mongi A.

1997-09-01

Virtual reality has become a tool for use in many areas of research. We have designed and built a VR system for use in range data fusion and visualization. One major VR tool is the CAVE. This is the ultimate visualization tool, but comes with a large price tag. Our design uses a unique CAVE whose graphics are powered by a desktop computer instead of a larger rack machine making it much less costly. The system consists of a screen eight feet tall by twenty-seven feet wide giving a variable field-of-view currently set at 160 degrees. A silicon graphics Indigo2 MaxImpact with the impact channel option is used for display. This gives the capability to drive three projectors at a resolution of 640 by 480 for use in displaying the virtual environment and one 640 by 480 display for a user control interface. This machine is also the first desktop package which has built-in hardware texture mapping. This feature allows us to quickly fuse the range and intensity data and other multi-sensory data. The final goal is a complete 3D texture mapped model of the environment. A dataglove, magnetic tracker, and spaceball are to be used for manipulation of the data and navigation through the virtual environment. This system gives several users the ability to interactively create 3D models from multiple range images.

Design Architecture and Initial Results from an FPGA Based Digital Receiver for Multistatic Meteor Measurements

NASA Astrophysics Data System (ADS)

Palo, Scott; Vaudrin, Cody

Defined by a minimal RF front-end followed by an analog-to-digital converter (ADC) and con-trolled by a reconfigurable logic device (FPGA), the digital receiver will replace conventional heterodyning analog receivers currently in use by the COBRA meteor radar. A basic hardware overview touches on the major digital receiver components, theory of operation and data han-dling strategies. We address concerns within the community regarding the implementation of digital receivers in small-scale scientific radars, and outline the numerous benefits with a focus on reconfigurability. From a remote sensing viewpoint, having complete visibility into a band of the EM spectrum allows an experiment designer to focus on parameter estimation rather than hardware limitations. Finally, we show some basic multistatic receiver configurations enabled through GPS time synchronization. Currently, the digital receiver is configured to facilitate range and radial velocity determination of meteors in the MLT region for use with the COBRA meteor radar. Initial measurements from data acquired at Platteville, Colorado and Tierra Del Fuego in Argentina will be presented. We show an improvement in detection rates compared to conventional analog systems. Scientific justification for a digital receiver is clearly made by the presentation of RTI plots created using data acquired from the receiver. These plots reveal an interesting phenomenon concerning vacillating power structures in a select number of meteor trails.

Integral Images: Efficient Algorithms for Their Computation and Storage in Resource-Constrained Embedded Vision Systems.

PubMed

Ehsan, Shoaib; Clark, Adrian F; Naveed ur Rehman; McDonald-Maier, Klaus D

2015-07-10

The integral image, an intermediate image representation, has found extensive use in multi-scale local feature detection algorithms, such as Speeded-Up Robust Features (SURF), allowing fast computation of rectangular features at constant speed, independent of filter size. For resource-constrained real-time embedded vision systems, computation and storage of integral image presents several design challenges due to strict timing and hardware limitations. Although calculation of the integral image only consists of simple addition operations, the total number of operations is large owing to the generally large size of image data. Recursive equations allow substantial decrease in the number of operations but require calculation in a serial fashion. This paper presents two new hardware algorithms that are based on the decomposition of these recursive equations, allowing calculation of up to four integral image values in a row-parallel way without significantly increasing the number of operations. An efficient design strategy is also proposed for a parallel integral image computation unit to reduce the size of the required internal memory (nearly 35% for common HD video). Addressing the storage problem of integral image in embedded vision systems, the paper presents two algorithms which allow substantial decrease (at least 44.44%) in the memory requirements. Finally, the paper provides a case study that highlights the utility of the proposed architectures in embedded vision systems.

Aqueous Cleaning and Validation for Space Shuttle Propulsion Hardware at the White Sands Test Facility

NASA Technical Reports Server (NTRS)

Hornung, Steven D.; Biesinger, Paul; Kirsch, Mike; Beeson, Harold; Leuders, Kathy

1999-01-01

The NASA White Sands Test Facility (WSTF) has developed an entirely aqueous final cleaning and verification process to replace the current chlorofluorocarbon (CFC) 113 based process. This process has been accepted for final cleaning and cleanliness verification of WSTF ground support equipment. The aqueous process relies on ultrapure water at 50 C (323 K) and ultrasonic agitation for removal of organic compounds and particulate. The cleanliness is verified bv determining the total organic carbon (TOC) content and filtration with particulate counting. The effectiveness of the aqueous methods for detecting hydrocarbon contamination and particulate was compared to the accepted CFC 113 sampling procedures. Testing with known contaminants, such as hydraulic fluid and cutting and lubricating oils, to establish a correlation between aqueous TOC and CFC 113 nonvolatile residue (NVR) was performed. Particulate sampling on cleaned batches of hardware that were randomly separated and sampled by the two methods was performed. This paper presents the approach and results, and discusses the issues in establishing the equivalence of aqueous sampling to CFC 113 sampling, while describing the approach for implementing aqueous techniques on Space Shuttle Propulsion hardware.

Extravehicular activity training and hardware design consideration

NASA Technical Reports Server (NTRS)

Thuot, P. J.; Harbaugh, G. J.

1995-01-01

Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control

NASA Astrophysics Data System (ADS)

Qiu, Mo; Yu, Simin; Wen, Yuqiong; Lü, Jinhu; He, Jianbin; Lin, Zhuosheng

In this paper, a novel design methodology and its FPGA hardware implementation for a universal chaotic signal generator is proposed via the Verilog HDL fixed-point algorithm and state machine control. According to continuous-time or discrete-time chaotic equations, a Verilog HDL fixed-point algorithm and its corresponding digital system are first designed. In the FPGA hardware platform, each operation step of Verilog HDL fixed-point algorithm is then controlled by a state machine. The generality of this method is that, for any given chaotic equation, it can be decomposed into four basic operation procedures, i.e. nonlinear function calculation, iterative sequence operation, iterative values right shifting and ceiling, and chaotic iterative sequences output, each of which corresponds to only a state via state machine control. Compared with the Verilog HDL floating-point algorithm, the Verilog HDL fixed-point algorithm can save the FPGA hardware resources and improve the operation efficiency. FPGA-based hardware experimental results validate the feasibility and reliability of the proposed approach.

Extravehicular activity training and hardware design consideration.

PubMed

Thuot, P J; Harbaugh, G J

1995-07-01

Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

Indoor Unmanned Airship System Airborne Control Module Design

NASA Astrophysics Data System (ADS)

YongXia, Gao; YiBo, Li

By adopting STC12C5A60S2 SCM as a system control unit, assisted by appropriate software and hardware resources, we complete the airborne control module's design of unmanned airship system. This paper introduces hardware control module's structure, airship-driven composition and software realization. Verified by the China Science and Technology Museum special-shaped airship,this control module can work well.

Burn Resuscitation Decision Support System (BRDSS)

DTIC Science & Technology

2013-09-01

effective for burn care in the deployed and en route care settings. In this period, we completed Human Factors studies, hardware testing , software design ... designated U.S. Army Institute of Surgical Research (USAISR) clinical team. Phase 1 System Requirements and Software Development Arcos will draft a...airworthiness testing . The hardware finalists will be sent to U.S. Army Aeromedical Research Laboratory (USAARL) for critical airworthiness testing . Phase

Research on an autonomous vision-guided helicopter

NASA Technical Reports Server (NTRS)

Amidi, Omead; Mesaki, Yuji; Kanade, Takeo

1994-01-01

Integration of computer vision with on-board sensors to autonomously fly helicopters was researched. The key components developed were custom designed vision processing hardware and an indoor testbed. The custom designed hardware provided flexible integration of on-board sensors with real-time image processing resulting in a significant improvement in vision-based state estimation. The indoor testbed provided convenient calibrated experimentation in constructing real autonomous systems.

The Hermod Behavioral Synthesis System

DTIC Science & Technology

1988-06-08

LDescription 1 lib tech-independent Transformation & Parser Optimization lib Hardware • g - utSynhesze Generator li Datapath lb Hardware liCotllb...Proc. 22nd Design Automation Conference, ACM/IEEE, June 1985, pp. 475-481. [7] G . De Micheli, "Synthesis of Control Systems", in Design Systems for...VLSI Circuits: Logic Synthesis and Silicon Compilation, G . De Micheli, A. Sangiovanni-Vincentelli, and P. Antognetti, (editor), Martinus Nijhoff

An active attitude control system for a drag sail satellite

NASA Astrophysics Data System (ADS)

Steyn, Willem Herman; Jordaan, Hendrik Willem

2016-11-01

The paper describes the development and simulation results of a full ADCS subsystem for the deOrbitSail drag sail mission. The deOrbitSail satellite was developed as part of an European FP7 collaboration research project. The satellite was launched and commissioning started on 10th July 2015. Various new actuators and sensors designed for this mission will be presented. The deOrbitSail satellite is a 3U CubeSat to deploy a 4 by 4 m drag sail from an initial 650 km circular polar low earth orbit. With an active attitude control system it will be shown that by maximising the drag force, the expected de-orbiting period from the initial altitude will be less than 50 days. A future application of this technology will be the use of small drag sails as low-cost devices to de-orbit LEO satellites, when they have reached their end of life, without having to use expensive propulsion systems. Simulation and Hardware-in-Loop experiments proved the feasibility of the proposed attitude control system. A magnetic-only control approach using a Y-Thomson spin, is used to detumble the 3U Cubesat with stowed sail and subsequently to 3-axis stabilise the satellite to be ready for the final deployment phase. Minituarised torquer rods, a nano-sized momentum wheel, attitude sensor hardware (magnetometer, sun, earth) developed for this phase will be presented. The final phase will be to deploy and 3-axis stabilise the drag sail normal to the satellite's velocity vector, using a combined Y-momentum wheel and magnetic controller. The design and performance improvements when using a 2-axis translation stage to adjust the sail centre-of-pressure to satellite centre-of-mass offset, will also be discussed, although for launch risk reasons this stage was not included in the final flight configuration. To accurately determine the drag sail's attitude during the sunlit part of the orbit, an accurate wide field of view dual sensor to measure both the sun and nadir vector direction was developed for this mission. The calibration results for this new Cubesat sensor (CubeSense), will also be presented.

Chemical calculations on Cray computers

NASA Technical Reports Server (NTRS)

Taylor, Peter R.; Bauschlicher, Charles W., Jr.; Schwenke, David W.

1989-01-01

The influence of recent developments in supercomputing on computational chemistry is discussed with particular reference to Cray computers and their pipelined vector/limited parallel architectures. After reviewing Cray hardware and software the performance of different elementary program structures are examined, and effective methods for improving program performance are outlined. The computational strategies appropriate for obtaining optimum performance in applications to quantum chemistry and dynamics are discussed. Finally, some discussion is given of new developments and future hardware and software improvements.

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph; Mortensen, Dale

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. The extension of STRS to the SSP hardware will promote easier waveform reconfiguration and reuse. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. A FPGA-based transmit waveform implementation of the proposed standard interfaces on a laboratory breadboard SDR will be discussed.

Getting expert systems off the ground: Lessons learned from integrating model-based diagnostics with prototype flight hardware

NASA Technical Reports Server (NTRS)

Stephan, Amy; Erikson, Carol A.

1991-01-01

As an initial attempt to introduce expert system technology into an onboard environment, a model based diagnostic system using the TRW MARPLE software tool was integrated with prototype flight hardware and its corresponding control software. Because this experiment was designed primarily to test the effectiveness of the model based reasoning technique used, the expert system ran on a separate hardware platform, and interactions between the control software and the model based diagnostics were limited. While this project met its objective of showing that model based reasoning can effectively isolate failures in flight hardware, it also identified the need for an integrated development path for expert system and control software for onboard applications. In developing expert systems that are ready for flight, artificial intelligence techniques must be evaluated to determine whether they offer a real advantage onboard, identify which diagnostic functions should be performed by the expert systems and which are better left to the procedural software, and work closely with both the hardware and the software developers from the beginning of a project to produce a well designed and thoroughly integrated application.

Towards a rapid and comprehensive microbial detection and identification system for life support and planetary protection applications

NASA Astrophysics Data System (ADS)

Lasseur, Christophe

Long term manned missions of our Russian colleagues have demonstrated the risks associated with microbial contamination. These risks concern both crew health via the metabolic consumables contamination (water, air,.) but and also the hardware degradation. In parallel to these life support issues, planetary protection experts have agreed to place clear specifications of the microbial quality of future hardware landing on extraterrestrial planets as well as elaborate the requirements of contamination for manned missions on surface. For these activities, it is necessary to have a better understanding of microbial activity, to create culture collections and to develop on-line detection tools. . In this respect, over the last 6 years , ESA has supported active scientific research on the choice of critical genes and functions, including those linked to horizontal gene pool of bacteria and its dissemination. In parallel, ESA and European industries have been developing an automated instrument for rapid microbial detection on air and surface samples. Within this paper, we first present the life support and planetary protection requirements, and the state of the art of the instrument development. Preliminary results at breadboard level, including a mock-up view of the final instrument are also presented. Finally, the remaining steps required to reach a functional instrument for planetary hardware integration and life support flight hardware are also presented.

Testing to Transition the J-2X from Paper to Hardware

NASA Technical Reports Server (NTRS)

Byrd, Tom

2010-01-01

The J-2X Upper Stage Engine (USE) will be the first new human-rated upper stage engine since the Apollo program of the 1960s. It is designed to carry the Ares I and Ares V into orbit and send the Ares V to the Moon as part of NASA's Constellation Program. This paper will provide an overview of progress on the design, testing, and manufacturing of this new engine in 2009 and 2010. The J-2X embodies the program goals of basing the design on proven technology and experience and seeking commonality between the Ares vehicles as a way to minimize risk, shorten development times, and live within current budget constraints. It is based on the proven J-2 engine used on the Saturn IB and Saturn V launch vehicles. The prime contractor for the J-2X is Pratt & Whitney Rocketdyne (PWR), which is under a design, development, test, and engineering (DDT&E) contract covering the period from June 2006 through September 2014. For Ares I, the J-2X will provide engine start at approximately 190,000 feet, operate roughly 500 seconds, and shut down. For Ares V, the J-2X will start at roughly 190,000 feet to place the Earth departure stage (EDS) in orbit, shut down and loiter for up to five days, re-start on command and operate for roughly 300 seconds at its secondary power level to perform trans lunar injection (TLI), followed by final engine shutdown. The J-2X development effort focuses on four key areas: early risk mitigation, design risk mitigation, component and subassembly testing, and engine system testing. Following that plan, the J-2X successfully completed its critical design review (CDR) in 2008, and it has made significant progress in 2009 and 2010 in moving from the drawing board to the machine shop and test stand. Post-CDR manufacturing is well under way, including PWR in-house and vendor hardware. In addition, a wide range of component and sub-component tests have been completed, and more component tests are planned. Testing includes heritage powerpack, turbopump inducer water flow, turbine air flow, turbopump seal testing, main injector and gas generator, injector testing, augmented spark igniter testing, nozzle side loads cold flow testing, nozzle extension film cooling flow testing, control system testing with hardware in the loop, and nozzle extension emissivity coating tests. In parallel with hardware manufacturing, work is progressing on the new A-3 test stand to support full duration altitude testing. The Stennis A-2 test stand is scheduled to be turned over to the Constellation Program in September 2010 to be modified for J-2X testing also. As the structural steel was rising on the A-3 stand, work was under way in the nearby E complex on the chemical steam generator and subscale diffuser concepts to be used to evacuate the A-3 test cell and simulate altitude conditions.

Three Corner Sat Communications System

NASA Technical Reports Server (NTRS)

Anderson, Bobby; Horan, Stephen

2000-01-01

Three Corner Satellite is a constellation of three nanosatellites designed and built by students. New Mexico State University has taken on the design of the communications system for this constellation. The system includes the forward link, return link, and the crosslink. Due to size, mass, power, and financial constraints, we must design a small, light, power efficient, and inexpensive communications system. This thesis presents the design of a radio system to accomplish the data transmission requirements in light of the system constraints. In addition to the hardware design, the operational commands needed by the satellite's on-board computer to control and communicate with the communications hardware will be presented. In order for the hardware to communicate with the ground stations, we will examine the link budgets derived from the radiated power of the transmitters, link distance, data modulation, and data rate for each link. The antenna design for the constellation is analyzed using software and testing the physical antennas on a model satellite. After the analysis and testing, a combination of different systems will meet and exceed the requirements and constraints of the Three Corner Satellite constellation.

A preferential design approach for energy-efficient and robust implantable neural signal processing hardware.

PubMed

Narasimhan, Seetharam; Chiel, Hillel J; Bhunia, Swarup

2009-01-01

For implantable neural interface applications, it is important to compress data and analyze spike patterns across multiple channels in real time. Such a computational task for online neural data processing requires an innovative circuit-architecture level design approach for low-power, robust and area-efficient hardware implementation. Conventional microprocessor or Digital Signal Processing (DSP) chips would dissipate too much power and are too large in size for an implantable system. In this paper, we propose a novel hardware design approach, referred to as "Preferential Design" that exploits the nature of the neural signal processing algorithm to achieve a low-voltage, robust and area-efficient implementation using nanoscale process technology. The basic idea is to isolate the critical components with respect to system performance and design them more conservatively compared to the noncritical ones. This allows aggressive voltage scaling for low power operation while ensuring robustness and area efficiency. We have applied the proposed approach to a neural signal processing algorithm using the Discrete Wavelet Transform (DWT) and observed significant improvement in power and robustness over conventional design.

Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

Automatic Digital Hardware Synthesis

DTIC Science & Technology

1990-09-01

VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate array (FPGAI using...process of translating VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate...allows the engineer to use VHDL to create and validate a design, and then to implement it in a gate array. The development of software o translate VHDL

Hardware Evolution of Analog Speed Controllers for a DC Motor

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; Ferguson, Michael I.

2003-01-01

Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a Field Programmable Transistor Array (FPTA). The performance of these evolved controllers is compared to that of a conventional proportional-integral (PI) controller.

Framework for Development and Distribution of Hardware Acceleration

NASA Astrophysics Data System (ADS)

Thomas, David B.; Luk, Wayne W.

2002-07-01

This paper describes IGOL, a framework for developing reconfigurable data processing applications. While IGOL was originally designed to target imaging and graphics systems, its structure is sufficiently general to support a broad range of applications. IGOL adopts a four-layer architecture: application layer, operation layer, appliance layer and configuration layer. This architecture is intended to separate and co-ordinate both the development and execution of hardware and software components. Hardware developers can use IGOL as an instance testbed for verification and benchmarking, as well as for distribution. Software application developers can use IGOL to discover hardware accelerated data processors, and to access them in a transparent, non-hardware specific manner. IGOL provides extensive support for the RC1000-PP board via the Handel-C language, and a wide selection of image processing filters have been developed. IGOL also supplies plug-ins to enable such filters to be incorporated in popular applications such as Premiere, Winamp, VirtualDub and DirectShow. Moreover, IGOL allows the automatic use of multiple cards to accelerate an application, demonstrated using DirectShow. To enable transparent acceleration without sacrificing performance, a three-tiered COM (Component Object Model) API has been designed and implemented. This API provides a well-defined and extensible interface which facilitates the development of hardware data processors that can accelerate multiple applications.

Design and construction of a prototype ACTS propagation terminal

NASA Technical Reports Server (NTRS)

Stutzman, Warren; Pratt, Tim; Nunnally, Charles; Nealy, Randall; Remaklus, Will; Sylvester, Bill; Predoehl, Andrew; Gaff, Doug

1993-01-01

The launch schedule for the Advanced Communication Technology Satellite (ACTS) spacecraft did not leave sufficient time for completion of the prototype ACTS Propagation Terminals (APT) prior to initiation of the APT production phase. In fact, the approach used was to construct and test all subassemblies of the terminal with special emphasis on the technically challenging portions. These include the RF front end that uses a state-of-the-art down converter which integrates a low noise amplifier, mixer, post amplifier, filter, and local oscillator port frequency doubler into a single small package. In addition, a new digital receiver that uses the latest DSP technology was developed. Both of these subassemblies were thoroughly tested. The highest risk technology in the APT program was the digital receiver. Several candidate algorithms and DSP chips were investigated early on, primarily under JPL sponsorship. A receiver was constructed based on Texas Instruments chip. The final prototype digital receiver was one based on an Analog Devices chip. The design and test results are documented in a report prepared for this grant. A Primary Design Review (PDR) was conducted 30 May 1991, and a Critical Design Review was held 7 Jul. 1992. Final complete documentation of the APT's will appear in the form of three reports: a hardware description report, a report on the data collection code (ACTS VIEW), and a report on the preprocessing code.

A pluggable framework for parallel pairwise sequence search.

PubMed

Archuleta, Jeremy; Feng, Wu-chun; Tilevich, Eli

2007-01-01

The current and near future of the computing industry is one of multi-core and multi-processor technology. Most existing sequence-search tools have been designed with a focus on single-core, single-processor systems. This discrepancy between software design and hardware architecture substantially hinders sequence-search performance by not allowing full utilization of the hardware. This paper presents a novel framework that will aid the conversion of serial sequence-search tools into a parallel version that can take full advantage of the available hardware. The framework, which is based on a software architecture called mixin layers with refined roles, enables modules to be plugged into the framework with minimal effort. The inherent modular design improves maintenance and extensibility, thus opening up a plethora of opportunities for advanced algorithmic features to be developed and incorporated while routine maintenance of the codebase persists.

Automated control and data acquisition for a tunable diode laser heterodyne spectrometer

NASA Technical Reports Server (NTRS)

Shull, T. S.; Rinsland, P. L.

1983-01-01

This paper describes the hardware and software design, development, and implementation of the control and data electronics of a laser heterodyne spectrometer instrument being built at NASA Langley Research Center for a technology demonstration. Functional partitioning, applied at all levels of hardware and software, has been found to provide expedient design, development, and testing of the instrument. The instrument is composed of distributed microprocessor-based units. A master/slave protocol is presented which can be simulated by a terminal for unit checkout. All but one of the units are implemented using a set of core boards, plus unique boards where necessary. This design has led to reduced hardware development, reduced parts inventory, and replication of software modules, while providing the flexibility needed for a development instrument. The development tools and documentation guidelines are discussed.

Conceptual design study for the use of COBE rocket engines on the Tropical Rainfall Measuring Mission

NASA Technical Reports Server (NTRS)

1992-01-01

The objective of this conceptual design study is to verify that the Cosmic Background Explorer (COBE) Hydrazine Propulsion Subsystem (HPS) Rocket Engine Assembly (REA) will satisfy the Tropical Rainfall Measuring Mission (TRMM) requirements and to develop a preliminary thruster module design using the existing REAs. The performance of the COBE HPS 5 lbf thrusters meet the TRMM mission requirements. The preliminary design consists of a single 5 lbf REA REM which is isolation mounted to a spacecraft interface angle bracket (5 or 10 deg angle). The REM incorporates a catalyst bed heater and sensor assembly, and propellant thermal control is achieved by thermostatically controlled heaters on the thruster valves. A ROM cost of approx. $950 K has been estimated for the phase 2 program to finalize the design, fabricate, and test the hardware using mechanical thermostats for thermal control. In the event that solid state thermostats are used, the cost is estimated to be $160 K higher. A ROM cost is approx. $145 K is estimated to study the effects of using Japanese manufactured hydrazine for the TRMM mission.

An Advanced Sensor Network Design For Subglacial Sensing

NASA Astrophysics Data System (ADS)

Martinez, K.; Hart, J. K.; Elsaify, A.; Zou, G.; Padhy, P.; Riddoch, A.

2006-12-01

In the Glacsweb project a sensor network has been designed to take sensor measurements inside glaciers and send the data back to a web server autonomously. A wide range of experience was gained in the deployment of the earlier systems and this has been used to develop new hardware and software to better meet the needs of glaciologists using the data from the system. The system was reduced in size, new sensors (compass, light sensor) were added and the radio communications system completely changed. The new 173MHz radio system was designed with an antenna tuned to work in ice and a new network algorithm written to provide better data security. Probes can communicate data through each other (ad-hoc network) and store many months of data in a large buffer to cope with long term communications failures. New sensors include a light reflection measurement in order to provide data on the surrounding material. This paper will discuss the design decisions, the effectiveness of the final system and generic outcomes of use to sensor network designers deploying in difficult environments.

21 CFR 882.1440 - Neuropsychiatric interpretive electroencephalograph assessment aid.

Code of Federal Regulations, 2014 CFR

2014-04-01

... described in detail in the software requirements specification and software design specification... the device, hardware and software, must be fully characterized and must demonstrate a reasonable assurance of safety and effectiveness. (i) Hardware specifications must be provided. Appropriate...

Design Methodology of an Equalizer for Unipolar Non Return to Zero Binary Signals in the Presence of Additive White Gaussian Noise Using a Time Delay Neural Network on a Field Programmable Gate Array

PubMed Central

Pérez Suárez, Santiago T.; Travieso González, Carlos M.; Alonso Hernández, Jesús B.

2013-01-01

This article presents a design methodology for designing an artificial neural network as an equalizer for a binary signal. Firstly, the system is modelled in floating point format using Matlab. Afterward, the design is described for a Field Programmable Gate Array (FPGA) using fixed point format. The FPGA design is based on the System Generator from Xilinx, which is a design tool over Simulink of Matlab. System Generator allows one to design in a fast and flexible way. It uses low level details of the circuits and the functionality of the system can be fully tested. System Generator can be used to check the architecture and to analyse the effect of the number of bits on the system performance. Finally the System Generator design is compiled for the Xilinx Integrated System Environment (ISE) and the system is described using a hardware description language. In ISE the circuits are managed with high level details and physical performances are obtained. In the Conclusions section, some modifications are proposed to improve the methodology and to ensure portability across FPGA manufacturers.

Routine operation of an Elliott 903 computer in a clinical chemistry laboratory

PubMed Central

Whitby, L. G.; Simpson, D.

1973-01-01

Experience gained in the last four years concerning the capabilities and limitations of an 8K Elliott 903 (18-bit word) computer with magnetic tape backing store in the routine operation of a clinical chemistry laboratory is described. Designed as a total system, routine operation has latterly had to be confined to data acquisition and process control functions, due primarily to limitations imposed by the choice of hardware early in the project. In this final report of a partially successful experiment the opportunity is taken to review mistakes made, especially at the start of the project, to warn potential computer users of pitfalls to be avoided. PMID:4580240

On-line range prediction system, part 2

NASA Technical Reports Server (NTRS)

Levan, Nhan

1988-01-01

The on-line range prediction system is designed for providing a prediction of the target range in the case of a laser data dropout. It consists of real time implementation of a Kalman filter on an IBM PC/AT equipped with necessary hardware. The system was set up and tested at Crows Landing in the Fall of 1987. The improvements made on the on-line range prediction system during 1988 are examined. Solutions are proposed and discussed to the several problems encountered during system tests. Then, the improvements made on the filter software are explained, namely, accounting for the time lag and providing data continously. Finally, the ideas are mentioned that can be considered in the future.

Analysis of laser energy characteristics of laser guided weapons based on the hardware-in-the-loop simulation system

NASA Astrophysics Data System (ADS)

Zhu, Yawen; Cui, Xiaohong; Wang, Qianqian; Tong, Qiujie; Cui, Xutai; Li, Chenyu; Zhang, Le; Peng, Zhong

2016-11-01

The hardware-in-the-loop simulation system, which provides a precise, controllable and repeatable test conditions, is an important part of the development of the semi-active laser (SAL) guided weapons. In this paper, laser energy chain characteristics were studied, which provides a theoretical foundation for the SAL guidance technology and the hardware-in-the-loop simulation system. Firstly, a simplified equation was proposed to adjust the radar equation according to the principles of the hardware-in-the-loop simulation system. Secondly, a theoretical model and calculation method were given about the energy chain characteristics based on the hardware-in-the-loop simulation system. We then studied the reflection characteristics of target and the distance between the missile and target with major factors such as the weather factors. Finally, the accuracy of modeling was verified by experiment as the values measured experimentally generally follow the theoretical results from the model. And experimental results revealed that ratio of attenuation of the laser energy exhibited a non-linear change vs. pulse number, which were in accord with the actual condition.

Speeding-up Bioinformatics Algorithms with Heterogeneous Architectures: Highly Heterogeneous Smith-Waterman (HHeterSW).

PubMed

Gálvez, Sergio; Ferusic, Adis; Esteban, Francisco J; Hernández, Pilar; Caballero, Juan A; Dorado, Gabriel

2016-10-01

The Smith-Waterman algorithm has a great sensitivity when used for biological sequence-database searches, but at the expense of high computing-power requirements. To overcome this problem, there are implementations in literature that exploit the different hardware-architectures available in a standard PC, such as GPU, CPU, and coprocessors. We introduce an application that splits the original database-search problem into smaller parts, resolves each of them by executing the most efficient implementations of the Smith-Waterman algorithms in different hardware architectures, and finally unifies the generated results. Using non-overlapping hardware allows simultaneous execution, and up to 2.58-fold performance gain, when compared with any other algorithm to search sequence databases. Even the performance of the popular BLAST heuristic is exceeded in 78% of the tests. The application has been tested with standard hardware: Intel i7-4820K CPU, Intel Xeon Phi 31S1P coprocessors, and nVidia GeForce GTX 960 graphics cards. An important increase in performance has been obtained in a wide range of situations, effectively exploiting the available hardware.

VME rollback hardware for time warp multiprocessor systems

NASA Technical Reports Server (NTRS)

Robb, Michael J.; Buzzell, Calvin A.

1992-01-01

The purpose of the research effort is to develop and demonstrate innovative hardware to implement specific rollback and timing functions required for efficient queue management and precision timekeeping in multiprocessor discrete event simulations. The previously completed phase 1 effort demonstrated the technical feasibility of building hardware modules which eliminate the state saving overhead of the Time Warp paradigm used in distributed simulations on multiprocessor systems. The current phase 2 effort will build multiple pre-production rollback hardware modules integrated with a network of Sun workstations, and the integrated system will be tested by executing a Time Warp simulation. The rollback hardware will be designed to interface with the greatest number of multiprocessor systems possible. The authors believe that the rollback hardware will provide for significant speedup of large scale discrete event simulation problems and allow multiprocessors using Time Warp to dramatically increase performance.

An Overview of Starfish: A Table-Centric Tool for Interactive Synthesis

NASA Technical Reports Server (NTRS)

Tsow, Alex

2008-01-01

Engineering is an interactive process that requires intelligent interaction at many levels. My thesis [1] advances an engineering discipline for high-level synthesis and architectural decomposition that integrates perspicuous representation, designer interaction, and mathematical rigor. Starfish, the software prototype for the design method, implements a table-centric transformation system for reorganizing control-dominated system expressions into high-level architectures. Based on the digital design derivation (DDD) system a designer-guided synthesis technique that applies correctness preserving transformations to synchronous data flow specifications expressed as co- recursive stream equations Starfish enhances user interaction and extends the reachable design space by incorporating four innovations: behavior tables, serialization tables, data refinement, and operator retiming. Behavior tables express systems of co-recursive stream equations as a table of guarded signal updates. Developers and users of the DDD system used manually constructed behavior tables to help them decide which transformations to apply and how to specify them. These design exercises produced several formally constructed hardware implementations: the FM9001 microprocessor, an SECD machine for evaluating LISP, and the SchemEngine, garbage collected machine for interpreting a byte-code representation of compiled Scheme programs. Bose and Tuna, two of DDD s developers, have subsequently commercialized the design derivation methodology at Derivation Systems, Inc. (DSI). DSI has formally derived and validated PCI bus interfaces and a Java byte-code processor; they further executed a contract to prototype SPIDER-NASA's ultra-reliable communications bus. To date, most derivations from DDD and DRS have targeted hardware due to its synchronous design paradigm. However, Starfish expressions are independent of the synchronization mechanism; there is no commitment to hardware or globally broadcast clocks. Though software back-ends for design derivation are limited to the DDD stream-interpreter, targeting synchronous or real-time software is not substantively different from targeting hardware.

The PCIe-based readout system for the LHCb experiment

NASA Astrophysics Data System (ADS)

Cachemiche, J. P.; Duval, P. Y.; Hachon, F.; Le Gac, R.; Réthoré, F.

2016-02-01

The LHCb experiment is designed to study differences between particles and anti-particles as well as very rare decays in the beauty and charm sector at the LHC. The detector will be upgraded in 2019 in order to significantly increase its efficiency, by removing the first-level hardware trigger. The upgrade experiment will implement a trigger-less readout system in which all the data from every LHC bunch-crossing are transported to the computing farm over 12000 optical links without hardware filtering. The event building and event selection are carried out entirely in the farm. Another original feature of the system is that data transmitted through these fibres arrive directly to computers through a specially designed PCIe card called PCIe40. The same board handles the data acquisition flow and the distribution of fast and slow controls to the detector front-end electronics. It embeds one of the most powerful FPGAs currently available on the market with 1.2 million logic cells. The board has a bandwidth of 480 Gbits/s in both input and output over optical links and 100 Gbits/s over the PCI Express bus to the CPU. We will present how data circulate through the board and in the PC server for achieving the event building. We will focus on specific issues regarding the design of such a board with a very large FPGA, in particular in terms of power supply dimensioning and thermal simulations. The features of the board will be detailed and we will finally present the first performance measurements.

Design and implementation of encrypted and decrypted file system based on USBKey and hardware code

NASA Astrophysics Data System (ADS)

Wu, Kehe; Zhang, Yakun; Cui, Wenchao; Jiang, Ting

2017-05-01

To protect the privacy of sensitive data, an encrypted and decrypted file system based on USBKey and hardware code is designed and implemented in this paper. This system uses USBKey and hardware code to authenticate a user. We use random key to encrypt file with symmetric encryption algorithm and USBKey to encrypt random key with asymmetric encryption algorithm. At the same time, we use the MD5 algorithm to calculate the hash of file to verify its integrity. Experiment results show that large files can be encrypted and decrypted in a very short time. The system has high efficiency and ensures the security of documents.

Requirements analysis for a hardware, discrete-event, simulation engine accelerator

NASA Astrophysics Data System (ADS)

Taylor, Paul J., Jr.

1991-12-01

An analysis of a general Discrete Event Simulation (DES), executing on the distributed architecture of an eight mode Intel PSC/2 hypercube, was performed. The most time consuming portions of the general DES algorithm were determined to be the functions associated with message passing of required simulation data between processing nodes of the hypercube architecture. A behavioral description, using the IEEE standard VHSIC Hardware Description and Design Language (VHDL), for a general DES hardware accelerator is presented. The behavioral description specifies the operational requirements for a DES coprocessor to augment the hypercube's execution of DES simulations. The DES coprocessor design implements the functions necessary to perform distributed discrete event simulations using a conservative time synchronization protocol.

Language Classification using N-grams Accelerated by FPGA-based Bloom Filters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacob, A; Gokhale, M

N-Gram (n-character sequences in text documents) counting is a well-established technique used in classifying the language of text in a document. In this paper, n-gram processing is accelerated through the use of reconfigurable hardware on the XtremeData XD1000 system. Our design employs parallelism at multiple levels, with parallel Bloom Filters accessing on-chip RAM, parallel language classifiers, and parallel document processing. In contrast to another hardware implementation (HAIL algorithm) that uses off-chip SRAM for lookup, our highly scalable implementation uses only on-chip memory blocks. Our implementation of end-to-end language classification runs at 85x comparable software and 1.45x the competing hardware design.

Conceptual design of two-phase fluid mechanics and heat transfer facility for spacelab

NASA Technical Reports Server (NTRS)

North, B. F.; Hill, M. E.

1980-01-01

Five specific experiments were analyzed to provide definition of experiments designed to evaluate two phase fluid behavior in low gravity. The conceptual design represents a fluid mechanics and heat transfer facility for a double rack in Spacelab. The five experiments are two phase flow patterns and pressure drop, flow boiling, liquid reorientation, and interface bubble dynamics. Hardware was sized, instrumentation and data recording requirements defined, and the five experiments were installed as an integrated experimental package. Applicable available hardware was selected in the experiment design and total experiment program costs were defined.

Multicore Architectures for Multiple Independent Levels of Security Applications

DTIC Science & Technology

2012-09-01

to bolster the MILS effort. However, current MILS operating systems are not designed for multi-core platforms. They do not have the hardware support...current MILS operating systems are not designed for multi‐core platforms. They do not have the hardware support to ensure that the separation...the availability of information at different security classification levels while increasing the overall security of the computing system . Due to the

Demonstration of spectral calibration for stellar interferometry

NASA Technical Reports Server (NTRS)

Demers, Richard T.; An, Xin; Tang, Hong; Rud, Mayer; Wayne, Leonard; Kissil, Andrew; Kwack, Eug-Yun

2006-01-01

A breadboard is under development to demonstrate the calibration of spectral errors in microarcsecond stellar interferometers. Analysis shows that thermally and mechanically stable hardware in addition to careful optical design can reduce the wavelength dependent error to tens of nanometers. Calibration of the hardware can further reduce the error to the level of picometers. The results of thermal, mechanical and optical analysis supporting the breadboard design will be shown.

The design of flight hardware: Organizational and technical ideas from the MITRE/WPI Shuttle Program

NASA Technical Reports Server (NTRS)

Looft, F. J.

1986-01-01

The Mitre Corporation of Bedford Mass. and the Worcester Polytechnic Institute are developing several experiments for a future Shuttle flight. Several design practices for the development of the electrical equipment for the flight hardware have been standardized. Some of the ideas are presented, not as hard and fast rules but rather in the interest of stimulating discussions for sharing such ideas.

Development of hardwares and computer interface for a two-degree-of-freedom robot

NASA Technical Reports Server (NTRS)

Nguyen, Charles C.; Pooran, Farhad J.

1987-01-01

The research results that were obtained are reviewed. Then the robot actuator, the selection of the data acquisition system, and the design of the power amplifier will be discussed. The machine design of the robot manipulator will then be presented. After that, the integration of the developed hardware into the open-loop system will also be discussed. Current and future research work is addressed.

An ultra-low-voltage electronic implementation of inertial neuron model with nonmonotonous Liao's activation function.

PubMed

Kant, Nasir Ali; Dar, Mohamad Rafiq; Khanday, Farooq Ahmad

2015-01-01

The output of every neuron in neural network is specified by the employed activation function (AF) and therefore forms the heart of neural networks. As far as the design of artificial neural networks (ANNs) is concerned, hardware approach is preferred over software one because it promises the full utilization of the application potential of ANNs. Therefore, besides some arithmetic blocks, designing AF in hardware is the most important for designing ANN. While attempting to design the AF in hardware, the designs should be compatible with the modern Very Large Scale Integration (VLSI) design techniques. In this regard, the implemented designs should: only be in Metal Oxide Semiconductor (MOS) technology in order to be compatible with the digital designs, provide electronic tunability feature, and be able to operate at ultra-low voltage. Companding is one of the promising circuit design techniques for achieving these goals. In this paper, 0.5 V design of Liao's AF using sinh-domain technique is introduced. Furthermore, the function is tested by implementing inertial neuron model. The performance of the AF and inertial neuron model have been evaluated through simulation results, using the PSPICE software with the MOS transistor models provided by the 0.18-μm Taiwan Semiconductor Manufacturer Complementary Metal Oxide Semiconductor (TSM CMOS) process.

Software for Managing Inventory of Flight Hardware

NASA Technical Reports Server (NTRS)

Salisbury, John; Savage, Scott; Thomas, Shirman

2003-01-01

The Flight Hardware Support Request System (FHSRS) is a computer program that relieves engineers at Marshall Space Flight Center (MSFC) of most of the non-engineering administrative burden of managing an inventory of flight hardware. The FHSRS can also be adapted to perform similar functions for other organizations. The FHSRS affords a combination of capabilities, including those formerly provided by three separate programs in purchasing, inventorying, and inspecting hardware. The FHSRS provides a Web-based interface with a server computer that supports a relational database of inventory; electronic routing of requests and approvals; and electronic documentation from initial request through implementation of quality criteria, acquisition, receipt, inspection, storage, and final issue of flight materials and components. The database lists both hardware acquired for current projects and residual hardware from previous projects. The increased visibility of residual flight components provided by the FHSRS has dramatically improved the re-utilization of materials in lieu of new procurements, resulting in a cost savings of over $1.7 million. The FHSRS includes subprograms for manipulating the data in the database, informing of the status of a request or an item of hardware, and searching the database on any physical or other technical characteristic of a component or material. The software structure forces normalization of the data to facilitate inquiries and searches for which users have entered mixed or inconsistent values.

Event and Pulse Node Hardware Design for Nuclear Fusion Experiments

NASA Astrophysics Data System (ADS)

Fortunato, J. C.; Batista, A.; Sousa, J.; Fernandes, H.; Varandas, C. A. F.

2008-04-01

This article presents an event and pulse node hardware module (EPN) developed for use in control and data acquisition (CODAC) in current and upcoming long discharges nuclear fusion experiments. Its purpose is to allow real time event management and trigger distribution. The use of a mixture of digital signal processing and field programmable gate arrays, with fiber optic channels for event broadcast between CODAC nodes, and short length paths between the EPN and CODAC hardware, allows an effective and low latency communication path. This hardware will be integrated in the ISTTOK CODAC to allow long AC plasma discharges.

The JPL telerobot operator control station. Part 1: Hardware

NASA Technical Reports Server (NTRS)

Kan, Edwin P.; Tower, John T.; Hunka, George W.; Vansant, Glenn J.

1989-01-01

The Operator Control Station of the Jet Propulsion Laboratory (JPL)/NASA Telerobot Demonstrator System provides the man-machine interface between the operator and the system. It provides all the hardware and software for accepting human input for the direct and indirect (supervised) manipulation of the robot arms and tools for task execution. Hardware and software are also provided for the display and feedback of information and control data for the operator's consumption and interaction with the task being executed. The hardware design, system architecture, and its integration and interface with the rest of the Telerobot Demonstrator System are discussed.

Robotic laboratory for distance education

NASA Astrophysics Data System (ADS)

Luciano, Sarah C.; Kost, Alan R.

2016-09-01

This project involves the construction of a remote-controlled laboratory experiment that can be accessed by online students. The project addresses a need to provide a laboratory experience for students who are taking online courses to be able to provide an in-class experience. The chosen task for the remote user is an optical engineering experiment, specifically aligning a spatial filter. We instrument the physical laboratory set up in Tucson, AZ at the University of Arizona. The hardware in the spatial filter experiment is augmented by motors and cameras to allow the user to remotely control the hardware. The user interacts with a software on their computer, which communicates with a server via Internet connection to the host computer in the Optics Laboratory at the University of Arizona. Our final overall system is comprised of several subsystems. These are the optical experiment set-up, which is a spatial filter experiment; the mechanical subsystem, which interfaces the motors with the micrometers to move the optical hardware; the electrical subsystem, which allows for the electrical communications from the remote computer to the host computer to the hardware; and finally the software subsystem, which is the means by which messages are communicated throughout the system. The goal of the project is to convey as much of an in-lab experience as possible by allowing the user to directly manipulate hardware and receive visual feedback in real-time. Thus, the remote user is able to learn important concepts from this particular experiment and is able to connect theory to the physical world by actually seeing the outcome of a procedure. The latter is a learning experience that is often lost with distance learning and is one that this project hopes to provide.

Use of Field Programmable Gate Array Technology in Future Space Avionics

NASA Technical Reports Server (NTRS)

Ferguson, Roscoe C.; Tate, Robert

2005-01-01

Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.

High concentration biotherapeutic formulation and ultrafiltration: Part 1 pressure limits.

PubMed

Lutz, Herb; Arias, Joshua; Zou, Yu

2017-01-01

High therapeutic dosage requirements and the desire for ease of administration drive the trend to subcutaneous administration using delivery systems such as subcutaneous pumps and prefilled syringes. Because of dosage volume limits, prefilled syringe administration requires higher concentration liquid formulations, limited to about 30 cP or roughly 100-300 g L -1 for mAb's. Ultrafiltration (UF) processes are routinely used to formulate biological therapeutics. This article considers pressure constraints on the UF process that may limit its ability to achieve high final product concentrations. A system hardware analysis shows that the ultrafiltration cassette pressure drop is the major factor limiting UF systems. Additional system design recommendations are also provided. The design and performance of a new cassette with a lower feed channel flow resistance is described along with 3D modeling of feed channel pressure drop. The implications of variations in cassette flow channel resistance for scaling up and setting specifications are considered. A recommendation for a maximum pressure specification is provided. A review of viscosity data and theory shows that molecular engineering, temperature, and the use of viscosity modifying excipients including pH adjustment can be used to achieve higher concentrations. The combined use of a low pressure drop cassette with excipients further increased final concentrations by 35%. Guidance is provided on system operation to control hydraulics during final concentration. These recommendations should allow one to design and operate systems to routinely achieve the 30 cP target final viscosity capable of delivery using a pre-filled syringe. © 2016 American Institute of Chemical Engineers Biotechnol. Prog., 33:113-124, 2017. © 2016 American Institute of Chemical Engineers.

Passive millimeter-wave imaging

NASA Technical Reports Server (NTRS)

Young, Stephen K.; Davidheiser, Roger A.; Hauss, Bruce; Lee, Paul S. C.; Mussetto, Michael; Shoucri, Merit M.; Yujiri, Larry

1993-01-01

Millimeter-wave hardware systems are being developed. Our approach begins with identifying and defining the applications. System requirements are then specified based on mission needs using our end-to-end performance model. The model was benchmarked against existing data bases and, where data is deficient, it is acquired via field measurements. The derived system requirements are then validated with the appropriate field measurements using our imaging testbeds and hardware breadboards. The result is a final system that satisfies all the requirements of the target mission.

Rapidly Deployable Security System Final Report CRADA No. TC-2030-01

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kohlhepp, V.; Whiteman, B.; McKibben, M. T.

The ultimate objective of the LEADER and LLNL strategic partnership was to develop and commercialize_a security-based system product and platform for the use in protecting the substantial physical and economic assets of the government and commerce of the United States. The primary goal of this project was to integrate video surveillance hardware developed by LLNL with a security software backbone developed by LEADER. Upon completion of the project, a prototype hardware/software security system that is highly scalable was to be demonstrated.

On two new trends in evolvable hardware: employment of HDL-based structuring, and design of multi-functional circuits

NASA Technical Reports Server (NTRS)

Stoica, A.; Keymeulen, D.; Zebulum, R. S.; Ferguson, M. I.; Guo, X.

2002-01-01

This paper comments on some directions of growth for evolvable hardware, proposes research directions that address the scalability problem and gives examples of results in novel areas approached by EHW.

KENNEDY SPACE CENTER, FLA. - Workers in KSC's Vertical Processing Facility make final adjustments to the Flight Support System (FSS) for STS-82, the second Hubble Space Telescope servicing mission. The FSS is reusable flight hardware that provides the mechanical, structural and electrical interfaces between HST, the space support equipment and the orbiter for payload retrieval and on-orbit servicing. Liftoff aboard Discovery is targeted Feb. 11 with a crew of seven.

NASA Image and Video Library

1997-01-16

KENNEDY SPACE CENTER, FLA. - Workers in KSC's Vertical Processing Facility make final adjustments to the Flight Support System (FSS) for STS-82, the second Hubble Space Telescope servicing mission. The FSS is reusable flight hardware that provides the mechanical, structural and electrical interfaces between HST, the space support equipment and the orbiter for payload retrieval and on-orbit servicing. Liftoff aboard Discovery is targeted Feb. 11 with a crew of seven.

Open source hardware and software platform for robotics and artificial intelligence applications

NASA Astrophysics Data System (ADS)

Liang, S. Ng; Tan, K. O.; Lai Clement, T. H.; Ng, S. K.; Mohammed, A. H. Ali; Mailah, Musa; Azhar Yussof, Wan; Hamedon, Zamzuri; Yussof, Zulkifli

2016-02-01

Recent developments in open source hardware and software platforms (Android, Arduino, Linux, OpenCV etc.) have enabled rapid development of previously expensive and sophisticated system within a lower budget and flatter learning curves for developers. Using these platform, we designed and developed a Java-based 3D robotic simulation system, with graph database, which is integrated in online and offline modes with an Android-Arduino based rubbish picking remote control car. The combination of the open source hardware and software system created a flexible and expandable platform for further developments in the future, both in the software and hardware areas, in particular in combination with graph database for artificial intelligence, as well as more sophisticated hardware, such as legged or humanoid robots.