The future of memory

NASA Astrophysics Data System (ADS)

Marinella, M.

In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

Checkpoint-Restart in User Space

DOE Office of Scientific and Technical Information (OSTI.GOV)

CRUISE implements a user-space file system that stores data in main memory and transparently spills over to other storage, like local flash memory or the parallel file system, as needed. CRUISE also exposes file contents fo remote direct memory access, allowing external tools to copy files to the parallel file system in the background with reduced CPU interruption.

Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

NASA Astrophysics Data System (ADS)

Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

2015-10-01

Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e

Active Flash: Out-of-core Data Analytics on Flash Storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S

2012-01-01

Next generation science will increasingly come to rely on the ability to perform efficient, on-the-fly analytics of data generated by high-performance computing (HPC) simulations, modeling complex physical phenomena. Scientific computing workflows are stymied by the traditional chaining of simulation and data analysis, creating multiple rounds of redundant reads and writes to the storage system, which grows in cost with the ever-increasing gap between compute and storage speeds in HPC clusters. Recent HPC acquisitions have introduced compute node-local flash storage as a means to alleviate this I/O bottleneck. We propose a novel approach, Active Flash, to expedite data analysis pipelines bymore » migrating to the location of the data, the flash device itself. We argue that Active Flash has the potential to enable true out-of-core data analytics by freeing up both the compute core and the associated main memory. By performing analysis locally, dependence on limited bandwidth to a central storage system is reduced, while allowing this analysis to proceed in parallel with the main application. In addition, offloading work from the host to the more power-efficient controller reduces peak system power usage, which is already in the megawatt range and poses a major barrier to HPC system scalability. We propose an architecture for Active Flash, explore energy and performance trade-offs in moving computation from host to storage, demonstrate the ability of appropriate embedded controllers to perform data analysis and reduction tasks at speeds sufficient for this application, and present a simulation study of Active Flash scheduling policies. These results show the viability of the Active Flash model, and its capability to potentially have a transformative impact on scientific data analysis.« less

NAFFS: network attached flash file system for cloud storage on portable consumer electronics

NASA Astrophysics Data System (ADS)

Han, Lin; Huang, Hao; Xie, Changsheng

Cloud storage technology has become a research hotspot in recent years, while the existing cloud storage services are mainly designed for data storage needs with stable high speed Internet connection. Mobile Internet connections are often unstable and the speed is relatively low. These native features of mobile Internet limit the use of cloud storage in portable consumer electronics. The Network Attached Flash File System (NAFFS) presented the idea of taking the portable device built-in NAND flash memory as the front-end cache of virtualized cloud storage device. Modern portable devices with Internet connection have built-in more than 1GB NAND Flash, which is quite enough for daily data storage. The data transfer rate of NAND flash device is much higher than mobile Internet connections[1], and its non-volatile feature makes it very suitable as the cache device of Internet cloud storage on portable device, which often have unstable power supply and intermittent Internet connection. In the present work, NAFFS is evaluated with several benchmarks, and its performance is compared with traditional network attached file systems, such as NFS. Our evaluation results indicate that the NAFFS achieves an average accessing speed of 3.38MB/s, which is about 3 times faster than directly accessing cloud storage by mobile Internet connection， and offers a more stable interface than that of directly using cloud storage API. Unstable Internet connection and sudden power off condition are tolerable, and no data in cache will be lost in such situation.

Non-volatile memory for checkpoint storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.

A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, themore » non-volatile memory is a pluggable flash memory card.« less

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory

NASA Astrophysics Data System (ADS)

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-01

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory.

PubMed

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-23

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Flash drive memory apparatus and method

NASA Technical Reports Server (NTRS)

Hinchey, Michael G. (Inventor)

2010-01-01

A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

Flash memory management system and method utilizing multiple block list windows

NASA Technical Reports Server (NTRS)

Chow, James (Inventor); Gender, Thomas K. (Inventor)

2005-01-01

The present invention provides a flash memory management system and method with increased performance. The flash memory management system provides the ability to efficiently manage and allocate flash memory use in a way that improves reliability and longevity, while maintaining good performance levels. The flash memory management system includes a free block mechanism, a disk maintenance mechanism, and a bad block detection mechanism. The free block mechanism provides efficient sorting of free blocks to facilitate selecting low use blocks for writing. The disk maintenance mechanism provides for the ability to efficiently clean flash memory blocks during processor idle times. The bad block detection mechanism provides the ability to better detect when a block of flash memory is likely to go bad. The flash status mechanism stores information in fast access memory that describes the content and status of the data in the flash disk. The new bank detection mechanism provides the ability to automatically detect when new banks of flash memory are added to the system. Together, these mechanisms provide a flash memory management system that can improve the operational efficiency of systems that utilize flash memory.

Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

NASA Astrophysics Data System (ADS)

Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

2014-11-01

Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

Effect with high density nano dot type storage layer structure on 20 nm planar NAND flash memory characteristics

NASA Astrophysics Data System (ADS)

Sasaki, Takeshi; Muraguchi, Masakazu; Seo, Moon-Sik; Park, Sung-kye; Endoh, Tetsuo

2014-01-01

The merits, concerns and design principle for the future nano dot (ND) type NAND flash memory cell are clarified, by considering the effect of storage layer structure on NAND flash memory characteristics. The characteristics of the ND cell for a NAND flash memory in comparison with the floating gate type (FG) is comprehensively studied through the read, erase, program operation, and the cell to cell interference with device simulation. Although the degradation of the read throughput (0.7% reduction of the cell current) and slower program time (26% smaller programmed threshold voltage shift) with high density (10 × 1012 cm-2) ND NAND are still concerned, the suppress of the cell to cell interference with high density (10 × 1012 cm-2) plays the most important part for scaling and multi-level cell (MLC) operation in comparison with the FG NAND. From these results, the design knowledge is shown to require the control of the number of nano dots rather than the higher nano dot density, from the viewpoint of increasing its memory capacity by MLC operation and suppressing threshold voltage variability caused by the number of dots in the storage layer. Moreover, in order to increase its memory capacity, it is shown the tunnel oxide thickness with ND should be designed thicker (>3 nm) than conventional designed ND cell for programming/erasing with direct tunneling mechanism.

Radiation Effects on Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, D. N.; Guertin, S.; Swift, G. M.; Johnston, A. H.

1998-01-01

Flash memories have evolved very rapidly in recent ears. New design techniques such as multilevel storage have been proposed to increase storage density, and are now available commercially. Threshold voltage distributions for single- and three-level technologies are compared. In order to implement this technology special circuitry must be added to allow the amount of charge stored in the floating gate to be controlled within narrow limits during the writing and also to detect the different amounts of charge during reading.

Performance analysis of three-dimensional-triple-level cell and two-dimensional-multi-level cell NAND flash hybrid solid-state drives

NASA Astrophysics Data System (ADS)

Sakaki, Yukiya; Yamada, Tomoaki; Matsui, Chihiro; Yamaga, Yusuke; Takeuchi, Ken

2018-04-01

In order to improve performance of solid-state drives (SSDs), hybrid SSDs have been proposed. Hybrid SSDs consist of more than two types of NAND flash memories or NAND flash memories and storage-class memories (SCMs). However, the cost of hybrid SSDs adopting SCMs is more expensive than that of NAND flash only SSDs because of the high bit cost of SCMs. This paper proposes unique hybrid SSDs with two-dimensional (2D) horizontal multi-level cell (MLC)/three-dimensional (3D) vertical triple-level cell (TLC) NAND flash memories to achieve higher cost-performance. The 2D-MLC/3D-TLC hybrid SSD achieves up to 31% higher performance than the conventional 2D-MLC/2D-TLC hybrid SSD. The factors of different performance between the proposed hybrid SSD and the conventional hybrid SSD are analyzed by changing its block size, read/write/erase latencies, and write unit of 3D-TLC NAND flash memory, by means of a transaction-level modeling simulator.

ASA-FTL: An adaptive separation aware flash translation layer for solid state drives

DOE PAGES

Xie, Wei; Chen, Yong; Roth, Philip C

2016-11-03

Here, the flash-memory based Solid State Drive (SSD) presents a promising storage solution for increasingly critical data-intensive applications due to its low latency (high throughput), high bandwidth, and low power consumption. Within an SSD, its Flash Translation Layer (FTL) is responsible for exposing the SSD’s flash memory storage to the computer system as a simple block device. The FTL design is one of the dominant factors determining an SSD’s lifespan and performance. To reduce the garbage collection overhead and deliver better performance, we propose a new, low-cost, adaptive separation-aware flash translation layer (ASA-FTL) that combines sampling, data clustering and selectivemore » caching of recency information to accurately identify and separate hot/cold data while incurring minimal overhead. We use sampling for light-weight identification of separation criteria, and our dedicated selective caching mechanism is designed to save the limited RAM resource in contemporary SSDs. Using simulations of ASA-FTL with both real-world and synthetic workloads, we have shown that our proposed approach reduces the garbage collection overhead by up to 28% and the overall response time by 15% compared to one of the most advanced existing FTLs. We find that the data clustering using a small sample size provides significant performance benefit while only incurring a very small computation and memory cost. In addition, our evaluation shows that ASA-FTL is able to adapt to the changes in the access pattern of workloads, which is a major advantage comparing to existing fixed data separation methods.« less

Some Improvements in Utilization of Flash Memory Devices

NASA Technical Reports Server (NTRS)

Gender, Thomas K.; Chow, James; Ott, William E.

2009-01-01

Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

A Layered Solution for Supercomputing Storage

ScienceCinema

Grider, Gary

2018-06-13

To solve the supercomputing challenge of memory keeping up with processing speed, a team at Los Alamos National Laboratory developed two innovative memory management and storage technologies. Burst buffers peel off data onto flash memory to support the checkpoint/restart paradigm of large simulations. MarFS adds a thin software layer enabling a new tier for campaign storage—based on inexpensive, failure-prone disk drives—between disk drives and tape archives.

Moore's law realities for recording systems and memory storage components: HDD, tape, NAND, and optical

NASA Astrophysics Data System (ADS)

Fontana, Robert E.; Decad, Gary M.

2018-05-01

This paper describes trends in the storage technologies associated with Linear Tape Open (LTO) Tape cartridges, hard disk drives (HDD), and NAND Flash based storage devices including solid-state drives (SSD). This technology discussion centers on the relationship between cost/bit and bit density and, specifically on how the Moore's Law perception that areal density doubling and cost/bit halving every two years is no longer being achieved for storage based components. This observation and a Moore's Law Discussion are demonstrated with data from 9-year storage technology trends, assembled from publically available industry reporting sources.

A Layered Solution for Supercomputing Storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Grider, Gary

To solve the supercomputing challenge of memory keeping up with processing speed, a team at Los Alamos National Laboratory developed two innovative memory management and storage technologies. Burst buffers peel off data onto flash memory to support the checkpoint/restart paradigm of large simulations. MarFS adds a thin software layer enabling a new tier for campaign storage—based on inexpensive, failure-prone disk drives—between disk drives and tape archives.

Don’t make cache too complex: A simple probability-based cache management scheme for SSDs

PubMed Central

Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme. PMID:28358897

Don't make cache too complex: A simple probability-based cache management scheme for SSDs.

PubMed

Baek, Seungjae; Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme.

Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response

NASA Astrophysics Data System (ADS)

Clark, Lawrence T.; Holbert, Keith E.; Adams, James W.; Navale, Harshad; Anderson, Blake C.

2015-12-01

Flash memory is an essential part of systems used in harsh environments, experienced by both terrestrial and aerospace TID applications. This paper presents studies of COTS flash memory TID hardness. While there is substantial literature on flash memory TID response, this work focuses for the first time on 1.5 transistor per cell flash memory. The experimental results show hardness varying from about 100 krad(Si) to over 250 krad(Si) depending on the usage model. We explore the circuit and device aspects of the results, based on the extensive reliability literature for this flash memory type. Failure modes indicate both device damage and circuit marginalities. Sector erase failure limits, but read only operation allows TID exceeding 200 krad(Si). The failures are analyzed by type.

PCM-Based Durable Write Cache for Fast Disk I/O

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Zhuo; Wang, Bin; Carpenter, Patrick

2012-01-01

Flash based solid-state devices (FSSDs) have been adopted within the memory hierarchy to improve the performance of hard disk drive (HDD) based storage system. However, with the fast development of storage-class memories, new storage technologies with better performance and higher write endurance than FSSDs are emerging, e.g., phase-change memory (PCM). Understanding how to leverage these state-of-the-art storage technologies for modern computing systems is important to solve challenging data intensive computing problems. In this paper, we propose to leverage PCM for a hybrid PCM-HDD storage architecture. We identify the limitations of traditional LRU caching algorithms for PCM-based caches, and develop amore » novel hash-based write caching scheme called HALO to improve random write performance of hard disks. To address the limited durability of PCM devices and solve the degraded spatial locality in traditional wear-leveling techniques, we further propose novel PCM management algorithms that provide effective wear-leveling while maximizing access parallelism. We have evaluated this PCM-based hybrid storage architecture using applications with a diverse set of I/O access patterns. Our experimental results demonstrate that the HALO caching scheme leads to an average reduction of 36.8% in execution time compared to the LRU caching scheme, and that the SFC wear leveling extends the lifetime of PCM by a factor of 21.6.« less

Charge injection and discharging of Si nanocrystals and arrays by atomic force microscopy

NASA Technical Reports Server (NTRS)

Boer, E.; Ostraat, M.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.

2000-01-01

Charge injection and storage in dense arrays of silicon nanocrystals in SiO(sub 2) is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few-or single- electron storage in a small number of nanocrystal elements.

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

NASA Technical Reports Server (NTRS)

Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

2001-01-01

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

A hot hole-programmed and low-temperature-formed SONOS flash memory

PubMed Central

2013-01-01

In this study, a high-performance TixZrySizO flash memory is demonstrated using a sol–gel spin-coating method and formed under a low annealing temperature. The high-efficiency charge storage layer is formed by depositing a well-mixed solution of titanium tetrachloride, silicon tetrachloride, and zirconium tetrachloride, followed by 60 s of annealing at 600°C. The flash memory exhibits a noteworthy hot hole trapping characteristic and excellent electrical properties regarding memory window, program/erase speeds, and charge retention. At only 6-V operation, the program/erase speeds can be as fast as 120:5.2 μs with a 2-V shift, and the memory window can be up to 8 V. The retention times are extrapolated to 106 s with only 5% (at 85°C) and 10% (at 125°C) charge loss. The barrier height of the TixZrySizO film is demonstrated to be 1.15 eV for hole trapping, through the extraction of the Poole-Frenkel current. The excellent performance of the memory is attributed to high trapping sites of the low-temperature-annealed, high-κ sol–gel film. PMID:23899050

77 FR 35718 - Certain Universal Serial Bus (“USB”) Portable Storage Devices, Including USB Flash Drives and...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-14

... on the Commission's electronic docket (EDIS) at http://edis.usitc.gov . Hearing-impaired persons are... Sunnyvale, California; Kingston Technology Company, Inc. of Fountain Valley, California; Patriot Memory, LLC...

Low-temperature post-deposition annealing investigation for 3D charge trap flash memory by Kelvin probe force microscopy

NASA Astrophysics Data System (ADS)

Huo, Zongliang; Jin, Lei; Han, Yulong; Li, Xinkai; Ye, Tianchun; Liu, Ming

2015-01-01

The influence of post-deposition annealing (PDA) temperature condition on charge distribution behavior of HfO2 thin films was systematically investigated by various-temperature Kelvin probe force microscopy technology. Contact potential difference profiles demonstrated that charge storage capability shrinks with decreasing annealing temperature from 1,000 to 500 °C and lower. Compared to 1,000 °C PDA, it was found that 500 °C PDA causes deeper effective trap energy level, suppresses lateral charge spreading, and improves the retention characteristics. It is concluded that low-temperature PDA can be adopted in 3D HfO2-based charge trap flash memory to improve the thermal treatment compatibility of the bottom peripheral logic and upper memory arrays.

FPGA Flash Memory High Speed Data Acquisition

NASA Technical Reports Server (NTRS)

Gonzalez, April

2013-01-01

The purpose of this research is to design and implement a VHDL ONFI Controller module for a Modular Instrumentation System. The goal of the Modular Instrumentation System will be to have a low power device that will store data and send the data at a low speed to a processor. The benefit of such a system will give an advantage over other purchased binary IP due to the capability of allowing NASA to re-use and modify the memory controller module. To accomplish the performance criteria of a low power system, an in house auxiliary board (Flash/ADC board), FPGA development kit, debug board, and modular instrumentation board will be jointly used for the data acquisition. The Flash/ADC board contains four, 1 MSPS, input channel signals and an Open NAND Flash memory module with an analog to digital converter. The ADC, data bits, and control line signals from the board are sent to an Microsemi/Actel FPGA development kit for VHDL programming of the flash memory WRITE, READ, READ STATUS, ERASE, and RESET operation waveforms using Libero software. The debug board will be used for verification of the analog input signal and be able to communicate via serial interface with the module instrumentation. The scope of the new controller module was to find and develop an ONFI controller with the debug board layout designed and completed for manufacture. Successful flash memory operation waveform test routines were completed, simulated, and tested to work on the FPGA board. Through connection of the Flash/ADC board with the FPGA, it was found that the device specifications were not being meet with Vdd reaching half of its voltage. Further testing showed that it was the manufactured Flash/ADC board that contained a misalignment with the ONFI memory module traces. The errors proved to be too great to fix in the time limit set for the project.

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

Detection of charge storage on molecular thin films of tris(8-hydroxyquinoline) aluminum (Alq3) by Kelvin force microscopy: a candidate system for high storage capacity memory cells.

PubMed

Paydavosi, Sarah; Aidala, Katherine E; Brown, Patrick R; Hashemi, Pouya; Supran, Geoffrey J; Osedach, Timothy P; Hoyt, Judy L; Bulović, Vladimir

2012-03-14

Retention and diffusion of charge in tris(8-hydroxyquinoline) aluminum (Alq(3)) molecular thin films are investigated by injecting electrons and holes via a biased conductive atomic force microscopy tip into the Alq(3) films. After the charge injection, Kelvin force microscopy measurements reveal minimal changes with time in the spatial extent of the trapped charge domains within Alq(3) films, even for high hole and electron densities of >10(12) cm(-2). We show that this finding is consistent with the very low mobility of charge carriers in Alq(3) thin films (<10(-7) cm(2)/(Vs)) and that it can benefit from the use of Alq(3) films as nanosegmented floating gates in flash memory cells. Memory capacitors using Alq(3) molecules as the floating gate are fabricated and measured, showing durability over more than 10(4) program/erase cycles and the hysteresis window of up to 7.8 V, corresponding to stored charge densities as high as 5.4 × 10(13) cm(-2). These results demonstrate the potential for use of molecular films in high storage capacity nonvolatile memory cells. © 2012 American Chemical Society

GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu

2015-06-24

Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

NASA Astrophysics Data System (ADS)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

CD uniformity control for thick resist process

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Liu, Yu-Lin; Wang, Weihung; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

2017-03-01

In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked flash cell array has been proposed. In constructing 3D NAND flash memories, the higher bit number per area is achieved by increasing the number of stacked layers. Thus the so-called "staircase" patterning to form electrical connection between memory cells and word lines has become one of the primarily critical processes in 3D memory manufacture. To provide controllable critical dimension (CD) with good uniformity involving thick photo-resist has also been of particular concern for staircase patterning. The CD uniformity control has been widely investigated with relatively thinner resist associated with resolution limit dimension but thick resist coupling with wider dimension. This study explores CD uniformity control associated with thick photo-resist processing. Several critical parameters including exposure focus, exposure dose, baking condition, pattern size and development recipe, were found to strongly correlate with the thick photo-resist profile accordingly affecting the CD uniformity control. To minimize the within-wafer CD variation, the slightly tapered resist profile is proposed through well tailoring the exposure focus and dose together with optimal development recipe. Great improvements on DCD (ADI CD) and ECD (AEI CD) uniformity as well as line edge roughness were achieved through the optimization of photo resist profile.

Analog Nonvolatile Computer Memory Circuits

NASA Technical Reports Server (NTRS)

MacLeod, Todd

2007-01-01

In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

PCIE interface design for high-speed image storage system based on SSD

NASA Astrophysics Data System (ADS)

Wang, Shiming

2015-02-01

This paper proposes and implements a standard interface of miniaturized high-speed image storage system, which combines PowerPC with FPGA and utilizes PCIE bus as the high speed switching channel. Attached to the PowerPC, mSATA interface SSD(Solid State Drive) realizes RAID3 array storage. At the same time, a high-speed real-time image compression patent IP core also can be embedded in FPGA, which is in the leading domestic level with compression rate and image quality, making that the system can record higher image data rate or achieve longer recording time. The notebook memory card buckle type design is used in the mSATA interface SSD, which make it possible to complete the replacement in 5 seconds just using single hand, thus the total length of repeated recordings is increased. MSI (Message Signaled Interrupts) interruption guarantees the stability and reliability of continuous DMA transmission. Furthermore, only through the gigabit network, the remote display, control and upload to backup function can be realized. According to an optional 25 frame/s or 30 frame/s, upload speeds can be up to more than 84 MB/s. Compared with the existing FLASH array high-speed memory systems, it has higher degree of modularity, better stability and higher efficiency on development, maintenance and upgrading. Its data access rate is up to 300MB/s, realizing the high speed image storage system miniaturization, standardization and modularization, thus it is fit for image acquisition, storage and real-time transmission to server on mobile equipment.

NAND FLASH Radiation Tolerant Intelligent Memory Stack (RTIMS FLASH)

NASA Astrophysics Data System (ADS)

Sellier, Charles; Wang, Pierre

2014-08-01

The NAND Flash Radiation Tolerant and Intelligent Memory Stack (RTIMS FLASH) is a User's Friendly, Plug-and- Play and Radiation Protected high density NAND Flash Memory. It provides a very high density, radiation hardened by design and non-volatile memory module suitable for all space applications such as commercial or scientific geo-stationary missions, earth observation, navigation, manned space vehicles and deep space scientific exploration. The Intelligent Memory Module embeds a very high density of non-volatile NAND Flash memory and one Intelligent Flash Memory Controller (FMC). The FMC provides the module with a full protection against the radiation effects such as SEL, SEFI and SEU. It's also granting the module with bad block immunity as well as high level service functions that will benefit to the user's applications.

78 FR 48188 - Certain Flash Memory Chips and Products Containing the Same Notice of Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-07

... INTERNATIONAL TRADE COMMISSION [Docket No. 2971] Certain Flash Memory Chips and Products.... International Trade Commission has received a complaint entitled Certain Flash Memory Chips and Products... sale within the United States after importation of certain flash memory chips and products containing...

78 FR 55095 - Certain Flash Memory Chips and Products Containing Same; Institution of Investigation

Federal Register 2010, 2011, 2012, 2013, 2014

2013-09-09

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-893] Certain Flash Memory Chips and... States after importation of certain flash memory chips and products containing the same by reason of... sale within the United States after importation of certain flash memory chips and products containing...

75 FR 55604 - In the Matter of Certain Flash Memory Chips and Products Containing the Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-09-13

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-735] In the Matter of Certain Flash Memory Chips... the sale within the United States after importation of certain flash memory chips and products... importation of certain flash memory chips and products containing the same that infringe one or more of claims...

Impact of Recent Hardware and Software Trends on High Performance Transaction Processing and Analytics

NASA Astrophysics Data System (ADS)

Mohan, C.

In this paper, I survey briefly some of the recent and emerging trends in hardware and software features which impact high performance transaction processing and data analytics applications. These features include multicore processor chips, ultra large main memories, flash storage, storage class memories, database appliances, field programmable gate arrays, transactional memory, key-value stores, and cloud computing. While some applications, e.g., Web 2.0 ones, were initially built without traditional transaction processing functionality in mind, slowly system architects and designers are beginning to address such previously ignored issues. The availability, analytics and response time requirements of these applications were initially given more importance than ACID transaction semantics and resource consumption characteristics. A project at IBM Almaden is studying the implications of phase change memory on transaction processing, in the context of a key-value store. Bitemporal data management has also become an important requirement, especially for financial applications. Power consumption and heat dissipation properties are also major considerations in the emergence of modern software and hardware architectural features. Considerations relating to ease of configuration, installation, maintenance and monitoring, and improvement of total cost of ownership have resulted in database appliances becoming very popular. The MapReduce paradigm is now quite popular for large scale data analysis, in spite of the major inefficiencies associated with it.

Radiation Issues and Applications of Floating Gate Memories

NASA Technical Reports Server (NTRS)

Scheick, L. Z.; Nguyen, D. N.

2000-01-01

The radiation effects that affect various systems that comprise floating gate memories are presented. The wear-out degradation results of unirradiated flash memories are compared to irradiated flash memories. The procedure analyzes the failure to write and erase caused by wear-out and degradation of internal charge pump circuits. A method is described for characterizing the radiation effects of the floating gate itself. The rate dependence, stopping power dependence, SEU susceptibility and applications of floating gate in radiation environment are presented. The ramifications for dosimetry and cell failure are discussed as well as for the long term use aspects of non-volatile memories.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

ReHypar: A Recursive Hybrid Chunk Partitioning Method Using NAND-Flash Memory SSD

PubMed Central

Park, Sung-Soon; Lim, Cheol-Su

2014-01-01

Due to the rapid development of flash memory, SSD is considered to be the replacement of HDD in the storage market. Although SSD retains several promising characteristics, such as high random I/O performance and nonvolatility, its high expense per capacity is the main obstacle in replacing HDD in all storage solutions. An alternative is to provide a hybrid structure where a small portion of SSD address space is combined with the much larger HDD address space. In such a structure, maximizing the space utilization of SSD in a cost-effective way is extremely important to generate high I/O performance. We developed ReHypar (recursive hybrid chunk partitioning) that enables improving the space utilization of SSD in the hybrid structure. The first objective of ReHypar is to mitigate the fragmentation overhead of SSD address space, by reusing the remaining free space of I/O units as much as possible. Furthermore, ReHypar allows defining several, logical data sections in SSD address space, with each of those sections being configured with the different I/O unit. We integrated ReHypar with ext2 and ext4 and evaluated it using two public benchmarks including IOzone and Postmark. PMID:24987741

Memristive behavior in a junctionless flash memory cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Orak, Ikram; Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl; Ürel, Mustafa

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits themore » pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.« less

The Forensic Potential of Flash Memory

DTIC Science & Technology

2009-09-01

limit range of 10 to 100 years before data is lost [12]. 5. Flash Memory Logical Structure The logical structure of flash memory from least to...area is not standardized and is manufacturer specific. This information will be used by the wear leveling algorithms and as such will be proprietary...memory cells, the manufacturers of the flash implement a wear leveling algorithm . In contrast, a magnetic disk in an overwrite operation will reuse the

Evaluation of the Radiation Susceptibility of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; LaBel, Kenneth

2017-01-01

We evaluated the heavy ion and proton-induced single-event effects (SEE) for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of similar density and performance in the multiple-cell level (MLC) storage mode. However, the single-level-cell (SLC) storage mode of the 3D NAND showed significantly reduced SEU susceptibility. Additionally, the 3D NAND showed less MBU susceptibility than the planar NAND, with reduced number of upset bits per byte and reduced cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the latest generation planar NAND, indicating a variable upset rate for a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.

Non-volatile memory based on the ferroelectric photovoltaic effect

PubMed Central

Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

2013-01-01

The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

Non Volatile Flash Memory Radiation Tests

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.; Allen, Greg

2012-01-01

Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

Temporal dynamics of encoding, storage and reallocation of visual working memory

PubMed Central

Bays, Paul M; Gorgoraptis, Nikos; Wee, Natalie; Marshall, Louise; Husain, Masud

2012-01-01

The process of encoding a visual scene into working memory has previously been studied using binary measures of recall. Here we examine the temporal evolution of memory resolution, based on observers’ ability to reproduce the orientations of objects presented in brief, masked displays. Recall precision was accurately described by the interaction of two independent constraints: an encoding limit that determines the maximum rate at which information can be transferred into memory, and a separate storage limit that determines the maximum fidelity with which information can be maintained. Recall variability decreased incrementally with time, consistent with a parallel encoding process in which visual information from multiple objects accumulates simultaneously in working memory. No evidence was observed for a limit on the number of items stored. Cueing one display item with a brief flash led to rapid development of a recall advantage for that item. This advantage was short-lived if the cue was simply a salient visual event, but was maintained if it indicated an object of particular relevance to the task. These cueing effects were observed even for items that had already been encoded into memory, indicating that limited memory resources can be rapidly reallocated to prioritize salient or goal-relevant information. PMID:21911739

Temporal dynamics of encoding, storage, and reallocation of visual working memory.

PubMed

Bays, Paul M; Gorgoraptis, Nikos; Wee, Natalie; Marshall, Louise; Husain, Masud

2011-09-12

The process of encoding a visual scene into working memory has previously been studied using binary measures of recall. Here, we examine the temporal evolution of memory resolution, based on observers' ability to reproduce the orientations of objects presented in brief, masked displays. Recall precision was accurately described by the interaction of two independent constraints: an encoding limit that determines the maximum rate at which information can be transferred into memory and a separate storage limit that determines the maximum fidelity with which information can be maintained. Recall variability decreased incrementally with time, consistent with a parallel encoding process in which visual information from multiple objects accumulates simultaneously in working memory. No evidence was observed for a limit on the number of items stored. Cuing one display item with a brief flash led to rapid development of a recall advantage for that item. This advantage was short-lived if the cue was simply a salient visual event but was maintained if it indicated an object of particular relevance to the task. These cuing effects were observed even for items that had already been encoded into memory, indicating that limited memory resources can be rapidly reallocated to prioritize salient or goal-relevant information.

A Semi-Preemptive Garbage Collector for Solid State Drives

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Junghee; Kim, Youngjae; Shipman, Galen M

2011-01-01

NAND flash memory is a preferred storage media for various platforms ranging from embedded systems to enterprise-scale systems. Flash devices do not have any mechanical moving parts and provide low-latency access. They also require less power compared to rotating media. Unlike hard disks, flash devices use out-of-update operations and they require a garbage collection (GC) process to reclaim invalid pages to create free blocks. This GC process is a major cause of performance degradation when running concurrently with other I/O operations as internal bandwidth is consumed to reclaim these invalid pages. The invocation of the GC process is generally governedmore » by a low watermark on free blocks and other internal device metrics that different workloads meet at different intervals. This results in I/O performance that is highly dependent on workload characteristics. In this paper, we examine the GC process and propose a semi-preemptive GC scheme that can preempt on-going GC processing and service pending I/O requests in the queue. Moreover, we further enhance flash performance by pipelining internal GC operations and merge them with pending I/O requests whenever possible. Our experimental evaluation of this semi-preemptive GC sheme with realistic workloads demonstrate both improved performance and reduced performance variability. Write-dominant workloads show up to a 66.56% improvement in average response time with a 83.30% reduced variance in response time compared to the non-preemptive GC scheme.« less

An Improved B+ Tree for Flash File Systems

NASA Astrophysics Data System (ADS)

Havasi, Ferenc

Nowadays mobile devices such as mobile phones, mp3 players and PDAs are becoming evermore common. Most of them use flash chips as storage. To store data efficiently on flash, it is necessary to adapt ordinary file systems because they are designed for use on hard disks. Most of the file systems use some kind of search tree to store index information, which is very important from a performance aspect. Here we improved the B+ search tree algorithm so as to make flash devices more efficient. Our implementation of this solution saves 98%-99% of the flash operations, and is now the part of the Linux kernel.

Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2010

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.

2010-01-01

High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) and multi-level cell (MLC) NAND flash memories manufactured by Micron Technology.

76 FR 41824 - In the Matter of Certain Flash Memory Chips And Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-15

... Memory Chips And Products Containing Same; Notice of Commission Determination Not To Review an Initial... unopposed motion to terminate in its entirety Inv. No. 337-TA-735, Certain Flash Memory Chips and Products... flash memory chips and products containing same by reason of infringement of certain claims of U.S...

Radiation Tests of Highly scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories--Update 2011

NASA Technical Reports Server (NTRS)

Irom, Farokh; Nguyen, Duc N.

2011-01-01

High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) 32Gb and multi-level cell (MLC) 64Gb NAND flash memories manufactured by Micron Technology.

76 FR 4375 - In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-25

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-683] In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... the United States after importation of certain MLC flash memory devices and products containing same...

78 FR 49287 - Certain Flash Memory Chips and Products Containing the Same Correction to Notice of Receipt of...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-13

... INTERNATIONAL TRADE COMMISSION [Docket No 2971] Certain Flash Memory Chips and Products Containing the Same Correction to Notice of Receipt of Complaint; Solicitation of Comments Relating to the Public..., Certain Flash Memory Chips and Products Containing the Same, DN 2971; the Commission solicited comments on...

Novel conformal organic antireflective coatings for advanced I-line lithography

NASA Astrophysics Data System (ADS)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Dynamic Forest: An Efficient Index Structure for NAND Flash Memory

NASA Astrophysics Data System (ADS)

Yang, Chul-Woong; Yong Lee, Ki; Ho Kim, Myoung; Lee, Yoon-Joon

In this paper, we present an efficient index structure for NAND flash memory, called the Dynamic Forest (D-Forest). Since write operations incur high overhead on NAND flash memory, D-Forest is designed to minimize write operations for index updates. The experimental results show that D-Forest significantly reduces write operations compared to the conventional B+-tree.

76 FR 40931 - In the Matter of Certain Flash Memory and Products Containing Same; Notice of Commission...

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2011-07-12

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-685] In the Matter of Certain Flash Memory and... for importation, and the sale within the United States after importation of certain flash memory and... other agreements, written or oral, express or implied, between the parties concerning the subject matter...

75 FR 82071 - In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-29

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission Decision Not To Review the ALJ'S Final... States after importation of certain flash memory chips and products containing the same by reason of...

75 FR 82071 - In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

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2010-12-29

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission Decision Not To Review the ALJ's Final... flash memory chips and products containing the same by reason of infringement of various claims of...

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; Label, Kenneth

2017-01-01

We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode. The 3D NAND showed significantly reduced SEU susceptibility in single-level-cell (SLC) storage mode. Additionally, the 3D NAND showed less multiple-bit upset susceptibility than the planar NAND, with fewer number of upset bits per byte and smaller cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the Micron 16 nm planar NAND, which suggests that typical heavy ion test fluences will underestimate the upset rate during a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.

Towards Terabit Memories

NASA Astrophysics Data System (ADS)

Hoefflinger, Bernd

Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet little data on their energy/b. As a read-out memory with unparalleled retention and lifetime, the ROM with electron-beam direct-write-lithography (Chap. 8) should be considered for its projected 2D density of 250 Gb/cm², a very small read energy of 0.1 μW/Gb/s. The lithography write-speed 10 ms/Terabit makes this ROM a serious contentender for the optimum in non-volatile, tamper-proof storage.

Overlay degradation induced by film stress

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Liu, Yu-Lin; Luo, Shing-Ann; Yang, Mars; Yang, Elvis; Hung, Yung-Tai; Luoh, Tuung; Yang, T. H.; Chen, K. C.

2017-03-01

The semiconductor industry has continually sought the approaches to produce memory devices with increased memory cells per memory die. One way to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories is 3D stacked flash cell array. In constructing 3D NAND flash memories, increasing the number of stacked layers to build more memory cell number per unit area necessitates many high-aspect-ratio etching processes accordingly the incorporation of thick and unique etching hard-mask scheme has been indispensable. However, the ever increasingly thick requirement on etching hard-mask has made the hard-mask film stress control extremely important for maintaining good process qualities. The residual film stress alters the wafer shape consequently several process impacts have been readily observed across wafer, such as wafer chucking error on scanner, film peeling, materials coating and baking defects, critical dimension (CD) non-uniformity and overlay degradation. This work investigates the overlay and residual order performance indicator (ROPI) degradation coupling with increasingly thick advanced patterning film (APF) etching hard-mask. Various APF films deposited by plasma enhanced chemical vapor deposition (PECVD) method under different deposition temperatures, chemicals combinations, radio frequency powers and chamber pressures were carried out. And -342MPa to +80MPa film stress with different film thicknesses were generated for the overlay performance study. The results revealed the overlay degradation doesn't directly correlate with convex or concave wafer shapes but the magnitude of residual APF film stress, while increasing the APF thickness will worsen the overlay performance and ROPI strongly. High-stress APF film was also observed to enhance the scanner chucking difference and lead to more serious wafer to wafer overlay variation. To reduce the overlay degradation from ever increasingly thick APF etching hard-mask, optimizing the film stress of APF is the most effective way and high order overlay compensation is also helpful.

Models for Total-Dose Radiation Effects in Non-Volatile Memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Campbell, Philip Montgomery; Wix, Steven D.

The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models andmore » compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.« less

Tunable bandgap energy of fluorinated nanocrystals for flash memory applications produced by low-damage plasma treatment.

PubMed

Huang, Chi-Hsien; Lin, Chih-Ting; Wang, Jer-Chyi; Chou, Chien; Ye, Yu-Ren; Cheng, Bing-Ming; Lai, Chao-Sung

2012-11-30

A plasma system with a complementary filter to shield samples from damage during tetrafluoromethane (CF(4)) plasma treatment was proposed in order to incorporate fluorine atoms into gadolinium oxide nanocrystals (Gd(2)O(3)-NCs) for flash memory applications. X-ray photoelectron spectroscopy confirmed that fluorine atoms were successfully introduced into the Gd(2)O(3)-NCs despite the use of a filter in the plasma-enhanced chemical vapour deposition system to shield against several potentially damaging species. The number of incorporated fluorine atoms can be controlled by varying the treatment time. The optimized memory window of the resulting flash memory devices was twice that of devices treated by a filterless system because more fluorine atoms were incorporated into the Gd(2)O(3)-NCs film with very little damage. This enlarged the bandgap energy from 5.48 to 6.83 eV, as observed by ultraviolet absorption measurements. This bandgap expansion can provide a large built-in electric field that allows more charges to be stored in the Gd(2)O(3)-NCs. The maximum improvement in the retention characteristic was >60%. Because plasma damage during treatment is minimal, maximum fluorination can be achieved. The concept of simply adding a filter to a plasma system to prevent plasma damage exhibits great promise for functionalization or modification of nanomaterials for advanced nanoelectronics while introducing minimal defects.

I/O performance evaluation of a Linux-based network-attached storage device

NASA Astrophysics Data System (ADS)

Sun, Zhaoyan; Dong, Yonggui; Wu, Jinglian; Jia, Huibo; Feng, Guanping

2002-09-01

In a Local Area Network (LAN), clients are permitted to access the files on high-density optical disks via a network server. But the quality of read service offered by the conventional server is not satisfied because of the multiple functions on the server and the overmuch caller. This paper develops a Linux-based Network-Attached Storage (NAS) server. The Operation System (OS), composed of an optimized kernel and a miniaturized file system, is stored in a flash memory. After initialization, the NAS device is connected into the LAN. The administrator and users could configure the access the server through the web page respectively. In order to enhance the quality of access, the management of buffer cache in file system is optimized. Some benchmark programs are peformed to evaluate the I/O performance of the NAS device. Since data recorded in optical disks are usually for reading accesses, our attention is focused on the reading throughput of the device. The experimental results indicate that the I/O performance of our NAS device is excellent.

System and method for programmable bank selection for banked memory subsystems

DOEpatents

Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

2010-09-07

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Titanium oxide nonvolatile memory device and its application

NASA Astrophysics Data System (ADS)

Wang, Wei

In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.

A fast and low-power microelectromechanical system-based non-volatile memory device

PubMed Central

Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

2011-01-01

Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

Method for programming a flash memory

DOEpatents

Brosky, Alexander R.; Locke, William N.; Maher, Conrado M.

2016-08-23

A method of programming a flash memory is described. The method includes partitioning a flash memory into a first group having a first level of write-protection, a second group having a second level of write-protection, and a third group having a third level of write-protection. The write-protection of the second and third groups is disabled using an installation adapter. The third group is programmed using a Software Installation Device.

Effect of Radiation Exposure on the Retention of Commercial NAND Flash Memory

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Chen, D.; Friendlich, M.; Carts, M. A.; Seidleck, C. M.; LaBel, K. A.

2011-01-01

We have compared the data retention of irradiated commercial NAND flash memories with that of unirradiated controls. Under some circumstanc es, radiation exposure has a significant effect on the retention of f lash memories.

Future Development of Dense Ferroelectric Memories for Space Applications

NASA Technical Reports Server (NTRS)

Philpy, Stephen C.; Derbenwick, Gary F.

2001-01-01

The availability of high density, radiation tolerant, nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened complementary metal oxide semiconductors (CMOS), can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to single event upsets and proton irradiation, and ferroelectric storage capacitors to be resistant to neutron exposure. In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial double level metal 64-kilobit ferroelectric memory was presented. Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.

Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface

DTIC Science & Technology

2016-03-17

Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface Austin H. Roach, Matthew J. Gadlage, James D. Ingalls, Aaron...reliability and trust of memories is very important, but because of incomplete documentation provided by commercial vendors and a lack of low-level...shown here that useful information about the trust and reliability of COTS NAND Flash components can be obtained by going beyond the standard product

CoNNeCT Baseband Processor Module

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.

2011-01-01

A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.

A hybrid ferroelectric-flash memory cells

NASA Astrophysics Data System (ADS)

Park, Jae Hyo; Byun, Chang Woo; Seok, Ki Hwan; Kim, Hyung Yoon; Chae, Hee Jae; Lee, Sol Kyu; Son, Se Wan; Ahn, Donghwan; Joo, Seung Ki

2014-09-01

A ferroelectric-flash (F-flash) memory cells having a metal-ferroelectric-nitride-oxynitride-silicon structure are demonstrated, and the ferroelectric materials were perovskite-dominated Pb(Zr,Ti)O3 (PZT) crystallized by Pt gate electrode. The PZT thin-film as a blocking layer improves electrical and memorial performance where programming and erasing mechanism are different from the metal-ferroelectric-insulator-semiconductor device or the conventional silicon-oxide-nitride-oxide-silicon device. F-flash cells exhibit not only the excellent electrical transistor performance, having 442.7 cm2 V-1 s-1 of field-effect mobility, 190 mV dec-1 of substhreshold slope, and 8 × 105 on/off drain current ratio, but also a high reliable memory characteristics, having a large memory window (6.5 V), low-operating voltage (0 to -5 V), faster P/E switching speed (50/500 μs), long retention time (>10 years), and excellent fatigue P/E cycle (>105) due to the boosting effect, amplification effect, and energy band distortion of nitride from the large polarization. All these characteristics correspond to the best performances among conventional flash cells reported so far.

High performance data transfer

NASA Astrophysics Data System (ADS)

Cottrell, R.; Fang, C.; Hanushevsky, A.; Kreuger, W.; Yang, W.

2017-10-01

The exponentially increasing need for high speed data transfer is driven by big data, and cloud computing together with the needs of data intensive science, High Performance Computing (HPC), defense, the oil and gas industry etc. We report on the Zettar ZX software. This has been developed since 2013 to meet these growing needs by providing high performance data transfer and encryption in a scalable, balanced, easy to deploy and use way while minimizing power and space utilization. In collaboration with several commercial vendors, Proofs of Concept (PoC) consisting of clusters have been put together using off-the- shelf components to test the ZX scalability and ability to balance services using multiple cores, and links. The PoCs are based on SSD flash storage that is managed by a parallel file system. Each cluster occupies 4 rack units. Using the PoCs, between clusters we have achieved almost 200Gbps memory to memory over two 100Gbps links, and 70Gbps parallel file to parallel file with encryption over a 5000 mile 100Gbps link.

A class Hierarchical, object-oriented approach to virtual memory management

NASA Technical Reports Server (NTRS)

Russo, Vincent F.; Campbell, Roy H.; Johnston, Gary M.

1989-01-01

The Choices family of operating systems exploits class hierarchies and object-oriented programming to facilitate the construction of customized operating systems for shared memory and networked multiprocessors. The software is being used in the Tapestry laboratory to study the performance of algorithms, mechanisms, and policies for parallel systems. Described here are the architectural design and class hierarchy of the Choices virtual memory management system. The software and hardware mechanisms and policies of a virtual memory system implement a memory hierarchy that exploits the trade-off between response times and storage capacities. In Choices, the notion of a memory hierarchy is captured by abstract classes. Concrete subclasses of those abstractions implement a virtual address space, segmentation, paging, physical memory management, secondary storage, and remote (that is, networked) storage. Captured in the notion of a memory hierarchy are classes that represent memory objects. These classes provide a storage mechanism that contains encapsulated data and have methods to read or write the memory object. Each of these classes provides specializations to represent the memory hierarchy.

Scaling Trends and Tradeoffs between Short Channel Effect and Channel Boosting Characteristics in Sub-20 nm Bulk/Silicon-on-Insulator NAND Flash Memory

NASA Astrophysics Data System (ADS)

Miyaji, Kousuke; Hung, Chinglin; Takeuchi, Ken

2012-04-01

The scaling trends and limitation in sub-20 nm a bulk and silicon-on-insulator (SOI) NAND flash memory is studied by the three-dimensional (3D) device simulation focusing on short channel effects (SCE), channel boost leakage and channel voltage boosting characteristics during the program-inhibit operation. Although increasing punch-through stopper doping concentration is effective for suppressing SCE in bulk NAND cells, the generation of junction leakage becomes serious. On the other hand, SCE can be suppressed by thinning the buried oxide (BOX) in SOI NAND cells. However, the boosted channel voltage decreases by the higher BOX capacitance. It is concluded that the scaling limitation is dominated by the junction leakage and channel boosting capability for bulk and SOI NAND flash cells, respectively, and the scaling limit is decreased to 9 nm using SOI NAND flash memory cells from 13 nm in bulk NAND flash memory cells.

Tank atmosphere perturbation: a procedure for assessing flashing losses from oil storage tanks.

PubMed

Littlejohn, David; Lucas, Donald

2003-03-01

A new procedure to measure the total volume of emissions from heavy crude oil storage tanks is described. Tank flashing losses, which are difficult to measure, can be determined by correcting this value for working and breathing losses. The procedure uses a fan or blower to vent the headspace of the storage tank, with subsequent monitoring of the change in concentrations of oxygen or other gases. Combined with a separate determination of the reactive organic carbon (ROC) fraction in the gas, this method allows the evaluation of the total amount of ROC emitted. The operation of the system is described, and results from measurement of several storage tanks in California oil fields are presented. Our measurements are compared with those obtained using the California Air Resources Board (CARB) 150 method.

Role of Non-Volatile Memories in Automotive and IoT Markets

DTIC Science & Technology

2017-03-01

Role of Non-Volatile Memories in Automotive and IoT Markets Vipin Tiwari Director, Business Development and Product Marketing SST – A Wholly Own...automotive and Internet of Things (IoT) markets . Keywords: Embedded flash; Microcontrollers, Automotive; Internet of Things, IoT; Non-volatile memories...variou s types of non-volatile memories available in the market , bu t the floating-poly based embedded flash memories have been around the longest and

Advanced error-prediction LDPC with temperature compensation for highly reliable SSDs

NASA Astrophysics Data System (ADS)

Tokutomi, Tsukasa; Tanakamaru, Shuhei; Iwasaki, Tomoko Ogura; Takeuchi, Ken

2015-09-01

To improve the reliability of NAND Flash memory based solid-state drives (SSDs), error-prediction LDPC (EP-LDPC) has been proposed for multi-level-cell (MLC) NAND Flash memory (Tanakamaru et al., 2012, 2013), which is effective for long retention times. However, EP-LDPC is not as effective for triple-level cell (TLC) NAND Flash memory, because TLC NAND Flash has higher error rates and is more sensitive to program-disturb error. Therefore, advanced error-prediction LDPC (AEP-LDPC) has been proposed for TLC NAND Flash memory (Tokutomi et al., 2014). AEP-LDPC can correct errors more accurately by precisely describing the error phenomena. In this paper, the effects of AEP-LDPC are investigated in a 2×nm TLC NAND Flash memory with temperature characterization. Compared with LDPC-with-BER-only, the SSD's data-retention time is increased by 3.4× and 9.5× at room-temperature (RT) and 85 °C, respectively. Similarly, the acceptable BER is increased by 1.8× and 2.3×, respectively. Moreover, AEP-LDPC can correct errors with pre-determined tables made at higher temperatures to shorten the measurement time before shipping. Furthermore, it is found that one table can cover behavior over a range of temperatures in AEP-LDPC. As a result, the total table size can be reduced to 777 kBytes, which makes this approach more practical.

Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer

NASA Astrophysics Data System (ADS)

Shen, Yung-Shao; Chen, Kuen-Yi; Chen, Po-Chun; Chen, Teng-Chuan; Wu, Yung-Hsien

2017-03-01

Crystalline ZrTiO4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N2O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 105 program/erase cycles and 81.8% charge retention after 104 sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer.

PubMed

Shen, Yung-Shao; Chen, Kuen-Yi; Chen, Po-Chun; Chen, Teng-Chuan; Wu, Yung-Hsien

2017-03-08

Crystalline ZrTiO 4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF 4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N 2 O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 10 5 program/erase cycles and 81.8% charge retention after 10 4  sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2012

NASA Technical Reports Server (NTRS)

Irom, Farokh; Allen, Gregory R.

2012-01-01

The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

Fast neutron irradiation tests of flash memories used in space environment at the ISIS spallation neutron source

NASA Astrophysics Data System (ADS)

Andreani, C.; Senesi, R.; Paccagnella, A.; Bagatin, M.; Gerardin, S.; Cazzaniga, C.; Frost, C. D.; Picozza, P.; Gorini, G.; Mancini, R.; Sarno, M.

2018-02-01

This paper presents a neutron accelerated study of soft errors in advanced electronic devices used in space missions, i.e. Flash memories performed at the ChipIr and VESUVIO beam lines at the ISIS spallation neutron source. The two neutron beam lines are set up to mimic the space environment spectra and allow neutron irradiation tests on Flash memories in the neutron energy range above 10 MeV and up to 800 MeV. The ISIS neutron energy spectrum is similar to the one occurring in the atmospheric as well as in space and planetary environments, with intensity enhancements varying in the range 108- 10 9 and 106- 10 7 respectively. Such conditions are suitable for the characterization of the atmospheric, space and planetary neutron radiation environments, and are directly applicable for accelerated tests of electronic components as demonstrated here in benchmark measurements performed on flash memories.

Compact Low Power DPU for Plasma Instrument LINA on the Russian Luna-Glob Lander

NASA Astrophysics Data System (ADS)

Schmidt, Walter; Riihelä, Pekka; Kallio, Esa

2013-04-01

The Swedish Institute for Space Physics in Kiruna is bilding a Lunar Ions and Neutrals Analyzer (LINA) for the Russian Luna-Glob lander mission and its orbiter, to be launched around 2016 [1]. The Finnish Meteorological Institute is responsible for designing and building the central data processing units (DPU) for both instruments. The design details were optimized to serve as demonstrator also for a similar instrument on the Jupiter mission JUICE. To accommodate the originally set short development time and to keep the design between orbiter and Lander as similar as possible, the DPU is built around two re-programmable flash-based FPGAs from Actel. One FPGA contains a public-domain 32-bit processor core identical for both Lander and orbiter. The other FPGA handles all interfaces to the spacecraft system and the detectors, somewhat different for both implementations. Monitoring of analog housekeeping data is implemented as an IP-core from Stellamar inside the interface FPGA, saving mass, volume and especially power while simplifying the radiation protection design. As especially on the Lander the data retention before transfer to the orbiter cannot be guaranteed under all conditions, the DPU includes a Flash-PROM containing several software versions and data storage capability. With the memory management implemented inside the interface FPGA, one of the serial links can also be used as test port to verify the system, load the initial software into the Flash-PROM and to control the detector hardware directly without support by the processor and a ready developed operating system and software. Implementation and performance details will be presented. Reference: [1] http://www.russianspaceweb.com/luna_glob_lander.html.

Method and apparatus for offloading compute resources to a flash co-processing appliance

DOEpatents

Tzelnic, Percy; Faibish, Sorin; Gupta, Uday K.; Bent, John; Grider, Gary Alan; Chen, Hsing -bung

2015-10-13

Solid-State Drive (SSD) burst buffer nodes are interposed into a parallel supercomputing cluster to enable fast burst checkpoint of cluster memory to or from nearby interconnected solid-state storage with asynchronous migration between the burst buffer nodes and slower more distant disk storage. The SSD nodes also perform tasks offloaded from the compute nodes or associated with the checkpoint data. For example, the data for the next job is preloaded in the SSD node and very fast uploaded to the respective compute node just before the next job starts. During a job, the SSD nodes perform fast visualization and statistical analysis upon the checkpoint data. The SSD nodes can also perform data reduction and encryption of the checkpoint data.

Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2010-01-01

This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

Optimal proximity correction: application for flash memory design

NASA Astrophysics Data System (ADS)

Chen, Y. O.; Huang, D. L.; Sung, K. T.; Chiang, J. J.; Yu, M.; Teng, F.; Chu, Lung; Rey, Juan C.; Bernard, Douglas A.; Li, Jiangwei; Li, Junling; Moroz, V.; Boksha, Victor V.

1998-06-01

Proximity Correction is the technology for which the most of IC manufacturers are committed already. The final intended result of correction is affected by many factors other than the optical characteristics of the mask-stepper system, such as photoresist exposure, post-exposure bake and development parameters, etch selectivity and anisotropy, and underlying topography. The most advanced industry and research groups already reported immediate need to consider wafer topography as one of the major components during a Proximity Correction procedure. In the present work we are discussing the corners rounding effect (which eventually cause electrical leakage) observed for the elements of Poly2 layer for a Flash Memory Design. It was found that the rounding originated by three- dimensional effects due to variation of photoresist thickness resulting from the non-planar substrate. Our major goal was to understand the reasons and correct corner rounding. As a result of this work highly effective layout correction methodology was demonstrated and manufacturable Depth Of Focus was achieved. Another purpose of the work was to demonstrate complete integration flow for a Flash Memory Design based on photolithography; deposition/etch; ion implantation/oxidation/diffusion; and device simulators.

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

NASA Technical Reports Server (NTRS)

Li, Yue (Inventor); Bruck, Jehoshua (Inventor)

2018-01-01

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

Investigation of Current Spike Phenomena During Heavy Ion Irradiation of NAND Flash Memories

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Berg, Melanie; Friendlich, Mark; Wilcox, Ted; Seidleck, Christina; LaBel, Kenneth A.; Irom, Farokh; Buchner, Steven P.; McMorrow, Dale; Mavis, David G.;

Paging memory from random access memory to backing storage in a parallel computer

DOEpatents

Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

2013-05-21

Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

75 FR 11909 - In the Matter of: Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-12

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-664] In the Matter of: Certain Flash Memory Chips and Products Containing Same; Notice of Commission Determination Not To Review an Initial..., and the [[Page 11910

A light writable microfluidic "flash memory": optically addressed actuator array with latched operation for microfluidic applications.

PubMed

Hua, Zhishan; Pal, Rohit; Srivannavit, Onnop; Burns, Mark A; Gulari, Erdogan

2008-03-01

This paper presents a novel optically addressed microactuator array (microfluidic "flash memory") with latched operation. Analogous to the address-data bus mediated memory address protocol in electronics, the microactuator array consists of individual phase-change based actuators addressed by localized heating through focused light patterns (address bus), which can be provided by a modified projector or high power laser pointer. A common pressure manifold (data bus) for the entire array is used to generate large deflections of the phase change actuators in the molten phase. The use of phase change material as the working media enables latched operation of the actuator array. After the initial light "writing" during which the phase is temporarily changed to molten, the actuated status is self-maintained by the solid phase of the actuator without power and pressure inputs. The microfluidic flash memory can be re-configured by a new light illumination pattern and common pressure signal. The proposed approach can achieve actuation of arbitrary units in a large-scale array without the need for complex external equipment such as solenoid valves and electrical modules, which leads to significantly simplified system implementation and compact system size. The proposed work therefore provides a flexible, energy-efficient, and low cost multiplexing solution for microfluidic applications based on physical displacements. As an example, the use of the latched microactuator array as "normally closed" or "normally open" microvalves is demonstrated. The phase-change wax is fully encapsulated and thus immune from contamination issues in fluidic environments.

Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

PubMed

Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-05-01

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A microcomputer-based daily living activity recording system.

PubMed

Matsuoka, Shingo; Yonezawa, Yoshiharu; Maki, Hiromichi; Ogawa, Hidekuni; Hahn, Allen W; Thayer, Julian F; Caldwell, W Morton

2003-01-01

A new daily living activity recording system has been developed for monitoring health conditions and living patterns, such as respiration, posture, activity/rest ratios and general activity level. The system employs a piezoelectric sensor, a dual axis accelerometer, two low-power active filters, a low-power 8-bit single chip microcomputer and a 128 MB compact flash memory. The piezoelectric sensor, whose electrical polarization voltage is produced by mechanical strain, detects body movements. Its high-frequency output components reflect body movements produced by walking and running activities, while the low frequency components are mainly respiratory. The dual axis accelerometer detects, from body X and Y tilt angles, whether the patient is standing, sitting or lying down (prone, supine, left side or right side). The detected respiratory, behavior and posture signals are stored by the compact flash memory. After recording, these data are downloaded to a desktop computer and analyzed.

Within-wafer CD variation induced by wafer shape

NASA Astrophysics Data System (ADS)

Huang, Chi-hao; Yang, Mars; Yang, Elvis; Yang, T. H.; Chen, K. C.

2016-03-01

In order to meet the increasing storage capacity demand and reduce bit cost of NAND flash memories, 3D stacked vertical flash cell array has been proposed. In constructing 3D NAND flash memories, the bit number per unit area is increased as increasing the number of stacked layers. However, the increased number of stacked layers has made the film stress control extremely important for maintaining good process quality. The residual film stress alters the wafer shape accordingly several process impacts have been readily observed across wafer, such as film deposition non-uniformity, etch rate non-uniformity, wafer chucking error on scanner, materials coating/baking defects, overlay degradation and critical dimension (CD) non-uniformity. The residual tensile and compressive stresses on wafers will result in concave and convex wafer shapes, respectively. This study investigates within-wafer CD uniformity (CDU) associated with wafer shape change induced by the 3D NAND flash memory processes. Within-wafer CDU was correlated with several critical parameters including different wafer bow heights of concave and convex wafer shapes, photo resists with different post exposure baking (PEB) temperature sensitivities, and DoseMapper compensation. The results indicated the trend of within-wafer CDU maintains flat for convex wafer shapes with bow height up to +230um and concave wafer shapes with bow height ranging from 0 ~ -70um, while the within-wafer CDU trends up from -70um to -246um wafer bow heights. To minimize the within-wafer CD distribution induced by wafer warpage, carefully tailoring the film stack and thermal budget in the process flow for maintaining the wafer shape at CDU friendly range is indispensable and using photo-resist materials with lower PEB temperature sensitivity is also suggested. In addition, DoseMapper compensation is also an alternative to greatly suppress the within-wafer CD non-uniformity but the photo-resist profile variation induced by across-wafer PEB temperature non-uniformity attributed to wafer warpage is uncorrectable, and the photo-resist profile variation is believed to affect across-wafer etch bias uniformity to some degree.

Data systems and computer science space data systems: Onboard memory and storage

NASA Technical Reports Server (NTRS)

Shull, Tom

1991-01-01

The topics are presented in viewgraph form and include the following: technical objectives; technology challenges; state-of-the-art assessment; mass storage comparison; SODR drive and system concepts; program description; vertical Bloch line (VBL) device concept; relationship to external programs; and backup charts for memory and storage.

Materials and other needs for advanced phase change memory (Presentation Recording)

NASA Astrophysics Data System (ADS)

Sosa, Norma E.

2015-09-01

Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

Aging changes in the female reproductive system

MedlinePlus

... Other common changes include: Menopause symptoms such as hot flashes, moodiness, headaches, and trouble sleeping Problems with short-term memory Decrease in breast tissue Lower sex drive (libido) and sexual response Increased risk of ...

UDCM Operating Procedure (Limited Functionality prototype)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Newell, Matthew R.

2016-06-14

The UDCM is a two channel low current measurement device designed to record sub-nano-amp to micro-amp currents from radiation detectors. The UDCM incorporates a Commercial-Off-The- Shelf (COTS) processor enabling both serial over USB as well as Ethernet communications. The instrument includes microSD and USB flash memory for data storage as well as a programmable High Voltage (HV) power supply for detector bias. The UDCM incorporates a unique TTL output feature first used in the LANL Current to Pulse Converter (CPC). Two SMA connectors on the UDCM provide TTL pulses at a frequency proportional to the input currents.

Portable flash lamp reflectance analyzer system and method

NASA Technical Reports Server (NTRS)

Kalshoven, James Edward (Inventor)

1999-01-01

The system and method allow spectroscopic analysis of vegetation or the like without effects from changing sun and cloud conditions, undesired portions of the area of interest or atmospheric disturbances. The system (1) includes a light source (5) such as a xenon flash lamp, a telescope (7), a spectrometer (9), an analog/digital converter (11), a memory (13), a display (15), and an on-board microprocessor (17) or a port (19) for attachment to a laptop computer. The system is taken to an area of interest in the woods (step 41), the vegetation is illuminated from below (step 43) and data are taken (step 45).

Inverse Resistance Change Cr2Ge2Te6-Based PCRAM Enabling Ultralow-Energy Amorphization.

PubMed

Hatayama, Shogo; Sutou, Yuji; Shindo, Satoshi; Saito, Yuta; Song, Yun-Heub; Ando, Daisuke; Koike, Junichi

2018-01-24

Phase-change random access memory (PCRAM) has attracted much attention for next-generation nonvolatile memory that can replace flash memory and can be used for storage-class memory. Generally, PCRAM relies on the change in the electrical resistance of a phase-change material between high-resistance amorphous (reset) and low-resistance crystalline (set) states. Herein, we present an inverse resistance change PCRAM with Cr 2 Ge 2 Te 6 (CrGT) that shows a high-resistance crystalline reset state and a low-resistance amorphous set state. The inverse resistance change was found to be due to a drastic decrease in the carrier density upon crystallization, which causes a large increase in contact resistivity between CrGT and the electrode. The CrGT memory cell was demonstrated to show fast reversible resistance switching with a much lower operating energy for amorphization than a Ge 2 Sb 2 Te 5 memory cell. This low operating energy in CrGT should be due to a small programmed amorphous volume, which can be realized by a high-resistance crystalline matrix and a dominant contact resistance. Simultaneously, CrGT can break the trade-off relationship between the crystallization temperature and operating speed.

Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

NASA Astrophysics Data System (ADS)

Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

2018-01-01

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

Dreamweaver and Flash: Strategies for Updating Communication Systems Instruction

ERIC Educational Resources Information Center

Hill, Roger B.

2004-01-01

The rate of innovation and change impacting technology education communication systems instruction has been vigorous for longer than most people can remember. Trends have included analog systems being replaced by digital systems, integration of networks and system devices, computerization, optical storage, and wireless transmission of data. The…

Nonvolatile Memory Technology for Space Applications

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

2010-01-01

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

76 FR 13207 - In the Matter of Certain Flash Memory and Products Containing Same Notice of Request for...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-10

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-685] In the Matter of Certain Flash Memory and Products Containing Same Notice of Request for Statements on the Public Interest Section 337 of the Tariff Act of 1930 provides that if the Commission finds a violation it shall exclude the...

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.

2008-01-01

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

Computer hardware for radiologists: Part 2.

PubMed

Indrajit, Ik; Alam, A

2010-11-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the 'ever increasing' digital future.

FPGA-based prototype storage system with phase change memory

NASA Astrophysics Data System (ADS)

Li, Gezi; Chen, Xiaogang; Chen, Bomy; Li, Shunfen; Zhou, Mi; Han, Wenbing; Song, Zhitang

2016-10-01

With the ever-increasing amount of data being stored via social media, mobile telephony base stations, and network devices etc. the database systems face severe bandwidth bottlenecks when moving vast amounts of data from storage to the processing nodes. At the same time, Storage Class Memory (SCM) technologies such as Phase Change Memory (PCM) with unique features like fast read access, high density, non-volatility, byte-addressability, positive response to increasing temperature, superior scalability, and zero standby leakage have changed the landscape of modern computing and storage systems. In such a scenario, we present a storage system called FLEET which can off-load partial or whole SQL queries to the storage engine from CPU. FLEET uses an FPGA rather than conventional CPUs to implement the off-load engine due to its highly parallel nature. We have implemented an initial prototype of FLEET with PCM-based storage. The results demonstrate that significant performance and CPU utilization gains can be achieved by pushing selected query processing components inside in PCM-based storage.

[Wireless device for monitoring the patients with chronic disease].

PubMed

Ciorap, R; Zaharia, D; Corciovă, C; Ungureanu, Monica; Lupu, R; Stan, A

2008-01-01

Remote monitoring of chronic diseases can improve health outcomes and potentially lower health care costs. The high number of the patients, suffering of chronically diseases, who wish to stay at home rather then in a hospital increasing the need of homecare monitoring and have lead to a high demand of wearable medical devices. Also, extended patient monitoring during normal activity has become a very important target. In this paper are presented the design of the wireless monitoring devices based on ultra low power circuits, high storage memory flash, bluetooth communication and the firmware for the management of the monitoring device. The monitoring device is built using an ultra low power microcontroller (MSP430 from Texas Instruments) that offers the advantage of high integration of some circuits. The custom made electronic boards used for biosignal acquisition are also included modules for storage device (SD/MMC card) with FAT32 file system and Bluetooth device for short-range communication used for data transmission between monitoring device and PC or PDA. The work was focused on design and implementation of an ultra low power wearable device able to acquire patient vital parameters, causing minimal discomfort and allowing high mobility. The proposed wireless device could be used as a warning system for monitoring during normal activity.

Radiation Tests on 2Gb NAND Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, Duc N.; Guertin, Steven M.; Patterson, J. D.

2006-01-01

We report on SEE and TID tests of highly scaled Samsung 2Gbits flash memories. Both in-situ and biased interval irradiations were used to characterize the response of the total accumulated dose failures. The radiation-induced failures can be categorized as followings: single event upset (SEU) read errors in biased and unbiased modes, write errors, and single-event-functional-interrupt (SEFI) failures.

From Secure Memories to Smart Card Security

NASA Astrophysics Data System (ADS)

Handschuh, Helena; Trichina, Elena

Non-volatile memory is essential in most embedded security applications. It will store the key and other sensitive materials for cryptographic and security applications. In this chapter, first an overview is given of current flash memory architectures. Next the standard security features which form the basis of so-called secure memories are described in more detail. Smart cards are a typical embedded application that is very vulnerable to attacks and that at the same time has a high need for secure non-volatile memory. In the next part of this chapter, the secure memories of so-called flash-based high-density smart cards are described. It is followed by a detailed analysis of what the new security challenges for such objects are.

Computers, the Human Mind, and My In-Laws' House.

ERIC Educational Resources Information Center

Esque, Timm J.

1996-01-01

Discussion of human memory, computer memory, and the storage of information focuses on a metaphor that can account for memory without storage and can set the stage for systemic research around a more comprehensive, understandable theory. (Author/LRW)

External Verification of SCADA System Embedded Controller Firmware

DTIC Science & Technology

2012-03-01

microprocessor and read-only memory (ROM) or flash memory for storing firmware and control logic [5],[8]. A PLC typically has three software levels as shown in...implementing different firmware. Because PLCs are in effect a microprocessor device, an analysis of the current research on embedded devices is important...Electronics Engineers (IEEE) published a 15 best practices guide for firmware control on microprocessors [44]. IEEE suggests that microprocessors

The storage system of PCM based on random access file system

NASA Astrophysics Data System (ADS)

Han, Wenbing; Chen, Xiaogang; Zhou, Mi; Li, Shunfen; Li, Gezi; Song, Zhitang

2016-10-01

Emerging memory technologies such as Phase change memory (PCM) tend to offer fast, random access to persistent storage with better scalability. It's a hot topic of academic and industrial research to establish PCM in storage hierarchy to narrow the performance gap. However, the existing file systems do not perform well with the emerging PCM storage, which access storage medium via a slow, block-based interface. In this paper, we propose a novel file system, RAFS, to bring about good performance of PCM, which is built in the embedded platform. We attach PCM chips to the memory bus and build RAFS on the physical address space. In the proposed file system, we simplify traditional system architecture to eliminate block-related operations and layers. Furthermore, we adopt memory mapping and bypassed page cache to reduce copy overhead between the process address space and storage device. XIP mechanisms are also supported in RAFS. To the best of our knowledge, we are among the first to implement file system on real PCM chips. We have analyzed and evaluated its performance with IOZONE benchmark tools. Our experimental results show that the RAFS on PCM outperforms Ext4fs on SDRAM with small record lengths. Based on DRAM, RAFS is significantly faster than Ext4fs by 18% to 250%.

An Analysis of MARSIS Radar Flash Memory Data from Lunae Planum, Mars: Searching for Subsurface Structures.

NASA Astrophysics Data System (ADS)

Caprarelli, G.; Orosei, R.; Mastrogiuseppe, M.; Cartacci, M.

2017-12-01

Lunae Planum is a Martian plain measuring approximately 1000 km in width and 2000 km in length, centered at coordinates 294°E-11°N. MOLA elevations range from +2500 m to +500 m in the south, gently sloping northward to -500 m. The plain is part of a belt of terrains located between the southern highlands and the northern lowlands, that are transitional in character (e.g., by elevation, age and morphology). These transitional terrains are poorly understood, in part because of their relative lack of major geomorphological features. They record however a very significant part of Mars's geologic history. The most evident features on Lunae Planum's Hesperian surface are regularly spaced, longitudinally striking, wrinkle ridges. These indicate the presence of blind thrust faults cutting through thick stacks of layers of volcanic or sedimentary rocks. The presence of fluidized ejecta craters scattered all over the region suggests also the presence of ice or volatiles in the subsurface. In a preliminary study of Lunae Planum's subsurface we used the Mars Express ground penetrating radar MARSIS dataset [1], in order to detect reflectors that could indicate the presence of fault planes or layering. Standard radargrams however, provided no evidence of changes in value of dielectric constant that could indicate possible geologic discontinuities or stratification of physically diverse materials. We thus started a new investigation based on processing of raw MARSIS data. Here we report on the preliminary results of this study. We searched the MARSIS archive for raw data stored in flash memory. When operating with flash storage, the radar collects 2 frequency bands along-track covering a distance = 100-250 km, depending on the orbiter altitude [2]. We found flash memory data from 24 orbits over the area. We processed the data focusing radar returns in off-nadir directions, to maximize the likelihood of detecting sloping subsurface structures, including those striking parallel to the Mars Express sub-polar orbits. We plan to follow this study by applying a new processor aimed at improving the resolution and signal to noise ratio of the data. [1] Caprarelli et al. (2017), LPSC 48, 1720. [2] Watters et al. (2017), LPSC 48, 1693.

Holographic storage of biphoton entanglement.

PubMed

Dai, Han-Ning; Zhang, Han; Yang, Sheng-Jun; Zhao, Tian-Ming; Rui, Jun; Deng, You-Jin; Li, Li; Liu, Nai-Le; Chen, Shuai; Bao, Xiao-Hui; Jin, Xian-Min; Zhao, Bo; Pan, Jian-Wei

2012-05-25

Coherent and reversible storage of multiphoton entanglement with a multimode quantum memory is essential for scalable all-optical quantum information processing. Although a single photon has been successfully stored in different quantum systems, storage of multiphoton entanglement remains challenging because of the critical requirement for coherent control of the photonic entanglement source, multimode quantum memory, and quantum interface between them. Here we demonstrate a coherent and reversible storage of biphoton Bell-type entanglement with a holographic multimode atomic-ensemble-based quantum memory. The retrieved biphoton entanglement violates the Bell inequality for 1 μs storage time and a memory-process fidelity of 98% is demonstrated by quantum state tomography.

Multilevel resistive information storage and retrieval

DOEpatents

Lohn, Andrew; Mickel, Patrick R.

2016-08-09

The present invention relates to resistive random-access memory (RRAM or ReRAM) systems, as well as methods of employing multiple state variables to form degenerate states in such memory systems. The methods herein allow for precise write and read steps to form multiple state variables, and these steps can be performed electrically. Such an approach allows for multilevel, high density memory systems with enhanced information storage capacity and simplified information retrieval.

Investigation of impact of post-metallization annealing on reliability of 65 nm NOR floating-gate flash memories

NASA Astrophysics Data System (ADS)

Chiu, Shengfen; Xu, Yue; Ji, Xiaoli; Yan, Feng

2016-12-01

This paper investigates the impact of post-metallization annealing (PMA) in pure nitrogen ambient on the reliability of 65 nm NOR-type floating-gate flash memory devices. The experimental results show that, with PMA process, the cycling performance of flash cells, especially for the erasing speed is obviously degraded compared to that without PMA. It is found that the bulk oxide traps and tunnel oxide/Si interface traps are significantly increased with PMA treatment. The water/moisture residues left in the interlayer dielectric layers diffuse to tunnel oxide during PMA process is considered to be responsible for these traps generation, which further enhances the degradation of erase performance. Skipping PMA treatment is proposed to suppress the water diffusion effect on erase performance degradation of flash cells.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Artificial cognitive memory—changing from density driven to functionality driven

NASA Astrophysics Data System (ADS)

Shi, L. P.; Yi, K. J.; Ramanathan, K.; Zhao, R.; Ning, N.; Ding, D.; Chong, T. C.

2011-03-01

Increasing density based on bit size reduction is currently a main driving force for the development of data storage technologies. However, it is expected that all of the current available storage technologies might approach their physical limits in around 15 to 20 years due to miniaturization. To further advance the storage technologies, it is required to explore a new development trend that is different from density driven. One possible direction is to derive insights from biological counterparts. Unlike physical memories that have a single function of data storage, human memory is versatile. It contributes to functions of data storage, information processing, and most importantly, cognitive functions such as adaptation, learning, perception, knowledge generation, etc. In this paper, a brief review of current data storage technologies are presented, followed by discussions of future storage technology development trend. We expect that the driving force will evolve from density to functionality, and new memory modules associated with additional functions other than only data storage will appear. As an initial step toward building a future generation memory technology, we propose Artificial Cognitive Memory (ACM), a memory based intelligent system. We also present the characteristics of ACM, new technologies that can be used to develop ACM components such as bioinspired element cells (silicon, memristor, phase change, etc.), and possible methodologies to construct a biologically inspired hierarchical system.

Digital Device Architecture and the Safe Use of Flash Devices in Munitions

NASA Technical Reports Server (NTRS)

Katz, Richard B.; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Digital devices of interest to designers include flash-based microcontrollers and field programmable gate arrays (FPGAs). Almost a decade ago, a study was undertaken to determine if flash-based microcontrollers could be safely used in fuzes and, if so, how should such devices be applied. The results were documented in the Technical Manual for the Use of Logic Devices in Safety Features. This paper will first review the Technical Manual and discuss the rationale behind the suggested architectures for microcontrollers and a brief review of the concern about data retention in flash cells. An architectural feature in the microcontroller under study will be discussed and its use will show how to screen for weak or failed cells during manufacture, storage, or immediately prior to use. As was done for microcontrollers a decade ago, architectures for a flash-based FPGA will be discussed, showing how it can be safely used in fuzes. Additionally, architectures for using non-volatile (including flash-based) storage will be discussed for SRAM-based FPGAs.

Non-volatile main memory management methods based on a file system.

PubMed

Oikawa, Shuichi

2014-01-01

There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

Novel Algorithm/Hardware Partnerships for Real-Time Nonlinear Control

DTIC Science & Technology

2014-02-28

Investigate Tempest Technologies 28 February 2014 Abstract The real-time implementation of controls in nonlinear systems remains one of the great...button for resetting the FPGA board in Max-Plus MVM FPGA system. We utilize the built-in 32MB BPI flash as storage for the Tempest Max-Plus MVM

A large-scale cryoelectronic system for biological sample banking

NASA Astrophysics Data System (ADS)

Shirley, Stephen G.; Durst, Christopher H. P.; Fuchs, Christian C.; Zimmermann, Heiko; Ihmig, Frank R.

2009-11-01

We describe a polymorphic electronic infrastructure for managing biological samples stored over liquid nitrogen. As part of this system we have developed new cryocontainers and carrier plates attached to Flash memory chips to have a redundant and portable set of data at each sample. Our experimental investigations show that basic Flash operation and endurance is adequate for the application down to liquid nitrogen temperatures. This identification technology can provide the best sample identification, documentation and tracking that brings added value to each sample. The first application of the system is in a worldwide collaborative research towards the production of an AIDS vaccine. The functionality and versatility of the system can lead to an essential optimization of sample and data exchange for global clinical studies.

Assessing Server Fault Tolerance and Disaster Recovery Implementation in Thin Client Architectures

DTIC Science & Technology

2007-09-01

server • Windows 2003 server Processor AMD Geode GX Memory 512MB Flash/256MB DDR RAM I/O/Peripheral Support • VGA-type video output (DB-15...2000 Advanced Server Processor AMD Geode NX 1500 Memory • 256MB or 512MB or 1GB DDR SDRAM • 1GB or 512MB Flash I/O/Peripheral Support • SiS741 GX

TID and SEE Response of an Advanced Samsung 4G NAND Flash Memory

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Friendlich, M.; Howard, J. W.; Berg, M. D.; Kim, H. S.; Irwin, T. L.; LaBel, K. A.

2007-01-01

Initial total ionizing dose (TID) and single event heavy ion test results are presented for an unhardened commercial flash memory, fabricated with 63 nm technology. Results are that the parts survive to a TID of nearly 200 krad (SiO2), with a tractable soft error rate of about 10(exp -l2) errors/bit-day, for the Adams Ten Percent Worst Case Environment.

Saccades to remembered targets: the effects of smooth pursuit and illusory stimulus motion

NASA Technical Reports Server (NTRS)

Zivotofsky, A. Z.; Rottach, K. G.; Averbuch-Heller, L.; Kori, A. A.; Thomas, C. W.; Dell'Osso, L. F.; Leigh, R. J.

1996-01-01

1. Measurements were made in four normal human subjects of the accuracy of saccades to remembered locations of targets that were flashed on a 20 x 30 deg random dot display that was either stationary or moving horizontally and sinusoidally at +/-9 deg at 0.3 Hz. During the interval between the target flash and the memory-guided saccade, the "memory period" (1.4 s), subjects either fixated a stationary spot or pursued a spot moving vertically sinusoidally at +/-9 deg at 0.3 Hz. 2. When saccades were made toward the location of targets previously flashed on a stationary background as subjects fixated the stationary spot, median saccadic error was 0.93 deg horizontally and 1.1 deg vertically. These errors were greater than for saccades to visible targets, which had median values of 0.59 deg horizontally and 0.60 deg vertically. 3. When targets were flashed as subjects smoothly pursued a spot that moved vertically across the stationary background, median saccadic error was 1.1 deg horizontally and 1.2 deg vertically, thus being of similar accuracy to when targets were flashed during fixation. In addition, the vertical component of the memory-guided saccade was much more closely correlated with the "spatial error" than with the "retinal error"; this indicated that, when programming the saccade, the brain had taken into account eye movements that occurred during the memory period. 4. When saccades were made to targets flashed during attempted fixation of a stationary spot on a horizontally moving background, a condition that produces a weak Duncker-type illusion of horizontal movement of the primary target, median saccadic error increased horizontally to 3.2 deg but was 1.1 deg vertically. 5. When targets were flashed as subjects smoothly pursued a spot that moved vertically on the horizontally moving background, a condition that induces a strong illusion of diagonal target motion, median saccadic error was 4.0 deg horizontally and 1.5 deg vertically; thus the horizontal error was greater than under any other experimental condition. 6. In most trials, the initial saccade to the remembered target was followed by additional saccades while the subject was still in darkness. These secondary saccades, which were executed in the absence of visual feedback, brought the eye closer to the target location. During paradigms involving horizontal background movement, these corrections were more prominent horizontally than vertically. 7. Further measurements were made in two subjects to determine whether inaccuracy of memory-guided saccades, in the horizontal plane, was due to mislocalization at the time that the target flashed, misrepresentation of the trajectory of the pursuit eye movement during the memory period, or both. 8. The magnitude of the saccadic error, both with and without corrections made in darkness, was mislocalized by approximately 30% of the displacement of the background at the time that the target flashed. The magnitude of the saccadic error also was influenced by net movement of the background during the memory period, corresponding to approximately 25% of net background movement for the initial saccade and approximately 13% for the final eye position achieved in darkness. 9. We formulated simple linear models to test specific hypotheses about which combinations of signals best describe the observed saccadic amplitudes. We tested the possibilities that the brain made an accurate memory of target location and a reliable representation of the eye movement during the memory period, or that one or both of these was corrupted by the illusory visual stimulus. Our data were best accounted for by a model in which both the working memory of target location and the internal representation of the horizontal eye movements were corrupted by the illusory visual stimulus. We conclude that extraretinal signals played only a minor role, in comparison with visual estimates of the direction of gaze, in planning eye movements to remembered targ.

A wide bandwidth CCD buffer memory system

NASA Technical Reports Server (NTRS)

Siemens, K.; Wallace, R. W.; Robinson, C. R.

1978-01-01

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.

BreathBased Monitoring of Pilot Hypoxia - Proof of Concept

DTIC Science & Technology

2016-04-21

vest, and there are no aircraft connections required. Operation is entirely automatic and data visualization is available via a Bluetooth connected...to USB-connected Flash-RAM (storage depends on module size, 32Gb supported). • Bluetooth transmission of data in real time • Automated storage...via an Android tablet (Figure 4). The tablet acquires the data transmitted using Bluetooth by the pilot worn system module and provides a real-time

The past, the future and the biology of memory storage.

PubMed Central

Kandel, E R; Pittenger, C

1999-01-01

We here briefly review a century of accomplishments in studying memory storage and delineate the two major questions that have dominated thinking in this area: the systems question of memory, which concerns where in the brain storage occurs; and the molecular question of memory, which concerns the mechanisms whereby memories are stored and maintained. We go on to consider the themes that memory research may be able to address in the 21st century. Finally, we reflect on the clinical and societal import of our increasing understanding of the mechanisms of memory, discussing possible therapeutic approaches to diseases that manifest with disruptions of learning and possible ethical implication of the ability, which is on the horizon, to ameliorate or even enhance human memory. PMID:10670023

Electronic still camera

NASA Astrophysics Data System (ADS)

Holland, S. Douglas

1992-09-01

A handheld, programmable, digital camera is disclosed that supports a variety of sensors and has program control over the system components to provide versatility. The camera uses a high performance design which produces near film quality images from an electronic system. The optical system of the camera incorporates a conventional camera body that was slightly modified, thus permitting the use of conventional camera accessories, such as telephoto lenses, wide-angle lenses, auto-focusing circuitry, auto-exposure circuitry, flash units, and the like. An image sensor, such as a charge coupled device ('CCD') collects the photons that pass through the camera aperture when the shutter is opened, and produces an analog electrical signal indicative of the image. The analog image signal is read out of the CCD and is processed by preamplifier circuitry, a correlated double sampler, and a sample and hold circuit before it is converted to a digital signal. The analog-to-digital converter has an accuracy of eight bits to insure accuracy during the conversion. Two types of data ports are included for two different data transfer needs. One data port comprises a general purpose industrial standard port and the other a high speed/high performance application specific port. The system uses removable hard disks as its permanent storage media. The hard disk receives the digital image signal from the memory buffer and correlates the image signal with other sensed parameters, such as longitudinal or other information. When the storage capacity of the hard disk has been filled, the disk can be replaced with a new disk.

Electronic Still Camera

NASA Technical Reports Server (NTRS)

Holland, S. Douglas (Inventor)

1992-01-01

A handheld, programmable, digital camera is disclosed that supports a variety of sensors and has program control over the system components to provide versatility. The camera uses a high performance design which produces near film quality images from an electronic system. The optical system of the camera incorporates a conventional camera body that was slightly modified, thus permitting the use of conventional camera accessories, such as telephoto lenses, wide-angle lenses, auto-focusing circuitry, auto-exposure circuitry, flash units, and the like. An image sensor, such as a charge coupled device ('CCD') collects the photons that pass through the camera aperture when the shutter is opened, and produces an analog electrical signal indicative of the image. The analog image signal is read out of the CCD and is processed by preamplifier circuitry, a correlated double sampler, and a sample and hold circuit before it is converted to a digital signal. The analog-to-digital converter has an accuracy of eight bits to insure accuracy during the conversion. Two types of data ports are included for two different data transfer needs. One data port comprises a general purpose industrial standard port and the other a high speed/high performance application specific port. The system uses removable hard disks as its permanent storage media. The hard disk receives the digital image signal from the memory buffer and correlates the image signal with other sensed parameters, such as longitudinal or other information. When the storage capacity of the hard disk has been filled, the disk can be replaced with a new disk.

Solution processed molecular floating gate for flexible flash memories

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-10-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.

Solution processed molecular floating gate for flexible flash memories

PubMed Central

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-01-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

On the Law Relating Processing to Storage in Working Memory

ERIC Educational Resources Information Center

Barrouillet, Pierre; Portrat, Sophie; Camos, Valerie

2011-01-01

"Working memory" is usually defined in cognitive psychology as a system devoted to the simultaneous processing and maintenance of information. However, although many models of working memory have been put forward during the last decades, they often leave underspecified the dynamic interplay between processing and storage. Moreover, the account of…

C-MOS array design techniques: SUMC multiprocessor system study

NASA Technical Reports Server (NTRS)

Clapp, W. A.; Helbig, W. A.; Merriam, A. S.

1972-01-01

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units.

Emerging memories

NASA Astrophysics Data System (ADS)

Baldi, Livio; Bez, Roberto; Sandhu, Gurtej

2014-12-01

Memory is a key component of any data processing system. Following the classical Turing machine approach, memories hold both the data to be processed and the rules for processing them. In the history of microelectronics, the distinction has been rather between working memory, which is exemplified by DRAM, and storage memory, exemplified by NAND. These two types of memory devices now represent 90% of all memory market and 25% of the total semiconductor market, and have been the technology drivers in the last decades. Even if radically different in characteristics, they are however based on the same storage mechanism: charge storage, and this mechanism seems to be near to reaching its physical limits. The search for new alternative memory approaches, based on more scalable mechanisms, has therefore gained new momentum. The status of incumbent memory technologies and their scaling limitations will be discussed. Emerging memory technologies will be analyzed, starting from the ones that are already present for niche applications, and which are getting new attention, thanks to recent technology breakthroughs. Maturity level, physical limitations and potential for scaling will be compared to existing memories. At the end the possible future composition of memory systems will be discussed.

Noise Attenuation Performance Assessment of the Joint Helmet Mounted Cueing System (JHMCS)

DTIC Science & Technology

2010-08-01

Flash Drive (CFD) memory (Figure 9) and Sound Professionals SP-TFB-2 Miniature Binaural Microphones with the Sound Professionals SP-SPSB-1 Slim-line...flight noise. Sound Professionals binaural microphones were placed to record both internal and external sounds. One microphone was attached to the

40 CFR 49.145 - Monitoring requirements.

Code of Federal Regulations, 2013 CFR

2013-07-01

... gauging or positive displacement metering system, as appropriate, as established by the US Department of... at all times. Methods to measure the volume include, but are not limited to, direct measurement and... standing, working, breathing, and flashing losses from the produced oil and produced water storage tanks...

40 CFR 49.145 - Monitoring requirements.

Code of Federal Regulations, 2014 CFR

2014-07-01

... gauging or positive displacement metering system, as appropriate, as established by the US Department of... at all times. Methods to measure the volume include, but are not limited to, direct measurement and... standing, working, breathing, and flashing losses from the produced oil and produced water storage tanks...

Investigation of multi-state charge-storage properties of redox-active organic molecules in silicon-molecular hybrid devices for DRAM and Flash applications

NASA Astrophysics Data System (ADS)

Gowda, Srivardhan Shivappa

Molecular electronics has recently spawned a considerable amount of interest with several molecules possessing charge-conduction and charge-storage properties proposed for use in electronic devices. Hybrid silicon-molecular technology has the promise of augmenting the current silicon technology and provide for a transitional path to future molecule-only technology. The focus of this dissertation work has been on developing a class of hybrid silicon-molecular electronic devices for DRAM and Flash memory applications utilizing redox-active molecules. This work exploits the ability of molecules to store charges with single-electron precision at room temperature. The hybrid devices are fabricated by forming self-assembled monolayers of redox-active molecules on Si and oxide (SiO2 and HfO2) surfaces via formation of covalent linkages. The molecules possess discrete quantum states from which electrons can tunnel to the Si substrate at discrete applied voltages (oxidation process, cell write), leaving behind a positively charged layer of molecules. The reduction (erase) process, which is the process of electrons tunneling back from Si to the molecules, neutralizes the positively charged molecular monolayer. Hybrid silicon-molecular capacitor test structures were electrically characterized with an electrolyte gate using cyclic voltammetry (CyV) and impedance spectroscopy (CV) techniques. The redox voltages, kinetics (write/erase speeds) and charge-retention characteristics were found to be strongly dependent on the Si doping type and densities, and ambient light. It was also determined that the redox energy states in the molecules communicate with the valence band of the Si substrate. This allows tuning of write and read states by modulating minority carriers in n- and p-Si substrates. Ultra-thin dielectric tunnel barriers (SiO2, HfO2) were placed between the molecules and the Si substrate to augment charge-retention for Flash memory applications. The redox response was studied as a function of tunnel oxide thickness, dielectric permittivity and energy barrier, and modified Butler-Volmer expressions were postulated to describe the redox kinetics. The speed vs. retention performance of the devices was improved via asymmetric layered tunnel barriers. The properties of molecules can be tailored by molecular design and synthetic chemistry. In this work, it was demonstrated that an alternate route to tune/enhance the properties of the hybrid device is to engineer the substrate (silicon) component. The molecules were attached to diode surfaces to tune redox voltages and improve charge-retention characteristics. N+ pockets embedded in P-Si well were utilized to obtain multiple states from a two-state molecule. The structure was also employed as a characterization tool in investigating the intrinsic properties of the molecules such as lateral conductivity within the monolayer. Redox molecules were also incorporated on an ultra thin gate-oxide of Si MOSFETs with the intent of studying the interaction of redox states with Si MOSFETs. The discrete molecular states were manifested in the drain current and threshold voltage characteristics of the device. This work demonstrates the multi-state modulation of Si-MOSFETs' drain current via redox-active molecular monolayers. Polymeric films of redox-active molecules were incorporated to improve the charge-density (ON/OFF ratio) and these structures may be employed for multi-state, low-voltage Flash memory applications. The most critical aspect of this research effort is to build a reliable and high density solid state memory technology. To this end, efforts were directed towards replacement of the electrolytic gate, which forms an extremely thin insulating double layer (˜10 nm) at the electrolyte-molecule interface, with a combination of an ultra-thin high-K dielectric layer and a metal gate. Several interesting observations were made in the research approaches towards integration and provided valuable insights into the electrolyte-redox systems. In summary, this work provides fundamental insights into the interaction of redox-energy states with silicon substrate and realistic approaches for exploiting the unique properties of the molecules that may enable solutions for nanoscale high density, low-voltage, long retention and multiple bit memory applications.

Improved charge trapping properties by embedded graphene oxide quantum-dots for flash memory application

NASA Astrophysics Data System (ADS)

Jia, Xinlei; Yan, Xiaobing; Wang, Hong; Yang, Tao; Zhou, Zhenyu; Zhao, Jianhui

2018-06-01

In this work, we have investigated two kinds of charge trapping memory devices with Pd/Al2O3/ZnO/SiO2/p-Si and Pd/Al2O3/ZnO/graphene oxide quantum-dots (GOQDs)/ZnO/SiO2/p-Si structure. Compared with the single ZnO sample, the memory window of the ZnO-GOQDs-ZnO sample reaches a larger value (more than doubled) of 2.7 V under the sweeping gate voltage ± 7 V, indicating a better charge storage capability and the significant charge trapping effects by embedding the GOQDs trapping layer. The ZnO-GOQDs-ZnO devices have better date retention properties with the high and low capacitances loss of ˜ 1.1 and ˜ 6.9%, respectively, as well as planar density of the trapped charges of 1.48 × 1012 cm- 2. It is proposed that the GOQDs play an important role in the outstanding memory characteristics due to the deep quantum potential wells and the discrete distribution of the GOQDs. The long date retention time might have resulted from the high potential barrier which suppressed both the back tunneling and the leakage current. Intercalating GOQDs in the memory device is a promising method to realize large memory window, low-power consumption and excellent retention properties.

Bubble memory module for spacecraft application

NASA Technical Reports Server (NTRS)

Hayes, P. J.; Looney, K. T.; Nichols, C. D.

1985-01-01

Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

Interactions of numerical and temporal stimulus characteristics on the control of response location by brief flashes of light.

PubMed

Fetterman, J Gregor; Killeen, P Richard

2011-09-01

Pigeons pecked on three keys, responses to one of which could be reinforced after 3 flashes of the houselight, to a second key after 6, and to a third key after 12. The flashes were arranged according to variable-interval schedules. Response allocation among the keys was a function of the number of flashes. When flashes were omitted, transitions occurred very late. Increasing flash duration produced a leftward shift in the transitions along a number axis. Increasing reinforcement probability produced a leftward shift, and decreasing reinforcement probability produced a rightward shift. Intermixing different flash rates within sessions separated allocations: Faster flash rates shifted the functions sooner in real time, but later in terms of flash count, and conversely for slower flash rates. A model of control by fading memories of number and time was proposed.

Virtual memory support for distributed computing environments using a shared data object model

NASA Astrophysics Data System (ADS)

Huang, F.; Bacon, J.; Mapp, G.

1995-12-01

Conventional storage management systems provide one interface for accessing memory segments and another for accessing secondary storage objects. This hinders application programming and affects overall system performance due to mandatory data copying and user/kernel boundary crossings, which in the microkernel case may involve context switches. Memory-mapping techniques may be used to provide programmers with a unified view of the storage system. This paper extends such techniques to support a shared data object model for distributed computing environments in which good support for coherence and synchronization is essential. The approach is based on a microkernel, typed memory objects, and integrated coherence control. A microkernel architecture is used to support multiple coherence protocols and the addition of new protocols. Memory objects are typed and applications can choose the most suitable protocols for different types of object to avoid protocol mismatch. Low-level coherence control is integrated with high-level concurrency control so that the number of messages required to maintain memory coherence is reduced and system-wide synchronization is realized without severely impacting the system performance. These features together contribute a novel approach to the support for flexible coherence under application control.

Robust holographic storage system design.

PubMed

Watanabe, Takahiro; Watanabe, Minoru

2011-11-21

Demand is increasing daily for large data storage systems that are useful for applications in spacecraft, space satellites, and space robots, which are all exposed to radiation-rich space environment. As candidates for use in space embedded systems, holographic storage systems are promising because they can easily provided the demanded large-storage capability. Particularly, holographic storage systems, which have no rotation mechanism, are demanded because they are virtually maintenance-free. Although a holographic memory itself is an extremely robust device even in a space radiation environment, its associated lasers and drive circuit devices are vulnerable. Such vulnerabilities sometimes engendered severe problems that prevent reading of all contents of the holographic memory, which is a turn-off failure mode of a laser array. This paper therefore presents a proposal for a recovery method for the turn-off failure mode of a laser array on a holographic storage system, and describes results of an experimental demonstration. © 2011 Optical Society of America

Construction and temporal behaviour study of multi RLC intense light pulses for dermatological applications.

PubMed

Hamoudi, Walid K; Ismail, Raid A; Shakir, Hussein A

2017-10-01

Driving a flash lamp in an intense pulsed light system requires a high-voltage DC power supply, capacitive energy storage and a flash lamp triggering unit. Single, double, triple and quadruple-mesh discharge and triggering circuits were constructed to provide intense light pulses of variable energy and time durations. The system was treated as [Formula: see text] circuit in some cases and [Formula: see text] circuit in others with a light pulse profile following the temporal behaviour of the exciting current pulse. Distributing the energy delivered to one lamp onto a number of LC meshes permitted longer current pulses, and consequently increased the light pulse length. Positive results were obtained when using the system to treat skin wrinkles.

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

NASA Astrophysics Data System (ADS)

Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

2013-08-01

In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

SODR Memory Control Buffer Control ASIC

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1994-01-01

The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

Effects of botanicals and combined hormone therapy on cognition in postmenopausal women.

PubMed

Maki, Pauline M; Rubin, Leah H; Fornelli, Deanne; Drogos, Lauren; Banuvar, Suzanne; Shulman, Lee P; Geller, Stacie E

2009-01-01

The aim of this study was to characterize the effects of red clover, black cohosh, and combined hormone therapy on cognitive function in comparison to placebo in women with moderate to severe vasomotor symptoms. In a phase II randomized, double-blind, placebo-controlled study, 66 midlife women (of 89 from a parent study; mean age, 53 y) with 35 or more weekly hot flashes were randomized to receive red clover (120 mg), black cohosh (128 mg), 0.625 mg conjugated equine estrogens plus 2.5 mg medroxyprogesterone acetate (CEE/MPA), or placebo. Participants completed measures of verbal memory (primary outcome) and other cognitive measures (secondary outcomes) before and during the 12th treatment month. A subset of 19 women completed objective, physiological measures of hot flashes using ambulatory skin conductance monitors. Neither of the botanical treatments had an impact on any cognitive measure. Compared with placebo, CEE/MPA led to a greater decline in verbal learning (one of five verbal memory measures). This effect just missed statistical significance (P = 0.057) in unadjusted analyses but reached significance (P = 0.02) after adjusting for vasomotor symptoms. Neither of the botanical treatment groups showed a change in verbal memory that differed from the placebo group (Ps > 0.28), even after controlling for improvements in hot flashes. In secondary outcomes, CEE/MPA led to a decrease in immediate digit recall and an improvement in letter fluency. Only CEE/MPA significantly reduced objective hot flashes. Results indicate that a red clover (phytoestrogen) supplement or black cohosh has no effects on cognitive function. CEE/MPA reduces objective hot flashes but worsens some aspects of verbal memory.

Effects of Botanicals and Combined Hormone Therapy on Cognition in Postmenopausal Women

PubMed Central

Maki, Pauline M.; Rubin, Leah H.; Fornelli, Deanne; Drogos, Lauren; Banuvar, Suzanne; Shulman, Lee P.; Geller, Stacie E.

2009-01-01

Objective To characterize the effects of red clover, black cohosh, and combined hormone therapy on cognitive function in comparison to placebo in women with moderate to severe vasomotor symptoms. Design In a Phase II randomized, double-blind, placebo-controlled study, 66 midlife women (out of 89 from a parent study; mean age=53 y) with ≥ 35 weekly hot flashes were randomized to receive red clover (120 mg), black cohosh (128 mg), CEE/MPA (0.625 mg conjugated equine estrogens plus 2.5 mg medroxyprogesterone acetate), or placebo. Participants completed measures of verbal memory (primary outcome) and other cognitive measures (secondary outcomes) before and during the 12th treatment month. A subset of 19 women completed objective, physiological measures of hot flashes using ambulatory skin conductance monitors. Results There was no impact of either of the botanical treatments on any cognitive measure. Compared to placebo, CEE/MPA led to greater decline in verbal learning (one of five verbal memory measures). This effect just missed statistical significance (p=0.057) in unadjusted analyses, but reached significance (p=.02) after adjusting for vasomotor symptoms. Neither botanical treatment group showed a change in verbal memory that differed from the placebo group (ps>0.28), even after controlling for improvements in hot flashes. In secondary outcomes, CEE/MPA led to a decrease in immediate digit recall and an improvement in letter fluency. Only CEE/MPA significantly reduced objective hot flashes. Conclusions Results indicate no effects of a red clover (phytoestrogen) supplement or black cohosh on cognitive function. CEE/MPA reduces objective hot flashes but worsens some aspects of verbal memory. PMID:19590458

Proactive Interference Does Not Meaningfully Distort Visual Working Memory Capacity Estimates in the Canonical Change Detection Task

PubMed Central

Lin, Po-Han; Luck, Steven J.

2012-01-01

The change detection task has become a standard method for estimating the storage capacity of visual working memory. Most researchers assume that this task isolates the properties of an active short-term storage system that can be dissociated from long-term memory systems. However, long-term memory storage may influence performance on this task. In particular, memory traces from previous trials may create proactive interference that sometimes leads to errors, thereby reducing estimated capacity. Consequently, the capacity of visual working memory may be higher than is usually thought, and correlations between capacity and other measures of cognition may reflect individual differences in proactive interference rather than individual differences in the capacity of the short-term storage system. Indeed, previous research has shown that change detection performance can be influenced by proactive interference under some conditions. The purpose of the present study was to determine whether the canonical version of the change detection task – in which the to-be-remembered information consists of simple, briefly presented features – is influenced by proactive interference. Two experiments were conducted using methods that ordinarily produce substantial evidence of proactive interference, but no proactive interference was observed. Thus, the canonical version of the change detection task can be used to assess visual working memory capacity with no meaningful influence of proactive interference. PMID:22403556

Proactive interference does not meaningfully distort visual working memory capacity estimates in the canonical change detection task.

PubMed

Lin, Po-Han; Luck, Steven J

2012-01-01

The change detection task has become a standard method for estimating the storage capacity of visual working memory. Most researchers assume that this task isolates the properties of an active short-term storage system that can be dissociated from long-term memory systems. However, long-term memory storage may influence performance on this task. In particular, memory traces from previous trials may create proactive interference that sometimes leads to errors, thereby reducing estimated capacity. Consequently, the capacity of visual working memory may be higher than is usually thought, and correlations between capacity and other measures of cognition may reflect individual differences in proactive interference rather than individual differences in the capacity of the short-term storage system. Indeed, previous research has shown that change detection performance can be influenced by proactive interference under some conditions. The purpose of the present study was to determine whether the canonical version of the change detection task - in which the to-be-remembered information consists of simple, briefly presented features - is influenced by proactive interference. Two experiments were conducted using methods that ordinarily produce substantial evidence of proactive interference, but no proactive interference was observed. Thus, the canonical version of the change detection task can be used to assess visual working memory capacity with no meaningful influence of proactive interference.

An ASIC memory buffer controller for a high speed disk system

NASA Technical Reports Server (NTRS)

Hodson, Robert F.; Campbell, Steve

1993-01-01

The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

NASA Technical Reports Server (NTRS)

Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)

2000-01-01

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

Electric-field-controlled interface dipole modulation for Si-based memory devices.

PubMed

Miyata, Noriyuki

2018-05-31

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Channel doping concentration and cell program state dependence on random telegraph noise spatial and statistical distribution in 30 nm NAND flash memory

NASA Astrophysics Data System (ADS)

Tomita, Toshihiro; Miyaji, Kousuke

2015-04-01

The dependence of spatial and statistical distribution of random telegraph noise (RTN) in a 30 nm NAND flash memory on channel doping concentration NA and cell program state Vth is comprehensively investigated using three-dimensional Monte Carlo device simulation considering random dopant fluctuation (RDF). It is found that single trap RTN amplitude ΔVth is larger at the center of the channel region in the NAND flash memory, which is closer to the jellium (uniform) doping results since NA is relatively low to suppress junction leakage current. In addition, ΔVth peak at the center of the channel decreases in the higher Vth state due to the current concentration at the shallow trench isolation (STI) edges induced by the high vertical electrical field through the fringing capacitance between the channel and control gate. In such cases, ΔVth distribution slope λ cannot be determined by only considering RDF and single trap.

Architecture and method for a burst buffer using flash technology

DOEpatents

Tzelnic, Percy; Faibish, Sorin; Gupta, Uday K.; Bent, John; Grider, Gary Alan; Chen, Hsing-bung

2016-03-15

A parallel supercomputing cluster includes compute nodes interconnected in a mesh of data links for executing an MPI job, and solid-state storage nodes each linked to a respective group of the compute nodes for receiving checkpoint data from the respective compute nodes, and magnetic disk storage linked to each of the solid-state storage nodes for asynchronous migration of the checkpoint data from the solid-state storage nodes to the magnetic disk storage. Each solid-state storage node presents a file system interface to the MPI job, and multiple MPI processes of the MPI job write the checkpoint data to a shared file in the solid-state storage in a strided fashion, and the solid-state storage node asynchronously migrates the checkpoint data from the shared file in the solid-state storage to the magnetic disk storage and writes the checkpoint data to the magnetic disk storage in a sequential fashion.

Novel approach for low-cost muzzle flash detection system

NASA Astrophysics Data System (ADS)

Voskoboinik, Asher

2008-04-01

A low-cost muzzle flash detection based on CMOS sensor technology is proposed. This low-cost technology makes it possible to detect various transient events with characteristic times between dozens of microseconds up to dozens of milliseconds while sophisticated algorithms successfully separate them from false alarms by utilizing differences in geometrical characteristics and/or temporal signatures. The proposed system consists of off-the-shelf smart CMOS cameras with built-in signal and image processing capabilities for pre-processing together with allocated memory for storing a buffer of images for further post-processing. Such a sensor does not require sending giant amounts of raw data to a real-time processing unit but provides all calculations in-situ where processing results are the output of the sensor. This patented CMOS muzzle flash detection concept exhibits high-performance detection capability with very low false-alarm rates. It was found that most false-alarms due to sun glints are from sources at distances of 500-700 meters from the sensor and can be distinguished by time examination techniques from muzzle flash signals. This will enable to eliminate up to 80% of falsealarms due to sun specular reflections in the battle field. Additional effort to distinguish sun glints from suspected muzzle flash signal is made by optimization of the spectral band in Near-IR region. The proposed system can be used for muzzle detection of small arms, missiles and rockets and other military applications.

Configurable memory system and method for providing atomic counting operations in a memory device

DOEpatents

Bellofatto, Ralph E.; Gara, Alan G.; Giampapa, Mark E.; Ohmacht, Martin

2010-09-14

A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

The influence of cognitive load on spatial search performance.

PubMed

Longstaffe, Kate A; Hood, Bruce M; Gilchrist, Iain D

2014-01-01

During search, executive function enables individuals to direct attention to potential targets, remember locations visited, and inhibit distracting information. In the present study, we investigated these executive processes in large-scale search. In our tasks, participants searched a room containing an array of illuminated locations embedded in the floor. The participants' task was to press the switches at the illuminated locations on the floor so as to locate a target that changed color when pressed. The perceptual salience of the search locations was manipulated by having some locations flashing and some static. Participants were more likely to search at flashing locations, even when they were explicitly informed that the target was equally likely to be at any location. In large-scale search, attention was captured by the perceptual salience of the flashing lights, leading to a bias to explore these targets. Despite this failure of inhibition, participants were able to restrict returns to previously visited locations, a measure of spatial memory performance. Participants were more able to inhibit exploration to flashing locations when they were not required to remember which locations had previously been visited. A concurrent digit-span memory task further disrupted inhibition during search, as did a concurrent auditory attention task. These experiments extend a load theory of attention to large-scale search, which relies on egocentric representations of space. High cognitive load on working memory leads to increased distractor interference, providing evidence for distinct roles for the executive subprocesses of memory and inhibition during large-scale search.

Roll-to-roll nanopatterning using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Ahn, Sean; Ganapathisubramanian, Maha; Miller, Mike; Yang, Jack; Choi, Jin; Xu, Frank; Resnick, Douglas J.; Sreenivasan, S. V.

2012-03-01

The ability to pattern materials at the nanoscale can enable a variety of applications ranging from high density data storage, displays, photonic devices and CMOS integrated circuits to emerging applications in the biomedical and energy sectors. These applications require varying levels of pattern control, short and long range order, and have varying cost tolerances. Extremely large area R2R manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. The cost of manufacturing is typically driven by speed (or throughput), tool complexity, cost of consumables (materials used, mold or master cost, etc.), substrate cost, and the downstream processing required (annealing, deposition, etching, etc.). In order to achieve low cost nanopatterning, it is imperative to move towards high speed imprinting, less complex tools, near zero waste of consumables and low cost substrates. The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. In this paper we address the key challenges for roll based nanopatterning by introducing a novel concept: Ink Jet based Roll-to-Roll Nanopatterning. To address this challenge, we have introduced a J-FIL based demonstrator product, the LithoFlex 100. Topics that are discussed in the paper include tool design and process performance. In addition, we have used the LithoFlex 100 to fabricate high performance wire grid polarizers on flexible polycarbonate (PC) films. Transmission of better than 80% and extinction ratios on the order of 4500 have been achieved.

Transiting Exoplanet Survey Satellite (TESS) Community Observer Program including the Science Enhancement Option Box (SEO Box) - 12 TB On-board Flash Memory for Serendipitous Science

NASA Astrophysics Data System (ADS)

Schingler, Robert; Villasenor, J. N.; Ricker, G. R.; Latham, D. W.; Vanderspek, R. K.; Ennico, K. A.; Lewis, B. S.; Bakos, G.; Brown, T. M.; Burgasser, A. J.; Charbonneau, D.; Clampin, M.; Deming, L. D.; Doty, J. P.; Dunham, E. W.; Elliot, J. L.; Holman, M. J.; Ida, S.; Jenkins, J. M.; Jernigan, J. G.; Kawai, N.; Laughlin, G. P.; Lissauer, J. J.; Martel, F.; Sasselov, D. D.; Seager, S.; Torres, G.; Udry, S.; Winn, J. N.; Worden, S. P.

2010-01-01

The Transiting Exoplanet Survey Satellite (TESS) will perform an all-sky survey in a low-inclination, low-Earth orbit. TESS's 144 GB of raw data collected each orbit will be stacked, cleaned, cut, compressed and downloaded. The Community Observer Program is a Science Enhancement Option (SEO) that takes advantage of the low-radiation environment, technology advances in flash memory, and the vast amount of astronomical data collected by TESS. The Community Observer Program requires the addition of a 12 TB "SEO Box” inside the TESS Bus. The hardware can be built using low-cost Commercial Off-The-Shelf (COTS) components and fits within TESS's margins while accommodating GSFC gold rules. The SEO Box collects and stores a duplicate of the TESS camera data at a "raw” stage ( 4.3 GB/orbit, after stacking and cleaning) and makes them available for on-board processing. The sheer amount of onboard storage provided by the SEO Box allows the stacking and storing of several months of data, allowing the investigator to probe deeper in time prior to a given event. Additionally, with computation power and data in standard formats, investigators can utilize data-mining techniques to investigate serendipitous phenomenon, including pulsating stars, eclipsing binaries, supernovae or other transient phenomena. The Community Observer Program enables ad-hoc teams of citizen scientists to propose, test, refine and rank algorithms for on-board analysis to support serendipitous science. Combining "best practices” of online collaboration, with careful moderation and community management, enables this `crowd sourced’ participatory exploration with a minimal risk and impact on the core TESS Team. This system provides a powerful and independent tool opening a wide range of opportunity for science enhancement and secondary science. Support for this work has been provided by NASA, the Kavli Foundation, Google, and the Smithsonian Institution.

NRAM: a disruptive carbon-nanotube resistance-change memory.

PubMed

Gilmer, D C; Rueckes, T; Cleveland, L

2018-04-03

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

NRAM: a disruptive carbon-nanotube resistance-change memory

NASA Astrophysics Data System (ADS)

Gilmer, D. C.; Rueckes, T.; Cleveland, L.

2018-04-01

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

A low-voltage sense amplifier with two-stage operational amplifier clamping for flash memory

NASA Astrophysics Data System (ADS)

Guo, Jiarong

2017-04-01

A low-voltage sense amplifier with reference current generator utilizing two-stage operational amplifier clamp structure for flash memory is presented in this paper, capable of operating with minimum supply voltage at 1 V. A new reference current generation circuit composed of a reference cell and a two-stage operational amplifier clamping the drain pole of the reference cell is used to generate the reference current, which avoids the threshold limitation caused by current mirror transistor in the traditional sense amplifier. A novel reference voltage generation circuit using dummy bit-line structure without pull-down current is also adopted, which not only improves the sense window enhancing read precision but also saves power consumption. The sense amplifier was implemented in a flash realized in 90 nm flash technology. Experimental results show the access time is 14.7 ns with power supply of 1.2 V and slow corner at 125 °C. Project supported by the National Natural Science Fundation of China (No. 61376028).

Camera memory study for large space telescope. [charge coupled devices

NASA Technical Reports Server (NTRS)

Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

1975-01-01

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Motivation and Design of the Sirocco Storage System Version 1.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Curry, Matthew Leon; Ward, H. Lee; Danielson, Geoffrey Charles

Sirocco is a massively parallel, high performance storage system for the exascale era. It emphasizes client-to-client coordination, low server-side coupling, and free data movement to improve resilience and performance. Its architecture is inspired by peer-to-peer and victim- cache architectures. By leveraging these ideas, Sirocco natively supports several media types, including RAM, flash, disk, and archival storage, with automatic migration between levels. Sirocco also includes storage interfaces and support that are more advanced than typical block storage. Sirocco enables clients to efficiently use key-value storage or block-based storage with the same interface. It also provides several levels of transactional data updatesmore » within a single storage command, including full ACID-compliant updates. This transaction support extends to updating several objects within a single transaction. Further support is provided for con- currency control, enabling greater performance for workloads while providing safe concurrent modification. By pioneering these and other technologies and techniques in the storage system, Sirocco is poised to fulfill a need for a massively scalable, write-optimized storage system for exascale systems. This is version 1.0 of a document reflecting the current and planned state of Sirocco. Further versions of this document will be accessible at http://www.cs.sandia.gov/Scalable_IO/ sirocco .« less

Computer hardware for radiologists: Part 2

PubMed Central

Indrajit, IK; Alam, A

2010-01-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future. PMID:21423895

A Temporal Locality-Aware Page-Mapped Flash Translation Layer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Youngjae; Gupta, Aayush; Urgaonkar, Bhuvan

2013-01-01

The poor performance of random writes has been a cause of major concern which needs to be addressed to better utilize the potential of flash in enterprise-scale environments. We examine one of the important causes of this poor performance: the design of the flash translation layer (FTL) which performs the virtual-to-physical address translations and hides the erase-before-write characteristics of flash. We propose a complete paradigm shift in the design of the core FTL engine from the existing techniques with our Demand-Based Flash Translation Layer (DFTL) which selectively caches page- level address mappings. Our experimental evaluation using FlashSim with realistic enterprise-scalemore » workloads endorses the utility of DFTL in enterprise-scale storage systems by demonstrating: 1) improved performance, 2) reduced garbage collection overhead and 3) better overload behavior compared with hybrid FTL schemes which are the most popular implementation methods. For example, a predominantly random-write dominant I/O trace from an OLTP application running at a large financial institution shows a 78% improvement in average response time (due to a 3-fold reduction in operations of the garbage collector), compared with the hybrid FTL scheme. Even for the well-known read-dominant TPC-H benchmark, for which DFTL introduces additional overheads, we improve system response time by 56%. Moreover, interestingly, when write-back cache on DFTL-based SSD is enabled, DFTL even outperforms the page-based FTL scheme, improving their response time by 72% in Financial trace.« less

Room Temperature Memory for Few Photon Polarization Qubits

NASA Astrophysics Data System (ADS)

Kupchak, Connor; Mittiga, Thomas; Jordan, Bertus; Nazami, Mehdi; Nolleke, Christian; Figueroa, Eden

2014-05-01

We have developed a room temperature quantum memory device based on Electromagnetically Induced Transparency capable of reliably storing and retrieving polarization qubits on the few photon level. Our system is realized in a vapor of 87Rb atoms utilizing a Λ-type energy level scheme. We create a dual-rail storage scheme mediated by an intense control field to allow storage and retrieval of any arbitrary polarization state. Upon retrieval, we employ a filtering system to sufficiently remove the strong pump field, and subject retrieved light states to polarization tomography. To date, our system has produced signal-to-noise ratios near unity with a memory fidelity of >80 % using coherent state qubits containing four photons on average. Our results thus demonstrate the feasibility of room temperature systems for the storage of single-photon-level photonic qubits. Such room temperature systems will be attractive for future long distance quantum communication schemes.

Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

NASA Astrophysics Data System (ADS)

Briggs, Benjamin D.

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

SSD Market Overview

NASA Astrophysics Data System (ADS)

Wong, G.

The unparalleled cost and form factor advantages of NAND flash memory has driven 35 mm photographic film, floppy disks and one-inch hard drives to extinction. Due to its compelling price/performance characteristics, NAND Flash memory is now expanding its reach into the once-exclusive domain of hard disk drives and DRAM in the form of Solid State Drives (SSDs). Driven by the proliferation of thin and light mobile devices and the need for near-instantaneous accessing and sharing of content through the cloud, SSDs are expected to become a permanent fixture in the computing infrastructure.

Total Ionizing Dose Influence on the Single Event Effect Sensitivity in Samsung 8Gb NAND Flash Memories

NASA Astrophysics Data System (ADS)

Edmonds, Larry D.; Irom, Farokh; Allen, Gregory R.

2017-08-01

A recent model provides risk estimates for the deprogramming of initially programmed floating gates via prompt charge loss produced by an ionizing radiation environment. The environment can be a mixture of electrons, protons, and heavy ions. The model requires several input parameters. This paper extends the model to include TID effects in the control circuitry by including one additional parameter. Parameters intended to produce conservative risk estimates for the Samsung 8 Gb SLC NAND flash memory are given, subject to some qualifications.

Configurable test bed design for nanosats to qualify commercial and customized integrated circuits

NASA Astrophysics Data System (ADS)

Guareschi, W.; Azambuja, J.; Kastensmidt, F.; Reis, R.; Durao, O.; Schuch, N.; Dessbesel, G.

The use of small satellites has increased substantially in recent years due to the reduced cost of their development and launch, as well to the flexibility offered by commercial components. The test bed is a platform that allows components to be evaluated and tested in space. It is a flexible platform, which can be adjusted to a wide quantity of components and interfaces. This work proposes the design and implementation of a test bed suitable for test and evaluation of commercial circuits used in nanosatellites. The development of such a platform allows developers to reduce the efforts in the integration of components and therefore speed up the overall system development time. The proposed test bed is a configurable platform implemented using a Field Programmable Gate Array (FPGA) that controls the communication protocols and connections to the devices under test. The Flash-based ProASIC3E FPGA from Microsemi is used as a control system. This adaptive system enables the control of new payloads and softcores for test and validation in space. Thus, the integration can be easily performed through configuration parameters. It is intended for modularity. Each component connected to the test bed can have a specific interface programmed using a hardware description language (HDL). The data of each component is stored in embedded memories. Each component has its own memory space. The size of the allocated memory can be also configured. The data transfer priority can be set and packaging can be added to the logic, when needed. Communication with peripheral devices and with the Onboard Computer (OBC) is done through the pre-implemented protocols, such as I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface) and external memory control. In loco primary tests demonstrated the control system's functionality. The commercial ProASIC3E FPGA family is not space-flight qualified, but tests have been made under Total Ionizing Dose (TID) showing its robustness up to 25 kr- ds (Si). When considering proton and heavy ions, flash-based FPGAs provide immunity to configuration loss and low bit-flips susceptibility in flash memory. In this first version of the test bed two components are connected to the controller FPGA: a commercial magnetometer and a hardened test chip. The embedded FPGA implements a Single Event Effects (SEE) hardened microprocessor and few other soft-cores to be used in space. This test bed will be used in the NanoSatC-BR1, the first Brazilian Cubesat scheduled to be launched in mid-2013.

40 CFR 63.766 - Storage vessel standards.

Code of Federal Regulations, 2013 CFR

2013-07-01

... 40 Protection of Environment 11 2013-07-01 2013-07-01 false Storage vessel standards. 63.766... § 63.766 Storage vessel standards. (a) This section applies to each storage vessel with the potential... storage vessel with the potential for flash emissions (as defined in § 63.761) shall comply with one of...

40 CFR 63.766 - Storage vessel standards.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 40 Protection of Environment 10 2010-07-01 2010-07-01 false Storage vessel standards. 63.766... § 63.766 Storage vessel standards. (a) This section applies to each storage vessel with the potential... storage vessel with the potential for flash emissions (as defined in § 63.761) shall comply with one of...

40 CFR 63.766 - Storage vessel standards.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 40 Protection of Environment 10 2011-07-01 2011-07-01 false Storage vessel standards. 63.766... § 63.766 Storage vessel standards. (a) This section applies to each storage vessel with the potential... storage vessel with the potential for flash emissions (as defined in § 63.761) shall comply with one of...

Fault-tolerant NAND-flash memory module for next-generation scientific instruments

NASA Astrophysics Data System (ADS)

Lange, Tobias; Michel, Holger; Fiethe, Björn; Michalik, Harald; Walter, Dietmar

2015-10-01

Remote sensing instruments on today's space missions deliver a high amount of data which is typically evaluated on ground. Especially for deep space missions the telemetry downlink is very limited which creates the need for the scientific evaluation and thereby a reduction of data volume already on-board the spacecraft. A demanding example is the Polarimetric and Helioseismic Imager (PHI) instrument on Solar Orbiter. To enable on-board offline processing for data reduction, the instrument has to be equipped with a high capacity memory module. The module is based on non-volatile NAND-Flash technology, which requires more advanced operation than volatile DRAM. Unlike classical mass memories, the module is integrated into the instrument and allows readback of data for processing. The architecture and safe operation of such kind of memory module is described in the following paper.

Implications of the Declarative/Procedural Model for Improving Second Language Learning: The Role of Memory Enhancement Techniques

ERIC Educational Resources Information Center

Ullman, Michael T.; Lovelett, Jarrett T.

2018-01-01

The declarative/procedural (DP) model posits that the learning, storage, and use of language critically depend on two learning and memory systems in the brain: declarative memory and procedural memory. Thus, on the basis of independent research on the memory systems, the model can generate specific and often novel predictions for language. Till…

Short- and long-term memory contributions to immediate serial recognition: evidence from serial position effects.

PubMed

Purser, Harry; Jarrold, Christopher

2010-04-01

A long-standing body of research supports the existence of separable short- and long-term memory systems, relying on phonological and semantic codes, respectively. The aim of the current study was to measure the contribution of long-term knowledge to short-term memory performance by looking for evidence of phonologically and semantically coded storage within a short-term recognition task, among developmental samples. Each experimental trial presented 4-item lists. In Experiment 1 typically developing children aged 5 to 6 years old showed evidence of phonologically coded storage across all 4 serial positions, but evidence of semantically coded storage at Serial Positions 1 and 2. In a further experiment, a group of individuals with Down syndrome was investigated as a test case that might be expected to use semantic coding to support short-term storage, but these participants showed no evidence of semantically coded storage and evidenced phonologically coded storage only at Serial Position 4, suggesting that individuals with Down syndrome have a verbal short-term memory capacity of 1 item. Our results suggest that previous evidence of semantic effects on "short-term memory performance" does not reflect semantic coding in short-term memory itself, and provide an experimental method for researchers wishing to take a relatively pure measure of verbal short-term memory capacity, in cases where rehearsal is unlikely.

PIMS: Memristor-Based Processing-in-Memory-and-Storage.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cook, Jeanine

Continued progress in computing has augmented the quest for higher performance with a new quest for higher energy efficiency. This has led to the re-emergence of Processing-In-Memory (PIM) ar- chitectures that offer higher density and performance with some boost in energy efficiency. Past PIM work either integrated a standard CPU with a conventional DRAM to improve the CPU- memory link, or used a bit-level processor with Single Instruction Multiple Data (SIMD) control, but neither matched the energy consumption of the memory to the computation. We originally proposed to develop a new architecture derived from PIM that more effectively addressed energymore » efficiency for high performance scientific, data analytics, and neuromorphic applications. We also originally planned to implement a von Neumann architecture with arithmetic/logic units (ALUs) that matched the power consumption of an advanced storage array to maximize energy efficiency. Implementing this architecture in storage was our original idea, since by augmenting storage (in- stead of memory), the system could address both in-memory computation and applications that accessed larger data sets directly from storage, hence Processing-in-Memory-and-Storage (PIMS). However, as our research matured, we discovered several things that changed our original direc- tion, the most important being that a PIM that implements a standard von Neumann-type archi- tecture results in significant energy efficiency improvement, but only about a O(10) performance improvement. In addition to this, the emergence of new memory technologies moved us to propos- ing a non-von Neumann architecture, called Superstrider, implemented not in storage, but in a new DRAM technology called High Bandwidth Memory (HBM). HBM is a stacked DRAM tech- nology that includes a logic layer where an architecture such as Superstrider could potentially be implemented.« less

Tracking the fear engram: the lateral amygdala is an essential locus of fear memory storage.

PubMed

Schafe, Glenn E; Doyère, Valérie; LeDoux, Joseph E

2005-10-26

Although it is believed that different types of memories are localized in discreet regions of the brain, concrete experimental evidence of the existence of such engrams is often elusive. Despite being one of the best characterized memory systems of the brain, the question of where fear memories are localized in the brain remains a hotly debated issue. Here, we combine site-specific behavioral pharmacology with multisite electrophysiological recording techniques to show that the lateral nucleus of the amygdala, long thought to be critical for the acquisition of fear memories, is also an essential locus of fear memory storage.

Neural network based feed-forward high density associative memory

NASA Technical Reports Server (NTRS)

Daud, T.; Moopenn, A.; Lamb, J. L.; Ramesham, R.; Thakoor, A. P.

1987-01-01

A novel thin film approach to neural-network-based high-density associative memory is described. The information is stored locally in a memory matrix of passive, nonvolatile, binary connection elements with a potential to achieve a storage density of 10 to the 9th bits/sq cm. Microswitches based on memory switching in thin film hydrogenated amorphous silicon, and alternatively in manganese oxide, have been used as programmable read-only memory elements. Low-energy switching has been ascertained in both these materials. Fabrication and testing of memory matrix is described. High-speed associative recall approaching 10 to the 7th bits/sec and high storage capacity in such a connection matrix memory system is also described.

Patterning optimization for 55nm design rule DRAM/flash memory using production-ready customized illuminations

NASA Astrophysics Data System (ADS)

Chen, Ting; Van Den Broeke, Doug; Hsu, Stephen; Hsu, Michael; Park, Sangbong; Berger, Gabriel; Coskun, Tamer; de Vocht, Joep; Chen, Fung; Socha, Robert; Park, JungChul; Gronlund, Keith

2005-11-01

Illumination optimization, often combined with optical proximity corrections (OPC) to the mask, is becoming one of the critical components for a production-worthy lithography process for 55nm-node DRAM/Flash memory devices and beyond. At low-k1, e.g. k1<0.31, both resolution and imaging contrast can be severely limited by the current imaging tools while using the standard illumination sources. Illumination optimization is a process where the source shape is varied, in both profile and intensity distribution, to achieve enhancement in the final image contrast as compared to using the non-optimized sources. The optimization can be done efficiently for repetitive patterns such as DRAM/Flash memory cores. However, illumination optimization often produces source shapes that are "free-form" like and they can be too complex to be directly applicable for production and lack the necessary radial and annular symmetries desirable for the diffractive optical element (DOE) based illumination systems in today's leading lithography tools. As a result, post-optimization rendering and verification of the optimized source shape are often necessary to meet the production-ready or manufacturability requirements and ensure optimal performance gains. In this work, we describe our approach to the illumination optimization for k1<0.31 DRAM/Flash memory patterns, using an ASML XT:1400i at NA 0.93, where the all necessary manufacturability requirements are fully accounted for during the optimization. The imaging contrast in the resist is optimized in a reduced solution space constrained by the manufacturability requirements, which include minimum distance between poles, minimum opening pole angles, minimum ring width and minimum source filling factor in the sigma space. For additional performance gains, the intensity within the optimized source can vary in a gray-tone fashion (eight shades used in this work). Although this new optimization approach can sometimes produce closely spaced solutions as gauged by the NILS based metrics, we show that the optimal and production-ready source shape solution can be easily determined by comparing the best solutions to the "free-form" solution and more importantly, by their respective imaging fidelity and process latitude ranking. Imaging fidelity and process latitude simulations are performed to analyze the impact and sensitivity of the manufacturability requirements on pattern specific illumination optimizations using ASML XT:1400i and other latest imaging systems. Mask model based OPC (MOPC) is applied and optimized sequentially to ensure that the CD uniformity requirements are met.

Working memory is not fixed-capacity: More active storage capacity for real-world objects than for simple stimuli

PubMed Central

Brady, Timothy F.; Störmer, Viola S.; Alvarez, George A.

2016-01-01

Visual working memory is the cognitive system that holds visual information active to make it resistant to interference from new perceptual input. Information about simple stimuli—colors and orientations—is encoded into working memory rapidly: In under 100 ms, working memory ‟fills up,” revealing a stark capacity limit. However, for real-world objects, the same behavioral limits do not hold: With increasing encoding time, people store more real-world objects and do so with more detail. This boost in performance for real-world objects is generally assumed to reflect the use of a separate episodic long-term memory system, rather than working memory. Here we show that this behavioral increase in capacity with real-world objects is not solely due to the use of separate episodic long-term memory systems. In particular, we show that this increase is a result of active storage in working memory, as shown by directly measuring neural activity during the delay period of a working memory task using EEG. These data challenge fixed-capacity working memory models and demonstrate that working memory and its capacity limitations are dependent upon our existing knowledge. PMID:27325767

Working memory is not fixed-capacity: More active storage capacity for real-world objects than for simple stimuli.

PubMed

Brady, Timothy F; Störmer, Viola S; Alvarez, George A

2016-07-05

Visual working memory is the cognitive system that holds visual information active to make it resistant to interference from new perceptual input. Information about simple stimuli-colors and orientations-is encoded into working memory rapidly: In under 100 ms, working memory ‟fills up," revealing a stark capacity limit. However, for real-world objects, the same behavioral limits do not hold: With increasing encoding time, people store more real-world objects and do so with more detail. This boost in performance for real-world objects is generally assumed to reflect the use of a separate episodic long-term memory system, rather than working memory. Here we show that this behavioral increase in capacity with real-world objects is not solely due to the use of separate episodic long-term memory systems. In particular, we show that this increase is a result of active storage in working memory, as shown by directly measuring neural activity during the delay period of a working memory task using EEG. These data challenge fixed-capacity working memory models and demonstrate that working memory and its capacity limitations are dependent upon our existing knowledge.

Design rules for phase-change materials in data storage applications.

PubMed

Lencer, Dominic; Salinga, Martin; Wuttig, Matthias

2011-05-10

Phase-change materials can rapidly and reversibly be switched between an amorphous and a crystalline phase. Since both phases are characterized by very different optical and electrical properties, these materials can be employed for rewritable optical and electrical data storage. Hence, there are considerable efforts to identify suitable materials, and to optimize them with respect to specific applications. Design rules that can explain why the materials identified so far enable phase-change based devices would hence be very beneficial. This article describes materials that have been successfully employed and dicusses common features regarding both typical structures and bonding mechanisms. It is shown that typical structural motifs and electronic properties can be found in the crystalline state that are indicative for resonant bonding, from which the employed contrast originates. The occurence of resonance is linked to the composition, thus providing a design rule for phase-change materials. This understanding helps to unravel characteristic properties such as electrical and thermal conductivity which are discussed in the subsequent section. Then, turning to the transition kinetics between the phases, the current understanding and modeling of the processes of amorphization and crystallization are discussed. Finally, present approaches for improved high-capacity optical discs and fast non-volatile electrical memories, that hold the potential to succeed present-day's Flash memory, are presented. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Development of a Handbook for Educators: Addressing Working Memory Capacity in Elementary Students

ERIC Educational Resources Information Center

Fernandez, Julie Marie

2013-01-01

Working Memory (WM) refers to a brain system that provides temporary storage and manipulation of the information necessary for complex cognitive tasks such as language comprehension, learning, and reasoning. WM also requires the simultaneous storage and processing of information. WM is directly related to academic performance in the classroom.…

Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation

NASA Astrophysics Data System (ADS)

Kim, Do-Bin; Kwon, Dae Woong; Kim, Seunghyun; Lee, Sang-Ho; Park, Byung-Gook

2018-02-01

To obtain high channel boosting potential and reduce a program disturbance in channel stacked NAND flash memory with layer selection by multilevel (LSM) operation, a new program scheme using boosted common source line (CSL) is proposed. The proposed scheme can be achieved by applying proper bias to each layer through its own CSL. Technology computer-aided design (TCAD) simulations are performed to verify the validity of the new method in LSM. Through TCAD simulation, it is revealed that the program disturbance characteristics is effectively improved by the proposed scheme.

Safeguards Technology Factsheet - Unattended Dual Current Monitor (UDCM)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Newell, Matthew R.

2016-04-13

The UDCM is a low-current measurement device designed to record sub-nano-amp to micro-amp currents from radiation detectors. The UDCM is a two-channel device that incorporates a Commercial-Off-The-Shelf (COTS) processor enabling both serial over USB as well as Ethernet communications. The instrument includes microSD and USB flash memory for data storage as well as a programmable High Voltage (HV) power supply for detector bias. The UDCM is packaged in the same enclosure, employs the same processor and has a similar user interface as the UMSR. A serial over USB communication line to the UDCM allows the use of existing versions ofmore » MIC software, while the Ethernet port is compatible with the new IAEA RAINSTORM communication protocol.« less

Foundry Technologies Focused on Environmental and Ecological Applications

NASA Astrophysics Data System (ADS)

Roizin, Ya.; Lisiansky, M.; Pikhay, E.

Solutions allowing fabrication of remote control systems with integrated sensors (motes) were introduced as a part of CMOS foundry production platform and verified on silicon. The integrated features include sensors employing principles previously verified in the development of ultra-low power consuming non-volatile memories (C-Flash, MRAM) and components allowing low-power energy harvesting (low voltage rectifiers, high -voltage solar cells). The developed systems are discussed with emphasis on their environmental and security applications.

Modular nonvolatile solid state recorder (MONSSTR) update

NASA Astrophysics Data System (ADS)

Klang, Mark R.; Small, Martin B.; Beams, Tom

2001-12-01

Solid state recorders have begun replacing traditional tape recorders in fulfilling the requirement to record images on airborne platforms. With the advances in electro-optical, IR, SAR, Multi and Hyper-spectral sensors and video recording requirements, solid state recorders have become the recorder of choice. Solid state recorders provide the additional storage, higher sustained bandwidth, less power, less weight and smaller footprint to meet the current and future recording requirements. CALCULEX, Inc., manufactures a non-volatile flash memory solid state recorder called the MONSSTR (Modular Non-volatile Solid State Recorder). MONSSTR is being used to record images from many different digital sensors on high performance aircraft such as the RF- 4, F-16 and the Royal Air Force Tornado. MONSSTR, with its internal multiplexer, is also used to record instrumentation data. This includes multiple streams of PCM and multiple channels of 1553 data. Instrumentation data is being recorded by MONSSTR systems in a range of platforms including F-22, F-15, F-16, Comanche Helicopter and US Navy torpedos. MONSSTR can also be used as a cockpit video recorder. This paper will provide an update of the MONSSTR.

Optical memory system technology. Citations from the International Aerospace Abstracts data base

NASA Technical Reports Server (NTRS)

Zollars, G. F.

1980-01-01

Approximately 213 citations from the international literature which concern the development of the optical data storage system technology are presented. Topics covered include holographic computer storage devices, crystal, magneto, and electro-optics, imaging techniques, in addition to optical data processing and storage.

Addressable configurations of DNA nanostructures for rewritable memory

PubMed Central

Levchenko, Oksana; Patel, Dhruv S.; MacIsaac, Molly

2017-01-01

Abstract DNA serves as nature's information storage molecule, and has been the primary focus of engineered systems for biological computing and data storage. Here we combine recent efforts in DNA self-assembly and toehold-mediated strand displacement to develop a rewritable multi-bit DNA memory system. The system operates by encoding information in distinct and reversible conformations of a DNA nanoswitch and decoding by gel electrophoresis. We demonstrate a 5-bit system capable of writing, erasing, and rewriting binary representations of alphanumeric symbols, as well as compatibility with ‘OR’ and ‘AND’ logic operations. Our strategy is simple to implement, requiring only a single mixing step at room temperature for each operation and standard gel electrophoresis to read the data. We envision such systems could find use in covert product labeling and barcoding, as well as secure messaging and authentication when combined with previously developed encryption strategies. Ultimately, this type of memory has exciting potential in biomedical sciences as data storage can be coupled to sensing of biological molecules. PMID:28977499

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Levels of processing and language modality specificity in working memory.

PubMed

Rudner, Mary; Karlsson, Thomas; Gunnarsson, Johan; Rönnberg, Jerker

2013-03-01

Neural networks underpinning working memory demonstrate sign language specific components possibly related to differences in temporary storage mechanisms. A processing approach to memory systems suggests that the organisation of memory storage is related to type of memory processing as well. In the present study, we investigated for the first time semantic, phonological and orthographic processing in working memory for sign- and speech-based language. During fMRI we administered a picture-based 2-back working memory task with Semantic, Phonological, Orthographic and Baseline conditions to 11 deaf signers and 20 hearing non-signers. Behavioural data showed poorer and slower performance for both groups in Phonological and Orthographic conditions than in the Semantic condition, in line with depth-of-processing theory. An exclusive masking procedure revealed distinct sign-specific neural networks supporting working memory components at all three levels of processing. The overall pattern of sign-specific activations may reflect a relative intermodality difference in the relationship between phonology and semantics influencing working memory storage and processing. Copyright © 2012 Elsevier Ltd. All rights reserved.

Optimal read/write memory system components

NASA Technical Reports Server (NTRS)

Kozma, A.; Vander Lugt, A.; Klinger, D.

1972-01-01

Two holographic data storage and display systems, voltage gradient ionization system, and linear strain manipulation system are discussed in terms of creating fast, high bit density, storage device. Components described include: novel mounting fixture for photoplastic arrays; corona discharge device; and block data composer.

Numerical model of a single nanocrystal devoted to the study of disordered nanocrystal floating gates of new flash memories

NASA Astrophysics Data System (ADS)

Leroy, Yann; Armeanu, Dumitru; Cordan, Anne-Sophie

2011-05-01

The improvement of our model concerning a single nanocrystal that belongs to a nanocrystal floating gate of a flash memory is presented. In order to extend the gate voltage range applicability of the model, the 3D continuum of states of either metallic or semiconducting electrodes is discretized into 2D subbands. Such an approach gives precise information about the mechanisms behind the charging or release processes of the nanocrystal. Then, the self-energy and screening effects of an electron within the nanocrystal are evaluated and introduced in the model. This enables a better determination of the operating point of the nanocrystal memory. The impact of those improvements on the charging or release time of the nanocrystal is discussed.

INVESTIGATION OF INORGANIC PHOTOTROPIC MATERIALS AS A BI-OPTIC ELEMENT APPLICABLE IN HIGH DENSITY STORAGE COMPUTER MEMORIES

DTIC Science & Technology

A general valuation of the various types of phototropic (i.e., reversible, light induced, color producing) phenomenon is given regarding the...application of phototropic material to bioptic high density storage media for compu er memories. The inorganic ’’F’’ center type phototropic systems were

Chaining for Flexible and High-Performance Key-Value Systems

DTIC Science & Technology

2012-09-01

store that is fault tolerant achieves high performance and availability, and offers strong data consistency? We present a new replication protocol...effective high performance data access and analytics, many sites use simpler data model “ NoSQL ” systems. ese systems store and retrieve data only by...DRAM, Flash, and disk-based storage; can act as an unreliable cache or a durable store ; and can offer strong or weak data consistency. e value of

Investigation of fast initialization of spacecraft bubble memory systems

NASA Technical Reports Server (NTRS)

Looney, K. T.; Nichols, C. D.; Hayes, P. J.

1984-01-01

Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

Method for refreshing a non-volatile memory

DOEpatents

Riekels, James E.; Schlesinger, Samuel

2008-11-04

A non-volatile memory and a method of refreshing a memory are described. The method includes allowing an external system to control refreshing operations within the memory. The memory may generate a refresh request signal and transmit the refresh request signal to the external system. When the external system finds an available time to process the refresh request, the external system acknowledges the refresh request and transmits a refresh acknowledge signal to the memory. The memory may also comprise a page register for reading and rewriting a data state back to the memory. The page register may comprise latches in lieu of supplemental non-volatile storage elements, thereby conserving real estate within the memory.

Radiation Hardened Electronics Destined For Severe Nuclear Reactor Environments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holbert, Keith E.; Clark, Lawrence T.

Post nuclear accident conditions represent a harsh environment for electronics. The full station blackout experience at Fukushima shows the necessity for emergency sensing capabilities in a radiation-enhanced environment. This NEET (Nuclear Energy Enabling Technologies) research project developed radiation hardened by design (RHBD) electronics using commercially available technology that employs commercial off-the-shelf (COTS) devices and present generation circuit fabrication techniques to improve the total ionizing dose (TID) hardness of electronics. Such technology not only has applicability to severe accident conditions but also to facilities throughout the nuclear fuel cycle in which radiation tolerance is required. For example, with TID tolerance tomore » megarads of dose, electronics could be deployed for long-term monitoring, inspection and decontamination missions. The present work has taken a two-pronged approach, specifically, development of both board and application-specific integrated circuit (ASIC) level RHBD techniques. The former path has focused on TID testing of representative microcontroller ICs with embedded flash (eFlash) memory, as well as standalone flash devices that utilize the same fabrication technologies. The standalone flash devices are less complicated, allowing better understanding of the TID response of the crucial circuits. Our TID experiments utilize biased components that are in-situ tested, and in full operation during irradiation. A potential pitfall in the qualification of memory circuits is the lack of rigorous testing of the possible memory states. For this reason, we employ test patterns that include all ones, all zeros, a checkerboard of zeros and ones, an inverse checkerboard, and random data. With experimental evidence of improved radiation response for unbiased versus biased conditions, a demonstration-level board using the COTS devices was constructed. Through a combination of redundancy and power gating, the demonstration board exhibits radiation resilience to over 200 krad. Furthermore, our ASIC microprocessor using RHBD techniques was shown to be fully functional after an exposure of 2.5 Mrad whereas the COTS microcontroller units failed catastrophically at <100 krad. The methods developed in this work can facilitate the long-term viability of radiation-hard robotic systems, thereby avoiding obsolescence issues. As a case in point, the nuclear industry with its low purchasing power does not drive the semiconductor industry strategic plans, and the rapid advancements in electronics technology can leave legacy systems stranded.« less

Coherence time of over a second in a telecom-compatible quantum memory storage material

NASA Astrophysics Data System (ADS)

Rančić, Miloš; Hedges, Morgan P.; Ahlefeldt, Rose L.; Sellars, Matthew J.

2018-01-01

Quantum memories for light will be essential elements in future long-range quantum communication networks. These memories operate by reversibly mapping the quantum state of light onto the quantum transitions of a material system. For networks, the quantum coherence times of these transitions must be long compared to the network transmission times, approximately 100 ms for a global communication network. Due to a lack of a suitable storage material, a quantum memory that operates in the 1,550 nm optical fibre communication band with a storage time greater than 1 μs has not been demonstrated. Here we describe the spin dynamics of 167Er3+: Y2SiO5 in a high magnetic field and demonstrate that this material has the characteristics for a practical quantum memory in the 1,550 nm communication band. We observe a hyperfine coherence time of 1.3 s. We also demonstrate efficient spin pumping of the entire ensemble into a single hyperfine state, a requirement for broadband spin-wave storage. With an absorption of 70 dB cm-1 at 1,538 nm and Λ transitions enabling spin-wave storage, this material is the first candidate identified for an efficient, broadband quantum memory at telecommunication wavelengths.

Technology for organization of the onboard system for processing and storage of ERS data for ultrasmall spacecraft

NASA Astrophysics Data System (ADS)

Strotov, Valery V.; Taganov, Alexander I.; Konkin, Yuriy V.; Kolesenkov, Aleksandr N.

2017-10-01

Task of processing and analysis of obtained Earth remote sensing data on ultra-small spacecraft board is actual taking into consideration significant expenditures of energy for data transfer and low productivity of computers. Thereby, there is an issue of effective and reliable storage of the general information flow obtained from onboard systems of information collection, including Earth remote sensing data, into a specialized data base. The paper has considered peculiarities of database management system operation with the multilevel memory structure. For storage of data in data base the format has been developed that describes a data base physical structure which contains required parameters for information loading. Such structure allows reducing a memory size occupied by data base because it is not necessary to store values of keys separately. The paper has shown architecture of the relational database management system oriented into embedment into the onboard ultra-small spacecraft software. Data base for storage of different information, including Earth remote sensing data, can be developed by means of such database management system for its following processing. Suggested database management system architecture has low requirements to power of the computer systems and memory resources on the ultra-small spacecraft board. Data integrity is ensured under input and change of the structured information.

Active Flash: Performance-Energy Tradeoffs for Out-of-Core Processing on Non-Volatile Memory Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S

2012-01-01

In this abstract, we study the performance and energy tradeoffs involved in migrating data analysis into the flash device, a process we refer to as Active Flash. The Active Flash paradigm is similar to 'active disks', which has received considerable attention. Active Flash allows us to move processing closer to data, thereby minimizing data movement costs and reducing power consumption. It enables true out-of-core computation. The conventional definition of out-of-core solvers refers to an approach to process data that is too large to fit in the main memory and, consequently, requires access to disk. However, in Active Flash, processing outsidemore » the host CPU literally frees the core and achieves real 'out-of-core' analysis. Moving analysis to data has long been desirable, not just at this level, but at all levels of the system hierarchy. However, this requires a detailed study on the tradeoffs involved in achieving analysis turnaround under an acceptable energy envelope. To this end, we first need to evaluate if there is enough computing power on the flash device to warrant such an exploration. Flash processors require decent computing power to run the internal logic pertaining to the Flash Translation Layer (FTL), which is responsible for operations such as address translation, garbage collection (GC) and wear-leveling. Modern SSDs are composed of multiple packages and several flash chips within a package. The packages are connected using multiple I/O channels to offer high I/O bandwidth. SSD computing power is also expected to be high enough to exploit such inherent internal parallelism within the drive to increase the bandwidth and to handle fast I/O requests. More recently, SSD devices are being equipped with powerful processing units and are even embedded with multicore CPUs (e.g. ARM Cortex-A9 embedded processor is advertised to reach 2GHz frequency and deliver 5000 DMIPS; OCZ RevoDrive X2 SSD has 4 SandForce controllers, each with 780MHz max frequency Tensilica core). Efforts that take advantage of the available computing cycles on the processors on SSDs to run auxiliary tasks other than actual I/O requests are beginning to emerge. Kim et al. investigate database scan operations in the context of processing on the SSDs, and propose dedicated hardware logic to speed up scans. Also, cluster architectures have been explored, which consist of low-power embedded CPUs coupled with small local flash to achieve fast, parallel access to data. Processor utilization on SSD is highly dependent on workloads and, therefore, they can be idle during periods with no I/O accesses. We propose to use the available processing capability on the SSD to run tasks that can be offloaded from the host. This paper makes the following contributions: (1) We have investigated Active Flash and its potential to optimize the total energy cost, including power consumption on the host and the flash device; (2) We have developed analytical models to analyze the performance-energy tradeoffs for Active Flash, by treating the SSD as a blackbox, this is particularly valuable due to the proprietary nature of the SSD internal hardware; and (3) We have enhanced a well-known SSD simulator (from MSR) to implement 'on-the-fly' data compression using Active Flash. Our results provide a window into striking a balance between energy consumption and application performance.« less

Research on Multi - Person Parallel Modeling Method Based on Integrated Model Persistent Storage

NASA Astrophysics Data System (ADS)

Qu, MingCheng; Wu, XiangHu; Tao, YongChao; Liu, Ying

2018-03-01

This paper mainly studies the multi-person parallel modeling method based on the integrated model persistence storage. The integrated model refers to a set of MDDT modeling graphics system, which can carry out multi-angle, multi-level and multi-stage description of aerospace general embedded software. Persistent storage refers to converting the data model in memory into a storage model and converting the storage model into a data model in memory, where the data model refers to the object model and the storage model is a binary stream. And multi-person parallel modeling refers to the need for multi-person collaboration, the role of separation, and even real-time remote synchronization modeling.

Photoelectrochemical information storage using an azobenzene derivative

NASA Astrophysics Data System (ADS)

Liu, Z. F.; Hashimoto, K.; Fujishima, A.

1990-10-01

HIGH-DENSITY information storage is becoming an increasingly important technological objective. The 'heat-mode' storage techniques (in which only the thermal energy of laser light is used in the recording process and hence information usually stored as a physical change of the storage media) that are used in current optical memories are limited by the diffraction properties of light1, and the alternative 'photon-mode' (in which information is stored as a photon-induced chemical change of the storage media) has attracted attention recently for high-density storage. The most promising candidates for realizing this mode seem to be photochro-ism and photochemical hole burning; but these have some intrinsic drawbacks1,2. Here we present a novel 'photon-mode' technique that uses the photoelectrochemical properties of a Langmuir-Blodgett film of an azobenzene derivative. The system can be interconverted photochemically or electrochemically between three chemical states, and this three-state system is shown to provide a potential storage process that allows for ultra-high storage density, multi-function memory and non-destructive information readout.

Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory

NASA Astrophysics Data System (ADS)

Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming

2017-08-01

The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed.

Portable Electromyograph

NASA Technical Reports Server (NTRS)

De Luca, Gianluca; De Luca, Carlo J.; Bergman, Per

2004-01-01

A portable electronic apparatus records electromyographic (EMG) signals in as many as 16 channels at a sampling rate of 1,024 Hz in each channel. The apparatus (see figure) includes 16 differential EMG electrodes (each electrode corresponding to one channel) with cables and attachment hardware, reference electrodes, an input/output-and-power-adapter unit, a 16-bit analog-to-digital converter, and a hand-held computer that contains a removable 256-MB flash memory card. When all 16 EMG electrodes are in use, full-bandwidth data can be recorded in each channel for as long as 8 hours. The apparatus is powered by a battery and is small enough that it can be carried in a waist pouch. The computer is equipped with a small screen that can be used to display the incoming signals on each channel. Amplitude and time adjustments of this display can be made easily by use of touch buttons on the screen. The user can also set up a data-acquisition schedule to conform to experimental protocols or to manage battery energy and memory efficiently. Once the EMG data have been recorded, the flash memory card is removed from the EMG apparatus and placed in a flash-memory- card-reading external drive unit connected to a personal computer (PC). The PC can then read the data recorded in the 16 channels. Preferably, before further analysis, the data should be stored in the hard drive of the PC. The data files are opened and viewed on the PC by use of special- purpose software. The software for operation of the apparatus resides in a random-access memory (RAM), with backup power supplied by a small internal lithium cell. A backup copy of this software resides on the flash memory card. In the event of loss of both main and backup battery power and consequent loss of this software, the backup copy can be used to restore the RAM copy after power has been restored. Accessories for this device are also available. These include goniometers, accelerometers, foot switches, and force gauges.

Night-day-night sleep-wakefulness monitoring by ambulatory integrated circuit memories.

PubMed

Yamamoto, M; Nakao, M; Katayama, N; Waku, M; Suzuki, K; Irokawa, K; Abe, M; Ueno, T

1999-04-01

A medium-sized portable digital recorder with fully integrated circuit (IC) memories for sleep monitoring has been developed. It has five amplifiers for EEG, EMG, EOG, ECG, and a signal of body acceleration or respiration sound, four event markers, an 8 ch A/D converter, a digital signal processor (DSP), 192 Mbytes IC flash memories, and batteries. The whole system weighs 1200 g including batteries and is put into a small bag worn on the subject's waist or carried in their hand. The sampling rate for each input channel is programmable through the DSP. This apparatus is valuable for continuously monitoring the states of sleep-wakefulness over 24 h, making a night-day-night recording possible in a hospital, home, or car.

Feasibility study of current pulse induced 2-bit/4-state multilevel programming in phase-change memory

NASA Astrophysics Data System (ADS)

Liu, Yan; Fan, Xi; Chen, Houpeng; Wang, Yueqing; Liu, Bo; Song, Zhitang; Feng, Songlin

2017-08-01

In this brief, multilevel data storage for phase-change memory (PCM) has attracted more attention in the memory market to implement high capacity memory system and reduce cost-per-bit. In this work, we present a universal programing method of SET stair-case current pulse in PCM cells, which can exploit the optimum programing scheme to achieve 2-bit/ 4state resistance-level with equal logarithm interval. SET stair-case waveform can be optimized by TCAD real time simulation to realize multilevel data storage efficiently in an arbitrary phase change material. Experimental results from 1 k-bit PCM test-chip have validated the proposed multilevel programing scheme. This multilevel programming scheme has improved the information storage density, robustness of resistance-level, energy efficient and avoiding process complexity.

76 FR 2681 - Amended Environmental Impact Statement Filing System Guidance for Implementing 40 CFR 1506.9 and...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-14

...., compact discs (CDs), USB flash drives, or memory cards. Please note that if a Federal agency prepares an... of the NOA in the Federal Register. If a calculated time period would end on a non- working day, the assigned time period will be the next working day (i.e., time periods will not end on weekends or Federal...

Research and Development of Collaborative Environments for Command and Control

DTIC Science & Technology

2011-05-01

at any state of building. The viewer tool presents the designed model with 360-degree perspective views even after regeneration of the design, which...and it shows the following prompt. GUM > APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED...11 First initialize the microSD card by typing GUM > mmcinit Then erase the old Linux kernel and the root file system on the flash memory

Solar-Powered Desalination: A Modelling and Experimental Study

NASA Astrophysics Data System (ADS)

Leblanc, Jimmy; Andrews, John

2007-10-01

Water shortage is becoming one of the major problems worldwide. As such, desalination technologies have been implemented to meet growing demands for fresh water. Among the desalination technologies, thermal desalination, including multi stage flash (MSF) and multi effect evaporation (MEE), is the current leading desalination process. Reverse osmosis (RO) is also being increasingly used. Despite technological improvements, thermal desalination and reverse osmosis continue to be intensive fossil-fuel consumers and contribute to increased levels of greenhouse gases. As energy costs rise, thermal desalination by solar energy and/or low cost waste heat is likely to become increasingly attractive. As part of a project investigating the productive use of saline land and the development of sustainable desalination systems, the feasibility of producing potable water from seawater or brackish water using desalination systems powered by renewable energy in the form of low-temperature solar-thermal sources has been studied. A salinity-gradient solar pond and an evacuated tube solar collector system have been used as heat sources. Solar ponds combine solar energy collection with long-term storage and can provide reliable thermal energy at temperature ranges from 50 to 90 °C. A visual basic computer model of the different multi-stage flash desalination processes coupled with a salinity-gradient solar pond was developed to determine which process is preferable in regards to performance and greenhouse impact. The governing mathematical equations are derived from mass balances, heat energy balances, and heat transfer characteristics. Using the results from the modelling, a small-scale solar-powered desalination system, capable of producing up to 500 litres of fresh water per day, was designed and manufactured. This single-stage flash system consists of two main units: the heat supply and storage system and the flash desalination unit. Two different condenser heat exchanger materials were investigated: copper-nickel and a commercially available plastic. The modelling and design of a three effects MEE system is also discussed. The effects of the important design and operating parameters (recovery ratio, thermal energy, parasitic electrical energy, distillate production and solar collection area) controlling the cost of fresh water determined both from the computer simulation and experimental results are presented and analysed in this paper. Future work in the overall research program is also outlined.

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets of NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Kim, Hak; Phan, Anthony; Seidleck, Christina; LaBel, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found the single-event upset (SEU) cross section varied inversely with fluence. The SEU cross section decreased with increasing fluence. We attribute the effect to the variable upset sensitivities of the memory cells. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, heavy ion irradiation of devices with variable upset sensitivity distribution using typical fluence levels may underestimate the cross section and on-orbit event rate.

Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

NASA Technical Reports Server (NTRS)

Swift, G.

2002-01-01

JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

Endurance degradation and lifetime model of p-channel floating gate flash memory device with 2T structure

NASA Astrophysics Data System (ADS)

Wei, Jiaxing; Liu, Siyang; Liu, Xiaoqiang; Sun, Weifeng; Liu, Yuwei; Liu, Xiaohong; Hou, Bo

2017-08-01

The endurance degradation mechanisms of p-channel floating gate flash memory device with two-transistor (2T) structure are investigated in detail in this work. With the help of charge pumping (CP) measurements and Sentaurus TCAD simulations, the damages in the drain overlap region along the tunnel oxide interface caused by band-to-band (BTB) tunneling programming and the damages in the channel region resulted from Fowler-Nordheim (FN) tunneling erasure are verified respectively. Furthermore, the lifetime model of endurance characteristic is extracted, which can extrapolate the endurance degradation tendency and predict the lifetime of the device.

A 1-Gigabit Memory System on a multi-Chip Module for Space Applications

NASA Technical Reports Server (NTRS)

Louie, Marianne E.; Topliffe, Douglas A.; Alkalai, Leon

1996-01-01

Current spaceborne applications desire compact, low weight, and high capacity data storage systems along with the additional requirement of radiation tolerance. This paper discusses a memory system on a multi-chip module (MCM) that is designed for space applications.

Installation package for Hyde Memorial Observatory, Lincoln, Nebraska

NASA Technical Reports Server (NTRS)

1978-01-01

Installation information for a solar heating system installed in Hyde Memorial Observatory at Lincoln, Nebraska is presented. This package included a system operation and maintenance manual, hardware brochures, schematics, system operating modes, and drawings. This prototype solar heating system consisted of the following subsystems: solar collector, control, and storage.

Laser addressed holographic memory system

NASA Technical Reports Server (NTRS)

Gange, R. A.; Wagle, E. M.; Steinmetz, C. C.

1973-01-01

Holographic recall and storage system uses red-lipid microcrystalline wax as storage medium. When laser beam strikes wax, its energy heats point of incidence enough to pass wax through transition temperature. Holograph image can then be written or erased in softened wax.

Common Problems of Documentary Information Transfer, Storage and Retrieval in Industrial Organizations.

ERIC Educational Resources Information Center

Vickers, P. H.

1983-01-01

Examination of management information systems of three manufacturing firms highlights principal characteristics, document types and functions, main information flows, storage and retrieval systems, and common problems (corporate memory failure, records management, management information systems, general management). A literature review and…

A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

De, Arup

2014-01-01

Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interfacemore » (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.« less

The performance of disk arrays in shared-memory database machines

NASA Technical Reports Server (NTRS)

Katz, Randy H.; Hong, Wei

1993-01-01

In this paper, we examine how disk arrays and shared memory multiprocessors lead to an effective method for constructing database machines for general-purpose complex query processing. We show that disk arrays can lead to cost-effective storage systems if they are configured from suitably small formfactor disk drives. We introduce the storage system metric data temperature as a way to evaluate how well a disk configuration can sustain its workload, and we show that disk arrays can sustain the same data temperature as a more expensive mirrored-disk configuration. We use the metric to evaluate the performance of disk arrays in XPRS, an operational shared-memory multiprocessor database system being developed at the University of California, Berkeley.

Updated optical read/write memory system components

NASA Technical Reports Server (NTRS)

1973-01-01

The fabrication of an updated block data composer and holographic storage array for a breadboard holographic read/write memory system is described. System considerations such as transform optics and controlled aberration lens design are described along with the block data composer, photoplastic recording materials, and material development.

High performance wire grid polarizers using jet and flashTM imprint lithography

NASA Astrophysics Data System (ADS)

Ahn, Sean; Yang, Jack; Miller, Mike; Ganapathisubramanian, Maha; Menezes, Marlon; Choi, Jin; Xu, Frank; Resnick, Douglas J.; Sreenivasan, S. V.

2013-03-01

The ability to pattern materials at the nanoscale can enable a variety of applications ranging from high density data storage, displays, photonic devices and CMOS integrated circuits to emerging applications in the biomedical and energy sectors. These applications require varying levels of pattern control, short and long range order, and have varying cost tolerances. Extremely large area roll to roll (R2R) manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. The cost of manufacturing is typically driven by speed (or throughput), tool complexity, cost of consumables (materials used, mold or master cost, etc.), substrate cost, and the downstream processing required (annealing, deposition, etching, etc.). In order to achieve low cost nanopatterning, it is imperative to move towards high speed imprinting, less complex tools, near zero waste of consumables and low cost substrates. The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. In this paper we have developed a roll based J-FIL process and applied it to technology demonstrator tool, the LithoFlex 100, to fabricate large area flexible bilayer wire grid polarizers (WGP) and high performance WGPs on rigid glass substrates. Extinction ratios of better than 10000 were obtained for the glass-based WGPs. Two simulation packages were also employed to understand the effects of pitch, aluminum thickness and pattern defectivity on the optical performance of the WGP devices. It was determined that the WGPs can be influenced by both clear and opaque defects in the gratings, however the defect densities are relaxed relative to the requirements of a high density semiconductor device.

Microdose Induced Data Loss on Floating Gate Memories

NASA Technical Reports Server (NTRS)

Guertin, Steven M.; Nguyen, Duc M.; Patterson, Jeffrey D.

2006-01-01

Heavy ion irradiation of flash memories shows loss of stored data. The fluence dependence is indicative of microdose effects. Other qualitative factors identifying the effect as microdose are discussed. The data is presented, and compared to statistical results of a microdose target-based model.

Addressable configurations of DNA nanostructures for rewritable memory.

PubMed

Chandrasekaran, Arun Richard; Levchenko, Oksana; Patel, Dhruv S; MacIsaac, Molly; Halvorsen, Ken

2017-11-02

DNA serves as nature's information storage molecule, and has been the primary focus of engineered systems for biological computing and data storage. Here we combine recent efforts in DNA self-assembly and toehold-mediated strand displacement to develop a rewritable multi-bit DNA memory system. The system operates by encoding information in distinct and reversible conformations of a DNA nanoswitch and decoding by gel electrophoresis. We demonstrate a 5-bit system capable of writing, erasing, and rewriting binary representations of alphanumeric symbols, as well as compatibility with 'OR' and 'AND' logic operations. Our strategy is simple to implement, requiring only a single mixing step at room temperature for each operation and standard gel electrophoresis to read the data. We envision such systems could find use in covert product labeling and barcoding, as well as secure messaging and authentication when combined with previously developed encryption strategies. Ultimately, this type of memory has exciting potential in biomedical sciences as data storage can be coupled to sensing of biological molecules. © The Author(s) 2017. Published by Oxford University Press on behalf of Nucleic Acids Research.

High Performance Data Transfer for Distributed Data Intensive Sciences

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fang, Chin; Cottrell, R 'Les' A.; Hanushevsky, Andrew B.

We report on the development of ZX software providing high performance data transfer and encryption. The design scales in: computation power, network interfaces, and IOPS while carefully balancing the available resources. Two U.S. patent-pending algorithms help tackle data sets containing lots of small files and very large files, and provide insensitivity to network latency. It has a cluster-oriented architecture, using peer-to-peer technologies to ease deployment, operation, usage, and resource discovery. Its unique optimizations enable effective use of flash memory. Using a pair of existing data transfer nodes at SLAC and NERSC, we compared its performance to that of bbcp andmore » GridFTP and determined that they were comparable. With a proof of concept created using two four-node clusters with multiple distributed multi-core CPUs, network interfaces and flash memory, we achieved 155Gbps memory-to-memory over a 2x100Gbps link aggregated channel and 70Gbps file-to-file with encryption over a 5000 mile 100Gbps link.« less

Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer

NASA Astrophysics Data System (ADS)

Zheng, Zhiwei; Huo, Zongliang; Zhang, Manhong; Zhu, Chenxin; Liu, Jing; Liu, Ming

2011-10-01

This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer. In comparison to a memory capacitor with a single HfO2 trapping layer, the erase speed of a memory capacitor with a stacked HfO2/Ta2O5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔVFB = 4 V, the device with a stacked HfO2/Ta2O5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO2/Ta2O5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application.

Memory characteristics of metal-oxide-semiconductor structures based on Ge nanoclusters-embedded GeO(x) films grown at low temperature.

PubMed

Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng

2012-03-01

The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.

Optimizing preservation protocols to extract high-quality RNA from different tissues of echinoderms for next-generation sequencing.

PubMed

Pérez-Portela, Rocío; Riesgo, Ana

2013-09-01

Transcriptomic information provides fundamental insights into biological processes. Extraction of quality RNA is a challenging step, and preservation and extraction protocols need to be adjusted in many cases. Our objectives were to optimize preservation protocols for isolation of high-quality RNA from diverse echinoderm tissues and to compare the utility of parameters as absorbance ratios and RIN values to assess RNA quality. Three different tissues (gonad, oesophagus and coelomocytes) were selected from the sea urchin Arbacia lixula. Solid tissues were flash-frozen and stored at -80 °C until processed. Four preservation treatments were applied to coelomocytes: flash freezing and storage at -80 °C, RNAlater and storage at -20 °C, preservation in TRIzol reagent and storage at -80 °C and direct extraction with TRIzol from fresh cells. Extractions of total RNA were performed with a modified TRIzol protocol for all tissues. Our results showed high values of RNA quantity and quality for all tissues, showing nonsignificant differences among them. However, while flash freezing was effective for solid tissues, it was inadequate for coelomocytes because of the low quality of the RNA extractions. Coelomocytes preserved in RNAlater displayed large variability in RNA integrity and insufficient RNA amount for further isolation of mRNA. TRIzol was the most efficient system for stabilizing RNA which resulted on high RNA quality and quantity. We did not detect correlation between absorbance ratios and RNA integrity. The best strategies for assessing RNA integrity was the visualization of 18S rRNA and 28S rRNA bands in agarose gels and estimation of RIN values with Agilent Bioanalyzer chips. © 2013 John Wiley & Sons Ltd.

Modeling of SONOS Memory Cell Erase Cycle

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

2011-01-01

Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

Non-Volatile Memory Technology Symposium 2001: Proceedings

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Daud, Taher; Strauss, Karl

2001-01-01

This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

SONOS Nonvolatile Memory Cell Programming Characteristics

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

Storage and executive processes in the frontal lobes.

PubMed

Smith, E E; Jonides, J

1999-03-12

The human frontal cortex helps mediate working memory, a system that is used for temporary storage and manipulation of information and that is involved in many higher cognitive functions. Working memory includes two components: short-term storage (on the order of seconds) and executive processes that operate on the contents of storage. Recently, these two components have been investigated in functional neuroimaging studies. Studies of storage indicate that different frontal regions are activated for different kinds of information: storage for verbal materials activates Broca's area and left-hemisphere supplementary and premotor areas; storage of spatial information activates the right-hemisphere premotor cortex; and storage of object information activates other areas of the prefrontal cortex. Two of the fundamental executive processes are selective attention and task management. Both processes activate the anterior cingulate and dorsolateral prefrontal cortex.

Computer memory power control for the Galileo spacecraft

NASA Technical Reports Server (NTRS)

Detwiler, R. C.

1983-01-01

The developmental history, major design drives, and final topology of the computer memory power system on the Galileo spacecraft are described. A unique method of generating memory backup power directly from the fault current drawn during a spacecraft power overload or fault condition allows this system to provide continuous memory power. This concept provides a unique solution to the problem of volatile memory loss without the use of a battery of other large energy storage elements usually associated with uninterrupted power supply designs.

Performance Evaluation and Improvement of Ferroelectric Field-Effect Transistor Memory

NASA Astrophysics Data System (ADS)

Yu, Hyung Suk

Flash memory is reaching scaling limitations rapidly due to reduction of charge in floating gates, charge leakage and capacitive coupling between cells which cause threshold voltage fluctuations, short retention times, and interference. Many new memory technologies are being considered as alternatives to flash memory in an effort to overcome these limitations. Ferroelectric Field-Effect Transistor (FeFET) is one of the main emerging candidates because of its structural similarity to conventional FETs and fast switching speed. Nevertheless, the performance of FeFETs have not been systematically compared and analyzed against other competing technologies. In this work, we first benchmark the intrinsic performance of FeFETs and other memories by simulations in order to identify the strengths and weaknesses of FeFETs. To simulate realistic memory applications, we compare memories on an array structure. For the comparisons, we construct an accurate delay model and verify it by benchmarking against exact HSPICE simulations. Second, we propose an accurate model for FeFET memory window since the existing model has limitations. The existing model assumes symmetric operation voltages but it is not valid for the practical asymmetric operation voltages. In this modeling, we consider practical operation voltages and device dimensions. Also, we investigate realistic changes of memory window over time and retention time of FeFETs. Last, to improve memory window and subthreshold swing, we suggest nonplanar junctionless structures for FeFETs. Using the suggested structures, we study the dimensional dependences of crucial parameters like memory window and subthreshold swing and also analyze key interference mechanisms.

Unitary or Non-Unitary Nature of Working Memory? Evidence from Its Relation to General Fluid and Crystallized Intelligence

ERIC Educational Resources Information Center

Dang, Cai-Ping; Braeken, Johan; Ferrer, Emilio; Liu, Chang

2012-01-01

This study explored the controversy surrounding working memory: whether it is a unitary system providing general purpose resources or a more differentiated system with domain-specific sub-components. A total of 348 participants completed a set of 6 working memory tasks that systematically varied in storage target contents and type of information…

Multi-port, optically addressed RAM

NASA Technical Reports Server (NTRS)

Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)

1989-01-01

A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.

A 300MHz Embedded Flash Memory with Pipeline Architecture and Offset-Free Sense Amplifiers for Dual-Core Automotive Microcontrollers

NASA Astrophysics Data System (ADS)

Kajiyama, Shinya; Fujito, Masamichi; Kasai, Hideo; Mizuno, Makoto; Yamaguchi, Takanori; Shinagawa, Yutaka

A novel 300MHz embedded flash memory for dual-core microcontrollers with a shared ROM architecture is proposed. One of its features is a three-stage pipeline read operation, which enables reduced access pitch and therefore reduces performance penalty due to conflict of shared ROM accesses. Another feature is a highly sensitive sense amplifier that achieves efficient pipeline operation with two-cycle latency one-cycle pitch as a result of a shortened sense time of 0.63ns. The combination of the pipeline architecture and proposed sense amplifiers significantly reduces access-conflict penalties with shared ROM and enhances performance of 32-bit RISC dual-core microcontrollers by 30%.

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets in a NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond L.; Kim, Hak; Phan, Anthony; Seidleck, Christina; Label, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found that the single-event upset (SEU) cross section varied inversely with cumulative fluence. We attribute the effect to the variable upset sensitivities of the memory cells. Furthermore, the effect impacts only single cell upsets in general. The rate of multiple-bit upsets remained relatively constant with fluence. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, traditional SEE testing techniques may underestimate the on-orbit event rate for a device with variable upset sensitivity.

Quantifying uranium transport rates and storage of fluvially eroded mine tailings from a historic mine site in the Grand Canyon Region

NASA Astrophysics Data System (ADS)

Skalak, K.; Benthem, A. J.; Walton-Day, K. E.; Jolly, G.

2015-12-01

The Grand Canyon region contains a large number of breccia pipes with economically viable uranium, copper, and silver concentrations. Mining in this region has occurred since the late 19th century and has produced ore and waste rock having elevated levels of uranium and other contaminants. Fluvial transport of these contaminants from mine sites is a possibility, as this arid region is susceptible to violent storms and flash flooding which might erode and mobilize ore or waste rock. In order to assess and manage the risks associated with uranium mining, it is important to understand the transport and storage rates of sediment and uranium within the ephemeral streams of this region. We are developing a 1-dimensional sediment transportation model to examine uranium transport and storage through a typical canyon system in this region. Our study site is Hack Canyon Mine, a uranium and copper mine site, which operated in the 1980's and is currently experiencing fluvial erosion of its waste rock repository. The mine is located approximately 40km upstream from the Colorado River and is in a deep, narrow canyon with a small watershed. The stream is ephemeral for the upper half of its length and sediment is primarily mobilized during flash flood events. We collected sediment samples at 110 locations longitudinally through the river system to examine the distribution of uranium in the stream. Samples were sieved to the sand size and below fraction (<2mm) and uranium was measured by gamma-ray spectroscopy. Sediment storage zones were also examined in the upper 8km of the system to determine where uranium is preferentially stored in canyon systems. This information will quantify the downstream transport of constituents associated with the Hack Canyon waste rock and contribute to understanding the risks associated with fluvial mobilization of uranium mine waste.

Characterization of nitride hole lateral transport in a charge trap flash memory by using a random telegraph signal method

NASA Astrophysics Data System (ADS)

Liu, Yu-Heng; Jiang, Cheng-Min; Lin, Hsiao-Yi; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan

2017-07-01

We use a random telegraph signal method to investigate nitride trapped hole lateral transport in a charge trap flash memory. The concept of this method is to utilize an interface oxide trap and its associated random telegraph signal as an internal probe to detect a local channel potential change resulting from nitride charge lateral movement. We apply different voltages to the drain of a memory cell and vary a bake temperature in retention to study the electric field and temperature dependence of hole lateral movement in a nitride. Thermal energy absorption by trapped holes in lateral transport is characterized. Mechanisms of hole lateral transport in retention are investigated. From the measured and modeled results, we find that thermally assisted trap-to-band tunneling is a major trapped hole emission mechanism in nitride hole lateral transport.

The flash memory battle: How low can we go?

NASA Astrophysics Data System (ADS)

van Setten, Eelco; Wismans, Onno; Grim, Kees; Finders, Jo; Dusa, Mircea; Birkner, Robert; Richter, Rigo; Scherübl, Thomas

2008-03-01

With the introduction of the TWINSCAN XT:1900Gi the limit of the water based hyper-NA immersion lithography has been reached in terms of resolution. With a numerical aperture of 1.35 a single expose resolution of 36.5nm half pitch has been demonstrated. However the practical resolution limit in production will be closer to 40nm half pitch, without having to go to double patterning alike strategies. In the relentless Flash memory market the performance of the exposure tool is stretched to the limit for a competitive advantage and cost-effective product. In this paper we will present the results of an experimental study of the resolution limit of the NAND-Flash Memory Gate layer for a production-worthy process on the TWINSCAN XT:1900Gi. The entire gate layer will be qualified in terms of full wafer CD uniformity, aberration sensitivities for the different wordlines and feature-center placement errors for 38, 39, 40 and 43nm half pitch design rule. In this study we will also compare the performance of a binary intensity mask to a 6% attenuated phase shift mask and look at strategies to maximize Depth of Focus, and to desensitize the gate layer for lens aberrations and placement errors. The mask is one of the dominant contributors to the CD uniformity budget of the flash gate layer. Therefore the wafer measurements are compared to aerial image measurements of the mask using AIMSTM 45-193i to separate the mask contribution from the scanner contribution to the final imaging performance.

A 128K-bit CCD buffer memory system

NASA Technical Reports Server (NTRS)

Siemens, K. H.; Wallace, R. W.; Robinson, C. R.

1976-01-01

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.

Real-time associative memory with photorefractive crystal KNSBN and liquid-crystal optical switches

NASA Astrophysics Data System (ADS)

Xu, Haiying; Yuan, Yang Y.; Yu, Youlong; Xu, Kebin; Xu, Yuhuan; Zhu, De-Rui

1990-05-01

We present a real-time holographic associative memory implemented with photorefractive KNSBN : Co crystal as memory element and liquid crystal electrooptical switches as reflective thresholding device. The experimental results show that the system has real-time multiple-image storage and recall function.

48 CFR 2452.204-70 - Preservation of, and access to, contract records (tangible and electronically stored information...

Code of Federal Regulations, 2013 CFR

2013-10-01

... or data storage). ESI devices and media include, but are not be limited to: (1) Computers (mainframe...) Personal data assistants (PDAs); (5) External data storage devices including portable devices (e.g., flash drive); and (6) Data storage media (magnetic, e.g., tape; optical, e.g., compact disc, microfilm, etc...

48 CFR 2452.204-70 - Preservation of, and access to, contract records (tangible and electronically stored information...

Code of Federal Regulations, 2014 CFR

2014-10-01

... or data storage). ESI devices and media include, but are not be limited to: (1) Computers (mainframe...) Personal data assistants (PDAs); (5) External data storage devices including portable devices (e.g., flash drive); and (6) Data storage media (magnetic, e.g., tape; optical, e.g., compact disc, microfilm, etc...

Holographic data storage crystals for LDEF (A0044)

NASA Technical Reports Server (NTRS)

Callen, W. R.; Gaylord, T. K.

1984-01-01

Electro-optic holographic recording systems were developed. The spaceworthiness of electro-optic crystals for use in ultrahigh capacity space data storage and retrieval systems are examined. The crystals for this experiment are included with the various electro-optical components of LDEF experiment. The effects of long-duration exposure on active optical system components is investigated. The concept of data storage in an optical-phase holographic memory is illustrated.

Protecting solid-state spins from a strongly coupled environment

NASA Astrophysics Data System (ADS)

Chen, Mo; Calvin Sun, Won Kyu; Saha, Kasturi; Jaskula, Jean-Christophe; Cappellaro, Paola

2018-06-01

Quantum memories are critical for solid-state quantum computing devices and a good quantum memory requires both long storage time and fast read/write operations. A promising system is the nitrogen-vacancy (NV) center in diamond, where the NV electronic spin serves as the computing qubit and a nearby nuclear spin as the memory qubit. Previous works used remote, weakly coupled 13C nuclear spins, trading read/write speed for long storage time. Here we focus instead on the intrinsic strongly coupled 14N nuclear spin. We first quantitatively understand its decoherence mechanism, identifying as its source the electronic spin that acts as a quantum fluctuator. We then propose a scheme to protect the quantum memory from the fluctuating noise by applying dynamical decoupling on the environment itself. We demonstrate a factor of 3 enhancement of the storage time in a proof-of-principle experiment, showing the potential for a quantum memory that combines fast operation with long coherence time.

Progress towards broadband Raman quantum memory in Bose-Einstein condensates

NASA Astrophysics Data System (ADS)

Saglamyurek, Erhan; Hrushevskyi, Taras; Smith, Benjamin; Leblanc, Lindsay

2017-04-01

Optical quantum memories are building blocks for quantum information technologies. Efficient and long-lived storage in combination with high-speed (broadband) operation are key features required for practical applications. While the realization has been a great challenge, Raman memory in Bose-Einstein condensates (BECs) is a promising approach, due to negligible decoherence from diffusion and collisions that leads to seconds-scale memory times, high efficiency due to large atomic density, the possibility for atom-chip integration with micro photonics, and the suitability of the far off-resonant Raman approach with storage of broadband photons (over GHz) [5]. Here we report our progress towards Raman memory in a BEC. We describe our apparatus recently built for producing BEC with 87Rb atoms, and present the observation of nearly pure BEC with 5x105 atoms at 40 nK. After showing our initial characterizations, we discuss the suitability of our system for Raman-based light storage in our BEC.

Maintenance Downtime May 8 - 11, 2015

Atmospheric Science Data Center

2015-05-06

... The ASDC will experience a partial outage to move from old storage to new storage. ANGe ingest will be paused and production processing on ... any inconvenience this may cause.   The following data providers will be impacted: AFWA-MESH16 CloudSat FLASH GHRC NCEP ...

Fabrication and characterization of shape memory polymers at small-scales

NASA Astrophysics Data System (ADS)

Wornyo, Edem

The objective of this research is to thoroughly investigate the shape memory effect in polymers, characterize, and optimize these polymers for applications in information storage systems. Previous research effort in this field concentrated on shape memory metals for biomedical applications such as stents. Minimal work has been done on shape memory polymers; and the available work on shape memory polymers has not characterized the behaviors of this category of polymers fully. Copolymer shape memory materials based on diethylene glycol dimethacrylate (DEGDMA) crosslinker, and tert butyl acrylate (tBA) monomer are designed. The design encompasses a careful control of the backbone chemistry of the materials. Characterization methods such as dynamic mechanical analysis (DMA), differential scanning calorimetry (DSC); and novel nanoscale techniques such as atomic force microscopy (AFM), and nanoindentation are applied to this system of materials. Designed experiments are conducted on the materials to optimize spin coating conditions for thin films. Furthermore, the recovery, a key for the use of these polymeric materials for information storage, is examined in detail with respect to temperature. In sum, the overarching objectives of the proposed research are to: (i) Design shape memory polymers based on polyethylene glycol dimethacrylate (PEGDMA) and diethylene glycol dimethacrylate (DEGDMA) crosslinkers, 2-hydroxyethyl methacrylate (HEMA) and tert-butyl acrylate monomer (tBA). (ii) Utilize dynamic mechanical analysis (DMA) to comprehend the thermomechanical properties of shape memory polymers based on DEGDMA and tBA. (iii) Utilize nanoindentation and atomic force microscopy (AFM) to understand the nanoscale behavior of these SMPs, and explore the strain storage and recovery of the polymers from a deformed state. (iv) Study spin coating conditions on thin film quality with designed experiments. (iv) Apply neural networks and genetic algorithms to optimize these systems.

The effect of flash-freezing temperature on stallion sperm DNA structure.

PubMed

Serafini, R; Varner, D D; Bissett, W; Blanchard, T L; Teague, S R; Love, C C

2017-06-01

The effect of flash-freezing storage temperature on stallion sperm DNA has not been evaluated. Commonly, sperm are flash-frozen at various temperatures to preserve sperm DNA prior to analysis. It is unclear whether the temperature at which sperm are frozen and stored may affect the results of DNA assays. In this study, the neutral comet assay was used to evaluate the effect of flash-freezing storage temperature (freezer [-60 °C], dry ice [-78.5 °C], liquid nitrogen [-196 °C]) compared to fresh sperm DNA structure. In addition, intra- and inter-assay and intra- and inter-stallion variabilities were determined. All comet tail measures were higher following any flash-freezing method, as compared to fresh sperm DNA (P < 0.05), with no difference among flash-frozen treatments (P > 0.05). For most comet variables, intra- and inter-assay variabilities were <10%. Intra- and inter-stallion variabilities revealed that comet head length (HL) and width (CW) were less variable as compared to comet tail values, i.e., % comet tail DNA (T-DNA), tail length (TL), tail moment (OTM), and tail migration (TM). Certain comet tail values in fresh (% T-DNA, and OTM) and flash-frozen sperm (OTM, % T-DNA, TL, and TM) were correlated to the Sperm Chromatin Structure Assay (SCSA) variable, COMP-α t . The comet tail measures were negatively correlated to % morphologically normal sperm (P < 0.05) and positively correlated to % abnormal heads and premature germ cells (P < 0.05). Variables COMP-α t and % total sperm motility were not correlated to any morphologic sperm feature in this group of stallions (P > 0.05). While significant differences in the structure of the sperm DNA were identified in the flash-frozen as compared to the fresh sperm DNA with the neutral comet assay, it cannot be assumed that these changes are fertility limiting. Copyright © 2017. Published by Elsevier Inc.

Optimization of preservation and storage time of sponge tissues to obtain quality mRNA for next-generation sequencing.

PubMed

Riesgo, Ana; Pérez-Porro, Alicia R; Carmona, Susana; Leys, Sally P; Giribet, Gonzalo

2012-03-01

Transcriptome sequencing with next-generation sequencing technologies has the potential for addressing many long-standing questions about the biology of sponges. Transcriptome sequence quality depends on good cDNA libraries, which requires high-quality mRNA. Standard protocols for preserving and isolating mRNA often require optimization for unusual tissue types. Our aim was assessing the efficiency of two preservation modes, (i) flash freezing with liquid nitrogen (LN₂) and (ii) immersion in RNAlater, for the recovery of high-quality mRNA from sponge tissues. We also tested whether the long-term storage of samples at -80 °C affects the quantity and quality of mRNA. We extracted mRNA from nine sponge species and analysed the quantity and quality (A260/230 and A260/280 ratios) of mRNA according to preservation method, storage time, and taxonomy. The quantity and quality of mRNA depended significantly on the preservation method used (LN₂) outperforming RNAlater), the sponge species, and the interaction between them. When the preservation was analysed in combination with either storage time or species, the quantity and A260/230 ratio were both significantly higher for LN₂-preserved samples. Interestingly, individual comparisons for each preservation method over time indicated that both methods performed equally efficiently during the first month, but RNAlater lost efficiency in storage times longer than 2 months compared with flash-frozen samples. In summary, we find that for long-term preservation of samples, flash freezing is the preferred method. If LN₂ is not available, RNAlater can be used, but mRNA extraction during the first month of storage is advised. © 2011 Blackwell Publishing Ltd.

The Cognitive and Neural Correlates of Tactile Memory

ERIC Educational Resources Information Center

Gallace, Alberto; Spence, Charles

2009-01-01

Tactile memory systems are involved in the storage and retrieval of information about stimuli that impinge on the body surface and objects that people explore haptically. Here, the authors review the behavioral, neuropsychological, neurophysiological, and neuroimaging research on tactile memory. This body of research reveals that tactile memory…

Holographic memories with encryption-selectable function

NASA Astrophysics Data System (ADS)

Su, Wei-Chia; Lee, Xuan-Hao

2006-03-01

Volume holographic storage has received increasing attention owing to its potential high storage capacity and access rate. In the meanwhile, encrypted holographic memory using random phase encoding technique is attractive for an optical community due to growing demand for protection of information. In this paper, encryption-selectable holographic storage algorithms in LiNbO 3 using angular multiplexing are proposed and demonstrated. Encryption-selectable holographic memory is an advance concept of security storage for content protection. It offers more flexibility to encrypt the data or not optionally during the recording processes. In our system design, the function of encryption and non-encryption storage is switched by a random phase pattern and a uniform phase pattern. Based on a 90-degree geometry, the input patterns including the encryption and non-encryption storage are stored via angular multiplexing with reference plane waves at different incident angles. Image is encrypted optionally by sliding the ground glass into one of the recording waves or removing it away in each exposure. The ground glass is a key for encryption. Besides, it is also an important key available for authorized user to decrypt the encrypted information.

Storage of features, conjunctions and objects in visual working memory.

PubMed

Vogel, E K; Woodman, G F; Luck, S J

2001-02-01

Working memory can be divided into separate subsystems for verbal and visual information. Although the verbal system has been well characterized, the storage capacity of visual working memory has not yet been established for simple features or for conjunctions of features. The authors demonstrate that it is possible to retain information about only 3-4 colors or orientations in visual working memory at one time. Observers are also able to retain both the color and the orientation of 3-4 objects, indicating that visual working memory stores integrated objects rather than individual features. Indeed, objects defined by a conjunction of four features can be retained in working memory just as well as single-feature objects, allowing many individual features to be retained when distributed across a small number of objects. Thus, the capacity of visual working memory must be understood in terms of integrated objects rather than individual features.

A Future Accelerated Cognitive Distributed Hybrid Testbed for Big Data Science Analytics

NASA Astrophysics Data System (ADS)

Halem, M.; Prathapan, S.; Golpayegani, N.; Huang, Y.; Blattner, T.; Dorband, J. E.

2016-12-01

As increased sensor spectral data volumes from current and future Earth Observing satellites are assimilated into high-resolution climate models, intensive cognitive machine learning technologies are needed to data mine, extract and intercompare model outputs. It is clear today that the next generation of computers and storage, beyond petascale cluster architectures, will be data centric. They will manage data movement and process data in place. Future cluster nodes have been announced that integrate multiple CPUs with high-speed links to GPUs and MICS on their backplanes with massive non-volatile RAM and access to active flash RAM disk storage. Active Ethernet connected key value store disk storage drives with 10Ge or higher are now available through the Kinetic Open Storage Alliance. At the UMBC Center for Hybrid Multicore Productivity Research, a future state-of-the-art Accelerated Cognitive Computer System (ACCS) for Big Data science is being integrated into the current IBM iDataplex computational system `bluewave'. Based on the next gen IBM 200 PF Sierra processor, an interim two node IBM Power S822 testbed is being integrated with dual Power 8 processors with 10 cores, 1TB Ram, a PCIe to a K80 GPU and an FPGA Coherent Accelerated Processor Interface card to 20TB Flash Ram. This system is to be updated to the Power 8+, an NVlink 1.0 with the Pascal GPU late in 2016. Moreover, the Seagate 96TB Kinetic Disk system with 24 Ethernet connected active disks is integrated into the ACCS storage system. A Lightweight Virtual File System developed at the NASA GSFC is installed on bluewave. Since remote access to publicly available quantum annealing computers is available at several govt labs, the ACCS will offer an in-line Restricted Boltzmann Machine optimization capability to the D-Wave 2X quantum annealing processor over the campus high speed 100 Gb network to Internet 2 for large files. As an evaluation test of the cognitive functionality of the architecture, the following studies utilizing all the system components will be presented; (i) a near real time climate change study generating CO2 fluxes and (ii) a deep dive capability into an 8000 x8000 pixel image pyramid display and (iii) Large dense and sparse eigenvalue decomposition.

Place Cells, Grid Cells, and Memory

PubMed Central

Moser, May-Britt; Rowland, David C.; Moser, Edvard I.

2015-01-01

The hippocampal system is critical for storage and retrieval of declarative memories, including memories for locations and events that take place at those locations. Spatial memories place high demands on capacity. Memories must be distinct to be recalled without interference and encoding must be fast. Recent studies have indicated that hippocampal networks allow for fast storage of large quantities of uncorrelated spatial information. The aim of the this article is to review and discuss some of this work, taking as a starting point the discovery of multiple functionally specialized cell types of the hippocampal–entorhinal circuit, such as place, grid, and border cells. We will show that grid cells provide the hippocampus with a metric, as well as a putative mechanism for decorrelation of representations, that the formation of environment-specific place maps depends on mechanisms for long-term plasticity in the hippocampus, and that long-term spatiotemporal memory storage may depend on offline consolidation processes related to sharp-wave ripple activity in the hippocampus. The multitude of representations generated through interactions between a variety of functionally specialized cell types in the entorhinal–hippocampal circuit may be at the heart of the mechanism for declarative memory formation. PMID:25646382

Two-dimensional signal processing using a morphological filter for holographic memory

NASA Astrophysics Data System (ADS)

Kondo, Yo; Shigaki, Yusuke; Yamamoto, Manabu

2012-03-01

Today, along with the wider use of high-speed information networks and multimedia, it is increasingly necessary to have higher-density and higher-transfer-rate storage devices. Therefore, research and development into holographic memories with three-dimensional storage areas is being carried out to realize next-generation large-capacity memories. However, in holographic memories, interference between bits, which affect the detection characteristics, occurs as a result of aberrations such as the deviation of a wavefront in an optical system. In this study, we pay particular attention to the nonlinear factors that cause bit errors, where filters with a Volterra equalizer and the morphologies are investigated as a means of signal processing.

Weather prediction using a genetic memory

NASA Technical Reports Server (NTRS)

Rogers, David

1990-01-01

Kanaerva's sparse distributed memory (SDM) is an associative memory model based on the mathematical properties of high dimensional binary address spaces. Holland's genetic algorithms are a search technique for high dimensional spaces inspired by evolutional processes of DNA. Genetic Memory is a hybrid of the above two systems, in which the memory uses a genetic algorithm to dynamically reconfigure its physical storage locations to reflect correlations between the stored addresses and data. This architecture is designed to maximize the ability of the system to scale-up to handle real world problems.

Applying a cloud computing approach to storage architectures for spacecraft

NASA Astrophysics Data System (ADS)

Baldor, Sue A.; Quiroz, Carlos; Wood, Paul

As sensor technologies, processor speeds, and memory densities increase, spacecraft command, control, processing, and data storage systems have grown in complexity to take advantage of these improvements and expand the possible missions of spacecraft. Spacecraft systems engineers are increasingly looking for novel ways to address this growth in complexity and mitigate associated risks. Looking to conventional computing, many solutions have been executed to solve both the problem of complexity and heterogeneity in systems. In particular, the cloud-based paradigm provides a solution for distributing applications and storage capabilities across multiple platforms. In this paper, we propose utilizing a cloud-like architecture to provide a scalable mechanism for providing mass storage in spacecraft networks that can be reused on multiple spacecraft systems. By presenting a consistent interface to applications and devices that request data to be stored, complex systems designed by multiple organizations may be more readily integrated. Behind the abstraction, the cloud storage capability would manage wear-leveling, power consumption, and other attributes related to the physical memory devices, critical components in any mass storage solution for spacecraft. Our approach employs SpaceWire networks and SpaceWire-capable devices, although the concept could easily be extended to non-heterogeneous networks consisting of multiple spacecraft and potentially the ground segment.

Calculation and affection of pH value of different desulfurization and dehydration rates in the filling station based on Aspen Plus

NASA Astrophysics Data System (ADS)

Lv, J. X.; Wang, B. F.; Nie, L. H.; Xu, R. R.; Zhou, J. Y.; Hao, Y. J.

2018-01-01

The simulation process of the whole CNG filling station are established using Aspen Plus V7.2. The separator (Sep) was used to simulate the desulfurization and dehydration equipment in the gas station, and the flash module separator Flash 2 was used to simulate the gas storage well with proper temperature and environmental pressure. Furthermore, the sensitivity module was used to analyse the behaviour of the dehydration and desulfurization rate, and the residual pH value of the gas storage wells was between 2.2 and 3.3. The results indicated that the effect of water content on pH value is higher than that of hydrogen sulphide in the environment of gas storage wells, and the calculation process of the pH value is feasible. Additionally, the simulation process provides basic data for the subsequent anticorrosive mechanism and work of gas storage well and has great potential for practical applications.

Shift-invariant optical associative memories

NASA Astrophysics Data System (ADS)

Psaltis, Demetri; Hong, John

1987-01-01

Shift invariance in the context of associative memories is discussed. Two optical systems that exhibit shift invariance are described in detail with attention given to the analysis of storage capacities. It is shown that full shift invariance cannot be achieved with systems that employ only linear interconnections to store the associations.

The Science of Computing: Virtual Memory

NASA Technical Reports Server (NTRS)

Denning, Peter J.

1986-01-01

In the March-April issue, I described how a computer's storage system is organized as a hierarchy consisting of cache, main memory, and secondary memory (e.g., disk). The cache and main memory form a subsystem that functions like main memory but attains speeds approaching cache. What happens if a program and its data are too large for the main memory? This is not a frivolous question. Every generation of computer users has been frustrated by insufficient memory. A new line of computers may have sufficient storage for the computations of its predecessor, but new programs will soon exhaust its capacity. In 1960, a longrange planning committee at MIT dared to dream of a computer with 1 million words of main memory. In 1985, the Cray-2 was delivered with 256 million words. Computational physicists dream of computers with 1 billion words. Computer architects have done an outstanding job of enlarging main memories yet they have never kept up with demand. Only the shortsighted believe they can.

Optical mass memory system (AMM-13). AMM-13 system segment specification

NASA Technical Reports Server (NTRS)

Bailey, G. A.

1980-01-01

The performance, design, development, and test requirements for an optical mass data storage and retrieval system prototype (AMM-13) are established. This system interfaces to other system segments of the NASA End-to-End Data System via the Data Base Management System segment and is designed to have a storage capacity of 10 to the 13th power bits (10 to the 12th power bits on line). The major functions of the system include control, input and output, recording of ingested data, fiche processing/replication and storage and retrieval.

Noise reduction in optically controlled quantum memory

NASA Astrophysics Data System (ADS)

Ma, Lijun; Slattery, Oliver; Tang, Xiao

2018-05-01

Quantum memory is an essential tool for quantum communications systems and quantum computers. An important category of quantum memory, called optically controlled quantum memory, uses a strong classical beam to control the storage and re-emission of a single-photon signal through an atomic ensemble. In this type of memory, the residual light from the strong classical control beam can cause severe noise and degrade the system performance significantly. Efficiently suppressing this noise is a requirement for the successful implementation of optically controlled quantum memories. In this paper, we briefly introduce the latest and most common approaches to quantum memory and review the various noise-reduction techniques used in implementing them.

Three-dimensional magnetic bubble memory system

NASA Technical Reports Server (NTRS)

Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

Global and Regional Real-time Systems for Flood and Drought Monitoring and Prediction

NASA Astrophysics Data System (ADS)

Hong, Y.; Gourley, J. J.; Xue, X.; Flamig, Z.

2015-12-01

A Hydrometeorological Extreme Mapping and Prediction System (HyXtreme-MaP), initially built upon the Coupled Routing and Excess STorage (CREST) distributed hydrological model, is driven by real-time quasi-global TRMM/GPM satellites and by the US Multi-Radar Multi-Sensor (MRMS) radar network with dual-polarimetric upgrade to simulate streamflow, actual ET, soil moisture and other hydrologic variables at 1/8th degree resolution quasi-globally (http://eos.ou.edu) and at 250-meter 2.5-mintue resolution over the Continental United States (CONUS: http://flash.ou.edu).­ Multifaceted and collaborative by-design, this end-to-end research framework aims to not only integrate data, models, and applications but also brings people together (i.e., NOAA, NASA, University researchers, and end-users). This presentation will review the progresses, challenges and opportunities of such HyXTREME-MaP System used to monitor global floods and droughts, and also to predict flash floods over the CONUS.

Physics Flash August 2016

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kippen, Karen Elizabeth

Physics Flash is the newsletter for the Physics Division at Los Alamos National Laboratory. This newsletter is for August 2016. The following topics are covered: "Accomplishments in the Trident Laser Facility", "David Meyerhofer elected as chair-elect APS Nominating Committee", "HAWC searches for gamma rays from dark matter", "Proton Radiography Facility commissions electromagnetic magnifier", and "Cosmic ray muon computed tomography of spent nuclear fuel in dry storage casks."

The Library and Human Memory. Final Report on Mechanized Information Services in the University Library, Phase I - Planning. Part 13.

ERIC Educational Resources Information Center

Norman, Donald A.

This paper discusses the differences between the storage problems encountered in a large library and those encountered in the human memory. Some of the properties of the human memory system and some of the major issues which affect the interaction between human users and the existing library systems are outlined. The problem of browsing is used as…

NASA's 3D Flight Computer for Space Applications

NASA Technical Reports Server (NTRS)

Alkalai, Leon

2000-01-01

The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs).

PubMed

Moradi, Saber; Qiao, Ning; Stefanini, Fabio; Indiveri, Giacomo

2018-02-01

Neuromorphic computing systems comprise networks of neurons that use asynchronous events for both computation and communication. This type of representation offers several advantages in terms of bandwidth and power consumption in neuromorphic electronic systems. However, managing the traffic of asynchronous events in large scale systems is a daunting task, both in terms of circuit complexity and memory requirements. Here, we present a novel routing methodology that employs both hierarchical and mesh routing strategies and combines heterogeneous memory structures for minimizing both memory requirements and latency, while maximizing programming flexibility to support a wide range of event-based neural network architectures, through parameter configuration. We validated the proposed scheme in a prototype multicore neuromorphic processor chip that employs hybrid analog/digital circuits for emulating synapse and neuron dynamics together with asynchronous digital circuits for managing the address-event traffic. We present a theoretical analysis of the proposed connectivity scheme, describe the methods and circuits used to implement such scheme, and characterize the prototype chip. Finally, we demonstrate the use of the neuromorphic processor with a convolutional neural network for the real-time classification of visual symbols being flashed to a dynamic vision sensor (DVS) at high speed.

Working Memory in Children with Cochlear Implants: Problems are in Storage, not Processing

PubMed Central

Nittrouer, Susan; Caldwell-Tarr, Amanda; Lowenstein, Joanna H

2013-01-01

Background There is growing consensus that hearing loss and consequent amplification likely interact with cognitive systems. A phenomenon often examined in regards to these potential interactions is working memory, modeled as consisting of one component responsible for storage of information and another component responsible for processing of that information. Signal degradation associated with cochlear implants should selectively inhibit storage without affecting processing. This study examined two hypotheses: (1) A single task can be used to measure storage and processing in working memory, with recall accuracy indexing storage and rate of recall indexing processing; (2) Storage is negatively impacted for children with CIs, but not processing. Method Two experiments were conducted. Experiment 1 included adults and children, 8 and 6 years of age, with NH. Procedures tested the prediction that accuracy of recall could index storage and rate of recall could index processing. Both measures were obtained during a serial-recall task using word lists designed to manipulate storage and processing demands independently: non-rhyming nouns were the standard condition; rhyming nouns were predicted to diminish storage capacity; and non-rhyming adjectives were predicted to increase processing load. Experiment 2 included 98 8-year-olds, 48 with NH and 50 with CIs, in the same serial-recall task using the non-rhyming and rhyming nouns. Results Experiment 1 showed that recall accuracy was poorest for the rhyming nouns and rate of recall was slowest for the non-rhyming adjectives, demonstrating that storage and processing can be indexed separately within a single task. In Experiment 2, children with CIs showed less accurate recall of serial order than children with NH, but rate of recall did not differ. Recall accuracy and rate of recall were not correlated in either experiment, reflecting independence of these mechanisms. Conclusions It is possible to measure the operations of storage and processing mechanisms in working memory in a single task, and only storage is impaired for children with CIs. These findings suggest that research and clinical efforts should focus on enhancing the saliency of representation for children with CIs. Direct instruction of syntax and semantics could facilitate storage in real-world working memory tasks. PMID:24090697

Working memory in children with cochlear implants: problems are in storage, not processing.

PubMed

Nittrouer, Susan; Caldwell-Tarr, Amanda; Lowenstein, Joanna H

2013-11-01

There is growing consensus that hearing loss and consequent amplification likely interact with cognitive systems. A phenomenon often examined in regards to these potential interactions is working memory, modeled as consisting of one component responsible for storage of information and another component responsible for processing of that information. Signal degradation associated with cochlear implants should selectively inhibit storage without affecting processing. This study examined two hypotheses: (1) A single task can be used to measure storage and processing in working memory, with recall accuracy indexing storage and rate of recall indexing processing; (2) Storage is negatively impacted for children with CIs, but not processing. Two experiments were conducted. Experiment 1 included adults and children, 8 and 6 years of age, with NH. Procedures tested the prediction that accuracy of recall could index storage and rate of recall could index processing. Both measures were obtained during a serial-recall task using word lists designed to manipulate storage and processing demands independently: non-rhyming nouns were the standard condition; rhyming nouns were predicted to diminish storage capacity; and non-rhyming adjectives were predicted to increase processing load. Experiment 2 included 98 8-year-olds, 48 with NH and 50 with CIs, in the same serial-recall task using the non-rhyming and rhyming nouns. Experiment 1 showed that recall accuracy was poorest for the rhyming nouns and rate of recall was slowest for the non-rhyming adjectives, demonstrating that storage and processing can be indexed separately within a single task. In Experiment 2, children with CIs showed less accurate recall of serial order than children with NH, but rate of recall did not differ. Recall accuracy and rate of recall were not correlated in either experiment, reflecting independence of these mechanisms. It is possible to measure the operations of storage and processing mechanisms in working memory in a single task, and only storage is impaired for children with CIs. These findings suggest that research and clinical efforts should focus on enhancing the saliency of representation for children with CIs. Direct instruction of syntax and semantics could facilitate storage in real-world working memory tasks. Copyright © 2013 Elsevier Ireland Ltd. All rights reserved.

KSC-05PD-0565

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, a digital still camera has been mounted in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0562

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers check the digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the tank's separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0564

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, a worker mounts a digital still camera in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0561

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers prepare a digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following its separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-05PD-0563

NASA Technical Reports Server (NTRS)

2005-01-01

KENNEDY SPACE CENTER, FLA. In the Vehicle Assembly Building at NASAs Kennedy Space Center, workers prepare a digital still camera they will mount in the External Tank (ET) umbilical well on the aft end of Space Shuttle Discovery. The camera is being used to obtain and downlink high-resolution images of the disconnect point on the ET following the ET separation from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

The Roles of Working Memory and Cognitive Load in Geoscience Learning

ERIC Educational Resources Information Center

Jaeger, Allison J.; Shipley, Thomas F.; Reynolds, Stephen J.

2017-01-01

Working memory is a cognitive system that allows for the simultaneous storage and processing of active information. While working memory has been implicated as an important element for success in many science, technology, engineering, and mathematics (STEM) fields, its specific role in geoscience learning is not fully understood. The major goal of…

Working Memory and Fluid Intelligence in Young Children

ERIC Educational Resources Information Center

Engel de Abreu, Pascale M. J.; Conway, Andrew R. A.; Gathercole, Susan E.

2010-01-01

The present study investigates how working memory and fluid intelligence are related in young children and how these links develop over time. The major aim is to determine which aspect of the working memory system--short-term storage or cognitive control--drives the relationship with fluid intelligence. A sample of 119 children was followed from…

Verbal Working Memory Performance Correlates with Regional White Matter Structures in the Frontoparietal Regions

ERIC Educational Resources Information Center

Takeuchi, Hikaru; Taki, Yasuyuki; Sassa, Yuko; Hashizume, Hiroshi; Sekiguchi, Atsushi; Fukushima, Ai; Kawashima, Ryuta

2011-01-01

Working memory is the limited capacity storage system involved in the maintenance and manipulation of information over short periods of time. Previous imaging studies have suggested that the frontoparietal regions are activated during working memory tasks; a putative association between the structure of the frontoparietal regions and working…

Multiplexed Holographic Data Storage in Bacteriorhodopsin

NASA Technical Reports Server (NTRS)

Mehrl, David J.; Krile, Thomas F.

1999-01-01

Biochrome photosensitive films in particular Bacteriorhodopsin exhibit features which make these materials an attractive recording medium for optical data storage and processing. Bacteriorhodopsin films find numerous applications in a wide range of optical data processing applications; however the short-term memory characteristics of BR limits their applications for holographic data storage. The life-time of the BR can be extended using cryogenic temperatures [1], although this method makes the system overly complicated and unstable. Longer life-times can be provided in one modification of BR - the "blue" membrane BR [2], however currently available films are characterized by both low diffraction efficiency and difficulties in providing photoreversible recording. In addition, as a dynamic recording material, the BR requires different wavelengths for recording and reconstructing of optical data in order to prevent the information erasure during its readout. This fact also put constraints on a BR-based Optical Memory, due to information loss in holographic memory systems employing the two-lambda technique for reading-writing thick multiplexed holograms.

Memory engram storage and retrieval.

PubMed

Tonegawa, Susumu; Pignatelli, Michele; Roy, Dheeraj S; Ryan, Tomás J

2015-12-01

A great deal of experimental investment is directed towards questions regarding the mechanisms of memory storage. Such studies have traditionally been restricted to investigation of the anatomical structures, physiological processes, and molecular pathways necessary for the capacity of memory storage, and have avoided the question of how individual memories are stored in the brain. Memory engram technology allows the labeling and subsequent manipulation of components of specific memory engrams in particular brain regions, and it has been established that cell ensembles labeled by this method are both sufficient and necessary for memory recall. Recent research has employed this technology to probe fundamental questions of memory consolidation, differentiating between mechanisms of memory retrieval from the true neurobiology of memory storage. Copyright © 2015 The Authors. Published by Elsevier Ltd.. All rights reserved.

The impact of multiple memory formation on dendritic complexity in the hippocampus and anterior cingulate cortex assessed at recent and remote time points

PubMed Central

Wartman, Brianne C.; Holahan, Matthew R.

2014-01-01

Consolidation processes, involving synaptic and systems level changes, are suggested to stabilize memories once they are formed. At the synaptic level, dendritic structural changes are associated with long-term memory storage. At the systems level, memory storage dynamics between the hippocampus and anterior cingulate cortex (ACC) may be influenced by the number of sequentially encoded memories. The present experiment utilized Golgi-Cox staining and neuron reconstruction to examine recent and remote structural changes in the hippocampus and ACC following training on three different behavioral procedures. Rats were trained on one hippocampal-dependent task only (a water maze task), two hippocampal-dependent tasks (a water maze task followed by a radial arm maze task), or one hippocampal-dependent and one non-hippocampal-dependent task (a water maze task followed by an operant conditioning task). Rats were euthanized recently or remotely. Brains underwent Golgi-Cox processing and neurons were reconstructed using Neurolucida software (MicroBrightField, Williston, VT, USA). Rats trained on two hippocampal-dependent tasks displayed increased dendritic complexity compared to control rats, in neurons examined in both the ACC and hippocampus at recent and remote time points. Importantly, this behavioral group showed consistent, significant structural differences in the ACC compared to the control group at the recent time point. These findings suggest that taxing the demand placed upon the hippocampus, by training rats on two hippocampal-dependent tasks, engages synaptic and systems consolidation processes in the ACC at an accelerated rate for recent and remote storage of spatial memories. PMID:24795581

Dopaminergic neurons write and update memories with cell-type-specific rules

PubMed Central

Aso, Yoshinori; Rubin, Gerald M

2016-01-01

Associative learning is thought to involve parallel and distributed mechanisms of memory formation and storage. In Drosophila, the mushroom body (MB) is the major site of associative odor memory formation. Previously we described the anatomy of the adult MB and defined 20 types of dopaminergic neurons (DANs) that each innervate distinct MB compartments (Aso et al., 2014a, 2014b). Here we compare the properties of memories formed by optogenetic activation of individual DAN cell types. We found extensive differences in training requirements for memory formation, decay dynamics, storage capacity and flexibility to learn new associations. Even a single DAN cell type can either write or reduce an aversive memory, or write an appetitive memory, depending on when it is activated relative to odor delivery. Our results show that different learning rules are executed in seemingly parallel memory systems, providing multiple distinct circuit-based strategies to predict future events from past experiences. DOI: http://dx.doi.org/10.7554/eLife.16135.001 PMID:27441388

If It Is Stored in My Memory I Will Surely Retrieve It: Anatomy of a Metacognitive Belief

ERIC Educational Resources Information Center

Kornell, Nate

2015-01-01

Retrieval failures--moments when a memory will not come to mind--are a universal human experience. Yet many laypeople believe human memory is a reliable storage system in which a stored memory should be accessible. I predicted that people would see retrieval failures as aberrations and predict that fewer retrieval failures would happen in the…

The Longevity of Hippocampus-Dependent Memory Is Orchestrated by the Locus Coeruleus-Noradrenergic System

PubMed Central

2017-01-01

The locus coeruleus is connected to the dorsal hippocampus via strong fiber projections. It becomes activated after arousal and novelty, whereupon noradrenaline is released in the hippocampus. Noradrenaline from the locus coeruleus is involved in modulating the encoding, consolidation, retrieval, and reversal of hippocampus-based memory. Memory storage can be modified by the activation of the locus coeruleus and subsequent facilitation of hippocampal long-term plasticity in the forms of long-term depression and long-term potentiation. Recent evidence indicates that noradrenaline and dopamine are coreleased in the hippocampus from locus coeruleus terminals, thus fostering neuromodulation of long-term synaptic plasticity and memory. Noradrenaline is an inductor of epigenetic modifications regulating transcriptional control of synaptic long-term plasticity to gate the endurance of memory storage. In conclusion, locus coeruleus activation primes the persistence of hippocampus-based long-term memory. PMID:28695015

Peregrine System | High-Performance Computing | NREL

Science.gov Websites

) and longer-term (/projects) storage. These file systems are mounted on all nodes. Peregrine has three -2670 Xeon processors and 64 GB of memory. In addition to mounting the /home, /nopt, /projects and # cores/node Memory/node Peak (DP) performance per node 88 Intel Xeon E5-2670 "Sandy Bridge" 8

The Global File System

NASA Technical Reports Server (NTRS)

Soltis, Steven R.; Ruwart, Thomas M.; OKeefe, Matthew T.

1996-01-01

The global file system (GFS) is a prototype design for a distributed file system in which cluster nodes physically share storage devices connected via a network-like fiber channel. Networks and network-attached storage devices have advanced to a level of performance and extensibility so that the previous disadvantages of shared disk architectures are no longer valid. This shared storage architecture attempts to exploit the sophistication of storage device technologies whereas a server architecture diminishes a device's role to that of a simple component. GFS distributes the file system responsibilities across processing nodes, storage across the devices, and file system resources across the entire storage pool. GFS caches data on the storage devices instead of the main memories of the machines. Consistency is established by using a locking mechanism maintained by the storage devices to facilitate atomic read-modify-write operations. The locking mechanism is being prototyped in the Silicon Graphics IRIX operating system and is accessed using standard Unix commands and modules.

Growth in literacy, cognition, and working memory in English language learners.

PubMed

Lee Swanson, H; Orosco, Michael J; Lussier, Catherine M

2015-04-01

This cohort sequential study explored the components of working memory that underlie English reading and language acquisition in elementary school children whose first language is Spanish. To this end, children (N=410) in Grades 1, 2, and 3 at Wave 1 were administered a battery of cognitive (short-term memory [STM], working memory [WM], rapid naming, phonological processing, and random letter and number generation), vocabulary, and reading measures in both Spanish and English. These same measures were administered 1 and 2 years later. The results showed that (a) a three-factor structure (phonological STM, visual-spatial WM, and verbal WM) captured the data within both language systems, (b) growth in both the executive and STM storage components was uniquely related to growth in second language (L2) reading and language acquisition, and (c) the contribution of growth in the executive component of WM to growth in L2 processing was independent of growth in storage, phonological knowledge, inhibition, and rapid naming speed. The results suggested that growth in the phonological storage system does not supersede growth of the executive component of WM as a major contributor to growth in children's L2 reading and language. Copyright © 2015 Elsevier Inc. All rights reserved.

Endurance cycling results in extreme environments

NASA Technical Reports Server (NTRS)

Guertin, S. M.; Nguyen, D. N.; Scheick, L. Z.

2003-01-01

A new test bed for life testing flash memories in extreme environments is introducted. the test bed is based on a state-of-the-art development board. Since space applications often desire state-of-the-art devices, such a basis seems appropriate. Comparison of this tester to other such systems, including those with data presented here in the past is made. Limitations of different testers for varying applications are discussed. Recently developed data, using this test bed is also presented.

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

Validation Test Report for the Automated Optical Processing System (AOPS) Version 4.8

DTIC Science & Technology

2013-06-28

be familiar with UNIX; BASH shell programming; and remote sensing, particularly regarding computer processing of satellite data. The system memory ...and storage requirements are difficult to gauge. The amount of memory needed is dependent upon the amount and type of satellite data you wish to...process; the larger the area, the larger the memory requirement. For example, the entire Atlantic Ocean will require more processing power than the

In search of a recognition memory engram

PubMed Central

Brown, M.W.; Banks, P.J.

2015-01-01

A large body of data from human and animal studies using psychological, recording, imaging, and lesion techniques indicates that recognition memory involves at least two separable processes: familiarity discrimination and recollection. Familiarity discrimination for individual visual stimuli seems to be effected by a system centred on the perirhinal cortex of the temporal lobe. The fundamental change that encodes prior occurrence within the perirhinal cortex is a reduction in the responses of neurones when a stimulus is repeated. Neuronal network modelling indicates that a system based on such a change in responsiveness is potentially highly efficient in information theoretic terms. A review is given of findings indicating that perirhinal cortex acts as a storage site for recognition memory of objects and that such storage depends upon processes producing synaptic weakening. PMID:25280908

DOE Office of Scientific and Technical Information (OSTI.GOV)

An, Ho-Myoung; Kim, Hee-Dong; Kim, Tae Geun, E-mail: tgkim1@korea.ac.kr

Graphical abstract: The degradation tendency extracted by CP technique was almost the same in both the bulk-type and TFT-type cells. - Highlights: • D{sub it} is directly investigated from bulk-type and TFT-type CTF memory. • Charge pumping technique was employed to analyze the D{sub it} information. • To apply the CP technique to monitor the reliability of the 3D NAND flash. - Abstract: The energy distribution and density of interface traps (D{sub it}) are directly investigated from bulk-type and thin-film transistor (TFT)-type charge trap flash memory cells with tunnel oxide degradation, under program/erase (P/E) cycling using a charge pumping (CP)more » technique, in view of application in a 3-demension stackable NAND flash memory cell. After P/E cycling in bulk-type devices, the interface trap density gradually increased from 1.55 × 10{sup 12} cm{sup −2} eV{sup −1} to 3.66 × 10{sup 13} cm{sup −2} eV{sup −1} due to tunnel oxide damage, which was consistent with the subthreshold swing and transconductance degradation after P/E cycling. Its distribution moved toward shallow energy levels with increasing cycling numbers, which coincided with the decay rate degradation with short-term retention time. The tendency extracted with the CP technique for D{sub it} of the TFT-type cells was similar to those of bulk-type cells.« less

Phonological and Sensory Short-Term Memory Are Correlates and Both Affected in Developmental Dyslexia

ERIC Educational Resources Information Center

Laasonen, Marja; Virsu, Veijo; Oinonen, Suvi; Sandbacka, Mirja; Salakari, Anita; Service, Elisabet

2012-01-01

We investigated whether poor short-term memory (STM) in developmental dyslexia affects the processing of sensory stimulus sequences in addition to phonological material. STM for brief binary non-verbal stimuli (light flashes, tone bursts, finger touches, and their crossmodal combinations) was studied in 20 Finnish adults with dyslexia and 24…

[Development of a video image system for wireless capsule endoscopes based on DSP].

PubMed

Yang, Li; Peng, Chenglin; Wu, Huafeng; Zhao, Dechun; Zhang, Jinhua

2008-02-01

A video image recorder to record video picture for wireless capsule endoscopes was designed. TMS320C6211 DSP of Texas Instruments Inc. is the core processor of this system. Images are periodically acquired from Composite Video Broadcast Signal (CVBS) source and scaled by video decoder (SAA7114H). Video data is transported from high speed buffer First-in First-out (FIFO) to Digital Signal Processor (DSP) under the control of Complex Programmable Logic Device (CPLD). This paper adopts JPEG algorithm for image coding, and the compressed data in DSP was stored to Compact Flash (CF) card. TMS320C6211 DSP is mainly used for image compression and data transporting. Fast Discrete Cosine Transform (DCT) algorithm and fast coefficient quantization algorithm are used to accelerate operation speed of DSP and decrease the executing code. At the same time, proper address is assigned for each memory, which has different speed;the memory structure is also optimized. In addition, this system uses plenty of Extended Direct Memory Access (EDMA) to transport and process image data, which results in stable and high performance.

Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.

PubMed

Kim, Seung-Yoon; Park, Jong Kyung; Hwang, Wan Sik; Lee, Seung-Jun; Lee, Ki-Hong; Pyi, Seung Ho; Cho, Byung Jin

2016-05-01

We investigated the dependence of grain size on the performance of a polycrystalline silicon (poly-Si) channel TFT for application to 3D NAND Flash memory devices. It has been found that the device performance and memory characteristics are strongly affected by the grain size of the poly-Si channel. Higher on-state current, faster program speed, and poor endurance/reliability properties are observed when the poly-Si grain size is large. These are mainly attributed to the different local electric field induced by an oxide valley at the interface between the poly-Si channel and the gate oxide. In addition, the trap density at the gate oxide interface was successfully measured using a charge pumping method by the separation between the gate oxide interface traps and traps at the grain boundaries in the poly-Si channel. The poly-Si channel with larger grain size has lower interface trap density.

Memory Decline in Peri- and Post-menopausal Women: The Potential of Mind–Body Medicine to Improve Cognitive Performance

PubMed Central

Sliwinski, Jim R; Johnson, Aimee K; Elkins, Gary R

2014-01-01

Cognitive decline is a frequent complaint during the menopause transition and among post-menopausal women. Changes in memory correspond with diminished estrogen production. Further, many peri- and post-menopausal women report sleep concerns, depression, and hot flashes, and these factors may contribute to cognitive decline. Hormone therapy can increase estrogen but is contraindicated for many women. Mind–body medicine has been shown to have beneficial effects on sleep, mood, and hot flashes, among post-menopausal women. Further, mind–body medicine holds potential in addressing symptoms of cognitive decline post-menopause. This study proposes an initial framework for how mind–body interventions may improve cognitive performance and inform future research seeking to identify the common and specific factors associated with mind–body medicine for addressing memory decline in peri- and post-menopausal women. It is our hope that this article will eventually lead to a more holistic and integrative approach to the treatment of cognitive deficits in peri- and post-menopausal women. PMID:25125972

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

NASA Astrophysics Data System (ADS)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

Precision spectral manipulation of optical pulses using a coherent photon echo memory.

PubMed

Buchler, B C; Hosseini, M; Hétet, G; Sparkes, B M; Lam, P K

2010-04-01

Photon echo schemes are excellent candidates for high efficiency coherent optical memory. They are capable of high-bandwidth multipulse storage, pulse resequencing and have been shown theoretically to be compatible with quantum information applications. One particular photon echo scheme is the gradient echo memory (GEM). In this system, an atomic frequency gradient is induced in the direction of light propagation leading to a Fourier decomposition of the optical spectrum along the length of the storage medium. This Fourier encoding allows precision spectral manipulation of the stored light. In this Letter, we show frequency shifting, spectral compression, spectral splitting, and fine dispersion control of optical pulses using GEM.

ELECTROSTATIC MEMORY SYSTEM

DOEpatents

Chu, J.C.

1958-09-23

An improved electrostatic memory system is de scribed fer a digital computer wherein a plarality of storage tubes are adapted to operate in either of two possible modes. According to the present irvention, duplicate storage tubes are provided fur each denominational order of the several binary digits. A single discriminator system is provided between corresponding duplicate tubes to determine the character of the infurmation stored in each. If either tube produces the selected type signal, corresponding to binazy "1" in the preferred embodiment, a "1" is regenerated in both tubes. In one mode of operation each bit of information is stored in two corresponding tubes, while in the other mode of operation each bit is stored in only one tube in the conventional manner.

Extended write combining using a write continuation hint flag

DOEpatents

Chen, Dong; Gara, Alan; Heidelberger, Philip; Ohmacht, Martin; Vranas, Pavlos

2013-06-04

A computing apparatus for reducing the amount of processing in a network computing system which includes a network system device of a receiving node for receiving electronic messages comprising data. The electronic messages are transmitted from a sending node. The network system device determines when more data of a specific electronic message is being transmitted. A memory device stores the electronic message data and communicating with the network system device. A memory subsystem communicates with the memory device. The memory subsystem stores a portion of the electronic message when more data of the specific message will be received, and the buffer combines the portion with later received data and moves the data to the memory device for accessible storage.

The ILLIAC IV memory system: Current status and future possibilities

NASA Technical Reports Server (NTRS)

Stevenson, D. K.

1978-01-01

The future needs of researchers who will use the Illiac were examined and the requirements they will place on the memory system were evaluated. Various alternatives to replacing critical memory components were considered with regard to cost, risk, system impact, software requirements, and implementation schedules. The current system, its performance and status, and the limitations it places on possible enhancements are discussed as well as the planned enhancements to the Illiac processor. After a brief technology survey, different implementations are presented for each system memory component. Three different memory systems are proposed to meet the identified needs of the Illiac user community. These three alternatives differ considerably with respect to storage capacity and accessing capabilities, but they all offer significant improvements over the current system. The proposed systems and their relative merits are analyzed.

Gas flow calculation method of a ramjet engine

NASA Astrophysics Data System (ADS)

Kostyushin, Kirill; Kagenov, Anuar; Eremin, Ivan; Zhiltsov, Konstantin; Shuvarikov, Vladimir

2017-11-01

At the present study calculation methodology of gas dynamics equations in ramjet engine is presented. The algorithm is based on Godunov`s scheme. For realization of calculation algorithm, the system of data storage is offered, the system does not depend on mesh topology, and it allows using the computational meshes with arbitrary number of cell faces. The algorithm of building a block-structured grid is given. Calculation algorithm in the software package "FlashFlow" is implemented. Software package is verified on the calculations of simple configurations of air intakes and scramjet models.

DESIGN PRINCIPLES FOR AN ON-LINE INFORMATION RETRIEVAL SYSTEM. TECHNICAL REPORT.

ERIC Educational Resources Information Center

LOWE, THOMAS C.

AREAS INVESTIGATED INCLUDE SLOW MEMORY DATA STORAGE, THE PROBLEM OF DECODING FROM AN INDEX TO A SLOW MEMORY ADDRESS, THE STRUCTURE OF DATA LISTS AND DATA LIST OPERATORS, COMMUNICATIONS BETWEEN THE HUMAN USER AND THE SYSTEM, PROCESSING OF RETRIEVAL REQUESTS, AND THE USER'S CONTROL OVER THE RETURN OF INFORMATION RETRIEVED. LINEAR, LINKED AND…

Environmental Effects on Data Retention in Flash Cells

NASA Technical Reports Server (NTRS)

Katz, Rich; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Antifuse technology, prevalent in non-volatile field programmable gate arrays (FPGAs), will eventually be phased out as new devices have not been developed for approximately a decade. The reliance on flash technology presents a long-term reliability issue for both DoD and NASA safety- and mission-critical applications. A thorough understanding of the data retention failure modes and statistics associated with Flash data retention is of vital concern to the fuze safety community. A key retention parameter for a flash cell is the threshold voltage (VTH), which is an indirect indicator of the amount of charge stored on the cells floating gate. This paper will present the results of our on-going tests: long-term storage at 150 C for a small population of devices, neutron radiation exposure, electrostatic discharge (ESD) testing, and the trends of large populations (over 300 devices for each condition) exposed to three difference temperatures: 25 C, 125 C, and 150 C.

Overview of Probe-based Storage Technologies

NASA Astrophysics Data System (ADS)

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-07-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

Overview of Probe-based Storage Technologies.

PubMed

Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu

2016-12-01

The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.

A unified theory for systems and cellular memory consolidation.

PubMed

Dash, Pramod K; Hebert, April E; Runyan, Jason D

2004-04-01

The time-limited role of the hippocampus for explicit memory storage has been referred to as systems consolidation where learning-related changes occur first in the hippocampus followed by the gradual development of a more distributed memory trace in the neocortex. Recent experiments are beginning to show that learning induces plasticity-related molecular changes in the neocortex as well as in the hippocampus and with a similar time course. Present memory consolidation theories do not account for these findings. In this report, we present a theory (the C theory) that incorporates these new findings, provides an explanation for the length of time for hippocampal dependency, and that can account for the apparent longer consolidation periods in species with larger brains. This theory proposes that a process of cellular consolidation occurs in the hippocampus and in areas of the neocortex during and shortly after learning resulting in long-term memory storage in both areas. For a limited time, the hippocampus is necessary for memory retrieval, a process involving the coordinated reactivation of these areas. This reactivation is later mediated by longer extrahippocampal connectivity between areas. The delay in hippocampal-independent memory retrieval is the time it takes for gene products in these longer extrahippocampal projections to be transported from the soma to tagged synapses by slow axonal transport. This cellular transport event defines the period of hippocampal dependency and, thus, the duration of memory consolidation. The theoretical description for memory consolidation presented in this review provides alternative explanations for several experimental observations and presents a unification of the concepts of systems and cellular memory consolidation.

Optical memory development. Volume 1: prototype memory system

NASA Technical Reports Server (NTRS)

Cosentino, L. S.; Mezrich, R. S.; Nagle, E. M.; Stewart, W. C.; Wendt, F. S.

1972-01-01

The design, development, and implementation of a prototype, partially populated, million bit read-write holographic memory system using state-of-the-art components are described. The system employs an argon ion laser, acoustooptic beam deflectors, a holographic beam splitter (hololens), a nematic liquid crystal page composer, a photoconductor-thermoplastic erasable storage medium, a silicon P-I-N photodiode array, with lenses and electronics of both conventional and custom design. Operation of the prototype memory system was successfully demonstrated. Careful attention is given to the analysis from which the design criteria were developed. Specifications for the major components are listed, along with the details of their construction and performance. The primary conclusion resulting from this program is that the basic principles of read-write holographic memory system are well understood and are reducible to practice.

Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schreiber, Robert

Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports variousmore » NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint ReRAM array [Niu 2012b]. We have conducted an in depth analysis of the circuit and system level design implications of multi-layer cross-point Resistive RAM (MLCReRAM) from performance, power and reliability perspectives [Xu 2013]. The objective of this study is to understand the design trade-offs of this technology with respect to the MLC Phase Change Memory (MLCPCM).Our MLC ReRAM design at the circuit and system levels indicates that different resistance allocation schemes, programming strategies, peripheral designs, and material selections profoundly affect the area, latency, power, and reliability of MLC ReRAM. Based on this analysis, we conduct two case studies: first we compare MLC ReRAM design against MLC phase-change memory (PCM) and multi-layer cross-point ReRAM design, and point out why multi-level ReRAM is appealing; second we further explore the design space for MLC ReRAM. Architecture and Application We explored hybrid checkpointing using phase-change memory for future exascale systems [Dong 2011] and showed that the use of nonvolatile memory for local checkpointing significantly increases the number of faults covered by local checkpoints and reduces the probability of a global failure in the middle of a global checkpoint to less than 1%. We also proposed a technique called i2WAP to mitigate the write variations in NVM-based last-level cache for the improvement of the NVM lifetime [Wang 2013]. Our wear leveling technique attempts to work around the limitations of write endurance by arranging data access so that write operations can be distributed evenly across all the storage cells. During our intensive research on fault-tolerant NVM design, we found that ECC cannot effectively tolerate hard errors from limited write endurance and process imperfection. Therefore, we devised a novel Point and Discard (PAD) architecture in in [ 2012] as a hard-error-tolerant architecture for ReRAM-based Last Level Caches. PAD improves the lifetime of ReRAM caches by 1.6X-440X under different process variations without performance overhead in the system's early life. We have investigated the applicability of NVM for persistent memory design [Zhao 2013]. New byte addressable NVM enables fast persistent memory that allows in-memory persistent data objects to be updated with much higher throughput. Despite the significant improvement, the performance of these designs is only 50% of the native system with no persistence support, due to the logging or copy-on-write mechanisms used to update the persistent memory. A challenge in this approach is therefore how to efficiently enable atomic, consistent, and durable updates to ensure data persistence that survives application and/or system failures. We have designed a persistent memory system, called Klin, that can provide performance as close as that of the native system. The Klin design adopts a non-volatile cache and a non-volatile main memory for constructing a multi-versioned durable memory system, enabling atomic updates without logging or copy-on-write. Our evaluation shows that the proposed Kiln mechanism can achieve up to 2X of performance improvement to NVRAM-based persistent memory employing write-ahead logging. In addition, our design has numerous practical advantages: a simple and intuitive abstract interface, microarchitecture-level optimizations, fast recovery from failures, and no redundant writes to slow non-volatile storage media. The work was published in MICRO 2013 and received Best Paper Honorable Mentioned Award.« less

Combined Acquisition/Processing For Data Reduction

NASA Astrophysics Data System (ADS)

Kruger, Robert A.

1982-01-01

Digital image processing systems necessarily consist of three components: acquisition, storage/retrieval and processing. The acquisition component requires the greatest data handling rates. By coupling together the acquisition witn some online hardwired processing, data rates and capacities for short term storage can be reduced. Furthermore, long term storage requirements can be reduced further by appropriate processing and editing of image data contained in short term memory. The net result could be reduced performance requirements for mass storage, processing and communication systems. Reduced amounts of data also snouid speed later data analysis and diagnostic decision making.

Scalable quantum memory in the ultrastrong coupling regime.

PubMed

Kyaw, T H; Felicetti, S; Romero, G; Solano, E; Kwek, L-C

2015-03-02

Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances.

Scalable quantum memory in the ultrastrong coupling regime

PubMed Central

Kyaw, T. H.; Felicetti, S.; Romero, G.; Solano, E.; Kwek, L.-C.

2015-01-01

Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z2 parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances. PMID:25727251

Memory and neural networks on the basis of color centers in solids.

PubMed

Winnacker, Albrecht; Osvet, Andres

2009-11-01

Optical data recording is one of the most widely used and efficient systems of memory in the non-living world. The application of color centers in this context offers not only systems of high speed in writing and read-out due to a high degree of parallelism in data handling but also a possibility to set up models of neural networks. In this way, systems with a high potential for image processing, pattern recognition and logical operations can be constructed. A limitation to storage density is given by the diffraction limit of optical data recording. It is shown that this limitation can at least in principle be overcome by the principle of spectral hole burning, which results in systems of storage capacities close to the human brain system.

The NEEDS Data Base Management and Archival Mass Memory System

NASA Technical Reports Server (NTRS)

Bailey, G. A.; Bryant, S. B.; Thomas, D. T.; Wagnon, F. W.

1980-01-01

A Data Base Management System and an Archival Mass Memory System are being developed that will have a 10 to the 12th bit on-line and a 10 to the 13th off-line storage capacity. The integrated system will accept packetized data from the data staging area at 50 Mbps, create a comprehensive directory, provide for file management, record the data, perform error detection and correction, accept user requests, retrieve the requested data files and provide the data to multiple users at a combined rate of 50 Mbps. Stored and replicated data files will have a bit error rate of less than 10 to the -9th even after ten years of storage. The integrated system will be demonstrated to prove the technology late in 1981.

Spacecraft optical disk recorder memory buffer control

NASA Technical Reports Server (NTRS)

Hodson, Robert F.

1993-01-01

This paper discusses the research completed under the NASA-ASEE summer faculty fellowship program. The project involves development of an Application Specific Integrated Circuit (ASIC) to be used as a Memory Buffer Controller (MBC) in the Spacecraft Optical Disk System (SODR). The SODR system has demanding capacity and data rate specifications requiring specialized electronics to meet processing demands. The system is being designed to support Gigabit transfer rates with Terabit storage capability. The complete SODR system is designed to exceed the capability of all existing mass storage systems today. The ASIC development for SODR consist of developing a 144 pin CMOS device to perform format conversion and data buffering. The final simulations of the MBC were completed during this summer's NASA-ASEE fellowship along with design preparations for fabrication to be performed by an ASIC manufacturer.

77 FR 74222 - Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-12-13

..., California; Kingston Technology Co., Inc. of Fountain Valley, California; Logitek International S.A. (``LISA...: Clint Gerdine, Esq., Office of the General Counsel, U.S. International Trade Commission, 500 E Street SW....m. to 5:15 p.m.) in the Office of the Secretary, U.S. International Trade Commission, 500 E Street...

KSC-04PD-1812

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, United Space Alliance worker Craig Meyer fits an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04PD-1813

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, an External Tank (ET) digital still camera is positioned into the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis to determine if it fits properly. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1813

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, an External Tank (ET) digital still camera is positioned into the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis to determine if it fits properly. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1812

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, United Space Alliance worker Craig Meyer fits an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

The design of a wireless batteryless biflash installation with high power LEDs

NASA Astrophysics Data System (ADS)

Cappelle, J.; De Geest, W.; Hanselaer, P.

2011-05-01

Adding flashlights at crosswalks may make these weak traffic points safer. Unfortunately plugging in traffic lights into the electrical grid is expensive and complex. This paper reports about the energetic, the electronic and the optical design and building of a wireless and batteryless biflash installation in the framework of a flemish SME supporting program. The energy is supplied by a small solar panel and is buffered by supercapacitors instead of batteries. This has the advantage of being maintenance free: the number of charge-discharge cycles is almost unlimited because there is no chemical reaction involved in the storage mechanism. On the other hand the limited energy storage capacity of supercapacitors requires a new approach for the system design. Based on the EN-12352 standard for warning light devices, all design choices were filled in to be as energy efficient as possible. The duty cycle and the light output of the high power led flashlights are minimized. The components for the electronic circuits for the led driver, the control and the RF communication are selected based on their energy consumption and power management techniques are implemented. A lot of energy is saved by making the biflash system active. The leds are only flashing on demand or at preprogrammed moments. A biflash installation is typically installed at both sides of a crosswalk. A call at one of the sides should result in flashing at both sides. To maintain the drag and drop principle, a wireless RF communication system is designed.

Frontal Neurons Modulate Memory Retrieval across Widely Varying Temporal Scales

ERIC Educational Resources Information Center

Zhang, Wen-Hua; Williams, Ziv M.

2015-01-01

Once a memory has formed, it is thought to undergo a gradual transition within the brain from short- to long-term storage. This putative process, however, also poses a unique problem to the memory system in that the same learned items must also be retrieved across broadly varying time scales. Here, we find that neurons in the ventrolateral…

Assessing the Relationship of Working Memory to L2 Reading: Does the Nature of Comprehension Process and Reading Span Task Make a Difference?

ERIC Educational Resources Information Center

Alptekin, Cem; Ercetin, Gulcan

2009-01-01

Although an important role has been ascribed to working-memory capacity in reading comprehension, little consensus exists on its conceptualization, operationalization, and measurement except for its recognition as a limited-capacity processing and storage system. One specific problem in the measurement of working memory comes from researchers' use…

In search of a recognition memory engram.

PubMed

Brown, M W; Banks, P J

2015-03-01

A large body of data from human and animal studies using psychological, recording, imaging, and lesion techniques indicates that recognition memory involves at least two separable processes: familiarity discrimination and recollection. Familiarity discrimination for individual visual stimuli seems to be effected by a system centred on the perirhinal cortex of the temporal lobe. The fundamental change that encodes prior occurrence within the perirhinal cortex is a reduction in the responses of neurones when a stimulus is repeated. Neuronal network modelling indicates that a system based on such a change in responsiveness is potentially highly efficient in information theoretic terms. A review is given of findings indicating that perirhinal cortex acts as a storage site for recognition memory of objects and that such storage depends upon processes producing synaptic weakening. Copyright © 2014 The Authors. Published by Elsevier Ltd.. All rights reserved.

Fabry-Perot confocal resonator optical associative memory

NASA Astrophysics Data System (ADS)

Burns, Thomas J.; Rogers, Steven K.; Vogel, George A.

1993-03-01

A unique optical associative memory architecture is presented that combines the optical processing environment of a Fabry-Perot confocal resonator with the dynamic storage and recall properties of volume holograms. The confocal resonator reduces the size and complexity of previous associative memory architectures by folding a large number of discrete optical components into an integrated, compact optical processing environment. Experimental results demonstrate the system is capable of recalling a complete object from memory when presented with partial information about the object. A Fourier optics model of the system's operation shows it implements a spatially continuous version of a discrete, binary Hopfield neural network associative memory.

High efficiency coherent optical memory with warm rubidium vapour

PubMed Central

Hosseini, M.; Sparkes, B.M.; Campbell, G.; Lam, P.K.; Buchler, B.C.

2011-01-01

By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory. PMID:21285952

High efficiency coherent optical memory with warm rubidium vapour.

PubMed

Hosseini, M; Sparkes, B M; Campbell, G; Lam, P K; Buchler, B C

2011-02-01

By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory.

Single-nitrogen-vacancy-center quantum memory for a superconducting flux qubit mediated by a ferromagnet

NASA Astrophysics Data System (ADS)

Lai, Yen-Yu; Lin, Guin-Dar; Twamley, Jason; Goan, Hsi-Sheng

2018-05-01

We propose a quantum memory scheme to transfer and store the quantum state of a superconducting flux qubit (FQ) into the electron spin of a single nitrogen-vacancy (NV) center in diamond via yttrium iron garnet (YIG), a ferromagnet. Unlike an ensemble of NV centers, the YIG moderator can enhance the effective FQ-NV-center coupling strength without introducing additional appreciable decoherence. We derive the effective interaction between the FQ and the NV center by tracing out the degrees of freedom of the collective mode of the YIG spins. We demonstrate the transfer, storage, and retrieval procedures, taking into account the effects of spontaneous decay and pure dephasing. Using realistic experimental parameters for the FQ, NV center and YIG, we find that a combined transfer, storage, and retrieval fidelity higher than 0.9, with a long storage time of 10 ms, can be achieved. This hybrid system not only acts as a promising quantum memory, but also provides an example of enhanced coupling between various systems through collective degrees of freedom.

The Relationship between Processing and Storage in Working Memory Span: Not Two Sides of the Same Coin

ERIC Educational Resources Information Center

Maehara, Yukio; Saito, Satoru

2007-01-01

In working memory (WM) span tests, participants maintain memory items while performing processing tasks. In this study, we examined the impact of task processing requirements on memory-storage activities, looking at the stimulus order effect and the impact of storage requirements on processing activities, testing the processing time effect in WM…

Investigating of Memory - Colours of Intellectually Disabled Children and Virtual Game Addict Students

NASA Astrophysics Data System (ADS)

Sik Lányi, Cecília

We describe an investigation of memory colours. For this investigation Flash test software was developed. 75 observers used this test software in 4 groups: average elementary school children (aged: 8-9 years), intellectually disabled children (age: 9-15), virtual game addict university students (average age: 20) and university students who play with VR games rarely or never (average age: 20). In this pilot test we investigated the difference of memory colours of these 4 groups.

Training a Constitutional Dynamic Network for Effector Recognition: Storage, Recall, and Erasing of Information.

PubMed

Holub, Jan; Vantomme, Ghislaine; Lehn, Jean-Marie

2016-09-14

Constitutional dynamic libraries (CDLs) of hydrazones, acylhydrazones, and imines undergo reorganization and adaptation in response to chemical effectors (herein metal cations) via component exchange and selection. Such CDLs can be subjected to training by exposition to given effectors and keep memory of the information stored by interaction with a specific metal ion. The long-term storage of the acquired information into the set of constituents of the system allows for fast recognition on subsequent contacts with the same effector(s). Dynamic networks of constituents were designed to adapt orthogonally to different metal cations by up- and down-regulation of specific constituents in the final distribution. The memory may be erased by component exchange between the constituents so as to regenerate the initial (statistical) distribution. The libraries described represent constitutional dynamic systems capable of acting as information storage molecular devices, in which the presence of components linked by reversible covalent bonds in slow exchange and bearing adequate coordination sites allows for the adaptation to different metal ions by constitutional variation. The system thus performs information storage, recall, and erase processes.

Synchronizing Photography For High-Speed-Engine Research

NASA Technical Reports Server (NTRS)

Chun, K. S.

1989-01-01

Light flashes when shaft reaches predetermined angle. Synchronization system facilitates visualization of flow in high-speed internal-combustion engines. Designed for cinematography and holographic interferometry, system synchronizes camera and light source with predetermined rotational angle of engine shaft. 10-bit resolution of absolute optical shaft encoder adapted, and 2 to tenth power combinations of 10-bit binary data computed to corresponding angle values. Pre-computed angle values programmed into EPROM's (erasable programmable read-only memories) to use as angle lookup table. Resolves shaft angle to within 0.35 degree at rotational speeds up to 73,240 revolutions per minute.

Cholinergic manipulations bidirectionally regulate object memory destabilization

PubMed Central

Stiver, Mikaela L.; Jacklin, Derek L.; Mitchnick, Krista A.; Vicic, Nevena; Carlin, Justine; O'Hara, Matthew

2015-01-01

Consolidated memories can become destabilized and open to modification upon retrieval. Destabilization is most reliably prompted when novel information is present during memory reactivation. We hypothesized that the neurotransmitter acetylcholine (ACh) plays an important role in novelty-induced memory destabilization because of its established involvement in new learning. Accordingly, we investigated the effects of cholinergic manipulations in rats using an object recognition paradigm that requires reactivation novelty to destabilize object memories. The muscarinic receptor antagonist scopolamine, systemically or infused directly into the perirhinal cortex, blocked this novelty-induced memory destabilization. Conversely, systemic oxotremorine or carbachol, muscarinic receptor agonists, administered systemically or intraperirhinally, respectively, mimicked the destabilizing effect of novel information during reactivation. These bidirectional effects suggest a crucial influence of ACh on memory destabilization and the updating functions of reconsolidation. This is a hitherto unappreciated mnemonic role for ACh with implications for its potential involvement in cognitive flexibility and the dynamic process of long-term memory storage. PMID:25776038

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Lingda; Hayes, Ari; Song, Shuaiwen

Modern GPUs employ cache to improve memory system efficiency. However, large amount of cache space is underutilized due to irregular memory accesses and poor spatial locality which exhibited commonly in GPU applications. Our experiments show that using smaller cache lines could improve cache space utilization, but it also frequently suffers from significant performance loss by introducing large amount of extra cache requests. In this work, we propose a novel cache design named tag-split cache (TSC) that enables fine-grained cache storage to address the problem of cache space underutilization while keeping memory request number unchanged. TSC divides tag into two partsmore » to reduce storage overhead, and it supports multiple cache line replacement in one cycle.« less

Engrams and Circuits Crucial for Systems Consolidation of a Memory

PubMed Central

Kitamura, Takashi; Ogawa, Sachie K.; Roy, Dheeraj S.; Okuyama, Teruhiro; Morrissey, Mark D.; Smith, Lillian M.; Redondo, Roger L.; Tonegawa, Susumu

2017-01-01

Episodic memories initially require rapid synaptic plasticity within the hippocampus for their formation and are gradually consolidated in neocortical networks for permanent storage. However, the engrams and circuits that support neocortical memory consolidation remain unknown. We found that neocortical prefrontal memory engram cells, critical for remote contextual fear memory, were rapidly generated during initial learning via inputs from both hippocampal-entorhinal cortex and basolateral amygdala. After their generation, the prefrontal engram cells, with support from hippocampal memory engram cells, became functionally mature with time. Whereas hippocampal engram cells gradually became silent with time, engram cells in the basolateral amygdala, which were necessary for fear memory, are maintained. Our data provide new insights into the functional reorganization of engrams and circuits underlying systems consolidation of memory. PMID:28386011

Scandium doped Ge2Sb2Te5 for high-speed and low-power-consumption phase change memory

NASA Astrophysics Data System (ADS)

Wang, Yong; Zheng, Yonghui; Liu, Guangyu; Li, Tao; Guo, Tianqi; Cheng, Yan; Lv, Shilong; Song, Sannian; Ren, Kun; Song, Zhitang

2018-03-01

To bridge the gap of access time between memories and storage systems, the concept of storage class memory has been put forward based on emerging nonvolatile memory technologies. For all the nonvolatile memory candidates, the unpleasant tradeoff between operation speed and retention seems to be inevitable. To promote both the write speed and the retention of phase change memory (PCM), Sc doped Ge2Sb2Te5 (SGST) has been proposed as the storage medium. Octahedral Sc-Te motifs, acting as crystallization precursors to shorten the nucleation incubation period, are the possible reason for the high write speed of 6 ns in PCM cells, five-times faster than that of Ge2Sb2Te5 (GST) cells. Meanwhile, an enhanced 10-year data retention of 119 °C has been achieved. Benefiting from both the increased crystalline resistance and the inhibited formation of the hexagonal phase, the SGST cell has a 77% reduction in power consumption compared to the GST cell. Adhesion of the SGST/SiO2 interface has been strengthened, attributed to the reduced stress by forming smaller grains during crystallization, guaranteeing the reliability of the device. These improvements have made the SGST material a promising candidate for PCM application.

Cognitive memory.

PubMed

Widrow, Bernard; Aragon, Juan Carlos

2013-05-01

Regarding the workings of the human mind, memory and pattern recognition seem to be intertwined. You generally do not have one without the other. Taking inspiration from life experience, a new form of computer memory has been devised. Certain conjectures about human memory are keys to the central idea. The design of a practical and useful "cognitive" memory system is contemplated, a memory system that may also serve as a model for many aspects of human memory. The new memory does not function like a computer memory where specific data is stored in specific numbered registers and retrieval is done by reading the contents of the specified memory register, or done by matching key words as with a document search. Incoming sensory data would be stored at the next available empty memory location, and indeed could be stored redundantly at several empty locations. The stored sensory data would neither have key words nor would it be located in known or specified memory locations. Sensory inputs concerning a single object or subject are stored together as patterns in a single "file folder" or "memory folder". When the contents of the folder are retrieved, sights, sounds, tactile feel, smell, etc., are obtained all at the same time. Retrieval would be initiated by a query or a prompt signal from a current set of sensory inputs or patterns. A search through the memory would be made to locate stored data that correlates with or relates to the prompt input. The search would be done by a retrieval system whose first stage makes use of autoassociative artificial neural networks and whose second stage relies on exhaustive search. Applications of cognitive memory systems have been made to visual aircraft identification, aircraft navigation, and human facial recognition. Concerning human memory, reasons are given why it is unlikely that long-term memory is stored in the synapses of the brain's neural networks. Reasons are given suggesting that long-term memory is stored in DNA or RNA. Neural networks are an important component of the human memory system, and their purpose is for information retrieval, not for information storage. The brain's neural networks are analog devices, subject to drift and unplanned change. Only with constant training is reliable action possible. Good training time is during sleep and while awake and making use of one's memory. A cognitive memory is a learning system. Learning involves storage of patterns or data in a cognitive memory. The learning process for cognitive memory is unsupervised, i.e. autonomous. Copyright © 2013 Elsevier Ltd. All rights reserved.

Modularity, Working Memory and Language Acquisition

ERIC Educational Resources Information Center

Baddeley, Alan D.

2017-01-01

The concept of modularity is used to contrast the approach to working memory proposed by Truscott with the Baddeley and Hitch multicomponent model. This proposes four sub components comprising the "central executive," an executive control system of limited attentional capacity that utilises storage based on separate but interlinked…

In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory.

PubMed

Hwang, Eun Suk; Kim, Jun Shik; Jeon, Seok Min; Lee, Seung Jun; Jang, Younjin; Cho, Deok-Yong; Hwang, Cheol Seong

2018-04-01

The programming characteristics of charge trap flash memory device adopting amorphous In 2 Ga 2 ZnO 7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm thick a-IGZO layer on a 20 nm thick SiO 2 (blocking oxide)/p ++ -Si (control gate) substrate, where 3 nm thick atomic layer deposited Al 2 O 3 (tunneling oxide) and 5 nm thick low-pressure CVD Si 3 N 4 (charge trap) layers were intervened between the a-IGZO and substrate. Despite the identical stoichiometry and other physicochemical properties of the MOCVD and sputtered a-IGZO, a much faster programming speed of MOCVD a-IGZO was observed. A comparable amount of oxygen vacancies was found in both MOCVD and sputtered a-IGZO, confirmed by x-ray photoelectron spectroscopy and bias-illumination-instability test measurements. Ultraviolet photoelectron spectroscopy analysis revealed a higher Fermi level (E F ) of the MOCVD a-IGZO (∼0.3 eV) film than that of the sputtered a-IGZO, which could be ascribed to the higher hydrogen concentration in the MOCVD a-IGZO film. Since the programming in a flash memory device is governed by the tunneling of electrons from the channel to charge trapping layer, the faster programming performance could be the result of a higher E F of MOCVD a-IGZO.

In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory

NASA Astrophysics Data System (ADS)

Hwang, Eun Suk; Kim, Jun Shik; Jeon, Seok Min; Lee, Seung Jun; Jang, Younjin; Cho, Deok-Yong; Hwang, Cheol Seong

2018-04-01

The programming characteristics of charge trap flash memory device adopting amorphous In2Ga2ZnO7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm thick a-IGZO layer on a 20 nm thick SiO2 (blocking oxide)/p++-Si (control gate) substrate, where 3 nm thick atomic layer deposited Al2O3 (tunneling oxide) and 5 nm thick low-pressure CVD Si3N4 (charge trap) layers were intervened between the a-IGZO and substrate. Despite the identical stoichiometry and other physicochemical properties of the MOCVD and sputtered a-IGZO, a much faster programming speed of MOCVD a-IGZO was observed. A comparable amount of oxygen vacancies was found in both MOCVD and sputtered a-IGZO, confirmed by x-ray photoelectron spectroscopy and bias-illumination-instability test measurements. Ultraviolet photoelectron spectroscopy analysis revealed a higher Fermi level (E F) of the MOCVD a-IGZO (∼0.3 eV) film than that of the sputtered a-IGZO, which could be ascribed to the higher hydrogen concentration in the MOCVD a-IGZO film. Since the programming in a flash memory device is governed by the tunneling of electrons from the channel to charge trapping layer, the faster programming performance could be the result of a higher E F of MOCVD a-IGZO.

Adaptive P300 based control system

PubMed Central

Jin, Jing; Allison, Brendan Z.; Sellers, Eric W.; Brunner, Clemens; Horki, Petar; Wang, Xingyu; Neuper, Christa

2015-01-01

An adaptive P300 brain-computer interface (BCI) using a 12 × 7 matrix explored new paradigms to improve bit rate and accuracy. During online use, the system adaptively selects the number of flashes to average. Five different flash patterns were tested. The 19-flash paradigm represents the typical row/column presentation (i.e., 12 columns and 7 rows). The 9- and 14-flash A & B paradigms present all items of the 12 × 7 matrix three times using either nine or 14 flashes (instead of 19), decreasing the amount of time to present stimuli. Compared to 9-flash A, 9-flash B decreased the likelihood that neighboring items would flash when the target was not flashing, thereby reducing interference from items adjacent to targets. 14-flash A also reduced adjacent item interference and 14-flash B additionally eliminated successive (double) flashes of the same item. Results showed that accuracy and bit rate of the adaptive system were higher than the non-adaptive system. In addition, 9- and 14-flash B produced significantly higher performance than their respective A conditions. The results also show the trend that the 14-flash B paradigm was better than the 19-flash pattern for naïve users. PMID:21474877

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Radiation Test Challenges for Scaled Commerical Memories

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

2007-01-01

As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

Mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Selinidis, Kosta S.; Jones, Chris; Doyle, Gary F.; Brown, Laura; Imhof, Joseph; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2011-11-01

The Jet and Flash Imprint Lithography (J-FILTM) process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105imprints. This suggests that tens of thousands of templates/masks will be required to satisfy the needs of a manufacturing environment. Electron-beam patterning is too slow to feasibly deliver these volumes, but instead can provide a high quality "master" mask which can be replicated many times with an imprint lithography tool. This strategy has the capability to produce the required supply of "working" templates/masks. In this paper, we review the development of the mask form factor, imprint replication tools and the semiconductor mask replication process. A PerfectaTM MR5000 mask replication tool has been developed specifically to pattern replica masks from an ebeam written master. Performance results, including image placement, critical dimension uniformity, and pattern transfer are covered in detail.

Content-Addressable Memory Storage by Neural Networks: A General Model and Global Liapunov Method,

DTIC Science & Technology

1988-03-01

point ex- ists. Liapunov functions were also described for Volterra -Lotka systems whose off-diagonal terms are relatively small (Kilmer, 1972...field, bidirectional associative memory, Volterra -Lotka, Gilpin-Ayala, and Eigen- Schuster models. The Cohen-Grossberg model thus defines a general...masking field, bidirectional associative memory. Volterra -Lotka, Gilpin-Ayala. and Eigen-Schuster models. The Cohen-Grossberg model thus defines a

Performance of real time associative memory using a photorefractive crystal and liquid crystal electrooptic switches

NASA Astrophysics Data System (ADS)

Xu, Haiying; Yuan, Yang; Yu, Youlong; Xu, Kebin; Xu, Yuhuan

1990-08-01

This paper presents a real time holographic associative memory implemented with photorefractive KNSBN:Co crystal as the memory element and a liquid crystal electrooptic switch array as the reflective thresholding device. The experiment stores and recalls two images and shows that the system has real-time multiple-image storage and recall functions. An associative memory with a dynamic threshold level to decide the closest match of an incomplete input is proposed.

MRAM Technology Status

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2013-01-01

Magnetoresistive Random Access Memory (MRAM) is much different from conventional types of memory like SRAM, DRAM, and Flash, where electric charge is used to store information. Instead of exploiting the charge of an electron, MRAM uses its spin to store data. This new type of electronics is known as "spintronics." The primary focus of this report is the current generation of MRAM technology, and its reliability, vendors, and space-readiness.

Research and implementation on improving I/O performance of streaming media storage system

NASA Astrophysics Data System (ADS)

Lu, Zheng-wu; Wang, Yu-de; Jiang, Guo-song

2008-12-01

In this paper, we study the special requirements of a special storage system: streaming media server, and propose a solution to improve I/O performance of RAID storage system. The solution is suitable for streaming media applications. A streaming media storage subsystem includes the I/O interfaces, RAID arrays, I/O scheduling and device drivers. The solution is implemented on the top of the storage subsystem I/O Interface. Storage subsystem is the performance bottlenecks of a streaming media system, and I/O interface directly affect the performance of the storage subsystem. According to theoretical analysis, 64 KB block-size is most appropriate for streaming media applications. We carry out experiment in detail, and verified that the proper block-size really is 64KB. It is in accordance with our analysis. The experiment results also show that by using DMA controller, efficient memory management technology and mailbox interface design mechanism, streaming media storage system achieves a high-speed data throughput.

Organization and Memory in Adulthood.

ERIC Educational Resources Information Center

Hultsch, David F.

This paper discusses organizational processes and memory in general and organizational processes and adult age differences in memory in particular. The simplest analysis of memory is to divide the process into two parts: storage and retrieval. Studies show that the limitation of memory lies primarily in retrieval rather than storage. Organization…

The Cognitive Neuroscience of Human Memory Since H.M

PubMed Central

Squire, Larry R.; Wixted, John T.

2011-01-01

Work with patient H.M., beginning in the 1950s, established key principles about the organization of memory that inspired decades of experimental work. Since H.M., the study of human memory and its disorders has continued to yield new insights and to improve understanding of the structure and organization of memory. Here we review this work with emphasis on the neuroanatomy of medial temporal lobe and diencephalic structures important for memory, multiple memory systems, visual perception, immediate memory, memory consolidation, the locus of long-term memory storage, the concepts of recollection and familiarity, and the question of how different medial temporal lobe structures may contribute differently to memory functions. PMID:21456960

System architecture of a gallium arsenide one-gigahertz digital IC tester

NASA Technical Reports Server (NTRS)

Fouts, Douglas J.; Johnson, John M.; Butner, Steven E.; Long, Stephen I.

1987-01-01

The design for a 1-GHz digital integrated circuit tester for the evaluation of custom GaAs chips and subsystems is discussed. Technology-related problems affecting the design of a GaAs computer are discussed, with emphasis on the problems introduced by long printed-circuit-board interconnect. High-speed interface modules provide a link between the low-speed microprocessor and the chip under test. Memory-multiplexer and memory-shift register architectures for the storage of test vectors are described in addition to an architecture for local data storage consisting of a long chain of GaAs shift registers. The tester is constructed around a VME system card cage and backplane, and very little high-speed interconnect exists between boards. The tester has a three part self-test consisting of a CPU board confidence test, a main memory confidence test, and a high-speed interface module functional test.

Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

NASA Technical Reports Server (NTRS)

Nelson, G. L.; Krahn, D. R.; Dean, R. H.; Paul, M. C.; Lo, D. S.; Amundsen, D. L.; Stein, G. A.

1985-01-01

The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

Sparse distributed memory overview

NASA Technical Reports Server (NTRS)

Raugh, Mike

1990-01-01

The Sparse Distributed Memory (SDM) project is investigating the theory and applications of massively parallel computing architecture, called sparse distributed memory, that will support the storage and retrieval of sensory and motor patterns characteristic of autonomous systems. The immediate objectives of the project are centered in studies of the memory itself and in the use of the memory to solve problems in speech, vision, and robotics. Investigation of methods for encoding sensory data is an important part of the research. Examples of NASA missions that may benefit from this work are Space Station, planetary rovers, and solar exploration. Sparse distributed memory offers promising technology for systems that must learn through experience and be capable of adapting to new circumstances, and for operating any large complex system requiring automatic monitoring and control. Sparse distributed memory is a massively parallel architecture motivated by efforts to understand how the human brain works. Sparse distributed memory is an associative memory, able to retrieve information from cues that only partially match patterns stored in the memory. It is able to store long temporal sequences derived from the behavior of a complex system, such as progressive records of the system's sensory data and correlated records of the system's motor controls.

Qualitative similarities in the visual short-term memory of pigeons and people.

PubMed

Gibson, Brett; Wasserman, Edward; Luck, Steven J

2011-10-01

Visual short-term memory plays a key role in guiding behavior, and individual differences in visual short-term memory capacity are strongly predictive of higher cognitive abilities. To provide a broader evolutionary context for understanding this memory system, we directly compared the behavior of pigeons and humans on a change detection task. Although pigeons had a lower storage capacity and a higher lapse rate than humans, both species stored multiple items in short-term memory and conformed to the same basic performance model. Thus, despite their very different evolutionary histories and neural architectures, pigeons and humans have functionally similar visual short-term memory systems, suggesting that the functional properties of visual short-term memory are subject to similar selective pressures across these distant species.

82 FR 35991 - Certain Flash Memory Devices and Components Thereof; Notice of Commission Determination Not To...

Federal Register 2010, 2011, 2012, 2013, 2014

2017-08-02

... following respondents: SanDisk LLC of Milpitas, California; Western Digital Corporation of Irvine, California; Western Digital Technologies, Inc. of Milpitas, California; SanDisk Limited of Yokohama, Japan...

Coherent storage of temporally multimode light using a spin-wave atomic frequency comb memory

NASA Astrophysics Data System (ADS)

Gündoǧan, M.; Mazzera, M.; Ledingham, P. M.; Cristiani, M.; de Riedmatten, H.

2013-04-01

We report on the coherent and multi-temporal mode storage of light using the full atomic frequency comb memory scheme. The scheme involves the transfer of optical atomic excitations in Pr3+:Y2SiO5 to spin waves in hyperfine levels using strong single-frequency transfer pulses. Using this scheme, a total of five temporal modes are stored and recalled on-demand from the memory. The coherence of the storage and retrieval is characterized using a time-bin interference measurement resulting in visibilities higher than 80%, independent of the storage time. This coherent and multimode spin-wave memory is promising as a quantum memory for light.

An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

NASA Technical Reports Server (NTRS)

Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

2001-01-01

Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

Fully Fueled TACOM Vehicle Storage Test Program.

DTIC Science & Technology

1981-12-01

Messrs. H. Hobart, T. Wilson, and T. Hinkley , DRSTA-GSP, U.S. Army Tank Automotive Command (TACOM) for providing both liai- son and fuel-sampling...and its characteristics are as follows: Density, g/ml 0.9 Flash point , *F 140 Fire point , *F 145 Pour point , *F -50 Neutralization No., TAN 25 TBN 130...following characteristics: Density, g/ml 1.05 Flash point , *F 144 Pour point , *F -27.5 Viscosity, cSt, @ 70*F 29 Boron content 7.4% Water (free

Dynamic Water Storage during Flash Flood Events in the Mountainous Area of Rio de Janeiro/Brazil - Case study: Piabanha River Basin

NASA Astrophysics Data System (ADS)

Araujo, L.; Silva, F. P. D.; Moreira, D. M.; Vásquez P, I. L.; Justi da Silva, M. G. A.; Fernandes, N.; Rotunno Filho, O. C.

2017-12-01

Flash floods are characterized by a rapid rise in water levels, high flow rates and large amounts of debris. Several factors have relevance to the occurrence of these phenomena, including high precipitation rates, terrain slope, soil saturation degree, vegetation cover, soil type, among others. In general, the greater the precipitation intensity, the more likely is the occurrence of a significant increase in flow rate. Particularly on steep and rocky plains or heavily urbanized areas, relatively small rain rates can trigger a flash flood event. In addition, high rain rates in short time intervals can temporarily saturate the surface soil layer acting as waterproofing and favoring the occurrence of greater runoff rates due to non-infiltration of rainwater into the soil. Thus, although precipitation is considered the most important factor for flooding, the interaction between rainfall and the soil can sometimes be of greater importance. In this context, this work investigates the dynamic storage of water associated with flash flood events for Quitandinha river watershed, a tributary of Piabanha river, occurred between 2013 and 2014, by means of water balance analyses applied to three watersheds of varying magnitudes (9.25 km², 260 km² and 429 km²) along the rainy season under different time steps (hourly and daily) using remotely sensed and observational precipitation data. The research work is driven by the hypothesis of a hydrologically active bedrock layer, as the watershed is located in a humid region, having intemperate (fractured) rock layer, just below a shallow soil layer, in the higher part of the basin where steep slopes prevail. The results showed a delay of the variation of the dynamic storage in relation to rainfall peaks and water levels. Such behavior indicates that the surface soil layer, which is not very thick in the region, becomes rapidly saturated along rainfall events. Subsequently, the water infiltrates into the rocky layer and the water storage in the fractured bedrock assumes significant role due to its corresponding release to streams as storm flows.

TMS-induced neural noise in sensory cortex interferes with short-term memory storage in prefrontal cortex.

PubMed

Bancroft, Tyler D; Hogeveen, Jeremy; Hockley, William E; Servos, Philip

2014-01-01

In a previous study, Harris et al. (2002) found disruption of vibrotactile short-term memory after applying single-pulse transcranial magnetic stimulation (TMS) to primary somatosensory cortex (SI) early in the maintenance period, and suggested that this demonstrated a role for SI in vibrotactile memory storage. While such a role is compatible with recent suggestions that sensory cortex is the storage substrate for working memory, it stands in contrast to a relatively large body of evidence from human EEG and single-cell recording in primates that instead points to prefrontal cortex as the storage substrate for vibrotactile memory. In the present study, we use computational methods to demonstrate how Harris et al.'s results can be reproduced by TMS-induced activity in sensory cortex and subsequent feedforward interference with memory traces stored in prefrontal cortex, thereby reconciling discordant findings in the tactile memory literature.

Brain Region-Specific Activity Patterns after Recent or Remote Memory Retrieval of Auditory Conditioned Fear

ERIC Educational Resources Information Center

Kwon, Jeong-Tae; Jhang, Jinho; Kim, Hyung-Su; Lee, Sujin; Han, Jin-Hee

2012-01-01

Memory is thought to be sparsely encoded throughout multiple brain regions forming unique memory trace. Although evidence has established that the amygdala is a key brain site for memory storage and retrieval of auditory conditioned fear memory, it remains elusive whether the auditory brain regions may be involved in fear memory storage or…

KSC-04PD-1810

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser prepare to conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04PD-1811

NASA Technical Reports Server (NTRS)

2004-01-01

KENNEDY SPACE CENTER, FLA. In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttles Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1811

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

KSC-04pd1810

NASA Image and Video Library

2004-09-17

KENNEDY SPACE CENTER, FLA. - In the Orbiter Processing Facility, from left, United Space Alliance workers Loyd Turner, Craig Meyer and Erik Visser prepare to conduct a fit check of an External Tank (ET) digital still camera in the right-hand liquid oxygen umbilical well on Space Shuttle Atlantis. NASA is pursuing use of the camera, beginning with the Shuttle’s Return To Flight, to obtain and downlink high-resolution images of the ET following separation of the ET from the orbiter after launch. The Kodak camera will record 24 images, at one frame per 1.5 seconds, on a flash memory card. After orbital insertion, the crew will transfer the images from the memory card to a laptop computer. The files will then be downloaded through the Ku-band system to the Mission Control Center in Houston for analysis.

A design of camera simulator for photoelectric image acquisition system

NASA Astrophysics Data System (ADS)

Cai, Guanghui; Liu, Wen; Zhang, Xin

2015-02-01

In the process of developing the photoelectric image acquisition equipment, it needs to verify the function and performance. In order to make the photoelectric device recall the image data formerly in the process of debugging and testing, a design scheme of the camera simulator is presented. In this system, with FPGA as the control core, the image data is saved in NAND flash trough USB2.0 bus. Due to the access rate of the NAND, flash is too slow to meet the requirement of the sytsem, to fix the problem, the pipeline technique and the High-Band-Buses technique are applied in the design to improve the storage rate. It reads image data out from flash in the control logic of FPGA and output separately from three different interface of Camera Link, LVDS and PAL, which can provide image data for photoelectric image acquisition equipment's debugging and algorithm validation. However, because the standard of PAL image resolution is 720*576, the resolution is different between PAL image and input image, so the image can be output after the resolution conversion. The experimental results demonstrate that the camera simulator outputs three format image sequence correctly, which can be captured and displayed by frame gather. And the three-format image data can meet test requirements of the most equipment, shorten debugging time and improve the test efficiency.

Device and methods for writing and erasing analog information in small memory units via voltage pulses

DOEpatents

El Gabaly Marquez, Farid; Talin, Albert Alec

2018-04-17

Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

Associative Memory Synthesis, Performance, Storage Capacity And Updating: New Heteroassociative Memory Results

NASA Astrophysics Data System (ADS)

Casasent, David; Telfer, Brian

1988-02-01

The storage capacity, noise performance, and synthesis of associative memories for image analysis are considered. Associative memory synthesis is shown to be very similar to that of linear discriminant functions used in pattern recognition. These lead to new associative memories and new associative memory synthesis and recollection vector encodings. Heteroassociative memories are emphasized in this paper, rather than autoassociative memories, since heteroassociative memories provide scene analysis decisions, rather than merely enhanced output images. The analysis of heteroassociative memories has been given little attention. Heteroassociative memory performance and storage capacity are shown to be quite different from those of autoassociative memories, with much more dependence on the recollection vectors used and less dependence on M/N. This allows several different and preferable synthesis techniques to be considered for associative memories. These new associative memory synthesis techniques and new techniques to update associative memories are included. We also introduce a new SNR performance measure that is preferable to conventional noise standard deviation ratios.

Electronic implementation of associative memory based on neural network models

NASA Technical Reports Server (NTRS)

Moopenn, A.; Lambe, John; Thakoor, A. P.

1987-01-01

An electronic embodiment of a neural network based associative memory in the form of a binary connection matrix is described. The nature of false memory errors, their effect on the information storage capacity of binary connection matrix memories, and a novel technique to eliminate such errors with the help of asymmetrical extra connections are discussed. The stability of the matrix memory system incorporating a unique local inhibition scheme is analyzed in terms of local minimization of an energy function. The memory's stability, dynamic behavior, and recall capability are investigated using a 32-'neuron' electronic neural network memory with a 1024-programmable binary connection matrix.

Functional integrity of the retrosplenial cortex is essential for rapid consolidation and recall of fear memory.

PubMed

Katche, Cynthia; Dorman, Guido; Slipczuk, Leandro; Cammarota, Martín; Medina, Jorge H

2013-03-15

Memory storage is a temporally graded process involving different phases and different structures in the mammalian brain. Cortical plasticity is essential to store stable memories, but little is known regarding its involvement in memory processing. Here we show that fear memory consolidation requires early post-training macromolecular synthesis in the anterior part of the retrosplenial cortex (aRSC), and that reversible pharmacological inactivation of this cortical region impairs recall of recent as well as of remote memories. These results challenge the generally accepted idea that neocortical areas are slow encoding systems that participate in the retrieval of remote memories only.

Modeling of a bubble-memory organization with self-checking translators to achieve high reliability.

NASA Technical Reports Server (NTRS)

Bouricius, W. G.; Carter, W. C.; Hsieh, E. P.; Wadia, A. B.; Jessep, D. C., Jr.

1973-01-01

Study of the design and modeling of a highly reliable bubble-memory system that has the capabilities of: (1) correcting a single 16-adjacent bit-group error resulting from failures in a single basic storage module (BSM), and (2) detecting with a probability greater than 0.99 any double errors resulting from failures in BSM's. The results of the study justify the design philosophy adopted of employing memory data encoding and a translator to correct single group errors and detect double group errors to enhance the overall system reliability.

Total ionizing dose effect in an input/output device for flash memory

NASA Astrophysics Data System (ADS)

Liu, Zhang-Li; Hu, Zhi-Yuan; Zhang, Zheng-Xuan; Shao, Hua; Chen, Ming; Bi, Da-Wei; Ning, Bing-Xu; Zou, Shi-Chang

2011-12-01

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

Analysis of the Evaluation of a New Glucose Meter with Integrated Self-Management Software and USB Connectivity

PubMed Central

Crowe, Daniel J

2011-01-01

Glucose meter technology has not kept up with the advances that have occurred in other sectors in mobile and health care technology. A new device that combines strip-based capillary blood glucose monitoring and USB flash drive technology is evaluated in an industry-funded study in a cohort of patients and health care professionals. The expanded memory capacity of flash drives allows the software program to be stored on the device for analyzing the blood glucose readings in memory. The study analyzes the device for precision and accuracy as well as for ease of adaptability and usage. This analysis focuses on shortcomings in the design of the study and methodology in addition to features of the hardware device itself. Although the device has distinct advantages over many devices on the market, a challenge is made to device manufacturers to encourage further innovation. PMID:22027309

Iconic Memories Die a Sudden Death.

PubMed

Pratte, Michael S

2018-06-01

Iconic memory is characterized by its large storage capacity and brief storage duration, whereas visual working memory is characterized by its small storage capacity. The limited information stored in working memory is often modeled as an all-or-none process in which studied information is either successfully stored or lost completely. This view raises a simple question: If almost all viewed information is stored in iconic memory, yet one second later most of it is completely absent from working memory, what happened to it? Here, I characterized how the precision and capacity of iconic memory changed over time and observed a clear dissociation: Iconic memory suffered from a complete loss of visual items, while the precision of items retained in memory was only marginally affected by the passage of time. These results provide new evidence for the discrete-capacity view of working memory and a new characterization of iconic memory decay.

Compact Holographic Data Storage

NASA Technical Reports Server (NTRS)

Chao, T. H.; Reyes, G. F.; Zhou, H.

2001-01-01

NASA's future missions would require massive high-speed onboard data storage capability to Space Science missions. For Space Science, such as the Europa Lander mission, the onboard data storage requirements would be focused on maximizing the spacecraft's ability to survive fault conditions (i.e., no loss in stored science data when spacecraft enters the 'safe mode') and autonomously recover from them during NASA's long-life and deep space missions. This would require the development of non-volatile memory. In order to survive in the stringent environment during space exploration missions, onboard memory requirements would also include: (1) survive a high radiation environment (1 Mrad), (2) operate effectively and efficiently for a very long time (10 years), and (3) sustain at least a billion write cycles. Therefore, memory technologies requirements of NASA's Earth Science and Space Science missions are large capacity, non-volatility, high-transfer rate, high radiation resistance, high storage density, and high power efficiency. JPL, under current sponsorship from NASA Space Science and Earth Science Programs, is developing a high-density, nonvolatile and rad-hard Compact Holographic Data Storage (CHDS) system to enable large-capacity, high-speed, low power consumption, and read/write of data in a space environment. The entire read/write operation will be controlled with electrooptic mechanism without any moving parts. This CHDS will consist of laser diodes, photorefractive crystal, spatial light modulator, photodetector array, and I/O electronic interface. In operation, pages of information would be recorded and retrieved with random access and high-speed. The nonvolatile, rad-hard characteristics of the holographic memory will provide a revolutionary memory technology meeting the high radiation challenge facing the Europa Lander mission. Additional information is contained in the original extended abstract.

Mistaking the recent past for the present: false seeing by older adults.

PubMed

Jacoby, Larry L; Rogers, Chad S; Bishara, Anthony J; Shimizu, Yujiro

2012-03-01

Results of three experiments revealed that older, as compared to young, adults are more reliant on context when "seeing" a briefly flashed word that was preceded by a prime. In a congruent condition, the prime was the same word as flashed (e.g., DIRT dirt) whereas in an incongruent condition, the prime differed in a single letter from the word that was flashed (DART dirt). Following their attempt to identify the flashed word, participants were asked to report whether they had "seen" the flashed word or, instead, had responded on some other basis (knowing or guessing). Older adults showed dramatically higher false seeing by reporting the prime on incongruent trials and claiming to have seen it flashed. This was true even though a titration procedure was used to equate the performance of young and older adults on baseline trials which did not provide a biasing context. Results of Experiment 3 related age differences in false seeing to willingness to respond when given the option to withhold responses. Convergence of results with those showing higher false memory and false hearing are interpreted as evidence that older adults are less able to avoid misleading effects of context. That lessened ability may be associated with decline in frontal lobe functioning.

MemFlash device: floating gate transistors as memristive devices for neuromorphic computing

NASA Astrophysics Data System (ADS)

Riggert, C.; Ziegler, M.; Schroeder, D.; Krautschneider, W. H.; Kohlstedt, H.

2014-10-01

Memristive devices are promising candidates for future non-volatile memory applications and mixed-signal circuits. In the field of neuromorphic engineering these devices are especially interesting to emulate neuronal functionality. Therefore, new materials and material combinations are currently investigated, which are often not compatible with Si-technology processes. The underlying mechanisms of the device often remain unclear and are paired with low device endurance and yield. These facts define the current most challenging development tasks towards a reliable memristive device technology. In this respect, the MemFlash concept is of particular interest. A MemFlash device results from a diode configuration wiring scheme of a floating gate transistor, which enables the persistent device resistance to be varied according to the history of the charge flow through the device. In this study, we investigate the scaling conditions of the floating gate oxide thickness with respect to possible applications in the field of neuromorphic engineering. We show that MemFlash cells exhibit essential features with respect to neuromorphic applications. In particular, cells with thin floating gate oxides show a limited synaptic weight growth together with low energy dissipation. MemFlash cells present an attractive alternative for state-of-art memresitive devices. The emulation of associative learning is discussed by implementing a single MemFlash cell in an analogue circuit.

Memory Is Not Only about Storage.

ERIC Educational Resources Information Center

Huber, Kay L.

1993-01-01

The Atkinson-Shiffrin model of memory has three components: sensory, short term, and long term. Each memory process (such as encoding, storage, and retrieval) can be linked to specific teaching and learning strategies. (SK)

Statistical Description of Associative Memory

NASA Astrophysics Data System (ADS)

Samengo, Inés

2003-03-01

The storage of memories, in the brain, induces some kind of modification in the structural and functional properties of a neural network. Here, a few neuropsychological and neurophysiological experiments are reviewed, suggesting that the plastic changes taking place during memory storage are governed, among other things, by the correlations in the activity of a set of neurons. The Hopfield model is briefly described, showing the way the methods of statistical physics can be useful to describe the storage and retrieval of memories.

Working Memory Components and Intelligence in Children

ERIC Educational Resources Information Center

Tillman, Carin M.; Nyberg, Lilianne; Bohlin, Gunilla

2008-01-01

This study investigated, in children aged 6-13 years, how different components of the working memory (WM) system (short-term storage and executive processes), within both verbal and visuospatial domains, relate to fluid intelligence. We also examined the degree of domain-specificity of the WM components as well as the differentiation of storage…

MIDAS - ESO's new image processing system

NASA Astrophysics Data System (ADS)

Banse, K.; Crane, P.; Grosbol, P.; Middleburg, F.; Ounnas, C.; Ponz, D.; Waldthausen, H.

1983-03-01

The Munich Image Data Analysis System (MIDAS) is an image processing system whose heart is a pair of VAX 11/780 computers linked together via DECnet. One of these computers, VAX-A, is equipped with 3.5 Mbytes of memory, 1.2 Gbytes of disk storage, and two tape drives with 800/1600 bpi density. The other computer, VAX-B, has 4.0 Mbytes of memory, 688 Mbytes of disk storage, and one tape drive with 1600/6250 bpi density. MIDAS is a command-driven system geared toward the interactive user. The type and number of parameters in a command depends on the unique parameter invoked. MIDAS is a highly modular system that provides building blocks for the undertaking of more sophisticated applications. Presently, 175 commands are available. These include the modification of the color-lookup table interactively, to enhance various image features, and the interactive extraction of subimages.

Modeling Chilled-Water Storage System Components for Coupling to a Small Modular Reactor in a Nuclear Hybrid Energy System

NASA Astrophysics Data System (ADS)

Misenheimer, Corey Thomas

The intermittency of wind and solar power puts strain on electric grids, often forcing carbonbased and nuclear sources of energy to operate in a load-follow mode. Operating nuclear reactors in a load-follow fashion is undesirable due to the associated thermal and mechanical stresses placed on the fuel and other reactor components. Various Thermal Energy Storage (TES) elements and ancillary energy applications can be coupled to nuclear (or renewable) power sources to help absorb grid instabilities caused by daily electric demand changes and renewable intermittency, thereby forming the basis of a candidate Nuclear Hybrid Energy System (NHES). During the warmer months of the year in many parts of the country, facility air-conditioning loads are significant contributors to the increase in the daily peak electric demand. Previous research demonstrated that a stratified chilled-water storage tank can displace peak cooling loads to off-peak hours. Based on these findings, the objective of this work is to evaluate the prospect of using a stratified chilled-water storage tank as a potential TES reservoir for a nuclear reactor in a NHES. This is accomplished by developing time-dependent models of chilled-water system components, including absorption chillers, cooling towers, a storage tank, and facility cooling loads appropriate for a large office space or college campus, as a callable FORTRAN subroutine. The resulting TES model is coupled to a high-fidelity mPower-sized Small Modular Reactor (SMR) Simulator, with the goal of utilizing excess reactor capacity to operate several sizable chillers in order to keep reactor power constant. Chilled-water production via single effect, lithium bromide (LiBr) absorption chillers is primarily examined in this study, although the use of electric chillers is briefly explored. Absorption chillers use hot water or low-pressure steam to drive an absorption-refrigeration cycle. The mathematical framework for a high-fidelity dynamic absorption chiller model is presented. The transient FORTRAN model is grounded on time-dependent mass, species, and energy conservation equations. Due to the vast computational costs of the high-fidelity model, a low-fidelity absorption chiller model is formulated and calibrated to mimic the behavior of the high-fidelity model. Stratified chilled-water storage tank performance is characterized using Computational Fluid Dynamics (CFD). The geometry employed in the CFD model represents a 5-million-gallon storage tank currently in use at a North Carolina college campus. Simulation results reveal the laminar numerical model most closely aligns with actual tank charging and discharging data. A subsequent parametric study corroborates storage tank behavior documented throughout literature and industry. Two absorption chiller configurations are considered. The first involves bypassing lowpressure steam from the low-pressure turbine to absorption chillers during periods of excess reactor capacity in order to keep reactor power constant. Simulation results show steam conditions downstream of the turbine control valves are a strong function of turbine load, and absorption chiller performance is hindered by reduced turbine impulse pressures at reduced turbine demands. A more suitable configuration entails integrating the absorption chillers into a flash vessel system that is thermally coupled to a sensible heat storage system. The sensible heat storage system is able to maintain reactor thermal output constant at 100% and match turbine output with several different electric demand profiles. High-pressure condensate in the sensible heat storage system is dropped across a let-down orifice and flashed in an ideal separator. Generated steam is sent to a bank of absorption chillers. Simulation results show enough steam is available during periods of reduced turbine demand to power four large absorption chillers to charge a 5-million-gallon stratified chilled-water storage tank, which is used to offset cooling loads in an adjacent facility. The coupled TES systems operating in conjunction with an SMR comprise the foundation of a tightly coupled NHES.

Rethinking the connection between working memory and language impairment.

PubMed

Archibald, Lisa M D; Harder Griebeling, Katherine

2016-05-01

Working memory deficits have been found for children with specific language impairment (SLI) on tasks imposing increasing short-term memory load with or without additional, consistent (and simple) processing load. To examine the processing function of working memory in children with low language (LL) by employing tasks imposing increasing processing loads with constant storage demands individually adjusted based on each participant's short-term memory capacity. School-age groups with LL (n = 17) and typical language with either average (n = 28) or above-average nonverbal intelligence (n = 15) completed complex working memory-span tasks varying processing load while keeping storage demands constant, varying storage demands while keeping processing load constant, simple storage-span tasks, and measures of language and nonverbal intelligence. Teachers completed questionnaires about cognition and learning. Significantly lower scores were found for the LL than either matched group on storage-based tasks, but no group differences were found on the tasks varying processing load. Teachers' ratings of oral expression and mathematics abilities discriminated those who did or did not complete the most challenging cognitive tasks. The results implicate a deficit in the phonological storage but not in the central executive component of working memory for children with LL. Teacher ratings may reveal personality traits related to perseverance of effort in cognitive research. © 2015 Royal College of Speech and Language Therapists.

Implementation of a Landscape Lighting System to Display Images

NASA Astrophysics Data System (ADS)

Sun, Gi-Ju; Cho, Sung-Jae; Kim, Chang-Beom; Moon, Cheol-Hong

The system implemented in this study consists of a PC, MASTER, SLAVEs and MODULEs. The PC sets the various landscape lighting displays, and the image files can be sent to the MASTER through a virtual serial port connected to the USB (Universal Serial Bus). The MASTER sends a sync signal to the SLAVE. The SLAVE uses the signal received from the MASTER and the landscape lighting display pattern. The video file is saved in the NAND Flash memory and the R, G, B signals are separated using the self-made display signal and sent to the MODULE so that it can display the image.

Visual working memory capacity increases between ages 3 and 8 years, controlling for gains in attention, perception, and executive control.

PubMed

Pailian, Hrag; Libertus, Melissa E; Feigenson, Lisa; Halberda, Justin

2016-08-01

Research in adults has aimed to characterize constraints on the capacity of Visual Working Memory (VWM), in part because of the system's broader impacts throughout cognition. However, less is known about how VWM develops in childhood. Existing work has reached conflicting conclusions as to whether VWM storage capacity increases after infancy, and if so, when and by how much. One challenge is that previous studies did not control for developmental changes in attention and executive processing, which also may undergo improvement. We investigated the development of VWM storage capacity in children from 3 to 8 years of age, and in adults, while controlling for developmental change in exogenous and endogenous attention and executive control. Our results reveal that, when controlling for improvements in these abilities, VWM storage capacity increases across development and approaches adult-like levels between ages 6 and 8 years. More generally, this work highlights the value of estimating working memory, attention, perception, and decision-making components together.

A highly efficient silole-containing dithienylethene with excellent thermal stability and fatigue resistance: a promising candidate for optical memory storage materials.

PubMed

Chan, Jacky Chi-Hung; Lam, Wai Han; Yam, Vivian Wing-Wah

2014-12-10

Diarylethene compounds are potential candidates for applications in optical memory storage systems and photoswitchable molecular devices; however, they usually show low photocycloreversion quantum yields, which result in ineffective erasure processes. Here, we present the first highly efficient photochromic silole-containing dithienylethene with excellent thermal stability and fatigue resistance. The photochemical quantum yields for photocyclization and photocycloreversion of the compound are found to be high and comparable to each other; the latter of which is rarely found in diarylethene compounds. These would give rise to highly efficient photoswitchable material with effective writing and erasure processes. Incorporation of the silole moiety as a photochromic dithienylethene backbone also was demonstrated to enhance the thermal stability of the closed form, in which the thermal backward reaction to the open form was found to be negligible even at 100 °C, which leads to a promising candidate for use as photoswitchable materials and optical memory storage.

Systems and methods to control multiple peripherals with a single-peripheral application code

DOEpatents

Ransom, Ray M.

2013-06-11

Methods and apparatus are provided for enhancing the BIOS of a hardware peripheral device to manage multiple peripheral devices simultaneously without modifying the application software of the peripheral device. The apparatus comprises a logic control unit and a memory in communication with the logic control unit. The memory is partitioned into a plurality of ranges, each range comprising one or more blocks of memory, one range being associated with each instance of the peripheral application and one range being reserved for storage of a data pointer related to each peripheral application of the plurality. The logic control unit is configured to operate multiple instances of the control application by duplicating one instance of the peripheral application for each peripheral device of the plurality and partitioning a memory device into partitions comprising one or more blocks of memory, one partition being associated with each instance of the peripheral application. The method then reserves a range of memory addresses for storage of a data pointer related to each peripheral device of the plurality, and initializes each of the plurality of peripheral devices.

DNA methylation in memory formation: Emerging insights

PubMed Central

Heyward, Frankie D.; Sweatt, J. David

2016-01-01

The establishment of synaptic plasticity and long-term memory requires lasting cellular and molecular modifications that, as a whole, must endure despite the rapid turnover of their constituent parts. Such a molecular feat must be mediated by a stable, self-perpetuating, cellular information storage mechanism. DNA methylation, being the archetypal cellular information storage mechanism, has been heavily implicated as being necessary for stable activity-dependent transcriptional alterations within the central nervous system (CNS). This review details the foundational discoveries from both gene-targeted, as well as whole-genome sequencing, studies that have successfully brought DNA methylation to our attention as a chief regulator of activity- and experience-dependent transcriptional alterations within the CNS. We present a hypothetical framework with which the disparate experimental findings dealing with distinct manipulations of the DNA methylation, and their effect on memory, might be resolved while taking into account the unique impact activity-dependent alterations in DNA methylation potentially have on both memory promoting and memory-suppressing gene expression. And last, we discuss potential avenues for future inquiry into the role of DNA methylation during remote memory formation. PMID:25832671

Network-Capable Application Process and Wireless Intelligent Sensors for ISHM

NASA Technical Reports Server (NTRS)

Figueroa, Fernando; Morris, Jon; Turowski, Mark; Wang, Ray

2011-01-01

Intelligent sensor technology and systems are increasingly becoming attractive means to serve as frameworks for intelligent rocket test facilities with embedded intelligent sensor elements, distributed data acquisition elements, and onboard data acquisition elements. Networked intelligent processors enable users and systems integrators to automatically configure their measurement automation systems for analog sensors. NASA and leading sensor vendors are working together to apply the IEEE 1451 standard for adding plug-and-play capabilities for wireless analog transducers through the use of a Transducer Electronic Data Sheet (TEDS) in order to simplify sensor setup, use, and maintenance, to automatically obtain calibration data, and to eliminate manual data entry and error. A TEDS contains the critical information needed by an instrument or measurement system to identify, characterize, interface, and properly use the signal from an analog sensor. A TEDS is deployed for a sensor in one of two ways. First, the TEDS can reside in embedded, nonvolatile memory (typically flash memory) within the intelligent processor. Second, a virtual TEDS can exist as a separate file, downloadable from the Internet. This concept of virtual TEDS extends the benefits of the standardized TEDS to legacy sensors and applications where the embedded memory is not available. An HTML-based user interface provides a visual tool to interface with those distributed sensors that a TEDS is associated with, to automate the sensor management process. Implementing and deploying the IEEE 1451.1-based Network-Capable Application Process (NCAP) can achieve support for intelligent process in Integrated Systems Health Management (ISHM) for the purpose of monitoring, detection of anomalies, diagnosis of causes of anomalies, prediction of future anomalies, mitigation to maintain operability, and integrated awareness of system health by the operator. It can also support local data collection and storage. This invention enables wide-area sensing and employs numerous globally distributed sensing devices that observe the physical world through the existing sensor network. This innovation enables distributed storage, distributed processing, distributed intelligence, and the availability of DiaK (Data, Information, and Knowledge) to any element as needed. It also enables the simultaneous execution of multiple processes, and represents models that contribute to the determination of the condition and health of each element in the system. The NCAP (intelligent process) can configure data-collection and filtering processes in reaction to sensed data, allowing it to decide when and how to adapt collection and processing with regard to sophisticated analysis of data derived from multiple sensors. The user will be able to view the sensing device network as a single unit that supports a high-level query language. Each query would be able to operate over data collected from across the global sensor network just as a search query encompasses millions of Web pages. The sensor web can preserve ubiquitous information access between the querier and the queried data. Pervasive monitoring of the physical world raises significant data and privacy concerns. This innovation enables different authorities to control portions of the sensing infrastructure, and sensor service authors may wish to compose services across authority boundaries.

Reflections on CD-ROM: Bridging the Gap between Technology and Purpose.

ERIC Educational Resources Information Center

Saviers, Shannon Smith

1987-01-01

Provides a technological overview of CD-ROM (Compact Disc-Read Only Memory), an optically-based medium for data storage offering large storage capacity, computer-based delivery system, read-only medium, and economic mass production. CD-ROM database attributes appropriate for information delivery are also reviewed, including large database size,…

Engrams and circuits crucial for systems consolidation of a memory.

PubMed

Kitamura, Takashi; Ogawa, Sachie K; Roy, Dheeraj S; Okuyama, Teruhiro; Morrissey, Mark D; Smith, Lillian M; Redondo, Roger L; Tonegawa, Susumu

2017-04-07

Episodic memories initially require rapid synaptic plasticity within the hippocampus for their formation and are gradually consolidated in neocortical networks for permanent storage. However, the engrams and circuits that support neocortical memory consolidation have thus far been unknown. We found that neocortical prefrontal memory engram cells, which are critical for remote contextual fear memory, were rapidly generated during initial learning through inputs from both the hippocampal-entorhinal cortex network and the basolateral amygdala. After their generation, the prefrontal engram cells, with support from hippocampal memory engram cells, became functionally mature with time. Whereas hippocampal engram cells gradually became silent with time, engram cells in the basolateral amygdala, which were necessary for fear memory, were maintained. Our data provide new insights into the functional reorganization of engrams and circuits underlying systems consolidation of memory. Copyright © 2017, American Association for the Advancement of Science.

77 FR 58473 - Minimum Technical Standards for Class II Gaming Systems and Equipment

Federal Register 2010, 2011, 2012, 2013, 2014

2012-09-21

... as printed advertising material that cannot be validated directly by a voucher system. Critical... on that component. EPROM. Erasable Programmable Read Only Memory--a non-volatile storage chip or...

Hardware support for collecting performance counters directly to memory

DOEpatents

Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

2012-09-25

Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

Continuous gravimetric monitoring as an integrative tool for exploring hydrological processes in the Lomme Karst System (Belgium)

NASA Astrophysics Data System (ADS)

Watlet, A.; Van Camp, M. J.; Poulain, A.; Hallet, V.; Rochez, G.; Quinif, Y.; Meus, P.; Kaufmann, O.; Francis, O.

2016-12-01

Karst systems are highly heterogeneous which makes their hydrology difficult to understand. Geophysical techniques offer non-invasive and integrative methods that help interpreting such systems as a whole. Among these techniques, gravimetry has been increasingly used in the last decade to characterize the hydrological behavior of complex systems, e.g. karst environments or volcanoes. We present a continuous microgravimetric monitoring of 3 years in the karstic area of Rochefort (Belgium), that shows multiple occurrences of caves and karstic features. The gravity record includes measurements of a GWR superconducting gravimeter, a Micro-g LaCoste gPhone and an absolute FG5 gravimeter. Together with meteorological measurements and a surface/in-cave hydrogeological monitoring, we were able to improve the knowledge of hydrological processes. On the one hand, the data allowed identifying seasonal groundwater content changes in the unsaturated zone of the karst area, most likely to be linked to temporary groundwater storage occurring in the most karstified layers closed to the surface. Combined with additional geological information, modelling of the gravity signal based on the vertical potential of the gravitational attraction was then particularly useful to estimate the seasonal recharge leading to the temporary subsurface groundwater storage. On the other hand, the gravity monitoring of flash floods occurring in deeper layers after intense rainfall events informed on the effective porosity gradient of the limestones. Modelling was then helpful to identify the hydrogeological role played by the cave galleries with respect to the hosting limestones during flash floods. These results are also compared with measurements of an in-cave gravimetric monitoring performed with a gPhone spring gravimeter. An Electrical Resistivity Tomography monitoring is also conducted at site and brings additional information useful to verify the interpretation made with the gravimetric monitoring.

76 FR 23799 - Erie Boulevard Hydropower, L.P.; Notice of Application Accepted for Filing, Soliciting Motions To...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-04-28

... seasonal flash boards; (2) a 168-acre reservoir with a gross storage capacity of 3,234 acre-feet and a...; (2) a 159-acre reservoir with a gross storage capacity of 2,646 acre-feet and a normal maximum pool... reservoir, with concrete core walls and partially equipped with 10-inch-high flashboards; (3) a 79.2- acre...

Distributed trace using central performance counter memory

DOEpatents

Satterfield, David L; Sexton, James C

2013-10-22

A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Distributed trace using central performance counter memory

DOEpatents

Satterfield, David L.; Sexton, James C.

2013-01-22

A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Requirement of the Combination of Mushroom Body ? Lobe and a/ß Lobes for the Retrieval of Both Aversive and Appetitive Early Memories in "Drosophila"

ERIC Educational Resources Information Center

Xie, Zhiyong; Huang, Cheng; Ci, Bo; Lianzhang, Wang; Zhong, Yi

2013-01-01

Extensive studies of "Drosophila" mushroom body in formation and retrieval of olfactory memories allow us to delineate the functional logic for memory storage and retrieval. Currently, there is a questionable disassociation of circuits for memory storage and retrieval during "Drosophila" olfactory memory processing. Formation…

Synaptic Scaling Enables Dynamically Distinct Short- and Long-Term Memory Formation

PubMed Central

Tetzlaff, Christian; Kolodziejski, Christoph; Timme, Marc; Tsodyks, Misha; Wörgötter, Florentin

2013-01-01

Memory storage in the brain relies on mechanisms acting on time scales from minutes, for long-term synaptic potentiation, to days, for memory consolidation. During such processes, neural circuits distinguish synapses relevant for forming a long-term storage, which are consolidated, from synapses of short-term storage, which fade. How time scale integration and synaptic differentiation is simultaneously achieved remains unclear. Here we show that synaptic scaling – a slow process usually associated with the maintenance of activity homeostasis – combined with synaptic plasticity may simultaneously achieve both, thereby providing a natural separation of short- from long-term storage. The interaction between plasticity and scaling provides also an explanation for an established paradox where memory consolidation critically depends on the exact order of learning and recall. These results indicate that scaling may be fundamental for stabilizing memories, providing a dynamic link between early and late memory formation processes. PMID:24204240

Synaptic scaling enables dynamically distinct short- and long-term memory formation.

PubMed

Tetzlaff, Christian; Kolodziejski, Christoph; Timme, Marc; Tsodyks, Misha; Wörgötter, Florentin

2013-10-01

Memory storage in the brain relies on mechanisms acting on time scales from minutes, for long-term synaptic potentiation, to days, for memory consolidation. During such processes, neural circuits distinguish synapses relevant for forming a long-term storage, which are consolidated, from synapses of short-term storage, which fade. How time scale integration and synaptic differentiation is simultaneously achieved remains unclear. Here we show that synaptic scaling - a slow process usually associated with the maintenance of activity homeostasis - combined with synaptic plasticity may simultaneously achieve both, thereby providing a natural separation of short- from long-term storage. The interaction between plasticity and scaling provides also an explanation for an established paradox where memory consolidation critically depends on the exact order of learning and recall. These results indicate that scaling may be fundamental for stabilizing memories, providing a dynamic link between early and late memory formation processes.

Neural systems and time course of proactive interference in working memory.

PubMed

Du, Yingchun; Zhang, John X; Xiao, Zhuangwei; Wu, Renhua

2007-01-01

The storage of information in working memory suffers as a function of proactive interference. Many works using neuroimaging technique have been done to reveal the brain mechanism of interference resolution. However, less is yet known about the time course of this process. Event-related potential method(ERP) and standardized Low Resolution Brain Electromagnetic Tomography method (sLORETA) were used in this study to discover the time course of interference resolution in working memory. The anterior P2 was thought to reflect interference resolution and if so, this process occurred earlier in working memory than in long-term memory.

Electron trapping optical data storage system and applications

NASA Technical Reports Server (NTRS)

Brower, Daniel; Earman, Allen; Chaffin, M. H.

1993-01-01

A new technology developed at Optex Corporation out-performs all other existing data storage technologies. The Electron Trapping Optical Memory (ETOM) media stores 14 gigabytes of uncompressed data on a single, double-sided 130 mm disk with a data transfer rate of up to 120 megabits per second. The disk is removable, compact, lightweight, environmentally stable, and robust. Since the Write/Read/Erase (W/R/E) processes are carried out photonically, no heating of the recording media is required. Therefore, the storage media suffers no deleterious effects from repeated W/R/E cycling. This rewritable data storage technology has been developed for use as a basis for numerous data storage products. Industries that can benefit from the ETOM data storage technologies include: satellite data and information systems, broadcasting, video distribution, image processing and enhancement, and telecommunications. Products developed for these industries are well suited for the demanding store-and-forward buffer systems, data storage, and digital video systems needed for these applications.

Development of template and mask replication using jet and flash imprint lithography

NASA Astrophysics Data System (ADS)

Brooks, Cynthia; Selinidis, Kosta; Doyle, Gary; Brown, Laura; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

2010-09-01

The Jet and Flash Imprint Lithography (J-FILTM)1-7 process uses drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for memory markets including Flash memory and patterned media for hard disk drives. It is anticipated that the lifetime of a single template (for patterned media) or mask (for semiconductor) will be on the order of 104 - 105 imprints. This suggests that tens of thousands of templates/masks will be required. It is not feasible to employ electronbeam patterning directly to deliver these volumes. Instead, a "master" template - created by directly patterning with an electron-beam tool - will be replicated many times with an imprint lithography tool to produce the required supply of "working" templates/masks. In this paper, we review the development of the pattern transfer process for both template and mask replicas. Pattern transfer of resolutions down to 25nm has been demonstrated for bit patterned media replication. In addition, final resolution on a semiconductor mask of 28nm has been confirmed. The early results on both etch depth and CD uniformity are promising, but more extensive work is required to characterize the pattern transfer process.

Enhanced storage capacity with errors in scale-free Hopfield neural networks: An analytical study.

PubMed

Kim, Do-Hyun; Park, Jinha; Kahng, Byungnam

2017-01-01

The Hopfield model is a pioneering neural network model with associative memory retrieval. The analytical solution of the model in mean field limit revealed that memories can be retrieved without any error up to a finite storage capacity of O(N), where N is the system size. Beyond the threshold, they are completely lost. Since the introduction of the Hopfield model, the theory of neural networks has been further developed toward realistic neural networks using analog neurons, spiking neurons, etc. Nevertheless, those advances are based on fully connected networks, which are inconsistent with recent experimental discovery that the number of connections of each neuron seems to be heterogeneous, following a heavy-tailed distribution. Motivated by this observation, we consider the Hopfield model on scale-free networks and obtain a different pattern of associative memory retrieval from that obtained on the fully connected network: the storage capacity becomes tremendously enhanced but with some error in the memory retrieval, which appears as the heterogeneity of the connections is increased. Moreover, the error rates are also obtained on several real neural networks and are indeed similar to that on scale-free model networks.

ManPortable and UGV LIVAR: advances in sensor suite integration bring improvements to target observation and identification for the electronic battlefield

NASA Astrophysics Data System (ADS)

Lynam, Jeff R.

2001-09-01

A more highly integrated, electro-optical sensor suite using Laser Illuminated Viewing and Ranging (LIVAR) techniques is being developed under the Army Advanced Concept Technology- II (ACT-II) program for enhanced manportable target surveillance and identification. The ManPortable LIVAR system currently in development employs a wide-array of sensor technologies that provides the foot-bound soldier and UGV significant advantages and capabilities in lightweight, fieldable, target location, ranging and imaging systems. The unit incorporates a wide field-of-view, 5DEG x 3DEG, uncooled LWIR passive sensor for primary target location. Laser range finding and active illumination is done with a triggered, flash-lamp pumped, eyesafe micro-laser operating in the 1.5 micron region, and is used in conjunction with a range-gated, electron-bombarded CCD digital camera to then image the target objective in a more- narrow, 0.3$DEG, field-of-view. Target range determination is acquired using the integrated LRF and a target position is calculated using data from other onboard devices providing GPS coordinates, tilt, bank and corrected magnetic azimuth. Range gate timing and coordinated receiver optics focus control allow for target imaging operations to be optimized. The onboard control electronics provide power efficient, system operations for extended field use periods from the internal, rechargeable battery packs. Image data storage, transmission, and processing performance capabilities are also being incorporated to provide the best all-around support, for the electronic battlefield, in this type of system. The paper will describe flash laser illumination technology, EBCCD camera technology with flash laser detection system, and image resolution improvement through frame averaging.

Low-voltage all-inorganic perovskite quantum dot transistor memory

NASA Astrophysics Data System (ADS)

Chen, Zhiliang; Zhang, Yating; Zhang, Heng; Yu, Yu; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Che, Yongli; Jin, Lufan; Li, Yifan; Li, Qingyan; Dai, Haitao; Yang, Junbo; Yao, Jianquan

2018-05-01

An all-inorganic cesium lead halide quantum dot (QD) based Au nanoparticle (NP) floating-gate memory with a solution processed layer-by-layer method is demonstrated. Easy synthesis at room temperature and excellent stability make all-inorganic CsPbBr3 perovskite QDs suitable as a semiconductor layer in low voltage nonvolatile transistor memory. The bipolarity of QDs has both electrons and holes stored in the Au NP floating gate, resulting in bidirectional shifts of initial threshold voltage according to the applied programing and erasing pulses. Under low operation voltage (±5 V), the memory achieved a great memory window (˜2.4 V), long retention time (>105 s), and stable endurance properties after 200 cycles. So the proposed memory device based on CsPbBr3 perovskite QDs has a great potential in the flash memory market.

Effects of Anxiety on Memory Storage and Updating in Young Children

ERIC Educational Resources Information Center

Visu-Petra, Laura; Cheie, Lavinia; Benga, Oana; Alloway, Tracy Packiam

2011-01-01

The relationship between trait anxiety and memory functioning in young children was investigated. Two studies were conducted, using tasks tapping verbal and visual-spatial short-term memory (Study 1) and working memory (Study 2) in preschoolers. On the verbal storage tasks, there was a detrimental effect of anxiety on processing efficiency…

Memory Erasure Experiments Indicate a Critical Role of CaMKII in Memory Storage.

PubMed

Rossetti, Tom; Banerjee, Somdeb; Kim, Chris; Leubner, Megan; Lamar, Casey; Gupta, Pooja; Lee, Bomsol; Neve, Rachael; Lisman, John

2017-09-27

The abundant synaptic protein CaMKII is necessary for long-term potentiation (LTP) and memory. However, whether CaMKII is required only during initial processes or whether it also mediates memory storage remains unclear. The most direct test of a storage role is the erasure test. In this test, a putative memory molecule is inhibited after learning. The key prediction is that this should produce persistent memory erasure even after the inhibitory agent is removed. We conducted this test using transient viral (HSV) expression of dominant-negative CaMKII-alpha (K42M) in the hippocampus. This produced persistent erasure of conditioned place avoidance. As an additional test, we found that expression of activated CaMKII (T286D/T305A/T306A) impaired place avoidance, a result not expected if a process other than CaMKII stores memory. Our behavioral results, taken together with prior experiments on LTP, strongly support a critical role of CaMKII in LTP maintenance and memory storage. Copyright © 2017 Elsevier Inc. All rights reserved.

Out of sight but not out of mind: the neurophysiology of iconic memory in the superior temporal sulcus.

PubMed

Keysers, C; Xiao, D-K; Foldiak, P; Perrett, D I

2005-05-01

Iconic memory, the short-lasting visual memory of a briefly flashed stimulus, is an important component of most models of visual perception. Here we investigate what physiological mechanisms underlie this capacity by showing rapid serial visual presentation (RSVP) sequences with and without interstimulus gaps to human observers and macaque monkeys. For gaps of up to 93 ms between consecutive images, human observers and neurones in the temporal cortex of macaque monkeys were found to continue processing a stimulus as if it was still present on the screen. The continued firing of neurones in temporal cortex may therefore underlie iconic memory. Based on these findings, a neurophysiological vision of iconic memory is presented.

Spatial-mode storage in a gradient-echo memory

NASA Astrophysics Data System (ADS)

Higginbottom, D. B.; Sparkes, B. M.; Rancic, M.; Pinel, O.; Hosseini, M.; Lam, P. K.; Buchler, B. C.

2012-08-01

Three-level atomic gradient echo memory (Λ-GEM) is a proposed candidate for efficient quantum storage and for linear optical quantum computation with time-bin multiplexing [Hosseini , Nature (London)NATUAS0028-083610.1038/nature08325 461, 241 (2009)]. In this paper we investigate the spatial multimode properties of a Λ-GEM system. Using a high-speed triggered CCD, we demonstrate the storage of complex spatial modes and images. We also present an in-principle demonstration of spatial multiplexing by showing selective recall of spatial elements of a stored spin wave. Using our measurements, we consider the effect of diffusion within the atomic vapor and investigate its role in spatial decoherence. Our measurements allow us to quantify the spatial distortion due to both diffusion and inhomogeneous control field scattering and compare these to theoretical models.

The Impact of Storage on Processing: How Is Information Maintained in Working Memory?

ERIC Educational Resources Information Center

Vergauwe, Evie; Camos, Valérie; Barrouillet, Pierre

2014-01-01

Working memory is typically defined as a system devoted to the simultaneous maintenance and processing of information. However, the interplay between these 2 functions is still a matter of debate in the literature, with views ranging from complete independence to complete dependence. The time-based resource-sharing model assumes that a central…

Spatiotemporal Proximity Effects in Visual Short-Term Memory Examined by Target-Nontarget Analysis

ERIC Educational Resources Information Center

Sapkota, Raju P.; Pardhan, Shahina; van der Linde, Ian

2016-01-01

Visual short-term memory (VSTM) is a limited-capacity system that holds a small number of objects online simultaneously, implying that competition for limited storage resources occurs (Phillips, 1974). How the spatial and temporal proximity of stimuli affects this competition is unclear. In this 2-experiment study, we examined the effect of the…

The Effects of Split-Attention and Redundancy on Cognitive Load When Learning Cognitive and Psychomotor Tasks

ERIC Educational Resources Information Center

Pociask, Fredrick D.; Morrison, Gary

2004-01-01

Human working memory can be defined as a component system responsible for the temporary storage and manipulation of information related to higher level cognitive behaviors, such as understanding and reasoning (Baddeley, 1992; Becker & Morris, 1999). Working memory, while able to manage a complex array of cognitive activities, presents with an…

Safe and Durable High-Temperature Lithium-Sulfur Batteries via Molecular Layer Deposited Coating.

PubMed

Li, Xia; Lushington, Andrew; Sun, Qian; Xiao, Wei; Liu, Jian; Wang, Biqiong; Ye, Yifan; Nie, Kaiqi; Hu, Yongfeng; Xiao, Qunfeng; Li, Ruying; Guo, Jinghua; Sham, Tsun-Kong; Sun, Xueliang

2016-06-08

Lithium-sulfur (Li-S) battery is a promising high energy storage candidate in electric vehicles. However, the commonly employed ether based electrolyte does not enable to realize safe high-temperature Li-S batteries due to the low boiling and flash temperatures. Traditional carbonate based electrolyte obtains safe physical properties at high temperature but does not complete reversible electrochemical reaction for most Li-S batteries. Here we realize safe high temperature Li-S batteries on universal carbon-sulfur electrodes by molecular layer deposited (MLD) alucone coating. Sulfur cathodes with MLD coating complete the reversible electrochemical process in carbonate electrolyte and exhibit a safe and ultrastable cycle life at high temperature, which promise practicable Li-S batteries for electric vehicles and other large-scale energy storage systems.

Evolution of costly explicit memory and cumulative culture.

PubMed

Nakamaru, Mayuko

2016-06-21

Humans can acquire new information and modify it (cumulative culture) based on their learning and memory abilities, especially explicit memory, through the processes of encoding, consolidation, storage, and retrieval. Explicit memory is categorized into semantic and episodic memories. Animals have semantic memory, while episodic memory is unique to humans and essential for innovation and the evolution of culture. As both episodic and semantic memory are needed for innovation, the evolution of explicit memory influences the evolution of culture. However, previous theoretical studies have shown that environmental fluctuations influence the evolution of imitation (social learning) and innovation (individual learning) and assume that memory is not an evolutionary trait. If individuals can store and retrieve acquired information properly, they can modify it and innovate new information. Therefore, being able to store and retrieve information is essential from the perspective of cultural evolution. However, if both storage and retrieval were too costly, forgetting and relearning would have an advantage over storing and retrieving acquired information. In this study, using mathematical analysis and individual-based simulations, we investigate whether cumulative culture can promote the coevolution of costly memory and social and individual learning, assuming that cumulative culture improves the fitness of each individual. The conclusions are: (1) without cumulative culture, a social learning cost is essential for the evolution of storage-retrieval. Costly storage-retrieval can evolve with individual learning but costly social learning does not evolve. When low-cost social learning evolves, the repetition of forgetting and learning is favored more than the evolution of costly storage-retrieval, even though a cultural trait improves the fitness. (2) When cumulative culture exists and improves fitness, storage-retrieval can evolve with social and/or individual learning, which is not influenced by the degree of the social learning cost. Whether individuals socially learn a low level of culture from observing a high or the low level of culture influences the evolution of memory and learning, especially individual learning. Copyright © 2016 Elsevier Ltd. All rights reserved.

Cerebrocerebellar networks during articulatory rehearsal and verbal working memory tasks.

PubMed

Chen, S H Annabel; Desmond, John E

2005-01-15

Converging evidence has implicated the cerebellum in verbal working memory. The current fMRI study sought to further characterize cerebrocerebellar participation in this cognitive process by revealing regions of activation common to a verbal working task and an articulatory control task, as well as regions that are uniquely activated by working memory. Consistent with our model's predictions, load-dependent activations were observed in Broca's area (BA 44/6) and the superior cerebellar hemisphere (VI/CrusI) for both working memory and motoric rehearsal. In contrast, activations unique to verbal working memory were found in the inferior parietal lobule (BA 40) and the right inferior cerebellum hemisphere (VIIB). These findings provide evidence for two cerebrocerebellar networks for verbal working memory: a frontal/superior cerebellar articulatory control system and a parietal/inferior cerebellar phonological storage system.

Onboard System Evaluation of Rotors Vibration, Engines (OBSERVE) monitoring System

DTIC Science & Technology

1992-07-01

consists of a Data Acquisiiton Unit (DAU), Control and Display Unit ( CADU ), Universal Tracking Devices (UTD), Remote Cockpit Display (RCD) and a PC...and Display Unit ( CADU ) - The CADU provides data storage and a graphical user interface neccesary to display both the measured data and diagnostic...information. The CADU has an interface to a Credit Card Memory (CCM) which operates similar to a disk drive, allowing the storage of data and programs. The

Computer Game Play Reduces Intrusive Memories of Experimental Trauma via Reconsolidation-Update Mechanisms.

PubMed

James, Ella L; Bonsall, Michael B; Hoppitt, Laura; Tunbridge, Elizabeth M; Geddes, John R; Milton, Amy L; Holmes, Emily A

2015-08-01

Memory of a traumatic event becomes consolidated within hours. Intrusive memories can then flash back repeatedly into the mind's eye and cause distress. We investigated whether reconsolidation-the process during which memories become malleable when recalled-can be blocked using a cognitive task and whether such an approach can reduce these unbidden intrusions. We predicted that reconsolidation of a reactivated visual memory of experimental trauma could be disrupted by engaging in a visuospatial task that would compete for visual working memory resources. We showed that intrusive memories were virtually abolished by playing the computer game Tetris following a memory-reactivation task 24 hr after initial exposure to experimental trauma. Furthermore, both memory reactivation and playing Tetris were required to reduce subsequent intrusions (Experiment 2), consistent with reconsolidation-update mechanisms. A simple, noninvasive cognitive-task procedure administered after emotional memory has already consolidated (i.e., > 24 hours after exposure to experimental trauma) may prevent the recurrence of intrusive memories of those emotional events. © The Author(s) 2015.

Computer Game Play Reduces Intrusive Memories of Experimental Trauma via Reconsolidation-Update Mechanisms

PubMed Central

James, Ella L.; Bonsall, Michael B.; Hoppitt, Laura; Tunbridge, Elizabeth M.; Geddes, John R.; Milton, Amy L.

2015-01-01

Memory of a traumatic event becomes consolidated within hours. Intrusive memories can then flash back repeatedly into the mind’s eye and cause distress. We investigated whether reconsolidation—the process during which memories become malleable when recalled—can be blocked using a cognitive task and whether such an approach can reduce these unbidden intrusions. We predicted that reconsolidation of a reactivated visual memory of experimental trauma could be disrupted by engaging in a visuospatial task that would compete for visual working memory resources. We showed that intrusive memories were virtually abolished by playing the computer game Tetris following a memory-reactivation task 24 hr after initial exposure to experimental trauma. Furthermore, both memory reactivation and playing Tetris were required to reduce subsequent intrusions (Experiment 2), consistent with reconsolidation-update mechanisms. A simple, noninvasive cognitive-task procedure administered after emotional memory has already consolidated (i.e., > 24 hours after exposure to experimental trauma) may prevent the recurrence of intrusive memories of those emotional events. PMID:26133572

Solid solutions of MnSb as recording media in optical memory applications

NASA Astrophysics Data System (ADS)

Bai, V. S.; Rama Rao, K. V. S.

1984-03-01

Possibilities regarding the use of larger packing densities and faster access times make it potentially feasible to employ optical technology for the development of computer data storage systems with a performance which is 2-4 orders of magnitude better than that of conventional systems. The information can be stored on thin magnetic films using the technique of laser Curie point writing and retrieved with the aid of magnetooptic readout. Thin films of MnBi have been studied extensively as a prospective storage medium. However, certain difficulties arise in connection with a phase transformation. For these reasons, the present investigation is concerned with the possibility of employing as storage medium MnSb, in which such a phase transformation is absent. In the case of MnSb, a change regarding the easy direction of magnetization would be required. Attention is given to several solid solutions of MnSb and the merits of these materials for optical memory applications.

Minimizing the Disruptive Effects of Prospective Memory in Simulated Air Traffic Control

PubMed Central

Loft, Shayne; Smith, Rebekah E.; Remington, Roger

2015-01-01

Prospective memory refers to remembering to perform an intended action in the future. Failures of prospective memory can occur in air traffic control. In two experiments, we examined the utility of external aids for facilitating air traffic management in a simulated air traffic control task with prospective memory requirements. Participants accepted and handed-off aircraft and detected aircraft conflicts. The prospective memory task involved remembering to deviate from a routine operating procedure when accepting target aircraft. External aids that contained details of the prospective memory task appeared and flashed when target aircraft needed acceptance. In Experiment 1, external aids presented either adjacent or non-adjacent to each of the 20 target aircraft presented over the 40min test phase reduced prospective memory error by 11% compared to a condition without external aids. In Experiment 2, only a single target aircraft was presented a significant time (39min–42min) after presentation of the prospective memory instruction, and the external aids reduced prospective memory error by 34%. In both experiments, costs to the efficiency of non-prospective memory air traffic management (non-target aircraft acceptance response time, conflict detection response time) were reduced by non-adjacent aids compared to no aids or adjacent aids. In contrast, in both experiments, the efficiency of the prospective memory air traffic management (target aircraft acceptance response time) was facilitated by adjacent aids compared to non-adjacent aids. Together, these findings have potential implications for the design of automated alerting systems to maximize multi-task performance in work settings where operators monitor and control demanding perceptual displays. PMID:24059825

Criteria for identifying the molecular basis of the engram (CaMKII, PKMzeta).

PubMed

Lisman, John

2017-11-29

The engram refers to the molecular changes by which a memory is stored in the brain. Substantial evidence suggests that memory involves learning-dependent changes at synapses, a process termed long-term potentiation (LTP). Thus, understanding the storages process that underlies LTP may provide insight into how the engram is stored. LTP involves induction, maintenance (storage), and expression sub-processes; special tests are required to specifically reveal properties of the storage process. The strongest of these is the Erasure test in which a transiently applied agent that attacks a putative storage molecule may lead to persistent erasure of previously induced LTP/memory. Two major hypotheses have been proposed for LTP/memory storage: the CaMKII and PKM-zeta hypotheses. After discussing the tests that can be used to identify the engram (Necessity test, Saturation/Occlusion test, Erasure test), the status of these hypotheses is evaluated, based on the literature on LTP and memory-guided behavior. Review of the literature indicates that all three tests noted above support the CaMKII hypothesis when done at both the LTP level and at the behavioral level. Taken together, the results strongly suggest that the engram is stored by an LTP process in which CaMKII is a critical memory storage molecule.

EDITORIAL: Nanomemory: information and ingenuity Nanomemory: information and ingenuity

NASA Astrophysics Data System (ADS)

Demming, Anna

2013-04-01

The age of information has placed unprecedented demands on data storage. In response, a rich hub of research activity has erupted in the search for new types of memory with improved capacity and data processing speed [1, 2]. There has even been progress in mimicking the subtleties of how the human neural system remembers and forgets with artificial synaptic devices [3, 4]. Yet many challenges remain. As researchers at Brigham Young University in the US point out, 'Current data storage technologies have limitations that prevent their use in archival data storage applications'. Anthony C Pearson and colleagues look at the potential role of graphene in data storage solutions. Graphene's wide range of extraordinary properties has recommended it for a number of applications. This issue reports how it can form the basis of nanofuses that may be used for permanent, write-once-read-many (WORM) data storage devices [5]. Leon Chua's forecast of 'Memristor—the missing circuit element' [6] and the subsequent demonstration of memristance in nanoscale systems by researchers at HP Labs [7] triggered a surge of studies investigating the application of memristor devices in non-volatile memory [8]. In fact these structures may have a still broader impact in nanotechnology. At the nanoscale statistical variations in defect concentrations give rise to vast differences in behaviour, and device variability and ageing can be profound. These characteristics led George Snider to observe, 'Nanodevices are crummy', when considering their application in conventional Boolean logic systems [9]. Yet Snider's grim assessment was merely a prologue to an insightful recount of simulations demonstrating how to side-step a number of nanotechnology's main challenges by using self-organizing networks based on memristive devices. Similar fault tolerance is demonstrated in the organic-nanoparticle transistors developed by researchers at the University of Lille, who demonstrate a weighting behaviour that mimics aspects of synaptic functions that may be key to implementing neuromorphic computing [10]. Developments in this field show increasingly more sophisticated imitation of human neural processing with analogue memory functionality [3] and circuits that both learn and forget [4]. Keep an eye out for the Nanotechnology special issue on synaptic electronics later this year with guest editors James Gimzewski from the University of California, Los Angeles, and Dominique Vuillaume from the University of Lille, for a one-stop update on the latest cutting edge developments in this field. Graphene has demonstrated excellent potential in a number of applications from supercapacitors [11] to photomechanical actuators [12]. However, so far its potential in memory has been notably less explored. In this issue Anthony C Pearson and colleagues at Brigham Young University report how they fabricate graphene 'bow-tie' structures for fuses and program them though thermal oxidation [5]. As the researchers point out graphene's low atomic mobility, high chemical resistance to oxidation and excellent electrical conductivity make it well suited as archival data storage fuse material. They also highlight a number of attractive attributes in the devices as a whole: 'graphene WORM devices can be read and written electronically, can potentially have the very high data densities of flash memory, appear to be highly stable in both the on and off states, have a high on/off current ratio, and can be programmed with low voltages and powers'. In fuses an electrical connection is destroyed by an applied voltage. The process sounds destructive yet fuses are incredibly useful. Edison once famously commented, 'Just because something does not do what you planned it to do does not mean it is useless' [13]. There are synergies of this philosophy throughout nanotechnology research where apparently awkward behaviour is put to good use. Adding the dynamical nature of nanodevices to the list of obstacles to scalability, Snider rounded up his assessment, 'So we are faced with the challenge of computing with devices that are not only crummy, but dynamical as well'. Yet it was that dynamic behaviour that he went on to exploit in his demonstration of robust self-organizing networks using memristor devices. Successful research is by nature continually revealing behaviour that is unexpected or unusual. The work described here is just some of the many examples of how successful development in research does not tolerate the unexpected, but embraces it. References [1] Waser R and Aono M 2007 Nanoionics-based resistive switching memories Nature Mater 6 833-40 [2] Vontobel P O, Robinett W, Kuekes P J, Stewart D R, Straznicky J and Stanley Williams R 2009 Writing to and reading from a nano-scale crossbar memory based on memristors Nanotechnology 20 425204 [3] Seo K et al 2011 Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device Nanotechnology 22 254023 [4] Yang R, Terabe K, Liu G, Tsuruoka T, Hasegawa T, Gimzewski J K and Aono M 2012 On-demand nanodevice with electrical and neuromorphic multifunction realized by local ion migration ACS Nano 6 9515-20 [5] Pearson A C, Jamieson S, Linford M R, Lunt B M and Davis R C 2013 Oxidation of graphene 'bow tie' nanofuses for permanent, write-once-read-many data storage devices Nanotechnology 24 135202 [6]Chua L O 1971 Memristor—the missing circuit element IEEE Trans. Circuit Theory 18 507-19 [7] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 The missing memristor found Nature 453 80-3 [8] Non-volatile memory based on nanostructures http://iopscience.iop.org/0957-4484/22/25 [9] Snider G S 2007 Self-organized computation with unreliable, memristive nanodevices Nanotechnology 18 365202 [10] Alibart F, Pieutin S, Guérin D, Novembre C, Lenfant S, Lmimouni K, Gamrat C and Vuillaume D 2010 An organic nanoparticle transistor behaving as a biological spiking synapse Adv. Funct. Mater 20 330-7 [11] Bose S, Kim N H, Kuila T, Lau K-T and Lee J H 2011 Electrochemical performance of a graphene-polypyrrole nanocomposite as a supercapacitor electrode Nanotechnology 22 295202 [12] Loomis J, King B, Burkhead T, Xu P, Bessler N, Terentjev E and Panchapakesan B 2012 Graphene-nanoplatelet-based photomechanical actuators Nanotechnology 23 045501 [13] Finn C A 2001 Artifacts: An Archaeologist's Year in Silicon Valley (Cambridge, MA: MIT Press)

A comparative approach to the principal mechanisms of different memory systems

NASA Astrophysics Data System (ADS)

Rensing, Ludger; Koch, Michael; Becker, Annette

2009-12-01

The term “memory” applies not only to the preservation of information in neuronal and immune systems but also to phenomena observed for example in plants, single cells, and RNA viruses. We here compare the different forms of information storage with respect to possible common features. The latter may be characterized by (1) selection of pre-existing information, (2) activation of memory systems often including transcriptional, and translational, as well as epigenetic and genetic mechanisms, (3) subsequent consolidation of the activated state in a latent form ( standby mode), and (4) reactivation of the latent state of memory systems when the organism is exposed to the same (or conditioned) signal or to previous selective constraints. These features apparently also exist in the “evolutionary memory,” i.e., in evolving populations which have highly variable mutant spectra.

Which Working Memory Functions Predict Intelligence?

ERIC Educational Resources Information Center

Oberauer, Klaus; Sub, Heinz-Martin; Wilhelm, Oliver; Wittmann, Werner W.

2008-01-01

Investigates the relationship between three factors of working memory (storage and processing, relational integration, and supervision) and four factors of intelligence (reasoning, speed, memory, and creativity) using structural equation models. Relational integration predicted reasoning ability at least as well as the storage-and-processing…

Short-Term Memory: The "Storage" Component of Human Brain Responses Predicts Recall.

ERIC Educational Resources Information Center

Chapman, Robert M.; And Others

1978-01-01

Presents electrophysiological and behavioral evidence for a neural process related to storage in short-term memory. Predicting recall performance on the basis of the storage component of brain responses is presented. A list of references is also included. (HM)

Long lifetime and high-fidelity quantum memory of photonic polarization qubit by lifting zeeman degeneracy.

PubMed

Xu, Zhongxiao; Wu, Yuelong; Tian, Long; Chen, Lirong; Zhang, Zhiying; Yan, Zhihui; Li, Shujing; Wang, Hai; Xie, Changde; Peng, Kunchi

2013-12-13

Long-lived and high-fidelity memory for a photonic polarization qubit (PPQ) is crucial for constructing quantum networks. We present a millisecond storage system based on electromagnetically induced transparency, in which a moderate magnetic field is applied on a cold-atom cloud to lift Zeeman degeneracy and, thus, the PPQ states are stored as two magnetic-field-insensitive spin waves. Especially, the influence of magnetic-field-sensitive spin waves on the storage performances is almost totally avoided. The measured average fidelities of the polarization states are 98.6% at 200  μs and 78.4% at 4.5 ms, respectively.

A PDA-based electrocardiogram/blood pressure telemonitor for telemedicine.

PubMed

Bolanos, Marcos; Nazeran, Homayoun; Gonzalez, Izzac; Parra, Ricardo; Martinez, Christopher

2004-01-01

An electrocardiogram (ECG) / blood pressure (BP) telemonitor consisting of comprehensive integration of various electrical engineering concepts, devices, and methods was developed. This personal digital assistant-based (PDAbased) system focused on integration of biopotential amplifiers, photoplethysmographic measurement of blood pressure, microcontroller devices, programming methods, wireless transmission, signal filtering and analysis, interfacing, and long term memory devices (24 hours) to develop a state-of-the-art ECG/BP telemonitor. These instrumentation modules were developed and tested to realize a complete and compact system that could be deployed to assist in telemedicine applications and heart rate variability studies. The specific objective of this device was to facilitate the long term monitoring and recording of ECG and blood pressure signals. This device was able to acquire ECG/BP waveforms, transmit them wirelessly to a PDA, save them onto a compact flash memory, and display them on the LCD screen of the PDA. It was also capable of calculating the heart rate (HR) in beats per minute, and providing systolic and diastolic blood pressure values.

New Maximally Entangled States for Pattern-Association Through Evolutionary Processes in a Two-Qubit System

NASA Astrophysics Data System (ADS)

Singh, Manu Pratap; Rajput, Balwant S.

2017-04-01

New set of maximally entangled states (Singh-Rajput MES), constituting orthonormal eigen bases, has been revisited and its superiority and suitability in pattern-association (Quantum Associative Memory, QuAM) have been demonstrated. Using these MES as memory states in the evolutionary process of pattern storage in a two-qubit system, it has been shown that the first two states of Singh-Rajput MES are useful for storing the pattern |11> and the last two of these MES are useful in storing the pattern |10> Recall operations of quantum associate memory (QuAM) have been conducted through evolutionary process in terms of unitary operators by separately choosing Singh-Rajput MES and Bell's MES as memory states and it has been shown that Singh-Rajput MES as valid memory states for recalling the patterns in a two-qubit system are much more suitable than Bell's MES.

Optimized design of embedded DSP system hardware supporting complex algorithms

NASA Astrophysics Data System (ADS)

Li, Yanhua; Wang, Xiangjun; Zhou, Xinling

2003-09-01

The paper presents an optimized design method for a flexible and economical embedded DSP system that can implement complex processing algorithms as biometric recognition, real-time image processing, etc. It consists of a floating-point DSP, 512 Kbytes data RAM, 1 Mbytes FLASH program memory, a CPLD for achieving flexible logic control of input channel and a RS-485 transceiver for local network communication. Because of employing a high performance-price ratio DSP TMS320C6712 and a large FLASH in the design, this system permits loading and performing complex algorithms with little algorithm optimization and code reduction. The CPLD provides flexible logic control for the whole DSP board, especially in input channel, and allows convenient interface between different sensors and DSP system. The transceiver circuit can transfer data between DSP and host computer. In the paper, some key technologies are also introduced which make the whole system work efficiently. Because of the characters referred above, the hardware is a perfect flat for multi-channel data collection, image processing, and other signal processing with high performance and adaptability. The application section of this paper presents how this hardware is adapted for the biometric identification system with high identification precision. The result reveals that this hardware is easy to interface with a CMOS imager and is capable of carrying out complex biometric identification algorithms, which require real-time process.

Sptrace

NASA Technical Reports Server (NTRS)

Burleigh, Scott C.

2011-01-01

Sptrace is a general-purpose space utilization tracing system that is conceptually similar to the commercial Purify product used to detect leaks and other memory usage errors. It is designed to monitor space utilization in any sort of heap, i.e., a region of data storage on some device (nominally memory; possibly shared and possibly persistent) with a flat address space. This software can trace usage of shared and/or non-volatile storage in addition to private RAM (random access memory). Sptrace is implemented as a set of C function calls that are invoked from within the software that is being examined. The function calls fall into two broad classes: (1) functions that are embedded within the heap management software [e.g., JPL's SDR (Simple Data Recorder) and PSM (Personal Space Management) systems] to enable heap usage analysis by populating a virtual time-sequenced log of usage activity, and (2) reporting functions that are embedded within the application program whose behavior is suspect. For ease of use, these functions may be wrapped privately inside public functions offered by the heap management software. Sptrace can be used for VxWorks or RTEMS realtime systems as easily as for Linux or OS/X systems.

Priming Effects Associated with the Hierarchical Levels of Classification Systems

ERIC Educational Resources Information Center

Loehrlein, Aaron J.

2012-01-01

The act of categorization produces conceptual representations in memory while knowledge organization (KO) systems provide conceptual representations that are used in information storage and retrieval systems. Previous research has explored how KO systems can be designed to resemble the user's internal conceptual structures. However, the more…

Storage of multiple single-photon pulses emitted from a quantum dot in a solid-state quantum memory.

PubMed

Tang, Jian-Shun; Zhou, Zong-Quan; Wang, Yi-Tao; Li, Yu-Long; Liu, Xiao; Hua, Yi-Lin; Zou, Yang; Wang, Shuang; He, De-Yong; Chen, Geng; Sun, Yong-Nan; Yu, Ying; Li, Mi-Feng; Zha, Guo-Wei; Ni, Hai-Qiao; Niu, Zhi-Chuan; Li, Chuan-Feng; Guo, Guang-Can

2015-10-15

Quantum repeaters are critical components for distributing entanglement over long distances in presence of unavoidable optical losses during transmission. Stimulated by the Duan-Lukin-Cirac-Zoller protocol, many improved quantum repeater protocols based on quantum memories have been proposed, which commonly focus on the entanglement-distribution rate. Among these protocols, the elimination of multiple photons (or multiple photon-pairs) and the use of multimode quantum memory are demonstrated to have the ability to greatly improve the entanglement-distribution rate. Here, we demonstrate the storage of deterministic single photons emitted from a quantum dot in a polarization-maintaining solid-state quantum memory; in addition, multi-temporal-mode memory with 1, 20 and 100 narrow single-photon pulses is also demonstrated. Multi-photons are eliminated, and only one photon at most is contained in each pulse. Moreover, the solid-state properties of both sub-systems make this configuration more stable and easier to be scalable. Our work will be helpful in the construction of efficient quantum repeaters based on all-solid-state devices.

Storage of multiple single-photon pulses emitted from a quantum dot in a solid-state quantum memory

PubMed Central

Tang, Jian-Shun; Zhou, Zong-Quan; Wang, Yi-Tao; Li, Yu-Long; Liu, Xiao; Hua, Yi-Lin; Zou, Yang; Wang, Shuang; He, De-Yong; Chen, Geng; Sun, Yong-Nan; Yu, Ying; Li, Mi-Feng; Zha, Guo-Wei; Ni, Hai-Qiao; Niu, Zhi-Chuan; Li, Chuan-Feng; Guo, Guang-Can

2015-01-01

Quantum repeaters are critical components for distributing entanglement over long distances in presence of unavoidable optical losses during transmission. Stimulated by the Duan–Lukin–Cirac–Zoller protocol, many improved quantum repeater protocols based on quantum memories have been proposed, which commonly focus on the entanglement-distribution rate. Among these protocols, the elimination of multiple photons (or multiple photon-pairs) and the use of multimode quantum memory are demonstrated to have the ability to greatly improve the entanglement-distribution rate. Here, we demonstrate the storage of deterministic single photons emitted from a quantum dot in a polarization-maintaining solid-state quantum memory; in addition, multi-temporal-mode memory with 1, 20 and 100 narrow single-photon pulses is also demonstrated. Multi-photons are eliminated, and only one photon at most is contained in each pulse. Moreover, the solid-state properties of both sub-systems make this configuration more stable and easier to be scalable. Our work will be helpful in the construction of efficient quantum repeaters based on all-solid-state devices. PMID:26468996

Mass Storage and Retrieval at Rome Laboratory

NASA Technical Reports Server (NTRS)

Kann, Joshua L.; Canfield, Brady W.; Jamberdino, Albert A.; Clarke, Bernard J.; Daniszewski, Ed; Sunada, Gary

1996-01-01

As the speed and power of modern digital computers continues to advance, the demands on secondary mass storage systems grow. In many cases, the limitations of existing mass storage reduce the overall effectiveness of the computing system. Image storage and retrieval is one important area where improved storage technologies are required. Three dimensional optical memories offer the advantage of large data density, on the order of 1 Tb/cm(exp 3), and faster transfer rates because of the parallel nature of optical recording. Such a system allows for the storage of multiple-Gbit sized images, which can be recorded and accessed at reasonable rates. Rome Laboratory is currently investigating several techniques to perform three-dimensional optical storage including holographic recording, two-photon recording, persistent spectral-hole burning, multi-wavelength DNA recording, and the use of bacteriorhodopsin as a recording material. In this paper, the current status of each of these on-going efforts is discussed. In particular, the potential payoffs as well as possible limitations are addressed.

Architectural design and simulation of a virtual memory

NASA Technical Reports Server (NTRS)

Kwok, G.; Chu, Y.

1971-01-01

Virtual memory is an imaginary main memory with a very large capacity which the programmer has at his disposal. It greatly contributes to the solution of the dynamic storage allocation problem. The architectural design of a virtual memory is presented which implements by hardware the idea of queuing and scheduling the page requests to a paging drum in such a way that the access of the paging drum is increased many times. With the design, an increase of up to 16 times in page transfer rate is achievable when the virtual memory is heavily loaded. This in turn makes feasible a great increase in the system throughput.

Process gas solidification system

DOEpatents

Fort, William G. S.; Lee, Jr., William W.

1978-01-01

It has been the practice to (a) withdraw hot, liquid UF.sub.6 from various systems, (b) direct the UF.sub.6 into storage cylinders, and (c) transport the filled cylinders to another area where the UF.sub.6 is permitted to solidify by natural cooling. However, some hazard attends the movement of cylinders containing liquid UF.sub.6, which is dense, toxic, and corrosive. As illustrated in terms of one of its applications, the invention is directed to withdrawing hot liquid UF.sub.6 from a system including (a) a compressor for increasing the pressure and temperature of a stream of gaseous UF.sub.6 to above its triple point and (b) a condenser for liquefying the compressed gas. A network containing block valves and at least first and second portable storage cylinders is connected between the outlet of the condenser and the suction inlet of the compressor. After an increment of liquid UF.sub.6 from the condenser has been admitted to the first cylinder, the cylinder is connected to the suction of the compressor to flash off UF.sub.6 from the cylinder, thus gradually solidifying UF.sub.6 therein. While the first cylinder is being cooled in this manner, an increment of liquid UF.sub.6 from the condenser is transferred into the second cylinder. UF.sub.6 then is flashed from the second cylinder while another increment of liquid UF.sub.6 is being fed to the first. The operations are repeated until both cylinders are filled with solid UF.sub.6, after which they can be moved safely. As compared with the previous technique, this procedure is safer, faster, and more economical. The method also provides the additional advantage of removing volatile impurities from the UF.sub.6 while it is being cooled.

Strong Motion Seismograph Based On MEMS Accelerometer

NASA Astrophysics Data System (ADS)

Teng, Y.; Hu, X.

2013-12-01

The MEMS strong motion seismograph we developed used the modularization method to design its software and hardware.It can fit various needs in different application situation.The hardware of the instrument is composed of a MEMS accelerometer,a control processor system,a data-storage system,a wired real-time data transmission system by IP network,a wireless data transmission module by 3G broadband,a GPS calibration module and power supply system with a large-volumn lithium battery in it. Among it,the seismograph's sensor adopted a three-axis with 14-bit high resolution and digital output MEMS accelerometer.Its noise level just reach about 99μg/√Hz and ×2g to ×8g dynamically selectable full-scale.Its output data rates from 1.56Hz to 800Hz. Its maximum current consumption is merely 165μA,and the device is so small that it is available in a 3mm×3mm×1mm QFN package. Furthermore,there is access to both low pass filtered data as well as high pass filtered data,which minimizes the data analysis required for earthquake signal detection. So,the data post-processing can be simplified. Controlling process system adopts a 32-bit low power consumption embedded ARM9 processor-S3C2440 and is based on the Linux operation system.The processor's operating clock at 400MHz.The controlling system's main memory is a 64MB SDRAM with a 256MB flash-memory.Besides,an external high-capacity SD card data memory can be easily added.So the system can meet the requirements for data acquisition,data processing,data transmission,data storage,and so on. Both wired and wireless network can satisfy remote real-time monitoring, data transmission,system maintenance,status monitoring or updating software.Linux was embedded and multi-layer designed conception was used.The code, including sensor hardware driver,the data acquisition,earthquake setting out and so on,was written on medium layer.The hardware driver consist of IIC-Bus interface driver, IO driver and asynchronous notification driver. The application program layer mainly concludes: earthquake parameter module, local database managing module, data transmission module, remote monitoring, FTP service and so on. The application layer adopted multi-thread process. The whole strong motion seismograph was encapsulated in a small aluminum box, which size is 80mm×120mm×55mm. The inner battery can work continuesly more than 24 hours. The MEMS accelerograph uses modular design for its software part and hardware part. It has remote software update function and can meet the following needs: a) Auto picking up the earthquake event; saving the data on wave-event files and hours files; It may be used for monitoring strong earthquake, explosion, bridge and house health. b) Auto calculate the earthquake parameters, and transferring those parameters by 3G wireless broadband network. This kind of seismograph has characteristics of low cost, easy installation. They can be concentrated in the urban region or areas need to specially care. We can set up a ground motion parameters quick report sensor network while large earthquake break out. Then high-resolution-fine shake-map can be easily produced for the need of emergency rescue. c) By loading P-wave detection program modules, it can be used for earthquake early warning for large earthquakes; d) Can easily construct a high-density layout seismic monitoring network owning remote control and modern intelligent earthquake sensor.

Alcohol and Memory: Storage and State Dependency

ERIC Educational Resources Information Center

Parker, Elizabeth S.; And Others

1976-01-01

Effects of acute alcohol intoxication on the storage phase of memory were evaluated with two tasks that minimized response retrieval: unpaced paired-associate learning with highly available responses and forced-choice picture recognition. It was concluded that storage processes are sensitive to disruption by alcohol. (CHK)

Radiative bistability and thermal memory.

PubMed

Kubytskyi, Viacheslav; Biehs, Svend-Age; Ben-Abdallah, Philippe

2014-08-15

We predict the existence of a thermal bistability in many-body systems out of thermal equilibrium which exchange heat by thermal radiation using insulator-metal transition materials. We propose a writing-reading procedure and demonstrate the possibility to exploit the thermal bistability to make a volatile thermal memory. We show that this thermal memory can be used to store heat and thermal information (via an encoding temperature) for arbitrary long times. The radiative thermal bistability could find broad applications in the domains of thermal management, information processing, and energy storage.

Lifetime of digital media: is optics the solution?

NASA Astrophysics Data System (ADS)

Spitz, Erich; Hourcade, Jean-Charles; Lalo", Franck

2010-01-01

While the short term and mid-term archiving of digital data and information can be handled reasonably well with modern techniques, the long term aspects of the problem (several decades or even centuries) are much more difficult to manage. The heart of the problem is the longevity of storage media, which presently does not go beyond a few years, maybe one or two decades in the best cases. In this article, we review the various strategies for long term archiving, with two main categories: active and passive. We evaluate the various recording media in terms of their longevity. We then discuss the recordable optical digital disks (RODDs) and the state of the art in this domain; the present situation is that, with the techniques that are implemented commercially, good prospects for long term archiving are not available. Nevertheless, the conceptual simplicity of RODDs could be exploited to create new recordable digital media; the improvements that are needed seem to be reachable with reasonable development effort. Since RODDs are now in strong competition with other systems (hard disks or flash memory for instance) that constantly make enormous progress, there seems to be little hope to see RODDs win the race of capacity; nevertheless, longevity could provide them with a new market, since the need for long term archiving is so pressing everywhere in the world.

Time evolution of coherent structures in networks of Hindmarch Rose neurons

NASA Astrophysics Data System (ADS)

Mainieri, M. S.; Erichsen, R.; Brunnet, L. G.

2005-08-01

In the regime of partial synchronization, networks of diffusively coupled Hindmarch-Rose neurons show coherent structures developing in a region of the phase space which is wider than in the correspondent single neuron. Such structures are kept, without important changes, during several bursting periods. In this work, we study the time evolution of these structures and their dynamical stability under damage. This system may model the behavior of ensembles of neurons coupled through a bidirectional gap junction or, in a broader sense, it could also account for the molecular cascades present in the formation of flash and short time memory.

Detection and analysis of radio frequency lightning emissions

NASA Technical Reports Server (NTRS)

Jalali, F.

1982-01-01

The feasibility study of detection of lightning discharges from a geosynchronous satellite requires adequate ground-based information regarding emission characteristics. In this investigation, a measurement system for collection of S-band emission data is set up and calibrated, and the operations procedures for rapid data collection during a storm activity developed. The system collects emission data in two modes; a digitized, high-resolution, short duration record stored in solid-state memory, and a continuous long-duration record on magnetic tape. Representative lightning flash data are shown. Preliminary results indicate appreciable RF emissions at 2 gHz from both the leader and return strokes portions of the cloud-to-ground discharge with strong peaks associated with the return strokes.

Nonmuscle myosin IIB as a therapeutic target for the prevention of relapse to methamphetamine use

PubMed Central

Young, Erica J.; Blouin, Ashley M.; Briggs, Sherri B.; Sillivan, Stephanie E.; Lin, Li; Cameron, Michael D.; Rumbaugh, Gavin; Miller, Courtney A.

2015-01-01

Memories associated with drug use increase vulnerability to relapse in substance use disorder (SUD) and there are no pharmacotherapies for the prevention of relapse. Previously, we reported a promising finding that storage of memories associated with methamphetamine (METH), but not memories for fear or food reward, is vulnerable to disruption by actin depolymerization in the basolateral amygdala complex (BLC). However, actin is not a viable therapeutic target because of its numerous functions throughout the body. Here we report the discovery of a viable therapeutic target, nonmuscle myosin II (NMIIB), a molecular motor that supports memory by directly driving synaptic actin polymerization. A single intra-BLC treatment with Blebbistatin, a small molecule inhibitor of class II myosin isoforms, including NMIIB, produced a long-lasting disruption of context-induced drug seeking (at least 30 days). Further, post-consolidation genetic knockdown of Myh10, the heavy chain of the most highly expressed NMII in the BLC, was sufficient to produce METH-associated memory loss. Blebbistatin was found to be highly brain penetrant. A single systemic injection of the compound selectively disrupted the storage of METH-associated memory and reversed the accompanying increase in BLC spine density. This effect was specific to METH-associated memory, as it had no effect on an auditory fear memory. The effect was also independent of retrieval, as METH-associated memory was disrupted twenty-four hours after a single systemic injection of Blebbistatin delivered in the home cage. Together, these results argue for the further development of small molecule inhibitors of nonmuscle myosin II as potential therapeutics for the prevention of SUD relapse triggered by drug associations. PMID:26239291

Short-term memory to long-term memory transition in a nanoscale memristor.

PubMed

Chang, Ting; Jo, Sung-Hyun; Lu, Wei

2011-09-27

"Memory" is an essential building block in learning and decision-making in biological systems. Unlike modern semiconductor memory devices, needless to say, human memory is by no means eternal. Yet, forgetfulness is not always a disadvantage since it releases memory storage for more important or more frequently accessed pieces of information and is thought to be necessary for individuals to adapt to new environments. Eventually, only memories that are of significance are transformed from short-term memory into long-term memory through repeated stimulation. In this study, we show experimentally that the retention loss in a nanoscale memristor device bears striking resemblance to memory loss in biological systems. By stimulating the memristor with repeated voltage pulses, we observe an effect analogous to memory transition in biological systems with much improved retention time accompanied by additional structural changes in the memristor. We verify that not only the shape or the total number of stimuli is influential, but also the time interval between stimulation pulses (i.e., the stimulation rate) plays a crucial role in determining the effectiveness of the transition. The memory enhancement and transition of the memristor device was explained from the microscopic picture of impurity redistribution and can be qualitatively described by the same equations governing biological memories. © 2011 American Chemical Society

Interaction between basal ganglia and limbic circuits in learning and memory processes.

PubMed

Calabresi, Paolo; Picconi, Barbara; Tozzi, Alessandro; Ghiglieri, Veronica

2016-01-01

Hippocampus and striatum play distinctive roles in memory processes since declarative and non-declarative memory systems may act independently. However, hippocampus and striatum can also be engaged to function in parallel as part of a dynamic system to integrate previous experience and adjust behavioral responses. In these structures the formation, storage, and retrieval of memory require a synaptic mechanism that is able to integrate multiple signals and to translate them into persistent molecular traces at both the corticostriatal and hippocampal/limbic synapses. The best cellular candidate for this complex synthesis is represented by long-term potentiation (LTP). A common feature of LTP expressed in these two memory systems is the critical requirement of convergence and coincidence of glutamatergic and dopaminergic inputs to the dendritic spines of the neurons expressing this form of synaptic plasticity. In experimental models of Parkinson's disease abnormal accumulation of α-synuclein affects these two memory systems by altering two major synaptic mechanisms underlying cognitive functions in cholinergic striatal neurons, likely implicated in basal ganglia dependent operative memory, and in the CA1 hippocampal region, playing a central function in episodic/declarative memory processes. Copyright © 2015 Elsevier Ltd. All rights reserved.

Highly Efficient Coherent Optical Memory Based on Electromagnetically Induced Transparency

NASA Astrophysics Data System (ADS)

Hsiao, Ya-Fen; Tsai, Pin-Ju; Chen, Hung-Shiue; Lin, Sheng-Xiang; Hung, Chih-Chiao; Lee, Chih-Hsi; Chen, Yi-Hsin; Chen, Yong-Fan; Yu, Ite A.; Chen, Ying-Cheng

2018-05-01

Quantum memory is an important component in the long-distance quantum communication based on the quantum repeater protocol. To outperform the direct transmission of photons with quantum repeaters, it is crucial to develop quantum memories with high fidelity, high efficiency and a long storage time. Here, we achieve a storage efficiency of 92.0 (1.5)% for a coherent optical memory based on the electromagnetically induced transparency scheme in optically dense cold atomic media. We also obtain a useful time-bandwidth product of 1200, considering only storage where the retrieval efficiency remains above 50%. Both are the best record to date in all kinds of schemes for the realization of optical memory. Our work significantly advances the pursuit of a high-performance optical memory and should have important applications in quantum information science.

Highly Efficient Coherent Optical Memory Based on Electromagnetically Induced Transparency.

PubMed

Hsiao, Ya-Fen; Tsai, Pin-Ju; Chen, Hung-Shiue; Lin, Sheng-Xiang; Hung, Chih-Chiao; Lee, Chih-Hsi; Chen, Yi-Hsin; Chen, Yong-Fan; Yu, Ite A; Chen, Ying-Cheng

2018-05-04

Quantum memory is an important component in the long-distance quantum communication based on the quantum repeater protocol. To outperform the direct transmission of photons with quantum repeaters, it is crucial to develop quantum memories with high fidelity, high efficiency and a long storage time. Here, we achieve a storage efficiency of 92.0 (1.5)% for a coherent optical memory based on the electromagnetically induced transparency scheme in optically dense cold atomic media. We also obtain a useful time-bandwidth product of 1200, considering only storage where the retrieval efficiency remains above 50%. Both are the best record to date in all kinds of schemes for the realization of optical memory. Our work significantly advances the pursuit of a high-performance optical memory and should have important applications in quantum information science.

Faithful Solid State Optical Memory with Dynamically Decoupled Spin Wave Storage

NASA Astrophysics Data System (ADS)

Lovrić, Marko; Suter, Dieter; Ferrier, Alban; Goldner, Philippe

2013-07-01

We report a high fidelity optical memory in which dynamical decoupling is used to extend the storage time. This is demonstrated in a rare-earth doped crystal in which optical coherences were transferred to nuclear spin coherences and then protected against environmental noise by dynamical decoupling, leading to storage times of up to 4.2 ms. An interference experiment shows that relative phases of input pulses are preserved through the whole storage and retrieval process with a visibility ≈1, demonstrating the usefulness of dynamical decoupling for extending the storage time of quantum memories. We also show that dynamical decoupling sequences insensitive to initial spin coherence increase retrieval efficiency.

Faithful solid state optical memory with dynamically decoupled spin wave storage.

PubMed

Lovrić, Marko; Suter, Dieter; Ferrier, Alban; Goldner, Philippe

2013-07-12

We report a high fidelity optical memory in which dynamical decoupling is used to extend the storage time. This is demonstrated in a rare-earth doped crystal in which optical coherences were transferred to nuclear spin coherences and then protected against environmental noise by dynamical decoupling, leading to storage times of up to 4.2 ms. An interference experiment shows that relative phases of input pulses are preserved through the whole storage and retrieval process with a visibility ≈1, demonstrating the usefulness of dynamical decoupling for extending the storage time of quantum memories. We also show that dynamical decoupling sequences insensitive to initial spin coherence increase retrieval efficiency.

Blue light filtered white light induces depression-like responses and temporary spatial learning deficits in rats.

PubMed

Meng, Qinghe; Lian, Yuzheng; Jiang, Jianjun; Wang, Wei; Hou, Xiaohong; Pan, Yao; Chu, Hongqian; Shang, Lanqin; Wei, Xuetao; Hao, Weidong

2018-04-18

Ambient light has a vital impact on mood and cognitive functions. Blue light has been previously reported to play a salient role in the antidepressant effect via melanopsin. Whether blue light filtered white light (BFW) affects mood and cognitive functions remains unclear. The present study aimed to investigate whether BFW led to depression-like symptoms and cognitive deficits including spatial learning and memory abilities in rats, and whether they were associated with the light-responsive function in retinal explants. Male Sprague-Dawley albino rats were randomly divided into 2 groups (n = 10) and treated with a white light-emitting diode (LED) light source and BFW light source, respectively, under a standard 12 : 12 h L/D condition over 30 days. The sucrose consumption test, forced swim test (FST) and the level of plasma corticosterone (CORT) were employed to evaluate depression-like symptoms in rats. Cognitive functions were assessed by the Morris water maze (MWM) test. A multi-electrode array (MEA) system was utilized to measure electro-retinogram (ERG) responses induced by white or BFW flashes. The effect of BFW over 30 days on depression-like responses in rats was indicated by decreased sucrose consumption in the sucrose consumption test, an increased immobility time in the FST and an elevated level of plasma CORT. BFW led to temporary spatial learning deficits in rats, which was evidenced by prolonged escape latency and swimming distances in the spatial navigation test. However, no changes were observed in the short memory ability of rats treated with BFW. The micro-ERG results showed a delayed implicit time and reduced amplitudes evoked by BFW flashes compared to the white flash group. BFW induces depression-like symptoms and temporary spatial learning deficits in rats, which might be closely related to the impairment of light-evoked output signals in the retina.

Phase change cellular automata modeling of GeTe, GaSb and SnSe stacked chalcogenide films

NASA Astrophysics Data System (ADS)

Mihai, C.; Velea, A.

2018-06-01

Data storage needs are increasing at a rapid pace across all economic sectors, so the need for new memory technologies with adequate capabilities is also high. Phase change memories (PCMs) are a leading contender in the emerging race for non-volatile memories due to their fast operation speed, high scalability, good reliability and low power consumption. However, in order to meet the present and future storage demands, PCM technologies must further increase the storage density. Here, we employ a probabilistic cellular automata approach to explore the multi-step threshold switching from the reset (off) to the set (on) state in chalcogenide stacked structures. Simulations have shown that in order to obtain multi-step switching with high contrast among different resistance states, the stacked structure needs to contain materials with a large difference among their crystallization temperatures and careful tuning of strata thicknesses. The crystallization dynamics can be controlled through the external energy pulses applied to the system, in such a way that a balance between nucleation and growth in phase change behavior can be achieved, optimized for PCMs.

Working memory components that predict word problem solving: Is it merely a function of reading, calculation, and fluid intelligence?

PubMed

Fung, Wenson; Swanson, H Lee

2017-07-01

The purpose of this study was to assess whether the differential effects of working memory (WM) components (the central executive, phonological loop, and visual-spatial sketchpad) on math word problem-solving accuracy in children (N = 413, ages 6-10) are completely mediated by reading, calculation, and fluid intelligence. The results indicated that all three WM components predicted word problem solving in the nonmediated model, but only the storage component of WM yielded a significant direct path to word problem-solving accuracy in the fully mediated model. Fluid intelligence was found to moderate the relationship between WM and word problem solving, whereas reading, calculation, and related skills (naming speed, domain-specific knowledge) completely mediated the influence of the executive system on problem-solving accuracy. Our results are consistent with findings suggesting that storage eliminates the predictive contribution of executive WM to various measures Colom, Rebollo, Abad, & Shih (Memory & Cognition, 34: 158-171, 2006). The findings suggest that the storage component of WM, rather than the executive component, has a direct path to higher-order processing in children.

Atomic memory access hardware implementations

DOEpatents

Ahn, Jung Ho; Erez, Mattan; Dally, William J

2015-02-17

Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.

Quantum memory with optically trapped atoms.

PubMed

Chuu, Chih-Sung; Strassel, Thorsten; Zhao, Bo; Koch, Markus; Chen, Yu-Ao; Chen, Shuai; Yuan, Zhen-Sheng; Schmiedmayer, Jörg; Pan, Jian-Wei

2008-09-19

We report the experimental demonstration of quantum memory for collective atomic states in a far-detuned optical dipole trap. Generation of the collective atomic state is heralded by the detection of a Raman scattered photon and accompanied by storage in the ensemble of atoms. The optical dipole trap provides confinement for the atoms during the quantum storage while retaining the atomic coherence. We probe the quantum storage by cross correlation of the photon pair arising from the Raman scattering and the retrieval of the atomic state stored in the memory. Nonclassical correlations are observed for storage times up to 60 mus.

Working memory consolidation: insights from studies on attention and working memory.

PubMed

Ricker, Timothy J; Nieuwenstein, Mark R; Bayliss, Donna M; Barrouillet, Pierre

2018-04-10

Working memory, the system that maintains a limited set of representations for immediate use in cognition, is a central part of human cognition. Three processes have recently been proposed to govern information storage in working memory: consolidation, refreshing, and removal. Here, we discuss in detail the theoretical construct of working memory consolidation, a process critical to the creation of a stable working memory representation. We present a brief overview of the research that indicated the need for a construct such as working memory consolidation and the subsequent research that has helped to define the parameters of the construct. We then move on to explicitly state the points of agreement as to what processes are involved in working memory consolidation. © 2018 New York Academy of Sciences.

Electronic shift register memory based on molecular electron-transfer reactions

NASA Technical Reports Server (NTRS)

Hopfield, J. J.; Onuchic, Jose Nelson; Beratan, David N.

1989-01-01

The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

Multimodal properties and dynamics of gradient echo quantum memory.

PubMed

Hétet, G; Longdell, J J; Sellars, M J; Lam, P K; Buchler, B C

2008-11-14

We investigate the properties of a recently proposed gradient echo memory (GEM) scheme for information mapping between optical and atomic systems. We show that GEM can be described by the dynamic formation of polaritons in k space. This picture highlights the flexibility and robustness with regards to the external control of the storage process. Our results also show that, as GEM is a frequency-encoding memory, it can accurately preserve the shape of signals that have large time-bandwidth products, even at moderate optical depths. At higher optical depths, we show that GEM is a high fidelity multimode quantum memory.

Two-dimensional ultrahigh-density X-ray optical memory.

PubMed

Bezirganyan, Hakob P; Bezirganyan, Siranush E; Bezirganyan, Hayk H; Bezirganyan, Petros H

2007-01-01

Most important aspect of nanotechnology applications in the information ultrahigh storage is the miniaturization of data carrier elements of the storage media with emphasis on the long-term stability. Proposed two-dimensional ultrahigh-density X-ray optical memory, named X-ROM, with long-term stability is an information carrier basically destined for digital data archiving. X-ROM is a semiconductor wafer, in which the high-reflectivity nanosized X-ray mirrors are embedded. Data are encoded due to certain positions of the mirrors. Ultrahigh-density data recording procedure can e.g., be performed via mask-less zone-plate-array lithography (ZPAL), spatial-phase-locked electron-beam lithography (SPLEBL), or focused ion-beam lithography (FIB). X-ROM manufactured by nanolithography technique is a write-once memory useful for terabit-scale memory applications, if the surface area of the smallest recording pits is less than 100 nm2. In this case the X-ROM surface-storage capacity of a square centimetre becomes by two orders of magnitude higher than the volumetric data density really achieved for three-dimensional optical data storage medium. Digital data read-out procedure from proposed X-ROM can e.g., be performed via glancing-angle incident X-ray micro beam (GIX) using the well-developed X-ray reflectometry technique. In presented theoretical paper the crystal-analyser operating like an image magnifier is added to the set-up of X-ROM data handling system for the purpose analogous to case of application the higher numerical aperture objective in optical data read-out system. We also propose the set-up of the X-ROM readout system based on more the one incident X-ray micro beam. Presented scheme of two-beam data handling system, which operates on two mutually perpendicular well-collimated monochromatic incident X-ray micro beams, essentially increases the reliability of the digital information read-out procedure. According the graphs of characteristic functions presented in paper, one may choose optimally the incident radiation wavelength, as well as the angle of incidence of X-ray micro beams, appropriate for proposed digital data read-out procedure.

Up-to-date state of storage techniques used for large numerical data files

NASA Technical Reports Server (NTRS)

Chlouba, V.

1975-01-01

Methods for data storage and output in data banks and memory files are discussed along with a survey of equipment available for this. Topics discussed include magnetic tapes, magnetic disks, Terabit magnetic tape memory, Unicon 690 laser memory, IBM 1360 photostore, microfilm recording equipment, holographic recording, film readers, optical character readers, digital data storage techniques, and photographic recording. The individual types of equipment are summarized in tables giving the basic technical parameters.

Improved memory word line configuration allows high storage density

NASA Technical Reports Server (NTRS)

1966-01-01

Plated wire memory word drive line allows high storage density, good plated wire transmission and a simplified memory plane configuration. A half-turn word drive line with a magnetic keeper is used. The ground plane provides the return path for both the word current and the plated wire transmission line.

Coherent optical pulse sequencer for quantum applications.

PubMed

Hosseini, Mahdi; Sparkes, Ben M; Hétet, Gabriel; Longdell, Jevon J; Lam, Ping Koy; Buchler, Ben C

2009-09-10

The bandwidth and versatility of optical devices have revolutionized information technology systems and communication networks. Precise and arbitrary control of an optical field that preserves optical coherence is an important requisite for many proposed photonic technologies. For quantum information applications, a device that allows storage and on-demand retrieval of arbitrary quantum states of light would form an ideal quantum optical memory. Recently, significant progress has been made in implementing atomic quantum memories using electromagnetically induced transparency, photon echo spectroscopy, off-resonance Raman spectroscopy and other atom-light interaction processes. Single-photon and bright-optical-field storage with quantum states have both been successfully demonstrated. Here we present a coherent optical memory based on photon echoes induced through controlled reversible inhomogeneous broadening. Our scheme allows storage of multiple pulses of light within a chosen frequency bandwidth, and stored pulses can be recalled in arbitrary order with any chosen delay between each recalled pulse. Furthermore, pulses can be time-compressed, time-stretched or split into multiple smaller pulses and recalled in several pieces at chosen times. Although our experimental results are so far limited to classical light pulses, our technique should enable the construction of an optical random-access memory for time-bin quantum information, and have potential applications in quantum information processing.

Online & Offline data storage and data processing at the European XFEL facility

NASA Astrophysics Data System (ADS)

Gasthuber, Martin; Dietrich, Stefan; Malka, Janusz; Kuhn, Manuela; Ensslin, Uwe; Wrona, Krzysztof; Szuba, Janusz

2017-10-01

For the upcoming experiments at the European XFEL light source facility, a new online and offline data processing and storage infrastructure is currently being built and verified. Based on the experience of the system being developed for the Petra III light source at DESY, presented at the last CHEP conference, we further develop the system to cope with the much higher volumes and rates ( 50GB/sec) together with a more complex data analysis and infrastructure conditions (i.e. long range InfiniBand connections). This work will be carried out in collaboration of DESY/IT, European XFEL and technology support from IBM/Research. This presentation will shortly wrap up the experience of 1 year runtime of the PetraIII ([3]) system, continue with a short description of the challenges for the European XFEL ([2]) experiments and the main section, showing the proposed system for online and offline with initial result from real implementation (HW & SW). This will cover the selected cluster filesystem GPFS ([5]) including Quality of Service (QOS), extensive use of flash based subsystems and other new and unique features this architecture will benefit from.

Training of Attentional Filtering, but Not of Memory Storage, Enhances Working Memory Efficiency by Strengthening the Neuronal Gatekeeper Network.

PubMed

Schmicker, Marlen; Schwefel, Melanie; Vellage, Anne-Katrin; Müller, Notger G

2016-04-01

Memory training (MT) in older adults with memory deficits often leads to frustration and, therefore, is usually not recommended. Here, we pursued an alternative approach and looked for transfer effects of 1-week attentional filter training (FT) on working memory performance and its neuronal correlates in young healthy humans. The FT effects were compared with pure MT, which lacked the necessity to filter out irrelevant information. Before and after training, all participants performed an fMRI experiment that included a combined task in which stimuli had to be both filtered based on color and stored in memory. We found that training induced processing changes by biasing either filtering or storage. FT induced larger transfer effects on the untrained cognitive function than MT. FT increased neuronal activity in frontal parts of the neuronal gatekeeper network, which is proposed to hinder irrelevant information from being unnecessarily stored in memory. MT decreased neuronal activity in the BG part of the gatekeeper network but enhanced activity in the parietal storage node. We take these findings as evidence that FT renders working memory more efficient by strengthening the BG-prefrontal gatekeeper network. MT, on the other hand, simply stimulates storage of any kind of information. These findings illustrate a tight connection between working memory and attention, and they may open up new avenues for ameliorating memory deficits in patients with cognitive impairments.

Testing episodic memory in animals: a new approach.

PubMed

Griffiths, D P; Clayton, N S

2001-08-01

Episodic memory involves the encoding and storage of memories concerned with unique personal experiences and their subsequent recall, and it has long been the subject of intensive investigation in humans. According to Tulving's classical definition, episodic memory "receives and stores information about temporally dated episodes or events and temporal-spatial relations among these events." Thus, episodic memory provides information about the 'what' and 'when' of events ('temporally dated experiences') and about 'where' they happened ('temporal-spatial relations'). The storage and subsequent recall of this episodic information was thought to be beyond the memory capabilities of nonhuman animals. Although there are many laboratory procedures for investigating memory for discrete past episodes, until recently there were no previous studies that fully satisfied the criteria of Tulving's definition: they can all be explained in much simpler terms than episodic memory. However, current studies of memory for cache sites in food-storing jays provide an ethologically valid model for testing episodic-like memory in animals, thereby bridging the gap between human and animal studies memory. There is now a pressing need to adapt these experimental tests of episodic memory for other animals. Given the potential power of transgenic and knock-out procedures for investigating the genetic and molecular bases of learning and memory in laboratory rodents, not to mention the wealth of knowledge about the neuroanatomy and neurophysiology of the rodent hippocampus (a brain area heavily implicated in episodic memory), an obvious next step is to develop a rodent model of episodic-like memory based on the food-storing bird paradigm. The development of a rodent model system could make an important contribution to our understanding of the neural, molecular, and behavioral mechanisms of mammalian episodic memory.