Flip-chip assembly and reliability using gold/tin solder bumps
NASA Astrophysics Data System (ADS)
Oppermann, Hermann; Hutter, Matthias; Klein, Matthias; Reichl, Herbert
2004-09-01
Au/Sn solder bumps are commonly used for flip chip assembly of optoelectronic and RF devices. They allow a fluxless assembly which is required to avoid contamination at optical interfaces. Flip chip assembly experiments were carried out using as plated Au/Sn bumps without prior bump reflow. An RF and reliability test vehicles comprise a GaAs chip which was flip chip soldered on a silicon substrate. Temperature cycling tests with and without underfiller were performed and the results are presented. The different failure modes for underfilled and non-underfilled samples were discussed and compared. Additional reliability tests were performed with flip chip bonding by gold thermocompression for comparison. The test results and the failure modes are discussed in detail.
Fabrication of five-level ultraplanar micromirror arrays by flip-chip assembly
NASA Astrophysics Data System (ADS)
Michalicek, M. Adrian; Bright, Victor M.
2001-10-01
This paper reports a detailed study of the fabrication of various piston, torsion, and cantilever style micromirror arrays using a novel, simple, and inexpensive flip-chip assembly technique. Several rectangular and polar arrays were commercially prefabricated in the MUMPs process and then flip-chip bonded to form advanced micromirror arrays where adverse effects typically associated with surface micromachining were removed. These arrays were bonded by directly fusing the MUMPs gold layers with no complex preprocessing. The modules were assembled using a computer-controlled, custom-built flip-chip bonding machine. Topographically opposed bond pads were designed to correct for slight misalignment errors during bonding and typically result in less than 2 micrometers of lateral alignment error. Although flip-chip micromirror performance is briefly discussed, the means used to create these arrays is the focus of the paper. A detailed study of flip-chip process yield is presented which describes the primary failure mechanisms for flip-chip bonding. Studies of alignment tolerance, bonding force, stress concentration, module planarity, bonding machine calibration techniques, prefabrication errors, and release procedures are presented in relation to specific observations in process yield. Ultimately, the standard thermo-compression flip-chip assembly process remains a viable technique to develop highly complex prototypes of advanced micromirror arrays.
Flip Chip on Organic Substrates: A Feasibility Study for Space Applications
2017-03-01
scheme, a 1752 I/O land grid array (LGA) package with decoupling capacitors, heat sink and optional column attach [1] as shown in Figure 1...investigated the effect of moisture and current loading on the Class Y flip chip on ceramic reliability [ 2 ]. The UT1752FC Class Y technology has...chip assembly to ceramic test substrates, the FA10 die are assembled to build-up organic test substrates as shown in Figure 2 . These assemblies
NASA Astrophysics Data System (ADS)
Son, Ho-Young; Kim, Ilho; Lee, Soon-Bok; Jung, Gi-Jo; Park, Byung-Jin; Paik, Kyung-Wook
2009-01-01
A thick Cu column based double-bump flip chip structure is one of the promising alternatives for fine pitch flip chip applications. In this study, the thermal cycling (T/C) reliability of Cu/SnAg double-bump flip chip assemblies was investigated, and the failure mechanism was analyzed through the correlation of T/C test and the finite element analysis (FEA) results. After 1000 thermal cycles, T/C failures occurred at some Cu/SnAg bumps located at the edge and corner of chips. Scanning acoustic microscope analysis and scanning electron microscope observations indicated that the failure site was the Cu column/Si chip interface. It was identified by a FEA where the maximum stress concentration was located during T/C. During T/C, the Al pad between the Si chip and a Cu column bump was displaced due to thermomechanical stress. Based on the low cycle fatigue model, the accumulation of equivalent plastic strain resulted in thermal fatigue deformation of the Cu column bumps and ultimately reduced the thermal cycling lifetime. The maximum equivalent plastic strains of some bumps at the chip edge increased with an increased number of thermal cycles. However, equivalent plastic strains of the inner bumps did not increase regardless of the number of thermal cycles. In addition, the z-directional normal plastic strain ɛ22 was determined to be compressive and was a dominant component causing the plastic deformation of Cu/SnAg double bumps. As the number of thermal cycles increased, normal plastic strains in the perpendicular direction to the Si chip and shear strains were accumulated on the Cu column bumps at the chip edge at low temperature region. Thus it was found that the Al pad at the Si chip/Cu column interface underwent thermal fatigue deformation by compressive normal strain and the contact loss by displacement failure of the Al pad, the main T/C failure mode of the Cu/SnAg flip chip assembly, then occurred at the Si chip/Cu column interface shear strain deformation during T/C.
Advanced Flip Chips in Extreme Temperature Environments
NASA Technical Reports Server (NTRS)
Ramesham, Rajeshuni
2010-01-01
The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate material and the silicon die or chip, and also the underfill materials. Advanced packaging interconnects technology such as flip-chip interconnect test boards have been subjected to various extreme temperature ranges that cover military specifications and extreme Mars and asteroid environments. The eventual goal of each process step and the entire process is to produce components with 100 percent interconnect and satisfy the reliability requirements. Underfill materials, in general, may possibly meet demanding end use requirements such as low warpage, low stress, fine pitch, high reliability, and high adhesion.
Hybrid integration of VCSELs onto a silicon photonic platform for biosensing application
NASA Astrophysics Data System (ADS)
Lu, Huihui; Lee, Jun Su; Zhao, Yan; Cardile, Paolo; Daly, Aidan; Carroll, Lee; O'Brien, Peter
2017-02-01
This paper presents a technology of hybrid integration vertical cavity surface emitting lasers (VCSELs) directly on silicon photonics chip. By controlling the reflow of the solder balls used for electrical and mechanical bonding, the VCSELs were bonded at 10 degree to achieve the optimum angle-of-incidence to the planar grating coupler through vision based flip-chip techniques. The 1 dB discrepancy between optical loss values of flip-chip passive assembly and active alignment confirmed that the general purpose of the flip-chip design concept is achieved. This hybrid approach of integrating a miniaturized light source on chip opens the possibly of highly compact sensor system, which enable future portable and wearable diagnostics devices.
NASA Technical Reports Server (NTRS)
Ramesham, Rajeshuni; Ghaffarian, Reza; Shapiro, Andrew; Napala, Phil A.; Martin, Patrick A.
2005-01-01
Flip-chip interconnect electronic package boards have been assembled, underfilled, non-destructively evaluated and subsequently subjected to extreme temperature thermal cycling to assess the reliability of this advanced packaging interconnect technology for future deep space, long-term, extreme temperature missions. In this very preliminary study, the employed temperature range covers military specifications (-55 C to 100 C), extreme cold Martian (-120 C to 115 C) and asteroid Nereus (-180 C to 25 C) environments. The resistance of daisy-chained, flip-chip interconnects were measured at room temperature and at various intervals as a function of extreme temperature thermal cycling. Electrical resistance measurements are reported and the tests to date have not shown significant change in resistance as a function of extreme temperature thermal cycling. However, the change in interconnect resistance becomes more noticeable with increasing number of thermal cycles. Further research work has been carried out to understand the reliability of flip-chip interconnect packages under extreme temperature applications (-190 C to 85 C) via continuously monitoring the daisy chain resistance. Adaptation of suitable diagnostic techniques to identify the failure mechanisms is in progress. This presentation will describe the experimental test results of flip-chip testing under extreme temperatures.
Experiences in flip chip production of radiation detectors
NASA Astrophysics Data System (ADS)
Savolainen-Pulli, Satu; Salonen, Jaakko; Salmi, Jorma; Vähänen, Sami
2006-09-01
Modern imaging devices often require heterogeneous integration of different materials and technologies. Because of yield considerations, material availability, and various technological limitations, an extremely fine pitch is necessary to realize high-resolution images. Thus, there is a need for a hybridization technology that is able to join together readout amplifiers and pixel detectors at a very fine pitch. This paper describes radiation detector flip chip production at VTT. Our flip chip technology utilizes 25-μm diameter tin-lead solder bumps at a 50-μm pitch and is based on flux-free bonding. When preprocessed wafers are used, as is the case here, the total yield is defined only partly by the flip chip process. Wafer preprocessing done by a third-party silicon foundry and the flip chip process create different process defects. Wafer-level yield maps (based on probing) provided by the customer are used to select good readout chips for assembly. Wafer probing is often done outside of a real clean room environment, resulting in particle contamination and/or scratches on the wafers. Factors affecting the total yield of flip chip bonded detectors are discussed, and some yield numbers of the process are given. Ways to improve yield are considered, and finally guidelines for process planning and device design with respect to yield optimization are given.
Investigation of electromigration behavior in lead-free flip chip solder bumps
NASA Astrophysics Data System (ADS)
Kalkundri, Kaustubh Jayant
Packaging technology has also evolved over time in an effort to keep pace with the demanding requirements. Wirebond and flip chip packaging technologies have become extremely versatile and ubiquitous in catering to myriad applications due to their inherent potential. This research is restricted strictly to flip chip technology. This technology incorporates a process in which the bare chip is turned upside down, i.e., active face down, and is bonded through the I/O to the substrate, hence called flip chip. A solder interconnect that provides electrical connection between the chip and substrate is bumped on a processed silicon wafer prior to dicing for die-attach. The assembly is then reflow-soldered followed by the underfill process to provide the required encapsulation. The demand for smaller and lighter products has increased the number of I/Os without increasing the package sizes, thereby drastically reducing the size of the flip chip solder bumps and their pitch. Reliability assessment and verification of these devices has gained tremendous importance due to their shrinking size. To add to the complexity, changing material sets that are results of recently enacted lead-free solder legislations have raised some compatibility issues that are already being researched. In addition to materials and process related flip chip challenges such as solder-flux compatibility, Coefficient of Thermal Expansion (CTE) mismatch, underfill-flux compatibility and thermal management, flip chip packages are vulnerable to a comparatively newer challenge, namely electromigration observed in solder bumps. It is interesting to note that electromigration has come to the forefront of challenges only recently. It has been exacerbated by the reduction in bump cross-section due to the seemingly continuous shrinking in package size over time. The focus of this research was to understand the overall electromigration behavior in lead-free (SnAg) flip chip solder bumps. The objectives of the research were to comprehend the physics of failure mechanism in electromigration for lead-free solder bumps assembled in a flip chip ceramic package having thick copper under bump metallization and to estimate the unknown critical material parameters from Black's equation that describe failure due to electromigration. In addition, the intent was to verify the 'use condition reliability' by extrapolation from experimental conditions. The methodology adopted for this research was comprised of accelerated electromigration tests on SnAg flip chip solder bumps assembled on ceramic substrate with a thick copper under bump metallization. The experimental approach was comprised of elaborate measurement of the temperature of each sample by separate metallization resistance exhibiting positive resistance characteristics to overcome the variation in Joule heating. After conducting the constant current experiments and analyzing the failed samples, it was found that the primary electromigration failure mode observed was the dissolution of the thick copper under bump metallization in the solder, leading to a change in resistance. The lifetime data obtained from different experiments was solved simultaneously using a multiple regression approach to yield the unknown Black's equation parameters of current density exponent and activation energy. In addition to the implementation of a systematic failure analysis and data analysis procedure, it was also deduced that thermomigration due to the temperature gradient across the chip does impact the overall electromigration behavior. This research and the obtained results were significant in bridging the gap for an overall understanding of this critical failure mode observed in flip chip solder bumps. The measurement of each individual sample temperature instead of an average temperature enabled an accurate analysis for predicting the 'use condition reliability' of a comparable product. The obtained results and the conclusions can be used as potential inputs in future designs and newer generations of flip chip devices that might undergo aggressive scaling. This will enable these devices to retain their functionality during their intended useful life with minimal threat of failure due to the potent issue of electromigration. (Abstract shortened by UMI.)
Development of advanced micromirror arrays by flip-chip assembly
NASA Astrophysics Data System (ADS)
Michalicek, M. Adrian; Bright, Victor M.
2001-10-01
This paper presents the design, commercial prefabrication, modeling and testing of advanced micromirror arrays fabricated using a novel, simple and inexpensive flip-chip assembly technique. Several polar piston arrays and rectangular cantilever arrays were fabricated using flip-chip assembly by which the upper layers of the array are fabricated on a separate chip and then transferred to a receiving module containing the lower layers. Typical polar piston arrays boast 98.3% active surface area, highly planarized surfaces, low address potentials compatible with CMOS electronics, highly standardized actuation between devices, and complex segmentation of mirror surfaces which allows for custom aberration configurations. Typical cantilever arrays boast large angles of rotation as well as an average surface planarity of only 1.779 nm of RMS roughness across 100 +m mirrors. Continuous torsion devices offer stable operation through as much as six degrees of rotation while binary operation devices offer stable activated positions with as much as 20 degrees of rotation. All arrays have desirable features of costly fabrication services like five structural layers and planarized mirror surfaces, but are prefabricated in the less costly MUMPs process. Models are developed for all devices and used to compare empirical data.
Physics-based process modeling, reliability prediction, and design guidelines for flip-chip devices
NASA Astrophysics Data System (ADS)
Michaelides, Stylianos
Flip Chip on Board (FCOB) and Chip-Scale Packages (CSPs) are relatively new technologies that are being increasingly used in the electronic packaging industry. Compared to the more widely used face-up wirebonding and TAB technologies, flip-chips and most CSPs provide the shortest possible leads, lower inductance, higher frequency, better noise control, higher density, greater input/output (I/O), smaller device footprint and lower profile. However, due to the short history and due to the introduction of several new electronic materials, designs, and processing conditions, very limited work has been done to understand the role of material, geometry, and processing parameters on the reliability of flip-chip devices. Also, with the ever-increasing complexity of semiconductor packages and with the continued reduction in time to market, it is too costly to wait until the later stages of design and testing to discover that the reliability is not satisfactory. The objective of the research is to develop integrated process-reliability models that will take into consideration the mechanics of assembly processes to be able to determine the reliability of face-down devices under thermal cycling and long-term temperature dwelling. The models incorporate the time and temperature-dependent constitutive behavior of various materials in the assembly to be able to predict failure modes such as die cracking and solder cracking. In addition, the models account for process-induced defects and macro-micro features of the assembly. Creep-fatigue and continuum-damage mechanics models for the solder interconnects and fracture-mechanics models for the die have been used to determine the reliability of the devices. The results predicted by the models have been successfully validated against experimental data. The validated models have been used to develop qualification and test procedures for implantable medical devices. In addition, the research has helped develop innovative face-down devices without the underfill, based on the thorough understanding of the failure modes. Also, practical design guidelines for material, geometry and process parameters for reliable flip-chip devices have been developed.
Detection of solder bump defects on a flip chip using vibration analysis
NASA Astrophysics Data System (ADS)
Liu, Junchao; Shi, Tielin; Xia, Qi; Liao, Guanglan
2012-03-01
Flip chips are widely used in microelectronics packaging owing to the high demand of integration in IC fabrication. Solder bump defects on flip chips are difficult to detect, because the solder bumps are obscured by the chip and substrate. In this paper a nondestructive detection method combining ultrasonic excitation with vibration analysis is presented for detecting missing solder bumps, which is a typical defect in flip chip packaging. The flip chip analytical model is revised by considering the influence of spring mass on mechanical energy of the system. This revised model is then applied to estimate the flip chip resonance frequencies. We use an integrated signal generator and power amplifier together with an air-coupled ultrasonic transducer to excite the flip chips. The vibrations are measured by a laser scanning vibrometer to detect the resonance frequencies. A sensitivity coefficient is proposed to select the sensitive resonance frequency order for defect detection. Finite element simulation is also implemented for further investigation. The results of analytical computation, experiment, and simulation prove the efficacy of the revised flip chip analytical model and verify the effectiveness of this detection method. Therefore, it may provide a guide for the improvement and innovation of the flip chip on-line inspection systems.
Flip-chip light emitting diode with resonant optical microcavity
Gee, James M.; Bogart, Katherine H.A.; Fischer, Arthur J.
2005-11-29
A flip-chip light emitting diode with enhanced efficiency. The device structure employs a microcavity structure in a flip-chip configuration. The microcavity enhances the light emission in vertical modes, which are readily extracted from the device. Most of the rest of the light is emitted into waveguided lateral modes. Flip-chip configuration is advantageous for light emitting diodes (LEDs) grown on dielectric substrates (e.g., gallium nitride LEDs grown on sapphire substrates) in general due to better thermal dissipation and lower series resistance. Flip-chip configuration is advantageous for microcavity LEDs in particular because (a) one of the reflectors is a high-reflectivity metal ohmic contact that is already part of the flip-chip configuration, and (b) current conduction is only required through a single distributed Bragg reflector. Some of the waveguided lateral modes can also be extracted with angled sidewalls used for the interdigitated contacts in the flip-chip configuration.
Identifying Professional Competencies of the Flip-Chip Packaging Engineer in Taiwan
ERIC Educational Resources Information Center
Guu, Y. H.; Lin, Kuen-Yi; Lee, Lung-Sheng
2014-01-01
This study employed a literature review, expert interviews, and a questionnaire survey to construct a set of two-tier competencies for a flip-chip packaging engineer. The fuzzy Delphi questionnaire was sent to 12 flip-chip engineering experts to identify professional competencies that a flip-chip packaging engineer must have. Four competencies,…
Multigigabit optical transceivers for high-data rate military applications
NASA Astrophysics Data System (ADS)
Catanzaro, Brian E.; Kuznia, Charlie
2012-01-01
Avionics has experienced an ever increasing demand for processing power and communication bandwidth. Currently deployed avionics systems require gigabit communication using opto-electronic transceivers connected with parallel optical fiber. Ultra Communications has developed a series of transceiver solutions combining ASIC technology with flip-chip bonding and advanced opto-mechanical molded optics. Ultra Communications custom high speed ASIC chips are developed using an SoS (silicon on sapphire) process. These circuits are flip chip bonded with sources (VCSEL arrays) and detectors (PIN diodes) to create an Opto-Electronic Integrated Circuit (OEIC). These have been combined with micro-optics assemblies to create transceivers with interfaces to standard fiber array (MT) cabling technology. We present an overview of the demands for transceivers in military applications and how new generation transceivers leverage both previous generation military optical transceivers as well as commercial high performance computing optical transceivers.
NASA Astrophysics Data System (ADS)
Wu, Dongxue; Ma, Ping; Liu, Boting; Zhang, Shuo; Wang, Junxi; Li, Jinmin
2016-05-01
GaN-based flip-chip light-emitting diodes (FC-LEDs) grown on nanopatterned sapphire substrates (NPSS) are fabricated using self-assembled SiO2 nanospheres as masks during inductively coupled plasma etching. By controlling the pattern spacing, epitaxial GaN can be grown from the top or bottom of patterns to obtain two different GaN/substrate interfaces. The optoelectronic characteristics of FC-LED chips with different GaN/sapphire interfaces are studied. The FC-LED with an antireflective interface layer consisting of a NPSS with GaN in the pattern spacings demonstrates better optical properties than the FC-LED with an interface embedded with air voids. Our study indicates that the two types of FC-LEDs grown on NPSS show higher crystal quality and improved electrical and optical characteristics compared with those of FC-LEDs grown on conventional planar sapphire substrates.
CSP Manufacturing Challenges and Assembly Reliability
NASA Technical Reports Server (NTRS)
Ghaffarian, Reza
2000-01-01
Although the expression of CSP is widely used by industry from suppliers to users, its implied definition had evolved as the technology has matured. There are "expert definition"- package that is up to 1.5 time die- or "interim definition". CSPs are miniature new packages that industry is starting to implement and there are many unresolved technical issues associated with their implementation. For example, in early 1997, packages with 1 mm pitch and lower were the dominant CSPs, whereas in early 1998 packages with 0.8 mm and lower became the norm for CSPs. Other changes included the use of flip chip die rather than wire bond in CSP. Nonetheless the emerging CSPs are competing with bare die assemblies and are becoming the package of choice for size reduction applications. These packages provide the benefits of small size and performance of the bare die or flip chip, with the advantage of standard die packages. The JPL-led MicrotypeBGA Consortium of enterprises representing government agencies and private companies have jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects. This talk will cover specifically the experience of our consortium on technology implementation challenges, including design and build of both standard and microvia boards, assembly of two types of test vehicles, and the most current environmental thermal cycling test results.
AE (Acoustic Emission) for Flip-Chip CGA/FCBGA Defect Detection
NASA Technical Reports Server (NTRS)
Ghaffarian, Reza
2014-01-01
C-mode scanning acoustic microscopy (C-SAM) is a nondestructive inspection technique that uses ultrasound to show the internal feature of a specimen. A very high or ultra-high-frequency ultrasound passes through a specimen to produce a visible acoustic microimage (AMI) of its inner features. As ultrasound travels into a specimen, the wave is absorbed, scattered or reflected. The response is highly sensitive to the elastic properties of the materials and is especially sensitive to air gaps. This specific characteristic makes AMI the preferred method for finding "air gaps" such as delamination, cracks, voids, and porosity. C-SAM analysis, which is a type of AMI, was widely used in the past for evaluation of plastic microelectronic circuits, especially for detecting delamination of direct die bonding. With the introduction of the flip-chip die attachment in a package; its use has been expanded to nondestructive characterization of the flip-chip solder bumps and underfill. Figure 1.1 compares visual and C-SAM inspection approaches for defect detection, especially for solder joint interconnections and hidden defects. C-SAM is specifically useful for package features like internal cracks and delamination. C-SAM not only allows for the visualization of the interior features, it has the ability to produce images on layer-by-layer basis. Visual inspection; however, is only superior to C-SAM for the exposed features including solder dewetting, microcracks, and contamination. Ideally, a combination of various inspection techniques - visual, optical and SEM microscopy, C-SAM, and X-ray - need to be performed in order to assure quality at part, package, and system levels. This reports presents evaluations performed on various advanced packages/assemblies, especially the flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. Both external and internal equipment was used for evaluation. The outside facility provided images of the key features that could be detected using the most advanced C-SAM equipment with a skilled operator. Investigation continued using in-house equipment with its limitations. For comparison, representative X-rays of the assemblies were also gathered to show key defect detection features of these non-destructive techniques. Key images gathered and compared are: Compared the images of 2D X-ray and C-SAM for a plastic LGA assembly showing features that could be detected by either NDE technique. For this specific case, X-ray was a clear winner. Evaluated flip-chip CGA and FCBGA assemblies with and without heat sink by C-SAM. Only the FCCGA package that had no heat sink could be fully analyzed for underfill and bump quality. Cross-sectional microscopy did not revealed peripheral delamination features detected by C-SAM. Analyzed a number of fine pitch PBGA assemblies by C-SAM. Even though the internal features of the package assemblies could be detected, C-SAM was unable to detect solder joint failure at either the package or board level. Twenty times touch ups by solder iron with 700degF tip temperature, each with about 5 second duration, did not induce defects to be detected by C-SAM images. Other techniques need to be considered to induce known defects for characterization. Given NASA's emphasis on the use of microelectronic packages and assemblies and quality assurance on workmanship defect detection, understanding key features of various inspection systems that detect defects in the early stages of package and assembly is critical to developing approaches that will minimize future failures. Additional specific, tailored non-destructive inspection approaches could enable low-risk insertion of these advanced electronic packages having hidden and fine features.
Seo, Yeong-Hyeon; Hwang, Kyungmin; Jeong, Ki-Hun
2018-02-19
We report a 1.65 mm diameter forward-viewing confocal endomicroscopic catheter using a flip-chip bonded electrothermal MEMS fiber scanner. Lissajous scanning was implemented by the electrothermal MEMS fiber scanner. The Lissajous scanned MEMS fiber scanner was precisely fabricated to facilitate flip-chip connection, and bonded with a printed circuit board. The scanner was successfully combined with a fiber-based confocal imaging system. A two-dimensional reflectance image of the metal pattern 'OPTICS' was successfully obtained with the scanner. The flip-chip bonded scanner minimizes electrical packaging dimensions. The inner diameter of the flip-chip bonded MEMS fiber scanner is 1.3 mm. The flip-chip bonded MEMS fiber scanner is fully packaged with a 1.65 mm diameter housing tube, 1 mm diameter GRIN lens, and a single mode optical fiber. The packaged confocal endomicroscopic catheter can provide a new breakthrough for diverse in-vivo endomicroscopic applications.
Defect Inspection of Flip Chip Solder Bumps Using an Ultrasonic Transducer
Su, Lei; Shi, Tielin; Xu, Zhensong; Lu, Xiangning; Liao, Guanglan
2013-01-01
Surface mount technology has spurred a rapid decrease in the size of electronic packages, where solder bump inspection of surface mount packages is crucial in the electronics manufacturing industry. In this study we demonstrate the feasibility of using a 230 MHz ultrasonic transducer for nondestructive flip chip testing. The reflected time domain signal was captured when the transducer scanning the flip chip, and the image of the flip chip was generated by scanning acoustic microscopy. Normalized cross-correlation was used to locate the center of solder bumps for segmenting the flip chip image. Then five features were extracted from the signals and images. The support vector machine was adopted to process the five features for classification and recognition. The results show the feasibility of this approach with high recognition rate, proving that defect inspection of flip chip solder bumps using the ultrasonic transducer has high potential in microelectronics packaging.
Aeroflex Technology as Class-Y Demonstrator
NASA Technical Reports Server (NTRS)
Suh, Jong-ook; Agarwal, Shri; Popelar, Scott
2014-01-01
Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.
Fabrication of Quench Condensed Thin Films Using an Integrated MEMS Fab on a Chip
NASA Astrophysics Data System (ADS)
Lally, Richard; Reeves, Jeremy; Stark, Thomas; Barrett, Lawrence; Bishop, David
Atomic calligraphy is a microelectromechanical systems (MEMS)-based dynamic stencil nanolithography technique. Integrating MEMS devices into a bonded stacked array of three die provides a unique platform for conducting quench condensed thin film mesoscopic experiments. The atomic calligraphy Fab on a Chip process incorporates metal film sources, electrostatic comb driven stencil plate, mass sensor, temperature sensor, and target surface into one multi-die assembly. Three separate die are created using the PolyMUMPs process and are flip-chip bonded together. A die containing joule heated sources must be prepared with metal for evaporation prior to assembly. A backside etch of the middle/central die exposes the moveable stencil plate allowing the flux to pass through the stencil from the source die to the target die. The chip assembly is mounted in a cryogenic system at ultra-high vacuum for depositing extremely thin films down to single layers of atoms across targeted electrodes. Experiments such as the effect of thin film alloys or added impurities on their superconductivity can be measured in situ with this process.
Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS
NASA Astrophysics Data System (ADS)
Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.
2003-06-01
We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.
NASA Astrophysics Data System (ADS)
Michalicek, M. Adrian; Bright, Victor M.
2001-10-01
This paper presents the design, fabrication, modeling, and testing of various arrays of cantilever micromirror devices integrated atop CMOS control electronics. The upper layers of the arrays are prefabricated in the MUMPs process and then flip-chip transferred to CMOS receiving modules using a novel latching off-chip hinge mechanism. This mechanism allows the micromirror arrays to be released, rotated off the edge of the host module and then bonded to the receiving module using a standard probe station. The hinge mechanism supports the arrays by tethers that are severed to free the arrays once bonded. The resulting devices are inherently planarized since the bottom of the first releasable MUMPs layer becomes the surface of the integrated mirror. The working devices are formed by mirror surfaces bonded to address electrodes fabricated above static memory cells on the CMOS module. These arrays demonstrate highly desirable features such as compatible address potentials, less than 2 nm of RMS roughness, approximately 1 micrometers of lateral position accuracy and the unique ability to metallize reflective surfaces without masking. Ultimately, the off-chip hinge mechanism enables very low-cost, simple, reliable, repeatable and accurate assembly of advanced MEMS and integrated microsystems without specialized equipment or complex procedures.
NASA Astrophysics Data System (ADS)
Yonkee, B. P.; Young, E. C.; DenBaars, S. P.; Nakamura, S.; Speck, J. S.
2016-11-01
A molecular beam epitaxy regrowth technique was demonstrated on standard industrial patterned sapphire substrate light-emitting diode (LED) epitaxial wafers emitting at 455 nm to form a GaN tunnel junction. By using an HF pretreatment on the wafers before regrowth, a voltage of 3.08 V at 20 A/cm2 was achieved on small area devices. A high extraction package was developed for comparison with flip chip devices which utilize an LED floating in silicone over a BaSO4 coated header and produced a peak external quantum efficiency (EQE) of 78%. A high reflectivity mirror was designed using a seven-layer dielectric coating backed by aluminum which has a calculated angular averaged reflectivity over 98% between 400 and 500 nm. This was utilized to fabricate a flip chip LED which had a peak EQE and wall plug efficiency of 76% and 73%, respectively. This flip chip could increase light extraction over a traditional flip chip LED due to the increased reflectivity of the dielectric based mirror.
Photodiodes integration on a suspended ridge structure VOA using 2-step flip-chip bonding method
NASA Astrophysics Data System (ADS)
Kim, Seon Hoon; Kim, Tae Un; Ki, Hyun Chul; Kim, Doo Gun; Kim, Hwe Jong; Lim, Jung Woon; Lee, Dong Yeol; Park, Chul Hee
2015-01-01
In this works, we have demonstrated a VOA integrated with mPDs, based on silica-on-silicon PLC and flip-chip bonding technologies. The suspended ridge structure was applied to reduce the power consumption. It achieves the attenuation of 30dB in open loop operation with the power consumption of below 30W. We have applied two-step flipchip bonding method using passive alignment to perform high density multi-chip integration on a VOA with eutectic AuSn solder bumps. The average bonding strength of the two-step flip-chip bonding method was about 90gf.
Pressure-Sensor Assembly Technique
NASA Technical Reports Server (NTRS)
Pruzan, Daniel A.
2003-01-01
Nielsen Engineering & Research (NEAR) recently developed an ultrathin data acquisition system for use in turbomachinery testing at NASA Glenn Research Center. This system integrates a microelectromechanical- systems- (MEMS-) based absolute pressure sensor [0 to 50 psia (0 to 345 kPa)], temperature sensor, signal-conditioning application-specific integrated circuit (ASIC), microprocessor, and digital memory into a package which is roughly 2.8 in. (7.1 cm) long by 0.75 in. (1.9 cm) wide. Each of these components is flip-chip attached to a thin, flexible circuit board and subsequently ground and polished to achieve a total system thickness of 0.006 in. (0.15 mm). Because this instrument is so thin, it can be quickly adhered to any surface of interest where data can be collected without disrupting the flow being investigated. One issue in the development of the ultrathin data acquisition system was how to attach the MEMS pressure sensor to the circuit board in a manner which allowed the sensor s diaphragm to communicate with the ambient fluid while providing enough support for the chip to survive the grinding and polishing operations. The technique, developed by NEAR and Jabil Technology Services Group (San Jose, CA), is described below. In the approach developed, the sensor is attached to the specially designed circuit board, see Figure 1, using a modified flip-chip technique. The circular diaphragm on the left side of the sensor is used to actively measure the ambient pressure, while the diaphragm on the right is used to compensate for changes in output due to temperature variations. The circuit board is fabricated with an access hole through it so that when the completed system is installed onto a wind tunnel model (chip side down), the active diaphragm is exposed to the environment. After the sensor is flip-chip attached to the circuit board, the die is underfilled to support the chip during the subsequent grinding and polishing operations. To prevent this underfill material from getting onto the sensor s diaphragms, the circuit board is fabricated with two 25- micrometer-tall polymer rings, sized so that the diaphragms fit inside the rings once the chip is attached.
Microchannel cooling of face down bonded chips
Bernhardt, A.F.
1993-06-08
Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.
Fabrication of a Silicon Backshort Assembly for Waveguide-Coupled Superconducting Detectors
NASA Technical Reports Server (NTRS)
Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;
2012-01-01
The Cosmology Large Angular Scale Surveyor (CLASS) is a ground-based instrument that will measure the polarization of the cosmic microwave background to search for evidence for gravitational waves from a posited epoch of inflation early in the Universe s history. This measurement will require integration of superconducting transition-edge sensors with microwave waveguide inputs with excellent control of systematic errors, such as unwanted coupling to stray signals at frequencies outside of a precisely defined microwave band. To address these needs we present work on the fabrication of micromachined silicon, producing conductive quarter-wave backshort assemblies for the CLASS 40 GHz focal plane. Each 40 GHz backshort assembly consists of three degeneratively doped silicon wafers. Two spacer wafers are micromachined with through-wafer vias to provide a 2.04 mm long square waveguide delay section. The third wafer terminates the waveguide delay in a short. The three wafers are bonded at the wafer level by Au-Au thermal compression bonding then aligned and flip chip bonded to the CLASS detector at the chip level. The micromachining techniques used have been optimized to create high aspect ratio waveguides, silicon pillars, and relief trenches with the goal of providing improved out of band signal rejection. We will discuss the fabrication of integrated CLASS superconducting detector chips with the quarter-wave backshort assemblies.
Microchannel cooling of face down bonded chips
Bernhardt, Anthony F.
1993-01-01
Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.
Broadband and scalable optical coupling for silicon photonics using polymer waveguides
NASA Astrophysics Data System (ADS)
La Porta, Antonio; Weiss, Jonas; Dangel, Roger; Jubin, Daniel; Meier, Norbert; Horst, Folkert; Offrein, Bert Jan
2018-04-01
We present optical coupling schemes for silicon integrated photonics circuits that account for the challenges in large-scale data processing systems such as those used for emerging big data workloads. Our waveguide based approach allows to optimally exploit the on-chip optical feature size, and chip- and package real-estate. It further scales well to high numbers of channels and is compatible with state-of-the-art flip-chip die packaging. We demonstrate silicon waveguide to polymer waveguide coupling losses below 1.5 dB for both the O- and C-bands with a polarisation dependent loss of <1 dB. Over 100 optical silicon waveguide to polymer waveguide interfaces were assembled within a single alignment step, resulting in a physical I/O channel density of up to 13 waveguides per millimetre along the chip-edge, with an average coupling loss of below 3.4 dB measured at 1310 nm.
Molded underfill (MUF) encapsulation for flip-chip package: A numerical investigation
NASA Astrophysics Data System (ADS)
Azmi, M. A.; Abdullah, M. K.; Abdullah, M. Z.; Ariff, Z. M.; Saad, Abdullah Aziz; Hamid, M. F.; Ismail, M. A.
2017-07-01
This paper presents the numerical simulation of epoxy molding compound (EMC) filling in multi flip-chip packages during encapsulation process. The empty and a group flip chip packages were considered in the mold cavity in order to study the flow profile of the EMC. SOLIDWORKS software was used for three-dimensional modeling and it was incorporated into fluid analysis software namely as ANSYS FLUENT. The volume of fluid (VOF) technique was used for capturing the flow front profiles and Power Law model was applied for its rheology model. The numerical result are compared and discussed with previous experimental and it was shown a good conformity for model validation. The prediction of flow front was observed and analyzed at different filling time. The possibility and visual of void formation in the package is captured and the number of flip-chip is one factor that contributed to the void formation.
Super-Lattice Light Emitting Diodes (SLEDS) on GaAs
2016-03-31
Super-Lattice Light Emitting Diodes (SLEDS) on GaAs Kassem Nabha1, Russel Ricker2, Rodney McGee1, Nick Waite1, John Prineas2, Sydney Provence2...infrared light emitting diodes (LEDs). Typically, the LED arrays are mated with CMOS read-in integrated circuit (RIIC) chips using flip-chip bonding. In...circuit (RIIC) chips using flip-chip bonding. This established technology is called Hybrid-super-lattice light emitting diodes (Hybrid- SLEDS). In
Hybridization of active and passive elements for planar photonic components and interconnects
NASA Astrophysics Data System (ADS)
Pearson, M.; Bidnyk, S.; Balakrishnan, A.
2007-02-01
The deployment of Passive Optical Networks (PON) for Fiber-to-the-Home (FTTH) applications currently represents the fastest growing sector of the telecommunication industry. Traditionally, FTTH transceivers have been manufactured using commodity bulk optics subcomponents, such as thin film filters (TFFs), micro-optic collimating lenses, TO-packaged lasers, and photodetectors. Assembling these subcomponents into a single housing requires active alignment and labor-intensive techniques. Today, the majority of cost reducing strategies using bulk subcomponents has been implemented making future reductions in the price of manufacturing FTTH transceivers unlikely. Future success of large scale deployments of FTTH depends on further cost reductions of transceivers. Realizing the necessity of a radically new packaging approach for assembly of photonic components and interconnects, we designed a novel way of hybridizing active and passive elements into a planar lightwave circuit (PLC) platform. In our approach, all the filtering components were monolithically integrated into the chip using advancements in planar reflective gratings. Subsequently, active components were passively hybridized with the chip using fully-automated high-capacity flip-chip bonders. In this approach, the assembly of the transceiver package required no active alignment and was readily suitable for large-scale production. This paper describes the monolithic integration of filters and hybridization of active components in both silica-on-silicon and silicon-on-insulator PLCs.
DOE Office of Scientific and Technical Information (OSTI.GOV)
McAdams, Brian J.; Pearson, Raymond A.
With the continuing trend of decreasing feature sizes in flip-chip assemblies, the reliability tolerance to interfacial flaws is also decreasing. Small-scale disbonds will become more of a concern, pointing to the need for a better understanding of the initiation stage of interfacial delamination. With most accepted adhesion metric methodologies tailored to predict failure under the prior existence of a disbond, the study of the initiation phenomenon is open to development and standardization of new testing procedures. Traditional fracture mechanics approaches are not suitable, as the mathematics assume failure to originate at a disbond or crack tip. Disbond initiation is believedmore » to first occur at free edges and corners, which act as high stress concentration sites and exhibit singular stresses similar to a crack tip, though less severe in intensity. As such, a 'fracture mechanics-like' approach may be employed which defines a material parameter--a critical stress intensity factor (K{sub c})--that can be used to predict when initiation of a disbond at an interface will occur. The factors affecting the adhesion of underfill/polyimide interfaces relevant to flip-chip assemblies were investigated in this study. The study consisted of two distinct parts: a comparison of the initiation and propagation phenomena and a comparison of the relationship between sub-critical and critical initiation of interfacial failure. The initiation of underfill interfacial failure was studied by characterizing failure at a free-edge with a critical stress intensity factor. In comparison with the interfacial fracture toughness testing, it was shown that a good correlation exists between the initiation and propagation of interfacial failures. Such a correlation justifies the continuing use of fracture mechanics to predict the reliability of flip-chip packages. The second aspect of the research involved fatigue testing of tensile butt joint specimens to determine lifetimes at sub-critical load levels. The results display an interfacial strength ranking similar to that observed during monotonic testing. The fatigue results indicate that monotonic fracture mechanics testing may be an adequate screening tool to help predict cyclic underfill failure; however lifetime data is required to predict reliability.« less
Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes
NASA Technical Reports Server (NTRS)
Zheng, Xinyu; Pain, Bedabrata
2005-01-01
A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.
Fluxless flip-chip bonding using a lead-free solder bumping technique
NASA Astrophysics Data System (ADS)
Hansen, K.; Kousar, S.; Pitzl, D.; Arab, S.
2017-09-01
With the LHC exceeding the nominal instantaneous luminosity, the current barrel pixel detector (BPIX) of the CMS experiment at CERN will reach its performance limits and undergo significant radiation damage. In order to improve detector performance in high luminosity conditions, the entire BPIX is replaced with an upgraded version containing an additional detection layer. Half of the modules comprising this additional layer are produced at DESY using fluxless and lead-free bumping and bonding techniques. Sequential solder-jetting technique is utilized to wet 40-μm SAC305 solder spheres on the silicon-sensor pads with electroless Ni, Pd and immersion Au (ENEPIG) under-bump metallization (UBM). The bumped sensors are flip-chip assembled with readout chips (ROCs) and then reflowed using a flux-less bonding facility. The challenges for jetting low solder volume have been analyzed and will be presented in this paper. An average speed of 3.4 balls per second is obtained to jet about 67 thousand solder balls on a single chip. On average, 7 modules have been produced per week. The bump-bond quality is evaluated in terms of electrical and mechanical properties. The peak-bump resistance is about 17.5 mΩ. The cross-section study revealed different types of intermetallic compounds (IMC) as a result of interfacial reactions between UBM and solder material. The effect of crystalline phases on the mechanical properties of the joint is discussed. The mean shear strength per bump after the final module reflow is about 16 cN. The results and sources of yield loss of module production are reported. The achieved yield is 95%.
New Failure Mode of Flip-Chip Solder Joints Related to the Metallization of an Organic Substrate
NASA Astrophysics Data System (ADS)
Jang, J. W.; Yoo, S. J.; Hwang, H. I.; Yuk, S. Y.; Kim, C. K.; Kim, S. J.; Han, J. S.; An, S. H.
2015-10-01
We report a new failure phenomenon during flip-chip die attach. After reflow, flip-chip bumps were separated between the Al and Ti layers on the Si die side. This was mainly observed at the Si die corner. Transmission electron microscopy images revealed corrosion of the Al layer at the edge of the solder bump metallization. The corrosion at the metallization edge exhibited a notch shape with high stress concentration factor. The organic substrate had Cu metallization with an organic solderable preservative (OSP) coating layer, where a small amount of Cl ions were detected. A solder bump separation mechanism is suggested based on the reaction between Al and Cl, related to the flow of soldering flux. During reflow, the flux will dissolve the Cl-containing OSP layer and flow up to the Al layer on the Si die side. Then, the Cl-dissolved flux will actively react with Al, forming AlCl3. During cooling, solder bumps at the Si die corner will separate through the location of Al corrosion. This demonstrated that the chemistry of the substrate metallization can affect the thermomechanical reliability of flip-chip solder joints.
3D integrated superconducting qubits
NASA Astrophysics Data System (ADS)
Rosenberg, D.; Kim, D.; Das, R.; Yost, D.; Gustavsson, S.; Hover, D.; Krantz, P.; Melville, A.; Racz, L.; Samach, G. O.; Weber, S. J.; Yan, F.; Yoder, J. L.; Kerman, A. J.; Oliver, W. D.
2017-10-01
As the field of quantum computing advances from the few-qubit stage to larger-scale processors, qubit addressability and extensibility will necessitate the use of 3D integration and packaging. While 3D integration is well-developed for commercial electronics, relatively little work has been performed to determine its compatibility with high-coherence solid-state qubits. Of particular concern, qubit coherence times can be suppressed by the requisite processing steps and close proximity of another chip. In this work, we use a flip-chip process to bond a chip with superconducting flux qubits to another chip containing structures for qubit readout and control. We demonstrate that high qubit coherence (T1, T2,echo > 20 μs) is maintained in a flip-chip geometry in the presence of galvanic, capacitive, and inductive coupling between the chips.
NASA Astrophysics Data System (ADS)
Ou Yang, Fan-Yi
Phase separation and microstructure change of eutectic SnPb and SnAgCu flip chip solder joint were investigated under thermomigration, electromigration, stressmigration and the combination of these effects. Different morphological behaviors under DC and AC electromigration were seen. Phase separation with Pb rich phase migration to the anode was observed when current density is below 1.6 x 104 A/cm2 at 100°C. For some cases, phase separation of Pb-rich phase and Su-rich phase as well as refinement of lamellar microstructure has also been observed. We propose that the refinement is due to recrystallization. On the other hand, time-dependent melting of eutectic SnPb flip chip solder joints has been observed to occur frequently with current density above 1.6 x 104 A/cm 2at 100°C. It has been found that it is due to joule heating of the on-chip Al interconnects. We found that electromigration has especially generated voids at the anode of the Al. This damage has greatly increased the resistance of the Al, which produces the heat needed to melt the solder joint. Owing to the line-to-bump configuration in flip chip solder joints, current crowding occurs when electrons enters into or exits from the solder bump. At the cathode contact, current crowding induced pancake-type void formation was observed widely. Furthermore, at the anode contact, we note that hillock or whisker forms. The cross-sectioned surface in SnPb showed dimple and bulge after electromigration, while that of SnAgCu remained flat. The difference is due to a larger back stress in the SnAgCu, consequently electromigration in SnAgCu is slower than that in SnPb. For thermomigration in eutectic SnPb flip chip solder joints, phase separation of Sn and Pb occurred, with Pb moving to the cold end. Both Sn and Pb have a stepwise concentration profile across solder bump. Refinement of lamellar microstructure was observed, indicating recrystallization. Also, thermomigration in eutectic SnAgCu flip chip solder joint were presented. It seems that vacancy flux plays a dominant role in thermomigration in Pb-free solder bumps; voids formed on the cold end and Sn moved to the hot end.
NASA Astrophysics Data System (ADS)
Wu, Chia-Yu; Huang, Yin-Hsien; Wu, Hsin-Han; Hsieh, Tsung-Eong
2018-06-01
Fourier's law of heat conduction at steady-state was adopted to establish a measurement method utilizing platinum (Pt) thin-film electrodes as the heater and the temperature sensor. The thermal conductivities (κ's) of Pyrex glass, an epoxy resin and a commercial underfill for flip-chip devices were measured and a good agreement with previously reported values was obtained. The thermal boundary resistances (RTBR's) of Pt/sample interfaces were also extracted for discussing their influence on the thermal conduction of samples. Afterward, the flip-chip samples with 2×2 solder joint array utilizing Si wafers as the die and the substrate, without and with the underfills, were prepared and their thermal conductance were measured. For the sample without underfill, the air presenting in the gap of die and the substrate led to the poor thermal conductance of sample. With the insertion of underfills, the thermal conductance of flip-chip samples improved. The resistance to heat transfer across Si/underfill interfaces was also suppressed and to promote the thermal conductance of samples. The thermal properties of underfill and RTBR at Si/underfill interface were further implanted in the calculation of thermal conductance of flip-chip samples containing various solder joint arrays. The increasing number of solder joints diminished the influence of thermal conduction of underfill and RTBR of Si/underfill interface on the thermal conductance of samples. The insertion of underfill with high-κ value might promote the heat conductance of samples containing low-density solder joint arrays; however, it became insignificant in improving the heat conductance of samples containing high-density solder joint arrays.
Flip-chip integration of tilted VCSELs onto a silicon photonic integrated circuit.
Lu, Huihui; Lee, Jun Su; Zhao, Yan; Scarcella, Carmelo; Cardile, Paolo; Daly, Aidan; Ortsiefer, Markus; Carroll, Lee; O'Brien, Peter
2016-07-25
In this article we describe a cost-effective approach for hybrid laser integration, in which vertical cavity surface emitting lasers (VCSELs) are passively-aligned and flip-chip bonded to a Si photonic integrated circuit (PIC), with a tilt-angle optimized for optical-insertion into standard grating-couplers. A tilt-angle of 10° is achieved by controlling the reflow of the solder ball deposition used for the electrical-contacting and mechanical-bonding of the VCSEL to the PIC. After flip-chip integration, the VCSEL-to-PIC insertion loss is -11.8 dB, indicating an excess coupling penalty of -5.9 dB, compared to Fibre-to-PIC coupling. Finite difference time domain simulations indicate that the penalty arises from the relatively poor match between the VCSEL mode and the grating-coupler.
Enabling Large Focal Plane Arrays Through Mosaic Hybridization
NASA Technical Reports Server (NTRS)
Miller, TImothy M.; Jhabvala, Christine A.; Leong, Edward; Costen, Nicholas P.; Sharp, Elmer; Adachi, Tomoko; Benford, Dominic
2012-01-01
We have demonstrated advances in mosaic hybridization that will enable very large format far-infrared detectors. Specifically we have produced electrical detector models via mosaic hybridization yielding superconducting circuit paths by hybridizing separately fabricated sub-units onto a single detector unit. The detector model was made on a 100mm diameter wafer while four model readout quadrant chips were made from a separate 100mm wafer. The individually fabricated parts were hybridized using a flip-chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the model mosaic-hybrid detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently available.
Enabling Large Focal Plane Arrays through Mosaic Hybridization
NASA Technical Reports Server (NTRS)
Miller, Timothy M.; Jhabvala, Christine A.; Costen, Nick; Benford, Dominic J.
2012-01-01
We have demonstrated the hybridization of large mosaics of far-infrared detectors, joining separately fabricated sub-units into a single unit on a single, large substrate. We produced a single detector mockup on a 100mm diameter wafer and four mockup readout quadrant chips from a separate 100mm wafer. The individually fabricated parts were hybridized using a Suss FC150 flip chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion (CTE) match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the mockup mosaic-hybridized detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently demonstrated.
NASA Astrophysics Data System (ADS)
Riegel, C.; Backhaus, M.; Van Hoorne, J. W.; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.
2017-01-01
A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 1015 n/cm2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Flemish, Joseph; Soer, Wouter
2015-11-30
Patterned sapphire substrate (PSS) technology has proven to be an effective approach to improve efficacy and reduce cost of light-emitting diodes (LEDs). The volume emission from the transparent substrate leads to high package efficiency, while the simple and robust architecture of PSS-based LEDs enables low cost. PSS substrates have gained wide use in mid-power LEDs over the past years. In this project, Lumileds has developed and industrialized PSS and epitaxy technology for high- power flip-chip LEDs to bring these benefits to a broader range of applications and accelerate the adoption of energy-efficient solid-state lighting (SSL). PSS geometries were designed formore » highly efficient light extraction in a flip-chip architecture and high-volume manufacturability, and corresponding sapphire patterning and epitaxy manufacturing processes were integrally developed. Concurrently, device and package architectures were developed to take advantage of the PSS flip-chip die in different types of products that meet application needs. The developed PSS and epitaxy technology has been fully implemented in manufacturing at Lumileds’ San Jose, CA location, and incorporated in illumination-grade LED products that have been successfully introduced to the market, including LUXEON Q and LUXEON FlipChip White.« less
A novel model for simulating the racing effect in capillary-driven underfill process in flip chip
NASA Astrophysics Data System (ADS)
Zhu, Wenhui; Wang, Kanglun; Wang, Yan
2018-04-01
Underfill is typically applied in flip chips to increase the reliability of the electronic packagings. In this paper, the evolution of the melt-front shape of the capillary-driven underfill flow is studied through 3D numerical analysis. Two different models, the prevailing surface force model and the capillary model based on the wetted wall boundary condition, are introduced to test their applicability, where level set method is used to track the interface of the two phase flow. The comparison between the simulation results and experimental data indicates that, the surface force model produces better prediction on the melt-front shape, especially in the central area of the flip chip. Nevertheless, the two above models cannot simulate properly the racing effect phenomenon that appears during underfill encapsulation. A novel ‘dynamic pressure boundary condition’ method is proposed based on the validated surface force model. Utilizing this approach, the racing effect phenomenon is simulated with high precision. In addition, a linear relationship is derived from this model between the flow front location at the edge of the flip chip and the filling time. Using the proposed approach, the impact of the underfill-dispensing length on the melt-front shape is also studied.
NASA Astrophysics Data System (ADS)
Lee, Tae-Kyu; Chen, Zhiqiang; Guirguis, Cherif; Akinade, Kola
2017-10-01
The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases with higher electric power condition, which brings the component into an elevated temperature environment, thus introducing another consideration factor for mechanical stability of interconnection joints. Since most of the shock performance data available were produced at room temperature, the effect of elevated temperature is of interest to ensure the reliability of the device in a mechanical shock environment. To achieve a stable␣interconnect in a dynamic shock environment, the interconnections must tolerate mechanical strain, which is induced by the shock wave input and reaches the particular component interconnect joint. In this study, large body size (52.5 × 52.5 mm2) FCBGA components assembled on 2.4-mm-thick boards were tested with various isothermal pre-conditions and testing conditions. With a heating element embedded in the test board, a test temperature range from room temperature to 100°C was established. The effects of elevated temperature on mechanical shock performance were investigated. Failure and degradation mechanisms are identified and discussed based on the microstructure evolution and grain structure transformations.
NASA Astrophysics Data System (ADS)
Fan, Bingfeng; Yan, Linchao; Lao, Yuqin; Ma, Yanfei; Chen, Zimin; Ma, Xuejin; Zhuo, Yi; Pei, Yanli; Wang, Gang
2017-08-01
A method for preparing a quantum dot (QD)-white light-emitting diode (WLED) is reported. Holes were etched in the SiO2 layer deposited on the sapphire substrate of the flip-chip LED by inductively coupled plasma, and these holes were then filled with QDs. An ultraviolet-curable resin was then spin-coated on top of the QD-containing SiO2 layer, and the resin was cured to act as a protecting layer. The reflective sidewall structure minimized sidelight leakage. The fabrication of the QD-WLED is simple in preparation and compatible with traditional LED processes, which was the minimum size of the WLED chip-scale integrated package. InP/ZnS core-shell QDs were used as the converter in the WLED. A blue light-emitting diode with a flip-chip structure was used as the excitation source. The QD-WLED exhibited color temperatures from 5900 to 6400 K and Commission Internationale De L'Elcairage color coordinates from (0.315, 0.325) to (0.325, 0.317), under drive currents from 100 to 400 mA. The QD-WLED exhibited stable optoelectronic properties.
Decapsulation Method for Flip Chips with Ceramics in Microelectronic Packaging
NASA Astrophysics Data System (ADS)
Shih, T. I.; Duh, J. G.
2008-06-01
The decapsulation of flip chips bonded to ceramic substrates is a challenging task in the packaging industry owing to the vulnerability of the chip surface during the process. In conventional methods, such as manual grinding and polishing, the solder bumps are easily damaged during the removal of underfill, and the thin chip may even be crushed due to mechanical stress. An efficient and reliable decapsulation method consisting of thermal and chemical processes was developed in this study. The surface quality of chips after solder removal is satisfactory for the existing solder rework procedure as well as for die-level failure analysis. The innovative processes included heat-sink and ceramic substrate removal, solder bump separation, and solder residue cleaning from the chip surface. In the last stage, particular temperatures were selected for the removal of eutectic Pb-Sn, high-lead, and lead-free solders considering their respective melting points.
NASA Astrophysics Data System (ADS)
Xu, Luhua; Han, Jung-Kyu; Liang, Jarrett Jun; Tu, K. N.; Lai, Yi-Shao
2008-06-01
To overcome the effect of current crowding on electromigration-induced pancake-type void formation in flip chip solder joints, two types of Cu column in 90μm flip chip SnAgCu solder joints have been studied. They were (1) the solder contacts the Cu column at bottom and side walls and (2) the solder wets only the bottom surface of the copper column. With a current density of 1.6×104A/cm2 at 135°C, no failure was detected after 1290h. However, the resistance increased by about 10% due to the formation of a large fraction of intermetallic compounds. We found that electromigration has accelerated the consumption rate of copper column and converted almost the entire solder joint into intermetallic compound. Mechanically, drop impact test indicates a brittle fracture failure in the intermetallic. The electromigration critical product for the intermetallic is discussed.
Flip chip bumping technology—Status and update
NASA Astrophysics Data System (ADS)
Juergen Wolf, M.; Engelmann, Gunter; Dietrich, Lothar; Reichl, Herbert
2006-09-01
Flip chip technology is a key driver for new complex system architectures and high-density packaging, e.g. sensor or pixel devices. Bumped wafers/dice as key elements become very important in terms of general availability at low cost, high yield and quality level. Today, different materials, e.g. Au, Ni, AuSn, SnAg, SnAgCu, SnCu, etc., are used for flip chip interconnects and different bumping approaches are available. Electroplating is the technology of choice for high-yield wafer bumping for small bump sizes and pitches. Lead-free solder bumps require an increase in knowledge in the field of under bump metallization (UBM) and the interaction of bump and substrate metallization, the formation and growth of intermetallic compounds (IMCs) during liquid- and solid-phase reactions. Results of a new bi-layer UBM of Ni-Cu which is especially designed for small-sized lead-free solder bumps will be discussed.
276 nm Substrate-Free Flip-Chip AlGaN Light-Emitting Diodes
NASA Astrophysics Data System (ADS)
Hwang, Seongmo; Morgan, Daniel; Kesler, Amanda; Lachab, Mohamed; Zhang, Bin; Heidari, Ahmad; Nazir, Haseeb; Ahmad, Iftikhar; Dion, Joe; Fareed, Qhalid; Adivarahan, Vinod; Islam, Monirul; Khan, Asif
2011-03-01
Lateral-conduction, substrate-free flip-chip (SFFC) light-emitting diodes (LEDs) with peak emission at 276 nm are demonstrated for the first time. The AlGaN multiple quantum well LED structures were grown by metal-organic chemical vapor deposition (MOCVD) on thick-AlN laterally overgrown on sapphire substrates. To fabricate the SFFC LEDs, a newly-developed laser-assisted ablation process was employed to separate the substrate from the LED chips. The chips had physical dimensions of 1100×900 µm2, and were comprised of four devices each with a 100×100 µm2 junction area. Electrical and optical characterization of the devices revealed no noticeable degradation to their performance due to the laser-lift-off process.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zakgeim, A. L.; Il’inskaya, N. D.; Karandashev, S. A.
2017-02-15
The spatial distribution of equilibrium and nonequilibrium (including luminescent) IR (infrared) radiation in flip-chip photodiodes based on InAsSbP/InAs double heterostructures (λ{sub max} = 3.4 μm) is measured and analyzed; the structural features of the photodiodes, including the reflective properties of the ohmic contacts, are taken into account. Optical area enhancement due to multiple internal reflection in photodiodes with different geometric characteristics is estimated.
Flip Chip Bonding of 68 x 68 MWIR LED Arrays
2009-01-01
transmission of IR light through GaSb material varies between 5%–30% and depends on the type of substrate dopants (n- or p-type). Hence, for bottom...emission regions (8.9/16 monolayer’s (ml) InAs/GaSb) separated by (n InAs/GaSb super lattice grade)/(p+ GaSb) tunnel junctions. Graded super lattices were...flip chip bonding process. Besides four corner LED test pads, there are 296 bonding pads in the CMOS driver to bias each LED pixel independently. The
NASA Astrophysics Data System (ADS)
Zhang, Liping; Sawchuk, Alexander A.
2001-12-01
We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).
Flip-chip replacement within the constraints imposed by multilayer ceramic (MLC) modules
NASA Astrophysics Data System (ADS)
Puttlitz, Karl J.
1984-01-01
Economics often dictates that suitable module rework procedures be established to replace solder bump devices (flip chips) reflowed to multichip carriers. These operations are complicated, owing to various constraints such as the substrate's physical and mechanical properties, close proximity of surface features, etc. This paper describes the constraints and the methods to circumvent them. An order of preference based upon the degree of constraint is recommended to achieve device removal and subsequent site dress of the residual solder left on the substrate. It has been determined that rework (device replacement) can be successfully achieved in even highly constricted situations. This is illustrated by the example of utilizing a localized heating technique, hot gas, to remove solder from microsockets from which chips were previously removed. Microsockets are areas to which chips are reflowed to the top surface of IBM's densely populated multilayer ceramic (MLC) modules, thus forming the so-called controlled collapse chip connection or C-4. The microsocket patterns are thus identical to the chip footprint.
Enabling Large Focal Plane Arrays Through Mosaic Hybridization
NASA Technical Reports Server (NTRS)
Miller, Timothy M.; Jhabvala, Christine A.; Leong, Edward; Costen, Nick P.; Sharp, Elmer; Adachi, Tomoko; Benford, Dominic J.
2012-01-01
We have demonstrated advances in mosaic hybridization that will enable very large format far-infrared detectors. Specifically we have produced electrical detector models via mosaic hybridization yielding superconducting circuit patbs by hybridizing separately fabricated sub-units onto a single detector unit. The detector model was made on a 100mm diameter wafer while four model readout quadrant chips were made from a separate 100mm wafer. The individually fabric.ted parts were hybridized using a Suss FCI50 flip chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the model mosaic-hybrid detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently available.
A crunch on thermocompression flip chip bonding
NASA Astrophysics Data System (ADS)
Suppiah, Sarveshvaran; Ong, Nestor Rubio; Sauli, Zaliman; Sarukunaselan, Karunavani; Alcain, Jesselyn Barro; Mahmed, Norsuria; Retnasamy, Vithyacharan
2017-09-01
This study discussed the evolution and important findings, critical technical challenges, solutions and bonding equipment of flip chip thermo compression bonding (TCB). The bonding force, temperature and time were the key bonding parameters that need to be tweaked based on the researches done by others. TCB technology worked well with both pre-applied underfill and flux (still under development). Lower throughput coupled with higher processing costs was example of challenges in the TCB technology. The paper is concluded with a brief description of the current equipment used in thermo compression process.
Xu, Jin; Zhang, Wei; Peng, Meng; Dai, Jiangnan; Chen, Changqing
2018-06-01
The distinct ultraviolet (UV) light absorption of indium tin oxide (ITO) limits the performance of GaN-based near-UV light-emitting diodes (LEDs). Herein, we report an Al-doped ITO with enhanced UV transmittance and low sheet resistance as the transparent conductive electrode for GaN-based 395 nm flip-chip near-UV LEDs. The thickness dependence of optical and electrical properties of Al-doped ITO films is investigated. The optimal Al-doped ITO film exhibited a transmittance of 93.2% at 395 nm and an average sheet resistance of 30.1 Ω/sq. Meanwhile, at an injection current of 300 mA, the forward voltage decreased from 3.14 to 3.11 V, and the light output power increased by 13% for the 395 nm near-UV flip-chip LEDs with the optimal Al-doped ITO over those with pure ITO. This Letter provides a simple and repeatable approach to further improve the light extraction efficiency of GaN-based near-UV LEDs.
A 16K-bit static IIL RAM with 25-ns access time
NASA Astrophysics Data System (ADS)
Inabe, Y.; Hayashi, T.; Kawarada, K.; Miwa, H.; Ogiue, K.
1982-04-01
A 16,384 x 1-bit RAM with 25-ns access time, 600-mW power dissipation, and 33 sq mm chip size has been developed. Excellent speed-power performance with high packing density has been achieved by an oxide isolation technology in conjunction with novel ECL circuit techniques and IIL flip-flop memory cells, 980 sq microns (35 x 28 microns) in cell size. Development results have shown that IIL flip-flop memory cell is a trump card for assuring achievement of a high-performance large-capacity bipolar RAM, in the above 16K-bit/chip area.
Electromigration in solder joints and solder lines
NASA Astrophysics Data System (ADS)
Gan, H.; Choi, W. J.; Xu, G.; Tu, K. N.
2002-06-01
Electromigration may affect the reliability of flip-chip solder joints. Eutectic solder is a two-phase alloy, so its electromigration behavior is different from that in aluminum or copper interconnects. In addition, a flipchip solder joint has a built-in currentcrowding configuration to enhance electromigration failure. To better understand electromigration in SnPb and lead-free solder alloys, the authors prepared solder lines in v-grooves etched on Si (001). This article discusses the results of those tests and compares the electromigration failure modes of eutectic SnPb and SnAgCu flip-chip solder joints along with the mean-timeto-failure.
Miniaturized force/torque sensor for in vivo measurements of tissue characteristics.
Hessinger, M; Pilic, T; Werthschutzky, R; Pott, P P
2016-08-01
This paper presents the development of a surgical instrument to measure interaction forces/torques with organic tissue during operation. The focus is on the design progress of the sensor element, consisting of a spoke wheel deformation element with a diameter of 12 mm and eight inhomogeneous doped piezoresistive silicon strain gauges on an integrated full-bridge assembly with an edge length of 500 μm. The silicon chips are contacted to flex-circuits via flip chip and bonded on the substrate with a single component adhesive. A signal processing board with an 18 bit serial A/D converter is integrated into the sensor. The design concept of the handheld surgical sensor device consists of an instrument coupling, the six-axis sensor, a wireless communication interface and battery. The nominal force of the sensing element is 10 N and the nominal torque is 1 N-m in all spatial directions. A first characterization of the force sensor results in a maximal systematic error of 4.92 % and random error of 1.13 %.
Silver flip chip interconnect technology and solid state bonding
NASA Astrophysics Data System (ADS)
Sha, Chu-Hsuan
In this dissertation, fluxless transient liquid phase (TLP) bonding and solid state bonding between thermal expansion mismatch materials have been developed using Ag-In binary systems, pure Au, Ag, and Cu-Ag composite. In contrast to the conventional soldering process, fluxless bonding technique eliminates any corrosion and contamination problems caused by flux. Without flux, it is possible to fabricate high quality joints in large bonding areas where the flux is difficult to clean entirely. High quality joints are crucial to bonding thermal expansion mismatch materials since shear stress develops in the bonded pair. Stress concentration at voids in joints could increases breakage probability. In addition, intermetallic compound (IMC) formation between solder and underbump metallurgy (UBM) is essential for interconnect joint formation in conventional soldering process. However, the interface between IMC and solder is shown to be the weak interface that tends to break first during thermal cycling and drop tests. In our solid state bonding technique, there is no IMC involved in the bonding between Au to Au, Ag and Cu, and Ag and Au. All the reliability issues related to IMC or IMC growth is not our concern. To sum up, ductile bonding media, such as Ag or Au, and proper metallic layered structure are utilized in this research to produce high quality joints. The research starts with developing a low temperature fluxless bonding process using electroplated Ag/In/Ag multilayer structures between Si chip and 304 stainless steel (304SS) substrate. Because the outer thin Ag layer effectively protects inner In layer from oxidation, In layer dissolves Ag layer and joints to Ag layer on the to-be-bonded Si chip when temperature reaches the reflow temperature of 166ºC. Joints consist of mainly Ag-rich Ag-In solid solution and Ag2In. Using this fluxless bonding technique, two 304SS substrates can be bonded together as well. From the high magnification SEM images taken at cross-section, there is no void or gap observed. The new bonding technique presented should be valuable in packaging high power electronic devices for high temperature operations. It should also be useful to bond two 304SS parts together at low bonding temperature of 190ºC. Solid state bonding technique is then introduced to bond semiconductor chips, such as Si, to common substrates, such as Cu or alumina, using pure Ag and Au at a temperature matching the typical reflow temperature used in packaging industries, 260°C. In bonding, we realize the possibilities of solid state bonding of Au to Au, Au to Ag, and Ag to Cu. The idea comes from that Cu, Ag, and Au are located in the same column on periodic table, meaning that they have similar electronic configuration. They therefore have a better chance to share electrons. Also, the crystal lattice of Cu, Ag, and Au is the same, face-centered cubic. In the project, the detailed bonding mechanism is beyond the scope and here we determine the bonding by the experimental result. Ag is chosen as the joint material because of its superior physical properties. It has the highest electrical and thermal conductivities among all metals. It has low yield strength and is relatively ductile. Au is considered as well because its excellent ductility and fatigue resistance. Thus, the Ag or Au joints can deform to accommodate the shear strain caused by CTE mismatch between Si and Cu. Ag and Au have melting temperatures higher than 950°C, so the pure Ag or Au joints are expected to sustain in high operating temperature. The resulting joints do not contain any intermetallic compound. Thus, all reliability issues associated with intermetallic growth in commonly used solder joints do not exist anymore. We finally move to the applications of solid state Ag bonding in flip chip interconnects design. At present, nearly all large-scale integrated circuit (IC) chips are packaged with flip-chip technology. This means that the chip is flipped over and the active (front) side is connected to the package using a large number of tiny solder joints, which provide mechanical support, electrical connection, and heat conduction. For chip-to-package level interconnects, a challenge is the severe mismatch in coefficient of thermal expansion (CTE) between chips and package substrates. The interconnect material thus needs to be compliant to deal with the CTE mismatch. At present, nearly all flip-chip interconnects in electronic industries are made of lead-free Sn-based solders. Soft solders are chosen due to high ductility, low yield strength, relatively low melting temperature, and reasonably good electrical and thermal conductivities. In the never ending scaling down trend, more and more transistors are placed on the same Si chip size. This results in larger pin-out numbers and smaller solder joints. According to International Technology Roadmap for Semiconductors (ITRS), by 2018, the pitch in flip-chip interconnects will become smaller than 70mum for high performance applications. Two problems occur. The first is increase in shear strain. The aspect ratio of flip-chip joints is constrained to 0.7 because it goes through molten phase in the reflow process. Therefore, smaller joints become shorter as well, resulting in larger shear strain arising from CTE mismatch between Si chips and package substrates. The second is increase in stress in the joints. Since intermetallic (IMC) thickness in the joint does not scale down with joint size, ratio of IMC thickness to joint height increases. This further enlarges the shear stress because the IMC does not deform as the soft solder does to accommodate CTE mismatch. In this research, the smallest dimension we achieve for Ag flip chip interconnect joint is 15mum in diameter. The ten advantages of Ag flip chip interconnect technology can be identified as (a) High electrical conductivity, 7.7 times of that of Pb-free solders, (b) High thermal conductivity, 5.2 times of that of Pb-free solders, (c) Completely fluxless, (d) No IMCs; all reliability issues associated with IMC and IMC growth do not exist, (e) Ag is very ductile and can manage CTE mismatch between chips and packages, (f) Ag joints can sustain at very high operation temperature because Ag has high melting temperature of 961°C, (g) No molten phase involved; the bump can better keep its shape and geometry, (h) No molten phase involved; bridging of adjacent bumps is less likely to occur, i. Aspect ratio of bumps can be made greater than 1, (j) The size of the bumps is only limited by the lithographic process. Cu-Ag composite flip chip interconnect joints is developed based on three reasons. The first is lower material cost. The second is to strengthen the columns because the yield strength of Cu is 6 times of that of Ag. The third is to avoid possible Ag migration between Ag electrodes under voltage at temperatures above 250°C. This Cu-Ag composite design presents a solution in the path to the scale down roadmap.
High-sensitivity low-noise miniature fluxgate magnetometers using a flip chip conceptual design.
Lu, Chih-Cheng; Huang, Jeff; Chiu, Po-Kai; Chiu, Shih-Liang; Jeng, Jen-Tzong
2014-07-30
This paper presents a novel class of miniature fluxgate magnetometers fabricated on a print circuit board (PCB) substrate and electrically connected to each other similar to the current "flip chip" concept in semiconductor package. This sensor is soldered together by reversely flipping a 5 cm × 3 cm PCB substrate to the other identical one which includes dual magnetic cores, planar pick-up coils, and 3-D excitation coils constructed by planar Cu interconnections patterned on PCB substrates. Principles and analysis of the fluxgate sensor are introduced first, and followed by FEA electromagnetic modeling and simulation for the proposed sensor. Comprehensive characteristic experiments of the miniature fluxgate device exhibit favorable results in terms of sensitivity (or "responsivity" for magnetometers) and field noise spectrum. The sensor is driven and characterized by employing the improved second-harmonic detection technique that enables linear V-B correlation and responsivity verification. In addition, the double magnitude of responsivity measured under very low frequency (1 Hz) magnetic fields is experimentally demonstrated. As a result, the maximum responsivity of 593 V/T occurs at 50 kHz of excitation frequency with the second harmonic wave of excitation; however, the minimum magnetic field noise is found to be 0.05 nT/Hz(1/2) at 1 Hz under the same excitation. In comparison with other miniature planar fluxgates published to date, the fluxgate magnetic sensor with flip chip configuration offers advances in both device functionality and fabrication simplicity. More importantly, the novel design can be further extended to a silicon-based micro-fluxgate chip manufactured by emerging CMOS-MEMS technologies, thus enriching its potential range of applications in modern engineering and the consumer electronics market.
Quantifying the benefits of improved rolling of chip seals : final report, June 2008.
DOT National Transportation Integrated Search
2008-06-01
This report presents an improvement in the rolling protocol for chip seals based on an evaluation of aggregate : retention performance and aggregate embedment depth. The flip-over test (FOT), Vialit test, modified sand circle : test, digital image pr...
Novel First-Level Interconnect Techniques for Flip Chip on MEMS Devices
Sutanto, Jemmy; Anand, Sindhu; Patel, Chetan; Muthuswamy, Jit
2013-01-01
Flip-chip packaging is desirable for microelectro-mechanical systems (MEMS) devices because it reduces the overall package size and allows scaling up the number of MEMS chips through 3-D stacks. In this report, we demonstrate three novel techniques to create first-level interconnect (FLI) on MEMS: 1) Dip and attach technology for Ag epoxy; 2) Dispense technology for solder paste; 3) Dispense, pull, and attach technology (DPAT) for solder paste. The above techniques required no additional microfabrication steps, produced no visible surface contamination on the MEMS active structures, and generated high-aspect-ratio interconnects. The developed FLIs were successfully tested on MEMS moveable microelectrodes microfabricated by SUMMiTVTM process producing no apparent detrimental effect due to outgassing. The bumping processes were successfully applied on Al-deposited bond pads of 100 μm × 100 μm with an average bump height of 101.3 μm for Ag and 184.8 μm for solder (63Sn, 37Pb). DPAT for solder paste produced bumps with the aspect ratio of 1.8 or more. The average shear strengths of Ag and solder bumps were 78 MPa and 689 kPa, respectively. The electrical test on Ag bumps at 794 A/cm2 demonstrated reliable electrical interconnects with negligible resistance. These scalable FLI technologies are potentially useful for MEMS flip-chip packaging and 3-D stacking. PMID:24504168
NASA Astrophysics Data System (ADS)
Choi, W. J.; Yeh, E. C. C.; Tu, K. N.
2003-11-01
Electromigration of eutectic SnPb flip chip solder joints and their mean-time-to-failure (MTTF) have been studied in the temperature range of 100 to 140 °C with current densities of 1.9 to 2.75×104 A/cm2. In these joints, the under-bump-metallization (UBM) on the chip side is a multilayer thin film of Al/Ni(V)/Cu, and the metallic bond-pad on the substrate side is a very thick, electroless Ni layer covered with 30 nm of Au. When stressed at the higher current densities, the MTTF was found to decrease much faster than what is expected from the published Black's equation. The failure occurred by interfacial void propagation at the cathode side, and it is due to current crowding near the contact interface between the solder bump and the thin-film UBM. The current crowding is confirmed by a simulation of current distribution in the solder joint. Besides the interfacial void formation, the intermetallic compounds formed on the UBM as well as the Ni(V) film in the UBM have been found to dissolve completely into the solder bump during electromigration. Therefore, the electromigation failure is a combination of the interfacial void formation and the loss of UBM. Similar findings in eutectic SnAgCu flip chip solder joints have also been obtained and compared.
Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs
NASA Astrophysics Data System (ADS)
Unno, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.; Sato, Kz.; Sato, Kj.; Iwabuchi, S.; Suzuki, J.
2017-01-01
We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n+-in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zhen, Aigong; Ma, Ping, E-mail: maping@semi.ac.cn; Zhang, Yonghui
2014-12-22
In this experiment, a flip-chip light-emitting diode with photonic crystal was fabricated at the interface of p-GaN and Ag reflector via nanospheres lithography technique. In this structure, photonic crystal could couple with the guide-light efficiently by reason of the little distance between photonic crystal and active region. The light output power of light emitting diode with embedded photonic crystal was 1.42 times larger than that of planar flip-chip light-emitting diode. Moreover, the embedded photonic crystal structure makes the far-field divergence angle decreased by 18° without spectra shift. The three-dimensional finite difference time domain simulation results show that photonic crystal couldmore » improve the light extraction, and enhance the light absorption caused by Ag reflector simultaneously, because of the roughed surface. The depth of photonic crystal is the key parameter affecting the light extraction and absorption. Light extraction efficiency increases with the depth photonic crystal structure rapidly, and reaches the maximum at the depth 80 nm, beyond which light extraction decrease drastically.« less
Enhanced light extraction in tunnel junction-enabled top emitting UV LEDs
Zhang, Yuewei; Allerman, Andrew A.; Krishnamoorthy, Sriram; ...
2016-04-11
The efficiency of ultra violet LEDs has been critically limited by the absorption losses in p-type and metal layers. In this work, surface roughening based light extraction structures are combined with tunneling based p-contacts to realize highly efficient top-side light extraction efficiency in UV LEDs. Surface roughening of the top n-type AlGaN contact layer is demonstrated using self-assembled Ni nano-clusters as etch mask. The top surface roughened LEDs were found to enhance external quantum efficiency by over 40% for UV LEDs with a peak emission wavelength of 326 nm. The method described here can enable highly efficient UV LEDs withoutmore » the need for complex manufacturing methods such as flip chip bonding.« less
Ngo, Ha-Duong; Mukhopadhyay, Biswaijit; Ehrmann, Oswin; Lang, Klaus-Dieter
2015-08-18
In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a "one-sensor-one-packaging_technology" concept. The second one uses a standard flip-chip bonding technique. The first sensor is a "floating-concept", capable of measuring pressures at temperatures up to 400 °C (constant load) with an accuracy of 0.25% Full Scale Output (FSO). A push rod (mounted onto the steel membrane) transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process). A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not "floating" but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA.
4-GHz counters bring synthesizers up to speed
NASA Astrophysics Data System (ADS)
Lee, F.; Miller, R.
1984-06-01
The availability of digital IC counters built on GaAs makes direct frequency division in microwave synthesizers possible. Four GHz is the highest clock rate achievable in production designs. These devices have the ability to drive TTL/CMOS logic, and the counter can be connected directly to single-chip frequency synthesizers controllers. A complete microwave sythesizer is formed by two chips and a voltage-controlled oscillator (VCO). The advantages of GaAs are discussed along with flip-flop basics, aspects of device fabrication, and the characteristics of GaAs MESAFETs. Attention is given to a GaAs prescaler usable for direct conversion, four kinds of flip-flops in a divide-by-two mode, and seven-stage binary ripple counters.
A short review on thermosonic flip chip bonding
NASA Astrophysics Data System (ADS)
Suppiah, Sarveshvaran; Ong, Nestor Rubio; Sauli, Zaliman; Sarukunaselan, Karunavani; Alcain, Jesselyn Barro; Shahimin, Mukhzeer Mohamad; Retnasamy, Vithyacharan
2017-09-01
This review is to study the evolution and key findings, critical technical challenges, solutions and bonding equipment of thermosonic flip chip bonding. Based on the review done, it was found that ultrasonic power, bonding time and force are the three main critical parameters need to be optimized in order to achieve sound and reliable bonding between the die and substrate. A close monitoring of the ultrasonic power helped to prevent over bonding phenomena on flexible substrate. Gold stud bumping is commonly used in thermosonic bonding compared to solder due to its better reliability obtained in the LED and optoelectronic packages. The review comprised short details on the available thermosonic bonding equipment in the semiconductor industry as well.
Reliability and Qualification of Hardware to Enhance the Mission Assurance of JPL/NASA Projects
NASA Technical Reports Server (NTRS)
Ramesham, Rajeshuni
2010-01-01
Packaging Qualification and Verification (PQV) and life testing of advanced electronic packaging, mechanical assemblies (motors/actuators), and interconnect technologies (flip-chip), platinum temperature thermometer attachment processes, and various other types of hardware for Mars Exploration Rover (MER)/Mars Science Laboratory (MSL), and JUNO flight projects was performed to enhance the mission assurance. The qualification of hardware under extreme cold to hot temperatures was performed with reference to various project requirements. The flight like packages, assemblies, test coupons, and subassemblies were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases. Qualification/life testing was performed by subjecting flight-like qualification hardware to the environmental temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Experimental flight qualification test results will be described in this presentation.
NASA Astrophysics Data System (ADS)
Pitris, St.; Vagionas, Ch.; Kanellos, G. T.; Kisacik, R.; Tekin, T.; Broeke, R.; Pleros, N.
2016-03-01
At the dawning of the exaflop era, High Performance Computers are foreseen to exploit integrated all-optical elements, to overcome the speed limitations imposed by electronic counterparts. Drawing from the well-known Memory Wall limitation, imposing a performance gap between processor and memory speeds, research has focused on developing ultra-fast latching devices and all-optical memory elements capable of delivering buffering and switching functionalities at unprecedented bit-rates. Following the master-slave configuration of electronic Flip-Flops, coupled SOA-MZI based switches have been theoretically investigated to exceed 40 Gb/s operation, provided a short coupling waveguide. However, this flip-flop architecture has been only hybridly integrated with silica-on-silicon integration technology exhibiting a total footprint of 45x12 mm2 and intra-Flip-Flop coupling waveguide of 2.5cm, limited at 5 Gb/s operation. Monolithic integration offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity towards, bearing promises for fast all-optical memories. Here, we present for the first time a monolithically integrated all-optical SR Flip-Flop with coupled master-slave SOA-MZI switches. The photonic chip is integrated on a 6x2 mm2 die as a part of a multi-project wafer run using library based components of a generic InP platform, fiber-pigtailed and fully packaged on a temperature controlled ceramic submount module with electrical contacts. The intra Flip-Flop coupling waveguide is 5 mm long, reducing the total footprint by two orders of magnitude. Successful flip flop functionality is evaluated at 10 Gb/s with clear open eye diagram, achieving error free operation with a power penalty of 4dB.
Polarity effect of electromigration on mechanical properties of lead-free solder joints
NASA Astrophysics Data System (ADS)
Ren, Fei
The trend of electronic packaging is to package the chips and the associated interconnections in a compact way that allows high speed operation; that allows for sufficient heat removal; that can withstand the thermal cycling associated with the turning on and turning off of the circuits; and that protects the circuits from environmental attack. These goals require that flip chip solder joints have higher resistance to electromigration, stronger mechanical property to sustain thermal mechanical stress, and are lead-free materials to satisfy environment and health concern. With lots of work on chemical reaction, electromigration and mechanical study in flip chip solder joints, however, the interaction between different driving forces is still little known. As a matter of fact, the combination study of chemical, electrical and mechanical is more and more significant to the understanding of the behavior of flip chip solder joints. In this dissertation, I developed one dimensional Cu (wire)-eutectic SnAgCu(ball)-Cu(wire) structure to investigate the interaction between electrical and mechanical force in lead-free solder joints. Electromigration was first conducted. The mechanical behaviors of solder joints before, after, and during electromigration were examined. Electrical current and mechanical stress were applied either in serial or in parallel to the solder joints. Tensile, creep, and drop tests, combined with different electrical current densities (1˜5x10 3A/cm2) and different stressing time (3˜144 hours), have been performed to study the effect of electromigration on the mechanical behavior of solder joints. Nano-indentation test was conducted to study the localized mechanical property of IMC at both interfaces in nanometer scale. Fracture images help analyze the failure mechanism of solder joints driven by both electrical and mechanical forces. The combination study shows a strain build-up during electromigration. Furthermore, a ductile-to-brittle transition in flip chip solder joints induced by electromigration is observed, in which the fracture position migrates from the middle to the cathode interface of the joint with increasing current density and time. The transition is explained by the polarity effect of electromigration, particular due to the accumulation of vacancies at the cathode interface.
Laser-induced forward transfer for flip-chip packaging of single dies.
Kaur, Kamal S; Van Steenberge, Geert
2015-03-20
Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 1960(1) such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.
Read disturb errors in a CMOS static RAM chip. [radiation hardened for spacedraft
NASA Technical Reports Server (NTRS)
Wood, Steven H.; Marr, James C., IV; Nguyen, Tien T.; Padgett, Dwayne J.; Tran, Joe C.; Griswold, Thomas W.; Lebowitz, Daniel C.
1989-01-01
Results are reported from an extensive investigation into pattern-sensitive soft errors (read disturb errors) in the TCC244 CMOS static RAM chip. The TCC244, also known as the SA2838, is a radiation-hard single-event-upset-resistant 4 x 256 memory chip. This device is being used by the Jet Propulsion Laboratory in the Galileo and Magellan spacecraft, which will have encounters with Jupiter and Venus, respectively. Two aspects of the part's design are shown to result in the occurrence of read disturb errors: the transparence of the signal path from the address pins to the array of cells, and the large resistance in the Vdd and Vss lines of the cells in the center of the array. Probe measurements taken during a read disturb failure illustrate how address skews and the data pattern in the chip combine to produce a bit flip. A capacitive charge pump formed by the individual cell capacitances and the resistance in the supply lines pumps down both the internal cell voltage and the local supply voltage until a bit flip occurs.
Ngo, Ha-Duong; Mukhopadhyay, Biswaijit; Ehrmann, Oswin; Lang, Klaus-Dieter
2015-01-01
In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a “one-sensor-one-packaging_technology” concept. The second one uses a standard flip-chip bonding technique. The first sensor is a “floating-concept”, capable of measuring pressures at temperatures up to 400 °C (constant load) with an accuracy of 0.25% Full Scale Output (FSO). A push rod (mounted onto the steel membrane) transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process). A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not “floating” but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA. PMID:26295235
NASA Astrophysics Data System (ADS)
Hao, Guo-Dong; Taniguchi, Manabu; Tamari, Naoki; Inoue, Shin-ichiro
2018-01-01
We thoroughly explored the physical origin of the efficiency decrease with increasing injection current and current crowding effect in 280 nm AlGaN-based flip-chip deep-ultraviolet (DUV) light-emitting diodes (LEDs). The current spreading length was experimentally determined to be much smaller in DUV LEDs than that in conventional InGaN-based visible LEDs. The severe self-heating caused by the low power conversion efficiency of DUV LEDs should be mainly responsible for the considerable decrease of efficiency when current crowding is present. The wall-plug efficiency of the DUV LEDs was markedly enhanced by using a well-designed p-electrode pattern to improve the current distribution.
NASA Astrophysics Data System (ADS)
Liang, S. W.; Chang, Y. W.; Chen, Chih
2006-04-01
Three-dimensional thermoelectrical simulation was conducted to investigate the influence of Al-trace dimension on Joule heating and current crowding in flip-chip solder joints. It is found that the dimension of the Al-trace effects significantly on the Joule heating, and thus directly determines the mean time to failure (MTTF). Simulated at a stressing current of 0.6A at 70°C, we estimate that the MTTF of the joints with Al traces in 100μm width was 6.1 times longer than that of joints with Al traces in 34μm width. Lower current crowding effect and reduced hot-spot temperature are responsible for the improved MTTF.
High-Sensitivity Low-Noise Miniature Fluxgate Magnetometers Using a Flip Chip Conceptual Design
Lu, Chih-Cheng; Huang, Jeff; Chiu, Po-Kai; Chiu, Shih-Liang; Jeng, Jen-Tzong
2014-01-01
This paper presents a novel class of miniature fluxgate magnetometers fabricated on a print circuit board (PCB) substrate and electrically connected to each other similar to the current “flip chip” concept in semiconductor package. This sensor is soldered together by reversely flipping a 5 cm × 3 cm PCB substrate to the other identical one which includes dual magnetic cores, planar pick-up coils, and 3-D excitation coils constructed by planar Cu interconnections patterned on PCB substrates. Principles and analysis of the fluxgate sensor are introduced first, and followed by FEA electromagnetic modeling and simulation for the proposed sensor. Comprehensive characteristic experiments of the miniature fluxgate device exhibit favorable results in terms of sensitivity (or “responsivity” for magnetometers) and field noise spectrum. The sensor is driven and characterized by employing the improved second-harmonic detection technique that enables linear V-B correlation and responsivity verification. In addition, the double magnitude of responsivity measured under very low frequency (1 Hz) magnetic fields is experimentally demonstrated. As a result, the maximum responsivity of 593 V/T occurs at 50 kHz of excitation frequency with the second harmonic wave of excitation; however, the minimum magnetic field noise is found to be 0.05 nT/Hz1/2 at 1 Hz under the same excitation. In comparison with other miniature planar fluxgates published to date, the fluxgate magnetic sensor with flip chip configuration offers advances in both device functionality and fabrication simplicity. More importantly, the novel design can be further extended to a silicon-based micro-fluxgate chip manufactured by emerging CMOS-MEMS technologies, thus enriching its potential range of applications in modern engineering and the consumer electronics market. PMID:25196107
A review on solder reflow and flux application for flip chip
NASA Astrophysics Data System (ADS)
Suppiah, Sarveshvaran; Ong, Nestor Rubio; Sauli, Zaliman; Sarukunaselan, Karunavani; Alcain, Jesselyn Barro; Visvanathan, Susthitha Menon; Retnasamy, Vithyacharan
2017-09-01
This paper encompassed of the evolution and key findings, critical technical challenges, solutions and bonding equipment of solder reflow in flip chip bonding. Upon scrutinizing researches done by others, it can be deduced that peak temperature, time above liquidus, soak temperature, soak time, cooling rate and reflow environment played a vital role in achieving the desired bonding profile. In addition, flux is also needed with the purpose of removing oxides/contaminations on bump surface as well as to promote wetting of solder balls. Electromigration and warpage are the two main challenges faced by solder reflow process which can be overcome by the advancement in under bump metallization (UBM) and substrate technology. The review is ended with a brief description of the current equipment used in solder reflow process.
DOE Office of Scientific and Technical Information (OSTI.GOV)
NONE
1998-05-01
This final report is a compilation of final reports from each of the groups participating in the program. The main three groups involved in this effort are the Thomas J. Watson Research Center of IBM Corporation in Yorktown Heights, New York, Assembly Process Design of IBM Corporation in Endicott, New York, and SMT Laboratory of Universal Instruments Corporation in Binghamton, New York. The group at the research center focused on the conductive adhesive materials development and characterization. The group in process development focused on processing of the Polymer-Metal-Solvent Paste (PMSP) to form conductive adhesive bumps, formation of the Polymer-Metal Compositemore » (PMC) on semiconductor devices and study of the bonding process to circuitized organic carriers, and the long term durability and reliability of joints formed using the process. The group at Universal Instruments focused on development of an equipment set and bonding parameters for the equipment to produce bond assembly tooling. Reports of each of these individual groups are presented here reviewing their technical efforts and achievements.« less
Method of fabricating a microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2003-01-01
A method of fabricating a microelectronic device package with an integral window for providing optical access through an aperture in the package. The package is made of a multilayered insulating material, e.g., a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC). The window is inserted in-between personalized layers of ceramic green tape during stackup and registration. Then, during baking and firing, the integral window is simultaneously bonded to the sintered ceramic layers of the densified package. Next, the microelectronic device is flip-chip bonded to cofired thick-film metallized traces on the package, where the light-sensitive side is optically accessible through the window. Finally, a cover lid is attached to the opposite side of the package. The result is a compact, low-profile package, flip-chip bonded, hermetically-sealed package having an integral window.
Fukumura, Takuma; Makino, Fumiaki; Dietsche, Tobias; Kinoshita, Miki; Kato, Takayuki; Wagner, Samuel; Namba, Keiichi; Imada, Katsumi; Minamino, Tohru
2017-08-01
The bacterial flagellar type III export apparatus, which is required for flagellar assembly beyond the cell membranes, consists of a transmembrane export gate complex and a cytoplasmic ATPase complex. FlhA, FlhB, FliP, FliQ, and FliR form the gate complex inside the basal body MS ring, although FliO is required for efficient export gate formation in Salmonella enterica. However, it remains unknown how they form the gate complex. Here we report that FliP forms a homohexameric ring with a diameter of 10 nm. Alanine substitutions of conserved Phe-137, Phe-150, and Glu-178 residues in the periplasmic domain of FliP (FliPP) inhibited FliP6 ring formation, suppressing flagellar protein export. FliO formed a 5-nm ring structure with 3 clamp-like structures that bind to the FliP6 ring. The crystal structure of FliPP derived from Thermotoga maritia, and structure-based photo-crosslinking experiments revealed that Phe-150 and Ser-156 of FliPP are involved in the FliP-FliP interactions and that Phe-150, Arg-152, Ser-156, and Pro-158 are responsible for the FliP-FliO interactions. Overexpression of FliP restored motility of a ∆fliO mutant to the wild-type level, suggesting that the FliP6 ring is a functional unit in the export gate complex and that FliO is not part of the final gate structure. Copurification assays revealed that FlhA, FlhB, FliQ, and FliR are associated with the FliO/FliP complex. We propose that the assembly of the export gate complex begins with FliP6 ring formation with the help of the FliO scaffold, followed by FliQ, FliR, and FlhB and finally FlhA during MS ring formation.
Fukumura, Takuma; Makino, Fumiaki; Dietsche, Tobias; Kinoshita, Miki; Kato, Takayuki; Wagner, Samuel; Namba, Keiichi; Imada, Katsumi
2017-01-01
The bacterial flagellar type III export apparatus, which is required for flagellar assembly beyond the cell membranes, consists of a transmembrane export gate complex and a cytoplasmic ATPase complex. FlhA, FlhB, FliP, FliQ, and FliR form the gate complex inside the basal body MS ring, although FliO is required for efficient export gate formation in Salmonella enterica. However, it remains unknown how they form the gate complex. Here we report that FliP forms a homohexameric ring with a diameter of 10 nm. Alanine substitutions of conserved Phe-137, Phe-150, and Glu-178 residues in the periplasmic domain of FliP (FliPP) inhibited FliP6 ring formation, suppressing flagellar protein export. FliO formed a 5-nm ring structure with 3 clamp-like structures that bind to the FliP6 ring. The crystal structure of FliPP derived from Thermotoga maritia, and structure-based photo-crosslinking experiments revealed that Phe-150 and Ser-156 of FliPP are involved in the FliP–FliP interactions and that Phe-150, Arg-152, Ser-156, and Pro-158 are responsible for the FliP–FliO interactions. Overexpression of FliP restored motility of a ∆fliO mutant to the wild-type level, suggesting that the FliP6 ring is a functional unit in the export gate complex and that FliO is not part of the final gate structure. Copurification assays revealed that FlhA, FlhB, FliQ, and FliR are associated with the FliO/FliP complex. We propose that the assembly of the export gate complex begins with FliP6 ring formation with the help of the FliO scaffold, followed by FliQ, FliR, and FlhB and finally FlhA during MS ring formation. PMID:28771466
A novel miniaturized PCR multi-reactor array fabricated using flip-chip bonding techniques
NASA Astrophysics Data System (ADS)
Zou, Zhi-Qing; Chen, Xiang; Jin, Qing-Hui; Yang, Meng-Su; Zhao, Jian-Long
2005-08-01
This paper describes a novel miniaturized multi-chamber array capable of high throughput polymerase chain reaction (PCR). The structure of the proposed device is verified by using finite element analysis (FEA) to optimize the thermal performance, and then implemented on a glass-silicon substrate using a standard MEMS process and post-processing. Thermal analysis simulation and verification of each reactor cell is equipped with integrated Pt temperature sensors and heaters at the bottom of the reaction chamber for real-time accurate temperature sensing and control. The micro-chambers are thermally separated from each other, and can be controlled independently. The multi-chip array was packaged on a printed circuit board (PCB) substrate using a conductive polymer flip-chip bonding technique, which enables effective heat dissipation and suppresses thermal crosstalk between the chambers. The designed system has successfully demonstrated a temperature fluctuation of ±0.5 °C during thermal multiplexing of up to 2 × 2 chambers, a full speed of 30 min for 30 cycle PCR, as well as the capability of controlling each chamber digitally and independently.
Cost-effective method of manufacturing a 3D MEMS optical switch
NASA Astrophysics Data System (ADS)
Carr, Emily; Zhang, Ping; Keebaugh, Doug; Chau, Kelvin
2009-02-01
growth of data and video transport networks. All-optical switching eliminates the need for optical-electrical conversion offering the ability to switch optical signals transparently: independent of data rates, formats and wavelength. It also provides network operators much needed automation capabilities to create, monitor and protect optical light paths. To further accelerate the market penetration, it is necessary to identify a path to reduce the manufacturing cost significantly as well as enhance the overall system performance, uniformity and reliability. Currently, most MEMS optical switches are assembled through die level flip-chip bonding with either epoxies or solder bumps. This is due to the alignment accuracy requirements of the switch assembly, defect matching of individual die, and cost of the individual components. In this paper, a wafer level assembly approach is reported based on silicon fusion bonding which aims to reduce the packaging time, defect count and cost through volume production. This approach is successfully demonstrated by the integration of two 6-inch wafers: a mirror array wafer and a "snap-guard" wafer, which provides a mechanical structure on top of the micromirror to prevent electrostatic snap-down. The direct silicon-to-silicon bond eliminates the CTEmismatch and stress issues caused by non-silicon bonding agents. Results from a completed integrated switch assembly will be presented, which demonstrates the reliability and uniformity of some key parameters of this MEMS optical switch.
Xu, Ming; Yang, Wan; Hong, Tao; Kang, TangZhen; Ji, JianHua; Wang, Ke
2017-06-01
Ultrafast all-optical flip-flop based on a passive micro Sagnac waveguide ring is studied through theoretical analysis and numerical simulation in this paper. The types of D, R-S, J-K, and T flip-flop are designed by controlling the cross-phase modulation effect of lights in this special microring. The high nonlinearity of the hollow-core photonic crystal fiber is implanted on a chip to shorten the length of the ring and reduce input power. By sensible management, the pulse width ratio of the input and the control signal, problems of pulse narrowing, and residual pedestal at the out port are solved. The parameters affecting the performance of flip-flops are optimized. The results show that the all-optical flip-flops have stable performance, low power consumption, high transmission rate (up to 100 Gb/s), and response time in picosecond order. The small size microwaveguide structure is suitable for photonic integration.
Bi-level multilayered microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2002-01-01
A bi-level, multilayered package with an integral window for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that the light-sensitive side is optically accessible through the window. A second chip can be bonded to the backside of the first chip, with the second chip being wirebonded to the second level of the bi-level package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed.
NASA Astrophysics Data System (ADS)
Cho, H. K.; Krüger, O.; Külberg, A.; Rass, J.; Zeimer, U.; Kolbe, T.; Knauer, A.; Einfeldt, S.; Weyers, M.; Kneissl, M.
2017-12-01
We report on a chip design which allows the laser lift-off (LLO) of the sapphire substrate sustaining the epitaxial film of flip-chip mounted deep ultraviolet light emitting diodes. A nanosecond pulsed excimer laser with a wavelength of 248 nm was used for the LLO. A mechanically stable chip design was found to be the key to prevent crack formation in the epitaxial layers and material chipping during the LLO process. Stabilization was achieved by introducing a Ti/Au leveling layer that mechanically supports the fragile epitaxial film. The electrical and optical characterization of devices before and after the LLO process shows that the device performance did not degrade by the LLO.
Sealed symmetric multilayered microelectronic device package with integral windows
Peterson, Kenneth A.; Watson, Robert D.
2002-01-01
A sealed symmetric multilayered package with integral windows for housing one or more microelectronic devices. The devices can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the windows being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic devices can be flip-chip bonded and oriented so that the light-sensitive sides are optically accessible through the windows. The result is a compact, low-profile, sealed symmetric package, having integral windows that can be hermetically-sealed.
Micromechanical Waveguide Mounts for Hot Electron Bolometer Terahertz Mixers
NASA Astrophysics Data System (ADS)
Brandt, Michael; Jacobs, Karl; Honingh, C. E.; Stodolka, Jörg
The superior beam matching of waveguide horn antennas to a telescope suggests using waveguide mounts even at THz-frequencies. In contrast to the more common quasi-optical (substrate lens) designs, the exceedingly small dimensions of the waveguide require novel micro-mechanical fabrication technologies. We will present a novel fabrication scheme for 1.9 THz waveguide mixers for SOFIA. Hot Electron Bolometer devices (HEB) are fabricated on 2 μm thick Si3N4 membrane strips. The strips are robust enough to be mounted on a separately fabricated Si support frame using an adapted flip-chip technology. Mounted onto the frame, the devices can be easily positioned and glued into a copper waveguide mount. Further developments regarding micro-mechanical processes to fabricate this copper waveguide mount and the receiving horn antenna will be presented, as well as the KOSMA Micro Assembly Station and its capabilities to handle mixer substrates.
Spin-flip transitions in self-assembled quantum dots
NASA Astrophysics Data System (ADS)
Stavrou, V. N.
2017-12-01
Detailed realistic calculations of the spin-flip time (T 1) for an electron in a self-assembled quantum dot (SAQD) due to emission of an acoustic phonon, using only bulk properties with no fitting parameters, are presented. Ellipsoidal lens shaped Inx Ga1-x As quantum dots, with electronic states calculated using 8-band strain dependent {k \\cdot p} theory, are considered. The phonons are treated as bulk acoustic phonons coupled to the electron by both deformation potential and piezoelectric interactions. The dependence of T 1 on the geometry of SAQD, on the applied external magnetic field and on the lattice temperature is highlighted. The theoretical results are close to the experimental measurements on the spin-flip times for a single electron in QD.
Mechanical flip-chip for ultra-high electron mobility devices
Bennaceur, Keyan; Schmidt, Benjamin A.; Gaucher, Samuel; ...
2015-09-22
In this study, electrostatic gates are of paramount importance for the physics of devices based on high-mobility two-dimensional electron gas (2DEG) since they allow depletion of electrons in selected areas. This field-effect gating enables the fabrication of a wide range of devices such as, for example, quantum point contacts (QPC), electron interferometers and quantum dots. To fabricate these gates, processing is usually performed on the 2DEG material, which is in many cases detrimental to its electron mobility. Here we propose an alternative process which does not require any processing of the 2DEG material other than for the ohmic contacts. Thismore » approach relies on processing a separate wafer that is then mechanically mounted on the 2DEG material in a flip-chip fashion. This technique proved successful to fabricate quantum point contacts on both GaAs/AlGaAs materials with both moderate and ultra-high electron mobility.« less
Nanoparticle embedded p-type electrodes for GaN-based flip-chip light emitting diodes.
Kwak, Joon Seop; Song, J O; Seong, T Y; Kim, B I; Cho, J; Sone, C; Park, Y
2006-11-01
We have investigated high-quality ohmic contacts for flip-chip light emitting diodes using Zn-Ni nanoparticles/Ag schemes. The Zn-Ni nanoparticles/Ag contacts produce specific contact resistances of 10(-5)-10(-6) omegacm2 when annealed at temperatures of 330-530 degrees C for 1 min in air ambient, which are much better than those obtained from the Ag contacts. It is shown that blue InGaN/GaN multi-quantum well light emitting diodes fabricated with the annealed Zn-Ni nanoparticles/Ag contacts give much lower forward-bias voltages at 20 mA compared with those of the multi-quantum well light emitting diodes made with the as-deposited Ag contacts. It is further presented that the multi-quantum well light emitting diodes made with the Zn-Ni nanoparticles/Ag contacts show similar output power compared to those fabricated with the Ag contact layers.
Yong, Zheng; Shopov, Stefan; Mikkelsen, Jared C; Mallard, Robert; Mak, Jason C C; Voinigescu, Sorin P; Poon, Joyce K S
2017-03-20
We present a silicon electro-optic transmitter consisting of a 28nm ultra-thin body and buried oxide fully depleted silicon-on-insulator (UTBB FD-SOI) CMOS driver flip-chip integrated onto a Mach-Zehnder modulator. The Mach-Zehnder silicon optical modulator was optimized to have a 3dB bandwidth of around 25 GHz at -1V bias and a 50 Ω impedance. The UTBB FD-SOI CMOS driver provided a large output voltage swing around 5 Vpp to enable a high dynamic extinction ratio and a low device insertion loss. At 44 Gbps, the transmitter achieved a high extinction ratio of 6.4 dB at the modulator quadrature operation point. This result shows open eye diagrams at the highest bit rates and with the largest extinction ratios for silicon electro-optic transmitter using a CMOS driver.
Effect of current crowding on whisker growth at the anode in flip chip solder joints
NASA Astrophysics Data System (ADS)
Ouyang, Fan-Yi; Chen, Kai; Tu, K. N.; Lai, Yi-Shao
2007-12-01
Owing to the line-to-bump configuration in flip chip solder joints, current crowding occurs when electrons enter into or exit from the solder bump. At the cathode contact, where electrons enter into the bump, current crowding induced pancake-type void formation has now been observed widely. At the anode contact, where electrons exit from the bump, we report here that whisker is formed. Results of both eutectic SnPb and SnAgCu solder joints are presented and compared. The cross-sectioned surface in SnPb showed dimple and bulge after electromigration, while that of SnAgCu remained flat. The difference is due to a larger back stress in the SnAgCu, consequently, electromigration in SnAgCu is slower than that in SnPb. Nanoindentation markers were used to measure the combined atomic fluxes of back stress and electromigration.
Microcircuit Device Reliability Digital Detailed Data
1976-01-01
TYPE s No. FUNCTION A LASS PINS TEMP. TYPE CLASS LEVEL I eFAILED 8 NO. CHIP TEST APPL. TEST PAR1 t T AGATES PROTECT. DATE E:V. D TYPE HOURST :708 FLIP...LEVEL # EFAILED s a NO. t CHIP i TEST 3 APPL. a TEST I PAR! 3 a GATES s PROTECT. a DATE 3 ENV. t TYPE I 3 -OUHb s 354H0( 3 GATE C-I CDIP 14 150C :11.A
Wygant, Ira O; Jamal, Nafis S; Lee, Hyunjoo J; Nikoozadeh, Amin; Oralkan, Omer; Karaman, Mustafa; Khuri-Yakub, Butrus T
2009-10-01
State-of-the-art 3-D medical ultrasound imaging requires transmitting and receiving ultrasound using a 2-D array of ultrasound transducers with hundreds or thousands of elements. A tight combination of the transducer array with integrated circuitry eliminates bulky cables connecting the elements of the transducer array to a separate system of electronics. Furthermore, preamplifiers located close to the array can lead to improved receive sensitivity. A combined IC and transducer array can lead to a portable, high-performance, and inexpensive 3-D ultrasound imaging system. This paper presents an IC flip-chip bonded to a 16 x 16-element capacitive micromachined ultrasonic transducer (CMUT) array for 3-D ultrasound imaging. The IC includes a transmit beamformer that generates 25-V unipolar pulses with programmable focusing delays to 224 of the 256 transducer elements. One-shot circuits allow adjustment of the pulse widths for different ultrasound transducer center frequencies. For receiving reflected ultrasound signals, the IC uses the 32-elements along the array diagonals. The IC provides each receiving element with a low-noise 25-MHz-bandwidth transimpedance amplifier. Using a field-programmable gate array (FPGA) clocked at 100 MHz to operate the IC, the IC generated properly timed transmit pulses with 5-ns accuracy. With the IC flip-chip bonded to a CMUT array, we show that the IC can produce steered and focused ultrasound beams. We present 2-D and 3-D images of a wire phantom and 2-D orthogonal cross-sectional images (Bscans) of a latex heart phantom.
Multilayered Microelectronic Device Package With An Integral Window
Peterson, Kenneth A.; Watson, Robert D.
2004-10-26
A microelectronic package with an integral window mounted in a recessed lip for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can be formed of a low temperature co-fired ceramic (LTCC) or high temperature cofired ceramic (HTCC) multilayered material, with the integral window being simultaneously joined (e.g. co-fired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that a light-sensitive side is optically accessible through the window. The result is a compact, low profile package, having an integral window mounted in a recessed lip, that can be hermetically sealed.
Processing and Characterization of NiTi Shape Memory Alloy Particle Reinforced Sn-In Solders
2006-12-01
solders generally operate at a high homologous temperature. Thermally induced grain growth, mechanical stress-induced grain growth and recrystallization ...the number of I/O connects available for flip chip as compared to the wirebond chip For interconnection and packaging, Pb-Sn and eutectic 63Sn...lower melting point is desired. The maximum use temperature for this alloy is around 120°C due to the fact that the eutectic reaction happened at
NASA Technical Reports Server (NTRS)
Feller, A.
1978-01-01
The entire complement of standard cells and components, except for the set-reset flip-flop, was completed. Two levels of checking were performed on each device. Logic cells and topological layout are described. All the related computer programs were coded and one level of debugging was completed. The logic for the test chip was modified and updated. This test chip served as the first test vehicle to exercise the standard cell complementary MOS(C-MOS) automatic artwork generation capability.
NASA Astrophysics Data System (ADS)
Akiyama, Terunobu; Staufer, Urs; Rooij, Nico F. de
2002-06-01
A microfabricated, electrical connector is proposed for facilitating the mounting of atomic force microscopy (AFM) probes, which have an integrated sensor and/or actuator. Only a base chip, which acts as a socket, is permanently fixed onto a printed circuit board and electronically connected by standard wire bonding. The AFM chip, the “plug”, is flipped onto the base chip and pressed from the backside by a spring. Electrical contact with the eventual stress sensors, capacitive or piezoelectric sensor/actuators, is provided by contact bumps. These bumps of about 8 μm height are placed onto the base chip. They touch the pads on the AFM chip that were originally foreseen to be for wire bonding and thus provide the electrical contact. This connector schema was successfully used to register AFM images with piezoresistive cantilevers.
Vázquez, Anne V; Holden, Brad; Kristalyn, Cornelius; Fuller, Mike; Wilkerson, Brett; Chen, Zhan
2011-05-01
Flip chip technology has greatly improved the performance of semiconductor devices, but relies heavily on the performance of epoxy underfill adhesives. Because epoxy underfills are cured in situ in flip chip semiconductor devices, understanding their surface and interfacial structures is critical for understanding their adhesion to various substrates. Here, sum frequency generation (SFG) vibrational spectroscopy was used to study surface and buried interfacial structures of two model epoxy resins used as underfills in flip chip devices, bisphenol A digylcidyl ether (BADGE) and 1,4-butanediol diglycidyl ether (BDDGE). The surface structures of these epoxies were compared before and after cure, and the orientations of their surface functional groups were deduced to understand how surface structural changes during cure may affect adhesion properties. Further, the effect of moisture exposure, a known cause of adhesion failure, on surface structures was studied. It was found that the BADGE surface significantly restructured upon moisture exposure while the BDDGE surface did not, showing that BADGE adhesives may be more prone to moisture-induced delamination. Lastly, although surface structure can give some insight into adhesion, buried interfacial structures more directly correspond to adhesion properties of polymers. SFG was used to study buried interfaces between deuterated polystyrene (d-PS) and the epoxies before and after moisture exposure. It was shown that moisture exposure acted to disorder the buried interfaces, most likely due to swelling. These results correlated with lap shear adhesion testing showing a decrease in adhesion strength after moisture exposure. The presented work showed that surface and interfacial structures can be correlated to adhesive strength and may be helpful in understanding and designing optimized epoxy underfill adhesives.
Yoshimoto, Shusuke; Uemura, Takafumi; Akiyama, Mihoko; Ihara, Yoshihiro; Otake, Satoshi; Fujii, Tomoharu; Araki, Teppei; Sekitani, Tsuyoshi
2017-07-01
This paper presents a flexible organic thin-film transistor (OTFT) amplifier for bio-signal monitoring and presents the chip component assembly process. Using a conductive adhesive and a chip mounter, the chip components are mounted on a flexible film substrate, which has OTFT circuits. This study first investigates the assembly technique reliability for chip components on the flexible substrate. This study also specifically examines heart pulse wave monitoring conducted using the proposed flexible amplifier circuit and a flexible piezoelectric film. We connected the amplifier to a bluetooth device for a wearable device demonstration.
A Robust Strategy for Total Ionizing Dose Testing of Field Programmable Gate Arrays
NASA Technical Reports Server (NTRS)
Wilcox, Edward; Berg, Melanie; Friendlich, Mark; Lakeman, Joseph; KIm, Hak; Pellish, Jonathan; LaBel, Kenneth
2012-01-01
We present a novel method of FPGA TID testing that measures propagation delay between flip-flops operating at maximum speed. Measurement is performed on-chip at-speed and provides a key design metric when building system-critical synchronous designs.
Mechanism of Void Prediction in Flip Chip Packages with Molded Underfill
NASA Astrophysics Data System (ADS)
Wu, Kuo-Tsai; Hwang, Sheng-Jye; Lee, Huei-Huang
2017-08-01
Voids have always been present using the molded underfill (MUF) package process, which is a problem that needs further investigation. In this study, the process was studied using the Moldex3D numerical analysis software. The effects of gas (air vent effect) on the overall melt front were also considered. In this isothermal process containing two fluids, the gas and melt colloid interact in the mold cavity. Simulation enabled an appropriate understanding of the actual situation to be gained, and, through analysis, the void region and exact location of voids were predicted. First, the global flow end area was observed to predict the void movement trend, and then the local flow ends were observed to predict the location and size of voids. In the MUF 518 case study, simulations predicted the void region as well as the location and size of the voids. The void phenomenon in a flip chip ball grid array underfill is discussed as part of the study.
NASA Astrophysics Data System (ADS)
Yue, Qing-Yang; Yang, Yang; Cheng, Zhen-Jia; Guo, Cheng-Shan
2018-06-01
In this work, the light extraction efficiency enhancement of GaN-based thin-film flip-chip (TFFC) light-emitting diodes (LEDs) with high-refractive-index (TiO2) buckling nanostructures was studied using the three-dimensional finite difference time domain method. Compared with 2-D photonic crystals, the buckling structures have the advantages of a random directionality and a broad distribution in periodicity, which can effectively extract the guided light propagating in all azimuthal directions over a wide spectrum. Numerical studies revealed that the light extraction efficiency of buckling-structured LEDs reaches 1.1 times that of triangular lattice photonic crystals. The effects of the buckling structure feature sizes and the thickness of the N-GaN layer on the light extraction efficiency for TFFC LEDs were also investigated systematically. With optimized structural parameters, a significant light extraction enhancement of about 2.6 times was achieved for TiO2 buckling-structured TFFC LEDs compared with planar LEDs.
Feasibility study of silicon nitride protection of plastic encapsulated semiconductors
NASA Technical Reports Server (NTRS)
Peters, J. W.; Hall, T. C.; Erickson, J. J.; Gebhart, F. L.
1979-01-01
The application of low temperature silicon nitride protective layers on wire bonded integrated circuits mounted on lead frame assemblies is reported. An evaluation of the mechanical and electrical compatibility of both plasma nitride and photochemical silicon nitride (photonitride) passivations (parallel evaluations) of integrated circuits which were then encapsulated in plastic is described. Photonitride passivation is compatible with all wire bonded lead frame assemblies, with or without initial chip passivation. Plasma nitride passivation of lead frame assemblies is possible only if the chip is passivated before lead frame assembly. The survival rate after the environmental test sequence of devices with a coating of plasma nitride on the chip and a coating of either plasma nitride or photonitride over the assembled device is significantly greater than that of devices assembled with no nitride protective coating over either chip or lead frame.
Advanced processing of CdTe pixel radiation detectors
NASA Astrophysics Data System (ADS)
Gädda, A.; Winkler, A.; Ott, J.; Härkönen, J.; Karadzhinova-Ferrer, A.; Koponen, P.; Luukka, P.; Tikkanen, J.; Vähänen, S.
2017-12-01
We report a fabrication process of pixel detectors made of bulk cadmium telluride (CdTe) crystals. Prior to processing, the quality and defect density in CdTe material was characterized by infrared (IR) spectroscopy. The semiconductor detector and Flip-Chip (FC) interconnection processing was carried out in the clean room premises of Micronova Nanofabrication Centre in Espoo, Finland. The chip scale processes consist of the aluminum oxide (Al2O3) low temperature thermal Atomic Layer Deposition (ALD), titanium tungsten (TiW) metal sputtering depositions and an electroless Nickel growth. CdTe crystals with the size of 10×10×0.5 mm3 were patterned with several photo-lithography techniques. In this study, gold (Au) was chosen as the material for the wettable Under Bump Metalization (UBM) pads. Indium (In) based solder bumps were grown on PSI46dig read out chips (ROC) having 4160 pixels within an area of 1 cm2. CdTe sensor and ROC were hybridized using a low temperature flip-chip (FC) interconnection technique. The In-Au cold weld bonding connections were successfully connecting both elements. After the processing the detector packages were wire bonded into associated read out electronics. The pixel detectors were tested at the premises of Finnish Radiation Safety Authority (STUK). During the measurement campaign, the modules were tested by exposure to a 137Cs source of 1.5 TBq for 8 minutes. We detected at the room temperature a photopeak at 662 keV with about 2 % energy resolution.
NASA Astrophysics Data System (ADS)
Kim, Youngsoon; Lee, Seyong; Shin, Ji-won; Paik, Kyung-Wook
2016-06-01
While solder bumps have been used as the bump structure to form the interconnection during the last few decades, the continuing scaling down of devices has led to a change in the bump structure to Cu-pillar/Sn-Ag micro-bumps. Cu-pillar/Sn-Ag micro-bump interconnections differ from conventional solder bump interconnections in terms of their assembly processing and reliability. A thermo-compression bonding method with pre-applied b-stage non-conductive films has been adopted to form solder joints between Cu pillar/Sn-Ag micro bumps and printed circuit board vehicles, using various pad metal finishes. As a result, various interfacial inter-metallic compounds (IMCs) reactions and stress concentrations occur at the Cu pillar/Sn-Ag micro bumps joints. Therefore, it is necessary to investigate the influence of pad metal finishes on the structural reliability of fine pitch Cu pillar/Sn-Ag micro bumps flip chip packaging. In this study, four different pad surface finishes (Thin Ni ENEPIG, OSP, ENEPIG, ENIG) were evaluated in terms of their interconnection reliability by thermal cycle (T/C) test up to 2000 cycles at temperatures ranging from -55°C to 125°C and high-temperature storage test up to 1000 h at 150°C. The contact resistances of the Cu pillar/Sn-Ag micro bump showed significant differences after the T/C reliability test in the following order: thin Ni ENEPIG > OSP > ENEPIG where the thin Ni ENEPIG pad metal finish provided the best Cu pillar/Sn-Ag micro bump interconnection in terms of bump joint reliability. Various IMCs formed between the bump joint areas can account for the main failure mechanism.
Bi-level microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2004-01-06
A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The multilayered package can be formed of a LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded so that the light-sensitive side is optically accessible through the window. The package has at least two levels of circuits for making electrical interconnections to a pair of microelectronic devices. The result is a compact, low-profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device(s).
Single level microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2003-12-09
A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The package can be formed of a multilayered LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during cofiring. The microelectronic device can be flip-chip interconnected so that the light-sensitive side is optically accessible through the window. A glob-top encapsulant or protective cover can be used to protect the microelectronic device and electrical interconnections. The result is a compact, low profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device.
NASA Astrophysics Data System (ADS)
Ma, Chaoyang; Cao, Yongge; Shen, Xiaofei; Wen, Zicheng; Ma, Ran; Long, Jiaqi; Yuan, Xuanyi
2017-07-01
Nowadays, major commercial w-LEDs fabricated by the traditionally gold-wire-welding packaging technology have undergone considerable development as indoor/outdoor lighting sources due to its high-energy utilization efficiency, long service life, environmental friendliness, and excellent chromatic stability. While, new generation applications in projections, automotive lighting, street lighting, plaza lighting, and high-end general lighting need further improvements in power handling and light extraction. Herein, transparent Ce:YAG glass-ceramics (GCs) phosphor was prepared by low-temperature co-sintering polycrystalline Ce:YAG phosphor powder and home-made PbO-B2O3-ZnO-SiO2 glass powder. Thereafter, the flip-chip (FC) w-LEDs were fabricated with the GCs phosphor plates and FC blue chips. The GCs-based FC w-LEDs show not only excellent heat- and humidity-resistance characteristics, but also superior optical performances with an LE of 112.8 lm/W, a CRI of 71.2, a CCT of 6103 K as well as a chromaticity coordinate of (0.3202, 0.3298), under a high operation current of 400 mA. The technology route will open a practically commercial feasible approach to achieve excellent performances for advanced high-power FC w-LEDs.
In the Middle of a Chain Interaction.
Kinsella, Sinéad; Prehn, Jochen H M
2016-10-20
In this issue of Molecular Cell, Fu et al. (2016) present a detailed structural analysis of death-inducing signaling complex (DISC) assembly and regulation through flexible caspase-8 interactions with cFLIP L , cFLIP S , and the viral inhibitor MC159, thereby identifying novel apoptosis control mechanisms. Copyright © 2016 Elsevier Inc. All rights reserved.
NASA Technical Reports Server (NTRS)
Prasad, Narashimha S.; Taylor, Patrick J.; Trivedi, Sudhir B.; Kutcher, Susan
2010-01-01
We report the results of fabrication and testing of a thermoelectric power generation module. The module was fabricated using a new "flip-chip" module assembly technique that is scalable and modular. This technique results in a low value of contact resistivity ( < or = 10(exp 5) Ohms-sq cm). It can be used to leverage new advances in thin-film and nanostructured materials for the fabrication of new miniature thermoelectric devices. It may also enable monolithic integration of large devices or tandem arrays of devices on flexible or curved surfaces. Under mild testing, a power of 22 mW/sq cm was obtained from small (<100 K) temperature differences. At higher, more realistic temperature differences, approx.500 K, where the efficiency of these materials greatly improves, this power density would scale to between 0.5 and 1 Watt/cm2. These results highlight the excellent potential for the generation and scavenging of electrical power of practical and usable magnitude for remote applications using thermoelectric power generation technologies.
Effect of surface finish on the failure mechanisms of flip-chip solder joints under electromigration
NASA Astrophysics Data System (ADS)
Lin, Y. L.; Lai, Y. S.; Tsai, C. M.; Kao, C. R.
2006-12-01
Two substrate surface finishes, Au/Ni and organic solderable preservative (OSP), were used to study the effect of the surface finish on the reliability of flip-chip solder joints under electromigration at 150°C ambient temperature. The solder used was eutectic PbSn, and the applied current density was 5×103 A/cm2 at the contact window of the chip. The under bump metallurgy (UBM) on the chip was sputtered Cu/Ni. It was found that the mean-time-to-failure (MTTF) of the OSP joints was six times better than that of the Au/Ni joints (3080 h vs. 500 h). Microstructure examinations uncovered that the combined effect of current crowding and the accompanying local Joule heating accelerated the local Ni UBM consumption near the point of electron entrance. Once Ni was depleted at a certain region, this region became nonconductive, and the flow of the electrons was diverted to the neighboring region. This neighboring region then became the place where electrons entered the joint, and the local Ni UBM consumption was accelerated. This process repeated itself, and the Ni-depleted region extended further on, creating an ever-larger nonconductive region. The solder joint eventually, failed when the nonconductive region became too large, making the effective current density very high. Accordingly, the key factor determining the MTTF was the Ni consumption rate. The joints with the OSP surface finish had a longer MTTF because Cu released from the substrate was able to reduce the Ni consumption rate.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Aoki, Kenji
A read/write head for a magnetic tape includes an elongated chip assembly and a tape running surface formed in the longitudinal direction of the chip assembly. A pair of substantially spaced parallel read/write gap lines for supporting read/write elements extend longitudinally along the tape running surface of the chip assembly. Also, at least one groove is formed on the tape running surface on both sides of each of the read/write gap lines and extends substantially parallel to the read/write gap lines.
Two-Step Plasma Process for Cleaning Indium Bonding Bumps
NASA Technical Reports Server (NTRS)
Greer, Harold F.; Vasquez, Richard P.; Jones, Todd J.; Hoenk, Michael E.; Dickie, Matthew R.; Nikzad, Shouleh
2009-01-01
A two-step plasma process has been developed as a means of removing surface oxide layers from indium bumps used in flip-chip hybridization (bump bonding) of integrated circuits. The two-step plasma process makes it possible to remove surface indium oxide, without incurring the adverse effects of the acid etching process.
High-Modulation-Speed LEDs Based on III-Nitride
NASA Astrophysics Data System (ADS)
Chen, Hong
III-nitride InGaN light-emitting diodes (LEDs) enable wide range of applications in solid-state lighting, full-color displays, and high-speed visible-light communication. Conventional InGaN quantum well LEDs grown on polar c-plane substrate suffer from quantum confined Stark effect due to the large internal polarization-related fields, leading to a reduced radiative recombination rate and device efficiency, which limits the performance of InGaN LEDs in high-speed communication applications. To circumvent these negative effects, non-trivial-cavity designs such as flip-chip LEDs, metallic grating coated LEDs are proposed. This oral defense will show the works on the high-modulation-speed LEDs from basic ideas to applications. Fundamental principles such as rate equations for LEDs/laser diodes (LDs), plasmonic effects, Purcell effects will be briefly introduced. For applications, the modal properties of flip-chip LEDs are solved by implementing finite difference method in order to study the modulation response. The emission properties of highly polarized InGaN LEDs coated by metallic gratings are also investigated by finite difference time domain method.
Neighbour-die effect on the measurement of wafer-level flip-chip LED dies in production lines
NASA Astrophysics Data System (ADS)
Chen, Tengfei; Wan, Zirui; Li, Bin
2017-11-01
The light from the side surfaces of the test flip-chip light-emitting diode (FCLED) dies is reflected, refracted or absorbed by neighbour dies during the measurement of wafer-level FCLED dies in production lines. A notable measurement deviation is caused by the neighbour-die effect, which is not considered in current industry practice. In this paper, Monte Carlo ray-tracing simulations are used to study the measurement deviations caused by the neighbour-die effect and extension ratios of the film. The simulation results show that the maximal deviation of radiant flux impinging the photodiode can reach 5.5%, if the die is tested without any neighbour dies, or is surrounded by a set of neighbour dies at an extension ratio of 1.1. Moreover, the dependence between the measurement results and neighbour cases for different extension ratios is also investigated. Then, a modified calibration method is proposed and studied. The proposed technique can be used to improve the calibration and measurement accuracy of the test equipment used for measurement of wafer-level FCLED dies in production lines.
NASA Astrophysics Data System (ADS)
Roma, Maria Penafrancia C.; Kudtarkar, Santosh; Kierse, Oliver; Sengupta, Dipak; Cho, Junghyun
2018-02-01
Copper micropillars plated onto a silicon die and soldered with Sn-Ag solder to a copper lead frame in a flip chip on lead package have been subjected to high-temperature storage at 150°C and 175°C for 500 h, 1000 h, and 1500 h. Cu6Sn5 and Cu3Sn intermetallic compounds were found on both sides of the solder, but the growth rates were not the same as evidenced by different values of the growth exponent n. Cu and Sn diffusion controlled the Cu3Sn growth in the Cu pillar interface ( n ≈ 0.5), while interface reactions controlled the growth in the Cu lead frame interface ( n ≈ 0.8). Increasing the aging temperature increased the growth of Cu3Sn as well as the presence of microvoids in the Cu lead frame side. Adding Ni as a barrier layer on the Cu pillar prevented the growth of Cu3Sn in the Cu pillar interface and reduced its growth rate on the lead frame side, even at higher aging temperatures.
Halonen, Niina; Kilpijärvi, Joni; Sobocinski, Maciej; Datta-Chaudhuri, Timir; Hassinen, Antti; Prakash, Someshekar B; Möller, Peter; Abshire, Pamela; Kellokumpu, Sakari; Lloyd Spetz, Anita
2016-01-01
Cell viability monitoring is an important part of biosafety evaluation for the detection of toxic effects on cells caused by nanomaterials, preferably by label-free, noninvasive, fast, and cost effective methods. These requirements can be met by monitoring cell viability with a capacitance-sensing integrated circuit (IC) microchip. The capacitance provides a measurement of the surface attachment of adherent cells as an indication of their health status. However, the moist, warm, and corrosive biological environment requires reliable packaging of the sensor chip. In this work, a second generation of low temperature co-fired ceramic (LTCC) technology was combined with flip-chip bonding to provide a durable package compatible with cell culture. The LTCC-packaged sensor chip was integrated with a printed circuit board, data acquisition device, and measurement-controlling software. The packaged sensor chip functioned well in the presence of cell medium and cells, with output voltages depending on the medium above the capacitors. Moreover, the manufacturing of microfluidic channels in the LTCC package was demonstrated.
On-chip detection of non-classical light by scalable integration of single-photon detectors
Najafi, Faraz; Mower, Jacob; Harris, Nicholas C.; Bellei, Francesco; Dane, Andrew; Lee, Catherine; Hu, Xiaolong; Kharel, Prashanta; Marsili, Francesco; Assefa, Solomon; Berggren, Karl K.; Englund, Dirk
2015-01-01
Photonic-integrated circuits have emerged as a scalable platform for complex quantum systems. A central goal is to integrate single-photon detectors to reduce optical losses, latency and wiring complexity associated with off-chip detectors. Superconducting nanowire single-photon detectors (SNSPDs) are particularly attractive because of high detection efficiency, sub-50-ps jitter and nanosecond-scale reset time. However, while single detectors have been incorporated into individual waveguides, the system detection efficiency of multiple SNSPDs in one photonic circuit—required for scalable quantum photonic circuits—has been limited to <0.2%. Here we introduce a micrometer-scale flip-chip process that enables scalable integration of SNSPDs on a range of photonic circuits. Ten low-jitter detectors are integrated on one circuit with 100% device yield. With an average system detection efficiency beyond 10%, and estimated on-chip detection efficiency of 14–52% for four detectors operated simultaneously, we demonstrate, to the best of our knowledge, the first on-chip photon correlation measurements of non-classical light. PMID:25575346
Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics
Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.
2013-01-01
A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.
NASA Astrophysics Data System (ADS)
Lee, Taekyeong
Electromigration and solid state aging in flip chip joint, and whisker on lead frame of Pb-containing (eutectic SnPb) and Pb-free solders (SnAg 3.5, SnAg3.8Cu0.7, and SnCu0.7), have been studied systematically, using Scanning Electron Microscopy (SEM), Energy Dispersive X-ray Analysis (EDX), and synchrotron radiation. The high current density in flip chip joint drives the diffusion of atoms of eutectic SnPb and SnAgCu. A marker is used to measure the diffusion flux in a half cross-sectioned solder joint. SnAgCu shows higher resistance against electromigration than eutectic SnPb. In the half cross-sectioned solder joint, void growth is the dominant failure mechanism. However, the whole solder balls in the underfill show that the failure mechanism is a result from the dissolution of electroless Ni under bump metallization (UBM) of about 10 mum thickness. The growth rate between intermetallic compounds in molten and solid solders differed by four orders of magnitude. In liquid solder, the growth rate is about 1 mum/min; the growth rate in solid solder is only about 10 -4 mum/min. The difference is not resulting from factors of thermodynamics, which is the change of Gibbs free energy before and after intermetallic compound formation, but from kinetic factors, which is the rate of change of Gibbs free energy. Even though the difference in growth rate between eutectic SnPb and Pb-free solders during solid state aging was found, the reason behind such difference shown is unclear. The orientation and stress levels of whiskers are measured by white X-ray of synchrotron radiation. The growth direction is nearly parallel to one of the principal axes of tin. The compressive stress level is quite low because the residual stress is relaxed by the whisker growth.
Backside contacted field effect transistor array for extracellular signal recording.
Ingebrandt, S; Yeung, C K; Staab, W; Zetterer, T; Offenhäusser, A
2003-04-01
A new approach to the design of field-effect transistor (FET) sensors and the use of these FETs in detecting extracellular electrophysiological recordings is reported. Backside contacts were engineered by deep reactive ion etching and a gas phase boron doping process of the holes using planar diffusion sources. The metal contacts were designed to fit on top of the bonding pads of a standard industrial 22-pin DIL (dual inline) chip carrier. To minimise contact resistance, the metal backside contacts of the chips were electroless plated with gold. The chips were mounted on top of the bonding pads using a standard flip-chip process and a fineplacer unit previously described. Rat embryonic myocytes were cultured on these new devices (effective growth area 6 x 6 mm(2)) in order to confirm their validity in electrophysiological recording. Copyright 2003 Elsevier Science B.V.
Evaluation of esophageal motility utilizing the functional lumen imaging probe (FLIP)
Carlson, Dustin A.; Kahrilas, Peter J.; Lin, Zhiyue; Hirano, Ikuo; Gonsalves, Nirmala; Listernick, Zoe; Ritter, Katherine; Tye, Michael; Ponds, Fraukje A.; Wong, Ian; Pandolfino, John E.
2016-01-01
Background Esophagogastric junction (EGJ) distensibility and distension-mediated peristalsis can be assessed with the functional lumen imaging probe (FLIP) during a sedated upper endoscopy. We aimed to describe esophageal motility assessment using FLIP topography in patients presenting with dysphagia. Methods 145 patients (ages 18 – 85, 54% female) with dysphagia that completed upper endoscopy with a 16-cm FLIP assembly and high-resolution manometry (HRM) were included. HRM was analyzed according to the Chicago Classification of esophageal motility disorders; major esophageal motility disorders were considered ‘abnormal’. FLIP studies were analyzed using a customized program to calculate the EGJ-distensibility index (DI) and generate FLIP topography plots to identify esophageal contractility patterns. FLIP topography was considered ‘abnormal’ if EGJ-DI was < 2.8 mm2/mmHg or contractility pattern demonstrated absent contractility or repetitive, retrograde contractions. Results HRM was abnormal in 111 (77%) patients: 70 achalasia (19 type I, 39 type II, 12 type III), 38 EGJ outflow obstruction, and three jackhammer esophagus. FLIP topography was abnormal in 106 (95%) of these patients, including all 70 achalasia patients. HRM was ‘normal’ in 34 (23%) patients: five ineffective esophageal motility and 29 normal motility. 17 (50%) had abnormal FLIP topography including 13 (37%) with abnormal EGJ-DI. Conclusions FLIP topography provides a well-tolerated method for esophageal motility assessment (especially to identify achalasia) at the time of upper endoscopy. FLIP topography findings that are discordant with HRM may indicate otherwise undetected abnormalities of esophageal function, thus FLIP provides an alternative and complementary method to HRM for evaluation of non-obstructive dysphagia. PMID:27725650
Nishi, Hidetaka; Tsuchizawa, Tai; Kou, Rai; Shinojima, Hiroyuki; Yamada, Takashi; Kimura, Hideaki; Ishikawa, Yasuhiko; Wada, Kazumi; Yamada, Koji
2012-04-09
On the silicon (Si) photonic platform, we monolithically integrated a silica-based arrayed-waveguide grating (AWG) and germanium (Ge) photodiodes (PDs) using low-temperature fabrication technology. We confirmed demultiplexing by the AWG, optical-electrical signal conversion by Ge PDs, and high-speed signal detection at all channels. In addition, we mounted a multichannel transimpedance amplifier/limiting amplifier (TIA/LA) circuit on the fabricated AWG-PD device using flip-chip bonding technology. The results show the promising potential of our Si photonic platform as a photonics-electronics convergence.
Precision lens assembly with alignment turning system
NASA Astrophysics Data System (ADS)
Ho, Cheng-Fang; Huang, Chien-Yao; Lin, Yi-Hao; Kuo, Hui-Jean; Kuo, Ching-Hsiang; Hsu, Wei-Yao; Chen, Fong-Zhi
2017-10-01
The poker chip assembly with high precision lens barrels is widely applied to ultra-high performance optical system. ITRC applies the poker chip assembly technology to the high numerical aperture objective lenses and lithography projection lenses because of its high efficiency assembly process. In order to achieve high precision lens cell for poker chip assembly, an alignment turning system (ATS) is developed. The ATS includes measurement, alignment and turning modules. The measurement module is equipped with a non-contact displacement sensor (NCDS) and an autocollimator (ACM). The NCDS and ACM are used to measure centration errors of the top and the bottom surface of a lens respectively; then the amount of adjustment of displacement and tilt with respect to the rotational axis of the turning machine for the alignment module can be determined. After measurement, alignment and turning processes on the ATS, the centration error of a lens cell with 200 mm in diameter can be controlled within 10 arcsec. Furthermore, a poker chip assembly lens cell with three sub-cells is demonstrated, each sub-cells are measured and accomplished with alignment and turning processes. The lens assembly test for five times by each three technicians; the average transmission centration error of assembly lens is 12.45 arcsec. The results show that ATS can achieve high assembly efficiency for precision optical systems.
NASA Astrophysics Data System (ADS)
Chekhovich, Evgeny A.
2017-06-01
Dynamics of nuclear spin decoherence and nuclear spin flip-flops in self-assembled InGaAs/GaAs quantum dots are studied experimentally using optically detected nuclear magnetic resonance (NMR). Nuclear spin-echo decay times are found to be in the range 1-4 ms. This is a factor of ~3 longer than in strain-free GaAs/AlGaAs structures and is shown to result from strain-induced quadrupolar effects that suppress nuclear spin flip-flops. The correlation times of the flip-flops are examined using a novel frequency-comb NMR technique and are found to exceed 1 s, a factor of ~1000 longer than in strain-free structures. These findings complement recent studies of electron spin coherence and reveal the paradoxical dual role of the quadrupolar effects in self-assembled quantum dots: large increase of the nuclear spin bath coherence and at the same time significant reduction of the electron spin-qubit coherence. Approaches to increasing electron spin coherence are discussed. In particular the nanohole filled GaAs/AlGaAs quantum dots are an attractive option: while their optical quality matches the self-assembled dots the quadrupolar effects measured in NMR spectra are a factor of 1000 smaller.
Development of chip passivated monolithic complementary MISFET circuits with beam leads
NASA Technical Reports Server (NTRS)
Ragonese, L. J.; Kim, M. J.; Corrie, B. L.; Brouillette, J. W.; Warr, R. E.
1972-01-01
The results are presented of a program to demonstrate the processes for fabricating complementary MISFET beam-leaded circuits, which, potentially, are comparable in quality to available bipolar beam-lead chips that use silicon nitride passivation in conjunction with a platinum-titanium-gold metal system. Materials and techniques, different from the bipolar case, were used in order to be more compatible with the special requirements of fully passivated complementary MISFET devices. Two types of circuits were designed and fabricated, a D-flip-flop and a three-input NOR/NAND gate. Fifty beam-leaded chips of each type were constructed. A quality and reliability assurance program was performed to identify failure mechanisms. Sample tests and inspections (including destructive) were developed to measure the physical characteristics of the circuits.
Evaluation of Esophageal Motility Utilizing the Functional Lumen Imaging Probe.
Carlson, Dustin A; Kahrilas, Peter J; Lin, Zhiyue; Hirano, Ikuo; Gonsalves, Nirmala; Listernick, Zoe; Ritter, Katherine; Tye, Michael; Ponds, Fraukje A; Wong, Ian; Pandolfino, John E
2016-12-01
Esophagogastric junction (EGJ) distensibility and distension-mediated peristalsis can be assessed with the functional lumen imaging probe (FLIP) during a sedated upper endoscopy. We aimed to describe esophageal motility assessment using FLIP topography in patients presenting with dysphagia. In all, 145 patients (aged 18-85 years, 54% female) with dysphagia that completed upper endoscopy with a 16-cm FLIP assembly and high-resolution manometry (HRM) were included. HRM was analyzed according to the Chicago Classification of esophageal motility disorders; major esophageal motility disorders were considered "abnormal". FLIP studies were analyzed using a customized program to calculate the EGJ-distensibility index (DI) and generate FLIP topography plots to identify esophageal contractility patterns. FLIP topography was considered "abnormal" if EGJ-DI was <2.8 mm 2 /mm Hg or contractility pattern demonstrated absent contractility or repetitive, retrograde contractions. HRM was abnormal in 111 (77%) patients: 70 achalasia (19 type I, 39 type II, and 12 type III), 38 EGJ outflow obstruction, and three jackhammer esophagus. FLIP topography was abnormal in 106 (95%) of these patients, including all 70 achalasia patients. HRM was "normal" in 34 (23%) patients: five ineffective esophageal motility and 29 normal motility. In all, 17 (50%) had abnormal FLIP topography including 13 (37%) with abnormal EGJ-DI. FLIP topography provides a well-tolerated method for esophageal motility assessment (especially to identify achalasia) at the time of upper endoscopy. FLIP topography findings that are discordant with HRM may indicate otherwise undetected abnormalities of esophageal function, thus FLIP provides an alternative and complementary method to HRM for evaluation of non-obstructive dysphagia.
NASA Astrophysics Data System (ADS)
Wang, Wei-Shan; Wiemer, Maik; Froemel, Joerg; Enderlein, Tom; Gessner, Thomas; Lullin, Justine; Bargiel, Sylwester; Passilly, Nicolas; Albero, Jorge; Gorecki, Christophe
2016-04-01
In this work, vertical integration of miniaturized array-type Mirau interferometers at wafer level by using multi-stack anodic bonding is presented. Mirau interferometer is suitable for MEMS metrology and for medical imaging according to its vertical-, lateral- resolutions and working distances. Miniaturized Mirau interferometer can be a promising candidate as a key component of an optical coherence tomography (OCT) system. The miniaturized array-type interferometer consists of a microlens doublet, a Si-based MEMS Z scanner, a spacer for focus-adjustment and a beam splitter. Therefore, bonding technologies which are suitable for heterogeneous substrates are of high interest and necessary for the integration of MEMS/MOEMS devices. Multi-stack anodic bonding, which meets the optical and mechanical requirements of the MOEMS device, is adopted to integrate the array-type interferometers. First, the spacer and the beam splitter are bonded, followed by bonding of the MEMS Z scanner. In the meanwhile, two microlenses, which are composed of Si and glass wafers, are anodically bonded to form a microlens doublet. Then, the microlens doublet is aligned and bonded with the scanner/spacer/beam splitter stack. The bonded array-type interferometer is a 7- wafer stack and the thickness is approximately 5mm. To separate such a thick wafer stack with various substrates, 2-step laser cutting is used to dice the bonded stack into Mirau chips. To simplify fabrication process of each component, electrical connections are created at the last step by mounting a Mirau chip onto a flip chip PCB instead of through wafer vias. Stability of Au/Ti films on the MEMS Z scanner after anodic bonding, laser cutting and flip chip bonding are discussed as well.
Upset due to a single particle caused propagated transients in a bulk CMOS microprocessor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Leavy, J.F.; Hoffmann, L.F.; Shoran, R.W.
1991-12-01
This paper reports on data pattern advances observed in preset, single event upset (SEU) hardened clocked flip-flops, during static Cf-252 exposures on a bulk CMOS microprocessor, that were attributable to particle caused anomalous clock signals, or propagated transients. SPICE simulations established that particle strikes in the output nodes of a clock control logic flip-flop could produce transients of sufficient amplitude and duration to be accepted as legitimate pulses by clock buffers fed by the flip-flop's output nodes. The buffers would then output false clock pulses, thereby advancing the state of the present flip-flops. Masking the clock logic on one ofmore » the test chips made the flip-flop data advance cease, confirming the clock logic as the source of the SEU. By introducing N{sub 2} gas, at reduced pressures, into the SEU test chamber to attenuate Cf-252 particle LET's, a 24-26 MeV-cm{sup 2}/mg LET threshold was deduced. Subsequent tests, at the 88-inch cyclotron at Berkeley, established an LET threshold of 30 MeV-cm{sup 2}/mg (283 MeV Cu at 0{degrees}) for the generation of false clocks. Cyclotron SEU tests are considered definitive, while Cf-252 data usually is not. However, in this instance Cf-252 tests proved analytically useful, providing SEU characterization data that was both timely and inexpensive.« less
Chen, Jiann-Jong; Kung, Che-Min
2010-09-01
The communication speed between components is far from satisfactory. To achieve high speed, simple control system configuration, and low cost, a new on-chip all-digital three-phase dc/ac power inverter using feedforward and frequency control techniques is proposed. The controller of the proposed power inverter, called the shift register, consists of six-stage D-latch flip-flops with a goal of achieving low-power consumption and area efficiency. Variable frequency is achieved by controlling the clocks of the shift register. One advantage regarding the data signal (D) and the common clock (CK) is that, regardless of the phase difference between the two, all of the D-latch flip-flops are capable of delaying data by one CK period. To ensure stability, the frequency of CK must be six times higher than that of D. The operation frequency of the proposed power inverter ranges from 10 Hz to 2 MHz, and the maximum output loading current is 0.8 A. The prototype of the proposed circuit has been fabricated with TSMC 0.35 μm 2P4M CMOS processes. The total chip area is 2.333 x 1.698 mm2. The three-phase dc/ac power inverter is applicable in uninterrupted power supplies, cold cathode fluorescent lamps, and motors, because of its ability to convert the dc supply voltage into the three-phase ac power sources.
Hydro-Thermal Fatigue Resistance Measurements on Polymer Interfaces
NASA Astrophysics Data System (ADS)
Gurumurthy, Charan K.; Kramer, Edward J.; Hui, Chung-Yuen
1998-03-01
We have developed a new technique based on a fiber optic displacement sensor for rapid determination of hydro-thermal fatigue crack growth rate per cycle (da/dN) of an epoxy/polyimide interface used in flip chip attach microelectronic assembly. The sample is prepared as a trilayered cantilever beam by capillary flow of the epoxy underfill over a polyimide coated metallic beam. During hydro-thermal cycling the crack growth along the interface (from the free end) changes the displacement of this end of the beam and we measure the free end displacement at the lowest temperature in each hydro-thermal cycle. The change in beam displacement is then converted into crack growth rate (da/dN). da/dN depends on the maximum change in the strain energy release rate of the crack and the phase angle in each cycle. The relation between da/dN and maximum strain energy release rate characterizes the fatigue crack growth resistance of the interface. We have developed and used a simple model anhydride cured and a commercially available PMDA/ODA passivation for this study.
Thermoelectric Coolers with Sintered Silver Interconnects
NASA Astrophysics Data System (ADS)
Kähler, Julian; Stranz, Andrej; Waag, Andreas; Peiner, Erwin
2014-06-01
The fabrication and performance of a sintered Peltier cooler (SPC) based on bismuth telluride with sintered silver interconnects are described. Miniature SPC modules with a footprint of 20 mm2 were assembled using pick-and-place pressure-assisted silver sintering at low pressure (5.5 N/mm2) and moderate temperature (250°C to 270°C). A modified flip-chip bonder combined with screen/stencil printing for paste transfer was used for the pick-and-place process, enabling high positioning accuracy, easy handling of the tiny bismuth telluride pellets, and immediate visual process control. A specific contact resistance of (1.4 ± 0.1) × 10-5 Ω cm2 was found, which is in the range of values reported for high-temperature solder interconnects of bismuth telluride pellets. The realized SPCs were evaluated from room temperature to 300°C, considerably outperforming the operating temperature range of standard commercial Peltier coolers. Temperature cycling capability was investigated from 100°C to 235°C over more than 200 h, i.e., 850 cycles, during which no degradation of module resistance or cooling performance occurred.
Organic electronics based pressure sensor towards intracranial pressure monitoring
NASA Astrophysics Data System (ADS)
Rai, Pratyush; Varadan, Vijay K.
2010-04-01
The intra-cranial space, which houses the brain, contains cerebrospinal fluid (CSF) that acts as a fluid suspension medium for the brain. The CSF is always in circulation, is secreted in the cranium and is drained out through ducts called epidural veins. The venous drainage system has inherent resistance to the flow. Pressure is developed inside the cranium, which is similar to a rigid compartment. Normally a pressure of 5-15 mm Hg, in excess of atmospheric pressure, is observed at different locations inside the cranium. Increase in Intra-Cranial Pressure (ICP) can be caused by change in CSF volume caused by cerebral tumors, meningitis, by edema of a head injury or diseases related to cerebral atrophy. Hence, efficient ways of monitoring ICP need to be developed. A sensor system and monitoring scheme has been discussed here. The system architecture consists of a membrane less piezoelectric pressure sensitive element, organic thin film transistor (OTFT) based signal transduction, and signal telemetry. The components were fabricated on flexible substrate and have been assembled using flip-chip packaging technology. Material science and fabrication processes, subjective to the device performance, have been discussed. Capability of the device in detecting pressure variation, within the ICP pressure range, is investigated and applicability of measurement scheme to medical conditions has been argued for. Also, applications of such a sensor-OTFT assembly for logic sensor switching and patient specific-secure monitoring system have been discussed.
NASA Astrophysics Data System (ADS)
Liu, Mengling; Zhou, Shengjun; Liu, Xingtong; Gao, Yilin; Ding, Xinghuo
2018-03-01
Experimental and simulation studies of high-power AlGaN-based 353 nm ultraviolet (UV) flip-chip (FC) and top-emitting (TE) light-emitting diodes (LEDs) are performed here. To improve the optical and electrical properties of ultraviolet LEDs, we fabricate high-power FC-UV LEDs with Ta2O5/SiO2 distributed Bragg reflectors (DBRs) and a strip-shaped SiO2 current blocking layer (CBL). The reflectance of fourteen pairs of Ta2O5/SiO2 DBRs is 96.4% at 353 nm. The strip-shaped SiO2 CBL underneath the strip-shaped p-electrode can prevent the current concentrating in regions immediately adjacent to the p-electrode where the overlying opaque p-electrode metal layer absorbs the emitted UV light. Moreover, two-level metallization electrodes are used to improve current spreading. Our numerical results show that FC-UV LED has a more favorable current spreading uniformity than TE-UV LED. The light output power of 353 nm FC-UV LED was 23.22 mW at 350 mA, which is 24.7% higher than that of TE-UV LED.
Semiconductor laser joint study program with Rome Laboratory
NASA Astrophysics Data System (ADS)
Schaff, William J.; Okeefe, Sean S.; Eastman, Lester F.
1994-09-01
A program to jointly study vertical-cavity surface emitting lasers (VCSEL) for high speed vertical optical interconnects (VOI) has been conducted under an ES&E between Rome Laboratory and Cornell University. Lasers were designed, grown, and fabricated at Cornell University. A VCSEL measurement laboratory has been designed, built, and utilized at Rome Laboratory. High quality VCSEL material was grown and characterized by fabricating conventional lateral cavity lasers that emitted at the design wavelength of 1.04 microns. The VCSEL's emit at 1.06 microns. Threshold currents of 16 mA at 4.8 volts were obtained for 30 microns diameter devices. Output powers of 5 mW were measured. This is 500 times higher power than from the light emitting diodes employed previously for vertical optical interconnects. A new form of compositional grading using a cosinusoidal function has been developed and is very successful for reducing diode series resistance for high speed interconnection applications. A flip-chip diamond package compatible with high speed operation of 16 VCSEL elements has been designed and characterized. A flip-chip device binding effort at Rome Laboratory was also designed and initiated. This report presents details of the one-year effort, including process recipes and results.
Nucleation rates of Sn in undercooled Sn-Ag-Cu flip-chip solder joints
NASA Astrophysics Data System (ADS)
Arfaei, B.; Benedict, M.; Cotts, E. J.
2013-11-01
The nucleation of Sn from the melt in commercial SnAgCu flip chip solder joints was monitored at a number of different temperatures. Nucleation rates were estimated from measurements of nucleation times for 440 solder balls after one reflow and were found to be well epitomized by the expression I = 2 × 109 exp[(-1.6 × 105)/(T × (ΔT)2)] m-3 s-1, as per classical nucleation theory. After an additional reflow, the nucleation rates of the same 440 samples were observed to increase to I = 2 × 109 exp[(-8.9 × 104)/(T × (ΔT)2)] m-3 s-1. Thus it was shown that the expressions of classical nucleation theory well characterize nucleation kinetics for this system. These changes in nucleation kinetics were correlated with continued dissolution of Al and Ni in to the SnAgCu melt. Such increases in nucleation rates meant increases in the average solidification temperatures of the solder balls after reflow. Variations in the Sn grain morphology of the solder joints were correlated with these changes in solidification temperature, with larger Sn grains (beach ball Sn grain morphology) observed at higher solidification temperatures.
Effect of thermal cycling ramp rate on CSP assembly reliability
NASA Technical Reports Server (NTRS)
Ghaffarian, R.
2001-01-01
A JPL-led chip scale package consortium of enterprises recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages for a variety of projects. The experience of the consortium in building more than 150 test vehicle assemblies, single and double sided multilayer PWBs, and the environmental test results has now been published as a chip scale package guidelines document.
Chung, Su Eun; Lee, Seung Ah; Kim, Jiyun; Kwon, Sunghoon
2009-10-07
We demonstrate optofluidic encapsulation of silicon microchips using image processing based optofluidic maskless lithography and manipulation using railed microfluidics. Optofluidic maskless lithography is a dynamic photopolymerization technique of free-floating microstructures within a fluidic channel using spatial light modulator. Using optofluidic maskless lithography via computer-vision aided image processing, polymer encapsulants are fabricated for chip protection and guiding-fins for efficient chip conveying within a fluidic channel. Encapsulated silicon chips with guiding-fins are assembled using railed microfluidics, which is an efficient guiding and heterogeneous self-assembly system of microcomponents. With our technology, externally fabricated silicon microchips are encapsulated, fluidically guided and self-assembled potentially enabling low cost fluidic manipulation and assembly of integrated circuits.
Evaluation of advanced microelectronic fluxless solder-bump contacts for hybrid microcircuits
NASA Technical Reports Server (NTRS)
Mandal, R. P.
1976-01-01
Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.
Chip-scale thermal management of high-brightness LED packages
NASA Astrophysics Data System (ADS)
Arik, Mehmet; Weaver, Stanton
2004-10-01
The efficiency and reliability of the solid-state lighting devices strongly depend on successful thermal management. Light emitting diodes, LEDs, are a strong candidate for the next generation, general illumination applications. LEDs are making great strides in terms of lumen performance and reliability, however the barrier to widespread use in general illumination still remains the cost or $/Lumen. LED packaging designers are pushing the LED performance to its limits. This is resulting in increased drive currents, and thus the need for lower thermal resistance packaging designs. As the power density continues to rise, the integrity of the package electrical and thermal interconnect becomes extremely important. Experimental results with high brightness LED packages show that chip attachment defects can cause significant thermal gradients across the LED chips leading to premature failures. A numerical study was also carried out with parametric models to understand the chip active layer temperature profile variation due to the bump defects. Finite element techniques were utilized to evaluate the effects of localized hot spots at the chip active layer. The importance of "zero defects" in one of the more popular interconnect schemes; the "epi down" soldered flip chip configuration is investigated and demonstrated.
A proposed holistic approach to on-chip, off-chip, test, and package interconnections
NASA Astrophysics Data System (ADS)
Bartelink, Dirk J.
1998-11-01
The term interconnection has traditionally implied a `robust' connection from a transistor or a group of transistors in an IC to the outside world, usually a PC board. Optimum system utilization is done from outside the IC. As an alternative, this paper addresses `unimpeded' transistor-to-transistor interconnection aimed at reaching the high circuit densities and computational capabilities of neighboring IC's. In this view, interconnections are not made to some human-centric place outside the IC world requiring robustness—except for system input and output connections. This unimpeded interconnect style is currently available only through intra-chip signal traces in `system-on-a-chip' implementations, as exemplified by embedded DRAMs. Because the traditional off-chip penalty in performance and wiring density is so large, a merging of complex process technologies is the only option today. It is suggested that, for system integration to move forward, the traditional robustness requirement inherited from conventional packaging interconnect and IC manufacturing test must be discarded. Traditional system assembly from vendor parts requires robustness under shipping, inspection and assembly. The trend toward systems on a chip signifies willingness by semiconductor companies to design and fabricate whole systems in house, so that `in-house' chip-to-chip assembly is not beyond reach. In this scenario, bare chips never leave the controlled environment of the IC fabricator while the two major contributors to off-chip signal penalty, ESD protection and the need to source a 50-ohm test head, are avoided. With in-house assembly, ESD protection can be eliminated with the precautions already familiar in plasma etching. Test interconnection impacts the fundamentals of IC manufacturing, particularly with clock speeds approaching 1GHz, and cannot be an afterthought. It should be an integral part of the chip-to-chip interconnection bandwidth optimization, because—as we must recognize—test is also performed using IC's. A system interconnection is proposed using multiple chips fabricated with conventional silicon processes, including MEMS technology. The system resembles an MCM that can be joined without committing to final assembly to perform at-speed testing. 50-Ohm test probes never load the circuit; only intended neighboring chips are ever connected. A `back-plane' chip provides the connection layers for both inter- and intra-chip signals and also serves as the probe card, in analogy with membrane probes now used for single-chip testing. Intra-chip connections, which require complicated connections during test that exactly match the product, are then properly made and all waveforms and loading conditions under test will be identical to those of the product. The major benefit is that all front-end chip technologies can be merged—logic, memory, RF, even passives. ESD protection is required only on external system connections. Manufacturing test information will accurately characterize process faults and thus avoid the Known-Good-Die problem that has slowed the arrival of conventional MCM's.
Toughening Mechanisms in Silica-Filled Epoxy Nanocomposites
NASA Astrophysics Data System (ADS)
Patel, Binay S.
Epoxies are widely used as underfill resins throughout the microelectronics industry to mechanically couple and protect various components of flip-chip assemblies. Generally rigid materials largely surround underfill resins. Improving the mechanical and thermal properties of epoxy resins to better match those of their rigid counterparts can help extend the service lifetime of flip-chip assemblies. Recently, researchers have demonstrated that silica nanoparticles are effective toughening agents for lightly-crosslinked epoxies. Improvements in the fracture toughness of silica-filled epoxy nanocomposites have primarily been attributed to two toughening mechanisms: particle debonding with subsequent void growth and matrix shear banding. Various attempts have been made to model the contribution of these toughening mechanisms to the overall fracture energy observed in silica-filled epoxy nanocomposites. However, disparities still exist between experimental and modeled fracture energy results. In this dissertation, the thermal, rheological and mechanical behavior of eight different types of silica-filled epoxy nanocomposites was investigated. Each nanocomposite consisted of up to 10 vol% of silica nanoparticles with particle sizes ranging from 20 nm to 200 nm, with a variety of surface treatments and particle structures. Fractographical analysis was conducted with new experimental approaches in order to accurately identify morphological evidence for each proposed toughening mechanism. Overall, three major insights into the fracture behavior of real world silica-filled epoxy nanocomposites were established. First, microcracking was observed as an essential toughening mechanism in silica-filled epoxy nanocomposites. Microcracking was observed on the surface and subsurface of fractured samples in each type of silica-filled epoxy nanocomposite. The additional toughening contribution of microcracking to overall fracture energy yielded excellent agreement between experimental and modeled fracture energy results. Furthermore, the contribution of microcracking was most prevalent at lower filler contents which suggests that the presence of microcracking may account for the previously unexplained improvements in fracture behavior attained in silica-filled epoxy nanocomposites at low filler contents. Secondly, surface modification through the application of three different propriety surface treatments ("A", "B" and "C") was found to greatly influence the processibility and fracture behavior of silica-filled epoxy nanocomposites. B-treated silica nanoparticles were found to readily form micron-scale agglomerates, settled during nanocomposite curing and showed no improvement in fracture toughness with increasing filler content. In contrast, the nanocomposites consisting of A-treated and C-treated silica nanoparticles yielded morphologies primarily containing well-dispersed nanoparticles. Therefore, fracture toughness improved with increasing filler content. Finally, particle porosity was found to have no significant effect on fracture behavior for the range of silica-filled epoxy nanocomposites investigated. Lower density porous silica nanoparticles were just as effective toughening agents as higher density non-porous silica nanoparticles. Consequently, the potential exists for the use of toughened-epoxies in lightweight structural applications.
Printable Functional Chips Based on Nanoparticle Assembly.
Huang, Yu; Li, Wenbo; Qin, Meng; Zhou, Haihua; Zhang, Xingye; Li, Fengyu; Song, Yanlin
2017-01-01
With facile manufacturability and modifiability, impressive nanoparticles (NPs) assembly applications were performed for functional patterned devices, which have attracted booming research attention due to their increasing applications in high-performance optical/electrical devices for sensing, electronics, displays, and catalysis. By virtue of easy and direct fabrication to desired patterns, high throughput, and low cost, NPs assembly printing is one of the most promising candidates for the manufacturing of functional micro-chips. In this review, an overview of the fabrications and applications of NPs patterned assembly by printing methods, including inkjet printing, lithography, imprinting, and extended printing techniques is presented. The assembly processes and mechanisms on various substrates with distinct wettabilities are deeply discussed and summarized. Via manipulating the droplet three phase contact line (TCL) pinning or slipping, the NPs contracted in ink are controllably assembled following the TCL, and generate novel functional chips and correlative integrate devices. Finally, the perspective of future developments and challenges is presented and widely exhibited. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Liu, Zong-Yuan; Liu, Sheng; Wang, Kai; Luo, Xiao-Bing
2010-06-01
We show that research presented in Opt. Lett.34, 301 (2009)OPLEDP0146-959210.1364/OL.34.000301 applied questionable phosphor definitions and a questionable simulation procedure for light-emitting diodes. Our simulation indicates that a one-dimensional photonic crystal is beneficial for color control but cannot improve the light extraction as asserted in that Letter.
Adaptive Optoelectronic Eyes: Hybrid Sensor/Processor Architectures
2006-11-13
corresponding calculated data. The width of the mirror stopband is proportional to the refractive index difference between the high and low index materials ...Silicon VLSI Neuron Unit Arrays 56 Development of a Single-Sided Flip-Chip Bonding Process 65 Development of High Refractive Index Diffractive Optical ...Elements (DOEs) 68 Development of High-Performance Antireflection Coatings for High Refractive Index DOEs 69 Design and Fabrication of Low Threshold
Fabrication and characterization of SPR chips with the modified bovine serum albumin
NASA Astrophysics Data System (ADS)
Chen, Xing; Zhang, Lu-lu; Cui, Da-fu
2016-03-01
A facile surface plasmon resonance (SPR) chip is developed for small molecule determination and analysis. The SPR chip was prepared based on a self assembling principle, in which the modified bovine serum albumin (BSA) was directly self-assembled onto the bare gold surface. The surface morphology of the chip with the modified BSA was investigated by atomic force microscopy (AFM) and its optical properties were characterized. The surface binding capacity of the bare facile SPR chip with a uniform morphology is 8 times of that of the bare control SPR chip. Based on the experiments of immune reaction between cortisol antibody and cortisol derivative, the sensitivity of the facile SPR chip with the modified BSA is much higher than that of the control SPR chip with the un-modified BSA. The facile SPR chip has been successfully used to detect small molecules. The lowest detection limit is 5 ng/mL with a linear range of 5—100 ng/mL for cortisol analysis. The novel facile SPR chip can also be applied to detect other small molecules.
A non-volatile flip-flop based on diode-selected PCM for ultra-low power systems
NASA Astrophysics Data System (ADS)
Ye, Yong; Du, Yuan; Gao, Dan; Kang, Yong; Song, Zhitang; Chen, Bomy
2016-10-01
As the process technology is continuously shrinking, low power consumption is a major issue in VLSI Systems-on-Chip (SoCs), especially for standby-power-critical applications. Recently, the emerging CMOS-compatible non-volatile memories (NVMs), such as Phase Change Memory (PCM), have been used as on-chip storage elements, which can obtain non-volatile processing, nearly-zero standby power and instant-on capability. PCM has been considered as the best candidate for the next generation of NVMs for its low cost, high density and high resistance transformation ratio. In this paper, for the first time, we present a diode-selected PCM based non-volatile flip-flop (NVFF) which is optimized for better power consumption and process variation tolerance. With dual trench isolation process, the diode-selected PCM realizes ultra small area, which is very suitable for multi-context configuration and large scale flip-flops matrix. Since the MOS-selected PCM is hard to shrink further due to large amount of PCM write current, the proposed NVFF achieves higher power efficiency without loss of current driving capability. Using the 40nm manufacturing process, the area of the cell (1D1R) is as small as 0.016 μm2. Simulation results show that the energy consumption during the recall operation is 62 fJ with 1.1 standard supply voltage, which is reduced by 54.9% compared to the previous 2T2R based NVFF. When the supply voltage reduces to 0.7 V, the recall energy is as low as 17 fJ. With the great advantages in cell size and energy, the proposed diode-selected NVFF is very applicable and cost-effective for ULP systems.
Ultra-compact 32 × 32 strictly-non-blocking Si-wire optical switch with fan-out LGA interposer.
Tanizawa, Ken; Suzuki, Keijiro; Toyama, Munehiro; Ohtsuka, Minoru; Yokoyama, Nobuyuki; Matsumaro, Kazuyuki; Seki, Miyoshi; Koshino, Keiji; Sugaya, Toshio; Suda, Satoshi; Cong, Guangwei; Kimura, Toshio; Ikeda, Kazuhiro; Namiki, Shu; Kawashima, Hitoshi
2015-06-29
We demonstrate a 32 × 32 path-independent-insertion-loss optical path switch that integrates 1024 thermooptic Mach-Zehnder switches and 961 intersections on a small, 11 × 25 mm2 die. The switch is fabricated on a 300-mm-diameter silicon-on-insulator wafer by a complementary metal-oxide semiconductor-compatible process with advanced ArF immersion lithography. For reliable electrical packaging, the switch chip is flip-chip bonded to a ceramic interposer that arranges the electrodes in a 0.5-mm pitch land grid array. The on-chip loss is measured to be 15.8 ± 1.0 dB, and successful switching is demonstrated for digital-coherent 43-Gb/s QPSK signals. The total crosstalk of the switch is estimated to be less than -20 dB at the center wavelength of 1545 nm. The bandwidth narrowing caused by dimensional errors that arise during fabrication is discussed.
Phosphor-Free InGaN White Light Emitting Diodes Using Flip-Chip Technology
Li, Ying-Chang; Chang, Liann-Be; Chen, Hou-Jen; Yen, Chia-Yi; Pan, Ke-Wei; Huang, Bohr-Ran; Kuo, Wen-Yu; Chow, Lee; Zhou, Dan; Popko, Ewa
2017-01-01
Monolithic phosphor-free two-color gallium nitride (GaN)-based white light emitting diodes (LED) have the potential to replace current phosphor-based GaN white LEDs due to their low cost and long life cycle. Unfortunately, the growth of high indium content indium gallium nitride (InGaN)/GaN quantum dot and reported LED’s color rendering index (CRI) are still problematic. Here, we use flip-chip technology to fabricate an upside down monolithic two-color phosphor-free LED with four grown layers of high indium quantum dots on top of the three grown layers of lower indium quantum wells separated by a GaN tunneling barrier layer. The photoluminescence (PL) and electroluminescence (EL) spectra of this white LED reveal a broad spectrum ranging from 475 to 675 nm which is close to an ideal white-light source. The corresponding color temperature and color rendering index (CRI) of the fabricated white LED, operated at 350, 500, and 750 mA, are comparable to that of the conventional phosphor-based LEDs. Insights of the epitaxial structure and the transport mechanism were revealed through the TEM and temperature dependent PL and EL measurements. Our results show true potential in the Epi-ready GaN white LEDs for future solid state lighting applications. PMID:28772792
Zhao, Peng; Zhao, Hongping
2012-09-10
The enhancement of light extraction efficiency for thin-film flip-chip (TFFC) InGaN quantum wells (QWs) light-emitting diodes (LEDs) with GaN micro-domes on n-GaN layer was studied. The light extraction efficiency of TFFC InGaN QWs LEDs with GaN micro-domes were calculated and compared to that of the conventional TFFC InGaN QWs LEDs with flat surface. The three dimensional finite difference time domain (3D-FDTD) method was used to calculate the light extraction efficiency for the InGaN QWs LEDs emitting at 460nm and 550 nm, respectively. The effects of the GaN micro-dome feature size and the p-GaN layer thickness on the light extraction efficiency were studied systematically. Studies indicate that the p-GaN layer thickness is critical for optimizing the TFFC LED light extraction efficiency. Significant enhancement of the light extraction efficiency (2.5-2.7 times for λ(peak) = 460nm and 2.7-2.8 times for λ(peak) = 550nm) is achievable from TFFC InGaN QWs LEDs with optimized GaN micro-dome diameter and height.
Thermal Design and Characterization of Heterogeneously Integrated InGaP/GaAs HBTs
Choi, Sukwon; Peake, Gregory M.; Keeler, Gordon A.; ...
2016-04-21
Flip-chip heterogeneously integrated n-p-n InGaP/GaAs heterojunction bipolar transistors (HBTs) with integrated thermal management on wide-bandgap AlN substrates followed by GaAs substrate removal are demonstrated. Without thermal management, substrate removal after integration significantly aggravates self-heating effects, causing poor I–V characteristics due to excessive device self-heating. An electrothermal codesign scheme is demonstrated that involves simulation (design), thermal characterization, fabrication, and evaluation. Thermoreflectance thermal imaging, electrical-temperature sensitive parameter-based thermometry, and infrared thermography were utilized to assess the junction temperature rise in HBTs under diverse configurations. In order to reduce the thermal resistance of integrated devices, passive cooling schemes assisted by structural modification, i.e.,more » positioning indium bump heat sinks between the devices and the carrier, were employed. By implementing thermal heat sinks in close proximity to the active region of flip-chip integrated HBTs, the junction-to-baseplate thermal resistance was reduced over a factor of two, as revealed by junction temperature measurements and improvement of electrical performance. In conclusion, the suggested heterogeneous integration method accounts for not only electrical but also thermal requirements providing insight into realization of advanced and robust III–V/Si heterogeneously integrated electronics.« less
Microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2002-01-01
An apparatus for packaging of microelectronic devices, including an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can include a cofired ceramic frame or body. The package can have an internal stepped structure made of one or more plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination.
Three-dimensional fit-to-flow microfluidic assembly.
Chen, Arnold; Pan, Tingrui
2011-12-01
Three-dimensional microfluidics holds great promise for large-scale integration of versatile, digitalized, and multitasking fluidic manipulations for biological and clinical applications. Successful translation of microfluidic toolsets to these purposes faces persistent technical challenges, such as reliable system-level packaging, device assembly and alignment, and world-to-chip interface. In this paper, we extended our previously established fit-to-flow (F2F) world-to-chip interconnection scheme to a complete system-level assembly strategy that addresses the three-dimensional microfluidic integration on demand. The modular F2F assembly consists of an interfacial chip, pluggable alignment modules, and multiple monolithic layers of microfluidic channels, through which convoluted three-dimensional microfluidic networks can be easily assembled and readily sealed with the capability of reconfigurable fluid flow. The monolithic laser-micromachining process simplifies and standardizes the fabrication of single-layer pluggable polymeric modules, which can be mass-produced as the renowned Lego(®) building blocks. In addition, interlocking features are implemented between the plug-and-play microfluidic chips and the complementary alignment modules through the F2F assembly, resulting in facile and secure alignment with average misalignment of 45 μm. Importantly, the 3D multilayer microfluidic assembly has a comparable sealing performance as the conventional single-layer devices, providing an average leakage pressure of 38.47 kPa. The modular reconfigurability of the system-level reversible packaging concept has been demonstrated by re-routing microfluidic flows through interchangeable modular microchannel layers.
White light emitting diode based on InGaN chip with core/shell quantum dots
NASA Astrophysics Data System (ADS)
Shen, Changyu; Hong, Yan; Ma, Jiandong; Ming, Jiangzhou
2009-08-01
Quantum dots have many applications in optoelectronic device such as LEDs for its many superior properties resulting from the three-dimensional confinement effect of its carrier. In this paper, single chip white light-emitting diodes (WLEDs) were fabricated by combining blue InGaN chip with luminescent colloidal quantum dots (QDs). Two kinds of QDs of core/shell CdSe /ZnS and core/shell/shell CdSe /ZnS /CdS nanocrystals were synthesized by thermal deposition using cadmium oxide and selenium as precursors in a hot lauric acid and hexadecylamine trioctylphosphine oxide hybrid. This two kinds of QDs exhibited high photoluminescence efficiency with a quantum yield more than 41%, and size-tunable emission wavelengths from 500 to 620 nm. The QDs LED mainly consists of flip luminescent InGaN chip, glass ceramic protective coating, glisten cup, QDs using as the photoluminescence material, pyroceram, gold line, electric layer, dielectric layer, silicon gel and bottom layer for welding. The WLEDs had the CIE coordinates of (0.319, 0.32). The InGaN chip white-light-emitting diodes with quantum dots as the emitting layer are potentially useful in illumination and display applications.
NASA Astrophysics Data System (ADS)
Amalu, E. H.; Lui, Y. T.; Ekere, N. N.; Bhatti, R. S.; Takyi, G.
2011-01-01
The electronics manufacturing industry was quick to adopt and use the Surface Mount Technology (SMT) assembly technique on realization of its huge potentials in achieving smaller, lighter and low cost product implementations. Increasing global customer demand for miniaturized electronic products is a key driver in the design, development and wide application of high-density area array package format. Electronic components and their associated solder joints have reduced in size as the miniaturization trend in packaging continues to be challenged by printing through very small stencil apertures required for fine pitch flip-chip applications. At very narrow aperture sizes, solder paste rheology becomes crucial for consistent paste withdrawal. The deposition of consistent volume of solder from pad-to-pad is fundamental to minimizing surface mount assembly defects. This study investigates the relationship between volume of solder paste deposit (VSPD) and the volume of solder bump formed (VSBF) after reflow, and the effect of reflow profile parameters on lead-free solder bump formation and the associated solder joint integrity. The study uses a fractional factorial design (FFD) of 24-1 Ramp-Soak-Spike reflow profile, with all main effects and two-way interactions estimable to determine the optimal factorial combination. The results from the study show that the percentage change in the VSPD depends on the combination of the process parameters and reliability issues could become critical as the size of solder joints soldered on the same board assembly vary greatly. Mathematical models describe the relationships among VSPD, VSBF and theoretical volume of solder paste. Some factors have main effects across the volumes and a number of interactions exist among them. These results would be useful for R&D personnel in designing and implementing newer applications with finer-pitch interconnect.
NASA Astrophysics Data System (ADS)
Stam, Frank; Kuisma, Heikki; Gao, Feng; Saarilahti, Jaakko; Gomes Martins, David; Kärkkäinen, Anu; Marrinan, Brendan; Pintal, Sebastian
2017-05-01
The deadliest disease in the world is coronary artery disease (CAD), which is related to a narrowing (stenosis) of blood vessels due to fatty deposits, plaque, on the arterial walls. The level of stenosis in the coronary arteries can be assessed by Fractional Flow Reserve (FFR) measurements. This involves determining the ratio between the maximum achievable blood flow in a diseased coronary artery and the theoretical maximum flow in a normal coronary artery. The blood flow is represented by a pressure drop, thus a pressure wire or pressure sensor integrated in a catheter can be used to calculate the ratio between the coronary pressure distal to the stenosis and the normal coronary pressure. A 2 Fr (0.67mm) outer diameter catheter was used, which required a high level of microelectronics miniaturisation to fit a pressure sensing system into the outer wall. The catheter has an eccentric guidewire lumen with a diameter of 0.43mm, which implies that the thickest catheter wall section provides less than 210 microns height for flex assembly integration consisting of two dies, a capacitive MEMS pressure sensor and an ASIC. In order to achieve this a very thin circuit flex was used, and the two chips were thinned down to 75 microns and flip chip mounted face down on the flex. Many challenges were involved in obtaining a flex layout that could wrap into a small tube without getting the dies damaged, while still maintaining enough flexibility for the catheter to navigate the arterial system.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Adams, B.E.
1995-04-01
A cross-functional team of process, product, quality, material, and design lab engineers was assembled to develop an environmentally friendly cleaning process for leadless chip carrier assemblies (LCCAs). Using flush and filter testing, Auger surface analysis, GC-Mass spectrophotometry, production yield results, and electrical testing results over an extended testing period, the team developed an aqueous cleaning process for LCCAs. The aqueous process replaced the Freon vapor degreasing/ultrasonic rinse process.
NASA Technical Reports Server (NTRS)
Barrett, John R. (Inventor)
1986-01-01
A silicon wafer is provided which does not employ individually bonded leads between the IR sensitive elements and the input stages of multiplexers. The wafer is first coated with lead selenide in a first detector array area and is thereafter coated with lead sulfide within a second detector array area. The described steps result in the direct chemical deposition of lead selenide and lead sulfide upon the silicon wafer to eliminate individual wire bonding, bumping, flip chipping, planar interconnecting methods of connecting detector array elements to silicon chip circuitry, e.g., multiplexers, to enable easy fabrication of very long arrays. The electrode structure employed, produces an increase in the electrical field gradient between the electrodes for a given volume of detector material, relative to conventional electrode configurations.
NASA Astrophysics Data System (ADS)
Shih, T. I.; Lin, Y. C.; Duh, J. G.; Hsu, Tom
2006-10-01
Lead-free solder bumps have been widely used in current flip-chip technology (FCT) due to environmental issues. Solder joints after temperature cycling tests were employed to investigate the interfacial reaction between the Ti/Ni/Cu under-bump metallization and Sn-Ag-Cu solders. The interfacial morphology and quantitative analysis of the intermetallic compounds (IMCs) were obtained by electron probe microanalysis (EPMA) and field emission electron probe microanalysis (FE-EPMA). Various types of IMCs such as (Cu1-x,Agx)6Sn5, (Cu1-y,Agy)3Sn, and (Ag1-z,Cuz)3Sn were observed. In addition to conventional I-V measurements by a special sample preparation technique, a scanning electron microscope (SEM) internal probing system was introduced to evaluate the electrical characteristics in the IMCs after various test conditions. The electrical data would be correlated to microstructural evolution due to the interfacial reaction between the solder and under-bump metallurgy (UBM). This study demonstrated the successful employment of an internal nanoprobing approach, which would help further understanding of the electrical behavior within an IMC layer in the solder/UBM assembly.
Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology
NASA Astrophysics Data System (ADS)
Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo
2011-12-01
A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.
The development of alignment turning system for precision len cells
NASA Astrophysics Data System (ADS)
Huang, Chien-Yao; Ho, Cheng-Fang; Wang, Jung-Hsing; Chung, Chien-Kai; Chen, Jun-Cheng; Chang, Keng-Shou; Kuo, Ching-Hsiang; Hsu, Wei-Yao; Chen, Fong-Zhi
2017-08-01
In general, the drop-in and cell-mounted assembly are used for standard and high performance optical system respectively. The optical performance is limited by the residual centration error and position accuracy of the conventional assembly. Recently, the poker chip assembly with high precision lens barrels that can overcome the limitation of conventional assembly is widely applied to ultra-high performance optical system. ITRC also develops the poker chip assembly solution for high numerical aperture objective lenses and lithography projection lenses. In order to achieve high precision lens cell for poker chip assembly, an alignment turning system (ATS) is developed. The ATS includes measurement, alignment and turning modules. The measurement module including a non-contact displacement sensor and an autocollimator can measure centration errors of the top and the bottom surface of a lens respectively. The alignment module comprising tilt and translation stages can align the optical axis of the lens to the rotating axis of the vertical lathe. The key specifications of the ATS are maximum lens diameter, 400mm, and radial and axial runout of the rotary table < 2 μm. The cutting performances of the ATS are surface roughness Ra < 1 μm, flatness < 2 μm, and parallelism < 5 μm. After measurement, alignment and turning processes on our ATS, the centration error of a lens cell with 200mm in diameter can be controlled in 10 arcsec. This paper also presents the thermal expansion of the hydrostatic rotating table. A poker chip assembly lens cell with three sub-cells is accomplished with average transmission centration error in 12.45 arcsec by fresh technicians. The results show that ATS can achieve high assembly efficiency for precision optical systems.
Chen, Yi-Wen; Teng, Ching-Hao; Ho, Yu-Hsuan; Jessica Ho, Tien Yu; Huang, Wen-Chun; Hashimoto, Masayuki; Chiang, I-Yuan; Chen, Chien-Sheng
2014-01-01
Type 1 fimbriae are filamentous structures on Escherichia coli. These structures are important adherence factors. Because binding to the host cells is the first step of infection, type 1 fimbria is an important virulence factor of pathogenic E. coli. Expression of type 1 fimbria is regulated by a phase variation in which each individual bacterium can alternate between fimbriated (phase-ON) and nonfimbriated (phase-OFF) states. The phase variation is regulated by the flipping of the 314-bp fimS fragment, which contains the promoter driving the expression of the genes required for the synthesis of type 1 fimbria. Thus, the bacterial proteins able to interact with fimS are likely to be involved in regulating the expression of type 1 fimbria. To identify novel type 1 fimbria-regulating factors, we used an E. coli K12 proteome chip to screen for the bacterial factors able to interact with a 602-bp DNA fragment containing fimS and its adjacent regions. The Spr protein was identified by the proteome chip-based screening and further confirmed to be able to interact with fimS by electrophoretic mobility shift assay. Deletion of spr in the neonatal meningitis E. coli strain RS218 significantly increased the ratio of the bacterial colonies that contained the type 1 fimbria phase-ON cells on agar plates. In addition, Spr interfered with the interactions of fimS with the site-specific recombinases, FimB and FimE, which are responsible for mediating the flipping of fimS. These results suggest that Spr is involved in the regulation of type 1 fimbria expression through direct interaction with the invertible element fimS. These findings facilitate our understanding of the regulation of type 1 fimbria. PMID:24692643
Fully packed capillary electrochromatographic microchip with self-assembly colloidal silica beads.
Park, Jongman; Lee, Dami; Kim, Won; Horiike, Shigeyoshi; Nishimoto, Takahiro; Lee, Se Hwan; Ahn, Chong H
2007-04-15
A fully packed capillary electrochromatographic (CEC) microchip showing improved solution and chip handling was developed. Microchannels for the CEC microchip were patterned on a cyclic olefin copolymer substrate by injection molding and packed fully with 0.8-microm monodisperse colloidal silica beads utilizing a self-assembly packing technique. The silica packed chip substrate was covered and thermally press-bonded. After fabrication, the chip was filled with buffer solution by self-priming capillary action. The self-assembly packing at each channel served as a built-in nanofilter allowing quick loading of samples and running buffer solution without filtration. Because of a large surface area-to-volume ratio of the silica packing, reproducible control of electroosmotic flow was possible without leveling of the solutions in the reservoirs resulting 1.3% rsd in migration rate. The capillary electrophoretic separation characteristics of the chip were studied using fluorescein isothiocyanate (FITC)-derivatized amino acids as probe molecules. A mixture of FITC and four FITC-derivatized amino acids was successfully separated with 2-mm separation channel length.
Characterisation of capacitively coupled HV/HR-CMOS sensor chips for the CLIC vertex detector
NASA Astrophysics Data System (ADS)
Kremastiotis, I.
2017-12-01
The capacitive coupling between an active sensor and a readout ASIC has been considered in the framework of the CLIC vertex detector study. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a High-Voltage CMOS sensor chip produced in a commercial 180 nm HV-CMOS process for this purpose. The sensor was designed to be connected to the CLICpix2 readout chip. It therefore matches the dimensions of the readout chip, featuring a matrix of 128×128 square pixels with 25μm pitch. The sensor chip has been produced with the standard value for the substrate resistivity (~20 Ωcm) and it has been characterised in standalone testing mode, before receiving and testing capacitively coupled assemblies. The standalone measurement results show a rise time of ~20 ns for a power consumption of 5μW/pixel. Production of the C3PD HV-CMOS sensor chip with higher substrate resistivity wafers (~20, 80, 200 and 1000 Ωcm) is foreseen. The expected benefits of the higher substrate resistivity will be studied using future assemblies with the readout chip.
Dose-dependent X-ray measurements using a 64×64 hybrid GaAs pixel detector with photon counting
NASA Astrophysics Data System (ADS)
Schwarz, C.; Campbell, M.; Goeppert, R.; Ludwig, J.; Mikulec, B.; Rogalla, M.; Runge, K.; Soeldner-Rembold, A.; Smith, K. M.; Snoeys, W.; Watt, J.
2001-03-01
New developments in medical imaging head towards semiconductor detectors flip-chip bonded to CMOS readout chips. In this work, detectors fabricated on SI-GaAs bulk material were bonded to Photon Counting Chips. This PCC consists of a matrix of 64×64 identical square pixels (170 μm×170 μm) with a 15-bit counter in each cell. We investigated the imaging properties of these detector systems under exposure of a dental X-ray tube. First, a dose calibration of the X-ray tube was performed. Fixed pattern noise in flood exposure images was determined for a fixed dose and an image correction method, which uses a gain map, was applied. For characterising the imaging properties, the signal-to-noise ratio (SNR) was calculated as function of exposure dose. Finally, the dynamic range of the system was estimated. Developed in the framework of the MEDIPIX collaboration: CERN, Universities of Freiburg, Glasgow, Naples and Pisa.
NASA Astrophysics Data System (ADS)
Kawano, J.; Tsukamoto, A.; Adachi, S.; Oshikubo, Y.; Hato, T.; Tanabe, K.; Okamura, T.
We have developed a new eddy-current non-destructive evaluation (NDE) system using an HTS SQUID gradiometer with the aim of applying it to practical materials with magnetization. The new NDE system employs a LN2-cooled external Cu pickup coil and an HTS SQUID chip placed in a magnetic shield made of HTS material. The HTS SQUID chip consists of an HTS planar gradiometer manufactured by using a ramp-edge junction technology and a multi-turn HTS thin film input coil coupled with the flip-chip configuration. The first-order coaxial gradiometric Cu pickup coil with a diameter of 16 mm and the baseline of 5.6 mm was used in the present NDE experiments. By using this NDE system, we could observe defect-induced magnetic signals without an appreciable influence of magnetization up to 10 mT. We also examined the ability of detecting deep-lying defects and compared with the results obtained using our previous NDE system.
NASA Astrophysics Data System (ADS)
Yang, Lei; Gong, Jie; Ume, I. Charles
2014-02-01
In modern surface mount packaging technologies, such as flip chips, chip scale packages, and ball grid arrays(BGA), chips are attached to the substrates/printed wiring board (PWB) using solder bump interconnections. The quality of solder bumps between the chips and the substrate/board is difficult to inspect. Laser ultrasonic-interferometric technique was proved to be a promising approach for solder bump inspection because of its noncontact and nondestructive characteristics. Different indicators extracted from received signals have been used to predict the potential defects, such as correlation coefficient, error ratio, frequency shifting, etc. However, the fundamental understanding of the chip behavior under laser ultrasonic inspection is still missing. Specifically, it is not sure whether the laser interferometer detected out-of-plane displacements were due to wave propagation or structural vibration when the chip was excited by pulsed laser. Plus, it is found that the received signals are chip dependent. Both challenges impede the interpretation of acquired signals. In this paper, a C-scan method was proposed to study the underlying phenomenon during laser ultrasonic inspection. The full chip was inspected. The response of the chip under laser excitation was visualized in a movie resulted from acquired signals. Specifically, a BGA chip was investigated to demonstrate the effectiveness of this method. By characterizing signals using discrete wavelet transform(DWT), both ultrasonic wave propagation and vibration were observed. Separation of them was successfully achieved using ideal band-pass filter and visualized in resultant movies, too. The observed ultrasonic waves were characterized and their respective speeds were measured by applying 2-D FFT. The C-scan method, combined with different digital signal processing techniques, was proved to be an very effective methodology to learn the behavior of chips under laser excitation. This general procedure can be applied to any unknown chip before inspection. A wealth of information can be provided by this learning procedure, which greatly benefits the interpretation of inspection signals afterwards.
Phase Equilibria of the Sn-Ni-Si Ternary System and Interfacial Reactions in Sn-(Cu)/Ni-Si Couples
NASA Astrophysics Data System (ADS)
Fang, Gu; Chen, Chih-chi
2015-07-01
Interfacial reactions in Sn/Ni-4.5 wt.%Si and Sn-Cu/Ni-4.5 wt.%Si couples at 250°C, and Sn-Ni-Si ternary phase equilibria at 250°C were investigated in this study. Ni-Si alloys, which are nonmagnetic, can be regarded as a diffusion barrier layer material in flip chip packaging. Solder/Ni-4.5 wt.%Si interfacial reactions are crucial to the reliability of soldered joints. Phase equilibria information is essential for development of solder/Ni-Si materials. No ternary compound is present in the Sn-Ni-Si ternary system at 250°C. Extended solubility of Si in the phases Ni3Sn2 and Ni3Sn is 3.8 and 6.1 at.%, respectively. As more Si dissolves in these phases their lattice constants decrease. No noticeable ternary solubility is observed for the other intermetallics. Interfacial reactions in solder/Ni-4.5 wt.%Si are similar to those for solder/Ni. Si does not alter the reaction phases. No Si solubility in the reaction phases was detected, although rates of growth of the reaction phases were reduced. Because the alloy Ni-4.5 wt.%Si reacts more slowly with solders than pure Ni, the Ni-4.5 wt.%Si alloy could be a potential new diffusion barrier layer material for flip chip packaging.
Lin, Huan-Ting; Tien, Ching-Ho; Hsu, Chen-Peng; Horng, Ray-Hua
2014-12-29
We fabricated a phosphor-conversion white light emitting diode (PC-WLED) using a thin-film flip-chip GaN LED with a roughened u-GaN surface (TFFC-SR-LED) that emits blue light at 450 nm wavelength with a conformal phosphor coating that converts the blue light into yellow light. It was found that the TFFC-SR-LED with the thin-film substrate removal process and surface roughening exhibits a power enhancement of 16.1% when compared with the TFFC-LED without a sapphire substrate. When a TFFC-SR-LED with phosphors on a Cu-metal packaging-base (TFFC-SR-Cu-WLED) was operated at a forward-bias current of 350 mA, luminous flux and luminous efficacy were increased by 17.8 and 11.9%, compared to a TFFC-SR-LED on a Cup-shaped packaging-base (TFFC-SR-Cup-WLED). The angular correlated color temperature (CCT) deviation of a TFFC-SR-Cu-WLED reaches 77 K in the range of -70° to + 70° when the average CCT of white LEDs is around 4300 K. Consequently, the TFFC-SR-LED in a conformal coating phosphor structure on a Cu packaging-base could not only increase the luminous flux output, but also improve the angular-dependent CCT uniformity, thereby reducing the yellow ring effect.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Tikadar, Amitav, E-mail: amitav453@gmail.com; Hossain, Md. Mahamudul; Morshed, A. K. M. M.
Heat transfer from electronic chip is always challenging and very crucial for electronic industry. Electronic chips are assembled in various manners according to the design conditions and limitationsand thus the influence of chip assembly on the overall thermal performance needs to be understand for the efficient design of electronic cooling system. Due to shrinkage of the dimension of channel and continuous increment of thermal load, conventional heat extraction techniques sometimes become inadequate. Due to high surface area to volume ratio, mini-channel have the natural advantage to enhance convective heat transfer and thus to play a vital role in the advancedmore » heat transfer devices with limited surface area and high heat flux. In this paper, a water cooled mini-channel heat sink was considered for electronic chip cooling and five different chip arrangements were designed and studied, namely: the diagonal arrangement, parallel arrangement, stacked arrangement, longitudinal arrangement and sandwiched arrangement. Temperature distribution on the chip surfaces was presented and the thermal performance of the heat sink in terms of overall thermal resistance was also compared. It is found that the sandwiched arrangement of chip provides better thermal performance compared to conventional in line chip arrangement.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Song, Qijian; Jia, Gaofeng; Hyten, David L.
A total of 992,682 single-nucleotide polymorphisms (SNPs) was identified as ideal for Illumina Infinium II BeadChip design after sequencing a diverse set of 17 common bean (Phaseolus vulgaris L) varieties with the aid of next-generation sequencing technology. From these, two BeadChips each with >5000 SNPs were designed. The BARCBean6K_1 BeadChip was selected for the purpose of optimizing polymorphism among market classes and, when possible, SNPs were targeted to sequence scaffolds in the Phaseolus vulgaris 14× genome assembly with sequence lengths >10 kb. The BARCBean6K_2 BeadChip was designed with the objective of anchoring additional scaffolds and to facilitate orientation of largemore » scaffolds. Analysis of 267 F2 plants from a cross of varieties Stampede × Red Hawk with the two BeadChips resulted in linkage maps with a total of 7040 markers including 7015 SNPs. With the linkage map, a total of 432.3 Mb of sequence from 2766 scaffolds was anchored to create the Phaseolus vulgaris v1.0 assembly, which accounted for approximately 89% of the 487 Mb of available sequence scaffolds of the Phaseolus vulgaris v0.9 assembly. A core set of 6000 SNPs (BARCBean6K_3 BeadChip) with high genotyping quality and polymorphism was selected based on the genotyping of 365 dry bean and 134 snap bean accessions with the BARCBean6K_1 and BARCBean6K_2 BeadChips. The BARCBean6K_3 BeadChip is a useful tool for genetics and genomics research and it is widely used by breeders and geneticists in the United States and abroad.« less
Song, Qijian; Jia, Gaofeng; Hyten, David L.; ...
2015-08-28
A total of 992,682 single-nucleotide polymorphisms (SNPs) was identified as ideal for Illumina Infinium II BeadChip design after sequencing a diverse set of 17 common bean (Phaseolus vulgaris L) varieties with the aid of next-generation sequencing technology. From these, two BeadChips each with >5000 SNPs were designed. The BARCBean6K_1 BeadChip was selected for the purpose of optimizing polymorphism among market classes and, when possible, SNPs were targeted to sequence scaffolds in the Phaseolus vulgaris 14× genome assembly with sequence lengths >10 kb. The BARCBean6K_2 BeadChip was designed with the objective of anchoring additional scaffolds and to facilitate orientation of largemore » scaffolds. Analysis of 267 F2 plants from a cross of varieties Stampede × Red Hawk with the two BeadChips resulted in linkage maps with a total of 7040 markers including 7015 SNPs. With the linkage map, a total of 432.3 Mb of sequence from 2766 scaffolds was anchored to create the Phaseolus vulgaris v1.0 assembly, which accounted for approximately 89% of the 487 Mb of available sequence scaffolds of the Phaseolus vulgaris v0.9 assembly. A core set of 6000 SNPs (BARCBean6K_3 BeadChip) with high genotyping quality and polymorphism was selected based on the genotyping of 365 dry bean and 134 snap bean accessions with the BARCBean6K_1 and BARCBean6K_2 BeadChips. The BARCBean6K_3 BeadChip is a useful tool for genetics and genomics research and it is widely used by breeders and geneticists in the United States and abroad.« less
Song, Qijian; Jia, Gaofeng; Hyten, David L; Jenkins, Jerry; Hwang, Eun-Young; Schroeder, Steven G; Osorno, Juan M; Schmutz, Jeremy; Jackson, Scott A; McClean, Phillip E; Cregan, Perry B
2015-08-28
A total of 992,682 single-nucleotide polymorphisms (SNPs) was identified as ideal for Illumina Infinium II BeadChip design after sequencing a diverse set of 17 common bean (Phaseolus vulgaris L) varieties with the aid of next-generation sequencing technology. From these, two BeadChips each with >5000 SNPs were designed. The BARCBean6K_1 BeadChip was selected for the purpose of optimizing polymorphism among market classes and, when possible, SNPs were targeted to sequence scaffolds in the Phaseolus vulgaris 14× genome assembly with sequence lengths >10 kb. The BARCBean6K_2 BeadChip was designed with the objective of anchoring additional scaffolds and to facilitate orientation of large scaffolds. Analysis of 267 F2 plants from a cross of varieties Stampede × Red Hawk with the two BeadChips resulted in linkage maps with a total of 7040 markers including 7015 SNPs. With the linkage map, a total of 432.3 Mb of sequence from 2766 scaffolds was anchored to create the Phaseolus vulgaris v1.0 assembly, which accounted for approximately 89% of the 487 Mb of available sequence scaffolds of the Phaseolus vulgaris v0.9 assembly. A core set of 6000 SNPs (BARCBean6K_3 BeadChip) with high genotyping quality and polymorphism was selected based on the genotyping of 365 dry bean and 134 snap bean accessions with the BARCBean6K_1 and BARCBean6K_2 BeadChips. The BARCBean6K_3 BeadChip is a useful tool for genetics and genomics research and it is widely used by breeders and geneticists in the United States and abroad. Copyright © 2015 Song et al.
Qualification and Reliability for MEMS and IC Packages
NASA Technical Reports Server (NTRS)
Ghaffarian, Reza
2004-01-01
Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface
Rahman, Mohammed M.
2014-01-01
A reusable and mediator-free cholesterol biosensor based on cholesterol oxidase (ChOx) was fabricated based on self-assembled monolayer (SAM) of thioglycolic acid (TGA) (covalent enzyme immobilization by dropping method) using bio-chips. Cholesterol was detected with modified bio-chip (Gold/Thioglycolic-acid/Cholesterol-oxidase i.e., Au/TGA/ChOx) by reliable cyclic voltammetric (CV) technique at room conditions. The Au/TGA/ChOx modified bio-chip sensor demonstrates good linearity (1.0 nM to 1.0 mM; R = 0.9935), low-detection limit (∼0.42 nM, SNR∼3), and higher sensitivity (∼74.3 µAµM−1cm−2), lowest-small sample volume (50.0 μL), good stability, and reproducibility. To the best of our knowledge, this is the first statement with a very high sensitivity, low-detection limit, and low-sample volumes are required for cholesterol biosensor using Au/TGA/ChOx-chips assembly. The result of this facile approach was investigated for the biomedical applications for real samples at room conditions with significant assembly (Au/TGA/ChOx) towards the development of selected cholesterol biosensors, which can offer analytical access to a large group of enzymes for wide range of biomedical applications in health-care fields. PMID:24949733
Rapid self-assembly of DNA on a microfluidic chip
Zheng, Yao; Footz, Tim; Manage, Dammika P; Backhouse, Christopher James
2005-01-01
Background DNA self-assembly methods have played a major role in enabling methods for acquiring genetic information without having to resort to sequencing, a relatively slow and costly procedure. However, even self-assembly processes tend to be very slow when they rely upon diffusion on a large scale. Miniaturisation and integration therefore hold the promise of greatly increasing this speed of operation. Results We have developed a rapid method for implementing the self-assembly of DNA within a microfluidic system by electrically extracting the DNA from an environment containing an uncharged denaturant. By controlling the parameters of the electrophoretic extraction and subsequent analysis of the DNA we are able to control when the hybridisation occurs as well as the degree of hybridisation. By avoiding off-chip processing or long thermal treatments we are able to perform this hybridisation rapidly and can perform hybridisation, sizing, heteroduplex analysis and single-stranded conformation analysis within a matter of minutes. The rapidity of this analysis allows the sampling of transient effects that may improve the sensitivity of mutation detection. Conclusions We believe that this method will aid the integration of self-assembly methods upon microfluidic chips. The speed of this analysis also appears to provide information upon the dynamics of the self-assembly process. PMID:15717935
Physics of self-aligned assembly at room temperature
NASA Astrophysics Data System (ADS)
Dubey, V.; Beyne, E.; Derakhshandeh, J.; De Wolf, I.
2018-01-01
Self-aligned assembly, making use of capillary forces, is considered as an alternative to active alignment during thermo-compression bonding of Si chips in the 3D heterogeneous integration process. Various process parameters affect the alignment accuracy of the chip over the patterned binding site on a substrate/carrier wafer. This paper discusses the chip motion due to wetting and capillary force using a transient coupled physics model for the two regimes (that is, wetting regime and damped oscillatory regime) in the temporal domain. Using the transient model, the effect of the volume of the liquid and the placement accuracy of the chip on the alignment force is studied. The capillary time (that is, the time it takes for the chip to reach its mean position) for the chip is directly proportional to the placement offset and inversely proportional to the viscosity. The time constant of the harmonic oscillations is directly proportional to the gap between the chips due to the volume of the fluid. The predicted behavior from transient simulations is next experimentally validated and it is confirmed that the liquid volume and the initial placement affect the final alignment accuracy of the top chip on the bottom substrate. With statistical experimental data, we demonstrate an alignment accuracy reaching <1 μm.
NASA Astrophysics Data System (ADS)
Ordu, Orkide; Kremser, Leopold; Lusser, Alexandra; Dekker, Nynke H.
2018-03-01
Nucleosomes consisting of a short piece of deoxyribonucleic acid (DNA) wrapped around an octamer of histone proteins form the fundamental unit of chromatin in eukaryotes. Their role in DNA compaction comes with regulatory functions that impact essential genomic processes such as replication, transcription, and repair. The assembly of nucleosomes obeys a precise pathway in which tetramers of histones H3 and H4 bind to the DNA first to form tetrasomes, and two dimers of histones H2A and H2B are subsequently incorporated to complete the complex. As viable intermediates, we previously showed that tetrasomes can spontaneously flip between a left-handed and right-handed conformation of DNA-wrapping. To pinpoint the underlying mechanism, here we investigated the role of the H3-H3 interface for tetramer flexibility in the flipping process at the single-molecule level. Using freely orbiting magnetic tweezers, we studied the assembly and structural dynamics of individual tetrasomes modified at the cysteines close to this interaction interface by iodoacetamide (IA) in real time. While such modification did not affect the structural properties of the tetrasomes, it caused a 3-fold change in their flipping kinetics. The results indicate that the IA-modification enhances the conformational plasticity of tetrasomes. Our findings suggest that subnucleosomal dynamics may be employed by chromatin as an intrinsic and adjustable mechanism to regulate DNA supercoiling.
Cold denaturation induces inversion of dipole and spin transfer in chiral peptide monolayers
Eckshtain-Levi, Meital; Capua, Eyal; Refaely-Abramson, Sivan; Sarkar, Soumyajit; Gavrilov, Yulian; Mathew, Shinto P.; Paltiel, Yossi; Levy, Yaakov; Kronik, Leeor; Naaman, Ron
2016-01-01
Chirality-induced spin selectivity is a recently-discovered effect, which results in spin selectivity for electrons transmitted through chiral peptide monolayers. Here, we use this spin selectivity to probe the organization of self-assembled α-helix peptide monolayers and examine the relation between structural and spin transfer phenomena. We show that the α-helix structure of oligopeptides based on alanine and aminoisobutyric acid is transformed to a more linear one upon cooling. This process is similar to the known cold denaturation in peptides, but here the self-assembled monolayer plays the role of the solvent. The structural change results in a flip in the direction of the electrical dipole moment of the adsorbed molecules. The dipole flip is accompanied by a concomitant change in the spin that is preferred in electron transfer through the molecules, observed via a new solid-state hybrid organic–inorganic device that is based on the Hall effect, but operates with no external magnetic field or magnetic material. PMID:26916536
Cold denaturation induces inversion of dipole and spin transfer in chiral peptide monolayers
NASA Astrophysics Data System (ADS)
Eckshtain-Levi, Meital; Capua, Eyal; Refaely-Abramson, Sivan; Sarkar, Soumyajit; Gavrilov, Yulian; Mathew, Shinto P.; Paltiel, Yossi; Levy, Yaakov; Kronik, Leeor; Naaman, Ron
2016-02-01
Chirality-induced spin selectivity is a recently-discovered effect, which results in spin selectivity for electrons transmitted through chiral peptide monolayers. Here, we use this spin selectivity to probe the organization of self-assembled α-helix peptide monolayers and examine the relation between structural and spin transfer phenomena. We show that the α-helix structure of oligopeptides based on alanine and aminoisobutyric acid is transformed to a more linear one upon cooling. This process is similar to the known cold denaturation in peptides, but here the self-assembled monolayer plays the role of the solvent. The structural change results in a flip in the direction of the electrical dipole moment of the adsorbed molecules. The dipole flip is accompanied by a concomitant change in the spin that is preferred in electron transfer through the molecules, observed via a new solid-state hybrid organic-inorganic device that is based on the Hall effect, but operates with no external magnetic field or magnetic material.
High-Temperature High-Power Packaging Techniques for HEV Traction Applications
DOE Office of Scientific and Technical Information (OSTI.GOV)
Elshabini, Aicha; Barlow, Fred D.
A key issue associated with the wider adoption of hybrid-electric vehicles (HEV) and plug in hybrid-electric vehicles (PHEV) is the implementation of the power electronic systems that are required in these products. One of the primary industry goals is the reduction in the price of these vehicles relative to the cost of traditional gasoline powered vehicles. Today these systems, such as the Prius, utilize one coolant loop for the engine at approximately 100 C coolant temperatures, and a second coolant loop for the inverter at 65 C. One way in which significant cost reduction of these systems could be achievedmore » is through the use of a single coolant loop for both the power electronics as well as the internal combustion engine (ICE). This change in coolant temperature significantly increases the junction temperatures of the devices and creates a number of challenges for both device fabrication and the assembly of these devices into inverters and converters for HEV and PHEV applications. Traditional power modules and the state-of-the-art inverters in the current HEV products, are based on chip and wire assembly and direct bond copper (DBC) on ceramic substrates. While a shift to silicon carbide (SiC) devices from silicon (Si) devices would allow the higher operating temperatures required for a single coolant loop, it also creates a number of challenges for the assembly of these devices into power inverters. While this traditional packaging technology can be extended to higher temperatures, the key issues are the substrate material and conductor stability, die bonding material, wire bonds, and bond metallurgy reliability as well as encapsulation materials that are stable at high operating temperatures. The larger temperature differential during power cycling, which would be created by higher coolant temperatures, places tremendous stress on traditional aluminum wire bonds that are used to interconnect power devices. Selection of the bond metallurgy and wire bond geometry can play a key role in mitigating this stress. An alternative solution would be to eliminate the wire bonds completely through a fundamentally different method of forming a reliable top side interconnect. Similarly, the solders used in most power modules exhibit too low of a liquidus to be viable solutions for maximum junction temperatures of 200 C. Commonly used encapsulation materials, such as silicone gels, also suffer from an inability to operate at 200 C for extended periods of time. Possible solutions to these problems exist in most cases but require changes to the traditional manufacturing process used in these modules. In addition, a number of emerging technologies such as Si nitride, flip-chip assembly methods, and the elimination of base-plates would allow reliable module development for operation of HEV and PHEV inverters at elevated junction temperatures.« less
Near-chip compliant layer for reducing perimeter stress during assembly process
Schultz, Mark D.; Takken, Todd E.; Tian, Shurong; Yao, Yuan
2018-03-20
A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.
Near-chip compliant layer for reducing perimeter stress during assembly process
Schultz, Mark D.; Takken, Todd E.; Tian, Shurong; Yao, Yuan
2017-02-14
A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.
Devaraju, Naga Sai Gopi K; Unger, Marc A
2012-11-21
Advances in microfluidics now allow an unprecedented level of parallelization and integration of biochemical reactions. However, one challenge still faced by the field has been the complexity and cost of the control hardware: one external pressure signal has been required for each independently actuated set of valves on chip. Using a simple post-modification to the multilayer soft lithography fabrication process, we present a new implementation of digital fluidic logic fully analogous to electronic logic with significant performance advances over the previous implementations. We demonstrate a novel normally closed static gain valve capable of modulating pressure signals in a fashion analogous to an electronic transistor. We utilize these valves to build complex fluidic logic circuits capable of arbitrary control of flows by processing binary input signals (pressure (1) and atmosphere (0)). We demonstrate logic gates and devices including NOT, NAND and NOR gates, bi-stable flip-flops, gated flip-flops (latches), oscillators, self-driven peristaltic pumps, delay flip-flops, and a 12-bit shift register built using static gain valves. This fluidic logic shows cascade-ability, feedback, programmability, bi-stability, and autonomous control capability. This implementation of fluidic logic yields significantly smaller devices, higher clock rates, simple designs, easy fabrication, and integration into MSL microfluidics.
Consortia for Known Good Die (KGD), phase 1
NASA Astrophysics Data System (ADS)
Andrews, Marshall; Carey, David; Fellows, Mary M.; Gilg, Larry; Murphy, Cindy; Noddings, Chad; Pitts, Greg; Rathmell, Claude; Spooner, Charles
1994-02-01
This report describes the results of Phase 1 of the Infrastructure for KGD program at MCC. The objective of the work is to resolve the issues for supplying and procuring Known Good Die (KGD) in a way that fosters industry acceptance and confidence in Application Specific Electronic Modules (ASEM's for military systems) and MultiChip Modules (MCM's for commercial systems). This report is divided into four sections. Section 1 describes the technical assessment of proposed industry approaches to KGD implementation. Section 2 of the report contains an outline for the plan for industry and government cooperation for the demonstration, validation, and implementation of KGD methodologies identified in this Phase 1 study. Section 3 of the report contains the industry-generated requirements for KGD implementation. Section IV of the report contains the KGD specifications for TAB and flip chip IC's.
On-chip self-assembly of cell embedded microstructures to vascular-like microtubes.
Yue, Tao; Nakajima, Masahiro; Takeuchi, Masaru; Hu, Chengzhi; Huang, Qiang; Fukuda, Toshio
2014-03-21
Currently, research on the construction of vascular-like tubular structures is a hot area of tissue engineering, since it has potential applications in the building of artificial blood vessels. In this paper, we report a fluidic self-assembly method using cell embedded microstructures to construct vascular-like microtubes. A novel 4-layer microfluidic device was fabricated using polydimethylsiloxane (PDMS), which contains fabrication, self-assembly and extraction areas inside one channel. Cell embedded microstructures were directly fabricated using poly(ethylene glycol) diacrylate (PEGDA) in the fabrication area, namely on-chip fabrication. Self-assembly of the fabricated microstructures was performed in the assembly area which has a micro well. Assembled tubular structures (microtubes) were extracted outside the channel into culture dishes using a normally closed (NC) micro valve in the extraction area. The self-assembly mechanism was experimentally demonstrated. The performance of the NC micro valve and embedded cell concentration were both evaluated. Fibroblast (NIH/3T3) embedded vascular-like microtubes were constructed inside this reusable microfluidic device.
32 x 16 CMOS smart pixel array for optical interconnects
NASA Astrophysics Data System (ADS)
Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.
2000-05-01
Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.
AIN-Based Packaging for SiC High-Temperature Electronics
NASA Technical Reports Server (NTRS)
Savrun, Ender
2004-01-01
Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.
NASA Astrophysics Data System (ADS)
Huang, Chien-Sheng; Jang, Guh-Yaw; Duh, Jenq-Gong
2004-04-01
Nickel-based under bump metallization (UBM) has been widely used as a diffusion barrier to prevent the rapid reaction between the Cu conductor and Sn-based solders. In this study, joints with and without solder after heat treatments were employed to evaluate the diffusion behavior of Cu in the 63Sn-37Pb/Ni/Cu/Ti/Si3N4/Si multilayer structure. The atomic flux of Cu diffused through Ni was evaluated from the concentration profiles of Cu in solder joints. During reflow, the atomic flux of Cu was on the order of 1015-1016 atoms/cm2s. However, in the assembly without solder, no Cu was detected on the surface of Ni even after ten cycles of reflow. The diffusion behavior of Cu during heat treatments was studied, and the soldering-process-induced Cu diffusion through Ni metallization was characterized. In addition, the effect of Cu content in the solder near the solder/intermetallic compound (IMC) interface on interfacial reactions between the solder and the Ni/Cu UBM was also discussed. It is evident that the (Cu,Ni)6Sn5 IMC might form as the concentration of Cu in the Sn-Cu-Ni alloy exceeds 0.6 wt.%.
Wafer-level vacuum/hermetic packaging technologies for MEMS
NASA Astrophysics Data System (ADS)
Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil
2010-02-01
An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.
NASA Astrophysics Data System (ADS)
Robertson, Luke D.; Kane, B. E.
Quantum point contacts (QPCs) realized in materials with anisotropic electron mass, such as Si, may exhibit valley filter phenomena leading to extreme sensitivity to single donor occupancy, and thus are of interest to measurement schemes for donor-based quantum information processing. To this end, we have developed ambipolar devices on a H-Si(111):Si(100)/SiO2 flip-chip assembly which utilize in-plane, degenerately doped n+ (P) and p+ (B) contacts to probe transport in a 2D electron system (2DES). In addition to providing electrostatic isolation of carriers, these p-type contacts can be used as lateral depletion gates to modulate the 2DES conductance, and if extended to the nanoscale can lead to 1D confinement and quantized conductance of the 2DES. In this talk, I will describe our efforts to use a Ga focused-ion beam for direct-write implant lithography to pattern QPCs and Ga nanowires on H-Si(111) surfaces. I will present low temperature (4.2K) conductance data collected on 30nm Ga nanowires to demonstrate their effectiveness as lateral depletion gates, and discuss on going measurements to confine and modulate the conductance of the 2DES using Ga QPCs.
NASA Astrophysics Data System (ADS)
Zhou, Shengjun; Zheng, Chenju; Lv, Jiajiang; Gao, Yilin; Wang, Ruiqing; Liu, Sheng
2017-07-01
We demonstrate GaN-based double-layer electrode flip-chip light-emitting diodes (DLE-FCLED) with highly reflective indium-tin oxide (ITO)/distributed bragg reflector (DBR) p-type contact and via hole-based n-type contacts. Transparent thin ITO in combination with TiO2/SiO2 DBR is used for reflective p-type ohmic contact, resulting in a significant reduction in absorption of light by opaque metal electrodes. The finely distributed via hole-based n-type contacts are formed on the n-GaN layer by etching via holes through p-GaN and multiple quantum well (MQW) active layer, leading to reduced lateral current spreading length, and hence alleviated current crowding effect. The forward voltage of the DLE-FCLED is 0.31 V lower than that of the top-emitting LED at 90 mA. The light output power of DLE-FCLED is 15.7% and 80.8% higher than that of top-emitting LED at 90 mA and 300 mA, respectively. Compared to top- emitting LED, the external quantum efficiency (EQE) of DLE-FCLED is enhanced by 15.4% and 132% at 90 mA and 300 mA, respectively. The maximum light output power of the DLE-FCLED obtained at 195.6 A/cm2 is 1.33 times larger than that of the top-emitting LED obtained at 93 A/cm2.
Zhou, Shengjun; Liu, Xingtong; Gao, Yilin; Liu, Yingce; Liu, Mengling; Liu, Zongyuan; Gui, Chengqun; Liu, Sheng
2017-10-30
We demonstrate two types of GaN-based flip-chip light-emitting diodes (FCLEDs) with highly reflective Ag/TiW and indium-tin oxide (ITO)/distributed Bragg reflector (DBR) p-type Ohmic contacts. We show that a direct Ohmic contact to p-GaN layer using pure Ag is obtained when annealed at 600°C in N 2 ambient. A TiW diffusion barrier layer covered onto Ag is used to suppress the agglomeration of Ag and thus maintain high reflectance of Ag during high temperature annealing process. We develop a strip-shaped SiO 2 current blocking layer beneath the ITO/DBR to alleviate current crowding occurring in FCLED with ITO/DBR. Owing to negligibly small spreading resistance of Ag, however, our combined numerical and experimental results show that the FCLED with Ag/TiW has a more favorable current spreading uniformity in comparison to the FCLED with ITO/DBR. As a result, the light output power of FCLED with Ag/TiW is 7.5% higher than that of FCLED with ITO/DBR at 350 mA. The maximum output power of the FCLED with Ag/TiW obtained at 305.6 A/cm 2 is 29.3% larger than that of the FCLED with ITO/DBR obtained at 278.9 A/cm 2 . The improvement appears to be due to the enhanced current spreading and higher optical reflectance provided by the Ag/TiW.
Electromigration Failure Mechanism in Sn-Cu Solder Alloys with OSP Cu Surface Finish
NASA Astrophysics Data System (ADS)
Chu, Ming-Hui; Liang, S. W.; Chen, Chih; Huang, Annie T.
2012-09-01
Organic solderable preservative (OSP) has been adopted as the Cu substrate surface finish in flip-chip solder joints for many years. In this study, the electromigration behavior of lead-free Sn-Cu solder alloys with thin-film under bump metallization and OSP surface finish was investigated. The results showed that severe damage occurred on the substrate side (cathode side), whereas the damage on the chip side (cathode side) was not severe. The damage on the substrate side included void formation, copper dissolution, and formation of intermetallic compounds (IMCs). The OSP Cu interface on the substrate side became the weakest point in the solder joint even when thin-film metallization was used on the chip side. Three-dimensional simulations were employed to investigate the current density distribution in the area between the OSP Cu surface finish and the solder. The results indicated that the current density was higher along the periphery of the bonding area between the solder and the Cu pad, consistent with the area of IMC and void formation in our experimental results.
Yang, Liang; Chen, Mingxiang; Lv, Zhicheng; Wang, Simin; Liu, Xiaogang; Liu, Sheng
2013-07-01
A simple and practical method for preparing phosphor glass is proposed. Phosphor distribution and element analysis are investigated by optical microscope and field emission scanning electron microscope (FE-SEM). The phosphor particles dispersed in the matrix are vividly observed, and their distributions are uniform. Spectrum distribution and color coordinates dependent on the thickness of the screen-printed phosphor layer coupled with a blue light emitting diode (LED) chip are studied. The luminous efficacy of the 75 μm printed phosphor-layer phosphor glass packaged white LED is 81.24 lm/W at 350 mA. This study opens up many possibilities for applications using the phosphor glass on a selected chip in which emission is well absorbed by all phosphors. The screen-printing technique also offers possibilities for the design and engineering of complex phosphor layers on glass substrates. Phosphor screen-printing technology allows the realization of high stability and thermal conductivity for the phosphor layer. This phosphor glass method provides many possibilities for LED packing, including thin-film flip chip and remote phosphor technology.
Ten-channel InP-based large-scale photonic integrated transmitter fabricated by SAG technology
NASA Astrophysics Data System (ADS)
Zhang, Can; Zhu, Hongliang; Liang, Song; Cui, Xiao; Wang, Huitao; Zhao, Lingjuan; Wang, Wei
2014-12-01
A 10-channel InP-based large-scale photonic integrated transmitter was fabricated by selective area growth (SAG) technology combined with butt-joint regrowth (BJR) technology. The SAG technology was utilized to fabricate the electroabsorption modulated distributed feedback (DFB) laser (EML) arrays at the same time. The design of coplanar electrodes for electroabsorption modulator (EAM) was used for the flip-chip bonding package. The lasing wavelength of DFB laser could be tuned by the integrated micro-heater to match the ITU grids, which only needs one electrode pad. The average output power of each channel is 250 μW with an injection current of 200 mA. The static extinction ratios of the EAMs for 10 channels tested are ranged from 15 to 27 dB with a reverse bias of 6 V. The frequencies of 3 dB bandwidth of the chip for each channel are around 14 GHz. The novel design and simple fabrication process show its enormous potential in reducing the cost of large-scale photonic integrated circuit (LS-PIC) transmitter with high chip yields.
Assembly of opto-electronic module with improved heat sink
Chan, Benson; Fortier, Paul Francis; Freitag, Ladd William; Galli, Gary T.; Guindon, Francois; Johnson, Glen Walden; Letourneau, Martial; Sherman, John H.; Tetreault, Real
2004-11-23
A heat sink for a transceiver optoelectronic module including dual direct heat paths and a structure which encloses a number of chips having a central web which electrically isolates transmitter and receiver chips from each other. A retainer for an optical coupler having a port into which epoxy is poured. An overmolded base for an optoelectronic module having epoxy flow controller members built thereon. Assembly methods for an optoelectronic module including gap setting and variation of a TAB bonding process.
Federal Register 2010, 2011, 2012, 2013, 2014
2010-01-05
... review (1) the finding that the claim term ``top layer'' recited in claim 1 of the '106 patent means ``an outer layer of the chip assembly upon which the terminals are fixed,'' the requirement that ``the `top layer' is a single layer,'' and the effect of the findings on the infringement analysis, invalidity...
Progress on TSV technology for Medipix3RX chip
NASA Astrophysics Data System (ADS)
Sarajlić, M.; Pennicard, D.; Smoljanin, S.; Fritzsch, T.; Zoschke, K.; Graafsma, H.
2017-12-01
The progress of Through Silicon Via (TSV) technology for Medipix3RX chip done at DESY is presented here. The goal of this development is to replace the wire bonds in X-ray detectors with TSVs, in order to reduce the dead area between detectors. We obtained the first working chips assembled together with Si based sensors for X-ray detection. The 3D integration technology, including TSV, Re-distribution layer deposition, bump bonding to the Si sensor and bump bonding to the carrier PCB, was done by Fraunhofer Institute IZM in Berlin. After assembly, the module was successfully tested by recording background radiation and making X-ray images of small objects. The active area of the Medipix3RX chip is 14.1 mm×14.1 mm or 256×256 pixels. During TSV processing, the Medipix3RX chip was thinned from 775 μm original thickness, to 130 μm. The diameter of the vias is 40 μm, and the pitch between the vias is 120 μm. A liner filling approach was used to contact the TSV with the RDL on the backside of the Medipix3RX readout chip.
STS-28 Columbia, OV-102, Mission Specialist Adamson eating on middeck
NASA Technical Reports Server (NTRS)
1989-01-01
On middeck, Mission Specialist (MS) James C. Adamson enjoys the rare opportunity of eating in a weightless environment as he flips a shrimp with a spoon. In the background is a second crewmember holding a meal tray assembly (food tray) and sleep restraints fastened to starboard wall.
In situ 3D nanoprinting of free-form coupling elements for hybrid photonic integration
NASA Astrophysics Data System (ADS)
Dietrich, P.-I.; Blaicher, M.; Reuter, I.; Billah, M.; Hoose, T.; Hofmann, A.; Caer, C.; Dangel, R.; Offrein, B.; Troppenz, U.; Moehrle, M.; Freude, W.; Koos, C.
2018-04-01
Hybrid photonic integration combines complementary advantages of different material platforms, offering superior performance and flexibility compared with monolithic approaches. This applies in particular to multi-chip concepts, where components can be individually optimized and tested. The assembly of such systems, however, requires expensive high-precision alignment and adaptation of optical mode profiles. We show that these challenges can be overcome by in situ printing of facet-attached beam-shaping elements. Our approach allows precise adaptation of vastly dissimilar mode profiles and permits alignment tolerances compatible with cost-efficient passive assembly techniques. We demonstrate a selection of beam-shaping elements at chip and fibre facets, achieving coupling efficiencies of up to 88% between edge-emitting lasers and single-mode fibres. We also realize printed free-form mirrors that simultaneously adapt beam shape and propagation direction, and we explore multi-lens systems for beam expansion. The concept paves the way to automated assembly of photonic multi-chip systems with unprecedented performance and versatility.
Menad, S; Franqueville, L; Haddour, N; Buret, F; Frenea-Robin, M
2015-04-01
Creating cell aggregates of controlled size and shape and patterning cells on substrates using a bottom-up approach constitutes important challenges for tissue-engineering applications and studies of cell-cell interactions. In this paper, we report nDEP (negative dielectrophoresis) driven assembly of cells as compact aggregates or onto defined areas using a new bioelectronic chip. This chip is composed of a quadripolar electrode array obtained using coplanar electrodes partially covered with a thin, micropatterned PDMS membrane. This thin PDMS layer was coated with poly-L-lysine and played the role of adhesive substrate for cell patterning. For the formation of detachable cell aggregates, the PDMS was not pretreated and cells were simply immobilized into assemblies maintained by cell-cell adhesion after the electric field removal. Cell viability after exposition to DEP buffer was also assessed, as well as cell spreading activity following DEP-driven assembly. Copyright © 2015 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.
Fundamental Problems of Hybrid CMOS/Nanodevice Circuits
2010-12-14
Development of an area-distributed CMOS/nanodevice interface We have carried out the first design of CMOS chips for the CMOS/nanodevice integration, and...got them fabricated in IBM’ 180-nm 7RF process (via MOSIS, Inc. silicon foundry). Each 44 mm2 chip assembly of the design consists of 4 component... chips , merged together for processing convenience. Each 22 mm2 component chip features two interface arrays, with 1010 vias each, with chip’s MOSFETs
Manipulating fluids: Advances in micro-fluidics, opto-fluidics and fluidic self assembly
NASA Astrophysics Data System (ADS)
Vyawahare, Saurabh
This dissertation describes work in three inter-related areas---micro-fluidics, opto-fluidics and fluidic self-assembly. Micro-fluidics has gotten a boost in recent years with the development of multilayered elastomeric devices made of poly (dimethylsiloxane) (PDMS), allowing active elements like valves and pumps. However, while PDMS has many advantages, it is not resistant to organic solvents. New materials and/or new designs are needed for solvent resistance. I describe how novel fluorinated elastomers can replace PDMS when combined with the three dimensional (3-D) solid printing. I also show how another 3-D fabrication method, multilayer photo-lithography, allows for fabrication of devices integrating filters. In general, 3-D fabrications allow new kinds of micro-fluidic devices to be made that would be impossible to emulate with two dimensional chips. In opto-fluidics, I describe a number of experiments with quantum dots both inside and outside chips. Inside chips, I manipulate quantum dots using hydrodynamic focusing to pattern fine lines, like a barcode. Outside chips, I describe our attempts to create quantum dot composites with micro-spheres. I also show how evaporated gold films and chemical passivation can then be used to enhance the emission of quantum dots. Finally, within fluids, self assembly is an attractive way to manipulate materials, and I provide two examples: first, a DNA-based energy transfer molecule that relies on quantum mechanics and self-assembles inside fluids. This kind of molecular photonics mimics parts of the photosynthetic apparatus of plants and bacteria. The second example of self-assembly in fluids describes a new phenomena---the surface tension mediated self assembly of particles like quantum dots and micro-spheres into fine lines. This self assembly by capillary flows can be combined with photo-lithography, and is expected to find use in future nano- and micro-fabrication schemes. In conclusion, advances in fludics, integrating materials like quantum dots and solvent resistant elastomers along with 3-D fabrication and methods of self assembly, provide a new set of tools that significantly expand our control over fluids.
Automated Absorber Attachment for X-ray Microcalorimeter Arrays
NASA Technical Reports Server (NTRS)
Moseley, S.; Allen, Christine; Kilbourne, Caroline; Miller, Timothy M.; Costen, Nick; Schulte, Eric; Moseley, Samuel J.
2007-01-01
Our goal is to develop a method for the automated attachment of large numbers of absorber tiles to large format detector arrays. This development includes the fabrication of high quality, closely spaced HgTe absorber tiles that are properly positioned for pick-and-place by our FC150 flip chip bonder. The FC150 also transfers the appropriate minute amount of epoxy to the detectors for permanent attachment of the absorbers. The success of this development will replace an arduous, risky and highly manual task with a reliable, high-precision automated process.
Ice-assisted transfer of carbon nanotube arrays.
Wei, Haoming; Wei, Yang; Lin, Xiaoyang; Liu, Peng; Fan, Shoushan; Jiang, Kaili
2015-03-11
Decoupling the growth and the application of nanomaterials by transfer is an important issue in nanotechnology. Here, we developed an efficient transfer technique for carbon nanotube (CNT) arrays by using ice as a binder to temporarily bond the CNT array and the target substrate. Ice makes it an ultraclean transfer because the evaporation of ice ensures that no contaminants are introduced. The transferred superaligned carbon nanotube (SACNT) arrays not only keep their original appearance and initial alignment but also inherit their spinnability, which is the most desirable feature. The transfer-then-spin strategy can be employed to fabricate patterned CNT arrays, which can act as 3-dimensional electrodes in CNT thermoacoustic chips. Besides, the flip-chipped CNTs are promising field electron emitters. Furthermore, the ice-assisted transfer technique provides a cost-effective solution for mass production of SACNTs, giving CNT technologies a competitive edge, and this method may inspire new ways to transfer other nanomaterials.
Integrated microsystems packaging approach with LCP
NASA Astrophysics Data System (ADS)
Jaynes, Paul; Shacklette, Lawrence W.
2006-05-01
Within the government communication market there is an increasing push to further miniaturize systems with the use of chip-scale packages, flip-chip bonding, and other advances over traditional packaging techniques. Harris' approach to miniaturization includes these traditional packaging advances, but goes beyond this level of miniaturization by combining the functional and structural elements of a system, thus creating a Multi-Functional Structural Circuit (MFSC). An emerging high-frequency, near hermetic, thermoplastic electronic substrate material, Liquid Crystal Polymer (LCP), is the material that will enable the combination of the electronic circuit and the physical structure of the system. The first embodiment of this vision for Harris is the development of a battlefield acoustic sensor module. This paper will introduce LCP and its advantages for MFSC, present an example of the work that Harris has performed, and speak to LCP MFSCs' potential benefits to miniature communications modules and sensor platforms.
Detection of trace microcystin-LR on a 20 MHz QCM sensor coated with in situ self-assembled MIPs.
He, Hao; Zhou, Lianqun; Wang, Yi; Li, Chuanyu; Yao, Jia; Zhang, Wei; Zhang, Qingwen; Li, Mingyu; Li, Haiwen; Dong, Wen-fei
2015-01-01
A 20 MHz quartz crystal microbalance (QCM) sensor coated with in situ self-assembled molecularly imprinted polymers (MIPs) was presented for the detection of trace microcystin-LR (MC-LR) in drinking water. The sensor performance obtained using the in situ self-assembled MIPs was compared with traditionally synthesized MIPs on 20 MHz and normal 10 MHz QCM chip. The results show that the response increases by more than 60% when using the in situ self-assembly method compared using the traditionally method while the 20 MHz QCM chip provides four-fold higher response than the 10 MHz one. Therefore, the in situ self-assembled MIPs coated on a high frequency QCM chip was used in the sensor performance test to detect MC-LR in tap water. It showed a limit of detection (LOD) of 0.04 nM which is lower than the safety guideline level (1 nM MC-LR) of drinking water in China. The low sensor response to other analogs indicated the high specificity of the sensor to MC-LR. The sensor showed high stability and low signal variation less than 2.58% after regeneration. The lake water sample analysis shows the sensor is possible for practical use. The combination of the higher frequency QCM with the in situ self-assembled MIPs provides a good candidate for the detection of other small molecules. Copyright © 2014 Elsevier B.V. All rights reserved.
Thermal cycling test results of CSP and RF assemblies
NASA Technical Reports Server (NTRS)
Ghaffarian, R.; Nelson, G.; Cooper, M.; Lam, D.; Strudler, S.; Umdekar, A.; Selk, K.; Bjorndahl, B.; Duprey, R.
2000-01-01
A JPL-led chip scale package (CSP) Consortium of enterprises, composed of representing agencies and private companies, recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.
3D packaging of a microfluidic system with sensory applications
NASA Astrophysics Data System (ADS)
Morrissey, Anthony; Kelly, Gerard; Alderman, John C.
1997-09-01
Among the main benefits of microsystem technology are its contributions to cost reductio, reliability and improved performance. however, the packaging of microsystems, and particularly microsensor, has proven to be one of the biggest limitations to their commercialization and the packaging of silicon sensor devices can be the most costly part of their fabrication. This paper describes the integration of 3D packaging of a microsystem. Central to the operation of the 3D demonstrator is a micromachined silicon membrane pump to supply fluids to a sensing chamber constructed about the active area of a sensor chip. This chip carries ISFET based chemical sensors, pressure sensors and thermal sensors. The electronics required for controlling and regulating the activity of the various sensors ar also available on this chip and as other chips in the 3D assembly. The demonstrator also contains a power supply module with optical fiber interconnections. All of these modules are integrated into a single plastic- encapsulated 3D vertical multichip module. The reliability of such a structure, initially proposed by Val was demonstrated by Barrett et al. An additional module available for inclusion in some of our assemblies is a test chip capable of measuring the packaging-induced stress experienced during and after assembly. The packaging process described produces a module with very high density and utilizes standard off-the-shelf components to minimize costs. As the sensor chip and micropump include micromachined silicon membranes and microvalves, the packaging of such structures has to allow consideration for the minimization of the packaging-induced stresses. With this in mind, low stress techniques, including the use of soft glob-top materials, were employed.
Liu, Xingtong; Zhou, Shengjun; Gao, Yilin; Hu, Hongpo; Liu, Yingce; Gui, Chengqun; Liu, Sheng
2017-12-01
We demonstrate a GaN-based flip-chip LED (FC-LED) with a highly reflective indium-tin oxide (ITO)/distributed Bragg reflector (DBR) ohmic contact. A transparent ITO current spreading layer combined with Ta 2 O 5 /SiO 2 double DBR stacks is used as a reflective p-type ohmic contact in the FC-LED. We develop a strip-shaped SiO 2 current blocking layer, which is well aligned with a p-electrode, to prevent the current from crowding around the p-electrode. Our combined numerical simulation and experimental results revealed that the FC-LED with ITO/DBR has advantages of better current spreading and superior heat dissipation performance compared to top-emitting LEDs (TE-LEDs). As a result, the light output power (LOP) of the FC-LED with ITO/DBR was 7.6% higher than that of the TE-LED at 150 mA, and the light output saturation current was shifted from 130.9 A/cm 2 for the TE-LED to 273.8 A/cm 2 for the FC-LED with ITO/DBR. Owing to the high reflectance of the ITO/DBR ohmic contact, the LOP of the FC-LED with ITO/DBR was 13.0% higher than that of a conventional FC-LED with Ni/Ag at 150 mA. However, because of the better heat dissipation of the Ni/Ag ohmic contact, the conventional FC-LED with Ni/Ag exhibited higher light output saturation current compared to the FC-LED with ITO/DBR.
Towards co-packaging of photonics and microelectronics in existing manufacturing facilities
NASA Astrophysics Data System (ADS)
Janta-Polczynski, Alexander; Cyr, Elaine; Bougie, Jerome; Drouin, Alain; Langlois, Richard; Childers, Darrell; Takenobu, Shotaro; Taira, Yoichi; Lichoulas, Ted W.; Kamlapurkar, Swetha; Engelmann, Sebastian; Fortier, Paul; Boyer, Nicolas; Barwicz, Tymon
2018-02-01
The impact of integrated photonics on optical interconnects is currently muted by challenges in photonic packaging and in the dense integration of photonic modules with microelectronic components on printed circuit boards. Single mode optics requires tight alignment tolerance for optical coupling and maintaining this alignment in a cost-efficient package can be challenging during thermal excursions arising from downstream microelectronic assembly processes. In addition, the form factor of typical fiber connectors is incompatible with the dense module integration expected on printed circuit boards. We have implemented novel approaches to interfacing photonic chips to standard optical fibers. These leverage standard high throughput microelectronic assembly tooling and self-alignment techniques resulting in photonic packaging that is scalable in manufacturing volume and in the number of optical IOs per chip. In addition, using dense optical fiber connectors with space-efficient latching of fiber patch cables results in compact module size and efficient board integration, bringing the optics closer to the logic chip to alleviate bandwidth bottlenecks. This packaging direction is also well suited for embedding optics in multi-chip modules, including both photonic and microelectronic chips. We discuss the challenges and rewards in this type of configuration such as thermal management and signal integrity.
1979-10-19
A optical input from a laser ggw system . The photodetector assembly shall consist of two chips: (1) photodiode chip and (2) preamplifier chip. The...181 4.1 Transienit Gamm ------ - 182 4.2 Therm~al Noise ------------------- 186 2 1 System F’unatioma Diagram -B 2 Bonding...5 2u.0 ed IG o Hl MM The desJign reurnents of the DIM~ Pbto detector System are - The system sball 1eev a 300 nhnowatt, (Min.) 63282 signal from a
A Versatile Microfluidic Device for Automating Synthetic Biology.
Shih, Steve C C; Goyal, Garima; Kim, Peter W; Koutsoubelis, Nicolas; Keasling, Jay D; Adams, Paul D; Hillson, Nathan J; Singh, Anup K
2015-10-16
New microbes are being engineered that contain the genetic circuitry, metabolic pathways, and other cellular functions required for a wide range of applications such as producing biofuels, biobased chemicals, and pharmaceuticals. Although currently available tools are useful in improving the synthetic biology process, further improvements in physical automation would help to lower the barrier of entry into this field. We present an innovative microfluidic platform for assembling DNA fragments with 10× lower volumes (compared to that of current microfluidic platforms) and with integrated region-specific temperature control and on-chip transformation. Integration of these steps minimizes the loss of reagents and products compared to that with conventional methods, which require multiple pipetting steps. For assembling DNA fragments, we implemented three commonly used DNA assembly protocols on our microfluidic device: Golden Gate assembly, Gibson assembly, and yeast assembly (i.e., TAR cloning, DNA Assembler). We demonstrate the utility of these methods by assembling two combinatorial libraries of 16 plasmids each. Each DNA plasmid is transformed into Escherichia coli or Saccharomyces cerevisiae using on-chip electroporation and further sequenced to verify the assembly. We anticipate that this platform will enable new research that can integrate this automated microfluidic platform to generate large combinatorial libraries of plasmids and will help to expedite the overall synthetic biology process.
Knuesel, Robert J.; Jacobs, Heiko O.
2010-01-01
This paper introduces a method for self-assembling and electrically connecting small (20–60 micrometer) semiconductor chiplets at predetermined locations on flexible substrates with high speed (62500 chips/45 s), accuracy (0.9 micrometer, 0.14°), and yield (> 98%). The process takes place at the triple interface between silicone oil, water, and a penetrating solder-patterned substrate. The assembly is driven by a stepwise reduction of interfacial free energy where chips are first collected and preoriented at an oil-water interface before they assemble on a solder-patterned substrate that is pulled through the interface. Patterned transfer occurs in a progressing linear front as the liquid layers recede. The process eliminates the dependency on gravity and sedimentation of prior methods, thereby extending the minimal chip size to the sub-100 micrometer scale. It provides a new route for the field of printable electronics to enable the integration of microscopic high performance inorganic semiconductors on foreign substrates with the freedom to choose target location, pitch, and integration density. As an example we demonstrate a fault-tolerant segmented flexible monocrystalline silicon solar cell, reducing the amount of Si that is used when compared to conventional rigid cells. PMID:20080682
Barbee, Kristopher D.; Hsiao, Alexander P.; Roller, Eric E.; Huang, Xiaohua
2011-01-01
We report the development of a microfabricated electrophoretic device for assembling high-density arrays of antibody-conjugated microbeads for chip-based protein detection. The device consists of a flow cell formed between a gold-coated silicon chip with an array of microwells etched in a silicon dioxide film and a glass coverslip with a series of thin gold counter electrode lines. We have demonstrated that 0.4 and 1 μm beads conjugated with antibodies can be rapidly assembled into the microwells by applying a pulsed electric field across the chamber. By assembling step-wise a mixture of fluorescently labeled antibody-conjugated microbeads, we incorporated both spatial and fluorescence encoding strategies to demonstrate significant multiplexing capabilities. We have shown that these antibody-conjugated microbead arrays can be used to perform on-chip sandwich immunoassays to detect test antigens at concentrations as low as 40 pM (6 ng/mL). A finite element model was also developed to examine the electric field distribution within the device for different counter electrode configurations over a range of line pitches and chamber heights. This device will be useful for assembling high-density, encoded antibody arrays for multiplexed detection of proteins and other types of protein-conjugated microbeads for applications such as the analysis of protein-protein interactions. PMID:20820631
An Implantable Neural Sensing Microsystem with Fiber-Optic Data Transmission and Power Delivery
Park, Sunmee; Borton, David A.; Kang, Mingyu; Nurmikko, Arto V.; Song, Yoon-Kyu
2013-01-01
We have developed a prototype cortical neural sensing microsystem for brain implantable neuroengineering applications. Its key feature is that both the transmission of broadband, multichannel neural data and power required for the embedded microelectronics are provided by optical fiber access. The fiber-optic system is aimed at enabling neural recording from rodents and primates by converting cortical signals to a digital stream of infrared light pulses. In the full microsystem whose performance is summarized in this paper, an analog-to-digital converter and a low power digital controller IC have been integrated with a low threshold, semiconductor laser to extract the digitized neural signals optically from the implantable unit. The microsystem also acquires electrical power and synchronization clocks via optical fibers from an external laser by using a highly efficient photovoltaic cell on board. The implantable unit employs a flexible polymer substrate to integrate analog and digital microelectronics and on-chip optoelectronic components, while adapting to the anatomical and physiological constraints of the environment. A low power analog CMOS chip, which includes preamplifier and multiplexing circuitry, is directly flip-chip bonded to the microelectrode array to form the cortical neurosensor device. PMID:23666130
Oxide-confined 2D VCSEL arrays for high-density inter/intra-chip interconnects
NASA Astrophysics Data System (ADS)
King, Roger; Michalzik, Rainer; Jung, Christian; Grabherr, Martin; Eberhard, Franz; Jaeger, Roland; Schnitzer, Peter; Ebeling, Karl J.
1998-04-01
We have designed and fabricated 4 X 8 vertical-cavity surface-emitting laser (VCSEL) arrays intended to be used as transmitters in short-distance parallel optical interconnects. In order to meet the requirements of 2D, high-speed optical links, each of the 32 laser diodes is supplied with two individual top contacts. The metallization scheme allows flip-chip mounting of the array modules junction-side down on silicon complementary metal oxide semiconductor (CMOS) chips. The optical and electrical characteristics across the arrays with device pitch of 250 micrometers are quite homogeneous. Arrays with 3 micrometers , 6 micrometers and 10 micrometers active diameter lasers have been investigated. The small devices show threshold currents of 600 (mu) A, single-mode output powers as high as 3 mW and maximum wavelength deviations of only 3 nm. The driving characteristics of all arrays are fully compatible to advanced 3.3 V CMOS technology. Using these arrays, we have measured small-signal modulation bandwidths exceeding 10 GHz and transmitted pseudo random data at 8 Gbit/s channel over 500 m graded index multimode fiber. This corresponds to a data transmission rate of 256 Gbit/s per array of 1 X 2 mm2 footprint area.
Cell Patterning Chip for Controlling the Stem Cell Microenvironment
Rosenthal, Adam; Macdonald, Alice; Voldman, Joel
2007-01-01
Cell-cell signaling is an important component of the stem cell microenvironment, affecting both differentiation and self-renewal. However, traditional cell-culture techniques do not provide precise control over cell-cell interactions, while existing cell patterning technologies are limited when used with proliferating or motile cells. To address these limitations, we created the Bio Flip Chip (BFC), a microfabricated polymer chip containing thousands of microwells, each sized to trap down to a single stem cell. We have demonstrated the functionality of the BFC by patterning a 50×50 grid of murine embryonic stem cells (mESCs), with patterning efficiencies > 75%, onto a variety of substrates – a cell-culture dish patterned with gelatin, a 3-D substrate, and even another layer of cells. We also used the BFC to pattern small groups of cells, with and without cell-cell contact, allowing incremental and independent control of contact-mediated signaling. We present quantitative evidence that cell-cell contact plays an important role in depressing mESC colony formation, and show that E-cadherin is involved in this negative regulatory pathway. Thus, by allowing exquisite control of the cellular microenvironment, we provide a technology that enables new applications in tissue engineering and regenerative medicine. PMID:17434582
Multilayered microelectronic device package with an integral window
Peterson, Kenneth A.; Watson, Robert D.
2003-01-01
An apparatus for packaging of microelectronic devices is disclosed, wherein the package includes an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can comprise, for example, a cofired ceramic frame or body. The package has an internal stepped structure made of a plurality of plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package, according to some embodiments. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination. The integral window can further include a lens for optically transforming light passing through the window. The package can include an array of binary optic lenslets made integral with the window. The package can include an electrically-switched optical modulator, such as a lithium niobate window attached to the package, for providing a very fast electrically-operated shutter.
NASA Technical Reports Server (NTRS)
Ghaffarian, R.
2000-01-01
A JPL-led chip scale package (CSP) Consortium, composed of team members representing government agencies and private companies, recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.
2016-03-31
Corporation, Linthicum, Maryland *Corresponding author: Pavel.Borodulin@ngc.com Abstract: A chip -scale, highly-reconfigurable transmitter and...the technology has been used in a chip -scale, reconfigurable receiver demonstration and ongoing efforts to increase the level of performance and...circuit (RF-FPGA). It consists of a heterogeneous assembly of a SiGe BiCMOS chip with multiple 3D-integrated, low-loss, phase-change switch chiplets
Integrated circuit package with lead structure and method of preparing the same
NASA Technical Reports Server (NTRS)
Kennedy, B. W. (Inventor)
1973-01-01
A beam-lead integrated circuit package assembly including a beam-lead integrated circuit chip, a lead frame array bonded to projecting fingers of the chip, a rubber potting compound disposed around the chip, and an encapsulating molded plastic is described. The lead frame array is prepared by photographically printing a lead pattern on a base metal sheet, selectively etching to remove metal between leads, and plating with gold. Joining of the chip to the lead frame array is carried out by thermocompression bonding of mating goldplated surfaces. A small amount of silicone rubber is then applied to cover the chip and bonded joints, and the package is encapsulated with epoxy resin, applied by molding.
From the Cover: Understanding nature's design for a nanosyringe
NASA Astrophysics Data System (ADS)
Lopez, Carlos F.; Nielsen, Steve O.; Moore, Preston B.; Klein, Michael L.
2004-03-01
Synthetic and natural peptide assemblies can possess transport or conductance activity across biomembranes through the formation of nanopores. The fundamental mechanisms of membrane insertion necessary for antimicrobial or synthetic pore formation are poorly understood. We observe a lipid-assisted mechanism for passive insertion into a model membrane from molecular dynamics simulations. The assembly used in the study, a generic nanotube functionalized with hydrophilic termini, is assisted in crossing the membrane core by transleaflet lipid flips. Lipid tails occlude a purely hydrophobic nanotube. The observed insertion mechanism requirements for hydrophobic-hydrophilic matching have implications for the design of synthetic channels and antibiotics.
A Multipurpose CMOS Platform for Nanosensing
Bonanno, Alberto; Sanginario, Alessandro; Marasso, Simone L.; Miccoli, Beatrice; Bejtka, Katarzyna; Benetto, Simone; Demarchi, Danilo
2016-01-01
This paper presents a customizable sensing system based on functionalized nanowires (NWs) assembled onto complementary metal oxide semiconductor (CMOS) technology. The Micro-for-Nano (M4N) chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP) generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC) that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μm × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW–229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus. PMID:27916911
A Multipurpose CMOS Platform for Nanosensing.
Bonanno, Alberto; Sanginario, Alessandro; Marasso, Simone L; Miccoli, Beatrice; Bejtka, Katarzyna; Benetto, Simone; Demarchi, Danilo
2016-11-30
This paper presents a customizable sensing system based on functionalized nanowires (NWs) assembled onto complementary metal oxide semiconductor (CMOS) technology. The Micro-for-Nano (M4N) chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP) generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC) that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μ m × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW-229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus.
On-Chip Single-Plasmon Nanocircuit Driven by a Self-Assembled Quantum Dot.
Wu, Xiaofei; Jiang, Ping; Razinskas, Gary; Huo, Yongheng; Zhang, Hongyi; Kamp, Martin; Rastelli, Armando; Schmidt, Oliver G; Hecht, Bert; Lindfors, Klas; Lippitz, Markus
2017-07-12
Quantum photonics holds great promise for future technologies such as secure communication, quantum computation, quantum simulation, and quantum metrology. An outstanding challenge for quantum photonics is to develop scalable miniature circuits that integrate single-photon sources, linear optical components, and detectors on a chip. Plasmonic nanocircuits will play essential roles in such developments. However, for quantum plasmonic circuits, integration of stable, bright, and narrow-band single photon sources in the structure has so far not been reported. Here we present a plasmonic nanocircuit driven by a self-assembled GaAs quantum dot. Through a planar dielectric-plasmonic hybrid waveguide, the quantum dot efficiently excites narrow-band single plasmons that are guided in a two-wire transmission line until they are converted into single photons by an optical antenna. Our work demonstrates the feasibility of fully on-chip plasmonic nanocircuits for quantum optical applications.
1989-10-01
flip-flop to its CYCLE mode via control signal END- ABORTO and selects the idle frames through multiplexer M2 by removing the control signal ABORTO ...F-d LL 0 * H z 209 6.8.2.2.3 Message Block Assembler. The ABORTO , IDLEO, and SKIPO pulses from the receiving logic, as well as EMPTYO signal from the
Thermoacoustic chips with carbon nanotube thin yarn arrays.
Wei, Yang; Lin, Xiaoyang; Jiang, Kaili; Liu, Peng; Li, Qunqing; Fan, Shoushan
2013-10-09
Aligned carbon nanotube (CNT) films drawn from CNT arrays have shown the potential as thermoacoustic loudspeakers. CNT thermoacoustic chips with robust structures are proposed to promote the applications. The silicon-based chips can play sound and fascinating rhythms by feeding alternating currents and audio signal to the suspending CNT thin yarn arrays across grooves in them. In additional to the thin yarns, experiments further revealed more essential elements of the chips, the groove depth and the interdigital electrodes. The sound pressure depends on the depth of the grooves, and the thermal wavelength can be introduced to define the influence-free depth. The interdigital fingers can effectively reduce the driving voltage, making the chips safe and easy to use. The chips were successfully assembled into earphones and have been working stably for about one year. The thermoacoustic chips can find many applications in consumer electronics and possibly improve the audiovisual experience.
NASA Astrophysics Data System (ADS)
Roscher, Hendrik; Gerlach, Philipp; Khan, Faisal Nadeem; Kroner, Andrea; Stach, Martin; Weigl, Alexander; Michalzik, Rainer
2006-04-01
We present flip-chip attached high-speed VCSELs in 2-D arrays with record-high intra-cell packing densities. The advances of VCSEL array technology toward improved thermal performance and more efficient fabrication are reviewed, and the introduction of self-aligned features to these devices is pointed out. The structure of close-spaced wedge-shaped VCSELs is discussed and their static and dynamic characteristics are presented including an examination of the modal structure by near-field measurements. The lasers flip-chip bonded to a silicon-based test platform exhibit 3-dB and 10-dB bandwidths of 7.7 GHz and 9.8 GHz, respectively. Open 12.5 Gbit/s two-level eye patterns are demonstrated. We discuss the uses of high packing densities for the increase of the total amount of data throughput an array can deliver in the course of its life. One such approach is to provide up to two backup VCSELs per fiber channel that can extend the lifetimes of parallel transmitters through redundancy of light sources. Another is to increase the information density by using multiple VCSELs per 50 μm core diameter multimode fiber to generate more complex signals. A novel scheme using three butt-coupled VCSELs per fiber for the generation of four-level signals in the optical domain is proposed. First experiments are demonstrated using two VCSELs butt-coupled to the same standard glass fiber, each modulated with two-level signals to produce four-level signals at the photoreceiver. A four-level direct modulation of one VCSEL within a triple of devices produced first 20.6 Gbit/s (10.3 Gsymbols/s) four-level eyes, leaving two VCSELs as backup sources.
Life test of the InGaAs focal plane arrays detector for space applications
NASA Astrophysics Data System (ADS)
Zhu, Xian-Liang; Zhang, Hai-Yan; Li, Xue; Huang, Zhang-Cheng; Gong, Hai-Mei
2017-08-01
The short-wavelength infrared (SWIR) InGaAs focal plane array (FPA) detector consists of infrared detector chip, readout integrated circuit (ROIC), and flip-chip bonding interconnection by Indium bump. In order to satisfy space application requirements for failure rates or Mean Time to Failure (MTTF), which can only be demonstrated with the large number of detectors manufactured, the single pixel in InGaAs FPAs was chosen as the research object in this paper. The constant-stress accelerated life tests were carried out at 70°C 80°C 90°C and100°C. The failed pixels increased gradually during more than 14000 hours at each elevated temperatures. From the random failure data the activation energy was estimated to be 0.46eV, and the average lifetime of a single pixel in InGaAs FPAs was estimated to be longer than 1E+7h at the practical operating temperature (5°C).
NASA Astrophysics Data System (ADS)
Stolyarova, Sara; Shemesh, Ariel; Aharon, Oren; Cohen, Omer; Gal, Lior; Eichen, Yoav; Nemirovsky, Yael
This study focuses on arrays of cantilevers made of crystalline silicon (c-Si), using SOI wafers as the starting material and using bulk micromachining. The arrays are subsequently transformed into composite porous silicon-crystalline silicon cantilevers, using a unique vapor phase process tailored for providing a thin surface layer of porous silicon on one side only. This results in asymmetric cantilever arrays, with one side providing nano-structured porous large surface, which can be further coated with polymers, thus providing additional sensing capabilities and enhanced sensing. The c-Si cantilevers are vertically integrated with a bottom silicon die with electrodes allowing electrostatic actuation. Flip Chip bonding is used for the vertical integration. The readout is provided by a sensitive Capacitance to Digital Converter. The fabrication, processing and characterization results are reported. The reported study is aimed towards achieving miniature cantilever chips with integrated readout for sensing explosives and chemical warfare agents in the field.
Titanium dioxide nanowire sensor array integration on CMOS platform using deterministic assembly.
Gall, Oren Z; Zhong, Xiahua; Schulman, Daniel S; Kang, Myungkoo; Razavieh, Ali; Mayer, Theresa S
2017-06-30
Nanosensor arrays have recently received significant attention due to their utility in a wide range of applications, including gas sensing, fuel cells, internet of things, and portable health monitoring systems. Less attention has been given to the production of sensor platforms in the μW range for ultra-low power applications. Here, we discuss how to scale the nanosensor energy demand by developing a process for integration of nanowire sensing arrays on a monolithic CMOS chip. This work demonstrates an off-chip nanowire fabrication method; subsequently nanowires link to a fused SiO 2 substrate using electric-field assisted directed assembly. The nanowire resistances shown in this work have the highest resistance uniformity reported to date of 18%, which enables a practical roadmap towards the coupling of nanosensors to CMOS circuits and signal processing systems. The article also presents the utility of optimizing annealing conditions of the off-chip metal-oxides prior to CMOS integration to avoid limitations of thermal budget and process incompatibility. In the context of the platform demonstrated here, directed assembly is a powerful tool that can realize highly uniform, cross-reactive arrays of different types of metal-oxide nanosensors suited for gas discrimination and signal processing systems.
Titanium dioxide nanowire sensor array integration on CMOS platform using deterministic assembly
NASA Astrophysics Data System (ADS)
Gall, Oren Z.; Zhong, Xiahua; Schulman, Daniel S.; Kang, Myungkoo; Razavieh, Ali; Mayer, Theresa S.
2017-06-01
Nanosensor arrays have recently received significant attention due to their utility in a wide range of applications, including gas sensing, fuel cells, internet of things, and portable health monitoring systems. Less attention has been given to the production of sensor platforms in the μW range for ultra-low power applications. Here, we discuss how to scale the nanosensor energy demand by developing a process for integration of nanowire sensing arrays on a monolithic CMOS chip. This work demonstrates an off-chip nanowire fabrication method; subsequently nanowires link to a fused SiO2 substrate using electric-field assisted directed assembly. The nanowire resistances shown in this work have the highest resistance uniformity reported to date of 18%, which enables a practical roadmap towards the coupling of nanosensors to CMOS circuits and signal processing systems. The article also presents the utility of optimizing annealing conditions of the off-chip metal-oxides prior to CMOS integration to avoid limitations of thermal budget and process incompatibility. In the context of the platform demonstrated here, directed assembly is a powerful tool that can realize highly uniform, cross-reactive arrays of different types of metal-oxide nanosensors suited for gas discrimination and signal processing systems.
Chip bonding of low-melting eutectic alloys by transmitted laser radiation
NASA Astrophysics Data System (ADS)
Hoff, Christian; Venkatesh, Arjun; Schneider, Friedrich; Hermsdorf, Jörg; Bengsch, Sebastian; Wurz, Marc C.; Kaierle, Stefan; Overmeyer, Ludger
2017-06-01
Present-day thermode bond systems for the assembly of radio-frequency identification (RFID) chips are mechanically inflexible, difficult to control, and will not meet future manufacturing challenges sufficiently. Chip bonding, one of the key processes in the production of integrated circuits (ICs), has a high potential for optimization with respect to process duration and process flexibility. For this purpose, the technologies used, so far, are supposed to be replaced by a transmission laser-bonding process using low-melting eutectic alloys. In this study, successful bonding investigations of mock silicon chips and of RFID chips on flexible polymer substrates are presented using the low-melting eutectic alloy, 52In48Sn, and a laser with a wavelength of 2 μm.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Cornell, Thomas A.; Srivastava, Yogesh; Jauch, Ralf
Cage proteins assemble into nanoscale structures with large central cavities. They play roles, including those as virus capsids and chaperones, and have been applied to drug delivery and nanomaterials. Furthermore, protein cages have been used as model systems to understand and design protein quaternary structure. Ferritins are ubiquitous protein cages that manage iron homeostasis and oxidative damage. Two ferritin subfamilies have strongly similar tertiary structure yet distinct quaternary structure: maxi-ferritins normally assemble into 24-meric, octahedral cages with C-terminal E-helices centered around 4-fold symmetry axes, and mini-ferritins are 12-meric, tetrahedral cages with 3-fold axes defined by C-termini lacking E-domains. To understandmore » the role E-domains play in ferritin quaternary structure, we previously designed a chimera of a maxi-ferritin E-domain fused to the C-terminus of a mini-ferritin. The chimera is a 12-mer cage midway in size between those of the maxi- and mini-ferritin. The research described herein sets out to understand (a) whether the increase in size over a typical mini-ferritin is due to a frozen state where the E-domain is flipped out of the cage and (b) whether the symmetrical preference of the E-domain in the maxi-ferritin (4-fold axis) overrules the C-terminal preference in the mini-ferritin (3-fold axis). With a 1.99 Å resolution crystal structure, we determined that the chimera assembles into a tetrahedral cage that can be nearly superimposed with the parent mini-ferritin, and that the E-domains are flipped external to the cage at the 3-fold symmetry axes.« less
Iqbal, Mohd Shameel; Siddiqui, Asim Azhar; Banerjee, Chinmoy; Nag, Shiladitya; Mazumder, Somnath; De, Rudranil; Saha, Shubhra Jyoti; Karri, Suresh Kumar; Bandyopadhyay, Uday
Retromer complex plays a crucial role in intracellular protein trafficking and is conserved throughout the eukaryotes including malaria parasite, Plasmodium falciparum, where it is partially conserved. The assembly of retromer complex in RBC stages of malarial parasite is extremely difficult to explore because of its complicated physiology, small size, and intra-erythrocytic location. Nonetheless, understanding of retromer assembly may pave new ways for the development of novel antimalarials targeting parasite-specific protein trafficking pathways. Here, we investigated the assembly of retromer complex in P. falciparum, by an immunosensing method through highly sensitive Surface Plasmon Resonance (SPR) technique. After taking leads from the bioinformatics search and literature, different interacting proteins were identified and specific antibodies were raised against them. The sensor chip was prepared by covalently linking antibody specific to one component and the whole cell lysate was passed through it in order to trap the interacting complex. Antibodies raised against other interacting components were used to detect them in the trapped complex on the SPR chip. We were able to detect three different components in the retromer complex trapped by the immobilized antibody specific against a different component on a sensor chip. The assay was reproduced and validated in a different two-component CD74-MIF system in mammalian cells. We, thus, illustrate the assembly of retromer complex in P. falciparum through a bio-sensing approach that combines SPR with immunosensing requiring a very small amount of sample from the native source. Copyright © 2018 Elsevier B.V. All rights reserved.
Memristor-CMOS hybrid integrated circuits for reconfigurable logic.
Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley
2009-10-01
Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.
Off-line, built-in test techniques for VLSI circuits
NASA Technical Reports Server (NTRS)
Buehler, M. G.; Sievers, M. W.
1982-01-01
It is shown that the use of redundant on-chip circuitry improves the testability of an entire VLSI circuit. In the study described here, five techniques applied to a two-bit ripple carry adder are compared. The techniques considered are self-oscillation, self-comparison, partition, scan path, and built-in logic block observer. It is noted that both classical stuck-at faults and nonclassical faults, such as bridging faults (shorts), stuck-on x faults where x may be 0, 1, or vary between the two, and parasitic flip-flop faults occur in IC structures. To simplify the analysis of the testing techniques, however, a stuck-at fault model is assumed.
NASA Technical Reports Server (NTRS)
Decrossas, Emmanuel; Glover, Michael D.; Porter, Kaoru; Cannon, Tom; Mantooth, H. Alan; Hamilton, M. C.
2013-01-01
Various stripline structures and flip chip interconnect designs for high-speed digital communication systems implemented in low temperature co-fired ceramic (LTCC) substrates are studied in this paper. Specifically, two different transition designs from edge launch 2.4 millimeter connectors to stripline transmission lines embedded in LTCC are discussed. After characterizing the DuPont (sup trademark) 9K7 green tape, different designs are proposed to improve signal integrity for high-speed digital data. The full-wave simulations and experimental data validate the presented designs over a broad frequency band from Direct Current to 50 gigahertz and beyond.
Research on defects inspection of solder balls based on eddy current pulsed thermography.
Zhou, Xiuyun; Zhou, Jinlong; Tian, Guiyun; Wang, Yizhe
2015-10-13
In order to solve tiny defect detection for solder balls in high-density flip-chip, this paper proposed feasibility study on the effect of detectability as well as classification based on eddy current pulsed thermography (ECPT). Specifically, numerical analysis of 3D finite element inductive heat model is generated to investigate disturbance on the temperature field for different kind of defects such as cracks, voids, etc. The temperature variation between defective and non-defective solder balls is monitored for defects identification and classification. Finally, experimental study is carried on the diameter 1mm tiny solder balls by using ECPT and verify the efficacy of the technique.
NASA Astrophysics Data System (ADS)
Takeda, Yasunori; Yoshimura, Yudai; Adib, Faiz Adi Ezarudin Bin; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo
2015-04-01
Organic reset-set (RS) flip-flop logic circuits based on pseudo-CMOS inverters have been fabricated using full solution processing at a relatively low process temperatures of 150 °C or less. The work function for printed silver electrodes was increased from 4.7 to 5.4 eV through surface modification with a self-assembled monolayer (SAM) material. A bottom-gate, bottom-contact organic thin-film transistor (OTFT) device using a solution-processable small-molecular semiconductor material exhibited field-effect mobility of 0.40 cm2 V-1 s-1 in the saturation region and a threshold voltage (VTH) of -2.4 V in ambient air operation conditions. In order to reduce the variations in mobility and VTH, we designed a circuit with six transistors arranged in parallel, in order to average out their electrical characteristics. As a result, we have succeeded in reducing these variations without changing the absolute values of the mobility and VTH. The fabricated RS flip-flop circuits were functioned well and exhibited short delay times of 3.5 ms at a supply voltage of 20 V.
An assembler for the MOS Technology 6502 microprocessor as implemented in jolt (TM) and KIM-1 (TM)
NASA Technical Reports Server (NTRS)
Lilley, R. W.
1976-01-01
Design of low-cost, microcomputer-based navigation receivers, and the assembler are described. The development of computer software for microprocessors is materially aided by the assembler program using mnemonic variable names. The flexibility of the environment provided by the IBM's Virtual Machine Facility and the Conversational Monitor System, make possible the convenient assembler access. The implementation of the assembler for the microprocessor chip serves a part of the present need and forms a model for support of other microprocessors.
NASA Astrophysics Data System (ADS)
Zheng, Xuezhe; Marchand, Philippe J.; Huang, Dawei; Kibar, Osman; Ozkan, Nur S. E.; Esener, Sadik C.
1999-09-01
We present a proof of concept and a feasibility demonstration of a practical packaging approach in which free-space optical interconnects (FSOI s) can be integrated simply on electronic multichip modules (MCM s) for intra-MCM board interconnects. Our system-level packaging architecture is based on a modified folded 4 f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution. The prototypical system as built supports 48 independent FSOI channels with 8 separate laser and detector chips, for which each chip consists of a one-dimensional array of 12 devices. All the chips are assembled on a single substrate that consists of a printed circuit board or a ceramic MCM. Optical link channel efficiencies of greater than 90% and interchannel cross talk of less than 20 dB at low frequency have been measured. The system is compact at only 10 in. 3 (25.4 cm 3 ) and is scalable, as it can easily accommodate additional chips as well as two-dimensional optoelectronic device arrays for increased interconnection density.
Adjustment of multi-CCD-chip-color-camera heads
NASA Astrophysics Data System (ADS)
Guyenot, Volker; Tittelbach, Guenther; Palme, Martin
1999-09-01
The principle of beam-splitter-multi-chip cameras consists in splitting an image into differential multiple images of different spectral ranges and in distributing these onto separate black and white CCD-sensors. The resulting electrical signals from the chips are recombined to produce a high quality color picture on the monitor. Because this principle guarantees higher resolution and sensitivity in comparison to conventional single-chip camera heads, the greater effort is acceptable. Furthermore, multi-chip cameras obtain the compete spectral information for each individual object point while single-chip system must rely on interpolation. In a joint project, Fraunhofer IOF and STRACON GmbH and in future COBRA electronic GmbH develop methods for designing the optics and dichroitic mirror system of such prism color beam splitter devices. Additionally, techniques and equipment for the alignment and assembly of color beam splitter-multi-CCD-devices on the basis of gluing with UV-curable adhesives have been developed, too.
Fromherz, Peter
2006-12-01
We consider the direct electrical interfacing of semiconductor chips with individual nerve cells and brain tissue. At first, the structure of the cell-chip contact is studied. Then we characterize the electrical coupling of ion channels--the electrical elements of nerve cells--with transistors and capacitors in silicon chips. On that basis it is possible to implement signal transmission between microelectronics and the microionics of nerve cells in both directions. Simple hybrid neuroelectronic systems are assembled with neuron pairs and with small neuronal networks. Finally, the interfacing with capacitors and transistors is extended to brain tissue cultured on silicon chips. The application of highly integrated silicon chips allows an imaging of neuronal activity with high spatiotemporal resolution. The goal of the work is an integration of neuronal network dynamics with digital electronics on a microscopic level with respect to experiments in brain research, medical prosthetics, and information technology.
Infrared detectors and test technology of cryogenic camera
NASA Astrophysics Data System (ADS)
Yang, Xiaole; Liu, Xingxin; Xing, Mailing; Ling, Long
2016-10-01
Cryogenic camera which is widely used in deep space detection cools down optical system and support structure by cryogenic refrigeration technology, thereby improving the sensitivity. Discussing the characteristics and design points of infrared detector combined with camera's characteristics. At the same time, cryogenic background test systems of chip and detector assembly are established. Chip test system is based on variable cryogenic and multilayer Dewar, and assembly test system is based on target and background simulator in the thermal vacuum environment. The core of test is to establish cryogenic background. Non-uniformity, ratio of dead pixels and noise of test result are given finally. The establishment of test system supports for the design and calculation of infrared systems.
Monolithic THz Frequency Multipliers
NASA Technical Reports Server (NTRS)
Erickson, N. R.; Narayanan, G.; Grosslein, R. M.; Martin, S.; Mehdi, I.; Smith, P.; Coulomb, M.; DeMartinez, G.
2001-01-01
Frequency multipliers are required as local oscillator sources for frequencies up to 2.7 THz for FIRST and airborne applications. Multipliers at these frequencies have not previously been demonstrated, and the object of this work was to show whether such circuits are really practical. A practical circuit is one which not only performs as well as is required, but also can be replicated in a time that is feasible. As the frequency of circuits is increased, the difficulties in fabrication and assembly increase rapidly. Building all of the circuit on GaAs as a monolithic circuit is highly desirable to minimize the complexity of assembly, but at the highest frequencies, even a complete monolithic circuit is extremely small, and presents serious handling difficulty. This is compounded by the requirement for a very thin substrate. Assembly can become very difficult because of handling problems and critical placement. It is very desirable to make the chip big enough to that it can be seen without magnification, and strong enough that it may be picked up with tweezers. Machined blocks to house the chips present an additional challenge. Blocks with complex features are very expensive, and these also imply very critical assembly of the parts. It would be much better if the features in the block were as simple as possible and non-critical to the function of the chip. In particular, grounding and other electrical interfaces should be done in a manner that is highly reproducible.
Siebman, Coralie; Velev, Orlin D; Slaveykova, Vera I
2015-06-15
An alternative current (AC) dielectrophoretic lab-on-chip setup was evaluated as a rapid tool of capture and assembly of microalga Chlamydomonas reinhardtii in two-dimensional (2D) close-packed arrays. An electric field of 100 V·cm⁻¹, 100 Hz applied for 30 min was found optimal to collect and assemble the algae into single-layer structures of closely packed cells without inducing cellular oxidative stress. Combined with oxidative stress specific staining and fluorescence microscopy detection, the capability of using the 2D whole-cell assembly on-chip to follow the reactive oxygen species (ROS) production and oxidative stress during short-term exposure to several environmental contaminants, including mercury, methylmercury, copper, copper oxide nanoparticles (CuO-NPs), and diuron was explored. The results showed significant increase of the cellular ROS when C. reinhardtii was exposed to high concentrations of methylmercury, CuO-NPs, and 10⁻⁵ M Cu. Overall, this study demonstrates the potential of combining AC-dielectrophoretically assembled two-dimensional algal structures with cell metabolic analysis using fluorescence staining, as a rapid analytical tool for probing the effect of contaminants in highly impacted environment.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Uribe, Fernando R.; Kilgo, Alice C.; Grazier, John Mark
2008-09-01
The assembly of the BDYE detector requires the attachment of sixteen silicon (Si) processor dice (eight on the top side; eight on the bottom side) onto a low-temperature, co-fired ceramic (LTCC) substrate using 63Sn-37Pb (wt.%, Sn-Pb) in a double-reflow soldering process (nitrogen). There are 132 solder joints per die. The bond pads were gold-platinum-palladium (71Au-26Pt-3Pd, wt.%) thick film layers fired onto the LTCC in a post-process sequence. The pull strength and failure modes provided the quality metrics for the Sn-Pb solder joints. Pull strengths were measured in both the as-fabricated condition and after exposure to thermal cycling (-55/125 C; 15more » min hold times; 20 cycles). Extremely low pull strengths--referred to as the low pull strength phenomenon--were observed intermittently throughout the product build, resulting in added program costs, schedule delays, and a long-term reliability concern for the detector. There was no statistically significant correlation between the low pull strength phenomenon and (1) the LTCC 'sub-floor' lot; (2) grit blasting the LTCC surfaces prior to the post-process steps; (3) the post-process parameters; (4) the conductor pad height (thickness); (5) the dice soldering assembly sequence; or (5) the dice pull test sequence. Formation of an intermetallic compound (IMC)/LTCC interface caused by thick film consumption during either the soldering process or by solid-state IMC formation was not directly responsible for the low-strength phenomenon. Metallographic cross sections of solder joints from dice that exhibited the low pull strength behavior, revealed the presence of a reaction layer resulting from an interaction between Sn from the molten Sn-Pb and the glassy phase at the TKN/LTCC interface. The thick film porosity did not contribute, explicitly, to the occurrence of reaction layer. Rather, the process of printing the very thin conductor pads was too sensitive to minor thixotropic changes to ink, which resulted in inconsistent proportions of metal and glassy phase particles present during the subsequent firing process. The consequences were subtle, intermittent changes to the thick film microstructure that gave rise to the reaction layer and, thus, the low pull strength phenomenon. A mitigation strategy would be the use of physical vapor deposition (PVD) techniques to create thin film bond pads; this is multi-chip module, deposited (MCM-D) technology.« less
Integrated packaging of 2D MOEMS mirrors with optical position feedback
NASA Astrophysics Data System (ADS)
Baumgart, M.; Lenzhofer, M.; Kremer, M. P.; Tortschanoff, A.
2015-02-01
Many applications of MOEMS microscanners rely on accurate position feedback. For MOEMS devices which do not have intrinsic on-chip feedback, position information can be provided with optical methods, most simply by using a reflection from the backside of a MOEMS scanner. By measuring the intensity distribution of the reflected beam across a quadrant diode, one can precisely detect the mirror's deflection angles. Previously, we have presented a position sensing device, applicable to arbitrary trajectories, which is based on the measurement of the position of the reflected laser beam with a quadrant diode. In this work, we present a novel setup, which comprises the optical position feedback functionality integrated into the device package itself. The new device's System-in-Package (SiP) design is based on a flip-folded 2.5D PCB layout and fully assembled as small as 9.2×7×4 mm³ in total. The device consists of four layers, which supply the MOEMS mirror, a spacer to provide the required optical path length, the quadrant photo-diode and a laser diode to serve as the light source. In addition to describing the mechanical setup of the novel device, we will present first experimental results and optical simulation studies. Accurate position feedback is the basis for closed-loop control of the MOEMS devices, which is crucial for some applications as image projection for example. Position feedback and the possibility of closed-loop control will significantly improve the performance of these devices.
Wide-field optical detection of nanoparticles using on-chip microscopy and self-assembled nanolenses
NASA Astrophysics Data System (ADS)
Mudanyali, Onur; McLeod, Euan; Luo, Wei; Greenbaum, Alon; Coskun, Ahmet F.; Hennequin, Yves; Allier, Cédric P.; Ozcan, Aydogan
2013-03-01
The direct observation of nanoscale objects is a challenging task for optical microscopy because the scattering from an individual nanoparticle is typically weak at optical wavelengths. Electron microscopy therefore remains one of the gold standard visualization methods for nanoparticles, despite its high cost, limited throughput and restricted field-of-view. Here, we describe a high-throughput, on-chip detection scheme that uses biocompatible wetting films to self-assemble aspheric liquid nanolenses around individual nanoparticles to enhance the contrast between the scattered and background light. We model the effect of the nanolens as a spatial phase mask centred on the particle and show that the holographic diffraction pattern of this effective phase mask allows detection of sub-100 nm particles across a large field-of-view of >20 mm2. As a proof-of-concept demonstration, we report on-chip detection of individual polystyrene nanoparticles, adenoviruses and influenza A (H1N1) viral particles.
Wide-field optical detection of nanoparticles using on-chip microscopy and self-assembled nanolenses
Mudanyali, Onur; McLeod, Euan; Luo, Wei; Greenbaum, Alon; Coskun, Ahmet F.; Hennequin, Yves; Allier, Cédric P.; Ozcan, Aydogan
2013-01-01
The direct observation of nanoscale objects is a challenging task for optical microscopy because the scattering from an individual nanoparticle is typically weak at optical wavelengths. Electron microscopy therefore remains one of the gold standard visualization methods for nanoparticles, despite its high cost, limited throughput and restricted field-of-view. Here, we describe a high-throughput, on-chip detection scheme that uses biocompatible wetting films to self-assemble aspheric liquid nanolenses around individual nanoparticles to enhance the contrast between the scattered and background light. We model the effect of the nanolens as a spatial phase mask centred on the particle and show that the holographic diffraction pattern of this effective phase mask allows detection of sub-100 nm particles across a large field-of-view of >20 mm2. As a proof-of-concept demonstration, we report on-chip detection of individual polystyrene nanoparticles, adenoviruses and influenza A (H1N1) viral particles. PMID:24358054
NASA Astrophysics Data System (ADS)
Wu, Yuan-Yun
In this dissertation, fluxless silver (Ag)-indium (In) binary system bonding and Ag solid-state bonding are used between different bonded pairs which have large thermal expansion coefficient (CTE) mismatch and flip-chip interconnect bonding application. In contrast to the conventional soldering process, fluxless bonding technique eliminates contamination and reliability problems caused by flux to fabricate high quality joints. There are two section are reported. In the first section, the reactions of Ag-In binary system are presented. In the second section, the high melting temperature, thermal and electrical conductivity joint materials bonding by either Ag-In binary system bonding or solid-state bonding processes for different bonded pairs and flip-chip application are designed, developed, and reported. Our group have studied Ag-In system for several years and developed the bonding processes successfully. However, the detailed reactions of Ag and In were seldom studied. To design a proper bonding structure, it is necessary to understand the reaction between Ag and In. The systematic experiments were performed to investigate these reactions. A 40 um Ag layer was electroplated on copper (Cu) substrates, followed by indium layers of 1, 3, 5, 10, and 15 um, respectively. The samples were annealed at 180 °C in 0.1 torr vacuum. For samples with In thickness less than 5 mum, the joint compositions are Ag2In only (1 um) or AgIn2, Ag2In, and Ag solid solution (Ag) after annealing. No indium is identified. For 10 and 15 um thick In samples, In covers almost over the entire sample surface after annealing. Later, an Ag layer was annealed at 450 °C for 3 hours to grow Ag grains, followed by plating 10 um In and annealing at 180 °C. By annealing Ag before plating In, more In is kept in the structure during annealing at 180 °C. Based on above results, for those designs with In thinner than 5 um, the Ag layer needs to be annealed, prior to In plating in order to make a successful bonding. In this section, we further studied the Ag-In bonding and solid-state bonding for different bonded pairs and flip-chip application. For the silicon (Si) and aluminum (Al) pair, Al has been used as the material for interconnect pads on the ICs. However, its high CTE (23 x 10-6/°C) and non-solderable property limit its applications in electronic products. To overcome these problems, a fluxless Ag-In bonding was developed. Al was deposited Cr/Cu layer on the surface by E-beam evaporator to make it solderable. 15 um of Ag and 8 um of In were sequentially plated on the Al substrates and 15 um of Ag was on Si chips with Cr/Au coating layer. The bonding was performed at 180 °C in 0.1 torr vacuum. The joint consists of Ag/(Ag)/Ag2In/(Ag)/Ag. The joint can achieve a solidus temperature of beyond 600 °C. From shear test results, the shear strengths far exceed the requirement in MIL-STD-883H. Al is not considered as a favorable substrate material because it is not solderable and has a high CTE. The new method presented in this thesis seems to have surmounted these two challenges. Since Ag2In is weak inside the joint in Ag-In system, an annealed process was used to convert the joints into Ag solid solution (Ag) to increase the joint strength and ductility. Two copper (Cu) substrates were bonded at 180 °C without flux. Bonding samples were annealed at 200 °C for 1,000 hours (first design) and at 250 °C for 350 hours (second design), respectively. Scanning electron microscope with energy dispersive X-ray (EDX) analysis results indicate that the joint of the first design is an alloy of mostly (Ag) with micron-size Ag2In and Ag3In regions, and that of second design has converted to a single (Ag) phase. Shear test results show that the breaking forces far exceed the requirement in MIL-STD-883H. The joint solidus temperatures are 600 °C and 800 °C for the first and second designs, respectively. The research results have shown that high-strength and high temperature joints can be manufactured using fluxless low temperature processes with the Ag-In system and are valuable in developing high temperature package. (Abstract shortened by UMI.).
Fabrication and characteristics of MOSFET protein chip for detection of ribosomal protein.
Park, Keun-Yong; Kim, Min-Suk; Choi, Sie-Young
2005-04-15
A metal oxide silicon field effect transistor (MOSFET) protein chip for the easy detection of protein was fabricated and its characteristics were investigated. Generally, the drain current of the MOSFET is varied by the gate potential. It is expected that the formation of an antibody-antigen complex on the gate of MOSFET would lead to a detectable change in the charge distribution and thus, directly modulate the drain current of MOSFET. As such, the drain current of the MOSFET protein chip can be varied by ribosomal proteins absorbed by the self-assembled monolayer (SAM) immobilized on the gate (Au) surface, as ribosomal protein has positive charge, and these current variations then used as the response of the protein chip. The gate of MOSFET protein chip is not directly biased by an external voltage source, so called open gate or floating gate MOSFET, but rather chemically modified by immobilized molecular receptors called self-assembled monolayer (SAM). In our experiments, the current variation in the proposed protein chip was about 8% with a protein concentration of 0.7 mM. As the protein concentration increased, the drain current also gradually increased. In addition, there were some drift of the drain current in the device. It is considered that these drift might be caused by the drift from the MOSFET itself or protein absorption procedures that are relied on the facile attachment of thiol (-S) ligands to the gate (Au) surface. We verified the formation of SAM on the gold surface and the absorption of protein through the surface plasmon resonance (SPR) measurement.
Structural and dynamic characteristics in monolayer square ice.
Zhu, YinBo; Wang, FengChao; Wu, HengAn
2017-07-28
When water is constrained between two sheets of graphene, it becomes an intriguing monolayer solid with a square pattern due to the ultrahigh van der Waals pressure. However, the square ice phase has become a matter of debate due to the insufficient experimental interpretation and the slightly rhomboidal feature in simulated monolayer square-like structures. Here, we performed classical molecular dynamics simulations to reveal monolayer square ice in graphene nanocapillaries from the perspective of structure and dynamic characteristics. Monolayer square-like ice (instantaneous snapshot), assembled square-rhombic units with stacking faults, is a long-range ordered structure, in which the square and rhombic units are assembled in an order of alternative distribution, and the other rhombic unit forms stacking faults (polarized water chains). Spontaneous flipping of water molecules in monolayer square-like ice is intrinsic and induces transformations among different elementary units, resulting in the structural evolution of monolayer square ice in dynamics. The existence of stacking faults should be attributed to the spontaneous flipping behavior of water molecules under ambient temperature. Statistical averaging results (thermal average positions) demonstrate the inherent square characteristic of monolayer square ice. The simulated data and insight obtained here might be significant for understanding the topological structure and dynamic behavior of monolayer square ice.
Infrared Imaging System for Studying Brain Function
NASA Technical Reports Server (NTRS)
Mintz, Frederick; Mintz, Frederick; Gunapala, Sarath
2007-01-01
A proposed special-purpose infrared imaging system would be a compact, portable, less-expensive alternative to functional magnetic resonance imaging (fMRI) systems heretofore used to study brain function. Whereas a typical fMRI system fills a large room, and must be magnetically isolated, this system would fit into a bicycle helmet. The system would include an assembly that would be mounted inside the padding in a modified bicycle helmet or other suitable headgear. The assembly would include newly designed infrared photodetectors and data-acquisition circuits on integrated-circuit chips on low-thermal-conductivity supports in evacuated housings (see figure) arranged in multiple rows and columns that would define image coordinates. Each housing would be spring-loaded against the wearer s head. The chips would be cooled by a small Stirling Engine mounted contiguous to, but thermally isolated from, the portions of the assembly in thermal contact with the wearer s head. Flexible wires or cables for transmitting data from the aforementioned chips would be routed to an integrated, multichannel transmitter and thence through the top of the assembly to a patch antenna on the outside of the helmet. The multiple streams of data from the infrared-detector chips would be sent to a remote site, where they would be processed, by software, into a three-dimensional display of evoked potentials that would represent firing neuronal bundles and thereby indicate locations of neuronal activity associated with mental or physical activity. The 3D images will be analogous to current fMRI images. The data would also be made available, in real-time, for comparison with data in local or internationally accessible relational databases that already exist in universities and research centers. Hence, this system could be used in research on, and for the diagnosis of response from the wearer s brain to physiological, psychological, and environmental changes in real time. The images would also be stored in a relational database for comparison with corresponding responses previously observed in other subjects.
SNPchiMp: a database to disentangle the SNPchip jungle in bovine livestock.
Nicolazzi, Ezequiel Luis; Picciolini, Matteo; Strozzi, Francesco; Schnabel, Robert David; Lawley, Cindy; Pirani, Ali; Brew, Fiona; Stella, Alessandra
2014-02-11
Currently, six commercial whole-genome SNP chips are available for cattle genotyping, produced by two different genotyping platforms. Technical issues need to be addressed to combine data that originates from the different platforms, or different versions of the same array generated by the manufacturer. For example: i) genome coordinates for SNPs may refer to different genome assemblies; ii) reference genome sequences are updated over time changing the positions, or even removing sequences which contain SNPs; iii) not all commercial SNP ID's are searchable within public databases; iv) SNPs can be coded using different formats and referencing different strands (e.g. A/B or A/C/T/G alleles, referencing forward/reverse, top/bottom or plus/minus strand); v) Due to new information being discovered, higher density chips do not necessarily include all the SNPs present in the lower density chips; and, vi) SNP IDs may not be consistent across chips and platforms. Most researchers and breed associations manage SNP data in real-time and thus require tools to standardise data in a user-friendly manner. Here we present SNPchiMp, a MySQL database linked to an open access web-based interface. Features of this interface include, but are not limited to, the following functions: 1) referencing the SNP mapping information to the latest genome assembly, 2) extraction of information contained in dbSNP for SNPs present in all commercially available bovine chips, and 3) identification of SNPs in common between two or more bovine chips (e.g. for SNP imputation from lower to higher density). In addition, SNPchiMp can retrieve this information on subsets of SNPs, accessing such data either via physical position on a supported assembly, or by a list of SNP IDs, rs or ss identifiers. This tool combines many different sources of information, that otherwise are time consuming to obtain and difficult to integrate. The SNPchiMp not only provides the information in a user-friendly format, but also enables researchers to perform a large number of operations with a few clicks of the mouse. This significantly reduces the time needed to execute the large number of operations required to manage SNP data.
A Wireless Biomedical Signal Interface System-on-Chip for Body Sensor Networks.
Lei Wang; Guang-Zhong Yang; Jin Huang; Jinyong Zhang; Li Yu; Zedong Nie; Cumming, D R S
2010-04-01
Recent years have seen the rapid development of biosensor technology, system-on-chip design, wireless technology. and ubiquitous computing. When assembled into an autonomous body sensor network (BSN), the technologies become powerful tools in well-being monitoring, medical diagnostics, and personal connectivity. In this paper, we describe the first demonstration of a fully customized mixed-signal silicon chip that has most of the attributes required for use in a wearable or implantable BSN. Our intellectual-property blocks include low-power analog sensor interface for temperature and pH, a data multiplexing and conversion module, a digital platform based around an 8-b microcontroller, data encoding for spread-spectrum wireless transmission, and a RF section requiring very few off-chip components. The chip has been fully evaluated and tested by connection to external sensors, and it satisfied typical system requirements.
Perspective: Fabrication of integrated organ-on-a-chip via bioprinting.
Yang, Qingzhen; Lian, Qin; Xu, Feng
2017-05-01
Organ-on-a-chip has emerged as a powerful platform with widespread applications in biomedical engineering, such as pathology studies and drug screening. However, the fabrication of organ-on-a-chip is still a challenging task due to its complexity. For an integrated organ-on-a-chip, it may contain four key elements, i.e., a microfluidic chip, live cells/microtissues that are cultured in this chip, components for stimulus loading to mature the microtissues, and sensors for results readout. Recently, bioprinting has been used for fabricating organ-on-a-chip as it enables the printing of multiple materials, including biocompatible materials and even live cells in a programmable manner with a high spatial resolution. Besides, all four elements for organ-on-a-chip could be printed in a single continuous procedure on one printer; in other words, the fabrication process is assembly free. In this paper, we discuss the recent advances of organ-on-a-chip fabrication by bioprinting. Light is shed on the printing strategies, materials, and biocompatibility. In addition, some specific bioprinted organs-on-chips are analyzed in detail. Because the bioprinted organ-on-a-chip is still in its early stage, significant efforts are still needed. Thus, the challenges presented together with possible solutions and future trends are also discussed.
NASA Astrophysics Data System (ADS)
Huang, Chu-Yu; Tsai, Ming-Shiuan
2017-09-01
The main purpose of this study is to develop a batch producible hot embossing 3D nanostructured surface-enhanced Raman chip technology for high sensitivity label-free plasticizer detection. This study utilizing the AAO self-assembled uniform nano-hemispherical array barrier layer as a template to create a durable nanostructured nickel mold. With the hot embossing technique and the durable nanostructured nickel mold, we are able to batch produce the 3D Nanostructured Surface-enhanced Raman Scattering Chip with consistent quality. In addition, because of our SERS chip can be fabricated by batch processing, the fabrication cost is low. Therefore, the developed method is very promising to be widespread and extensively used in rapid chemical and biomolecular detection applications.
Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.
Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa
2005-12-01
Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.
NASA Astrophysics Data System (ADS)
Hagmeyer, Britta; Schütte, Julia; Böttger, Jan; Gebhardt, Rolf; Stelzle, Martin
2013-03-01
Replacing animal testing with in vitro cocultures of human cells is a long-term goal in pre-clinical drug tests used to gain reliable insight into drug-induced cell toxicity. However, current state-of-the-art 2D or 3D cell cultures aiming at mimicking human organs in vitro still lack organ-like morphology and perfusion and thus organ-like functions. To this end, microfluidic systems enable construction of cell culture devices which can be designed to more closely resemble the smallest functional unit of organs. Multiphysics simulations represent a powerful tool to study the various relevant physical phenomena and their impact on functionality inside microfluidic structures. This is particularly useful as it allows for assessment of system functions already during the design stage prior to actual chip fabrication. In the HepaChip®, dielectrophoretic forces are used to assemble human hepatocytes and human endothelial cells in liver sinusoid-like structures. Numerical simulations of flow distribution, shear stress, electrical fields and heat dissipation inside the cell assembly chambers as well as surface wetting and surface tension effects during filling of the microchannel network supported the design of this human-liver-on-chip microfluidic system for cell culture applications. Based on the device design resulting thereof, a prototype chip was injection-moulded in COP (cyclic olefin polymer). Functional hepatocyte and endothelial cell cocultures were established inside the HepaChip® showing excellent metabolic and secretory performance.
Silicon-based products and solutions
NASA Astrophysics Data System (ADS)
Painchaud, Y.; Poulin, M.; Pelletier, F.; Latrasse, C.; Gagné, J.-F.; Savard, S.; Robidoux, G.; Picard, M.-.; Paquet, S.; Davidson, C.-.; Pelletier, M.; Cyr, M.; Paquet, C.; Guy, M.; Morsy-Osman, M.; Chagnon, M.; Plant, D. V.
2014-03-01
TeraXion started silicon photonics activities aiming at developing building blocks for new products and customized solutions. Passive and active devices have been developed including MMI couplers, power splitters, Bragg grating filters, high responsivity photodetectors, high speed modulators and variable optical attenuators. Packaging solutions including fiber attachment and hybrid integration using flip-chip were also developed. More specifically, a compact packaged integrated coherent receiver has been realized. Good performances were obtained as demonstrated by our system tests results showing transmission up to 4800 km with BER below hard FEC threshold. The package size is small but still limited by the electrical interface. Migrating to more compact RF interface would allow realizing the full benefit of this technology.
Large Area MEMS Based Ultrasound Device for Cancer Detection.
Wodnicki, Robert; Thomenius, Kai; Hooi, Fong Ming; Sinha, Sumedha P; Carson, Paul L; Lin, Der-Song; Zhuang, Xuefeng; Khuri-Yakub, Pierre; Woychik, Charles
2011-08-21
We present image results obtained using a prototype ultrasound array which demonstrates the fundamental architecture for a large area MEMS based ultrasound device for detection of breast cancer. The prototype array consists of a tiling of capacitive Micro-Machined Ultrasound Transducers (cMUTs) which have been flip-chip attached to a rigid organic substrate. The pitch on the cMUT elements is 185 um and the operating frequency is nominally 9 MHz. The spatial resolution of the new probe is comparable to production PZT probes, however the sensitivity is reduced by conditions that should be correctable. Simulated opposed-view image registration and Speed of Sound volume reconstruction results for ultrasound in the mammographic geometry are also presented.
NASA Technical Reports Server (NTRS)
Suh, Jong-ook
2013-01-01
The Xilinx Virtex 4QV and 5QV (V4 and V5) are next-generation field-programmable gate arrays (FPGAs) for space applications. However, there have been concerns within the space community regarding the non-hermeticity of V4/V5 packages; polymeric materials such as the underfill and lid adhesive will be directly exposed to the space environment. In this study, reliability concerns associated with the non-hermeticity of V4/V5 packages were investigated by studying properties and behavior of the underfill and the lid adhesvie materials used in V4/V5 packages.
Method to Improve Indium Bump Bonding via Indium Oxide Removal Using a Multi-Step Plasma Process
NASA Technical Reports Server (NTRS)
Dickie, Matthew R. (Inventor); Nikzad, Shouleh (Inventor); Greer, H. Frank (Inventor); Jones, Todd J. (Inventor); Vasquez, Richard P. (Inventor); Hoenk, Michael E. (Inventor)
2012-01-01
A process for removing indium oxide from indium bumps in a flip-chip structure to reduce contact resistance, by a multi-step plasma treatment. A first plasma treatment of the indium bumps with an argon, methane and hydrogen plasma reduces indium oxide, and a second plasma treatment with an argon and hydrogen plasma removes residual organics. The multi-step plasma process for removing indium oxide from the indium bumps is more effective in reducing the oxide, and yet does not require the use of halogens, does not change the bump morphology, does not attack the bond pad material or under-bump metallization layers, and creates no new mechanisms for open circuits.
NASA Astrophysics Data System (ADS)
Price, R. A.; Benson, C.; Joyce, M. J.; Rodgers, K.
2004-08-01
We present the details of a new linear array dosimeter consisting of a chain of semiconductors mounted on an ultra-thin (50 /spl mu/m thick) flexible substrate and housed in an intracavitary catheter. The semiconductors, manufactured by NMRC Cork, have not been packaging and incorporate a passivation layer that allows them to be mounted on the substrate using flip-chip-bonding. This paper reports, for the first time, the construction of a multiple (ten) detector array suited to in vivo dosimetry in the rectum, esophagus and vagina during external beam radiotherapy, as well as being adaptable to in vivo dosimetry during brachytherapy and diagnostic radiology.
A Boundary Scan Test Vehicle for Direct Chip Attach Testing
NASA Technical Reports Server (NTRS)
Parsons, Heather A.; DAgostino, Saverio; Arakaki, Genji
2000-01-01
To facilitate the new faster, better and cheaper spacecraft designs, smaller more mass efficient avionics and instruments are using higher density electronic packaging technologies such as direct chip attach (DCA). For space flight applications, these technologies need to have demonstrated reliability and reasonably well defined fabrication and assembly processes before they will be accepted as baseline designs in new missions. As electronics shrink in size, not only can repair be more difficult, but 49 probing" circuitry can be very risky and it becomes increasingly more difficult to identify the specific source of a problem. To test and monitor these new technologies, the Direct Chip Attach Task, under NASA's Electronic Parts and Packaging Program (NEPP), chose the test methodology of boundary scan testing. The boundary scan methodology was developed for interconnect integrity and functional testing at hard to access electrical nodes. With boundary scan testing, active devices are used and failures can be identified to the specific device and lead. This technology permits the incorporation of "built in test" into almost any circuit and thus gives detailed test access to the highly integrated electronic assemblies. This presentation will describe boundary scan, discuss the development of the boundary scan test vehicle for DCA and current plans for testing of direct chip attach configurations.
Kusters, Ilja; van Oijen, Antoine M; Driessen, Arnold J M
2014-04-22
Screening of transport processes across biological membranes is hindered by the challenge to establish fragile supported lipid bilayers and the difficulty to determine at which side of the membrane reactants reside. Here, we present a method for the generation of suspended lipid bilayers with physiological relevant lipid compositions on microstructured Si/SiO2 chips that allow for high-throughput screening of both membrane transport and viral membrane fusion. Simultaneous observation of hundreds of single-membrane channels yields statistical information revealing population heterogeneities of the pore assembly and conductance of the bacterial toxin α-hemolysin (αHL). The influence of lipid composition and ionic strength on αHL pore formation was investigated at the single-channel level, resolving features of the pore-assembly pathway. Pore formation is inhibited by a specific antibody, demonstrating the applicability of the platform for drug screening of bacterial toxins and cell-penetrating agents. Furthermore, fusion of H3N2 influenza viruses with suspended lipid bilayers can be observed directly using a specialized chip architecture. The presented micropore arrays are compatible with fluorescence readout from below using an air objective, thus allowing high-throughput screening of membrane transport in multiwell formats in analogy to plate readers.
Chip breaking system for automated machine tool
Arehart, Theodore A.; Carey, Donald O.
1987-01-01
The invention is a rotary selectively directional valve assembly for use in an automated turret lathe for directing a stream of high pressure liquid machining coolant to the interface of a machine tool and workpiece for breaking up ribbon-shaped chips during the formation thereof so as to inhibit scratching or other marring of the machined surfaces by these ribbon-shaped chips. The valve assembly is provided by a manifold arrangement having a plurality of circumferentially spaced apart ports each coupled to a machine tool. The manifold is rotatable with the turret when the turret is positioned for alignment of a machine tool in a machining relationship with the workpiece. The manifold is connected to a non-rotational header having a single passageway therethrough which conveys the high pressure coolant to only the port in the manifold which is in registry with the tool disposed in a working relationship with the workpiece. To position the machine tools the turret is rotated and one of the tools is placed in a material-removing relationship of the workpiece. The passageway in the header and one of the ports in the manifold arrangement are then automatically aligned to supply the machining coolant to the machine tool workpiece interface for breaking up of the chips as well as cooling the tool and workpiece during the machining operation.
Platform technologies for hybrid optoelectronic integration and packaging
NASA Astrophysics Data System (ADS)
Datta, Madhumita
In order to bring fiber-optics closer to individual home and business services, the optical network components have to be inexpensive and reliable. Integration and packaging of optoelectronic devices holds the key to high-volume low-cost component manufacturing. The goal of this dissertation is to propose, study, and demonstrate various ways to integrate optoelectronic devices on a packaging platform to implement cost-effective, functional optical modules. Two types of hybrid integration techniques have been proposed: flip-chip solder bump bonding for high-density two-dimensional array packaging of surface-emitting devices, and solder preform bonding for fiber-coupled edge-emitting semiconductor devices. For flip-chip solder bump bonding, we developed a simple, inexpensive remetallization process called "electroless plating", which converts the aluminum bond pads of foundry-made complementary metal oxide semiconductor (CMOS) chips into solder-bondable and wire-bondable gold surfaces. We have applied for a patent on this remetallization technique. For fiber-pigtailed edge-emitting laser modules, we have studied the coupling characteristics of different types of lensed single-mode fibers including semispherically lensed fiber, cylindrically lensed fiber and conically lensed fiber. We have experimentally demonstrated 66% coupling efficiency with semispherically lensed fiber and 50% efficiency with conically lensed fibers. We have proposed and designed a packaging platform on which lensed fibers can be actively aligned to a laser and solder-attached reliably to the platform so that the alignment is retained. We have designed thin-film nichrome heaters on fused quartz platforms as local heat source to facilitate on-board solder alignment and attachment of fiber. The thermal performance of the heaters was simulated using finite element analysis tool ANSYS prior to fabrication. Using the heater's reworkability advantage, we have estimated the shift of the fiber due to solder shrinkage and introduced a pre-correction in the alignment process to restore optimum coupling efficiency close to 50% with conically lensed fibers. We have applied for a patent on this unique active alignment method through the University of Maryland's Technology Commercialization Office. Although we have mostly concentrated on active alignment platforms, we have proposed the idea of combining the passive alignment advantages of silicon optical benches to the on-board heater-assisted active alignment technique. This passive-active alignment process has the potential of cost-effective array packaging of edge-emitting devices.
NASA Astrophysics Data System (ADS)
Edwards, Devin T.; Takahashi, Susumu; Sherwin, Mark S.; Han, Songi
2012-10-01
At 8.5 T, the polarization of an ensemble of electron spins is essentially 100% at 2 K, and decreases to 30% at 20 K. The strong temperature dependence of the electron spin polarization between 2 and 20 K leads to the phenomenon of spin bath quenching: temporal fluctuations of the dipolar magnetic fields associated with the energy-conserving spin "flip-flop" process are quenched as the temperature of the spin bath is lowered to the point of nearly complete spin polarization. This work uses pulsed electron paramagnetic resonance (EPR) at 240 GHz to investigate the effects of spin bath quenching on the phase memory times (TM) of randomly-distributed ensembles of nitroxide molecules below 20 K at 8.5 T. For a given electron spin concentration, a characteristic, dipolar flip-flop rate (W) is extracted by fitting the temperature dependence of TM to a simple model of decoherence driven by the spin flip-flop process. In frozen solutions of 4-Amino-TEMPO, a stable nitroxide radical in a deuterated water-glass, a calibration is used to quantify average spin-spin distances as large as r¯=6.6 nm from the dipolar flip-flop rate. For longer distances, nuclear spin fluctuations, which are not frozen out, begin to dominate over the electron spin flip-flop processes, placing an effective ceiling on this method for nitroxide molecules. For a bulk solution with a three-dimensional distribution of nitroxide molecules at concentration n, we find W∝n∝1/r, which is consistent with magnetic dipolar spin interactions. Alternatively, we observe W∝n for nitroxides tethered to a quasi two-dimensional surface of large (Ø ˜ 200 nm), unilamellar, lipid vesicles, demonstrating that the quantification of spin bath quenching can also be used to discern the geometry of molecular assembly or organization.
NASA Astrophysics Data System (ADS)
Vaishampayan, Parag; Osman, Shariff; Andersen, Gary; Venkateswaran, Kasthuri
2010-06-01
The bacterial diversity and comparative community structure of a clean room used for assembling the Phoenix spacecraft was characterized throughout the spacecraft assembly process by using 16S rRNA gene cloning/sequencing and DNA microarray (PhyloChip) technologies. Samples were collected from several locations of the clean room at three time points: before Phoenix's arrival (PHX-B), during hardware assembly (PHX-D), and after the spacecraft was removed for launch (PHX-A). Bacterial diversity comprised of all major bacterial phyla of PHX-B was found to be statistically different from PHX-D and PHX-A samples. Due to stringent cleaning and decontamination protocols during assembly, PHX-D bacterial diversity was dramatically reduced when compared to PHX-B and PHX-A samples. Comparative community analysis based on PhyloChip results revealed similar overall trends as were seen in clone libraries, but the high-density phylogenetic microarray detected larger diversity in all sampling events. The decrease in community complexity in PHX-D compared to PHX-B, and the subsequent recurrence of these organisms in PHX-A, speaks to the effectiveness of NASA cleaning protocols. However, the persistence of a subset of bacterial signatures throughout all spacecraft assembly phases underscores the need for continued refinement of sterilization technologies and the implementation of safeguards that monitor and inventory microbial contaminants.
Vaishampayan, Parag; Osman, Shariff; Andersen, Gary; Venkateswaran, Kasthuri
2010-06-01
The bacterial diversity and comparative community structure of a clean room used for assembling the Phoenix spacecraft was characterized throughout the spacecraft assembly process by using 16S rRNA gene cloning/sequencing and DNA microarray (PhyloChip) technologies. Samples were collected from several locations of the clean room at three time points: before Phoenix's arrival (PHX-B), during hardware assembly (PHX-D), and after the spacecraft was removed for launch (PHX-A). Bacterial diversity comprised of all major bacterial phyla of PHX-B was found to be statistically different from PHX-D and PHX-A samples. Due to stringent cleaning and decontamination protocols during assembly, PHX-D bacterial diversity was dramatically reduced when compared to PHX-B and PHX-A samples. Comparative community analysis based on PhyloChip results revealed similar overall trends as were seen in clone libraries, but the high-density phylogenetic microarray detected larger diversity in all sampling events. The decrease in community complexity in PHX-D compared to PHX-B, and the subsequent recurrence of these organisms in PHX-A, speaks to the effectiveness of NASA cleaning protocols. However, the persistence of a subset of bacterial signatures throughout all spacecraft assembly phases underscores the need for continued refinement of sterilization technologies and the implementation of safeguards that monitor and inventory microbial contaminants.
Li, Lin; Yin, Heyu; Mason, Andrew J
2018-04-01
The integration of biosensors, microfluidics, and CMOS instrumentation provides a compact lab-on-CMOS microsystem well suited for high throughput measurement. This paper describes a new epoxy chip-in-carrier integration process and two planar metalization techniques for lab-on-CMOS that enable on-CMOS electrochemical measurement with multichannel microfluidics. Several design approaches with different fabrication steps and materials were experimentally analyzed to identify an ideal process that can achieve desired capability with high yield and low material and tool cost. On-chip electrochemical measurements of the integrated assembly were performed to verify the functionality of the chip-in-carrier packaging and its capability for microfluidic integration. The newly developed CMOS-compatible epoxy chip-in-carrier process paves the way for full implementation of many lab-on-CMOS applications with CMOS ICs as core electronic instruments.
Stress analysis of ultra-thin silicon chip-on-foil electronic assembly under bending
NASA Astrophysics Data System (ADS)
Wacker, Nicoleta; Richter, Harald; Hoang, Tu; Gazdzicki, Pawel; Schulze, Mathias; Angelopoulos, Evangelos A.; Hassan, Mahadi-Ul; Burghartz, Joachim N.
2014-09-01
In this paper we investigate the bending-induced uniaxial stress at the top of ultra-thin (thickness \\leqslant 20 μm) single-crystal silicon (Si) chips adhesively attached with the aid of an epoxy glue to soft polymeric substrate through combined theoretical and experimental methods. Stress is first determined analytically and numerically using dedicated models. The theoretical results are validated experimentally through piezoresistive measurements performed on complementary metal-oxide-semiconductor (CMOS) transistors built on specially designed chips, and through micro-Raman spectroscopy investigation. Stress analysis of strained ultra-thin chips with CMOS circuitry is crucial, not only for the accurate evaluation of the piezoresistive behavior of the built-in devices and circuits, but also for reliability and deformability analysis. The results reveal an uneven bending-induced stress distribution at the top of the Si-chip that decreases from the central area towards the chip's edges along the bending direction, and increases towards the other edges. Near these edges, stress can reach very high values, facilitating the emergence of cracks causing ultimate chip failure.
"Artificial micro organs"--a microfluidic device for dielectrophoretic assembly of liver sinusoids.
Schütte, Julia; Hagmeyer, Britta; Holzner, Felix; Kubon, Massimo; Werner, Simon; Freudigmann, Christian; Benz, Karin; Böttger, Jan; Gebhardt, Rolf; Becker, Holger; Stelzle, Martin
2011-06-01
In order to study possible toxic side effects of potential drug compounds in vitro a reliable test system is needed. Predicting liver toxicity presents a major challenge of particular importance as liver cells grown in a cell culture suffer from a rapid loss of their liver specific functions. Therefore we are developing a new microfluidic test system for liver toxicity. This test system is based on an organ-like liver 3D co-culture of hepatocytes and endothelial cells. We devised a microfluidic chip featuring cell culture chambers with integrated electrodes for the assembly of liver sinusoids by dielectrophoresis. Fluid channels enable an organ-like perfusion with culture media and test compounds. Different chamber designs were studied and optimized with regard to dielectrophoretic force distribution, hydrodynamic flow profile, and cell trapping rate using numeric simulations. Based on simulation results a microchip was injection-moulded from COP. This chip allowed the assembly of viable hepatocytes and endothelial cells in a sinusoid-like fashion.
Test systems of the STS-XYTER2 ASIC: from wafer-level to in-system verification
NASA Astrophysics Data System (ADS)
Kasinski, Krzysztof; Zubrzycka, Weronika
2016-09-01
The STS/MUCH-XYTER2 ASIC is a full-size prototype chip for the Silicon Tracking System (STS) and Muon Chamber (MUCH) detectors in the new fixed-target experiment Compressed Baryonic Matter (CBM) at FAIR-center, Darmstadt, Germany. The STS assembly includes more than 14000 ASICs. The complicated, time-consuming, multi-step assembly process of the detector building blocks and tight quality assurance requirements impose several intermediate testing to be performed for verifying crucial assembly steps (e.g. custom microcable tab-bonding before wire-bonding to the PCB) and - if necessary - identifying channels or modules for rework. The chip supports the multi-level testing with different probing / contact methods (wafer probe-card, pogo-probes, in-system tests). A huge number of ASICs to be tested restricts the number and kind of tests possible to be performed within a reasonable time. The proposed architectures of test stand equipment and a brief summary of methodologies are presented in this paper.
Narayan, Vikram; Landré, Vivien; Ning, Jia; Hernychova, Lenka; Muller, Petr; Verma, Chandra; Walkinshaw, Malcolm D.; Blackburn, Elizabeth A.; Ball, Kathryn L.
2015-01-01
CHIP is a tetratricopeptide repeat (TPR) domain protein that functions as an E3-ubiquitin ligase. As well as linking the molecular chaperones to the ubiquitin proteasome system, CHIP also has a docking-dependent mode where it ubiquitinates native substrates, thereby regulating their steady state levels and/or function. Here we explore the effect of Hsp70 on the docking-dependent E3-ligase activity of CHIP. The TPR-domain is revealed as a binding site for allosteric modulators involved in determining CHIP's dynamic conformation and activity. Biochemical, biophysical and modeling evidence demonstrate that Hsp70-binding to the TPR, or Hsp70-mimetic mutations, regulate CHIP-mediated ubiquitination of p53 and IRF-1 through effects on U-box activity and substrate binding. HDX-MS was used to establish that conformational-inhibition-signals extended from the TPR-domain to the U-box. This underscores inter-domain allosteric regulation of CHIP by the core molecular chaperones. Defining the chaperone-associated TPR-domain of CHIP as a manager of inter-domain communication highlights the potential for scaffolding modules to regulate, as well as assemble, complexes that are fundamental to protein homeostatic control. PMID:26330542
Novel Ultrahigh Vacuum System for Chip-Scale Trapped Ion Quantum Computing
NASA Astrophysics Data System (ADS)
Chen, Shaw-Pin; Trapped Team
2011-05-01
This presentation reports the experimental results of an ultrahigh vacuum (UHV) system as a scheme to implement scalable trapped-ion quantum computers that use micro-fabricated ion traps as fundamental building blocks. The novelty of this system resides in our design, material selection, mechanical liability, low complexity of assembly, and reduced signal interference between DC and RF electrodes. Our system utilizes RF isolation and onsite-filtering topologies to attenuate AC signals generated from the resonator. We use a UHV compatible printed circuit board (PCB) material to perform DC routing, while the RF high and RF ground received separated routing via wire-wrapping. The standard PCB fabrication process enabled us to implement ceramic-based filter components adjacent to the chip trap. The DC electrodes are connected to air-side electrical feed through using four 25D adaptors made with polyether ether ketone (PEEK). The assembly process of this system is straight forward and in-chamber structure is self-supporting. We report on initial testing of this concept with a linear chip trap fabricated by the Sandia National Labs.
Modular integration of electronics and microfluidic systems using flexible printed circuit boards.
Wu, Amy; Wang, Lisen; Jensen, Erik; Mathies, Richard; Boser, Bernhard
2010-02-21
Microfluidic systems offer an attractive alternative to conventional wet chemical methods with benefits including reduced sample and reagent volumes, shorter reaction times, high-throughput, automation, and low cost. However, most present microfluidic systems rely on external means to analyze reaction products. This substantially adds to the size, complexity, and cost of the overall system. Electronic detection based on sub-millimetre size integrated circuits (ICs) has been demonstrated for a wide range of targets including nucleic and amino acids, but deployment of this technology to date has been limited due to the lack of a flexible process to integrate these chips within microfluidic devices. This paper presents a modular and inexpensive process to integrate ICs with microfluidic systems based on standard printed circuit board (PCB) technology to assemble the independently designed microfluidic and electronic components. The integrated system can accommodate multiple chips of different sizes bonded to glass or PDMS microfluidic systems. Since IC chips and flex PCB manufacturing and assembly are industry standards with low cost, the integrated system is economical for both laboratory and point-of-care settings.
NASA Technical Reports Server (NTRS)
Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Bandera, Cesar (Inventor); Xia, Shu (Inventor)
2002-01-01
A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.
Visual and x-ray inspection characteristics of eutectic and lead free assemblies
NASA Technical Reports Server (NTRS)
Ghaffarian, R.
2003-01-01
For high reliability applications, visual inspection has been the key technique for most conventional electronic package assemblies. Now, the use of x-ray technique has become an additional inspection requirement for quality control and detection of unique defects due to manufacturing of advanced electronic array packages such as ball grid array (BGAs) and chip scale packages (CSPs).
Design and realization of 144 x 7 TDI ROIC with hybrid integrated test structure
NASA Astrophysics Data System (ADS)
Ceylan, Omer; Kayahan, Huseyin; Yazici, Melik; Baran, Muhammet Burak; Gurbuz, Yasar
2012-06-01
Design and realization of a 144x7 silicon readout integrated circuit (ROIC) based on switched capacitor TDI for MCT LWIR scanning type focal plane arrays (FPAs) and its corresponding hybrid integrated test circuits are presented. TDI operation with 7 detectors improves the SNR of the system by a factor of √7, while oversampling rate of 3 improves the spatial resolution of the system. ROIC supports bidirectional scan, 5 adjustable gain settings, bypass operation, automatic gain adjustment in case of mulfunctioning pixels and pixel select/deselect properties. Integration time of the system can be determined by the help of an external clock. Programming of ROIC can be done in parallel or serial mode according to the needs of the system. All properties except pixel select/deselect property can be performed in parallel mode, while pixel select/deselect property can be performed only in serial mode. ROIC can handle up to 3.75V dynamic range with a load of 25pF and output settling time of 80ns. Input referred noise of the ROIC is less than 750 rms electrons, while the power consumption is less than 100mW. To test ROIC in absence of detector array, a process and temperature compensated current reference array, which supplies uniform input current in range of 1-50nA to ROIC, is designed and measured both in room and cryogenic (77ºK) temperatures. Standard deviations of current reference arrays are measured 3.26% for 1nA and 0.99% for 50nA. ROIC and current reference array are fabricated seperately, and then flip-chip bonded for the test of the system. Flip-chip bonded system including ROIC and current reference test array is successfully measured both in room and cryogenic temperatures, and measurement results are presented. The manufacturing technology is 0.35μm, double poly-Si, four metal, 5V CMOS process.
Optimization of Indium Bump Morphology for Improved Flip Chip Devices
NASA Technical Reports Server (NTRS)
Jones, Todd J.; Nikzad, Shouleh; Cunningham, Thomas J.; Blazejewski, Edward; Dickie, Matthew R.; Hoenk, Michael E.; Greer, Harold F.
2011-01-01
Flip-chip hybridization, also known as bump bonding, is a packaging technique for microelectronic devices that directly connects an active element or detector to a substrate readout face-to-face, eliminating the need for wire bonding. In order to make conductive links between the two parts, a solder material is used between the bond pads on each side. Solder bumps, composed of indium metal, are typically deposited by thermal evaporation onto the active regions of the device and substrate. While indium bump technology has been a part of the electronic interconnect process field for many years and has been extensively employed in the infrared imager industry, obtaining a reliable, high-yield process for high-density patterns of bumps can be quite difficult. Under the right conditions, a moderate hydrogen plasma exposure can raise the temperature of the indium bump to the point where it can flow. This flow can result in a desirable shape where indium will efficiently wet the metal contact pad to provide good electrical contact to the underlying readout or imager circuit. However, it is extremely important to carefully control this process as the intensity of the hydrogen plasma treatment dramatically affects the indium bump morphology. To ensure the fine-tuning of this reflow process, it is necessary to have realtime feedback on the status of the bumps. With an appropriately placed viewport in a plasma chamber, one can image a small field (a square of approximately 5 millimeters on each side) of the bumps (10-20 microns in size) during the hydrogen plasma reflow process. By monitoring the shape of the bumps in real time using a video camera mounted to a telescoping 12 magnifying zoom lens and associated optical elements, an engineer can precisely determine when the reflow of the bumps has occurred, and can shut off the plasma before evaporation or de-wetting takes place.
Ikegami, Tomonori; Kageyama, Yoshiyuki; Obara, Kazuma; Takeda, Sadamu
2016-07-11
Building a bottom-up supramolecular system to perform continuously autonomous motions will pave the way for the next generation of biomimetic mechanical systems. In biological systems, hierarchical molecular synchronization underlies the generation of spatio-temporal patterns with dissipative structures. However, it remains difficult to build such self-organized working objects via artificial techniques. Herein, we show the first example of a square-wave limit-cycle self-oscillatory motion of a noncovalent assembly of oleic acid and an azobenzene derivative. The assembly steadily flips under continuous blue-light irradiation. Mechanical self-oscillation is established by successively alternating photoisomerization processes and multi-stable phase transitions. These results offer a fundamental strategy for creating a supramolecular motor that works progressively under the operation of molecule-based machines. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Chip Scale Package Integrity Assessment by Isothermal Aging
NASA Technical Reports Server (NTRS)
Ghaffarian, Reza
1998-01-01
Many aspects of chip scale package (CSP) technology, with focus on assembly reliability characteristics, are being investigated by the JPL-led consortia. Three types of test vehicles were considered for evaluation and currently two configurations have been built to optimize attachment processes. These test vehicles use numerous package types. To understand potential failure mechanisms of the packages, particularly solder ball attachment, the grid CSPs were subjected to environmental exposure. Package I/Os ranged from 40 to nearly 300. This paper presents both as assembled, up to 1, 000 hours of isothermal aging shear test results and photo micrographs, and tensile test results before and after 1,500 cycles in the range of -30/100 C for CSPs. Results will be compared to BGAs with the same the same isothermal aging environmental exposures.
Parallel manipulation of individual magnetic microbeads for lab-on-a-chip applications
NASA Astrophysics Data System (ADS)
Peng, Zhengchun
Many scientists and engineers are turning to lab-on-a-chip systems for faster and cheaper analysis of chemical reactions and biomolecular interactions. A common approach that facilitates the handling of reagents and biomolecules in these systems utilizes micro/nano beads as the solid carrier. Physical manipulation, such as assembly, transport, sorting, and tweezing, of beads on a chip represents an essential step for fully utilizing their potentials in a wide spectrum of bead-based analysis. Previous work demonstrated manipulation of either an ensemble of beads without individual control, or single beads but lacks the capability for parallel operation. Parallel manipulation of individual beads is required to meet the demand for high-throughput and location-specific analysis. In this work, we introduced two methods for parallel manipulation of individual magnetic microbeads, which can serve as effective lab-on-a-chip platforms and/or efficient analytic tools. The first method employs arrays of soft ferromagnetic patterns fabricated inside a microfluidic channel and subjected to an external magnetic field. We demonstrated that the system can be used to assemble individual beads (1-3 mum) from a flow of suspended beads into a regular array on the chip, hence improving the integrated electrochemical detection of biomolecules bound to the bead surface. By rotating the external field, the assembled microbeads can be remotely controlled with synchronized, high-speed circular motion around individual soft magnets on the chip. We employed this manipulation mode for efficient sample mixing in continuous microflow. Furthermore, we discovered a simple but effective way of transporting the microbeads on the chip by varying the strength of the local bias field within a revolution of the external field. In addition, selective transport of microbeads with different size was realized, providing a platform for effective on-chip sample separation and offering the potential for multiplexing capability. The second method integrates magnetic and dielectrophoretic manipulations of the same microbeads. The device combines tapered conducting wires and fingered electrodes to generate desirable magnetic and electric fields, respectively. By externally programming the magnetic attraction and dielectrophoretic repulsion forces, out-of-plane oscillation of the microbeads across the channel height was realized. This manipulation mode can facilitate the interaction between the beads with multiple layers of sample fluid inside the channel. We further demonstrated the tweezing of microbeads in liquid with high spatial resolutions, i.e., from submicrometer to nanometer range, by fine-tuning the net force from magnetic attraction and dielectrophoretic repulsion of the beads. The highresolution control of the out-of-plane motion of the microbeads led to the invention of massively parallel biomolecular tweezers. We believe the maturation of bead-based microtweezers will revolutionize the state-of-art tools currently used for single cell and single molecule studies.
Thin hybrid pixel assembly with backside compensation layer on ROIC
NASA Astrophysics Data System (ADS)
Bates, R.; Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F.; Gray, C.; Pares, G.; Vignoud, L.; Kholti, B.; Vahanen, S.
2017-01-01
The entire ATLAS inner tracking system will be replaced for operation at the HL-LHC . This will include a significantly larger pixel detector of approximately 15 m2. For this project, it is critical to reduce the mass of the hybrid pixel modules and this requires thinning both the sensor and readout chips to about 150 micrometres each. The thinning of the silicon chips leads to low bump yield for SnAg bumps due to bad co-planarity of the two chips at the solder reflow stage creating dead zones within the pixel array. In the case of the ATLAS FEI4 pixel readout chip thinned to 100 micrometres, the chip is concave, with the front side in compression, with a bow of +100 micrometres at room temperature which varies to a bow of -175 micrometres at the SnAg solder reflow temperature, caused by the CTE mismatch between the materials in the CMOS stack and the silicon substrate. A new wafer level process to address the issue of low bump yield be controlling the chip bow has been developed. A back-side dielectric and metal stack of SiN and Al:Si has been deposited on the readout chip wafer to dynamically compensate the stress of the front side stack. In keeping with a 3D process the materials used are compatible with Through Silicon Via (TSV) technology with a TSV last approach which is under development for this chip. It is demonstrated that the amplitude of the correction can be manipulated by the deposition conditions and thickness of the SiN/Al:Si stack. The bow magnitude over the temperature range for the best sample to date is reduced by almost a factor of 4 and the sign of the bow (shape of the die) remains constant. Further development of the backside deposition conditions is on-going with the target of close to zero bow at the solder reflow temperature and a minimal bow magnitude throughout the temperature range. Assemblies produced from FEI4 readout wafers thinned to 100 micrometres with the backside compensation layer have been made for the first time and demonstrate bond yields close to 100%.
Electronic Switch Arrays for Managing Microbattery Arrays
NASA Technical Reports Server (NTRS)
Mojarradi, Mohammad; Alahmad, Mahmoud; Sukumar, Vinesh; Zghoul, Fadi; Buck, Kevin; Hess, Herbert; Li, Harry; Cox, David
2008-01-01
Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.
Chip-to-chip optical link by using optical wiring method
NASA Astrophysics Data System (ADS)
Cho, In-Kui; Ahn, Seoung Ho; Jeong, Myung-Yung; Rho, Byung Sup; Park, Hyo Hoon
2008-01-01
A practical optical link system was prepared with a transmitter (Tx) and receiver (Rx). The optical TRx module consisted of a metal optical bench, a module printed circuit board (PCB), a driver/receiver IC, a VCSEL/PD array, and an optical link block composed of plastic optical fiber (POF). For the optical interconnection between the light-sources and detectors, an optical wiring method has been proposed to enable easy assembly. This paper provides a method for optical interconnection between an optical Tx and an optical Rx, comprising the following steps: (a) forming a light source device, an optical detection device, and an optical transmission unit on a substrate (metal optical bench (MOB)); (b) preparing a flexible optical transmission-connection medium (optical wiring link) to optically connect the light source device formed on the substrate with the optical detection device; and (c) directly connecting one end of the surface-finished optical transmission connection medium with the light source device and the other end with the optical detection device. A chip-to-chip optical link system constructed with TRx modules was fabricated and the optical characteristics were measured. The results clearly demonstrate that the use of an optical wiring method can provide robust and cost-effective assembly for vertical-cavity surface-emitting lasers (VCSELs) and photodiodes (PDs). We successfully achieved a 5 Gb/s data transmission rate with this optical link.
3D MOEMS-based optical micro-bench platform for the miniaturization of sensing devices
NASA Astrophysics Data System (ADS)
Garcia-Blanco, Sonia; Caron, Jean-Sol; Leclair, Sébastien; Topart, Patrice A.; Jerominek, Hubert
2008-02-01
As we enter into the 21st century, the need for miniaturized portable diagnostic devices is increasing continuously. Portable devices find important applications for point-of-care diagnostics, patient self-monitoring and in remote areas, such as unpopulated regions where the cost of large laboratory facilities is not justifiable, underdeveloped countries and other remote locations such as space missions. The advantage of miniaturized sensing optical systems includes not only the reduced weight and size but also reduced cost, decreased time to results and robustness (e.g. no need for frequent re-alignments). Recent advances in micro-fabrication and assembly technologies have enabled important developments in the field of miniaturized sensing systems. INO has developed a technology platform for the three dimensional integration of MOEMS on an optical microbench. Building blocks of the platform include microlenses, micromirrors, dichroic beamsplitters, filters and optical fibers, which can be positioned using passive alignment structures to build the desired miniaturised system. The technology involves standard microfabrication, thick resist UV-lithography, thick metal electroplating, soldering, replication in sol-gel materials and flip-chip bonding processes. The technology is compatible with wafer-to-wafer bonding. A placement accuracy of +/- 5 μm has been demonstrated thanks to the integration of alignment marks co registered with other optical elements fabricated on different wafers. In this paper, the building blocks of the technology will be detailed. The design and fabrication of a 5x5 channels light processing unit including optical fibers, mirrors and collimating microlenses will be described. Application of the technology to various kinds of sensing devices will be discussed.
2016-12-01
SMD-VAC- GP, Virtual Industries) with plastic tip. Then the chip was covered with silicone open-cell foam (0.062” thick, HT -870, Stockwell...the build. 26 We discussed with a sub- contractor in Livermore who might be able to perform the packaging assembly work. Dr. Kotovsky...worked with the sub- contractor on practice assemblies anticipating the new upcoming build. Working through an outside contractor represents an enormous
High-frequency ultrasonic wire bonding systems
Tsujino; Yoshihara; Sano; Ihara
2000-03-01
The vibration characteristics of longitudinal-complex transverse vibration systems with multiple resonance frequencies of 350-980 kHz for ultrasonic wire bonding of IC, LSI or electronic devices were studied. The complex vibration systems can be applied for direct welding of semiconductor tips (face-down bonding, flip-chip bonding) and packaging of electronic devices. A longitudinal-complex transverse vibration bonding system consists of a complex transverse vibration rod, two driving longitudinal transducers 7.0 mm in diameter and a transverse vibration welding tip. The vibration distributions along ceramic and stainless-steel welding tips were measured at up to 980 kHz. A high-frequency vibration system with a height of 20.7 mm and a weight of less than 15 g was obtained.
Ultra-thin ohmic contacts for p-type nitride light emitting devices
Raffetto, Mark; Bharathan, Jayesh; Haberern, Kevin; Bergmann, Michael; Emerson, David; Ibbetson, James; Li, Ting
2014-06-24
A flip-chip semiconductor based Light Emitting Device (LED) can include an n-type semiconductor substrate and an n-type GaN epi-layer on the substrate. A p-type GaN epi-layer can be on the n-type GaN epi-layer and a metal ohmic contact p-electrode can be on the p-type GaN epi-layer, where the metal ohmic contact p-electrode can have an average thickness less than about 25 .ANG.. A reflector can be on the metal ohmic contact p-electrode and a metal stack can be on the reflector. An n-electrode can be on the substrate opposite the n-type GaN epi-layer and a bonding pad can be on the n-electrode.
Large area MEMS based ultrasound device for cancer detection
NASA Astrophysics Data System (ADS)
Wodnicki, Robert; Thomenius, Kai; Ming Hooi, Fong; Sinha, Sumedha P.; Carson, Paul L.; Lin, Der-Song; Zhuang, Xuefeng; Khuri-Yakub, Pierre; Woychik, Charles
2011-08-01
We present image results obtained using a prototype ultrasound array that demonstrates the fundamental architecture for a large area MEMS based ultrasound device for detection of breast cancer. The prototype array consists of a tiling of capacitive Micromachined Ultrasound Transducers (cMUTs) that have been flip-chip attached to a rigid organic substrate. The pitch on the cMUT elements is 185 μm and the operating frequency is nominally 9 MHz. The spatial resolution of the new probe is comparable to those of production PZT probes; however the sensitivity is reduced by conditions that should be correctable. Simulated opposed-view image registration and Speed of Sound volume reconstruction results for ultrasound in the mammographic geometry are also presented.
Wei, Xi; Syed, Abeer; Mao, Pan; Han, Jongyoon; Song, Yong-Ak
2016-01-01
Polydimethylsiloxane (PDMS) is the prevailing building material to make microfluidic devices due to its ease of molding and bonding as well as its transparency. Due to the softness of the PDMS material, however, it is challenging to use PDMS for building nanochannels. The channels tend to collapse easily during plasma bonding. In this paper, we present an evaporation-driven self-assembly method of silica colloidal nanoparticles to create nanofluidic junctions with sub-50 nm pores between two microchannels. The pore size as well as the surface charge of the nanofluidic junction is tunable simply by changing the colloidal silica bead size and surface functionalization outside of the assembled microfluidic device in a vial before the self-assembly process. Using the self-assembly of nanoparticles with a bead size of 300 nm, 500 nm, and 900 nm, it was possible to fabricate a porous membrane with a pore size of ~45 nm, ~75 nm and ~135 nm, respectively. Under electrical potential, this nanoporous membrane initiated ion concentration polarization (ICP) acting as a cation-selective membrane to concentrate DNA by ~1,700 times within 15 min. This non-lithographic nanofabrication process opens up a new opportunity to build a tunable nanofluidic junction for the study of nanoscale transport processes of ions and molecules inside a PDMS microfluidic chip. PMID:27023724
Zhang, Boyang; Montgomery, Miles; Chamberlain, M Dean; Ogawa, Shinichiro; Korolj, Anastasia; Pahnke, Aric; Wells, Laura A; Massé, Stéphane; Kim, Jihye; Reis, Lewis; Momen, Abdul; Nunes, Sara S; Wheeler, Aaron R; Nanthakumar, Kumaraswamy; Keller, Gordon; Sefton, Michael V; Radisic, Milica
2016-06-01
We report the fabrication of a scaffold (hereafter referred to as AngioChip) that supports the assembly of parenchymal cells on a mechanically tunable matrix surrounding a perfusable, branched, three-dimensional microchannel network coated with endothelial cells. The design of AngioChip decouples the material choices for the engineered vessel network and for cell seeding in the parenchyma, enabling extensive remodelling while maintaining an open-vessel lumen. The incorporation of nanopores and micro-holes in the vessel walls enhances permeability, and permits intercellular crosstalk and extravasation of monocytes and endothelial cells on biomolecular stimulation. We also show that vascularized hepatic tissues and cardiac tissues engineered by using AngioChips process clinically relevant drugs delivered through the vasculature, and that millimetre-thick cardiac tissues can be engineered in a scalable manner. Moreover, we demonstrate that AngioChip cardiac tissues implanted with direct surgical anastomosis to the femoral vessels of rat hindlimbs establish immediate blood perfusion.
NASA Astrophysics Data System (ADS)
Zhang, Boyang; Montgomery, Miles; Chamberlain, M. Dean; Ogawa, Shinichiro; Korolj, Anastasia; Pahnke, Aric; Wells, Laura A.; Massé, Stéphane; Kim, Jihye; Reis, Lewis; Momen, Abdul; Nunes, Sara S.; Wheeler, Aaron R.; Nanthakumar, Kumaraswamy; Keller, Gordon; Sefton, Michael V.; Radisic, Milica
2016-06-01
We report the fabrication of a scaffold (hereafter referred to as AngioChip) that supports the assembly of parenchymal cells on a mechanically tunable matrix surrounding a perfusable, branched, three-dimensional microchannel network coated with endothelial cells. The design of AngioChip decouples the material choices for the engineered vessel network and for cell seeding in the parenchyma, enabling extensive remodelling while maintaining an open-vessel lumen. The incorporation of nanopores and micro-holes in the vessel walls enhances permeability, and permits intercellular crosstalk and extravasation of monocytes and endothelial cells on biomolecular stimulation. We also show that vascularized hepatic tissues and cardiac tissues engineered by using AngioChips process clinically relevant drugs delivered through the vasculature, and that millimetre-thick cardiac tissues can be engineered in a scalable manner. Moreover, we demonstrate that AngioChip cardiac tissues implanted with direct surgical anastomosis to the femoral vessels of rat hindlimbs establish immediate blood perfusion.
Optical fiber LPG biosensor integrated microfluidic chip for ultrasensitive glucose detection
Yin, Ming-jie; Huang, Bobo; Gao, Shaorui; Zhang, A. Ping; Ye, Xuesong
2016-01-01
An optical fiber sensor integrated microfluidic chip is presented for ultrasensitive detection of glucose. A long-period grating (LPG) inscribed in a small-diameter single-mode fiber (SDSMF) is employed as an optical refractive-index (RI) sensor. With the layer-by-layer (LbL) self-assembly technique, poly (ethylenimine) (PEI) and poly (acrylic acid) (PAA) multilayer film is deposited on the SDSMF-LPG sensor for both supporting and signal enhancement, and then a glucose oxidase (GOD) layer is immobilized on the outer layer for glucose sensing. A microfluidic chip for glucose detection is fabricated after embedding the SDSMF-LPG biosensor into the microchannel of the chip. Experimental results reveal that the SDSMF-LPG biosensor based on such a hybrid sensing film can ultrasensitively detect glucose concentration as low as 1 nM. After integration into the microfluidic chip, the detection range of the sensor is extended from 2 µM to 10 µM, and the response time is remarkablely shortened from 6 minutes to 70 seconds. PMID:27231643
Prototype of a gigabit data transmitter in 65 nm CMOS for DEPFET pixel detectors at Belle-II
NASA Astrophysics Data System (ADS)
Kishishita, T.; Krüger, H.; Hemperek, T.; Lemarenko, M.; Koch, M.; Gronewald, M.; Wermes, N.
2013-08-01
This paper describes the recent development of a gigabit data transmitter for the Belle-II pixel detector (PXD). The PXD is an innermost detector currently under development for the upgraded KEK-B factory in Japan. The PXD consists of two layers of DEPFET sensor modules located at 1.8 and 2.2 cm radii. Each module is equipped with three different ASIC types mounted on the detector substrate with a flip-chip technique: (a) SWITCHER for generating steering signals for the DEPFET sensors, (b) DCD for digitizing the signal currents, and (c) DHP for performing data processing and sending the data off the module to the back-end data handling hybrid via ∼ 40 cm Kapton flex and 12-15 m twisted pair (TWP) cables. To meet the requirements of the PXD data transmission, a prototype of the DHP data transmitter has been developed in a 65-nm standard CMOS technology. The transmitter test chip consists of current-mode logic (CML) drivers and a phase-locked loop (PLL) which generates a clock signal for a 1.6 Gbit/s output data stream from an 80 cm reference clock. A programmable pre-emphasis circuit is also implemented in the CML driver to compensate signal losses in the long cable by shaping the transmitted pulse response. The jitter performance was measured as 25 ps (1 σ distribution) by connecting the chip with 38 cm flex and 10 m TWP cables.
Mitigating leakage errors due to cavity modes in a superconducting quantum computer
NASA Astrophysics Data System (ADS)
McConkey, T. G.; Béjanin, J. H.; Earnest, C. T.; McRae, C. R. H.; Pagel, Z.; Rinehart, J. R.; Mariantoni, M.
2018-07-01
A practical quantum computer requires quantum bit (qubit) operations with low error probabilities in extensible architectures. We study a packaging method that makes it possible to address hundreds of superconducting qubits by means of coaxial Pogo pins. A qubit chip is housed in a superconducting box, where both box and chip dimensions lead to unwanted modes that can interfere with qubit operations. We analyze these interference effects in the context of qubit coherent leakage and qubit decoherence induced by damped modes. We propose two methods, half-wave fencing and antinode pinning, to mitigate the resulting errors by detuning the resonance frequency of the modes from the qubit frequency. We perform electromagnetic field simulations indicating that the resonance frequency of the modes increases with the number of installed pins and can be engineered to be significantly higher than the highest qubit frequency. We estimate that the error probabilities and decoherence rates due to suitably shifted modes in realistic scenarios can be up to two orders of magnitude lower than the state-of-the-art superconducting qubit error and decoherence rates. Our methods can be extended to different types of packages that do not rely on Pogo pins. Conductive bump bonds, for example, can serve the same purpose in qubit architectures based on flip chip technology. Metalized vias, instead, can be used to mitigate modes due to the increasing size of the dielectric substrate on which qubit arrays are patterned.
Chip-To-Chip Optical Interconnection Using MEMS Mirrors
2009-03-26
the Figure 2.3: SEM of a 2D micromirror with embedded polysilicon circuit paths within the frame structures which drives individual thermal actuation...single-crystal silicon micromirror for large bi-directional 2d scanning applications,” Sens. and Actuators, A, vol. 130-131, pp. 454–460, 8/14 2006. 14...thesis (m.s.), AFIT, Mar 2008. AFIT/GEO/ENP/08-03. 17. B. McCarthy, V. M. Bright, and J. A. Neff, “A multi-component solder self- assembled micromirror
Panner, Amith; Crane, Courtney A; Weng, Changjiang; Feletti, Alberto; Fang, Shanna; Parsa, Andrew T; Pieper, Russell O
2010-06-15
The antiapoptotic protein FLIP(S) is a key suppressor of tumor necrosis factor-related apoptosis-inducing ligand (TRAIL)-induced apoptosis in human glioblastoma multiforme (GBM) cells. We previously reported that a novel phosphatase and tensin homologue (PTEN)-Akt-atrophin-interacting protein 4 (AIP4) pathway regulates FLIP(S) ubiquitination and stability, although the means by which PTEN and Akt were linked to AIP4 activity were unclear. Here, we report that a second regulator of ubiquitin metabolism, the ubiquitin-specific protease 8 (USP8), is a downstream target of Akt, and that USP8 links Akt to AIP4 and the regulation of FLIP(S) stability and TRAIL resistance. In human GBM xenografts, levels of USP8 correlated inversely with pAkt levels, and genetic or pharmacologic manipulation of Akt regulated USP8 levels in an inverse manner. Overexpression of wild-type USP8, but not catalytically inactive USP8, increased FLIP(S) ubiquitination, decreased FLIP(S) half-life, decreased FLIP(S) steady-state levels, and decreased TRAIL resistance, whereas short interfering RNA (siRNA)-mediated suppression of USP8 levels had the opposite effect. Because high levels of the USP8 deubiquitinase correlated with high levels of FLIP(S) ubiquitination, USP8 seemed to control FLIP(S) ubiquitination through an intermediate target. Consistent with this idea, overexpression of wild-type USP8 decreased the ubiquitination of the FLIP(S) E3 ubiquitin ligase AIP4, an event previously shown to increase AIP4-FLIP(S) interaction, whereas siRNA-mediated suppression of USP8 increased AIP4 ubiquitination. Furthermore, the suppression of FLIP(S) levels by USP8 overexpression was reversed by the introduction of siRNA targeting AIP4. These results show that USP8, a downstream target of Akt, regulates the ability of AIP4 to control FLIP(S) stability and TRAIL sensitivity.
Biwavelength transceiver module for parallel simultaneous bidirectional optical interconnections
NASA Astrophysics Data System (ADS)
Nguyen, Nga T. H.; Ukaegbu, Ikechi A.; Sangirov, Jamshid; Cho, Mu-Hee; Lee, Tae-Woo; Park, Hyo-Hoon
2013-12-01
The design of a biwavelength transceiver (TRx) module for parallel simultaneous bidirectional optical interconnects is described. The TRx module has been implemented using two different wavelengths, 850 and 1060 nm, to send and receive signals simultaneously through a common optical interface while optimizing cost and performance. Filtering mirrors are formed in the optical fibers which are embedded on a V-grooved silicon substrate for reflecting and filtering optical signals from/to vertical-cavity surface-emitting laser (VCSEL)/photodiode (PD). The VCSEL and PD are flip-chip bonded on individual silicon optical benches, which are attached on the silicon substrate for optical signal coupling from the VCSEL to fiber and from fiber to the PD. A high-speed and low-loss ceramic printed circuit board, which has a compact size of 0.033 cc, has been designed to carry transmitter and receiver chips for easy packaging of the TRx module. Applied for quad small form-factor pluggable applications at 40-Gbps operation, the four-channel biwavelength TRx module showed clear eye diagrams with a bit error rate (BER) of 10-12 at input powers of -5 and -5.8 dBm for 1060 and 850 nm operation modes, respectively.
Schwaerzle, M; Elmlinger, P; Paul, O; Ruther, P
2014-01-01
This paper reports on the design, simulation, fabrication and characterization of a tool for optogenetic experiments based on a light emitting diode (LED). A minimized silicon (Si) interface houses the LED and aligns it to an optical fiber. With a Si housing size of 550×500×380 μm(3) and an electrical interconnection of the LED by a highly flexible polyimide (PI) ribbon cable is the system very variable. PI cables and Si housings are fabricated using established microsystem technologies. A 270×220×50 μm(3) bare LED chip is flip-chip-bonded onto the PI cable. The Si housing is adhesively attached to the PI cable, thereby hosting the LED in a recess. An opposite recess guides the optical fiber with a diameter of 125 μm. An aperture in-between restricts the emitted LED light to the fiber core. The optical fiber is adhesively fixed into the Si housing recess. An optical output intensity at the fiber end facet of 1.71 mW/mm(2) was achieved at a duty cycle of 10 % and a driving current of 30 mA.
Thin-Film Quantum Dot Photodiode for Monolithic Infrared Image Sensors.
Malinowski, Pawel E; Georgitzikis, Epimitheas; Maes, Jorick; Vamvaka, Ioanna; Frazzica, Fortunato; Van Olmen, Jan; De Moor, Piet; Heremans, Paul; Hens, Zeger; Cheyns, David
2017-12-10
Imaging in the infrared wavelength range has been fundamental in scientific, military and surveillance applications. Currently, it is a crucial enabler of new industries such as autonomous mobility (for obstacle detection), augmented reality (for eye tracking) and biometrics. Ubiquitous deployment of infrared cameras (on a scale similar to visible cameras) is however prevented by high manufacturing cost and low resolution related to the need of using image sensors based on flip-chip hybridization. One way to enable monolithic integration is by replacing expensive, small-scale III-V-based detector chips with narrow bandgap thin-films compatible with 8- and 12-inch full-wafer processing. This work describes a CMOS-compatible pixel stack based on lead sulfide quantum dots (PbS QD) with tunable absorption peak. Photodiode with a 150-nm thick absorber in an inverted architecture shows dark current of 10 -6 A/cm² at -2 V reverse bias and EQE above 20% at 1440 nm wavelength. Optical modeling for top illumination architecture can improve the contact transparency to 70%. Additional cooling (193 K) can improve the sensitivity to 60 dB. This stack can be integrated on a CMOS ROIC, enabling order-of-magnitude cost reduction for infrared sensors.
A Conductometric Indium Oxide Semiconducting Nanoparticle Enzymatic Biosensor Array
Lee, Dongjin; Ondrake, Janet; Cui, Tianhong
2011-01-01
We report a conductometric nanoparticle biosensor array to address the significant variation of electrical property in nanomaterial biosensors due to the random network nature of nanoparticle thin-film. Indium oxide and silica nanoparticles (SNP) are assembled selectively on the multi-site channel area of the resistors using layer-by-layer self-assembly. To demonstrate enzymatic biosensing capability, glucose oxidase is immobilized on the SNP layer for glucose detection. The packaged sensor chip onto a ceramic pin grid array is tested using syringe pump driven feed and multi-channel I–V measurement system. It is successfully demonstrated that glucose is detected in many different sensing sites within a chip, leading to concentration dependent currents. The sensitivity has been found to be dependent on the channel length of the resistor, 4–12 nA/mM for channel lengths of 5–20 μm, while the apparent Michaelis-Menten constant is 20 mM. By using sensor array, analytical data could be obtained with a single step of sample solution feeding. This work sheds light on the applicability of the developed nanoparticle microsensor array to multi-analyte sensors, novel bioassay platforms, and sensing components in a lab-on-a-chip. PMID:22163696
Accelerated Thermal Cycling and Failure Mechanisms
NASA Technical Reports Server (NTRS)
Ghaffarian, R.
1999-01-01
This paper reviews the accelerated thermal cycling test methods that are currently used by industry to characterize the interconnect reliability of commercial-off-the-shelf (COTS) ball grid array (BGA) and chip scale package (CSP) assemblies.
Prototyping of Silicon Strip Detectors for the Inner Tracker of the ALICE Experiment
NASA Astrophysics Data System (ADS)
Sokolov, Oleksiy
2006-04-01
The ALICE experiment at CERN will study heavy ion collisions at a center-of-mass energy 5.5˜TeV per nucleon. Particle tracking around the interaction region at radii r<45 cm is done by the Inner Tracking System (ITS), consisting of six cylindrical layers of silicon detectors. The outer two layers of the ITS use double-sided silicon strip detectors. This thesis focuses on testing of these detectors and performance studies of the detector module prototypes at the beam test. Silicon strip detector layers will require about 20 thousand HAL25 front-end readout chips and about 3.5 thousand hybrids each containing 6 HAL25 chips. During the assembly procedure, chips are bonded on a patterned TAB aluminium microcables which connect to all the chip input and output pads, and then the chips are assembled on the hybrids. Bonding failures at the chip or hybrid level may either render the component non-functional or deteriorate its the performance such that it can not be used for the module production. After each bonding operation, the component testing is done to reject the non-functional or poorly performing chips and hybrids. The LabView-controlled test station for this operation has been built at Utrecht University and was successfully used for mass production acceptance tests of chips and hybrids at three production labs. The functionality of the chip registers, bonding quality and analogue functionality of the chips and hybrids are addressed in the test. The test routines were optimized to minimize the testing time to make sure that testing is not a bottleneck of the mass production. For testing of complete modules the laser scanning station with 1060 nm diode laser has been assembled at Utrecht University. The testing method relies of the fact that a response of the detector module to a short collimated laser beam pulse resembles a response to a minimum ionizing particle. A small beam spot size (˜7 μm ) allows to deposit the charge in a narrow region and measure the response of individual detector channels. First several module prototypes have been studied with this setup, the strip gain and charge sharing function have been measured, the later is compared with the model predictions. It was also shown that for a laser beam of a high monochromaticity, interference in the sensor bulk significantly modulates the deposited charge and introduces a systematic error of the gain measurement. Signatures of disconnected strips and pinholes defects have been observed, the response of the disconnected strips to the laser beam has been correlated with the noise measurements. Beam test of four prototype modules have been carried out at PS accelerator at CERN using 7 GeV/c pions. It was demonstrated that the modules provide an excellent signal-to-noise ratio in the range 40-75. The estimated spatial resolution for the normally incident tracks is about 18 μm using the center-of-gravity cluster reconstruction method. A non-iterative method for spatial resolution determination was developed, it was shown that in order to determine the resolution of each individual detector in the telescope, the telescope should consist of at least 5 detectors. The detectors showed high detection efficiency, in the order 99%. It was shown that the particle loss occurs mostly in the defected regions near the noisy strips or strips with a very low gain. The efficiency of the sensor area with nominal characteristics is consistent with 100%.
Smart substrates: Making multi-chip modules smarter
NASA Astrophysics Data System (ADS)
Wunsch, T. F.; Treece, R. K.
1995-05-01
A novel multi-chip module (MCM) design and manufacturing methodology which utilizes active CMOS circuits in what is normally a passive substrate realizes the 'smart substrate' for use in highly testable, high reliability MCMS. The active devices are used to test the bare substrate, diagnose assembly errors or integrated circuit (IC) failures that require rework, and improve the testability of the final MCM assembly. A static random access memory (SRAM) MCM has been designed and fabricated in Sandia Microelectronics Development Laboratory in order to demonstrate the technical feasibility of this concept and to examine design and manufacturing issues which will ultimately determine the economic viability of this approach. The smart substrate memory MCM represents a first in MCM packaging. At the time the first modules were fabricated, no other company or MCM vendor had incorporated active devices in the substrate to improve manufacturability and testability, and thereby improve MCM reliability and reduce cost.
NASA Astrophysics Data System (ADS)
Hu, Sheng; Lv, Jiangtao; Si, Guangyuan
2016-10-01
A numerical model and simulation relative to an optoelectrofluidic chip has been presented in this article. Both dielectrophoretic and electroosmotic force attracting the nano-sized particles could be studied by the diffusion, convection, and migration equations. For the nano-sized particles, the protein with radius 3.6 nm is considered as the objective particle. The electroosmosis dependent upon applied frequency is calculated, which range 102 Hz from 108 Hz, and provides the much stronger force to enrich proteins than dielectrophoresis (DEP). Meanwhile, the induced light pattern size significantly affecting the concentration distribution is simulated. In this end, the concentration curve has verified that the optoelectrofluidic chip can be capable of manipulating and assembling the suspended submicron particles.
MEMS Microshutter Array System for James Webb Space Telescope
NASA Technical Reports Server (NTRS)
Li, Mary J.; Adachi, Tomoko; Allen, Christine; Babu, Sachi; Bajikar, Sateesh; Beamesderfer, Michael; Bradley, Ruth; Denis, Kevin; Costen, Nick; Ewin, Audrey;
2008-01-01
A complex MEMS microshutter array system has been developed at NASA Goddard Space Flight Center (GSFC) for use as a multi-object aperture array for a Near-Infrared Spectrometer (NIRSpec). The NIRSpec is one of the four major instruments carried by the James Webb Space Telescope (JWST), the next generation of space telescope after the Hubble Space Telescope retires. The microshutter arrays (MSAs) are designed for the selective transmission of light with high efficiency and high contrast. It is demonstrated in Figure 1 how a MSA is used as a multiple object selector in deep space. The MSAs empower the NIRSpec instrument simultaneously collect spectra from more than 100 targets therefore increases the instrument efficiency 100 times or more. The MSA assembly is one of three major innovations on JWST and the first major MEMS devices serving observation missions in space. The MSA system developed at NASA GSFC is assembled with four quadrant fully addressable 365x171 shutter arrays that are actuated magnetically, latched and addressed electrostatically. As shown in Figure 2, each MSA is fabricated out of a 4' silicon-on-insulator (SOI) wafer using MEMS bulk-micromachining technology. Individual shutters are close-packed silicon nitride membranes with a pixel size close to 100x200 pm (Figure 3). Shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. In order to prevent light leak, light shields are made on to the surrounding frame of each shutter to cover the gaps between the shutters and the Game (Figure 4). Micro-ribs and sub-micron bumps are tailored on hack walls and light shields, respectively, to prevent sticktion, shown in Figures 4 and 5. JWST instruments are required to operate at cryogenic temperatures as low as 35K, though they are to be subjected to various levels of ground tests at room temperature. The shutters should therefore maintain nearly flat in the entire temperature range between 35K and 300K. Through intensive numerical simulations and experimental studies, an optically opaque and electrically conductive metal-nitride thin film was selected as a coating material deposited on the shutters with the best thermal-expansion match to silicon nitride - the shutter blade thin film material. A shutter image shown in Figure 6 was taken at room temperature, presenting shutters slightly bowing down as expected. Shutters become flat when the temperature decreases to 35K. The MSAs are then bonded to silicon substrates that are fabricated out of 6" single-silicon wafers in the thickness of 2mm. The bonding is conducted using a novel single-sided indium flip-chip bonding technology. Indium bumps fabricated on a substrate are shown in Figure 7. There are 180,000 indium bumps for bonding a flight format MSA array to its substrate. Besides a MSA, each substrate houses five customer-designed ASIC (Application Specific Integrated Circuit) multiplexer/address chips for 2-dimensional addressing, twenty capacitors, two temperature sensors, numbers of resistors and all necessary interconnects, as shown in Figure 8. Complete MSA quadrant assemblies have been successfully manufactured and fully functionally tested. The assemblies have passed a series of critical reviews required by JWST in satisfying all the design specifications. The qualification tests cover programmable 2-D addressing, life tests, optical contrast tests, and environmental tests including radiation, vibration, and acoustic tests. A 2-D addressing pattern with 'ESA' letters programmed in a MSA is shown in Figure 9. The MSAs passed 1 million cycle life tests and achieved high optical contrast over 10,000. MSA teams are now making progress in final fabrication, testing and assembly (Figure 10). The delivery of flight-format MSA system is scheduled at the end of 2008 for being integrated to the focal plane of the NIRSpec detectors.
3D Printing of Organs-On-Chips
Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo
2017-01-01
Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489
3D Printing of Organs-On-Chips.
Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo
2017-01-25
Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.
Role of Flippases in Protein Glycosylation in the Endoplasmic Reticulum
Rush, Jeffrey S.
2015-01-01
Glycosylation is essential to the synthesis, folding, and function of glycoproteins in eukaryotes. Proteins are co- and posttranslationally modified by a variety of glycans in the endoplasmic reticulum (ER); modifications include C- and O-mannosylation, N-glycosylation, and the addition of glycosylphosphatidylinositol membrane anchors. Protein glycosylation in the ER of eukaryotes involves enzymatic steps on both the cytosolic and lumenal surfaces of the ER membrane. The glycans are first assembled as precursor glycolipids, on the cytosolic surface of the ER, which are tethered to the membrane by attachment to a long-chain polyisoprenyl phosphate (dolichol) containing a reduced α-isoprene. The lipid-anchored building blocks then migrate transversely (flip) across the ER membrane to the lumenal surface, where final assembly of the glycan is completed. This strategy allows the cell to export high-energy biosynthetic intermediates as lipid-bound glycans, while constraining the glycosyl donors to the site of assembly on the membrane surface. This review focuses on the flippases that participate in protein glycosylation in the ER. PMID:26917968
Cheng, H W; Jeng, B M; Chen, C Y; Huang, H Y; Chiou, J C; Luo, C H
2013-01-01
This paper proposed a wireless power harvesting system with micro-electro-mechanical-systems (MEMS) fabrication for noninvasive intraocular pressure (IOP) measurement on soft contact lens substructure. The power harvesting IC consists of a loop antenna, an impedance matching network and a rectifier. The proposed IC has been designed and fabricated by CMOS 0.18 um process that operates at the ISM band of 5.8 GHz. The antenna and the power harvesting IC would be bonded together by using flip chip bonding technologies without extra wire interference. The circuit utilized an impedance transformation circuit to boost the input RF signal that improves the circuit performance. The proposed design achieves an RF-to-DC conversion efficiency of 35% at 5.8 GHz.
NASA Astrophysics Data System (ADS)
Hiramatsu, Seiki; Kinoshita, Masao
2005-09-01
This paper describes the fabrication of novel surface-mountable waveguide connectors and presents test results for them. To ensure more highly integrated and low-cost fabrication, we propose new three-dimensional (3-D) waveguide arrays that feature two-dimensionally integrated optical inputs/outputs and optical path redirection. A wafer-level stack and lamination process was used to fabricate the waveguide arrays. Vertical-cavity surface-emitting lasers (VCSELs) and photodiodes were directly mounted on the arrays and combined with mechanical transferable ferrule using active alignment. With the help of a flip-chip bonder, the waveguide connectors were mounted on a printed circuit board by solder bumps. Using mechanical transferable connectors, which can easily plug into the waveguide connectors, we obtained multi-gigabits-per-second transmission performance.
Method of fabricating a PbS-PbSe IR detector array
NASA Technical Reports Server (NTRS)
Barrett, John R. (Inventor)
1987-01-01
A silicon wafer is provided which does not employ individually bonded leads between the IR sensitive elements and the input stages of multiplexers. The wafer is first coated with lead selenide in a first detector array area and is thereafter coated with lead sulfide within a second detector array area. The described steps result in the direct chemical deposition of lead selenide and lead sulfide upon the silicon wafer to eliminate individual wire bonding, bumping, flip chiping, planar interconnecting methods of connecting detector array elements to silicon chip circuitry, e.g., multiplexers, to enable easy fabrication of very long arrays. The electrode structure employed, produces an increase in the electrical field gradient between the electrodes for a given volume of detector material, relative to conventional electrode configurations.
Creation of a Radiation Hard 0.13 Micron CMOS Library at IHP
NASA Astrophysics Data System (ADS)
Jagdhold, U.
2010-08-01
To support space applications we will develop an 0.13 micron CMOS library which should be radiation hard up to 200 krad. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latchup (SEL). To reduce single event upset (SEU) we will add two p-MOS transistors to all flip flops. For reliability reasons we will use double contacts in all library elements. The additional rules and the library elements will then be integrated in our Cadence mixed signal designkit, Virtuoso IC6.1 [1]. A test chip will be produced with our in house 0.13 micron BiCMOS technology, see Ref. [2].Thereafter we will doing radiation tests according the ESA specifications, see Ref. [3], [4].
Wang, Chih-Wei; Bains, Aman; Sinton, David; Moffitt, Matthew G
2013-07-02
We investigate the loading efficiencies of two chemically distinct hydrophobic fluorescent probes, pyrene and naphthalene, for self-assembly and loading of polystyrene-block-poly(acrylic acid) (PS-b-PAA) micelles in gas-liquid segmented microfluidic reactors under different chemical and flow conditions. On-chip loading efficiencies are compared to values obtained via off-chip dropwise water addition to a solution of copolymer and probe. On-chip, probe loading efficiencies depend strongly on the chemical probe, initial solvent, water content, and flow rate. For pyrene and naphthalene probes, maximum on-chip loading efficiencies of 73 ± 6% and 11 ± 3%, respectively, are obtained, in both cases using the more polar solvent (DMF), an intermediate water content (2 wt % above critical), and a low flow rate (∼5 μL/min); these values are compared to 81 ± 6% and 48 ± 2%, respectively, for off-chip loading. On-chip loading shows a significant improvement over the off-chip process where shear-induced formation of smaller micelles enables increased encapsulation of probe. As well, we show that on-chip loading allows off-chip release kinetics to be controlled via flow rate: compared to vehicles produced at ∼5 μL/min, pyrene release kinetics from vehicles produced at ∼50 μL/min showed a longer initial period of burst release, followed by slow release over a longer total period. These results demonstrate the necessity to match probes, solvents, and running conditions to achieve effective loading, which is essential information for further developing these on-chip platforms for manufacturing drug delivery formulations.
NASA Astrophysics Data System (ADS)
Zhao, Yuejin
1996-06-01
In this paper, a new method for image stabilization with a three-axis image- stabilizing reflecting prism assembly is presented, and the principle of image stabilization in this prism assembly, formulae for image stabilization and working formulae with an approximation up to the third power are given in detail. In this image-stabilizing system, a single chip microcomputer is used to calculate value of compensating angles and thus to control the prism assembly. Two gyroscopes act as sensors from which information of angular perturbation is obtained, three stepping motors drive the prism assembly to compensate for the movement of image produced by angular perturbation. The image-stabilizing device so established is a multifold system which involves optics, mechanics, electronics and computer.
Geometric correction methods for Timepix based large area detectors
NASA Astrophysics Data System (ADS)
Zemlicka, J.; Dudak, J.; Karch, J.; Krejci, F.
2017-01-01
X-ray micro radiography with the hybrid pixel detectors provides versatile tool for the object inspection in various fields of science. It has proven itself especially suitable for the samples with low intrinsic attenuation contrast (e.g. soft tissue in biology, plastics in material sciences, thin paint layers in cultural heritage, etc.). The limited size of single Medipix type detector (1.96 cm2) was recently overcome by the construction of large area detectors WidePIX assembled of Timepix chips equipped with edgeless silicon sensors. The largest already built device consists of 100 chips and provides fully sensitive area of 14.3 × 14.3 cm2 without any physical gaps between sensors. The pixel resolution of this device is 2560 × 2560 pixels (6.5 Mpix). The unique modular detector layout requires special processing of acquired data to avoid occurring image distortions. It is necessary to use several geometric compensations after standard corrections methods typical for this type of pixel detectors (i.e. flat-field, beam hardening correction). The proposed geometric compensations cover both concept features and particular detector assembly misalignment of individual chip rows of large area detectors based on Timepix assemblies. The former deals with larger border pixels in individual edgeless sensors and their behaviour while the latter grapple with shifts, tilts and steps between detector rows. The real position of all pixels is defined in Cartesian coordinate system and together with non-binary reliability mask it is used for the final image interpolation. The results of geometric corrections for test wire phantoms and paleo botanic material are presented in this article.
Full Flip, Half Flip and No Flip: Evaluation of Flipping an Introductory Programming Course
ERIC Educational Resources Information Center
Fryling, Meg; Yoder, Robert; Breimer, Eric
2016-01-01
While some research has suggested that video lectures are just as effective as in-person lectures to convey basic information to students, not everyone agrees that the flipped classroom model is an effective way of educating students. This research explores traditional, semi-flipped and fully-flipped classroom models by comparing three sections of…
Rapid qualification of CSP assemblies by increase of ramp rates and cycling temperature ranges
NASA Technical Reports Server (NTRS)
Ghaffarian, R.; Kim, N.; Rose, D.; Hunter, B.; Devitt, K.; Long, T.
2001-01-01
Team members representing government agencies and private companies have joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.
Chen, Qiushui; He, Ziyi; Liu, Wu; Lin, Xuexia; Wu, Jing; Li, Haifang; Lin, Jin-Ming
2015-10-28
Paper-supported cell culture is an unprecedented development for advanced bioassays. This study reports a strategy for in vitro engineering of cell-compatible paper chips that allow for adherent cell culture, quantitative assessment of drug efficiency, and label-free sensing of intracellular molecules via paper spray mass spectrometry. The polycarbonate paper is employed as an excellent alternative bioscaffold for cell distribution, adhesion, and growth, as well as allowing for fluorescence imaging without light scattering. The cell-cultured paper chips are thus amenable to fabricate 3D tissue construction and cocultures by flexible deformation, stacks and assembly by layers of cells. As a result, the successful development of cell-compatible paper chips subsequently offers a uniquely flexible approach for in situ sensing of live cell components by paper spray mass spectrometry, allowing profiling the cellular lipids and quantitative measurement of drug metabolism with minimum sample pretreatment. Consequently, the developed paper chips for adherent cell culture are inexpensive for one-time use, compatible with high throughputs, and amenable to label-free and rapid analysis. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Yamamoto, Shuu'ichirou; Shuto, Yusuke; Sugahara, Satoshi
2013-07-01
We computationally analyzed performance and power-gating (PG) ability of a new nonvolatile delay flip-flop (NV-DFF) based on pseudo-spin-MOSFET (PS-MOSFET) architecture using spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The high-performance energy-efficient PG operations of the NV-DFF can be achieved owing to its cell structure employing PS-MOSFETs that can electrically separate the STT-MTJs from the ordinary DFF part of the NV-DFF. This separation also makes it possible that the break-even time (BET) of the NV-DFF is designed by the size of the PS-MOSFETs without performance degradation of the normal DFF operations. The effect of the area occupation ratio of the NV-DFFs to a CMOS logic system on the BET was also analyzed. Although the optimized BET was varied depending on the area occupation ratio, energy-efficient fine-grained PG with a BET of several sub-microseconds was revealed to be achieved. We also proposed microprocessors and system-on-chip (SoC) devices using nonvolatile hierarchical-memory systems wherein NV-DFF and nonvolatile static random access memory (NV-SRAM) circuits are used as fundamental building blocks. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.
Analytical study of a microfludic DNA amplification chip using water cooling effect.
Chen, Jyh Jian; Shen, Chia Ming; Ko, Yu Wei
2013-04-01
A novel continuous-flow polymerase chain reaction (PCR) chip has been analyzed in our work. Two temperature zones are controlled by two external controllers and the other temperature zone at the chip center is controlled by the flow rate of the fluid inside a channel under the glass chip. By employing a water cooling channel at the chip center, the sequence of denaturation, annealing, and extension can be created due to the forced convection effect. The required annealing temperature of PCR less than 313 K can also be demonstrated in this chip. The Poly(methyl methacrylate) (PMMA) cooling channel with the thin aluminum cover is utilized to enhance the temperature uniformity. The size of this chip is 76 mm × 26 mm × 3 mm. This device represents the first demonstration of water cooling thermocycling within continuous-flow PCR microfluidics. The commercial software CFD-ACE+(TM) is utilized to determine the distances between the heating assemblies within the chip. We investigate the influences of various chip materials, operational parameters of the cooling channel and geometric parameters of the chip on the temperature uniformity on the chip surface. Concerning the temperature uniformity of the working zones and the lowest temperature at the annealing zone, the air gap spacing of 1 mm and the cooling channel thicknesses of 1 mm of the PMMA channel with an aluminum cover are recommended in our design. The hydrophobic surface of the PDMS channel was modified by filling it with 20 % Tween 20 solution and then adding bovine serum albumin (BSA) solution to the PCR mixture. DNA fragments with different lengths (372 bp and 478 bp) are successfully amplified with the device.
Design and characterization of a 52K SNP chip for goats.
Tosser-Klopp, Gwenola; Bardou, Philippe; Bouchez, Olivier; Cabau, Cédric; Crooijmans, Richard; Dong, Yang; Donnadieu-Tonon, Cécile; Eggen, André; Heuven, Henri C M; Jamli, Saadiah; Jiken, Abdullah Johari; Klopp, Christophe; Lawley, Cynthia T; McEwan, John; Martin, Patrice; Moreno, Carole R; Mulsant, Philippe; Nabihoudine, Ibouniyamine; Pailhoux, Eric; Palhière, Isabelle; Rupp, Rachel; Sarry, Julien; Sayre, Brian L; Tircazes, Aurélie; Jun Wang; Wang, Wen; Zhang, Wenguang
2014-01-01
The success of Genome Wide Association Studies in the discovery of sequence variation linked to complex traits in humans has increased interest in high throughput SNP genotyping assays in livestock species. Primary goals are QTL detection and genomic selection. The purpose here was design of a 50-60,000 SNP chip for goats. The success of a moderate density SNP assay depends on reliable bioinformatic SNP detection procedures, the technological success rate of the SNP design, even spacing of SNPs on the genome and selection of Minor Allele Frequencies (MAF) suitable to use in diverse breeds. Through the federation of three SNP discovery projects consolidated as the International Goat Genome Consortium, we have identified approximately twelve million high quality SNP variants in the goat genome stored in a database together with their biological and technical characteristics. These SNPs were identified within and between six breeds (meat, milk and mixed): Alpine, Boer, Creole, Katjang, Saanen and Savanna, comprising a total of 97 animals. Whole genome and Reduced Representation Library sequences were aligned on >10 kb scaffolds of the de novo goat genome assembly. The 60,000 selected SNPs, evenly spaced on the goat genome, were submitted for oligo manufacturing (Illumina, Inc) and published in dbSNP along with flanking sequences and map position on goat assemblies (i.e. scaffolds and pseudo-chromosomes), sheep genome V2 and cattle UMD3.1 assembly. Ten breeds were then used to validate the SNP content and 52,295 loci could be successfully genotyped and used to generate a final cluster file. The combined strategy of using mainly whole genome Next Generation Sequencing and mapping on a contig genome assembly, complemented with Illumina design tools proved to be efficient in producing this GoatSNP50 chip. Advances in use of molecular markers are expected to accelerate goat genomic studies in coming years.
Design and Characterization of a 52K SNP Chip for Goats
Tosser-Klopp, Gwenola; Bardou, Philippe; Bouchez, Olivier; Cabau, Cédric; Crooijmans, Richard; Dong, Yang; Donnadieu-Tonon, Cécile; Eggen, André; Heuven, Henri C. M.; Jamli, Saadiah; Jiken, Abdullah Johari; Klopp, Christophe; Lawley, Cynthia T.; McEwan, John; Martin, Patrice; Moreno, Carole R.; Mulsant, Philippe; Nabihoudine, Ibouniyamine; Pailhoux, Eric; Palhière, Isabelle; Rupp, Rachel; Sarry, Julien; Sayre, Brian L.; Tircazes, Aurélie; Jun Wang; Wang, Wen; Zhang, Wenguang
2014-01-01
The success of Genome Wide Association Studies in the discovery of sequence variation linked to complex traits in humans has increased interest in high throughput SNP genotyping assays in livestock species. Primary goals are QTL detection and genomic selection. The purpose here was design of a 50–60,000 SNP chip for goats. The success of a moderate density SNP assay depends on reliable bioinformatic SNP detection procedures, the technological success rate of the SNP design, even spacing of SNPs on the genome and selection of Minor Allele Frequencies (MAF) suitable to use in diverse breeds. Through the federation of three SNP discovery projects consolidated as the International Goat Genome Consortium, we have identified approximately twelve million high quality SNP variants in the goat genome stored in a database together with their biological and technical characteristics. These SNPs were identified within and between six breeds (meat, milk and mixed): Alpine, Boer, Creole, Katjang, Saanen and Savanna, comprising a total of 97 animals. Whole genome and Reduced Representation Library sequences were aligned on >10 kb scaffolds of the de novo goat genome assembly. The 60,000 selected SNPs, evenly spaced on the goat genome, were submitted for oligo manufacturing (Illumina, Inc) and published in dbSNP along with flanking sequences and map position on goat assemblies (i.e. scaffolds and pseudo-chromosomes), sheep genome V2 and cattle UMD3.1 assembly. Ten breeds were then used to validate the SNP content and 52,295 loci could be successfully genotyped and used to generate a final cluster file. The combined strategy of using mainly whole genome Next Generation Sequencing and mapping on a contig genome assembly, complemented with Illumina design tools proved to be efficient in producing this GoatSNP50 chip. Advances in use of molecular markers are expected to accelerate goat genomic studies in coming years. PMID:24465974
Multi-wafer bonding technology for the integration of a micromachined Mirau interferometer
NASA Astrophysics Data System (ADS)
Wang, Wei-Shan; Lullin, Justine; Froemel, Joerg; Wiemer, Maik; Bargiel, Sylwester; Passilly, Nicolas; Gorecki, Christophe; Gessner, Thomas
2015-02-01
The paper presents the multi-wafer bonding technology as well as the integration of electrical connection to the zscanner wafer of the micromachined array-type Mirau interferometer. A Mirau interferometer, which is a key-component of optical coherence tomography (OCT) microsystem, consists of a microlens doublet, a MOEMS Z-scanner, a focusadjustment spacer and a beam splitter plate. For the integration of this MOEMS device heterogeneous bonding of Si, glass and SOI wafers is necessary. Previously, most of the existing methods for multilayer wafer bonding require annealing at high temperature, i.e., 1100°C. To be compatible with MEMS devices, bonding of different material stacks at temperatures lower than 400°C has also been investigated. However, if more components are involved, it becomes less effective due to the alignment accuracy or degradation of surface quality of the not-bonded side after each bonding operation. The proposed technology focuses on 3D integration of heterogeneous building blocks, where the assembly process is compatible with the materials of each wafer stack and with position accuracy which fits optical requirement. A demonstrator with up to 5 wafers bonded lower than 400°C is presented and bond interfaces are evaluated. To avoid the complexity of through wafer vias, a design which creates electrical connections along vertical direction by mounting a wafer stack on a flip chip PCB is proposed. The approach, which adopts vertically-stacked wafers along with electrical connection functionality, provides not only a space-effective integration of MOEMS device but also a design where the Mirau stack can be further integrated with other components of the OCT microsystem easily.
Manufacturing and testing VLPC hybrids
NASA Astrophysics Data System (ADS)
Adkins, L. R.; Ingram, C. M.; Anderson, E. J.
1998-11-01
To insure that the manufacture of VLPC devices is a reliable, cost-effective technology, hybrid assembly procedures and testing methods suitable for large scale production have been developed. This technology has been developed under a contract from Fermilab as part of the D-Zero upgrade program. Each assembled hybrid consists of a VLPC chip mounted on an AlN substrate. The VLPC chip is provided with bonding pads (one connected to each pixel) which are wire bonded to gold traces on the substrate. The VLPC/AlN hybrids are mated in a vacuum sealer using solder preforms and a specially designed carbon boat. After mating, the VLPC pads are bonded to the substrate with an automatic wire bonder. Using this equipment we have achieved a thickness tolerance of ±0.0007 inches and a production rate of 100 parts per hour. After assembly the VLPCs are tested for optical response at an operating temperature of 7K. The parts are tested in a custom designed continuous-flow dewar with a capacity 15 hybrids, and one Lake Shore DT470-SD-11 calibrated temperature sensor mounted to an AlN substrate. Our facility includes five of these dewars with an ultimate test capacity of 75 parts per day. During the course of the Dzero program we have assembled more than 4,000 VLPC hybrids and have tested more than 2,500 with a high yield.
NASA Astrophysics Data System (ADS)
Park, Hwan-Pil; Seo, Gwancheol; Kim, Sungchul; Kim, Young-Ho
2018-01-01
The effects of solder volume and reaction time between molten solder and a metal pad at the peak temperature of reflow on the self-alignment effect have been investigated in flip chip bonding. A glass die with two different pad designs and a flame retardant-4 (FR-4) organic substrate were used. Sn-3.0Ag-0.5Cu and Sn-3.5Ag solders were formed on Cu-organic solderability preservation (Cu-OSP) and electroless nickel electroless palladium immersion gold (ENEPIG) pads on FR-4 substrates using the stencil printing method. To assess the effect of solder volume, the thickness and opening size of the stencil mask were controlled. Reflow experiments were performed at 250°C with wetting times of 40 s, 55 s, 65 s, and 75 s. After flip chip reflow soldering, the bonding areas were cross-sectioned to inspect the shape of the interconnected solder using scanning electron microscopy. The results revealed that using an insufficient solder volume on the pad was responsible for die shifts larger than 1 μm, while a sufficient solder volume on the pad and a stable solder joint shape could ensure misalignment less than 1 μm. The Sn-3.0Ag-0.5Cu solder showed a lower die shift value than the Sn-3.5Ag solder because the Sn-3.0Ag-0.5Cu solder has stronger surface tension than the Sn-3.5Ag solder. Using a longer wetting time between the solder and the pad at the peak temperature also improved the die shift value because the increased reaction time changed the interconnected solder shape between the die and substrate from concave to convex, moving the die to a more accurate position. Furthermore, the restoring forces on die self-alignment influenced the die shift value. A stronger solder surface tension and a larger volume of solder on the pad produced stronger restoring forces for die self-alignment, thereby improving the die shift value.
NASA Astrophysics Data System (ADS)
Stelzle, Martin
2010-02-01
Microfluidic device technology provides unique physical phenomena which are not available in the macroscopic world. These may be exploited towards a diverse array of applications in biotechnology and biomedicine ranging from bioseparation of particulate samples to the assembly of cells into structures that resemble the smallest functional unit of an organ. In this paper a general overview of chip-based particle manipulation and separation is given. In the state of the art electric, magnetic, optical and gravitational field effects are utilized. Also, mechanical obstacles often in combination with force fields and laminar flow are employed to achieve separation of particles or molecules. In addition, three applications based on dielectrophoretic forces for particle manipulation in microfluidic systems are discussed in more detail. Firstly, a virus assay is demonstrated. There, antibody-loaded microbeads are used to bind virus particles from a sample and subsequently are accumulated to form a pico-liter sized aggregate located at a predefined position in the chip thus enabling highly sensitive fluorescence detection. Secondly, subcellular fractionation of mitochondria from cell homogenate yields pure samples as was demonstrated by Western Blot and 2D PAGE analysis. Robust long-term operation with complex cell homogenate samples while avoiding electrode fouling is achieved by a set of dedicated technical means. Finally, a chip intended for the dielectrophoretic assembly of hepatocytes and endothelial cells into a structure resembling a liver sinusoid is presented. Such "artificial micro organs" are envisioned as substance screening test systems providing significantly higher predictability with respect to the in vivo response towards a substance under test.
A novel readout integrated circuit for ferroelectric FPA detector
NASA Astrophysics Data System (ADS)
Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying
2017-11-01
Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.
Manikandan, M; Gopal, Judy; Hasan, Nazim; Wu, Hui-Fen
2014-12-01
We developed a cancer chip by nano-patterning a highly sensitive SAM titanium surface capable of capturing and sensing concentrations as low as 10 cancer cells/mL from the environment by Matrix Assisted Laser Desorption and Ionization Time of Flight Mass Spectrometry (MALDI-TOF MS). The current approach evades any form of pretreatment and sample preparation processes; it is time saving and does not require the (expensive) conventional MALDI target plate. The home made aluminium (Al) target holder cost, on which we loaded the cancer chips for MALDI-TOF MS analysis, is about 60 USD. While the conventional stainless steel MALDI target plate is more than 700 USD. The SAM surface was an effective platform leading to on-chip direct MALDI-MS detection of cancer cells. We compared the functionality of this chip with the unmodified titanium surfaces and thermally oxidized (TO) titanium surfaces. The lowest detectable concentration of the TO chip was 10(3) cells/mL, while the lowest detectable concentration of the control or unmodified titanium chips was 10(6) cells/mL. Compared to the control surface, the SAM cancer chip showed 100,000 times of enhanced sensitivity and compared with the TO chip, 1000 times of increased sensitivity. The high sensitivity of the SAM surfaces is attributed to the presence of the rutile SAM, surface roughness and surface wettability as confirmed by AFM, XRD, contact angle microscope and FE-SEM. This study opens a new avenue for the potent application of the SAM cancer chip for direct cancer diagnosis by MALDI-TOF MS in the near future. Copyright © 2014. Published by Elsevier B.V.
Cipolla, Thomas M [Katonah, NY; Colgan, Evan George [Chestnut Ridge, NY; Coteus, Paul W [Yorktown Heights, NY; Hall, Shawn Anthony [Pleasantville, NY; Tian, Shurong [Mount Kisco, NY
2011-12-20
A cooling apparatus, system and like method for an electronic device includes a plurality of heat producing electronic devices affixed to a wiring substrate. A plurality of heat transfer assemblies each include heat spreaders and thermally communicate with the heat producing electronic devices for transferring heat from the heat producing electronic devices to the heat transfer assemblies. The plurality of heat producing electronic devices and respective heat transfer assemblies are positioned on the wiring substrate having the regions overlapping. A heat conduit thermally communicates with the heat transfer assemblies. The heat conduit circulates thermally conductive fluid therethrough in a closed loop for transferring heat to the fluid from the heat transfer assemblies via the heat spreader. A thermally conductive support structure supports the heat conduit and thermally communicates with the heat transfer assemblies via the heat spreader transferring heat to the fluid of the heat conduit from the support structure.
Microfluidic, marker-free isolation of circulating tumor cells from blood samples
Karabacak, Nezihi Murat; Spuhler, Philipp S; Fachin, Fabio; Lim, Eugene J; Pai, Vincent; Ozkumur, Emre; Martel, Joseph M; Kojic, Nikola; Smith, Kyle; Chen, Pin-i; Yang, Jennifer; Hwang, Henry; Morgan, Bailey; Trautwein, Julie; Barber, Thomas A; Stott, Shannon L; Maheswaran, Shyamala; Kapur, Ravi; Haber, Daniel A; Toner, Mehmet
2014-01-01
The ability to isolate and analyze rare circulating tumor cells (CTCs) has the potential to further our understanding of cancer metastasis and enhance the care of cancer patients. In this protocol, we describe the procedure for isolating rare CTCs from blood samples by using tumor antigen–independent microfluidic CTC-iChip technology. The CTC-iChip uses deterministic lateral displacement, inertial focusing and magnetophoresis to sort up to 107 cells/s. By using two-stage magnetophoresis and depletion antibodies against leukocytes, we achieve 3.8-log depletion of white blood cells and a 97% yield of rare cells with a sample processing rate of 8 ml of whole blood/h. The CTC-iChip is compatible with standard cytopathological and RNA-based characterization methods. This protocol describes device production, assembly, blood sample preparation, system setup and the CTC isolation process. Sorting 8 ml of blood sample requires 2 h including setup time, and chip production requires 2–5 d. PMID:24577360
Nanohole Array-directed Trapping of Mammalian Mitochondria Enabling Single Organelle Analysis
Kumar, Shailabh; Wolken, Gregory G.; Wittenberg, Nathan J.; Arriaga, Edgar A.; Oh, Sang-Hyun
2016-01-01
We present periodic nanohole arrays fabricated in free-standing metal-coated nitride films as a platform for trapping and analyzing single organelles. When a microliter-scale droplet containing mitochondria is dispensed above the nanohole array, the combination of evaporation and capillary flow directs individual mitochondria to the nanoholes. Mammalian mitochondria arrays were rapidly formed on chip using this technique without any surface modification steps, microfluidic interconnects or external power sources. The trapped mitochondria were depolarized on chip using an ionophore with results showing that the organelle viability and behavior were preserved during the on-chip assembly process. Fluorescence signal related to mitochondrial membrane potential was obtained from single mitochondria trapped in individual nanoholes revealing statistical differences between the behavior of polarized vs. depolarized mammalian mitochondria. This technique provides a fast and stable route for droplet-based directed localization of organelles-on-a-chip with minimal limitations and complexity, as well as promotes integration with other optical or electrochemical detection techniques. PMID:26593329
A nanoporous alumina microelectrode array for functional cell-chip coupling.
Wesche, Manuel; Hüske, Martin; Yakushenko, Alexey; Brüggemann, Dorothea; Mayer, Dirk; Offenhäusser, Andreas; Wolfrum, Bernhard
2012-12-14
The design of electrode interfaces has a strong impact on cell-based bioelectronic applications. We present a new type of microelectrode array chip featuring a nanoporous alumina interface. The chip is fabricated in a combination of top-down and bottom-up processes using state-of-the-art clean room technology and self-assembled generation of nanopores by aluminum anodization. The electrode characteristics are investigated in phosphate buffered saline as well as under cell culture conditions. We show that the modified microelectrodes exhibit decreased impedance compared to planar microelectrodes, which is caused by a nanostructuring effect of the underlying gold during anodization. The stability and biocompatibility of the device are demonstrated by measuring action potentials from cardiomyocyte-like cells growing on top of the chip. Cross sections of the cell-surface interface reveal that the cell membrane seals the nanoporous alumina layer without bending into the sub-50 nm apertures. The nanoporous microelectrode array device may be used as a platform for combining extracellular recording of cell activity with stimulating topographical cues.
On-chip free beam optics on a polymer-based photonic integration platform.
Happach, M; de Felipe, D; Conradi, H; Friedhoff, V N; Schwartz, E; Kleinert, M; Brinker, W; Zawadzki, C; Keil, N; Hofmann, W; Schell, M
2017-10-30
This paper presents on-chip free beam optics on polymer-based photonic components. Due to the circumstance that waveguide-based optics allows no direct beam access we use Gradient index (GRIN) lenses assembled into the chip to collimate the beam from the waveguides. This enables low loss power transmission over a length of 1432 µm. Even though the beam propagates through air it is possible to create a resonator with a wavelength shift of 0.002 nm/°C, hence the allowed deviations from the ITU-T grid (100 GHz) are met for ± 20 °C. In order to guarantee reliable laser stability, it is necessary to implement optical isolators at the output of the laser. This requires the insertion of bulk material into the chip and is realized by a 1050 µm thick coated glass. Due to the large gap of the free-space section, it is possible to combine different resonators together. This demonstrates the feasibility of an integrated wavelength-meter.
Lab-on-CMOS Integration of Microfluidics and Electrochemical Sensors
Huang, Yue; Mason, Andrew J.
2013-01-01
This paper introduces a CMOS-microfluidics integration scheme for electrochemical microsystems. A CMOS chip was embedded into a micro-machined silicon carrier. By leveling the CMOS chip and carrier surface to within 100 nm, an expanded obstacle-free surface suitable for photolithography was achieved. Thin film metal planar interconnects were microfabricated to bridge CMOS pads to the perimeter of the carrier, leaving a flat and smooth surface for integrating microfluidic structures. A model device containing SU-8 microfluidic mixers and detection channels crossing over microelectrodes on a CMOS integrated circuit was constructed using the chip-carrier assembly scheme. Functional integrity of microfluidic structures and on-CMOS electrodes was verified by a simultaneous sample dilution and electrochemical detection experiment within multi-channel microfluidics. This lab-on-CMOS integration process is capable of high packing density, is suitable for wafer-level batch production, and opens new opportunities to combine the performance benefits of on-CMOS sensors with lab-on-chip platforms. PMID:23939616
The optical design of 3D ICs for smartphone and optro-electronics sensing module
NASA Astrophysics Data System (ADS)
Huang, Jiun-Woei
2018-03-01
Smartphone require limit space for image system, current lens, used in smartphones are refractive type, the effective focal length is limited the thickness of phone physical size. Other, such as optro-electronics sensing chips, proximity optical sensors, and UV indexer chips are integrated into smart phone with limit space. Due to the requirement of multiple lens in smartphone, proximity optical sensors, UV indexer and other optro-electronics sensing chips in a limited space of CPU board in future smart phone, optro-electronics 3D IC's integrated with optical lens or components may be a key technology for 3 C products. A design for reflective lens is fitted to CMOS, proximity optical sensors, UV indexer and other optro-electronics sensing chips based on 3-D IC. The reflective lens can be threes times of effective focal lens, and be able to resolve small object. The system will be assembled and integrated in one 3-D IC more easily.
Lab-on-CMOS integration of microfluidics and electrochemical sensors.
Huang, Yue; Mason, Andrew J
2013-10-07
This paper introduces a CMOS-microfluidics integration scheme for electrochemical microsystems. A CMOS chip was embedded into a micro-machined silicon carrier. By leveling the CMOS chip and carrier surface to within 100 nm, an expanded obstacle-free surface suitable for photolithography was achieved. Thin film metal planar interconnects were microfabricated to bridge CMOS pads to the perimeter of the carrier, leaving a flat and smooth surface for integrating microfluidic structures. A model device containing SU-8 microfluidic mixers and detection channels crossing over microelectrodes on a CMOS integrated circuit was constructed using the chip-carrier assembly scheme. Functional integrity of microfluidic structures and on-CMOS electrodes was verified by a simultaneous sample dilution and electrochemical detection experiment within multi-channel microfluidics. This lab-on-CMOS integration process is capable of high packing density, is suitable for wafer-level batch production, and opens new opportunities to combine the performance benefits of on-CMOS sensors with lab-on-chip platforms.
Bunge, Frank; Driesche, Sander van den; Vellekoop, Michael J
2017-07-10
Lab-on-a-Chip (LoC) applications for the long-term analysis of mammalian cells are still very rare due to the lack of convenient cell cultivation devices. The difficulties are the integration of suitable supply structures, the need of expensive equipment like an incubator and sophisticated pumps as well as the choice of material. The presented device is made out of hard, but non-cytotoxic materials (silicon and glass) and contains two vertical arranged membranes out of hydrogel. The porous membranes are used to separate the culture chamber from two supply channels for gases and nutrients. The cells are fed continuously by diffusion through the membranes without the need of an incubator and low requirements on the supply of medium to the assembly. The diffusion of oxygen is modelled in order to find the optimal dimensions of the chamber. The chip is connected via 3D-printed holders to the macroscopic world. The holders are coated with Parlyene C to ensure that only biocompatible materials are in contact with the culture medium. The experiments with MDCK-cells show the successful seeding inside the chip, culturing and passaging. Consequently, the presented platform is a step towards Lab-on-a-Chip applications that require long-term cultivation of mammalian cells.
Estes, Matthew D; Yang, Jianing; Duane, Brett; Smith, Stan; Brooks, Carla; Nordquist, Alan; Zenhausern, Frederic
2012-12-07
This study reports the design, prototyping, and assay development of multiplexed polymerase chain reaction (PCR) on a plastic microfluidic device. Amplification of 17 DNA loci is carried out directly on-chip as part of a system for continuous workflow processing from sample preparation (SP) to capillary electrophoresis (CE). For enhanced performance of on-chip PCR amplification, improved control systems have been developed making use of customized Peltier assemblies, valve actuators, software, and amplification chemistry protocols. Multiple enhancements to the microfluidic chip design have been enacted to improve the reliability of sample delivery through the various on-chip modules. This work has been enabled by the encapsulation of PCR reagents into a solid phase material through an optimized Solid Phase Encapsulating Assay Mix (SPEAM) bead-based hydrogel fabrication process. SPEAM bead technology is reliably coupled with precise microfluidic metering and dispensing for efficient amplification and subsequent DNA short tandem repeat (STR) fragment analysis. This provides a means of on-chip reagent storage suitable for microfluidic automation, with the long shelf-life necessary for point-of-care (POC) or field deployable applications. This paper reports the first high quality 17-plex forensic STR amplification from a reference sample in a microfluidic chip with preloaded solid phase reagents, that is designed for integration with up and downstream processing.
NASA Technical Reports Server (NTRS)
Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;
2012-01-01
The Cosmology Large Angular Scale Surveyor (CLASS) is a ground-based instrument that will measure the polarization of the cosmic microqave background to search for gravitational waves form a posited epoch of inflation early in the universe's history. This measurement will require integration of superconducting transition-edge sensors with microwave waveguide inputs with good conrol of systematic errors, such as unwanted coupling to stray signals at frequencies outside of a precisely defined microwave band. To address these needs we will present work on the fabrication of silicon quarter-wave backshorts for the CLASS 40GHz focal plane. The 40GHz backshort consists of three degeneratively doped silicon wafers. Two spacer wafers are micromachined with through wafer vins to provide a 2.0mm long square waveguide. The third wafer acts as the backshort cap. The three wafers are bonded at the wafer level by Au-Au thermal compression bonding then aligned and flip chip bonded to the CLASS detector at the chip level. The micromachining techniques used have been optimized to create high aspect ratio waveguides, silicon pillars, and relief trenches with the goal of providing improved out of band signal rejection. We will discuss the fabrication of integrated CLASS superconducting detectors with silicon quarter wave backshorts and present current measurement results.
NASA Astrophysics Data System (ADS)
Dongxue, Wu; Ping, Ma; Boting, Liu; Shuo, Zhang; Junxi, Wang; Jinmin, Li
2016-10-01
The effect of patterned sapphire substrate (PSS) on the top-surface (P-GaN-surface) and the bottom-surface (sapphire-surface) of the light output power (LOP) of GaN-based LEDs was investigated, in order to study the changes in reflection and transmission of the GaN-sapphire interface. Experimental research and computer simulations were combined to reveal a great enhancement in LOP from either the top or bottom surface of GaN-based LEDs, which are prepared on patterned sapphire substrates (PSS-LEDs). Furthermore, the results were compared to those of the conventional LEDs prepared on the planar sapphire substrates (CSS-LEDs). A detailed theoretical analysis was also presented to further support the explanation for the increase in both the effective reflection and transmission of PSS-GaN interface layers and to explain the causes of increased LOP values. Moreover, the bottom-surface of the PSS-LED chip shows slightly increased light output performance when compared to that of the top-surface. Therefore, the light extraction efficiency (LEE) can be further enhanced by integrating the method of PSS and flip-chip structure design. Project supported by the National High Technology Program of China (No. Y48A040000) and the National High Technology Program of China (No. Y48A040000).
Thin-Film Quantum Dot Photodiode for Monolithic Infrared Image Sensors †
Georgitzikis, Epimitheas; Vamvaka, Ioanna; Frazzica, Fortunato; Van Olmen, Jan; De Moor, Piet; Heremans, Paul; Hens, Zeger; Cheyns, David
2017-01-01
Imaging in the infrared wavelength range has been fundamental in scientific, military and surveillance applications. Currently, it is a crucial enabler of new industries such as autonomous mobility (for obstacle detection), augmented reality (for eye tracking) and biometrics. Ubiquitous deployment of infrared cameras (on a scale similar to visible cameras) is however prevented by high manufacturing cost and low resolution related to the need of using image sensors based on flip-chip hybridization. One way to enable monolithic integration is by replacing expensive, small-scale III–V-based detector chips with narrow bandgap thin-films compatible with 8- and 12-inch full-wafer processing. This work describes a CMOS-compatible pixel stack based on lead sulfide quantum dots (PbS QD) with tunable absorption peak. Photodiode with a 150-nm thick absorber in an inverted architecture shows dark current of 10−6 A/cm2 at −2 V reverse bias and EQE above 20% at 1440 nm wavelength. Optical modeling for top illumination architecture can improve the contact transparency to 70%. Additional cooling (193 K) can improve the sensitivity to 60 dB. This stack can be integrated on a CMOS ROIC, enabling order-of-magnitude cost reduction for infrared sensors. PMID:29232871
Compact light-emitting diode lighting ring for video-assisted thoracic surgery.
Lu, Ming-Kuan; Chang, Feng-Chen; Wang, Wen-Zhe; Hsieh, Chih-Cheng; Kao, Fu-Jen
2014-01-01
In this work, a foldable ring-shaped light-emitting diode (LED) lighting assembly, designed to attach to a rubber wound retractor, is realized and tested through porcine animal experiments. Enabled by the small size and the high efficiency of LED chips, the lighting assembly is compact, flexible, and disposable while providing direct and high brightness lighting for more uniform background illumination in video-assisted thoracic surgery (VATS). When compared with a conventional fiber bundle coupled light source that is usually used in laparoscopy and endoscopy, the much broader solid angle of illumination enabled by the LED assembly allows greatly improved background lighting and imaging quality in VATS.
To Flip or Not to Flip? An Exploratory Study Comparing Student Performance in Calculus I
ERIC Educational Resources Information Center
Schroeder, Larissa B.; McGivney-Burelle, Jean; Xue, Fei
2015-01-01
The purpose of this exploratory, mixed-methods study was to compare student performance in flipped and non-flipped sections of Calculus I. The study also examined students' perceptions of the flipping pedagogy. Students in the flipped courses reported spending, on average, an additional 1-2 hours per week outside of class on course content.…
ERIC Educational Resources Information Center
Burgoyne, Stephanie; Eaton, Judy
2018-01-01
Flipped classrooms are gaining popularity, especially in psychology statistics courses. However, not all courses lend themselves to a fully flipped design, and some instructors might not want to commit to flipping every class. We tested the effectiveness of flipping just one component (a module on junk science) of a large methods course. We…
Process development of beam-lead silicon-gate COS/MOS integrated circuits
NASA Technical Reports Server (NTRS)
Baptiste, B.; Boesenberg, W.
1974-01-01
Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.
Hollow Core Bragg Waveguide Design and Fabrication for Enhanced Raman Spectroscopy
NASA Astrophysics Data System (ADS)
Ramanan, Janahan
Raman spectroscopy is a widely used technique to unambiguously ascertain the chemical composition of a sample. The caveat with this technique is its extremely weak optical cross-section, making it difficult to measure Raman signal with standard optical setups. In this thesis, a novel hollow core Bragg Reflection Waveguide was designed to simultaneously increase the generation and collection of Raman scattered photons. A robust fabrication process of this waveguide was developed employing flip-chip bonding methods to securely seal the hollow core channel. The waveguide air-core propagation loss was experimentally measured to be 0.17 dB/cm, and the Raman sensitivity limit was measured to be 3 mmol/L for glycerol solution. The waveguide was also shown to enhance Raman modes of standard household aerosols that could not be seen with other devices.
Facile fabrication of microfluidic surface-enhanced Raman scattering devices via lift-up lithography
NASA Astrophysics Data System (ADS)
Wu, Yuanzi; Jiang, Ye; Zheng, Xiaoshan; Jia, Shasha; Zhu, Zhi; Ren, Bin; Ma, Hongwei
2018-04-01
We describe a facile and low-cost approach for a flexibly integrated surface-enhanced Raman scattering (SERS) substrate in microfluidic chips. Briefly, a SERS substrate was fabricated by the electrostatic assembling of gold nanoparticles, and shaped into designed patterns by subsequent lift-up soft lithography. The SERS micro-pattern could be further integrated within microfluidic channels conveniently. The resulting microfluidic SERS chip allowed ultrasensitive in situ SERS monitoring from the transparent glass window. With its advantages in simplicity, functionality and cost-effectiveness, this method could be readily expanded into optical microfluidic fabrication for biochemical applications.
ERIC Educational Resources Information Center
Clark, Renee M.; Kaw, Autar; Besterfield-Sacre, Mary
2016-01-01
Blended, flipped, and semi-flipped instructional approaches were used in various sections of a numerical methods course for undergraduate mechanical engineers. During the spring of 2014, a blended approach was used; in the summer of 2014, a combination of blended and flipped instruction was used to deliver a semi-flipped course; and in the fall of…
Open and closed loop manipulation of charged microchiplets in an electric field
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lu, J. P., E-mail: jplu@parc.com; Thompson, J. D.; Whiting, G. L.
We demonstrate the ability to orient, position, and transport microchips (“chiplets”) with electric fields. In an open-loop approach, modified four phase traveling wave potential patterns manipulate chiplets in a dielectric solution using dynamic template agitation techniques. Repeatable parallel assembly of chiplets is demonstrated to a positional accuracy of 6.5 μm using electrodes of 200 μm pitch. Chiplets with dipole surface charge patterns are used to show that orientation can be controlled by adding unique charge patterns on the chiplets. Chip path routing is also demonstrated. With a closed-loop control system approach using video feedback, dielectric, and electrophoretic forces are used to achievemore » positioning accuracy of better than 1 μm with 1 mm pitch driving electrodes. These chip assembly techniques have the potential to enable future printer systems where inputs are electronic chiplets and the output is a functional electronic system.« less
Multi-Agent Methods for the Configuration of Random Nanocomputers
NASA Technical Reports Server (NTRS)
Lawson, John W.
2004-01-01
As computational devices continue to shrink, the cost of manufacturing such devices is expected to grow exponentially. One alternative to the costly, detailed design and assembly of conventional computers is to place the nano-electronic components randomly on a chip. The price for such a trivial assembly process is that the resulting chip would not be programmable by conventional means. In this work, we show that such random nanocomputers can be adaptively programmed using multi-agent methods. This is accomplished through the optimization of an associated high dimensional error function. By representing each of the independent variables as a reinforcement learning agent, we are able to achieve convergence must faster than with other methods, including simulated annealing. Standard combinational logic circuits such as adders and multipliers are implemented in a straightforward manner. In addition, we show that the intrinsic flexibility of these adaptive methods allows the random computers to be reconfigured easily, making them reusable. Recovery from faults is also demonstrated.
Recombinant spider silk from aqueous solutions via a bio-inspired microfluidic chip
NASA Astrophysics Data System (ADS)
Peng, Qingfa; Zhang, Yaopeng; Lu, Li; Shao, Huili; Qin, Kankan; Hu, Xuechao; Xia, Xiaoxia
2016-11-01
Spiders achieve superior silk fibres by controlling the molecular assembly of silk proteins and the hierarchical structure of fibres. However, current wet-spinning process for recombinant spidroins oversimplifies the natural spinning process. Here, water-soluble recombinant spider dragline silk protein (with a low molecular weight of 47 kDa) was adopted to prepare aqueous spinning dope. Artificial spider silks were spun via microfluidic wet-spinning, using a continuous post-spin drawing process (WS-PSD). By mimicking the natural spinning apparatus, shearing and elongational sections were integrated in the microfluidic spinning chip to induce assembly, orientation of spidroins, and fibril structure formation. The additional post-spin drawing process following the wet-spinning section partially mimics the spinning process of natural spider silk and substantially contributes to the compact aggregation of microfibrils. Subsequent post-stretching further improves the hierarchical structure of the fibres, including the crystalline structure, orientation, and fibril melting. The tensile strength and elongation of post-treated fibres reached up to 510 MPa and 15%, respectively.
Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector
NASA Astrophysics Data System (ADS)
Tehrani, N. Alipour; Arfaoui, S.; Benoit, M.; Dannheim, D.; Dette, K.; Hynds, D.; Kulis, S.; Perić, I.; Petrič, M.; Redford, S.; Sicking, E.; Valerio, P.
2016-07-01
The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor, where efficiencies of greater than 99% have been achieved at -60 V substrate bias, with a single hit resolution of 6.1 μm . Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.
Fat fraction bias correction using T1 estimates and flip angle mapping.
Yang, Issac Y; Cui, Yifan; Wiens, Curtis N; Wade, Trevor P; Friesen-Waldner, Lanette J; McKenzie, Charles A
2014-01-01
To develop a new method of reducing T1 bias in proton density fat fraction (PDFF) measured with iterative decomposition of water and fat with echo asymmetry and least-squares estimation (IDEAL). PDFF maps reconstructed from high flip angle IDEAL measurements were simulated and acquired from phantoms and volunteer L4 vertebrae. T1 bias was corrected using a priori T1 values for water and fat, both with and without flip angle correction. Signal-to-noise ratio (SNR) maps were used to measure precision of the reconstructed PDFF maps. PDFF measurements acquired using small flip angles were then compared to both sets of corrected large flip angle measurements for accuracy and precision. Simulations show similar results in PDFF error between small flip angle measurements and corrected large flip angle measurements as long as T1 estimates were within one standard deviation from the true value. Compared to low flip angle measurements, phantom and in vivo measurements demonstrate better precision and accuracy in PDFF measurements if images were acquired at a high flip angle, with T1 bias corrected using T1 estimates and flip angle mapping. T1 bias correction of large flip angle acquisitions using estimated T1 values with flip angle mapping yields fat fraction measurements of similar accuracy and superior precision compared to low flip angle acquisitions. Copyright © 2013 Wiley Periodicals, Inc.
Bannerman, Douglas D; Eiting, Kristine T; Winn, Robert K; Harlan, John M
2004-10-01
Bacterial lipopolysaccharide (LPS) via its activation of Toll-like receptor-4 contributes to much of the vascular injury/dysfunction associated with gram-negative sepsis. Inhibition of de novo gene expression has been shown to sensitize endothelial cells (EC) to LPS-induced apoptosis, the onset of which correlates with decreased expression of FLICE-like inhibitory protein (FLIP). We now have data that conclusively establish a role for FLIP in protecting EC against LPS-induced apoptosis. Overexpression of FLIP protected against LPS-induced apoptosis, whereas down-regulation of FLIP using antisense oligonucleotides sensitized EC to direct LPS killing. Interestingly, FLIP overexpression suppressed NF-kappaB activation induced by LPS, but not by phorbol ester, suggesting a specific role for FLIP in mediating LPS activation. Conversely, mouse embryo fibroblasts (MEF) obtained from FLIP -/- mice showed enhanced LPS-induced NF-kappaB activation relative to those obtained from wild-type mice. Reconstitution of FLIP-/- MEF with full-length FLIP reversed the enhanced NF-kappaB activity elicited by LPS in the FLIP -/- cells. Changes in the expression of FLIP had no demonstrable effect on other known LPS/Tlr-4-activated signaling pathways including the p38, Akt, and Jnk pathways. Together, these data support a dual role for FLIP in mediating LPS-induced apoptosis and NF-kappaB activation.
Novel 3D micromirror for miniature optical bio-robe SiOB assembly
NASA Astrophysics Data System (ADS)
Singh, Janak; Xu, Yingshun; Premachandran, C. S.; Jason, Teo Hui Siang; Chen, Nanguang
2008-02-01
This article presents design and development of a novel 3D micromirror for large deflection scanning application in invivo optical coherence tomography (OCT) bio-imaging probe. Overall mirror chip size is critical to reduce the diameter of the probe; however, mirror plate itself should not be less than 500 μm as smaller size means reducing the amount of light collected after scattering for OCT imaging. In this study, mirror chip sizes of 1 × 1 mm2 and 1.5 × 1.5 mm2 were developed with respectively 400 and 500 micrometer diameter mirror plates. The design includes electro thermal excitation mechanism in the same plane as mirror plate to achieve 3D free space scanning. Larger deflection requires longer actuators, which usually increase the overall size of the chip. To accommodate longer actuators and keep overall chip size same curved beam actuators are designed and integrated for micromirror scanning. Typical length of the actuators was 800 micrometer, which provided up to 17 degrees deflection. Deep reactive ion etching (DRIE) process module was used extensively to etch high aspect ratio structures and keep the total mirror chip size small.
A modular design of molecular qubits to implement universal quantum gates
Ferrando-Soria, Jesús; Moreno Pineda, Eufemio; Chiesa, Alessandro; Fernandez, Antonio; Magee, Samantha A.; Carretta, Stefano; Santini, Paolo; Vitorica-Yrezabal, Iñigo J.; Tuna, Floriana; Timco, Grigore A.; McInnes, Eric J.L.; Winpenny, Richard E.P.
2016-01-01
The physical implementation of quantum information processing relies on individual modules—qubits—and operations that modify such modules either individually or in groups—quantum gates. Two examples of gates that entangle pairs of qubits are the controlled NOT-gate (CNOT) gate, which flips the state of one qubit depending on the state of another, and the gate that brings a two-qubit product state into a superposition involving partially swapping the qubit states. Here we show that through supramolecular chemistry a single simple module, molecular {Cr7Ni} rings, which act as the qubits, can be assembled into structures suitable for either the CNOT or gate by choice of linker, and we characterize these structures by electron spin resonance spectroscopy. We introduce two schemes for implementing such gates with these supramolecular assemblies and perform detailed simulations, based on the measured parameters including decoherence, to demonstrate how the gates would operate. PMID:27109358
Mechanism of asymmetric polymerase assembly at the eukaryotic replication fork
Georgescu, Roxana E; Langston, Lance; Yao, Nina Y; Yurieva, Olga; Zhang, Dan; Finkelstein, Jeff; Agarwal, Tani; O’Donnell, Mike E
2015-01-01
Eukaryotes use distinct polymerases for leading- and lagging-strand replication, but how they target their respective strands is uncertain. We reconstituted Saccharomyces cerevisiae replication forks and found that CMG helicase selects polymerase (Pol) ε to the exclusion of Pol δ on the leading strand. Even if Pol δ assembles on the leading strand, Pol ε rapidly replaces it. Pol δ–PCNA is distributive with CMG, in contrast to its high stability on primed ssDNA. Hence CMG will not stabilize Pol δ, instead leaving the leading strand accessible for Pol ε and stabilizing Pol ε. Comparison of Pol ε and Pol δ on a lagging-strand model DNA reveals the opposite. Pol δ dominates over excess Pol ε on PCNA-primed ssDNA. Thus, PCNA strongly favors Pol δ over Pol ε on the lagging strand, but CMG over-rides and flips this balance in favor of Pol ε on the leading strand. PMID:24997598
Flipping Math in a Secondary Classroom
ERIC Educational Resources Information Center
Graziano, Kevin J.; Hall, John D.
2017-01-01
Research on flipped instruction with K-12 English Language Learners (ELLs) is limited. The purpose of this study was to examine the academic performance of ELLs who received flipped instruction in an algebra course at a newcomer high school, and to investigate ELLs' perceptions of flipped learning. Results indicate flipped instruction engaged…
Flipped Classroom Experiences: Student Preferences and Flip Strategy in a Higher Education Context
ERIC Educational Resources Information Center
McNally, Brenton; Chipperfield, Janine; Dorsett, Pat; Del Fabbro, Letitia; Frommolt, Valda; Goetz, Sandra; Lewohl, Joanne; Molineux, Matthew; Pearson, Andrew; Reddan, Gregory; Roiko, Anne; Rung, Andrea
2017-01-01
Despite the popularity of the flipped classroom, its effectiveness in achieving greater engagement and learning outcomes is currently lacking substantial empirical evidence. This study surveyed 563 undergraduate and postgraduate students (61% female) participating in flipped teaching environments and ten convenors of the flipped courses in which…
FLIP the Switch: Regulation of Apoptosis and Necroptosis by cFLIP
Tsuchiya, Yuichi; Nakabayashi, Osamu; Nakano, Hiroyasu
2015-01-01
cFLIP (cellular FLICE-like inhibitory protein) is structurally related to caspase-8 but lacks proteolytic activity due to multiple amino acid substitutions of catalytically important residues. cFLIP protein is evolutionarily conserved and expressed as three functionally different isoforms in humans (cFLIPL, cFLIPS, and cFLIPR). cFLIP controls not only the classical death receptor-mediated extrinsic apoptosis pathway, but also the non-conventional pattern recognition receptor-dependent apoptotic pathway. In addition, cFLIP regulates the formation of the death receptor-independent apoptotic platform named the ripoptosome. Moreover, recent studies have revealed that cFLIP is also involved in a non-apoptotic cell death pathway known as programmed necrosis or necroptosis. These functions of cFLIP are strictly controlled in an isoform-, concentration- and tissue-specific manner, and the ubiquitin-proteasome system plays an important role in regulating the stability of cFLIP. In this review, we summarize the current scientific findings from biochemical analyses, cell biological studies, mathematical modeling, and gene-manipulated mice models to illustrate the critical role of cFLIP as a switch to determine the destiny of cells among survival, apoptosis, and necroptosis. PMID:26694384
Silicon switching transistor with high power and low saturation voltage
NASA Technical Reports Server (NTRS)
Stonebraker, E.; Stoneburner, D.; Ferree, H.
1973-01-01
Assembly of two individually encapsulated silicon-chip transistors produces silicon power-transistor that has low electrical resistance and low thermal impedance. Electrical resistance and thermal impedance are low because of short lead lengths, and external contact surfaces are plated to reduce resistance at interfaces.
Noncontaminating technique for making holes in existing process systems
NASA Technical Reports Server (NTRS)
Hecker, T. P.; Czapor, H. P.; Giordano, S. M.
1972-01-01
Technique is developed for making cleanly-contoured holes in assembled process systems without introducing chips or other contaminants into system. Technique uses portable equipment and does not require dismantling of system. Method was tested on Inconel, stainless steel, ASTMA-53, and Hastelloy X in all positions.
Design and fabrication of a foldable 3D silicon based package for solid state lighting applications
NASA Astrophysics Data System (ADS)
Sokolovskij, R.; Liu, P.; van Zeijl, H. W.; Mimoun, B.; Zhang, G. Q.
2015-05-01
Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies.
Diversity of anaerobic microbes in spacecraft assembly clean rooms.
Probst, Alexander; Vaishampayan, Parag; Osman, Shariff; Moissl-Eichinger, Christine; Andersen, Gary L; Venkateswaran, Kasthuri
2010-05-01
Although the cultivable and noncultivable microbial diversity of spacecraft assembly clean rooms has been previously documented using conventional and state-of-the-art molecular techniques, the occurrence of obligate anaerobes within these clean rooms is still uncertain. Therefore, anaerobic bacterial communities of three clean-room facilities were analyzed during assembly of the Mars Science Laboratory rover. Anaerobic bacteria were cultured on several media, and DNA was extracted from suitable anaerobic enrichments and examined with conventional 16S rRNA gene clone library, as well as high-density phylogenetic 16S rRNA gene microarray (PhyloChip) technologies. The culture-dependent analyses predominantly showed the presence of clostridial and propionibacterial strains. The 16S rRNA gene sequences retrieved from clone libraries revealed distinct microbial populations associated with each clean-room facility, clustered exclusively within gram-positive organisms. PhyloChip analysis detected a greater microbial diversity, spanning many phyla of bacteria, and provided a deeper insight into the microbial community structure of the clean-room facilities. This study presents an integrated approach for assessing the anaerobic microbial population within clean-room facilities, using both molecular and cultivation-based analyses. The results reveal that highly diverse anaerobic bacterial populations persist in the clean rooms even after the imposition of rigorous maintenance programs and will pose a challenge to planetary protection implementation activities.
High-power operation of AlGaInP red laser diode for display applications
NASA Astrophysics Data System (ADS)
Kuramoto, K.; Nishida, T.; Abe, S.; Miyashita, M.; Mori, K.; Yagi, T.
2015-03-01
Substantial limitation of output power in AlGaInP based red broad area (BA) laser diode (LD) originates from an electron thermal overflow from an active layer to a p-cladding layer and fatal failure due to catastrophic optical mirror degradation during the LD operation. New red BA-LD was designed and fabricated. The LD chip had triple emitters in one chip with each stripe width of 60 um, and was assembled on Φ9.0 mm -TO package. The LD emitted exceeding 5.5 W at heat sink temperature of 25 °C and 3.8W at 45 °C under pulsed operation with frequency of 120Hz and duty of 30%, although the current product, which has a 40 um single emitter chip assembled on Φ5.6mm -TO, does 2.0 W at 25 °C. The lasing wavelength at 25 °C and 2.5W output was 638.6 nm. The preliminary aging test under the condition with the operation current of 3.56A, CW, auto-current-control mode (ACC), and the heat sink temperature of 20 °C (almost equal to the output of 3.5 W) indicated that the MTTF due to COMD was longer than 6,600 hours under CW, 22,000 hours under the pulse with duty of 30%.
Flipped Learning in the Workplace
ERIC Educational Resources Information Center
Nederveld, Allison; Berge, Zane L.
2015-01-01
Purpose: The purpose of this paper is to serve as a summary of resources on flipped learning for workplace learning professionals. A recent buzzword in the training world is "flipped". Flipped learning and the flipped classroom are hot topics that have emerged in K-12 education, made their way to the university and are now being noticed…
How to Flip the Classroom--"Productive Failure or Traditional Flipped Classroom" Pedagogical Design?
ERIC Educational Resources Information Center
Song, Yanjie; Kapur, Manu
2017-01-01
The paper reports a quasi-experimental study comparing the "traditional flipped classroom" pedagogical design with the "productive failure" (Kapur, 2016) pedagogical design in the flipped classroom for a 2-week curricular unit on polynomials in a Hong Kong Secondary school. Different from the flipped classroom where students…
ERIC Educational Resources Information Center
Dove, Anthony; Dove, Emily
2017-01-01
While studies have shown positive attributes related to flipped learning, especially in mathematics and statistics, there is limited understanding of how taking multiple flipped courses may impact students' learning of mathematics and their perceptions of mathematics. Specifically, this study examined how completing consecutive flipped mathematics…
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chen, Man-Chia; Perez, Aldo Pena; Kothapalli, Sri-Rajasekhar
This study presents a pixel pitch-matched readout chip for 3-D photoacoustic (PA) imaging, featuring a dedicated signal conditioning and delta-sigma modulation integrated within a pixel area of 250 μm by 250 μm. The proof-of-concept receiver was implemented in an STMicroelectronics's 28-nm Fully Depleted Silicon On Insulator technology, and interfaces to a 4 × 4 subarray of capacitive micromachined ultrasound transducers (CMUTs). The front-end signal conditioning in each pixel employs a coarse/fine gain tuning architecture to fulfill the 90-dB dynamic range requirement of the application. The employed delta-sigma beamforming architecture obviates the need for area-consuming Nyquist ADCs and thereby enables anmore » efficient in-pixel A/D conversion. The per-pixel switched-capacitor ΔΣ modulator leverages slewing-dominated and area-optimized inverter-based amplifiers. It occupies only 1/4th of the pixel, and its area compares favorably with state-of-the-art designs that offer the same SNR and bandwidth. The modulator's measured peak signal-to-noise-and-distortion ratio is 59.9 dB for a 10-MHz input bandwidth, and it consumes 6.65 mW from a 1V supply. The overall subarray beamforming approach improves the area per channel by 7.4 times and the single-channel SNR by 8 dB compared to prior art with similar delay resolution and power dissipation. Finally, the functionality of the designed chip was evaluated within a PA imaging experiment, employing a flip-chip bonded 2-D CMUT array.« less
Chen, Man-Chia; Perez, Aldo Pena; Kothapalli, Sri-Rajasekhar; ...
2017-10-16
This study presents a pixel pitch-matched readout chip for 3-D photoacoustic (PA) imaging, featuring a dedicated signal conditioning and delta-sigma modulation integrated within a pixel area of 250 μm by 250 μm. The proof-of-concept receiver was implemented in an STMicroelectronics's 28-nm Fully Depleted Silicon On Insulator technology, and interfaces to a 4 × 4 subarray of capacitive micromachined ultrasound transducers (CMUTs). The front-end signal conditioning in each pixel employs a coarse/fine gain tuning architecture to fulfill the 90-dB dynamic range requirement of the application. The employed delta-sigma beamforming architecture obviates the need for area-consuming Nyquist ADCs and thereby enables anmore » efficient in-pixel A/D conversion. The per-pixel switched-capacitor ΔΣ modulator leverages slewing-dominated and area-optimized inverter-based amplifiers. It occupies only 1/4th of the pixel, and its area compares favorably with state-of-the-art designs that offer the same SNR and bandwidth. The modulator's measured peak signal-to-noise-and-distortion ratio is 59.9 dB for a 10-MHz input bandwidth, and it consumes 6.65 mW from a 1V supply. The overall subarray beamforming approach improves the area per channel by 7.4 times and the single-channel SNR by 8 dB compared to prior art with similar delay resolution and power dissipation. Finally, the functionality of the designed chip was evaluated within a PA imaging experiment, employing a flip-chip bonded 2-D CMUT array.« less
Nisisako, Takasi; Ando, Takuya; Hatsuzawa, Takeshi
2012-09-21
This study describes a microfluidic platform with coaxial annular world-to-chip interfaces for high-throughput production of single and compound emulsion droplets, having controlled sizes and internal compositions. The production module consists of two distinct elements: a planar square chip on which many copies of a microfluidic droplet generator (MFDG) are arranged circularly, and a cubic supporting module with coaxial annular channels for supplying fluids evenly to the inlets of the mounted chip, assembled from blocks with cylinders and holes. Three-dimensional flow was simulated to evaluate the distribution of flow velocity in the coaxial multiple annular channels. By coupling a 1.5 cm × 1.5 cm microfluidic chip with parallelized 144 MFDGs and a supporting module with two annular channels, for example, we could produce simple oil-in-water (O/W) emulsion droplets having a mean diameter of 90.7 μm and a coefficient of variation (CV) of 2.2% at a throughput of 180.0 mL h(-1). Furthermore, we successfully demonstrated high-throughput production of Janus droplets, double emulsions and triple emulsions, by coupling 1.5 cm × 1.5 cm - 4.5 cm × 4.5 cm microfluidic chips with parallelized 32-128 MFDGs of various geometries and supporting modules with 3-4 annular channels.
Human bone perivascular niche-on-a-chip for studying metastatic colonization.
Marturano-Kruik, Alessandro; Nava, Michele Maria; Yeager, Keith; Chramiec, Alan; Hao, Luke; Robinson, Samuel; Guo, Edward; Raimondi, Manuela Teresa; Vunjak-Novakovic, Gordana
2018-02-06
Eight out of 10 breast cancer patients die within 5 years after the primary tumor has spread to the bones. Tumor cells disseminated from the breast roam the vasculature, colonizing perivascular niches around blood capillaries. Slow flows support the niche maintenance by driving the oxygen, nutrients, and signaling factors from the blood into the interstitial tissue, while extracellular matrix, endothelial cells, and mesenchymal stem cells regulate metastatic homing. Here, we show the feasibility of developing a perfused bone perivascular niche-on-a-chip to investigate the progression and drug resistance of breast cancer cells colonizing the bone. The model is a functional human triculture with stable vascular networks within a 3D native bone matrix cultured on a microfluidic chip. Providing the niche-on-a-chip with controlled flow velocities, shear stresses, and oxygen gradients, we established a long-lasting, self-assembled vascular network without supplementation of angiogenic factors. We further show that human bone marrow-derived mesenchymal stem cells, which have undergone phenotypical transition toward perivascular cell lineages, support the formation of capillary-like structures lining the vascular lumen. Finally, breast cancer cells exposed to interstitial flow within the bone perivascular niche-on-a-chip persist in a slow-proliferative state associated with increased drug resistance. We propose that the bone perivascular niche-on-a-chip with interstitial flow promotes the formation of stable vasculature and mediates cancer cell colonization.
Wang, Saihua; Niu, Hongyun; Cai, Yaqi; Cao, Dong
2018-05-01
High-throughput and rapid detection of hazardous compounds in complicated samples is essential for the solution of environmental problems. We have prepared a "pH-paper-like" chip which can rapidly "indicate" the occurrence of organic contaminants just through dipping the chip in water samples for short time followed by fast analysis with surface-assisted laser desorption/ionization time-of-flight mass spectrometry (SALDI-TOF MS). The chips are composed of polyvinylidene fluoride membrane (PVDFM), polydopamine (PDA) film and Au nanoparticles (Au NPs), which are layer-by-layer assembled according to the adhesion, self-polymerization and reduction property of dopamine. In the Au NPs loaded polydopamine-polyvinylidene fluoride membrane (Au NPs-PDA-PVDFM) chips, PVDFM combined with PDA film are responsible for the enrichment of organic analyte through hydrophobic interactions and π-π stacking; Au NPs serve as effective SALDI matrix for the rapid detection of target analyte. After dipping into water solution for minutes, the Au-PDA-PVDFM chips with enriched organic analytes can be detected directly with SALDI-TOF MS. The good solid-phase extraction performance of the PDA-PVDFM components, remarkable matrix effect of the loaded AuNPs, and sensitivity of the SALDI-TOF MS technique ensure excellent sensitivity and reproducibility for the quantification of trace levels of organic contaminants in environmental water samples. Copyright © 2018 Elsevier B.V. All rights reserved.
Enabling chip-scale trace gas sensing systems with silicon photonics
DOE Office of Scientific and Technical Information (OSTI.GOV)
Green, William
Tunable laser trace-gas spectroscopy has been effectively used in both environmental and medical applications, for its sensitivity and specificity. We’ll describe how contemporary silicon photonics manufacturing and assembly are leveraged for a cost-effective miniaturized spectroscopic sensor platform, and outline uses in fugitive methane emissions monitoring.
Flipping the Graduate Qualitative Research Methods Classroom: Did It Lead to Flipped Learning?
ERIC Educational Resources Information Center
Earley, Mark
2016-01-01
The flipped, or inverted, classroom has gained popularity in a variety of fields and at a variety of educational levels, from K-12 through higher education. This paper describes the author's positive experience flipping a graduate qualitative research methods classroom. After a review of the current literature on flipped classrooms in higher…
ERIC Educational Resources Information Center
Rabidoux, Salena; Rottmann, Amy
2018-01-01
Flipped classrooms are often utilized in PK-12 classrooms; however, there is also a growing trend of flipped classrooms in higher education. This paper presents the benefits and limitations of implementing flipped classrooms in higher education as well as resources for integrating a flipped classroom design to instruction. The various technology…
Flip-J: Development of the System for Flipped Jigsaw Supported Language Learning
ERIC Educational Resources Information Center
Yamada, Masanori; Goda, Yoshiko; Hata, Kojiro; Matsukawa, Hideya; Yasunami, Seisuke
2016-01-01
This study aims to develop and evaluate a language learning system supported by the "flipped jigsaw" technique, called "Flip-J". This system mainly consists of three functions: (1) the creation of a learning material database, (2) allocation of learning materials, and (3) formation of an expert and jigsaw group. Flip-J was…
NASA Astrophysics Data System (ADS)
Wang, Jianping; Zhang, Peiran; Lu, Huimin; Feng, LiFang
2017-06-01
An orthogonal frequency division multiplexing (OFDM) technique called flipped OFDM (flip-OFDM) is apposite for a visible light communication system that needs the transmitted signal to be real and positive. Flip-OFDM uses two consecutive OFDM subframes to transmit the positive and negative parts of the signal. However, peak-to-average power ratio (PAPR) for flip-OFDM is increased tremendously due to the low value of total average power that arises from many zero values in both the positive and flipped frames. We first analyze the performance of flip-OFDM and perform a comparison with the conventional DC-biased OFDM (DCO-OFDM); then we propose a flip-OFDM scheme combined with μ-law mapping to reduce the high PAPR. The simulation results show that the PAPR of the system is reduced about 17.2 and 5.9 dB when compared with the normal flip-OFDM and DCO-OFDM signals, respectively.
Poisson property of the occurrence of flip-flops in a model membrane.
Arai, Noriyoshi; Akimoto, Takuma; Yamamoto, Eiji; Yasui, Masato; Yasuoka, Kenji
2014-02-14
How do lipid molecules in membranes perform a flip-flop? The flip-flops of lipid molecules play a crucial role in the formation and flexibility of membranes. However, little has been determined about the behavior of flip-flops, either experimentally, or in molecular dynamics simulations. Here, we provide numerical results of the flip-flops of model lipid molecules in a model membrane and investigate the statistical properties, using millisecond-order coarse-grained molecular simulations (dissipative particle dynamics). We find that there are three different ways of flip-flops, which can be clearly characterized by their paths on the free energy surface. Furthermore, we found that the probability of the number of the flip-flops is well fitted by the Poisson distribution, and the probability density function for the inter-occurrence times of flip-flops coincides with that of the forward recurrence times. These results indicate that the occurrence of flip-flops is a Poisson process, which will play an important role in the flexibilities of membranes.
Yin, Hongfeng; Killeen, Kevin; Brennen, Reid; Sobek, Dan; Werlich, Mark; van de Goor, Tom
2005-01-15
Current nano-LC/MS systems require the use of an enrichment column, a separation column, a nanospray tip, and the fittings needed to connect these parts together. In this paper, we present a microfabricated approach to nano-LC, which integrates these components on a single LC chip, eliminating the need for conventional LC connections. The chip was fabricated by laminating polyimide films with laser-ablated channels, ports, and frit structures. The enrichment and separation columns were packed using conventional reversed-phase chromatography particles. A face-seal rotary valve provided a means for switching between sample loading and separation configurations with minimum dead and delay volumes while allowing high-pressure operation. The LC chip and valve assembly were mounted within a custom electrospray source on an ion-trap mass spectrometer. The overall system performance was demonstrated through reversed-phase gradient separations of tryptic protein digests at flow rates between 100 and 400 nL/min. Microfluidic integration of the nano-LC components enabled separations with subfemtomole detection sensitivity, minimal carryover, and robust and stable electrospray throughout the LC solvent gradient.
Darain, Farzana; Gan, Kai Ling; Tjin, Swee Chuan
2009-06-01
A simple microfluidic immunoassay card was developed based on polystyrene (PS) substrate for the detection of horse IgG, an inexpensive model analyte using fluorescence microscope. The primary antibody was captured onto the PS based on covalent bonding via a self-assembled monolayer (SAM) of thiol to pattern the surface chemistry on a gold-coated PS. The immunosensor chip layers were fabricated from sheets by CO(2) laser ablation. The functionalized PS surfaces after each step were characterized by contact angle measurement, X-ray photoelectron spectroscopy (XPS), and atomic force microscopy (AFM). After the antibody-antigen interaction as a sandwich immunoassay with a fluorescein isothiocyanate (FITC)-conjugated secondary antibody, the intensity of fluorescence was measured on-chip to determine the concentration of the target analyte. The present immunosensor chip showed a linear response range for horse IgG between 1 microg/ml and 80 microg/ml (r = 0.971, n = 3). The detection limit was found to be 0.71 microg/ml. The developed microfluidic system can be extended for various applications including medical diagnostics, microarray detection and observing protein-protein interactions.
Guided self-assembly of magnetic beads for biomedical applications
NASA Astrophysics Data System (ADS)
Gusenbauer, Markus; Nguyen, Ha; Reichel, Franz; Exl, Lukas; Bance, Simon; Fischbacher, Johann; Özelt, Harald; Kovacs, Alexander; Brandl, Martin; Schrefl, Thomas
2014-02-01
Micromagnetic beads are widely used in biomedical applications for cell separation, drug delivery, and hyperthermia cancer treatment. Here we propose to use self-organized magnetic bead structures which accumulate on fixed magnetic seeding points to isolate circulating tumor cells. The analysis of circulating tumor cells is an emerging tool for cancer biology research and clinical cancer management including the detection, diagnosis and monitoring of cancer. Microfluidic chips for isolating circulating tumor cells use either affinity, size or density capturing methods. We combine multiphysics simulation techniques to understand the microscopic behavior of magnetic beads interacting with soft magnetic accumulation points used in lab-on-chip technologies. Our proposed chip technology offers the possibility to combine affinity and size capturing with special antibody-coated bead arrangements using a magnetic gradient field created by Neodymium Iron Boron permanent magnets. The multiscale simulation environment combines magnetic field computation, fluid dynamics and discrete particle dynamics.
Huang, Yongyang; Badar, Mudabbir; Nitkowski, Arthur; Weinroth, Aaron; Tansu, Nelson; Zhou, Chao
2017-01-01
Space-division multiplexing optical coherence tomography (SDM-OCT) is a recently developed parallel OCT imaging method in order to achieve multi-fold speed improvement. However, the assembly of fiber optics components used in the first prototype system was labor-intensive and susceptible to errors. Here, we demonstrate a high-speed SDM-OCT system using an integrated photonic chip that can be reliably manufactured with high precisions and low per-unit cost. A three-layer cascade of 1 × 2 splitters was integrated in the photonic chip to split the incident light into 8 parallel imaging channels with ~3.7 mm optical delay in air between each channel. High-speed imaging (~1s/volume) of porcine eyes ex vivo and wide-field imaging (~18.0 × 14.3 mm2) of human fingers in vivo were demonstrated with the chip-based SDM-OCT system. PMID:28856055
LLL 8080 BASIC-II interpreter user's manual
DOE Office of Scientific and Technical Information (OSTI.GOV)
McGoldrick, P.R.; Dickinson, J.; Allison, T.G.
1978-04-03
Scientists are finding increased applications for microprocessors as process controllers in their experiments. However, while microprocessors are small and inexpensive, they are difficult to program in machine or assembly language. A high-level language is needed to enable scientists to develop their own microcomputer programs for their experiments on location. Recognizing this need, LLL contracted to have such a language developed. This report describes the resulting LLL BASIC interpreter, which opeates with LLL's 8080-based MCS-8 microcomputer system. All numerical operations are done using Advanced Micro Device's Am9511 arithmetic processor chip or optionally by using a software simulation of that chip. 1more » figure.« less
Advanced Initiation Systems Manufacturing Level 2 Milestone Completion Summary
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chow, R; Schmidt, M
2009-10-01
Milestone Description - Advanced Initiation Systems Detonator Design and Prototype. Milestone Grading Criteria - Design new generation chip slapper detonator and manufacture a prototype using advanced manufacturing processes, such as all-dry chip metallization and solvent-less flyer coatings. The advanced processes have been developed for manufacturing detonators with high material compatibility and reliability to support future LEPs, e.g. the B61, and new weapons systems. Perform velocimetry measurements to determine slapper velocity as a function of flight distance. A prototype detonator assembly and stripline was designed for low-energy chip slappers. Pictures of the prototype detonator and stripline are shown. All-dry manufacturing processesmore » were used to address compatibility issues. KCP metallized the chips in a physical vapor deposition system through precision-aligned shadow masks. LLNL deposited a solvent-less polyimide flyer with a processes called SLIP, which stands for solvent-less vapor deposition followed by in-situ polymerization. LANL manufactured the high-surface-area (HSA) high explosive (HE) pellets. Test fires of two chip slapper designs, radius and bowtie, were performed at LLNL in the High Explosives Application Facility (HEAF). Test fires with HE were conducted to establish the threshold firing voltages. pictures of the chip slappers before and after test fires are shown. Velocimetry tests were then performed to obtain slapper velocities at or above the threshold firing voltages. Figure 5 shows the slapper velocity as a function of distance and time at the threshold voltage, for both radius and bowtie bridge designs. Both designs were successful at initiating the HE at low energy levels. Summary of Accomplishments are: (1) All-dry process for chip manufacture developed; (2) Solventless process for slapper materials developed; (3) High-surface area explosive pellets developed; (4) High performance chip slappers developed; (5) Low-energy chip slapper detonator designs; and (6) Low-voltage threshold chip slapper detonator demonstrated.« less
Perceptions of Senior-Year ELT Students for Flipped Classroom: A Materials Development Course
ERIC Educational Resources Information Center
Adnan, Müge
2017-01-01
This paper describes a structured attempt to integrate the flipped classroom model into a senior-level course at the higher education level. This study's purpose is to examine and compare the impact of flipped classrooms versus non-flipped as a means to contribute to the growing line of research on flipped teaching through an evaluation of both…
To Flip or Not to Flip? Analysis of a Flipped Classroom Pedagogy in a General Biology Course
ERIC Educational Resources Information Center
Heyborne, William H.; Perrett, Jamis J.
2016-01-01
In an attempt to better understand the flipped technique and evaluate its purported superiority in terms of student learning gains, the authors conducted an experiment comparing a flipped classroom to a traditional lecture classroom. Although the outcomes were mixed, regarding the superiority of either pedagogical approach, there does seem to be a…
McCourt, Clare; Maxwell, Pamela; Mazzucchelli, Roberta; Montironi, Rodolfo; Scarpelli, Marina; Salto-Tellez, Manuel; O’Sullivan, Joe M.; Longley, Daniel B.; Waugh, David J.J.
2012-01-01
Purpose To characterize the importance of cellular Fas-associated death domain (FADD)-like interleukin 1β-converting enzyme (FLICE) inhibitory protein (c-FLIP), a key regulator of caspase 8 (FLICE)-promoted apoptosis, in modulating the response of prostate cancer (CaP) cells to androgen receptor (AR)-targeted therapy. Experimental Design c-FLIP expression was characterized by immunohistochemical analysis of prostatectomy tissue. The functional importance of c-FLIP to survival and modulating response to bicalutamide was studied by molecular and pharmacological interventions. Results c-FLIP expression was increased in high-grade prostatic intra-epithelial neoplasia (HGPIN) and CaP tissue relative to normal prostate epithelium (P<0.001). Maximal c-FLIP expression was detected in castrate-resistant CaP (CRPC) (P<0.001). In vitro, silencing of c-FLIP induced spontaneous apoptosis and increased 22Rv1 and LNCaP cell sensitivity to bicalutamide, determined by flow cytometry, PARP cleavage and caspase activity assays. The histone deacetylase inhibitors (HDACi), droxinostat and SAHA, also down-regulated c-FLIP expression, induced caspase-8 and caspase-3/7 mediated apoptosis and increased apoptosis in bicalutamide-treated cells. Conversely, the elevated expression of c-FLIP detected in the CRPC cell line VCaP underpinned their insensitivity to bicalutamide and SAHA in vitro. However, knockdown of c-FLIP induced spontaneous apoptosis in VCaP cells, indicating its relevance to cell survival and therapeutic resistance. Conclusion c-FLIP reduces the efficacy of AR-targeted therapy and maintains the viability of CaP cells. A combination of HDACi with androgen-deprivation therapy (ADT) may be effective in early-stage disease, using c-FLIP expression as a predictive biomarker of sensitivity. Direct targeting of c-FLIP however may be relevant to enhance the response of existing and novel therapeutics in CRPC. PMID:22623731
... comfortable in the store. Slip off the flip-flops. Flip-flops donât give your feet enough support, so ... things like stubbing your toe. Consider some flip-flop how-tos: Buy new flip-flops when they ...
Rapid identification of ESKAPE bacterial strains using an autonomous microfluidic device.
Ho, Jack Y; Cira, Nate J; Crooks, John A; Baeza, Josue; Weibel, Douglas B
2012-01-01
This article describes Bacteria ID Chips ('BacChips'): an inexpensive, portable, and autonomous microfluidic platform for identifying pathogenic strains of bacteria. BacChips consist of a set of microchambers and channels molded in the elastomeric polymer, poly(dimethylsiloxane) (PDMS). Each microchamber is preloaded with mono-, di-, or trisaccharides and dried. Pressing the layer of PDMS into contact with a glass coverslip forms the device; the footprint of the device in this article is ∼6 cm(2). After assembly, BacChips are degased under large negative pressure and are stored in vacuum-sealed plastic bags. To use the device, the bag is opened, a sample containing bacteria is introduced at the inlet of the device, and the degased PDMS draws the sample into the central channel and chambers. After the liquid at the inlet is consumed, air is drawn into the BacChip via the inlet and provides a physical barrier that separates the liquid samples in adjacent microchambers. A pH indicator is admixed with the samples prior to their loading, enabling the metabolism of the dissolved saccharides in the microchambers to be visualized. Importantly, BacChips operate without external equipment or instruments. By visually detecting the growth of bacteria using ambient light after ∼4 h, we demonstrate that BacChips with ten microchambers containing different saccharides can reproducibly detect the ESKAPE panel of pathogens, including strains of: Enterococcus faecalis, Enteroccocus faecium, Staphylococcus aureus, Klebsiella pneumoniae, Acinetobacter baumannii, Pseudomonas aeruginosa, Enterobacter aerogenes, and Enterobacter cloacae. This article describes a BacChip for point-of-care detection of ESKAPE pathogens and a starting point for designing multiplexed assays that identify bacterial strains from clinical samples and simultaneously determine their susceptibility to antibiotics.
A new Cu(GeNx) alloy film for industrial applications
NASA Astrophysics Data System (ADS)
Lin, Chon-Hsin
2014-11-01
In this study, a copper alloy [Cu(GeNx)] film is developed for industrial applications by cosputtering Cu and Ge targets on a barrierless Si substrate within a vacuum chamber sparsely filled with N2 gas. Through extensive tests conducted in this study, the alloy film shows good thermal stability and adhesion to the substrate with no noticeable interactions between the film and the substrate after annealing at 720 °C for 1 h. The new Cu(GeNx) alloy film also renders adequate wetting for solders, shows good solderability, and has a dissolution rate lower than pure Cu by at least one order of magnitude, in addition to having a comparable consumption rate to Ni. The alloy film seems suitable for industrial applications in, e.g., barrierless Si metallization, interconnect manufacture and, the replacement of the wetting and diffusion layers for flip-chip solder joints in conventional metallurgy.
van Spengen, W Merlijn; Turq, Viviane; Frenken, Joost W M
2010-01-01
We have replaced the periodic Prandtl-Tomlinson model with an atomic-scale friction model with a random roughness term describing the surface roughness of micro-electromechanical systems (MEMS) devices with sliding surfaces. This new model is shown to exhibit the same features as previously reported experimental MEMS friction loop data. The correlation function of the surface roughness is shown to play a critical role in the modelling. It is experimentally obtained by probing the sidewall surfaces of a MEMS device flipped upright in on-chip hinges with an AFM (atomic force microscope). The addition of a modulation term to the model allows us to also simulate the effect of vibration-induced friction reduction (normal-force modulation), as a function of both vibration amplitude and frequency. The results obtained agree very well with measurement data reported previously.
NASA Astrophysics Data System (ADS)
Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki
2018-04-01
A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.
Dense Vertically Aligned Copper Nanowire Composites as High Performance Thermal Interface Materials.
Barako, Michael T; Isaacson, Scott G; Lian, Feifei; Pop, Eric; Dauskardt, Reinhold H; Goodson, Kenneth E; Tice, Jesse
2017-12-06
Thermal interface materials (TIMs) are essential for managing heat in modern electronics, and nanocomposite TIMs can offer critical improvements. Here, we demonstrate thermally conductive, mechanically compliant TIMs based on dense, vertically aligned copper nanowires (CuNWs) embedded into polymer matrices. We evaluate the thermal and mechanical characteristics of 20-25% dense CuNW arrays with and without polydimethylsiloxane infiltration. The thermal resistance achieved is below 5 mm 2 K W -1 , over an order of magnitude lower than commercial heat sink compounds. Nanoindentation reveals that the nonlinear deformation mechanics of this TIM are influenced by both the CuNW morphology and the polymer matrix. We also implement a flip-chip bonding protocol to directly attach CuNW composites to copper surfaces, as required in many thermal architectures. Thus, we demonstrate a rational design strategy for nanocomposite TIMs that simultaneously retain the high thermal conductivity of aligned CuNWs and the mechanical compliance of a polymer.
Radiation Hard 0.13 Micron CMOS Library at IHP
NASA Astrophysics Data System (ADS)
Jagdhold, U.
2013-08-01
To support space applications we have developed an 0.13 micron CMOS library which should be radiation hard up to 200 krad. The article describes the concept to come to a radiation hard digital circuit and was introduces in 2010 [1]. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latch-up (SEL). To reduce single event upset (SEU) we add two p-MOS transistors to all flip flops. For reliability reasons we use double contacts in all library elements. The additional rules and the library elements are integrated in our Cadence mixed signal design kit, “Virtuoso” IC6.1 [2]. A test chip is produced with our in house 0.13 micron BiCMOS technology, see Ref. [3]. As next step we will doing radiation tests according the european space agency (ESA) specifications, see Ref. [4], [5].
MEMS-based thermally-actuated image stabilizer for cellular phone camera
NASA Astrophysics Data System (ADS)
Lin, Chun-Ying; Chiou, Jin-Chern
2012-11-01
This work develops an image stabilizer (IS) that is fabricated using micro-electro-mechanical system (MEMS) technology and is designed to counteract the vibrations when human using cellular phone cameras. The proposed IS has dimensions of 8.8 × 8.8 × 0.3 mm3 and is strong enough to suspend an image sensor. The processes that is utilized to fabricate the IS includes inductive coupled plasma (ICP) processes, reactive ion etching (RIE) processes and the flip-chip bonding method. The IS is designed to enable the electrical signals from the suspended image sensor to be successfully emitted out using signal output beams, and the maximum actuating distance of the stage exceeds 24.835 µm when the driving current is 155 mA. Depending on integration of MEMS device and designed controller, the proposed IS can decrease the hand tremor by 72.5%.
Induced Polarization Influences the Fundamental Forces in DNA Base Flipping
2015-01-01
Base flipping in DNA is an important process involved in genomic repair and epigenetic control of gene expression. The driving forces for these processes are not fully understood, especially in the context of the underlying dynamics of the DNA and solvent effects. We studied double-stranded DNA oligomers that have been previously characterized by imino proton exchange NMR using both additive and polarizable force fields. Our results highlight the importance of induced polarization on the base flipping process, yielding near-quantitative agreement with experimental measurements of the equilibrium between the base-paired and flipped states. Further, these simulations allow us to quantify for the first time the energetic implications of polarization on the flipping pathway. Free energy barriers to base flipping are reduced by changes in dipole moments of both the flipped bases that favor solvation of the bases in the open state and water molecules adjacent to the flipping base. PMID:24976900
Advanced Packaging Technology Used in Fabricating a High-Temperature Silicon Carbide Pressure Sensor
NASA Technical Reports Server (NTRS)
Beheim, Glenn M.
2003-01-01
The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were installed in water-cooled jackets, as shown. This was a severe test because the pressure-sensing chips were exposed to the hot combustion gases. Prior to the installation of the SiC pressure sensors, two high-temperature silicon sensors, installed in the same locations, did not survive a single engine run. The durability of the leadless SiC pressure sensor was demonstrated when both SiC sensors operated properly throughout the two runs that were conducted.
Single-transistor-clocked flip-flop
Zhao, Peiyi; Darwish, Tarek; Bayoumi, Magdy
2005-08-30
The invention provides a low power, high performance flip-flop. The flip-flop uses only one clocked transistor. The single clocked transistor is shared by the first and second branches of the device. A pulse generator produces a clock pulse to trigger the flip-flop. In one preferred embodiment the device can be made as a static explicit pulsed flip-flop which employs only two clocked transistors.
Plug-and-play, infrared, laser-mediated PCR in a microfluidic chip.
Pak, Nikita; Saunders, D Curtis; Phaneuf, Christopher R; Forest, Craig R
2012-04-01
Microfluidic polymerase chain reaction (PCR) systems have set milestones for small volume (100 nL-5 μL), amplification speed (100-400 s), and on-chip integration of upstream and downstream sample handling including purification and electrophoretic separation functionality. In practice, the microfluidic chips in these systems require either insertion of thermocouples or calibration prior to every amplification. These factors can offset the speed advantages of microfluidic PCR and have likely hindered commercialization. We present an infrared, laser-mediated, PCR system that features a single calibration, accurate and repeatable precision alignment, and systematic thermal modeling and management for reproducible, open-loop control of PCR in 1 μL chambers of a polymer microfluidic chip. Total cycle time is less than 12 min: 1 min to fill and seal, 10 min to amplify, and 1 min to recover the sample. We describe the design, basis for its operation, and the precision engineering in the system and microfluidic chip. From a single calibration, we demonstrate PCR amplification of a 500 bp amplicon from λ-phage DNA in multiple consecutive trials on the same instrument as well as multiple identical instruments. This simple, relatively low-cost plug-and-play design is thus accessible to persons who may not be skilled in assembly and engineering.
Song, X; Kim, S-Y; Zhou, Z; Lagasse, E; Kwon, Y T; Lee, Y J
2013-04-04
Colorectal cancer is the third leading cause of cancer-related mortality in the world; the main cause of death of colorectal cancer is hepatic metastases, which can be treated with hyperthermia using isolated hepatic perfusion (IHP). In this study, we report that mild hyperthermia potently reduced cellular FLIP(long), (c-FLIP(L)), a major regulator of the death receptor (DR) pathway of apoptosis, thereby enhancing humanized anti-DR4 antibody mapatumumab (Mapa)-mediated mitochondria-independent apoptosis. We observed that overexpression of c-FLIP(L) in CX-1 cells abrogated the synergistic effect of Mapa and hyperthermia, whereas silencing of c-FLIP in CX-1 cells enhanced Mapa-induced apoptosis. Hyperthermia altered c-FLIP(L) protein stability without concomitant reductions in FLIP mRNA. Ubiquitination of c-FLIP(L) was increased by hyperthermia, and proteasome inhibitor MG132 prevented heat-induced downregulation of c-FLIP(L). These results suggest the involvement of the ubiquitin-proteasome system in this process. We also found lysine residue 195 (K195) to be essential for c-FLIP(L) ubiquitination and proteolysis, as mutant c-FLIP(L) lysine 195 arginine (arginine replacing lysine) was left virtually un-ubiquitinated and was refractory to hyperthermia-triggered degradation, and thus partially blocked the synergistic effect of Mapa and hyperthermia. Our observations reveal that hyperthermia transiently reduced c-FLIP(L) by proteolysis linked to K195 ubiquitination, which contributed to the synergistic effect between Mapa and hyperthermia. This study supports the application of hyperthermia combined with other regimens to treat colorectal hepatic metastases.
Chip-to-chip interconnects based on 3D stacking of optoelectrical dies on Si
NASA Astrophysics Data System (ADS)
Duan, P.; Raz, O.; Smalbrugge, B. E.; Duis, J.; Dorren, H. J. S.
2012-01-01
We demonstrate a new approach to increase the optical interconnection bandwidth density by stacking the opto-electrical dies directly on the CMOS driver. The suggested implementation is aiming to provide a wafer scale process which will make the use of wire bonding redundant and will allow for impedance matched metallic wiring between the electronic driving circuit and its opto-electronic counter part. We suggest the use of a thick photoresist ramp between CMOS driver and opto-electrical dies surface as the bridge for supporting co-plannar waveguides (CPW) electrically plated with lithographic accuracy. In this way all three dimensions of the interconnecting metal layer, width, length and thickness can be completely controlled. In this 1st demonstration all processing is done on commercially available devices and products, and is compatible with CMOS processing technology. To test the applicability of CPW instead of wire bonds for interconnecting the CMOS circuit and opto-electronic chips, we have made test samples and tested their performance at speeds up to 10 Gbps. In this demonstration, a silicon substrate was used on which we evaporated gold co-planar waveguides (CPW) to mimic a wire on the driver. An optical link consisting of a VCSEL chip and a photodiode chip has been assembled and fully characterized using optical coupling into and out of a multimode fiber (MMF). A 10 Gb/s 27-1 NRZ PRBS signal transmitted from one chip to another chip was detected error free. A 4 dB receiver sensitivity penalty is measured for the integrated device compared to a commercial link.
Power-efficient dual-rate optical transceiver.
Zuo, Yongrong; Kiamiley, Fouad E; Wang, Xiaoqing; Gui, Ping; Ekman, Jeremy; Wang, Xingle; McFadden, Michael J; Haney, Michael W
2005-11-20
A dual-rate (2 Gbit/s and 100 Mbit/s) optical transceiver designed for power-efficient connections within and between modern high-speed digital systems is described. The transceiver can dynamically adjust its data rate according to performance requirements, allowing for power-on-demand operation. Dynamic power management permits energy saving and lowers device operating temperatures, improving the reliability and lifetime of optoelectronic-devices such as vertical-cavity surface-emitting lasers (VCSELs). To implement dual-rate functionality, we include in the transmitter and receiver circuits separate high-speed and low-power data path modules. The high-speed module is designed for gigabit operation to achieve high bandwidth. A simpler low-power module is designed for megabit data transmission with low power consumption. The transceiver is fabricated in a 0.5 microm silicon-on-sapphire complementary metal-oxide semiconductor. The VCSEL and photodetector devices are attached to the transceiver's integrated circuit by flip-chip bonding. A free-space optical link system is constructed to demonstrate correct dual-rate functionality. Experimental results show reliable link operation at 2 Gbit/s and 100 Mbit/s data transfer rates with approximately 104 and approximately 9 mW power consumption, respectively. The transceiver's switching time between these two data rates is demonstrated as 10 micros, which is limited by on-chip register reconfiguration time. Improvement of this switching time can be obtained by use of dedicated input-output pads for dual-rate control signals.
Li, Bo; Ren, Hui; Yue, Ping; Chen, Mingwei; Khuri, Fadlo R.; Sun, Shi-Yong
2012-01-01
API-1 is a novel small molecule inhibitor of Akt, which acts by binding to Akt and preventing its membrane translocation, and has promising preclinical antitumor activity. In this study, we reveal a novel function of API-1 in regulation of c-FLIP levels and tumor necrosis factor-related apoptosis-inducing ligand (TRAIL)-induced apoptosis, independent of Akt inhibition. API-1 effectively induced apoptosis in tested cancer cell lines including activation of caspase-8 and caspase-9. It reduced the levels of c-FLIP without increasing the expression of DR4 or DR5. Accordingly, it synergized with TRAIL to induce apoptosis. Enforced expression of ectopic c-FLIP did not attenuate API-1-induced apoptosis, but inhibited its ability to enhance TRAIL-induced apoptosis. These data indicate that downregulation of c-FLIP mediates enhancement of TRAIL-induced apoptosis by API-1, but is not sufficient for API-1-induced apoptosis. API-1-induced reduction of c-FLIP could be blocked by the proteasome inhibitor MG132. Moreover, API-1 increased c-FLIP ubiquitination and decreased c-FLIP stability. These data together suggest that API-1 downregulates c-FLIP by facilitating its ubiquitination and proteasome-mediated degradation. Since other Akt inhibitors including API-2 and MK2206 had minimal effects on reducing c-FLIP and enhancement of TRAIL-induced apoptosis, it is likely that API-1 reduces c-FLIP and enhances TRAIL-induced apoptosis independent of its Akt-inhibitory activity. PMID:22345097
24 CFR 3280.605 - Joints and connections.
Code of Federal Regulations, 2014 CFR
2014-04-01
... assembled for tightness. Pipe threads shall be fully engaged with the threads of the fitting. Plastic pipe... standard. Pipe ends shall be reamed out to size of bore. All burrs, chips, cutting oil and foreign matter..., made with solder having not more than 0.2 percent lead. (4) Plastic pipe, fittings and joints. Plastic...
NASA Astrophysics Data System (ADS)
Jiang, Homin; Yu, Chen-Yu; Kubo, Derek; Chen, Ming-Tang; Guzzino, Kim
2016-11-01
In this study, a 4 bit, 10 giga-samples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was designed, manufactured, and characterized for digitizing radio telescopes. For this purpose, an Adsantec ANST7120A-KMA flash ADC chip was used. Together with the field-programmable gate array platform, developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the PCBA enables data acquisition with a wide bandwidth and simplifies the intermediate frequency section. In the current version, the PCBA and the chip exhibit an analog bandwidth of 10 GHz (3 dB loss) and 20 GHz, respectively, which facilitates second, third, and even fourth Nyquist sampling. The following average performance parameters were obtained from the first and second Nyquist zones of the three boards: a spurious-free dynamic range of 31.35/30.45 dB, a signal-to-noise and distortion ratio of 22.95/21.83 dB, and an effective number of bits of 3.65/3.43, respectively.
Detection of trans–cis flips and peptide-plane flips in protein structures
DOE Office of Scientific and Technical Information (OSTI.GOV)
Touw, Wouter G., E-mail: wouter.touw@radboudumc.nl; Joosten, Robbie P.; Vriend, Gert, E-mail: wouter.touw@radboudumc.nl
A method is presented to detect peptide bonds that need either a trans–cis flip or a peptide-plane flip. A coordinate-based method is presented to detect peptide bonds that need correction either by a peptide-plane flip or by a trans–cis inversion of the peptide bond. When applied to the whole Protein Data Bank, the method predicts 4617 trans–cis flips and many thousands of hitherto unknown peptide-plane flips. A few examples are highlighted for which a correction of the peptide-plane geometry leads to a correction of the understanding of the structure–function relation. All data, including 1088 manually validated cases, are freely availablemore » and the method is available from a web server, a web-service interface and through WHAT-CHECK.« less
The Flipped Learning Approach in Nursing Education: A Literature Review.
Presti, Carmen Rosa
2016-05-01
This integrative review examines the application of the pedagogical methodology-the flipped classroom-in nursing education. A literature search of the CINAHL, ERIC, and the National Library of Medicine (PubMed and MEDLINE) databases was conducted, using the following key words: flipped classroom, inverted classroom, and nursing education. Results of a literature search yielded 94 articles, with 13 meeting the criteria of the flipped classroom approach in nursing education. Themes identified include the theoretical underpinning, strategies for implementation of a flipped classroom, and student satisfaction with and outcomes of the flipped classroom approach. Syntheses of the findings indicate that the flipped classroom approach can yield positive outcomes, but further study of this methodology is needed to guide future implementation. [J Nurs Educ. 2016;55(5):252-257.]. Copyright 2016, SLACK Incorporated.
Sharpe, T; Malone, A; French, H; Kiernan, D; O'Brien, T
2016-05-01
Flip-flops are a popular footwear choice in warm weather however their minimalist design offers little support to the foot. To investigate the effect of flip-flops on lower limb gait kinematics in healthy adults, to measure adherence between the flip-flop and foot, and to assess the effect on toe clearance in swing. Fifteen healthy adults (8 male, mean age 27 years) completed a three-dimensional gait analysis assessment using Codamotion. Kinematic and lower limb temporal-spatial data were captured using the Modified Helen Hayes marker set with additional markers on the hallux and flip-flop sole. Compared to barefoot walking, there were no differences in temporal-spatial parameters walking with flip-flops. There was an increase in peak knee flexion in swing (mean difference 4.6°, 95 % confidence interval (CI) [-5.8°, -3.4°], p < 0.001) and peak ankle dorsiflexion at terminal swing (mean difference 2°, 95 % CI [-3°, -1°], p = 0.001). Other kinematic parameters were unchanged. Peak separation between foot and flip-flop was 8.8 cm (SD 1.48), occurring at pre-swing. Minimum toe clearance of the hallux in barefoot walking measured 4.2 cm (SD 0.8). Minimum clearance of the flip-flop was 1.6 cm (SD 0.56). Healthy adults adapted well to flip-flops. However, separation of the flip-flop from the foot led to increased knee flexion and ankle dorsiflexion in swing, probably to ensure that the flip-flop did not contact the ground and to maximise adherence to the foot. Minimum clearance of the flip-flop was low compared to barefoot clearance. This may increase the risk of tripping over uneven ground.
Wilkie-Grantham, Rachel P; Matsuzawa, Shu-Ichi; Reed, John C
2013-05-03
The cytosolic protein c-FLIP (cellular Fas-associated death domain-like interleukin 1β-converting enzyme inhibitory protein) is an inhibitor of death receptor-mediated apoptosis that is up-regulated in a variety of cancers, contributing to apoptosis resistance. Several compounds found to restore sensitivity of cancer cells to TRAIL, a TNF family death ligand with promising therapeutic potential, act by targeting c-FLIP ubiquitination and degradation by the proteasome. The generation of reactive oxygen species (ROS) has been implicated in c-FLIP protein degradation. However, the mechanism by which ROS post-transcriptionally regulate c-FLIP protein levels is not well understood. We show here that treatment of prostate cancer PPC-1 cells with the superoxide generators menadione, paraquat, or buthionine sulfoximine down-regulates c-FLIP long (c-FLIP(L)) protein levels, which is prevented by the proteasome inhibitor MG132. Furthermore, pretreatment of PPC-1 cells with a ROS scavenger prevented ubiquitination and loss of c-FLIP(L) protein induced by menadione or paraquat. We identified lysine 167 as a novel ubiquitination site of c-FLIP(L) important for ROS-dependent degradation. We also identified threonine 166 as a novel phosphorylation site and demonstrate that Thr-166 phosphorylation is required for ROS-induced Lys-167 ubiquitination. The mutation of either Thr-166 or Lys-167 was sufficient to stabilize c-FLIP protein levels in PPC-1, HEK293T, and HeLa cancer cells treated with menadione or paraquat. Accordingly, expression of c-FLIP T166A or K167R mutants protected cells from ROS-mediated sensitization to TRAIL-induced cell death. Our findings reveal novel ROS-dependent post-translational modifications of the c-FLIP protein that regulate its stability, thus impacting sensitivity of cancer cells to TRAIL.
A molecular dynamics study of slow base flipping in DNA using conformational flooding.
Bouvier, Benjamin; Grubmüller, Helmut
2007-08-01
Individual DNA bases are known to be able to flip out of the helical stack, providing enzymes with access to the genetic information otherwise hidden inside the helix. Consequently, base flipping is a necessary first step to many more complex biological processes such as DNA transcription or replication. Much remains unknown about this elementary step, despite a wealth of experimental and theoretical studies. From the theoretical point of view, the involved timescale of milliseconds or longer requires the use of enhanced sampling techniques. In contrast to previous theoretical studies employing umbrella sampling along a predefined flipping coordinate, this study attempts to induce flipping without prior knowledge of the pathway, using information from a molecular dynamics simulation of a B-DNA fragment and the conformational flooding method. The relevance to base flipping of the principal components of the simulation is assayed, and a combination of modes optimally related to the flipping of the base through either helical groove is derived for each of the two bases of the central guanine-cytosine basepair. By applying an artificial flooding potential along these collective coordinates, the flipping mechanism is accelerated to within the scope of molecular dynamics simulations. The associated free energy surface is found to feature local minima corresponding to partially flipped states, particularly relevant to flipping in isolated DNA; further transitions from these minima to the fully flipped conformation are accelerated by additional flooding potentials. The associated free energy profiles feature similar barrier heights for both bases and pathways; the flipped state beyond is a broad and rugged attraction basin, only a few kcal/mol higher in energy than the closed conformation. This result diverges from previous works but echoes some aspects of recent experimental findings, justifying the need for novel approaches to this difficult problem: this contribution represents a first step in this direction. Important structural factors involved in flipping, both local (sugar-phosphate backbone dihedral angles) and global (helical axis bend), are also identified.
Student experiences across multiple flipped courses in a single curriculum.
Khanova, Julia; Roth, Mary T; Rodgers, Jo Ellen; McLaughlin, Jacqueline E
2015-10-01
The flipped classroom approach has garnered significant attention in health professions education, which has resulted in calls for curriculum-wide implementations of the model. However, research to support the development of evidence-based guidelines for large-scale flipped classroom implementations is lacking. This study was designed to examine how students experience the flipped classroom model of learning in multiple courses within a single curriculum, as well as to identify specific elements of flipped learning that students perceive as beneficial or challenging. A qualitative analysis of students' comments (n = 6010) from mid-course and end-of-course evaluations of 10 flipped courses (in 2012-2014) was conducted. Common and recurring themes were identified through systematic iterative coding and sorting using the constant comparison method. Multiple coders, agreement through consensus and member checking were utilised to ensure the trustworthiness of findings. Several themes emerged from the analysis: (i) the perceived advantages of flipped learning coupled with concerns about implementation; (ii) the benefits of pre-class learning and factors that negatively affect these benefits, such as quality and quantity of learning materials, as well as overall increase in workload, especially in the context of multiple concurrent flipped courses; (iii) the role of the instructor in the flipped learning environment, particularly in engaging students in active learning and ensuring instructional alignment, and (iv) the need for assessments that emphasise the application of knowledge and critical thinking skills. Analysis of data from 10 flipped courses provided insight into common patterns of student learning experiences specific to the flipped learning model within a single curriculum. The study points to the challenges associated with scaling the implementation of the flipped classroom across multiple courses. Several core elements critical to the effective design and implementation of the flipped classroom model are identified. © 2015 John Wiley & Sons Ltd.
Gobi, K Vengatajalabathy; Matsumoto, Kiyoshi; Toko, Kiyoshi; Ikezaki, Hidekazu; Miura, Norio
2007-04-01
This paper describes the fabrication and sensing characteristics of a self-assembled monolayer (SAM)-based surface plasmon resonance (SPR) immunosensor for detection of benzaldehyde (BZ). The functional sensing surface was fabricated by the immobilization of a benzaldehyde-ovalbumin conjugate (BZ-OVA) on Au-thiolate SAMs containing carboxyl end groups. Covalent binding of BZ-OVA on SAM was found to be dependent on the composition of the base SAM, and it is improved very much with the use of a mixed monolayer strategy. Based on SPR angle measurements, the functional sensor surface is established as a compact monolayer of BZ-OVA bound on the mixed SAM. The BZ-OVA-bound sensor surface undergoes immunoaffinity binding with anti-benzaldehyde antibody (BZ-Ab) selectively. An indirect inhibition immunoassay principle has been applied, in which analyte benzaldehyde solution was incubated with an optimal concentration of BZ-Ab for 5 min and injected over the sensor chip. Analyte benzaldehyde undergoes immunoreaction with BZ-Ab and makes it inactive for binding to BZ-OVA on the sensor chip. As a result, the SPR angle response decreases with an increase in the concentration of benzaldehyde. The fabricated immunosensor demonstrates a low detection limit (LDL) of 50 ppt (pg mL(-1)) with a response time of 5 min. Antibodies bound to the sensor chip during an immunoassay could be detached by a brief exposure to acidic pepsin. With this surface regeneration, reusability of the same sensor chip for as many as 30 determination cycles has been established. Sensitivity has been enhanced further with the application of an additional single-step multi-sandwich immunoassay step, in which the BZ-Ab bound to the sensor chip was treated with a mixture of biotin-labeled secondary antibody, streptavidin and biotin-bovine serum albumin (Bio-BSA) conjugate. With this approach, the SPR sensor signal increased by ca. 12 times and the low detection limit improved to 5 ppt with a total response time of no more than ca. 10 min. Figure A single-step multi-sandwich immunoassay step increases SPR sensor signal by ca. 12 times affording a low detection limit for benzaldehyde of 5 ppt.
The Flipped Classroom in Counselor Education
ERIC Educational Resources Information Center
Moran, Kristen; Milsom, Amy
2015-01-01
The flipped classroom is proposed as an effective instructional approach in counselor education. An overview of the flipped-classroom approach, including advantages and disadvantages, is provided. A case example illustrates how the flipped classroom can be applied in counselor education. Recommendations for implementing or researching flipped…
An easy to assemble microfluidic perfusion device with a magnetic clamp
Tkachenko, Eugene; Gutierrez, Edgar; Ginsberg, Mark H.; Groisman, Alex
2009-01-01
We have built and characterized a magnetic clamp for reversible sealing of PDMS microfluidic chips against cover glasses with cell cultures and a microfluidic chip for experiments on shear stress response of endothelial cells. The magnetic clamp exerts a reproducible uniform pressure on the microfluidic chip, achieving fast and reliable sealing for liquid pressures up to 40 kPa inside the chip with <10% deformations of microchannels and minimal variations of the substrate shear stress in perfusion flow. The microfluidic chip has 8 test regions with the substrate shear stress varying by a factor of 2 between each region, thus covering a 128-fold range from low venous to arterial. The perfusion is driven by differential pressure, which makes it possible to create pulsatile flows mimicking pulsing in the vasculature. The setup is tested by 15 – 40 hours perfusions over endothelial monolayers with shear stress in the range of 0.07 - 9 dyn/cm2. Excellent cell viability at all shear stresses and alignment of cells along the flow at high shear stresses are repeatedly observed. A scratch wound healing assay under a shear flow is demonstrated and cell migration velocities are measured. Transfection of cells with a fluorescent protein is performed, and migrating fluorescent cells are imaged at a high resolution under shear flow in real time. The magnetic clamp can be closed with minimal mechanical perturbation to cells on the substrate and used with a variety of microfluidic chips for experiments with adherent and non-adherent cells. PMID:19350090
Diversity of Anaerobic Microbes in Spacecraft Assembly Clean Rooms ▿ †
Probst, Alexander; Vaishampayan, Parag; Osman, Shariff; Moissl-Eichinger, Christine; Andersen, Gary L.; Venkateswaran, Kasthuri
2010-01-01
Although the cultivable and noncultivable microbial diversity of spacecraft assembly clean rooms has been previously documented using conventional and state-of-the-art molecular techniques, the occurrence of obligate anaerobes within these clean rooms is still uncertain. Therefore, anaerobic bacterial communities of three clean-room facilities were analyzed during assembly of the Mars Science Laboratory rover. Anaerobic bacteria were cultured on several media, and DNA was extracted from suitable anaerobic enrichments and examined with conventional 16S rRNA gene clone library, as well as high-density phylogenetic 16S rRNA gene microarray (PhyloChip) technologies. The culture-dependent analyses predominantly showed the presence of clostridial and propionibacterial strains. The 16S rRNA gene sequences retrieved from clone libraries revealed distinct microbial populations associated with each clean-room facility, clustered exclusively within gram-positive organisms. PhyloChip analysis detected a greater microbial diversity, spanning many phyla of bacteria, and provided a deeper insight into the microbial community structure of the clean-room facilities. This study presents an integrated approach for assessing the anaerobic microbial population within clean-room facilities, using both molecular and cultivation-based analyses. The results reveal that highly diverse anaerobic bacterial populations persist in the clean rooms even after the imposition of rigorous maintenance programs and will pose a challenge to planetary protection implementation activities. PMID:20228115
CENPT bridges adjacent CENPA nucleosomes on young human α-satellite dimers
Thakur, Jitendra; Henikoff, Steven
2016-01-01
Nucleosomes containing the CenH3 (CENPA or CENP-A) histone variant replace H3 nucleosomes at centromeres to provide a foundation for kinetochore assembly. CENPA nucleosomes are part of the constitutive centromere associated network (CCAN) that forms the inner kinetochore on which outer kinetochore proteins assemble. Two components of the CCAN, CENPC and the histone-fold protein CENPT, provide independent connections from the ∼171-bp centromeric α-satellite repeat units to the outer kinetochore. However, the spatial relationship between CENPA nucleosomes and these two branches remains unclear. To address this issue, we use a base-pair resolution genomic readout of protein–protein interactions, comparative chromatin immunoprecipitation (ChIP) with sequencing, together with sequential ChIP, to infer the in vivo molecular architecture of the human CCAN. In contrast to the currently accepted model in which CENPT associates with H3 nucleosomes, we find that CENPT is centered over the CENPB box between two well-positioned CENPA nucleosomes on the most abundant centromeric young α-satellite dimers and interacts with the CENPB/CENPC complex. Upon cross-linking, the entire CENPA/CENPB/CENPC/CENPT complex is nuclease-protected over an α-satellite dimer that comprises the fundamental unit of centromeric chromatin. We conclude that CENPA/CENPC and CENPT pathways for kinetochore assembly are physically integrated over young α-satellite dimers. PMID:27384170
Kavuri, Shyam M.; Geserick, Peter; Berg, Daniela; Dimitrova, Diana Panayotova; Feoktistova, Maria; Siegmund, Daniela; Gollnick, Harald; Neumann, Manfred; Wajant, Harald; Leverkus, Martin
2011-01-01
Death receptors (DRs) induce apoptosis but also stimulate proinflammatory “non-apoptotic” signaling (e.g. NF-κB and mitogen-activated protein kinase (MAPK) activation) and inhibit distinct steps of DR-activated maturation of procaspase-8. To examine whether isoforms of cellular FLIP (cFLIP) or its cleavage products differentially regulate DR signaling, we established HaCaT cells expressing cFLIPS, cFLIPL, or mutants of cFLIPL (cFLIPD376N and cFLIPp43). cFLIP variants blocked TRAIL- and CD95L-induced apoptosis, but the cleavage pattern of caspase-8 in the death inducing signaling complex was different: cFLIPL induced processing of caspase-8 to the p43/41 fragments irrespective of cFLIP cleavage. cFLIPS or cFLIPp43 blocked procaspase-8 cleavage. Analyzing non-apoptotic signaling pathways, we found that TRAIL and CD95L activate JNK and p38 within 15 min. cFLIP variants and different caspase inhibitors blocked late death ligand-induced JNK or p38 MAPK activation suggesting that these responses are secondary to cell death. cFLIP isoforms/mutants also blocked death ligand-mediated gene induction of CXCL-8 (IL-8). Knockdown of caspase-8 fully suppressed apoptotic and non-apoptotic signaling. Knockdown of cFLIP isoforms in primary human keratinocytes enhanced CD95L- and TRAIL-induced NF-κB activation, and JNK and p38 activation, underscoring the regulatory role of cFLIP for these DR-mediated signals. Whereas the presence of caspase-8 is critical for apoptotic and non-apoptotic signaling, cFLIP isoforms are potent inhibitors of TRAIL- and CD95L-induced apoptosis, NF-κB activation, and the late JNK and p38 MAPK activation. cFLIP-mediated inhibition of CD95 and TRAIL DR could be of crucial importance during keratinocyte skin carcinogenesis and for the activation of innate and/or adaptive immune responses triggered by DR activation in the skin. PMID:21454681
The Marriage of Constructivism and Flipped Learning
ERIC Educational Resources Information Center
Chang, Sau Hou
2016-01-01
This report talks about how a constructivist teacher used flipped learning in a college class. To illustrate how to use flipped learning in a constructivist classroom, examples were given with the four pillars of F-L-I-P: Flexible environment, learning culture, intentional content, and professional educator.
Shindo, Ryodai; Yamazaki, Soh; Ohmuraya, Masaki; Araki, Kimi; Nakano, Hiroyasu
2016-11-04
Cellular FLICE-inhibitory protein (cFLIP) is a catalytically inactive homolog of the initiator caspase, caspase 8 and blocks apoptosis through binding to caspase 8. Human CFLAR gene encodes two proteins, a long form cFLIP (cFLIP L ) and a short form cFLIP (cFLIPs) due to an alternative splicing. Recent studies have shown that expression of cFLIPs, but not cFLIP L promotes programmed necrosis (also referred to as necroptosis) in an immortalized human keratinocyte cell line, HaCaT. Here, we found that expression of cFLIPs similarly promoted necroptosis in immortalized fibroblasts. To further expand this observation and exclude the possibility that immortalization process of keratinocytes or fibroblasts might affect the phenotype induced by cFLIPs expression, we generated human CFLARs transgenic (Tg) mice. Primary fibroblasts derived from CFLARs Tg mice were increased in susceptibility to TNFα-induced necroptosis, but not apoptosis compared to wild-type (WT) fibroblasts. Moreover, hallmarks of necroptosis, such as phosphorylation of receptor-interacting protein kinase (RIPK)1 and RIPK3, and oligomer formation of mixed lineage kinase domain-like (MLKL) were robustly induced in CFLARs Tg fibroblasts compared to wild-type fibroblasts following TNFα stimulation. Thus, cFLIPs-dependent promotion of necroptosis is not unique to immortalized keratinocytes or fibroblasts, but also to generalized to primary fibroblasts. Copyright © 2016 Elsevier Inc. All rights reserved.
Flipping Radiology Education Right Side Up.
O'Connor, Erin E; Fried, Jessica; McNulty, Nancy; Shah, Pallav; Hogg, Jeffery P; Lewis, Petra; Zeffiro, Thomas; Agarwal, Vikas; Reddy, Sravanthi
2016-07-01
In flipped learning, medical students independently learn facts and concepts outside the classroom, and then participate in interactive classes to learn to apply these facts. Although there are recent calls for medical education reform using flipped learning, little has been published on its effectiveness. Our study compares the effects of flipped learning to traditional didactic instruction on students' academic achievement, task value, and achievement emotions. At three institutions, we alternated flipped learning with traditional didactic lectures during radiology clerkships, with 175 medical students completing a pretest on general diagnostic imaging knowledge to assess baseline cohort comparability. Following instruction, posttests and survey examinations of task value and achievement emotions were administered. Linear mixed effects analysis was used to examine the relationship between test scores and instruction type. Survey responses were modeled using ordinal category logistic regression. Instructor surveys were also collected. There were no baseline differences in test scores. Mean posttest minus pretest scores were 10.5% higher in the flipped learning group than in the didactic instruction group (P = 0.013). Assessment of task value and achievement emotions showed greater task value, increased enjoyment, and decreased boredom with flipped learning (all P < 0.01). All instructors preferred the flipped learning condition. Flipped learning was associated with increased academic achievement, greater task value, and more positive achievement emotions when compared to traditional didactic instruction. Further investigation of flipped learning methods in radiology education is needed to determine whether flipped learning improves long-term retention of knowledge, academic success, and patient care. Copyright © 2016 The Association of University Radiologists. Published by Elsevier Inc. All rights reserved.
NASA Astrophysics Data System (ADS)
Sletten, Sarah Rae
2017-06-01
In flipped classrooms, lectures, which are normally delivered in-class, are assigned as homework in the form of videos, and assignments that were traditionally assigned as homework, are done as learning activities in class. It was hypothesized that the effectiveness of the flipped model hinges on a student's desire and ability to adopt a self-directed learning style. The purpose of this study was twofold; it aimed at examining the relationship between two variables—students' perceptions of the flipped model and their self-regulated learning (SRL) behaviors—and the impact that these variables have on achievement in a flipped class. For the study, 76 participants from a flipped introductory biology course were asked about their SRL strategy use and perceptions of the flipped model. SRL strategy use was measured using a modified version of the Motivated Strategies for Learning Questionnaire (MSLQ; Wolters et al. 2005), while the flipped perceptions survey was newly derived. Student letter grades were collected as a measure of achievement. Through regression analysis, it was found that students' perceptions of the flipped model positively predict students' use of several types of SRL strategies. However, the data did not indicate a relationship between student perceptions and achievement, neither directly nor indirectly, through SRL strategy use. Results suggest that flipped classrooms demonstrate their successes in the active learning sessions through constructivist teaching methods. Video lectures hold an important role in flipped classes, however, students may need to practice SRL skills to become more self-directed and effectively learn from them.
Li, Bo; Ren, Hui; Yue, Ping; Chen, Mingwei; Khuri, Fadlo R; Sun, Shi-Yong
2012-04-01
API-1 (pyrido[2,3-d]pyrimidines) is a novel small-molecule inhibitor of Akt, which acts by binding to Akt and preventing its membrane translocation and has promising preclinical antitumor activity. In this study, we reveal a novel function of API-1 in regulation of cellular FLICE-inhibitory protein (c-FLIP) levels and TRAIL-induced apoptosis, independent of Akt inhibition. API-1 effectively induced apoptosis in tested cancer cell lines including activation of caspase-8 and caspase-9. It reduced the levels of c-FLIP without increasing the expression of death receptor 4 (DR4) or DR5. Accordingly, it synergized with TRAIL to induce apoptosis. Enforced expression of ectopic c-FLIP did not attenuate API-1-induced apoptosis but inhibited its ability to enhance TRAIL-induced apoptosis. These data indicate that downregulation of c-FLIP mediates enhancement of TRAIL-induced apoptosis by API-1 but is not sufficient for API-1-induced apoptosis. API-1-induced reduction of c-FLIP could be blocked by the proteasome inhibitor MG132. Moreover, API-1 increased c-FLIP ubiquitination and decreased c-FLIP stability. These data together suggest that API-1 downregulates c-FLIP by facilitating its ubiquitination and proteasome-mediated degradation. Because other Akt inhibitors including API-2 and MK2206 had minimal effects on reducing c-FLIP and enhancement of TRAIL-induced apoptosis, it is likely that API-1 reduces c-FLIP and enhances TRAIL-induced apoptosis independent of its Akt-inhibitory activity. 2012 AACR
Impacts of Flipped Classroom in High School Health Education
ERIC Educational Resources Information Center
Chen, Li-Ling
2016-01-01
As advanced technology increasingly infiltrated into classroom, the flipped classroom has come to light in secondary educational settings. The flipped classroom is a new instructional approach that intends to flip the traditional teacher-centered classroom into student centered. The purpose of this research is to investigate the impact of the…
Performance and Motivation in a Middle School Flipped Learning Course
ERIC Educational Resources Information Center
Winter, Joshua W.
2018-01-01
Flipped learning is a teaching approach that promotes collaboration by using technology to 'flip' traditional instruction. Content is delivered outside of class in the individual space (online) and the group space (classroom) is used to engage in collaborative activities. Flipped learning shifts the teacher's role toward facilitation. Research on…
Peer Teaching in a Flipped Teacher Education Classroom
ERIC Educational Resources Information Center
Graziano, Kevin J.
2017-01-01
More and more school administrators are expecting new teachers to flip their classrooms prior to completing their teacher certification. The purpose of this study was to explore the experiences of preservice teachers who facilitated learning in a flipped classroom, to identify the benefits and challenges of flipped instruction on preservice…
How "Flipping" the Classroom Can Improve the Traditional Lecture
ERIC Educational Resources Information Center
Berrett, Dan
2012-01-01
In this article, the author discusses a teaching technique called "flipping" and describes how "flipping" the classroom can improve the traditional lecture. As its name suggests, flipping describes the inversion of expectations in the traditional college lecture. It takes many forms, including interactive engagement, just-in-time teaching (in…
The Flip Side of Flipped Language Teaching
ERIC Educational Resources Information Center
Lyddon, Paul A.
2015-01-01
The past decade has seen a growing interest in "flipped teaching", an inversion of traditional teaching methods, whereby instruction formerly taking place in the classroom is made accessible online and lesson time is spent on interaction. Until very recently, flipped learning was largely limited to the Science, Technology, Engineering,…
Flipped Learning, Flipped Satisfaction, Getting the Balance Right
ERIC Educational Resources Information Center
Swinburne, Rosemary Fisher; Ross, Bella; LaFerriere, Richard; Maritz, Alex
2017-01-01
This paper explores students' perceptions of their learning outcomes, engagement, and satisfaction with a technology-facilitated flipped approach in a third-year core subject at an Australian university during 2014. In this pilot study, findings reveal that students preferred the flipped approach to the traditional face-to-face delivery and…
Applying the Flipped Classroom Model to English Language Arts Education
ERIC Educational Resources Information Center
Young, Carl A., Ed.; Moran, Clarice M., Ed.
2017-01-01
The flipped classroom method, particularly when used with digital video, has recently attracted many supporters within the education field. Now more than ever, language arts educators can benefit tremendously from incorporating flipped classroom techniques into their curriculum. "Applying the Flipped Classroom Model to English Language Arts…
Protonation-dependent base flipping in the catalytic triad of a small RNA
NASA Astrophysics Data System (ADS)
Sun, Zhaoxi; Wang, Xiaohui; Zhang, John Z. H.
2017-09-01
Protonation dependent base flipping in RNA has never been studied theoretically. In this work we studied protonation-dependent behavior of the base flipping in the catalytic triad of a single-stranded RNA which was previously characterized by NMR experiment. Molecular dynamics simulation reveals that the GA mismatch in this region accounts for this behavior. Free energy profiles show that the stable point for flipping dihedral shifts about 35° and the free energy barrier along the flipping pathway is elevated upon protonation. The orientation of Guanine from syn to anti conformation is coupled with protonation-dependent base flipping and G-HA+ base pair is formed under acidic condition.
van Vliet, E. A.; Winnips, J. C.; Brouwer, N.
2015-01-01
In flipped-class pedagogy, students prepare themselves at home before lectures, often by watching short video clips of the course contents. The aim of this study was to investigate the effects of flipped classes on motivation and learning strategies in higher education using a controlled, pre- and posttest approach. The same students were followed in a traditional course and in a course in which flipped classes were substituted for part of the traditional lectures. On the basis of the validated Motivated Strategies for Learning Questionnaire (MSLQ), we found that flipped-class pedagogy enhanced the MSLQ components critical thinking, task value, and peer learning. However, the effects of flipped classes were not long-lasting. We therefore propose repeated use of flipped classes in a curriculum to make effects on metacognition and collaborative-learning strategies sustainable. PMID:26113628
Flipped Learning With Simulation in Undergraduate Nursing Education.
Kim, HeaRan; Jang, YounKyoung
2017-06-01
Flipped learning has proliferated in various educational environments. This study aimed to verify the effects of flipped learning on the academic achievement, teamwork skills, and satisfaction levels of undergraduate nursing students. For the flipped learning group, simulation-based education via the flipped learning method was provided, whereas traditional, simulation-based education was provided for the control group. After completion of the program, academic achievement, teamwork skills, and satisfaction levels were assessed and analyzed. The flipped learning group received higher scores on academic achievement, teamwork skills, and satisfaction levels than the control group, including the areas of content knowledge and clinical nursing practice competency. In addition, this difference gradually increased between the two groups throughout the trial. The results of this study demonstrated the positive, statistically significant effects of the flipped learning method on simulation-based nursing education. [J Nurs Educ. 2017;56(6):329-336.]. Copyright 2017, SLACK Incorporated.
NASA Technical Reports Server (NTRS)
Boriakoff, Valentin; Chen, Wei
1990-01-01
The NASA-Cornell Univ.-Worcester Polytechnic Institute Fast Fourier Transform (FFT) chip based on the architecture of the systolic FFT computation as presented by Boriakoff is implemented into an operating device design. The kernel of the system, a systolic inner product floating point processor, was designed to be assembled into a systolic network that would take incoming data streams in pipeline fashion and provide an FFT output at the same rate, word by word. It was thoroughly simulated for proper operation, and it has passed a comprehensive set of tests showing no operational errors. The black box specifications of the chip, which conform to the initial requirements of the design as specified by NASA, are given. The five subcells are described and their high level function description, logic diagrams, and simulation results are presented. Some modification of the Read Only Memory (ROM) design were made, since some errors were found in it. Because a four stage pipeline structure was used, simulating such a structure is more difficult than an ordinary structure. Simulation methods are discussed. Chip signal protocols and chip pinout are explained.
Binding of leachable components of polymethyl methacrylate (PMMA) and peptide on modified SPR chip
NASA Astrophysics Data System (ADS)
Szaloki, M.; Vitalyos, G.; Harfalvi, J.; Hegedus, Cs
2013-12-01
Many types of polymers are often used in dentistry, which may cause allergic reaction, mainly methyl methacrylate allergy due to the leachable, degradable components of polymerized dental products. The aim of this study was to investigate the interaction between the leachable components of PMMA and peptides by Fourier-transform Surface Plasmon Resonance (FT SPR). In our previous work binding of oligopeptides (Ph.D.-7 and Ph.D.-12 Peptide Library Kit) was investigated to PMMA surface by phage display technique. It was found that oligopeptides bounded specifically to PMMA surface. The most common amino acids were leucine and proline inside the amino acids sequences of DNA of phages. The binding of haptens, as formaldehyde and methacrylic acid, to frequent amino acids was to investigate on the modified gold SPR chip. Self assembled monolayer (SAM) modified the surface of gold chip and ensured the specific binding between the haptens and amino acids. It was found that amino acids bounded to modified SPR gold and the haptens bounded to amino acids by creating multilayer on the chip surface. By the application of phage display and SPR modern bioanalytical methods the interaction between allergens and peptides can be investigated.
Engineering of Neuron Growth and Enhancing Cell-Chip Communication via Mixed SAMs.
Markov, Aleksandr; Maybeck, Vanessa; Wolf, Nikolaus; Mayer, Dirk; Offenhäusser, Andreas; Wördenweber, Roger
2018-06-06
The interface between cells and inorganic surfaces represents one of the key elements for bioelectronics experiments and applications ranging from cell cultures and bioelectronics devices to medical implants. In the present paper, we describe a way to tailor the biocompatibility of substrates in terms of cell growth and to significantly improve cell-chip communication, and we also demonstrate the reusability of the substrates for cell experiments. All these improvements are achieved by coating the substrates or chips with a self-assembled monolayer (SAM) consisting of a mixture of organic molecules, (3-aminopropyl)-triethoxysilane and (3-glycidyloxypropyl)-trimethoxysilane. By varying the ratio of these molecules, we are able to tune the cell density and live/dead ratios of rat cortical neurons cultured directly on the mixed SAM as well as neurons cultured on protein-coated SAMs. Furthermore, the use of the SAM leads to a significant improvement in cell-chip communications. Action potential signals of up to 9.4 ± 0.6 mV (signal-to-noise ratio up to 47) are obtained for HL-1 cells on microelectrode arrays. Finally, we demonstrate that the SAMs facilitate a reusability of the samples for all cell experiments with little re-processing.
Three-dimensional integrated circuits for lab-on-chip dielectrophoresis of nanometer scale particles
NASA Astrophysics Data System (ADS)
Dickerson, Samuel J.; Noyola, Arnaldo J.; Levitan, Steven P.; Chiarulli, Donald M.
2007-01-01
In this paper, we present a mixed-technology micro-system for electronically manipulating and optically detecting virusscale particles in fluids that is designed using 3D integrated circuit technology. During the 3D fabrication process, the top-most chip tier is assembled upside down and the substrate material is removed. This places the polysilicon layer, which is used to create geometries with the process' minimum feature size, in close proximity to a fluid channel etched into the top of the stack. By taking advantage of these processing features inherent to "3D chip-stacking" technology, we create electrode arrays that have a gap spacing of 270 nm. Using 3D CMOS technology also provides the ability to densely integrate analog and digital control circuitry for the electrodes by using the additional levels of the chip stack. We show simulations of the system with a physical model of a Kaposi's sarcoma-associated herpes virus, which has a radius of approximately 125 nm, being dielectrophoretically arranged into striped patterns. We also discuss how these striped patterns of trapped nanometer scale particles create an effective diffraction grating which can then be sensed with macro-scale optical techniques.
Development of Equivalent Material Properties of Microbump for Simulating Chip Stacking Packaging
Lee, Chang-Chun; Tzeng, Tzai-Liang; Huang, Pei-Chen
2015-01-01
A three-dimensional integrated circuit (3D-IC) structure with a significant scale mismatch causes difficulty in analytic model construction. This paper proposes a simulation technique to introduce an equivalent material composed of microbumps and their surrounding wafer level underfill (WLUF). The mechanical properties of this equivalent material, including Young’s modulus (E), Poisson’s ratio, shear modulus, and coefficient of thermal expansion (CTE), are directly obtained by applying either a tensile load or a constant displacement, and by increasing the temperature during simulations, respectively. Analytic results indicate that at least eight microbumps at the outermost region of the chip stacking structure need to be considered as an accurate stress/strain contour in the concerned region. In addition, a factorial experimental design with analysis of variance is proposed to optimize chip stacking structure reliability with four factors: chip thickness, substrate thickness, CTE, and E-value. Analytic results show that the most significant factor is CTE of WLUF. This factor affects microbump reliability and structural warpage under a temperature cycling load and high-temperature bonding process. WLUF with low CTE and high E-value are recommended to enhance the assembly reliability of the 3D-IC architecture. PMID:28793495
Deep Exploration of the Flipped Classroom before Implementing
ERIC Educational Resources Information Center
Logan, Brenda
2015-01-01
This paper is a review of the literature that attempts to explain and document the literature on the flipped classroom. It examines 49 studies that explain the flipped approach in the classroom. This paper, particularly, delineates the history, the theory, benefits, criticisms, recommended practices, and what the research on flipping reveals.…
Present Research on the Flipped Classroom and Potential Tools for the EFL Classroom
ERIC Educational Resources Information Center
Mehring, Jeff
2016-01-01
The flipped classroom can support the implementation of a communicative, student-centered learning environment in the English as a foreign language classroom. Unfortunately, there is little research which supports the incorporation of flipped learning in the English as a foreign language classroom. Numerous studies have focused on flipped learning…
MathsFlip: Flipped Learning. Evaluation Report and Executive Summary
ERIC Educational Resources Information Center
Rudd, Peter; Aguilera, Alaidde Berenice Villaneuva; Elliott, Louise; Chambers, Bette
2017-01-01
The MathsFlip intervention aimed to improve the attainment of pupils in Years 5 and 6. The programme, developed by Shireland Collegiate Academy, used a 'flipped learning' approach involving pupils learning core content online, outside of class time, and then participating in activities in class to reinforce their learning. The programme used an…
Implementing and Assessing a Flipped Classroom Model for First-Year Engineering Design
ERIC Educational Resources Information Center
Saterbak, Ann; Volz, Tracy; Wettergreen, Matthew
2016-01-01
Faculty at Rice University are creating instructional resources to support teaching first-year engineering design using a flipped classroom model. This implementation of flipped pedagogy is unusual because content-driven, lecture courses are usually targeted for flipping, not project-based design courses that already incorporate an abundance of…
The flipped classroom for professional development: part I. Benefits and strategies.
McDonald, Katie; Smith, Charlene M
2013-10-01
Individualizing the educational encounter is supported by flipping the classroom experience. This column offers an overview and describes the benefits of flipping the classroom. Part II will explore the practicalities and pedagogy of lecture capture using podcasts and videos, a technology strategy used in flipping the classroom. Copyright 2013, SLACK Incorporated.
Implementing the Flipped Classroom: An Exploration of Study Behaviour and Student Performance
ERIC Educational Resources Information Center
Boevé, Anja J.; Meijer, Rob R.; Bosker, Roel J.; Vugteveen, Jorien; Hoekstra, Rink; Albers, Casper J.
2017-01-01
The flipped classroom is becoming more popular as a means to support student learning in higher education by requiring students to prepare before lectures and actively engaging students during lectures. While some research has been conducted into student performance in the flipped classroom, students' study behaviour throughout a flipped course…
Flipped Instruction with English Language Learners at a Newcomer High School
ERIC Educational Resources Information Center
Graziano, Kevin J.; Hall, John D.
2017-01-01
Research on flipped instruction with English Language Learners (ELLs) is sparse. Data-driven flipped research conducted with ELLs primarily involves adult learners attending a college or university. This study examined the academic performance of secondary ELLs who received flipped instruction in an algebra course at a newcomer school compared to…
A Flipped Classroom Redesign in General Chemistry
ERIC Educational Resources Information Center
Reid, Scott A.
2016-01-01
The flipped classroom continues to attract significant attention in higher education. Building upon our recent parallel controlled study of the flipped classroom in a second-term general chemistry course ("J. Chem. Educ.," 2016, 93, 13-23), here we report on a redesign of the flipped course aimed at scaling up total enrollment while…
ERIC Educational Resources Information Center
Overmyer, Jerry
2015-01-01
This quantitative research compares five sections of College Algebra using flipped classroom methods with six sections using the traditional lecture/homework structure and its effect on student achievement as measured through a common final exam. Common final exam scores were the dependent variables. Instructors of flipped sections who had…
Digital Microfluidics Sample Analyzer
NASA Technical Reports Server (NTRS)
Pollack, Michael G.; Srinivasan, Vijay; Eckhardt, Allen; Paik, Philip Y.; Sudarsan, Arjun; Shenderov, Alex; Hua, Zhishan; Pamula, Vamsee K.
2010-01-01
Three innovations address the needs of the medical world with regard to microfluidic manipulation and testing of physiological samples in ways that can benefit point-of-care needs for patients such as premature infants, for which drawing of blood for continuous tests can be life-threatening in their own right, and for expedited results. A chip with sample injection elements, reservoirs (and waste), droplet formation structures, fluidic pathways, mixing areas, and optical detection sites, was fabricated to test the various components of the microfluidic platform, both individually and in integrated fashion. The droplet control system permits a user to control droplet microactuator system functions, such as droplet operations and detector operations. Also, the programming system allows a user to develop software routines for controlling droplet microactuator system functions, such as droplet operations and detector operations. A chip is incorporated into the system with a controller, a detector, input and output devices, and software. A novel filler fluid formulation is used for the transport of droplets with high protein concentrations. Novel assemblies for detection of photons from an on-chip droplet are present, as well as novel systems for conducting various assays, such as immunoassays and PCR (polymerase chain reaction). The lab-on-a-chip (a.k.a., lab-on-a-printed-circuit board) processes physiological samples and comprises a system for automated, multi-analyte measurements using sub-microliter samples of human serum. The invention also relates to a diagnostic chip and system including the chip that performs many of the routine operations of a central labbased chemistry analyzer, integrating, for example, colorimetric assays (e.g., for proteins), chemiluminescence/fluorescence assays (e.g., for enzymes, electrolytes, and gases), and/or conductometric assays (e.g., for hematocrit on plasma and whole blood) on a single chip platform.
Rapid Identification of ESKAPE Bacterial Strains Using an Autonomous Microfluidic Device
Ho, Jack Y.; Cira, Nate J.; Crooks, John A.; Baeza, Josue; Weibel, Douglas B.
2012-01-01
This article describes Bacteria ID Chips (‘BacChips’): an inexpensive, portable, and autonomous microfluidic platform for identifying pathogenic strains of bacteria. BacChips consist of a set of microchambers and channels molded in the elastomeric polymer, poly(dimethylsiloxane) (PDMS). Each microchamber is preloaded with mono-, di-, or trisaccharides and dried. Pressing the layer of PDMS into contact with a glass coverslip forms the device; the footprint of the device in this article is ∼6 cm2. After assembly, BacChips are degased under large negative pressure and are stored in vacuum-sealed plastic bags. To use the device, the bag is opened, a sample containing bacteria is introduced at the inlet of the device, and the degased PDMS draws the sample into the central channel and chambers. After the liquid at the inlet is consumed, air is drawn into the BacChip via the inlet and provides a physical barrier that separates the liquid samples in adjacent microchambers. A pH indicator is admixed with the samples prior to their loading, enabling the metabolism of the dissolved saccharides in the microchambers to be visualized. Importantly, BacChips operate without external equipment or instruments. By visually detecting the growth of bacteria using ambient light after ∼4 h, we demonstrate that BacChips with ten microchambers containing different saccharides can reproducibly detect the ESKAPE panel of pathogens, including strains of: Enterococcus faecalis, Enteroccocus faecium, Staphylococcus aureus, Klebsiella pneumoniae, Acinetobacter baumannii, Pseudomonas aeruginosa, Enterobacter aerogenes, and Enterobacter cloacae. This article describes a BacChip for point-of-care detection of ESKAPE pathogens and a starting point for designing multiplexed assays that identify bacterial strains from clinical samples and simultaneously determine their susceptibility to antibiotics. PMID:22848451
Automated, Ultra-Sterile Solid Sample Handling and Analysis on a Chip
NASA Technical Reports Server (NTRS)
Mora, Maria F.; Stockton, Amanda M.; Willis, Peter A.
2013-01-01
There are no existing ultra-sterile lab-on-a-chip systems that can accept solid samples and perform complete chemical analyses without human intervention. The proposed solution is to demonstrate completely automated lab-on-a-chip manipulation of powdered solid samples, followed by on-chip liquid extraction and chemical analysis. This technology utilizes a newly invented glass micro-device for solid manipulation, which mates with existing lab-on-a-chip instrumentation. Devices are fabricated in a Class 10 cleanroom at the JPL MicroDevices Lab, and are plasma-cleaned before and after assembly. Solid samples enter the device through a drilled hole in the top. Existing micro-pumping technology is used to transfer milligrams of powdered sample into an extraction chamber where it is mixed with liquids to extract organic material. Subsequent chemical analysis is performed using portable microchip capillary electrophoresis systems (CE). These instruments have been used for ultra-highly sensitive (parts-per-trillion, pptr) analysis of organic compounds including amines, amino acids, aldehydes, ketones, carboxylic acids, and thiols. Fully autonomous amino acid analyses in liquids were demonstrated; however, to date there have been no reports of completely automated analysis of solid samples on chip. This approach utilizes an existing portable instrument that houses optics, high-voltage power supplies, and solenoids for fully autonomous microfluidic sample processing and CE analysis with laser-induced fluorescence (LIF) detection. Furthermore, the entire system can be sterilized and placed in a cleanroom environment for analyzing samples returned from extraterrestrial targets, if desired. This is an entirely new capability never demonstrated before. The ability to manipulate solid samples, coupled with lab-on-a-chip analysis technology, will enable ultraclean and ultrasensitive end-to-end analysis of samples that is orders of magnitude more sensitive than the ppb goal given in the Science Instruments.
Yáñez, Jaime A; Remsberg, Connie M; Sayre, Casey L; Forrest, M Laird; Davies, Neal M
2011-01-01
Flip-flop pharmacokinetics is a phenomenon often encountered with extravascularly administered drugs. Occurrence of flip-flop spans preclinical to human studies. The purpose of this article is to analyze both the pharmacokinetic interpretation errors and opportunities underlying the presence of flip-flop pharmacokinetics during drug development. Flip-flop occurs when the rate of absorption is slower than the rate of elimination. If it is not recognized, it can create difficulties in the acquisition and interpretation of pharmacokinetic parameters. When flip-flop is expected or discovered, a longer duration of sampling may be necessary in order to avoid overestimation of fraction of dose absorbed. Common culprits of flip-flop disposition are modified dosage formulations; however, formulation characteristics such as the drug chemical entities themselves or the incorporated excipients can also cause the phenomenon. Yet another contributing factor is the physiological makeup of the extravascular site of administration. In this article, these causes of flip-flop pharmacokinetics are discussed with incorporation of relevant examples and the implications for drug development outlined. PMID:21837267
Increased cFLIP expression in thymic epithelial tumors blocks autophagy via NF-κB signalling.
Belharazem, Djeda; Grass, Albert; Paul, Cornelia; Vitacolonna, Mario; Schalke, Berthold; Rieker, Ralf J; Körner, Daniel; Jungebluth, Philipp; Simon-Keller, Katja; Hohenberger, Peter; Roessner, Eric M; Wiebe, Karsten; Gräter, Thomas; Kyriss, Thomas; Ott, German; Geserick, Peter; Leverkus, Martin; Ströbel, Philipp; Marx, Alexander
2017-10-27
The anti-apoptotic cellular FLICE-like inhibitory protein cFLIP plays a pivotal role in normal tissues homoeostasis and the development of many tumors, but its role in normal thymus (NT), thymomas and thymic carcinomas (TC) is largely unknown. Expression, regulation and function of cFLIP were analyzed in biopsies of NT, thymomas, thymic squamous cell carcinomas (TSCC), thymic epithelial cells (TECs) derived thereof and in the TC line 1889c by qRT-PCR, western blot, shRNA techniques, and functional assays addressing survival, senescence and autophagy. More than 90% of thymomas and TSCCs showed increased cFLIP expression compared to NT. cFLIP expression declined with age in NTs but not in thymomas. During short term culture cFLIP expression levels declined significantly slower in neoplastic than non-neoplastic primary TECs. Down-regulation of cFLIP by shRNA or NF-κB inhibition accelerated senescence and induced autophagy and cell death in neoplastic TECs. The results suggest a role of cFLIP in the involution of normal thymus and the development of thymomas and TSCC. Since increased expression of cFLIP is a known tumor escape mechanism, it may serve as tissue-based biomarker in future clinical trials, including immune checkpoint inhibitor trials in the commonly PD-L1 high thymomas and TCs.
Gopalan, Chaya; Klann, Megan C
2017-09-01
Flipped classroom is a hybrid educational format that shifts guided teaching out of class, thus allowing class time for student-centered learning. Although this innovative teaching format is gaining attention, there is limited evidence on the effectiveness of flipped teaching on student performance. We compared student performance and student attitudes toward flipped teaching with that of traditional lectures using a partial flipped study design. Flipped teaching expected students to have completed preclass material, such as assigned reading, instructor-prepared lecture video(s), and PowerPoint slides. In-class activities included the review of difficult topics, a modified team-based learning (TBL) session, and an individual assessment. In the unflipped teaching format, students were given PowerPoint slides and reading assignment before their scheduled lectures. The class time consisted of podium-style lecture, which was captured in real time and was made available for students to use as needed. Comparison of student performance between flipped and unflipped teaching showed that flipped teaching improved student performance by 17.5%. This was true of students in both the upper and lower half of the class. A survey conducted during this study indicated that 65% of the students changed the way they normally studied, and 69% of the students believed that they were more prepared for class with flipped learning than in the unflipped class. These findings suggest that flipped teaching, combined with TBL, is more effective than the traditional lecture. Copyright © 2017 the American Physiological Society.
Huang, Qi-Quan; Birkett, Robert; Doyle, Renee E; Haines, G Kenneth; Perlman, Harris; Shi, Bo; Homan, Philip; Xing, Lianping; Pope, Richard M
2017-09-01
Macrophages are critical in the pathogenesis of rheumatoid arthritis (RA). We recently demonstrated that FLIP is necessary for the differentiation and/or survival of macrophages. We also showed that FLIP is highly expressed in RA synovial macrophages. This study was undertaken to determine if a reduction in FLIP in mouse macrophages reduces synovial tissue macrophages and ameliorates serum-transfer arthritis. Mice with Flip deleted in myeloid cells (Flip f/f LysM c/+ mice) and littermate controls were used. Arthritis was induced by intraperitoneal injection of K/BxN serum. Disease severity was evaluated by clinical score and change in ankle thickness, and joints were examined by histology and immunohistochemistry. Cells were isolated from the ankles and bone marrow of the mice and examined by flow cytometry, real-time quantitative reverse transcriptase-polymerase chain reaction, or Western blotting. In contrast to expectations, Flip f/f LysM c/+ mice developed more severe arthritis early in the clinical course, but peak arthritis was attenuated and the resolution phase more complete than in control mice. Prior to the induction of serum-transfer arthritis, the number of tissue-resident macrophages was reduced. On day 9 after arthritis induction, the number of F4/80 high macrophages in the joints of the Flip f/f LysM c/+ mice was not decreased, but increased. FLIP was reduced in the F4/80 high macrophages in the ankles of the Flip f/f LysM c/+ mice, while F4/80 high macrophages expressed an antiinflammatory phenotype in both the Flip f/f LysM c/+ and control mice. Our observations suggest that reducing FLIP in macrophages by increasing the number of antiinflammatory macrophages may be an effective therapeutic approach to suppress inflammation, depending on the disease stage. © 2017, American College of Rheumatology.
Oh, Seo Yeong; Heo, Nam Su; Shukla, Shruti; Cho, Hye-Jin; Vilian, A T Ezhil; Kim, Jinwoon; Lee, Sang Yup; Han, Young-Kyu; Yoo, Seung Min; Huh, Yun Suk
2017-08-31
A non-labeled, portable plasmonic biosensor-based device was developed to enable the ultra-sensitive and selective detection of Salmonella typhimurium in pork meat samples. Specifically, a plasmonic sensor, using the self-assembly of gold nanoparticles (AuNPs) to achieve a regulated diameter of 20 nm for the AuNP monolayers, was used to conduct high-density deposition on a transparent substrate, which produced longitudinal wavelength extinction shifts via a localized surface plasmon resonance (LSPR) signal. The developed aptamers conjugated to the LSPR sensing chips revealed an ultra-sensitive upper limit of detection (LOD) of approximately 10 4 cfu/mL for S. typhimurium in pure culture under the optimal assay conditions, with a total analysis time of 30-35 min. When the LSPR sensing chips were applied on artificially contaminated pork meat samples, S. typhimurium in the spiked pork meat samples was also detected at an LOD of 1.0 × 10 4 cfu/mL. The developed method could detect S. typhimurium in spiked pork meat samples without a pre-enrichment step. Additionally, the LSPR sensing chips developed against S. typhimurium were not susceptible to any effect of the food matrix or background contaminant microflora. These findings confirmed that the developed gold nanoparticle-aptamer-based LSPR sensing chips could facilitate sensitive detection of S. typhimurium in food samples.
Does "Flipping" Promote Engagement?: A Comparison of a Traditional, Online, and Flipped Class
ERIC Educational Resources Information Center
Burke, Alison S.; Fedorek, Brian
2017-01-01
"Flipped" or inverted classrooms are designed to utilize class time for application and knowledge building, while course content is delivered through the use of online lectures and watched at home on the students' time. It is believed that flipped classrooms promote student engagement and a deeper understanding of the class material. The…
Scaffolded Semi-Flipped General Chemistry Designed to Support Rural Students' Learning
ERIC Educational Resources Information Center
Lenczewski, Mary S.
2016-01-01
Students who lack academic maturity can sometimes feel overwhelmed in a fully flipped classroom. Here an alternative, the Semi-Flipped method, is discussed. Rural students, who face unique challenges in transitioning from high school learning to college-level learning, can particularly profit from the use of the Semi-Flipped method in the General…
ERIC Educational Resources Information Center
Hodgson, Theodore R.; Cunningham, Abby; McGee, Daniel; Kinne, Lenore J.; Murphy, Teri J.
2017-01-01
There is a growing evidence that flipped classrooms are associated with increased levels of student engagement, as compared to engagement in "traditional" settings. Much of this research, however, occurs in post-secondary classrooms and is based upon self-reported engagement data. This study seeks to extend existing flipped classroom…
ERIC Educational Resources Information Center
Saulnier, Bruce M.
2015-01-01
Problems associated with the ubiquitous presence of technology on college campuses are discussed and the concept of the flipped classroom is explained. Benefits of using the flipped classroom to offset issues associated with the presence of technology in the classroom are explored. Fink's Integrated Course Design is used to develop a flipped class…
ERIC Educational Resources Information Center
Yang, Chi Cheung Ruby
2017-01-01
Aim/Purpose: To examine the use of a flipped classroom in the English Language subject in secondary classrooms in Hong Kong. Background: The research questions addressed were: (1) What are teachers' perceptions towards the flipped classroom pedagogy?; (2) How can teachers transfer their flipped classroom experiences to teaching other…
K-12 Teacher Perceptions Regarding the Flipped Classroom Model for Teaching and Learning
ERIC Educational Resources Information Center
Gough, Evan; DeJong, David; Grundmeyer, Trent; Baron, Mark
2017-01-01
A great deal of evidence can be cited from higher education literature on the effectiveness of the flipped classroom; however, very little research was discovered on the flipped classroom at the K-12 level. This study examined K-12 teachers' perceptions regarding the flipped classroom and differences in teachers' perceptions based on grade level…
ERIC Educational Resources Information Center
Lin, Chi-Jen; Hwang, Gwo-Jen
2018-01-01
Flipped classrooms have been widely adopted and discussed by school teachers and researchers in the past decade. However, few studies have been conducted to formally evaluate the effectiveness of flipped classrooms in terms of improving EFL students' English oral presentation, not to mention investigating factors affecting their flipped learning…
ERIC Educational Resources Information Center
Roehling, Patricia V.; Root Luna, Lindsey M.; Richie, Fallon J.; Shaughnessy, John J.
2017-01-01
Flipped pedagogy has become a popular approach in education. While preliminary research suggests that the flipped classroom has a positive effect on learning in Science, Technology, Engineering, and Mathematics and quantitative courses, the research on the flipped classroom in a content heavy social science course is minimal and contradictory. We…
ConfChem Conference on Flipped Classroom: Flipping at an Open-Enrollment College
ERIC Educational Resources Information Center
Butzler, Kelly B.
2015-01-01
The flipped classroom is a blended, constructivist learning environment that reverses where students gain and apply knowledge. Instructors from K-12 to the college level are interested in the prospect of flipping their classes, but are unsure how and with which students to implement this learning environment. There has been little discussion…
The implementation of flipped classroom model in CIE in the environment of non-target language
NASA Astrophysics Data System (ADS)
Xiao, Renfei; Mustofa, Ali; Zhang, Fang; Su, Xiaoxue
2018-01-01
This paper sets a theoretical framework that it’s both feasible and indispensable of flipping classroom in Chinese International Education (CIE) in the non-target language environments. There are mainly three sections included: 1) what is flipped classroom and why it becomes inevitable existence; 2) why should we flip the classroom in CIE environments, especially in non-target language environments; 3) take Pusat Bahasa Mandarin Universitas Negeri Surabaya as an instance to discuss the application of flipped classroom in non-target language environments.
The flipped classroom: practices and opportunities for health sciences librarians.
Youngkin, C Andrew
2014-01-01
The "flipped classroom" instructional model is being introduced into medical and health sciences curricula to provide greater efficiency in curriculum delivery and produce greater opportunity for in-depth class discussion and problem solving among participants. As educators employ the flipped classroom to invert curriculum delivery and enhance learning, health sciences librarians are also starting to explore the flipped classroom model for library instruction. This article discusses how academic and health sciences librarians are using the flipped classroom and suggests opportunities for this model to be further explored for library services.
Electro-optic routing of photons from a single quantum dot in photonic integrated circuits
NASA Astrophysics Data System (ADS)
Midolo, Leonardo; Hansen, Sofie L.; Zhang, Weili; Papon, Camille; Schott, Rüdiger; Ludwig, Arne; Wieck, Andreas D.; Lodahl, Peter; Stobbe, Søren
2017-12-01
Recent breakthroughs in solid-state photonic quantum technologies enable generating and detecting single photons with near-unity efficiency as required for a range of photonic quantum technologies. The lack of methods to simultaneously generate and control photons within the same chip, however, has formed a main obstacle to achieving efficient multi-qubit gates and to harness the advantages of chip-scale quantum photonics. Here we propose and demonstrate an integrated voltage-controlled phase shifter based on the electro-optic effect in suspended photonic waveguides with embedded quantum emitters. The phase control allows building a compact Mach-Zehnder interferometer with two orthogonal arms, taking advantage of the anisotropic electro-optic response in gallium arsenide. Photons emitted by single self-assembled quantum dots can be actively routed into the two outputs of the interferometer. These results, together with the observed sub-microsecond response time, constitute a significant step towards chip-scale single-photon-source de-multiplexing, fiber-loop boson sampling, and linear optical quantum computing.
Micromagnetic Architectures for On-chip Microparticle Transport
NASA Astrophysics Data System (ADS)
Ouk, Minae; Beach, Geoffrey S. D.
2015-03-01
Superparamagnetic microbeads (SBs) are widely used to capture and manipulate biological entities in a fluid environment. Chip-based magnetic actuation provides a means to transport SBs in lab-on-a-chip devices. This is usually accomplished using the stray field from patterned magnetic microstructures, or domain walls in magnetic nanowires. Magnetic anti-dot arrays are particularly attractive due to the high-gradient stray fields from their partial domain wall structures. Here we use a self-assembly method to create magnetic anti-dot arrays in Co films, and describe the motion of SBs across the surface by a rotating field. We find a critical field-rotation frequency beyond which bead motion ceases and a critical threshold for both the in-plane and out-of-plane field components that must be exceeded for bead motion to occur. We show that these field thresholds are bead size dependent, and can thus be used to digitally separate magnetic beads in multi-bead populations. Hence these large-area structures can be used to combine long distance transport with novel functionalities.
Microfluidics for producing poly (lactic-co-glycolic acid)-based pharmaceutical nanoparticles.
Li, Xuanyu; Jiang, Xingyu
2017-12-24
Microfluidic chips allow the rapid production of a library of nanoparticles (NPs) with distinct properties by changing the precursors and the flow rates, significantly decreasing the time for screening optimal formulation as carriers for drug delivery compared to conventional methods. The batch-to-batch reproducibility which is essential for clinical translation is achieved by precisely controlling the precursors and the flow rate, regardless of operators. Poly (lactic-co-glycolic acid) (PLGA) is the most widely used Food and Drug Administration (FDA)-approved biodegradable polymers. Researchers often combine PLGA with lipids or amphiphilic molecules to assemble into a core/shell structure to exploit the potential of PLGA-based NPs as powerful carriers for cancer-related drug delivery. In this review, we discuss the advantages associated with microfluidic chips for producing PLGA-based functional nanocomplexes for drug delivery. These laboratory-based methods can readily scale up to provide sufficient amount of PLGA-based NPs in microfluidic chips for clinical studies and industrial-scale production. Copyright © 2017. Published by Elsevier B.V.
NASA Astrophysics Data System (ADS)
Bruno, A.; Michalak, D. J.; Poletto, S.; Clarke, J. S.; Dicarlo, L.
Large-scale quantum computation hinges on the ability to preserve and process quantum information with higher fidelity by increasing redundancy in a quantum error correction code. We present the realization of a scalable footprint for superconducting surface code based on planar circuit QED. We developed a tileable unit cell for surface code with all I/O routed vertically by means of superconducting through-silicon vias (TSVs). We address some of the challenges encountered during the fabrication and assembly of these chips, such as the quality of etch of the TSV, the uniformity of the ALD TiN coating conformal to the TSV, and the reliability of superconducting indium contact between the chips and PCB. We compare measured performance to a detailed list of specifications required for the realization of quantum fault tolerance. Our demonstration using centimeter-scale chips can accommodate the 50 qubits needed to target the experimental demonstration of small-distance logical qubits. Research funded by Intel Corporation and IARPA.
On-chip interference of single photons from an embedded quantum dot and an external laser
DOE Office of Scientific and Technical Information (OSTI.GOV)
Prtljaga, N., E-mail: n.prtljaga@sheffield.ac.uk; Bentham, C.; O'Hara, J.
2016-06-20
In this work, we demonstrate the on-chip two-photon interference between single photons emitted by a single self-assembled InGaAs quantum dot and an external laser. The quantum dot is embedded within one arm of an air-clad directional coupler which acts as a beam-splitter for incoming light. Photons originating from an attenuated external laser are coupled to the second arm of the beam-splitter and then combined with the quantum dot photons, giving rise to two-photon quantum interference between dissimilar sources. We verify the occurrence of on-chip Hong-Ou-Mandel interference by cross-correlating the optical signal from the separate output ports of the directional coupler.more » This experimental approach allows us to use a classical light source (laser) to assess in a single step the overall device performance in the quantum regime and probe quantum dot photon indistinguishability on application realistic time scales.« less
NASA Astrophysics Data System (ADS)
Karch, J.; Krejci, F.; Bartl, B.; Dudak, J.; Kuba, J.; Kvacek, J.; Zemlicka, J.
2016-01-01
State-of-the-art hybrid pixel semiconductor detectors provide excellent imaging properties such as unlimited dynamic range, high spatial resolution, high frame rate and energy sensitivity. Nevertheless, a limitation in the use of these devices for imaging has been the small sensitive area of a few square centimetres. In the field of microtomography we make use of a large area pixel detector assembled from 50 Timepix edgeless chips providing fully sensitive area of 14.3 × 7.15 cm2. We have successfully demonstrated that the enlargement of the sensitive area enables high-quality tomographic measurements of whole objects with high geometrical magnification without any significant degradation in resulting reconstructions related to the chip tilling and edgeless sensor technology properties. The technique of micro-tomography with the newly developed large area detector is applied for samples formed by low attenuation, low contrast materials such a seed from Phacelia tanacetifolia, a charcoalified wood sample and a beeswax seal sample.
Molecular self assembly of mixed comb-like dextran surfactant polymers for SPR virus detection.
Mai-Ngam, Katanchalee; Kiatpathomchai, Wansika; Arunrut, Narong; Sansatsadeekul, Jitlada
2014-11-04
The synthesis of two comb-like dextran surfactant polymers, that are different in their dextran molecular weight (MW) distribution and the presence of carboxylic groups, and their characterization are reported. A bimodal carboxylic dextran surfactant polymer consists of poly(vinyl amine) (PVAm) backbone with carboxyl higher MW dextran, non-functionalized lower MW dextran and hydrophobic hexyl branches; while a monomodal dextran surfactant polymer is PVAm grafted with non-functionalized lower MW dextran and hexyl branches. Layer formation of non-covalently attached dextran chains with bimodal MW distributions on a surface plasmon resonance (SPR) chip was investigated from the perspective of mixed physisorption of the bimodal and monomodal surfactant polymers. Separation distances between the carboxylic longer dextran side chains within the bimodal surfactant polymer and between the whole bimodal surfactant molecules on the chip surface could be well-controlled. SPR analysis of shrimp yellow head virus using our mixed surfactant chips showed dependence on synergetic adjustment of these separation distances. Copyright © 2014 Elsevier Ltd. All rights reserved.
Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei
2015-12-16
In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.
Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei
2015-01-01
In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction. PMID:26694407
Comparative analysis of human gait while wearing thong-style flip-flops versus sneakers.
Shroyer, Justin F; Weimar, Wendi H
2010-01-01
Flip-flops are becoming a common footwear option. Casual observation has indicated that individuals wear flip-flops beyond their structural limit and have a different gait while wearing flip-flops versus shoes. This alteration in gait may cause the anecdotal foot and lower-limb discomfort associated with wearing flip-flops. To investigate the effect of sneakers versus thong-style flip-flops on gait kinematics and kinetics, 56 individuals (37 women and 19 men) were randomly assigned to a footwear order (flip-flops or sneakers first) and were asked to wear the assigned footwear on the day before and the day of testing. On each testing day, participants were videotaped as they walked at a self-selected pace across a force platform. A 2 (sex) x 2 (footwear) repeated-measures analysis of variance (P = .05) was used for statistical analysis. Significant interaction effects of footwear and sex were found for maximal anterior force, attack angle, and ankle angle during the swing phase. Footwear significantly affected stride length, ankle angle at the beginning of double support and during the swing phase, maximal braking impulse, and stance time. Flip-flops resulted in a shorter stride, a larger ankle angle at the beginning of double support and during the swing phase, a smaller braking impulse, and a shorter stance time compared with sneakers. The effects of footwear on gait kinetics and kinematics is extensive, but there is limited research on the effect of thong-style flip-flops on gait. These results suggest that flip-flops have an effect on several kinetic and kinematic variables compared with sneakers.
Thick resist for MEMS processing
NASA Astrophysics Data System (ADS)
Brown, Joe; Hamel, Clifford
2001-11-01
The need for technical innovation is always present in today's economy. Microfabrication methods have evolved in support of the demand for smaller and faster integrated circuits with price performance improvements always in the scope of the manufacturing design engineer. The dispersion of processing technology spans well beyond IC fabrication today with batch fabrication and wafer scale processing lending advantages to MEMES applications from biotechnology to consumer electronics from oil exploration to aerospace. Today the demand for innovative processing techniques that enable technology is apparent where only a few years ago appeared too costly or not reliable. In high volume applications where yield and cost improvements are measured in fractions of a percent it is imperative to have process technologies that produce consistent results. Only a few years ago thick resist coatings were limited to thickness less than 20 microns. Factors such as uniformity, edge bead and multiple coatings made high volume production impossible. New developments in photoresist formulation combined with advanced coating equipment techniques that closely controls process parameters have enable thick photoresist coatings of 70 microns with acceptable uniformity and edge bead in one pass. Packaging of microelectronic and micromechanical devices is often a significant cost factor and a reliability issue for high volume low cost production. Technologies such as flip- chip assembly provide a solution for cost and reliability improvements over wire bond techniques. The processing for such technology demands dimensional control and presents a significant cost savings if it were compatible with mainstream technologies. Thick photoresist layers, with good sidewall control would allow wafer-bumping technologies to penetrate the barriers to yield and production where costs for technology are the overriding issue. Single pass processing is paramount to the manufacturability of packaging technology. Uniformity and edge bead control defined the success of process implementation. Today advanced packaging solutions are created with thick photoresist coatings. The techniques and results will be presented.
Increased cFLIP expression in thymic epithelial tumors blocks autophagy via NF-κB signalling
Belharazem, Djeda; Grass, Albert; Paul, Cornelia; Vitacolonna, Mario; Schalke, Berthold; Rieker, Ralf J.; Körner, Daniel; Jungebluth, Philipp; Simon-Keller, Katja; Hohenberger, Peter; Roessner, Eric M.; Wiebe, Karsten; Gräter, Thomas; Kyriss, Thomas; Ott, German; Geserick, Peter; Ströbel, Philipp; Marx, Alexander
2017-01-01
The anti-apoptotic cellular FLICE-like inhibitory protein cFLIP plays a pivotal role in normal tissues homoeostasis and the development of many tumors, but its role in normal thymus (NT), thymomas and thymic carcinomas (TC) is largely unknown. Expression, regulation and function of cFLIP were analyzed in biopsies of NT, thymomas, thymic squamous cell carcinomas (TSCC), thymic epithelial cells (TECs) derived thereof and in the TC line 1889c by qRT-PCR, western blot, shRNA techniques, and functional assays addressing survival, senescence and autophagy. More than 90% of thymomas and TSCCs showed increased cFLIP expression compared to NT. cFLIP expression declined with age in NTs but not in thymomas. During short term culture cFLIP expression levels declined significantly slower in neoplastic than non-neoplastic primary TECs. Down-regulation of cFLIP by shRNA or NF-κB inhibition accelerated senescence and induced autophagy and cell death in neoplastic TECs. The results suggest a role of cFLIP in the involution of normal thymus and the development of thymomas and TSCC. Since increased expression of cFLIP is a known tumor escape mechanism, it may serve as tissue-based biomarker in future clinical trials, including immune checkpoint inhibitor trials in the commonly PD-L1high thymomas and TCs. PMID:29163772
NASA Astrophysics Data System (ADS)
Maedler, Kathrin; Fontana, Adriano; Ris, Frédéric; Sergeev, Pavel; Toso, Christian; Oberholzer, José; Lehmann, Roger; Bachmann, Felix; Tasinato, Andrea; Spinas, Giatgen A.; Halban, Philippe A.; Donath, Marc Y.
2002-06-01
Type 2 diabetes mellitus results from an inadequate adaptation of the functional pancreatic cell mass in the face of insulin resistance. Changes in the concentration of glucose play an essential role in the regulation of cell turnover. In human islets, elevated glucose concentrations impair cell proliferation and induce cell apoptosis via up-regulation of the Fas receptor. Recently, it has been shown that the caspase-8 inhibitor FLIP may divert Fas-mediated death signals into those for cell proliferation in lymphatic cells. We observed expression of FLIP in human pancreatic cells of nondiabetic individuals, which was decreased in tissue sections of type 2 diabetic patients. In vitro exposure of islets from nondiabetic organ donors to high glucose levels decreased FLIP expression and increased the percentage of apoptotic terminal deoxynucleotidyltransferase-mediated UTP end labeling (TUNEL)-positive cells; FLIP was no longer detectable in such TUNEL-positive cells. Up-regulation of FLIP, by incubation with transforming growth factor or by transfection with an expression vector coding for FLIP, protected cells from glucose-induced apoptosis, restored cell proliferation, and improved cell function. The beneficial effects of FLIP overexpression were blocked by an antagonistic anti-Fas antibody, indicating their dependence on Fas receptor activation. The present data provide evidence for expression of FLIP in the human cell and suggest a novel approach to prevent and treat diabetes by switching Fas signaling from apoptosis to proliferation.
ERIC Educational Resources Information Center
Ryan, Michael D.; Reid, Scott A.
2016-01-01
Despite much recent interest in the flipped classroom, quantitative studies are slowly emerging, particularly in the sciences. We report a year-long parallel controlled study of the flipped classroom in a second-term general chemistry course. The flipped course was piloted in the off-semester course in Fall 2014, and the availability of the…
The flipped classroom: strategies for an undergraduate nursing course.
Schlairet, Maura C; Green, Rebecca; Benton, Melissa J
2014-01-01
This article presents the authors' experience with flipping a fundamental concepts of nursing course for students in an undergraduate baccalaureate program. Authors describe implementing a flipped class, practical strategies to transform students' learning experience, and lessons learned. This article serves as a guide to faculty and programs seeking to develop and implement the flipped class model in nursing education.
ERIC Educational Resources Information Center
Graham, Marnie; McLean, Jessica; Read, Alexander; Suchet-Pearson, Sandie; Viner, Venessa
2017-01-01
The flipped classroom approach, a form of blended learning, is currently popular in education praxis. Initial reports on the flipped classroom include that it offers opportunities to increase student engagement and build meaningful learning and teaching experiences. In this article, we analyse teacher and student experiences of a trial flipped…