Aeroflex Technology as Class-Y Demonstrator

NASA Technical Reports Server (NTRS)

Suh, Jong-ook; Agarwal, Shri; Popelar, Scott

2014-01-01

Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.

1.65 mm diameter forward-viewing confocal endomicroscopic catheter using a flip-chip bonded electrothermal MEMS fiber scanner.

PubMed

Seo, Yeong-Hyeon; Hwang, Kyungmin; Jeong, Ki-Hun

2018-02-19

We report a 1.65 mm diameter forward-viewing confocal endomicroscopic catheter using a flip-chip bonded electrothermal MEMS fiber scanner. Lissajous scanning was implemented by the electrothermal MEMS fiber scanner. The Lissajous scanned MEMS fiber scanner was precisely fabricated to facilitate flip-chip connection, and bonded with a printed circuit board. The scanner was successfully combined with a fiber-based confocal imaging system. A two-dimensional reflectance image of the metal pattern 'OPTICS' was successfully obtained with the scanner. The flip-chip bonded scanner minimizes electrical packaging dimensions. The inner diameter of the flip-chip bonded MEMS fiber scanner is 1.3 mm. The flip-chip bonded MEMS fiber scanner is fully packaged with a 1.65 mm diameter housing tube, 1 mm diameter GRIN lens, and a single mode optical fiber. The packaged confocal endomicroscopic catheter can provide a new breakthrough for diverse in-vivo endomicroscopic applications.

Physics-based process modeling, reliability prediction, and design guidelines for flip-chip devices

NASA Astrophysics Data System (ADS)

Michaelides, Stylianos

Flip Chip on Board (FCOB) and Chip-Scale Packages (CSPs) are relatively new technologies that are being increasingly used in the electronic packaging industry. Compared to the more widely used face-up wirebonding and TAB technologies, flip-chips and most CSPs provide the shortest possible leads, lower inductance, higher frequency, better noise control, higher density, greater input/output (I/O), smaller device footprint and lower profile. However, due to the short history and due to the introduction of several new electronic materials, designs, and processing conditions, very limited work has been done to understand the role of material, geometry, and processing parameters on the reliability of flip-chip devices. Also, with the ever-increasing complexity of semiconductor packages and with the continued reduction in time to market, it is too costly to wait until the later stages of design and testing to discover that the reliability is not satisfactory. The objective of the research is to develop integrated process-reliability models that will take into consideration the mechanics of assembly processes to be able to determine the reliability of face-down devices under thermal cycling and long-term temperature dwelling. The models incorporate the time and temperature-dependent constitutive behavior of various materials in the assembly to be able to predict failure modes such as die cracking and solder cracking. In addition, the models account for process-induced defects and macro-micro features of the assembly. Creep-fatigue and continuum-damage mechanics models for the solder interconnects and fracture-mechanics models for the die have been used to determine the reliability of the devices. The results predicted by the models have been successfully validated against experimental data. The validated models have been used to develop qualification and test procedures for implantable medical devices. In addition, the research has helped develop innovative face-down devices without the underfill, based on the thorough understanding of the failure modes. Also, practical design guidelines for material, geometry and process parameters for reliable flip-chip devices have been developed.

Multigigabit optical transceivers for high-data rate military applications

NASA Astrophysics Data System (ADS)

Catanzaro, Brian E.; Kuznia, Charlie

2012-01-01

Avionics has experienced an ever increasing demand for processing power and communication bandwidth. Currently deployed avionics systems require gigabit communication using opto-electronic transceivers connected with parallel optical fiber. Ultra Communications has developed a series of transceiver solutions combining ASIC technology with flip-chip bonding and advanced opto-mechanical molded optics. Ultra Communications custom high speed ASIC chips are developed using an SoS (silicon on sapphire) process. These circuits are flip chip bonded with sources (VCSEL arrays) and detectors (PIN diodes) to create an Opto-Electronic Integrated Circuit (OEIC). These have been combined with micro-optics assemblies to create transceivers with interfaces to standard fiber array (MT) cabling technology. We present an overview of the demands for transceivers in military applications and how new generation transceivers leverage both previous generation military optical transceivers as well as commercial high performance computing optical transceivers.

Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

NASA Astrophysics Data System (ADS)

Unno, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.; Sato, Kz.; Sato, Kj.; Iwabuchi, S.; Suzuki, J.

2017-01-01

We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n+-in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

A 16K-bit static IIL RAM with 25-ns access time

NASA Astrophysics Data System (ADS)

Inabe, Y.; Hayashi, T.; Kawarada, K.; Miwa, H.; Ogiue, K.

1982-04-01

A 16,384 x 1-bit RAM with 25-ns access time, 600-mW power dissipation, and 33 sq mm chip size has been developed. Excellent speed-power performance with high packing density has been achieved by an oxide isolation technology in conjunction with novel ECL circuit techniques and IIL flip-flop memory cells, 980 sq microns (35 x 28 microns) in cell size. Development results have shown that IIL flip-flop memory cell is a trump card for assuring achievement of a high-performance large-capacity bipolar RAM, in the above 16K-bit/chip area.

Laser-induced forward transfer for flip-chip packaging of single dies.

PubMed

Kaur, Kamal S; Van Steenberge, Geert

2015-03-20

Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 1960(1) such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.

Advanced Liquid-Free, Piezoresistive, SOI-Based Pressure Sensors for Measurements in Harsh Environments.

PubMed

Ngo, Ha-Duong; Mukhopadhyay, Biswaijit; Ehrmann, Oswin; Lang, Klaus-Dieter

2015-08-18

In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a "one-sensor-one-packaging_technology" concept. The second one uses a standard flip-chip bonding technique. The first sensor is a "floating-concept", capable of measuring pressures at temperatures up to 400 °C (constant load) with an accuracy of 0.25% Full Scale Output (FSO). A push rod (mounted onto the steel membrane) transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process). A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not "floating" but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA.

Silver flip chip interconnect technology and solid state bonding

NASA Astrophysics Data System (ADS)

Sha, Chu-Hsuan

In this dissertation, fluxless transient liquid phase (TLP) bonding and solid state bonding between thermal expansion mismatch materials have been developed using Ag-In binary systems, pure Au, Ag, and Cu-Ag composite. In contrast to the conventional soldering process, fluxless bonding technique eliminates any corrosion and contamination problems caused by flux. Without flux, it is possible to fabricate high quality joints in large bonding areas where the flux is difficult to clean entirely. High quality joints are crucial to bonding thermal expansion mismatch materials since shear stress develops in the bonded pair. Stress concentration at voids in joints could increases breakage probability. In addition, intermetallic compound (IMC) formation between solder and underbump metallurgy (UBM) is essential for interconnect joint formation in conventional soldering process. However, the interface between IMC and solder is shown to be the weak interface that tends to break first during thermal cycling and drop tests. In our solid state bonding technique, there is no IMC involved in the bonding between Au to Au, Ag and Cu, and Ag and Au. All the reliability issues related to IMC or IMC growth is not our concern. To sum up, ductile bonding media, such as Ag or Au, and proper metallic layered structure are utilized in this research to produce high quality joints. The research starts with developing a low temperature fluxless bonding process using electroplated Ag/In/Ag multilayer structures between Si chip and 304 stainless steel (304SS) substrate. Because the outer thin Ag layer effectively protects inner In layer from oxidation, In layer dissolves Ag layer and joints to Ag layer on the to-be-bonded Si chip when temperature reaches the reflow temperature of 166ºC. Joints consist of mainly Ag-rich Ag-In solid solution and Ag2In. Using this fluxless bonding technique, two 304SS substrates can be bonded together as well. From the high magnification SEM images taken at cross-section, there is no void or gap observed. The new bonding technique presented should be valuable in packaging high power electronic devices for high temperature operations. It should also be useful to bond two 304SS parts together at low bonding temperature of 190ºC. Solid state bonding technique is then introduced to bond semiconductor chips, such as Si, to common substrates, such as Cu or alumina, using pure Ag and Au at a temperature matching the typical reflow temperature used in packaging industries, 260°C. In bonding, we realize the possibilities of solid state bonding of Au to Au, Au to Ag, and Ag to Cu. The idea comes from that Cu, Ag, and Au are located in the same column on periodic table, meaning that they have similar electronic configuration. They therefore have a better chance to share electrons. Also, the crystal lattice of Cu, Ag, and Au is the same, face-centered cubic. In the project, the detailed bonding mechanism is beyond the scope and here we determine the bonding by the experimental result. Ag is chosen as the joint material because of its superior physical properties. It has the highest electrical and thermal conductivities among all metals. It has low yield strength and is relatively ductile. Au is considered as well because its excellent ductility and fatigue resistance. Thus, the Ag or Au joints can deform to accommodate the shear strain caused by CTE mismatch between Si and Cu. Ag and Au have melting temperatures higher than 950°C, so the pure Ag or Au joints are expected to sustain in high operating temperature. The resulting joints do not contain any intermetallic compound. Thus, all reliability issues associated with intermetallic growth in commonly used solder joints do not exist anymore. We finally move to the applications of solid state Ag bonding in flip chip interconnects design. At present, nearly all large-scale integrated circuit (IC) chips are packaged with flip-chip technology. This means that the chip is flipped over and the active (front) side is connected to the package using a large number of tiny solder joints, which provide mechanical support, electrical connection, and heat conduction. For chip-to-package level interconnects, a challenge is the severe mismatch in coefficient of thermal expansion (CTE) between chips and package substrates. The interconnect material thus needs to be compliant to deal with the CTE mismatch. At present, nearly all flip-chip interconnects in electronic industries are made of lead-free Sn-based solders. Soft solders are chosen due to high ductility, low yield strength, relatively low melting temperature, and reasonably good electrical and thermal conductivities. In the never ending scaling down trend, more and more transistors are placed on the same Si chip size. This results in larger pin-out numbers and smaller solder joints. According to International Technology Roadmap for Semiconductors (ITRS), by 2018, the pitch in flip-chip interconnects will become smaller than 70mum for high performance applications. Two problems occur. The first is increase in shear strain. The aspect ratio of flip-chip joints is constrained to 0.7 because it goes through molten phase in the reflow process. Therefore, smaller joints become shorter as well, resulting in larger shear strain arising from CTE mismatch between Si chips and package substrates. The second is increase in stress in the joints. Since intermetallic (IMC) thickness in the joint does not scale down with joint size, ratio of IMC thickness to joint height increases. This further enlarges the shear stress because the IMC does not deform as the soft solder does to accommodate CTE mismatch. In this research, the smallest dimension we achieve for Ag flip chip interconnect joint is 15mum in diameter. The ten advantages of Ag flip chip interconnect technology can be identified as (a) High electrical conductivity, 7.7 times of that of Pb-free solders, (b) High thermal conductivity, 5.2 times of that of Pb-free solders, (c) Completely fluxless, (d) No IMCs; all reliability issues associated with IMC and IMC growth do not exist, (e) Ag is very ductile and can manage CTE mismatch between chips and packages, (f) Ag joints can sustain at very high operation temperature because Ag has high melting temperature of 961°C, (g) No molten phase involved; the bump can better keep its shape and geometry, (h) No molten phase involved; bridging of adjacent bumps is less likely to occur, i. Aspect ratio of bumps can be made greater than 1, (j) The size of the bumps is only limited by the lithographic process. Cu-Ag composite flip chip interconnect joints is developed based on three reasons. The first is lower material cost. The second is to strengthen the columns because the yield strength of Cu is 6 times of that of Ag. The third is to avoid possible Ag migration between Ag electrodes under voltage at temperatures above 250°C. This Cu-Ag composite design presents a solution in the path to the scale down roadmap.

Silver free III-nitride flip chip light-emitting-diode with wall plug efficiency over 70% utilizing a GaN tunnel junction

NASA Astrophysics Data System (ADS)

Yonkee, B. P.; Young, E. C.; DenBaars, S. P.; Nakamura, S.; Speck, J. S.

2016-11-01

A molecular beam epitaxy regrowth technique was demonstrated on standard industrial patterned sapphire substrate light-emitting diode (LED) epitaxial wafers emitting at 455 nm to form a GaN tunnel junction. By using an HF pretreatment on the wafers before regrowth, a voltage of 3.08 V at 20 A/cm2 was achieved on small area devices. A high extraction package was developed for comparison with flip chip devices which utilize an LED floating in silicone over a BaSO4 coated header and produced a peak external quantum efficiency (EQE) of 78%. A high reflectivity mirror was designed using a seven-layer dielectric coating backed by aluminum which has a calculated angular averaged reflectivity over 98% between 400 and 500 nm. This was utilized to fabricate a flip chip LED which had a peak EQE and wall plug efficiency of 76% and 73%, respectively. This flip chip could increase light extraction over a traditional flip chip LED due to the increased reflectivity of the dielectric based mirror.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

High-sensitivity low-noise miniature fluxgate magnetometers using a flip chip conceptual design.

PubMed

Lu, Chih-Cheng; Huang, Jeff; Chiu, Po-Kai; Chiu, Shih-Liang; Jeng, Jen-Tzong

2014-07-30

This paper presents a novel class of miniature fluxgate magnetometers fabricated on a print circuit board (PCB) substrate and electrically connected to each other similar to the current "flip chip" concept in semiconductor package. This sensor is soldered together by reversely flipping a 5 cm × 3 cm PCB substrate to the other identical one which includes dual magnetic cores, planar pick-up coils, and 3-D excitation coils constructed by planar Cu interconnections patterned on PCB substrates. Principles and analysis of the fluxgate sensor are introduced first, and followed by FEA electromagnetic modeling and simulation for the proposed sensor. Comprehensive characteristic experiments of the miniature fluxgate device exhibit favorable results in terms of sensitivity (or "responsivity" for magnetometers) and field noise spectrum. The sensor is driven and characterized by employing the improved second-harmonic detection technique that enables linear V-B correlation and responsivity verification. In addition, the double magnitude of responsivity measured under very low frequency (1 Hz) magnetic fields is experimentally demonstrated. As a result, the maximum responsivity of 593 V/T occurs at 50 kHz of excitation frequency with the second harmonic wave of excitation; however, the minimum magnetic field noise is found to be 0.05 nT/Hz(1/2) at 1 Hz under the same excitation. In comparison with other miniature planar fluxgates published to date, the fluxgate magnetic sensor with flip chip configuration offers advances in both device functionality and fabrication simplicity. More importantly, the novel design can be further extended to a silicon-based micro-fluxgate chip manufactured by emerging CMOS-MEMS technologies, thus enriching its potential range of applications in modern engineering and the consumer electronics market.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

A review on solder reflow and flux application for flip chip

NASA Astrophysics Data System (ADS)

Suppiah, Sarveshvaran; Ong, Nestor Rubio; Sauli, Zaliman; Sarukunaselan, Karunavani; Alcain, Jesselyn Barro; Visvanathan, Susthitha Menon; Retnasamy, Vithyacharan

2017-09-01

This paper encompassed of the evolution and key findings, critical technical challenges, solutions and bonding equipment of solder reflow in flip chip bonding. Upon scrutinizing researches done by others, it can be deduced that peak temperature, time above liquidus, soak temperature, soak time, cooling rate and reflow environment played a vital role in achieving the desired bonding profile. In addition, flux is also needed with the purpose of removing oxides/contaminations on bump surface as well as to promote wetting of solder balls. Electromigration and warpage are the two main challenges faced by solder reflow process which can be overcome by the advancement in under bump metallization (UBM) and substrate technology. The review is ended with a brief description of the current equipment used in solder reflow process.

Molded underfill (MUF) encapsulation for flip-chip package: A numerical investigation

NASA Astrophysics Data System (ADS)

Azmi, M. A.; Abdullah, M. K.; Abdullah, M. Z.; Ariff, Z. M.; Saad, Abdullah Aziz; Hamid, M. F.; Ismail, M. A.

2017-07-01

This paper presents the numerical simulation of epoxy molding compound (EMC) filling in multi flip-chip packages during encapsulation process. The empty and a group flip chip packages were considered in the mold cavity in order to study the flow profile of the EMC. SOLIDWORKS software was used for three-dimensional modeling and it was incorporated into fluid analysis software namely as ANSYS FLUENT. The volume of fluid (VOF) technique was used for capturing the flow front profiles and Power Law model was applied for its rheology model. The numerical result are compared and discussed with previous experimental and it was shown a good conformity for model validation. The prediction of flow front was observed and analyzed at different filling time. The possibility and visual of void formation in the package is captured and the number of flip-chip is one factor that contributed to the void formation.

Monolithic integration of a silica AWG and Ge photodiodes on Si photonic platform for one-chip WDM receiver.

PubMed

Nishi, Hidetaka; Tsuchizawa, Tai; Kou, Rai; Shinojima, Hiroyuki; Yamada, Takashi; Kimura, Hideaki; Ishikawa, Yasuhiko; Wada, Kazumi; Yamada, Koji

2012-04-09

On the silicon (Si) photonic platform, we monolithically integrated a silica-based arrayed-waveguide grating (AWG) and germanium (Ge) photodiodes (PDs) using low-temperature fabrication technology. We confirmed demultiplexing by the AWG, optical-electrical signal conversion by Ge PDs, and high-speed signal detection at all channels. In addition, we mounted a multichannel transimpedance amplifier/limiting amplifier (TIA/LA) circuit on the fabricated AWG-PD device using flip-chip bonding technology. The results show the promising potential of our Si photonic platform as a photonics-electronics convergence.

Thermal cycling reliability of Cu/SnAg double-bump flip chip assemblies for 100 μm pitch applications

NASA Astrophysics Data System (ADS)

Son, Ho-Young; Kim, Ilho; Lee, Soon-Bok; Jung, Gi-Jo; Park, Byung-Jin; Paik, Kyung-Wook

2009-01-01

A thick Cu column based double-bump flip chip structure is one of the promising alternatives for fine pitch flip chip applications. In this study, the thermal cycling (T/C) reliability of Cu/SnAg double-bump flip chip assemblies was investigated, and the failure mechanism was analyzed through the correlation of T/C test and the finite element analysis (FEA) results. After 1000 thermal cycles, T/C failures occurred at some Cu/SnAg bumps located at the edge and corner of chips. Scanning acoustic microscope analysis and scanning electron microscope observations indicated that the failure site was the Cu column/Si chip interface. It was identified by a FEA where the maximum stress concentration was located during T/C. During T/C, the Al pad between the Si chip and a Cu column bump was displaced due to thermomechanical stress. Based on the low cycle fatigue model, the accumulation of equivalent plastic strain resulted in thermal fatigue deformation of the Cu column bumps and ultimately reduced the thermal cycling lifetime. The maximum equivalent plastic strains of some bumps at the chip edge increased with an increased number of thermal cycles. However, equivalent plastic strains of the inner bumps did not increase regardless of the number of thermal cycles. In addition, the z-directional normal plastic strain ɛ22 was determined to be compressive and was a dominant component causing the plastic deformation of Cu/SnAg double bumps. As the number of thermal cycles increased, normal plastic strains in the perpendicular direction to the Si chip and shear strains were accumulated on the Cu column bumps at the chip edge at low temperature region. Thus it was found that the Al pad at the Si chip/Cu column interface underwent thermal fatigue deformation by compressive normal strain and the contact loss by displacement failure of the Al pad, the main T/C failure mode of the Cu/SnAg flip chip assembly, then occurred at the Si chip/Cu column interface shear strain deformation during T/C.

Evaluation of advanced microelectronic fluxless solder-bump contacts for hybrid microcircuits

NASA Technical Reports Server (NTRS)

Mandal, R. P.

1976-01-01

Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.

All-optical SR flip-flop based on SOA-MZI switches monolithically integrated on a generic InP platform

NASA Astrophysics Data System (ADS)

Pitris, St.; Vagionas, Ch.; Kanellos, G. T.; Kisacik, R.; Tekin, T.; Broeke, R.; Pleros, N.

2016-03-01

At the dawning of the exaflop era, High Performance Computers are foreseen to exploit integrated all-optical elements, to overcome the speed limitations imposed by electronic counterparts. Drawing from the well-known Memory Wall limitation, imposing a performance gap between processor and memory speeds, research has focused on developing ultra-fast latching devices and all-optical memory elements capable of delivering buffering and switching functionalities at unprecedented bit-rates. Following the master-slave configuration of electronic Flip-Flops, coupled SOA-MZI based switches have been theoretically investigated to exceed 40 Gb/s operation, provided a short coupling waveguide. However, this flip-flop architecture has been only hybridly integrated with silica-on-silicon integration technology exhibiting a total footprint of 45x12 mm2 and intra-Flip-Flop coupling waveguide of 2.5cm, limited at 5 Gb/s operation. Monolithic integration offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity towards, bearing promises for fast all-optical memories. Here, we present for the first time a monolithically integrated all-optical SR Flip-Flop with coupled master-slave SOA-MZI switches. The photonic chip is integrated on a 6x2 mm2 die as a part of a multi-project wafer run using library based components of a generic InP platform, fiber-pigtailed and fully packaged on a temperature controlled ceramic submount module with electrical contacts. The intra Flip-Flop coupling waveguide is 5 mm long, reducing the total footprint by two orders of magnitude. Successful flip flop functionality is evaluated at 10 Gb/s with clear open eye diagram, achieving error free operation with a power penalty of 4dB.

High reliable and chromaticity-tunable flip-chip w-LEDs with Ce:YAG glass-ceramics phosphor for long-lifetime automotive headlights applications

NASA Astrophysics Data System (ADS)

Ma, Chaoyang; Cao, Yongge; Shen, Xiaofei; Wen, Zicheng; Ma, Ran; Long, Jiaqi; Yuan, Xuanyi

2017-07-01

Nowadays, major commercial w-LEDs fabricated by the traditionally gold-wire-welding packaging technology have undergone considerable development as indoor/outdoor lighting sources due to its high-energy utilization efficiency, long service life, environmental friendliness, and excellent chromatic stability. While, new generation applications in projections, automotive lighting, street lighting, plaza lighting, and high-end general lighting need further improvements in power handling and light extraction. Herein, transparent Ce:YAG glass-ceramics (GCs) phosphor was prepared by low-temperature co-sintering polycrystalline Ce:YAG phosphor powder and home-made PbO-B2O3-ZnO-SiO2 glass powder. Thereafter, the flip-chip (FC) w-LEDs were fabricated with the GCs phosphor plates and FC blue chips. The GCs-based FC w-LEDs show not only excellent heat- and humidity-resistance characteristics, but also superior optical performances with an LE of 112.8 lm/W, a CRI of 71.2, a CCT of 6103 K as well as a chromaticity coordinate of (0.3202, 0.3298), under a high operation current of 400 mA. The technology route will open a practically commercial feasible approach to achieve excellent performances for advanced high-power FC w-LEDs.

Advanced Liquid-Free, Piezoresistive, SOI-Based Pressure Sensors for Measurements in Harsh Environments

PubMed Central

Ngo, Ha-Duong; Mukhopadhyay, Biswaijit; Ehrmann, Oswin; Lang, Klaus-Dieter

2015-01-01

In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a “one-sensor-one-packaging_technology” concept. The second one uses a standard flip-chip bonding technique. The first sensor is a “floating-concept”, capable of measuring pressures at temperatures up to 400 °C (constant load) with an accuracy of 0.25% Full Scale Output (FSO). A push rod (mounted onto the steel membrane) transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process). A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not “floating” but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA. PMID:26295235

Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

PubMed Central

Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

2013-01-01

A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes

NASA Technical Reports Server (NTRS)

Zheng, Xinyu; Pain, Bedabrata

2005-01-01

A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.

High-Sensitivity Low-Noise Miniature Fluxgate Magnetometers Using a Flip Chip Conceptual Design

PubMed Central

Lu, Chih-Cheng; Huang, Jeff; Chiu, Po-Kai; Chiu, Shih-Liang; Jeng, Jen-Tzong

2014-01-01

This paper presents a novel class of miniature fluxgate magnetometers fabricated on a print circuit board (PCB) substrate and electrically connected to each other similar to the current “flip chip” concept in semiconductor package. This sensor is soldered together by reversely flipping a 5 cm × 3 cm PCB substrate to the other identical one which includes dual magnetic cores, planar pick-up coils, and 3-D excitation coils constructed by planar Cu interconnections patterned on PCB substrates. Principles and analysis of the fluxgate sensor are introduced first, and followed by FEA electromagnetic modeling and simulation for the proposed sensor. Comprehensive characteristic experiments of the miniature fluxgate device exhibit favorable results in terms of sensitivity (or “responsivity” for magnetometers) and field noise spectrum. The sensor is driven and characterized by employing the improved second-harmonic detection technique that enables linear V-B correlation and responsivity verification. In addition, the double magnitude of responsivity measured under very low frequency (1 Hz) magnetic fields is experimentally demonstrated. As a result, the maximum responsivity of 593 V/T occurs at 50 kHz of excitation frequency with the second harmonic wave of excitation; however, the minimum magnetic field noise is found to be 0.05 nT/Hz1/2 at 1 Hz under the same excitation. In comparison with other miniature planar fluxgates published to date, the fluxgate magnetic sensor with flip chip configuration offers advances in both device functionality and fabrication simplicity. More importantly, the novel design can be further extended to a silicon-based micro-fluxgate chip manufactured by emerging CMOS-MEMS technologies, thus enriching its potential range of applications in modern engineering and the consumer electronics market. PMID:25196107

Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

NASA Astrophysics Data System (ADS)

Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

2011-12-01

A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

CSP Manufacturing Challenges and Assembly Reliability

NASA Technical Reports Server (NTRS)

Ghaffarian, Reza

2000-01-01

Although the expression of CSP is widely used by industry from suppliers to users, its implied definition had evolved as the technology has matured. There are "expert definition"- package that is up to 1.5 time die- or "interim definition". CSPs are miniature new packages that industry is starting to implement and there are many unresolved technical issues associated with their implementation. For example, in early 1997, packages with 1 mm pitch and lower were the dominant CSPs, whereas in early 1998 packages with 0.8 mm and lower became the norm for CSPs. Other changes included the use of flip chip die rather than wire bond in CSP. Nonetheless the emerging CSPs are competing with bare die assemblies and are becoming the package of choice for size reduction applications. These packages provide the benefits of small size and performance of the bare die or flip chip, with the advantage of standard die packages. The JPL-led MicrotypeBGA Consortium of enterprises representing government agencies and private companies have jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects. This talk will cover specifically the experience of our consortium on technology implementation challenges, including design and build of both standard and microvia boards, assembly of two types of test vehicles, and the most current environmental thermal cycling test results.

Pressure-Sensor Assembly Technique

NASA Technical Reports Server (NTRS)

Pruzan, Daniel A.

2003-01-01

Nielsen Engineering & Research (NEAR) recently developed an ultrathin data acquisition system for use in turbomachinery testing at NASA Glenn Research Center. This system integrates a microelectromechanical- systems- (MEMS-) based absolute pressure sensor [0 to 50 psia (0 to 345 kPa)], temperature sensor, signal-conditioning application-specific integrated circuit (ASIC), microprocessor, and digital memory into a package which is roughly 2.8 in. (7.1 cm) long by 0.75 in. (1.9 cm) wide. Each of these components is flip-chip attached to a thin, flexible circuit board and subsequently ground and polished to achieve a total system thickness of 0.006 in. (0.15 mm). Because this instrument is so thin, it can be quickly adhered to any surface of interest where data can be collected without disrupting the flow being investigated. One issue in the development of the ultrathin data acquisition system was how to attach the MEMS pressure sensor to the circuit board in a manner which allowed the sensor s diaphragm to communicate with the ambient fluid while providing enough support for the chip to survive the grinding and polishing operations. The technique, developed by NEAR and Jabil Technology Services Group (San Jose, CA), is described below. In the approach developed, the sensor is attached to the specially designed circuit board, see Figure 1, using a modified flip-chip technique. The circular diaphragm on the left side of the sensor is used to actively measure the ambient pressure, while the diaphragm on the right is used to compensate for changes in output due to temperature variations. The circuit board is fabricated with an access hole through it so that when the completed system is installed onto a wind tunnel model (chip side down), the active diaphragm is exposed to the environment. After the sensor is flip-chip attached to the circuit board, the die is underfilled to support the chip during the subsequent grinding and polishing operations. To prevent this underfill material from getting onto the sensor s diaphragms, the circuit board is fabricated with two 25- micrometer-tall polymer rings, sized so that the diaphragms fit inside the rings once the chip is attached.

New Failure Mode of Flip-Chip Solder Joints Related to the Metallization of an Organic Substrate

NASA Astrophysics Data System (ADS)

Jang, J. W.; Yoo, S. J.; Hwang, H. I.; Yuk, S. Y.; Kim, C. K.; Kim, S. J.; Han, J. S.; An, S. H.

2015-10-01

We report a new failure phenomenon during flip-chip die attach. After reflow, flip-chip bumps were separated between the Al and Ti layers on the Si die side. This was mainly observed at the Si die corner. Transmission electron microscopy images revealed corrosion of the Al layer at the edge of the solder bump metallization. The corrosion at the metallization edge exhibited a notch shape with high stress concentration factor. The organic substrate had Cu metallization with an organic solderable preservative (OSP) coating layer, where a small amount of Cl ions were detected. A solder bump separation mechanism is suggested based on the reaction between Al and Cl, related to the flow of soldering flux. During reflow, the flux will dissolve the Cl-containing OSP layer and flow up to the Al layer on the Si die side. Then, the Cl-dissolved flux will actively react with Al, forming AlCl3. During cooling, solder bumps at the Si die corner will separate through the location of Al corrosion. This demonstrated that the chemistry of the substrate metallization can affect the thermomechanical reliability of flip-chip solder joints.

3D integrated superconducting qubits

NASA Astrophysics Data System (ADS)

Rosenberg, D.; Kim, D.; Das, R.; Yost, D.; Gustavsson, S.; Hover, D.; Krantz, P.; Melville, A.; Racz, L.; Samach, G. O.; Weber, S. J.; Yan, F.; Yoder, J. L.; Kerman, A. J.; Oliver, W. D.

2017-10-01

As the field of quantum computing advances from the few-qubit stage to larger-scale processors, qubit addressability and extensibility will necessitate the use of 3D integration and packaging. While 3D integration is well-developed for commercial electronics, relatively little work has been performed to determine its compatibility with high-coherence solid-state qubits. Of particular concern, qubit coherence times can be suppressed by the requisite processing steps and close proximity of another chip. In this work, we use a flip-chip process to bond a chip with superconducting flux qubits to another chip containing structures for qubit readout and control. We demonstrate that high qubit coherence (T1, T2,echo > 20 μs) is maintained in a flip-chip geometry in the presence of galvanic, capacitive, and inductive coupling between the chips.

Electromigration and thermomigration in lead-free tin-silver-copper and eutectic tin-lead flip chip solder joints

NASA Astrophysics Data System (ADS)

Ou Yang, Fan-Yi

Phase separation and microstructure change of eutectic SnPb and SnAgCu flip chip solder joint were investigated under thermomigration, electromigration, stressmigration and the combination of these effects. Different morphological behaviors under DC and AC electromigration were seen. Phase separation with Pb rich phase migration to the anode was observed when current density is below 1.6 x 104 A/cm2 at 100°C. For some cases, phase separation of Pb-rich phase and Su-rich phase as well as refinement of lamellar microstructure has also been observed. We propose that the refinement is due to recrystallization. On the other hand, time-dependent melting of eutectic SnPb flip chip solder joints has been observed to occur frequently with current density above 1.6 x 104 A/cm 2at 100°C. It has been found that it is due to joule heating of the on-chip Al interconnects. We found that electromigration has especially generated voids at the anode of the Al. This damage has greatly increased the resistance of the Al, which produces the heat needed to melt the solder joint. Owing to the line-to-bump configuration in flip chip solder joints, current crowding occurs when electrons enters into or exits from the solder bump. At the cathode contact, current crowding induced pancake-type void formation was observed widely. Furthermore, at the anode contact, we note that hillock or whisker forms. The cross-sectioned surface in SnPb showed dimple and bulge after electromigration, while that of SnAgCu remained flat. The difference is due to a larger back stress in the SnAgCu, consequently electromigration in SnAgCu is slower than that in SnPb. For thermomigration in eutectic SnPb flip chip solder joints, phase separation of Sn and Pb occurred, with Pb moving to the cold end. Both Sn and Pb have a stepwise concentration profile across solder bump. Refinement of lamellar microstructure was observed, indicating recrystallization. Also, thermomigration in eutectic SnAgCu flip chip solder joint were presented. It seems that vacancy flux plays a dominant role in thermomigration in Pb-free solder bumps; voids formed on the cold end and Sn moved to the hot end.

Evaluation of the thermal conductance of flip-chip bonding structure utilizing the measurement based on Fourier's law of heat conduction at steady-state

NASA Astrophysics Data System (ADS)

Wu, Chia-Yu; Huang, Yin-Hsien; Wu, Hsin-Han; Hsieh, Tsung-Eong

2018-06-01

Fourier's law of heat conduction at steady-state was adopted to establish a measurement method utilizing platinum (Pt) thin-film electrodes as the heater and the temperature sensor. The thermal conductivities (κ's) of Pyrex glass, an epoxy resin and a commercial underfill for flip-chip devices were measured and a good agreement with previously reported values was obtained. The thermal boundary resistances (RTBR's) of Pt/sample interfaces were also extracted for discussing their influence on the thermal conduction of samples. Afterward, the flip-chip samples with 2×2 solder joint array utilizing Si wafers as the die and the substrate, without and with the underfills, were prepared and their thermal conductance were measured. For the sample without underfill, the air presenting in the gap of die and the substrate led to the poor thermal conductance of sample. With the insertion of underfills, the thermal conductance of flip-chip samples improved. The resistance to heat transfer across Si/underfill interfaces was also suppressed and to promote the thermal conductance of samples. The thermal properties of underfill and RTBR at Si/underfill interface were further implanted in the calculation of thermal conductance of flip-chip samples containing various solder joint arrays. The increasing number of solder joints diminished the influence of thermal conduction of underfill and RTBR of Si/underfill interface on the thermal conductance of samples. The insertion of underfill with high-κ value might promote the heat conductance of samples containing low-density solder joint arrays; however, it became insignificant in improving the heat conductance of samples containing high-density solder joint arrays.

Flip-chip integration of tilted VCSELs onto a silicon photonic integrated circuit.

PubMed

Lu, Huihui; Lee, Jun Su; Zhao, Yan; Scarcella, Carmelo; Cardile, Paolo; Daly, Aidan; Ortsiefer, Markus; Carroll, Lee; O'Brien, Peter

2016-07-25

In this article we describe a cost-effective approach for hybrid laser integration, in which vertical cavity surface emitting lasers (VCSELs) are passively-aligned and flip-chip bonded to a Si photonic integrated circuit (PIC), with a tilt-angle optimized for optical-insertion into standard grating-couplers. A tilt-angle of 10° is achieved by controlling the reflow of the solder ball deposition used for the electrical-contacting and mechanical-bonding of the VCSEL to the PIC. After flip-chip integration, the VCSEL-to-PIC insertion loss is -11.8 dB, indicating an excess coupling penalty of -5.9 dB, compared to Fibre-to-PIC coupling. Finite difference time domain simulations indicate that the penalty arises from the relatively poor match between the VCSEL mode and the grating-coupler.

A novel model for simulating the racing effect in capillary-driven underfill process in flip chip

NASA Astrophysics Data System (ADS)

Zhu, Wenhui; Wang, Kanglun; Wang, Yan

2018-04-01

Underfill is typically applied in flip chips to increase the reliability of the electronic packagings. In this paper, the evolution of the melt-front shape of the capillary-driven underfill flow is studied through 3D numerical analysis. Two different models, the prevailing surface force model and the capillary model based on the wetted wall boundary condition, are introduced to test their applicability, where level set method is used to track the interface of the two phase flow. The comparison between the simulation results and experimental data indicates that, the surface force model produces better prediction on the melt-front shape, especially in the central area of the flip chip. Nevertheless, the two above models cannot simulate properly the racing effect phenomenon that appears during underfill encapsulation. A novel ‘dynamic pressure boundary condition’ method is proposed based on the validated surface force model. Utilizing this approach, the racing effect phenomenon is simulated with high precision. In addition, a linear relationship is derived from this model between the flow front location at the edge of the flip chip and the filling time. Using the proposed approach, the impact of the underfill-dispensing length on the melt-front shape is also studied.

Ten-channel InP-based large-scale photonic integrated transmitter fabricated by SAG technology

NASA Astrophysics Data System (ADS)

Zhang, Can; Zhu, Hongliang; Liang, Song; Cui, Xiao; Wang, Huitao; Zhao, Lingjuan; Wang, Wei

2014-12-01

A 10-channel InP-based large-scale photonic integrated transmitter was fabricated by selective area growth (SAG) technology combined with butt-joint regrowth (BJR) technology. The SAG technology was utilized to fabricate the electroabsorption modulated distributed feedback (DFB) laser (EML) arrays at the same time. The design of coplanar electrodes for electroabsorption modulator (EAM) was used for the flip-chip bonding package. The lasing wavelength of DFB laser could be tuned by the integrated micro-heater to match the ITU grids, which only needs one electrode pad. The average output power of each channel is 250 μW with an injection current of 200 mA. The static extinction ratios of the EAMs for 10 channels tested are ranged from 15 to 27 dB with a reverse bias of 6 V. The frequencies of 3 dB bandwidth of the chip for each channel are around 14 GHz. The novel design and simple fabrication process show its enormous potential in reducing the cost of large-scale photonic integrated circuit (LS-PIC) transmitter with high chip yields.

Chip-scale white flip-chip light-emitting diode containing indium phosphide/zinc selenide quantum dots

NASA Astrophysics Data System (ADS)

Fan, Bingfeng; Yan, Linchao; Lao, Yuqin; Ma, Yanfei; Chen, Zimin; Ma, Xuejin; Zhuo, Yi; Pei, Yanli; Wang, Gang

2017-08-01

A method for preparing a quantum dot (QD)-white light-emitting diode (WLED) is reported. Holes were etched in the SiO2 layer deposited on the sapphire substrate of the flip-chip LED by inductively coupled plasma, and these holes were then filled with QDs. An ultraviolet-curable resin was then spin-coated on top of the QD-containing SiO2 layer, and the resin was cured to act as a protecting layer. The reflective sidewall structure minimized sidelight leakage. The fabrication of the QD-WLED is simple in preparation and compatible with traditional LED processes, which was the minimum size of the WLED chip-scale integrated package. InP/ZnS core-shell QDs were used as the converter in the WLED. A blue light-emitting diode with a flip-chip structure was used as the excitation source. The QD-WLED exhibited color temperatures from 5900 to 6400 K and Commission Internationale De L'Elcairage color coordinates from (0.315, 0.325) to (0.325, 0.317), under drive currents from 100 to 400 mA. The QD-WLED exhibited stable optoelectronic properties.

Decapsulation Method for Flip Chips with Ceramics in Microelectronic Packaging

NASA Astrophysics Data System (ADS)

Shih, T. I.; Duh, J. G.

2008-06-01

The decapsulation of flip chips bonded to ceramic substrates is a challenging task in the packaging industry owing to the vulnerability of the chip surface during the process. In conventional methods, such as manual grinding and polishing, the solder bumps are easily damaged during the removal of underfill, and the thin chip may even be crushed due to mechanical stress. An efficient and reliable decapsulation method consisting of thermal and chemical processes was developed in this study. The surface quality of chips after solder removal is satisfactory for the existing solder rework procedure as well as for die-level failure analysis. The innovative processes included heat-sink and ceramic substrate removal, solder bump separation, and solder residue cleaning from the chip surface. In the last stage, particular temperatures were selected for the removal of eutectic Pb-Sn, high-lead, and lead-free solders considering their respective melting points.

Electromigration induced high fraction of compound formation in SnAgCu flip chip solder joints with copper column

NASA Astrophysics Data System (ADS)

Xu, Luhua; Han, Jung-Kyu; Liang, Jarrett Jun; Tu, K. N.; Lai, Yi-Shao

2008-06-01

To overcome the effect of current crowding on electromigration-induced pancake-type void formation in flip chip solder joints, two types of Cu column in 90μm flip chip SnAgCu solder joints have been studied. They were (1) the solder contacts the Cu column at bottom and side walls and (2) the solder wets only the bottom surface of the copper column. With a current density of 1.6×104A/cm2 at 135°C, no failure was detected after 1290h. However, the resistance increased by about 10% due to the formation of a large fraction of intermetallic compounds. We found that electromigration has accelerated the consumption rate of copper column and converted almost the entire solder joint into intermetallic compound. Mechanically, drop impact test indicates a brittle fracture failure in the intermetallic. The electromigration critical product for the intermetallic is discussed.

276 nm Substrate-Free Flip-Chip AlGaN Light-Emitting Diodes

NASA Astrophysics Data System (ADS)

Hwang, Seongmo; Morgan, Daniel; Kesler, Amanda; Lachab, Mohamed; Zhang, Bin; Heidari, Ahmad; Nazir, Haseeb; Ahmad, Iftikhar; Dion, Joe; Fareed, Qhalid; Adivarahan, Vinod; Islam, Monirul; Khan, Asif

2011-03-01

Lateral-conduction, substrate-free flip-chip (SFFC) light-emitting diodes (LEDs) with peak emission at 276 nm are demonstrated for the first time. The AlGaN multiple quantum well LED structures were grown by metal-organic chemical vapor deposition (MOCVD) on thick-AlN laterally overgrown on sapphire substrates. To fabricate the SFFC LEDs, a newly-developed laser-assisted ablation process was employed to separate the substrate from the LED chips. The chips had physical dimensions of 1100×900 µm2, and were comprised of four devices each with a 100×100 µm2 junction area. Electrical and optical characterization of the devices revealed no noticeable degradation to their performance due to the laser-lift-off process.

Phosphor-Free InGaN White Light Emitting Diodes Using Flip-Chip Technology

PubMed Central

Li, Ying-Chang; Chang, Liann-Be; Chen, Hou-Jen; Yen, Chia-Yi; Pan, Ke-Wei; Huang, Bohr-Ran; Kuo, Wen-Yu; Chow, Lee; Zhou, Dan; Popko, Ewa

2017-01-01

Monolithic phosphor-free two-color gallium nitride (GaN)-based white light emitting diodes (LED) have the potential to replace current phosphor-based GaN white LEDs due to their low cost and long life cycle. Unfortunately, the growth of high indium content indium gallium nitride (InGaN)/GaN quantum dot and reported LED’s color rendering index (CRI) are still problematic. Here, we use flip-chip technology to fabricate an upside down monolithic two-color phosphor-free LED with four grown layers of high indium quantum dots on top of the three grown layers of lower indium quantum wells separated by a GaN tunneling barrier layer. The photoluminescence (PL) and electroluminescence (EL) spectra of this white LED reveal a broad spectrum ranging from 475 to 675 nm which is close to an ideal white-light source. The corresponding color temperature and color rendering index (CRI) of the fabricated white LED, operated at 350, 500, and 750 mA, are comparable to that of the conventional phosphor-based LEDs. Insights of the epitaxial structure and the transport mechanism were revealed through the TEM and temperature dependent PL and EL measurements. Our results show true potential in the Epi-ready GaN white LEDs for future solid state lighting applications. PMID:28772792

Preparation of a YAG:Ce phosphor glass by screen-printing technology and its application in LED packaging.

PubMed

Yang, Liang; Chen, Mingxiang; Lv, Zhicheng; Wang, Simin; Liu, Xiaogang; Liu, Sheng

2013-07-01

A simple and practical method for preparing phosphor glass is proposed. Phosphor distribution and element analysis are investigated by optical microscope and field emission scanning electron microscope (FE-SEM). The phosphor particles dispersed in the matrix are vividly observed, and their distributions are uniform. Spectrum distribution and color coordinates dependent on the thickness of the screen-printed phosphor layer coupled with a blue light emitting diode (LED) chip are studied. The luminous efficacy of the 75 μm printed phosphor-layer phosphor glass packaged white LED is 81.24 lm/W at 350 mA. This study opens up many possibilities for applications using the phosphor glass on a selected chip in which emission is well absorbed by all phosphors. The screen-printing technique also offers possibilities for the design and engineering of complex phosphor layers on glass substrates. Phosphor screen-printing technology allows the realization of high stability and thermal conductivity for the phosphor layer. This phosphor glass method provides many possibilities for LED packing, including thin-film flip chip and remote phosphor technology.

Low temperature co-fired ceramic packaging of CMOS capacitive sensor chip towards cell viability monitoring.

PubMed

Halonen, Niina; Kilpijärvi, Joni; Sobocinski, Maciej; Datta-Chaudhuri, Timir; Hassinen, Antti; Prakash, Someshekar B; Möller, Peter; Abshire, Pamela; Kellokumpu, Sakari; Lloyd Spetz, Anita

2016-01-01

Cell viability monitoring is an important part of biosafety evaluation for the detection of toxic effects on cells caused by nanomaterials, preferably by label-free, noninvasive, fast, and cost effective methods. These requirements can be met by monitoring cell viability with a capacitance-sensing integrated circuit (IC) microchip. The capacitance provides a measurement of the surface attachment of adherent cells as an indication of their health status. However, the moist, warm, and corrosive biological environment requires reliable packaging of the sensor chip. In this work, a second generation of low temperature co-fired ceramic (LTCC) technology was combined with flip-chip bonding to provide a durable package compatible with cell culture. The LTCC-packaged sensor chip was integrated with a printed circuit board, data acquisition device, and measurement-controlling software. The packaged sensor chip functioned well in the presence of cell medium and cells, with output voltages depending on the medium above the capacitors. Moreover, the manufacturing of microfluidic channels in the LTCC package was demonstrated.

Spatial redistribution of radiation in flip-chip photodiodes based on InAsSbP/InAs double heterostructures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zakgeim, A. L.; Il’inskaya, N. D.; Karandashev, S. A.

2017-02-15

The spatial distribution of equilibrium and nonequilibrium (including luminescent) IR (infrared) radiation in flip-chip photodiodes based on InAsSbP/InAs double heterostructures (λ{sub max} = 3.4 μm) is measured and analyzed; the structural features of the photodiodes, including the reflective properties of the ohmic contacts, are taken into account. Optical area enhancement due to multiple internal reflection in photodiodes with different geometric characteristics is estimated.

Flip Chip Bonding of 68 x 68 MWIR LED Arrays

DTIC Science & Technology

2009-01-01

transmission of IR light through GaSb material varies between 5%–30% and depends on the type of substrate dopants (n- or p-type). Hence, for bottom...emission regions (8.9/16 monolayer’s (ml) InAs/GaSb) separated by (n InAs/GaSb super lattice grade)/(p+ GaSb) tunnel junctions. Graded super lattices were...flip chip bonding process. Besides four corner LED test pads, there are 296 bonding pads in the CMOS driver to bias each LED pixel independently. The

Surface and buried interfacial structures of epoxy resins used as underfills studied by sum frequency generation vibrational spectroscopy.

PubMed

Vázquez, Anne V; Holden, Brad; Kristalyn, Cornelius; Fuller, Mike; Wilkerson, Brett; Chen, Zhan

2011-05-01

Flip chip technology has greatly improved the performance of semiconductor devices, but relies heavily on the performance of epoxy underfill adhesives. Because epoxy underfills are cured in situ in flip chip semiconductor devices, understanding their surface and interfacial structures is critical for understanding their adhesion to various substrates. Here, sum frequency generation (SFG) vibrational spectroscopy was used to study surface and buried interfacial structures of two model epoxy resins used as underfills in flip chip devices, bisphenol A digylcidyl ether (BADGE) and 1,4-butanediol diglycidyl ether (BDDGE). The surface structures of these epoxies were compared before and after cure, and the orientations of their surface functional groups were deduced to understand how surface structural changes during cure may affect adhesion properties. Further, the effect of moisture exposure, a known cause of adhesion failure, on surface structures was studied. It was found that the BADGE surface significantly restructured upon moisture exposure while the BDDGE surface did not, showing that BADGE adhesives may be more prone to moisture-induced delamination. Lastly, although surface structure can give some insight into adhesion, buried interfacial structures more directly correspond to adhesion properties of polymers. SFG was used to study buried interfaces between deuterated polystyrene (d-PS) and the epoxies before and after moisture exposure. It was shown that moisture exposure acted to disorder the buried interfaces, most likely due to swelling. These results correlated with lap shear adhesion testing showing a decrease in adhesion strength after moisture exposure. The presented work showed that surface and interfacial structures can be correlated to adhesive strength and may be helpful in understanding and designing optimized epoxy underfill adhesives.

Flip-chip replacement within the constraints imposed by multilayer ceramic (MLC) modules

NASA Astrophysics Data System (ADS)

Puttlitz, Karl J.

1984-01-01

Economics often dictates that suitable module rework procedures be established to replace solder bump devices (flip chips) reflowed to multichip carriers. These operations are complicated, owing to various constraints such as the substrate's physical and mechanical properties, close proximity of surface features, etc. This paper describes the constraints and the methods to circumvent them. An order of preference based upon the degree of constraint is recommended to achieve device removal and subsequent site dress of the residual solder left on the substrate. It has been determined that rework (device replacement) can be successfully achieved in even highly constricted situations. This is illustrated by the example of utilizing a localized heating technique, hot gas, to remove solder from microsockets from which chips were previously removed. Microsockets are areas to which chips are reflowed to the top surface of IBM's densely populated multilayer ceramic (MLC) modules, thus forming the so-called controlled collapse chip connection or C-4. The microsocket patterns are thus identical to the chip footprint.

Development of advanced micromirror arrays by flip-chip assembly

NASA Astrophysics Data System (ADS)

Michalicek, M. Adrian; Bright, Victor M.

2001-10-01

This paper presents the design, commercial prefabrication, modeling and testing of advanced micromirror arrays fabricated using a novel, simple and inexpensive flip-chip assembly technique. Several polar piston arrays and rectangular cantilever arrays were fabricated using flip-chip assembly by which the upper layers of the array are fabricated on a separate chip and then transferred to a receiving module containing the lower layers. Typical polar piston arrays boast 98.3% active surface area, highly planarized surfaces, low address potentials compatible with CMOS electronics, highly standardized actuation between devices, and complex segmentation of mirror surfaces which allows for custom aberration configurations. Typical cantilever arrays boast large angles of rotation as well as an average surface planarity of only 1.779 nm of RMS roughness across 100 +m mirrors. Continuous torsion devices offer stable operation through as much as six degrees of rotation while binary operation devices offer stable activated positions with as much as 20 degrees of rotation. All arrays have desirable features of costly fabrication services like five structural layers and planarized mirror surfaces, but are prefabricated in the less costly MUMPs process. Models are developed for all devices and used to compare empirical data.

Light-extraction enhancement of GaN-based 395  nm flip-chip light-emitting diodes by an Al-doped ITO transparent conductive electrode.

PubMed

Xu, Jin; Zhang, Wei; Peng, Meng; Dai, Jiangnan; Chen, Changqing

2018-06-01

The distinct ultraviolet (UV) light absorption of indium tin oxide (ITO) limits the performance of GaN-based near-UV light-emitting diodes (LEDs). Herein, we report an Al-doped ITO with enhanced UV transmittance and low sheet resistance as the transparent conductive electrode for GaN-based 395 nm flip-chip near-UV LEDs. The thickness dependence of optical and electrical properties of Al-doped ITO films is investigated. The optimal Al-doped ITO film exhibited a transmittance of 93.2% at 395 nm and an average sheet resistance of 30.1  Ω/sq. Meanwhile, at an injection current of 300 mA, the forward voltage decreased from 3.14 to 3.11 V, and the light output power increased by 13% for the 395 nm near-UV flip-chip LEDs with the optimal Al-doped ITO over those with pure ITO. This Letter provides a simple and repeatable approach to further improve the light extraction efficiency of GaN-based near-UV LEDs.

Electromigration in solder joints and solder lines

NASA Astrophysics Data System (ADS)

Gan, H.; Choi, W. J.; Xu, G.; Tu, K. N.

2002-06-01

Electromigration may affect the reliability of flip-chip solder joints. Eutectic solder is a two-phase alloy, so its electromigration behavior is different from that in aluminum or copper interconnects. In addition, a flipchip solder joint has a built-in currentcrowding configuration to enhance electromigration failure. To better understand electromigration in SnPb and lead-free solder alloys, the authors prepared solder lines in v-grooves etched on Si (001). This article discusses the results of those tests and compares the electromigration failure modes of eutectic SnPb and SnAgCu flip-chip solder joints along with the mean-timeto-failure.

32 x 16 CMOS smart pixel array for optical interconnects

NASA Astrophysics Data System (ADS)

Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

2000-05-01

Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

Quantifying the benefits of improved rolling of chip seals : final report, June 2008.

DOT National Transportation Integrated Search

2008-06-01

This report presents an improvement in the rolling protocol for chip seals based on an evaluation of aggregate : retention performance and aggregate embedment depth. The flip-over test (FOT), Vialit test, modified sand circle : test, digital image pr...

Vertical integration of array-type miniature interferometers at wafer level by using multistack anodic bonding

NASA Astrophysics Data System (ADS)

Wang, Wei-Shan; Wiemer, Maik; Froemel, Joerg; Enderlein, Tom; Gessner, Thomas; Lullin, Justine; Bargiel, Sylwester; Passilly, Nicolas; Albero, Jorge; Gorecki, Christophe

2016-04-01

In this work, vertical integration of miniaturized array-type Mirau interferometers at wafer level by using multi-stack anodic bonding is presented. Mirau interferometer is suitable for MEMS metrology and for medical imaging according to its vertical-, lateral- resolutions and working distances. Miniaturized Mirau interferometer can be a promising candidate as a key component of an optical coherence tomography (OCT) system. The miniaturized array-type interferometer consists of a microlens doublet, a Si-based MEMS Z scanner, a spacer for focus-adjustment and a beam splitter. Therefore, bonding technologies which are suitable for heterogeneous substrates are of high interest and necessary for the integration of MEMS/MOEMS devices. Multi-stack anodic bonding, which meets the optical and mechanical requirements of the MOEMS device, is adopted to integrate the array-type interferometers. First, the spacer and the beam splitter are bonded, followed by bonding of the MEMS Z scanner. In the meanwhile, two microlenses, which are composed of Si and glass wafers, are anodically bonded to form a microlens doublet. Then, the microlens doublet is aligned and bonded with the scanner/spacer/beam splitter stack. The bonded array-type interferometer is a 7- wafer stack and the thickness is approximately 5mm. To separate such a thick wafer stack with various substrates, 2-step laser cutting is used to dice the bonded stack into Mirau chips. To simplify fabrication process of each component, electrical connections are created at the last step by mounting a Mirau chip onto a flip chip PCB instead of through wafer vias. Stability of Au/Ti films on the MEMS Z scanner after anodic bonding, laser cutting and flip chip bonding are discussed as well.

Mean-time-to-failure study of flip chip solder joints on Cu/Ni(V)/Al thin-film under-bump-metallization

NASA Astrophysics Data System (ADS)

Choi, W. J.; Yeh, E. C. C.; Tu, K. N.

2003-11-01

Electromigration of eutectic SnPb flip chip solder joints and their mean-time-to-failure (MTTF) have been studied in the temperature range of 100 to 140 °C with current densities of 1.9 to 2.75×104 A/cm2. In these joints, the under-bump-metallization (UBM) on the chip side is a multilayer thin film of Al/Ni(V)/Cu, and the metallic bond-pad on the substrate side is a very thick, electroless Ni layer covered with 30 nm of Au. When stressed at the higher current densities, the MTTF was found to decrease much faster than what is expected from the published Black's equation. The failure occurred by interfacial void propagation at the cathode side, and it is due to current crowding near the contact interface between the solder bump and the thin-film UBM. The current crowding is confirmed by a simulation of current distribution in the solder joint. Besides the interfacial void formation, the intermetallic compounds formed on the UBM as well as the Ni(V) film in the UBM have been found to dissolve completely into the solder bump during electromigration. Therefore, the electromigation failure is a combination of the interfacial void formation and the loss of UBM. Similar findings in eutectic SnAgCu flip chip solder joints have also been obtained and compared.

Embeded photonic crystal at the interface of p-GaN and Ag reflector to improve light extraction of GaN-based flip-chip light-emitting diode

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhen, Aigong; Ma, Ping, E-mail: maping@semi.ac.cn; Zhang, Yonghui

2014-12-22

In this experiment, a flip-chip light-emitting diode with photonic crystal was fabricated at the interface of p-GaN and Ag reflector via nanospheres lithography technique. In this structure, photonic crystal could couple with the guide-light efficiently by reason of the little distance between photonic crystal and active region. The light output power of light emitting diode with embedded photonic crystal was 1.42 times larger than that of planar flip-chip light-emitting diode. Moreover, the embedded photonic crystal structure makes the far-field divergence angle decreased by 18° without spectra shift. The three-dimensional finite difference time domain simulation results show that photonic crystal couldmore » improve the light extraction, and enhance the light absorption caused by Ag reflector simultaneously, because of the roughed surface. The depth of photonic crystal is the key parameter affecting the light extraction and absorption. Light extraction efficiency increases with the depth photonic crystal structure rapidly, and reaches the maximum at the depth 80 nm, beyond which light extraction decrease drastically.« less

Cell Patterning Chip for Controlling the Stem Cell Microenvironment

PubMed Central

Rosenthal, Adam; Macdonald, Alice; Voldman, Joel

2007-01-01

Cell-cell signaling is an important component of the stem cell microenvironment, affecting both differentiation and self-renewal. However, traditional cell-culture techniques do not provide precise control over cell-cell interactions, while existing cell patterning technologies are limited when used with proliferating or motile cells. To address these limitations, we created the Bio Flip Chip (BFC), a microfabricated polymer chip containing thousands of microwells, each sized to trap down to a single stem cell. We have demonstrated the functionality of the BFC by patterning a 50×50 grid of murine embryonic stem cells (mESCs), with patterning efficiencies > 75%, onto a variety of substrates – a cell-culture dish patterned with gelatin, a 3-D substrate, and even another layer of cells. We also used the BFC to pattern small groups of cells, with and without cell-cell contact, allowing incremental and independent control of contact-mediated signaling. We present quantitative evidence that cell-cell contact plays an important role in depressing mESC colony formation, and show that E-cadherin is involved in this negative regulatory pathway. Thus, by allowing exquisite control of the cellular microenvironment, we provide a technology that enables new applications in tissue engineering and regenerative medicine. PMID:17434582

Improved light extraction efficiency of GaN-based flip-chip light-emitting diodes with an antireflective interface layer

NASA Astrophysics Data System (ADS)

Wu, Dongxue; Ma, Ping; Liu, Boting; Zhang, Shuo; Wang, Junxi; Li, Jinmin

2016-05-01

GaN-based flip-chip light-emitting diodes (FC-LEDs) grown on nanopatterned sapphire substrates (NPSS) are fabricated using self-assembled SiO2 nanospheres as masks during inductively coupled plasma etching. By controlling the pattern spacing, epitaxial GaN can be grown from the top or bottom of patterns to obtain two different GaN/substrate interfaces. The optoelectronic characteristics of FC-LED chips with different GaN/sapphire interfaces are studied. The FC-LED with an antireflective interface layer consisting of a NPSS with GaN in the pattern spacings demonstrates better optical properties than the FC-LED with an interface embedded with air voids. Our study indicates that the two types of FC-LEDs grown on NPSS show higher crystal quality and improved electrical and optical characteristics compared with those of FC-LEDs grown on conventional planar sapphire substrates.

Development of non-destructive evaluation system using an HTS-SQUID gradiometer for magnetized materials

NASA Astrophysics Data System (ADS)

Kawano, J.; Tsukamoto, A.; Adachi, S.; Oshikubo, Y.; Hato, T.; Tanabe, K.; Okamura, T.

We have developed a new eddy-current non-destructive evaluation (NDE) system using an HTS SQUID gradiometer with the aim of applying it to practical materials with magnetization. The new NDE system employs a LN2-cooled external Cu pickup coil and an HTS SQUID chip placed in a magnetic shield made of HTS material. The HTS SQUID chip consists of an HTS planar gradiometer manufactured by using a ramp-edge junction technology and a multi-turn HTS thin film input coil coupled with the flip-chip configuration. The first-order coaxial gradiometric Cu pickup coil with a diameter of 16 mm and the baseline of 5.6 mm was used in the present NDE experiments. By using this NDE system, we could observe defect-induced magnetic signals without an appreciable influence of magnetization up to 10 mT. We also examined the ability of detecting deep-lying defects and compared with the results obtained using our previous NDE system.

4-GHz counters bring synthesizers up to speed

NASA Astrophysics Data System (ADS)

Lee, F.; Miller, R.

1984-06-01

The availability of digital IC counters built on GaAs makes direct frequency division in microwave synthesizers possible. Four GHz is the highest clock rate achievable in production designs. These devices have the ability to drive TTL/CMOS logic, and the counter can be connected directly to single-chip frequency synthesizers controllers. A complete microwave sythesizer is formed by two chips and a voltage-controlled oscillator (VCO). The advantages of GaAs are discussed along with flip-flop basics, aspects of device fabrication, and the characteristics of GaAs MESAFETs. Attention is given to a GaAs prescaler usable for direct conversion, four kinds of flip-flops in a divide-by-two mode, and seven-stage binary ripple counters.

A short review on thermosonic flip chip bonding

NASA Astrophysics Data System (ADS)

Suppiah, Sarveshvaran; Ong, Nestor Rubio; Sauli, Zaliman; Sarukunaselan, Karunavani; Alcain, Jesselyn Barro; Shahimin, Mukhzeer Mohamad; Retnasamy, Vithyacharan

2017-09-01

This review is to study the evolution and key findings, critical technical challenges, solutions and bonding equipment of thermosonic flip chip bonding. Based on the review done, it was found that ultrasonic power, bonding time and force are the three main critical parameters need to be optimized in order to achieve sound and reliable bonding between the die and substrate. A close monitoring of the ultrasonic power helped to prevent over bonding phenomena on flexible substrate. Gold stud bumping is commonly used in thermosonic bonding compared to solder due to its better reliability obtained in the LED and optoelectronic packages. The review comprised short details on the available thermosonic bonding equipment in the semiconductor industry as well.

Polarity effect of electromigration on mechanical properties of lead-free solder joints

NASA Astrophysics Data System (ADS)

Ren, Fei

The trend of electronic packaging is to package the chips and the associated interconnections in a compact way that allows high speed operation; that allows for sufficient heat removal; that can withstand the thermal cycling associated with the turning on and turning off of the circuits; and that protects the circuits from environmental attack. These goals require that flip chip solder joints have higher resistance to electromigration, stronger mechanical property to sustain thermal mechanical stress, and are lead-free materials to satisfy environment and health concern. With lots of work on chemical reaction, electromigration and mechanical study in flip chip solder joints, however, the interaction between different driving forces is still little known. As a matter of fact, the combination study of chemical, electrical and mechanical is more and more significant to the understanding of the behavior of flip chip solder joints. In this dissertation, I developed one dimensional Cu (wire)-eutectic SnAgCu(ball)-Cu(wire) structure to investigate the interaction between electrical and mechanical force in lead-free solder joints. Electromigration was first conducted. The mechanical behaviors of solder joints before, after, and during electromigration were examined. Electrical current and mechanical stress were applied either in serial or in parallel to the solder joints. Tensile, creep, and drop tests, combined with different electrical current densities (1˜5x10 3A/cm2) and different stressing time (3˜144 hours), have been performed to study the effect of electromigration on the mechanical behavior of solder joints. Nano-indentation test was conducted to study the localized mechanical property of IMC at both interfaces in nanometer scale. Fracture images help analyze the failure mechanism of solder joints driven by both electrical and mechanical forces. The combination study shows a strain build-up during electromigration. Furthermore, a ductile-to-brittle transition in flip chip solder joints induced by electromigration is observed, in which the fracture position migrates from the middle to the cathode interface of the joint with increasing current density and time. The transition is explained by the polarity effect of electromigration, particular due to the accumulation of vacancies at the cathode interface.

Read disturb errors in a CMOS static RAM chip. [radiation hardened for spacedraft

NASA Technical Reports Server (NTRS)

Wood, Steven H.; Marr, James C., IV; Nguyen, Tien T.; Padgett, Dwayne J.; Tran, Joe C.; Griswold, Thomas W.; Lebowitz, Daniel C.

1989-01-01

Results are reported from an extensive investigation into pattern-sensitive soft errors (read disturb errors) in the TCC244 CMOS static RAM chip. The TCC244, also known as the SA2838, is a radiation-hard single-event-upset-resistant 4 x 256 memory chip. This device is being used by the Jet Propulsion Laboratory in the Galileo and Magellan spacecraft, which will have encounters with Jupiter and Venus, respectively. Two aspects of the part's design are shown to result in the occurrence of read disturb errors: the transparence of the signal path from the address pins to the array of cells, and the large resistance in the Vdd and Vss lines of the cells in the center of the array. Probe measurements taken during a read disturb failure illustrate how address skews and the data pattern in the chip combine to produce a bit flip. A capacitive charge pump formed by the individual cell capacitances and the resistance in the supply lines pumps down both the internal cell voltage and the local supply voltage until a bit flip occurs.

A non-volatile flip-flop based on diode-selected PCM for ultra-low power systems

NASA Astrophysics Data System (ADS)

Ye, Yong; Du, Yuan; Gao, Dan; Kang, Yong; Song, Zhitang; Chen, Bomy

2016-10-01

As the process technology is continuously shrinking, low power consumption is a major issue in VLSI Systems-on-Chip (SoCs), especially for standby-power-critical applications. Recently, the emerging CMOS-compatible non-volatile memories (NVMs), such as Phase Change Memory (PCM), have been used as on-chip storage elements, which can obtain non-volatile processing, nearly-zero standby power and instant-on capability. PCM has been considered as the best candidate for the next generation of NVMs for its low cost, high density and high resistance transformation ratio. In this paper, for the first time, we present a diode-selected PCM based non-volatile flip-flop (NVFF) which is optimized for better power consumption and process variation tolerance. With dual trench isolation process, the diode-selected PCM realizes ultra small area, which is very suitable for multi-context configuration and large scale flip-flops matrix. Since the MOS-selected PCM is hard to shrink further due to large amount of PCM write current, the proposed NVFF achieves higher power efficiency without loss of current driving capability. Using the 40nm manufacturing process, the area of the cell (1D1R) is as small as 0.016 μm2. Simulation results show that the energy consumption during the recall operation is 62 fJ with 1.1 standard supply voltage, which is reduced by 54.9% compared to the previous 2T2R based NVFF. When the supply voltage reduces to 0.7 V, the recall energy is as low as 17 fJ. With the great advantages in cell size and energy, the proposed diode-selected NVFF is very applicable and cost-effective for ULP systems.

Current crowding and self-heating effects in AlGaN-based flip-chip deep-ultraviolet light-emitting diodes

NASA Astrophysics Data System (ADS)

Hao, Guo-Dong; Taniguchi, Manabu; Tamari, Naoki; Inoue, Shin-ichiro

2018-01-01

We thoroughly explored the physical origin of the efficiency decrease with increasing injection current and current crowding effect in 280 nm AlGaN-based flip-chip deep-ultraviolet (DUV) light-emitting diodes (LEDs). The current spreading length was experimentally determined to be much smaller in DUV LEDs than that in conventional InGaN-based visible LEDs. The severe self-heating caused by the low power conversion efficiency of DUV LEDs should be mainly responsible for the considerable decrease of efficiency when current crowding is present. The wall-plug efficiency of the DUV LEDs was markedly enhanced by using a well-designed p-electrode pattern to improve the current distribution.

Effect of Al-trace dimension on Joule heating and current crowding in flip-chip solder joints under accelerated electromigration

NASA Astrophysics Data System (ADS)

Liang, S. W.; Chang, Y. W.; Chen, Chih

2006-04-01

Three-dimensional thermoelectrical simulation was conducted to investigate the influence of Al-trace dimension on Joule heating and current crowding in flip-chip solder joints. It is found that the dimension of the Al-trace effects significantly on the Joule heating, and thus directly determines the mean time to failure (MTTF). Simulated at a stressing current of 0.6A at 70°C, we estimate that the MTTF of the joints with Al traces in 100μm width was 6.1 times longer than that of joints with Al traces in 34μm width. Lower current crowding effect and reduced hot-spot temperature are responsible for the improved MTTF.

Flip-chip fabrication of integrated micromirror arrays using a novel latching off-chip hinge mechanism

NASA Astrophysics Data System (ADS)

Michalicek, M. Adrian; Bright, Victor M.

2001-10-01

This paper presents the design, fabrication, modeling, and testing of various arrays of cantilever micromirror devices integrated atop CMOS control electronics. The upper layers of the arrays are prefabricated in the MUMPs process and then flip-chip transferred to CMOS receiving modules using a novel latching off-chip hinge mechanism. This mechanism allows the micromirror arrays to be released, rotated off the edge of the host module and then bonded to the receiving module using a standard probe station. The hinge mechanism supports the arrays by tethers that are severed to free the arrays once bonded. The resulting devices are inherently planarized since the bottom of the first releasable MUMPs layer becomes the surface of the integrated mirror. The working devices are formed by mirror surfaces bonded to address electrodes fabricated above static memory cells on the CMOS module. These arrays demonstrate highly desirable features such as compatible address potentials, less than 2 nm of RMS roughness, approximately 1 micrometers of lateral position accuracy and the unique ability to metallize reflective surfaces without masking. Ultimately, the off-chip hinge mechanism enables very low-cost, simple, reliable, repeatable and accurate assembly of advanced MEMS and integrated microsystems without specialized equipment or complex procedures.

Radiation hardness and timing studies of a monolithic TowerJazz pixel design for the new ATLAS Inner Tracker

NASA Astrophysics Data System (ADS)

Riegel, C.; Backhaus, M.; Van Hoorne, J. W.; Kugathasan, T.; Musa, L.; Pernegger, H.; Riedler, P.; Schaefer, D.; Snoeys, W.; Wagner, W.

2017-01-01

A part of the upcoming HL-LHC upgrade of the ATLAS Detector is the construction of a new Inner Tracker. This upgrade opens new possibilities, but also presents challenges in terms of occupancy and radiation tolerance. For the pixel detector inside the inner tracker, hybrid modules containing passive silicon sensors and connected readout chips are presently used, but require expensive assembly techniques like fine-pitch bump bonding. Silicon devices fabricated in standard commercial CMOS technologies, which include part or all of the readout chain, are also investigated offering a reduced cost as they are cheaper per unit area than traditional silicon detectors. If they contain the full readout chain, as for a fully monolithic approach, there is no need for the expensive flip-chip assembly, resulting in a further cost reduction and material savings. In the outer pixel layers of the ATLAS Inner Tracker, the pixel sensors must withstand non-ionising energy losses of up to 1015 n/cm2 and offer a timing resolution of 25 ns or less. This paper presents test results obtained on a monolithic test chip, the TowerJazz 180nm Investigator, towards these specifications. The presented program of radiation hardness and timing studies has been launched to investigate this technology's potential for the new ATLAS Inner Tracker.

White thin-film flip-chip LEDs with uniform color temperature using laser lift-off and conformal phosphor coating technologies.

PubMed

Lin, Huan-Ting; Tien, Ching-Ho; Hsu, Chen-Peng; Horng, Ray-Hua

2014-12-29

We fabricated a phosphor-conversion white light emitting diode (PC-WLED) using a thin-film flip-chip GaN LED with a roughened u-GaN surface (TFFC-SR-LED) that emits blue light at 450 nm wavelength with a conformal phosphor coating that converts the blue light into yellow light. It was found that the TFFC-SR-LED with the thin-film substrate removal process and surface roughening exhibits a power enhancement of 16.1% when compared with the TFFC-LED without a sapphire substrate. When a TFFC-SR-LED with phosphors on a Cu-metal packaging-base (TFFC-SR-Cu-WLED) was operated at a forward-bias current of 350 mA, luminous flux and luminous efficacy were increased by 17.8 and 11.9%, compared to a TFFC-SR-LED on a Cup-shaped packaging-base (TFFC-SR-Cup-WLED). The angular correlated color temperature (CCT) deviation of a TFFC-SR-Cu-WLED reaches 77 K in the range of -70° to + 70° when the average CCT of white LEDs is around 4300 K. Consequently, the TFFC-SR-LED in a conformal coating phosphor structure on a Cu packaging-base could not only increase the luminous flux output, but also improve the angular-dependent CCT uniformity, thereby reducing the yellow ring effect.

Ice-assisted transfer of carbon nanotube arrays.

PubMed

Wei, Haoming; Wei, Yang; Lin, Xiaoyang; Liu, Peng; Fan, Shoushan; Jiang, Kaili

2015-03-11

Decoupling the growth and the application of nanomaterials by transfer is an important issue in nanotechnology. Here, we developed an efficient transfer technique for carbon nanotube (CNT) arrays by using ice as a binder to temporarily bond the CNT array and the target substrate. Ice makes it an ultraclean transfer because the evaporation of ice ensures that no contaminants are introduced. The transferred superaligned carbon nanotube (SACNT) arrays not only keep their original appearance and initial alignment but also inherit their spinnability, which is the most desirable feature. The transfer-then-spin strategy can be employed to fabricate patterned CNT arrays, which can act as 3-dimensional electrodes in CNT thermoacoustic chips. Besides, the flip-chipped CNTs are promising field electron emitters. Furthermore, the ice-assisted transfer technique provides a cost-effective solution for mass production of SACNTs, giving CNT technologies a competitive edge, and this method may inspire new ways to transfer other nanomaterials.

The Flipped Classroom in Systems Analysis & Design: Leveraging Technology to Increase Student Engagement

ERIC Educational Resources Information Center

Saulnier, Bruce M.

2015-01-01

Problems associated with the ubiquitous presence of technology on college campuses are discussed and the concept of the flipped classroom is explained. Benefits of using the flipped classroom to offset issues associated with the presence of technology in the classroom are explored. Fink's Integrated Course Design is used to develop a flipped class…

Fundamental study of microelectronic chip response under laser ultrasonic-interferometric inspection using C-scan method

NASA Astrophysics Data System (ADS)

Yang, Lei; Gong, Jie; Ume, I. Charles

2014-02-01

In modern surface mount packaging technologies, such as flip chips, chip scale packages, and ball grid arrays(BGA), chips are attached to the substrates/printed wiring board (PWB) using solder bump interconnections. The quality of solder bumps between the chips and the substrate/board is difficult to inspect. Laser ultrasonic-interferometric technique was proved to be a promising approach for solder bump inspection because of its noncontact and nondestructive characteristics. Different indicators extracted from received signals have been used to predict the potential defects, such as correlation coefficient, error ratio, frequency shifting, etc. However, the fundamental understanding of the chip behavior under laser ultrasonic inspection is still missing. Specifically, it is not sure whether the laser interferometer detected out-of-plane displacements were due to wave propagation or structural vibration when the chip was excited by pulsed laser. Plus, it is found that the received signals are chip dependent. Both challenges impede the interpretation of acquired signals. In this paper, a C-scan method was proposed to study the underlying phenomenon during laser ultrasonic inspection. The full chip was inspected. The response of the chip under laser excitation was visualized in a movie resulted from acquired signals. Specifically, a BGA chip was investigated to demonstrate the effectiveness of this method. By characterizing signals using discrete wavelet transform(DWT), both ultrasonic wave propagation and vibration were observed. Separation of them was successfully achieved using ideal band-pass filter and visualized in resultant movies, too. The observed ultrasonic waves were characterized and their respective speeds were measured by applying 2-D FFT. The C-scan method, combined with different digital signal processing techniques, was proved to be an very effective methodology to learn the behavior of chips under laser excitation. This general procedure can be applied to any unknown chip before inspection. A wealth of information can be provided by this learning procedure, which greatly benefits the interpretation of inspection signals afterwards.

Method of fabricating a microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2003-01-01

A method of fabricating a microelectronic device package with an integral window for providing optical access through an aperture in the package. The package is made of a multilayered insulating material, e.g., a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC). The window is inserted in-between personalized layers of ceramic green tape during stackup and registration. Then, during baking and firing, the integral window is simultaneously bonded to the sintered ceramic layers of the densified package. Next, the microelectronic device is flip-chip bonded to cofired thick-film metallized traces on the package, where the light-sensitive side is optically accessible through the window. Finally, a cover lid is attached to the opposite side of the package. The result is a compact, low-profile package, flip-chip bonded, hermetically-sealed package having an integral window.

A novel miniaturized PCR multi-reactor array fabricated using flip-chip bonding techniques

NASA Astrophysics Data System (ADS)

Zou, Zhi-Qing; Chen, Xiang; Jin, Qing-Hui; Yang, Meng-Su; Zhao, Jian-Long

2005-08-01

This paper describes a novel miniaturized multi-chamber array capable of high throughput polymerase chain reaction (PCR). The structure of the proposed device is verified by using finite element analysis (FEA) to optimize the thermal performance, and then implemented on a glass-silicon substrate using a standard MEMS process and post-processing. Thermal analysis simulation and verification of each reactor cell is equipped with integrated Pt temperature sensors and heaters at the bottom of the reaction chamber for real-time accurate temperature sensing and control. The micro-chambers are thermally separated from each other, and can be controlled independently. The multi-chip array was packaged on a printed circuit board (PCB) substrate using a conductive polymer flip-chip bonding technique, which enables effective heat dissipation and suppresses thermal crosstalk between the chambers. The designed system has successfully demonstrated a temperature fluctuation of ±0.5 °C during thermal multiplexing of up to 2 × 2 chambers, a full speed of 30 min for 30 cycle PCR, as well as the capability of controlling each chamber digitally and independently.

Ultrafast all-optical flip-flop based on passive micro Sagnac waveguide ring with photonic crystal fiber.

PubMed

Xu, Ming; Yang, Wan; Hong, Tao; Kang, TangZhen; Ji, JianHua; Wang, Ke

2017-06-01

Ultrafast all-optical flip-flop based on a passive micro Sagnac waveguide ring is studied through theoretical analysis and numerical simulation in this paper. The types of D, R-S, J-K, and T flip-flop are designed by controlling the cross-phase modulation effect of lights in this special microring. The high nonlinearity of the hollow-core photonic crystal fiber is implanted on a chip to shorten the length of the ring and reduce input power. By sensible management, the pulse width ratio of the input and the control signal, problems of pulse narrowing, and residual pedestal at the out port are solved. The parameters affecting the performance of flip-flops are optimized. The results show that the all-optical flip-flops have stable performance, low power consumption, high transmission rate (up to 100  Gb/s), and response time in picosecond order. The small size microwaveguide structure is suitable for photonic integration.

Bi-level multilayered microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2002-01-01

A bi-level, multilayered package with an integral window for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that the light-sensitive side is optically accessible through the window. A second chip can be bonded to the backside of the first chip, with the second chip being wirebonded to the second level of the bi-level package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed.

Chip design for thin-film deep ultraviolet LEDs fabricated by laser lift-off of the sapphire substrate

NASA Astrophysics Data System (ADS)

Cho, H. K.; Krüger, O.; Külberg, A.; Rass, J.; Zeimer, U.; Kolbe, T.; Knauer, A.; Einfeldt, S.; Weyers, M.; Kneissl, M.

2017-12-01

We report on a chip design which allows the laser lift-off (LLO) of the sapphire substrate sustaining the epitaxial film of flip-chip mounted deep ultraviolet light emitting diodes. A nanosecond pulsed excimer laser with a wavelength of 248 nm was used for the LLO. A mechanically stable chip design was found to be the key to prevent crack formation in the epitaxial layers and material chipping during the LLO process. Stabilization was achieved by introducing a Ti/Au leveling layer that mechanically supports the fragile epitaxial film. The electrical and optical characterization of devices before and after the LLO process shows that the device performance did not degrade by the LLO.

Sealed symmetric multilayered microelectronic device package with integral windows

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2002-01-01

A sealed symmetric multilayered package with integral windows for housing one or more microelectronic devices. The devices can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the windows being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic devices can be flip-chip bonded and oriented so that the light-sensitive sides are optically accessible through the windows. The result is a compact, low-profile, sealed symmetric package, having integral windows that can be hermetically-sealed.

Mechanical flip-chip for ultra-high electron mobility devices

DOE PAGES

Bennaceur, Keyan; Schmidt, Benjamin A.; Gaucher, Samuel; ...

2015-09-22

In this study, electrostatic gates are of paramount importance for the physics of devices based on high-mobility two-dimensional electron gas (2DEG) since they allow depletion of electrons in selected areas. This field-effect gating enables the fabrication of a wide range of devices such as, for example, quantum point contacts (QPC), electron interferometers and quantum dots. To fabricate these gates, processing is usually performed on the 2DEG material, which is in many cases detrimental to its electron mobility. Here we propose an alternative process which does not require any processing of the 2DEG material other than for the ohmic contacts. Thismore » approach relies on processing a separate wafer that is then mechanically mounted on the 2DEG material in a flip-chip fashion. This technique proved successful to fabricate quantum point contacts on both GaAs/AlGaAs materials with both moderate and ultra-high electron mobility.« less

Nanoparticle embedded p-type electrodes for GaN-based flip-chip light emitting diodes.

PubMed

Kwak, Joon Seop; Song, J O; Seong, T Y; Kim, B I; Cho, J; Sone, C; Park, Y

2006-11-01

We have investigated high-quality ohmic contacts for flip-chip light emitting diodes using Zn-Ni nanoparticles/Ag schemes. The Zn-Ni nanoparticles/Ag contacts produce specific contact resistances of 10(-5)-10(-6) omegacm2 when annealed at temperatures of 330-530 degrees C for 1 min in air ambient, which are much better than those obtained from the Ag contacts. It is shown that blue InGaN/GaN multi-quantum well light emitting diodes fabricated with the annealed Zn-Ni nanoparticles/Ag contacts give much lower forward-bias voltages at 20 mA compared with those of the multi-quantum well light emitting diodes made with the as-deposited Ag contacts. It is further presented that the multi-quantum well light emitting diodes made with the Zn-Ni nanoparticles/Ag contacts show similar output power compared to those fabricated with the Ag contact layers.

Flip-chip integrated silicon Mach-Zehnder modulator with a 28nm fully depleted silicon-on-insulator CMOS driver.

PubMed

Yong, Zheng; Shopov, Stefan; Mikkelsen, Jared C; Mallard, Robert; Mak, Jason C C; Voinigescu, Sorin P; Poon, Joyce K S

2017-03-20

We present a silicon electro-optic transmitter consisting of a 28nm ultra-thin body and buried oxide fully depleted silicon-on-insulator (UTBB FD-SOI) CMOS driver flip-chip integrated onto a Mach-Zehnder modulator. The Mach-Zehnder silicon optical modulator was optimized to have a 3dB bandwidth of around 25 GHz at -1V bias and a 50 Ω impedance. The UTBB FD-SOI CMOS driver provided a large output voltage swing around 5 V_pp to enable a high dynamic extinction ratio and a low device insertion loss. At 44 Gbps, the transmitter achieved a high extinction ratio of 6.4 dB at the modulator quadrature operation point. This result shows open eye diagrams at the highest bit rates and with the largest extinction ratios for silicon electro-optic transmitter using a CMOS driver.

Effect of current crowding on whisker growth at the anode in flip chip solder joints

NASA Astrophysics Data System (ADS)

Ouyang, Fan-Yi; Chen, Kai; Tu, K. N.; Lai, Yi-Shao

2007-12-01

Owing to the line-to-bump configuration in flip chip solder joints, current crowding occurs when electrons enter into or exit from the solder bump. At the cathode contact, where electrons enter into the bump, current crowding induced pancake-type void formation has now been observed widely. At the anode contact, where electrons exit from the bump, we report here that whisker is formed. Results of both eutectic SnPb and SnAgCu solder joints are presented and compared. The cross-sectioned surface in SnPb showed dimple and bulge after electromigration, while that of SnAgCu remained flat. The difference is due to a larger back stress in the SnAgCu, consequently, electromigration in SnAgCu is slower than that in SnPb. Nanoindentation markers were used to measure the combined atomic fluxes of back stress and electromigration.

Oxide-confined 2D VCSEL arrays for high-density inter/intra-chip interconnects

NASA Astrophysics Data System (ADS)

King, Roger; Michalzik, Rainer; Jung, Christian; Grabherr, Martin; Eberhard, Franz; Jaeger, Roland; Schnitzer, Peter; Ebeling, Karl J.

1998-04-01

We have designed and fabricated 4 X 8 vertical-cavity surface-emitting laser (VCSEL) arrays intended to be used as transmitters in short-distance parallel optical interconnects. In order to meet the requirements of 2D, high-speed optical links, each of the 32 laser diodes is supplied with two individual top contacts. The metallization scheme allows flip-chip mounting of the array modules junction-side down on silicon complementary metal oxide semiconductor (CMOS) chips. The optical and electrical characteristics across the arrays with device pitch of 250 micrometers are quite homogeneous. Arrays with 3 micrometers , 6 micrometers and 10 micrometers active diameter lasers have been investigated. The small devices show threshold currents of 600 (mu) A, single-mode output powers as high as 3 mW and maximum wavelength deviations of only 3 nm. The driving characteristics of all arrays are fully compatible to advanced 3.3 V CMOS technology. Using these arrays, we have measured small-signal modulation bandwidths exceeding 10 GHz and transmitted pseudo random data at 8 Gbit/s channel over 500 m graded index multimode fiber. This corresponds to a data transmission rate of 256 Gbit/s per array of 1 X 2 mm2 footprint area.

Microcircuit Device Reliability Digital Detailed Data

DTIC Science & Technology

1976-01-01

TYPE s No. FUNCTION A LASS PINS TEMP. TYPE CLASS LEVEL I eFAILED 8 NO. CHIP TEST APPL. TEST PAR1 t T AGATES PROTECT. DATE E:V. D TYPE HOURST :708 FLIP...LEVEL # EFAILED s a NO. t CHIP i TEST 3 APPL. a TEST I PAR! 3 a GATES s PROTECT. a DATE 3 ENV. t TYPE I 3 -OUHb s 354H0( 3 GATE C-I CDIP 14 150C :11.A

An integrated circuit with transmit beamforming flip-chip bonded to a 2-D CMUT array for 3-D ultrasound imaging.

PubMed

Wygant, Ira O; Jamal, Nafis S; Lee, Hyunjoo J; Nikoozadeh, Amin; Oralkan, Omer; Karaman, Mustafa; Khuri-Yakub, Butrus T

2009-10-01

State-of-the-art 3-D medical ultrasound imaging requires transmitting and receiving ultrasound using a 2-D array of ultrasound transducers with hundreds or thousands of elements. A tight combination of the transducer array with integrated circuitry eliminates bulky cables connecting the elements of the transducer array to a separate system of electronics. Furthermore, preamplifiers located close to the array can lead to improved receive sensitivity. A combined IC and transducer array can lead to a portable, high-performance, and inexpensive 3-D ultrasound imaging system. This paper presents an IC flip-chip bonded to a 16 x 16-element capacitive micromachined ultrasonic transducer (CMUT) array for 3-D ultrasound imaging. The IC includes a transmit beamformer that generates 25-V unipolar pulses with programmable focusing delays to 224 of the 256 transducer elements. One-shot circuits allow adjustment of the pulse widths for different ultrasound transducer center frequencies. For receiving reflected ultrasound signals, the IC uses the 32-elements along the array diagonals. The IC provides each receiving element with a low-noise 25-MHz-bandwidth transimpedance amplifier. Using a field-programmable gate array (FPGA) clocked at 100 MHz to operate the IC, the IC generated properly timed transmit pulses with 5-ns accuracy. With the IC flip-chip bonded to a CMUT array, we show that the IC can produce steered and focused ultrasound beams. We present 2-D and 3-D images of a wire phantom and 2-D orthogonal cross-sectional images (Bscans) of a latex heart phantom.

Multilayered Microelectronic Device Package With An Integral Window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2004-10-26

A microelectronic package with an integral window mounted in a recessed lip for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can be formed of a low temperature co-fired ceramic (LTCC) or high temperature cofired ceramic (HTCC) multilayered material, with the integral window being simultaneously joined (e.g. co-fired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that a light-sensitive side is optically accessible through the window. The result is a compact, low profile package, having an integral window mounted in a recessed lip, that can be hermetically sealed.

Silicon-based products and solutions

NASA Astrophysics Data System (ADS)

Painchaud, Y.; Poulin, M.; Pelletier, F.; Latrasse, C.; Gagné, J.-F.; Savard, S.; Robidoux, G.; Picard, M.-.; Paquet, S.; Davidson, C.-.; Pelletier, M.; Cyr, M.; Paquet, C.; Guy, M.; Morsy-Osman, M.; Chagnon, M.; Plant, D. V.

2014-03-01

TeraXion started silicon photonics activities aiming at developing building blocks for new products and customized solutions. Passive and active devices have been developed including MMI couplers, power splitters, Bragg grating filters, high responsivity photodetectors, high speed modulators and variable optical attenuators. Packaging solutions including fiber attachment and hybrid integration using flip-chip were also developed. More specifically, a compact packaged integrated coherent receiver has been realized. Good performances were obtained as demonstrated by our system tests results showing transmission up to 4800 km with BER below hard FEC threshold. The package size is small but still limited by the electrical interface. Migrating to more compact RF interface would allow realizing the full benefit of this technology.

Processing and Characterization of NiTi Shape Memory Alloy Particle Reinforced Sn-In Solders

DTIC Science & Technology

2006-12-01

solders generally operate at a high homologous temperature. Thermally induced grain growth, mechanical stress-induced grain growth and recrystallization ...the number of I/O connects available for flip chip as compared to the wirebond chip For interconnection and packaging, Pb-Sn and eutectic 63Sn...lower melting point is desired. The maximum use temperature for this alloy is around 120°C due to the fact that the eutectic reaction happened at

C-MOS array design techniques

NASA Technical Reports Server (NTRS)

Feller, A.

1978-01-01

The entire complement of standard cells and components, except for the set-reset flip-flop, was completed. Two levels of checking were performed on each device. Logic cells and topological layout are described. All the related computer programs were coded and one level of debugging was completed. The logic for the test chip was modified and updated. This test chip served as the first test vehicle to exercise the standard cell complementary MOS(C-MOS) automatic artwork generation capability.

Microfabricated Electrical Connector for Atomic Force Microscopy Probes with Integrated Sensor/Actuator

NASA Astrophysics Data System (ADS)

Akiyama, Terunobu; Staufer, Urs; Rooij, Nico F. de

2002-06-01

A microfabricated, electrical connector is proposed for facilitating the mounting of atomic force microscopy (AFM) probes, which have an integrated sensor and/or actuator. Only a base chip, which acts as a socket, is permanently fixed onto a printed circuit board and electronically connected by standard wire bonding. The AFM chip, the “plug”, is flipped onto the base chip and pressed from the backside by a spring. Electrical contact with the eventual stress sensors, capacitive or piezoelectric sensor/actuators, is provided by contact bumps. These bumps of about 8 μm height are placed onto the base chip. They touch the pads on the AFM chip that were originally foreseen to be for wire bonding and thus provide the electrical contact. This connector schema was successfully used to register AFM images with piezoresistive cantilevers.

Quality-Improving Strategies of College English Teaching Based on Microlesson and Flipped Classroom

ERIC Educational Resources Information Center

Zhang, Fan

2017-01-01

Microlesson and flipped classroom, which incorporate the educational information technologies, are a new trend of college English teaching. Exploration on how the flipped classroom and microlesson promote innovation and application of educational information technology are of great significance. According to a survey among teachers, strategies…

Platform technologies for hybrid optoelectronic integration and packaging

NASA Astrophysics Data System (ADS)

Datta, Madhumita

In order to bring fiber-optics closer to individual home and business services, the optical network components have to be inexpensive and reliable. Integration and packaging of optoelectronic devices holds the key to high-volume low-cost component manufacturing. The goal of this dissertation is to propose, study, and demonstrate various ways to integrate optoelectronic devices on a packaging platform to implement cost-effective, functional optical modules. Two types of hybrid integration techniques have been proposed: flip-chip solder bump bonding for high-density two-dimensional array packaging of surface-emitting devices, and solder preform bonding for fiber-coupled edge-emitting semiconductor devices. For flip-chip solder bump bonding, we developed a simple, inexpensive remetallization process called "electroless plating", which converts the aluminum bond pads of foundry-made complementary metal oxide semiconductor (CMOS) chips into solder-bondable and wire-bondable gold surfaces. We have applied for a patent on this remetallization technique. For fiber-pigtailed edge-emitting laser modules, we have studied the coupling characteristics of different types of lensed single-mode fibers including semispherically lensed fiber, cylindrically lensed fiber and conically lensed fiber. We have experimentally demonstrated 66% coupling efficiency with semispherically lensed fiber and 50% efficiency with conically lensed fibers. We have proposed and designed a packaging platform on which lensed fibers can be actively aligned to a laser and solder-attached reliably to the platform so that the alignment is retained. We have designed thin-film nichrome heaters on fused quartz platforms as local heat source to facilitate on-board solder alignment and attachment of fiber. The thermal performance of the heaters was simulated using finite element analysis tool ANSYS prior to fabrication. Using the heater's reworkability advantage, we have estimated the shift of the fiber due to solder shrinkage and introduced a pre-correction in the alignment process to restore optimum coupling efficiency close to 50% with conically lensed fibers. We have applied for a patent on this unique active alignment method through the University of Maryland's Technology Commercialization Office. Although we have mostly concentrated on active alignment platforms, we have proposed the idea of combining the passive alignment advantages of silicon optical benches to the on-board heater-assisted active alignment technique. This passive-active alignment process has the potential of cost-effective array packaging of edge-emitting devices.

A Robust Strategy for Total Ionizing Dose Testing of Field Programmable Gate Arrays

NASA Technical Reports Server (NTRS)

Wilcox, Edward; Berg, Melanie; Friendlich, Mark; Lakeman, Joseph; KIm, Hak; Pellish, Jonathan; LaBel, Kenneth

2012-01-01

We present a novel method of FPGA TID testing that measures propagation delay between flip-flops operating at maximum speed. Measurement is performed on-chip at-speed and provides a key design metric when building system-critical synchronous designs.

Micromechanical Waveguide Mounts for Hot Electron Bolometer Terahertz Mixers

NASA Astrophysics Data System (ADS)

Brandt, Michael; Jacobs, Karl; Honingh, C. E.; Stodolka, Jörg

The superior beam matching of waveguide horn antennas to a telescope suggests using waveguide mounts even at THz-frequencies. In contrast to the more common quasi-optical (substrate lens) designs, the exceedingly small dimensions of the waveguide require novel micro-mechanical fabrication technologies. We will present a novel fabrication scheme for 1.9 THz waveguide mixers for SOFIA. Hot Electron Bolometer devices (HEB) are fabricated on 2 μm thick Si3N4 membrane strips. The strips are robust enough to be mounted on a separately fabricated Si support frame using an adapted flip-chip technology. Mounted onto the frame, the devices can be easily positioned and glued into a copper waveguide mount. Further developments regarding micro-mechanical processes to fabricate this copper waveguide mount and the receiving horn antenna will be presented, as well as the KOSMA Micro Assembly Station and its capabilities to handle mixer substrates.

Mechanism of Void Prediction in Flip Chip Packages with Molded Underfill

NASA Astrophysics Data System (ADS)

Wu, Kuo-Tsai; Hwang, Sheng-Jye; Lee, Huei-Huang

2017-08-01

Voids have always been present using the molded underfill (MUF) package process, which is a problem that needs further investigation. In this study, the process was studied using the Moldex3D numerical analysis software. The effects of gas (air vent effect) on the overall melt front were also considered. In this isothermal process containing two fluids, the gas and melt colloid interact in the mold cavity. Simulation enabled an appropriate understanding of the actual situation to be gained, and, through analysis, the void region and exact location of voids were predicted. First, the global flow end area was observed to predict the void movement trend, and then the local flow ends were observed to predict the location and size of voids. In the MUF 518 case study, simulations predicted the void region as well as the location and size of the voids. The void phenomenon in a flip chip ball grid array underfill is discussed as part of the study.

Numerical analysis of light extraction enhancement of GaN-based thin-film flip-chip light-emitting diodes with high-refractive-index buckling nanostructures

NASA Astrophysics Data System (ADS)

Yue, Qing-Yang; Yang, Yang; Cheng, Zhen-Jia; Guo, Cheng-Shan

2018-06-01

In this work, the light extraction efficiency enhancement of GaN-based thin-film flip-chip (TFFC) light-emitting diodes (LEDs) with high-refractive-index (TiO2) buckling nanostructures was studied using the three-dimensional finite difference time domain method. Compared with 2-D photonic crystals, the buckling structures have the advantages of a random directionality and a broad distribution in periodicity, which can effectively extract the guided light propagating in all azimuthal directions over a wide spectrum. Numerical studies revealed that the light extraction efficiency of buckling-structured LEDs reaches 1.1 times that of triangular lattice photonic crystals. The effects of the buckling structure feature sizes and the thickness of the N-GaN layer on the light extraction efficiency for TFFC LEDs were also investigated systematically. With optimized structural parameters, a significant light extraction enhancement of about 2.6 times was achieved for TiO2 buckling-structured TFFC LEDs compared with planar LEDs.

Advanced processing of CdTe pixel radiation detectors

NASA Astrophysics Data System (ADS)

Gädda, A.; Winkler, A.; Ott, J.; Härkönen, J.; Karadzhinova-Ferrer, A.; Koponen, P.; Luukka, P.; Tikkanen, J.; Vähänen, S.

2017-12-01

We report a fabrication process of pixel detectors made of bulk cadmium telluride (CdTe) crystals. Prior to processing, the quality and defect density in CdTe material was characterized by infrared (IR) spectroscopy. The semiconductor detector and Flip-Chip (FC) interconnection processing was carried out in the clean room premises of Micronova Nanofabrication Centre in Espoo, Finland. The chip scale processes consist of the aluminum oxide (Al2O3) low temperature thermal Atomic Layer Deposition (ALD), titanium tungsten (TiW) metal sputtering depositions and an electroless Nickel growth. CdTe crystals with the size of 10×10×0.5 mm3 were patterned with several photo-lithography techniques. In this study, gold (Au) was chosen as the material for the wettable Under Bump Metalization (UBM) pads. Indium (In) based solder bumps were grown on PSI46dig read out chips (ROC) having 4160 pixels within an area of 1 cm2. CdTe sensor and ROC were hybridized using a low temperature flip-chip (FC) interconnection technique. The In-Au cold weld bonding connections were successfully connecting both elements. After the processing the detector packages were wire bonded into associated read out electronics. The pixel detectors were tested at the premises of Finnish Radiation Safety Authority (STUK). During the measurement campaign, the modules were tested by exposure to a 137Cs source of 1.5 TBq for 8 minutes. We detected at the room temperature a photopeak at 662 keV with about 2 % energy resolution.

Increased effective reflection and transmission at the GaN-sapphire interface of LEDs grown on patterned sapphire substrates

NASA Astrophysics Data System (ADS)

Dongxue, Wu; Ping, Ma; Boting, Liu; Shuo, Zhang; Junxi, Wang; Jinmin, Li

2016-10-01

The effect of patterned sapphire substrate (PSS) on the top-surface (P-GaN-surface) and the bottom-surface (sapphire-surface) of the light output power (LOP) of GaN-based LEDs was investigated, in order to study the changes in reflection and transmission of the GaN-sapphire interface. Experimental research and computer simulations were combined to reveal a great enhancement in LOP from either the top or bottom surface of GaN-based LEDs, which are prepared on patterned sapphire substrates (PSS-LEDs). Furthermore, the results were compared to those of the conventional LEDs prepared on the planar sapphire substrates (CSS-LEDs). A detailed theoretical analysis was also presented to further support the explanation for the increase in both the effective reflection and transmission of PSS-GaN interface layers and to explain the causes of increased LOP values. Moreover, the bottom-surface of the PSS-LED chip shows slightly increased light output performance when compared to that of the top-surface. Therefore, the light extraction efficiency (LEE) can be further enhanced by integrating the method of PSS and flip-chip structure design. Project supported by the National High Technology Program of China (No. Y48A040000) and the National High Technology Program of China (No. Y48A040000).

Flipped Higher Education Classroom: An Application in Environmental Education Course in Primary Education

ERIC Educational Resources Information Center

Yilmaz, Özkan

2017-01-01

Usage of technology in educational settings is becoming a standard for 21st century's learners. Flipped classroom presents an entirely new learning environment based on technology for students, thus requiring different research for establishing effective learning and teaching. This paper aimed to explore usability of flipped classroom in higher…

Bi-level microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2004-01-06

A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The multilayered package can be formed of a LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded so that the light-sensitive side is optically accessible through the window. The package has at least two levels of circuits for making electrical interconnections to a pair of microelectronic devices. The result is a compact, low-profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device(s).

Single level microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2003-12-09

A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The package can be formed of a multilayered LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during cofiring. The microelectronic device can be flip-chip interconnected so that the light-sensitive side is optically accessible through the window. A glob-top encapsulant or protective cover can be used to protect the microelectronic device and electrical interconnections. The result is a compact, low profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device.

Study and practice of flipped classroom in optoelectronic technology curriculum

NASA Astrophysics Data System (ADS)

Shi, Jianhua; Lei, Bing; Liu, Wei; Yao, Tianfu; Jiang, Wenjie

2017-08-01

"Flipped Classroom" is one of the most popular teaching models, and has been applied in more and more curriculums. It is totally different from the traditional teaching model. In the "Flipped Classroom" model, the students should watch the teaching video afterschool, and in the classroom only the discussion is proceeded to improve the students' comprehension. In this presentation, "Flipped Classroom" was studied and practiced in opto-electronic technology curriculum; its effect was analyzed by comparing it with the traditional teaching model. Based on extensive and deep investigation, the phylogeny, the characters and the important processes of "Flipped Classroom" are studied. The differences between the "Flipped Classroom" and the traditional teaching model are demonstrated. Then "Flipped Classroom" was practiced in opto-electronic technology curriculum. In order to obtain high effectiveness, a lot of teaching resources were prepared, such as the high-quality teaching video, the animations and the virtual experiments, the questions that the students should finish before and discussed in the class, etc. At last, the teaching effect was evaluated through analyzing the result of the examination and the students' surveys.

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

Impact of the Flipped Classroom on Learner Achievement and Satisfaction in an Undergraduate Technology Literacy Course

ERIC Educational Resources Information Center

Sommer, Max; Ritzhaupt, Albert D.

2018-01-01

Aim/Purpose: The purpose of this study was to examine the impact of the flipped classroom model on learner achievement and satisfaction for undergraduate learners Background: The context for this research on the flipped classroom was an introductory technology literacy course at a public, research university. Methodology: This study employed a…

Should We Flip the Social Studies Classrooms? The Opinions of Social Studies Teacher Candidates on Flipped Classroom

ERIC Educational Resources Information Center

Erdogan, Erdi; Akbaba, Bulent

2018-01-01

The technology revolution continues to profoundly influence the educational process. Thus, the traditional teaching process is changing and education which is individualized with technology supported teaching processes comes to the forefront. One of the concrete indicators is the flipped classroom model. The purpose of this study is to determine…

Flipped Classroom versus Traditional Textbook Instruction: Assessing Accuracy and Mental Effort at Different Levels of Mathematical Complexity

ERIC Educational Resources Information Center

Mattis, Kristina V.

2015-01-01

Flipped classrooms are an instructional technology trend mostly incorporated in higher education settings, with growing prominence in high school and middle school (Tucker in Leveraging the power of technology to create student-centered classrooms. Corwin, Thousand Oaks, 2012). Flipped classrooms are meant to effectively combine traditional and…

Toward more efficient fabrication of high-density 2-D VCSEL arrays for spatial redundancy and/or multi-level signal communication

NASA Astrophysics Data System (ADS)

Roscher, Hendrik; Gerlach, Philipp; Khan, Faisal Nadeem; Kroner, Andrea; Stach, Martin; Weigl, Alexander; Michalzik, Rainer

2006-04-01

We present flip-chip attached high-speed VCSELs in 2-D arrays with record-high intra-cell packing densities. The advances of VCSEL array technology toward improved thermal performance and more efficient fabrication are reviewed, and the introduction of self-aligned features to these devices is pointed out. The structure of close-spaced wedge-shaped VCSELs is discussed and their static and dynamic characteristics are presented including an examination of the modal structure by near-field measurements. The lasers flip-chip bonded to a silicon-based test platform exhibit 3-dB and 10-dB bandwidths of 7.7 GHz and 9.8 GHz, respectively. Open 12.5 Gbit/s two-level eye patterns are demonstrated. We discuss the uses of high packing densities for the increase of the total amount of data throughput an array can deliver in the course of its life. One such approach is to provide up to two backup VCSELs per fiber channel that can extend the lifetimes of parallel transmitters through redundancy of light sources. Another is to increase the information density by using multiple VCSELs per 50 μm core diameter multimode fiber to generate more complex signals. A novel scheme using three butt-coupled VCSELs per fiber for the generation of four-level signals in the optical domain is proposed. First experiments are demonstrated using two VCSELs butt-coupled to the same standard glass fiber, each modulated with two-level signals to produce four-level signals at the photoreceiver. A four-level direct modulation of one VCSEL within a triple of devices produced first 20.6 Gbit/s (10.3 Gsymbols/s) four-level eyes, leaving two VCSELs as backup sources.

An Application of Flipped Classroom Method in the Instructional Technologies and Material Development Course

ERIC Educational Resources Information Center

Özpinar, Ilknur; Yenmez, Arzu Aydogan; Gökçe, Semirhan

2016-01-01

A natural outcome of change in technology, new approaches towards teaching and learning have emerged and the applicability of the flipped classroom method, a new educational strategy, in the field of education has started to be discussed. It was aimed with the study to examine the effect of using flipped classroom method in academic achievements…

Impacts of Flipped Classroom in High School Health Education

ERIC Educational Resources Information Center

Chen, Li-Ling

2016-01-01

As advanced technology increasingly infiltrated into classroom, the flipped classroom has come to light in secondary educational settings. The flipped classroom is a new instructional approach that intends to flip the traditional teacher-centered classroom into student centered. The purpose of this research is to investigate the impact of the…

Performance and Motivation in a Middle School Flipped Learning Course

ERIC Educational Resources Information Center

Winter, Joshua W.

2018-01-01

Flipped learning is a teaching approach that promotes collaboration by using technology to 'flip' traditional instruction. Content is delivered outside of class in the individual space (online) and the group space (classroom) is used to engage in collaborative activities. Flipped learning shifts the teacher's role toward facilitation. Research on…

The Flip Side of Flipped Language Teaching

ERIC Educational Resources Information Center

Lyddon, Paul A.

2015-01-01

The past decade has seen a growing interest in "flipped teaching", an inversion of traditional teaching methods, whereby instruction formerly taking place in the classroom is made accessible online and lesson time is spent on interaction. Until very recently, flipped learning was largely limited to the Science, Technology, Engineering,…

Flipped Learning, Flipped Satisfaction, Getting the Balance Right

ERIC Educational Resources Information Center

Swinburne, Rosemary Fisher; Ross, Bella; LaFerriere, Richard; Maritz, Alex

2017-01-01

This paper explores students' perceptions of their learning outcomes, engagement, and satisfaction with a technology-facilitated flipped approach in a third-year core subject at an Australian university during 2014. In this pilot study, findings reveal that students preferred the flipped approach to the traditional face-to-face delivery and…

Fluxless flip-chip bonding using a lead-free solder bumping technique

NASA Astrophysics Data System (ADS)

Hansen, K.; Kousar, S.; Pitzl, D.; Arab, S.

2017-09-01

With the LHC exceeding the nominal instantaneous luminosity, the current barrel pixel detector (BPIX) of the CMS experiment at CERN will reach its performance limits and undergo significant radiation damage. In order to improve detector performance in high luminosity conditions, the entire BPIX is replaced with an upgraded version containing an additional detection layer. Half of the modules comprising this additional layer are produced at DESY using fluxless and lead-free bumping and bonding techniques. Sequential solder-jetting technique is utilized to wet 40-μm SAC305 solder spheres on the silicon-sensor pads with electroless Ni, Pd and immersion Au (ENEPIG) under-bump metallization (UBM). The bumped sensors are flip-chip assembled with readout chips (ROCs) and then reflowed using a flux-less bonding facility. The challenges for jetting low solder volume have been analyzed and will be presented in this paper. An average speed of 3.4 balls per second is obtained to jet about 67 thousand solder balls on a single chip. On average, 7 modules have been produced per week. The bump-bond quality is evaluated in terms of electrical and mechanical properties. The peak-bump resistance is about 17.5 mΩ. The cross-section study revealed different types of intermetallic compounds (IMC) as a result of interfacial reactions between UBM and solder material. The effect of crystalline phases on the mechanical properties of the joint is discussed. The mean shear strength per bump after the final module reflow is about 16 cN. The results and sources of yield loss of module production are reported. The achieved yield is 95%.

Effect of surface finish on the failure mechanisms of flip-chip solder joints under electromigration

NASA Astrophysics Data System (ADS)

Lin, Y. L.; Lai, Y. S.; Tsai, C. M.; Kao, C. R.

2006-12-01

Two substrate surface finishes, Au/Ni and organic solderable preservative (OSP), were used to study the effect of the surface finish on the reliability of flip-chip solder joints under electromigration at 150°C ambient temperature. The solder used was eutectic PbSn, and the applied current density was 5×103 A/cm2 at the contact window of the chip. The under bump metallurgy (UBM) on the chip was sputtered Cu/Ni. It was found that the mean-time-to-failure (MTTF) of the OSP joints was six times better than that of the Au/Ni joints (3080 h vs. 500 h). Microstructure examinations uncovered that the combined effect of current crowding and the accompanying local Joule heating accelerated the local Ni UBM consumption near the point of electron entrance. Once Ni was depleted at a certain region, this region became nonconductive, and the flow of the electrons was diverted to the neighboring region. This neighboring region then became the place where electrons entered the joint, and the local Ni UBM consumption was accelerated. This process repeated itself, and the Ni-depleted region extended further on, creating an ever-larger nonconductive region. The solder joint eventually, failed when the nonconductive region became too large, making the effective current density very high. Accordingly, the key factor determining the MTTF was the Ni consumption rate. The joints with the OSP surface finish had a longer MTTF because Cu released from the substrate was able to reduce the Ni consumption rate.

The rectenna design on contact lens for wireless powering of the active intraocular pressure monitoring system.

PubMed

Cheng, H W; Jeng, B M; Chen, C Y; Huang, H Y; Chiou, J C; Luo, C H

2013-01-01

This paper proposed a wireless power harvesting system with micro-electro-mechanical-systems (MEMS) fabrication for noninvasive intraocular pressure (IOP) measurement on soft contact lens substructure. The power harvesting IC consists of a loop antenna, an impedance matching network and a rectifier. The proposed IC has been designed and fabricated by CMOS 0.18 um process that operates at the ISM band of 5.8 GHz. The antenna and the power harvesting IC would be bonded together by using flip chip bonding technologies without extra wire interference. The circuit utilized an impedance transformation circuit to boost the input RF signal that improves the circuit performance. The proposed design achieves an RF-to-DC conversion efficiency of 35% at 5.8 GHz.

Creation of a Radiation Hard 0.13 Micron CMOS Library at IHP

NASA Astrophysics Data System (ADS)

Jagdhold, U.

2010-08-01

To support space applications we will develop an 0.13 micron CMOS library which should be radiation hard up to 200 krad. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latchup (SEL). To reduce single event upset (SEU) we will add two p-MOS transistors to all flip flops. For reliability reasons we will use double contacts in all library elements. The additional rules and the library elements will then be integrated in our Cadence mixed signal designkit, Virtuoso IC6.1 [1]. A test chip will be produced with our in house 0.13 micron BiCMOS technology, see Ref. [2].Thereafter we will doing radiation tests according the ESA specifications, see Ref. [3], [4].

Two-Step Plasma Process for Cleaning Indium Bonding Bumps

NASA Technical Reports Server (NTRS)

Greer, Harold F.; Vasquez, Richard P.; Jones, Todd J.; Hoenk, Michael E.; Dickie, Matthew R.; Nikzad, Shouleh

2009-01-01

A two-step plasma process has been developed as a means of removing surface oxide layers from indium bumps used in flip-chip hybridization (bump bonding) of integrated circuits. The two-step plasma process makes it possible to remove surface indium oxide, without incurring the adverse effects of the acid etching process.

High-Modulation-Speed LEDs Based on III-Nitride

NASA Astrophysics Data System (ADS)

Chen, Hong

III-nitride InGaN light-emitting diodes (LEDs) enable wide range of applications in solid-state lighting, full-color displays, and high-speed visible-light communication. Conventional InGaN quantum well LEDs grown on polar c-plane substrate suffer from quantum confined Stark effect due to the large internal polarization-related fields, leading to a reduced radiative recombination rate and device efficiency, which limits the performance of InGaN LEDs in high-speed communication applications. To circumvent these negative effects, non-trivial-cavity designs such as flip-chip LEDs, metallic grating coated LEDs are proposed. This oral defense will show the works on the high-modulation-speed LEDs from basic ideas to applications. Fundamental principles such as rate equations for LEDs/laser diodes (LDs), plasmonic effects, Purcell effects will be briefly introduced. For applications, the modal properties of flip-chip LEDs are solved by implementing finite difference method in order to study the modulation response. The emission properties of highly polarized InGaN LEDs coated by metallic gratings are also investigated by finite difference time domain method.

Neighbour-die effect on the measurement of wafer-level flip-chip LED dies in production lines

NASA Astrophysics Data System (ADS)

Chen, Tengfei; Wan, Zirui; Li, Bin

2017-11-01

The light from the side surfaces of the test flip-chip light-emitting diode (FCLED) dies is reflected, refracted or absorbed by neighbour dies during the measurement of wafer-level FCLED dies in production lines. A notable measurement deviation is caused by the neighbour-die effect, which is not considered in current industry practice. In this paper, Monte Carlo ray-tracing simulations are used to study the measurement deviations caused by the neighbour-die effect and extension ratios of the film. The simulation results show that the maximal deviation of radiant flux impinging the photodiode can reach 5.5%, if the die is tested without any neighbour dies, or is surrounded by a set of neighbour dies at an extension ratio of 1.1. Moreover, the dependence between the measurement results and neighbour cases for different extension ratios is also investigated. Then, a modified calibration method is proposed and studied. The proposed technique can be used to improve the calibration and measurement accuracy of the test equipment used for measurement of wafer-level FCLED dies in production lines.

Aging Studies of Cu-Sn Intermetallics in Cu Micropillars Used in Flip Chip Attachment onto Cu Lead Frames

NASA Astrophysics Data System (ADS)

Roma, Maria Penafrancia C.; Kudtarkar, Santosh; Kierse, Oliver; Sengupta, Dipak; Cho, Junghyun

2018-02-01

Copper micropillars plated onto a silicon die and soldered with Sn-Ag solder to a copper lead frame in a flip chip on lead package have been subjected to high-temperature storage at 150°C and 175°C for 500 h, 1000 h, and 1500 h. Cu6Sn5 and Cu3Sn intermetallic compounds were found on both sides of the solder, but the growth rates were not the same as evidenced by different values of the growth exponent n. Cu and Sn diffusion controlled the Cu3Sn growth in the Cu pillar interface ( n ≈ 0.5), while interface reactions controlled the growth in the Cu lead frame interface ( n ≈ 0.8). Increasing the aging temperature increased the growth of Cu3Sn as well as the presence of microvoids in the Cu lead frame side. Adding Ni as a barrier layer on the Cu pillar prevented the growth of Cu3Sn in the Cu pillar interface and reduced its growth rate on the lead frame side, even at higher aging temperatures.

The flipped classroom for professional development: part I. Benefits and strategies.

PubMed

McDonald, Katie; Smith, Charlene M

2013-10-01

Individualizing the educational encounter is supported by flipping the classroom experience. This column offers an overview and describes the benefits of flipping the classroom. Part II will explore the practicalities and pedagogy of lecture capture using podcasts and videos, a technology strategy used in flipping the classroom. Copyright 2013, SLACK Incorporated.

On-chip detection of non-classical light by scalable integration of single-photon detectors

PubMed Central

Najafi, Faraz; Mower, Jacob; Harris, Nicholas C.; Bellei, Francesco; Dane, Andrew; Lee, Catherine; Hu, Xiaolong; Kharel, Prashanta; Marsili, Francesco; Assefa, Solomon; Berggren, Karl K.; Englund, Dirk

2015-01-01

Photonic-integrated circuits have emerged as a scalable platform for complex quantum systems. A central goal is to integrate single-photon detectors to reduce optical losses, latency and wiring complexity associated with off-chip detectors. Superconducting nanowire single-photon detectors (SNSPDs) are particularly attractive because of high detection efficiency, sub-50-ps jitter and nanosecond-scale reset time. However, while single detectors have been incorporated into individual waveguides, the system detection efficiency of multiple SNSPDs in one photonic circuit—required for scalable quantum photonic circuits—has been limited to <0.2%. Here we introduce a micrometer-scale flip-chip process that enables scalable integration of SNSPDs on a range of photonic circuits. Ten low-jitter detectors are integrated on one circuit with 100% device yield. With an average system detection efficiency beyond 10%, and estimated on-chip detection efficiency of 14–52% for four detectors operated simultaneously, we demonstrate, to the best of our knowledge, the first on-chip photon correlation measurements of non-classical light. PMID:25575346

Electromigration and solid state aging of flip chip solder joints and analysis of tin whisker on lead-frame

NASA Astrophysics Data System (ADS)

Lee, Taekyeong

Electromigration and solid state aging in flip chip joint, and whisker on lead frame of Pb-containing (eutectic SnPb) and Pb-free solders (SnAg 3.5, SnAg3.8Cu0.7, and SnCu0.7), have been studied systematically, using Scanning Electron Microscopy (SEM), Energy Dispersive X-ray Analysis (EDX), and synchrotron radiation. The high current density in flip chip joint drives the diffusion of atoms of eutectic SnPb and SnAgCu. A marker is used to measure the diffusion flux in a half cross-sectioned solder joint. SnAgCu shows higher resistance against electromigration than eutectic SnPb. In the half cross-sectioned solder joint, void growth is the dominant failure mechanism. However, the whole solder balls in the underfill show that the failure mechanism is a result from the dissolution of electroless Ni under bump metallization (UBM) of about 10 mum thickness. The growth rate between intermetallic compounds in molten and solid solders differed by four orders of magnitude. In liquid solder, the growth rate is about 1 mum/min; the growth rate in solid solder is only about 10 -4 mum/min. The difference is not resulting from factors of thermodynamics, which is the change of Gibbs free energy before and after intermetallic compound formation, but from kinetic factors, which is the rate of change of Gibbs free energy. Even though the difference in growth rate between eutectic SnPb and Pb-free solders during solid state aging was found, the reason behind such difference shown is unclear. The orientation and stress levels of whiskers are measured by white X-ray of synchrotron radiation. The growth direction is nearly parallel to one of the principal axes of tin. The compressive stress level is quite low because the residual stress is relaxed by the whisker growth.

Backside contacted field effect transistor array for extracellular signal recording.

PubMed

Ingebrandt, S; Yeung, C K; Staab, W; Zetterer, T; Offenhäusser, A

2003-04-01

A new approach to the design of field-effect transistor (FET) sensors and the use of these FETs in detecting extracellular electrophysiological recordings is reported. Backside contacts were engineered by deep reactive ion etching and a gas phase boron doping process of the holes using planar diffusion sources. The metal contacts were designed to fit on top of the bonding pads of a standard industrial 22-pin DIL (dual inline) chip carrier. To minimise contact resistance, the metal backside contacts of the chips were electroless plated with gold. The chips were mounted on top of the bonding pads using a standard flip-chip process and a fineplacer unit previously described. Rat embryonic myocytes were cultured on these new devices (effective growth area 6 x 6 mm(2)) in order to confirm their validity in electrophysiological recording. Copyright 2003 Elsevier Science B.V.

Broadband and scalable optical coupling for silicon photonics using polymer waveguides

NASA Astrophysics Data System (ADS)

La Porta, Antonio; Weiss, Jonas; Dangel, Roger; Jubin, Daniel; Meier, Norbert; Horst, Folkert; Offrein, Bert Jan

2018-04-01

We present optical coupling schemes for silicon integrated photonics circuits that account for the challenges in large-scale data processing systems such as those used for emerging big data workloads. Our waveguide based approach allows to optimally exploit the on-chip optical feature size, and chip- and package real-estate. It further scales well to high numbers of channels and is compatible with state-of-the-art flip-chip die packaging. We demonstrate silicon waveguide to polymer waveguide coupling losses below 1.5 dB for both the O- and C-bands with a polarisation dependent loss of <1 dB. Over 100 optical silicon waveguide to polymer waveguide interfaces were assembled within a single alignment step, resulting in a physical I/O channel density of up to 13 waveguides per millimetre along the chip-edge, with an average coupling loss of below 3.4 dB measured at 1310 nm.

The Benefits, Drawbacks, and Challenges of Using the Flipped Classroom in an Introduction to Psychology Course

ERIC Educational Resources Information Center

Roehling, Patricia V.; Root Luna, Lindsey M.; Richie, Fallon J.; Shaughnessy, John J.

2017-01-01

Flipped pedagogy has become a popular approach in education. While preliminary research suggests that the flipped classroom has a positive effect on learning in Science, Technology, Engineering, and Mathematics and quantitative courses, the research on the flipped classroom in a content heavy social science course is minimal and contradictory. We…

New Technology for Microfabrication and Testing of a Thermoelectric Device for Generating Mobile Electrical Power

NASA Technical Reports Server (NTRS)

Prasad, Narashimha S.; Taylor, Patrick J.; Trivedi, Sudhir B.; Kutcher, Susan

2010-01-01

We report the results of fabrication and testing of a thermoelectric power generation module. The module was fabricated using a new "flip-chip" module assembly technique that is scalable and modular. This technique results in a low value of contact resistivity ( < or = 10(exp 5) Ohms-sq cm). It can be used to leverage new advances in thin-film and nanostructured materials for the fabrication of new miniature thermoelectric devices. It may also enable monolithic integration of large devices or tandem arrays of devices on flexible or curved surfaces. Under mild testing, a power of 22 mW/sq cm was obtained from small (<100 K) temperature differences. At higher, more realistic temperature differences, approx.500 K, where the efficiency of these materials greatly improves, this power density would scale to between 0.5 and 1 Watt/cm2. These results highlight the excellent potential for the generation and scavenging of electrical power of practical and usable magnitude for remote applications using thermoelectric power generation technologies.

Enhancement of structural stiffness in MEMS structures

NASA Astrophysics Data System (ADS)

Ilias, Samir; Picard, Francis; Topart, Patrice; Larouche, Carl; Jerominek, Hubert

2006-01-01

Many optical applications require smooth micromirror reflective surfaces with large radius of curvature. Usually when using surface micromachining technology and as a result of residual stress and stress gradient in thin films, the control of residual curvature is a difficult task. In this work, two engineering approaches were developed to enhance structural stiffness of micromirrors. 1) By integrating stiffening structures and thermal annealing. The stiffening structures consist of U-shaped profiles integrated with the mirror (dimension 200×300 μm2). 2) By combining selective electroplating and flip-chip based technologies. Nickel was used as electroplated material with optimal stress values around +/-10 MPa for layer thicknesses of about 10 μm. With the former approach, typical curvature radii of about 1.5 cm and 0.6 cm along mirror width and length were obtained, respectively. With the latter approach, an important improvement in the micromirror planarity and flatness was achieved with curvature radius up to 23 cm and roughness lower than 5 nm rms for typical 1000×1000 μm2 micromirrors.

Recent advances in the science and technology for solid state lighting

NASA Astrophysics Data System (ADS)

Munkholm, Anneli

2003-03-01

Recent development of high power light emitting diodes (LEDs) has enabled fabrication of solid state devices with efficiencies that surpass that of incandescent light, as well as providing a total light output significantly exceeding that of conventional indicator LEDs. This breakthrough in high flux is opening up new applications for use of high power LEDs, such as liquid crystal display backlighting and automotive headlights. Some of the key elements to this technological breakthrough are the flip-chip device design, power packaging and phosphor coating technology, which will be discussed. In addition to device design improvements, our fundamental knowledge of the III-nitride material system is improving and has resulted in higher internal quantum efficiencies. Strain plays a significant role in complex AlInGaN heterostructures used in current devices. Using a multi-beam optical strain sensor (MOSS) system to measure the wafer curvature in situ, we have characterized the strain during metal-organic chemical vapor deposition of III-nitrides. Strain measurements of InGaN, AlGaN and Si-doped GaN films on GaN will be presented.

Transient thermal characteristics of high-temperature SiC power module enhanced with Al-bump technology

NASA Astrophysics Data System (ADS)

Tanisawa, Hidekazu; Kato, Fumiki; Koui, Kenichi; Sato, Shinji; Watanabe, Kinuyo; Takahashi, Hiroki; Murakami, Yoshinori; Sato, Hiroshi

2018-04-01

In this paper, we demonstrate a mounting technology that improves the tolerance to transient power loss by adding a heat capacity near the device. Silicon carbide (SiC) power devices can operate at high temperatures, up to 250 °C, at which silicon (Si) power devices cannot. Therefore, it is possible to allow a large temperature difference between the device and ambient air. Thus, the size of a power converter equipped with an SiC power module is reduced by simplifying the cooling system. The temperature of the power module is important not only in the steady state, but in transient loads as well. Therefore, we developed the Al-bump flip-chip mounting technology to increase heat capacity near the device. With this proposed structure, the heat capacity per device increased by 1.7% compared with the total heat capacity of the conventional structure using wire bonding. The reduction in transient thermal impedance is observed from 0.003 to 3 s, and we confirmed that the transient thermal impedance is reduced very efficiently by 15% at the maximum, compared with the conventional structure.

The 21st century Museum Climatic Monitoring System

NASA Astrophysics Data System (ADS)

Liu, W.-S.

2015-08-01

Technology has provided us work convenience and shaped our quality of life; it has enabled an unprecedented level of access to knowledge by flipping screen of a hand-held electronic device without going elsewhere but stay connected wireless communication. This kind of technology has been broadly acquired at museums in Hong Kong for preserving their valuable collections. Similar gadget was applied on the monitoring system to record climatic conditions of museum's stores and galleries. Sensors have been equipped with chips for the wireless transmission of RH/Temp, without installation of any conduit or LAN lines. Useful and important data will then be grouped into a packet format for efficient delivery. As long as the static IP address of the target workstation has been set, data can be accurately retrieved from one place to another via commercially available browsers, such as: Firefox or Internet Explorer, even on hand-held electronic devices. This paper will discuss the detail of this system, its pros and cons in comparison with the old model. After all, the new technology is highly significant in supporting the current needs and the future developments of the museum service.

To What Extent Does 'Flipping' Make Lessons Effective in a Multimedia Production Class?

ERIC Educational Resources Information Center

Choi, Jaeho; Lee, Youngju

2018-01-01

This study examines the effects of a flipped classroom in a technology integration course for pre-service teachers. In total, 79 students were randomly assigned into a flipped classroom or a traditional classroom group and given three multimedia production tasks. Students in the flipped group reviewed an e-book for lessons on multimedia…

Development of chip passivated monolithic complementary MISFET circuits with beam leads

NASA Technical Reports Server (NTRS)

Ragonese, L. J.; Kim, M. J.; Corrie, B. L.; Brouillette, J. W.; Warr, R. E.

1972-01-01

The results are presented of a program to demonstrate the processes for fabricating complementary MISFET beam-leaded circuits, which, potentially, are comparable in quality to available bipolar beam-lead chips that use silicon nitride passivation in conjunction with a platinum-titanium-gold metal system. Materials and techniques, different from the bipolar case, were used in order to be more compatible with the special requirements of fully passivated complementary MISFET devices. Two types of circuits were designed and fabricated, a D-flip-flop and a three-input NOR/NAND gate. Fifty beam-leaded chips of each type were constructed. A quality and reliability assurance program was performed to identify failure mechanisms. Sample tests and inspections (including destructive) were developed to measure the physical characteristics of the circuits.

A Framework for Flipped Learning

ERIC Educational Resources Information Center

Eppard, Jenny; Rochdi, Aicha

2017-01-01

Over the last few decades, with the rapid developments of mobile technology, the advent of Web 2.0 sites, and the expansion of social media, there has been an incremental use of technology in the classroom. One of the approaches for technological integration into the classroom is via flipped learning. This pedagogical method has become…

Miniaturized tool for optogenetics based on an LED and an optical fiber interfaced by a silicon housing.

PubMed

Schwaerzle, M; Elmlinger, P; Paul, O; Ruther, P

2014-01-01

This paper reports on the design, simulation, fabrication and characterization of a tool for optogenetic experiments based on a light emitting diode (LED). A minimized silicon (Si) interface houses the LED and aligns it to an optical fiber. With a Si housing size of 550×500×380 μm(3) and an electrical interconnection of the LED by a highly flexible polyimide (PI) ribbon cable is the system very variable. PI cables and Si housings are fabricated using established microsystem technologies. A 270×220×50 μm(3) bare LED chip is flip-chip-bonded onto the PI cable. The Si housing is adhesively attached to the PI cable, thereby hosting the LED in a recess. An opposite recess guides the optical fiber with a diameter of 125 μm. An aperture in-between restricts the emitted LED light to the fiber core. The optical fiber is adhesively fixed into the Si housing recess. An optical output intensity at the fiber end facet of 1.71 mW/mm(2) was achieved at a duty cycle of 10 % and a driving current of 30 mA.

Upset due to a single particle caused propagated transients in a bulk CMOS microprocessor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Leavy, J.F.; Hoffmann, L.F.; Shoran, R.W.

1991-12-01

This paper reports on data pattern advances observed in preset, single event upset (SEU) hardened clocked flip-flops, during static Cf-252 exposures on a bulk CMOS microprocessor, that were attributable to particle caused anomalous clock signals, or propagated transients. SPICE simulations established that particle strikes in the output nodes of a clock control logic flip-flop could produce transients of sufficient amplitude and duration to be accepted as legitimate pulses by clock buffers fed by the flip-flop's output nodes. The buffers would then output false clock pulses, thereby advancing the state of the present flip-flops. Masking the clock logic on one ofmore » the test chips made the flip-flop data advance cease, confirming the clock logic as the source of the SEU. By introducing N{sub 2} gas, at reduced pressures, into the SEU test chamber to attenuate Cf-252 particle LET's, a 24-26 MeV-cm{sup 2}/mg LET threshold was deduced. Subsequent tests, at the 88-inch cyclotron at Berkeley, established an LET threshold of 30 MeV-cm{sup 2}/mg (283 MeV Cu at 0{degrees}) for the generation of false clocks. Cyclotron SEU tests are considered definitive, while Cf-252 data usually is not. However, in this instance Cf-252 tests proved analytically useful, providing SEU characterization data that was both timely and inexpensive.« less

Flipping the Classroom and Instructional Technology Integration in a College-Level Information Systems Spreadsheet Course

ERIC Educational Resources Information Center

Davies, Randall S.; Dean, Douglas L.; Ball, Nick

2013-01-01

The purpose of this research was to explore how technology can be used to teach technological skills and to determine what benefit "flipping" the classroom might have for students taking an introductory-level college course on spreadsheets in terms of student achievement and satisfaction with the class. A pretest posttest…

A new on-chip all-digital three-phase full-bridge dc/ac power inverter with feedforward and frequency control techniques.

PubMed

Chen, Jiann-Jong; Kung, Che-Min

2010-09-01

The communication speed between components is far from satisfactory. To achieve high speed, simple control system configuration, and low cost, a new on-chip all-digital three-phase dc/ac power inverter using feedforward and frequency control techniques is proposed. The controller of the proposed power inverter, called the shift register, consists of six-stage D-latch flip-flops with a goal of achieving low-power consumption and area efficiency. Variable frequency is achieved by controlling the clocks of the shift register. One advantage regarding the data signal (D) and the common clock (CK) is that, regardless of the phase difference between the two, all of the D-latch flip-flops are capable of delaying data by one CK period. To ensure stability, the frequency of CK must be six times higher than that of D. The operation frequency of the proposed power inverter ranges from 10 Hz to 2 MHz, and the maximum output loading current is 0.8 A. The prototype of the proposed circuit has been fabricated with TSMC 0.35 μm 2P4M CMOS processes. The total chip area is 2.333 x 1.698 mm2. The three-phase dc/ac power inverter is applicable in uninterrupted power supplies, cold cathode fluorescent lamps, and motors, because of its ability to convert the dc supply voltage into the three-phase ac power sources.

On Flipping First-Semester Calculus: A Case Study

ERIC Educational Resources Information Center

Petrillo, Joseph

2016-01-01

High failure rates in calculus have plagued students, teachers, and administrators for decades, while science, technology, engineering, and mathematics programmes continue to suffer from low enrollments and high attrition. In an effort to affect this reality, some educators are "flipping" (or inverting) their classrooms. By flipping, we…

Flipping to Teach the Conceptual Foundations of Successful Workplace Writing

ERIC Educational Resources Information Center

Campbell, Kim Sydow

2016-01-01

Flipping originated in science, technology, engineering, and mathematics fields, where didactic transmission of conceptual knowledge has been the standard pedagogy. Flipping has resulted in additional focus on procedural knowledge within class meetings. This article argues that business and professional writing pedagogy, which already focuses…

Comparative experimental and simulation studies of high-power AlGaN-based 353 nm ultraviolet flip-chip and top-emitting LEDs

NASA Astrophysics Data System (ADS)

Liu, Mengling; Zhou, Shengjun; Liu, Xingtong; Gao, Yilin; Ding, Xinghuo

2018-03-01

Experimental and simulation studies of high-power AlGaN-based 353 nm ultraviolet (UV) flip-chip (FC) and top-emitting (TE) light-emitting diodes (LEDs) are performed here. To improve the optical and electrical properties of ultraviolet LEDs, we fabricate high-power FC-UV LEDs with Ta2O5/SiO2 distributed Bragg reflectors (DBRs) and a strip-shaped SiO2 current blocking layer (CBL). The reflectance of fourteen pairs of Ta2O5/SiO2 DBRs is 96.4% at 353 nm. The strip-shaped SiO2 CBL underneath the strip-shaped p-electrode can prevent the current concentrating in regions immediately adjacent to the p-electrode where the overlying opaque p-electrode metal layer absorbs the emitted UV light. Moreover, two-level metallization electrodes are used to improve current spreading. Our numerical results show that FC-UV LED has a more favorable current spreading uniformity than TE-UV LED. The light output power of 353 nm FC-UV LED was 23.22 mW at 350 mA, which is 24.7% higher than that of TE-UV LED.

Semiconductor laser joint study program with Rome Laboratory

NASA Astrophysics Data System (ADS)

Schaff, William J.; Okeefe, Sean S.; Eastman, Lester F.

1994-09-01

A program to jointly study vertical-cavity surface emitting lasers (VCSEL) for high speed vertical optical interconnects (VOI) has been conducted under an ES&E between Rome Laboratory and Cornell University. Lasers were designed, grown, and fabricated at Cornell University. A VCSEL measurement laboratory has been designed, built, and utilized at Rome Laboratory. High quality VCSEL material was grown and characterized by fabricating conventional lateral cavity lasers that emitted at the design wavelength of 1.04 microns. The VCSEL's emit at 1.06 microns. Threshold currents of 16 mA at 4.8 volts were obtained for 30 microns diameter devices. Output powers of 5 mW were measured. This is 500 times higher power than from the light emitting diodes employed previously for vertical optical interconnects. A new form of compositional grading using a cosinusoidal function has been developed and is very successful for reducing diode series resistance for high speed interconnection applications. A flip-chip diamond package compatible with high speed operation of 16 VCSEL elements has been designed and characterized. A flip-chip device binding effort at Rome Laboratory was also designed and initiated. This report presents details of the one-year effort, including process recipes and results.

Nucleation rates of Sn in undercooled Sn-Ag-Cu flip-chip solder joints

NASA Astrophysics Data System (ADS)

Arfaei, B.; Benedict, M.; Cotts, E. J.

2013-11-01

The nucleation of Sn from the melt in commercial SnAgCu flip chip solder joints was monitored at a number of different temperatures. Nucleation rates were estimated from measurements of nucleation times for 440 solder balls after one reflow and were found to be well epitomized by the expression I = 2 × 109 exp[(-1.6 × 105)/(T × (ΔT)2)] m-3 s-1, as per classical nucleation theory. After an additional reflow, the nucleation rates of the same 440 samples were observed to increase to I = 2 × 109 exp[(-8.9 × 104)/(T × (ΔT)2)] m-3 s-1. Thus it was shown that the expressions of classical nucleation theory well characterize nucleation kinetics for this system. These changes in nucleation kinetics were correlated with continued dissolution of Al and Ni in to the SnAgCu melt. Such increases in nucleation rates meant increases in the average solidification temperatures of the solder balls after reflow. Variations in the Sn grain morphology of the solder joints were correlated with these changes in solidification temperature, with larger Sn grains (beach ball Sn grain morphology) observed at higher solidification temperatures.

Reversible Flip-Flops in Quantum-Dot Cellular Automata

NASA Astrophysics Data System (ADS)

Rad, Samaneh Kazemi; Heikalabad, Saeed Rasouli

2017-09-01

Quantum-dot cellular automata is a new technology to design the efficient combinational and sequential circuits at the nano-scale. This technology has many desirable advantages compared to the CMOS technology such as low power consumption, less occupation area and low latency. These features make it suitable for use in flip-flop design. In this paper, with knowing the characteristics of reversible logic, we design new structures for flip-flops. The operations of these structures are evaluated with QCADesigner Version 2.0.3 simulator. In addition, we calculate the power dissipation of these structures by QCAPro tool. The results illustrated that proposed structures are efficient compared to the previous ones.

Grounding the Flipped Classroom Approach in the Foundations of Educational Technology

ERIC Educational Resources Information Center

Lo, Chung Kwan

2018-01-01

The flipped classroom approach is becoming increasingly popular. This instructional approach allows more in-class time to be spent on interactive learning activities, as the direct lecturing component is shifted outside the classroom through instructional videos. However, despite growing interest in the flipped classroom approach, no robust…

Wikis, Workshops and Writing: Strategies for Flipping a College Community Engagement Course

ERIC Educational Resources Information Center

Maloy, Robert W.; Edwards, Sharon A.; Evans, Allison

2014-01-01

This paper describes utilizing wiki technology, small group workshops, and reflective writing assignments to "flip" a community engagement/service-learning course for college undergraduates who are tutoring culturally and linguistically diverse students in K-12 schools. Flipped classrooms are gaining popularity in the teaching of…

A Flipped Course Delivery: A Practitioner Approach with a Case Study

ERIC Educational Resources Information Center

Parkavi, A.; Vetrivelan, N.

2015-01-01

Flipped course is used in well-developed educational institutions and technologically developed countries. It is quite experimental in nature for resource restricted educational institutions and developing countries. In this paper such cases are considered, where faculties make use of free resources available for conducting flipped courses.…

The Perceived Effects of Flipped Teaching on Knowledge Acquisition

ERIC Educational Resources Information Center

Newman, Galen; Kim, Jun-Hyun; Lee, Ryun Jung; Brown, Brandy A.; Huston, Sharon

2016-01-01

Increased demands for technological integration in higher education have resulted in new forms of course instruction. Under a flipped approach, students learn course materials outside the classroom while active learning methods are employed inside. This study focuses on the perceived effects of flipped instruction on knowledge acquisition in…

Adventures in Flipping College Algebra

ERIC Educational Resources Information Center

Van Sickle, Jenna

2015-01-01

This paper outlines the experience of a university professor who implemented flipped learning in two sections of college algebra courses for two semesters. It details how the courses were flipped, what technology was used, advantages, challenges, and results. It explains what students do outside of class, what they do inside class, and discusses…

AE (Acoustic Emission) for Flip-Chip CGA/FCBGA Defect Detection

NASA Technical Reports Server (NTRS)

Ghaffarian, Reza

2014-01-01

C-mode scanning acoustic microscopy (C-SAM) is a nondestructive inspection technique that uses ultrasound to show the internal feature of a specimen. A very high or ultra-high-frequency ultrasound passes through a specimen to produce a visible acoustic microimage (AMI) of its inner features. As ultrasound travels into a specimen, the wave is absorbed, scattered or reflected. The response is highly sensitive to the elastic properties of the materials and is especially sensitive to air gaps. This specific characteristic makes AMI the preferred method for finding "air gaps" such as delamination, cracks, voids, and porosity. C-SAM analysis, which is a type of AMI, was widely used in the past for evaluation of plastic microelectronic circuits, especially for detecting delamination of direct die bonding. With the introduction of the flip-chip die attachment in a package; its use has been expanded to nondestructive characterization of the flip-chip solder bumps and underfill. Figure 1.1 compares visual and C-SAM inspection approaches for defect detection, especially for solder joint interconnections and hidden defects. C-SAM is specifically useful for package features like internal cracks and delamination. C-SAM not only allows for the visualization of the interior features, it has the ability to produce images on layer-by-layer basis. Visual inspection; however, is only superior to C-SAM for the exposed features including solder dewetting, microcracks, and contamination. Ideally, a combination of various inspection techniques - visual, optical and SEM microscopy, C-SAM, and X-ray - need to be performed in order to assure quality at part, package, and system levels. This reports presents evaluations performed on various advanced packages/assemblies, especially the flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. Both external and internal equipment was used for evaluation. The outside facility provided images of the key features that could be detected using the most advanced C-SAM equipment with a skilled operator. Investigation continued using in-house equipment with its limitations. For comparison, representative X-rays of the assemblies were also gathered to show key defect detection features of these non-destructive techniques. Key images gathered and compared are: Compared the images of 2D X-ray and C-SAM for a plastic LGA assembly showing features that could be detected by either NDE technique. For this specific case, X-ray was a clear winner. Evaluated flip-chip CGA and FCBGA assemblies with and without heat sink by C-SAM. Only the FCCGA package that had no heat sink could be fully analyzed for underfill and bump quality. Cross-sectional microscopy did not revealed peripheral delamination features detected by C-SAM. Analyzed a number of fine pitch PBGA assemblies by C-SAM. Even though the internal features of the package assemblies could be detected, C-SAM was unable to detect solder joint failure at either the package or board level. Twenty times touch ups by solder iron with 700degF tip temperature, each with about 5 second duration, did not induce defects to be detected by C-SAM images. Other techniques need to be considered to induce known defects for characterization. Given NASA's emphasis on the use of microelectronic packages and assemblies and quality assurance on workmanship defect detection, understanding key features of various inspection systems that detect defects in the early stages of package and assembly is critical to developing approaches that will minimize future failures. Additional specific, tailored non-destructive inspection approaches could enable low-risk insertion of these advanced electronic packages having hidden and fine features.

Prototype of a gigabit data transmitter in 65 nm CMOS for DEPFET pixel detectors at Belle-II

NASA Astrophysics Data System (ADS)

Kishishita, T.; Krüger, H.; Hemperek, T.; Lemarenko, M.; Koch, M.; Gronewald, M.; Wermes, N.

2013-08-01

This paper describes the recent development of a gigabit data transmitter for the Belle-II pixel detector (PXD). The PXD is an innermost detector currently under development for the upgraded KEK-B factory in Japan. The PXD consists of two layers of DEPFET sensor modules located at 1.8 and 2.2 cm radii. Each module is equipped with three different ASIC types mounted on the detector substrate with a flip-chip technique: (a) SWITCHER for generating steering signals for the DEPFET sensors, (b) DCD for digitizing the signal currents, and (c) DHP for performing data processing and sending the data off the module to the back-end data handling hybrid via ∼ 40 cm Kapton flex and 12-15 m twisted pair (TWP) cables. To meet the requirements of the PXD data transmission, a prototype of the DHP data transmitter has been developed in a 65-nm standard CMOS technology. The transmitter test chip consists of current-mode logic (CML) drivers and a phase-locked loop (PLL) which generates a clock signal for a 1.6 Gbit/s output data stream from an 80 cm reference clock. A programmable pre-emphasis circuit is also implemented in the CML driver to compensate signal losses in the long cable by shaping the transmitted pulse response. The jitter performance was measured as 25 ps (1 σ distribution) by connecting the chip with 38 cm flex and 10 m TWP cables.

Mitigating leakage errors due to cavity modes in a superconducting quantum computer

NASA Astrophysics Data System (ADS)

McConkey, T. G.; Béjanin, J. H.; Earnest, C. T.; McRae, C. R. H.; Pagel, Z.; Rinehart, J. R.; Mariantoni, M.

2018-07-01

A practical quantum computer requires quantum bit (qubit) operations with low error probabilities in extensible architectures. We study a packaging method that makes it possible to address hundreds of superconducting qubits by means of coaxial Pogo pins. A qubit chip is housed in a superconducting box, where both box and chip dimensions lead to unwanted modes that can interfere with qubit operations. We analyze these interference effects in the context of qubit coherent leakage and qubit decoherence induced by damped modes. We propose two methods, half-wave fencing and antinode pinning, to mitigate the resulting errors by detuning the resonance frequency of the modes from the qubit frequency. We perform electromagnetic field simulations indicating that the resonance frequency of the modes increases with the number of installed pins and can be engineered to be significantly higher than the highest qubit frequency. We estimate that the error probabilities and decoherence rates due to suitably shifted modes in realistic scenarios can be up to two orders of magnitude lower than the state-of-the-art superconducting qubit error and decoherence rates. Our methods can be extended to different types of packages that do not rely on Pogo pins. Conductive bump bonds, for example, can serve the same purpose in qubit architectures based on flip chip technology. Metalized vias, instead, can be used to mitigate modes due to the increasing size of the dielectric substrate on which qubit arrays are patterned.

Chip-scale thermal management of high-brightness LED packages

NASA Astrophysics Data System (ADS)

Arik, Mehmet; Weaver, Stanton

2004-10-01

The efficiency and reliability of the solid-state lighting devices strongly depend on successful thermal management. Light emitting diodes, LEDs, are a strong candidate for the next generation, general illumination applications. LEDs are making great strides in terms of lumen performance and reliability, however the barrier to widespread use in general illumination still remains the cost or $/Lumen. LED packaging designers are pushing the LED performance to its limits. This is resulting in increased drive currents, and thus the need for lower thermal resistance packaging designs. As the power density continues to rise, the integrity of the package electrical and thermal interconnect becomes extremely important. Experimental results with high brightness LED packages show that chip attachment defects can cause significant thermal gradients across the LED chips leading to premature failures. A numerical study was also carried out with parametric models to understand the chip active layer temperature profile variation due to the bump defects. Finite element techniques were utilized to evaluate the effects of localized hot spots at the chip active layer. The importance of "zero defects" in one of the more popular interconnect schemes; the "epi down" soldered flip chip configuration is investigated and demonstrated.

A Flipped First-Year Digital Circuits Course for Engineering and Technology Students

ERIC Educational Resources Information Center

Yelamarthi, Kumar; Drake, Eron

2015-01-01

This paper describes a flipped and improved first-year digital circuits (DC) course that incorporates several active learning strategies. With the primary objective of increasing student interest and learning, an integrated instructional design framework is proposed to provide first-year engineering and technology students with practical knowledge…

Student Learning and Perceptions in a Flipped Linear Algebra Course

ERIC Educational Resources Information Center

Love, Betty; Hodge, Angie; Grandgenett, Neal; Swift, Andrew W.

2014-01-01

The traditional lecture style of teaching has long been the norm in college science, technology, engineering, and mathematics (STEM) courses, but an innovative teaching model, facilitated by recent advances in technology, is gaining popularity across college campuses. This new model inverts or "flips" the usual classroom paradigm, in…

Design and realization of 144 x 7 TDI ROIC with hybrid integrated test structure

NASA Astrophysics Data System (ADS)

Ceylan, Omer; Kayahan, Huseyin; Yazici, Melik; Baran, Muhammet Burak; Gurbuz, Yasar

2012-06-01

Design and realization of a 144x7 silicon readout integrated circuit (ROIC) based on switched capacitor TDI for MCT LWIR scanning type focal plane arrays (FPAs) and its corresponding hybrid integrated test circuits are presented. TDI operation with 7 detectors improves the SNR of the system by a factor of √7, while oversampling rate of 3 improves the spatial resolution of the system. ROIC supports bidirectional scan, 5 adjustable gain settings, bypass operation, automatic gain adjustment in case of mulfunctioning pixels and pixel select/deselect properties. Integration time of the system can be determined by the help of an external clock. Programming of ROIC can be done in parallel or serial mode according to the needs of the system. All properties except pixel select/deselect property can be performed in parallel mode, while pixel select/deselect property can be performed only in serial mode. ROIC can handle up to 3.75V dynamic range with a load of 25pF and output settling time of 80ns. Input referred noise of the ROIC is less than 750 rms electrons, while the power consumption is less than 100mW. To test ROIC in absence of detector array, a process and temperature compensated current reference array, which supplies uniform input current in range of 1-50nA to ROIC, is designed and measured both in room and cryogenic (77ºK) temperatures. Standard deviations of current reference arrays are measured 3.26% for 1nA and 0.99% for 50nA. ROIC and current reference array are fabricated seperately, and then flip-chip bonded for the test of the system. Flip-chip bonded system including ROIC and current reference test array is successfully measured both in room and cryogenic temperatures, and measurement results are presented. The manufacturing technology is 0.35μm, double poly-Si, four metal, 5V CMOS process.

Optimization of Indium Bump Morphology for Improved Flip Chip Devices

NASA Technical Reports Server (NTRS)

Jones, Todd J.; Nikzad, Shouleh; Cunningham, Thomas J.; Blazejewski, Edward; Dickie, Matthew R.; Hoenk, Michael E.; Greer, Harold F.

2011-01-01

Flip-chip hybridization, also known as bump bonding, is a packaging technique for microelectronic devices that directly connects an active element or detector to a substrate readout face-to-face, eliminating the need for wire bonding. In order to make conductive links between the two parts, a solder material is used between the bond pads on each side. Solder bumps, composed of indium metal, are typically deposited by thermal evaporation onto the active regions of the device and substrate. While indium bump technology has been a part of the electronic interconnect process field for many years and has been extensively employed in the infrared imager industry, obtaining a reliable, high-yield process for high-density patterns of bumps can be quite difficult. Under the right conditions, a moderate hydrogen plasma exposure can raise the temperature of the indium bump to the point where it can flow. This flow can result in a desirable shape where indium will efficiently wet the metal contact pad to provide good electrical contact to the underlying readout or imager circuit. However, it is extremely important to carefully control this process as the intensity of the hydrogen plasma treatment dramatically affects the indium bump morphology. To ensure the fine-tuning of this reflow process, it is necessary to have realtime feedback on the status of the bumps. With an appropriately placed viewport in a plasma chamber, one can image a small field (a square of approximately 5 millimeters on each side) of the bumps (10-20 microns in size) during the hydrogen plasma reflow process. By monitoring the shape of the bumps in real time using a video camera mounted to a telescoping 12 magnifying zoom lens and associated optical elements, an engineer can precisely determine when the reflow of the bumps has occurred, and can shut off the plasma before evaporation or de-wetting takes place.

Advancing MEMS Technology Usage through the MUMPS (Multi-User MEMS Processes) Program

NASA Technical Reports Server (NTRS)

Koester, D. A.; Markus, K. W.; Dhuler, V.; Mahadevan, R.; Cowen, A.

1995-01-01

In order to help provide access to advanced micro-electro-mechanical systems (MEMS) technologies and lower the barriers for both industry and academia, the Microelectronic Center of North Carolina (MCNC) and ARPA have developed a program which provides users with access to both MEMS processes and advanced electronic integration techniques. The four distinct aspects of this program, the multi-user MEMS processes (MUMP's), the consolidated micro-mechanical element library, smart MEMS, and the MEMS technology network are described in this paper. MUMP's is an ARPA-supported program created to provide inexpensive access to MEMS technology in a multi-user environment. It is both a proof-of-concept and educational tool that aids in the development of MEMS in the domestic community. MUMP's technologies currently include a 3-layer poly-silicon surface micromachining process and LIGA (lithography, electroforming, and injection molding) processes that provide reasonable design flexibility within set guidelines. The consolidated micromechanical element library (CaMEL) is a library of active and passive MEMS structures that can be downloaded by the MEMS community via the internet. Smart MEMS is the development of advanced electronics integration techniques for MEMS through the application of flip chip technology. The MEMS technology network (TechNet) is a menu of standard substrates and MEMS fabrication processes that can be purchased and combined to create unique process flows. TechNet provides the MEMS community greater flexibility and enhanced technology accessibility.

Wafer-level vacuum/hermetic packaging technologies for MEMS

NASA Astrophysics Data System (ADS)

Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil

2010-02-01

An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.

Researching into a MOOC Embedded Flipped Classroom Model for College English Reading and Writing Course

ERIC Educational Resources Information Center

Xinying, Zhang

2017-01-01

There is obvious pressure for higher education institutions to undergo transformation now in China. Reflecting this, the computer and information technology give rise to the development of a Massive Open Online Course (MOOC) embedded flipped classroom. Flipped classroom approaches replace the traditional transmissive teaching with engaging…

Diverse Perspectives on a Flipped Biostatistics Classroom

ERIC Educational Resources Information Center

Schwartz, Todd A.; Andridge, Rebecca R.; Sainani, Kirstin L.; Stangle, Dalene K.; Neely, Megan L.

2016-01-01

"Flipping" the classroom refers to a pedagogical approach in which students are first exposed to didactic content outside the classroom and then actively use class time to apply their newly attained knowledge. The idea of the flipped classroom is not new, but has grown in popularity in recent years as the necessary technology has…

The Flipped Classroom: Implementing Technology to Aid in College Mathematics Student's Success

ERIC Educational Resources Information Center

Buch, George R.; Warren, Carryn B.

2017-01-01

August 2016 there was a call (Braun, Bremser, Duval, Lockwood & White, 2017) for post-secondary instructors to use active learning in their classrooms. Once such example of active learning is what is called the "flipped" classroom. This paper presents the need for, and the methodology of the flipped classroom, results of…

Exploring a Flipped Classroom Approach in a Japanese Language Classroom: A Mixed Methods Study

ERIC Educational Resources Information Center

Prefume, Yuko Enomoto

2015-01-01

A flipped classroom approach promotes active learning and increases teacher-student interactions by maximizing face-to-face class time (Hamdan, McKnight, Mcknight, Arfstrom, & Arfstrom, 2013). In this study, "flipped classroom" is combined with the use of technology and is described as an instructional approach that provides lectures…

Flipping a College Calculus Course: A Case Study

ERIC Educational Resources Information Center

Sahin, Alpaslan; Cavlazoglu, Baki; Zeytuncu, Yunus E.

2015-01-01

As online videos have become more easily available and more attractive to the new generation of students, and as new student-learning approaches tend to have more technology integration, the flipped classroom model has become very popular. The purpose of this study was to understand college students' views on flipped courses and investigate how…

Is the Flipped Classroom Model for All? Correspondence Analysis from Trainee Instructional Media Designers

ERIC Educational Resources Information Center

Pellas, Nikolaos

2018-01-01

The educational potentials and challenges of "flipping" a classroom are today well-documented. However, taking into account the contradictory results, literature on the benefits in using the flipped model as a socially inclusive technology-supported instructional design model is still in its infancy. This study seeks to investigate the…

Flipped Classroom Research and Trends from Different Fields of Study

ERIC Educational Resources Information Center

Zainuddin, Zamzami; Halili, Siti Hajar

2016-01-01

This paper aims to analyse the trends and contents of flipped classroom research based on 20 articles that report on flipped learning classroom initiatives from 2013-2015. The content analysis was used as a methodology to investigate methodologies, area of studies, technology tools or online platforms, the most frequently used keywords and works…

A Controlled Study of the Flipped Classroom with Numerical Methods for Engineers

ERIC Educational Resources Information Center

Bishop, Jacob L.

2013-01-01

Recent advances in technology and ideology have unlocked entirely new directions for education research. Mounting pressure from increasing tuition costs and free, online course offerings are opening discussion and catalyzing change in the physical classroom. The flipped classroom is at the center of this discussion. The flipped classroom is a new…

Comment on "Enhancement of flip-chip white light-emitting diodes with a one-dimensional photonic crystal".

PubMed

Liu, Zong-Yuan; Liu, Sheng; Wang, Kai; Luo, Xiao-Bing

2010-06-01

We show that research presented in Opt. Lett.34, 301 (2009)OPLEDP0146-959210.1364/OL.34.000301 applied questionable phosphor definitions and a questionable simulation procedure for light-emitting diodes. Our simulation indicates that a one-dimensional photonic crystal is beneficial for color control but cannot improve the light extraction as asserted in that Letter.

Adaptive Optoelectronic Eyes: Hybrid Sensor/Processor Architectures

DTIC Science & Technology

2006-11-13

corresponding calculated data. The width of the mirror stopband is proportional to the refractive index difference between the high and low index materials ...Silicon VLSI Neuron Unit Arrays 56 Development of a Single-Sided Flip-Chip Bonding Process 65 Development of High Refractive Index Diffractive Optical ...Elements (DOEs) 68 Development of High-Performance Antireflection Coatings for High Refractive Index DOEs 69 Design and Fabrication of Low Threshold

DOE Office of Scientific and Technical Information (OSTI.GOV)

McAdams, Brian J.; Pearson, Raymond A.

With the continuing trend of decreasing feature sizes in flip-chip assemblies, the reliability tolerance to interfacial flaws is also decreasing. Small-scale disbonds will become more of a concern, pointing to the need for a better understanding of the initiation stage of interfacial delamination. With most accepted adhesion metric methodologies tailored to predict failure under the prior existence of a disbond, the study of the initiation phenomenon is open to development and standardization of new testing procedures. Traditional fracture mechanics approaches are not suitable, as the mathematics assume failure to originate at a disbond or crack tip. Disbond initiation is believedmore » to first occur at free edges and corners, which act as high stress concentration sites and exhibit singular stresses similar to a crack tip, though less severe in intensity. As such, a 'fracture mechanics-like' approach may be employed which defines a material parameter--a critical stress intensity factor (K{sub c})--that can be used to predict when initiation of a disbond at an interface will occur. The factors affecting the adhesion of underfill/polyimide interfaces relevant to flip-chip assemblies were investigated in this study. The study consisted of two distinct parts: a comparison of the initiation and propagation phenomena and a comparison of the relationship between sub-critical and critical initiation of interfacial failure. The initiation of underfill interfacial failure was studied by characterizing failure at a free-edge with a critical stress intensity factor. In comparison with the interfacial fracture toughness testing, it was shown that a good correlation exists between the initiation and propagation of interfacial failures. Such a correlation justifies the continuing use of fracture mechanics to predict the reliability of flip-chip packages. The second aspect of the research involved fatigue testing of tensile butt joint specimens to determine lifetimes at sub-critical load levels. The results display an interfacial strength ranking similar to that observed during monotonic testing. The fatigue results indicate that monotonic fracture mechanics testing may be an adequate screening tool to help predict cyclic underfill failure; however lifetime data is required to predict reliability.« less

Design and measurement of fully digital ternary content addressable memory using ratioless static random access memory cells and hierarchical-AND matching comparator

NASA Astrophysics Data System (ADS)

Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki

2018-04-01

A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.

Radiation Hard 0.13 Micron CMOS Library at IHP

NASA Astrophysics Data System (ADS)

Jagdhold, U.

2013-08-01

To support space applications we have developed an 0.13 micron CMOS library which should be radiation hard up to 200 krad. The article describes the concept to come to a radiation hard digital circuit and was introduces in 2010 [1]. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latch-up (SEL). To reduce single event upset (SEU) we add two p-MOS transistors to all flip flops. For reliability reasons we use double contacts in all library elements. The additional rules and the library elements are integrated in our Cadence mixed signal design kit, “Virtuoso” IC6.1 [2]. A test chip is produced with our in house 0.13 micron BiCMOS technology, see Ref. [3]. As next step we will doing radiation tests according the european space agency (ESA) specifications, see Ref. [4], [5].

MEMS-based thermally-actuated image stabilizer for cellular phone camera

NASA Astrophysics Data System (ADS)

Lin, Chun-Ying; Chiou, Jin-Chern

2012-11-01

This work develops an image stabilizer (IS) that is fabricated using micro-electro-mechanical system (MEMS) technology and is designed to counteract the vibrations when human using cellular phone cameras. The proposed IS has dimensions of 8.8 × 8.8 × 0.3 mm3 and is strong enough to suspend an image sensor. The processes that is utilized to fabricate the IS includes inductive coupled plasma (ICP) processes, reactive ion etching (RIE) processes and the flip-chip bonding method. The IS is designed to enable the electrical signals from the suspended image sensor to be successfully emitted out using signal output beams, and the maximum actuating distance of the stage exceeds 24.835 µm when the driving current is 155 mA. Depending on integration of MEMS device and designed controller, the proposed IS can decrease the hand tremor by 72.5%.

Flipping the Science Classroom: Exploring Merits, Issues and Pedagogy

ERIC Educational Resources Information Center

Ng, Wan

2014-01-01

Educators are continually being challenged to think about how best to integrate digital technologies meaningfully and effectively in their classrooms. A current trend in educational technology which has the potential to enable this in a pragmatic manner is the flipped classroom concept. This paper aims to explore the idea in Science teaching and…

Ultra-compact 32 × 32 strictly-non-blocking Si-wire optical switch with fan-out LGA interposer.

PubMed

Tanizawa, Ken; Suzuki, Keijiro; Toyama, Munehiro; Ohtsuka, Minoru; Yokoyama, Nobuyuki; Matsumaro, Kazuyuki; Seki, Miyoshi; Koshino, Keiji; Sugaya, Toshio; Suda, Satoshi; Cong, Guangwei; Kimura, Toshio; Ikeda, Kazuhiro; Namiki, Shu; Kawashima, Hitoshi

2015-06-29

We demonstrate a 32 × 32 path-independent-insertion-loss optical path switch that integrates 1024 thermooptic Mach-Zehnder switches and 961 intersections on a small, 11 × 25 mm2 die. The switch is fabricated on a 300-mm-diameter silicon-on-insulator wafer by a complementary metal-oxide semiconductor-compatible process with advanced ArF immersion lithography. For reliable electrical packaging, the switch chip is flip-chip bonded to a ceramic interposer that arranges the electrodes in a 0.5-mm pitch land grid array. The on-chip loss is measured to be 15.8 ± 1.0 dB, and successful switching is demonstrated for digital-coherent 43-Gb/s QPSK signals. The total crosstalk of the switch is estimated to be less than -20 dB at the center wavelength of 1545 nm. The bandwidth narrowing caused by dimensional errors that arise during fabrication is discussed.

Design and fabrication of giant micromirrors using electroplating-based technology

NASA Astrophysics Data System (ADS)

Ilias, Samir; Topart, Patrice A.; Larouche, Carl; Leclair, Sebastien; Jerominek, Hubert

2005-01-01

Giant micromirrors with large scanning deflection and good flatness are required for many space and terrestrial applications. A novel approach to manufacturing this category of micromirrors is proposed. The approach combines selective electroplating and flip-chip based technologies. It allows for large air gaps, flat and smooth active micromirror surfaces and permits independent fabrication of the micromirrors and control electronics, avoiding temperature and sacrificial layer incompatibilities between them. In this work, electrostatically actuated piston and torsion micromirrors were designed and simulated. The simulated structures were designed to allow large deflection, i.e. piston displacement larger than 10 um and torsional deflection up to 35°. To achieve large micromirror deflections, up to seventy micron-thick resists were used as a micromold for nickel and solder electroplating. Smooth micromirror surfaces (roughness lower than 5 nm rms) and large radius of curvature (R as large as 23 cm for a typical 1000x1000 um2 micromirror fabricated without address circuits) were achieved. A detailed fabrication process is presented. First piston mirror prototypes were fabricated and a preliminary evaluation of static deflection of a piston mirror is presented.

The Flipped Classroom, Disruptive Pedagogies, Enabling Technologies and Wicked Problems: Responding to "The Bomb in the Basement"

ERIC Educational Resources Information Center

Hutchings, Maggie; Quinney, Anne

2015-01-01

The adoption of enabling technologies by universities provides unprecedented opportunities for flipping the classroom to achieve student-centred learning. While higher education policies focus on placing students at the heart of the education process, the propensity for student identities to shift from partners in learning to consumers of…

The Effectiveness of a Technology-Enhanced Flipped Science Classroom

ERIC Educational Resources Information Center

Sezer, Baris

2017-01-01

This study examined the effect on the learning and motivation of students of a flipped classroom environment enriched with technology. A mixed research design using a pretest or posttest experimental model, combined with qualitative data, was conducted in a public middle school in Turkey for 2 weeks (three class hours) within a science course.…

The Effect of Flipped Classroom Strategy Using Blackboard Mash-Up Tools in Enhancing Achievement and Self-Regulated Learning Skills of University Students

ERIC Educational Resources Information Center

El-Senousy, Hala; Alquda, Jumana

2017-01-01

The flipped classroom strategy (FCRS) is an innovative instructional approach that flips the traditional teacher-centered classroom into student-centered learning, by switching the classroom and home activities using the available educational technology. This paper examined the effect of (FCRS) on students' achievement and self-regulated learning…

Learning Designs Using Flipped Classroom Instruction (Conception d'apprentissage à l'aide de l'instruction en classe inversée)

ERIC Educational Resources Information Center

Mazur, Amber D.; Brown, Barbara; Jacobsen, Michele

2015-01-01

The flipped classroom is an instructional model that leverages technology-enhanced instruction outside of class time in order to maximize student engagement and learning during class time. As part of an action research study, the authors synthesize reflections about how the flipped classroom model can support teaching, learning and assessment…

A Technology Leader's Role in Initiating a Flipped Classroom in a High School Math Class

ERIC Educational Resources Information Center

Caverly, Gregg

2017-01-01

A mixed methods study was conducted to measure the effectiveness of a flipped classroom in a high school discrete mathematics course. In the flipped classroom, students watched videos of the teacher's lesson for homework while completing problems during class. Two sections of the course were involved in the study, with one group receiving the…

Designing a Technology-Enhanced Flipped Learning System to Facilitate Students' Self-Regulation and Performance

ERIC Educational Resources Information Center

Shyr, Wen-Jye; Chen, Ching-Huei

2018-01-01

In recent years, the flipped classroom has become prevalent in many educational settings. Flipped classroom adopts a pedagogical model in which short video lectures are viewed by students at home before class so that the teacher can lead students to participate in activities, problem-solving, and discussions. Yet the design or use of technology…

Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance

NASA Astrophysics Data System (ADS)

Lee, Tae-Kyu; Chen, Zhiqiang; Guirguis, Cherif; Akinade, Kola

2017-10-01

The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases with higher electric power condition, which brings the component into an elevated temperature environment, thus introducing another consideration factor for mechanical stability of interconnection joints. Since most of the shock performance data available were produced at room temperature, the effect of elevated temperature is of interest to ensure the reliability of the device in a mechanical shock environment. To achieve a stable␣interconnect in a dynamic shock environment, the interconnections must tolerate mechanical strain, which is induced by the shock wave input and reaches the particular component interconnect joint. In this study, large body size (52.5 × 52.5 mm2) FCBGA components assembled on 2.4-mm-thick boards were tested with various isothermal pre-conditions and testing conditions. With a heating element embedded in the test board, a test temperature range from room temperature to 100°C was established. The effects of elevated temperature on mechanical shock performance were investigated. Failure and degradation mechanisms are identified and discussed based on the microstructure evolution and grain structure transformations.

Analysis of light extraction efficiency enhancement for thin-film-flip-chip InGaN quantum wells light-emitting diodes with GaN micro-domes.

PubMed

Zhao, Peng; Zhao, Hongping

2012-09-10

The enhancement of light extraction efficiency for thin-film flip-chip (TFFC) InGaN quantum wells (QWs) light-emitting diodes (LEDs) with GaN micro-domes on n-GaN layer was studied. The light extraction efficiency of TFFC InGaN QWs LEDs with GaN micro-domes were calculated and compared to that of the conventional TFFC InGaN QWs LEDs with flat surface. The three dimensional finite difference time domain (3D-FDTD) method was used to calculate the light extraction efficiency for the InGaN QWs LEDs emitting at 460nm and 550 nm, respectively. The effects of the GaN micro-dome feature size and the p-GaN layer thickness on the light extraction efficiency were studied systematically. Studies indicate that the p-GaN layer thickness is critical for optimizing the TFFC LED light extraction efficiency. Significant enhancement of the light extraction efficiency (2.5-2.7 times for λ(peak) = 460nm and 2.7-2.8 times for λ(peak) = 550nm) is achievable from TFFC InGaN QWs LEDs with optimized GaN micro-dome diameter and height.

Thermal Design and Characterization of Heterogeneously Integrated InGaP/GaAs HBTs

DOE PAGES

Choi, Sukwon; Peake, Gregory M.; Keeler, Gordon A.; ...

2016-04-21

Flip-chip heterogeneously integrated n-p-n InGaP/GaAs heterojunction bipolar transistors (HBTs) with integrated thermal management on wide-bandgap AlN substrates followed by GaAs substrate removal are demonstrated. Without thermal management, substrate removal after integration significantly aggravates self-heating effects, causing poor I–V characteristics due to excessive device self-heating. An electrothermal codesign scheme is demonstrated that involves simulation (design), thermal characterization, fabrication, and evaluation. Thermoreflectance thermal imaging, electrical-temperature sensitive parameter-based thermometry, and infrared thermography were utilized to assess the junction temperature rise in HBTs under diverse configurations. In order to reduce the thermal resistance of integrated devices, passive cooling schemes assisted by structural modification, i.e.,more » positioning indium bump heat sinks between the devices and the carrier, were employed. By implementing thermal heat sinks in close proximity to the active region of flip-chip integrated HBTs, the junction-to-baseplate thermal resistance was reduced over a factor of two, as revealed by junction temperature measurements and improvement of electrical performance. In conclusion, the suggested heterogeneous integration method accounts for not only electrical but also thermal requirements providing insight into realization of advanced and robust III–V/Si heterogeneously integrated electronics.« less

Microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2002-01-01

An apparatus for packaging of microelectronic devices, including an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can include a cofired ceramic frame or body. The package can have an internal stepped structure made of one or more plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination.

Mask pattern generator employing EPL technology

NASA Astrophysics Data System (ADS)

Yoshioka, Nobuyuki; Yamabe, Masaki; Wakamiya, Wataru; Endo, Nobuhiro

2003-08-01

Mask cost is one of crucial issues in device fabrication, especially in SoC (System on a Chip) with small-volume production. The cost mainly depends on productivity of mask manufacturing tools such as mask writers and defect inspection tools. EPL (Electron Projection Lithography) has been developing as a high-throughput electron beam exposure technology that will succeed optical lithography. The application of EPL technology to mask writing will result in high productivity and contribute to decrease the mask cost. The concept of a mask pattern generator employing EPL technology is proposed in this paper. It is very similar to EPL technology used for pattern printing on a wafer. The mask patterns on the glass substrate are exposed by projecting the basic circuit patterns formed on the mother EPL mask. One example of the mother EPL mask is a stencil type made with 200-mm Si wafer. The basic circuit patterns are IP patterns and logical primitive patterns such as cell libraries (AND, OR, Inverter, Flip-Flop and etc.) to express the SoC device patterns. Since the SoC patterns are exposed with its collective units such as IP and logical primitive patterns by using this method, the high throughput will be expected comparing with conventional mask E-beam writers. In this paper, the mask pattern generator with the EPL technology is proposed. The concept, its advantages and issues to be solved are discussed.

White light emitting diode based on InGaN chip with core/shell quantum dots

NASA Astrophysics Data System (ADS)

Shen, Changyu; Hong, Yan; Ma, Jiandong; Ming, Jiangzhou

2009-08-01

Quantum dots have many applications in optoelectronic device such as LEDs for its many superior properties resulting from the three-dimensional confinement effect of its carrier. In this paper, single chip white light-emitting diodes (WLEDs) were fabricated by combining blue InGaN chip with luminescent colloidal quantum dots (QDs). Two kinds of QDs of core/shell CdSe /ZnS and core/shell/shell CdSe /ZnS /CdS nanocrystals were synthesized by thermal deposition using cadmium oxide and selenium as precursors in a hot lauric acid and hexadecylamine trioctylphosphine oxide hybrid. This two kinds of QDs exhibited high photoluminescence efficiency with a quantum yield more than 41%, and size-tunable emission wavelengths from 500 to 620 nm. The QDs LED mainly consists of flip luminescent InGaN chip, glass ceramic protective coating, glisten cup, QDs using as the photoluminescence material, pyroceram, gold line, electric layer, dielectric layer, silicon gel and bottom layer for welding. The WLEDs had the CIE coordinates of (0.319, 0.32). The InGaN chip white-light-emitting diodes with quantum dots as the emitting layer are potentially useful in illumination and display applications.

Comparison of Student Performance, Student Perception, and Teacher Satisfaction with Traditional versus Flipped Classroom Models

ERIC Educational Resources Information Center

Unal, Zafer; Unal, Aslihan

2017-01-01

As new technologies become available, they are often embraced in educational innovation to enhance traditional instruction. The flipped teaching model is one of the most recent and popular technology-infused teaching models in which learning new concepts takes place at home while practice is conducted in the classroom. The purpose of this study…

Fabrication of Quench Condensed Thin Films Using an Integrated MEMS Fab on a Chip

NASA Astrophysics Data System (ADS)

Lally, Richard; Reeves, Jeremy; Stark, Thomas; Barrett, Lawrence; Bishop, David

Atomic calligraphy is a microelectromechanical systems (MEMS)-based dynamic stencil nanolithography technique. Integrating MEMS devices into a bonded stacked array of three die provides a unique platform for conducting quench condensed thin film mesoscopic experiments. The atomic calligraphy Fab on a Chip process incorporates metal film sources, electrostatic comb driven stencil plate, mass sensor, temperature sensor, and target surface into one multi-die assembly. Three separate die are created using the PolyMUMPs process and are flip-chip bonded together. A die containing joule heated sources must be prepared with metal for evaporation prior to assembly. A backside etch of the middle/central die exposes the moveable stencil plate allowing the flux to pass through the stencil from the source die to the target die. The chip assembly is mounted in a cryogenic system at ultra-high vacuum for depositing extremely thin films down to single layers of atoms across targeted electrodes. Experiments such as the effect of thin film alloys or added impurities on their superconductivity can be measured in situ with this process.

PbS-PbSe IR detector arrays

NASA Technical Reports Server (NTRS)

Barrett, John R. (Inventor)

1986-01-01

A silicon wafer is provided which does not employ individually bonded leads between the IR sensitive elements and the input stages of multiplexers. The wafer is first coated with lead selenide in a first detector array area and is thereafter coated with lead sulfide within a second detector array area. The described steps result in the direct chemical deposition of lead selenide and lead sulfide upon the silicon wafer to eliminate individual wire bonding, bumping, flip chipping, planar interconnecting methods of connecting detector array elements to silicon chip circuitry, e.g., multiplexers, to enable easy fabrication of very long arrays. The electrode structure employed, produces an increase in the electrical field gradient between the electrodes for a given volume of detector material, relative to conventional electrode configurations.

The Effects of a Flipped English Classroom Intervention on Students' Information and Communication Technology and English Reading Comprehension

ERIC Educational Resources Information Center

Huang, Yu-Ning; Hong, Zuway-R.

2016-01-01

The purpose of this study was to explore the effects of a flipped English classroom intervention on high school students' information and communication technology (ICT) and English reading comprehension in Taiwan. Forty 10th graders were randomly selected from a representative senior high school as an experimental group (EG) to attend a 12-h…

Identification of Bacterial Factors Involved in Type 1 Fimbria Expression using an Escherichia coli K12 Proteome Chip*

PubMed Central

Chen, Yi-Wen; Teng, Ching-Hao; Ho, Yu-Hsuan; Jessica Ho, Tien Yu; Huang, Wen-Chun; Hashimoto, Masayuki; Chiang, I-Yuan; Chen, Chien-Sheng

2014-01-01

Type 1 fimbriae are filamentous structures on Escherichia coli. These structures are important adherence factors. Because binding to the host cells is the first step of infection, type 1 fimbria is an important virulence factor of pathogenic E. coli. Expression of type 1 fimbria is regulated by a phase variation in which each individual bacterium can alternate between fimbriated (phase-ON) and nonfimbriated (phase-OFF) states. The phase variation is regulated by the flipping of the 314-bp fimS fragment, which contains the promoter driving the expression of the genes required for the synthesis of type 1 fimbria. Thus, the bacterial proteins able to interact with fimS are likely to be involved in regulating the expression of type 1 fimbria. To identify novel type 1 fimbria-regulating factors, we used an E. coli K12 proteome chip to screen for the bacterial factors able to interact with a 602-bp DNA fragment containing fimS and its adjacent regions. The Spr protein was identified by the proteome chip-based screening and further confirmed to be able to interact with fimS by electrophoretic mobility shift assay. Deletion of spr in the neonatal meningitis E. coli strain RS218 significantly increased the ratio of the bacterial colonies that contained the type 1 fimbria phase-ON cells on agar plates. In addition, Spr interfered with the interactions of fimS with the site-specific recombinases, FimB and FimE, which are responsible for mediating the flipping of fimS. These results suggest that Spr is involved in the regulation of type 1 fimbria expression through direct interaction with the invertible element fimS. These findings facilitate our understanding of the regulation of type 1 fimbria. PMID:24692643

"Flipping" educational technology professional development for K-12 educators

NASA Astrophysics Data System (ADS)

Spencer, Daniel

As the demand for more effective professional development increases in K-12 schools, trainers must adjust their training methods to meet the needs of their teacher learners. Just as lecture-heavy, teacher-centered instruction only meet the learning needs of a small minority of students, "sit and get" professional development rarely results in the teachers gaining the skills and confidence necessary to use technology effectively in their instruction. To resolve the frustrations of teachers related to ineffective professional development, a "Flipped PD" training model was developed based on the learning needs of adult learners, the integration of technological, pedagogical, and content knowledge (TPACK), learning activities, and the Flipped Classroom concept. Under this model, training shifts from a passive, trainer-centered format, to an active, learner-centered format where teachers learn to use technology in their classrooms by first focusing on pedagogical issues, then choosing the options that work best for addressing those issues in their unique situation, and completing "learn-by-doing" projects. Those who participate in "Flipped PD" style trainings tend to have more confidence upon completion that they can use the tools they were trained on in their teaching, as well as believe that the PD was engaging and a good use of their time.

Dose-dependent X-ray measurements using a 64×64 hybrid GaAs pixel detector with photon counting

NASA Astrophysics Data System (ADS)

Schwarz, C.; Campbell, M.; Goeppert, R.; Ludwig, J.; Mikulec, B.; Rogalla, M.; Runge, K.; Soeldner-Rembold, A.; Smith, K. M.; Snoeys, W.; Watt, J.

2001-03-01

New developments in medical imaging head towards semiconductor detectors flip-chip bonded to CMOS readout chips. In this work, detectors fabricated on SI-GaAs bulk material were bonded to Photon Counting Chips. This PCC consists of a matrix of 64×64 identical square pixels (170 μm×170 μm) with a 15-bit counter in each cell. We investigated the imaging properties of these detector systems under exposure of a dental X-ray tube. First, a dose calibration of the X-ray tube was performed. Fixed pattern noise in flood exposure images was determined for a fixed dose and an image correction method, which uses a gain map, was applied. For characterising the imaging properties, the signal-to-noise ratio (SNR) was calculated as function of exposure dose. Finally, the dynamic range of the system was estimated. Developed in the framework of the MEDIPIX collaboration: CERN, Universities of Freiburg, Glasgow, Naples and Pisa.

Enabling Large Focal Plane Arrays Through Mosaic Hybridization

NASA Technical Reports Server (NTRS)

Miller, TImothy M.; Jhabvala, Christine A.; Leong, Edward; Costen, Nicholas P.; Sharp, Elmer; Adachi, Tomoko; Benford, Dominic

2012-01-01

We have demonstrated advances in mosaic hybridization that will enable very large format far-infrared detectors. Specifically we have produced electrical detector models via mosaic hybridization yielding superconducting circuit paths by hybridizing separately fabricated sub-units onto a single detector unit. The detector model was made on a 100mm diameter wafer while four model readout quadrant chips were made from a separate 100mm wafer. The individually fabricated parts were hybridized using a flip-chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the model mosaic-hybrid detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently available.

Enabling Large Focal Plane Arrays through Mosaic Hybridization

NASA Technical Reports Server (NTRS)

Miller, Timothy M.; Jhabvala, Christine A.; Costen, Nick; Benford, Dominic J.

2012-01-01

We have demonstrated the hybridization of large mosaics of far-infrared detectors, joining separately fabricated sub-units into a single unit on a single, large substrate. We produced a single detector mockup on a 100mm diameter wafer and four mockup readout quadrant chips from a separate 100mm wafer. The individually fabricated parts were hybridized using a Suss FC150 flip chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion (CTE) match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the mockup mosaic-hybridized detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently demonstrated.

Fluxless Bonding Processes Using Silver-Indium System for High Temperature Electronics and Silver Flip-Chip Interconnect Technology

NASA Astrophysics Data System (ADS)

Wu, Yuan-Yun

In this dissertation, fluxless silver (Ag)-indium (In) binary system bonding and Ag solid-state bonding are used between different bonded pairs which have large thermal expansion coefficient (CTE) mismatch and flip-chip interconnect bonding application. In contrast to the conventional soldering process, fluxless bonding technique eliminates contamination and reliability problems caused by flux to fabricate high quality joints. There are two section are reported. In the first section, the reactions of Ag-In binary system are presented. In the second section, the high melting temperature, thermal and electrical conductivity joint materials bonding by either Ag-In binary system bonding or solid-state bonding processes for different bonded pairs and flip-chip application are designed, developed, and reported. Our group have studied Ag-In system for several years and developed the bonding processes successfully. However, the detailed reactions of Ag and In were seldom studied. To design a proper bonding structure, it is necessary to understand the reaction between Ag and In. The systematic experiments were performed to investigate these reactions. A 40 um Ag layer was electroplated on copper (Cu) substrates, followed by indium layers of 1, 3, 5, 10, and 15 um, respectively. The samples were annealed at 180 °C in 0.1 torr vacuum. For samples with In thickness less than 5 mum, the joint compositions are Ag2In only (1 um) or AgIn2, Ag2In, and Ag solid solution (Ag) after annealing. No indium is identified. For 10 and 15 um thick In samples, In covers almost over the entire sample surface after annealing. Later, an Ag layer was annealed at 450 °C for 3 hours to grow Ag grains, followed by plating 10 um In and annealing at 180 °C. By annealing Ag before plating In, more In is kept in the structure during annealing at 180 °C. Based on above results, for those designs with In thinner than 5 um, the Ag layer needs to be annealed, prior to In plating in order to make a successful bonding. In this section, we further studied the Ag-In bonding and solid-state bonding for different bonded pairs and flip-chip application. For the silicon (Si) and aluminum (Al) pair, Al has been used as the material for interconnect pads on the ICs. However, its high CTE (23 x 10-6/°C) and non-solderable property limit its applications in electronic products. To overcome these problems, a fluxless Ag-In bonding was developed. Al was deposited Cr/Cu layer on the surface by E-beam evaporator to make it solderable. 15 um of Ag and 8 um of In were sequentially plated on the Al substrates and 15 um of Ag was on Si chips with Cr/Au coating layer. The bonding was performed at 180 °C in 0.1 torr vacuum. The joint consists of Ag/(Ag)/Ag2In/(Ag)/Ag. The joint can achieve a solidus temperature of beyond 600 °C. From shear test results, the shear strengths far exceed the requirement in MIL-STD-883H. Al is not considered as a favorable substrate material because it is not solderable and has a high CTE. The new method presented in this thesis seems to have surmounted these two challenges. Since Ag2In is weak inside the joint in Ag-In system, an annealed process was used to convert the joints into Ag solid solution (Ag) to increase the joint strength and ductility. Two copper (Cu) substrates were bonded at 180 °C without flux. Bonding samples were annealed at 200 °C for 1,000 hours (first design) and at 250 °C for 350 hours (second design), respectively. Scanning electron microscope with energy dispersive X-ray (EDX) analysis results indicate that the joint of the first design is an alloy of mostly (Ag) with micron-size Ag2In and Ag3In regions, and that of second design has converted to a single (Ag) phase. Shear test results show that the breaking forces far exceed the requirement in MIL-STD-883H. The joint solidus temperatures are 600 °C and 800 °C for the first and second designs, respectively. The research results have shown that high-strength and high temperature joints can be manufactured using fluxless low temperature processes with the Ag-In system and are valuable in developing high temperature package. (Abstract shortened by UMI.).

Phase Equilibria of the Sn-Ni-Si Ternary System and Interfacial Reactions in Sn-(Cu)/Ni-Si Couples

NASA Astrophysics Data System (ADS)

Fang, Gu; Chen, Chih-chi

2015-07-01

Interfacial reactions in Sn/Ni-4.5 wt.%Si and Sn-Cu/Ni-4.5 wt.%Si couples at 250°C, and Sn-Ni-Si ternary phase equilibria at 250°C were investigated in this study. Ni-Si alloys, which are nonmagnetic, can be regarded as a diffusion barrier layer material in flip chip packaging. Solder/Ni-4.5 wt.%Si interfacial reactions are crucial to the reliability of soldered joints. Phase equilibria information is essential for development of solder/Ni-Si materials. No ternary compound is present in the Sn-Ni-Si ternary system at 250°C. Extended solubility of Si in the phases Ni3Sn2 and Ni3Sn is 3.8 and 6.1 at.%, respectively. As more Si dissolves in these phases their lattice constants decrease. No noticeable ternary solubility is observed for the other intermetallics. Interfacial reactions in solder/Ni-4.5 wt.%Si are similar to those for solder/Ni. Si does not alter the reaction phases. No Si solubility in the reaction phases was detected, although rates of growth of the reaction phases were reduced. Because the alloy Ni-4.5 wt.%Si reacts more slowly with solders than pure Ni, the Ni-4.5 wt.%Si alloy could be a potential new diffusion barrier layer material for flip chip packaging.

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

NASA Technical Reports Server (NTRS)

Savich, Gregory R.

2004-01-01

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Flipping & Clicking Your Way to Higher-Order Learning

ERIC Educational Resources Information Center

Garver, Michael S.; Roberts, Brian A.

2013-01-01

This innovative system of teaching and learning includes the implementation of two effective learning technologies: podcasting ("flipping") and classroom response systems ("clicking"). Students watch lectures in podcast format before coming to class, which allows the "entire" class period to be devoted to active…

Demonstration of glass-based photonic interposer for mid-board-optical engines and electrical-optical circuit board (EOCB) integration strategy

NASA Astrophysics Data System (ADS)

Schröder, H.; Neitz, M.; Schneider-Ramelow, M.

2018-02-01

Due to its optical transparency and superior dielectric properties glass is regarded as a promising candidate for advanced applications as active photonic interposer for mid-board-optics and optical PCB waveguide integration. The concepts for multi-mode and single-mode photonic system integration are discussed and related demonstration project results will be presented. A hybrid integrated photonic glass body interposer with integrated optical lenses for multi-mode data communication wavelength of 850 nm have been realized. The paper summarizes process developments which allow cost efficient metallization of TGV. Electro-optical elements like photodiodes and VCSELs can be directly flip-chip mounted on the glass substrate according to the desired lens positions. Furthermore results for a silicon photonic based single-mode active interposer integration onto a single mode glass made EOCB will be compared in terms of packaging challenges. The board level integration strategy for both of these technological approaches and general next generation board level integration concepts for photonic interposer will be introductorily discussed.

Vibrations used to talk to quantum circuits

NASA Astrophysics Data System (ADS)

Cho, Adrian

2018-03-01

The budding discipline of quantum acoustics could shake up embryonic quantum computers. Such machines run by flipping quantum bits, or qubits, that can be set not only to zero or one, but, bizarrely, to zero and one at the same time. The most advanced qubits are circuits made of superconducting metal, and to control or read out a qubit, researchers make it interact with a microwave resonator—typically a strip of metal on the qubit chip or a finger-size cavity surrounding it—which rings with microwave photons like an organ pipe rings with sound. But some physicists see advantages to replacing the microwave resonator with a mechanical one that rings with quantized vibrations, or phonons. A well-designed acoustic resonator could ring longer than a microwave one does and could be far smaller, enabling researchers to produce more compact technologies. But first scientists must gain quantum control over vibrations. And several groups are on the cusp of doing that, as they reported at a recent meeting.

Reliability and Qualification of Hardware to Enhance the Mission Assurance of JPL/NASA Projects

NASA Technical Reports Server (NTRS)

Ramesham, Rajeshuni

2010-01-01

Packaging Qualification and Verification (PQV) and life testing of advanced electronic packaging, mechanical assemblies (motors/actuators), and interconnect technologies (flip-chip), platinum temperature thermometer attachment processes, and various other types of hardware for Mars Exploration Rover (MER)/Mars Science Laboratory (MSL), and JUNO flight projects was performed to enhance the mission assurance. The qualification of hardware under extreme cold to hot temperatures was performed with reference to various project requirements. The flight like packages, assemblies, test coupons, and subassemblies were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases. Qualification/life testing was performed by subjecting flight-like qualification hardware to the environmental temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Experimental flight qualification test results will be described in this presentation.

A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Man-Chia; Perez, Aldo Pena; Kothapalli, Sri-Rajasekhar

This study presents a pixel pitch-matched readout chip for 3-D photoacoustic (PA) imaging, featuring a dedicated signal conditioning and delta-sigma modulation integrated within a pixel area of 250 μm by 250 μm. The proof-of-concept receiver was implemented in an STMicroelectronics's 28-nm Fully Depleted Silicon On Insulator technology, and interfaces to a 4 × 4 subarray of capacitive micromachined ultrasound transducers (CMUTs). The front-end signal conditioning in each pixel employs a coarse/fine gain tuning architecture to fulfill the 90-dB dynamic range requirement of the application. The employed delta-sigma beamforming architecture obviates the need for area-consuming Nyquist ADCs and thereby enables anmore » efficient in-pixel A/D conversion. The per-pixel switched-capacitor ΔΣ modulator leverages slewing-dominated and area-optimized inverter-based amplifiers. It occupies only 1/4th of the pixel, and its area compares favorably with state-of-the-art designs that offer the same SNR and bandwidth. The modulator's measured peak signal-to-noise-and-distortion ratio is 59.9 dB for a 10-MHz input bandwidth, and it consumes 6.65 mW from a 1V supply. The overall subarray beamforming approach improves the area per channel by 7.4 times and the single-channel SNR by 8 dB compared to prior art with similar delay resolution and power dissipation. Finally, the functionality of the designed chip was evaluated within a PA imaging experiment, employing a flip-chip bonded 2-D CMUT array.« less

A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI

DOE PAGES

Chen, Man-Chia; Perez, Aldo Pena; Kothapalli, Sri-Rajasekhar; ...

2017-10-16

This study presents a pixel pitch-matched readout chip for 3-D photoacoustic (PA) imaging, featuring a dedicated signal conditioning and delta-sigma modulation integrated within a pixel area of 250 μm by 250 μm. The proof-of-concept receiver was implemented in an STMicroelectronics's 28-nm Fully Depleted Silicon On Insulator technology, and interfaces to a 4 × 4 subarray of capacitive micromachined ultrasound transducers (CMUTs). The front-end signal conditioning in each pixel employs a coarse/fine gain tuning architecture to fulfill the 90-dB dynamic range requirement of the application. The employed delta-sigma beamforming architecture obviates the need for area-consuming Nyquist ADCs and thereby enables anmore » efficient in-pixel A/D conversion. The per-pixel switched-capacitor ΔΣ modulator leverages slewing-dominated and area-optimized inverter-based amplifiers. It occupies only 1/4th of the pixel, and its area compares favorably with state-of-the-art designs that offer the same SNR and bandwidth. The modulator's measured peak signal-to-noise-and-distortion ratio is 59.9 dB for a 10-MHz input bandwidth, and it consumes 6.65 mW from a 1V supply. The overall subarray beamforming approach improves the area per channel by 7.4 times and the single-channel SNR by 8 dB compared to prior art with similar delay resolution and power dissipation. Finally, the functionality of the designed chip was evaluated within a PA imaging experiment, employing a flip-chip bonded 2-D CMUT array.« less

Flipped Instruction: Breakthroughs in Research and Practice

ERIC Educational Resources Information Center

IGI Global, 2017

2017-01-01

The integration of technology into modern classrooms has enhanced learning opportunities for students. With increased access to educational content, students gain a better understanding of the concepts being taught. "Flipped Instruction: Breakthroughs in Research and Practice" is a comprehensive reference source for the latest scholarly…

A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

NASA Astrophysics Data System (ADS)

Li, Y.-Q.; Wang, H.-B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S.-T.; He, A.-L.; Guo, G.; Baeg, S. H.; Wen, S.-J.; Wong, R.; Chen, M.; Wu, Q.

2017-06-01

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.

Effects of an Inverted Instructional Delivery Model on Achievement of Ninth-Grade Physical Science Honors Students

NASA Astrophysics Data System (ADS)

Howell, Donna

This mixed-methods action research study was designed to assess the achievement of ninth-grade Physical Science Honors students by analysis of pre and posttest data. In addition, perceptual data from students, parents, and the researcher were collected to form a complete picture of the flipped lecture format versus the traditional lecture format. The researcher utilized a 4MAT learning cycle in two Physical Science Honors classes. One of these classes was traditionally delivered with lecture-type activities taking place inside the classroom and homework-type activities taking place at home; the other inverted, or flipped, delivered with lecture-type activities taking place outside the classroom and homework-type activities taking place inside the classroom. Existing unit pre and posttests for both classes were analyzed for differences in academic achievement. At the completion of the units, the flipped class students and parents were surveyed, and student focus groups were convened to ascertain their perceptions of the flipped classroom delivery model. Statistical analysis of posttest data revealed that there is no significant difference between the traditional lecture delivery format and the flipped delivery format. Analysis of perceptual data revealed six themes that must be considered when deciding to flip the classroom: how to hold students accountable for viewing the at-home videos, accessibility of students to the required technology, technical considerations relating to the video production, comprehension of the material both during and after viewing the videos, pedagogy of the overall flipped method, and preference for the flipped method overall. Findings revealed that students, parents, and the researcher all had a preference for the flipped class format, provided the above issues are addressed. The flipped class format encourages students to become more responsible for their learning, and, in addition, students reported that the hands-on inquiry activities done in class aided them in learning the subject matter. It is recommended, however, that before instructors decide to flip the classroom, they ensure that all students have access to needed technology, that there is a plan in place for ensuring that the students actually view the assigned videos, that they have a way to create the videos and ensure adequate quality, and that some discussion is held in class after each assigned video to ensure comprehension of the material.

High-Efficiency Nitride-Base Photonic Crystal Light Sources

DOE Office of Scientific and Technical Information (OSTI.GOV)

James Speck; Evelyn Hu; Claude Weisbuch

2010-01-31

The research activities performed in the framework of this project represent a major breakthrough in the demonstration of Photonic Crystals (PhC) as a competitive technology for LEDs with high light extraction efficiency. The goals of the project were to explore the viable approaches to manufacturability of PhC LEDS through proven standard industrial processes, establish the limits of light extraction by various concepts of PhC LEDs, and determine the possible advantages of PhC LEDs over current and forthcoming LED extraction concepts. We have developed three very different geometries for PhC light extraction in LEDs. In addition, we have demonstrated reliable methodsmore » for their in-depth analysis allowing the extraction of important parameters such as light extraction efficiency, modal extraction length, directionality, internal and external quantum efficiency. The information gained allows better understanding of the physical processes and the effect of the design parameters on the light directionality and extraction efficiency. As a result, we produced LEDs with controllable emission directionality and a state of the art extraction efficiency that goes up to 94%. Those devices are based on embedded air-gap PhC - a novel technology concept developed in the framework of this project. They rely on a simple and planar fabrication process that is very interesting for industrial implementation due to its robustness and scalability. In fact, besides the additional patterning and regrowth steps, the process is identical as that for standard industrially used p-side-up LEDs. The final devices exhibit the same good electrical characteristics and high process yield as a series of test standard LEDs obtained in comparable conditions. Finally, the technology of embedded air-gap patterns (PhC) has significant potential in other related fields such as: increasing the optical mode interaction with the active region in semiconductor lasers; increasing the coupling of the incident light into the active region of solar cells; increasing the efficiency of the phosphorous light conversion in white light LEDs etc. In addition to the technology of embedded PhC LEDs, we demonstrate a technique for improvement of the light extraction and emission directionality for existing flip-chip microcavity (thin) LEDs by introducing PhC grating into the top n-contact. Although, the performances of these devices in terms of increase of the extraction efficiency are not significantly superior compared to those obtained by other techniques like surface roughening, the use of PhC offers some significant advantages such as improved and controllable emission directionality and a process that is directly applicable to any material system. The PhC microcavity LEDs have also potential for industrial implementation as the fabrication process has only minor differences to that already used for flip-chip thin LEDs. Finally, we have demonstrated that achieving good electrical properties and high fabrication yield for these devices is straightforward.« less

Student and Parent Perspectives on Fipping the Mathematics Classroom

ERIC Educational Resources Information Center

Muir, Tracey

2015-01-01

Traditionally, the domain of higher education, the 'flipped classroom' is gaining in popularity in secondary school settings. In the flipped classroom, digital technologies are used to shift direct instruction from the classroom to the home, providing students with increased autonomy over their learning. While advocates of the approach believe it…

Performance and Perception in the Flipped Classroom

ERIC Educational Resources Information Center

Blair, Erik; Maharaj, Chris; Primus, Simone

2016-01-01

Changes in the conceptualisation of higher education have led to instructional methods that embrace technology as a teaching medium. These changes have led to the flipped classroom phenomenon--where content is delivered outside class, through media such as video and podcast, and engagement with the content, through problem-solving and/or group…

Adult Students' Experiences of a Flipped Mathematics Classroom

ERIC Educational Resources Information Center

Larsen, Judy

2015-01-01

The flipped classroom is a flexible blended learning model that is growing in popularity due to the emergent accessibility to online content delivery technology. By delivering content outside of class time asynchronously, teachers are able to dedicate their face to face class time for student-centred teaching approaches. The flexibility in…

Evaluating Blended and Flipped Instruction in Numerical Methods at Multiple Engineering Schools

ERIC Educational Resources Information Center

Clark, Renee; Kaw, Autar; Lou, Yingyan; Scott, Andrew; Besterfield-Sacre, Mary

2018-01-01

With the literature calling for comparisons among technology-enhanced or active-learning pedagogies, a blended versus flipped instructional comparison was made for numerical methods coursework using three engineering schools with diverse student demographics. This study contributes to needed comparisons of enhanced instructional approaches in STEM…

Flip This Classroom: A Comparative Study

ERIC Educational Resources Information Center

Unruh, Tiffany; Peters, Michelle L.; Willis, Jana

2016-01-01

The purpose of this research was to compare the beliefs and attitudes of teachers using the flipped versus the traditional class model. Survey and interview data were collected from a matched sample of in-service teachers representing both models from a large suburban southeastern Texas school district. The Attitude Towards Technology Scale, the…

Future direction of direct writing

NASA Astrophysics Data System (ADS)

Kim, Nam-Soo; Han, Kenneth N.

2010-11-01

Direct write technology using special inks consisting of finely dispersed metal nanoparticles in liquid is receiving an undivided attention in recent years for its wide range of applicability in modern electronic industry. The application of this technology covers radio frequency identification-tag (RFID-tag), flexible-electronics, organic light emitting diodes (OLED) display, e-paper, antenna, bumpers used in flip-chip, underfilling, frit, miniresistance applications and biological uses, artificial dental applications and many more. In this paper, the authors have reviewed various direct write technologies on the market and discussed their advantages and shortfalls. Emphasis has given on microdispensing deposition write (MDDW), maskless mesoscale materials deposition (M3D), and ink-jet technologies. All of these technologies allow printing various patterns without employing a mask or a resist with an enhanced speed with the aid of computer. MDDW and M3D are capable of drawing patterns in three-dimension and MDDW, in particular, is capable of writing nanoinks with high viscosity. However, it is still far away for direct write to be fully implemented in the commercial arena. One of the hurdles to overcome is in manufacturing conductive inks which are chemically and physically stable, capable of drawing patterns with acceptable conductivity, and also capable of drawing patterns with acceptable adhesiveness with the substrates. The authors have briefly discussed problems involved in manufacturing nanometal inks to be used in various writing devices. There are numerous factors to be considered in manufacturing such inks. They are reducing agents, concentrations, oxidation, compact ability allowing good conductivity, and stability in suspension.

Implementation of a Flipped Classroom for Nuclear Medicine Physician CME.

PubMed

Komarraju, Aparna; Bartel, Twyla B; Dickinson, Lisa A; Grant, Frederick D; Yarbrough, Tracy L

2018-06-21

Increasingly, emerging technologies are expanding instructional possibilities, with new methods being adopted to improve knowledge acquisition and retention. Within medical education, many new techniques have been employed in the undergraduate setting, with less utilization thus far in the continuing medical education (CME) sphere. This paper discusses the use of a new method for CME-the "flipped classroom," widely used in undergraduate medical education. This method engages learners by providing content before the live ("in class") session that aids in preparation and fosters in-class engagement. A flipped classroom method was employed using an online image-rich case-based module and quiz prior to a live CME session at a national nuclear medicine meeting. The preparatory material provided a springboard for in-depth discussion at the live session-a case-based activity utilizing audience response technology. Study participants completed a survey regarding their initial experience with this new instructional method. In addition, focus group interviews were conducted with session attendees who had or had not completed the presession material; transcripts were qualitatively analyzed. Quantitative survey data (completed by two-thirds of the session attendees) suggested that the flipped method was highly valuable and met attendee educational objectives. Analysis of focus group data yielded six themes broadly related to two categories-benefits of the flipped method for CME and programmatic considerations for successfully implementing the flipped method in CME. Data from this study have proven encouraging and support further investigations around the incorporation of this innovative teaching method into CME for nuclear imaging specialists.

Student learning and perceptions in a flipped linear algebra course

NASA Astrophysics Data System (ADS)

Love, Betty; Hodge, Angie; Grandgenett, Neal; Swift, Andrew W.

2014-04-01

The traditional lecture style of teaching has long been the norm in college science, technology, engineering, and mathematics (STEM) courses, but an innovative teaching model, facilitated by recent advances in technology, is gaining popularity across college campuses. This new model inverts or 'flips' the usual classroom paradigm, in that students learn initial course concepts outside of the classroom, while class time is reserved for more active problem-based learning and practice activities. While the flipped classroom model shows promise for improving STEM learning and increasing student interest in STEM fields, discussions to date of the model and its impact are more anecdotal than data driven - very little research has been undertaken to rigorously assess the potential effects on student learning that can result from the flipped classroom environment. This study involved 55 students in 2 sections of an applied linear algebra course, using the traditional lecture format in one section and the flipped classroom model in another. In the latter, students were expected to prepare for the class in some way, such as watching screencasts prepared by the instructor, or reading the textbook or the instructor's notes. Student content understanding and course perceptions were examined. Content understanding was measured by the performance on course exams, and students in the flipped classroom environment had a more significant increase between the sequential exams compared to the students in the traditional lecture section, while performing similarly in the final exam. Course perceptions were represented by an end-of-semester survey that indicated that the flipped classroom students were very positive about their experience in the course, and particularly appreciated the student collaboration and instructional video components.

Design Techniques for Power-Aware Combinational Logic SER Mitigation

NASA Astrophysics Data System (ADS)

Mahatme, Nihaar N.

The history of modern semiconductor devices and circuits suggests that technologists have been able to maintain scaling at the rate predicted by Moore's Law [Moor-65]. With improved performance, speed and lower area, technology scaling has also exacerbated reliability issues such as soft errors. Soft errors are transient errors that occur in microelectronic circuits due to ionizing radiation particle strikes on reverse biased semiconductor junctions. These radiation induced errors at the terrestrial-level are caused due to radiation particle strikes by (1) alpha particles emitted as decay products of packing material (2) cosmic rays that produce energetic protons and neutrons, and (3) thermal neutrons [Dodd-03], [Srou-88] and more recently muons and electrons [Ma-79] [Nara-08] [Siew-10] [King-10]. In the space environment radiation induced errors are a much bigger threat and are mainly caused by cosmic heavy-ions, protons etc. The effects of radiation exposure on circuits and measures to protect against them have been studied extensively for the past 40 years, especially for parts operating in space. Radiation particle strikes can affect memory as well as combinational logic. Typically when these particles strike semiconductor junctions of transistors that are part of feedback structures such as SRAM memory cells or flip-flops, it can lead to an inversion of the cell content. Such a failure is formally called a bit-flip or single-event upset (SEU). When such particles strike sensitive junctions part of combinational logic gates they produce transient voltage spikes or glitches called single-event transients (SETs) that could be latched by receiving flip-flops. As the circuits are clocked faster, there are more number of clocking edges which increases the likelihood of latching these transients. In older technology generations the probability of errors in flip-flops due to SETs being latched was much lower compared to direct strikes on flip-flops or SRAMs leading to SEUs. This was mainly because the operating frequencies were much lower for older technology generations. The Intel Pentium II for example was fabricated using 0.35 microm technology and operated between 200-330 MHz. With technology scaling however, operating frequencies have increased tremendously and the contribution of soft errors due to latched SETs from combinational logic could account for a significant proportion of the chip-level soft error rate [Sief-12][Maha-11][Shiv02] [Bu97]. Therefore there is a need to systematically characterize the problem of combinational logic single-event effects (SEE) and understand the various factors that affect the combinational logic single-event error rate. Just as scaling has led to soft errors emerging as a reliability-limiting failure mode for modern digital ICs, the problem of increasing power consumption has arguably been a bigger bane of scaling. While Moore's Law loftily states the blessing of technology scaling to be smaller and faster transistor it fails to highlight that the power density increases exponentially with every technology generation. The power density problem was partially solved in the 1970's and 1980's by moving from bipolar and GaAs technologies to full-scale silicon CMOS technologies. Following this however, technology miniaturization that enabled high-speed, multicore and parallel computing has steadily increased the power density and the power consumption problem. Today minimizing the power consumption is as much critical for power hungry server farms as it for portable devices, all pervasive sensor networks and future eco-bio-sensors. Low-power consumption is now regularly part of design philosophies for various digital products with diverse applications from computing to communication to healthcare. Thus designers in today's world are left grappling with both a "power wall" as well as a "reliability wall". Unfortunately, when it comes to improving reliability through soft error mitigation, most approaches are invariably straddled with overheads in terms of area or speed and more importantly power. Thus, the cost of protecting combinational logic through the use of power hungry mitigation approaches can disrupt the power budget significantly. Therefore there is a strong need to develop techniques that can provide both power minimization as well as combinational logic soft error mitigation. This dissertation, advances hitherto untapped opportunities to jointly reduce power consumption and deliver soft error resilient designs. Circuit as well as architectural approaches are employed to achieve this objective and the advantages of cross-layer optimization for power and soft error reliability are emphasized.

Pressure driven digital logic in PDMS based microfluidic devices fabricated by multilayer soft lithography.

PubMed

Devaraju, Naga Sai Gopi K; Unger, Marc A

2012-11-21

Advances in microfluidics now allow an unprecedented level of parallelization and integration of biochemical reactions. However, one challenge still faced by the field has been the complexity and cost of the control hardware: one external pressure signal has been required for each independently actuated set of valves on chip. Using a simple post-modification to the multilayer soft lithography fabrication process, we present a new implementation of digital fluidic logic fully analogous to electronic logic with significant performance advances over the previous implementations. We demonstrate a novel normally closed static gain valve capable of modulating pressure signals in a fashion analogous to an electronic transistor. We utilize these valves to build complex fluidic logic circuits capable of arbitrary control of flows by processing binary input signals (pressure (1) and atmosphere (0)). We demonstrate logic gates and devices including NOT, NAND and NOR gates, bi-stable flip-flops, gated flip-flops (latches), oscillators, self-driven peristaltic pumps, delay flip-flops, and a 12-bit shift register built using static gain valves. This fluidic logic shows cascade-ability, feedback, programmability, bi-stability, and autonomous control capability. This implementation of fluidic logic yields significantly smaller devices, higher clock rates, simple designs, easy fabrication, and integration into MSL microfluidics.

Consortia for Known Good Die (KGD), phase 1

NASA Astrophysics Data System (ADS)

Andrews, Marshall; Carey, David; Fellows, Mary M.; Gilg, Larry; Murphy, Cindy; Noddings, Chad; Pitts, Greg; Rathmell, Claude; Spooner, Charles

1994-02-01

This report describes the results of Phase 1 of the Infrastructure for KGD program at MCC. The objective of the work is to resolve the issues for supplying and procuring Known Good Die (KGD) in a way that fosters industry acceptance and confidence in Application Specific Electronic Modules (ASEM's for military systems) and MultiChip Modules (MCM's for commercial systems). This report is divided into four sections. Section 1 describes the technical assessment of proposed industry approaches to KGD implementation. Section 2 of the report contains an outline for the plan for industry and government cooperation for the demonstration, validation, and implementation of KGD methodologies identified in this Phase 1 study. Section 3 of the report contains the industry-generated requirements for KGD implementation. Section IV of the report contains the KGD specifications for TAB and flip chip IC's.

AIN-Based Packaging for SiC High-Temperature Electronics

NASA Technical Reports Server (NTRS)

Savrun, Ender

2004-01-01

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Flipped classroom model for learning evidence-based medicine.

PubMed

Rucker, Sydney Y; Ozdogan, Zulfukar; Al Achkar, Morhaf

2017-01-01

Journal club (JC), as a pedagogical strategy, has long been used in graduate medical education (GME). As evidence-based medicine (EBM) becomes a mainstay in GME, traditional models of JC present a number of insufficiencies and call for novel models of instruction. A flipped classroom model appears to be an ideal strategy to meet the demands to connect evidence to practice while creating engaged, culturally competent, and technologically literate physicians. In this article, we describe a novel model of flipped classroom in JC. We present the flow of learning activities during the online and face-to-face instruction, and then we highlight specific considerations for implementing a flipped classroom model. We show that implementing a flipped classroom model to teach EBM in a residency program not only is possible but also may constitute improved learning opportunity for residents. Follow-up work is needed to evaluate the effectiveness of this model on both learning and clinical practice.

Flipped classroom model for learning evidence-based medicine

PubMed Central

Rucker, Sydney Y; Ozdogan, Zulfukar; Al Achkar, Morhaf

2017-01-01

Journal club (JC), as a pedagogical strategy, has long been used in graduate medical education (GME). As evidence-based medicine (EBM) becomes a mainstay in GME, traditional models of JC present a number of insufficiencies and call for novel models of instruction. A flipped classroom model appears to be an ideal strategy to meet the demands to connect evidence to practice while creating engaged, culturally competent, and technologically literate physicians. In this article, we describe a novel model of flipped classroom in JC. We present the flow of learning activities during the online and face-to-face instruction, and then we highlight specific considerations for implementing a flipped classroom model. We show that implementing a flipped classroom model to teach EBM in a residency program not only is possible but also may constitute improved learning opportunity for residents. Follow-up work is needed to evaluate the effectiveness of this model on both learning and clinical practice. PMID:28919831

GaN-based flip-chip LEDs with highly reflective ITO/DBR p-type and via hole-based n-type contacts for enhanced current spreading and light extraction

NASA Astrophysics Data System (ADS)

Zhou, Shengjun; Zheng, Chenju; Lv, Jiajiang; Gao, Yilin; Wang, Ruiqing; Liu, Sheng

2017-07-01

We demonstrate GaN-based double-layer electrode flip-chip light-emitting diodes (DLE-FCLED) with highly reflective indium-tin oxide (ITO)/distributed bragg reflector (DBR) p-type contact and via hole-based n-type contacts. Transparent thin ITO in combination with TiO2/SiO2 DBR is used for reflective p-type ohmic contact, resulting in a significant reduction in absorption of light by opaque metal electrodes. The finely distributed via hole-based n-type contacts are formed on the n-GaN layer by etching via holes through p-GaN and multiple quantum well (MQW) active layer, leading to reduced lateral current spreading length, and hence alleviated current crowding effect. The forward voltage of the DLE-FCLED is 0.31 V lower than that of the top-emitting LED at 90 mA. The light output power of DLE-FCLED is 15.7% and 80.8% higher than that of top-emitting LED at 90 mA and 300 mA, respectively. Compared to top- emitting LED, the external quantum efficiency (EQE) of DLE-FCLED is enhanced by 15.4% and 132% at 90 mA and 300 mA, respectively. The maximum light output power of the DLE-FCLED obtained at 195.6 A/cm2 is 1.33 times larger than that of the top-emitting LED obtained at 93 A/cm2.

Numerical and experimental investigation of GaN-based flip-chip light-emitting diodes with highly reflective Ag/TiW and ITO/DBR Ohmic contacts.

PubMed

Zhou, Shengjun; Liu, Xingtong; Gao, Yilin; Liu, Yingce; Liu, Mengling; Liu, Zongyuan; Gui, Chengqun; Liu, Sheng

2017-10-30

We demonstrate two types of GaN-based flip-chip light-emitting diodes (FCLEDs) with highly reflective Ag/TiW and indium-tin oxide (ITO)/distributed Bragg reflector (DBR) p-type Ohmic contacts. We show that a direct Ohmic contact to p-GaN layer using pure Ag is obtained when annealed at 600°C in N 2 ambient. A TiW diffusion barrier layer covered onto Ag is used to suppress the agglomeration of Ag and thus maintain high reflectance of Ag during high temperature annealing process. We develop a strip-shaped SiO 2 current blocking layer beneath the ITO/DBR to alleviate current crowding occurring in FCLED with ITO/DBR. Owing to negligibly small spreading resistance of Ag, however, our combined numerical and experimental results show that the FCLED with Ag/TiW has a more favorable current spreading uniformity in comparison to the FCLED with ITO/DBR. As a result, the light output power of FCLED with Ag/TiW is 7.5% higher than that of FCLED with ITO/DBR at 350 mA. The maximum output power of the FCLED with Ag/TiW obtained at 305.6 A/cm 2 is 29.3% larger than that of the FCLED with ITO/DBR obtained at 278.9 A/cm 2 . The improvement appears to be due to the enhanced current spreading and higher optical reflectance provided by the Ag/TiW.

Student Attitudes toward Flipping the General Chemistry Classroom

ERIC Educational Resources Information Center

Smith, J. Dominic

2013-01-01

The idea of ''flipping the classroom'' to make class time more engaging and student-centred has gained ground in recent years. The lecture portion of General Chemistry I and General Chemistry II courses were pushed outside the classroom using pre-recording technology and streaming delivery of content, in order to make in-class time more…

Rotating Solids and Flipping Instruction

ERIC Educational Resources Information Center

Grypp, Lynette; Luebeck, Jennifer

2015-01-01

Technology is causing educators to rethink the entire notion of classroom learning, not only with respect to what learning should take place but also where it should take place. One such innovation is flipped instruction, broadly defined by Staker and Horn (2012) as an instructional model in which students learn partly through online delivery and…

Flipping the Online Classroom with Web 2.0: The Asynchronous Workshop

ERIC Educational Resources Information Center

Cummings, Lance

2016-01-01

This article examines how Web 2.0 technologies can be used to "flip" the online classroom by creating asynchronous workshops in social environments where immediacy and social presence can be maximized. Using experience teaching several communication and writing classes in Google Apps (Google+, Google Hangouts, Google Drive, etc.), I…

ConfChem Conference on Flipped Classroom: Improving Student Engagement in Organic Chemistry Using the Inverted Classroom Model

ERIC Educational Resources Information Center

Rossi, Robert D.

2015-01-01

Improving student engagement in STEM (science, technology, engineering, and mathematics) courses generally, and organic chemistry specifically, has long been a goal for educators. Recently educators at all academic levels have been exploring the "inverted classroom" or "flipped classroom" pedagogical model for improving student…

The Flipped Classroom: An Opportunity to Engage Millennial Students through Active Learning Strategies

ERIC Educational Resources Information Center

Roehl, Amy; Reddy, Shweta Linga; Shannon, Gayla Jett

2013-01-01

"Flipping" the classroom employs easy-to-use, readily accessible technology in order to free class time from lecture. This allows for an expanded range of learning activities during class time. Using class time for active learning versus lecture provides opportunities for greater teacher-to-student mentoring, peer-to-peer collaboration…

Electromigration Failure Mechanism in Sn-Cu Solder Alloys with OSP Cu Surface Finish

NASA Astrophysics Data System (ADS)

Chu, Ming-Hui; Liang, S. W.; Chen, Chih; Huang, Annie T.

2012-09-01

Organic solderable preservative (OSP) has been adopted as the Cu substrate surface finish in flip-chip solder joints for many years. In this study, the electromigration behavior of lead-free Sn-Cu solder alloys with thin-film under bump metallization and OSP surface finish was investigated. The results showed that severe damage occurred on the substrate side (cathode side), whereas the damage on the chip side (cathode side) was not severe. The damage on the substrate side included void formation, copper dissolution, and formation of intermetallic compounds (IMCs). The OSP Cu interface on the substrate side became the weakest point in the solder joint even when thin-film metallization was used on the chip side. Three-dimensional simulations were employed to investigate the current density distribution in the area between the OSP Cu surface finish and the solder. The results indicated that the current density was higher along the periphery of the bonding area between the solder and the Cu pad, consistent with the area of IMC and void formation in our experimental results.

Enabling Large Focal Plane Arrays Through Mosaic Hybridization

NASA Technical Reports Server (NTRS)

Miller, Timothy M.; Jhabvala, Christine A.; Leong, Edward; Costen, Nick P.; Sharp, Elmer; Adachi, Tomoko; Benford, Dominic J.

2012-01-01

We have demonstrated advances in mosaic hybridization that will enable very large format far-infrared detectors. Specifically we have produced electrical detector models via mosaic hybridization yielding superconducting circuit patbs by hybridizing separately fabricated sub-units onto a single detector unit. The detector model was made on a 100mm diameter wafer while four model readout quadrant chips were made from a separate 100mm wafer. The individually fabric.ted parts were hybridized using a Suss FCI50 flip chip bonder to assemble the detector-readout stack. Once all of the hybridized readouts were in place, a single, large and thick silicon substrate was placed on the stack and attached with permanent epoxy to provide strength and a Coefficient of Thermal Expansion match to the silicon components underneath. Wirebond pads on the readout chips connect circuits to warm readout electronics; and were used to validate the successful superconducting electrical interconnection of the model mosaic-hybrid detector. This demonstration is directly scalable to 150 mm diameter wafers, enabling pixel areas over ten times the area currently available.

3D MOEMS-based optical micro-bench platform for the miniaturization of sensing devices

NASA Astrophysics Data System (ADS)

Garcia-Blanco, Sonia; Caron, Jean-Sol; Leclair, Sébastien; Topart, Patrice A.; Jerominek, Hubert

2008-02-01

As we enter into the 21st century, the need for miniaturized portable diagnostic devices is increasing continuously. Portable devices find important applications for point-of-care diagnostics, patient self-monitoring and in remote areas, such as unpopulated regions where the cost of large laboratory facilities is not justifiable, underdeveloped countries and other remote locations such as space missions. The advantage of miniaturized sensing optical systems includes not only the reduced weight and size but also reduced cost, decreased time to results and robustness (e.g. no need for frequent re-alignments). Recent advances in micro-fabrication and assembly technologies have enabled important developments in the field of miniaturized sensing systems. INO has developed a technology platform for the three dimensional integration of MOEMS on an optical microbench. Building blocks of the platform include microlenses, micromirrors, dichroic beamsplitters, filters and optical fibers, which can be positioned using passive alignment structures to build the desired miniaturised system. The technology involves standard microfabrication, thick resist UV-lithography, thick metal electroplating, soldering, replication in sol-gel materials and flip-chip bonding processes. The technology is compatible with wafer-to-wafer bonding. A placement accuracy of +/- 5 μm has been demonstrated thanks to the integration of alignment marks co registered with other optical elements fabricated on different wafers. In this paper, the building blocks of the technology will be detailed. The design and fabrication of a 5x5 channels light processing unit including optical fibers, mirrors and collimating microlenses will be described. Application of the technology to various kinds of sensing devices will be discussed.

Advanced sensor systems for biotelemetry

NASA Technical Reports Server (NTRS)

Ricks, Robert D. (Inventor); Mundt, Carsten W. (Inventor); Hines, John W. (Inventor); Somps, Christopher J. (Inventor)

2003-01-01

The present invention relates to telemetry-based sensing systems that continuously measures physical, chemical and biological parameters. More specifically, these sensing systems comprise a small, modular, low-power implantable biotelemetry system capable of continuously sensing physiological characteristics using implantable transmitters, a receiver, and a data acquisition system to analyze and record the transmitted signal over several months. The preferred embodiment is a preterm labor and fetal monitoring system. Key features of the invention include Pulse Interval Modulation (PIM) that is used to send temperature and pressure information out of the biological environment. The RF carrier frequency is 174-216 MHz and a pair of RF bursts (pulses) is transmitted at a frequency of about 1-2 Hz. The transmission range is 3 to 10 feet, depending on the position of the transmitter in the body and its biological environment. The entire transmitter is encapsulated in biocompatible silicone rubber. Power is supplied by on-board silver-oxide batteries. The average power consumption of the current design is less than 30 .mu.W., which yields a lifetime of approximately 6-9 months. Chip-on-Board technology (COB) drastically reduces the size of the printed circuit board from 38.times.28 mm to 22.times.8 mm. Unpackaged dies are flip-chip bonded directly onto the printed circuit board, along with surface mount resistors and capacitors. The invention can monitor additional physiological parameters including, but not limited to, ECG, blood gases, glucose, and ions such as calcium, potassium, and sodium.

Advanced Sensor Systems for Biotelemetry

NASA Technical Reports Server (NTRS)

Hines, John W. (Inventor); Somps, Christopher J. (Inventor); Ricks, Robert D. (Inventor); Mundt, Carsten W. (Inventor)

2003-01-01

The present invention relates to telemetry-based sensing systems that continuously measures physical, chemical and biological parameters. More specifically, these sensing systems comprise a small, modular, low-power implantable biotelemetry system capable of continuously sensing physiological characteristics using implantable transmitters, a receiver, and a data acquisition system to analyze and record the transmitted signal over several months. The preferred embodiment is a preterm labor and fetal monitoring system. Key features of the invention include Pulse Interval Modulation (PIM) that is used to send temperature and pressure information out of the biological environment. The RF carrier frequency is 174-216 MHz and a pair of RF bursts (pulses) is transmitted at a frequency of about 1-2 Hz. The transmission range is 3 to 10 feet, depending on the position of the transmitter in the body and its biological environment. The entire transmitter is encapsulated in biocompatible silicone rubber. Power is supplied by on-board silver-oxide batteries. The average power consumption of the current design is less than 30 microW, which yields a lifetime of approximately 6 - 9 months. Chip-on-Board technology (COB) drastically reduces the size of the printed circuit board from 38 x 28 mm to 22 x 8 mm. Unpackaged dies are flip-chip bonded directly onto the printed circuit board, along with surface mount resistors and capacitors. The invention can monitor additional physiological parameters including, but not limited to, ECG, blood gases, glucose, and ions such as calcium, potassium, and sodium.

On flipping first-semester calculus: a case study

NASA Astrophysics Data System (ADS)

Petrillo, Joseph

2016-05-01

High failure rates in calculus have plagued students, teachers, and administrators for decades, while science, technology, engineering, and mathematics programmes continue to suffer from low enrollments and high attrition. In an effort to affect this reality, some educators are 'flipping' (or inverting) their classrooms. By flipping, we mean administering course content outside of the classroom and replacing the traditional in-class lectures with discussion, practice, group work, and other elements of active learning. This paper presents the major results from a three-year study of a flipped, first-semester calculus course at a small, comprehensive, American university with a well-known engineering programme. The data we have collected help quantify the positive and substantial effects of our flipped calculus course on failure rates, scores on the common final exam, student opinion of calculus, teacher impact on measurable outcomes, and success in second-semester calculus. While flipping may not be suitable for every teacher, every student, and in every situation, this report provides some evidence that it may be a viable option for those seeking an alternative to the traditional lecture model.

The Double Flip: Applying a Flipped Learning Approach to Teach the Teacher and Improve Student Satisfaction

ERIC Educational Resources Information Center

Kehoe, Thomas; Schofield, Penelope; Branigan, Elizabeth; Wilmore, Michael

2018-01-01

This paper describes a professional development (PD) program for academics at an Australian university designed to model good blended curriculum design and effective use of contemporary learning technologies. It evaluates a case study from the pilot of this program involving a postgraduate psychology course to illustrate one of the most…

The Flipped Classroom Model: When Technology Enhances Professional Skills

ERIC Educational Resources Information Center

Baytiyeh, Hoda

2017-01-01

Purpose: The purpose of this paper is to investigate the effectiveness of the flipped classroom model in teaching and learning as well as the skills that can be acquired by students after being exposed to this learning style. Design/methodology/approach: This paper uses a qualitative case study design. In total, 20 students, from various majors,…

Investigating the Potential of the Flipped Classroom Model in K-12 ICT Teaching and Learning: An Action Research Study

ERIC Educational Resources Information Center

Kostaris, Christoforos; Sergis, Stylianos; Sampson, Demetrios G.; Giannakos, Michail N.; Pelliccione, Lina

2017-01-01

The emerging Flipped Classroom approach has been widely used to enhance teaching practices in many subject domains and educational levels, reporting promising results for enhancing student learning experiences. However, despite this encouraging body of research, the subject domain of Information and Communication Technologies (ICT) teaching at…

Successful EFL Teaching Using Mobile Technologies in a Flipped Classroom

ERIC Educational Resources Information Center

Obari, Hiroyuki; Lambacher, Stephen

2015-01-01

Two case studies evaluating the effectiveness of a flipped classroom compared to a traditional classroom were performed. The studies were conducted from April 2014 to January 2015 at a private university in Tokyo, targeting 60 first-year and 25 third-year undergraduates, respectively. In the first study, an assessment of pre- and post-treatment…

Scripting to Enhance University Students' Critical Thinking in Flipped Learning: Implications of the Delayed Effect on Science Reading Literacy

ERIC Educational Resources Information Center

Lee, Yuan-Hsuan

2018-01-01

Premised on Web 2.0 technology, the current study investigated the effect of facilitating critical thinking using the Collaborative Questioning, Reading, Answering, and Checking (C-QRAC) collaboration script on university students' science reading literacy in flipped learning conditions. Participants were 85 Taiwanese university students recruited…

The Influence of Learning Management Technology to Student's Learning Outcome

ERIC Educational Resources Information Center

Adi Sucipto, Taufiq Lilo; Efendi, Agus; Hanif, Husni Nadya; Budiyanto, Cucuk

2017-01-01

The study examines the influence of learning management systems to the implementation of flipped classroom model in a vocational school in Indonesia. The flipped classroom is a relatively new educational model that inverts students' time to study on lectures and time spent on homework. Despite studies have been conducted on the model, few…

[Flipped Classroom: A New Teaching Strategy for Integrating Information Technology Into Nursing Education].

PubMed

Chiou, Shwu-Fen; Su, Hsiu-Chuan; Liu, Kuei-Fen; Hwang, Hei-Fen

2015-06-01

The traditional "teacher-centered" instruction model is still currently pervasive in nursing education. However, this model does not stimulate the critical thinking or foster the self-learning competence of students. In recent years, the rapid development of information technology and the changes in educational philosophy have encouraged the development of the "flipped classroom" concept. This concept completely subverts the traditional instruction model by allowing students to access and use related learning activities prior to class on their smartphones or tablet computers. Implementation of this concept has been demonstrated to facilitate greater classroom interaction between teachers and students, to stimulate student thinking, to guide problem solving, and to encourage cooperative learning and knowledge utilization in order to achieve the ideal of student-centered education. This student-centered model of instruction coincides with the philosophy of nursing education and may foster the professional competence of nursing students. The flipped classroom is already an international trend, and certain domestic education sectors have adopted and applied this concept as well. However, this concept has only just begun to make its mark on nursing education. This article describes the concept of the flipped classroom, the implementation myth, the current experience with implementing this concept in international healthcare education, and the challenging issues. We hope to provide a reference for future nursing education administrators who are responsible to implement flipped classroom teaching strategies in Taiwan.

A modified implementation of tristate inverter based static master-slave flip-flop with improved power-delay-area product.

PubMed

Singh, Kunwar; Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C(2)MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C(2)MOS based flip-flop designs mC(2)MOSff1 and mC(2)MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC(2)MOSff1. Postlayout simulations indicate that mC(2)MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes.

A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product

PubMed Central

Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C2MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C2MOS based flip-flop designs mC2MOSff1 and mC2MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC2MOSff1. Postlayout simulations indicate that mC2MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes. PMID:24723808

Automated Absorber Attachment for X-ray Microcalorimeter Arrays

NASA Technical Reports Server (NTRS)

Moseley, S.; Allen, Christine; Kilbourne, Caroline; Miller, Timothy M.; Costen, Nick; Schulte, Eric; Moseley, Samuel J.

2007-01-01

Our goal is to develop a method for the automated attachment of large numbers of absorber tiles to large format detector arrays. This development includes the fabrication of high quality, closely spaced HgTe absorber tiles that are properly positioned for pick-and-place by our FC150 flip chip bonder. The FC150 also transfers the appropriate minute amount of epoxy to the detectors for permanent attachment of the absorbers. The success of this development will replace an arduous, risky and highly manual task with a reliable, high-precision automated process.

Integrated microsystems packaging approach with LCP

NASA Astrophysics Data System (ADS)

Jaynes, Paul; Shacklette, Lawrence W.

2006-05-01

Within the government communication market there is an increasing push to further miniaturize systems with the use of chip-scale packages, flip-chip bonding, and other advances over traditional packaging techniques. Harris' approach to miniaturization includes these traditional packaging advances, but goes beyond this level of miniaturization by combining the functional and structural elements of a system, thus creating a Multi-Functional Structural Circuit (MFSC). An emerging high-frequency, near hermetic, thermoplastic electronic substrate material, Liquid Crystal Polymer (LCP), is the material that will enable the combination of the electronic circuit and the physical structure of the system. The first embodiment of this vision for Harris is the development of a battlefield acoustic sensor module. This paper will introduce LCP and its advantages for MFSC, present an example of the work that Harris has performed, and speak to LCP MFSCs' potential benefits to miniature communications modules and sensor platforms.

Design and fabrication of vertically-integrated CMOS image sensors.

PubMed

Skorka, Orit; Joseph, Dileepan

2011-01-01

Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors.

Design and Fabrication of Vertically-Integrated CMOS Image Sensors

PubMed Central

Skorka, Orit; Joseph, Dileepan

2011-01-01

Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

Investigation of numerical simulation on all-optical flip-flop stability maps of 1550nm vertical-cavity surface-emitting laser

NASA Astrophysics Data System (ADS)

Li, Jun; Xia, Qing; Wang, Xiaofa

2017-10-01

Based on the extended spin-flip model, the all-optical flip-flop stability maps of the 1550nm vertical-cavity surface-emitting laser have been studied. Theoretical results show that excellent agreement is found between theoretical and the reported experimental results in polarization switching point current which is equal to 1.95 times threshold. Furthermore, the polarization bistable region is wide which is from 1.05 to 1.95 times threshold. A new method is presented that uses power difference between two linear polarization modes as the judging criterion of trigger degree and stability maps of all-optical flip-flop operation under different injection parameters are obtained. By alternately injecting set and reset pulse with appropriate parameters, the mutual conversion switching between two polarization modes is realized, the feasibility of all-optical flip-flop operation is checked theoretically. The results show certain guiding significance on the experimental study on all optical buffer technology.

Product assurance technology efforts: Technical accomplishments

NASA Technical Reports Server (NTRS)

1985-01-01

Product assurance technology topics addressed include: wafer acceptance procedures, test chips, test structures, test chip methodology, fault models, and the Combined Release and Radiation Effects Satellite test chip.

An Action Research Study from Implementing the Flipped Classroom Model in Primary School History Teaching and Learning

ERIC Educational Resources Information Center

Aidinopoulou, Vasiliki; Sampson, Demetrios G.

2017-01-01

The benefits of the flipped classroom (FC) model in students' learning are claimed in many recent studies. These benefits are typically accounted to the pedagogically efficient use of classroom time for engaging students in active learning. Although there are several relevant studies for the deployment of the FC model in Science, Technology,…

Language Teaching and Technology Forum: The Integration of a Student Response System in Flipped Classrooms

ERIC Educational Resources Information Center

Hung, Hsiu-Ting

2017-01-01

The present study incorporates a student response system (SRS) as a means to engage students in a flipped classroom and promote active learning. While the effectiveness of such systems with regard to student learning has been well documented in disciplines that are dominated by lecture-based instruction, no studies have compared the effectiveness…

Adopting Lightboard for a Chemistry Flipped Classroom to Improve Technology-Enhanced Videos for Better Learner Engagement

ERIC Educational Resources Information Center

Fung, Fun Man

2017-01-01

Currently there are two primary methods of recording flipped classroom videos: (1) using the white board and (2) screencasting a PowerPoint presentation. Both methods have several disadvantages. In the former, the presenter's body obscures the content. Both methods lack an element of human interaction between the viewers and presenter and require…

K-Band Phased Array Developed for Low- Earth-Orbit Satellite Communications

NASA Technical Reports Server (NTRS)

Anzic, Godfrey

1999-01-01

Future rapid deployment of low- and medium-Earth-orbit satellite constellations that will offer various narrow- to wide-band wireless communications services will require phased-array antennas that feature wide-angle and superagile electronic steering of one or more antenna beams. Antennas, which employ monolithic microwave integrated circuits (MMIC), are perfectly suited for this application. Under a cooperative agreement, an MMIC-based, K-band phased-array antenna is being developed with 50/50 cost sharing by the NASA Lewis Research Center and Raytheon Systems Company. The transmitting array, which will operate at 19 gigahertz (GHz), is a state-of-the-art design that features dual, independent, electronically steerable beam operation ( 42 ), a stand-alone thermal management, and a high-density tile architecture. This array can transmit 622 megabits per second (Mbps) in each beam from Earth orbit to small Earth terminals. The weight of the total array package is expected to be less than 8 lb. The tile integration technology (flip chip MMIC tile) chosen for this project represents a major advancement in phased-array engineering and holds much promise for reducing manufacturing costs.

Advanced Packaging Technology Used in Fabricating a High-Temperature Silicon Carbide Pressure Sensor

NASA Technical Reports Server (NTRS)

Beheim, Glenn M.

2003-01-01

The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were installed in water-cooled jackets, as shown. This was a severe test because the pressure-sensing chips were exposed to the hot combustion gases. Prior to the installation of the SiC pressure sensors, two high-temperature silicon sensors, installed in the same locations, did not survive a single engine run. The durability of the leadless SiC pressure sensor was demonstrated when both SiC sensors operated properly throughout the two runs that were conducted.

Numerical simulation and experimental investigation of GaN-based flip-chip LEDs and top-emitting LEDs.

PubMed

Liu, Xingtong; Zhou, Shengjun; Gao, Yilin; Hu, Hongpo; Liu, Yingce; Gui, Chengqun; Liu, Sheng

2017-12-01

We demonstrate a GaN-based flip-chip LED (FC-LED) with a highly reflective indium-tin oxide (ITO)/distributed Bragg reflector (DBR) ohmic contact. A transparent ITO current spreading layer combined with Ta 2 O 5 /SiO 2 double DBR stacks is used as a reflective p-type ohmic contact in the FC-LED. We develop a strip-shaped SiO 2 current blocking layer, which is well aligned with a p-electrode, to prevent the current from crowding around the p-electrode. Our combined numerical simulation and experimental results revealed that the FC-LED with ITO/DBR has advantages of better current spreading and superior heat dissipation performance compared to top-emitting LEDs (TE-LEDs). As a result, the light output power (LOP) of the FC-LED with ITO/DBR was 7.6% higher than that of the TE-LED at 150 mA, and the light output saturation current was shifted from 130.9  A/cm 2 for the TE-LED to 273.8  A/cm 2 for the FC-LED with ITO/DBR. Owing to the high reflectance of the ITO/DBR ohmic contact, the LOP of the FC-LED with ITO/DBR was 13.0% higher than that of a conventional FC-LED with Ni/Ag at 150 mA. However, because of the better heat dissipation of the Ni/Ag ohmic contact, the conventional FC-LED with Ni/Ag exhibited higher light output saturation current compared to the FC-LED with ITO/DBR.

Research and development of biochip technologies in Taiwan

NASA Astrophysics Data System (ADS)

Ting, Solomon J.; Chiou, Arthur E. T.

2000-07-01

Recent advancements in several genome-sequencing projects have stimulated an enormous interest in microarray DNA chip technology, especially in the biomedical sciences and pharmaceutical industries. The DNA chips facilitated the miniaturization of conventional nucleic acid hybridizations, by either robotically spotting thousands of library cDNAs or in situ synthesis of high-density oligonucleotides onto solid supports. These innovations have found a wide range of applications in molecular biology, especially in studying gene expression and discovering new genes from the global view of genomic analysis. The research and development of this powerful tool has also received great attentions in Taiwan. In this paper, we report the current progresses of our DNA chip project, along with the current status of other biochip projects in Taiwan, such as protein chip, PCR chip, electrophoresis chip, olfactory chip, etc. The new development of biochip technologies integrates the biotechnology with the semiconductor processing, the micro- electro-mechanical, optoelectronic, and digital signal processing technologies. Most of these biochip technologies utilitze optical detection methods for data acquisition and analysis. The strengths and advantages of different approaches are compared and discussed in this report.

New On-board Microprocessors

NASA Astrophysics Data System (ADS)

Weigand, R.

Two new processor devices have been developed for the use on board of spacecrafts. An 8-bit 8032-microcontroller targets typical controlling applications in instruments and sub-systems, or could be used as a main processor on small satellites, whereas the LEON 32-bit SPARC processor can be used for high performance controlling and data processing tasks. The ADV80S32 is fully compliant to the Intel 80x1 architecture and instruction set, extended by additional peripherals, 512 bytes on-chip RAM and a bootstrap PROM, which allows downloading the application software using the CCSDS PacketWire pro- tocol. The memory controller provides a de-multiplexed address/data bus, and allows to access up to 16 MB data and 8 MB program RAM. The peripherals have been de- signed for the specific needs of a spacecraft, such as serial interfaces compatible to RS232, PacketWire and TTC-B-01, counters/timers for extended duration and a CRC calculation unit accelerating the CCSDS TM/TC protocol. The 0.5 um Atmel manu- facturing technology (MG2RT) provides latch-up and total dose immunity; SEU fault immunity is implemented by using SEU hardened Flip-Flops and EDAC protection of internal and external memories. The maximum clock frequency of 20 MHz allows a processing power of 3 MIPS. Engineering samples are available. For SW develop- ment, various SW packages for the 8051 architecture are on the market. The LEON processor implements a 32-bit SPARC V8 architecture, including all the multiply and divide instructions, complemented by a floating-point unit (FPU). It includes several standard peripherals, such as timers/watchdog, interrupt controller, UARTs, parallel I/Os and a memory controller, allowing to use 8, 16 and 32 bit PROM, SRAM or memory mapped I/O. With on-chip separate instruction and data caches, almost one instruction per clock cycle can be reached in some applications. A 33-MHz 32-bit PCI master/target interface and a PCI arbiter allow operating the device in a plug-in card (for SW development on PC etc.), or to consider using it as a PCI master controller in an on-board system. Advanced SEU fault tolerance is in- troduced by design, using triple modular redundancy (TMR) flip-flops for all registers and EDAC protection for all memories. The device will be manufactured in a radia- tion hard Atmel 0.25 um technology, targeting 100 MHz processor clock frequency. The non fault-tolerant LEON processor VHDL model is available as free source code, and the SPARC architecture is a well-known industry standard. Therefore, know-how, software tools and operating systems are widely available.

An Implantable Neural Sensing Microsystem with Fiber-Optic Data Transmission and Power Delivery

PubMed Central

Park, Sunmee; Borton, David A.; Kang, Mingyu; Nurmikko, Arto V.; Song, Yoon-Kyu

2013-01-01

We have developed a prototype cortical neural sensing microsystem for brain implantable neuroengineering applications. Its key feature is that both the transmission of broadband, multichannel neural data and power required for the embedded microelectronics are provided by optical fiber access. The fiber-optic system is aimed at enabling neural recording from rodents and primates by converting cortical signals to a digital stream of infrared light pulses. In the full microsystem whose performance is summarized in this paper, an analog-to-digital converter and a low power digital controller IC have been integrated with a low threshold, semiconductor laser to extract the digitized neural signals optically from the implantable unit. The microsystem also acquires electrical power and synchronization clocks via optical fibers from an external laser by using a highly efficient photovoltaic cell on board. The implantable unit employs a flexible polymer substrate to integrate analog and digital microelectronics and on-chip optoelectronic components, while adapting to the anatomical and physiological constraints of the environment. A low power analog CMOS chip, which includes preamplifier and multiplexing circuitry, is directly flip-chip bonded to the microelectrode array to form the cortical neurosensor device. PMID:23666130

Multilayered microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2003-01-01

An apparatus for packaging of microelectronic devices is disclosed, wherein the package includes an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can comprise, for example, a cofired ceramic frame or body. The package has an internal stepped structure made of a plurality of plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package, according to some embodiments. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination. The integral window can further include a lens for optically transforming light passing through the window. The package can include an array of binary optic lenslets made integral with the window. The package can include an electrically-switched optical modulator, such as a lithium niobate window attached to the package, for providing a very fast electrically-operated shutter.

Is the "flipped" pedagogical model the answer to the challenges of rural nursing education?: A discussion paper?

PubMed

Anolak, Helena; Coleman, Andrew; Sugden, Paul

2018-07-01

Rural Australian health services face significant challenges such as aging populations, access and retention of services and health practitioners as well as difficulties with staff training due to geographic isolation. Educational pedagogy, through a 'flipped' or 'flipped' classroom method has become popular in nursing literature whereby discussion surrounding its effectiveness, ability to increase performance, address learning outcomes and resolve the education-clinical practice divide is currently being explored. Several reviews that look specifically at the validity and implementation of the flipped classroom pedagogy into nursing education demonstrate a need for further scientific research. Current literature examines the in-class on campus implementation of the methodology but rarely does it consider the advantages or ways of implementing such a method in a rural off campus nursing learning environment. The use of technology is not the solution unless supported by interaction to develop practical situational skills. The authors consider advantages and disadvantages and identify central problems for the effective implementation of 'flipped' in off-campus rural nursing education. Copyright © 2018 Elsevier Ltd. All rights reserved.

A flipped mode teaching approach for large and advanced electrical engineering courses

NASA Astrophysics Data System (ADS)

Ravishankar, Jayashri; Epps, Julien; Ambikairajah, Eliathamby

2018-05-01

A fully flipped mode teaching approach is challenging for students in advanced engineering courses, because of demanding pre-class preparation load, due to the complex and analytical nature of the topics. When this is applied to large classes, it brings an additional complexity in terms of promoting the intended active learning. This paper presents a novel selective flipped mode teaching approach designed for large and advanced courses that has two aspects: (i) it provides selective flipping of a few topics, while delivering others in traditional face-to-face teaching, to provide an effective trade-off between the two approaches according to the demands of individual topics and (ii) it introduces technology-enabled live in-class quizzes to obtain instant feedback and facilitate collaborative problem-solving exercises. The proposed approach was implemented for a large fourth year course in electrical power engineering over three successive years and the criteria for selecting between the flipped mode teaching and traditional teaching modes are outlined. Results confirmed that the proposed approach improved both students' academic achievements and their engagement in the course, without overloading them during the teaching period.

The affordances of using a flipped classroom approach in the teaching of mathematics: a case study of a grade 10 mathematics class

NASA Astrophysics Data System (ADS)

Muir, Tracey; Geiger, Vince

2016-03-01

Teaching secondary mathematics has a number of challenges, including the expectations that teachers cover the prescribed curriculum, help students learn difficult concepts, prepare students for future studies, and, increasingly, that they do so incorporating digital technologies. This study investigates a teacher's, and his students', perceptions of the benefits or otherwise of a flipped classroom approach in meeting these challenges, within a prescribed curriculum context. Data collection instruments included a survey designed to investigate the nature of students' engagement with the flipped approach and semi-structured student and teacher interviews. Analysis of these data indicated that the teacher and students were positive about their experiences with a flipped classroom approach and that students were motivated to engage with the teacher-created online mathematics resources. The study adds to the limited research literature related to student and teacher perceptions of the affordances of the flipped classroom approach and has implications for secondary mathematics teachers who face the challenge of the twin demands of covering the prescribed curriculum and catering for a range of students' learning needs.

Flipping for success: evaluating the effectiveness of a novel teaching approach in a graduate level setting.

PubMed

Moraros, John; Islam, Adiba; Yu, Stan; Banow, Ryan; Schindelka, Barbara

2015-02-28

Flipped Classroom is a model that's quickly gaining recognition as a novel teaching approach among health science curricula. The purpose of this study was four-fold and aimed to compare Flipped Classroom effectiveness ratings with: 1) student socio-demographic characteristics, 2) student final grades, 3) student overall course satisfaction, and 4) course pre-Flipped Classroom effectiveness ratings. The participants in the study consisted of 67 Masters-level graduate students in an introductory epidemiology class. Data was collected from students who completed surveys during three time points (beginning, middle and end) in each term. The Flipped Classroom was employed for the academic year 2012-2013 (two terms) using both pre-class activities and in-class activities. Among the 67 Masters-level graduate students, 80% found the Flipped Classroom model to be either somewhat effective or very effective (M = 4.1/5.0). International students rated the Flipped Classroom to be significantly more effective when compared to North American students (X(2) = 11.35, p < 0.05). Students' perceived effectiveness of the Flipped Classroom had no significant association to their academic performance in the course as measured by their final grades (r s = 0.70). However, students who found the Flipped Classroom to be effective were also more likely to be satisfied with their course experience. Additionally, it was found that the SEEQ variable scores for students enrolled in the Flipped Classroom were significantly higher than the ones for students enrolled prior to the implementation of the Flipped Classroom (p = 0.003). Overall, the format of the Flipped Classroom provided more opportunities for students to engage in critical thinking, independently facilitate their own learning, and more effectively interact with and learn from their peers. Additionally, the instructor was given more flexibility to cover a wider range and depth of material, provide in-class applied learning opportunities based on problem-solving activities and offer timely feedback/guidance to students. Yet in our study, this teaching style had its fair share of challenges, which were largely dependent on the use and management of technology. Despite these challenges, the Flipped Classroom proved to be a novel and effective teaching approach at the graduate level setting.

CMOS Image Sensors: Electronic Camera On A Chip

NASA Technical Reports Server (NTRS)

Fossum, E. R.

1995-01-01

Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

HPLC-Chip/MS Technology in Proteomic Profiling

NASA Astrophysics Data System (ADS)

Vollmer, Martin; van de Goor, Tom

HPLC-chip/MS is a novel nanoflow analytical technology conducted on a microfabricated chip that allows for highly efficient HPLC separation and superior sensitive MS detection of complex proteomic mixtures. This is possible through on-chip preconcentration and separation with fluidic connection made automatically in a leak-tight fashion. Minimum precolumn and postcolumn peak dispersion and uncompromised ease of use result in compounds eluting in bands of only a few nanoliters. The chip is fabricated out of bio-inert polyimide-containing channels and integrated chip structures, such as an electrospray emitter, columns, and frits manufactured by laser ablation technology. Meanwhile, a variety of HPLC-chips differing in design and stationary phase are commercially available, which provide a comprehensive solution for applications in proteomics, glycomics, biomarker, and pharmaceutical discovery. The HPLC-chip can also be easily integrated into a multidimensional separation workflow where different orthogonal separation techniques are combined to solve a highly complex separation problems. In this chapter, we describe in detail the methodological chip usage and functionality and its application in the elucidation of the protein profile of human nucleoli.

Life test of the InGaAs focal plane arrays detector for space applications

NASA Astrophysics Data System (ADS)

Zhu, Xian-Liang; Zhang, Hai-Yan; Li, Xue; Huang, Zhang-Cheng; Gong, Hai-Mei

2017-08-01

The short-wavelength infrared (SWIR) InGaAs focal plane array (FPA) detector consists of infrared detector chip, readout integrated circuit (ROIC), and flip-chip bonding interconnection by Indium bump. In order to satisfy space application requirements for failure rates or Mean Time to Failure (MTTF), which can only be demonstrated with the large number of detectors manufactured, the single pixel in InGaAs FPAs was chosen as the research object in this paper. The constant-stress accelerated life tests were carried out at 70°C 80°C 90°C and100°C. The failed pixels increased gradually during more than 14000 hours at each elevated temperatures. From the random failure data the activation energy was estimated to be 0.46eV, and the average lifetime of a single pixel in InGaAs FPAs was estimated to be longer than 1E+7h at the practical operating temperature (5°C).

Vertically Integrated MEMS SOI Composite Porous Silicon-Crystalline Silicon Cantilever-Array Sensors: Concept for Continuous Sensing of Explosives and Warfare Agents

NASA Astrophysics Data System (ADS)

Stolyarova, Sara; Shemesh, Ariel; Aharon, Oren; Cohen, Omer; Gal, Lior; Eichen, Yoav; Nemirovsky, Yael

This study focuses on arrays of cantilevers made of crystalline silicon (c-Si), using SOI wafers as the starting material and using bulk micromachining. The arrays are subsequently transformed into composite porous silicon-crystalline silicon cantilevers, using a unique vapor phase process tailored for providing a thin surface layer of porous silicon on one side only. This results in asymmetric cantilever arrays, with one side providing nano-structured porous large surface, which can be further coated with polymers, thus providing additional sensing capabilities and enhanced sensing. The c-Si cantilevers are vertically integrated with a bottom silicon die with electrodes allowing electrostatic actuation. Flip Chip bonding is used for the vertical integration. The readout is provided by a sensitive Capacitance to Digital Converter. The fabrication, processing and characterization results are reported. The reported study is aimed towards achieving miniature cantilever chips with integrated readout for sensing explosives and chemical warfare agents in the field.

Miniaturized force/torque sensor for in vivo measurements of tissue characteristics.

PubMed

Hessinger, M; Pilic, T; Werthschutzky, R; Pott, P P

2016-08-01

This paper presents the development of a surgical instrument to measure interaction forces/torques with organic tissue during operation. The focus is on the design progress of the sensor element, consisting of a spoke wheel deformation element with a diameter of 12 mm and eight inhomogeneous doped piezoresistive silicon strain gauges on an integrated full-bridge assembly with an edge length of 500 μm. The silicon chips are contacted to flex-circuits via flip chip and bonded on the substrate with a single component adhesive. A signal processing board with an 18 bit serial A/D converter is integrated into the sensor. The design concept of the handheld surgical sensor device consists of an instrument coupling, the six-axis sensor, a wireless communication interface and battery. The nominal force of the sensing element is 10 N and the nominal torque is 1 N-m in all spatial directions. A first characterization of the force sensor results in a maximal systematic error of 4.92 % and random error of 1.13 %.

Correlation Between Material Properties of Ferroelectric Thin Films and Design Parameters for Microwave Device Applications: Modeling Examples and Experimental Verification

NASA Technical Reports Server (NTRS)

Miranda, Felix A.; VanKeuls, Fred W.; Subramanyam, Guru; Mueller, Carl H.; Romanofsky, Robert R.; Rosado, Gerardo

2000-01-01

The application of thin ferroelectric films for frequency and phase agile components is the topic of interest of many research groups worldwide. Consequently, proof-of-concepts (POC) of different tunable microwave components using either (HTS, metal)/ferroelectric thin film/dielectric heterostructures or (thick, thin) film "flip-chip" technology have been reported. Either as ferroelectric thin film characterization tools or from the point of view of circuit implementation approach, both configurations have their respective advantages and limitations. However, we believe that because of the progress made so far using the heterostructure (i.e., multilayer) approach, and due to its intrinsic features such as planar configuration and monolithic integration, a study on the correlation of circuit geometry aspects and ferroelectric material properties could accelerate the insertion of this technology into working systems. In this paper, we will discuss our study performed on circuits based on microstrip lines at frequencies above 10 GHz, where the multilayer configuration offers greater ease of insertion due to circuit's size reduction. Modeled results of relevant circuit parameters such as the characteristic impedance, effective dielectric constant, and attenuation as a function of ferroelectric film's dielectric constant, tans, and thickness, will be presented for SrTiO3 and Ba(x)Sr(1-x)TiO3 ferroelectric films. A comparison between the modeled and experimental data for some of these parameters will be presented.

Thick resist for MEMS processing

NASA Astrophysics Data System (ADS)

Brown, Joe; Hamel, Clifford

2001-11-01

The need for technical innovation is always present in today's economy. Microfabrication methods have evolved in support of the demand for smaller and faster integrated circuits with price performance improvements always in the scope of the manufacturing design engineer. The dispersion of processing technology spans well beyond IC fabrication today with batch fabrication and wafer scale processing lending advantages to MEMES applications from biotechnology to consumer electronics from oil exploration to aerospace. Today the demand for innovative processing techniques that enable technology is apparent where only a few years ago appeared too costly or not reliable. In high volume applications where yield and cost improvements are measured in fractions of a percent it is imperative to have process technologies that produce consistent results. Only a few years ago thick resist coatings were limited to thickness less than 20 microns. Factors such as uniformity, edge bead and multiple coatings made high volume production impossible. New developments in photoresist formulation combined with advanced coating equipment techniques that closely controls process parameters have enable thick photoresist coatings of 70 microns with acceptable uniformity and edge bead in one pass. Packaging of microelectronic and micromechanical devices is often a significant cost factor and a reliability issue for high volume low cost production. Technologies such as flip- chip assembly provide a solution for cost and reliability improvements over wire bond techniques. The processing for such technology demands dimensional control and presents a significant cost savings if it were compatible with mainstream technologies. Thick photoresist layers, with good sidewall control would allow wafer-bumping technologies to penetrate the barriers to yield and production where costs for technology are the overriding issue. Single pass processing is paramount to the manufacturability of packaging technology. Uniformity and edge bead control defined the success of process implementation. Today advanced packaging solutions are created with thick photoresist coatings. The techniques and results will be presented.

The flipped classroom for medical students.

PubMed

Morgan, Helen; McLean, Karen; Chapman, Chris; Fitzgerald, James; Yousuf, Aisha; Hammoud, Maya

2015-06-01

The objectives of this curricular innovation project were to implement a flipped classroom curriculum for the gynaecologic oncology topics of the obstetrics and gynaecology medical student clerkship, and to evaluate student satisfaction with the change. Four short online videos on the topics of endometrial hyperplasia, cervical dysplasia, evaluation of an adnexal mass, and ovarian cancer were created, and students were instructed to view them prior to a class-time active learning session. The Learning Activity Management System (lams) open-source online platform was used to create an active learning class-time activity that consisted of a coached discussion of cases. Student satisfaction with the two aspects of the flipped curriculum was obtained. In addition, lecture assessment for the gynaecologic oncology topics and aggregate student performance on the gynaecological oncology questions of the US National Board of Medical Examiners (NBME) Subject Examination were compared before and after implementation of the curriculum. Eighty-nine students rotated on the clerkship during the pilot period of analysis. Seventy-one students (80%) viewed the videos prior to the class session, and 84 (94%) attended the session. Student satisfaction was very high for both parts of the curriculum. There was no significant difference in aggregate student performance on the gynaecological oncology questions of the NBME Subject Examination. The flipped classroom curriculum demonstrates a promising platform for using technology to make better use of students' time Our implementation of the flipped classroom curriculum for the gynaecologic oncology topics successfully demonstrates a promising platform for using technology to make better use of our students' time, and for increasing their satisfaction with the necessary didactic learning of the clerkship. © 2015 John Wiley & Sons Ltd.

Entangling atomic spins with a Rydberg-dressed spin-flip blockade

DOE PAGES

Jau, Y. -Y.; Hankin, A. M.; Keating, T.; ...

2015-10-05

Controlling the quantum entanglement between parts of a many-body system is key to unlocking the power of quantum technologies such as quantum computation, high-precision sensing, and the simulation of many-body physics. The spin degrees of freedom of ultracold neutral atoms in their ground electronic state provide a natural platform for such applications thanks to their long coherence times and the ability to control them with magneto-optical fields. However, the creation of strong coherent coupling between spins has been challenging. In this paper, we demonstrate a strong and tunable Rydberg-dressed interaction between spins of individually trapped caesium atoms with energy shiftsmore » of order 1 MHz in units of Planck’s constant. This interaction leads to a ground-state spin-flip blockade, whereby simultaneous hyperfine spin flips of two atoms are inhibited owing to their mutual interaction. Finally, we employ this spin-flip blockade to rapidly produce single-step Bell-state entanglement between two atoms with a fidelity ≥81(2)%.« less

Hybridization of active and passive elements for planar photonic components and interconnects

NASA Astrophysics Data System (ADS)

Pearson, M.; Bidnyk, S.; Balakrishnan, A.

2007-02-01

The deployment of Passive Optical Networks (PON) for Fiber-to-the-Home (FTTH) applications currently represents the fastest growing sector of the telecommunication industry. Traditionally, FTTH transceivers have been manufactured using commodity bulk optics subcomponents, such as thin film filters (TFFs), micro-optic collimating lenses, TO-packaged lasers, and photodetectors. Assembling these subcomponents into a single housing requires active alignment and labor-intensive techniques. Today, the majority of cost reducing strategies using bulk subcomponents has been implemented making future reductions in the price of manufacturing FTTH transceivers unlikely. Future success of large scale deployments of FTTH depends on further cost reductions of transceivers. Realizing the necessity of a radically new packaging approach for assembly of photonic components and interconnects, we designed a novel way of hybridizing active and passive elements into a planar lightwave circuit (PLC) platform. In our approach, all the filtering components were monolithically integrated into the chip using advancements in planar reflective gratings. Subsequently, active components were passively hybridized with the chip using fully-automated high-capacity flip-chip bonders. In this approach, the assembly of the transceiver package required no active alignment and was readily suitable for large-scale production. This paper describes the monolithic integration of filters and hybridization of active components in both silica-on-silicon and silicon-on-insulator PLCs.

Fabrication of a Silicon Backshort Assembly for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Electrical characteristics for Sn-Ag-Cu solder bump with Ti/Ni/Cu under-bump metallization after temperature cycling tests

NASA Astrophysics Data System (ADS)

Shih, T. I.; Lin, Y. C.; Duh, J. G.; Hsu, Tom

2006-10-01

Lead-free solder bumps have been widely used in current flip-chip technology (FCT) due to environmental issues. Solder joints after temperature cycling tests were employed to investigate the interfacial reaction between the Ti/Ni/Cu under-bump metallization and Sn-Ag-Cu solders. The interfacial morphology and quantitative analysis of the intermetallic compounds (IMCs) were obtained by electron probe microanalysis (EPMA) and field emission electron probe microanalysis (FE-EPMA). Various types of IMCs such as (Cu1-x,Agx)6Sn5, (Cu1-y,Agy)3Sn, and (Ag1-z,Cuz)3Sn were observed. In addition to conventional I-V measurements by a special sample preparation technique, a scanning electron microscope (SEM) internal probing system was introduced to evaluate the electrical characteristics in the IMCs after various test conditions. The electrical data would be correlated to microstructural evolution due to the interfacial reaction between the solder and under-bump metallurgy (UBM). This study demonstrated the successful employment of an internal nanoprobing approach, which would help further understanding of the electrical behavior within an IMC layer in the solder/UBM assembly.

Cost-effective parallel optical interconnection module based on fully passive-alignment process

NASA Astrophysics Data System (ADS)

Son, Dong Hoon; Heo, Young Soon; Park, Hyoung-Jun; Kang, Hyun Seo; Kim, Sung Chang

2017-11-01

In optical interconnection technology, high-speed and large data transitions with low error rate and cost reduction are key issues for the upcoming 8K media era. The researchers present notable types of optical manufacturing structures of a four-channel parallel optical module by fully passive alignment, which are able to reduce manufacturing time and cost. Each of the components, such as vertical-cavity surface laser/positive-intrinsic negative-photodiode array, microlens array, fiber array, and receiver (RX)/transmitter (TX) integrated circuit, is integrated successfully using flip-chip bonding, die bonding, and passive alignment with a microscope. Clear eye diagrams are obtained by 25.78-Gb/s (for TX) and 25.7-Gb/s (for RX) nonreturn-to-zero signals of pseudorandom binary sequence with a pattern length of 231 to 1. The measured responsivity and minimum sensitivity of the RX are about 0.5 A/W and ≤-6.5 dBm at a bit error rate (BER) of 10-12, respectively. The optical power margin at a BER of 10-12 is 7.5 dB, and cross talk by the adjacent channel is ≤1 dB.

Flipped Learning: Can Rheumatology Lead the Shift in Medical Education?

PubMed

El Miedany, Yasser; El Gaafary, Maha; El Aroussy, Nadia; Youssef, Sally

2018-04-16

To: 1. implement flipped classroom rheumatology teaching for undergraduate education. 2. Evaluate outcomes of teaching using OSCE assessment and student perceived effectiveness and satisfaction survey. The flipped classroom education was conducted in 3 phases. Phase 1: carried out in the students' own time. Web links were emailed to assist exposure of the instructional part of the lesson online. Phase 2: interactive in-class activity to share personal reflection and reinforce the key aspects. Phase 3: a simulated OSCE assessment. A cohort of 56-students, who were taught in the last educational year on the same topics according to standard teaching protocols, were included as control group. The clinical Outcomes were assessed using the scores of the OSCE examination model. Academic outcomes included the engagement measure as well as the students' answers to perceived effectiveness and satisfaction survey. There was no significant difference regarding demographics between the 2 students' groups. There was significant improvement (p< 0.05) in the flipped learning, in contrast to the control group, in terms of clinical (OSCE score) as well as communication skills. Student perceived effectiveness and satisfaction was significantly higher among the flipped learning (p< 0.05). Scores from the flipped learning cohort showed a state of engagement significantly higher than the control group (p< 0.01). Flipped learning implementation musculoskeletal learning successfully demonstrated a promising platform for using technology to make better use of the students' time, and for increasing their satisfaction. Active learning increases student engagement and can lead to improved retention of knowledge. Copyright© Bentham Science Publishers; For any queries, please email at epub@benthamscience.org.

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

PubMed

Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley

2009-10-01

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Off-line, built-in test techniques for VLSI circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sievers, M. W.

1982-01-01

It is shown that the use of redundant on-chip circuitry improves the testability of an entire VLSI circuit. In the study described here, five techniques applied to a two-bit ripple carry adder are compared. The techniques considered are self-oscillation, self-comparison, partition, scan path, and built-in logic block observer. It is noted that both classical stuck-at faults and nonclassical faults, such as bridging faults (shorts), stuck-on x faults where x may be 0, 1, or vary between the two, and parasitic flip-flop faults occur in IC structures. To simplify the analysis of the testing techniques, however, a stuck-at fault model is assumed.

Broad Frequency LTCC Vertical Interconnect Transition for Multichip Modules and System on Package Applications

NASA Technical Reports Server (NTRS)

Decrossas, Emmanuel; Glover, Michael D.; Porter, Kaoru; Cannon, Tom; Mantooth, H. Alan; Hamilton, M. C.

2013-01-01

Various stripline structures and flip chip interconnect designs for high-speed digital communication systems implemented in low temperature co-fired ceramic (LTCC) substrates are studied in this paper. Specifically, two different transition designs from edge launch 2.4 millimeter connectors to stripline transmission lines embedded in LTCC are discussed. After characterizing the DuPont (sup trademark) 9K7 green tape, different designs are proposed to improve signal integrity for high-speed digital data. The full-wave simulations and experimental data validate the presented designs over a broad frequency band from Direct Current to 50 gigahertz and beyond.

Research on defects inspection of solder balls based on eddy current pulsed thermography.

PubMed

Zhou, Xiuyun; Zhou, Jinlong; Tian, Guiyun; Wang, Yizhe

2015-10-13

In order to solve tiny defect detection for solder balls in high-density flip-chip, this paper proposed feasibility study on the effect of detectability as well as classification based on eddy current pulsed thermography (ECPT). Specifically, numerical analysis of 3D finite element inductive heat model is generated to investigate disturbance on the temperature field for different kind of defects such as cracks, voids, etc. The temperature variation between defective and non-defective solder balls is monitored for defects identification and classification. Finally, experimental study is carried on the diameter 1mm tiny solder balls by using ECPT and verify the efficacy of the technique.

Dispersion of Self-Propelled Rods Undergoing Fluctuation-Driven Flips

NASA Astrophysics Data System (ADS)

Takagi, Daisuke; Braunschweig, Adam B.; Zhang, Jun; Shelley, Michael J.

2013-01-01

Synthetic microswimmers may someday perform medical and technological tasks, but predicting their motion and dispersion is challenging. Here we show that chemically propelled rods tend to move on a surface along large circles but curiously show stochastic changes in the sign of the orbit curvature. By accounting for fluctuation-driven flipping of slightly curved rods, we obtain analytical predictions for the ensemble behavior in good agreement with our experiments. This shows that minor defects in swimmer shape can yield major long-term effects on macroscopic dispersion.

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for charged particle detection

NASA Astrophysics Data System (ADS)

Vignetti, M. M.; Calmon, F.; Pittet, P.; Pares, G.; Cellier, R.; Quiquerez, L.; Chaves de Albuquerque, T.; Bechetoille, E.; Testa, E.; Lopez, J.-P.; Dauvergne, D.; Savoy-Navarro, A.

2018-02-01

Single-Photon Avalanche Diodes (SPADs) are p-n junctions operated in Geiger Mode by applying a reverse bias above the breakdown voltage. SPADs have the advantage of featuring single photon sensitivity with timing resolution in the picoseconds range. Nevertheless, their relatively high Dark Count Rate (DCR) is a major issue for charged particle detection, especially when it is much higher than the incoming particle rate. To tackle this issue, we have developed a 3D Silicon Coincidence Avalanche Detector (3D-SiCAD). This novel device implements two vertically aligned SPADs featuring on-chip electronics for the detection of coincident avalanche events occurring on both SPADs. Such a coincidence detection mode allows an efficient discrimination of events related to an incoming charged particle (producing a quasi-simultaneous activation of both SPADs) from dark counts occurring independently on each SPAD. A 3D-SiCAD detector prototype has been fabricated in CMOS technology adopting a 3D flip-chip integration technique, and the main results of its characterization are reported in this work. The particle detection efficiency and noise rejection capability for this novel device have been evaluated by means of a β- strontium-90 radioactive source. Moreover the impact of the main operating parameters (i.e. the hold-off time, the coincidence window duration, the SPAD excess bias voltage) over the particle detection efficiency has been studied. Measurements have been performed with different β- particles rates and show that a 3D-SiCAD device outperforms single SPAD detectors: the former is indeed capable to detect particle rates much lower than the individual DCR observed in a single SPAD-based detectors (i.e. 2 to 3 orders of magnitudes lower).

Potential Application of BIOMASS Technology at National Space Technology Laboratories and Mississippi Army Ammunition Plant.

DTIC Science & Technology

1980-02-01

fuel. Based on the survey data, wood chips in the NSTL area are sold for $13 to $16 per wet ton ($14 to $18 Der l03 kg wet), bark for $6 to $7 per wet...truck 3 Chip vans (initially) 1 Pickup (3/4 ton) 1 Front-end loader (for handling at chip pile) This equipment combination assumes all material ]-inch...ing sites in chip vans , preferably with live-beds to aid in unloading. At the processing site the chips would be stored in large piles. A Front-end

Progress and prospects of GaN-based LEDs using nanostructures

NASA Astrophysics Data System (ADS)

Zhao, Li-Xia; Yu, Zhi-Guo; Sun, Bo; Zhu, Shi-Chao; An, Ping-Bo; Yang, Chao; Liu, Lei; Wang, Jun-Xi; Li, Jin-Min

2015-06-01

Progress with GaN-based light emitting diodes (LEDs) that incorporate nanostructures is reviewed, especially the recent achievements in our research group. Nano-patterned sapphire substrates have been used to grow an AlN template layer for deep-ultraviolet (DUV) LEDs. One efficient surface nano-texturing technology, hemisphere-cones-hybrid nanostructures, was employed to enhance the extraction efficiency of InGaN flip-chip LEDs. Hexagonal nanopyramid GaN-based LEDs have been fabricated and show electrically driven color modification and phosphor-free white light emission because of the linearly increased quantum well width and indium incorporation from the shell to the core. Based on the nanostructures, we have also fabricated surface plasmon-enhanced nanoporous GaN-based green LEDs using AAO membrane as a mask. Benefitting from the strong lateral SP coupling as well as good electrical protection by a passivation layer, the EL intensity of an SP-enhanced nanoporous LED was significantly enhanced by 380%. Furthermore, nanostructures have been used for the growth of GaN LEDs on amorphous substrates, the fabrication of stretchable LEDs, and for increasing the 3-dB modulation bandwidth for visible light communication. Project supported by the National Natural Science Foundation of China (Grant No. 61334009), the National High Technology Research and Development Program of China (Grant Nos. 2015AA03A101 and 2014BAK02B08), China International Science and Technology Cooperation Program (Grant No. 2014DFG62280), the “Import Outstanding Technical Talent Plan” and “Youth Innovation Promotion Association Program” of the Chinese Academy of Sciences.

Creating an Online Learning Community in a Flipped Classroom to Enhance EFL Learners' Oral Proficiency

ERIC Educational Resources Information Center

Wu, Wen-Chi Vivian; Hsieh, Jun Scott Chen; Yang, Jie Chi

2017-01-01

Since the advent of new technology for learning, innovative language instructors have been constantly seeking new pedagogy to match the potential of technology-enhanced instruction. While previous studies have supported the adoption of technologies to facilitate language teaching and learning, research into enhancing English as a foreign language…

[The joint applications of DNA chips and single nucleotide polymorphisms in forensic science].

PubMed

Bai, Peng; Tian, Li; Zhou, Xue-ping

2005-05-01

DNA chip technology, being a new high-technology, shows its vigorous life and rapid growth. Single Nucleotide Polymorphisms (SNPs) is the most common diversity in the human genome. It provides suitable genetic markers which play a key role in disease linkage study, pharmacogenomics, forensic medicine, population evolution and immigration study. Their advantage such as being analyzed with DNA chips technology, is predicted to play an important role in the field of forensic medicine, especially in paternity test and individual identification. This report mainly reviews the characteristics of DNA chip and SNPs, and their joint applications in the practice of forensic medicine.

A Science Classroom That's More than a Game

ERIC Educational Resources Information Center

Barlow, Tim; Fleming, Barry

2016-01-01

"Blended" and "flipped" pedagogies are becoming more common features of classrooms as the technological revolution continues. While the appropriate use of technology in the learning environment can serve to motivate some students, significant problems surrounding student motivation and engagement remain. As such, the…

Progress in ion torrent semiconductor chip based sequencing.

PubMed

Merriman, Barry; Rothberg, Jonathan M

2012-12-01

In order for next-generation sequencing to become widely used as a diagnostic in the healthcare industry, sequencing instrumentation will need to be mass produced with a high degree of quality and economy. One way to achieve this is to recast DNA sequencing in a format that fully leverages the manufacturing base created for computer chips, complementary metal-oxide semiconductor chip fabrication, which is the current pinnacle of large scale, high quality, low-cost manufacturing of high technology. To achieve this, ideally the entire sensory apparatus of the sequencer would be embodied in a standard semiconductor chip, manufactured in the same fab facilities used for logic and memory chips. Recently, such a sequencing chip, and the associated sequencing platform, has been developed and commercialized by Ion Torrent, a division of Life Technologies, Inc. Here we provide an overview of this semiconductor chip based sequencing technology, and summarize the progress made since its commercial introduction. We described in detail the progress in chip scaling, sequencing throughput, read length, and accuracy. We also summarize the enhancements in the associated platform, including sample preparation, data processing, and engagement of the broader development community through open source and crowdsourcing initiatives. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Deployable Laboratory Applications of Nano- and Bio-Technology (Applications de nanotechnologie et biotechnologie destinees a un laboratoire deployable)

DTIC Science & Technology

2014-10-01

applications of present nano-/ bio -technology include advanced health and fitness monitoring, high-resolution imaging, new environmental sensor platforms...others areas where nano-/ bio -technology development is needed: • Sensors : Diagnostic and detection kits (gene-chips, protein-chips, lab-on-chips, etc...studies on chemo- bio nano- sensors , ultra-sensitive biochips (“lab-on-a-chip” and “cells-on-chips” devices) have been prepared for routine medical

Hybrid optofluidic biosensors

NASA Astrophysics Data System (ADS)

Parks, Joshua W.

Optofluidics, born of the desire to create a system containing microfluidic environments with integrated optical elements, has seen dramatic increases in popularity over the last 10 years. In particular, the application of this technology towards chip based molecular sensors has undergone significant development. The most sensitive of these biosensors interface liquid- and solid-core antiresonant reflecting optical waveguides (ARROWs). These sensor chips are created using conventional silicon microfabrication. As such, ARROW technology has previously been unable to utilize state-of-the-art microfluidic developments because the technology used--soft polydimethyl siloxane (PDMS) micromolded chips--is unamenable to the silicon microfabrication workflows implemented in the creation of ARROW detection chips. The original goal of this thesis was to employ hybrid integration, or the connection of independently designed and fabricated optofluidic and microfluidic chips, to create enhanced biosensors with the capability of processing and detecting biological samples on a single hybrid system. After successful demonstration of this paradigm, this work expanded into a new direction--direct integration of sensing and detection technologies on a new platform with dynamic, multi-dimensional photonic re-configurability. This thesis reports a number of firsts, including: • 1,000 fold optical transmission enhancement of ARROW optofluidic detection chips through thermal annealing, • Detection of single nucleic acids on a silicon-based ARROW chip, • Hybrid optofluidic integration of ARROW detection chips and passive PDMS microfluidic chips, • Hybrid optofluidic integration of ARROW detection chips and actively controllable PDMS microfluidic chips with integrated microvalves, • On-chip concentration and detection of clinical Ebola nucleic acids, • Multimode interference (MMI) waveguide based wavelength division multiplexing for detection of single influenza virions, • All PDMS platform created from monolithically integrated solid- and liquid-core waveguides with single particle detection efficiency and directly integrated microvalves, featuring: ∘ Tunable/tailorable PDMS MMI waveguides, ∘ Lightvalves (optical switch/fluidic microvalve) with the ability to dynamically control light and fluid flow simultaneously, ∘ Lightvalve trap architecture with the ability to physically trap, detect, and analyze single biomolecules.

Tumour-on-a-chip: microfluidic models of tumour morphology, growth and microenvironment

PubMed Central

Trubelja, Alen

2017-01-01

Cancer remains one of the leading causes of death, albeit enormous efforts to cure the disease. To overcome the major challenges in cancer therapy, we need to have a better understanding of the tumour microenvironment (TME), as well as a more effective means to screen anti-cancer drug leads; both can be achieved using advanced technologies, including the emerging tumour-on-a-chip technology. Here, we review the recent development of the tumour-on-a-chip technology, which integrates microfluidics, microfabrication, tissue engineering and biomaterials research, and offers new opportunities for building and applying functional three-dimensional in vitro human tumour models for oncology research, immunotherapy studies and drug screening. In particular, tumour-on-a-chip microdevices allow well-controlled microscopic studies of the interaction among tumour cells, immune cells and cells in the TME, of which simple tissue cultures and animal models are not amenable to do. The challenges in developing the next-generation tumour-on-a-chip technology are also discussed. PMID:28637915

A Wireless Biomedical Signal Interface System-on-Chip for Body Sensor Networks.

PubMed

Lei Wang; Guang-Zhong Yang; Jin Huang; Jinyong Zhang; Li Yu; Zedong Nie; Cumming, D R S

2010-04-01

Recent years have seen the rapid development of biosensor technology, system-on-chip design, wireless technology. and ubiquitous computing. When assembled into an autonomous body sensor network (BSN), the technologies become powerful tools in well-being monitoring, medical diagnostics, and personal connectivity. In this paper, we describe the first demonstration of a fully customized mixed-signal silicon chip that has most of the attributes required for use in a wearable or implantable BSN. Our intellectual-property blocks include low-power analog sensor interface for temperature and pH, a data multiplexing and conversion module, a digital platform based around an 8-b microcontroller, data encoding for spread-spectrum wireless transmission, and a RF section requiring very few off-chip components. The chip has been fully evaluated and tested by connection to external sensors, and it satisfied typical system requirements.

Photonics-on-a-chip: recent advances in integrated waveguides as enabling detection elements for real-world, lab-on-a-chip biosensing applications.

PubMed

Washburn, Adam L; Bailey, Ryan C

2011-01-21

By leveraging advances in semiconductor microfabrication technologies, chip-integrated optical biosensors are poised to make an impact as scalable and multiplexable bioanalytical measurement tools for lab-on-a-chip applications. In particular, waveguide-based optical sensing technology appears to be exceptionally amenable to chip integration and miniaturization, and, as a result, the recent literature is replete with examples of chip-integrated waveguide sensing platforms developed to address a wide range of contemporary analytical challenges. As an overview of the most recent advances within this dynamic field, this review highlights work from the last 2-3 years in the areas of grating-coupled, interferometric, photonic crystal, and microresonator waveguide sensors. With a focus towards device integration, particular emphasis is placed on demonstrations of biosensing using these technologies within microfluidically controlled environments. In addition, examples of multiplexed detection and sensing within complex matrices--important features for real-world applicability--are given special attention.

Smartphone technology can be transformative to the deployment of lab-on-chip diagnostics.

PubMed

Erickson, David; O'Dell, Dakota; Jiang, Li; Oncescu, Vlad; Gumus, Abdurrahman; Lee, Seoho; Mancuso, Matthew; Mehta, Saurabh

2014-09-07

The rapid expansion of mobile technology is transforming the biomedical landscape. By 2016 there will be 260 M active smartphones in the US and millions of health accessories and software "apps" running off them. In parallel with this have come major technical achievements in lab-on-a-chip technology leading to incredible new biochemical sensors and molecular diagnostic devices. Despite these advancements, the uptake of lab-on-a-chip technologies at the consumer level has been somewhat limited. We believe that the widespread availability of smartphone technology and the capabilities they offer in terms of computation, communication, social networking, and imaging will be transformative to the deployment of lab-on-a-chip type technology both in the developed and developing world. In this paper we outline why we believe this is the case, the new business models that may emerge, and detail some specific application areas in which this synergy will have long term impact, namely: nutrition monitoring and disease diagnostics in limited resource settings.

Smartphone technology can be transformative to the deployment of lab-on-chip diagnostics

PubMed Central

Erickson, David; O’Dell, Dakota; Jiang, Li; Oncescu, Vlad; Gumus, Abdurrahman; Lee, Seoho; Mancuso, Matthew; Mehta, Saurabh

2014-01-01

The rapid expansion of mobile technology is transforming the biomedical landscape. By 2016 there will be 260M active smartphones in the US and millions of health accessories and software “apps” running off them. In parallel with this have come major technical achievements in lab-on-a-chip technology leading to incredible new biochemical sensors and molecular diagnostic devices. Despite these advancements, the uptake of lab-on-a-chip technologies at the consumer level has been somewhat limited. We believe that the widespread availability of smartphone technology and the capabilities they offer in terms of computation, communication, social networking, and imaging will be transformative to the deployment of lab-on-a-chip type technology both in the developed and developing world. In this paper we outline why we believe this is the case, the new business models that may emerge, and detail some specific application areas in which this synergy will have long term impact, namely: nutrition monitoring and disease diagnostics in limited resource settings. PMID:24700127

Neural Implants, Packaging for Biocompatible Implants, and Improving Fabricated Capacitors

NASA Astrophysics Data System (ADS)

Agger, Elizabeth Rose

We have completed the circuit design and packaging procedure for an NIH-funded neural implant, called a MOTE (Microscale Optoelectronically Transduced Electrode). Neural recording implants for mice have greatly advanced neuroscience, but they are often damaging and limited in their recording location. This project will result in free-floating implants that cause less damage, provide rapid electronic recording, and increase range of recording across the cortex. A low-power silicon IC containing amplification and digitization sub-circuits is powered by a dual-function gallium arsenide photovoltaic and LED. Through thin film deposition, photolithography, and chemical and physical etching, the Molnar Group and the McEuen Group (Applied and Engineering Physics department) will package the IC and LED into a biocompatible implant approximately 100microm3. The IC and LED are complete and we have begun refining this packaging procedure in the Cornell NanoScale Science & Technology Facility. ICs with 3D time-resolved imaging capabilities can image microorganisms and other biological samples given proper packaging. A portable, flat, easily manufactured package would enable scientists to place biological samples on slides directly above the Molnar group's imaging chip. We have developed a packaging procedure using laser cutting, photolithography, epoxies, and metal deposition. Using a flip-chip method, we verified the process by aligning and adhering a sample chip to a holder wafer. In the CNF, we have worked on a long-term metal-insulator-metal (MIM) capacitor characterization project. Former Fellow and continuing CNF user Kwame Amponsah developed the original procedure for the capacitor fabrication, and another former fellow, Jonilyn Longenecker, revised the procedure and began the arduous process of characterization. MIM caps are useful to clean room users as testing devices to verify electronic characteristics of their active circuitry. This project's objective is to determine differences in current-voltage (IV) and capacitor-voltage (CV) relationships across variations in capacitor size and dielectric type. This effort requires an approximately 20-step process repeated for two-to-six varieties (dependent on temperature and thermal versus plasma options) of the following dielectrics: HfO2, SiO2, Al2O3, TaOx, and TiO2.

Compact Multimedia Systems in Multi-chip Module Technology

NASA Technical Reports Server (NTRS)

Fang, Wai-Chi; Alkalaj, Leon

1995-01-01

This tutorial paper shows advanced multimedia system designs based on multi-chip module (MCM) technologies that provide essential computing, compression, communication, and storage capabilities for various large scale information highway applications.!.

Implementation of a flipped classroom educational model in a predoctoral dental course.

PubMed

Park, Sang E; Howell, T Howard

2015-05-01

This article describes the development and implementation of a flipped classroom model to promote student-centered learning as part of a predoctoral dental course. This model redesigns the traditional lecture-style classroom into a blended learning model that combines active learning pedagogy with instructional technology and "flips" the sequence so that students use online resources to learn content ahead of class and then use class time for discussion. The dental anatomy portion of a second-year DMD course at Harvard School of Dental Medicine was redesigned using the flipped classroom model. The 36 students in the course viewed online materials before class; then, during class, small groups of students participated in peer teaching and team discussions based on learning objectives under the supervision of faculty. The utilization of pre- and post-class quizzes as well as peer assessments were critical motivating factors that likely contributed to the increase in student participation in class and helped place learning accountability on the students. Student feedback from a survey after the experience was generally positive with regard to the collaborative and interactive aspects of this form of blended learning.

Wide-band (2.5 - 10.5 µm), high-frame rate IRFPAs based on high-operability MCT on silicon

NASA Astrophysics Data System (ADS)

Crosbie, Michael J.; Giess, Jean; Gordon, Neil T.; Hall, David J.; Hails, Janet E.; Lees, David J.; Little, Christopher J.; Phillips, Tim S.

2010-04-01

We have previously presented results from our mercury cadmium telluride (MCT, Hg1-xCdxTe) growth on silicon substrate technology for different applications, including negative luminescence, long waveband and mid/long dual waveband infrared imaging. In this paper, we review recent developments in QinetiQ's combined molecular beam epitaxy (MBE) and metal-organic vapor phase epitaxy (MOVPE) MCT growth on silicon; including MCT defect density, uniformity and reproducibility. We also present a new small-format (128 x 128) focal plane array (FPA) for high frame-rate applications. A custom high-speed readout integrated circuit (ROIC) was developed with a large pitch and large charge storage aimed at producing a very high performance FPA (NETD ~10mK) operating at frame rates up to 2kHz for the full array. The array design allows random addressing and this allows the maximum frame rate to be increased as the window size is reduced. A broadband (2.5-10.5 μm) MCT heterostructure was designed and grown by the MBE/MOVPE technique onto silicon substrates. FPAs were fabricated using our standard techniques; wet-etched mesa diodes passivated with epitaxial CdTe and flip-chip bonded to the ROIC. The resulting focal plane arrays were characterized at the maximum frame rate and shown to have the high operabilities and low NETD values characteristic of our LWIR MCT on silicon technology.

Preservation of Cell Structure, Metabolism, and Biotransformation Activity of Liver-On-Chip Organ Models by Hypothermic Storage.

PubMed

Gröger, Marko; Dinger, Julia; Kiehntopf, Michael; Peters, Frank T; Rauen, Ursula; Mosig, Alexander S

2018-01-01

The liver is a central organ in the metabolization of nutrition, endogenous and exogenous substances, and xenobiotic drugs. The emerging organ-on-chip technology has paved the way to model essential liver functions as well as certain aspects of liver disease in vitro in liver-on-chip models. However, a broader use of this technology in biomedical research is limited by a lack of protocols that enable the short-term preservation of preassembled liver-on-chip models for stocking or delivery to researchers outside the bioengineering community. For the first time, this study tested the ability of hypothermic storage of liver-on-chip models to preserve cell viability, tissue morphology, metabolism and biotransformation activity. In a systematic study with different preservation solutions, liver-on-chip function can be preserved for up to 2 d using a derivative of the tissue preservation solution TiProtec, containing high chloride ion concentrations and the iron chelators LK614 and deferoxamine, supplemented with polyethylene glycol (PEG). Hypothermic storage in this solution represents a promising method to preserve liver-on-chip function for at least 2 d and allows an easier access to liver-on-chip technology and its versatile and flexible use in biomedical research. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Design, processing and testing of LSI arrays, hybrid microelectronics task

NASA Technical Reports Server (NTRS)

Himmel, R. P.; Stuhlbarg, S. M.; Ravetti, R. G.; Zulueta, P. J.; Rothrock, C. W.

1979-01-01

Mathematical cost models previously developed for hybrid microelectronic subsystems were refined and expanded. Rework terms related to substrate fabrication, nonrecurring developmental and manufacturing operations, and prototype production are included. Sample computer programs were written to demonstrate hybrid microelectric applications of these cost models. Computer programs were generated to calculate and analyze values for the total microelectronics costs. Large scale integrated (LST) chips utilizing tape chip carrier technology were studied. The feasibility of interconnecting arrays of LSU chips utilizing tape chip carrier and semiautomatic wire bonding technology was demonstrated.

Development and applications of 3-dimensional integration nanotechnologies.

PubMed

Kim, Areum; Choi, Eunmi; Son, Hyungbin; Pyo, Sung Gyu

2014-02-01

Unlike conventional two-dimensional (2D) planar structures, signal or power is supplied through through-silicon via (TSV) in three-dimensional (3D) integration technology to replace wires for binding the chip/wafer. TSVs have becomes an essential technology, as they satisfy Moore's law. This 3D integration technology enables system and sensor functions at a nanoscale via the implementation of a highly integrated nano-semiconductor as well as the fabrication of a single chip with multiple functions. Thus, this technology is considered to be a new area of development for the systemization of the nano-bio area. In this review paper, the basic technology required for such 3D integration is described and methods to measure the bonding strength in order to measure the void occurring during bonding are introduced. Currently, CMOS image sensors and memory chips associated with nanotechnology are being realized on the basis of 3D integration technology. In this paper, we intend to describe the applications of high-performance nano-biosensor technology currently under development and the direction of development of a high performance lab-on-a-chip (LOC).

[Application of gene chip technology for acupuncture research over the past 15 years].

PubMed

Jia, Wenrui; Zhang, Yue; Guo, Qiying; Sun, Qisheng; Guo, Qiulei; Ji, Zhi; Yang, Fangyuan; Zhan, He; Wang, He; Sui, Minghe; Hou, Zhongwei; Wang, Chaoyang; Liu, Qingguo

2017-12-12

To explore the application of gene chip technology in the acupuncture research so as to provide evidences for the mechanism of acupuncture for regulating bodies. The literature on the application of gene chip technology in the acupuncture field from 2001 to 2016 was collected in PubMed, Springer, CNKI and WANFANG databases, which was analyzed and summarized. There were some achievements of the technology for acupuncture research, focusing on the five aspects, including the study of the relationship between meridian-point and viscera, the influencing factors of acupuncture effect, the effect and mechanism of acupuncture analgesia, the mechanism of acupuncture anti-aging, the effect and mechanism of acupuncture for diseases of each system. Gene chip technology plays an important role in researching acupuncture mechanism. It is an important technology for genomics study of acupuncture. However, there are also some disadvantages such as high cost, deficient data mining, non-uniform observation objects, deficient professionals, etc. All those need further resolution so as to promote the application of this technology in the acupuncture researching field.

Large Area MEMS Based Ultrasound Device for Cancer Detection.

PubMed

Wodnicki, Robert; Thomenius, Kai; Hooi, Fong Ming; Sinha, Sumedha P; Carson, Paul L; Lin, Der-Song; Zhuang, Xuefeng; Khuri-Yakub, Pierre; Woychik, Charles

2011-08-21

We present image results obtained using a prototype ultrasound array which demonstrates the fundamental architecture for a large area MEMS based ultrasound device for detection of breast cancer. The prototype array consists of a tiling of capacitive Micro-Machined Ultrasound Transducers (cMUTs) which have been flip-chip attached to a rigid organic substrate. The pitch on the cMUT elements is 185 um and the operating frequency is nominally 9 MHz. The spatial resolution of the new probe is comparable to production PZT probes, however the sensitivity is reduced by conditions that should be correctable. Simulated opposed-view image registration and Speed of Sound volume reconstruction results for ultrasound in the mammographic geometry are also presented.

Physics of Failure Analysis of Xilinx Flip Chip CCGA Packages: Effects of Mission Environments on Properties of LP2 Underfill and ATI Lid Adhesive Materials

NASA Technical Reports Server (NTRS)

Suh, Jong-ook

2013-01-01

The Xilinx Virtex 4QV and 5QV (V4 and V5) are next-generation field-programmable gate arrays (FPGAs) for space applications. However, there have been concerns within the space community regarding the non-hermeticity of V4/V5 packages; polymeric materials such as the underfill and lid adhesive will be directly exposed to the space environment. In this study, reliability concerns associated with the non-hermeticity of V4/V5 packages were investigated by studying properties and behavior of the underfill and the lid adhesvie materials used in V4/V5 packages.

Method to Improve Indium Bump Bonding via Indium Oxide Removal Using a Multi-Step Plasma Process

NASA Technical Reports Server (NTRS)

Dickie, Matthew R. (Inventor); Nikzad, Shouleh (Inventor); Greer, H. Frank (Inventor); Jones, Todd J. (Inventor); Vasquez, Richard P. (Inventor); Hoenk, Michael E. (Inventor)

2012-01-01

A process for removing indium oxide from indium bumps in a flip-chip structure to reduce contact resistance, by a multi-step plasma treatment. A first plasma treatment of the indium bumps with an argon, methane and hydrogen plasma reduces indium oxide, and a second plasma treatment with an argon and hydrogen plasma removes residual organics. The multi-step plasma process for removing indium oxide from the indium bumps is more effective in reducing the oxide, and yet does not require the use of halogens, does not change the bump morphology, does not attack the bond pad material or under-bump metallization layers, and creates no new mechanisms for open circuits.

Development of a RadFET Linear Array for Intracavitary in vivo Dosimetry During External Beam Radiotherapy and Brachytherapy

NASA Astrophysics Data System (ADS)

Price, R. A.; Benson, C.; Joyce, M. J.; Rodgers, K.

2004-08-01

We present the details of a new linear array dosimeter consisting of a chain of semiconductors mounted on an ultra-thin (50 /spl mu/m thick) flexible substrate and housed in an intracavitary catheter. The semiconductors, manufactured by NMRC Cork, have not been packaging and incorporate a passivation layer that allows them to be mounted on the substrate using flip-chip-bonding. This paper reports, for the first time, the construction of a multiple (ten) detector array suited to in vivo dosimetry in the rectum, esophagus and vagina during external beam radiotherapy, as well as being adaptable to in vivo dosimetry during brachytherapy and diagnostic radiology.

Disruptive Technology: Saving Money and Inspiring Engagement in Professional Staff.

PubMed

McPherson, Penne; Talbot, Elizabeth

Competent, efficient, and cost-effective delivery of professional development is a challenge in health care. Collaboration of teaching methodologies with academia and acute care offers fresh perspectives and delivery methods that can facilitate optimal outcomes. One multihospital system introduced the academic "flipped classroom" model to its acute care setting and integrated it into professional development requirements. The concept of the flipped classroom requires independent student engagement prior to classroom activities versus the traditional classroom lecture model. Results realized a cost savings in 2 years of $28,737 in addition to positive employee engagement.

A Fully Integrated Humidity Sensor System-on-Chip Fabricated by Micro-Stamping Technology

PubMed Central

Huang, Che-Wei; Huang, Yu-Jie; Lu, Shey-Shi; Lin, Chih-Ting

2012-01-01

A fully integrated humidity sensor chip was designed, implemented, and tested. Utilizing the micro-stamping technology, the pseudo-3D sensor system-on-chip (SSoC) architecture can be implemented by stacking sensing materials directly on the top of a CMOS-fabricated chip. The fabricated sensor system-on-chip (2.28 mm × 2.48 mm) integrated a humidity sensor, an interface circuit, a digital controller, and an On-Off Keying (OOK) wireless transceiver. With low power consumption, i.e., 750 μW without RF operation, the sensitivity of developed sensor chip was experimentally verified in the relative humidity (RH) range from 32% to 60%. The response time of the chip was also experimentally verified to be within 5 seconds from RH 36% to RH 64%. As a consequence, the implemented humidity SSoC paves the way toward the an ultra-small sensor system for various applications.

Using Lean in the Flipped Classroom for At Risk Students

ERIC Educational Resources Information Center

Flumerfelt, Shannon; Green, Greg

2013-01-01

Schools are working to improve achievement through the examination of instructional practice and the use of instructional technology. This article provides informed commentary on the state of school reform and the need for continuous improvement, instructional improvement and instructional technology improvement. It also presents advocacy for the…

Camera-on-a-Chip

NASA Technical Reports Server (NTRS)

1999-01-01

Jet Propulsion Laboratory's research on a second generation, solid-state image sensor technology has resulted in the Complementary Metal- Oxide Semiconductor Active Pixel Sensor (CMOS), establishing an alternative to the Charged Coupled Device (CCD). Photobit Corporation, the leading supplier of CMOS image sensors, has commercialized two products of their own based on this technology: the PB-100 and PB-300. These devices are cameras on a chip, combining all camera functions. CMOS "active-pixel" digital image sensors offer several advantages over CCDs, a technology used in video and still-camera applications for 30 years. The CMOS sensors draw less energy, they use the same manufacturing platform as most microprocessors and memory chips, and they allow on-chip programming of frame size, exposure, and other parameters.

Lab-on-a-chip technologies for genodermatoses: Recent progress and future perspectives.

PubMed

Hongzhou, Cui; Shuping, Guo; Wenju, Wang; Li, Li; Lulu, Wei; Linjun, Deng; Jingmin, Li; Xiaoli, Ren; Li, Bai

2017-02-01

In recent years, molecular biology has proven to be a great asset in our understanding of mechanisms in genodermatoses. However, bench to bedside translation research lags far behind. Advances in lab-on-a-chip technologies enabled programmable, reconfigurable, and scalable manipulation of a variety of laboratory procedures. Sample preparation, microfluidic reactions, and continuous monitoring systems can be integrated on a small chip. These advantages have attracted attention in various fields of clinical application including diagnosis of inherited skin diseases. This review lists an overview of the underlying genes and mutations and describes prospective application of lab-on-a-chip technologies as solutions to challenges for point-of-care genodematoses diagnosis. Copyright © 2016. Published by Elsevier B.V.

Insertion of GaAs MMICs into EW systems

NASA Astrophysics Data System (ADS)

Schineller, E. R.; Pospishil, A.; Grzyb, J.

1989-09-01

Development activities on a microwave/mm-wave monolithic IC (MIMIC) program are described, as well as the methodology for inserting these GaAs IC chips into several EW systems. The generic EW chip set developed on the MIMIC program consists of 23 broadband chip types, including amplifiers, oscillators, mixers, switches, variable attenuators, power dividers, and power combiners. These chips are being designed for fabrication using the multifunction self-aligned gate process. The benefits from GaAs IC insertion are quantified by a comparison of hardware units fabricated with existing MIC and digital ECL technology and the same units manufactured with monolithic technology. It is found that major improvements in cost, reliability, size, weight, and performance can be realized. Examples illustrating the methodology for technology insertion are presented.

Revisiting lab-on-a-chip technology for drug discovery.

PubMed

Neuži, Pavel; Giselbrecht, Stefan; Länge, Kerstin; Huang, Tony Jun; Manz, Andreas

2012-08-01

The field of microfluidics or lab-on-a-chip technology aims to improve and extend the possibilities of bioassays, cell biology and biomedical research based on the idea of miniaturization. Microfluidic systems allow more accurate modelling of physiological situations for both fundamental research and drug development, and enable systematic high-volume testing for various aspects of drug discovery. Microfluidic systems are in development that not only model biological environments but also physically mimic biological tissues and organs; such 'organs on a chip' could have an important role in expediting early stages of drug discovery and help reduce reliance on animal testing. This Review highlights the latest lab-on-a-chip technologies for drug discovery and discusses the potential for future developments in this field.

A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey the architectural approaches proposed for designing memory systems and, specifically, caches with these emerging memory technologies. To highlight theirmore » similarities and differences, we present a classification of these technologies and architectural approaches based on their key characteristics. We also briefly summarize the challenges in using these technologies for architecting caches. We believe that this survey will help the readers gain insights into the emerging memory device technologies, and their potential use in designing future computing systems.« less

Mapping of transcription factor binding regions in mammalian cells by ChIP: Comparison of array- and sequencing-based technologies

PubMed Central

Euskirchen, Ghia M.; Rozowsky, Joel S.; Wei, Chia-Lin; Lee, Wah Heng; Zhang, Zhengdong D.; Hartman, Stephen; Emanuelsson, Olof; Stolc, Viktor; Weissman, Sherman; Gerstein, Mark B.; Ruan, Yijun; Snyder, Michael

2007-01-01

Recent progress in mapping transcription factor (TF) binding regions can largely be credited to chromatin immunoprecipitation (ChIP) technologies. We compared strategies for mapping TF binding regions in mammalian cells using two different ChIP schemes: ChIP with DNA microarray analysis (ChIP-chip) and ChIP with DNA sequencing (ChIP-PET). We first investigated parameters central to obtaining robust ChIP-chip data sets by analyzing STAT1 targets in the ENCODE regions of the human genome, and then compared ChIP-chip to ChIP-PET. We devised methods for scoring and comparing results among various tiling arrays and examined parameters such as DNA microarray format, oligonucleotide length, hybridization conditions, and the use of competitor Cot-1 DNA. The best performance was achieved with high-density oligonucleotide arrays, oligonucleotides ≥50 bases (b), the presence of competitor Cot-1 DNA and hybridizations conducted in microfluidics stations. When target identification was evaluated as a function of array number, 80%–86% of targets were identified with three or more arrays. Comparison of ChIP-chip with ChIP-PET revealed strong agreement for the highest ranked targets with less overlap for the low ranked targets. With advantages and disadvantages unique to each approach, we found that ChIP-chip and ChIP-PET are frequently complementary in their relative abilities to detect STAT1 targets for the lower ranked targets; each method detected validated targets that were missed by the other method. The most comprehensive list of STAT1 binding regions is obtained by merging results from ChIP-chip and ChIP-sequencing. Overall, this study provides information for robust identification, scoring, and validation of TF targets using ChIP-based technologies. PMID:17568005

Multi-wafer bonding technology for the integration of a micromachined Mirau interferometer

NASA Astrophysics Data System (ADS)

Wang, Wei-Shan; Lullin, Justine; Froemel, Joerg; Wiemer, Maik; Bargiel, Sylwester; Passilly, Nicolas; Gorecki, Christophe; Gessner, Thomas

2015-02-01

The paper presents the multi-wafer bonding technology as well as the integration of electrical connection to the zscanner wafer of the micromachined array-type Mirau interferometer. A Mirau interferometer, which is a key-component of optical coherence tomography (OCT) microsystem, consists of a microlens doublet, a MOEMS Z-scanner, a focusadjustment spacer and a beam splitter plate. For the integration of this MOEMS device heterogeneous bonding of Si, glass and SOI wafers is necessary. Previously, most of the existing methods for multilayer wafer bonding require annealing at high temperature, i.e., 1100°C. To be compatible with MEMS devices, bonding of different material stacks at temperatures lower than 400°C has also been investigated. However, if more components are involved, it becomes less effective due to the alignment accuracy or degradation of surface quality of the not-bonded side after each bonding operation. The proposed technology focuses on 3D integration of heterogeneous building blocks, where the assembly process is compatible with the materials of each wafer stack and with position accuracy which fits optical requirement. A demonstrator with up to 5 wafers bonded lower than 400°C is presented and bond interfaces are evaluated. To avoid the complexity of through wafer vias, a design which creates electrical connections along vertical direction by mounting a wafer stack on a flip chip PCB is proposed. The approach, which adopts vertically-stacked wafers along with electrical connection functionality, provides not only a space-effective integration of MOEMS device but also a design where the Mirau stack can be further integrated with other components of the OCT microsystem easily.

Improving yield and reliability of FIB modifications using electrical testing

NASA Astrophysics Data System (ADS)

Desplats, Romain; Benbrik, Jamel; Benteo, Bruno; Perdu, Philippe

1998-08-01

Focused Ion Beam technology has two main areas of application for ICs: modification and preparation for technological analysis. The most solicited area is modification. This involves physically modifying a circuit by cutting lines and creating new ones in order to change the electrical function of the circuit. IC planar technologies have an increasing number of metal interconnections making FIB modifications more complex and decreasing their changes of success. The yield of FIB operations on ICs reflects a downward trend that imposes a greater number of circuits to be modified in order to successfully correct a small number of them. This requires extended duration, which is not compatible with production line turn around times. To respond to this problem, two solutions can be defined: either, reducing the duration of each FIB operation or increasing the success rate of FIB modifications. Since reducing the time depends mainly on FIB operator experience, insuring a higher success rate represents a more crucial aspect as both experienced and novice operators could benefit from this improvement. In order to insure successful modifications, it is necessary to control each step of a FIB operation. To do this, we have developed a new method using in situ electrical testing which has a direct impact on the yield of FIB modifications. We will present this innovative development through a real case study of a CMOS ASIC for high-speed communications. Monitoring the electrical behavior at each step in a FIB operation makes it possible to reduce the number of circuits to be modified and consequently reduces system costs thanks to better yield control. Knowing the internal electrical behavior also gives us indications about the impact on reliability of FIB modified circuits. Finally, this approach can be applied to failure analysis and FIB operations on flip chip circuits.

Best Practices of Online Professional Development for K-12 Teachers: A Quantitative Study

ERIC Educational Resources Information Center

Smirniotis-Giambatista, Cynthia

2017-01-01

Online flipped professional development allows direct instruction to take place through an interactive learning setting and allows the face-to-face contact to provide guidance and apply the concept. As technology advances, education needs instruments and tools used for effectively teaching using the enhanced technology to increase student…

Imagining Flipped Workshops: Considerations for Designing Online Modules for Social Justice Education Workshops

ERIC Educational Resources Information Center

Tharp, D. Scott

2017-01-01

Online learning, defined as the use of Web-based technology to facilitate some or all learning experiences, continues to interest many universities. While technology shapes the landscape of higher education, questions remain regarding the ability and appropriateness of online learning spaces for social justice education (Dominique, 2016). This…

How Learning in an Inverted Classroom Influences Cooperation, Innovation and Task Orientation

ERIC Educational Resources Information Center

Strayer, Jeremy F.

2012-01-01

Recent technological developments have given rise to blended learning classrooms. An inverted (or flipped) classroom is a specific type of blended learning design that uses technology to move lectures outside the classroom and uses learning activities to move practice with concepts inside the classroom. This article compares the learning…

Progress in the application of DNA microarrays.

PubMed Central

Lobenhofer, E K; Bushel, P R; Afshari, C A; Hamadeh, H K

2001-01-01

Microarray technology has been applied to a variety of different fields to address fundamental research questions. The use of microarrays, or DNA chips, to study the gene expression profiles of biologic samples began in 1995. Since that time, the fundamental concepts behind the chip, the technology required for making and using these chips, and the multitude of statistical tools for analyzing the data have been extensively reviewed. For this reason, the focus of this review will be not on the technology itself but on the application of microarrays as a research tool and the future challenges of the field. PMID:11673116

On-Chip Waveguide Coupling of a Layered Semiconductor Single-Photon Source.

PubMed

Tonndorf, Philipp; Del Pozo-Zamudio, Osvaldo; Gruhler, Nico; Kern, Johannes; Schmidt, Robert; Dmitriev, Alexander I; Bakhtinov, Anatoly P; Tartakovskii, Alexander I; Pernice, Wolfram; Michaelis de Vasconcellos, Steffen; Bratschitsch, Rudolf

2017-09-13

Fully integrated quantum technology based on photons is in the focus of current research, because of its immense potential concerning performance and scalability. Ideally, the single-photon sources, the processing units, and the photon detectors are all combined on a single chip. Impressive progress has been made for on-chip quantum circuits and on-chip single-photon detection. In contrast, nonclassical light is commonly coupled onto the photonic chip from the outside, because presently only few integrated single-photon sources exist. Here, we present waveguide-coupled single-photon emitters in the layered semiconductor gallium selenide as promising on-chip sources. GaSe crystals with a thickness below 100 nm are placed on Si 3 N 4 rib or slot waveguides, resulting in a modified mode structure efficient for light coupling. Using optical excitation from within the Si 3 N 4 waveguide, we find nonclassicality of generated photons routed on the photonic chip. Thus, our work provides an easy-to-implement and robust light source for integrated quantum technology.

The use of high technology in STEM education

NASA Astrophysics Data System (ADS)

Lakshminarayanan, Vasudevan; McBride, Annette C.

2015-10-01

There has been a huge increase in the use of high technology in education. In this paper we discuss some aspects of technology that have major applications in STEM education, namely, (a) virtual reality systems, (b) personal electronic response systems aka "clickers", (c) flipped classrooms, (d) mobile learning "m-Learning", (e) massive open online courses "MOOCS", (f) internet-of-things and (g) cloud computing.

High data rate Reed-Solomon encoding and decoding using VLSI technology

NASA Technical Reports Server (NTRS)

Miller, Warner; Morakis, James

1987-01-01

Presented as an implementation of a Reed-Solomon encode and decoder, which is 16-symbol error correcting, each symbol is 8 bits. This Reed-Solomon (RS) code is an efficient error correcting code that the National Aeronautics and Space Administration (NASA) will use in future space communications missions. A Very Large Scale Integration (VLSI) implementation of the encoder and decoder accepts data rates up 80 Mbps. A total of seven chips are needed for the decoder (four of the seven decoding chips are customized using 3-micron Complementary Metal Oxide Semiconduction (CMOS) technology) and one chip is required for the encoder. The decoder operates with the symbol clock being the system clock for the chip set. Approximately 1.65 billion Galois Field (GF) operations per second are achieved with the decoder chip set and 640 MOPS are achieved with the encoder chip.

Biosensor system-on-a-chip including CMOS-based signal processing circuits and 64 carbon nanotube-based sensors for the detection of a neurotransmitter.

PubMed

Lee, Byung Yang; Seo, Sung Min; Lee, Dong Joon; Lee, Minbaek; Lee, Joohyung; Cheon, Jun-Ho; Cho, Eunju; Lee, Hyunjoong; Chung, In-Young; Park, Young June; Kim, Suhwan; Hong, Seunghun

2010-04-07

We developed a carbon nanotube (CNT)-based biosensor system-on-a-chip (SoC) for the detection of a neurotransmitter. Here, 64 CNT-based sensors were integrated with silicon-based signal processing circuits in a single chip, which was made possible by combining several technological breakthroughs such as efficient signal processing, uniform CNT networks, and biocompatible functionalization of CNT-based sensors. The chip was utilized to detect glutamate, a neurotransmitter, where ammonia, a byproduct of the enzymatic reaction of glutamate and glutamate oxidase on CNT-based sensors, modulated the conductance signals to the CNT-based sensors. This is a major technological advancement in the integration of CNT-based sensors with microelectronics, and this chip can be readily integrated with larger scale lab-on-a-chip (LoC) systems for various applications such as LoC systems for neural networks.

Comparison of the performance of Ion Torrent chips in noninvasive prenatal trisomy detection.

PubMed

Wang, Yanlin; Wen, Zujia; Shen, Jiawei; Cheng, Weiwei; Li, Jun; Qin, Xiaolan; Ma, Duan; Shi, Yongyong

2014-07-01

Semiconductor high-throughput sequencing, represented by Ion Torrent PGM/Proton, proves to be feasible in the noninvasive prenatal diagnosis of fetal aneuploidies. It is commendable that, with less data and relevant cost also, an accurate result can be achieved owing to the high sensitivity and specificity of such kind of technology. We conducted a comparative analysis of the performance of four different Ion chips in detecting fetal chromosomal aneuploidies. Eight maternal plasma DNA samples, including four pregnancies with normal fetuses and four with trisomy 21 fetuses, were sequenced on Ion Torrent 314/316/318/PI chips, respectively. Results such as read mapped ratio, correlation coefficient and phred quality score were calculated and parallelly compared. All samples were correctly classified even with low-throughput chip, and, among the four chips, the 316 chip had the highest read mapped ratio, correlation coefficient, mean read length and phred quality score. All chips were well consistent with each other. Our results showed that all Ion chips are applicable in noninvasive prenatal fetal aneuploidy diagnosis. We recommend researchers or clinicians to use the appropriate chip with barcoding technology on the basis of the sample number.

Electronic Switch Arrays for Managing Microbattery Arrays

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Alahmad, Mahmoud; Sukumar, Vinesh; Zghoul, Fadi; Buck, Kevin; Hess, Herbert; Li, Harry; Cox, David

2008-01-01

Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.

Intelligent structures technology

NASA Astrophysics Data System (ADS)

Crawley, Edward F.

1991-07-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Intelligent structures technology

NASA Technical Reports Server (NTRS)

Crawley, Edward F.

1991-01-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Realization of 10 GHz minus 30dB on-chip micro-optical links with Si-Ge RF bi-polar technology

NASA Astrophysics Data System (ADS)

Ogudo, Kingsley A.; Snyman, Lukas W.; Polleux, Jean-Luc; Viana, Carlos; Tegegne, Zerihun

2014-06-01

Si Avalanche based LEDs technology has been developed in the 650 -850nm wavelength regime [1, 2]. Correspondingly, small micro-dimensioned detectors with pW/μm2 sensitivity have been developed for the same wavelength range utilizing Si-Ge detector technology with detection efficiencies of up to 0.85, and with a transition frequencies of up to 80 GHz [3] A series of on-chip optical links of 50 micron length, utilizing 650 - 850 nm propagation wavelength have been designed and realized, utilizing a Si Ge radio frequency bipolar process. Micron dimensioned optical sources, waveguides and detectors were all integrated on the same chip to form a complete optical link on-chip. Avalanche based Si LEDs (Si Av LEDs), Schottky contacting, TEOS densification strategies, silicon nitride based waveguides, and state of the art Si-Ge bipolar detector technologies were used as key design strategies. Best performances show optical coupling from source to detector of up to 10GHz and - 40dBm total optical link budget loss with a potential transition frequency coupling of up to 40GHz utilizing Si Ge based LEDs. The technology is particularly suitable for application as on-chip optical links, optical MEMS and MOEMS, as well as for optical interconnects utilizing low loss, side surface, waveguide- to-optical fiber coupling. Most particularly is one of our designed waveguide which have a good core axis alignment with the optical source and yield 10GHz -30dB on-chip micro-optical links as shown in Fig 9 (c). The technology as developed has been appropriately IP protected.

Terahertz microfluidic chips for detection of amino acids in aqueous solutions

NASA Astrophysics Data System (ADS)

Su, Bo; Zhang, Cong; Fan, Ning; Zhang, Cunlin

2016-11-01

Microfluidic technology can control the fluidic thickness accurately in less than 100 micrometers. So the combination of terahertz (THz) and microfluidic technology becomes one of the most interesting directions towards biological detection. We designed microfluidic chips for terahertz spectroscopy of biological samples in aqueous solutions. Using the terahertz time-domain spectroscopy (THz-TDS) system, we experimentally measured the transmittance of the chips and the THz absorption spectra of L-threonine and L-arginine, respectively. The results indicated the feasibility of performing high sensitivity THz spectroscopy of amino acids solutions. Therefore, the microfluidic chips can realize real-time and label-free measurement for biochemistry samples in THz-TDS system.

The Nano-Patch-Clamp Array: Microfabricated Glass Chips for High-Throughput Electrophysiology

NASA Astrophysics Data System (ADS)

Fertig, Niels

2003-03-01

Electrophysiology (i.e. patch clamping) remains the gold standard for pharmacological testing of putative ion channel active drugs (ICADs), but suffers from low throughput. A new ion channel screening technology based on microfabricated glass chip devices will be presented. The glass chips contain very fine apertures, which are used for whole-cell voltage clamp recordings as well as single channel recordings from mammalian cell lines. Chips containing multiple patch clamp wells will be used in a first bench-top device, which will allow perfusion and electrical readout of each well. This scalable technology will allow for automated, rapid and parallel screening on ion channel drug targets.

Progress on TSV technology for Medipix3RX chip

NASA Astrophysics Data System (ADS)

Sarajlić, M.; Pennicard, D.; Smoljanin, S.; Fritzsch, T.; Zoschke, K.; Graafsma, H.

2017-12-01

The progress of Through Silicon Via (TSV) technology for Medipix3RX chip done at DESY is presented here. The goal of this development is to replace the wire bonds in X-ray detectors with TSVs, in order to reduce the dead area between detectors. We obtained the first working chips assembled together with Si based sensors for X-ray detection. The 3D integration technology, including TSV, Re-distribution layer deposition, bump bonding to the Si sensor and bump bonding to the carrier PCB, was done by Fraunhofer Institute IZM in Berlin. After assembly, the module was successfully tested by recording background radiation and making X-ray images of small objects. The active area of the Medipix3RX chip is 14.1 mm×14.1 mm or 256×256 pixels. During TSV processing, the Medipix3RX chip was thinned from 775 μm original thickness, to 130 μm. The diameter of the vias is 40 μm, and the pitch between the vias is 120 μm. A liner filling approach was used to contact the TSV with the RDL on the backside of the Medipix3RX readout chip.

High-frequency ultrasonic wire bonding systems

PubMed

Tsujino; Yoshihara; Sano; Ihara

2000-03-01

The vibration characteristics of longitudinal-complex transverse vibration systems with multiple resonance frequencies of 350-980 kHz for ultrasonic wire bonding of IC, LSI or electronic devices were studied. The complex vibration systems can be applied for direct welding of semiconductor tips (face-down bonding, flip-chip bonding) and packaging of electronic devices. A longitudinal-complex transverse vibration bonding system consists of a complex transverse vibration rod, two driving longitudinal transducers 7.0 mm in diameter and a transverse vibration welding tip. The vibration distributions along ceramic and stainless-steel welding tips were measured at up to 980 kHz. A high-frequency vibration system with a height of 20.7 mm and a weight of less than 15 g was obtained.

Ultra-thin ohmic contacts for p-type nitride light emitting devices

DOEpatents

Raffetto, Mark; Bharathan, Jayesh; Haberern, Kevin; Bergmann, Michael; Emerson, David; Ibbetson, James; Li, Ting

2014-06-24

A flip-chip semiconductor based Light Emitting Device (LED) can include an n-type semiconductor substrate and an n-type GaN epi-layer on the substrate. A p-type GaN epi-layer can be on the n-type GaN epi-layer and a metal ohmic contact p-electrode can be on the p-type GaN epi-layer, where the metal ohmic contact p-electrode can have an average thickness less than about 25 .ANG.. A reflector can be on the metal ohmic contact p-electrode and a metal stack can be on the reflector. An n-electrode can be on the substrate opposite the n-type GaN epi-layer and a bonding pad can be on the n-electrode.

Large area MEMS based ultrasound device for cancer detection

NASA Astrophysics Data System (ADS)

Wodnicki, Robert; Thomenius, Kai; Ming Hooi, Fong; Sinha, Sumedha P.; Carson, Paul L.; Lin, Der-Song; Zhuang, Xuefeng; Khuri-Yakub, Pierre; Woychik, Charles

2011-08-01

We present image results obtained using a prototype ultrasound array that demonstrates the fundamental architecture for a large area MEMS based ultrasound device for detection of breast cancer. The prototype array consists of a tiling of capacitive Micromachined Ultrasound Transducers (cMUTs) that have been flip-chip attached to a rigid organic substrate. The pitch on the cMUT elements is 185 μm and the operating frequency is nominally 9 MHz. The spatial resolution of the new probe is comparable to those of production PZT probes; however the sensitivity is reduced by conditions that should be correctable. Simulated opposed-view image registration and Speed of Sound volume reconstruction results for ultrasound in the mammographic geometry are also presented.

Enhanced light extraction in tunnel junction-enabled top emitting UV LEDs

DOE PAGES

Zhang, Yuewei; Allerman, Andrew A.; Krishnamoorthy, Sriram; ...

2016-04-11

The efficiency of ultra violet LEDs has been critically limited by the absorption losses in p-type and metal layers. In this work, surface roughening based light extraction structures are combined with tunneling based p-contacts to realize highly efficient top-side light extraction efficiency in UV LEDs. Surface roughening of the top n-type AlGaN contact layer is demonstrated using self-assembled Ni nano-clusters as etch mask. The top surface roughened LEDs were found to enhance external quantum efficiency by over 40% for UV LEDs with a peak emission wavelength of 326 nm. The method described here can enable highly efficient UV LEDs withoutmore » the need for complex manufacturing methods such as flip chip bonding.« less

Universal lab-on-a-chip platform for complex, perfused 3D cell cultures

NASA Astrophysics Data System (ADS)

Sonntag, F.; Schmieder, F.; Ströbel, J.; Grünzner, S.; Busek, M.; Günther, K.; Steege, T.; Polk, C.; Klotzbach, U.

2016-03-01

The miniaturization, rapid prototyping and automation of lab-on-a-chip technology play nowadays a very important role. Lab-on-a-chip technology is successfully implemented not only for environmental analysis and medical diagnostics, but also as replacement of animals used for the testing of substances in the pharmaceutical and cosmetics industries. For that purpose the Fraunhofer IWS and partners developed a lab-on-a-chip platform for perfused cell-based assays in the last years, which includes different micropumps, valves, channels, reservoirs and customized cell culture modules. This technology is already implemented for the characterization of different human cell cultures and organoids, like skin, liver, endothelium, hair follicle and nephron. The advanced universal lab-on-a-chip platform for complex, perfused 3D cell cultures is divided into a multilayer basic chip with integrated micropump and application-specific 3D printed cell culture modules. Moreover a technology for surface modification of the printed cell culture modules by laser micro structuring and a complex and flexibly programmable controlling device based on an embedded Linux system was developed. A universal lab-on-a-chip platform with an optional oxygenator and a cell culture module for cubic scaffolds as well as first cell culture experiments within the cell culture device will be presented. The module is designed for direct interaction with robotic dispenser systems. This offers the opportunity to combine direct organ printing of cells and scaffolds with the microfluidic cell culture module. The characterization of the developed system was done by means of Micro-Particle Image Velocimetry (μPIV) and an optical oxygen measuring system.

Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology

NASA Technical Reports Server (NTRS)

Fossum, E. R.

1995-01-01

A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.

Interactivity Technologies to Improve the Learning in Classrooms through the Cloud

ERIC Educational Resources Information Center

Fardoun, Habib M.; Alghazzawi, Daniyal M.; Paules, Antonio

2018-01-01

In this paper, the authors present a cloud system that incorporate tools developed in HTML5 and JQuery technologies, which are offered to professors and students in the development of a teaching methodology called flipped classroom, where the theoretical content is usually delivered by video files and self-assessment tools that students can…

The Triple Flip: Using Technology for Peer and Self-Editing of Writing

ERIC Educational Resources Information Center

Hojeij, Zeina; Hurley, Zoe

2017-01-01

Many teachers consider themselves digital immigrants who struggle to keep up with student digital natives. Whether or not this dichotomy still holds true, in a 21st Century context of teaching and learning, is debatable not least of all because of the exponential development of apps and mobile learning technology. Nevertheless, it is sometimes…

A Comparison of Delivery Formats to Encourage Student-Centered Learning in a Power Engineering Technology Course

ERIC Educational Resources Information Center

Turner, Mathew J.; Webster, Rustin D.

2017-01-01

This paper describes a student-centered approach to a power engineering technology course using the flipped or inverted classroom as well as active learning in the form of group discussions and team problem solving. The study compares student performance and perceptions of a traditional, teaching-centered classroom to two different flipped…

Exploring Physics Students' Engagement with Online Instructional Videos in an Introductory Mechanics Course

ERIC Educational Resources Information Center

Lin, Shih-Yin; Aiken, John M.; Seaton, Daniel T.; Douglas, Scott S.; Greco, Edwin F.; Thoms, Brian D.; Schatz, Michael F.

2017-01-01

The advent of new educational technologies has stimulated interest in using online videos to deliver content in university courses. We examined student engagement with 78 online videos that we created and were incorporated into a one-semester flipped introductory mechanics course at the Georgia Institute of Technology. We found that students were…

Photonic integrated circuits based on silica and polymer PLC

NASA Astrophysics Data System (ADS)

Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

2013-03-01

Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

Future lab-on-a-chip technologies for interrogating individual molecules.

PubMed

Craighead, Harold

2006-07-27

Advances in technology have allowed chemical sampling with high spatial resolution and the manipulation and measurement of individual molecules. Adaptation of these approaches to lab-on-a-chip formats is providing a new class of research tools for the investigation of biochemistry and life processes.

Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.

PubMed

Uddin, Ashfaque; Milaninia, Kaveh; Chen, Chin-Hsuan; Theogarajan, Luke

2011-12-01

This paper presents a novel technique for the integration of small CMOS chips into a large area substrate. A key component of the technique is the CMOS chip based self-aligned masking. This allows for the fabrication of sockets in wafers that are at most 5 µm larger than the chip on each side. The chip and the large area substrate are bonded onto a carrier such that the top surfaces of the two components are flush. The unique features of this technique enable the integration of macroscale components, such as leads and microfluidics. Furthermore, the integration process allows for MEMS micromachining after CMOS die-wafer integration. To demonstrate the capabilities of the proposed technology, a low-power integrated potentiostat chip for biosensing implemented in the AMI 0.5 µm CMOS technology is integrated in a silicon substrate. The horizontal gap and the vertical displacement between the chip and the large area substrate measured after the integration were 4 µm and 0.5 µm, respectively. A number of 104 interconnects are patterned with high-precision alignment. Electrical measurements have shown that the functionality of the chip is not affected by the integration process.

Ubiquitin-specific protease 8 links the PTEN-Akt-AIP4 pathway to the control of FLIPS stability and TRAIL sensitivity in glioblastoma multiforme.

PubMed

Panner, Amith; Crane, Courtney A; Weng, Changjiang; Feletti, Alberto; Fang, Shanna; Parsa, Andrew T; Pieper, Russell O

2010-06-15

The antiapoptotic protein FLIP(S) is a key suppressor of tumor necrosis factor-related apoptosis-inducing ligand (TRAIL)-induced apoptosis in human glioblastoma multiforme (GBM) cells. We previously reported that a novel phosphatase and tensin homologue (PTEN)-Akt-atrophin-interacting protein 4 (AIP4) pathway regulates FLIP(S) ubiquitination and stability, although the means by which PTEN and Akt were linked to AIP4 activity were unclear. Here, we report that a second regulator of ubiquitin metabolism, the ubiquitin-specific protease 8 (USP8), is a downstream target of Akt, and that USP8 links Akt to AIP4 and the regulation of FLIP(S) stability and TRAIL resistance. In human GBM xenografts, levels of USP8 correlated inversely with pAkt levels, and genetic or pharmacologic manipulation of Akt regulated USP8 levels in an inverse manner. Overexpression of wild-type USP8, but not catalytically inactive USP8, increased FLIP(S) ubiquitination, decreased FLIP(S) half-life, decreased FLIP(S) steady-state levels, and decreased TRAIL resistance, whereas short interfering RNA (siRNA)-mediated suppression of USP8 levels had the opposite effect. Because high levels of the USP8 deubiquitinase correlated with high levels of FLIP(S) ubiquitination, USP8 seemed to control FLIP(S) ubiquitination through an intermediate target. Consistent with this idea, overexpression of wild-type USP8 decreased the ubiquitination of the FLIP(S) E3 ubiquitin ligase AIP4, an event previously shown to increase AIP4-FLIP(S) interaction, whereas siRNA-mediated suppression of USP8 increased AIP4 ubiquitination. Furthermore, the suppression of FLIP(S) levels by USP8 overexpression was reversed by the introduction of siRNA targeting AIP4. These results show that USP8, a downstream target of Akt, regulates the ability of AIP4 to control FLIP(S) stability and TRAIL sensitivity.

Biwavelength transceiver module for parallel simultaneous bidirectional optical interconnections

NASA Astrophysics Data System (ADS)

Nguyen, Nga T. H.; Ukaegbu, Ikechi A.; Sangirov, Jamshid; Cho, Mu-Hee; Lee, Tae-Woo; Park, Hyo-Hoon

2013-12-01

The design of a biwavelength transceiver (TRx) module for parallel simultaneous bidirectional optical interconnects is described. The TRx module has been implemented using two different wavelengths, 850 and 1060 nm, to send and receive signals simultaneously through a common optical interface while optimizing cost and performance. Filtering mirrors are formed in the optical fibers which are embedded on a V-grooved silicon substrate for reflecting and filtering optical signals from/to vertical-cavity surface-emitting laser (VCSEL)/photodiode (PD). The VCSEL and PD are flip-chip bonded on individual silicon optical benches, which are attached on the silicon substrate for optical signal coupling from the VCSEL to fiber and from fiber to the PD. A high-speed and low-loss ceramic printed circuit board, which has a compact size of 0.033 cc, has been designed to carry transmitter and receiver chips for easy packaging of the TRx module. Applied for quad small form-factor pluggable applications at 40-Gbps operation, the four-channel biwavelength TRx module showed clear eye diagrams with a bit error rate (BER) of 10-12 at input powers of -5 and -5.8 dBm for 1060 and 850 nm operation modes, respectively.

Thin-Film Quantum Dot Photodiode for Monolithic Infrared Image Sensors.

PubMed

Malinowski, Pawel E; Georgitzikis, Epimitheas; Maes, Jorick; Vamvaka, Ioanna; Frazzica, Fortunato; Van Olmen, Jan; De Moor, Piet; Heremans, Paul; Hens, Zeger; Cheyns, David

2017-12-10

Imaging in the infrared wavelength range has been fundamental in scientific, military and surveillance applications. Currently, it is a crucial enabler of new industries such as autonomous mobility (for obstacle detection), augmented reality (for eye tracking) and biometrics. Ubiquitous deployment of infrared cameras (on a scale similar to visible cameras) is however prevented by high manufacturing cost and low resolution related to the need of using image sensors based on flip-chip hybridization. One way to enable monolithic integration is by replacing expensive, small-scale III-V-based detector chips with narrow bandgap thin-films compatible with 8- and 12-inch full-wafer processing. This work describes a CMOS-compatible pixel stack based on lead sulfide quantum dots (PbS QD) with tunable absorption peak. Photodiode with a 150-nm thick absorber in an inverted architecture shows dark current of 10 -6 A/cm² at -2 V reverse bias and EQE above 20% at 1440 nm wavelength. Optical modeling for top illumination architecture can improve the contact transparency to 70%. Additional cooling (193 K) can improve the sensitivity to 60 dB. This stack can be integrated on a CMOS ROIC, enabling order-of-magnitude cost reduction for infrared sensors.

Technology Development of Salak (Salacca Zalacca) Chips With Vacuum Frying Machine Base On Expert System In Kramat-Bangkalan Regency

NASA Astrophysics Data System (ADS)

Rosida, D. F.; Happyanto; Anggraeni; Sugiarto; Hapsari

2018-01-01

Agropolitan Program is one form of regional development to improve agribusiness system and effort to improve the welfare of the community. One of the leading commodities in Bangkalan agroclimates is salak which is a potentially very large commodity to be developed. Salak commodities in Kramat Bangkalan Indonesia have developed varous salak produced such as dates of salak, syrup and dodol salak. Salak chips was the target of innovation from processed salak. The Production of salak chips using frying technology with vacuum system to obtain crunchy chips. To get the results need to be developed synergy technology to combine the process conditions and the right system in producing good quality salak chips. Bangkalan Regency is the potential to continue to develop products using a variety of salak to the processed form of vacuum frying machine based on expert system so that the resulting product would be great texture, aroma and taste. This will make the area of Bangkalan, Indonesia be more independent in producing and increasing revenue.

Nonvolatile memory chips: critical technology for high-performance recce systems

NASA Astrophysics Data System (ADS)

Kaufman, Bruce

2000-11-01

Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

Microplasma fabrication: from semiconductor technology for 2D-chips and microfluidic channels to rapid prototyping and 3D-printing of microplasma devices

NASA Astrophysics Data System (ADS)

Shatford, R.; Karanassios, Vassili

2014-05-01

Microplasmas are receiving attention in recent conferences and current scientific literature. In our laboratory, microplasmas-on-chips proved to be particularly attractive. The 2D- and 3D-chips we developed became hybrid because they were fitted with a quartz plate (quartz was used due to its transparency to UV). Fabrication of 2D- and 3D-chips for microplasma research is described. The fabrication methods described ranged from semiconductor fabrication technology, to Computer Numerical Control (CNC) machining, to 3D-printing. These methods may prove to be useful for those contemplating in entering microplasma research but have no access to expensive semiconductor fabrication equipment.

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hicks, K. A.; Jennings, G. A.; Lin, Y.-S.; Pina, C. A.; Sayah, H. R.; Zamani, N.

1989-01-01

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Organ/body-on-a-chip based on microfluidic technology for drug discovery.

PubMed

Kimura, Hiroshi; Sakai, Yasuyuki; Fujii, Teruo

2018-02-01

Although animal experiments are indispensable for preclinical screening in the drug discovery process, various issues such as ethical considerations and species differences remain. To solve these issues, cell-based assays using human-derived cells have been actively pursued. However, it remains difficult to accurately predict drug efficacy, toxicity, and organs interactions, because cultivated cells often do not retain their original organ functions and morphologies in conventional in vitro cell culture systems. In the μTAS research field, which is a part of biochemical engineering, the technologies of organ-on-a-chip, based on microfluidic devices built using microfabrication, have been widely studied recently as a novel in vitro organ model. Since it is possible to physically and chemically mimic the in vitro environment by using microfluidic device technology, maintenance of cellular function and morphology, and replication of organ interactions can be realized using organ-on-a-chip devices. So far, functions of various organs and tissues, such as the lung, liver, kidney, and gut have been reproduced as in vitro models. Furthermore, a body-on-a-chip, integrating multi organ functions on a microfluidic device, has also been proposed for prediction of organ interactions. We herein provide a background of microfluidic systems, organ-on-a-chip, Body-on-a-chip technologies, and their challenges in the future. Copyright © 2017 The Japanese Society for the Study of Xenobiotics. Published by Elsevier Ltd. All rights reserved.

Chip-scale sensor system integration for portable health monitoring.

PubMed

Jokerst, Nan M; Brooke, Martin A; Cho, Sang-Yeon; Shang, Allan B

2007-12-01

The revolution in integrated circuits over the past 50 yr has produced inexpensive computing and communications systems that are powerful and portable. The technologies for these integrated chip-scale sensing systems, which will be miniature, lightweight, and portable, are emerging with the integration of sensors with electronics, optical systems, micromachines, microfluidics, and the integration of chemical and biological materials (soft/wet material integration with traditional dry/hard semiconductor materials). Hence, we stand at a threshold for health monitoring technology that promises to provide wearable biochemical sensing systems that are comfortable, inauspicious, wireless, and battery-operated, yet that continuously monitor health status, and can transmit compressed data signals at regular intervals, or alarm conditions immediately. In this paper, we explore recent results in chip-scale sensor integration technology for health monitoring. The development of inexpensive chip-scale biochemical optical sensors, such as microresonators, that are customizable for high sensitivity coupled with rapid prototyping will be discussed. Ground-breaking work in the integration of chip-scale optical systems to support these optical sensors will be highlighted, and the development of inexpensive Si complementary metal-oxide semiconductor circuitry (which makes up the vast majority of computational systems today) for signal processing and wireless communication with local receivers that lie directly on the chip-scale sensor head itself will be examined.

Flipping the classroom to teach population health: Increasing the relevance.

PubMed

Simpson, Vicki; Richards, Elizabeth

2015-05-01

In recent years, there have been multiple calls to enhance the population health and health promotion aspects of nursing programs. Further impetus has been provided by passage of the Affordable Care Act in 2010 with its focus on prevention. The need to develop students who can critically think and apply knowledge learned is crucial to the development of nurses who can integrate and apply the concepts of population-focused practice in society and a healthcare system undergoing transformation. This coupled with the ever changing needs of learners requires a different approach to content delivery and presentation. Flipped classroom courses, with an online component, offer the flexibility and technology desired by current undergraduate students. The use of a flipped classroom approach to re-design a population health course in a Midwestern nursing program resulted in stronger course evaluations from students and reflected better student understanding of the relevance of such content in a nursing curriculum. Copyright © 2015 Elsevier Ltd. All rights reserved.

A sub-millimeter resolution detector module for small-animal PET applications

NASA Astrophysics Data System (ADS)

Sacco, I.; Dohle, R.; Fischer, P.; Gola, A.; Piemonte, C.; Ritzert, M.

2017-01-01

We present a gamma detection module optimized for very high resolution PET applications, able to resolve arrays of scintillating crystals with sub-millimeter pitch. The detector is composed of a single ceramic substrate (LTCC): it hosts four flip-chip mounted PETA5 ASICs on the bottom side and an array of SiPM sensors on the top surface, fabricated in HD-RGB technology by FBK. Each chip has 36 channels, for a maximum of 144 readout channels on a sensitive area of about 32 mm × 32 mm. The module is MR-compatible. The thermal decoupling of the readout electronics from the photon sensors is obtained with an efficient internal liquid channel, integrated within the ceramic substrate. Two modules have been designed, based on different SiPM topologies: • Light spreader-based: an array of 12 × 12 SiPMs, with an overall pitch of 2.5 mm, is coupled with a scintillators array using a 1 mm thick glass plate. The light from one crystal is spread over a group of SiPMs, which are read out in parallel using PETA5 internal neighbor logic. • Interpolating SiPM-based: ISiPMs are intrinsic position-sensitive sensors. The photon diodes in the array are connected to one of the four available outputs so that the center of gravity of any bunch of detected photons can be reconstructed using a proper weight function of the read out amplitudes. An array of ISiPMs, each 7.5 mm× 5 mm sized, is directly coupled with the scintillating crystals. Both modules can clearly resolve LYSO arrays with a pitch of only 0.833 mm. The detector can be adjusted for clinical PET, where it has already shown ToF resolution of about 230 ps CRT at FWHM. The module designs, their features and results are described.

JPL CMOS Active Pixel Sensor Technology

NASA Technical Reports Server (NTRS)

Fossum, E. R.

1995-01-01

This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

Taxonomies of Educational Technology Uses: Dewey, Chip and Me

ERIC Educational Resources Information Center

Levin, James A.

2014-01-01

In the early 1990s, Chip Bruce created a taxonomy of education technology uses, which the author of the article helped to expand and evaluate. This taxonomy is based on John Dewey's "four impulses of the child": inquiry, construction, communication, and expression. This taxonomy has helped people interested in the uses of…

On board processor development for NASA's spaceborne imaging radar with system-on-chip technology

NASA Technical Reports Server (NTRS)

Fang, Wai-Chi

2004-01-01

This paper reports a preliminary study result of an on-board spaceborne SAR processor. It consists of a processing requirement analysis, functional specifications, and implementation with system-on-chip technology. Finally, a minimum version of this on-board processor designed for performance evaluation and for partial demonstration is illustrated.

Incorporating biopulping technology into wood yard operations

Treesearch

Gary M. Scott; Eric Horn; Masood Akhtar; Ross E. Swaney; Michael J. Lentz; David F. Shipley

1998-01-01

Biopulping is the treatment of wood chips and other lignocellulosic materials with lignin-degrading fungi prior to pulping. Ten years of industry-sponsored research has demonstrated the technical feasibility of the technology for mechanical pulping at a laboratory scale. Two 50-ton outdoor chip pile trials recently conducted at the USDA Forest Service, Forest Products...

78 FR 24234 - Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-04-24

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-819] Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice of Request for Statements on the... order barring the entry of unlicensed DRAM semiconductor chips manufactured by Nanya Technology...

Development of batch producible hot embossing 3D nanostructured surface-enhanced Raman scattering chip technology

NASA Astrophysics Data System (ADS)

Huang, Chu-Yu; Tsai, Ming-Shiuan

2017-09-01

The main purpose of this study is to develop a batch producible hot embossing 3D nanostructured surface-enhanced Raman chip technology for high sensitivity label-free plasticizer detection. This study utilizing the AAO self-assembled uniform nano-hemispherical array barrier layer as a template to create a durable nanostructured nickel mold. With the hot embossing technique and the durable nanostructured nickel mold, we are able to batch produce the 3D Nanostructured Surface-enhanced Raman Scattering Chip with consistent quality. In addition, because of our SERS chip can be fabricated by batch processing, the fabrication cost is low. Therefore, the developed method is very promising to be widespread and extensively used in rapid chemical and biomolecular detection applications.

Organs-on-chips at the frontiers of drug discovery

PubMed Central

Esch, Eric W.; Bahinski, Anthony; Huh, Dongeun

2016-01-01

Improving the effectiveness of preclinical predictions of human drug responses is critical to reducing costly failures in clinical trials. Recent advances in cell biology, microfabrication and microfluidics have enabled the development of microengineered models of the functional units of human organs — known as organs-on-chips — that could provide the basis for preclinical assays with greater predictive power. Here, we examine the new opportunities for the application of organ-on-chip technologies in a range of areas in preclinical drug discovery, such as target identification and validation, target-based screening, and phenotypic screening. We also discuss emerging drug discovery opportunities enabled by organs-on-chips, as well as important challenges in realizing the full potential of this technology. PMID:25792263

Three-Dimensional Waveguide Arrays for Coupling Between Fiber-Optic Connectors and Surface-Mounted Optoelectronic Devices

NASA Astrophysics Data System (ADS)

Hiramatsu, Seiki; Kinoshita, Masao

2005-09-01

This paper describes the fabrication of novel surface-mountable waveguide connectors and presents test results for them. To ensure more highly integrated and low-cost fabrication, we propose new three-dimensional (3-D) waveguide arrays that feature two-dimensionally integrated optical inputs/outputs and optical path redirection. A wafer-level stack and lamination process was used to fabricate the waveguide arrays. Vertical-cavity surface-emitting lasers (VCSELs) and photodiodes were directly mounted on the arrays and combined with mechanical transferable ferrule using active alignment. With the help of a flip-chip bonder, the waveguide connectors were mounted on a printed circuit board by solder bumps. Using mechanical transferable connectors, which can easily plug into the waveguide connectors, we obtained multi-gigabits-per-second transmission performance.

Method of fabricating a PbS-PbSe IR detector array

NASA Technical Reports Server (NTRS)

Barrett, John R. (Inventor)

1987-01-01

A silicon wafer is provided which does not employ individually bonded leads between the IR sensitive elements and the input stages of multiplexers. The wafer is first coated with lead selenide in a first detector array area and is thereafter coated with lead sulfide within a second detector array area. The described steps result in the direct chemical deposition of lead selenide and lead sulfide upon the silicon wafer to eliminate individual wire bonding, bumping, flip chiping, planar interconnecting methods of connecting detector array elements to silicon chip circuitry, e.g., multiplexers, to enable easy fabrication of very long arrays. The electrode structure employed, produces an increase in the electrical field gradient between the electrodes for a given volume of detector material, relative to conventional electrode configurations.

Full Flip, Half Flip and No Flip: Evaluation of Flipping an Introductory Programming Course

ERIC Educational Resources Information Center

Fryling, Meg; Yoder, Robert; Breimer, Eric

2016-01-01

While some research has suggested that video lectures are just as effective as in-person lectures to convey basic information to students, not everyone agrees that the flipped classroom model is an effective way of educating students. This research explores traditional, semi-flipped and fully-flipped classroom models by comparing three sections of…

Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

NASA Astrophysics Data System (ADS)

Elsobky, Mourad; Mahsereci, Yigit; Keck, Jürgen; Richter, Harald; Burghartz, Joachim N.

2017-09-01

Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic

NASA Astrophysics Data System (ADS)

Yamamoto, Shuu'ichirou; Shuto, Yusuke; Sugahara, Satoshi

2013-07-01

We computationally analyzed performance and power-gating (PG) ability of a new nonvolatile delay flip-flop (NV-DFF) based on pseudo-spin-MOSFET (PS-MOSFET) architecture using spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The high-performance energy-efficient PG operations of the NV-DFF can be achieved owing to its cell structure employing PS-MOSFETs that can electrically separate the STT-MTJs from the ordinary DFF part of the NV-DFF. This separation also makes it possible that the break-even time (BET) of the NV-DFF is designed by the size of the PS-MOSFETs without performance degradation of the normal DFF operations. The effect of the area occupation ratio of the NV-DFFs to a CMOS logic system on the BET was also analyzed. Although the optimized BET was varied depending on the area occupation ratio, energy-efficient fine-grained PG with a BET of several sub-microseconds was revealed to be achieved. We also proposed microprocessors and system-on-chip (SoC) devices using nonvolatile hierarchical-memory systems wherein NV-DFF and nonvolatile static random access memory (NV-SRAM) circuits are used as fundamental building blocks. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

Semiconductors: Still a Wide Open Frontier for Scientists/Engineers

NASA Astrophysics Data System (ADS)

Seiler, David G.

1997-10-01

A 1995 Business Week article described several features of the explosive use of semiconductor chips today: ``Booming'' personal computer markets are driving high demand for microprocessors and memory chips; (2) New information superhighway markets will `ignite' sales of multimedia and communication chips; and (3) Demand for digital-signal-processing and data-compression chips, which speed up video and graphics, is `red hot.' A Washington Post article by Stan Hinden said that technology is creating an unstoppable demand for electronic elements. This ``digital pervasiveness'' means that a semiconductor chip is going into almost every high-tech product that people buy - cars, televisions, video recorders, telephones, radios, alarm clocks, coffee pots, etc. ``Semiconductors are everywhere.'' Silicon and compound semiconductors are absolutely essential and are pervasive enablers for DoD operations and systems. DoD's Critical Technologies Plan of 1991 says that ``Semiconductor materials and microelectronics are critically important and appropriately lead the list of critical defense technologies.'' These trends continue unabated. This talk describes some of the frontiers of semiconductors today and shows how scientists and engineers can effectively contribute to its advancement. Cooperative, multidisciplinary efforts are increasing. Specific examples will be given for scanning capacitance microscopy and thin-film metrology.

Lab-on-a-Chip Based Protein Crystallization

NASA Technical Reports Server (NTRS)

vanderWoerd, Mark J.; Brasseur, Michael M.; Spearing, Scott F.; Whitaker, Ann F. (Technical Monitor)

2001-01-01

We are developing a novel technique with which we will grow protein crystals in very small volumes, utilizing chip-based, microfluidic ("LabChip") technology. This development, which is a collaborative effort between NASA's Marshall Space Flight Center and Caliper Technologies Corporation, promises a breakthrough in the field of protein crystal growth. Our initial results obtained from two model proteins, Lysozyme and Thaumatin, show that it is feasible to dispense and adequately mix protein and precipitant solutions on a nano-liter scale. The mixtures have shown crystal growth in volumes in the range of 10 nanoliters to 5 microliters. In addition, large diffraction quality crystals were obtained by this method. X-ray data from these crystals were shown to be of excellent quality. Our future efforts will include the further development of protein crystal growth with LabChip(trademark) technology for more complex systems. We will initially address the batch growth method, followed by the vapor diffusion method and the liquid-liquid diffusion method. The culmination of these chip developments is to lead to an on orbit protein crystallization facility on the International Space Station. Structural biologists will be invited to utilize the on orbit Iterative Biological Crystallization facility to grow high quality macromolecular crystals in microgravity.

On-chip microsystems in silicon: opportunities and limitations

NASA Astrophysics Data System (ADS)

Wolffenbuttel, R. F.

1996-03-01

Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

Chip in a lab: Microfluidics for next generation life science research

PubMed Central

Streets, Aaron M.; Huang, Yanyi

2013-01-01

Microfluidic circuits are characterized by fluidic channels and chambers with a linear dimension on the order of tens to hundreds of micrometers. Components of this size enable lab-on-a-chip technology that has much promise, for example, in the development of point-of-care diagnostics. Micro-scale fluidic circuits also yield practical, physical, and technological advantages for studying biological systems, enhancing the ability of researchers to make more precise quantitative measurements. Microfluidic technology has thus become a powerful tool in the life science research laboratory over the past decade. Here we focus on chip-in-a-lab applications of microfluidics and survey some examples of how small fluidic components have provided researchers with new tools for life science research. PMID:23460772

Macromolecular Crystal Growth by Means of Microfluidics

NASA Technical Reports Server (NTRS)

vanderWoerd, Mark; Ferree, Darren; Spearing, Scott; Monaco, Lisa; Molho, Josh; Spaid, Michael; Brasseur, Mike; Curreri, Peter A. (Technical Monitor)

2002-01-01

We have performed a feasibility study in which we show that chip-based, microfluidic (LabChip(TM)) technology is suitable for protein crystal growth. This technology allows for accurate and reliable dispensing and mixing of very small volumes while minimizing bubble formation in the crystallization mixture. The amount of (protein) solution remaining after completion of an experiment is minimal, which makes this technique efficient and attractive for use with proteins, which are difficult or expensive to obtain. The nature of LabChip(TM) technology renders it highly amenable to automation. Protein crystals obtained in our initial feasibility studies were of excellent quality as determined by X-ray diffraction. Subsequent to the feasibility study, we designed and produced the first LabChip(TM) device specifically for protein crystallization in batch mode. It can reliably dispense and mix from a range of solution constituents into two independent growth wells. We are currently testing this design to prove its efficacy for protein crystallization optimization experiments. In the near future we will expand our design to incorporate up to 10 growth wells per LabChip(TM) device. Upon completion, additional crystallization techniques such as vapor diffusion and liquid-liquid diffusion will be accommodated. Macromolecular crystallization using microfluidic technology is envisioned as a fully automated system, which will use the 'tele-science' concept of remote operation and will be developed into a research facility for the International Space Station as well as on the ground.

Organic electronics based pressure sensor towards intracranial pressure monitoring

NASA Astrophysics Data System (ADS)

Rai, Pratyush; Varadan, Vijay K.

2010-04-01

The intra-cranial space, which houses the brain, contains cerebrospinal fluid (CSF) that acts as a fluid suspension medium for the brain. The CSF is always in circulation, is secreted in the cranium and is drained out through ducts called epidural veins. The venous drainage system has inherent resistance to the flow. Pressure is developed inside the cranium, which is similar to a rigid compartment. Normally a pressure of 5-15 mm Hg, in excess of atmospheric pressure, is observed at different locations inside the cranium. Increase in Intra-Cranial Pressure (ICP) can be caused by change in CSF volume caused by cerebral tumors, meningitis, by edema of a head injury or diseases related to cerebral atrophy. Hence, efficient ways of monitoring ICP need to be developed. A sensor system and monitoring scheme has been discussed here. The system architecture consists of a membrane less piezoelectric pressure sensitive element, organic thin film transistor (OTFT) based signal transduction, and signal telemetry. The components were fabricated on flexible substrate and have been assembled using flip-chip packaging technology. Material science and fabrication processes, subjective to the device performance, have been discussed. Capability of the device in detecting pressure variation, within the ICP pressure range, is investigated and applicability of measurement scheme to medical conditions has been argued for. Also, applications of such a sensor-OTFT assembly for logic sensor switching and patient specific-secure monitoring system have been discussed.

An integrated CMOS high voltage supply for lab-on-a-chip systems.

PubMed

Behnam, M; Kaigala, G V; Khorasani, M; Marshall, P; Backhouse, C J; Elliott, D G

2008-09-01

Electrophoresis is a mainstay of lab-on-a-chip (LOC) implementations of molecular biology procedures and is the basis of many medical diagnostics. High voltage (HV) power supplies are necessary in electrophoresis instruments and are a significant part of the overall system cost. This cost of instrumentation is a significant impediment to making LOC technologies more widely available. We believe one approach to overcoming this problem is to use microelectronic technology (complementary metal-oxide semiconductor, CMOS) to generate and control the HV. We present a CMOS-based chip (3 mm x 2.9 mm) that generates high voltages (hundreds of volts), switches HV outputs, and is powered by a 5 V input supply (total power of 28 mW) while being controlled using a standard computer serial interface. Microchip electrophoresis with laser induced fluorescence (LIF) detection is implemented using this HV CMOS chip. With the other advancements made in the LOC community (e.g. micro-fluidic and optical devices), these CMOS chips may ultimately enable 'true' LOC solutions where essentially all the microfluidics, photonics and electronics are on a single chip.

A proposed holistic approach to on-chip, off-chip, test, and package interconnections

NASA Astrophysics Data System (ADS)

Bartelink, Dirk J.

1998-11-01

The term interconnection has traditionally implied a `robust' connection from a transistor or a group of transistors in an IC to the outside world, usually a PC board. Optimum system utilization is done from outside the IC. As an alternative, this paper addresses `unimpeded' transistor-to-transistor interconnection aimed at reaching the high circuit densities and computational capabilities of neighboring IC's. In this view, interconnections are not made to some human-centric place outside the IC world requiring robustness—except for system input and output connections. This unimpeded interconnect style is currently available only through intra-chip signal traces in `system-on-a-chip' implementations, as exemplified by embedded DRAMs. Because the traditional off-chip penalty in performance and wiring density is so large, a merging of complex process technologies is the only option today. It is suggested that, for system integration to move forward, the traditional robustness requirement inherited from conventional packaging interconnect and IC manufacturing test must be discarded. Traditional system assembly from vendor parts requires robustness under shipping, inspection and assembly. The trend toward systems on a chip signifies willingness by semiconductor companies to design and fabricate whole systems in house, so that `in-house' chip-to-chip assembly is not beyond reach. In this scenario, bare chips never leave the controlled environment of the IC fabricator while the two major contributors to off-chip signal penalty, ESD protection and the need to source a 50-ohm test head, are avoided. With in-house assembly, ESD protection can be eliminated with the precautions already familiar in plasma etching. Test interconnection impacts the fundamentals of IC manufacturing, particularly with clock speeds approaching 1GHz, and cannot be an afterthought. It should be an integral part of the chip-to-chip interconnection bandwidth optimization, because—as we must recognize—test is also performed using IC's. A system interconnection is proposed using multiple chips fabricated with conventional silicon processes, including MEMS technology. The system resembles an MCM that can be joined without committing to final assembly to perform at-speed testing. 50-Ohm test probes never load the circuit; only intended neighboring chips are ever connected. A `back-plane' chip provides the connection layers for both inter- and intra-chip signals and also serves as the probe card, in analogy with membrane probes now used for single-chip testing. Intra-chip connections, which require complicated connections during test that exactly match the product, are then properly made and all waveforms and loading conditions under test will be identical to those of the product. The major benefit is that all front-end chip technologies can be merged—logic, memory, RF, even passives. ESD protection is required only on external system connections. Manufacturing test information will accurately characterize process faults and thus avoid the Known-Good-Die problem that has slowed the arrival of conventional MCM's.

Using Existing NASA Satellites as Orbiting Testbeds to Accelerate Technology Infusion into Future Missions

NASA Technical Reports Server (NTRS)

Mandl, Daniel; Ly, Vuong; Frye, Stuart

2006-01-01

One of the shared problems for new space mission developers is that it is extremely difficult to infuse new technology into new missions unless that technology has been flight validated. Therefore, the issue is that new technology is required to fly on a successful mission for flight validation. We have been experimenting with new technology on existing satellites by retrofitting primarily the flight software while the missions are on-orbit to experiment with new operations concepts. Experiments have been using Earth Observing 1 (EO-1), which is part of the New Millennium Program at NASA. EO-1 finished its prime mission one year after its launch on November 21,2000. From November 21,2001 until the present, EO-1 has been used in parallel with additional science data gathering to test out various sensor web concepts. Similarly, the Cosmic Hot Interstellar Plasma Spectrometer (CHIPS) satellite was also a one year mission flown by the University of Berkeley, sponsored by NASA and whose prime mission ended August 30,2005. Presently, CHIPS is being used to experiment with a seamless space to ground interface by installing Core Flight System (cFS), a "plug-and-play" architecture developed by the Flight Software Branch at NASA/GSFC on top of the existing space-to-ground Internet Protocol (IP) interface that CHIPS implemented. For example, one targeted experiment is to connect CHIPS to a rover via this interface and the Internet, and trigger autonomous actions on CHIPS, the rover or both. Thus far, having satellites to experiment with new concepts has turned out to be an inexpensive way to infuse new technology for future missions. Relevant experiences thus far and future plans will be discussed in this presentation.

Space division multiplexing chip-to-chip quantum key distribution.

PubMed

Bacco, Davide; Ding, Yunhong; Dalgaard, Kjeld; Rottwitt, Karsten; Oxenløwe, Leif Katsuo

2017-09-29

Quantum cryptography is set to become a key technology for future secure communications. However, to get maximum benefit in communication networks, transmission links will need to be shared among several quantum keys for several independent users. Such links will enable switching in quantum network nodes of the quantum keys to their respective destinations. In this paper we present an experimental demonstration of a photonic integrated silicon chip quantum key distribution protocols based on space division multiplexing (SDM), through multicore fiber technology. Parallel and independent quantum keys are obtained, which are useful in crypto-systems and future quantum network.

Towards an integrated optofluidic system for highly sensitive detection of antibiotics in seawater incorporating bimodal waveguide photonic biosensors and complex, active microfluidics

NASA Astrophysics Data System (ADS)

Szydzik, C.; Gavela, A. F.; Roccisano, J.; Herranz de Andrés, S.; Mitchell, A.; Lechuga, L. M.

2016-12-01

We present recent results on the realisation and demonstration of an integrated optofluidic lab-on-a-chip measurement system. The system consists of an integrated on-chip automated microfluidic fluid handling subsystem, coupled with bimodal nano-interferometer waveguide technology, and is applied in the context of detection of antibiotics in seawater. The bimodal waveguide (BMWG) is a highly sensitive label-free biosensor. Integration of complex microfluidic systems with bimodal waveguide technology enables on-chip sample handling and fluid processing capabilities and allows for significant automation of experimental processes. The on-chip fluid-handling subsystem is realised through the integration of pneumatically actuated elastomer pumps and valves, enabling high temporal resolution sample and reagent delivery and facilitating multiplexed detection processes.

Reliability assessment of Multichip Module technologies via the Triservice/NASA RELTECH program

NASA Astrophysics Data System (ADS)

Fayette, Daniel F.

1994-10-01

Multichip Module (MCM) packaging/interconnect technologies have seen increased emphasis from both the commercial and military communities as a means of increasing capability and performance while providing a vehicle for reducing cost, power and weight of the end item electronic application. This is accomplished through three basic Multichip module technologies, MCM-L that are laminates, MCM-C that are ceramic type substrates and MCM-D that are deposited substrates (e.g., polymer dielectric with thin film metals). Three types of interconnect structures are also used with these substrates and include, wire bond, Tape Automated Bonds (TAB) and flip chip ball bonds. Application, cost, producibility and reliability are the drivers that will determine which MCM technology will best fit a respective need or requirement. With all the benefits and technologies cited, it would be expected that the use of, or the planned use of, MCM's would be more extensive in both military and commercial applications. However, two significant roadblocks exist to implementation of these new technologies: the absence of reliability data and a single national standard for the procurement of reliable/quality MCM's. To address the preceding issues, the Reliability Technology to Achieve Insertion of Advanced Packaging (RELTECH) program has been established. This program, which began in May 1992, has endeavored to evaluate a cross section of MCM technologies covering all classes of MCM's previously cited. NASA and the Tri-Services (Air Force Rome Laboratory, Naval Surface Warfare Center, Crane IN and Army Research Laboratory) have teamed together with sponsorship from ARPA to evaluate the performance, reliability and producibility of MCM's for both military and commercial usage. This is done in close cooperation with our industry partners whose support is critical to the goals of the program. Several tasks are being performed by the RELTECH program and data from this effort, in conjunction with information from our industry partners as well as discussions with industry organizations (IPC, EIA, ISHM, etc.) are being used to develop the qualification and screening requirements for MCM's. Specific tasks being performed by the RELTECH program include technical assessments, product evaluations, reliability modeling, environmental testing, and failure analysis. This paper will describe the various tasks associated with the RELTECH program, status, progress and a description of the national dual use specification being developed for MCM technologies.

Nitrogen Cycle Evaluation (NiCE) Chip for the Simultaneous Analysis of Multiple N-Cycle Associated Genes.

PubMed

Oshiki, Mamoru; Segawa, Takahiro; Ishii, Satoshi

2018-02-02

Various microorganisms play key roles in the Nitrogen (N) cycle. Quantitative PCR (qPCR) and PCR-amplicon sequencing of the N cycle functional genes allow us to analyze the abundance and diversity of microbes responsible in the N transforming reactions in various environmental samples. However, analysis of multiple target genes can be cumbersome and expensive. PCR-independent analysis, such as metagenomics and metatranscriptomics, is useful but expensive especially when we analyze multiple samples and try to detect N cycle functional genes present at relatively low abundance. Here, we present the application of microfluidic qPCR chip technology to simultaneously quantify and prepare amplicon sequence libraries for multiple N cycle functional genes as well as taxon-specific 16S rRNA gene markers for many samples. This approach, named as N cycle evaluation (NiCE) chip, was evaluated by using DNA from pure and artificially mixed bacterial cultures and by comparing the results with those obtained by conventional qPCR and amplicon sequencing methods. Quantitative results obtained by the NiCE chip were comparable to those obtained by conventional qPCR. In addition, the NiCE chip was successfully applied to examine abundance and diversity of N cycle functional genes in wastewater samples. Although non-specific amplification was detected on the NiCE chip, this could be overcome by optimizing the primer sequences in the future. As the NiCE chip can provide high-throughput format to quantify and prepare sequence libraries for multiple N cycle functional genes, this tool should advance our ability to explore N cycling in various samples. Importance. We report a novel approach, namely Nitrogen Cycle Evaluation (NiCE) chip by using microfluidic qPCR chip technology. By sequencing the amplicons recovered from the NiCE chip, we can assess diversities of the N cycle functional genes. The NiCE chip technology is applicable to analyze the temporal dynamics of the N cycle gene transcriptions in wastewater treatment bioreactors. The NiCE chip can provide high-throughput format to quantify and prepare sequence libraries for multiple N cycle functional genes. While there is a room for future improvement, this tool should significantly advance our ability to explore the N cycle in various environmental samples. Copyright © 2018 American Society for Microbiology.

Effects of Solder Volume and Reflow Conditions on Self-Alignment Accuracy for Fan-Out Package Applications

NASA Astrophysics Data System (ADS)

Park, Hwan-Pil; Seo, Gwancheol; Kim, Sungchul; Kim, Young-Ho

2018-01-01

The effects of solder volume and reaction time between molten solder and a metal pad at the peak temperature of reflow on the self-alignment effect have been investigated in flip chip bonding. A glass die with two different pad designs and a flame retardant-4 (FR-4) organic substrate were used. Sn-3.0Ag-0.5Cu and Sn-3.5Ag solders were formed on Cu-organic solderability preservation (Cu-OSP) and electroless nickel electroless palladium immersion gold (ENEPIG) pads on FR-4 substrates using the stencil printing method. To assess the effect of solder volume, the thickness and opening size of the stencil mask were controlled. Reflow experiments were performed at 250°C with wetting times of 40 s, 55 s, 65 s, and 75 s. After flip chip reflow soldering, the bonding areas were cross-sectioned to inspect the shape of the interconnected solder using scanning electron microscopy. The results revealed that using an insufficient solder volume on the pad was responsible for die shifts larger than 1 μm, while a sufficient solder volume on the pad and a stable solder joint shape could ensure misalignment less than 1 μm. The Sn-3.0Ag-0.5Cu solder showed a lower die shift value than the Sn-3.5Ag solder because the Sn-3.0Ag-0.5Cu solder has stronger surface tension than the Sn-3.5Ag solder. Using a longer wetting time between the solder and the pad at the peak temperature also improved the die shift value because the increased reaction time changed the interconnected solder shape between the die and substrate from concave to convex, moving the die to a more accurate position. Furthermore, the restoring forces on die self-alignment influenced the die shift value. A stronger solder surface tension and a larger volume of solder on the pad produced stronger restoring forces for die self-alignment, thereby improving the die shift value.

Nanotechnology and the Developing World: Lab-on-Chip Technology for Health and Environmental Applications

ERIC Educational Resources Information Center

Mehta, Michael D.

2008-01-01

This article argues that advances in nanotechnology in general, and lab-on-chip technology in particular, have the potential to benefit the developing world in its quest to control risks to human health and the environment. Based on the "risk society" thesis of Ulrich Beck, it is argued that the developed world must realign its science and…

Three-dimensional integrated circuits for lab-on-chip dielectrophoresis of nanometer scale particles

NASA Astrophysics Data System (ADS)

Dickerson, Samuel J.; Noyola, Arnaldo J.; Levitan, Steven P.; Chiarulli, Donald M.

2007-01-01

In this paper, we present a mixed-technology micro-system for electronically manipulating and optically detecting virusscale particles in fluids that is designed using 3D integrated circuit technology. During the 3D fabrication process, the top-most chip tier is assembled upside down and the substrate material is removed. This places the polysilicon layer, which is used to create geometries with the process' minimum feature size, in close proximity to a fluid channel etched into the top of the stack. By taking advantage of these processing features inherent to "3D chip-stacking" technology, we create electrode arrays that have a gap spacing of 270 nm. Using 3D CMOS technology also provides the ability to densely integrate analog and digital control circuitry for the electrodes by using the additional levels of the chip stack. We show simulations of the system with a physical model of a Kaposi's sarcoma-associated herpes virus, which has a radius of approximately 125 nm, being dielectrophoretically arranged into striped patterns. We also discuss how these striped patterns of trapped nanometer scale particles create an effective diffraction grating which can then be sensed with macro-scale optical techniques.

About Small Streams and Shiny Rocks: Macromolecular Crystal Growth in Microfluidics

NASA Technical Reports Server (NTRS)

vanderWoerd, Mark; Ferree, Darren; Spearing, Scott; Monaco, Lisa; Molho, Josh; Spaid, Michael; Brasseur, Mike; Curreri, Peter A. (Technical Monitor)

2002-01-01

We are developing a novel technique with which we have grown diffraction quality protein crystals in very small volumes, utilizing chip-based, microfluidic ("LabChip") technology. With this technology volumes smaller than achievable with any laboratory pipette can be dispensed with high accuracy. We have performed a feasibility study in which we crystallized several proteins with the aid of a LabChip device. The protein crystals are of excellent quality as shown by X-ray diffraction. The advantages of this new technology include improved accuracy of dispensing for small volumes, complete mixing of solution constituents without bubble formation, highly repeatable recipe and growth condition replication, and easy automation of the method. We have designed a first LabChip device specifically for protein crystallization in batch mode and can reliably dispense and mix from a range of solution constituents. We are currently testing this design. Upon completion additional crystallization techniques, such as vapor diffusion and liquid-liquid diffusion will be accommodated. Macromolecular crystallization using microfluidic technology is envisioned as a fully automated system, which will use the 'tele-science' concept of remote operation and will be developed into a research facility aboard the International Space Station.

Mega-pixel PQR laser chips for interconnect, display ITS, and biocell-tweezers OEIC

NASA Astrophysics Data System (ADS)

Kwon, O'Dae; Yoon, J. H.; Kim, D. K.; Kim, Y. C.; Lee, S. E.; Kim, S. S.

2008-02-01

We describe a photonic quantum ring (PQR) laser device of three dimensional toroidal whispering gallery cavity. We have succeeded in fabricating the first genuine mega-pixel laser chips via regular semiconductor technology. This has been realized since the present injection laser emitting surface-normal dominant 3D whispering gallery modes (WGMs) can be operated CW with extremely low operating currents (μA-nA per pixel), together with the lasing temperature stabilities well above 140 deg C with minimal redshifts, which solves the well-known integration problems facing the conventional VCSEL. Such properties unusual for quantum well lasers become usual because the active region, involving vertically confining DBR structure in addition to the 2D concave WGM geometry, induces a 'photonic quantum ring (PQR)-like' carrier distribution through a photonic quantum corral effect. A few applications of such mega-pixel PQR chips are explained as follows: (A) Next-generation 3D semiconductor technologies demand a strategy on the inter-chip and intra-chip optical interconnect schemes with a key to the high-density emitter array. (B) Due to mounting traffic problems and fatalities ITS technology today is looking for a revolutionary change in the technology. We will thus outline how 'SLEEP-ITS' can emerge with the PQR's position-sensing capability. (C) We describe a recent PQR 'hole' laser of convex WGM: Mega-pixel PQR 'hole' laser chips are even easier to fabricate than PQR 'mesa' lasers. Genuine Laguerre-Gaussian (LG) beam patterns of PQR holes are very promising for biocell manipulations like sorting mouse myeloid leukemia (M1s) cells. (D) Energy saving and 3D speckle-free POR laser can outdo LEDs in view of red GaAs and blue GaN devices fabricated recently.

Gene chips and arrays revealed: a primer on their power and their uses.

PubMed

Watson, S J; Akil, H

1999-03-01

This article provides an overview and general explanation of the rapidly developing area of gene chips and expression array technology. These are methods targeted at allowing the simultaneous study of thousands of genes or messenger RNAs under various physiological and pathological states. Their technical basis grows from the Human Genome Project. Both methods place DNA strands on glass computer chips (or microscope slides). Expression arrays start with complementary DNA (cDNA) clones derived from the EST data base, whereas Gene Chips synthesize oligonucleotides directly on the chip itself. Both are analyzed using image analysis systems, are capable of reading values from two different individuals at any one site, and can yield quantitative data for thousands of genes or mRNAs per slide. These methods promise to revolutionize molecular biology, cell biology, neuroscience and psychiatry. It is likely that this technology will radically open up our ability to study the actions and structure of the multiple genes involved in the complex genetics of brain disorders.

Flipping the Class: A New Media Pedagogy

ERIC Educational Resources Information Center

Arduser, Lora

2016-01-01

Business communication evolves and adapts to suit the times, and today's workplace documents are increasingly multimodal. Therefore, business and professional communication specialists need to adapt to a new media workplace ecology--one that requires proficiencies with technologies such as video production, digital animation, and sound. Business…

Flipped classroom or an active lecture?

PubMed

Pickering, James D; Roberts, David J H

2018-01-01

Recent changes in anatomy education have seen the introduction of flipped classrooms as a replacement to the traditional didactic lecture. This approach utilizes the increasing availability of digital technology to create learning resources that can be accessed prior to attending class, with face-to-face sessions then becoming more student-centered via discussion, collaborative learning, and problem-solving activities. Although this approach may appear intuitive, this viewpoint commentary presents a counter opinion and highlights a simple alternative that utilizes evidence-based active learning approaches as part of the traditional lecture. The active lecture takes the traditional lecture, and (1) ensures the lecture content is relevant and has clear objectives, (2) contains lecture material that is designed according to the latest evidence-base, (3) complements it with additional supplementary material, (4) creates space to check prior understanding and knowledge levels, and (5) utilizes suitable technology to facilitate continual engagement and interaction. Clin. Anat. 31:118-121, 2018. © 2017 Wiley Periodicals, Inc. © 2017 Wiley Periodicals, Inc.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Controlled and tunable polymer particles' production using a single microfluidic device

NASA Astrophysics Data System (ADS)

Amoyav, Benzion; Benny, Ofra

2018-04-01

Microfluidics technology offers a new platform to control liquids under flow in small volumes. The advantage of using small-scale reactions for droplet generation along with the capacity to control the preparation parameters, making microfluidic chips an attractive technology for optimizing encapsulation formulations. However, one of the drawback in this methodology is the ability to obtain a wide range of droplet sizes, from sub-micron to microns using a single chip design. In fact, typically, droplet chips are used for micron-dimension particles, while nanoparticles' synthesis requires complex chips design (i.e., microreactors and staggered herringbone micromixer). Here, we introduce the development of a highly tunable and controlled encapsulation technique, using two polymer compositions, for generating particles ranging from microns to nano-size using the same simple single microfluidic chip design. Poly(lactic-co-glycolic acid) (PLGA 50:50) or PLGA/polyethylene glycol polymeric particles were prepared with focused-flow chip, yielding monodisperse particle batches. We show that by varying flow rate, solvent, surfactant and polymer composition, we were able to optimize particles' size and decrease polydispersity index, using simple chip designs with no further related adjustments or costs. Utilizing this platform, which offers tight tuning of particle properties, could offer an important tool for formulation development and can potentially pave the way towards a better precision nanomedicine.

A miniature on-chip multi-functional ECG signal processor with 30 µW ultra-low power consumption.

PubMed

Liu, Xin; Zheng, Yuan Jin; Phyu, Myint Wai; Zhao, Bin; Je, Minkyu; Yuan, Xiao Jun

2010-01-01

In this paper, a miniature low-power Electrocardiogram (ECG) signal processing application specific integrated circuit (ASIC) chip is proposed. This chip provides multiple critical functions for ECG analysis using a systematic wavelet transform algorithm and a novel SRAM-based ASIC architecture, while achieves low cost and high performance. Using 0.18 µm CMOS technology and 1 V power supply, this ASIC chip consumes only 29 µW and occupies an area of 3 mm(2). This on-chip ECG processor is highly suitable for reliable real-time cardiac status monitoring applications.

Analysis of Protein-DNA Interaction by Chromatin Immunoprecipitation and DNA Tiling Microarray (ChIP-on-chip).

PubMed

Gao, Hui; Zhao, Chunyan

2018-01-01

Chromatin immunoprecipitation (ChIP) has become the most effective and widely used tool to study the interactions between specific proteins or modified forms of proteins and a genomic DNA region. Combined with genome-wide profiling technologies, such as microarray hybridization (ChIP-on-chip) or massively parallel sequencing (ChIP-seq), ChIP could provide a genome-wide mapping of in vivo protein-DNA interactions in various organisms. Here, we describe a protocol of ChIP-on-chip that uses tiling microarray to obtain a genome-wide profiling of ChIPed DNA.

Atom chip microscopy: A novel probe for strongly correlated materials

NASA Astrophysics Data System (ADS)

Kasch, Brian; Naides, Matthew; Turner, Richard; Ray, Ushnish; Lev, Benjamin

2010-03-01

Atom chip technology---substrates supporting micron-sized current-carrying wires that create magnetic microtraps near surfaces for thermal or degenerate gases of neutral atoms---will enable single-shot, large area detection of magnetic flux below the 10-7 flux quantum level. By harnessing the extreme sensitivity of Bose-Einstein condensates (BECs) to external perturbations, cryogenic atom chips could provide a magnetic flux detection capability that surpasses all other techniques by a factor of 10^2--10^3. We describe the merits of atom chip microscopy, our Rb BEC and atom chip apparatus, and prospects for imaging strongly correlated condensed matter materials.

Fabrication of Silicon Backshorts with Improved Out-of-Band Rejection for Waveguide-Coupled Superconducting Detectors

NASA Technical Reports Server (NTRS)

Crowe, Erik J.; Bennett, Charles L.; Chuss, David T.; Denis, Kevin L.; Eimer, Joseph; Lourie, Nathan; Marriage, Tobias; Moseley, Samuel H.; Rostem, Karwan; Stevenson, Thomas R.;

Thin-Film Quantum Dot Photodiode for Monolithic Infrared Image Sensors †

PubMed Central

Georgitzikis, Epimitheas; Vamvaka, Ioanna; Frazzica, Fortunato; Van Olmen, Jan; De Moor, Piet; Heremans, Paul; Hens, Zeger; Cheyns, David

2017-01-01

Imaging in the infrared wavelength range has been fundamental in scientific, military and surveillance applications. Currently, it is a crucial enabler of new industries such as autonomous mobility (for obstacle detection), augmented reality (for eye tracking) and biometrics. Ubiquitous deployment of infrared cameras (on a scale similar to visible cameras) is however prevented by high manufacturing cost and low resolution related to the need of using image sensors based on flip-chip hybridization. One way to enable monolithic integration is by replacing expensive, small-scale III–V-based detector chips with narrow bandgap thin-films compatible with 8- and 12-inch full-wafer processing. This work describes a CMOS-compatible pixel stack based on lead sulfide quantum dots (PbS QD) with tunable absorption peak. Photodiode with a 150-nm thick absorber in an inverted architecture shows dark current of 10−6 A/cm2 at −2 V reverse bias and EQE above 20% at 1440 nm wavelength. Optical modeling for top illumination architecture can improve the contact transparency to 70%. Additional cooling (193 K) can improve the sensitivity to 60 dB. This stack can be integrated on a CMOS ROIC, enabling order-of-magnitude cost reduction for infrared sensors. PMID:29232871

Optical and electrical interfacing technologies for living cell bio-chips.

PubMed

Shacham-Diamand, Y; Belkin, S; Rishpon, J; Elad, T; Melamed, S; Biran, A; Yagur-Kroll, S; Almog, R; Daniel, R; Ben-Yoav, H; Rabner, A; Vernick, S; Elman, N; Popovtzer, R

2010-06-01

Whole-cell bio-chips for functional sensing integrate living cells on miniaturized platforms made by micro-system-technologies (MST). The cells are integrated, deposited or immersed in a media which is in contact with the chip. The cells behavior is monitored via electrical, electrochemical or optical methods. In this paper we describe such whole-cell biochips where the signal is generated due to the genetic response of the cells. The solid-state platform hosts the biological component, i.e. the living cells, and integrates all the required micro-system technologies, i.e. the micro-electronics, micro-electro optics, micro-electro or magneto mechanics and micro-fluidics. The genetic response of the cells expresses proteins that generate: a. light by photo-luminescence or bioluminescence, b. electrochemical signal by interaction with a substrate, or c. change in the cell impedance. The cell response is detected by a front end unit that converts it to current or voltage amplifies and filters it. The resultant signal is analyzed and stored for further processing. In this paper we describe three examples of whole-cell bio chips, photo-luminescent, bioluminescent and electrochemical, which are based on the genetic response of genetically modified E. coli microbes integrated on a micro-fluidics MEMS platform. We describe the chip outline as well as the basic modeling scheme of such sensors. We discuss the highlights and problems of such system, from the point of view of micro-system-technology.

Sensing systems using chip-based spectrometers

NASA Astrophysics Data System (ADS)

Nitkowski, Arthur; Preston, Kyle J.; Sherwood-Droz, Nicolás.; Behr, Bradford B.; Bismilla, Yusuf; Cenko, Andrew T.; DesRoches, Brandon; Meade, Jeffrey T.; Munro, Elizabeth A.; Slaa, Jared; Schmidt, Bradley S.; Hajian, Arsen R.

2014-06-01

Tornado Spectral Systems has developed a new chip-based spectrometer called OCTANE, the Optical Coherence Tomography Advanced Nanophotonic Engine, built using a planar lightwave circuit with integrated waveguides fabricated on a silicon wafer. While designed for spectral domain optical coherence tomography (SD-OCT) systems, the same miniaturized technology can be applied to many other spectroscopic applications. The field of integrated optics enables the design of complex optical systems which are monolithically integrated on silicon chips. The form factors of these systems can be significantly smaller, more robust and less expensive than their equivalent free-space counterparts. Fabrication techniques and material systems developed for microelectronics have previously been adapted for integrated optics in the telecom industry, where millions of chip-based components are used to power the optical backbone of the internet. We have further adapted the photonic technology platform for spectroscopy applications, allowing unheard-of economies of scale for these types of optical devices. Instead of changing lenses and aligning systems, these devices are accurately designed programmatically and are easily customized for specific applications. Spectrometers using integrated optics have large advantages in systems where size, robustness and cost matter: field-deployable devices, UAVs, UUVs, satellites, handheld scanning and more. We will discuss the performance characteristics of our chip-based spectrometers and the type of spectral sensing applications enabled by this technology.

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

Finite element analysis of a micromechanical deformable mirror device

NASA Technical Reports Server (NTRS)

Sheerer, T. J.; Nelson, W. E.; Hornbeck, L. J.

1989-01-01

A monolithic spatial light modulator chip was developed consisting of a large number of micrometer-scale mirror cells which can be rotated through an angle by application of an electrostatic field. The field is generated by electronics integral to the chip. The chip has application in photoreceptor based non-impact printing technologies. Chips containing over 16000 cells were fabricated, and were tested to several billions of cycles. Finite Element Analysis (FEA) of the device was used to model both the electrical and mechanical characteristics.

To Flip or Not to Flip? An Exploratory Study Comparing Student Performance in Calculus I

ERIC Educational Resources Information Center

Schroeder, Larissa B.; McGivney-Burelle, Jean; Xue, Fei

2015-01-01

The purpose of this exploratory, mixed-methods study was to compare student performance in flipped and non-flipped sections of Calculus I. The study also examined students' perceptions of the flipping pedagogy. Students in the flipped courses reported spending, on average, an additional 1-2 hours per week outside of class on course content.…

The Partially Flipped Classroom: The Effects of Flipping a Module on "Junk Science" in a Large Methods Course

ERIC Educational Resources Information Center

Burgoyne, Stephanie; Eaton, Judy

2018-01-01

Flipped classrooms are gaining popularity, especially in psychology statistics courses. However, not all courses lend themselves to a fully flipped design, and some instructors might not want to commit to flipping every class. We tested the effectiveness of flipping just one component (a module on junk science) of a large methods course. We…

Flipped Approach to Mobile Assisted Language Learning

ERIC Educational Resources Information Center

Yamamoto, Junko

2013-01-01

There are abundant possibilities for using smart phones and tablet computers for foreign language learning. However, if there is an emphasis on memorization or on technology, language learners may not develop proficiency in their target language. Therefore, language teachers should be familiar with strategies for facilitating creative…

Automated, Ultra-Sterile Solid Sample Handling and Analysis on a Chip

NASA Technical Reports Server (NTRS)

Mora, Maria F.; Stockton, Amanda M.; Willis, Peter A.

2013-01-01

There are no existing ultra-sterile lab-on-a-chip systems that can accept solid samples and perform complete chemical analyses without human intervention. The proposed solution is to demonstrate completely automated lab-on-a-chip manipulation of powdered solid samples, followed by on-chip liquid extraction and chemical analysis. This technology utilizes a newly invented glass micro-device for solid manipulation, which mates with existing lab-on-a-chip instrumentation. Devices are fabricated in a Class 10 cleanroom at the JPL MicroDevices Lab, and are plasma-cleaned before and after assembly. Solid samples enter the device through a drilled hole in the top. Existing micro-pumping technology is used to transfer milligrams of powdered sample into an extraction chamber where it is mixed with liquids to extract organic material. Subsequent chemical analysis is performed using portable microchip capillary electrophoresis systems (CE). These instruments have been used for ultra-highly sensitive (parts-per-trillion, pptr) analysis of organic compounds including amines, amino acids, aldehydes, ketones, carboxylic acids, and thiols. Fully autonomous amino acid analyses in liquids were demonstrated; however, to date there have been no reports of completely automated analysis of solid samples on chip. This approach utilizes an existing portable instrument that houses optics, high-voltage power supplies, and solenoids for fully autonomous microfluidic sample processing and CE analysis with laser-induced fluorescence (LIF) detection. Furthermore, the entire system can be sterilized and placed in a cleanroom environment for analyzing samples returned from extraterrestrial targets, if desired. This is an entirely new capability never demonstrated before. The ability to manipulate solid samples, coupled with lab-on-a-chip analysis technology, will enable ultraclean and ultrasensitive end-to-end analysis of samples that is orders of magnitude more sensitive than the ppb goal given in the Science Instruments.

CHIPS. Volume 29, Issue 2, April - June 2011

DTIC Science & Technology

2011-06-01

CHIPS www.chips.navy.mil Dedicated to Sharing Information - Technology - Experience In an orchestra, each musician produces exquisite music ... Development Command, talks about the capabilities of the Navy Center for Advanced Modeling and Simulation, its value to naval, joint and coalition...Strategic Communications The Seawater Antenna By Holly Quick Developing a New Model for Maritime Tactical Information Dominance By Capt. Danelle

Process development of beam-lead silicon-gate COS/MOS integrated circuits

NASA Technical Reports Server (NTRS)

Baptiste, B.; Boesenberg, W.

1974-01-01

Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.

Hollow Core Bragg Waveguide Design and Fabrication for Enhanced Raman Spectroscopy

NASA Astrophysics Data System (ADS)

Ramanan, Janahan

Raman spectroscopy is a widely used technique to unambiguously ascertain the chemical composition of a sample. The caveat with this technique is its extremely weak optical cross-section, making it difficult to measure Raman signal with standard optical setups. In this thesis, a novel hollow core Bragg Reflection Waveguide was designed to simultaneously increase the generation and collection of Raman scattered photons. A robust fabrication process of this waveguide was developed employing flip-chip bonding methods to securely seal the hollow core channel. The waveguide air-core propagation loss was experimentally measured to be 0.17 dB/cm, and the Raman sensitivity limit was measured to be 3 mmol/L for glycerol solution. The waveguide was also shown to enhance Raman modes of standard household aerosols that could not be seen with other devices.

3D Printing of Organs-On-Chips

PubMed Central

Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

2017-01-01

Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489

3D Printing of Organs-On-Chips.

PubMed

Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

2017-01-25

Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

VHDL Implementation of Sigma-Delta Analog To Digital Converter

NASA Astrophysics Data System (ADS)

Chavan, R. N.; Chougule, D. G.

2010-11-01

Sigma-Delta modulation techniques provide a range of opportunities in a signal processing system for both increasing performance and data path optimization along the silicon area axis in the design space. One of the most challenging tasks in Analog to Digital Converter (ADC) design is to adapt the circuitry to ever new CMOS process technology. For digital circuits the number of gates per square mm app. doubles per chip generation. Integration of analog parts in newer deep submicron technologies is much more tough and additionally complicated because the usable voltage ranges are decreasing with every new integration step. This paper shows an approach which only uses 2 resistors and 1 capacitor which are located outside a pure digital chip. So all integration advantages of pure digital chips are preserved, there is no design effort for a new chip generation and the ADC also can be used for FPGAs. Resolutions of up to 16 bit are achievable. Sample rates in the 1 MHz region are feasible so that the approach is also useful for ADCs for xDSL technologies.

Smart image sensors: an emerging key technology for advanced optical measurement and microsystems

NASA Astrophysics Data System (ADS)

Seitz, Peter

1996-08-01

Optical microsystems typically include photosensitive devices, analog preprocessing circuitry and digital signal processing electronics. The advances in semiconductor technology have made it possible today to integrate all photosensitive and electronical devices on one 'smart image sensor' or photo-ASIC (application-specific integrated circuits containing photosensitive elements). It is even possible to provide each 'smart pixel' with additional photoelectronic functionality, without compromising the fill factor substantially. This technological capability is the basis for advanced cameras and optical microsystems showing novel on-chip functionality: Single-chip cameras with on- chip analog-to-digital converters for less than $10 are advertised; image sensors have been developed including novel functionality such as real-time selectable pixel size and shape, the capability of performing arbitrary convolutions simultaneously with the exposure, as well as variable, programmable offset and sensitivity of the pixels leading to image sensors with a dynamic range exceeding 150 dB. Smart image sensors have been demonstrated offering synchronous detection and demodulation capabilities in each pixel (lock-in CCD), and conventional image sensors are combined with an on-chip digital processor for complete, single-chip image acquisition and processing systems. Technological problems of the monolithic integration of smart image sensors include offset non-uniformities, temperature variations of electronic properties, imperfect matching of circuit parameters, etc. These problems can often be overcome either by designing additional compensation circuitry or by providing digital correction routines. Where necessary for technological or economic reasons, smart image sensors can also be combined with or realized as hybrids, making use of commercially available electronic components. It is concluded that the possibilities offered by custom smart image sensors will influence the design and the performance of future electronic imaging systems in many disciplines, reaching from optical metrology to machine vision on the factory floor and in robotics applications.

Comparing the Effectiveness of Blended, Semi-Flipped, and Flipped Formats in an Engineering Numerical Methods Course

ERIC Educational Resources Information Center

Clark, Renee M.; Kaw, Autar; Besterfield-Sacre, Mary

2016-01-01

Blended, flipped, and semi-flipped instructional approaches were used in various sections of a numerical methods course for undergraduate mechanical engineers. During the spring of 2014, a blended approach was used; in the summer of 2014, a combination of blended and flipped instruction was used to deliver a semi-flipped course; and in the fall of…

Integrated sample-to-detection chip for nucleic acid test assays.

PubMed

Prakash, R; Pabbaraju, K; Wong, S; Tellier, R; Kaler, K V I S

2016-06-01

Nucleic acid based diagnostic techniques are routinely used for the detection of infectious agents. Most of these assays rely on nucleic acid extraction platforms for the extraction and purification of nucleic acids and a separate real-time PCR platform for quantitative nucleic acid amplification tests (NATs). Several microfluidic lab on chip (LOC) technologies have been developed, where mechanical and chemical methods are used for the extraction and purification of nucleic acids. Microfluidic technologies have also been effectively utilized for chip based real-time PCR assays. However, there are few examples of microfluidic systems which have successfully integrated these two key processes. In this study, we have implemented an electro-actuation based LOC micro-device that leverages multi-frequency actuation of samples and reagents droplets for chip based nucleic acid extraction and real-time, reverse transcription (RT) PCR (qRT-PCR) amplification from clinical samples. Our prototype micro-device combines chemical lysis with electric field assisted isolation of nucleic acid in a four channel parallel processing scheme. Furthermore, a four channel parallel qRT-PCR amplification and detection assay is integrated to deliver the sample-to-detection NAT chip. The NAT chip combines dielectrophoresis and electrostatic/electrowetting actuation methods with resistive micro-heaters and temperature sensors to perform chip based integrated NATs. The two chip modules have been validated using different panels of clinical samples and their performance compared with standard platforms. This study has established that our integrated NAT chip system has a sensitivity and specificity comparable to that of the standard platforms while providing up to 10 fold reduction in sample/reagent volumes.

Experiences with Lab-on-a-chip Technology in Support of NASA Supported Research

NASA Technical Reports Server (NTRS)

Monaco, Lisa

2003-01-01

Under the auspices of the Microgravity Sciences and Application Department at Marshall Space Flight Center, we have custom designed and fabricated a lab-on-a-chip (LOC) device, along with Caliper Technologies, for macromolecular crystal growth. The chip has been designed to deliver specified proportions of up-to five various constituents to one of two growth wells (on-chip) for crystal growth. To date, we have grown crystals of thaumatin, glucose isomerase and appoferitin on the chip. The LOC approach offered many advantages that rendered it highly suitable for space based hardware to perform crystal growth on the International Space Station. The same hardware that was utilized for the crystal growth investigations, has also been used by researchers at Glenn Research Center to investigate aspects of microfluidic phenomenon associated with two-phase flow. Additionally, our LOCAD (Lab-on-a-chip Application Development) team has lent its support to Johnson Space Center s Modular Assay for Solar System Exploration project. At present, the LOCAD team is working on the design and build of a unique lab-on-a-chip breadboard control unit whose function is not commercially available. The breadboard can be used as a test bed for the development of chip size labs for environmental monitoring, crew health monitoring assays, extended flight pharmacological preparations, and many more areas. This unique control unit will be configured for local use and/or remote operation, via the Internet, by other NASA centers. The lab-on-a-chip control unit is being developed with the primary goal of meeting Agency level strategic goals.

Fat fraction bias correction using T1 estimates and flip angle mapping.

PubMed

Yang, Issac Y; Cui, Yifan; Wiens, Curtis N; Wade, Trevor P; Friesen-Waldner, Lanette J; McKenzie, Charles A

2014-01-01

To develop a new method of reducing T1 bias in proton density fat fraction (PDFF) measured with iterative decomposition of water and fat with echo asymmetry and least-squares estimation (IDEAL). PDFF maps reconstructed from high flip angle IDEAL measurements were simulated and acquired from phantoms and volunteer L4 vertebrae. T1 bias was corrected using a priori T1 values for water and fat, both with and without flip angle correction. Signal-to-noise ratio (SNR) maps were used to measure precision of the reconstructed PDFF maps. PDFF measurements acquired using small flip angles were then compared to both sets of corrected large flip angle measurements for accuracy and precision. Simulations show similar results in PDFF error between small flip angle measurements and corrected large flip angle measurements as long as T1 estimates were within one standard deviation from the true value. Compared to low flip angle measurements, phantom and in vivo measurements demonstrate better precision and accuracy in PDFF measurements if images were acquired at a high flip angle, with T1 bias corrected using T1 estimates and flip angle mapping. T1 bias correction of large flip angle acquisitions using estimated T1 values with flip angle mapping yields fat fraction measurements of similar accuracy and superior precision compared to low flip angle acquisitions. Copyright © 2013 Wiley Periodicals, Inc.

FLICE-like inhibitory protein (FLIP) protects against apoptosis and suppresses NF-kappaB activation induced by bacterial lipopolysaccharide.

PubMed

Bannerman, Douglas D; Eiting, Kristine T; Winn, Robert K; Harlan, John M

2004-10-01

Bacterial lipopolysaccharide (LPS) via its activation of Toll-like receptor-4 contributes to much of the vascular injury/dysfunction associated with gram-negative sepsis. Inhibition of de novo gene expression has been shown to sensitize endothelial cells (EC) to LPS-induced apoptosis, the onset of which correlates with decreased expression of FLICE-like inhibitory protein (FLIP). We now have data that conclusively establish a role for FLIP in protecting EC against LPS-induced apoptosis. Overexpression of FLIP protected against LPS-induced apoptosis, whereas down-regulation of FLIP using antisense oligonucleotides sensitized EC to direct LPS killing. Interestingly, FLIP overexpression suppressed NF-kappaB activation induced by LPS, but not by phorbol ester, suggesting a specific role for FLIP in mediating LPS activation. Conversely, mouse embryo fibroblasts (MEF) obtained from FLIP -/- mice showed enhanced LPS-induced NF-kappaB activation relative to those obtained from wild-type mice. Reconstitution of FLIP-/- MEF with full-length FLIP reversed the enhanced NF-kappaB activity elicited by LPS in the FLIP -/- cells. Changes in the expression of FLIP had no demonstrable effect on other known LPS/Tlr-4-activated signaling pathways including the p38, Akt, and Jnk pathways. Together, these data support a dual role for FLIP in mediating LPS-induced apoptosis and NF-kappaB activation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Soer, Wouter

LED luminaires have seen dramatic changes in cost breakdown over the past few years. The LED component cost, which until recently was the dominant portion of luminaire cost, has fallen to a level of the same order as the other luminaire components, such as the driver, housing, optics etc. With the current state of the technology, further luminaire performance improvement and cost reduction is realized most effectively by optimization of the whole system, rather than a single component. This project focuses on improving the integration between LEDs and drivers. Lumileds has developed a light engine platform based on low-cost high-powermore » LEDs and driver topologies optimized for integration with these LEDs on a single substrate. The integration of driver and LEDs enables an estimated luminaire cost reduction of about 25% for targeted applications, mostly due to significant reductions in driver and housing cost. The high-power LEDs are based on Lumileds’ patterned sapphire substrate flip-chip (PSS-FC) technology, affording reduced die fabrication and packaging cost compared to existing technology. Two general versions of PSS-FC die were developed in order to create the desired voltage and flux increments for driver integration: (i) small single-junction die (0.5 mm 2), optimal for distributed lighting applications, and (ii) larger multi-junction die (2 mm 2 and 4 mm 2) for high-power directional applications. Two driver topologies were developed: a tapped linear driver topology and a single-stage switch-mode topology, taking advantage of the flexible voltage configurations of the new PSS-FC die and the simplification opportunities enabled by integration of LEDs and driver on the same board. A prototype light engine was developed for an outdoor “core module” application based on the multi-junction PSS-FC die and the single-stage switch-mode driver. The light engine meets the project efficacy target of 128 lm/W at a luminous flux greater than 4100 lm, a correlated color temperature (CCT) of 4000K and a color rendering index (CRI) greater than 70.« less

Microfluidic Organ/Body-on-a-Chip Devices at the Convergence of Biology and Microengineering.

PubMed

Perestrelo, Ana Rubina; Águas, Ana C P; Rainer, Alberto; Forte, Giancarlo

2015-12-10

Recent advances in biomedical technologies are mostly related to the convergence of biology with microengineering. For instance, microfluidic devices are now commonly found in most research centers, clinics and hospitals, contributing to more accurate studies and therapies as powerful tools for drug delivery, monitoring of specific analytes, and medical diagnostics. Most remarkably, integration of cellularized constructs within microengineered platforms has enabled the recapitulation of the physiological and pathological conditions of complex tissues and organs. The so-called "organ-on-a-chip" technology, which represents a new avenue in the field of advanced in vitro models, with the potential to revolutionize current approaches to drug screening and toxicology studies. This review aims to highlight recent advances of microfluidic-based devices towards a body-on-a-chip concept, exploring their technology and broad applications in the biomedical field.

Empowering Pre-Service Teachers to Produce Ubiquitous Flipped Classes

ERIC Educational Resources Information Center

García-Sánchez, Soraya; Santos-Espino, Jose Miguel

2017-01-01

This work focuses on technological and educational outcomes that resulted from the production of foreign language educational videos by 90 pre-service instructors enrolled in an official Master's Degree in Secondary Education programme. This teaching practice, conducted during two consecutive years, was set in a ubiquitous learning environment…

Language Pedagogy and Non-Transience in the Flipped Classroom

ERIC Educational Resources Information Center

Cunningham, Una

2016-01-01

High connectivity at tertiary institutions, and students who are often equipped with laptops and/or tablets as well as smartphones, have resulted in language learners being able to freely access technology and the internet. Reference tools such as dictionaries, concordancers, translators, and thesauri, with pronunciation and usage tips, are…

A Boundary Scan Test Vehicle for Direct Chip Attach Testing

NASA Technical Reports Server (NTRS)

Parsons, Heather A.; DAgostino, Saverio; Arakaki, Genji

2000-01-01

To facilitate the new faster, better and cheaper spacecraft designs, smaller more mass efficient avionics and instruments are using higher density electronic packaging technologies such as direct chip attach (DCA). For space flight applications, these technologies need to have demonstrated reliability and reasonably well defined fabrication and assembly processes before they will be accepted as baseline designs in new missions. As electronics shrink in size, not only can repair be more difficult, but 49 probing" circuitry can be very risky and it becomes increasingly more difficult to identify the specific source of a problem. To test and monitor these new technologies, the Direct Chip Attach Task, under NASA's Electronic Parts and Packaging Program (NEPP), chose the test methodology of boundary scan testing. The boundary scan methodology was developed for interconnect integrity and functional testing at hard to access electrical nodes. With boundary scan testing, active devices are used and failures can be identified to the specific device and lead. This technology permits the incorporation of "built in test" into almost any circuit and thus gives detailed test access to the highly integrated electronic assemblies. This presentation will describe boundary scan, discuss the development of the boundary scan test vehicle for DCA and current plans for testing of direct chip attach configurations.

A Review of the Application of Body-on-a-Chip for Drug Test and Its Latest Trend of Incorporating Barrier Tissue.

PubMed

Jin, Haoyi; Yu, Yanqiu

2016-10-01

High-quality preclinical bioassay models are essential for drug research and development. We reviewed the emerging body-on-a-chip technology, which serves as a promising model to overcome the limitations of traditional bioassay models, and introduced existing models of body-on-a-chip, their constitutional details, application for drug testing, and individual features of these models. We put special emphasis on the latest trend in this field of incorporating barrier tissue into body-on-a-chip and discussed several remaining challenges of current body-on-a-chip. © 2015 Society for Laboratory Automation and Screening.

Siemens, Philips megaproject to yield superchip in 5 years

NASA Astrophysics Data System (ADS)

1985-02-01

The development of computer chips using complementary metal oxide semiconductor (CMOS) memory technology is described. The management planning and marketing strategy of the Philips and Siemens corporations with regard to the memory chip are discussed.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

PubMed

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

Highly specific detection of genetic modification events using an enzyme-linked probe hybridization chip.

PubMed

Zhang, M Z; Zhang, X F; Chen, X M; Chen, X; Wu, S; Xu, L L

2015-08-10

The enzyme-linked probe hybridization chip utilizes a method based on ligase-hybridizing probe chip technology, with the principle of using thio-primers for protection against enzyme digestion, and using lambda DNA exonuclease to cut multiple PCR products obtained from the sample being tested into single-strand chains for hybridization. The 5'-end amino-labeled probe was fixed onto the aldehyde chip, and hybridized with the single-stranded PCR product, followed by addition of a fluorescent-modified probe that was then enzymatically linked with the adjacent, substrate-bound probe in order to achieve highly specific, parallel, and high-throughput detection. Specificity and sensitivity testing demonstrated that enzyme-linked probe hybridization technology could be applied to the specific detection of eight genetic modification events at the same time, with a sensitivity reaching 0.1% and the achievement of accurate, efficient, and stable results.

Nanotechnology and chip level systems for pressure driven liquid chromatography and emerging analytical separation techniques: a review.

PubMed

Lavrik, N V; Taylor, L T; Sepaniak, M J

2011-05-23

Pressure driven liquid chromatography (LC) is a powerful and versatile separation technique particularly suitable for differentiating species present in extremely small quantities. This paper briefly reviews main historical trends and focuses on more recently developed technological approaches in miniaturization and on-chip integration of LC columns. The review emphasizes enabling technologies as well as main technological challenges specific to pressure driven separations and highlights emerging concepts that could ultimately overcome fundamental limitations of conventional LC columns. Copyright © 2011 Elsevier B.V. All rights reserved.

Microfluidics and photonics for Bio-System-on-a-Chip: a review of advancements in technology towards a microfluidic flow cytometry chip.

PubMed

Godin, Jessica; Chen, Chun-Hao; Cho, Sung Hwan; Qiao, Wen; Tsai, Frank; Lo, Yu-Hwa

2008-10-01

Microfluidics and photonics come together to form a field commonly referred to as 'optofluidics'. Flow cytometry provides the field with a technology base from which both microfluidic and photonic components be developed and integrated into a useful device. This article reviews some of the more recent developments to familiarize a reader with the current state of the technologies and also highlights the requirements of the device and how researchers are working to meet these needs.

Flipping Math in a Secondary Classroom

ERIC Educational Resources Information Center

Graziano, Kevin J.; Hall, John D.

2017-01-01

Research on flipped instruction with K-12 English Language Learners (ELLs) is limited. The purpose of this study was to examine the academic performance of ELLs who received flipped instruction in an algebra course at a newcomer high school, and to investigate ELLs' perceptions of flipped learning. Results indicate flipped instruction engaged…

Flipped Classroom Experiences: Student Preferences and Flip Strategy in a Higher Education Context

ERIC Educational Resources Information Center

McNally, Brenton; Chipperfield, Janine; Dorsett, Pat; Del Fabbro, Letitia; Frommolt, Valda; Goetz, Sandra; Lewohl, Joanne; Molineux, Matthew; Pearson, Andrew; Reddan, Gregory; Roiko, Anne; Rung, Andrea

2017-01-01

Despite the popularity of the flipped classroom, its effectiveness in achieving greater engagement and learning outcomes is currently lacking substantial empirical evidence. This study surveyed 563 undergraduate and postgraduate students (61% female) participating in flipped teaching environments and ten convenors of the flipped courses in which…

FLIP the Switch: Regulation of Apoptosis and Necroptosis by cFLIP

PubMed Central

Tsuchiya, Yuichi; Nakabayashi, Osamu; Nakano, Hiroyasu

2015-01-01

cFLIP (cellular FLICE-like inhibitory protein) is structurally related to caspase-8 but lacks proteolytic activity due to multiple amino acid substitutions of catalytically important residues. cFLIP protein is evolutionarily conserved and expressed as three functionally different isoforms in humans (cFLIPL, cFLIPS, and cFLIPR). cFLIP controls not only the classical death receptor-mediated extrinsic apoptosis pathway, but also the non-conventional pattern recognition receptor-dependent apoptotic pathway. In addition, cFLIP regulates the formation of the death receptor-independent apoptotic platform named the ripoptosome. Moreover, recent studies have revealed that cFLIP is also involved in a non-apoptotic cell death pathway known as programmed necrosis or necroptosis. These functions of cFLIP are strictly controlled in an isoform-, concentration- and tissue-specific manner, and the ubiquitin-proteasome system plays an important role in regulating the stability of cFLIP. In this review, we summarize the current scientific findings from biochemical analyses, cell biological studies, mathematical modeling, and gene-manipulated mice models to illustrate the critical role of cFLIP as a switch to determine the destiny of cells among survival, apoptosis, and necroptosis. PMID:26694384

Lab-on-a-chip in vitro compartmentalization technologies for protein studies.

PubMed

Zhu, Yonggang; Power, Barbara E

2008-01-01

In vitro compartmentalization (IVC) is a powerful tool for studying protein-protein reactions, due to its high capacity and the versatility of droplet technologies. IVC bridges the gap between chemistry and biology as it enables the incorporation of unnatural amino acids with modifications into biological systems, through protein transcription and translation reactions, in a cell-like microdrop environment. The quest for the ultimate chip for protein studies using IVC is the drive for the development of various microfluidic droplet technologies to enable these unusual biochemical reactions to occur. These techniques have been shown to generate precise microdrops with a controlled size. Various chemical and physical phenomena have been utilized for on-chip manipulation to allow the droplets to be generated, fused, and split. Coupled with detection techniques, droplets can be sorted and selected. These capabilities allow directed protein evolution to be carried out on a microchip. With further technological development of the detection module, factors such as addressable storage, transport and interfacing technologies, could be integrated and thus provide platforms for protein studies with high efficiency and accuracy that conventional laboratories cannot achieve.

Microfluidic Devices for Forensic DNA Analysis: A Review.

PubMed

Bruijns, Brigitte; van Asten, Arian; Tiggelaar, Roald; Gardeniers, Han

2016-08-05

Microfluidic devices may offer various advantages for forensic DNA analysis, such as reduced risk of contamination, shorter analysis time and direct application at the crime scene. Microfluidic chip technology has already proven to be functional and effective within medical applications, such as for point-of-care use. In the forensic field, one may expect microfluidic technology to become particularly relevant for the analysis of biological traces containing human DNA. This would require a number of consecutive steps, including sample work up, DNA amplification and detection, as well as secure storage of the sample. This article provides an extensive overview of microfluidic devices for cell lysis, DNA extraction and purification, DNA amplification and detection and analysis techniques for DNA. Topics to be discussed are polymerase chain reaction (PCR) on-chip, digital PCR (dPCR), isothermal amplification on-chip, chip materials, integrated devices and commercially available techniques. A critical overview of the opportunities and challenges of the use of chips is discussed, and developments made in forensic DNA analysis over the past 10-20 years with microfluidic systems are described. Areas in which further research is needed are indicated in a future outlook.

Automated, Miniaturized and Integrated Quality Control-on-Chip (QC-on-a-Chip) for Advanced Cell Therapy Applications

NASA Astrophysics Data System (ADS)

Wartmann, David; Rothbauer, Mario; Kuten, Olga; Barresi, Caterina; Visus, Carmen; Felzmann, Thomas; Ertl, Peter

2015-09-01

The combination of microfabrication-based technologies with cell biology has laid the foundation for the development of advanced in vitro diagnostic systems capable of evaluating cell cultures under defined, reproducible and standardizable measurement conditions. In the present review we describe recent lab-on-a-chip developments for cell analysis and how these methodologies could improve standard quality control in the field of manufacturing cell-based vaccines for clinical purposes. We highlight in particular the regulatory requirements for advanced cell therapy applications using as an example dendritic cell-based cancer vaccines to describe the tangible advantages of microfluidic devices that overcome most of the challenges associated with automation, miniaturization and integration of cell-based assays. As its main advantage lab-on-a-chip technology allows for precise regulation of culturing conditions, while simultaneously monitoring cell relevant parameters using embedded sensory systems. State-of-the-art lab-on-a-chip platforms for in vitro assessment of cell cultures and their potential future applications for cell therapies and cancer immunotherapy are discussed in the present review.

Technology and parental responsibility: the case of the V-chip.

PubMed

Fahlquist, J Nihlén; van de Poel, I

2012-06-01

In this paper, the so-called V-chip is analysed from the perspective of responsibility. The V-chip is a technological tool used by parents, on a voluntary basis, to prevent children from watching violent television content. Since 1997 in the United States, the V-chip is installed in all new televisions sets of 12″ and larger. We are interested in the question whether and how the introduction of the V-chip affects who is to be considered responsible for children. In the debate, it has been argued that the V-chip reduces parents' responsibility for children, but it has also been argued that it gives parents a tool to exercise their responsibility. It may appear as though all debaters are discussing the same thing and merely have different opinions. However, we argue that there are at least three notions of responsibility underlying these claims and that these should be kept separate. First, arguments on responsibility may refer to responsibility as task distribution. Second, they can refer to responsibility as control. Finally, a thicker concept of parental responsibility understood as a virtue may be referred to. It becomes clear that whereas task distribution changes to some extent and the possibilities for control are increased, only certain parts of parental responsibility as a virtue are affected. The finding that there appear to be different notions of responsibility involved in a debate that prima facie is about one issue, indicates that discussions on other technologies and how they affect responsibility may suffer from the same conceptual lack of clarity.

Multifunctional System-on-Glass for Lab-on-Chip applications.

PubMed

Petrucci, G; Caputo, D; Lovecchio, N; Costantini, F; Legnini, I; Bozzoni, I; Nascetti, A; de Cesare, G

2017-07-15

Lab-on-Chip are miniaturized systems able to perform biomolecular analysis in shorter time and with lower reagent consumption than a standard laboratory. Their miniaturization interferes with the multiple functions that the biochemical procedures require. In order to address this issue, our paper presents, for the first time, the integration on a single glass substrate of different thin film technologies in order to develop a multifunctional platform suitable for on-chip thermal treatments and on-chip detection of biomolecules. The proposed System on-Glass hosts thin metal films acting as heating sources; hydrogenated amorphous silicon diodes acting both as temperature sensors to monitor the temperature distribution and photosensors for the on-chip detection and a ground plane ensuring that the heater operation does not affect the photodiode currents. The sequence of the technological steps, the deposition temperatures of the thin films and the parameters of the photolithographic processes have been optimized in order to overcome all the issues of the technological integration. The device has been designed, fabricated and tested for the implementation of DNA amplification through the Polymerase Chain Reaction (PCR) with thermal cycling among three different temperatures on a single site. The glass has been connected to an electronic system that drives the heaters and controls the temperature and light sensors. It has been optically and thermally coupled with another glass hosting a microfluidic network made in polydimethylsiloxane that includes thermally actuated microvalves and a PCR process chamber. The successful DNA amplification has been verified off-chip by using a standard fluorometer. Copyright © 2016 Elsevier B.V. All rights reserved.

Lab-on-a-chip technologies for proteomic analysis from isolated cells.

PubMed

Sedgwick, H; Caron, F; Monaghan, P B; Kolch, W; Cooper, J M

2008-10-06

Lab-on-a-chip systems offer a versatile environment in which low numbers of cells and molecules can be manipulated, captured, detected and analysed. We describe here a microfluidic device that allows the isolation, electroporation and lysis of single cells. A431 human epithelial carcinoma cells, expressing a green fluorescent protein-labelled actin, were trapped by dielectrophoresis within an integrated lab-on-a-chip device containing saw-tooth microelectrodes. Using these same trapping electrodes, on-chip electroporation was performed, resulting in cell lysis. Protein release was monitored by confocal fluorescence microscopy.

Flipped Learning in the Workplace

ERIC Educational Resources Information Center

Nederveld, Allison; Berge, Zane L.

2015-01-01

Purpose: The purpose of this paper is to serve as a summary of resources on flipped learning for workplace learning professionals. A recent buzzword in the training world is "flipped". Flipped learning and the flipped classroom are hot topics that have emerged in K-12 education, made their way to the university and are now being noticed…

How to Flip the Classroom--"Productive Failure or Traditional Flipped Classroom" Pedagogical Design?

ERIC Educational Resources Information Center

Song, Yanjie; Kapur, Manu

2017-01-01

The paper reports a quasi-experimental study comparing the "traditional flipped classroom" pedagogical design with the "productive failure" (Kapur, 2016) pedagogical design in the flipped classroom for a 2-week curricular unit on polynomials in a Hong Kong Secondary school. Different from the flipped classroom where students…

How Flipping Much? Consecutive Flipped Mathematics Courses and Their Influence on Students' Anxieties and Perceptions of Learning

ERIC Educational Resources Information Center

Dove, Anthony; Dove, Emily

2017-01-01

While studies have shown positive attributes related to flipped learning, especially in mathematics and statistics, there is limited understanding of how taking multiple flipped courses may impact students' learning of mathematics and their perceptions of mathematics. Specifically, this study examined how completing consecutive flipped mathematics…

Progress and opportunities in high-voltage microactuator powering technology towards one-chip MEMS

NASA Astrophysics Data System (ADS)

Mita, Yoshio; Hirakawa, Atsushi; Stefanelli, Bruno; Mori, Isao; Okamoto, Yuki; Morishita, Satoshi; Kubota, Masanori; Lebrasseur, Eric; Kaiser, Andreas

2018-04-01

In this paper, we address issues and solutions for micro-electro-mechanical-systems (MEMS) powering through semiconductor devices towards one-chip MEMS, especially those with microactuators that require high voltage (HV, which is more than 10 V, and is often over 100 V) for operation. We experimentally and theoretically demonstrated that the main reason why MEMS actuators need such HV is the tradeoff between resonant frequency and displacement amplitude. Indeed, the product of frequency and displacement is constant regardless of the MEMS design, but proportional to the input energy, which is the square of applied voltage in an electrostatic actuator. A comprehensive study on the principles of HV device technology and associated circuit technologies, especially voltage shifter circuits, was conducted. From the viewpoint of on-chip energy source, series-connected HV photovoltaic cells have been discussed. Isolation and electrical connection methods were identified to be key enabling technologies. Towards future rapid development of such autonomous devices, a technology to convert standard 5 V CMOS devices into HV circuits using SOI substrate and a MEMS postprocess is presented. HV breakdown experiments demonstrated this technology can hold over 700 to 1000 V, depending on the layout.

Patterning roadmap: 2017 prospects

NASA Astrophysics Data System (ADS)

Neisser, Mark

2017-06-01

Road mapping of semiconductor chips has been underway for over 20 years, first with the International Technology Roadmap for Semiconductors (ITRS) roadmap and now with the International Roadmap for Devices and Systems (IRDS) roadmap. The original roadmap was mostly driven bottom up and was developed to ensure that the large numbers of semiconductor producers and suppliers had good information to base their research and development on. The current roadmap is generated more top-down, where the customers of semiconductor chips anticipate what will be needed in the future and the roadmap projects what will be needed to fulfill that demand. The More Moore section of the roadmap projects that advanced logic will drive higher-resolution patterning, rather than memory chips. Potential solutions for patterning future logic nodes can be derived as extensions of `next-generation' patterning technologies currently under development. Advanced patterning has made great progress, and two `next-generation' patterning technologies, EUV and nanoimprint lithography, have potential to be in production as early as 2018. The potential adoption of two different next-generation patterning technologies suggests that patterning technology is becoming more specialized. This is good for the industry in that it lowers overall costs, but may lead to slower progress in extending any one patterning technology in the future.

Delivering a medical school elective with massive open online course (MOOC) technology

PubMed Central

2016-01-01

Introduction: The educational technology of massive open online courses (MOOCs) has been successfully applied in a wide variety of disciplines and are an intense focus of educational research at this time. Educators are now looking to MOOC technology as a means to improve professional medical education, but very little is known about how medical MOOCs compare with traditional content delivery. Methods: A retrospective analysis of the course evaluations for the Medicine as a Business elective by fourth-year medical students at Southern Illinois University School of Medicine (SIU-SOM) for the 2012–2015 academic years was conducted. This course was delivered by small group flipped classroom discussions for 2012–2014 and delivered via MOOC technology in 2015. Learner ratings were compared between the two course delivery methods using routinely collected course evaluations. Results: Course enrollment has ranged from 6–19 students per year in the 2012–2015 academic years. Student evaluations of the course are favorable in the areas of effective teaching, accurate course objectives, meeting personal learning objectives, recommending the course to other students, and overall when rated on a 5-point Likert scale. The majority of all student ratings (76–95%) of this elective course are for the highest possible choice (Strongly agree or Excellent) for any criteria, regardless if the course was delivered via a traditional or MOOC format. Statistical analysis of these ratings suggests that the Effective Teacher and Overall Evaluations did not statistically differ between the two delivery formats. Discussion: Student ratings of this elective course were highly similar when delivered in a flipped classroom format or by using MOOC technology. The primary advantage of this new course format is flexibility of time and place for learners, allowing them to complete the course objectives when convenient for them. The course evaluations suggest this is a change that is acceptable to the target audience. Conclusions: This study suggests that learner evaluations of a fourth-year medical school elective course do not significantly differ when delivered by flipped classroom group discussions or via MOOC technology in a very small single center observational study. Further investigation is required to determine if this delivery method is an acceptable and effective means of teaching in the medical school environment. PMID:27602301

Delivering a medical school elective with massive open online course (MOOC) technology.

PubMed

Robinson, Robert

2016-01-01

The educational technology of massive open online courses (MOOCs) has been successfully applied in a wide variety of disciplines and are an intense focus of educational research at this time. Educators are now looking to MOOC technology as a means to improve professional medical education, but very little is known about how medical MOOCs compare with traditional content delivery. A retrospective analysis of the course evaluations for the Medicine as a Business elective by fourth-year medical students at Southern Illinois University School of Medicine (SIU-SOM) for the 2012-2015 academic years was conducted. This course was delivered by small group flipped classroom discussions for 2012-2014 and delivered via MOOC technology in 2015. Learner ratings were compared between the two course delivery methods using routinely collected course evaluations. Course enrollment has ranged from 6-19 students per year in the 2012-2015 academic years. Student evaluations of the course are favorable in the areas of effective teaching, accurate course objectives, meeting personal learning objectives, recommending the course to other students, and overall when rated on a 5-point Likert scale. The majority of all student ratings (76-95%) of this elective course are for the highest possible choice (Strongly agree or Excellent) for any criteria, regardless if the course was delivered via a traditional or MOOC format. Statistical analysis of these ratings suggests that the Effective Teacher and Overall Evaluations did not statistically differ between the two delivery formats. Student ratings of this elective course were highly similar when delivered in a flipped classroom format or by using MOOC technology. The primary advantage of this new course format is flexibility of time and place for learners, allowing them to complete the course objectives when convenient for them. The course evaluations suggest this is a change that is acceptable to the target audience. This study suggests that learner evaluations of a fourth-year medical school elective course do not significantly differ when delivered by flipped classroom group discussions or via MOOC technology in a very small single center observational study. Further investigation is required to determine if this delivery method is an acceptable and effective means of teaching in the medical school environment.

Programmable lab-on-a-chip system for single cell analysis

NASA Astrophysics Data System (ADS)

Thalhammer, S.

2009-05-01

The collection, selection, amplification and detection of minimum genetic samples became a part of everyday life in medical and biological laboratories, to analyze DNA-fragments of pathogens, patient samples and traces on crime scenes. About a decade ago, a handful of researchers began discussing an intriguing idea. Could the equipment needed for everyday chemistry and biology procedures be shrunk to fit on a chip in the size of a fingernail? Miniature devices for, say, analysing DNA and proteins should be faster and cheaper than conventional versions. Lab-on-a-chip is an advanced technology that integrates a microfluidic system on a microscale chip device. The "laboratory" is created by means of channels, mixers, reservoirs, diffusion chambers, integrated electrodes, pumps, valves and more. With lab-ona- chip technology, complete laboratories on a square centimetre can be created. Here, a multifunctional programmable Lab-on-a-Chip driven by nanofluidics and controlled by surface acoustic waves (SAW) is presented. This system combines serial DNA-isolation-, amplification- and array-detection-process on a modified glass-platform. The fluid actuation is controlled via SAW by interdigital transducers implemented in the chemical modified chip surface. The chemical surface modification allows fluid handling in the sub-microliter range. Minute amount of sample material is extracted by laser-based microdissection out of e.g. histological sections at the single cell level. A few picogram of genetic material are isolated and transferred via a low-pressure transfer system (SPATS) onto the chip. Subsequently the genetic material inside single droplets, which behave like "virtual" beaker, is transported to the reaction and analysis centers on the chip surface via surface acoustic waves, mainly known as noise dumping filters in mobile phones. At these "biological reactors" the genetic material is processed, e.g. amplified via polymerase chain reaction methods, and genetically characterized.

Manufacturability of the X Architecture at the 90-nm technology node

NASA Astrophysics Data System (ADS)

Smayling, Michael C.; Sarma, Robin C.; Nagata, Toshiyuki; Arora, Narain; Duane, Michael P.; Oemardani, Shiany; Shah, Santosh

2004-05-01

In this paper, we discuss the results from a test chip that demonstrate the manufacturability and integration-worthiness of the X Architecture at the 90-nm technology node. We discuss how a collaborative effort between the design and chip making communities used the current generation of mask, lithography, wafer processing, inspection and metrology equipment to create 45 degree wires in typical metal pitches for the upper layers on a 90-nm device in a production environment. Cadence Design Systems created the test structure design and chip validation tools for the project. Canon"s KrF ES3 and ArF AS2 scanners were used for the lithography. Applied Materials used its interconnect fabrication technologies to produce the multilayer copper, low-k interconnect on 300-mm wafers. The results were confirmed for critical dimension and defect levels using Applied Materials" wafer inspection and metrology systems.

A 30 GHz monolithic receive module technology assessment

NASA Technical Reports Server (NTRS)

Geddes, J.; Sokolov, V.; Bauhahn, P.; Contolatis, T.

1988-01-01

This report is a technology assessment relevant to the 30 GHz Monolithic Receive Module development. It is based on results obtained on the present NASA Contract (NAS3-23356) as well as on information gathered from literature and other industry sources. To date the on-going Honeywell program has concentrated on demonstrating the so-called interconnected receive module which consists of four monolithic chips - the low noise front-end amplifier (LNA), the five bit phase shifter (PS), the gain control amplifier (GC), and the RF to IF downconverter (RF/IF). Results on all four individual chips have been obtained and interconnection of the first three functions has been accomplished. Future work on this contract is aimed at a higher level of integration, i.e., integration of the first three functions (LNA + PS + GC) on a single GaAs chip. The report presents the status of this technology and projections of its future directions.

Prototyping the HPDP Chip on STM 65 NM Process

NASA Astrophysics Data System (ADS)

Papadas, C.; Dramitinos, G.; Syed, M.; Helfers, T.; Dedes, G.; Schoellkopf, J.-P.; Dugoujon, L.

2011-08-01

Currently Astrium GmbH is involved in the of the High Performance Data Processor (HPDP) development programme for telecommunication applications under a DLR contract. The HPDP project targets the implementation of the commercially available reconfigurable array processor IP (XPP from the company PACT XPP Technologies) in a radiation hardened technology.In the current complementary development phase funded under the Greek Industry Incentive scheme, it is planned to prototype the HPDP chip in commercial STM 65 nm technology. In addition it is also planned to utilise the preliminary radiation hardened components of this library wherever possible.This abstract gives an overview of the HPDP chip architecture, the basic details of the STM 65 nm process and the design flow foreseen for the prototyping. The paper will discuss the development and integration issues involved in using the STM 65 nm process (also including the available preliminary radiation hardened components) for designs targeted to be used in space applications.

Flipping the Graduate Qualitative Research Methods Classroom: Did It Lead to Flipped Learning?

ERIC Educational Resources Information Center

Earley, Mark

2016-01-01

The flipped, or inverted, classroom has gained popularity in a variety of fields and at a variety of educational levels, from K-12 through higher education. This paper describes the author's positive experience flipping a graduate qualitative research methods classroom. After a review of the current literature on flipped classrooms in higher…

Re-Envisioning the Archaic Higher Education Learning Environment: Implementation Processes for Flipped Classrooms

ERIC Educational Resources Information Center

Rabidoux, Salena; Rottmann, Amy

2018-01-01

Flipped classrooms are often utilized in PK-12 classrooms; however, there is also a growing trend of flipped classrooms in higher education. This paper presents the benefits and limitations of implementing flipped classrooms in higher education as well as resources for integrating a flipped classroom design to instruction. The various technology…

Flip-J: Development of the System for Flipped Jigsaw Supported Language Learning

ERIC Educational Resources Information Center

Yamada, Masanori; Goda, Yoshiko; Hata, Kojiro; Matsukawa, Hideya; Yasunami, Seisuke

2016-01-01

This study aims to develop and evaluate a language learning system supported by the "flipped jigsaw" technique, called "Flip-J". This system mainly consists of three functions: (1) the creation of a learning material database, (2) allocation of learning materials, and (3) formation of an expert and jigsaw group. Flip-J was…

Latest generation of ASICs for photodetector readout

NASA Astrophysics Data System (ADS)

Seguin-Moreau, N.

2013-08-01

The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the "ROC" family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the "ROC" chips.

On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

PubMed

Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

2017-08-30

Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

Cambridge Healthtech Institute's Third Annual Conference on Lab-on-a-Chip and Microarrays. 22-24 January 2001, Zurich, Switzerland.

PubMed

Jain, K K

2001-02-01

Cambridge Healthtech Institute's Third Annual Conference on Lab-on-a-Chip and Microarray technology covered the latest advances in this technology and applications in life sciences. Highlights of the meetings are reported briefly with emphasis on applications in genomics, drug discovery and molecular diagnostics. There was an emphasis on microfluidics because of the wide applications in laboratory and drug discovery. The lab-on-a-chip provides the facilities of a complete laboratory in a hand-held miniature device. Several microarray systems have been used for hybridisation and detection techniques. Oligonucleotide scanning arrays provide a versatile tool for the analysis of nucleic acid interactions and provide a platform for improving the array-based methods for investigation of antisense therapeutics. A method for analysing combinatorial DNA arrays using oligonucleotide-modified gold nanoparticle probes and a conventional scanner has considerable potential in molecular diagnostics. Various applications of microarray technology for high-throughput screening in drug discovery and single nucleotide polymorphisms (SNP) analysis were discussed. Protein chips have important applications in proteomics. With the considerable amount of data generated by the different technologies using microarrays, it is obvious that the reading of the information and its interpretation and management through the use of bioinformatics is essential. Various techniques for data analysis were presented. Biochip and microarray technology has an essential role to play in the evolving trends in healthcare, which integrate diagnosis with prevention/treatment and emphasise personalised medicines.

Low-complexity peak-to-average power ratio reduction scheme for flip-orthogonal frequency division multiplexing visible light communication system based on μ-law mapping

NASA Astrophysics Data System (ADS)

Wang, Jianping; Zhang, Peiran; Lu, Huimin; Feng, LiFang

2017-06-01

An orthogonal frequency division multiplexing (OFDM) technique called flipped OFDM (flip-OFDM) is apposite for a visible light communication system that needs the transmitted signal to be real and positive. Flip-OFDM uses two consecutive OFDM subframes to transmit the positive and negative parts of the signal. However, peak-to-average power ratio (PAPR) for flip-OFDM is increased tremendously due to the low value of total average power that arises from many zero values in both the positive and flipped frames. We first analyze the performance of flip-OFDM and perform a comparison with the conventional DC-biased OFDM (DCO-OFDM); then we propose a flip-OFDM scheme combined with μ-law mapping to reduce the high PAPR. The simulation results show that the PAPR of the system is reduced about 17.2 and 5.9 dB when compared with the normal flip-OFDM and DCO-OFDM signals, respectively.

Poisson property of the occurrence of flip-flops in a model membrane.

PubMed

Arai, Noriyoshi; Akimoto, Takuma; Yamamoto, Eiji; Yasui, Masato; Yasuoka, Kenji

2014-02-14

How do lipid molecules in membranes perform a flip-flop? The flip-flops of lipid molecules play a crucial role in the formation and flexibility of membranes. However, little has been determined about the behavior of flip-flops, either experimentally, or in molecular dynamics simulations. Here, we provide numerical results of the flip-flops of model lipid molecules in a model membrane and investigate the statistical properties, using millisecond-order coarse-grained molecular simulations (dissipative particle dynamics). We find that there are three different ways of flip-flops, which can be clearly characterized by their paths on the free energy surface. Furthermore, we found that the probability of the number of the flip-flops is well fitted by the Poisson distribution, and the probability density function for the inter-occurrence times of flip-flops coincides with that of the forward recurrence times. These results indicate that the occurrence of flip-flops is a Poisson process, which will play an important role in the flexibilities of membranes.

Stem cell culture and differentiation in microfluidic devices toward organ-on-a-chip.

PubMed

Zhang, Jie; Wei, Xiaofeng; Zeng, Rui; Xu, Feng; Li, XiuJun

2017-06-01

Microfluidic lab-on-a-chip provides a new platform with unique advantages to mimic complex physiological microenvironments in vivo and has been increasingly exploited to stem cell research. In this review, we highlight recent advances of microfluidic devices for stem cell culture and differentiation toward the development of organ-on-a-chip, especially with an emphasis on vital innovations within the last 2 years. Various aspects for improving on-chip stem-cell culture and differentiation, particularly toward organ-on-a-chip, are discussed, along with microenvironment control, surface modification, extracellular scaffolds, high throughput and stimuli. The combination of microfluidic technologies and stem cells hold great potential toward versatile systems of 'organ-on-a-chip' as desired. Adapted with permission from [1-8].

System on a Chip (SoC) Overview

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.

2010-01-01

System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

Analysis of the resistive network in a bio-inspired CMOS vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Sung, Dong-Kyu; Hyun, Hyo-Young; Shin, Jang-Kyoo

2007-12-01

CMOS vision chips for edge detection based on a resistive circuit have recently been developed. These chips help develop neuromorphic systems with a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends dominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the MOSFET for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160×120 CMOS vision chips have been fabricated by using a standard CMOS technology. The experimental results have been nicely matched with our prediction.

Cascaded VLSI Chips Help Neural Network To Learn

NASA Technical Reports Server (NTRS)

Duong, Tuan A.; Daud, Taher; Thakoor, Anilkumar P.

1993-01-01

Cascading provides 12-bit resolution needed for learning. Using conventional silicon chip fabrication technology of VLSI, fully connected architecture consisting of 32 wide-range, variable gain, sigmoidal neurons along one diagonal and 7-bit resolution, electrically programmable, synaptic 32 x 31 weight matrix implemented on neuron-synapse chip. To increase weight nominally from 7 to 13 bits, synapses on chip individually cascaded with respective synapses on another 32 x 32 matrix chip with 7-bit resolution synapses only (without neurons). Cascade correlation algorithm varies number of layers effectively connected into network; adds hidden layers one at a time during learning process in such way as to optimize overall number of neurons and complexity and configuration of network.

Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs †.

PubMed

Nose, Atsushi; Yamazaki, Tomohiro; Katayama, Hironobu; Uehara, Shuji; Kobayashi, Masatsugu; Shida, Sayaka; Odahara, Masaki; Takamiya, Kenichi; Matsumoto, Shizunori; Miyashita, Leo; Watanabe, Yoshihiro; Izawa, Takashi; Muramatsu, Yoshinori; Nitta, Yoshikazu; Ishikawa, Masatoshi

2018-04-24

We have developed a high-speed vision chip using 3D stacking technology to address the increasing demand for high-speed vision chips in diverse applications. The chip comprises a 1/3.2-inch, 1.27 Mpixel, 500 fps (0.31 Mpixel, 1000 fps, 2 × 2 binning) vision chip with 3D-stacked column-parallel Analog-to-Digital Converters (ADCs) and 140 Giga Operation per Second (GOPS) programmable Single Instruction Multiple Data (SIMD) column-parallel PEs for new sensing applications. The 3D-stacked structure and column parallel processing architecture achieve high sensitivity, high resolution, and high-accuracy object positioning.

Characterisation of Redlen high-flux CdZnTe

NASA Astrophysics Data System (ADS)

Thomas, B.; Veale, M. C.; Wilson, M. D.; Seller, P.; Schneider, A.; Iniewski, K.

2017-12-01

CdZnTe is a promising material for the current generation of free electron laser light sources and future laser-driven γ-ray sources which require detectors capable of high flux imaging at X-ray and γ-ray energies (> 10 keV) . However, at high fluxes CdZnTe has been shown to polarise due to hole trapping, leading to poor performance. Novel Redlen CdZnTe material with improved hole transport properties has been designed for high flux applications. Small pixel CdZnTe detectors were fabricated by Redlen Technologies and flip-chip bonded to PIXIE ASICs. An XIA Digital Gamma Finder PIXIE-16 system was used to digitise each of the nine analogue signals with a timing resolution of 10 ns. Pulse shape analysis was used to extract the rise times and amplitude of signals. These were measured as a function of applied bias voltage and used to calculate the mobility (μ) and mobility-lifetime (μτ) of electrons and holes in the material for three identical detectors. The measured values of the transport properties of electrons in the high-flux-capable material was lower than previously reported for Redlen CdZnTe material (μeτe ~ 1 × 10-3 cm2V-1 and μe ~ 1000 cm2V-1s-1) while the hole transport properties were found to have improved (μhτh ~ 3 × 10-4 cm2V-1 and μh ~ 100 cm2V-1s-1).

The Flipped Classroom: An active teaching and learning strategy for making the sessions more interactive and challenging.

PubMed

Sultan, Amber Shamim

2018-04-01

Flipping the classroom is a pedagogical model that employs easy to use, readily accessible technology based resources such as video lectures, reading handouts, and practice problems outside the classroom, whereas interactive group-based, problem-solving activities conducted in the classroom. This strategy permits for an extended range of learning activities during the session. Using class time for active learning provides greater opportunity for mentoring and peer to peer collaboration. Instead of spending too much time on delivering lectures, class time can best be utilized by interacting with students, discussing their concerns related to the particular topic to be taught, providing real life examples relevant to the course content, challenging students to think in a broader aspect about complex process and encouraging different team based learning activities.

Practical quantum coin flipping

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pappa, Anna; Diamanti, Eleni; Chailloux, Andre

2011-11-15

We show that in the unconditional security model, a single quantum strong coin flip with security guarantees that are strictly better than in any classical protocol is possible to implement with current technology. Our protocol takes into account all aspects of an experimental implementation, including losses, multiphoton pulses emitted by practical photon sources, channel noise, detector dark counts, and finite quantum efficiency. We calculate the abort probability when both players are honest, as well as the probability of one player forcing his desired outcome. For a channel length up to 21 km and commonly used parameter values, we can achievemore » honest abort and cheating probabilities that are better than in any classical protocol. Our protocol is, in principle, implementable using attenuated laser pulses, with no need for entangled photons or any other specific resources.« less

A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS

NASA Astrophysics Data System (ADS)

Kawamoto, Kazunori; Mizuno, Shoji; Abe, Hirofumi; Higuchi, Yasushi; Ishihara, Hideaki; Fukumoto, Harutsugu; Watanabe, Takamoto; Fujino, Seiji; Shirakawa, Isao

2001-04-01

Using the example of an air bag controller, a single chip solution for automotive sub-control systems is investigated, by using a technological combination of improved circuits, bipolar complimentary metal oxide silicon double-diffused metal oxide silicon (BiCDMOS) and thick silicon on insulator (SOI). For circuits, an automotive specific reduced instruction set computer (RISC) center processing unit (CPU), and a novel, all integrated system clock generator, dividing digital phase-locked loop (DDPLL) are proposed. For the device technologies, the authors use SOI-BiCDMOS with trench dielectric-isolation (TD) which enables integration of various devices in an integrated circuit (IC) while avoiding parasitic miss operations by ideal isolation. The structures of the SOI layer and TD, are optimized for obtaining desired device characteristics and high electromagnetic interference (EMI) immunity. While performing all the air bag system functions over a wide range of supply voltage, and ambient temperature, the resulting single chip reduces the electronic parts to about a half of those in the conventional air bags. The combination of single chip oriented circuits and thick SOI-BiCDMOS technologies offered in this work is valuable for size reduction and improved reliability of automotive electronic control units (ECUs).

Perceptions of Senior-Year ELT Students for Flipped Classroom: A Materials Development Course

ERIC Educational Resources Information Center

Adnan, Müge

2017-01-01

This paper describes a structured attempt to integrate the flipped classroom model into a senior-level course at the higher education level. This study's purpose is to examine and compare the impact of flipped classrooms versus non-flipped as a means to contribute to the growing line of research on flipped teaching through an evaluation of both…

To Flip or Not to Flip? Analysis of a Flipped Classroom Pedagogy in a General Biology Course

ERIC Educational Resources Information Center

Heyborne, William H.; Perrett, Jamis J.

2016-01-01

In an attempt to better understand the flipped technique and evaluate its purported superiority in terms of student learning gains, the authors conducted an experiment comparing a flipped classroom to a traditional lecture classroom. Although the outcomes were mixed, regarding the superiority of either pedagogical approach, there does seem to be a…

ELEVATION OF C-FLIP IN CASTRATE-RESISTANT PROSTATE CANCER ANTAGONIZES THERAPEUTIC RESPONSE TO ANDROGEN-RECEPTOR TARGETED THERAPY

PubMed Central

McCourt, Clare; Maxwell, Pamela; Mazzucchelli, Roberta; Montironi, Rodolfo; Scarpelli, Marina; Salto-Tellez, Manuel; O’Sullivan, Joe M.; Longley, Daniel B.; Waugh, David J.J.

2012-01-01

Purpose To characterize the importance of cellular Fas-associated death domain (FADD)-like interleukin 1β-converting enzyme (FLICE) inhibitory protein (c-FLIP), a key regulator of caspase 8 (FLICE)-promoted apoptosis, in modulating the response of prostate cancer (CaP) cells to androgen receptor (AR)-targeted therapy. Experimental Design c-FLIP expression was characterized by immunohistochemical analysis of prostatectomy tissue. The functional importance of c-FLIP to survival and modulating response to bicalutamide was studied by molecular and pharmacological interventions. Results c-FLIP expression was increased in high-grade prostatic intra-epithelial neoplasia (HGPIN) and CaP tissue relative to normal prostate epithelium (P<0.001). Maximal c-FLIP expression was detected in castrate-resistant CaP (CRPC) (P<0.001). In vitro, silencing of c-FLIP induced spontaneous apoptosis and increased 22Rv1 and LNCaP cell sensitivity to bicalutamide, determined by flow cytometry, PARP cleavage and caspase activity assays. The histone deacetylase inhibitors (HDACi), droxinostat and SAHA, also down-regulated c-FLIP expression, induced caspase-8 and caspase-3/7 mediated apoptosis and increased apoptosis in bicalutamide-treated cells. Conversely, the elevated expression of c-FLIP detected in the CRPC cell line VCaP underpinned their insensitivity to bicalutamide and SAHA in vitro. However, knockdown of c-FLIP induced spontaneous apoptosis in VCaP cells, indicating its relevance to cell survival and therapeutic resistance. Conclusion c-FLIP reduces the efficacy of AR-targeted therapy and maintains the viability of CaP cells. A combination of HDACi with androgen-deprivation therapy (ADT) may be effective in early-stage disease, using c-FLIP expression as a predictive biomarker of sensitivity. Direct targeting of c-FLIP however may be relevant to enhance the response of existing and novel therapeutics in CRPC. PMID:22623731

"I Found It!" a Smartphone GPS Treasure-Hunting Game in a Flipped English Class

ERIC Educational Resources Information Center

Freiermuth, Mark R.

2017-01-01

In this project, 10 female Japanese students in the "Advanced Interpersonal Communication" course at a Japanese university used smartphone technology and a downloaded application to search for containers (called caches or geocaches) that had been hidden near the university campus by their instructor. The instructor placed different…

Students' Perspectives of Using Cooperative Learning in a Flipped Statistics Classroom

ERIC Educational Resources Information Center

Chen, Liwen; Chen, Tung-Liang; Chen, Nian-Shing

2015-01-01

Statistics has been recognised as one of the most anxiety-provoking subjects to learn in the higher education context. Educators have continuously endeavoured to find ways to integrate digital technologies and innovative pedagogies in the classroom to eliminate the fear of statistics. The purpose of this study is to systematically identify…

Reverse Teaching: Exploring Student Perceptions of "Flip Teaching"

ERIC Educational Resources Information Center

Nguyen, Bang; Yu, Xiaoyu; Japutra, Arnold; Chen, Cheng-Hao Steve

2016-01-01

The concept of reverse teaching, considered by some as the education model of the future due to increasing technological availability in the classroom, has received great attention in education research lately. However, the focus of these studies has mainly been on the understanding of reverse teaching in terms of its application rather than…

Points about Shoes

MedlinePlus

... comfortable in the store. Slip off the flip-flops. Flip-flops don’t give your feet enough support, so ... things like stubbing your toe. Consider some flip-flop how-tos: Buy new flip-flops when they ...

Around Marshall

NASA Image and Video Library

2003-12-01

Helen Cole, the project manager for the Lab-on-a-Chip Applications Development program, and Lisa Monaco, the project scientist for the program, insert a lab on a chip into the Caliper 42 which is specialized equipment that controls processes on commercial chips to support development of lab-on-a-chip applications. The system has special microscopes and imaging systems, so scientists can process and study different types of fluid, chemical, and medical tests conducted on chips. For example, researchers have examined fluorescent bacteria as it flows through the chips' fluid channels or microfluidic capillaries. Researchers at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama, have been studying how the lab-on-a-chip technology can be used for microbial detection, water quality monitoring, and detecting biosignatures of past or present life on Mars. The Marshall Center team is also collaborating with scientists at other NASA centers and at universities to develop custom chip designs for not only space applications, but for many Earth applications, such as for detecting deadly microbes in heating and air systems. (NASA/MSFC/D.Stoffer)

Transportable GPU (General Processor Units) chip set technology for standard computer architectures

NASA Astrophysics Data System (ADS)

Fosdick, R. E.; Denison, H. C.

1982-11-01

The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

High-performance IR detectors at SCD present and future

NASA Astrophysics Data System (ADS)

Nesher, O.; Klipstein, P. C.

2005-09-01

For over 27 years, SCD has been manufacturing and developing a wide range of high performance infra-red detectors, designed to operate in either the mid-wave (MWIR) or the long-wave (LWIR) atmospheric windows. These detectors have been integrated successfully into many different types of system including missile seekers, Time Delay Integration scanning systems, Hand-Held cameras, Missile Warning Systems and many others. SCD's technology for the MWIR wavelength range is based on its well established 2-D arrays of InSb photodiodes. The arrays are flip-chip bonded to SCD's analogue or digital signal processors, all of which have been designed in-house. The 2-D Focal Plane Array (FPA) detectors have a format of 320×256 elements for a 30 μm pitch and 480×384 or 640×512 elements for a 20 μm pitch. Typical operating temperatures are around 77-85K. Five years ago SCD began to develop a new generation of MWIR detectors based on the epitaxial growth of Antimonide Based Compound Semiconductors (ABCS). This ABCS technology allows band-gap engineering of the detection material which enables higher operating temperatures and multi-spectral detection. This year SCD presented its first prototype FPA from this program, an InAlSb based detector operating at a temperature of 100 K. By the end of this year SCD will introduce the first prototype MWIR detector with a 640×512 element format and a pitch of 15 μm. For the LWIR wave-length range SCD manufactures both linear Hg1-xCdxTe (MCT) detectors with a line of 250 elements and Time Delay and Integration (TDI) detectors with formats of 288×4 and 480×6. Recently, SCD has demonstrated its first prototype un-cooled detector which is based on VOx technology and which has a format of 384×288 elements, a pitch of 25 μm and a typical NETD of 50mK at F/1. In this paper we describe the present technologies and products of SCD and the future evolution of our detectors for the MWIR and LWIR detection.

High-performance IR detectors at SCD present and future

NASA Astrophysics Data System (ADS)

Nesher, O.; Klipstein, P. C.

2006-03-01

For over 27 years, SCD has been manufacturing and developing a wide range of high performance infrared detectors, designed to operate in either the mid-wave (MWIR) or the long-wave (LWIR) atmospheric windows. These detectors have been integrated successfully into many different types of system including missile seekers, time delay integration scanning systems, hand-held cameras, missile warning systems and many others. SCD's technology for the MWIR wavelength range is based on its well established 2D arrays of InSb photodiodes. The arrays are flip-chip bonded to SCD's analogue or digital signal processors, all of which have been designed in-house. The 2D focal plane array (FPA) detectors have a format of 320×256 elements for a 30-μm pitch and 480×384 or 640×512 elements for a 20-μm pitch. Typical operating temperatures are around 77-85 K. Five years ago SCD began to develop a new generation of MWIR detectors based on the epitaxial growth of antimonide based compound semiconductors (ABCS). This ABCS technology allows band-gap engineering of the detection material which enables higher operating temperatures and multi-spectral detection. This year SCD presented its first prototype FPA from this program, an InAlSb based detector operating at a temperature of 100 K. By the end of this year SCD will introduce the first prototype MWIR detector with a 640×512 element format and a pitch of 15 μm. For the LWIR wavelength range SCD manufactures both linear Hg1-xCdxTe (MCT) detectors with a line of 250 elements and time delay and integration (TDI) detectors with formats of 288×4 and 480×6. Recently, SCD has demonstrated its first prototype uncooled detector which is based on VOx technology and which has a format of 384×288 elements, a pitch of 25 μm, and a typical NETD of 50 mK at F/1. In this paper, we describe the present technologies and products of SCD and the future evolution of our detectors for the MWIR and LWIR detection.

Advanced Exploration Technologies: Micro and Nano Technologies Enabling Space Missions in the 21st Century

NASA Technical Reports Server (NTRS)

Krabach, Timothy

1998-01-01

Some of the many new and advanced exploration technologies which will enable space missions in the 21st century and specifically the Manned Mars Mission are explored in this presentation. Some of these are the system on a chip, the Computed-Tomography imaging Spectrometer, the digital camera on a chip, and other Micro Electro Mechanical Systems (MEMS) technology for space. Some of these MEMS are the silicon micromachined microgyroscope, a subliming solid micro-thruster, a micro-ion thruster, a silicon seismometer, a dewpoint microhygrometer, a micro laser doppler anemometer, and tunable diode laser (TDL) sensors. The advanced technology insertion is critical for NASA to decrease mass, volume, power and mission costs, and increase functionality, science potential and robustness.