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Sample records for frontend asic coupled

  1. Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO:Ce crystals

    NASA Astrophysics Data System (ADS)

    Albuquerque, Edgar; Bexiga, Vasco; Bugalho, Ricardo; Carriço, Bruno; Ferreira, Cláudia S.; Ferreira, Miguel; Godinho, Joaquim; Gonçalves, Fernando; Leong, Carlos; Lousã, Pedro; Machado, Pedro; Moura, Rui; Neves, Pedro; Ortigão, Catarina; Piedade, Fernando; Pinheiro, João F.; Rego, Joel; Rivetti, Angelo; Rodrigues, Pedro; Silva, José C.; Silva, Manuel M.; Teixeira, Isabel C.; Teixeira, João P.; Trindade, Andreia; Varela, João

    2009-01-01

    In the framework of the Clear-PEM project for the construction of a high-resolution scanner for breast cancer imaging, a very compact and dense frontend electronics system has been developed for readout of multi-pixel S8550 Hamamatsu APDs. The frontend electronics are instrumented with a mixed-signal Application-Specific Integrated Circuit (ASIC), which incorporates 192 low-noise charge pre-amplifiers, shapers, analog memory cells and digital control blocks. Pulses are continuously stored in memory cells at clock frequency. Channels above a common threshold voltage are readout for digitization by off-chip free-sampling ADCs. The ASIC has a size of 7.3×9.8 mm2 and was implemented in a AMS 0.35 μm CMOS technology. In this paper the experimental characterization of the Clear-PEM frontend ASIC, reading out multi-pixel APDs coupled to LYSO:Ce crystal matrices, is presented. The chips were mounted on a custom test board connected to six APD arrays and to the data acquisition system. Six 32-pixel LYSO:Ce crystal matrices coupled on both sides to APD arrays were readout by two test boards. All 384 channels were operational. The chip power consumption is 660 mW (3.4 mW per channel). A very stable behavior of the chip was observed, with an estimated ENC of 1200-1300e- at APD gain 100. The inter-channel noise dispersion and mean baseline variation is less than 8% and 0.5%, respectively. The spread in the gain between different channels is found to be 1.5%. Energy resolution of 16.5% at 511 keV and 12.8% at 662 keV has been measured. Timing measurements between the two APDs that readout the same crystal is extracted and compared with detailed Monte Carlo simulations. At 511 keV the measured single photon time RMS resolution is 1.30 ns, in very good agreement with the expected value of 1.34 ns.

  2. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    SciTech Connect

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  3. A front-end ASIC design for non-uniformity correction

    NASA Astrophysics Data System (ADS)

    Shen, X.; Ding, R. J.; Lin, J. M.; Liu, F.

    2008-12-01

    A front-end design of an ASIC that implements calibration and correction for IRFPA non-uniformity is presented. An algorithm suitable for ASIC implementation is introduced, and one kind of architecture that implements this algorithm has been designed. We map the architecture to TSMC 0.25um process. After evaluating the chip area and operation speed, we confirm that this architect will also be effective when the FPA scale in enlarged to 1Kby1K. Finally the flow of circuit implementation and method of verification are introduced briefly.

  4. Front-end ASIC for pixilated wide bandgap detectors

    NASA Astrophysics Data System (ADS)

    Vernon, Emerson; de Geronimo, Gianluigi; Fried, Jack; Herman, Cedric; Zhang, Feng; He, Zhong

    2009-08-01

    A CMOS application specific integrated circuit (ASIC) was developed for 3D Position Sensitive Detectors (PSD). The preamplifiers were optimized for pixellated Cadmium-Zinc-Telluride (CZT) Mercuric-Iodide (HgI2) and Thallium Bromide (TlBr) sensors. The ASIC responds to an ionizing event in the sensor by measuring both amplitude and timing in the pertinent anode and cathode channels. Each channel is sensitive to events and transients of positive or negative polarity and performs low-noise charge amplification, high-order shaping, peak and timing detection along with analog storage and multiplexing. Three methodologies are implemented to perform timing measurement in the cathode channel. Multiple sparse modes are available for the readout of channel data. The ASIC integrates 130 channels in an area of 12 x 9 mm2 and dissipates ~330 mW. With a CZT detector connected and biased, an electronic resolution of ~200 e- rms for charges up to 100 fC was measured. Spectral data from the University of Michigan revealed a cumulative single-pixel resolution of ~0.55 % FWHM at 662 KeV.

  5. Front-end ASICs for high-energy astrophysics in space

    NASA Astrophysics Data System (ADS)

    Gevin, O.; Limousin, O.; Meuris, A.

    2016-07-01

    In most of embedded imaging systems for space applications, high granularity and increasing size of focal planes justify an almost systematic use of integrated circuits. . To fulfill challenging requirements for excellent spatial and energy resolution, integrated circuits must fit the sensors perfectly and interface the system such a way to optimize simultaneously noise, geometry and architecture. Moreover, very low power consumption and radiation tolerance are mandatory to envision a use onboard a payload in space. Consequently, being part of an optimized detection system for space, the integrated circuit is specifically designed for each application and becomes an Application Specific Integrated Circuits (ASIC). The paper focuses on mixed analog and digital signal ASICs for spectro-imaging systems in the keVMeV energy band. The first part of the paper summarizes the main advantages conferred by the use of front-end ASICs for highenergy astrophysics instruments in space mission. Space qualification of ASICs requires the chip to be radiation hard. The paper will shortly describe some of the typical hardening techniques and give some guidelines that an ASIC designer should follow to choose the most efficient technology for his project. The first task of the front-end electronics is to convert the charge coming from the detector into a voltage. For most of the Silicon detectors (CCD, DEPFET, SDD) this is conversion happens in the detector itself. For other sensor materials, charge preamplifiers operate the conversion. The paper shortly describes the different key parameters of charge preamplifiers and the binding parameters for the design. Filtering is generally mandatory in order to increase the signal to noise ratio or to reduce the duration of the signal. After a brief review on the main noise sources, the paper reviews noise-filtering techniques that are commonly used in Integrated circuits designs. The way sensors and ASICs are interconnected together plays a

  6. IMOTEPAD: A mixed-signal 64-channel front-end ASIC for small-animal PET imaging

    NASA Astrophysics Data System (ADS)

    Fang, Xiaochao; Ollivier-Henry, Nicolas; Gao, Wu; Hu-Guo, Christine; Colledani, Claude; Humbert, Bernard; Brasse, David; Hu, Yann

    2011-04-01

    This paper presents the design and characteristics of a mixed-signal 64-channel front-end readout ASIC called IMOTEPAD dedicated to multi-channel plate (MCP) photodetector coupled to LYSO scintillating crystals for small-animal PET imaging. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. As a result, both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. This dedicated ASIC IMOTEPAD comprises two parts: the analog part IMOTEPA and the digital part IMOTEPD. The IMOTEPA is dedicated to energy measurement. And the timing information is digitized by the IMOTEPD in which the key principal element is a time-to-digital converter (TDC) based on a delay-locked loop (DLL) with 32 delay cells. The chip is designed and fabricated in 0.35 μm CMOS process. The measurements show that for the analog part IMOTEPA, the energy gain is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The SNR is 39 dB and the RMS noise is 300 μV. The nonlinearity is less than 3%. The crosstalk is less than 0.2%. For the IMOTEPD, the bin size of the TDC is 625 ps with a reference clock of 50 MHz. The RMS jitter of the DLL is less than 42 ps. The DNL of the TDC is equal to about 0.17 LSB and the INL is equal to 0.31 LSB. The power dissipation of each channel is less than 16.8 mW. The design of the ASIC, especially for TDC and the measurement results of the IMOTEPAD will be presented and discussed in this paper.

  7. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    NASA Astrophysics Data System (ADS)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF. © 2001 Elsevier Science. All rights reserved

  8. An analogue front-end ASIC prototype designed for PMT signal readout

    NASA Astrophysics Data System (ADS)

    Liu, Jian-Feng; Zhao, Lei; Yu, Li; Liang, Yu; Qin, Jia-Jun; Yang, Yun-Fan; Wu, Wei-Hao; Liu, Shu-Bin; An, Qi

    2016-06-01

    The Water Cherenkov Detector Array (WCDA) is one of the core detectors in the Large High Altitude Air Shower Observatory (LHAASO), and it consists of 3600 photomultiplier tubes (PMTs). Both high resolution time and charge measurement are required over a large dynamic range from 1 photoelectron (P.E.) to 4000 P.E. The prototype of an analogue front-end Application Specific Integrated Circuit (ASIC) fabricated using Global Foundry 0.35 μm CMOS technology is designed to read out the PMT signal in the WCDA. This ASIC employs leading edge discrimination and an (RC)4 shaping structure. Combined with the following Time-to-Digital Converter (TDC) and Analog-to-Digital Converter (ADC), both the arrival time and charge of the PMT signal can be measured. Initial test results indicate that time resolution is better than 350 ps and charge resolution is better than 10% at 1 P.E. and better than 1% with large input signals (300 P.E. to 4000 P.E.). Besides, this ASIC has a good channel-to-channel isolation of more than 84 dB and the temperature dependency of charge measurement is less than 5% in the range 0-50°C. Supported by Knowledge Innovation Program of Chinese Academy of Sciences (KJCX2-YW-N27), National Natural Science Foundation of China (11175174) and CAS Center for Excellence in Particle Physics (CCEPP)

  9. Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter

    NASA Astrophysics Data System (ADS)

    Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi

    2016-01-01

    The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)

  10. Petiroc and Citiroc: front-end ASICs for SiPM read-out and ToF applications

    NASA Astrophysics Data System (ADS)

    Fleury, J.; Callier, S.; de La Taille, C.; Seguin, N.; Thienpont, D.; Dulucq, F.; Ahmad, S.; Martin, G.

    2014-01-01

    Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out. Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement. Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps). Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs. Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer.

  11. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    SciTech Connect

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D.; Hu, Y.

    2015-07-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  12. Characterization and performance of monolithic detector blocks with a dedicated ASIC front-end readout for PET imaging of the human brain

    NASA Astrophysics Data System (ADS)

    Rato Mendes, Pedro; Sarasola Martín, Icíar; Cañadas, Mario; de Acilu, Paz García; Cuypers, Robin; Manuel Pérez, José; Willmott, Carlos

    2011-05-01

    We are developing a human brain PET scanner prototype compatible with MRI based on monolithic scintillator crystals, APD matrices and a dedicated ASIC front-end readout. In this work we report on the performance of individual detector modules and on the operation of such modules in PET coincidence. Results will be presented on the individual characterization of detector blocks and its ASIC front-end readout, with measured energy resolutions of 13% full-width half-maximum (FWHM) at 511 keV and spatial resolutions of the order of 2 mm FWHM. First results on PET coincidence performance indicate spatial resolutions as good as 2.1 mm FWHM for SSRB/FBP reconstruction of tomographic data obtained using a simple PET demonstrator based on a pair of monolithic detector blocks with ASIC readout.

  13. A low-power, low-latency, dual-channel serializer ASIC for detector front-end readout

    NASA Astrophysics Data System (ADS)

    Xiao, L.; Gong, D.; Liu, T.; Chen, J.; Fan, Q.; Feng, Y.; Guo, D.; He, H.; Hou, S.; Huang, G.; Li, X.; Liu, C.; Sun, Q.; Sun, X.; Teng, P.-K.; Wang, J.; Xiang, A. C.; Yang, D.; Ye, J.

    2017-01-01

    In this paper, we present a dual-channel serializer ASIC, LOCx2, and its pin-compatible backup, LOCx2-130, for detector front-end readout. LOCx2 is fabricated in a 0.25-μm Silicon-on-Sapphire CMOS process and each channel operates at 5.12 Gbps, while LOCx2-130 is fabricated in a 130-nm bulk CMOS process and each channel operates at 4.8 Gbps. The power consumption and the transmission latency are 900 mW and 27 ns for LOCx2 and the corresponding simulation result of LOCx2-130 are 386 mW and 38 ns, respectively.

  14. FRONT-END ASIC FOR HIGH RESOLUTION X-RAY SPECTROMETERS.

    SciTech Connect

    DE GERONIMO,G.; CHEN, W.; FRIED, J.; LI, Z.; PINELLI, D.A.; REHAK, P.; VERNON, E.; GASKIN, J.A.; RAMSEY, B.D.; ANELLI, G.

    2007-10-27

    We present an application specific integrated circuit (ASIC) for high-resolution x-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mmz and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wirebonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm{sup 2}, dissipates 12 mW cm{sup -2}, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 C on the 6 keV peak of a {sup 55}Fe source.

  15. Characteristics of a multichannel low-noise front-end ASIC for CZT-based small animal PET imaging

    NASA Astrophysics Data System (ADS)

    Gao, W.; Liu, H.; Gan, B.; Hu, Y.

    2014-05-01

    In this paper, we present the design and characteristics of a novel low-noise front-end readout application-specific integrated circuit dedicated to CdZnTe (CZT) detectors for a small animal PET imaging system. A low-noise readout method based on the charge integration and the delayed peak detection is proposed. An eight-channel front-end readout prototype chip is designed and implemented in a 0.35 μm CMOS process. The die size is 2.3 mm ×2.3 mm. The prototype chip is tested in different methods including electronic test, energy spectrum test and irradiation test. The input range of the ASIC is from 2000e- to 180,000e-, reflecting the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC at the shaping time of 1 μs. The best test result of the equivalent noise charge (ENC) is 58.9 e- at zero farad plus 5.4 e- per picofarad. The nonlinearity and the crosstalk are less than 3% and less than 2%, respectively, at the room temperature. The static power dissipation is about 3 mW/channel.

  16. System-level considerations for the front-end readout ASIC in the CBM experiment from the power supply perspective

    NASA Astrophysics Data System (ADS)

    Kasinski, K.; Koczon, P.; Ayet, S.; Löchner, S.; Schmidt, C. J.

    2017-03-01

    New fixed target experiments using high intensity beams with energy up to 10 AGeV from the SIS100 synchrotron presently being constructed at FAIR/GSI are under preparation. Most of the readout electronics and power supplies are expected to be exposed to a very high flux of nuclear reaction products and have to be radiation tolerant up to 3 MRad (TID) and sustain up to 1014/cm2 of 1 MeV neutron equivalent in their life time. Moreover, the mostly minimum ionising particles under investigation leave very little signal in the sensors. Therefore very low noise level amplitude measurements are required by the front-end electronics for effective tracking. Sensor and interconnecting micro-cable capacitance and series resistance in conjunction with intrinsic noise of the charge sensitive amplifier are dominant noise sources in the system. However, the single-ended architecture of the amplifiers employed for the charge processing channels implies a potential problem with noise contributions from power supply sources. Strict system-level constraints leave very little freedom in selecting a power supply structure optimal with respect to: power efficiency, cooling capabilities and power density on modules, but also noise injection to the front-end via the power supply lines. Design of the power supply and distribution system of the Silicon Tracking System in the CBM experiment together with details on the front-end ASICs (STS -XYTER2) and measurement results of power supply and conditioning electronics (selected DC/DC converter and LDO regulators) are presented.

  17. 3D probe array integrated with a front-end 100-channel neural recording ASIC

    NASA Astrophysics Data System (ADS)

    Cheng, Ming-Yuan; Yao, Lei; Tan, Kwan Ling; Lim, Ruiqi; Li, Peng; Chen, Weiguo

    2014-12-01

    Brain-machine interface technology can improve the lives of spinal cord injury victims and amputees. A neural interface system, consisting of a 3D probe array and a custom low-power (1 mW) 100-channel (100-ch) neural recording application-specific integrated circuit (ASIC), was designed and implemented to monitor neural activity. In this study, a microassembly 3D probe array method using a novel lead transfer technique was proposed to overcome the bonding plane mismatch encountered during orthogonal assembly. The proposed lead transfer technique can be completed using standard micromachining and packaging processes. The ASIC can be stacking-integrated with the probe array, minimizing the form factor of the assembled module. To minimize trauma to brain cells, the profile of the integrated probe array was controlled within 730 μm. The average impedance of the assembled probe was approximately 0.55 MΩ at 1 kHz. To verify the functionality of the integrated neural probe array, bench-top signal acquisitions were performed and discussed.

  18. First results of the front-end ASIC for the strip detector of the PANDA MVD

    NASA Astrophysics Data System (ADS)

    Quagli, T.; Brinkmann, K.-T.; Calvo, D.; Di Pietro, V.; Lai, A.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Wheadon, R.; Zambanini, A.

    2017-03-01

    PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

  19. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Zeng, Huiming; Wei, Tingcun; Wang, Jia

    2017-03-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal-oxide-semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 μm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e-+16.3e-/pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  20. Development of a compact radiation-hardened low-noise front-end readout ASIC for CZT-based hard X-ray imager

    NASA Astrophysics Data System (ADS)

    Gao, W.; Gan, B.; Li, X.; Wei, T.; Gao, D.; Hu, Y.

    2015-04-01

    In this paper, we present the development and performances of a radiation-hardened front-end readout application-specific integrated circuit (ASIC) dedicated to CZT detectors for a hard X-ray imager in space applications. The readout channel consists of a charge sensitive amplifier (CSA), a CR-RC shaper, a fast shaper, a discriminator and a driving buffer. With the additional digital filtering, the readout channel can achieve very low noise performances and low power dissipation. An eight-channel prototype ASIC is designed and fabricated in 0.35 μm CMOS process. The energy range of the detected X-rays is evaluated as 1.45 keV to 281 keV. The gain is larger than 100 mV/fC. The equivalent noise charge (ENC) of the ASIC is 53 e- at zero farad plus 10 e- per picofarad. The power dissipation is less than 4.4 mW/channel. Through the measurement with a CZT detector, the energy resolution is less than 3.45 keV (FWHM) under the irradiation of the radioactive source 241Am. The radiation effect experiments indicate that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad (Si).

  1. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

    SciTech Connect

    Gan, Bo; Wei, Tingcun; Gao, Wu; Liu, Hui; Hu, Yann

    2015-07-01

    Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for a power

  2. Analog front-end design of the STS/MUCH-XYTER2—full size prototype ASIC for the CBM experiment

    NASA Astrophysics Data System (ADS)

    Kleczek, Rafal

    2017-01-01

    The design of the analog front-end of the STS/MUCH-XYTER2 ASIC, a full-size prototype chip for the Silicon Tracking System (STS, based on double-sided silicon strip sensors) and Muon Chamber (MUCH, based on gas sensors) detectors is presented. The ASIC contains 128 charge processing channels, each built of a charge sensitive amplifier, a polarity selection circuit and two pulse shaping amplifiers forming two parallel signal paths. The first path is used for timing measurement with a fast discriminator. The second path allows low-noise amplitude measurement with a 5-bit continuous-time flash ADC. Different operating conditions and constraints posed by two target detectors' applications require front-end electronics flexibility to meet extended system-wise requirements. The presented circuit implements switchable shaper peaking time, gain switching and trimming, input amplifier pulsed reset circuit, fail-safe measures. The power consumption is scalable (for the STS and the MUCH modes), but limited to 10 mW/channel.

  3. A low-noise 64-channel front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems

    NASA Astrophysics Data System (ADS)

    Gan, B.; Wei, T.; Gao, W.; Liu, H.; Hu, Y.

    2016-04-01

    In this paper, we report on the recent development of a 64-channel low-noise front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems. The readout channel is comprised of a charge sensitive amplifier, a leakage current compensation circuit, a CR-RC shaper, two S-K filters, an inverse proportional amplifier, a peak-detect-and-hold circuit, a discriminator and trigger logic, a time sequence control circuit and a driving buffer. The readout ASIC is implemented in TSMC 0.35 μm mixed-signal CMOS technology, the die size of the prototype chip is 2.7 mm×8.0 mm. The overall gain of the readout channel is 200 mV/fC, the power consumption is less than 8 mW/channel, the linearity error is less than 1%, the inconsistency among the channels is less than 2.86%, and the equivalent noise charge of a typical channel is 66 e- at zero farad plus 14 e- per picofarad. By connecting this readout ASIC to an 8×8 pixel CdZnTe detector, we obtained an energy spectrum, the energy resolution of which is 4.5% at the 59.5 keV line of 241Am source.

  4. Front-end readout ASIC for charged particle counting with the RADEM instrument on the ESA JUICE mission

    NASA Astrophysics Data System (ADS)

    Stein, Timo A.; Pâhlsson, Philip; Meier, Dirk; Hasanbegovic, Amir; Otnes Berge, Hans Kristian; Altan, Mehmet Akif; Ackermann, Jörg; Najafiuchevler, Bahram; Azman, Suleyman; Talebi, Jahanzad; Olsen, Alf; Gheorghe, Codin; Steenari, David; Øya, Petter; Johansen, Tor Magnus; Maehlum, Gunnar

    2016-07-01

    The detector readout for the Radiation-hard Electron Monitor (RADEM) aboard the JUpiter ICy moons Explorer (JUICE) uses a custom-made application-specific integrated circuit (ASIC, model: IDE3466) for the charge signal readout from silicon radiation sensors. RADEM measures the total ionizing dose and dose rate for protons (5 MeV to 250 MeV), electrons (0.3 MeV to 40 MeV) and ions. RADEM has in total three chips of the same design: one chip for the proton and ion detector, one for the electron detector, and one for the directional detector. The ASIC has 36 chargesensitive pre-amplifiers (CSA), 36 counters of 22-bits each, and one analogue output for multiplexing the pulse heights from all channels. The counters count pulses from charged particles in the silicon sensors depending on the charge magnitude and the coincidence trigger pattern from the 36 channels. We have designed the ASIC in 0.35-μm CMOS process and an ASIC wafer lot has been manufactured at AMS. This article presents the ASIC design specifications and design validation results. The preliminary results from tests with bare chips indicate that the design meets the technical requirements.

  5. A time-based front-end ASIC for the silicon micro strip sensors of the bar PANDA Micro Vertex Detector

    NASA Astrophysics Data System (ADS)

    Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.

    2016-03-01

    The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.

  6. The TDCpix Readout ASIC: A 75 ps Resolution Timing Front-End for the Gigatrackerof theNA62 Experiment

    NASA Astrophysics Data System (ADS)

    Rinella, G. Aglieri; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    NA62 is an experiment under development at the CERN Super Proton Synchrotron, aiming at measuring ultra rare kaon decays. The Gigatracker (GTK) detector shall combine on-beam tracking of individual particles with a time resolution of 150 ps rms. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm2 fora total rateof about 0.75 GHz.Ahybrid siliconpixel detectoris beingdevelopedto meet these requirements. The pixel chip for the Gigatracker (TDCpix) is under design. The TDCpix chip will feature 1800 square pixels of 300×300 μm2 arranged in a matrix of 45 rows × 40 columns. Bump-bonded to a silicon pixel sensor it shall perform time stamping of particle hits with a timing accuracybetter than 200 ps rms and a detection efficiencyabove 99%. The chosen architecture provides full separation of the sensitive analog amplifiers of the pixel matrix from the noisy digital circuits of the TDCs and of the readout blocks. Discriminated hit signals from each pixel are transmitted to the end of column region. An array ofTime to Digital Converters (TDC) is implemented at the bottom of the pixel array. The TDCs are based on time tagging the events with the fine time codes generated by Delay Locked Loops (DLL) and have a nominal time bin of ˜100 ps. Time stamps and time-over-threshold are recorded for each discriminated hit and the correction of the discriminator's time-walk is performed off-detector. Data are continuously transmitted on four 2.4 Gb/s serial output links. Adescription of the on-going design of the final TDCpix is given in this paper. Design choices and some technical implementation details are presented. Aprototype ASIC including thekeycomponents of this architecture has been manufactured. The achievement of specification figures such as a time resolution of the processing chain of 75 ps rms as well as charged particle time stampingwitha resolutionbetterthan200psrmswere demonstratedexperimentally.Asummaryoftheseresultsisalso presented in

  7. AC-coupled front-end for biopotential measurements.

    PubMed

    Spinelli, Enrique Mario; Pallàs-Areny, Ramon; Mayosky, Miguel Angel

    2003-03-01

    AC coupling is essential in biopotential measurements. Electrode offset potentials can be several orders of magnitude larger than the amplitudes of the biological signals of interest, thus limiting the admissible gain of a dc-coupled front end to prevent amplifier saturation. A high-gain input stage needs ac input coupling. This can be achieved by series capacitors, but in order to provide a bias path, grounded resistors are usually included, which degrade the common mode rejection ratio (CMRR). This paper proposes a novel balanced input ac-coupling network that provides a bias path without any connection to ground, thus resulting in a high CMRR. The circuit being passive, it does not limit the differential dc input voltage. Furthermore, differential signals are ac coupled, whereas common-mode voltages are dc coupled, thus allowing the closed-loop control of the dc common mode voltage by means of a driven-right-leg circuit. This makes the circuit compatible with common-mode dc shifting strategies intended for single-supply biopotential amplifiers. The proposed circuit allows the implementation of high-gain biopotential amplifiers with a reduced number of parts, thus resulting in low power consumption. An electrocardiogram amplifier built according to the proposed design achieves a CMRR of 123 dB at 50 Hz.

  8. A 4×8-Gbps VCSEL array driver ASIC and integration with a custom array transmitter module for the LHC front-end transmission

    SciTech Connect

    Guo, Di; Liu, Chonghan; Chen, Jinghong; Chramowicz, John; Gong, Datao; He, Huiqin; Hou, Suen; Liu, Tiankuan; Prosser, Alan; Teng, Ping -Kun; Xiang, Annie C.; Xiao, Le; Ye, Jingbo

    2016-03-21

    This paper describes the design, fabrication and experiment results of a 4×8-Gbps Vertical-Cavity Surface-Emitting Laser (VCSEL) array driver ASIC with the adjustable active-shunt peaking technique and the novel balanced output structure under the Silicon-on-Sapphire (SOS) process, and a custom array optical transmitter module, featuring a compact size of 10 mm×15 mm×5.3 mm. Both the array driver ASIC and the module have been fully tested after integration as a complete parallel transmitter. Optical eye diagram of each channel passes the eye mask at 8 Gbps/ch with adjacent channel working simultaneously with a power consumption of 150 mW/ch. As a result, the optical transmission of Bit-Error Rate (BER) less than 10E-12 is achieved at an aggregated data rate of 4×8-Gbps.

  9. A 4×8-Gbps VCSEL array driver ASIC and integration with a custom array transmitter module for the LHC front-end transmission

    DOE PAGES

    Guo, Di; Liu, Chonghan; Chen, Jinghong; ...

    2016-03-21

    This paper describes the design, fabrication and experiment results of a 4×8-Gbps Vertical-Cavity Surface-Emitting Laser (VCSEL) array driver ASIC with the adjustable active-shunt peaking technique and the novel balanced output structure under the Silicon-on-Sapphire (SOS) process, and a custom array optical transmitter module, featuring a compact size of 10 mm×15 mm×5.3 mm. Both the array driver ASIC and the module have been fully tested after integration as a complete parallel transmitter. Optical eye diagram of each channel passes the eye mask at 8 Gbps/ch with adjacent channel working simultaneously with a power consumption of 150 mW/ch. As a result, themore » optical transmission of Bit-Error Rate (BER) less than 10E-12 is achieved at an aggregated data rate of 4×8-Gbps.« less

  10. A 4×8-Gbps VCSEL array driver ASIC and integration with a custom array transmitter module for the LHC front-end transmission

    NASA Astrophysics Data System (ADS)

    Guo, Di; Liu, Chonghan; Chen, Jinghong; Chramowicz, John; Gong, Datao; He, Huiqin; Hou, Suen; Liu, Tiankuan; Prosser, Alan; Teng, Ping-Kun; Xiang, Annie C.; Xiao, Le; Ye, Jingbo

    2016-09-01

    This paper describes the design, fabrication and experiment results of a 4×8-Gbps Vertical-Cavity Surface-Emitting Laser (VCSEL) array driver ASIC with the adjustable active-shunt peaking technique and the novel balanced output structure under the Silicon-on-Sapphire (SOS) process, and a custom array optical transmitter module, featuring a compact size of 10 mm×15 mm×5.3 mm. Both the array driver ASIC and the module have been fully tested after integration as a complete parallel transmitter. Optical eye diagram of each channel passes the eye mask at 8 Gbps/ch with adjacent channel working simultaneously with a power consumption of 150 mW/ch. The optical transmission of Bit-Error Rate (BER) less than 10E-12 is achieved at an aggregated data rate of 4×8-Gbps.

  11. VEGA: A low-power front-end ASIC for large area multi-linear X-ray silicon drift detectors: Design and experimental characterization

    NASA Astrophysics Data System (ADS)

    Ahangarianabhari, Mahdi; Macera, Daniele; Bertuccio, Giuseppe; Malcovati, Piero; Grassi, Marco

    2015-01-01

    We present the design and the first experimental characterization of VEGA, an Application Specific Integrated Circuit (ASIC) designed to read out large area monolithic linear Silicon Drift Detectors (SDD's). VEGA consists of an analog and a digital/mixed-signal section to accomplish all the functionalities and specifications required for high resolution X-ray spectroscopy in the energy range between 500 eV and 50 keV. The analog section includes a charge sensitive preamplifier, a shaper with 3-bit digitally selectable shaping times from 1.6 μs to 6.6 μs and a peak stretcher/sample-and-hold stage. The digital/mixed-signal section includes an amplitude discriminator with coarse and fine threshold level setting, a peak discriminator and a logic circuit to fulfill pile-up rejection, signal sampling, trigger generation, channel reset and the preamplifier and discriminators disabling functionalities. A Serial Peripherical Interface (SPI) is integrated in VEGA for loading and storing all configuration parameters in an internal register within few microseconds. The VEGA ASIC has been designed and manufactured in 0.35 μm CMOS mixed-signal technology in single and 32 channel versions with dimensions of 200 μm×500 μm per channel. A minimum intrinsic Equivalent Noise Charge (ENC) of 12 electrons r.m.s. at 3.6 μs peaking time and room temperature is measured and the linearity error is between -0.9% and +0.6% in the whole input energy range. The total power consumption is 481 μW and 420 μW per channel for the single and 32 channels version, respectively. A comparison with other ASICs for X-ray SDD's shows that VEGA has a suitable low noise and offers high functionality as ADC-ready signal processing but at a power consumption that is a factor of four lower than other similar existing ASICs.

  12. GASTONE64: A new front-end ASIC for the cylindrical GEM Inner Tracker of KLOE-2 experiment at DAΦNE

    NASA Astrophysics Data System (ADS)

    Balla, A.; Bencivenni, G.; Branchini, P.; Budano, A.; Cerioni, S.; Ciambrone, P.; Czerwinski, E.; De Lucia, E.; De Robertis, G.; Di Domenico, A.; Domenici, D.; Jing, D.; Erriquez, O.; Fanizzi, G.; Felici, G.; Gatta, M.; Lacalamita, N.; Liuzzi, R.; Loddo, F.; Mongelli, M.; Morello, G.; Pelosi, A.; Quintieri, L.; Ranieri, A.; Tskhadadze, E.; Valentino, V.

    2013-12-01

    GASTONE64 (Gem Amplifier Shaper Tracking ON Events) is a novel 64-channel mixed analog-digital ASIC developed to readout the cylindrical GEM inner tracking detector of the KLOE-2 apparatus at the e+e-DAΦNE collider. It has been designed in the CMOS 0.35 μm technology and each analog channel is made of preamplifier, shaper and discriminator. The expected input charge ranges between few fC up to 40 fC, the charge sensitivity is 16 mV/fC while the equivalent input noise charge (ENC) is 800 e-+40 e-/pF. The discriminated signals are read-out using a 100 MBit/s LVDS serial data link. The power consumption is about 6 mW/channel.

  13. Front End Spectroscopy ASIC for Germanium Detectors

    NASA Astrophysics Data System (ADS)

    Wulf, Eric

    Large-area, tracking, semiconductor detectors with excellent spatial and spectral resolution enable exciting new access to soft (0.2-5 MeV) gamma-ray astrophysics. The improvements from semiconductor tracking detectors come with the burden of high density of strips and/or pixels that require high-density, low-power, spectroscopy quality readout electronics. CMOS ASIC technologies are a natural fit to this requirement and have led to high-quality readout systems for all current semiconducting tracking detectors except for germanium detectors. The Compton Spectrometer and Imager (COSI), formerly NCT, at University of California Berkeley and the Gamma-Ray Imager/Polarimeter for Solar flares (GRIPS) at Goddard Space Flight Center utilize germanium cross-strip detectors and are on the forefront of NASA's Compton telescope research with funded missions of long duration balloon flights. The development of a readout ASIC for germanium detectors would allow COSI to replace their discrete electronics readout and would enable the proposed Gamma-Ray Explorer (GRX) mission utilizing germanium strip-detectors. We propose a 3-year program to develop and test a germanium readout ASIC to TRL 5 and to integrate the ASIC readout onto a COSI detector allowing a TRL 6 demonstration for the following COSI balloon flight. Our group at NRL led a program, sponsored by another government agency, to produce and integrate a cross-strip silicon detector ASIC, designed and fabricated by Dr. De Geronimo at Brookhaven National Laboratory. The ASIC was designed to handle the large (>30 pF) capacitance of three 10 cm^2 detectors daisy-chained together. The front-end preamplifier, selectable inverter, shaping times, and gains make this ASIC compatible with a germanium cross-strip detector as well. We therefore have the opportunity and expertise to leverage the previous investment in the silicon ASIC for a new mission. A germanium strip detector ASIC will also require precise timing of the signals at

  14. Digital Radiography of Mammographic Phantoms and Biologic Samples Using a 64 Microstrips Crystalline Silicon Detector Coupled to the RX64 ASIC

    SciTech Connect

    Leyva, A.; Cabal, A.; Pinera, I.; Abreu, Y.; Cruz, C. M.; Montano, L. M.; Diaz, C. C.; Fontaine, M.; Ortiz, C. M.; Padilla, F.; Mora, R. de la

    2008-08-11

    The present paper synthesizes the results obtained in the evaluation of a 64 microstrips crystalline silicon detector coupled to RX64 ASIC, designed for high-energy physics experiments, as a useful X-ray detector in advanced medical radiography, specifically in digital mammography. Research includes the acquisition of two-dimensional radiography of a mammography phantom using the scanning method, and the comparison of experimental profile with mathematically simulated one. The paper also shows the experimental images of three biological samples taken from breast biopsies, where it is possible to identify the presence of possible pathological tissues.

  15. A 1.2 Gb/s Data Transmission Unit in CMOS 0.18 μm technology for the ALICE Inner Tracking System front-end ASIC

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Aglieri Rinella, G.; Benotto, F.; Corrales Morales, Y.; Kugathasan, T.; Lattuca, A.; Lupi, M.; Ravasenga, I.

    2017-02-01

    The upgrade of the ALICE Inner Tracking System is based on a Monolithic Active Pixel Sensor and ASIC designed in a CMOS 0.18 μ m process. In order to provide the required output bandwidth (1.2 Gb/s for the inner layers and 400 Mb/s for the outer ones) on a single high speed serial link, a custom Data Transmission Unit (DTU) has been developed in the same process. The DTU includes a clock multiplier PLL, a double data rate serializer and a pseudo-LVDS driver with pre-emphasis and is designed to be SEU tolerant.

  16. ASICs and cardiovascular homeostasis.

    PubMed

    Abboud, François M; Benson, Christopher J

    2015-07-01

    In this review we address primarily the role of ASICs in determining sensory signals from arterial baroreceptors, peripheral chemoreceptors, and cardiopulmonary and somatic afferents. Alterations in these sensory signals during acute cardiovascular stresses result in changes in sympathetic and parasympathetic activities that restore cardiovascular homeostasis. In pathological states, however, chronic dysfunctions of these afferents result in serious sympatho-vagal imbalances with significant increases in mortality and morbidity. We identified a role for ASIC2 in the mechano-sensitivity of aortic baroreceptors and of ASIC3 in the pH sensitivity of carotid bodies. In spontaneously hypertensive rats, we reported decreased expression of ASIC2 in nodose ganglia neurons and overexpression of ASIC3 in carotid bodies. This reciprocal expression of ASIC2 and ASIC3 results in reciprocal changes in sensory sensitivity of baro- and chemoreceptors and a consequential synergistic exaggeration sympathetic nerve activity. A similar reciprocal sensory dysautonomia prevails in heart failure and increases the risk of mortality. There is also evidence that ASIC heteromers in skeletal muscle afferents contribute significantly to the exercise pressor reflex. In cardiac muscle afferents of the dorsal root ganglia, they contribute to nociception and to the detrimental sympathetic activation during ischemia. Finally, we report that an inhibitory influence of ASIC2-mediated baroreceptor activity suppresses the sympatho-excitatory reflexes of the chemoreceptors and skeletal muscle afferents, as well as the ASIC1a-mediated excitation of central neurons during fear, threat, or panic. The translational potential of activation of ASIC2 in cardiovascular disease states may be a beneficial sympatho-inhibition and parasympathetic activation. This article is part of the Special Issue entitled 'Acid-Sensing Ion Channels in the Nervous System'.

  17. Design of versatile ASIC and protocol tester for CBM readout system

    NASA Astrophysics Data System (ADS)

    Zabołotny, W. M.; Byszuk, A. P.; Emschermann, D.; Gumiński, M.; Juszczyk, B.; Kasiński, K.; Kasprowicz, G.; Lehnert, J.; Müller, W. F. J.; Poźniak, K.; Romaniuk, R.; Szczygieł, R.

    2017-02-01

    Silicon Tracking System (STS), Muon Chamber (MUCH) and Transition Radiation Detector (TRD) subdetectors in the Compressed Baryonic Matter (CBM) detector system at Facility for Antiproton and Ion Research (FAIR) use the same innovative protocol ensuring reliable synchronization of the communication link between the controller and the front-end ASIC, transmission of time-deterministic commands to the ASIC and efficient readout of data. The paper describes the FPGA-based tester platform which can be used both for the verification of the protocol implementation in a front-end ASIC at the design stage, and for testing of the produced ASICs. Due to its modularity, the platform can be easily adapted for different integrated circuits and readout systems.

  18. Command Interface ASIC - Analog Interface ASIC Chip Set

    NASA Technical Reports Server (NTRS)

    Ruiz, Baldes; Jaffe, Burton; Burke, Gary; Lung, Gerald; Pixler, Gregory; Plummer, Joe; Katanyoutanant,, Sunant; Whitaker, William

    2003-01-01

    A command interface application-specific integrated circuit (ASIC) and an analog interface ASIC have been developed as a chip set for remote actuation and monitoring of a collection of switches, which can be used to control generic loads, pyrotechnic devices, and valves in a high-radiation environment. The command interface ASIC (CIA) can be used alone or in combination with the analog interface ASIC (AIA). Designed primarily for incorporation into spacecraft control systems, they are also suitable for use in high-radiation terrestrial environments (e.g., in nuclear power plants and facilities that process radioactive materials). The primary role of the CIA within a spacecraft or other power system is to provide a reconfigurable means of regulating the power bus, actuating all valves, firing all pyrotechnic devices, and controlling the switching of power to all switchable loads. The CIA is a mixed-signal (analog and digital) ASIC that includes an embedded microcontroller with supporting fault-tolerant switch control and monitoring circuitry that is capable of connecting to a redundant set of interintegrated circuit (I(sup 2)C) buses. Commands and telemetry requests are communicated to the CIA. Adherence to the I(sup 2)C bus standard helps to reduce development costs by facilitating the use of previously developed, commercially available components. The AIA is a mixed-signal ASIC that includes the analog circuitry needed to connect the CIA to a custom higher powered version of the I(sup 2)C bus. The higher-powered version is designed to enable operation with bus cables longer than those contemplated in the I(sup 2)C standard. If there are multiple higher-power I(sup 2)C-like buses, then there must an AIA between the CIA and each such bus. The AIA includes two identical interface blocks: one for the side-A I(sup 2)C clock and data buses and the other for the side B buses. All the AIAs on each side are powered from a common power converter module (PCM). Sides A and B

  19. Integrated input protection against discharges for Micro Pattern Gas Detectors readout ASICs

    NASA Astrophysics Data System (ADS)

    Fiutowski, T.; Dąbrowski, W.; Koperny, S.; Wiącek, P.

    2017-02-01

    Immunity against possible random discharges inside active detector volume of MPGDs is one of the key aspects that should be addressed in the design of the front-end electronics. This issue becomes particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies, for which the breakdown voltages are in the range of a few Volts. The paper presents the design of various input protection structures integrated in the ASIC manufactured in a 350 nm CMOS process and test results using an electrical circuit to mimic discharges in the detectors.

  20. ASPIC and CABAC: two ASICs to readout and pilot CCD

    NASA Astrophysics Data System (ADS)

    Antilogus, P.; Bailly, P.; Barrillon, P.; Dhellot, M.; El berni, A.; Jeglot, J.; Juramy-Gilles, C.; Lebbolo, H.; Martin, D.; Moniez, M.; Vallerand, P.

    2017-03-01

    For several years, a group of engineers and physicists from LAL and LPNHE have been working on the design of two front end ASICs dedicated to Charge Couple Devices (CCD). ASPIC (Analogue Signal Processing Integrated Circuit), designed in AMS CMOS 0.35 μm 5V technology, is meant to readout and process the analog signals of CCDs. CABAC (Clocks And Biases ASIC for CCDs), designed in AMS CMOS 0.35 μm 50V technology, produces the clocks and biases needed by the CCDs to work at their full potential. This paper presents the performances of the final versions of these two ASICs.

  1. ASIC design in the KM3NeT detector

    NASA Astrophysics Data System (ADS)

    Gajanana, D.; Gromov, V.; Timmer, P.

    2013-02-01

    In the KM3NeT project [1], Cherenkov light from the muon interactions with transparent matter around the detector, is used to detect neutrinos. Photo multiplier tubes (PMT) used as photon sensor, are housed in a glass sphere (aka Optical Module) to detect single photons from the Cherenkov light. The PMT needs high operational voltage ( ~ 1.5 kV) and is generated by a Cockroft-Walton (CW) multiplier circuit. The electronics required to control the PMT's and collect the signals is integrated in two ASIC's namely: 1) a front-end mixed signal ASIC (PROMiS) for the readout of the PMT and 2) an analog ASIC (CoCo) to generate pulses for charging the CW circuit and to control the feedback of the CW circuit. In this article, we discuss the two integrated circuits and test results of the complete setup. PROMiS amplifies the input charge, converts it to a pulse width and delivers the information via LVDS signals. These LVDS signals carry accurate information on the Time of arrival ( < 2 ns) and Time over Threshold. A PROM block provides unique identification to the chip. The chip communicates with the control electronics via an I2C bus. This unique combination of the ASIC's results in a very cost and power efficient PMT base design.

  2. Development of the read-out ASIC for muon chambers

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Bulbakov, I.; Gusev, A.; Malankin, E.; Normanov, D.; Sagdiev, I.; Shumikhin, V.; Shumkin, O.; Ivanov, P.; Vinogradov, S.; Voronin, A.; Samsonov, V.; Ivanov, V.

    2016-02-01

    A front-end prototype ASIC for muon chambers is presented. ASIC was designed and prototyped in the CMOS UMC MMRF 180 nm process via Europractice. The chip includes 8 analog processing channels, each consisting of a preamplifier, two shapers (fast and slow), differential comparator and an area efficient 6 bit SAR ADC with 1.2 mW power consumption at 50 Msps. The chip also includes the threshold DAC and digital serializer. The design has the following features: dynamic range of 100 fC, channel hit rate of 2 MHz, ENC of 1000 e- at 50 pF, power consumption of 10 mW per channel, 6 bit SAR ADC.

  3. Digital matched filter ASIC

    NASA Astrophysics Data System (ADS)

    Magill, D. T.; Edwards, G.

    The architecture of a digital matched filter (DMF) and the selected technology used is described. The characteristics of the DMF ASIC are summarized in tabular form. Three architectures are considered for the implementation of a DMF ASIC. First, there is the conventional trapped delay line architecture which requires a large adder tree. The second architecture is the systolic array DMF which consists of a number of identical stages cascaded together. The third architecture is the bank-of-correlators DMF, in which the reference code is recirculated around through the delay line. Since the objective is to maximize the length of the DMF, the tapped delay line architecture is selected. The tapped delay form is designed to support BPSK, QPSK, and OQPSK chip modulation. Matched filter lengths of up to 256 chips can be supported by cascading 4 ASICs. The DMF is designed as a gate array using an advanced double metal, 1.5 micron CMOS process. The regularity of FIR filter architecture allows the core of the device to be laid out very compactly, resulting in efficient usage of the gate array.

  4. Simultaneous Disruption of Mouse ASIC1a, ASIC2 and ASIC3 Genes Enhances Cutaneous Mechanosensitivity

    PubMed Central

    Kang, Sinyoung; Jang, Jun Ho; Price, Margaret P.; Gautam, Mamta; Benson, Christopher J.; Gong, Huiyu; Welsh, Michael J.; Brennan, Timothy J.

    2012-01-01

    Three observations have suggested that acid-sensing ion channels (ASICs) might be mammalian cutaneous mechanoreceptors; they are structurally related to Caenorhabditis elegans mechanoreceptors, they are localized in specialized cutaneous mechanosensory structures, and mechanical displacement generates an ASIC-dependent depolarization in some neurons. However, previous studies of mice bearing a single disrupted ASIC gene showed only subtle or no alterations in cutaneous mechanosensitivity. Because functional redundancy of ASIC subunits might explain limited phenotypic alterations, we hypothesized that disrupting multiple ASIC genes would markedly impair cutaneous mechanosensation. We found the opposite. In behavioral studies, mice with simultaneous disruptions of ASIC1a, -2 and -3 genes (triple-knockouts, TKOs) showed increased paw withdrawal frequencies when mechanically stimulated with von Frey filaments. Moreover, in single-fiber nerve recordings of cutaneous afferents, mechanical stimulation generated enhanced activity in A-mechanonociceptors of ASIC TKOs compared to wild-type mice. Responses of all other fiber types did not differ between the two genotypes. These data indicate that ASIC subunits influence cutaneous mechanosensitivity. However, it is unlikely that ASICs directly transduce mechanical stimuli. We speculate that physical and/or functional association of ASICs with other components of the mechanosensory transduction apparatus contributes to normal cutaneous mechanosensation. PMID:22506072

  5. TOFPET ASIC for PET applications

    NASA Astrophysics Data System (ADS)

    Rolo, M. D.; Bugalho, R.; Gonçalves, F.; Mazza, G.; Rivetti, A.; Silva, J. C.; Silva, R.; Varela, J.

    2013-02-01

    A 64-channel ASIC for Time-of-Flight Positron Emission Tomography (TOF PET) imaging has been designed and simulated. The circuit is optimized for the readout of signals produced by the scintillation of a L(Y)SO crystal optically coupled to a silicon photomultiplier (SiPM). Developed in the framework of the EndoTOFPET-US collaboration [1], the ASIC is integrated in the external PET plate and performs timing, digitization and data transmission for 511 keV and lower-energy events due to Compton scattering. Multi-event buffering capability allows event rates up to 100 kHz per channel. The channel cell includes a low input impedance low-noise current conveyor and two trans-impedance amplifier branches separately optimized for energy and time resolution. Two voltage mode discriminators generate respectively a fast trigger for accurate timing and a signal for time-over-threshold calculation, used for charge measurement. The digitization of these signals is done by two low-power TDCs, providing coarse and fine time stamps that are saved into a local register and later managed by a global controller, which builds-up the 40-bit event data and runs the interface with the data acquisition back-end. Running at 160 MHz the chip yields a 50 ps time binning and dissipates ≊ 7 mW per channel (simulated for 40 kHz event rate p/channel) for high capacitance photodetectors (9 mm2 active area Silicon Photomultiplier with 320 pF terminal capacitance). The minimum SNR of 23.5 dB expected with this capacitance should allow triggering on the first photoelectron to achieve the envisaged timing performance for a TOF-PET system.

  6. Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC

    SciTech Connect

    Khalid, Farah F.; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond J.; /Fermilab

    2010-11-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12 keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  7. Monolithic active pixel matrix with binary counters (MAMBO III) ASIC

    SciTech Connect

    Khalid, Farah; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond; /Fermilab

    2010-01-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  8. SPIDR, a general-purpose readout system for pixel ASICs

    NASA Astrophysics Data System (ADS)

    van der Heijden, B.; Visser, J.; van Beuzekom, M.; Boterenbrood, H.; Kulis, S.; Munneke, B.; Schreuder, F.

    2017-02-01

    The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a "soft core" CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four 10 Gigabit

  9. Performance of Front-End Readout System for PHENIX RICH

    SciTech Connect

    Oyama, K.; Hamagaki, H.; Nishimura, S.; Shigaki, K.; Hayano, R.S.; Hibino, M.; Kametani, S.; Kikuchi, J.; Matsumoto, T.; Sakaguchi, T.; Ebisu, K.; Hara, H.; Tanaka, Y.; Ushiroda, T.; Moscone, C.G.; Wintenberg, A.L.; Young, G.R.

    1999-11-15

    A front-end electronics system has been developed for the Ring Imaging Cerenkov (RICH) detector of the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC), Brookhaven National Laboratory (BNL). A high speed custom back-plane with source synchronous bus architecture, a full custom analog ASIC, and board modules with FPGA's and CPLD's were developed for high performance real time data acquisition. The transfer rate of the back-lane has reached 640 MB/s with 128 bits data bus. Total transaction time is estimated to be less than 30 {micro}s per event. The design specifications and test results of the system are presented in this paper.

  10. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  11. A 64-channel readout ASIC for nanowire biosensor array with electrical calibration scheme.

    PubMed

    Chai, Kevin T C; Choe, Kunil; Bernal, Olivier D; Gopalakrishnan, Pradeep K; Zhang, Guo-Jun; Kang, Tae Goo; Je, Minkyu

    2010-01-01

    A 1.8-mW, 18.5-mm(2) 64-channel current readout ASIC was implemented in 0.18-µm CMOS together with a new calibration scheme for silicon nanowire biosensor arrays. The ASIC consists of 64 channels of dedicated readout and conditioning circuits which incorporate correlated double sampling scheme to reduce the effect of 1/f noise and offset from the analog front-end. The ASIC provides a 10-bit digital output with a sampling rate of 300 S/s whilst achieving a minimum resolution of 7 pA(rms). A new electrical calibration method was introduced to mitigate the issue of large variations in the nano-scale sensor device parameters and optimize the sensor sensitivity. The experimental results show that the proposed calibration technique improved the sensitivity by 2 to 10 times and reduced the variation between dataset by 9 times.

  12. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

    PubMed

    Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

    2015-07-01

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  13. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    SciTech Connect

    Bolotnikov, A. E. Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hossain, A.; Mahler, G.; Maritato, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B.; Hodges, D.; Lee, W.; Petryk, M.

    2015-07-15

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  14. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    SciTech Connect

    Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hodges, D.; Hossain, A.; Lee, W.; Mahler, G.; Maritato, M.; Petryk, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B.

    2015-07-28

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  15. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    DOE PAGES

    Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; ...

    2015-07-28

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics.more » The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less

  16. Mongoose ASIC microcontroller programming guide

    NASA Astrophysics Data System (ADS)

    Smith, Brian S.

    1993-09-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  17. Mongoose ASIC microcontroller programming guide

    NASA Technical Reports Server (NTRS)

    Smith, Brian S.

    1993-01-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  18. Development of a dedicated readout ASIC for TPC based X-ray polarimeter

    NASA Astrophysics Data System (ADS)

    Zhang, Hongyan; Deng, Zhi; Li, Hong; Liu, Yinong; Feng, Hua

    2016-07-01

    X-ray polarimetry with time projection chambers was firstly proposed by JK Black in 2007 and has been greatly developed since then. It measured two dimensional photoelectron tracks with one dimensional strip and the other dimension was estimated by the drift time from the signal waveforms. A readout ASIC, APV25, originally developed for CMS silicon trackers was used and has shown some limitations such as waveform sampling depth. A dedicated ASIC was developed for TPC based X-ray polarimeters in this paper. It integrated 32 channel circuits and each channel consisted of an analog front-end and a waveform sampler based on switched capacitor array. The analog front-end has a charge sensitive preamplifier with a gain of 25 mV/fC, a CR-RC shaper with a peaking time of 25 ns, a baseline holder and a discriminator for self-triggering. The SCA has a buffer latency of 3.2 μs with 64 cells operating at 20 MSPS. The ASIC was fabricated in a 0.18 μm CMOS process. The equivalent noise charge (ENC) of the analog front-end was measured to be 274.8 e+34.6 e/pF. The effective resolution of the SCA was 8.8 bits at sampling rate up to 50 MSPS. The total power consumption was 2.8 mW per channel. The ASIC was also tested with real TPC detectors and two dimensional photoelectron tracks have been successfully acquired. More tests and analysis on the sensitivity to the polarimetry are undergoing and will be presented in this paper.

  19. ASIC-enabled High Resolution Optical Time Domain Reflectometer

    NASA Astrophysics Data System (ADS)

    Skendzic, Sandra

    Fiber optics has become the preferred technology in communication systems because of what it has to offer: high data transmission rates, immunity to electromagnetic interference, and lightweight, flexible cables. An optical time domain reflectometer (OTDR) provides a convenient method of locating and diagnosing faults (e.g. break in a fiber) along a fiber that can obstruct crucial optical pathways. Both the ability to resolve the precise location of the fault and distinguish between two discrete, closely spaced faults are figures of merit. This thesis presents an implementation of a high resolution OTDR through the use of a compact and programmable ASIC (application specific integrated circuit). The integration of many essential OTDR functions on a single chip is advantageous over existing commercial instruments because it enables small, lightweight packaging, and offers low power and cost efficiency. Furthermore, its compactness presents the option of placing multiple ASICs in parallel, which can conceivably ease the characterization of densely populated fiber optic networks. The OTDR ASIC consists of a tunable clock, pattern generator, precise timer, electrical receiver, and signal sampling circuit. During OTDR operation, the chip generates narrow electrical pulse, which can then be converted to optical format when coupled with an external laser diode driver. The ASIC also works with an external photodetector to measure the timing and amplitude of optical reflections in a fiber. It has a 1 cm sampling resolution, which allows for a 2 cm spatial resolution. While this OTDR ASIC has been previously demonstrated for multimode fiber fault diagnostics, this thesis focuses on extending its functionality to single mode fiber. To validate this novel approach to OTDR, this thesis is divided into five chapters: (1) introduction, (2) implementation, (3), performance of ASIC-based OTDR, (4) exploration in optical pre-amplification with a semiconductor optical amplifier, and

  20. The VeloPix ASIC

    NASA Astrophysics Data System (ADS)

    Poikela, T.; Ballabriga, R.; Buytaert, J.; Llopart, X.; Wong, W.; Campbell, M.; Wyllie, K.; van Beuzekom, M.; Schipper, J.; Miryala, S.; Gromov, V.

    2017-01-01

    VeloPix, a 130 nm CMOS technology chip with data driven and zero suppressed readout, will be used as a readout chip for the hybrid pixel system of the LHCb Vertex Locator (VELO) upgrade. The upgrade, scheduled for LHC Run-3, will enable the experiment to be read out at 40 MHz in trigger-less mode, with event selection being performed in the CPU farm. The highest occupancy ASICs will experience rates of more than 900 Mhits/s, and the closest pixels are 5.1 mm from the LHC beams. This paper will present the VeloPix ASIC along with the first test results without a sensor.

  1. Rad-Hard Structured ASIC Body of Knowledge

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2013-01-01

    Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between traditional ASICs and Field-Programmable Gate Arrays (FPGA). The motivation behind structured ASICs is to combine the low nonrecurring engineering costs (NRE) costs of FPGAs with the high performance of ASICs. This report provides an overview of the structured ASIC platforms that are radiation-hardened and intended for space application

  2. Spectral response of the energy-binning Dosepix ASIC coupled to a 300 μm silicon sensor under high fluxes of synchrotron radiation

    NASA Astrophysics Data System (ADS)

    Fröjdh, E.; Bisello, F.; Campbell, M.; Damet, J.; Hamann, E.; Koenig, T.; Wong, W. S.; Zuber, M.

    2015-12-01

    The Dosepix hybrid pixel detector was designed for dosimetry and radiation monitoring applications. It has three programmable modes of operation: photon counting mode, energy integration mode, and dosimetry mode. The dosimetry mode measures the energy of individual X-ray photons and automatically sorts events into pre-defined energy bins. The output is a histogram representing the measured X-ray energy spectrum, permitting a dose reconstruction that accounts for the attenuation of photons at each energy bin. This presents a potential radiation protection and dosimetry instrument in medical radiodiagnostic practices, including high flux systems such as computed tomography (CT). In this paper, we characterise the Dosepix chip by investigating the energy response and count rate capabilities when coupled to a 300 μm silicon sensor under high fluxes of monochromatic synchrotron radiation. Under nominal settings, the Dosepix detector can detect photons down to 3.5 keV, with an energy resolution of 16.5% FWHM for 8.5 keV photons and 8% FWHM for 40 keV photons. The chip can count up to 1.67 Mcps/mm2 of 40 keV photons whilst maintaining linear counting behaviour. This count rate range can be further increased by changing the programmable operating settings of the detector, making it suitable for a range of photon dosimetry applications.

  3. GEMMA and GEMINI, two dedicated mixed-signal ASICs for Triple-GEM detectors readout

    NASA Astrophysics Data System (ADS)

    Pezzotta, A.; Croci, G.; Costantini, A.; De Matteis, M.; Tagnani, D.; Corradi, G.; Murtas, F.; Gorini, G.; Baschirotto, A.

    2016-03-01

    GEMMA and GEMINI, two integrated-circuit front-ends for the Triple-GEM detector are presented. These two ASICs aim to improve detector readout performance in terms of count rate, adaptability, portability and power consumption. GEMMA target is to embed counting, timing and spectroscopic measurements in a single 8-channel device, managing a detector capacitance up to 15 pF. On the other hand, GEMINI is dedicated to counting measurements, embedding 16 channels with a detector capacitance up to 40 pF. Both prototypes, fabricated in 130 nm and 180 nm CMOS respectively, feature an automatic on-chip calibration circuit, compensating for process/temperature variations.

  4. Acid-Sensing Ion Channel 2a (ASIC2a) Promotes Surface Trafficking of ASIC2b via Heteromeric Assembly

    PubMed Central

    Kweon, Hae-Jin; Kim, Dong-Il; Bae, Yeonju; Park, Jae-Yong; Suh, Byung-Chang

    2016-01-01

    Acid-sensing ion channels (ASICs) are proton-activated cation channels that play important roles as typical proton sensors during pathophysiological conditions and normal synaptic activities. Among the ASIC subunits, ASIC2a and ASIC2b are alternative splicing products from the same gene, ACCN1. It has been shown that ASIC2 isoforms have differential subcellular distribution: ASIC2a targets the cell surface by itself, while ASIC2b resides in the ER. However, the underlying mechanism for this differential subcellular localization remained to be further elucidated. By constructing ASIC2 chimeras, we found that the first transmembrane (TM1) domain and the proximal post-TM1 domain (17 amino acids) of ASIC2a are critical for membrane targeting of the proteins. We also observed that replacement of corresponding residues in ASIC2b by those of ASIC2a conferred proton-sensitivity as well as surface expression to ASIC2b. We finally confirmed that ASIC2b is delivered to the cell surface from the ER by forming heteromers with ASIC2a, and that the N-terminal region of ASIC2a is additionally required for the ASIC2a-dependent membrane targeting of ASIC2b. Together, our study supports an important role of ASIC2a in membrane targeting of ASIC2b. PMID:27477936

  5. STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.

    1997-12-31

    The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. We describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  6. Acid-sensing ion channels (ASICs): therapeutic targets for neurological diseases and their regulation.

    PubMed

    Kweon, Hae-Jin; Suh, Byung-Chang

    2013-06-01

    Extracellular acidification occurs not only in pathological conditions such as inflammation and brain ischemia, but also in normal physiological conditions such as synaptic transmission. Acid-sensing ion channels (ASICs) can detect a broad range of physiological pH changes during pathological and synaptic cellular activities. ASICs are voltage-independent, proton-gated cation channels widely expressed throughout the central and peripheral nervous system. Activation of ASICs is involved in pain perception, synaptic plasticity, learning and memory, fear, ischemic neuronal injury, seizure termination, neuronal degeneration, and mechanosensation. Therefore, ASICs emerge as potential therapeutic targets for manipulating pain and neurological diseases. The activity of these channels can be regulated by many factors such as lactate, Zn(2+), and Phe-Met-Arg-Phe amide (FMRFamide)-like neuropeptides by interacting with the channel's large extracellular loop. ASICs are also modulated by G protein-coupled receptors such as CB1 cannabinoid receptors and 5-HT2. This review focuses on the physiological roles of ASICs and the molecular mechanisms by which these channels are regulated.

  7. Testing of the front-end hybrid circuits for the CMS Tracker upgrade

    NASA Astrophysics Data System (ADS)

    Gadek, T.; Blanchot, G.; Honma, A.; Kovacs, M.; Raymond, M.; Rose, P.

    2017-01-01

    The upgrade of the CMS Tracker for the HL-LHC requires the design of new double-sensor, silicon detector modules, which implement Level 1 trigger functionality in the increased luminosity environment. These new modules will contain two different, high-density front-end hybrid circuits, equipped with flip-chip ASICs, auxiliary electronic components and mechanical structures. The hybrids require qualification tests before they are assembled into modules. Test methods are proposed together with the corresponding test hardware and software. They include functional tests and signal injection in a cold environment to find possible failure modes of the hybrids under real operating conditions.

  8. SODR Memory Control Buffer Control ASIC

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.

    1994-01-01

    The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

  9. ERICA: an energy resolving photon counting readout ASIC for X-ray in-line cameras

    NASA Astrophysics Data System (ADS)

    Macias-Montero, J.-G.; Sarraj, M.; Chmeissani, M.; Moore, T.; Casanova, R.; Martinez, R.; Puigdengoles, C.; Prats, X.; Kolstein, M.

    2016-12-01

    We present ERICA (Energy Resolving Inline X-ray Camera) a photon-counting readout ASIC, with 6 energy bins. The ASIC is composed of a matrix of 8 × 20 pixels controlled by a global digital controller and biased with 7 independent digital to analog converters (DACs) and a band-gap current reference. The pixel analog front-end includes a charge sensitive amplifier with 16 mV/ke- gain and dynamic range of 45 ke-. ERICA has programmable pulse width, an adjustable constant current feedback resistor, a linear test pulse generator, and six discriminators with 6-bit local threshold adjustment. The pixel digital back-end includes the digital controller, 8 counters of 8-bit depth, half-full buffer flag for any of the 8 counters, a 74-bit shadow/shift register, a 74-bit configuration latch, and charge sharing compensation processing to perform the energy classification and counting operations of every detected photon in 1 μ s. The pixel size is 330 μm × 330 μm and its average consumption is 150 μW. Implemented in TSMC 0.25 μm CMOS process, the ASIC pixel's equivalent noise charge (ENC) is 90 e- RMS connected to a 1 mm thickness matching CdTe detector biased at -300 V with a total leakage current of 20 nA.

  10. A 130 nm ASIC prototype for the NA62 Gigatracker readout

    NASA Astrophysics Data System (ADS)

    Dellacasa, G.; Garbolino, S.; Marchetto, F.; Martoiu, S.; Mazza, G.; Rivetti, A.; Wheadon, R.

    2011-09-01

    One of the most challenging detectors of the NA62 experiment is the silicon tracker, called Gigatracker. It consists of three hybrid silicon pixel stations, each one covering an area of 27 mm×60 mm. While the maximum pixel size is fairly large, 300 μm×300 μm the system has to sustain a very high particle rate, 1.5 MHz/mm 2, which corresponds to 800 MHz for each station. To obtain an efficient tracking with such a high rate the required track timing resolution is 150 ps (rms). Therefore the front-end ASIC should provide for each pixel a 200 ps time measurement capability, thus leading to the requirement of time walk compensation and very compact TDCs. Moreover, Single Event Upset protection has to be implemented in order to protect the digital circuitry. An ASIC prototype has been realized in CMOS 130 nm technology, containing three pixel columns. The chip performs the time walk compensation by a Constant Fraction Discriminator circuit, while the time measurement is performed by a Time to Amplitude Converter based TDC, both of them implemented on each pixel cell. The End of Column circuit containing only digital logic is responsible for the data readout from the pixel cell. The whole chip works with a system clock of 160 MHz and the digital logic is SEU protected by the use of Hamming codes. The detailed architecture of the ASIC prototype and test results are presented.

  11. High Rate Digital Demodulator ASIC

    NASA Technical Reports Server (NTRS)

    Ghuman, Parminder; Sheikh, Salman; Koubek, Steve; Hoy, Scott; Gray, Andrew

    1998-01-01

    The architecture of High Rate (600 Mega-bits per second) Digital Demodulator (HRDD) ASIC capable of demodulating BPSK and QPSK modulated data is presented in this paper. The advantages of all-digital processing include increased flexibility and reliability with reduced reproduction costs. Conventional serial digital processing would require high processing rates necessitating a hardware implementation in other than CMOS technology such as Gallium Arsenide (GaAs) which has high cost and power requirements. It is more desirable to use CMOS technology with its lower power requirements and higher gate density. However, digital demodulation of high data rates in CMOS requires parallel algorithms to process the sampled data at a rate lower than the data rate. The parallel processing algorithms described here were developed jointly by NASA's Goddard Space Flight Center (GSFC) and the Jet Propulsion Laboratory (JPL). The resulting all-digital receiver has the capability to demodulate BPSK, QPSK, OQPSK, and DQPSK at data rates in excess of 300 Mega-bits per second (Mbps) per channel. This paper will provide an overview of the parallel architecture and features of the HRDR ASIC. In addition, this paper will provide an over-view of the implementation of the hardware architectures used to create flexibility over conventional high rate analog or hybrid receivers. This flexibility includes a wide range of data rates, modulation schemes, and operating environments. In conclusion it will be shown how this high rate digital demodulator can be used with an off-the-shelf A/D and a flexible analog front end, both of which are numerically computer controlled, to produce a very flexible, low cost high rate digital receiver.

  12. Automated radiation hard ASIC design tool

    NASA Technical Reports Server (NTRS)

    White, Mike; Bartholet, Bill; Baze, Mark

    1993-01-01

    A commercial based, foundry independent, compiler design tool (ChipCrafter) with custom radiation hardened library cells is described. A unique analysis approach allows low hardness risk for Application Specific IC's (ASIC's). Accomplishments, radiation test results, and applications are described.

  13. σ-1 Receptor Inhibition of ASIC1a Channels is Dependent on a Pertussis Toxin-Sensitive G-Protein and an AKAP150/Calcineurin Complex.

    PubMed

    Mari, Yelenis; Katnik, Christopher; Cuevas, Javier

    2015-10-01

    ASIC1a channels play a major role in various pathophysiological conditions including depression, anxiety, epilepsy, and neurodegeneration following ischemic stroke. Sigma-1 (σ-1) receptor stimulation depresses the activity of ASIC1a channels in cortical neurons, but the mechanism(s) by which σ-1 receptors exert their influence on ASIC1a remains unknown. Experiments were undertaken to elucidate the signaling cascade linking σ-1 receptors to ASIC1a channels. Immunohistochemical studies showed that σ-1 receptors, ASIC1a and A-kinase anchoring peptide 150 colocalize in the plasma membrane of the cell body and processes of cortical neurons. Fluorometric Ca(2+) imaging experiments showed that disruption of the macromolecular complexes containing AKAP150 diminished the effects of the σ-1 on ASIC1a, as did application of the calcineurin inhibitors, cyclosporin A and FK-506. Moreover, whole-cell patch clamp experiments showed that σ-1 receptors were less effective at decreasing ASIC1a-mediated currents in the presence of the VIVIT peptide, which binds to calcineurin and prevents cellular effects dependent on AKAP150/calcineurin interaction. The coupling of σ-1 to ASIC1a was also disrupted by preincubation of the neurons in the G-protein inhibitor, pertussis toxin (PTX). Taken together, our data reveal that σ-1 receptor block of ASIC1a function is dependent on activation of a PTX-sensitive G-protein and stimulation of AKAP150 bound calcineurin.

  14. A front end ASIC for the readout of the PMT in the KM3NeT detector

    NASA Astrophysics Data System (ADS)

    Gajanana, D.; Gromov, V.; Timmer, P.; Heine, E.; Kluit, R.

    2010-12-01

    In this work, we describe the front end ASIC to readout the Photo-Multiplier-Tube of the KM3NeT detector, in detail. Stringent power budgeting, area constraints and lowering cost motivate us to design a custom front-end ASIC for reading the PMT. The ASIC amplifies the PMT signal and discriminates it against a threshold level and delivers the information via low voltage differential signals (LVDS). These LVDS signals carry highly accurate timing information of the photons . The length of the LVDS signals or Time over Threshold (ToT) gives information on the number of detected photons. A one-time programmable read-only memory (PROM) block provides unique identification to the chip. The chip communicates with the data acquisition electronics via an I2C bus. The data is transmitted to shore via fiber optics, where processing is done. The ASIC was fabricated in 0.35u CMOS process from AustriaMicroSystems (AMS).

  15. Ionizing radiation effects on a 64-channel charge measurement ASIC designed in CMOS 0.35 μm technology

    NASA Astrophysics Data System (ADS)

    La Rosa, A.; Marchetto, F.; Pardo, J.; Donetti, M.; Attili, A.; Bourhaleb, F.; Cirio, R.; Garella, M. A.; Giordanengo, S.; Givehchi, N.; Iliescu, S.; Mazza, G.; Pecka, A.; Peroni, C.; Pittà, G.

    2008-08-01

    A 64-channel circuit Application Specific Integrated Circuit (ASIC) for charge measurement has been designed in CMOS 0.35 μm technology and characterized with electrical tests. The ASIC has been conceived to be used as a front-end for dosimetry and beam monitoring detector read-out. For that application, the circuitry is housed at a few centimeters from the irradiated area of the detectors and therefore radiation damages can affect the chip performances. The ASIC has been tested on an X-ray beam. In this paper, the results of the test and an estimate of the expected lifetime of the ASIC in a standard radio-therapeutical treatment environment are presented. An increase of the background current of 2 fA/Gy has been observed at low doses, whilst the gain changes by less than 3% when irradiated up to 15 kGy. Furthermore it has been assessed that, when used as an on-line beam monitor and the annealing effect has been taken into account, the background current increase is ˜440 fA/year.

  16. Design and test of a 64-channel charge measurement ASIC developed in CMOS 0.35 μm technology

    NASA Astrophysics Data System (ADS)

    La Rosa, A.; Mazza, G.; Donetti, M.; Marchetto, F.; Luetto, L.; Attili, A.; Bourhaleb, F.; Cirio, R.; Garella, M. A.; Giordanengo, S.; Givehchi, N.; Iliescu, S.; Pardo, J.; Pecka, A.; Peroni, C.; Pittà, G.

    2007-12-01

    A 64-channel charge measurement (Application-Specific Integrated Circuit) ASIC has been designed and tested: it is intended to serve as a front-end electronic read-out for detectors to monitor and measure radiotherapeutical beams. The ASIC has been designed in a CMOS 0.35 μm technology with particular attention to the linearity over a wide input range and can accept currents of both polarities. The linearity is better than 1.5% for a dynamic range of the input current between 500 pA and 3 μA. For a charge resolution of 350 fC, the spread (r.m.s.) of the gain is less than 1%.

  17. Front-end electronics for DEPFET pixel detectors at SuperBelle (BELLE II)

    NASA Astrophysics Data System (ADS)

    Krüger, Hans; Depfet Collaboration

    2010-05-01

    This article gives an overview of the front-end electronics development for the DEPFET pixel vertex detector at the Super KEK-B experiment (BELLE II). The planned upgrade of the KEK-B factory will lead to a peak luminosity of 8×1035 cm-2 s-1. This increase in luminosity (×50 compared to the existing experiment) will make high demands on the performance of the vertex detector. The proposed two layer vertex detector consists of 'all-silicon' modules: the read-out and control ASICs will be bump bonded on the rigid edges of the DEPFET substrate whereas in the region of the active pixel matrix the substrate will be thinned down to 50 μm. The front-end electronics is subdivided in three different ASIC types: one chip will provide up to 20 V output swing for the control voltages of the DEPFET matrix (SWITCHER), the current signals are being digitized by a multichannel ADC chip (DCD) and the processing of the digital data and module control functionality is implemented in a data handling chip (DHP). An overview of the module concept and the status of the developments including results of current prototype chips will be given.

  18. High Performances and Low Cost Front-End Electronics for the Cherenkov Telescope Array

    SciTech Connect

    Vincent, P.; Nayman, P.; Toussenel, F.; Delagnes, E.; Glicenstein, J.-F.; Hermann, G.

    2008-12-24

    The current Imaging Arrays of Cherenkov Telescopes (IACT) show that this technique is mature. Front-end electronics based on analogue pipelines become a popular readout solution. Slow noise and low power consumption ASICs were developed with improved dynamical range and linearity. A large bandwidth preserves the characteristics of the signal and fast readout reduces dead time. Next generation of IACT should reach an order of magnitude in sensitivity in a wide energy band, ranging from 10 GeV to more than 100 TeV. This goal can be reached with an array of 50-100 telescopes of various sizes at various spacings. With about 2 000 channels per camera a significant effort must be done to lower the overall cost and improve the performances of the electronics. Mass production will be determinant for lowering the overall cost. A gain in cost and performances can be obtained by maximising the integration of the front-end electronics in an ASIC. The amplifiers, analogue memories, digitization and first level buffering can be embedded in the same component. The first stage of the first level trigger should be also considered in this integration. Integrated electronics leads to a more compact camera and an easier maintenance on site.

  19. ASIC2a-dependent increase of ASIC3 surface expression enhances the sustained component of the currents

    PubMed Central

    Kweon, Hae-Jin; Cho, Jin-Hwa; Jang, Il-Sung; Suh, Byung-Chang

    2016-01-01

    Acid-sensing ion channels (ASICs) are proton-gated cation channels widely expressed in the nervous system. Proton sensing by ASICs has been known to mediate pain, mechanosensation, taste transduction, learning and memory, and fear. In this study, we investigated the differential subcellular localization of ASIC2a and ASIC3 in heterologous expression systems. While ASIC2a targeted the cell surface itself, ASIC3 was mostly accumulated in the ER with partial expression in the plasma membrane. However, when ASIC3 was co-expressed with ASIC2a, its surface expression was markedly increased. By using bimolecular fluorescence complementation (BiFC) assay, we confirmed the heteromeric association between ASIC2a and ASIC3 subunits. In addition, we observed that the ASIC2a-dependent surface trafficking of ASIC3 remarkably enhanced the sustained component of the currents. Our study demonstrates that ASIC2a can increase the membrane conductance sensitivity to protons by facilitating the surface expression of ASIC3 through herteromeric assembly. [BMB Reports 2016; 49(10): 542-547] PMID:27241858

  20. Front-end electronics and data acquisition system for imaging atmospheric Cherenkov telescopes

    NASA Astrophysics Data System (ADS)

    Chen, Y. T.; de La Taille, C.; Suomijärvi, T.; Cao, Z.; Deligny, O.; Dulucq, F.; Ge, M. M.; Lhenry-Yvon, I.; Martin-Chassard, G.; Nguyen Trung, T.; Wanlin, E.; Xiao, G.; Yin, L. Q.; Yun Ky, B.; Zhang, L.; Zhang, H. Y.; Zhang, S. S.; Zhu, Z.

    2015-09-01

    In this paper, a front-end electronics based on an application-specific integrated circuit (ASIC) is presented for the future imaging atmospheric Cherenkov telescopes (IACTs). To achieve this purpose, a 16-channel ASIC chip, PARISROC 2 (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is used in the analog signal processing and digitization. The digitized results are sent to the server by a user-defined User Datagram Protocol/Internet Protocol (UDP/IP) hardcore engine through Ethernet that is managed by a FPGA. A prototype electronics fulfilling the requirements of the Wide Field of View Cherenkov Telescope Array (WFCTA) of the Large High Altitude Air Shower Observatory (LHAASO) project has been designed, fabricated and tested to prove the concept of the design. A detailed description of the development with the results of the test measurements are presented. By using a new input structure and a new configuration of the ASIC, the dynamic range of the circuit is extended. A highly precise-time calibrating algorithm is also proposed, verified and optimized for the mass production. The test results suggest that the proposed electronics design fulfills the general specification of the future IACTs.

  1. ASICs as therapeutic targets for migraine

    PubMed Central

    2015-01-01

    Migraine is the most common neurological disorder and one of the most common chronic pain conditions. Despite its prevalence, the pathophysiology leading to migraine is poorly understood and the identification of new therapeutic targets has been slow. Several processes are currently thought to contribute to migraine including altered activity in the hypothalamus, cortical-spreading depression (CSD), and afferent sensory input from the cranial meninges. Decreased extracellular pH and subsequent activation of acid-sensing ion channels (ASICs) may contribute to each of these processes and may thus play a role in migraine pathophysiology. Although few studies have directly examined a role of ASICs in migraine, studies directly examining a connection have generated promising results including efficacy of ASIC blockers in both preclinical migraine models and in human migraine patients. The purpose of this review is to discuss the pathophysiology thought to contribute to migraine and findings that implicate decreased pH and/or ASICs in these events, as well as propose issues to be resolved in future studies of ASICs and migraine. PMID:25582295

  2. XAMPS Detectors Readout ASIC for LCLS

    SciTech Connect

    Dragone, A; Pratte, J.F.; Rehak, P.; Carini, G.A.; Herbst, R.; O'Connor, P.; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  3. Burst Mode ASIC-Based Modem

    NASA Technical Reports Server (NTRS)

    1997-01-01

    The NASA Lewis Research Center is sponsoring the Advanced Communication Technology Insertion (ACTION) for Commercial Space Applications program. The goal of the program is to expedite the development of new technology with a clear path towards productization and enhancing the competitiveness of U.S. manufacturers. The industry has made significant investment in developing ASIC-based modem technology for continuous-mode applications and has made investigations into East, reliable acquisition of burst-mode digital communication signals. With rapid advances in analog and digital communications ICs, it is expected that more functions will be integrated onto these parts in the near future. In addition custom ASIC's can also be developed to address the areas not covered by the other IC's. Using the commercial chips and custom ASIC's, lower-cost, compact, reliable, and high-performance modems can be built for demanding satellite communication application. This report outlines a frequency-hop burst modem design based on commercially available chips.

  4. 8-channel prototype of SALT readout ASIC for Upstream Tracker in the upgraded LHCb experiment

    NASA Astrophysics Data System (ADS)

    Abellan Beteta, C.; Bugiel, S.; Dasgupta, R.; Firlej, M.; Fiutowski, T.; Idzik, M.; Kane, C.; Moron, J.; Swientek, K.; Wang, J.

    2017-02-01

    SALT is a new 128-channel readout ASIC for silicon strip detectors in the upgraded Upstream Tracker of the LHCb experiment. It will extract and digitise analogue signals from the sensor, perform digital processing and transmit serial output data. SALT is designed in CMOS 130 nm process and uses a novel architecture comprising of an analogue front-end and an ultra-low power (<0.5 mW) fast (40 MSps) sampling 6-bit ADC in each channel. An 8-channel prototype (SALT8), comprising all important functionalities was designed, fabricated and tested. A full 128-channel version was also submitted. The design and test results of the SALT8 prototype are presented showing its full functionality.

  5. Design Methodology: ASICs with complex in-pixel processing for Pixel Detectors

    SciTech Connect

    Fahim, Farah

    2014-10-31

    The development of Application Specific Integrated Circuits (ASIC) for pixel detectors with complex in-pixel processing using Computer Aided Design (CAD) tools that are, themselves, mainly developed for the design of conventional digital circuits requires a specialized approach. Mixed signal pixels often require parasitically aware detailed analog front-ends and extremely compact digital back-ends with more than 1000 transistors in small areas below 100μm x 100μm. These pixels are tiled to create large arrays, which have the same clock distribution and data readout speed constraints as in, for example, micro-processors. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout.

  6. Development of the analog ASIC for multi-channel readout X-ray CCD camera

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Matsuura, Daisuke; Idehara, Toshihiro; Anabuki, Naohisa; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Katayama, Haruyoshi; Kitamura, Hisashi; Uchihori, Yukio

    2011-03-01

    We report on the performance of an analog application-specific integrated circuit (ASIC) developed aiming for the front-end electronics of the X-ray CCD camera system onboard the next X-ray astronomical satellite, ASTRO-H. It has four identical channels that simultaneously process the CCD signals. Distinctive capability of analog-to-digital conversion enables us to construct a CCD camera body that outputs only digital signals. As the result of the front-end electronics test, it works properly with low input noise of ≤30μV at the pixel rate below 100 kHz. The power consumption is sufficiently low of ˜150mW/chip. The input signal range of ±20 mV covers the effective energy range of the typical X-ray photon counting CCD (up to 20 keV). The integrated non-linearity is 0.2% that is similar as those of the conventional CCDs in orbit. We also performed a radiation tolerance test against the total ionizing dose (TID) effect and the single event effect. The irradiation test using 60Co and proton beam showed that the ASIC has the sufficient tolerance against TID up to 200 krad, which absolutely exceeds the expected amount of dose during the period of operating in a low-inclination low-earth orbit. The irradiation of Fe ions with the fluence of 5.2×108 Ion/cm2 resulted in no single event latchup (SEL), although there were some possible single event upsets. The threshold against SEL is higher than 1.68 MeV cm2/mg, which is sufficiently high enough that the SEL event should not be one of major causes of instrument downtime in orbit.

  7. Development of an ASIC for Si/CdTe detectors in a radioactive substance visualizing system

    NASA Astrophysics Data System (ADS)

    Harayama, Atsushi; Takeda, Shin`ichiro; Sato, Goro; Ikeda, Hirokazu; Watanabe, Shin; Takahashi, Tadayuki

    2014-11-01

    We report on the recent development of a 64-channel analog front-end ASIC for a new gamma-ray imaging system designed to visualize radioactive substances. The imaging system employs a novel Compton camera which consists of silicon (Si) and cadmium telluride (CdTe) detectors. The ASIC is intended for the readout of pixel/pad detectors utilizing Si/CdTe as detector materials, and covers a dynamic range up to 1.4 MeV. The readout chip consists of 64 identical signal channels and was implemented with X-FAB 0.35 μm CMOS technology. Each channel contains a charge-sensitive amplifier, a pole-zero cancellation circuit, a low-pass filter, a comparator, and a sample-hold circuit, along with a Wilkinson-type A-to-D converter. We observed an equivalent noise charge of 500 e- and a noise slope of 5 e-/pF (r.m.s.) with a power consumption of 2.1 mW per channel. The chip works well when connected to Schottky CdTe diodes, and delivers spectra with good energy resolution, such as 12 keV (FWHM) at 662 keV and 24 keV (FWHM) at 1.33 MeV.

  8. Development of arrays of Silicon Drift Detectors and readout ASIC for the SIDDHARTA experiment

    NASA Astrophysics Data System (ADS)

    Quaglia, R.; Schembari, F.; Bellotti, G.; Butt, A. D.; Fiorini, C.; Bombelli, L.; Giacomini, G.; Ficorella, F.; Piemonte, C.; Zorzi, N.

    2016-07-01

    This work deals with the development of new Silicon Drift Detectors (SDDs) and readout electronics for the upgrade of the SIDDHARTA experiment. The detector is based on a SDDs array organized in a 4×2 format with each SDD square shaped with 64 mm2 (8×8) active area. The total active area of the array is therefore 32×16 mm2 while the total area of the detector (including 1 mm border dead area) is 34 × 18mm2. The SIDDHARTA apparatus requires 48 of these modules that are designed and manufactured by Fondazione Bruno Kessler (FBK). The readout electronics is composed by CMOS preamplifiers (CUBEs) and by the new SFERA (SDDs Front-End Readout ASIC) circuit. SFERA is a 16-channels readout ASIC designed in a 0.35 μm CMOS technology, which features in each single readout channel a high order shaping amplifier (9th order Semi-Gaussian complex-conjugate poles) and a high efficiency pile-up rejection logic. The outputs of the channels are connected to an analog multiplexer for the external analog to digital conversion. An on-chip 12-bit SAR ADC is also included. Preliminary measurements of the detectors in the single SDD format are reported. Also measurements of low X-ray energies are reported in order to prove the possible extension to the soft X-ray range.

  9. PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector

    NASA Astrophysics Data System (ADS)

    Mazorra, J.; Chanal, H.; Comerma, A.; Gascón, D.; Gómez, S.; Han, X.; Pillet, N.; Vandaele, R.

    2016-02-01

    The LHCb detector will be upgraded during the Long Shutdown 2 (LS2) of the LHC in order to cope with higher instantaneous luminosities and will switch to a 40 MHz readout rate using a trigger-less software based system. All front-end electronics will be replaced and several sub-detectors must be redesigned to cope with the higher detector occupancy and radiation damage. The current tracking detectors downstream of the LHCb dipole magnet will be replaced by the Scintillating Fibre (SciFi) Tracker. The SciFi Tracker will use scintillating fibres read out by Silicon Photomultipliers (SiPMs). State-of-the-art multi-channel SiPM arrays are being developed and a custom ASIC, called the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC), will be used to digitise the signals from the SiPMs. This article presents an overview of the R&D for the PACIFIC. It is a 64-channel ASIC implemented in 130 nm CMOS technology, aiming at a radiation tolerant design with a power consumption below 10 mW per channel. It interfaces directly with the SiPM anode through a current mode input, and provides a configurable non-linear 2-bit per channel digital output. The SiPM signal is acquired by a current conveyor and processed with a fast shaper and a gated integrator. The digitization is performed using a three threshold non-linear flash ADC operating at 40 MHz. Simulation and test results show the PACIFIC chip prototypes functioning well.

  10. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  11. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

    PubMed

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-10-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e(-)RMS at maximum gain and negative polarity conditions has been measured at room temperature.

  12. An ASIC for fast single photon counting in the LHCb RICH upgrade

    NASA Astrophysics Data System (ADS)

    Gotti, C.

    2017-03-01

    The LHCb experiment will be upgraded during the second LHC long shutdown (years 2019–2020) to operate at higher luminosity. The new triggerless architecture of LHCb requires data from the entire detector to be read out at 40 MHz. The basic element of the front-end electronics of the Ring Imaging Cherenkov (RICH) detector upgrade is the "Elementary Cell" (EC), a readout system for multianode photomultiplier tubes designed to minimise parasitic capacitance at the anodes, to obtain a fast readout with low noise and low crosstalk. At the heart of the EC is the CLARO, an 8 channel, low power and radiation hard front-end ASIC designed in 0.35 μm CMOS technology. Each channel compares the charge signals from the photomultiplier anodes with a programmable threshold, and gives a digital pulse at the output when the threshold is exceeded. Baseline recovery occurs in less than 25 ns for typical single photon signals. In the LHCb RICH upgrade environment, the chips will have to withstand radiation up to a total ionising dose of 2 kGy (200 krad) and neutron and hadron fluences up to 03×112 cm‑2 and following irradiation, the chips have been shown to tolerate such doses with a margin of safety.

  13. Double-differential recording and AGC using microcontrolled variable gain ASIC.

    PubMed

    Rieger, Robert; Deng, Shin-Liang

    2013-01-01

    Low-power wearable recording of biopotentials requires acquisition front-ends with high common-mode rejection for interference suppression and adjustable gain to provide an optimum signal range to a cascading analogue-to-digital stage. A microcontroller operated double-differential (DD) recording setup and automatic gain control circuit (AGC) are discussed which reject common-mode interference and provide tunable gain, thus compensating for imbalance and variation in electrode interface impedance. Custom-designed variable gain amplifiers (ASIC) are used as part of the recording setup. The circuit gain and balance is set by the timing of microcontroller generated clock signals. Measured results are presented which confirm that improved common-mode rejection is achieved compared to a single differential amplifier in the presence of input network imbalance. Practical measured examples further validate gain control suitable for biopotential recording and power-line rejection for wearable ECG and EMG recording. The prototype front-end consumes 318 μW including amplifiers and microcontroller.

  14. Characterisation of the NA62 GigaTracker end of column readout ASIC

    NASA Astrophysics Data System (ADS)

    Noy, M.; Aglieri Rinella, G.; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Perktold, L.; Riedler, P.

    2011-01-01

    The architecture and characterisation of the End Of Column demonstrator readout ASIC for the NA62 GigaTracker hybrid pixel detector is presented. This ASIC serves as a proof of principle for a pixel chip with 1800 pixels which must perform time stamping to better than 200 ps (RMS), provide 300 μm pitch position information and operate with a dead-time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator ASIC comprises a full test column with 45 pixels alongside other test structures. The timewalk correction mechanism employed is measurement of the time-over-threshold, coupled with an off-detector look-up table. The time to digital converter is a delay locked loop with 32 contributing delay cells fed with a 320 MHz to yield a nominal bin size of 97 ps. Recently, P-in-N sensors have been bump-bonded to the ASIC and characterisation of these assemblies has begun.

  15. A 65 nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC

    NASA Astrophysics Data System (ADS)

    Ceresa, D.; Kaplon, J.; Francisco, R.; Caratelli, A.; Kloukinas, K.; Marchioro, A.

    2016-01-01

    A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC . The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100 mW/cm2. The choice of a 65 nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40 MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100 μm × 1446 μm, providing 7.65 mm2 of segmented active area. Measurements of the analog front-end characteristics closely match the simulations and confirm the consumption of < 30 μA per pixel. Front-end characterization and irradiation results up to 150 MRad are also reported.

  16. HDI flexible front-end hybrid prototype for the PS module of the CMS tracker upgrade

    NASA Astrophysics Data System (ADS)

    Kovacs, M.; Blanchot, G.; Gadek, T.; Honma, A.; Koliatos, A.

    2017-02-01

    The CMS tracker upgrade for the HL-LHC relies on different module types, depending on the position of the respective module. They are built with high-density interconnection flexible circuits that are wire bonded to silicon strip and pixel-strip sensors. The Front-End hybrids will contain several flip-chip bonded readout ASICs that are still under development. Mock-up prototypes are used to qualify the advanced flexible circuit technology and the parameters of the hybrids. This paper presents the Pixel-Strip (PS) mock-up hybrid in terms of testing, interconnection, fold-over, thermal properties and layout feasibility. Plans for circuit testing at operating temperature (-30o) are also presented.

  17. Performance of the front-end electronics of the ANTARES neutrino telescope

    NASA Astrophysics Data System (ADS)

    Aguilar, J. A.; Al Samarai, I.; Albert, A.; Anghinolfi, M.; Anton, G.; Anvar, S.; Ardid, M.; Assis Jesus, A. C.; Astraatmadja, T.; Aubert, J.-J.; Auer, R.; Baret, B.; Basa, S.; Bazzotti, M.; Bertin, V.; Biagi, S.; Bigongiari, C.; Bou-Cabo, M.; Bouwhuis, M. C.; Brown, A.; Brunner, J.; Busto, J.; Camarena, F.; Capone, A.; Caponetto, L.; Cârloganu, C.; Carminati, G.; Carr, J.; Castorina, E.; Cavasinni, V.; Cecchini, S.; Chaleil, Th.; Charvis; Chiarusi, T.; Chon Sen, N.; Circella, M.; Costantini, H.; Cottini, N.; Coyle, P.; Curtil, C.; de Bonis, G.; de Botton, N.; Dekeyser, I.; Delagnes, E.; Deschamps, A.; Distefano, C.; Donzaud, C.; Dornic, D.; Drouhin, D.; Druillole, F.; Eberl, T.; Emanuele, U.; Ernenwein, J.-P.; Escoffier, S.; Falchini, E.; Fehr, F.; Feinstein, F.; Flaminio, V.; Fopma, J.; Fratini, K.; Fritsch, U.; Fuda, J.-L.; Gay, P.; Giacomelli, G.; Gómez-González, J. P.; Graf, K.; Guillard, G.; Halladjian, G.; Hallewell, G.; Hoffmann, C.; van Haren, H.; Heijboer, A. J.; Hello, Y.; Hernández-Rey, J. J.; Herold, B.; Hößl, J.; de Jong, M.; Kalantar-Nayestanaki, N.; Kalekin, O.; Kappes, A.; Katz, U.; Kooijman, P.; Kopper, C.; Kouchner, A.; Kretschmer, W.; Lachartre, D.; Lafoux, H.; Lahmann, R.; Lamare, P.; Lambard, G.; Larosa, G.; Laschinsky, H.; Le Provost, H.; Le van Suu, A.; Lefèvre, D.; Legou, T.; Lelaizant, G.; Lim, G.; Lo Presti, D.; Loehner, H.; Loucatos, S.; Lucarelli, F.; Mangano, S.; Marcelin, M.; Margiotta, A.; Martinez-Mora, J. A.; Mazure, A.; Monmarthe, E.; Montaruli, T.; Morganti, M.; Moscoso, L.; Motz, H.; Naumann, C.; Neff, M.; Olivetto, Ch.; Ostasch, R.; Palioselitis, D.; Păvăla, G. E.; Payre, P.; Petrovic, J.; Piattelli, P.; Picot-Clemente, N.; Picq, C.; Pineau, J.-P.; Poinsignon, J.; Popa, V.; Pradier, T.; Presani, E.; Racca, C.; Radu, A.; Reed, C.; Réthoré, F.; Riccobene, G.; Richardt, C.; Rujoiu, M.; Russo, G. V.; Salesa, F.; Sapienza, P.; Schöck, F.; Schuller, J. P.; Shanidze, R.; Simeone, F.; Spurio, M.; Steijger, J. J. M.; Stolarczyk, Th.; Tamburini, C.; Tasca, L.; Toscano, S.; Vallage, B.; van Elewyck, V.; Vannoni, G.; Vecchi, M.; Vernin, P.; Wijnker, G.; de Wolf, E.; Yepes, H.; Zaborov, D.; Zornoza, J. D.; Zúñiga, J.; ANTARES Collaboration

    2010-10-01

    ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip; results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated.

  18. Design and performances of a low-noise and radiation-hardened readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Bo, Gan; Tingcun, Wei; Wu, Gao; Yongcai, Hu

    2016-06-01

    In this paper, we present the design and performances of a low-noise and radiation-hardened front-end readout application specific integrated circuit (ASIC) dedicated to CdZnTe detectors for a hard X-ray imager in space applications. The readout channel is comprised of a charge sensitive amplifier, a CR-RC shaping amplifier, an analog output buffer, a fast shaper, and a discriminator. An 8-channel prototype ASIC is designed and fabricated in TSMC 0.35-μm mixed-signal CMOS technology, the die size of the prototype chip is 2.2 × 2.2 mm2. The input energy range is from 5 to 350 keV. For this 8-channel prototype ASIC, the measured electrical characteristics are as follows: the overall gain of the readout channel is 210 V/pC, the linearity error is less than 2%, the crosstalk is less than 0.36%, The equivalent noise charge of a typical channel is 52.9 e- at zero farad plus 8.2 e- per picofarad, and the power consumption is less than 2.4 mW/channel. Through the measurement together with a CdZnTe detector, the energy resolution is 5.9% at the 59.5-keV line under the irradiation of the radioactive source 241Am. The radiation effect experiments show that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad(Si). Project supported by the National Key Scientific Instrument and Equipment Development Project (No. 2011YQ040082), the National Natural Science Foundation of China (Nos. 11475136, 11575144, 61176094), and the Shaanxi Natural Science Foundation of China (No. 2015JM1016).

  19. [Acid-Sensing Ion Channels (ASICs) in pain].

    PubMed

    Lingueglia, Eric

    2014-01-01

    The discovery of new drug targets represents a real opportunity for developing fresh strategies against pain. Ion channels are interesting targets because they are directly involved in the detection and the transmission of noxious stimuli by sensory fibres of the peripheral nervous system and by neurons of the spinal cord. Acid-Sensing Ion Channels (ASICs) have emerged as important players in the pain pathway. They are neuronal, voltage-independent depolarizing sodium channels activated by extracellular protons. The ASIC family comprises several subunits that need to associate into homo- or hetero-trimers to form a functional channel. The ASIC1 and ASIC3 isoforms are particularly important in sensory neurons, whereas ASIC1a, alone or in association with ASIC2, is essential in the central nervous system. The potent analgesic effects associated with their inhibition in animals (which can be comparable to those of morphine) and data suggesting a role in human pain illustrate the therapeutic potential of these channels.

  20. Onboard calibration circuit for the DAMPE BGO calorimeter front-end electronics

    NASA Astrophysics Data System (ADS)

    Zhang, De-Liang; Feng, Chang-Qing; Zhang, Jun-Bin; Wang, Qi; Ma, Si-Yuan; Shen, Zhong-Tao; Jiang, Di; Gao, Shan-Shan; Zhang, Yun-Long; Guo, Jian-Hua; Liu, Shu-Bin; An, Qi

    2016-05-01

    DAMPE (DArk Matter Particle Explorer) is a scientific satellite which is mainly aimed at indirectly searching for dark matter in space. One critical sub-detector of the DAMPE payload is the BGO (bismuth germanium oxide) calorimeter, which contains 1848 PMT (photomultiplier tube) dynodes and 16 FEE (Front-End Electronics) boards. VA160 and VATA160, two 32-channel low power ASICs (Application Specific Integrated Circuits), are adopted as the key components on the FEEs to perform charge measurement for the PMT signals. In order to monitor the parameter drift which may be caused by temperature variation, aging, or other environmental factors, an onboard calibration circuit is designed for the VA160 and VATA160 ASICs. It is mainly composed of a 12-bit DAC (Digital to Analog Converter), an operational amplifier and an analog switch. Test results showed that a dynamic range of 0-30 pC with a precision of 5 fC (Root Meam Square, RMS) was achieved, which covers the VA160’s input range. It can be used to compensate for the temperature drift and test the trigger function of the FEEs. The calibration circuit has been implemented for the front-end electronics of the BGO Calorimeter and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite was launched at the end of 2015 and the calibration circuit will operate periodically in space. Supported by Strategic Priority Research Program on Space Science of Chinese Academy of Sciences (XDA04040202-4), and National Basic Research Program (973 Program) of China (2010CB833002) and National Natural Science Foundation of China (11273070)

  1. Imaging X-ray detector front-end with high dynamic range: IDeF-X HD

    NASA Astrophysics Data System (ADS)

    Gevin, O.; Lemaire, O.; Lugiez, F.; Michalowska, A.; Baron, P.; Limousin, O.; Delagnes, E.

    2012-12-01

    Presented circuit, IDeF-X HD (Imaging Detector Front-end) is a member of the IDeF-X ASICs family for space applications. It has been optimized for a half millimeter pitch CdTe or CdZnTe pixelated detector arranged in 16×16 array. It is aimed to operate in the hard X-ray range from few keV up to 250 keV or more. The ASIC has been realized in AMS 0.35 μm CMOS process. The IDeF-X HD is a 32 channel analog front-end with self-triggering capability. The architecture of the analog channel includes a chain of charge sensitive amplifier with continuous reset system and non-stationary noise suppressor, adjustable gain stage, pole-zero cancellation stage, adjustable shaping time low pass filter, baseline holder and peak detector with discriminator. The power consumption of the IDeF-X HD is 800 μW per channel. With the in-channel variable gain stage the nominal 250 keV dynamic range of the ASIC can be extended up to 1 MeV anticipating future applications using thick sensors. Measuring the noise performance without a detector at the input with minimized leakage current (programmable) at the input, we achieved ENC of 33 electrons rms at 10.7 μs peak time. Measurements with CdTe detector show good energy resolution FWHM of 1.1 keV at 60 keV and 4.3 keV at 662 keV with detection threshold below 4 keV. In addition, an absolute temperature sensor has been integrated with resolution of 1.5 °C.

  2. The LENA ASIC: Emulating an Obsolete Processor

    NASA Astrophysics Data System (ADS)

    Carayon, J. L.; Mary, L.; Bertrand, J.; Manni, F.

    2013-08-01

    From 10 years, CNES and his partners TAS and Astrium have developed and flown with great success a serie of microsatellites (Demeter, Parasol, Picard etc..), which avionics is based onto a central OBC computer. The OBC is built around a central transputer IMST805 processor, which is now obsolete: the strategic procurement lot done at the beginning of the project is too old now for Quality insurance reasons. The paper describes the LENA ASIC (Logic Emulation for New Architectures) and the approach taken at CNES for the replacement of the Transputer T805 used for Myriade OBC computer to allow production of new microsatellites at a low cost in the next decade.

  3. The STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.; Schulz, M.W.; Short, P.; Woods, J.; Crosetto, D.

    1997-12-01

    STAR is a large TPC-based experiment at RHIC, the relativistic heavy ion collider at Brookhaven National Laboratory. The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. The authors describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  4. Development of a dedicated front-end electronics for straw tube trackers in the bar PANDA experiment

    NASA Astrophysics Data System (ADS)

    Przyborowski, D.; Fiutowski, T.; Idzik, M.; Kajetanowicz, M.; Korcyl, G.; Salabura, P.; Smyrski, J.; Strzempek, P.; Swientek, K.; Terlecki, P.; Tokarz, J.

    2016-08-01

    The design and tests of front-end electronics for straw tube trackers in the bar PANDA experiment at FAIR are presented. The challenges for the front-end electronics, comprising operation at high counting rate up to 1 MHz per straw tube, are discussed and the proposed architecture comprising a switched gain charge sensitive preamplifier (CSP), a pole-zero cancellation circuit (PZC), a second order variable peaking time shaper, a trimming ion tail cancellation circuit, and a baseline holder (BLH), is described. The front-end provides an analogue output and a discriminator with LVDS differential driver for the Time-of-Arrival (ToA) and Time-over-Threshold (ToT) measurements. A prototype readout ASIC featuring four channels was fabricated in 0.35 μm CMOS technology consuming 15.5 mW (analog part) and 12 mW (LVDS) per channel. The results of measurements of peaking time (25-67 ns), gain, noise (ENC 800-2500 el. for various gains), time walk and jitter are presented as well as the first results obtained with prototype straw tubes connected.

  5. Neuro Talk. An interface for multifunctional neural engineering ASICs.

    PubMed

    Troyk, P R; Detlefsen, D A; DeMichele, G D; Kerns, D

    2006-01-01

    With the availability of modern application specific integrated circuit (ASIC) design tools, simulation packages, and low-cost commercial silicon foundry processes, it is becoming increasingly easy for any laboratory, or small company, to develop a custom ASIC. For stimulation, as well as recording, chips that perform specialized functions can be designed, fabricated, and tested within a time period of 2-3 months. In many cases, the desired functionality can only be obtained by using VLSI design methods. Despite this increase in ASIC functionality, as related to neural engineering applications, there exists no common interface protocol for communicating with, and controlling, neural engineering ASICs. This would be analogous to each company that manufactures PC-based systems to have no common method of communication, e.g. USB, GBIB, RS-232, etc. While it might seem elusive, we propose the specification and development of a universal interface protocol for neural engineering ASICs. We have named this interface, NeuroTalk.

  6. Expression and functions of ASIC1 in the zebrafish retina.

    PubMed

    Liu, Sha; Wang, Mei-Xia; Mao, Cheng-Jie; Cheng, Xiao-Yu; Wang, Chen-Tao; Huang, Jian; Zhong, Zhao-Min; Hu, Wei-Dong; Wang, Fen; Hu, Li-Fang; Wang, Han; Liu, Chun-Feng

    2014-12-12

    It has been demonstrated that acid sensing ionic channels (ASICs) are present in the central and peripheral nervous system of mammals, including the retina. However, it remains unclear whether the zebrafish retina also expresses ASICs. In the present study, the expression and distribution of zasic1 were examined in the retina of zebrafish. Both zasic1 mRNA and protein expressions were detected in the adult zebrafish retina. A wide distribution of ASIC1 in zebrafish retina was confirmed using whole mount in situ hybridization and immunohistochemistry study. Acidosis-induced currents in the isolated retinal ganglion cells (RGCs) were also recorded using whole cell patch clamping. Moreover, blockade of ASICs channel significantly reduced the locomotion of larval zebrafish in response to light exposure. In sum, our data demonstrate the presence of ASIC1 and its possible functional relevance in the retina of zebrafish.

  7. Small Microprocessor for ASIC or FPGA Implementation

    NASA Technical Reports Server (NTRS)

    Kleyner, Igor; Katz, Richard; Blair-Smith, Hugh

    2011-01-01

    A small microprocessor, suitable for use in applications in which high reliability is required, was designed to be implemented in either an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The design is based on commercial microprocessor architecture, making it possible to use available software development tools and thereby to implement the microprocessor at relatively low cost. The design features enhancements, including trapping during execution of illegal instructions. The internal structure of the design yields relatively high performance, with a significant decrease, relative to other microprocessors that perform the same functions, in the number of microcycles needed to execute macroinstructions. The problem meant to be solved in designing this microprocessor was to provide a modest level of computational capability in a general-purpose processor while adding as little as possible to the power demand, size, and weight of a system into which the microprocessor would be incorporated. As designed, this microprocessor consumes very little power and occupies only a small portion of a typical modern ASIC or FPGA. The microprocessor operates at a rate of about 4 million instructions per second with clock frequency of 20 MHz.

  8. MuTRiG: a mixed signal Silicon Photomultiplier readout ASIC with high timing resolution and gigabit data link

    NASA Astrophysics Data System (ADS)

    Chen, H.; Briggl, K.; Eckert, P.; Harion, T.; Munwes, Y.; Shen, W.; Stankova, V.; Schultz-Coulon, H. C.

    2017-01-01

    MuTRiG is a mixed signal Silicon Photomultiplier readout ASIC designed in UMC 180 nm CMOS technology for precise timing and high event rate applications in high energy physics experiments and medical imaging. It is dedicated to the readout of the scintillating fiber detector and the scintillating tile detector of the Mu3e experiment. The MuTRiG chip extends the excellent timing performance of the STiCv3 chip with a fast digital readout for high rate applications. The high timing performance of the fully differential SiPM readout channels and 50 ps time binning TDCs are complemented by an upgraded digital readout logic and a 1.28 Gbps LVDS serial data link. The design of the chip and the characterization results of the analog front-end, TDC and the LVDS data link are presented.

  9. ASIC3, a sensor of acidic and primary inflammatory pain.

    PubMed

    Deval, Emmanuel; Noël, Jacques; Lay, Nadège; Alloui, Abdelkrim; Diochot, Sylvie; Friend, Valérie; Jodar, Martine; Lazdunski, Michel; Lingueglia, Eric

    2008-11-19

    Acid-sensing ion channels (ASICs) are cationic channels activated by extracellular acidosis that are expressed in both central and peripheral nervous systems. Although peripheral ASICs seem to be natural sensors of acidic pain (e.g., in inflammation, ischaemia, lesions or tumours), a direct demonstration is still lacking. We show that approximately 60% of rat cutaneous sensory neurons express ASIC3-like currents. Native as well as recombinant ASIC3 respond synergistically to three different inflammatory signals that are slight acidifications (approximately pH 7.0), hypertonicity and arachidonic acid (AA). Moderate pH, alone or in combination with hypertonicity and AA, increases nociceptors excitability and produces pain suppressed by the toxin APETx2, a specific blocker of ASIC3. Both APETx2 and the in vivo knockdown of ASIC3 with a specific siRNA also have potent analgesic effects against primary inflammation-induced hyperalgesia in rat. Peripheral ASIC3 channels are thus essential sensors of acidic pain and integrators of molecular signals produced during inflammation where they contribute to primary hyperalgesia.

  10. Motivation and Front-End Analysis.

    ERIC Educational Resources Information Center

    Harless, Joe

    1978-01-01

    Relates Front-End Analysis (FEA) to motivation by categorizing it as either Diagnostic FEA or Planning FEA. The former is used to diagnose existing problems and prescribe motivational programs; the latter assumes that motivational programs must be implemented, along with other programs, to build the optimum environment to support the performance.…

  11. CAD-II: the second version current-mode readout ASIC for high-resolution timing measurements

    NASA Astrophysics Data System (ADS)

    Yuan, Z. X.; Deng, Z.; Wang, Y.; Liu, Y. N.

    2016-07-01

    This paper presents the second version of a fully current-mode front-end ASIC, CAD (Current Amplifier and Discriminator), for MRPC detectors for TOF applications. Several upgrades have been made in this new version, including: 1). Using differential input stages with input impedance down to 30 Ω and LVDS compatible outputs; 2). Much higher current gain and bandwidth of 4.5 A/A and 380 MHz 3). Fabricated in 0.18 μ m CMOS process instead of 0.35 μ m CMOS technology used in CAD-I. The detailed design of the ASIC will be described as well as the measurement results. The single-ended input impedance could be as low as 32 Ω and the power consumption was measured to be 15 mW per channel. Input referred RMS noise current was about 0.56 μ A. The threshold could be set as low as 4.5 μ A referred to input, corresponding to 9 fC for the typical MRPC detector signal with 2 ns width. Sub-10 ps resolution has been measured for input signal above 200 μ A.

  12. Mice lacking acid-sensing ion channels (ASIC) 1 or 2, but not ASIC3, show increased pain behaviour in the formalin test.

    PubMed

    Staniland, Amelia A; McMahon, Stephen B

    2009-07-01

    Extracellular acidification is a component of the inflammatory process and may be a factor driving the pain accompanying it. Acid-sensing ion channels (ASICs) are neuronal proton sensors and evidence suggests they are involved in signalling inflammatory pain. The aims of this study were to (1) clarify the role of ASICs in nociception and (2) confirm their involvement in inflammatory pain and determine whether this was subunit specific. This was achieved by (1) direct comparison of the sensitivity of ASIC1, ASIC2, ASIC3 and TRPV1 knockout mice versus wildtype littermates to acute thermal and mechanical noxious stimuli and (2) studying the behavioural responses of each transgenic strain to hind paw inflammation with either complete Freund's adjuvant (CFA) or formalin. Naïve ASIC1(-/-) and ASIC2(-/-) mice responded normally to acute noxious stimuli, whereas ASIC3(-/-) mice were hypersensitive to high intensity thermal stimuli. CFA injection decreased mechanical and thermal withdrawal thresholds for up to 8 days. ASIC2(-/-) mice had increased mechanical sensitivity on day 1 post-CFA compared to wildtype controls. TRPV1(-/-) mice had significantly reduced thermal, but not mechanical, hyperalgesia on all days after inflammation. Following formalin injection, ASIC1(-/-) and ASIC2(-/-), but not ASIC3(-/-) or TRPV1(-/-), mice showed enhanced pain behaviour, predominantly in the second phase of the test. These data suggest that whilst ASICs may play a role in mediating inflammatory pain, this role is likely to be modulatory and strongly dependent on channel subtype.

  13. Back-end and interface implementation of the STS-XYTER2 prototype ASIC for the CBM experiment

    NASA Astrophysics Data System (ADS)

    Kasinski, K.; Szczygiel, R.; Zabolotny, W.

    2016-11-01

    Each front-end readout ASIC for the High-Energy Physics experiments requires robust and effective hit data streaming and control mechanism. A new STS-XYTER2 full-size prototype chip for the Silicon Tracking System and Muon Chamber detectors in the Compressed Baryonic Matter experiment at Facility for Antiproton and Ion Research (FAIR, Germany) is a 128-channel time and amplitude measuring solution for silicon microstrip and gas detectors. It operates at 250 kHit/s/channel hit rate, each hit producing 27 bits of information (5-bit amplitude, 14-bit timestamp, position and diagnostics data). The chip back-end implements fast front-end channel read-out, timestamp-wise hit sorting, and data streaming via a scalable interface implementing the dedicated protocol (STS-HCTSP) for chip control and hit transfer with data bandwidth from 9.7 MHit/s up to 47 MHit/s. It also includes multiple options for link diagnostics, failure detection, and throttling features. The back-end is designed to operate with the data acquisition architecture based on the CERN GBTx transceivers. This paper presents the details of the back-end and interface design and its implementation in the UMC 180 nm CMOS process.

  14. ASICs Mediate Pain and Inflammation in Musculoskeletal Diseases

    PubMed Central

    Abdelhamid, Ramy E.

    2015-01-01

    Chronic musculoskeletal pain is debilitating and affects ∼20% of adults. Tissue acidosis is present in painful musculoskeletal diseases like rheumatoid arthritis. ASICs are located on skeletal muscle and joint nociceptors as well as on nonneuronal cells in the muscles and joints, where they mediate nociception. This review discusses the properties of different types of ASICs, factors affecting their pH sensitivity, and their role in musculoskeletal hyperalgesia and inflammation. PMID:26525344

  15. Pilot tests of a PET detector using the TOF-PET ASIC based on monolithic crystals and SiPMs

    NASA Astrophysics Data System (ADS)

    Aguilar, A.; González-Montoro, A.; González, A. J.; Hernández, L.; Monzó, J. M.; Bugalho, R.; Ferramacho, L.; Benlloch, J. M.

    2016-12-01

    In this work we show pilot tests of PET detector blocks using the TOF-PET ASIC, coupled to SiPM detector arrays and different crystal configurations. We have characterized the main ASIC features running calibration processes to compensate the time dispersion among the different ASIC/SiPM paths as well as for the time walk on the arrival of optical photons. The aim of this work is to use of LYSO monolithic crystals and explore their photon Depth of Interaction (DOI) capabilities, keeping good energy and spatial resolutions. First tests have been carried out with crystal arrays. Here we made it possible to reach a coincidence resolving times (CRT) of 370 ps FWHM, with energy resolutions better than 20% and resolving well 2 mm sized crystal elements. When using monolithic crystals, a single-pixel LYSO reference crystal helped to explore the CRT performance. We studied different strategies to provide the best timestamp determination in the monolithic scintillator. Times around 1 ns FWHM have been achieved in these pilot studies. In terms of spatial and energy resolution, values of about 3 mm and better than 30% were found, respectively. We have also demonstrated the capability of this system (monolithic and ASIC) to return accurate DOI information.

  16. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    NASA Astrophysics Data System (ADS)

    Prele, D.

    2015-08-01

    As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

  17. An efficient real time superresolution ASIC system

    NASA Astrophysics Data System (ADS)

    Reddy, Dikpal; Yue, Zhanfeng; Topiwala, Pankaj

    2008-04-01

    Superresolution of images is an important step in many applications like target recognition where the input images are often grainy and of low quality due to bandwidth constraints. In this paper, we present a real-time superresolution application implemented in ASIC/FPGA hardware, and capable of 30 fps of superresolution by 16X in total pixels. Consecutive frames from the video sequence are grouped and the registered values between them are used to fill the pixels in the higher resolution image. The registration between consecutive frames is evaluated using the algorithm proposed by Schaum et al. The pixels are filled by averaging a fixed number of frames associated with the smallest error distances. The number of frames (the number of nearest neighbors) is a user defined parameter whereas the weights in the averaging process are decided by inverting the corresponding smallest error distances. Wiener filter is used to post process the image. Different input parameters, such as size of input image, enlarging factor and the number of nearest neighbors, can be tuned conveniently by the user. We use a maximum word size of 32 bits to implement the algorithm in Matlab Simulink as well as the hardware, which gives us a fine balance between the number of bits and performance. The algorithm performs with real time speed with very impressive superresolution results.

  18. The Pulse Width Modulator ASIC for Deep Space Missions

    NASA Technical Reports Server (NTRS)

    Carr, Gregory A.; Wester, Gene W.; Lam, Barbara; Bennett, Johnny; Franco, Lauro; Woo, Erika

    2004-01-01

    The Jet Propulsion Laboratory has started the development of a Pulse Width Modulator Application Specific Integrated Circuit (PWMA). This development is leveraging the previous development of the Switch Control ASIC (SCA). The purpose of the development is to provide the control for a selected range of power converter topologies and to meet the stringent environmental requirements of deep space missions. The PWMA will include several power control functions that are not normally included on the off-the-shelf components available today. One key functional requirement is the ability to implement an N + K redundant power converter with the ability to control the charging of a battery. Other applications will be the typical point of load isolated and non-isolated power converters. The purpose the development is not only to provide a much needed flight part, but also to accelerate the engineering process by using a standard cell library from previous ASIC developments. Under previous developments with Boeing and Lockheed Martin, JPL has produced three ASICs. Each ASIC has been implemented by using an analog standard cell library. One such development was the SCA, which is design to provide a floating power switch control. The functional verification of this ASIC has been completed and the cells used have been targeted for the new development of the PWMA. The primary function of the PWMA is to provide the control function of a point of load power converter. The design is an isolated 60 W converter with a 33 V output. In architecting the design, several functions were left up to the power converter design in order to make the ASIC more generic. The ASIC can be used for several power converter topologies and power levels. Some additional features have been added to the ASIC to provide the interfaces for multi-phase topologies and battery control functions. An N+K fault tolerant strategy has been implemented in order to provide the battery control functions. The PWMA has

  19. ASIC for SDD-Based X-ray Spectrometers

    SciTech Connect

    De Geronimo, G.; Fried, J.; Rehak, P.; Ackley, K.; Carini, G.; Chen, W.; Keister, J.; Li, S.; Li, Z.; Pinelli, D.A.; Siddons, D.P.; Vernon, E.; Gaskin, J.A.; Ramsey, B.D.; Tyson, T.A.

    2010-06-16

    We present an application-specific integrated circuit (ASIC) for high-resolution x-ray spectrometers (XRS). The ASIC reads out signals from pixelated silicon drift detectors (SDDs). The pixel does not have an integrated field effect transistor (FET); rather, readout is accomplished by wire-bonding the anodes to the inputs of the ASIC. The ASIC dissipates 32 mW, and offers 16 channels of low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, a novel pile-up rejector, and peak detection with an analog memory. The readout is sparse and based on custom low-power tristatable low-voltage differential signaling (LPT-LVDS). A unit of 64 SDD pixels, read out by four ASICs, covers an area of 12.8 cm{sup 2} and dissipates with the sensor biased about 15 mW/cm{sup 2}. As a tile-based system, the 64-pixel units cover a large detection area. Our preliminary measurements at -44 C show a FWHM of 145 eV at the 5.9 keV peak of a {sup 55}Fe source, and less than 80 eV on a test-pulse line at 200 eV.

  20. ASIC for SDD-Based X-Ray Spectrometers

    SciTech Connect

    G De Geronimo; P Rehak; K Ackley; G Carini; W Chen; J Fried; J Keister; S Li; Z Li; et al.

    2011-12-31

    We present an application-specific integrated circuit (ASIC) for high-resolution x-ray spectrometers (XRS). The ASIC reads out signals from pixelated silicon drift detectors (SDDs). The pixel does not have an integrated field effect transistor (FET); rather, readout is accomplished by wire-bonding the anodes to the inputs of the ASIC. The ASIC dissipates 32 mW, and offers 16 channels of low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, a novel pile-up rejector, and peak detection with an analog memory. The readout is sparse and based on custom low-power tristatable low-voltage differential signaling (LPT-LVDS). A unit of 64 SDD pixels, read out by four ASICs, covers an area of 12.8 cm{sup 2} and dissipates with the sensor biased about 15 mW/cm{sup 2}. As a tile-based system, the 64-pixel units cover a large detection area. Our preliminary measurements at -44 C show a FWHM of 145 eV at the 5.9 keV peak of a {sup 55}Fe source, and less than 80 eV on a test-pulse line at 200 eV.

  1. A project plans to develop two ASICs for CCD controller

    NASA Astrophysics Data System (ADS)

    Song, Qian; Wei, Mingzhi; Sun, Quan; Zhang, Yuheng

    2016-07-01

    Astronomical instrumentation, in many cases, especially the large field of view application while huge mosaic CCD or CMOS camera is needed, requires the camera electronics to be much more compact and of much smaller the size than the controller used to be. Making the major parts of CCD driving circuits into an ASIC or ASICs can greatly bring down the controller's volume, weight and power consumption and make it easier to control the crosstalk brought up by the long length of the cables that connect the CCD output ports and the signal processing electronics, and, therefore, is the most desirable approach to build the large mosaic CCD camera. A project endeavors to make two ASICs, one to achieve CCD signal processing and another to provide the clock drives and bias voltages, is introduced. The first round of design of the two ASICs has been completed and the devices have just been manufactured. Up to now the test of one of the two, the signal processing ASIC, was partially done and the linearity has reached the requirement of the design.

  2. CWICOM: A Highly Integrated & Innovative CCSDS Image Compression ASIC

    NASA Astrophysics Data System (ADS)

    Poupat, Jean-Luc; Vitulli, Raffaele

    2013-08-01

    The space market is more and more demanding in terms of on image compression performances. The earth observation satellites instrument resolution, the agility and the swath are continuously increasing. It multiplies by 10 the volume of picture acquired on one orbit. In parallel, the satellites size and mass are decreasing, requiring innovative electronic technologies reducing size, mass and power consumption. Astrium, leader on the market of the combined solutions for compression and memory for space application, has developed a new image compression ASIC which is presented in this paper. CWICOM is a high performance and innovative image compression ASIC developed by Astrium in the frame of the ESA contract n°22011/08/NLL/LvH. The objective of this ESA contract is to develop a radiation hardened ASIC that implements the CCSDS 122.0-B-1 Standard for Image Data Compression, that has a SpaceWire interface for configuring and controlling the device, and that is compatible with Sentinel-2 interface and with similar Earth Observation missions. CWICOM stands for CCSDS Wavelet Image COMpression ASIC. It is a large dynamic, large image and very high speed image compression ASIC potentially relevant for compression of any 2D image with bi-dimensional data correlation such as Earth observation, scientific data compression… The paper presents some of the main aspects of the CWICOM development, such as the algorithm and specification, the innovative memory organization, the validation approach and the status of the project.

  3. A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

    NASA Technical Reports Server (NTRS)

    Quilligan, G.; Aslam, S.; DuMonthier, J.

    2012-01-01

    A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

  4. Ka-Band SiGe Receiver Front-End MMIC for Transponder Applications

    NASA Technical Reports Server (NTRS)

    Venkatesan, Jaikrishna; Mysoor, Narayan R.; Hashemi, Hassein; Aflatouni, Firooz

    2010-01-01

    A fully integrated, front-end Ka-band monolithic microwave integrated circuit (MMIC) was developed that houses an LNA (low noise amplifier) stage, a down-conversion stage, and output buffer amplifiers. The MMIC design employs a two-step quadrature down-conversion architecture, illustrated in the figure, which results in improved quality of the down-converted IF quadrature signals. This is due to the improved sensitivity of this architecture to amplitude and phase mismatches in the quadrature down-conversion process. Current sharing results in reduced power consumption, while 3D-coupled inductors reduce the chip area. Improved noise figure is expected over previous SiGe-based, frontend designs

  5. Progress on the upgrade of the CMS Hadron Calorimeter Front-End electronics

    SciTech Connect

    Anderson, Jake; Whitmore, Juliana; /Fermilab

    2011-11-01

    We present a scheme to upgrade the CMS HCAL front-end electronics in the second long shutdown to upgrade the LHC (LS2), which is expected to occur around 2018. The HCAL electronics upgrade is required to handle the major instantaneous luminosity increase (up to 5 * 10{sup 34} cm{sup -2} s{sup -1}) and an expected integrated luminosity of {approx}3000 fb{sup -1}. A key aspect of the HCAL upgrade is to read out longitudinal segmentation information to improve background rejection, energy resolution, and electron isolation at the L1 trigger. This paper focuses on the requirements for the new electronics and on the proposed solutions. The requirements include increased channel count, additional timing capabilities, and additional redundancy. The electronics are required to operate in a harsh environment and are constrained by the existing infrastructure. The proposed solutions span from chip level to system level. They include the development of a new ASIC ADC, the design and testing of higher speed transmitters to handle the increased data volume, the evaluation and use of circuits from other developments, evaluation of commercial FPGAs, better thermal design, and improvements in the overall readout architecture. We will report on the progress of the designs for these upgraded systems, along with performance requirements and initial design studies.

  6. Charge-sensitive front-end electronics with operational amplifiers for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Födisch, P.; Berthel, M.; Lange, B.; Kirschke, T.; Enghardt, W.; Kaever, P.

    2016-09-01

    Cadmium zinc telluride (CdZnTe, CZT) radiation detectors are suitable for a variety of applications, due to their high spatial resolution and spectroscopic energy performance at room temperature. However, state-of-the-art detector systems require high-performance readout electronics. Though an application-specific integrated circuit (ASIC) is an adequate solution for the readout, requirements of high dynamic range and high throughput are not available in any commercial circuit. Consequently, the present study develops the analog front-end electronics with operational amplifiers for an 8×8 pixelated CZT detector. For this purpose, we modeled an electrical equivalent circuit of the CZT detector with the associated charge-sensitive amplifier (CSA). Based on a detailed network analysis, the circuit design is completed by numerical values for various features such as ballistic deficit, charge-to-voltage gain, rise time, and noise level. A verification of the performance is carried out by synthetic detector signals and a pixel detector. The experimental results with the pixel detector assembly and a 22Na radioactive source emphasize the depth dependence of the measured energy. After pulse processing with depth correction based on the fit of the weighting potential, the energy resolution is 2.2% (FWHM) for the 511 keV photopeak.

  7. Development of the multichannel data processing ASIC design flow

    NASA Astrophysics Data System (ADS)

    Ivanov, P. Y.; Atkin, E. V.; Normanov, D. D.; Shumkin, O. V.

    2017-01-01

    In modern multichannel data processing digital systems the number of channels ranges from some hundred thousand to millions. The basis of the elemental base of these systems are ASICs. Their most important characteristics are performance, power consumption and occupied area. ASIC design is a time and labor consuming process. In order to improve performance and reduce the designing time it is proposed to supplement the standard design flow with an optimization stage of the channel parameters based on the most efficient use of chip area and power consumption.

  8. ASIC1 promotes differentiation of neuroblastoma by negatively regulating Notch signaling pathway.

    PubMed

    Liu, Mingli; Inoue, Koichi; Leng, Tiandong; Zhou, An; Guo, Shanchun; Xiong, Zhi-Gang

    2017-01-31

    In neurons, up-regulation of Notch activity either inhibits neurite extension or causes retraction of neurites. Conversely, inhibition of Notch1 facilitates neurite extension. Acid-sensing ion channels (ASICs) are a family of proton-gated cation channels, which play critical roles in synaptic plasticity, learning and memory and spine morphogenesis. Our pilot proteomics data from ASIC1a knock out mice implicated that ASIC1a may play a role in regulating Notch signaling, therefore, we explored whether or not ASIC1a regulates neurite growth during neuronal development through Notch signaling. In this study, we determined the effects of ASIC1a on neurite growth in a mouse neuroblastoma cell line, NS20Y cells, by modulating ASIC1a expression. We also determined the relationship between ASIC1a and Notch signaling on neuronal differentiation. Our results showed that down-regulation of ASIC1a in NS20Y cells inhibits CPT-cAMP induced neurite growth, while over expression of ASIC1a promotes its growth. In addition, down-regulation of ASIC1a increased the expression of Notch1 and its target gene Survivin while inhibitor of Notch significantly prevented the neurite extension induced by ASIC1a in NS20Y cells. These data indicate that Notch1 signaling may be required for ASIC1a-mediated neurite growth and neuronal differentiation.

  9. Development of custom radiation-tolerant DCDC converter ASICs

    NASA Astrophysics Data System (ADS)

    Faccio, F.; Michelis, S.; Orlandi, S.; Blanchot, G.; Fuentes, C.; Saggini, S.; Ongaro, F.

    2010-11-01

    Based on a detailed study of the radiation tolerance of high-voltage transistors, 2 commercial CMOS technologies have been selected for the design of synchronous buck DCDC converter ASICs. Three prototype converters have been produced, embedding increasingly sophisticated functions. The electrical and radiation performance of these prototypes is presented.

  10. ENaCs and ASICs as therapeutic targets

    PubMed Central

    Qadri, Yawar J.; Rooj, Arun K.

    2012-01-01

    The epithelial Na+ channel (ENaC) and acid-sensitive ion channel (ASIC) branches of the ENaC/degenerin superfamily of cation channels have drawn increasing attention as potential therapeutic targets in a variety of diseases and conditions. Originally thought to be solely expressed in fluid absorptive epithelia and in neurons, it has become apparent that members of this family exhibit nearly ubiquitous expression. Therapeutic opportunities range from hypertension, due to the role of ENaC in maintaining whole body salt and water homeostasis, to anxiety disorders and pain associated with ASIC activity. As a physiologist intrigued by the fundamental mechanics of salt and water transport, it was natural that Dale Benos, to whom this series of reviews is dedicated, should have been at the forefront of research into the amiloride-sensitive sodium channel. The cloning of ENaC and subsequently the ASIC channels has revealed a far wider role for this channel family than was previously imagined. In this review, we will discuss the known and potential roles of ENaC and ASIC subunits in the wide variety of pathologies in which these channels have been implicated. Some of these, such as the role of ENaC in Liddle's syndrome are well established, others less so; however, all are related in that the fundamental defect is due to inappropriate channel activity. PMID:22277752

  11. Evidence for the involvement of ASIC3 in sensory mechanotransduction in proprioceptors

    PubMed Central

    Lin, Shing-Hong; Cheng, Yuan-Ren; Banks, Robert W.; Min, Ming-Yuan; Bewick, Guy S.; Chen, Chih-Cheng

    2016-01-01

    Acid-sensing ion channel 3 (ASIC3) is involved in acid nociception, but its possible role in neurosensory mechanotransduction is disputed. We report here the generation of Asic3-knockout/eGFPf-knockin mice and subsequent characterization of heterogeneous expression of ASIC3 in the dorsal root ganglion (DRG). ASIC3 is expressed in parvalbumin (Pv+) proprioceptor axons innervating muscle spindles. We further generate a floxed allele of Asic3 (Asic3f/f) and probe the role of ASIC3 in mechanotransduction in neurite-bearing Pv+ DRG neurons through localized elastic matrix movements and electrophysiology. Targeted knockout of Asic3 disrupts spindle afferent sensitivity to dynamic stimuli and impairs mechanotransduction in Pv+ DRG neurons because of substrate deformation-induced neurite stretching, but not to direct neurite indentation. In behavioural tasks, global knockout (Asic3−/−) and Pv-Cre::Asic3f/f mice produce similar deficits in grid and balance beam walking tasks. We conclude that, at least in mouse, ASIC3 is a molecular determinant contributing to dynamic mechanosensitivity in proprioceptors. PMID:27161260

  12. Three-dimensional stacked structured ASIC devices and methods of fabrication thereof

    DOEpatents

    Shinde, Subhash L.; Teifel, John; Flores, Richard S.; Jarecki Jr., Robert L.; Bauer, Todd

    2015-11-19

    A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.

  13. Front-end electronics development at BNL

    SciTech Connect

    O`Connor, P.

    1995-09-01

    AT BNL the monolithic front-end electronics development effort is an outgrowth of work in discrete and hybrid circuits over the past 30 years. BNL`s area of specialization centers on circuits for precision amplitude measurement, with signal-to-noise ratios of 100:1 and calibration to the same level of precision. Circuits are predominantly classical, continuous-time implementation of the functions now performed by hybrids, with little or no loss of performance. Included in this category are charge and current-sensitive preamplifiers, pulse shapers, sample/hold, multiplexing, and associated calibration and control circuits. Presently integration densities are limited to 16 channels per chip. Two examples are presented to illustrate the techniques needed to adopt hybrid circuits to the constraints of monolithic CMOS technology. They are programmable pulse shapes and a charge-sensitive preamp for very low detector capacitance.

  14. Web-based DAQ systems: connecting the user and electronics front-ends

    NASA Astrophysics Data System (ADS)

    Lenzi, Thomas

    2016-12-01

    Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

  15. Development of low-noise high-speed analog ASIC for X-ray CCD cameras and wide-band X-ray imaging sensors

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Hirose, Shin-nosuke; Imatani, Ritsuko; Nagino, Ryo; Anabuki, Naohisa; Hayashida, Kiyoshi; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Kitamura, Hisashi; Uchihori, Yukio

    2016-09-01

    We report on the development and performance evaluation of the mixed-signal Application Specific Integrated Circuit (ASIC) developed for the signal processing of onboard X-ray CCD cameras and various types of X-ray imaging sensors in astrophysics. The quick and low-noise readout is essential for the pile-up free imaging spectroscopy with a future X-ray telescope. Our goal is the readout noise of 5e- r . m . s . at the pixel rate of 1 Mpix/s that is about 10 times faster than those of the currently working detectors. We successfully developed a low-noise ASIC as the front-end electronics of the Soft X-ray Imager onboard Hitomi that was launched on February 17, 2016. However, it has two analog-to-digital converters per chain due to the limited processing speed and hence we need to correct the difference of gain to obtain the X-ray spectra. Furthermore, its input equivalent noise performance is not satisfactory (> 100 μV) at the pixel rate higher than 500 kpix/s. Then we upgrade the design of the ASIC with the fourth-order ΔΣ modulators to enhance its inherent noise-shaping performance. Its performance is measured using pseudo CCD signals with variable processing speed. Although its input equivalent noise is comparable with the conventional one, the integrated non-linearity (0.1%) improves to about the half of that of the conventional one. The radiation tolerance is also measured with regard to the total ionizing dose effect and the single event latch-up using protons and Xenon, respectively. The former experiment shows that all of the performances does not change after imposing the dose corresponding to 590 years in a low earth orbit. We also put the upper limit on the frequency of the latch-up to be once per 48 years.

  16. Phase-rotation based receive-beamformer for miniaturized volumetric ultrasound imaging scanners using 2-D CMUT-on-ASIC arrays

    NASA Astrophysics Data System (ADS)

    Kim, Bae-Hyung; Lee, Seunghun; Song, Jongkeun; Kim, Youngil; Jeon, Taeho; Cho, Kyungil

    2013-03-01

    Up-to-date capacitive micromachined ultrasonic transducer (CMUT) technologies provide us unique opportunities to minimize the size and cost of ultrasound scanners by integrating front-end circuits into CMUT arrays. We describe a design prototype of a portable ultrasound scan-head probe using 2-D phased CMUT-on-ASIC arrays of 3-MHz 250 micrometer-pitch by fabricating and integrating front-end electronics with 2-D CMUT array elements. One of the objectives of our work is to design a receive beamformer architecture for the smart probe with compact size and comparable performance. In this work, a phase-rotation based receive beamformer using the sampling frequency of 4 times the center frequency and a hybrid beamforming to reduce the channel counts of the system-side are introduced. Parallel beamforming is considered for the purpose of saving power consumption of battery (by firing fewer times per image frame). This architecture has the advantage of directly obtaining I and Q components. By using the architecture, the interleaved I/Q data from the storage is acquired and I/Q demodulation for baseband processing is directly achieved without demodulators including sin and cosine lookup tables and mixers. Currently, we are extending the presented architecture to develop a true smart probe by including lower power devices and cooling systems, and bringing wireless data transmission into consideration.

  17. Advanced Oxy-Fuel-Fired Front-End System

    SciTech Connect

    2004-03-01

    Oxy-gas-fired front-end technology promises significantly reduced energy usage. The glass industry is widely recognized as one of the most energy-intensive manufacturing industries in the United States.

  18. Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice

    PubMed Central

    Lino, Noelia G.; González-Inchauspe, Carlota M. F.; González, Laura E.; Colettis, Natalia; Vattino, Lucas G.; Wunsch, Amanda M.; Wemmie, John A.; Uchitel, Osvaldo D.

    2013-01-01

    Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also in fear and psychiatric pathologies. High-frequency stimulation of skeletal motor nerve terminals (MNTs) can induce presynaptic pH changes in combination with an acidification of the synaptic cleft, known to contribute to muscle fatigue. Here, we studied the role of ASIC1a channels on neuromuscular transmission. We combined a behavioral wire hanging test with electrophysiology, pharmacological, and immunofluorescence techniques to compare wild-type and ASIC1a lacking mice (ASIC1a −/− knockout). Our results showed that 1) ASIC1a −/− female mice were weaker than wild type, presenting shorter times during the wire hanging test; 2) spontaneous neurotransmitter release was reduced by ASIC1a activation, suggesting a presynaptic location of these channels at individual MNTs; 3) ASIC1a-mediated effects were emulated by extracellular local application of acid saline solutions (pH = 6.0; HEPES/MES-based solution); and 4) immunofluorescence techniques revealed the presence of ASIC1a antigens on MNTs. These results suggest that ASIC1a channels might be involved in controlling neuromuscular transmission, muscle contraction and fatigue in female mice. PMID:24336653

  19. Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice.

    PubMed

    Urbano, Francisco J; Lino, Noelia G; González-Inchauspe, Carlota M F; González, Laura E; Colettis, Natalia; Vattino, Lucas G; Wunsch, Amanda M; Wemmie, John A; Uchitel, Osvaldo D

    2014-02-15

    Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also in fear and psychiatric pathologies. High-frequency stimulation of skeletal motor nerve terminals (MNTs) can induce presynaptic pH changes in combination with an acidification of the synaptic cleft, known to contribute to muscle fatigue. Here, we studied the role of ASIC1a channels on neuromuscular transmission. We combined a behavioral wire hanging test with electrophysiology, pharmacological, and immunofluorescence techniques to compare wild-type and ASIC1a lacking mice (ASIC1a (-/-) knockout). Our results showed that 1) ASIC1a (-/-) female mice were weaker than wild type, presenting shorter times during the wire hanging test; 2) spontaneous neurotransmitter release was reduced by ASIC1a activation, suggesting a presynaptic location of these channels at individual MNTs; 3) ASIC1a-mediated effects were emulated by extracellular local application of acid saline solutions (pH = 6.0; HEPES/MES-based solution); and 4) immunofluorescence techniques revealed the presence of ASIC1a antigens on MNTs. These results suggest that ASIC1a channels might be involved in controlling neuromuscular transmission, muscle contraction and fatigue in female mice.

  20. Design of ultralow power receiver front-ends for 2.4 GHz wireless sensor network applications

    NASA Astrophysics Data System (ADS)

    Meng, Zhang; Zhiqun, Li; Zengqi, Wang; Chenjian, Wu; Liang, Chen

    2014-01-01

    This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network (WSN) in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and the subthreshold region respectively. The front-ends contain a two-stage cross-coupling cascaded common-gate (CG) LNA and a quadrature Gilbert IQ mixer. The measured conversion gain is variable with high gain at 24 dB and low gain at 7 dB for the saturation one, and high gain at 22 dB and low gain at 5 dB for the subthreshold one. The noise figure (NF) at high gain mode is 5.1 dB and 6.3 dB for each. The input 1 dB compression point (IP1dB) at low gain mode is about -6 dBm and -3 dBm for each. The front-ends consume about 2.1 mA current from 1.8 V power supply for the saturation one and 1.3 mA current for the subthreshold one. The measured results show that, comparing with the power consumption saving, it is worth making sacrifices on the performance for using the subthreshold technology.

  1. Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC

    NASA Astrophysics Data System (ADS)

    Aliaga, R. J.; Herrero-Bosch, V.; Capra, S.; Pullia, A.; Dueñas, J. A.; Grassi, L.; Triossi, A.; Domingo-Pardo, C.; Gadea, R.; González, V.; Hüyük, T.; Sanchís, E.; Gadea, A.; Mengoni, D.

    2015-11-01

    The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling. Its readout system is to be based on analog memory ASICs with 64 channels each that sample a 1 μs window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the total number of storage cells, particularly for large amounts of input channels. This is accomplished by partitioning the typical Switched Capacitor Array structure into two pipelined, asymmetric stages and introducing FIFO queue-like control circuitry for captured data, achieving total independence between the capture and readout operations.

  2. STiC — a mixed mode silicon photomultiplier readout ASIC for time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Harion, T.; Briggl, K.; Chen, H.; Fischer, P.; Gil, A.; Kiworra, V.; Ritzert, M.; Schultz-Coulon, H.-C.; Shen, W.; Stankova, V.

    2014-02-01

    STiC is an application specific integrated circuit (ASIC) for the readout of silicon photomultipliers. The chip has been designed to provide a very high timing resolution for time-of-flight applications in medical imaging and particle physics. It is dedicated in particular to the EndoToFPET-US project, which is developing an endoscopic PET detector combined with ultrasound imaging for early pancreas and prostate cancer detection. This PET system aims to provide a spatial resolution of 1 mm and a time-of-flight resolution of 200 ps FWHM. The analog frontend of STiC can use either a differential or single ended connection to the SiPM. The time and energy information of the detector signal is encoded into two time stamps. A special linearized time-over-threshold method is used to obtain a linear relation between the signal charge and the measured signal width, improving the energy resolution. The trigger signals are digitized by an integrated TDC module with a resolution of less than 20 ps. The TDC data is stored in an internal memory and transfered over a 160 MBit/s serial link using 8/10 bit encoding. First coincidence measurements using a 3.1 × 3.1 × 15 mm3 LYSO crystal and a S10362-33-50 Hamamtsu MPPC show a coincidence time resolution of less than 285 ps. We present details on the chip design as well as first characterization measurements.

  3. Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

    2015-06-01

    We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

  4. Data encryption standard ASIC design and development report.

    SciTech Connect

    Robertson, Perry J.; Pierson, Lyndon George; Witzke, Edward L.

    2003-10-01

    This document describes the design, fabrication, and testing of the SNL Data Encryption Standard (DES) ASIC. This device was fabricated in Sandia's Microelectronics Development Laboratory using 0.6 {micro}m CMOS technology. The SNL DES ASIC was modeled using VHDL, then simulated, and synthesized using Synopsys, Inc. software and finally IC layout was performed using Compass Design Automation's CAE tools. IC testing was performed by Sandia's Microelectronic Validation Department using a HP 82000 computer aided test system. The device is a single integrated circuit, pipelined realization of DES encryption and decryption capable of throughputs greater than 6.5 Gb/s. Several enhancements accommodate ATM or IP network operation and performance scaling. This design is the latest step in the evolution of DES modules.

  5. Fully Integrated Biopotential Acquisition Analog Front-End IC.

    PubMed

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

    2015-09-30

    A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 μm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm². A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 μVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions.

  6. Fully Integrated Biopotential Acquisition Analog Front-End IC

    PubMed Central

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

    2015-01-01

    A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 µm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm2. A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 µVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions. PMID:26437404

  7. Front-end antenna system design for the ITER low-field-side reflectometer system using GENRAY ray tracing

    NASA Astrophysics Data System (ADS)

    Wang, G.; Doyle, E. J.; Peebles, W. A.

    2016-11-01

    A monostatic antenna array arrangement has been designed for the microwave front-end of the ITER low-field-side reflectometer (LFSR) system. This paper presents details of the antenna coupling coefficient analyses performed using GENRAY, a 3-D ray tracing code, to evaluate the plasma height accommodation capability of such an antenna array design. Utilizing modeled data for the plasma equilibrium and profiles for the ITER baseline and half-field scenarios, a design study was performed for measurement locations varying from the plasma edge to inside the top of the pedestal. A front-end antenna configuration is recommended for the ITER LFSR system based on the results of this coupling analysis.

  8. Test bench development for the radiation Hard GBTX ASIC

    NASA Astrophysics Data System (ADS)

    Leitao, P.; Feger, S.; Porret, D.; Baron, S.; Wyllie, K.; Barros Marin, M.; Figueiredo, D.; Francisco, R.; Da Silva, J. C.; Grassi, T.; Moreira, P.

    2015-01-01

    This paper presents the development of the GBTX radiation hard ASIC test bench. Developed for the LHC accelerator upgrade programs, the GBTX implements a bidirectional 4.8 Gb/s link between the radiation hard on-detector custom electronics and the off-detector systems. The test bench was used for functional testing of the GBTX and to evaluate its performance in a radiation environment, by conducting Total Ionizing Dose and Single-Event Upsets tests campaigns.

  9. ASIC1A in the bed nucleus of the stria terminalis mediates TMT-evoked freezing

    PubMed Central

    Taugher, Rebecca J.; Ghobbeh, Ali; Sowers, Levi P.; Fan, Rong; Wemmie, John A.

    2015-01-01

    Mice display an unconditioned freezing response to TMT, a predator odor isolated from fox feces. Here we found that in addition to freezing, TMT caused mice to decrease breathing rate, perhaps because of the aversive smell. Consistent with this possibility, olfactory bulb lesions attenuated this effect of TMT, as well as freezing. Interestingly, butyric acid, another foul odor, also caused mice to reduce breathing rate. However, unlike TMT, butyric acid did not induce freezing. Thus, although these aversive odors may affect breathing, the unpleasant smell and suppression of breathing by themselves are insufficient to cause freezing. Because the acid-sensing ion channel-1A (ASIC1A) has been previously implicated in TMT-evoked freezing, we tested whether Asic1a disruption also altered breathing. We found that TMT reduced breathing rate in both Asic1a+/+ and Asic1a−/− mice, suggesting that ASIC1A is not required for TMT to inhibit breathing and that the absence of TMT-evoked freezing in the Asic1a−/− mice is not due to an inability to detect TMT. These observations further indicate that ASIC1A must affect TMT freezing in another way. Because the bed nucleus of the stria terminalis (BNST) has been critically implicated in TMT-evoked freezing and robustly expresses ASIC1A, we tested whether ASIC1A in the BNST plays a role in TMT-evoked freezing. We disrupted ASIC1A in the BNST of Asic1aloxP/loxP mice by delivering Cre recombinase to the BNST with an adeno-associated virus (AAV) vector. We found that disrupting ASIC1A in the BNST reduced TMT-evoked freezing relative to control mice in which a virus expressing eGFP was injected. To test whether ASIC1A in the BNST was sufficient to increase TMT-evoked freezing, we used another AAV vector to express ASIC1A in the BNST of Asic1a−/− mice. We found region-restricted expression of ASIC1A in the BNST increased TMT-elicited freezing. Together, these data suggest that the BNST is a key site of ASIC1A action in TMT

  10. JPIC-Rad-Hard JPEG2000 Image Compression ASIC

    NASA Astrophysics Data System (ADS)

    Zervas, Nikos; Ginosar, Ran; Broyde, Amitai; Alon, Dov

    2010-08-01

    JPIC is a rad-hard high-performance image compression ASIC for the aerospace market. JPIC implements tier 1 of the ISO/IEC 15444-1 JPEG2000 (a.k.a. J2K) image compression standard [1] as well as the post compression rate-distortion algorithm, which is part of tier 2 coding. A modular architecture enables employing a single JPIC or multiple coordinated JPIC units. JPIC is designed to support wide data sources of imager in optical, panchromatic and multi-spectral space and airborne sensors. JPIC has been developed as a collaboration of Alma Technologies S.A. (Greece), MBT/IAI Ltd (Israel) and Ramon Chips Ltd (Israel). MBT IAI defined the system architecture requirements and interfaces, The JPEG2K-E IP core from Alma implements the compression algorithm [2]. Ramon Chips adds SERDES interfaces and host interfaces and integrates the ASIC. MBT has demonstrated the full chip on an FPGA board and created system boards employing multiple JPIC units. The ASIC implementation, based on Ramon Chips' 180nm CMOS RadSafe[TM] RH cell library enables superior radiation hardness.

  11. ASIC design and data communications for the Boston retinal prosthesis.

    PubMed

    Shire, Douglas B; Ellersick, William; Kelly, Shawn K; Doyle, Patrick; Priplata, Attila; Drohan, William; Mendoza, Oscar; Gingerich, Marcus; McKee, Bruce; Wyatt, John L; Rizzo, Joseph F

    2012-01-01

    We report on the design and testing of a custom application-specific integrated circuit (ASIC) that has been developed as a key component of the Boston retinal prosthesis. This device has been designed for patients who are blind due to age-related macular degeneration or retinitis pigmentosa. Key safety and communication features of the low-power ASIC are described, as are the highly configurable neural stimulation current waveforms that are delivered to its greater than 256 output electrodes. The ASIC was created using an 0.18 micron Si fabrication process utilizing standard 1.8 volt CMOS transistors as well as 20 volt lightly doped drain FETs. The communication system receives frequency-shift keyed inputs at 6.78 MHz from an implanted secondary coil, and transmits data back to the control unit through a lower-bandwidth channel that employs load-shift keying. The design's safety is ensured by on-board electrode voltage monitoring, stimulus charge limits, error checking of data transmitted to the implant, and comprehensive self-test and performance monitoring features. Each stimulus cycle is initiated by a transmitted word with a full 32-bit error check code. Taken together, these features allow researchers to safely and wirelessly tailor retinal stimulation and vision recovery for each patient.

  12. The Ion Channel ASIC2 is Required for Baroreceptor and Autonomic Control of the Circulation

    PubMed Central

    Lu, Yongjun; Ma, Xiuying; Sabharwal, Rasna; Snitsarev, Vladislav; Morgan, Donald; Rahmouni, Kamal; Drummond, Heather A.; Whiteis, Carol A.; Costa, Vivian; Price, Margaret; Benson, Christopher; Welsh, Michael J.; Chapleau, Mark W.; Abboud, François M.

    2009-01-01

    SUMMARY Arterial baroreceptors provide a neural sensory input that reflexly regulates the autonomic drive of the circulation. Our goal was to test the hypothesis that a member of the acid sensing ion channel (ASIC) subfamily of the DEG/ENaC superfamily is an important determinant of the arterial baroreceptor reflex. We found that aortic baroreceptor neurons in the nodose ganglia and their terminals express ASIC2. Conscious ASIC2 null mice developed hypertension, had exaggerated sympathetic and depressed parasympathetic control of the circulation, and a decreased gain of the baroreflex, all indicative of an impaired baroreceptor reflex. Multiple measures of baroreceptor activity each suggests that mechanosensitivity is diminished in ASIC2- null mice. The results define ASIC2 as an important determinant of autonomic circulatory control and of baroreceptor sensitivity. The genetic disruption of ASIC2 recapitulates the pathological dysautonomia seen in heart failure and hypertension and defines a molecular defect that may be relevant to its development. PMID:20064394

  13. ASIC channel inhibition enhances excitotoxic neuronal death in an in vitro model of spinal cord injury.

    PubMed

    Mazzone, Graciela L; Veeraraghavan, Priyadharishini; Gonzalez-Inchauspe, Carlota; Nistri, Andrea; Uchitel, Osvaldo D

    2017-02-20

    In the spinal cord high extracellular glutamate evokes excitotoxic damage with neuronal loss and severe locomotor impairment. During the cell dysfunction process, extracellular pH becomes acid and may activate acid-sensing ion channels (ASICs) which could be important contributors to neurodegenerative pathologies. Our previous studies have shown that transient application of the glutamate analog kainate (KA) evokes delayed excitotoxic death of spinal neurons, while white matter is mainly spared. The present goal was to enquire if ASIC channels modulated KA damage in relation to locomotor network function and cell death. Mouse spinal cord slices were treated with KA (0.01 or 0.1mM) for 1h, and then washed out for 24h prior to analysis. RT-PCR results showed that KA (at 0.01mM concentration that is near-threshold for damage) increased mRNA expression of ASIC1a, ASIC1b, ASIC2 and ASIC3, an effect reversed by the ASIC inhibitor 4',6-diamidino-2-phenylindole (DAPI). A KA neurotoxic dose (0.1mM) reduced ASIC1a and ASIC2 expression. Cell viability assays demonstrated KA-induced large damage in spinal slices from mice with ASIC1a gene ablation. Likewise, immunohistochemistry indicated significant neuronal loss when KA was followed by the ASIC inhibitors DAPI or amiloride. Electrophysiological recording from ventral roots of isolated spinal cords showed that alternating oscillatory cycles were slowed down by 0.01mMKA, and intensely inhibited by subsequently applied DAPI or amiloride. Our data suggest that early rise in ASIC expression and function counteracted deleterious effects on spinal networks by raising the excitotoxicity threshold, a result with potential implications for improving neuroprotection.

  14. A Low Power Application-Specific Integrated Circuit (ASIC) Implementation of Wavelet Transform/Inverse Transform

    DTIC Science & Technology

    2001-03-01

    A unique ASIC was designed implementing the Haar Wavelet transform for image compression/decompression. ASIC operations include performing the Haar... wavelet transform on a 512 by 512 square pixel image, preparing the image for transmission by quantizing and thresholding the transformed data, and...performing the inverse Haar wavelet transform , returning the original image with only minor degradation. The ASIC is based on an existing four-chip FPGA

  15. Acid-sensing ion channel 2 (asic 2) and trkb interrelationships within the intervertebral disc

    PubMed Central

    Cuesta, Antonio; Viña, Eliseo; Cabo, Roberto; Vázquez, Gorka; Cobo, Ramón; García-Suárez, Olivia; García-Cosamalón, José; Vega, José A

    2015-01-01

    The cells of the intervertebral disc (IVD) have an unusual acidic and hyperosmotic microenvironment. They express acid-sensing ion channels (ASICs), gated by extracellular protons and mechanical forces, as well as neurotrophins and their signalling receptors. In the nervous tissues some neurotrophins regulate the expression of ASICs. The expression of ASIC2 and TrkB in human normal and degenerated IVD was assessed using quantitative-PCR, Western blot, and immunohistochemistry. Moreover, we investigated immunohistochemically the expression of ASIC2 in the IVD of TrkB-deficient mice. ASIC2 and TrkB mRNAs were found in normal human IVD and both increased significantly in degenerated IVD. ASIC2 and TrkB proteins were also found co-localized in a variable percentage of cells, being significantly higher in degenerated IVD than in controls. The murine IVD displayed ASIC2 immunoreactivity which was absent in the IVD of TrkB-deficient mice. Present results demonstrate the occurrence of ASIC2 and TrkB in the human IVD, and the increased expression of both in pathological IVD suggest their involvement in IVD degeneration. These data also suggest that TrkB-ligands might be involved in the regulation of ASIC2 expression, and therefore in mechanisms by which the IVD cells accommodate to low pH and hypertonicity. PMID:26617738

  16. The front-end electronics of the Spectrometer Telescope for Imaging X-Rays (STIX) on the ESA Solar Orbiter satellite

    NASA Astrophysics Data System (ADS)

    Grimm, O.; Bednarzik, M.; Commichau, V.; Graczyk, R.; Gröbelbauer, H. P.; Hurford, G.; Krucker, S.; Limousin, O.; Meuris, A.; Orleański, P.; Przepiórka, A.; Seweryn, K.; Skup, K.; Viertel, G.

    2012-12-01

    Solar Orbiter is an ESA mission to study the heliosphere in proximity to the Sun, scheduled for launch in January 2017. It carries a suite of ten instruments for comprehensive remote-sensing and in-situ measurements. The Spectrometer Telescope for Imaging X-Rays (STIX), one of the remote sensing instruments, images X-rays between 4 and 150keV using an Fourier technique. The angular resolution is 7 arcsec and the spectral resolution 1keV full-width-half-maximum at 6keV. X-ray detection uses pixelized Cadmium Telluride crystals provided by the Paul Scherrer Institute. The crystals are bonded to read-out hybrids developed by CEA Saclay, called Caliste-SO, incorporating a low-noise, low-power analog front-end ASIC IDeF-X HD. The crystals are cooled to -20°C to obtain very low leakage currents of less than 60pA per pixel, the prerequisite for obtaining the required spectral resolution. This article briefly describes the mission goals and then details the front-end electronics design and main challenges, resulting in part from the allocation limit in mass of 7kg and in power of 4W. Emphasis is placed on the design influence of the cooling requirement within the warm environment of a mission approaching the Sun to within the orbit of Mercury. The design for the long-term in-flight energy calibration is also explained.

  17. COUPLING

    DOEpatents

    Frisch, E.; Johnson, C.G.

    1962-05-15

    A detachable coupling arrangement is described which provides for varying the length of the handle of a tool used in relatively narrow channels. The arrangement consists of mating the key and keyhole formations in the cooperating handle sections. (AEC)

  18. NIRCA ASIC for the readout of focal plane arrays

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Steenari, David; Øya, Petter; Otnes Berge, Hans Kristian; Meier, Dirk; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar; Johansen, Tor Magnus; Stein, Timo

    2016-05-01

    This work is a continuation of our preliminary tests on NIRCA - the Near Infrared Readout and Controller ASIC [1]. The primary application for NIRCA is future astronomical science and Earth observation missions where NIRCA will be used with mercury cadmium telluride image sensors (HgCdTe, or MCT) [2], [3]. Recently we have completed the ASIC tests in the cryogenic environment down to 77 K. We have verified that NIRCA provides to the readout integrated circuit (ROIC) regulated power, bias voltages, and fully programmable digital sequences with sample control of the analogue to digital converters (ADC). Both analog and digital output from the ROIC can be acquired and image data is 8b/10bencoded and delivered via serial interface. The NIRCA also provides temperature measurement, and monitors several analog and digital input channels. The preliminary work confirms that NIRCA is latch-up immune and able to operate down to 77 K. We have tested the performance of the 12-bit ADC with pre-amplifier to have 10.8 equivalent number of bits (ENOB) at 1.4 Msps and maximum sampling speed at 2 Msps. The 1.8-V and 3.3-V output regulators and the 10-bit DACs show good linearity and work as expected. A programmable sequencer is implemented as a micro-controller with a custom instruction set. Here we describe the special operations of the sequencer with regards to the applications and a novel approach to parallel real-time hardware outputs. The test results of the working prototype ASIC show good functionality and performance from room temperature down to 77 K. The versatility of the chip makes the architecture a possible candidate for other research areas, defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  19. The Front-End of the NOEMA Interferometer

    NASA Astrophysics Data System (ADS)

    Chenu, Jean-Yves; Navarrini, Alessandro; Bortolotti, Yves; Butin, Gilles; Fontana, Anne Laure; Mahieu, Sylvain; Maier, Doris; Mattiocco, Francois; Serres, Patrice; Berton, Marylene; Garnier, Olivier; Moutote, Quentin; Parioleau, Magali; Pissard, Bruno; Reverdy, Julien

    2016-03-01

    The IRAM Plateau de Bure Interferometer (PdBI) is being upgraded to a new powerful millimeter-wave radio astronomy facility called the NOrthern Extended Millimeter Array (NOEMA) which will double the number of the 15-m diameter antennas from six to 12. All antennas will be equipped with a new generation of dual-polarization Front-End covering the 72-373-GHz frequency range with four independent receivers integrated into a single cryostat. All receivers utilize sideband separating (2SB) superconductor-insulator-superconductor (SIS) mixers, each of which delivers two ~7.7-GHz-wide intermediate frequency (IF) outputs per polarization channel, thus increasing the total IF bandwidth which can be processed with a single setting of the interferometer from 8 GHz (2 × 4 GHz delivered by the existing PdBI Front-End) to ~31 GHz (4 × 7.7 GHz delivered by the NOEMA Front-End). The first of the new NOEMA antennas (Ant. 7) has recently been completed and the first NOEMA Front-End successfully developed and installed in it. For the coming years, our goal is to upgrade all of the Front-Ends currently installed on the six existing PdBI antennas to the new NOEMA standard and to build six additional ones (plus one spare) for the new NOEMA antennas. In this paper, we describe the design, fabrication, and assembly of the Front-End we have developed for NOEMA Antenna 7. The instrument has state-of-the-art performance and sets a new standard in the post-ALMA generation technology.

  20. Planar millimeter wave radar frontend for automotive applications

    NASA Astrophysics Data System (ADS)

    Grubert, J.; Heyen, J.; Metz, C.; Stange, L. C.; Jacob, A. F.

    2003-05-01

    A fully integrated planar sensor for 77 GHz automotive applications is presented. The frontend consists of a transceiver multichip module and an electronically steerable microstrip patch array. The antenna feed network is based on a modified Rotman-lens and connected to the array in a multilayer approach offering higher integration. Furthermore, the frontend comprises a phase lock loop to allow proper frequency-modulated continuous wave (FMCW) radar operation. The latest experimental results verify the functionality of this advanced frontend design featuring automatic cruise control, precrash sensing and cut-in detection. These promising radar measurements give reason to a detailed theoretical investigation of system performance. Employing commercially available MMIC various circuit topologies are compared based on signal-tonoise considerations. Different scenarios for both sequential and parallel lobing hint to more advanced sensor designs and better performance. These improvements strongly depend on the availability of suitable MMIC and reliable packaging technologies. Within our present approach possible future MMIC developments are already considered and, thus, can be easily adapted by the flexible frontend design. Es wird ein integrierter planarer Sensor für 77 GHz Radaranwendungen vorgestellt. Das Frontend besteht aus einem Sende- und Empfangs-Multi-Chip-Modul und einer elektronisch schwenkbaren Antenne. Das Speisenetzwerk der Antenne basiert auf einer modifizierten Rotman- Linse. Für eine kompakte Bauweise sind Antenne und Speisenetzwerk mehrlagig integriert. Weiterhin umfasst das Frontend eine Phasenregelschleife für eine präzise Steuerung des frequenzmodulierten Dauerstrichradars. Die aktuellen Messergebnisse bestätigen die Funktionalit¨at dieses neuartigen Frontend-Designs, das automatische Geschwindigkeitsregelung, Kollisionswarnung sowie Nahbereichsüberwachung ermöglicht. Die Qualität der Messergebnisse hat weiterf

  1. Realization of Miniaturized Multi-/Wideband Microwave Front-Ends

    NASA Astrophysics Data System (ADS)

    Al Shamaileh, Khair A.

    the conventional design with NTLs of wideband matching nature. To bring this concept into practice, the equivalent transmission line model is used for profiling impedance variations. The proposed technique leads to flexible spectrum allocation and matching level. Moreover, the resulting structures are compact and planar. First, the analytical results of three 3-way BPDs of different fractional bandwidths are presented and discussed to validate the proposed approach. Then, two examples of 3- and 5-way BPDs with bandwidths of 4--10 GHz and 5--9 GHz, respectively, are simulated, fabricated, and measured. Simulated and measured results show an acceptable input port matching of below --15 dB and --12.5 dB for the 3- and 5-way dividers, respectively, over the bands of interest. The resulting transmission parameters of the 3- and 5-way dividers are --4.77+/-;1 dB and --7+/-1 dB, respectively, over the design bands; which are in close proximity to their theoretical values. The proposed wideband BPD dividers find many applications in microwave front-end circuitry, especially in only-transmitting antenna subsystems, such as multi-/broad-cast communications, where neither output ports matching nor isolation is a necessity. The third proposed component is a 90° hybrid branch-line coupler (BLC) with multi-/wideband frequency matching. To obtain a multi-frequency operation, NTLs of lengths equal to those in the conventional design are incorporated through the even- and odd-mode analysis. The proposed structure is relatively simple and is fabricated on a single-layered substrate. Two design examples of dual-/triple-frequency BLCs suitable for GSM, WLAN, and Wi-Fi applications are designed, fabricated and evaluated experimentally to validate the proposed methodology. The same concept is extended to realize a broadband BLC with arbitrary coupling levels. Based on how impedances are profiled, the fractional bandwidth of a single-section 90° 3-dB BLC is extended to 57%, and the

  2. ASIC-dependent LTP at multiple glutamatergic synapses in amygdala network is required for fear memory

    PubMed Central

    Chiang, Po-Han; Chien, Ta-Chun; Chen, Chih-Cheng; Yanagawa, Yuchio; Lien, Cheng-Chang

    2015-01-01

    Genetic variants in the human ortholog of acid-sensing ion channel-1a subunit (ASIC1a) gene are associated with panic disorder and amygdala dysfunction. Both fear learning and activity-induced long-term potentiation (LTP) of cortico-basolateral amygdala (BLA) synapses are impaired in ASIC1a-null mice, suggesting a critical role of ASICs in fear memory formation. In this study, we found that ASICs were differentially expressed within the amygdala neuronal population, and the extent of LTP at various glutamatergic synapses correlated with the level of ASIC expression in postsynaptic neurons. Importantly, selective deletion of ASIC1a in GABAergic cells, including amygdala output neurons, eliminated LTP in these cells and reduced fear learning to the same extent as that found when ASIC1a was selectively abolished in BLA glutamatergic neurons. Thus, fear learning requires ASIC-dependent LTP at multiple amygdala synapses, including both cortico-BLA input synapses and intra-amygdala synapses on output neurons. PMID:25988357

  3. ASIC3 is required for development of fatigue-induced hyperalgesia

    PubMed Central

    Gregory, Nicholas S.; Brito, Renan G.; Oliveira Fusaro, Maria Cláudia G; Sluka, Kathleen A.

    2015-01-01

    An acute bout of exercise can exacerbate pain, hindering participation in regular exercise and daily activities. The mechanisms underlying pain in response to acute exercise are poorly understood. We hypothesized that proton accumulation during muscle fatigue activates ASIC3 on muscle nociceptors to produce hyperalgesia. We investigated the role of ASIC3 using genetic and pharmacological approaches in a model of fatigue-enhanced hyperalgesia. This model uses two injections of pH 5.0 saline into muscle in combination with an electrically-induced fatigue of the same muscle just prior to the second injection of acid to induce mechanical hyperalgesia. We show a significant decrease in muscle force and decrease in muscle pH after 6 minutes of electrical stimulation. Genetic deletion of ASIC3 using knockout mice and pharmacological blockade of ASIC3 with APETx2 in muscle prevents the fatigue-enhanced hyperalgesia. However, ASIC3−/− mice and APETx2 have no effect on the fatigue response. Genetic deletion of ASIC3 in primary afferents innervating muscle using an HSV-1 expressing miRNA to ASIC3 surprisingly had no effect on the development of the hyperalgesia. Muscle fatigue increased the number of macrophages in muscle, and removal of macrophages from muscle with clodronate liposomes prevented the development of fatigue-enhanced hyperalgesia. Thus, these data suggest that fatigue reduces pH in muscle that subsequently activates ASIC3 on macrophages to enhance hyperalgesia to muscle insult. PMID:25577172

  4. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... causes a Group 2 batch front-end process vent to become a Group 1 batch front-end process vent, the owner..., as defined in § 63.488(i)(1), is made that causes a Group 2 batch front-end process vent with annual... 40 Protection of Environment 9 2011-07-01 2011-07-01 false Batch front-end process...

  5. Multichannel readout ASIC design flow for high energy physics and cosmic rays experiments

    NASA Astrophysics Data System (ADS)

    Voronin, A.; Malankin, E.

    2016-02-01

    In the large-scale high energy physics and astrophysics experiments multi-channel readout application specific integrated circuits (ASICs) are widely used. The ASICs for such experiments are complicated systems, which usually include both analog and digital building blocks. The complexity and large number of channels in such ASICs require the proper methodological approach to their design. The paper represents the mixed-signal design flow of the ASICs for high energy physics and cosmic rays experiments. This flow was successfully embedded to the development of the read-out ASIC prototype for the muon chambers of the CBM experiment. The approach was approved in UMC CMOS MMRF 180 nm process. The design flow enable to analyse the mixed-signal system operation on the different levels: functional, behavioural, schematic and post layout including parasitic elements. The proposed design flow allows reducing the simulation period and eliminating the functionality mismatches on the very early stage of the design.

  6. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 9 2011-07-01 2011-07-01 false Batch front-end process vents-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

  7. ASIC3 Contributes to the Blunted Muscle Metaboreflex in Heart Failure

    PubMed Central

    Xing, Jihong; Lu, Jian; Li, Jianhua

    2014-01-01

    Introduction During exercise, the sympathetic nervous system is activated and blood pressure and heart rate increase. In heart failure (HF), the muscle metaboreceptor contribution to sympathetic outflow is attenuated and the mechanoreceptor contribution is accentuated. Previous studies suggest that lactic acid stimulates acid sensing channel subtype 3 (ASIC3), inducing a neurally mediated pressor response. Thus, we hypothesized that the pressor response to ASIC3 stimulation is smaller in HF rats due to attenuation in expression and function of ASIC3 in sensory nerves. Methods Lactic acid was injected into the arterial blood supply of the hindlimb to stimulate ASIC3 in muscle afferent nerves and evoke the muscle metaboreceptor response in control rats and HF rats. Also, western blot analysis was employed to examine expression of ASIC3 in dorsal root ganglion (DRG) and patch clamp to examine current response with ASIC3 activation. Results Lactic acid (4 µmol/kg) increased mean arterial pressure by 28±5 mmHg in controls (n=6) but only by 16±3 mmHg (P<0.05 vs. control) in HF (n=8). In addition, HF decreased the protein levels of ASIC3 in DRG (optical density: 1.03±0.02 in control vs. 0.79±0.03 in HF, P<0.05; n=6 in each group). The peak current amplitude of dorsal DRG neuron in response to ASIC3 stimulation is smaller in HF rats than that in control rats. Conclusions Compared with controls, cardiovascular responses to lactic acid administered into the hindlimb muscles are blunted in HF rats owing to attenuated ASIC3. This suggests that ASIC3 plays a role in engagement in the attenuated metaboreceptor component of the exercise pressor reflex in HF. PMID:24983337

  8. NMDAR-Mediated Hippocampal Neuronal Death is Exacerbated by Activities of ASIC1a

    PubMed Central

    Gao, Su; Yu, Yang; Ma, Zhi-Yuan; Sun, Hui; Zhang, Yong-Li; Wang, Xing-Tao; Wang, Chaoyun; Fan, Wei-Ming; Zheng, Qing-Yin

    2015-01-01

    NMDARs and ASIC1a both exist in central synapses and mediate important physiological and pathological conditions, but the functional relationship between them is unclear. Here we report several novel findings that may shed light on the functional relationship between these two ion channels in the excitatory postsynaptic membrane of mouse hippocampus. Firstly, NMDAR activation induced by either NMDA or OGD led to increased [Ca2+]i and greater apoptotic and necrotic cell deaths in cultured hippocampal neurons; these cell deaths were prevented by application of NMDAR antagonists. Secondly, ASIC1a activation induced by pH 6.0 extracellular solution (ECS) showed similar increases in apoptotic and necrotic cell deaths; these cell deaths were prevented by ASIC1a antagonists, and also by NMDAR antagonists. Since increased [Ca2+]i leads to increased cell deaths and since NMDAR exhibits much greater calcium permeability than ASIC1a, these data suggest that ASIC1a-induced neuronal death is mediated through activation of NMDARs. Thirdly, treatment of hippocampal cultures with both NMDA and acidic ECS induced greater degrees of cell deaths than either NMDA or acidic ECS treatment alone. These results suggest that ASIC1a activation up-regulates NMDAR function. Additional data supporting the functional relationship between ASIC1a and NMDAR are found in our electrophysiology experiments in hippocampal slices, where stimulation of ASIC1a induced a marked increase in NMDAR EPSC amplitude, and inhibition of ASIC1a resulted in a decrease in NMDAR EPSC amplitude. In summary, we present evidence that ASIC1a activity facilitates NMDAR function and exacerbates NMDAR-mediated neuronal death in pathological conditions. These findings are invaluable to the search for novel therapeutic targets in the treatment of brain ischemia. PMID:25947342

  9. READOUT ASIC FOR 3D POSITION-SENSITIVE DETECTORS.

    SciTech Connect

    DE GERONIMO,G.; VERNON, E.; ACKLEY, K.; DRAGONE, A.; FRIED, J.; OCONNOR, P.; HE, Z.; HERMAN, C.; ZHANG, F.

    2007-10-27

    We describe an application specific integrated circuit (ASIC) for 3D position-sensitive detectors. It was optimized for pixelated CZT sensors, and it measures, corresponding to an ionizing event, the energy and timing of signals from 121 anodes and one cathode. Each channel provides low-noise charge amplification, high-order shaping, along with peak- and timing-detection. The cathode's timing can be measured in three different ways: the first is based on multiple thresholds on the charge amplifier's voltage output; the second uses the threshold crossing of a fast-shaped signal; and the third measures the peak amplitude and timing from a bipolar shaper. With its power of 2 mW per channel the ASIC measures, on a CZT sensor Connected and biased, charges up to 100 fC with an electronic resolution better than 200 e{sup -} rms. Our preliminary spectral measurements applying a simple cathode/mode ratio correction demonstrated a single-pixel resolution of 4.8 keV (0.72 %) at 662 keV, with the electronics and leakage current contributing in total with 2.1 keV.

  10. Replication of Space-Shuttle Computers in FPGAs and ASICs

    NASA Technical Reports Server (NTRS)

    Ferguson, Roscoe C.

    2008-01-01

    A document discusses the replication of the functionality of the onboard space-shuttle general-purpose computers (GPCs) in field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). The purpose of the replication effort is to enable utilization of proven space-shuttle flight software and software-development facilities to the extent possible during development of software for flight computers for a new generation of launch vehicles derived from the space shuttles. The replication involves specifying the instruction set of the central processing unit and the input/output processor (IOP) of the space-shuttle GPC in a hardware description language (HDL). The HDL is synthesized to form a "core" processor in an FPGA or, less preferably, in an ASIC. The core processor can be used to create a flight-control card to be inserted into a new avionics computer. The IOP of the GPC as implemented in the core processor could be designed to support data-bus protocols other than that of a multiplexer interface adapter (MIA) used in the space shuttle. Hence, a computer containing the core processor could be tailored to communicate via the space-shuttle GPC bus and/or one or more other buses.

  11. ASIC for calorimetric measurements in the astrophysical experiment NUCLEON

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Voronin, A.; Karmanov, D.; Kudryashov, I.; Kovalev, I.; Shumikhin, V.

    2016-02-01

    A satellite with the NUCLEON apparatus was launched in Dec. 2014. The space NUCLEON project of ROSCOSMOS is designed to investigate cosmic ray nuclei energy spectra from 100 GeV to 1000 TeV as well as cosmic ray electron spectra from 20 GeV to 3 TeV. The method of energy determination by means of a silicon instrument for measuring the particle charge of cosmic rays and the calorimetric system were developed. The main parameters, that determine the quality of calorimetric systems are linearity of transfer characteristic and the dynamic range of input signals, which should reach 30 000 MIPs (minimum ionizing particles). The ASIC, satisfying these requirements, consisting of 32 channels with a unique dynamic range from 1 to 40000 MIPs, signal to noise ratio not less than 2.5 at a shaper peaking time of 2 μs and a low power consumption of 1.5 mW/channel has been designed. The first results of the ASIC functionality in space are presented.

  12. A CMOS ASIC Design for SiPM Arrays

    PubMed Central

    Dey, Samrat; Banks, Lushon; Chen, Shaw-Pin; Xu, Wenbin; Lewellen, Thomas K.; Miyaoka, Robert S.; Rudell, Jacques C.

    2012-01-01

    Our lab has previously reported on novel board-level readout electronics for an 8×8 silicon photomultiplier (SiPM) array featuring row/column summation technique to reduce the hardware requirements for signal processing. We are taking the next step by implementing a monolithic CMOS chip which is based on the row-column architecture. In addition, this paper explores the option of using diagonal summation as well as calibration to compensate for temperature and process variations. Further description of a timing pickoff signal which aligns all of the positioning (spatial channels) pulses in the array is described. The ASIC design is targeted to be scalable with the detector size and flexible to accommodate detectors from different vendors. This paper focuses on circuit implementation issues associated with the design of the ASIC to interface our Phase II MiCES FPGA board with a SiPM array. Moreover, a discussion is provided for strategies to eventually integrate all the analog and mixed-signal electronics with the SiPM, on either a single-silicon substrate or multi-chip module (MCM). PMID:24825923

  13. A CMOS ASIC Design for SiPM Arrays.

    PubMed

    Dey, Samrat; Banks, Lushon; Chen, Shaw-Pin; Xu, Wenbin; Lewellen, Thomas K; Miyaoka, Robert S; Rudell, Jacques C

    2011-12-01

    Our lab has previously reported on novel board-level readout electronics for an 8×8 silicon photomultiplier (SiPM) array featuring row/column summation technique to reduce the hardware requirements for signal processing. We are taking the next step by implementing a monolithic CMOS chip which is based on the row-column architecture. In addition, this paper explores the option of using diagonal summation as well as calibration to compensate for temperature and process variations. Further description of a timing pickoff signal which aligns all of the positioning (spatial channels) pulses in the array is described. The ASIC design is targeted to be scalable with the detector size and flexible to accommodate detectors from different vendors. This paper focuses on circuit implementation issues associated with the design of the ASIC to interface our Phase II MiCES FPGA board with a SiPM array. Moreover, a discussion is provided for strategies to eventually integrate all the analog and mixed-signal electronics with the SiPM, on either a single-silicon substrate or multi-chip module (MCM).

  14. SPIROC: design and performances of a dedicated very front-end electronics for an ILC Analog Hadronic CALorimeter (AHCAL) prototype with SiPM read-out

    NASA Astrophysics Data System (ADS)

    Conforti Di Lorenzo, S.; Callier, S.; Fleury, J.; Dulucq, F.; De la Taille, C.; Chassard, G. Martin; Raux, L.; Seguin-Moreau, N.

    2013-01-01

    For the future e+ e- International Linear Collider (ILC) the ASIC SPIROC (Silicon Photomultiplier Integrated Read-Out Chip) was designed to read out the Analog Hadronic Calorimeter (AHCAL) equipped with Silicon Photomultiplier (SiPM). It is an evolution of the FLC_SiPM chip designed by the OMEGA group in 2005. SPIROC2 [1] was realized in AMS SiGe 0.35 μm technology [2] and developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of read-out channels. This ASIC is a very front-end read-out chip that integrates 36 self triggered channels with variable gain to achieve charge and time measurements. The charge measurement must be performed from 1 up to 2000 photo-electrons (p.e.) corresponding to 160 fC up to 320 pC for SiPM gain 106. The time measurement is performed with a coarse 12-bit counter related to the bunch crossing clock (up to 5 MHz) and a fine time ramp based on this clock (down to 200 ns) to achieve a resolution of 1 ns. An analog memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. The analog memory content (time and charge) is digitized thanks to an internal 12-bit Wilkinson ADC. The data is then stored in a 4kbytes RAM. A complex digital part is necessary to manage all these features and to transfer the data to the DAQ. SPIROC2 is the second generation of the SPIROC ASIC family designed in 2008 by the OMEGA group. A very similar version (SPIROC2c) was submitted in February 2012 to improve the noise performance and also to integrate a new TDC (Time to Digital Converter) structure. This paper describes SPIROC2 and SPIROC2c ASICs and illustrates the main characteristics thank to a series of measurements.

  15. Computer Aided Design of Microwave Front-End Components and Antennas for Ultrawideband Systems

    NASA Astrophysics Data System (ADS)

    Almalkawi, Mohammad J.

    This dissertation contributes to the development of novel designs, and implementation techniques for microwave front-end components and packaging employing both transmission line theory and classical circuit theory. For compact realization, all the presented components have been implemented using planar microstrip technology. Recently, there has been an increase in the demand for compact microwave front-ends which exhibit advanced functions. Under this trend, the development of multiband front-end components such as antennas with multiple band-notches, dual-band microwave filters, and high-Q reconfigurable filters play a pivotal role for more convenient and compact products. Therefore, the content of this dissertation is composed of three parts. The first part focuses on packaging as an essential process in RF/microwave integration that is used to mitigate unwanted radiations or crosstalk due to the connection traces. In printed circuit board (PCB) interconnects, crosstalk reduction has been achieved by adding a guard trace with/without vias or stitching capacitors that control the coupling between the traces. In this research, a new signal trace configuration to reduce crosstalk without adding additional components or guard traces is introduced. The second part of this dissertation considers the inherent challenges in the design of multiple-band notched ultrawideband antennas that include the integration of multilayer antennas with RF front-ends and the realization of compact size antennas. In this work, a compact UWB antenna with quad band-notched frequency characteristics was designed, fabricated, and tested demonstrating the desired performance. The third part discusses the design of single- and dual-band dual-mode filters exhibiting both symmetric and asymmetric transfer characteristics. In dual-mode filters, the numbers of resonators that determine the order of a filter are reduced by half while maintaining the performance of the actual filter order. Here, in

  16. An ultra low-power front-end IC for wearable health monitoring system.

    PubMed

    Yu-Pin Hsu; Zemin Liu; Hella, Mona M

    2016-08-01

    This paper presents a low-power front-end IC for wearable health monitoring systems. The IC, designed in a standard 0.13μm CMOS technology, fully integrates a low-noise analog front-end (AFE) to process the weak bio-signals, followed by an analog-to-digital converter (ADC) to digitize the extracted signals. An AC-coupled driving buffer, that interfaces between the AFE and the ADC is introduced to scale down the power supply of the ADC. The power consumption decreases by 50% compared to the case without power supply scaling. The AFE passes signals from 0.5Hz to 280Hz and from 0.7Hz to 160Hz with a simulated input referred noise of 1.6μVrms and achieves a maximum gain of 35dB/41dB respectively, with a noise-efficiency factor (NEF) of the AFE is 1. The 8-bit ADC achieves a simulated 7.96-bit resolution at 10KS/s sampling rate under 0.5V supply voltage. The overall system consumes only 0.86μW at dual supply voltages of 1V (AFE) and 0.5 V (ADC).

  17. EXPERIENCE WITH FPGA-BASED PROCESSOR CORE AS FRONT-END COMPUTER.

    SciTech Connect

    HOFF, L.T.

    2005-10-10

    The RHIC control system architecture follows the familiar ''standard model''. LINUX workstations are used as operator consoles. Front-end computers are distributed around the accelerator, close to equipment being controlled or monitored. These computers are generally based on VMEbus CPU modules running the VxWorks operating system. I/O is typically performed via the VMEbus, or via PMC daughter cards (via an internal PCI bus), or via on-board I/O interfaces (Ethernet or serial). Advances in FPGA size and sophistication now permit running virtual processor ''cores'' within the FPGA logic, including ''cores'' with advanced features such as memory management. Such systems offer certain advantages over traditional VMEbus Front-end computers. Advantages include tighter coupling with FPGA logic, and therefore higher I/O bandwidth, and flexibility in packaging, possibly resulting in a lower noise environment and/or lower cost. This paper presents the experience acquired while porting the RHIC control system to a PowerPC 405 core within a Xilinx FPGA for use in low-level RF control.

  18. Differential effects of ASIC3 and TRPV1 deletion on gastroesophageal sensation in mice.

    PubMed

    Bielefeldt, Klaus; Davis, Brian M

    2008-01-01

    Using a recently developed in vitro preparation of vagal afferent pathways, we examined the role of TRPV1 and ASIC3 on the mechano- and chemosensitive properties of gastroesophageal sensory neurons. Esophagus, stomach, and the intact vagus nerves up to the central terminations were carefully dissected from TRPV1 and ASIC3 knockout mice and wild-type controls. The organ preparation was placed in a superfusion chamber to obtain intracellular recordings from the soma of nodose neurons during luminal stimulation of esophagus and stomach. The proximal esophagus and distal stomach were separately intubated to allow perfusion and graded luminal distension. In wild-type mice, mechanosensitive neurons were activated by low distension pressures and encoded stimulus intensity over the entire range tested. Luminal acidification significantly transiently increased the resting frequency but did not alter responses to subsequent mechanical stimulation. ASIC3 and TRPV1 knockout significantly blunted responses to distension compared with wild-type controls, with deletion of TRPV1 having a more significant effect than ASIC3 deletion. Luminal acidification did not activate mechanosensory neurons in ASIC3 and TRPV1 knockout mice. Our data demonstrate a role of TRPV1 in chemo- and mechanosensation of gastroesophageal afferents. ASIC3 may contribute to acid sensation but plays a more subtle role in responses to distending stimuli. Considering the importance of acid in dyspeptic symptoms and gastroesophageal reflux, TRPV1 or ASIC3 may be an attractive target for treatment strategies in patients who do not respond to acid suppressive therapy.

  19. Reconfigurable ASIC for a low level trigger system in Cherenkov Telescope Cameras

    NASA Astrophysics Data System (ADS)

    Gascon, D.; Barrio, J. A.; Blanch, O.; Boix, J.; Delagnes, E.; Delgado, C.; Freixas, L.; Guilloux, F.; Coto, R. L.; Griffiths, S.; Martínez, G.; Martínez, O.; Sanuy, A.; Tejedor, L. Á.

    2016-11-01

    A versatile and reconfigurable ASIC is presented, which implements two different concepts of low level trigger (L0) for Cherenkov telescopes: the Majority trigger (sum of discriminated inputs) and the Sum trigger concept (analogue clipped sum of inputs). Up to 7 input signals can be processed following one or both of the previous trigger concepts. Each differential pair output of the discriminator is also available as a LVDS output. Differential circuitry using local feedback allows the ASIC to achieve high speed (500 MHz) while maintaining good linearity in a 1 Vpp range. Experimental results are presented. A number of prototype camera designs of the Cherenkov Telescope Array (CTA) project will use this ASIC.

  20. Test of ATLAS RPCs Front-End electronics

    NASA Astrophysics Data System (ADS)

    Aielli, G.; Camarri, P.; Cardarelli, R.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Paoloni, A.; Pastori, E.; Santonico, R.

    2003-08-01

    The Front-End Electronics performing the ATLAS RPCs readout is a full custom 8 channels GaAs circuit, which integrates in a single die both the analog and digital signal processing. The die is bonded on the Front-End board which is completely closed inside the detector Faraday cage. About 50 000 FE boards are foreseen for the experiment. The complete functionality of the FE boards will be certificated before the detector assembly. We describe here the systematic test devoted to check the dynamic functionality of each single channel and the selection criteria applied. It measures and registers all relevant electronics parameters to build up a complete database for the experiment. The statistical results from more than 1100 channels are presented.

  1. A High-Performance Deformable Mirror with Integrated Driver ASIC for Space Based Active Optics

    NASA Astrophysics Data System (ADS)

    Shelton, Chris

    Direct imaging of exoplanets is key to fully understanding these systems through spectroscopy and astrometry. The primary impediment to direct imaging of exoplanets is the extremely high brightness ratio between the planet and its parent star. Direct imaging requires a technique for contrast suppression, which include coronagraphs, and nulling interferometers. Deformable mirrors (DMs) are essential to both of these techniques. With space missions in mind, Microscale is developing a novel DM with direct integration of DM and its electronic control functions in a single small envelope. The Application Specific Integrated Circuit (ASIC) is key to the shrinking of the electronic control functions to a size compatible with direct integration with the DM. Through a NASA SBIR project, Microscale, with JPL oversight, has successfully demonstrated a unique deformable mirror (DM) driver ASIC prototype based on an ultra-low power switch architecture. Microscale calls this the Switch-Mode ASIC, or SM-ASIC, and has characterized it for a key set of performance parameters, and has tested its operation with a variety of actuator loads, such as piezo stack and unimorph, and over a wide temperature range. These tests show the SM-ASIC's capability of supporting active optics in correcting aberrations of a telescope in space. Microscale has also developed DMs to go with the SM-ASIC driver. The latest DM version produced uses small piezo stack elements in an 8x8 array, bonded to a novel silicon facesheet structure fabricated monolithically into a polished mirror on one side and mechanical linkage posts that connect to the piezoelectric stack actuators on the other. In this Supporting Technology proposal we propose to further develop the ASIC-DM and have assembled a very capable team to do so. It will be led by JPL, which has considerable expertise with DMs used in Adaptive Optics systems, with high-contrast imaging systems for exoplanet missions, and with designing DM driver

  2. A 15 GSa/s, 1.5 GHz bandwidth waveform digitizing ASIC

    NASA Astrophysics Data System (ADS)

    Oberla, Eric; Genat, Jean-Francois; Grabas, Hervé; Frisch, Henry; Nishimura, Kurtis; Varner, Gary

    2014-01-01

    The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in large-area time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 μm CMOS process. On each of the six analog channels, PSEC4 employs a switched capacitor array (SCA) of 256 samples deep, a ramp-compare ADC with 10.5 bits of DC dynamic range, and a serial data readout with the capability of region-of-interest windowing to reduce dead time. The sampling rate can be adjusted between 4 and 15 Gigasamples/second (GSa/s) on all channels and is servo-controlled on-chip with a low-jitter delay-locked loop (DLL). The input signals are passively coupled on-chip with a -3 dB analog bandwidth of 1.5 GHz. The power consumption in quiescent sampling mode is less than 50 mW/chip; at a sustained trigger and a readout rate of 50 kHz the chip draws 100 mW. After fixed-pattern pedestal subtraction, the uncorrected integral non-linearity is 0.15% over a 750 mV dynamic range. With a linearity correction, a full 1 V signal voltage range is available. The sampling timebase has a fixed-pattern non-linearity with an RMS of 13%, which can be corrected for precision waveform feature extraction and timing.

  3. Local ASIC3 modulates pain and disease progression in a rat model of osteoarthritis

    PubMed Central

    2012-01-01

    Background Recent data have suggested a relationship between acute arthritic pain and acid sensing ion channel 3 (ASIC3) on primary afferent fibers innervating joints. The purpose of this study was to clarify the role of ASIC3 in a rat model of osteoarthritis (OA) which is considered a degenerative rather than an inflammatory disease. Methods We induced OA via intra-articular mono-iodoacetate (MIA) injection, and evaluated pain-related behaviors including weight bearing measured with an incapacitance tester and paw withdrawal threshold in a von Frey hair test, histology of affected knee joint, and immunohistochemistry of knee joint afferents. We also assessed the effect of ASIC3 selective peptide blocker (APETx2) on pain behavior, disease progression, and ASIC3 expression in knee joint afferents. Results OA rats showed not only weight-bearing pain but also mechanical hyperalgesia outside the knee joint (secondary hyperalgesia). ASIC3 expression in knee joint afferents was significantly upregulated approximately twofold at Day 14. Continuous intra-articular injections of APETx2 inhibited weight distribution asymmetry and secondary hyperalgesia by attenuating ASIC3 upregulation in knee joint afferents. Histology of ipsilateral knee joint showed APETx2 worked chondroprotectively if administered in the early, but not late phase. Conclusions Local ASIC3 immunoreactive nerve is strongly associated with weight-bearing pain and secondary hyperalgesia in MIA-induced OA model. APETx2 inhibited ASIC3 upregulation in knee joint afferents regardless of the time-point of administration. Furthermore, early administration of APETx2 prevented cartilage damage. APETx2 is a novel, promising drug for OA by relieving pain and inhibiting disease progression. PMID:22909215

  4. Acid-sensing ion channels (ASICs): pharmacology and implication in pain.

    PubMed

    Deval, Emmanuel; Gasull, Xavier; Noël, Jacques; Salinas, Miguel; Baron, Anne; Diochot, Sylvie; Lingueglia, Eric

    2010-12-01

    Tissue acidosis is a common feature of many painful conditions. Protons are indeed among the first factors released by injured tissues, inducing a local pH fall that depolarizes peripheral free terminals of nociceptors and leads to pain. ASICs are excitatory cation channels directly gated by extracellular protons that are expressed in the nervous system. In sensory neurons, they act as "chemo-electrical" transducers and are involved in somatic and visceral nociception. Two highly specific inhibitory peptides isolated from animal venoms have considerably helped in the understanding of the physiological roles of these channels in pain. At the peripheral level, ASIC3 is important for inflammatory pain. Its expression and its activity are potentiated by several pain mediators present in the "inflammatory soup" that sensitize nociceptors. ASICs have also been involved in some aspects of mechanosensation and mechanonociception, notably in the gastrointestinal tract, but the underlying mechanisms remain to be determined. At the central level, ASIC1a is largely expressed in spinal cord neurons where it has been proposed to participate in the processing of noxious stimuli and in central sensitization. Blocking ASIC1a in the spinal cord also produces a potent analgesia in a broad range of pain conditions through activation of the opiate system. Targeting ASIC channels at different levels of the nervous system could therefore be an interesting strategy for the relief of pain.

  5. ASIC1a Deficient Mice Show Unaltered Neurodegeneration in the Subacute MPTP Model of Parkinson Disease

    PubMed Central

    Komnig, Daniel; Imgrund, Silke; Reich, Arno; Gründer, Stefan; Falkenburger, Björn H.

    2016-01-01

    Inflammation contributes to the death of dopaminergic neurons in Parkinson disease and can be accompanied by acidification of extracellular pH, which may activate acid-sensing ion channels (ASIC). Accordingly, amiloride, a non-selective inhibitor of ASIC, was protective in an acute 1-methyl-4-phenyl-1,2,3,6-tetrahydropyridine (MPTP) mouse model of Parkinson disease. To complement these findings we determined MPTP toxicity in mice deficient for ASIC1a, the most common ASIC isoform in neurons. MPTP was applied i.p. in doses of 30 mg per kg on five consecutive days. We determined the number of dopaminergic neurons in the substantia nigra, assayed by stereological counting 14 days after the last MPTP injection, the number of Nissl positive neurons in the substantia nigra, and the concentration of catecholamines in the striatum. There was no difference between ASIC1a-deficient mice and wildtype controls. We are therefore not able to confirm that ASIC1a are involved in MPTP toxicity. The difference might relate to the subacute MPTP model we used, which more closely resembles the pathogenesis of Parkinson disease, or to further targets of amiloride. PMID:27820820

  6. Serotonin facilitates peripheral pain sensitivity in a manner that depends on the nonproton ligand sensing domain of ASIC3 channel.

    PubMed

    Wang, Xiang; Li, Wei-Guang; Yu, Ye; Xiao, Xian; Cheng, Jin; Zeng, Wei-Zheng; Peng, Zhong; Xi Zhu, Michael; Xu, Tian-Le

    2013-03-06

    Tissue acidosis and inflammatory mediators play critical roles in inflammatory pain. Extracellular acidosis activates acid-sensing ion channels (ASICs), which have emerged as key sensors for extracellular protons in the central and peripheral nervous systems and play key roles in pain sensation and transmission. Additionally, inflammatory mediators, such as serotonin (5-HT), are known to enhance pain sensation. However, functional interactions among protons, inflammatory mediators, and ASICs in pain sensation are poorly understood. In the present study, we show that 5-HT, a classical pro-inflammatory mediator, specifically enhances the proton-evoked sustained, but not transient, currents mediated by homomeric ASIC3 channels and heteromeric ASIC3/1a and ASIC3/1b channels. Unexpectedly, the effect of 5-HT on ASIC3 channels does not involve activation of 5-HT receptors, but is mediated via a functional interaction between 5-HT and ASIC3 channels. We further show that the effect of 5-HT on ASIC3 channels depends on the newly identified nonproton ligand sensing domain. Finally, coapplication of 5-HT and acid significantly increased pain-related behaviors as assayed by the paw-licking test in mice, which was largely attenuated in ASIC3 knock-out mice, and inhibited by the nonselective ASIC inhibitor amiloride. Together, these data identify ASIC3 channels as an unexpected molecular target for acute actions of 5-HT in inflammatory pain sensation and reveal an important role of ASIC3 channels in regulating inflammatory pain via coincident detection of extracellular protons and inflammatory mediators.

  7. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    NASA Technical Reports Server (NTRS)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  8. Airbag accelerometer with a simple switched-capacitor readout ASIC

    NASA Astrophysics Data System (ADS)

    Tsugai, Masahiro; Hirata, Yoshiaki; Tanimoto, Koji; Usami, Teruo; Araki, Toru; Otani, Hiroshi

    1997-09-01

    A bulk micromachined capacitive accelerometer for airbag applications based on (110) silicon anisotropic KOH etching is presented. The sensor is a two-chip accelerometer that consists of a glass-silicon-glass stacked sense element and an interface ASIC containing an impedance converter for capacitance detection, an EPROM and DACs for digital trimming, and a self-test feature for diagnosis. A simple switched-capacitor readout circuit with DC offset error cancellation scheme is proposed as the impedance converter. The dependence of narrow gap etching, surface roughness, and uniformity of the groove depth on the KOH concentration are also investigated for the fabrication of the device, and it is shown that the etch rate of the plane intrinsically controls the depth of the narrow gap with a KOH concentration of over 30 wt. percent, and smooth surface and uniformity of groove depth are obtained at 40 wt. percent KOH. The nonlinearity of the output is about 1.5 percent FS. The temperature coefficient of sensitivity and the off-axis sensitivity are 150 ppm/degree C and 2 percent respectively. The dimensions of the sensor are 10.3 X 10.3 X 3 mm.

  9. Computationally efficient ASIC implementation of space-time block decoding

    NASA Astrophysics Data System (ADS)

    Cavus, Enver; Daneshrad, Babak

    2002-12-01

    In this paper, we describe a computationally efficient ASIC design that leads to a highly efficient power and area implementation of space-time block decoder compared to a direct implementation of the original algorithm. Our study analyzes alternative methods of evaluating as well as implementing the previously reported maximum likelihood algorithms (Tarokh et al. 1998) for a more favorable hardware design. In our previous study (Cavus et al. 2001), after defining some intermediate variables at the algorithm level, highly computationally efficient decoding approaches, namely sign and double-sign methods, are developed and their effectiveness are illustrated for 2x2, 8x3 and 8x4 systems using BPSK, QPSK, 8-PSK, or 16-QAM modulation. In this work, alternative architectures for the decoder implementation are investigated and an implementation having a low computation approach is proposed. The applied techniques at the higher algorithm and architectural levels lead to a substantial simplification of the hardware architecture and significantly reduced power consumption. The proposed architecture is being fabricated in TSMC 0.18 μ process.

  10. Upregulation of acid-sensing ion channel ASIC1a in spinal dorsal horn neurons contributes to inflammatory pain hypersensitivity.

    PubMed

    Duan, Bo; Wu, Long-Jun; Yu, Yao-Qing; Ding, Yu; Jing, Liang; Xu, Lin; Chen, Jun; Xu, Tian-Le

    2007-10-10

    Development of chronic pain involves alterations in peripheral nociceptors as well as elevated neuronal activity in multiple regions of the CNS. Previous pharmacological and behavioral studies suggest that peripheral acid-sensing ion channels (ASICs) contribute to pain sensation, and the expression of ASIC subunits is elevated in the rat spinal dorsal horn (SDH) in an inflammatory pain model. However, the cellular distribution and the functional consequence of increased ASIC subunit expression in the SDH remain unclear. Here, we identify the Ca2+-permeable, homomeric ASIC1a channels as the predominant ASICs in rat SDH neurons and downregulation of ASIC1a by local rat spinal infusion with specific inhibitors or antisense oligonucleotides markedly attenuated complete Freund's adjuvant (CFA)-induced thermal and mechanical hypersensitivity. Moreover, in vivo electrophysiological recording showed that the elevated ASIC1a activity is required for two forms of central sensitization: C-fiber-induced "wind-up" and CFA-induced hypersensitivity of SDH nociceptive neurons. Together, our results reveal that increased ASIC activity in SDH neurons promotes pain by central sensitization. Specific blockade of Ca2+-permeable ASIC1a channels thus may have antinociceptive effect by reducing or preventing the development of central sensitization induced by inflammation.

  11. ERK-mediated NF-κB activation through ASIC1 in response to acidosis

    PubMed Central

    Chen, B; Liu, J; Ho, T-T; Ding, X; Mo, Y-Y

    2016-01-01

    Acidic microenvironment is a common feature of solid tumors. We have previously shown that neuron specific acid-sensing ion channel 1 (ASIC1) is expressed in breast cancer, and it is responsible for acidosis-induced cellular signaling through AKT, leading to nuclear factor-κB (NF-κB) activation, and cell invasion and metastasis. However, AKT is frequently activated in cancer. Thus, a key question is whether ASIC1-mediated cell signaling still takes place in the cancer cells carrying constitutively active AKT. In the present study, we show that among four prostate cancer cell lines tested, 22Rv1 cells express the highest level of phosphorylated AKT that is not impacted by acidosis. However, acidosis can still induce NF-κB activation during which extracellular signal-regulated kinase (ERK) serves as an alternative pathway for ASIC-mediated cell signaling. Inhibition of ERK by chemical inhibitors or small interfering RNAs suppresses the acidosis-induced NF-κB activity through regulation of the inhibitory subunit IκBα phosphorylation. Furthermore, suppression of ASIC1-mediated generation of reactive oxygen species (ROS) by ROS scavengers, such as glutathione or N-acetyl-cysteine causes a decrease in ERK phosphorylation and degradation of IκBα. Finally, ASIC1 is upregulated in a subset of prostate cancer cases and ASIC1 knockout by CRISPR/Cas9 significantly suppresses cell invasion, and castration resistance both in vitro and in vivo. Together, these results support the significance of ASIC1-ROS-ERK-IκBα-NF-κB axis in prostate tumorigenesis, especially in the constitutively active AKT background. PMID:27941930

  12. Thermal diagnostics front-end electronics for LISA Pathfinder.

    PubMed

    Sanjuán, J; Lobo, A; Nofrarias, M; Ramos-Castro, J; Riu, P J

    2007-10-01

    Precision temperature measurements are required in the LTP, the LISA technology package, for various diagnostics objectives. In this article, we describe in detail the front-end electronics design and the associated temperature sensors to achieve the LTP requirements: noise equivalent temperature of 10 microK Hz(-12) in the frequency range from 1 to 30 mHz at room temperature. We designed an ac Wheatstone bridge and a subsequent digital demodulation to minimize 1/f noise. We show experimental results where the required sensitivity in the measurement bandwidth is fulfilled.

  13. Instrument Front-Ends at Fermilab During Run II

    SciTech Connect

    Meyer, Thomas; Slimmer, David; Voy, Duane; /Fermilab

    2011-07-13

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor.

  14. Front-end electronics for the LZ experiment

    NASA Astrophysics Data System (ADS)

    Morad, James; LZ Collaboration

    2016-03-01

    LZ is a second generation direct dark matter detection experiment with 5.6 tonnes of liquid xenon active target, which will be instrumented as a two-phase time projection chamber (TPC). The peripheral xenon outside the active TPC (``skin'') will also be instrumented. In addition, there will be a liquid scintillator based outer veto surrounding the main cryostat. All of these systems will be read out using photomultiplier tubes. I will present the designs for front-end electronics for all these systems, which have been optimized for shaping times, gains, and low noise. Preliminary results from prototype boards will also be presented.

  15. Wideband monolithically integrated front-end subsystems and components

    NASA Astrophysics Data System (ADS)

    Mruk, Joseph Rene

    This thesis presents the analysis, design, and measurements of passive, monolithically integrated, wideband recta-coax and printed circuit board front-end components. Monolithic fabrication of antennas, impedance transformers, filters, and transitions lowers manufacturing costs by reducing assembly time and enhances performance by removing connectors and cabling between the devices. Computational design, fabrication, and measurements are used to demonstrate the capabilities of these front-end assemblies. Two-arm wideband planar log-periodic antennas fed using a horizontal feed that allows for filters and impedance transformers to be readily fabricated within the radiating region of the antenna are demonstrated. At microwave frequencies, low-cost printed circuit board processes are typically used to produce planar devices. A 1.8 to 11 GHz two-arm planar log-periodic antenna is designed with a monolithically integrated impedance transformer. Band rejection methods based on modifying the antenna aperture, use of an integrated filter, and the application of both methods are investigated with realized gain suppressions of over 25 dB achieved. The ability of standard circuit board technology to fabricate millimeter-wave devices up to 110 GHz is severely limited. Thin dielectrics are required to prevent the excitation of higher order modes in the microstrip substrate. Fabricating the thin line widths required for the antenna aperture also becomes prohibitively challenging. Surface micro-machining typically used in the fabrication of MEMS devices is capable of producing the extremely small features that can be used to fabricate antennas extending through W-band. A directly RF fed 18 to 110 GHz planar log-periodic antenna is developed. The antenna is fabricated with an integrated impedance transformer and additional transitions for measurement characterization. Singly terminated low-loss wideband millimeter-wave filters operating over V- and W- band are developed. High

  16. Front-end electronics for the FAZIA experiment

    NASA Astrophysics Data System (ADS)

    Salomon, F.; Edelbruck, P.; Brulin, G.; Borderie, B.; Richard, A.; Rivet, M. F.; Verde, G.; Wanlin, E.; Boiano, A.; Tortone, G.; Poggi, G.; Bini, M.; Casini, G.; Barlini, S.; Pasquali, G.; Valdré, S.; Petcu, M.; Bougault, R.; Le Neindre, N.; Alba, R.; Bonnet, E.; Bruno, M.; Chbihi, A.; Cinausero, M.; Dell'Aquila, D.; De Préaumont, H.; Duenas, J. A.; Fable, Q.; Fabris, D.; Francalanza, L.; Frankland, J. D.; Galichet, E.; Gramegna, F.; Gruyer, D.; Guerzoni, M.; Kordyasz, A.; Kozik, T.; La Torre, R.; Lombardo, I.; Lopez, O.; Mabiala, J.; Maiolino, C.; Marchi, T.; Maurenzig, P.; Meoli, A.; Merrer, Y.; Morelli, L.; Nannini, A.; Olmi, A.; Ordine, A.; Pârlog, M.; Pastore, G.; Piantelli, S.; Rosato, E.; Santonocito, D.; Scarlini, E.; Spadacini, G.; Stefaninni, A.; Vient, E.; Vigilante, M.

    2016-01-01

    FAZIA is a multidetector specifically designed to optimize A and Z reaction product identification in heavy-ion collision experiments. This multidetector is modular and based on three-layer telescopes made of two silicon detectors followed by a thick (10 cm) CsI(Tl) scintillator read-out by a photodiode. Its electronics is fully digital. The goal to push at maximum identification capability while preserving excellent energy resolution, can be achieved by using pulse-shape analysis techniques and by making an intensive use of high-speed flash ADCs. This paper presents the front-end part of the electronics.

  17. Understanding the Manager of the Project Front-End

    NASA Technical Reports Server (NTRS)

    Mulenburg, Gerald M.; Imprescia, Cliff (Technical Monitor)

    2000-01-01

    Historical data and new findings from interviews with managers of major National Aeronautics and Space Administration (NASA) projects confirm literature reports about the criticality of the front-end phase of project development, where systems engineering plays such a key role. Recent research into the management of ten contemporary NASA projects, combined with personal experience of the author in NASA, provide some insight into the relevance and importance of the project manager in this initial part of the project life cycle. The research findings provide evidence of similar approaches taken by the NASA project manager.

  18. Functional and pharmacological characterization of two different ASIC1a/2a heteromers reveals their sensitivity to the spider toxin PcTx1

    PubMed Central

    Joeres, Niko; Augustinowski, Katrin; Neuhof, Andreas; Assmann, Marc; Gründer, Stefan

    2016-01-01

    Acid Sensing Ion Channels (ASICs) detect extracellular proton signals and are involved in synaptic transmission and pain sensation. ASIC subunits assemble into homo- and heteromeric channels composed of three subunits. Single molecule imaging revealed that heteromers composed of ASIC1a and ASIC2a, which are widely expressed in the central nervous system, have a flexible 2:1/1:2 stoichiometry. It was hitherto not possible, however, to functionally differentiate these two heteromers. To have a homogenous population of ASIC1a/2a heteromers with either 2:1 or 1:2 stoichiometry, we covalently linked subunits in the desired configuration and characterized their functional properties in Xenopus oocytes. We show that the two heteromers have slightly different proton affinity, with an additional ASIC1a subunit increasing apparent affinity. Moreover, we found that zinc, which potentiates ASIC2a-containing ASICs but not homomeric ASIC1a, potentiates both heteromers. Finally, we show that PcTx1, which binds at subunit-subunit interfaces of homomeric ASIC1a, inhibits both heteromers suggesting that ASIC2a can also contribute to a PcTx1 binding site. Using this functional fingerprint, we show that rat cortical neurons predominantly express the ASIC1a/2a heteromer with a 2:1 stoichiometry. Collectively, our results reveal the contribution of individual subunits to the functional properties of ASIC1a/2a heteromers. PMID:27277303

  19. Acidotoxicity via ASIC1a Mediates Cell Death during Oxygen Glucose Deprivation and Abolishes Excitotoxicity.

    PubMed

    Bhowmick, Saurav; Moore, Jeanette T; Kirschner, Daniel L; Curry, Mary C; Westbrook, Emily G; Rasley, Brian T; Drew, Kelly L

    2017-03-01

    Ischemic reperfusion (I/R) injury is associated with a complex and multifactorial cascade of events involving excitotoxicity, acidotoxicity, and ionic imbalance. While it is known that acidosis occurs concomitantly with glutamate-mediated excitotoxicity during brain ischemia, it remains elusive how acidosis-mediated acidotoxicity interacts with glutamate-mediated excitotoxicity. Here, we investigated the effect of acidosis on glutamate-mediated excitotoxicity in acute hippocampal slices. We tested the hypothesis that mild acidosis protects against I/R injury via modulation of NMDAR, but produces injury via activation of acid sensing ion channels (ASIC1a). Using a novel microperfusion approach, we monitored time course of injury in acutely prepared, adult hippocampal slices. We varied the duration of insult to delay the return to preinsult conditions to determine if injury was caused by the primary insult or by the modeled reperfusion phase. We also manipulated pH in presence and absence of oxygen glucose deprivation (OGD). The role of ASIC1a and NMDAR was deciphered by treating the slices with and without an ASIC or NMDAR antagonist. Our results show that injury due to OGD or low pH occurs during the insult rather than the modeled reperfusion phase. Injury mediated by low pH or low pH OGD requires ASIC1a and is independent of NMDAR activation. These findings point to ASIC1a as a mediator of ischemic cell death caused by stroke and cardiac arrest.

  20. A design of a valid signal selecting and position decoding ASIC for PET using silicon photomultipliers

    NASA Astrophysics Data System (ADS)

    Cho, M.; Lim, K.-t.; Kim, H.; Yeom, J.-y.; Kim, J.; Lee, C.; Choi, H.; Cho, G.

    2017-01-01

    In most cases, a PET system has numerous electrical components and channel circuits and thus it would rather be a bulky product. Also, most existing systems receive analog signals from detectors which make them vulnerable to signal distortions. For these reasons, channel reduction techniques are important. In this work, an ASIC for PET module is being proposed. An ASIC chip for 16 PET detector channels, VSSPDC, has been designed and simulated. The main function of the chip is 16-to-1 channel reduction, i.e., finding the position of only the valid signals, signal timing, and magnitudes in all 16 channels at every recorded event. The ASIC comprises four of 4-channel modules and a 2nd 4-to-1 router. A single channel module comprises a transimpedance amplifier for the silicon photomultipliers, dual comparators with high and low level references, and a logic circuitry. While the high level reference was used to test the validity of the signal, the low level reference was used for the timing. The 1-channel module of the ASIC produced an energy pulse by time-over-threshold method and it also produced a time pulse with a fixed delayed time. Since the ASIC chip outputs only a few digital pulses and does not require an external clock, it has an advantage over noise properties. The cadence simulation showed the good performance of the chip as designed.

  1. CMOS neurostimulation ASIC with 100 channels, scaleable output, and bidirectional radio-frequency telemetry.

    PubMed

    Suaning, G J; Lovell, N H

    2001-02-01

    100-channel neurostimulation circuit comprising a complementary metal oxide semiconductor (CMOS), application-specific integrated circuit (ASIC) has been designed, constructed and tested. The ASIC forms a significant milestone and an integral component of a 100-electrode neurostimulation system being developed by the authors. The system comprises an externally worn transmitter and a body implantable stimulator. The purpose of the system is to communicate both data and power across tissue via radio-frequency (RF) telemetry such that externally programmable, constant current, charge balanced, biphasic stimuli may be delivered to neural tissue at 100 unique sites. An intrinsic reverse telemetry feature of the ASIC has been designed such that information pertaining to the device function, reconstruction of the stimulation voltage waveform, and the measurement of impedance may be obtained through noninvasive means. To compensate for the paucity of data pertaining to the stimulation thresholds necessary in evoking a physiological response, the ASIC has been designed with scaleable current output. The ASIC has been designed primarily as a treatment of degenerative disorders of the retina whereby the 100 channels are to be utilized in the delivery of a pattern of stimuli of varying intensity and or duty cycle to the surviving neural tissue of the retina. However, it is conceivable that other fields of neurostimulation such as cochlear prosthetics and functional electronic stimulation may benefit from the employment of the system.

  2. A role for ASIC3 in the modulation of high-intensity pain stimuli

    PubMed Central

    Chen, Chih-Cheng; Zimmer, Anne; Sun, Wei-Hsin; Hall, Jennifer; Brownstein, Michael J.; Zimmer, Andreas

    2002-01-01

    Acid-sensing ion channel 3 (ASIC3), a proton-gated ion channel of the degenerins/epithelial sodium channel (DEG/ENaC) receptor family is expressed predominantly in sensory neurons including nociceptive neurons responding to protons. To study the role of ASIC3 in pain signaling, we generated ASIC3 knockout mice. Mutant animals were healthy and responded normally to most sensory stimuli. However, in behavioral assays for pain responses, ASIC3 null mutant mice displayed a reduced latency to the onset of pain responses, or more pain-related behaviors, when stimuli of moderate to high intensity were used. This unexpected effect seemed independent of the modality of the stimulus and was observed in the acetic acid-induced writhing test (0.6 vs. 0.1–0.5%), in the hot-plate test (52.5 and 55 vs. 50°C), and in tests for mechanically induced pain (tail-pinch vs. von Frey filaments). We postulate that ASIC3 is involved in modulating moderate- to high-intensity pain sensation. PMID:12060708

  3. BAE Systems Radiation Hardened SpaceWire ASIC and Roadmap

    NASA Technical Reports Server (NTRS)

    Berger, Richard; Milliser, Myrna; Kapcio, Paul; Stanley, Dan; Moser, David; Koehler, Jennifer; Rakow, Glenn; Schnurr, Richard

    2006-01-01

    An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS, technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASlC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a 4-port SpaceWire router with two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, -and a memory controller for additional external memory use. The SpaceWire ASlC is planned for use on both the Geostationary Operational Environmental Satellites (GOES)-R and the Lunar Reconnaissance Orbiter (LRO). Engineering parts have already been delivered to both programs. This paper discusses the SpaceWire protocol and those elements of it that have been built into the current SpaceWire reusable core. There are features within the core that go beyond the current standard that can be enabled or disabled by the user and these will be described. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be discussed. Optional configurations within user systems will be shown. The physical imp!ementation of the design will be described and test results from the hardware will be discussed. Finally, the BAE Systems roadmap for SpaceWire developments will be discussed, including some products already in design as well as longer term plans.

  4. 40 CFR 63.485 - Continuous front-end process vent provisions.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.485... continuous front-end process vent with an organic HAP concentration less than 50 parts per million by volume (ppmv) to become a Group 2 continuous front-end process vent with an organic HAP concentration of...

  5. 40 CFR 63.486 - Batch front-end process vent provisions.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... technology requirements for Group 1 batch front-end process vents in § 63.487, the monitoring requirements in... Group 2 batch front-end process vents shall comply with the applicable reference control technology... National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins §...

  6. The future of automation for high-volume wafer fabrication and ASIC manufacturing

    NASA Astrophysics Data System (ADS)

    Hughes, Randall A.; Shott, John D.

    1986-12-01

    A framework is given to analyze the future trends in semiconductor manufacturing automation systems, focusing specifically on the needs of ASIC (application-specific integrated circuit) or custom integrated circuit manufacturing. Advances in technologies such as gate arrays and standard cells now make it significantly easier to obtain system cost and performance advantages by integrating nonstandard functions on silicon. ASICs are attractive to U.S. manufacturers because they place a premium on sophisticated design tools, familiarity with customer needs and applications, and fast turn-around fabrication. These are areas where U.S. manufacturers believe they have an advantage and, consequently, will not suffer from the severe price/manufacturing competition encountered in conventional high-volume semiconductor products. Previously, automation was often considered viable only for high-volume manufacturing, but automation becomes a necessity in the new ASIC environment.

  7. Filter-bank based digital sub-banding ASIC architecture for coherent optical receivers

    NASA Astrophysics Data System (ADS)

    Nazarathy, Moshe; Tolmachev, Alex

    2013-01-01

    We introduce a highly efficient high performance architecture for the digital signal processing of high speed coherent optical receivers. Our ASIC signal processing architecture ports for the first time to optical reception efficient filter bank signal processing structures. The resulting optical receiver ASICs are applicable to long-haul and metro photonic communication and provide substantial energy efficiency saving 30%-50% in power consumption. We aim to develop an ultra-high-speed optical receiver ASIC for transporting 160 Gb/s in a 25 GHz optical band - seven such channels will together carry 1Tb/s (plus overhead) in our 'TeraSanta' project of TeraBitPerSecond efficient transponders.

  8. A Low-Power ASIC Signal Processor for a Vestibular Prosthesis.

    PubMed

    Töreyin, Hakan; Bhatti, Pamela T

    2016-06-01

    A low-power ASIC signal processor for a vestibular prosthesis (VP) is reported. Fabricated with TI 0.35 μm CMOS technology and designed to interface with implanted inertial sensors, the digitally assisted analog signal processor operates extensively in the CMOS subthreshold region. During its operation the ASIC encodes head motion signals captured by the inertial sensors as electrical pulses ultimately targeted for in-vivo stimulation of vestibular nerve fibers. To achieve this, the ASIC implements a coordinate system transformation to correct for misalignment between natural sensors and implanted inertial sensors. It also mimics the frequency response characteristics and frequency encoding mappings of angular and linear head motions observed at the peripheral sense organs, semicircular canals and otolith. Overall the design occupies an area of 6.22 mm (2) and consumes 1.24 mW when supplied with ± 1.6 V.

  9. Atomic force microscopy imaging reveals the formation of ASIC/ENaC cross-clade ion channels

    SciTech Connect

    Jeggle, Pia; Smith, Ewan St. J.; Stewart, Andrew P.; Haerteis, Silke; Korbmacher, Christoph; Edwardson, J. Michael

    2015-08-14

    ASIC and ENaC are co-expressed in various cell types, and there is evidence for a close association between them. Here, we used atomic force microscopy (AFM) to determine whether ASIC1a and ENaC subunits are able to form cross-clade hybrid ion channels. ASIC1a and ENaC could be co-isolated from detergent extracts of tsA 201 cells co-expressing the two subunits. Isolated proteins were incubated with antibodies against ENaC and Fab fragments against ASIC1a. AFM imaging revealed proteins that were decorated by both an antibody and a Fab fragment with an angle of ∼120° between them, indicating the formation of ASIC1a/ENaC heterotrimers. - Highlights: • There is evidence for a close association between ASIC and ENaC. • We used AFM to test whether ASIC1a and ENaC subunits form cross-clade ion channels. • Isolated proteins were incubated with subunit-specific antibodies and Fab fragments. • Some proteins were doubly decorated at ∼120° by an antibody and a Fab fragment. • Our results indicate the formation of ASIC1a/ENaC heterotrimers.

  10. ASIC1a regulates insular long-term depression and is required for the extinction of conditioned taste aversion

    PubMed Central

    Li, Wei-Guang; Liu, Ming-Gang; Deng, Shining; Liu, Yan-Mei; Shang, Lin; Ding, Jing; Hsu, Tsan-Ting; Jiang, Qin; Li, Ying; Li, Fei; Zhu, Michael Xi; Xu, Tian-Le

    2016-01-01

    Acid-sensing ion channel 1a (ASIC1a) has been shown to play important roles in synaptic plasticity, learning and memory. Here we identify a crucial role for ASIC1a in long-term depression (LTD) at mouse insular synapses. Genetic ablation and pharmacological inhibition of ASIC1a reduced the induction probability of LTD without affecting that of long-term potentiation in the insular cortex. The disruption of ASIC1a also attenuated the extinction of established taste aversion memory without altering the initial associative taste learning or its long-term retention. Extinction of taste aversive memory led to the reduced insular synaptic efficacy, which precluded further LTD induction. The impaired LTD and extinction learning in ASIC1a null mice were restored by virus-mediated expression of wild-type ASIC1a, but not its ion-impermeable mutant, in the insular cortices. Our data demonstrate the involvement of an ASIC1a-mediated insular synaptic depression mechanism in extinction learning, which raises the possibility of targeting ASIC1a to manage adaptive behaviours. PMID:27924869

  11. Channel control ASIC for the CMS hadron calorimeter front end readout module

    SciTech Connect

    Ray Yarema et al.

    2002-09-26

    The Channel Control ASIC (CCA) is used along with a custom Charge Integrator and Encoder (QIE) ASIC to digitize signals from the hybrid photo diodes (HPDs) and photomultiplier tubes (PMTs) in the CMS hadron calorimeter. The CCA sits between the QIE and the data acquisition system. All digital signals to and from the QIE pass through the CCA chip. One CCA chip interfaces with two QIE channels. The CCA provides individually delayed clocks to each of the QIE chips in addition to various control signals. The QIE sends digitized PMT or HPD signals and time slice information to the CCA, which sends the data to the data acquisition system through an optical link.

  12. Approach to the design of monitoring buffer for read-out ASICs

    NASA Astrophysics Data System (ADS)

    Atkin, E. V.; Vinogradov, S. M.

    2017-01-01

    The paper describes the approach to designing built-in monitoring buffers for the purpose of checking the functionality of ASICs as parts of test printed boards. A figure of merit (FOM), based on that analysis is suggested. Features of the FOM, applied to particle physics experiments, are the speed, power consumption, load driving capability and occupied chip area. As an example, illustrating the choice of buffer according to the proposed FOM, there are presented the results of designing a buffer version as part of an ASIC for the CBM MUCH(http://www.fair-center.eu/for-users/experiments/cbm.html).

  13. A silicon pixel readout ASIC with 100 ps time resolution for the NA62 experiment

    NASA Astrophysics Data System (ADS)

    Dellacasa, G.; Garbolino, S.; Marchetto, F.; Martoiu, S.; Mazza, G.; Rivetti, A.; Wheadon, R.

    2011-01-01

    The silicon tracker of the NA62 experiment requires the measurement of the particles arrival time with a resolution better than 200 ps rms and a spatial resolution of 300 μm. A time measurement technique based on a Time to Amplitude Converter has been implemented in an ASIC in order to prove the possibility to integrate a TDC with resolution better than 200 ps in a pixel cell. Time-walk problem has been addressed with the use of the Constant Fraction Discriminator technique. The ASIC has been designed in a CMOS 0.13 μm technology with single event upset protection of the digital logic.

  14. Fact Sheet for KM200 Front-end Electronics

    SciTech Connect

    Ianakiev, Kiril Dimitrov; Iliev, Metodi; Swinhoe, Martyn Thomas

    2015-07-08

    The KM200 device is a versatile, configurable front-end electronics boards that can be used as a functional replacement for Canberra’s JAB-01 boards based on the Amptek A-111 hybrid chip, which continues to be the preferred choice of electronics for large number of the boards in junction boxes of multiplicity counters that process the signal from an array of 3He detectors. Unlike the A-111 chip’s fixed time constants and sensitivity range, the shaping time and sensitivity of the new KM200 can be optimized for demanding applications such as spent fuel, and thus could improve the safeguards measurements of existing systems where the A-111 or PDT electronics does not perform well.

  15. Front-end system for Yb : YAG cryogenic disk laser

    SciTech Connect

    Perevezentsev, E A; Mukhin, I B; Kuznetsov, I I; Vadimova, O L; Palashov, O V

    2015-05-31

    A new front-end system for a cryogenic Yb : YAG laser is designed. The system consists of a femtosecond source, a stretcher and a regenerative amplifier with an output energy of 25 μJ at a pulse repetition rate of 49 kHz, a pulse duration of ∼2 ns and a bandwidth of ∼1.5 nm. After increasing the pump power of the regenerative amplifier, it is expected to achieve a pulse energy of ∼1 mJ at the input to cryogenic amplification stages, which will allow one to obtain laser pulses with a duration of several picoseconds at the output of the cryogenic laser after compression. (extreme light fields and their applications)

  16. Lignan from Thyme Possesses Inhibitory Effect on ASIC3 Channel Current*

    PubMed Central

    Dubinnyi, Maxim A.; Osmakov, Dmitry I.; Koshelev, Sergey G.; Kozlov, Sergey A.; Andreev, Yaroslav A.; Zakaryan, Naira A.; Dyachenko, Igor A.; Bondarenko, Dmitry A.; Arseniev, Alexander S.; Grishin, Eugene V.

    2012-01-01

    A novel compound was identified in the acidic extract of Thymus armeniacus collected in the Lake Sevan region of Armenia. This compound, named “sevanol,” to our knowledge is the first low molecular weight natural molecule that has a reversible inhibition effect on both the transient and the sustained current of human ASIC3 channels expressed in Xenopus laevis oocytes. Sevanol completely blocked the transient component (IC50 353 ± 23 μm) and partially (∼45%) inhibited the amplitude of the sustained component (IC50 of 234 ± 53 μm). Other types of acid-sensing ion channel (ASIC) channels were intact to sevanol application, except ASIC1a, which showed more than six times less affinity to it as compared with the inhibitory action on the ASIC3 channel. To elucidate the structure of sevanol, the set of NMR spectra in two solvents (d6-DMSO and D2O) was collected, and the complete chemical structure was confirmed by liquid chromatography-mass spectrometry with electrospray ionization (LC-ESI+-MS) fragmentation. This compound is a new lignan built up of epiphyllic acid and two isocitryl esters in positions 9 and 10. In vivo administration of sevanol (1–10 mg/kg) significantly reversed thermal hyperalgesia induced by complete Freund's adjuvant injection and reduced response to acid in a writhing test. Thus, we assume the probable considerable role of sevanol in known analgesic and anti-inflammatory properties of thyme. PMID:22854960

  17. A wireless capsule system with ASIC for monitoring the physiological signals of the human gastrointestinal tract.

    PubMed

    Xu, Fei; Yan, Guozheng; Zhao, Kai; Lu, Li; Gao, Jinyang; Liu, Gang

    2014-12-01

    This paper presents the design of a wireless capsule system for monitoring the physiological signals of the human gastrointestinal (GI) tract. The primary components of the system include a wireless capsule, a portable data recorder, and a workstation. Temperature, pH, and pressure sensors; an RF transceiver; a controlling and processing application specific integrated circuit (ASIC); and batteries were applied in a wireless capsule. Decreasing capsule size, improving sensor precision, and reducing power needs were the primary challenges; these were resolved by employing micro sensors, optimized architecture, and an ASIC design that include power management, clock management, a programmable gain amplifier (PGA), an A/D converter (ADC), and a serial peripheral interface (SPI) communication unit. The ASIC has been fabricated in 0.18- μm CMOS technology with a die area of 5.0 mm × 5.0 mm. The wireless capsule integrating the ASIC controller measures Φ 11 mm × 26 mm. A data recorder and a workstation were developed, and 20 cases of human experiments were conducted in hospitals. Preprocessing in the workstation can significantly improve the quality of the data, and 76 original features were determined by mathematical statistics. Based on the 13 optimal features achieved in the evaluation of the features, the clustering algorithm can identify the patients who lack GI motility with a recognition rate reaching 83.3%.

  18. A Wireless Capsule Endoscope System With Low-Power Controlling and Processing ASIC.

    PubMed

    Xinkai Chen; Xiaoyu Zhang; Linwei Zhang; Xiaowen Li; Nan Qi; Hanjun Jiang; Zhihua Wang

    2009-02-01

    This paper presents the design of a wireless capsule endoscope system. The proposed system is mainly composed of a CMOS image sensor, a RF transceiver and a low-power controlling and processing application specific integrated circuit (ASIC). Several design challenges involving system power reduction, system miniaturization and wireless wake-up method are resolved by employing optimized system architecture, integration of an area and power efficient image compression module, a power management unit (PMU) and a novel wireless wake-up subsystem with zero standby current in the ASIC design. The ASIC has been fabricated in 0.18-mum CMOS technology with a die area of 3.4 mm * 3.3 mm. The digital baseband can work under a power supply down to 0.95 V with a power dissipation of 1.3 mW. The prototype capsule based on the ASIC and a data recorder has been developed. Test result shows that proposed system architecture with local image compression lead to an average of 45% energy reduction for transmitting an image frame.

  19. Characteristics and development report for the SA3871 Intent Controller application specific integrated circuit (ASIC)

    SciTech Connect

    Simpson, R.L.; Meyer, B.T.

    1995-08-01

    This report describes the design and development activities that were involved in the SA3871 Intent Controller ASIC. The SA3871 is a digital gate array component developed for the MC4396 Trajectory Sensing Signal Generator for use in the B61-3/4/10 system as well as a possible future B61-MAST system.

  20. A DES ASIC Suitable for Network Encryption at 10 Gbps and Beyond

    SciTech Connect

    Gass, Karl; Pierson, Lyndon G.; Robertson, Perry J.; Wilcox, D. Craig; Witzke, Edward L.

    1999-04-30

    The Sandia National Laboratories (SNL) Data Encryption Standard (DES) Application Specific Integrated Circuit (ASIC) is the fastest known implementation of the DES algorithm as defined in the Federal Information Processing Standards (FIPS) Publication 46-2. DES is used for protecting data by cryptographic means. The SNL DES ASIC, over 10 times faster than other currently available DES chips, is a high-speed, filly pipelined implementation offering encryption, decryption, unique key input, or algorithm bypassing on each clock cycle. Operating beyond 105 MHz on 64 bit words, this device is capable of data throughputs greater than 6.7 Billion bits per second (tester limited). Simulations predict proper operation up to 9.28 Billion bits per second. In low frequency, low data rate applications, the ASIC consumes less that one milliwatt of power. The device has features for passing control signals synchronized to throughput data. Three SNL DES ASICS may be easily cascaded to provide the much greater security of triple-key, triple-DES.

  1. Digital pulse processing and optimization of the front-end electronics for nuclear instrumentation.

    PubMed

    Bobin, C; Bouchard, J; Thiam, C; Ménesguen, Y

    2014-05-01

    This article describes an algorithm developed for the digital processing of signals provided by a high-efficiency well-type NaI(Tl) detector used to apply the 4πγ technique. In order to achieve a low-energy threshold, a new front-end electronics has been specifically designed to optimize the coupling to an analog-to-digital converter (14 bit, 125 MHz) connected to a digital development kit produced by Altera(®). The digital pulse processing is based on an IIR (Infinite Impulse Response) approximation of the Gaussian filter (and its derivatives) that can be applied to the real-time processing of digitized signals. Based on measurements obtained with the photon emissions generated by an (241)Am source, the energy threshold is estimated to be equal to ~2 keV corresponding to the physical threshold of the NaI(Tl) detector. An algorithm developed for a Silicon Drift Detector used for low-energy x-ray spectrometry is also described. In that case, the digital pulse processing is specifically designed for signals provided by a reset-type preamplifier ((55)Fe source).

  2. BPM ANALOG FRONT-END ELECTRONICS BASED ON THE AD8307 LOG AMPLIFIER

    SciTech Connect

    R. SHURTER; ET AL

    2000-06-01

    Beam position monitor (BPM) signal-processing electronics utilizing the Analog Devices AD8307 logarithmic amplifier has been developed for the Low Energy Demonstration Accelerator (LEDA), part of the Accelerator Production of Tritium (APT) project at Los Alamos. The low-pass filtered 350 MHz fundamental signal from each of the four microstrip electrodes in a BPM is ''detected'' by an AD8307 log amp, amplified and scaled to accommodate the 0 to +5V input of an analog-to-digital (A/D) converter. The resultant four digitized signals represent a linear power relationship to the electrode signals, which are in turn related to beam current and position. As the AD8307 has a potential dynamic range of approximately 92 dB, much attention must be given to noise reduction, sources of which can be digital signals on the same board, power supplies, inter-channel coupling, stray RF and others. This paper will describe the operational experience of this particular analog front-end electronic circuit design.

  3. Design of a video capsule endoscopy system with low-power ASIC for monitoring gastrointestinal tract.

    PubMed

    Liu, Gang; Yan, Guozheng; Zhu, Bingquan; Lu, Li

    2016-11-01

    In recent years, wireless capsule endoscopy (WCE) has been a state-of-the-art tool to examine disorders of the human gastrointestinal tract painlessly. However, system miniaturization, enhancement of the image-data transfer rate and power consumption reduction for the capsule are still key challenges. In this paper, a video capsule endoscopy system with a low-power controlling and processing application-specific integrated circuit (ASIC) is designed and fabricated. In the design, these challenges are resolved by employing a microimage sensor, a novel radio frequency transmitter with an on-off keying modulation rate of 20 Mbps, and an ASIC structure that includes a clock management module, a power-efficient image compression module and a power management unit. An ASIC-based prototype capsule, which measures Φ11 mm × 25 mm, has been developed here. Test results show that the designed ASIC consumes much less power than most of the other WCE systems and that its total power consumption per frame is the least. The image compression module can realize high near-lossless compression rate (3.69) and high image quality (46.2 dB). The proposed system supports multi-spectral imaging, including white light imaging and autofluorescence imaging, at a maximum frame rate of 24 fps and with a resolution of 400 × 400. Tests and in vivo trials in pigs have proved the feasibility of the entire system, but further improvements in capsule control and compression performance inside the ASIC are needed in the future.

  4. Development and validation of a 64 channel front end ASIC for 3D directional detection for MIMAC

    NASA Astrophysics Data System (ADS)

    Richer, J. P.; Bourrion, O.; Bosson, G.; Guillaudin, O.; Mayet, F.; Santos, D.

    2011-11-01

    A front end ASIC has been designed to equip the \\textmu TPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC is able to monitor 64 strips of pixels and provides the "Time Over Threshold" information for each of those. These 64 digital informations, sampled at a rate of 50 MHz, can be transferred at 400 MHz by eight LVDS serial links. Eight ASIC were validated on a 2 × 256 strips of pixels prototype.

  5. The Parkes front-end controller and noise-adding radiometer

    NASA Technical Reports Server (NTRS)

    Brunzie, T. J.

    1990-01-01

    A new front-end controller (FEC) was installed on the 64-m antenna in Parkes, Australia, to support the 1989 Voyager 2 Neptune encounter. The FEC was added to automate operation of the front-end microwave hardware as part of the Deep Space Network's Parkes-Canberra Telemetry Array. Much of the front-end hardware was refurbished and reimplemented from a front-end system installed in 1985 by the European Space Agency for the Uranus encounter; however, the FEC and its associated noise-adding radiometer (NAR) were new Jet Propulsion Laboratory (JPL) designs. Project requirements and other factors led to the development of capabilities not found in standard Deep Space Network (DSN) controllers and radiometers. The Parkes FEC/NAR performed satisfactorily throughout the Neptune encounter and was removed in October 1989.

  6. Front-End Analysis Methods for the Noncommissioned Officer Education System

    DTIC Science & Technology

    2013-02-01

    Research Report 1964 Front-End Analysis Methods for the Noncommissioned Officer Education System Marisa L. Miller U.S...2012 4. TITLE AND SUBTITLE Front-End Analysis Methods for the Noncommissioned Officer Education System 5a. CONTRACT OR GRANT NUMBER W5J9CQ-11-D...The Noncommissioned Officer Education System plays a crucial role in Soldier development by providing both institutional training and structured-self

  7. Circuit techniques for cognitive radio receiver front-ends

    NASA Astrophysics Data System (ADS)

    Sadhu, Bodhisatwa

    This thesis discusses the design of the receiver front-end for software defined radio (SDR) based cognitive radio applications. Two aspects of SDRs for cognitive radios are distinguished: signaling and spectrum sensing. Narrowband wide tuning signaling architectures and instantaneous wideband spectrum sensing architectures are identified as candidates for feasible SDR implementations. Several architectures and circuit implementations are reviewed. Wide tuning range, low phase noise frequency synthesizers for signaling, and RF samplers and signal processors for spectrum sensing are identified as critical circuit design blocks. A number of voltage controlled oscillator (VCO) techniques for wide-tuning range, and low phase noise frequency synthesis techniques are developed. Wide-tuning range techniques based on switched inductors are proposed as a way to design inductor-capacitor (LC) VCOs with wide-tuning ranges that maintain a good phase noise and power dissipation performance over the entire tuning range. Switched inductor VCOs are analyzed in detail, and a design framework is developed. Optimized capacitor array design techniques for wide-tuning ranges are discussed. Based on these techniques, measurements from two prototype designs are presented, that achieve tuning ranges of 87% and 157% in measurement. They also maintain good phase noise, power consumption, and figure of merit (FOM) over the entire tuning range. In addition, a new family of VCOs that achieve superior phase noise is introduced. This set of novel topologies are based on linearized transconductance using capacitive feedback techniques. They achieve higher amplitudes of oscillation, and consequently, a superior phase noise performance. A wide tuning range is also maintained. The VCOs are analyzed, and detailed measurement results from a design prototype are presented. For spectrum sensing, the design of CRAFT (Charge Re-use Analog Fourier Transform): an RF front-end channelizer for software defined

  8. DESIGN OF MEDICAL RADIOMETER FRONT-END FOR IMPROVED PERFORMANCE.

    PubMed

    Klemetsen, O; Birkelund, Y; Jacobsen, S K; Maccarini, P F; Stauffer, P R

    2011-01-01

    We have investigated the possibility of building a singleband Dicke radiometer that is inexpensive, small-sized, stable, highly sensitive, and which consists of readily available microwave components. The selected frequency band is at 3.25-3.75 GHz which provides a reasonable compromise between spatial resolution (antenna size) and sensing depth for radiometry applications in lossy tissue. Foreseen applications of the instrument are non-invasive temperature monitoring for breast cancer detection and temperature monitoring during heating. We have found off-the-shelf microwave components that are sufficiently small (< 5 mm × 5 mm) and which offer satisfactory overall sensitivity. Two different Dicke radiometers have been realized: one is a conventional design with the Dicke switch at the front-end to select either the antenna or noise reference channels for amplification. The second design places a matched pair of low noise amplifiers in front of the Dicke switch to reduce system noise figure.Numerical simulations were performed to test the design concepts before building prototype PCB front-end layouts of the radiometer. Both designs provide an overall power gain of approximately 50 dB over a 500 MHz bandwidth centered at 3.5 GHz. No stability problems were observed despite using triple-cascaded amplifier configurations to boost the thermal signals. The prototypes were tested for sensitivity after calibration in two different water baths. Experiments showed superior sensitivity (36% higher) when implementing the low noise amplifier before the Dicke switch (close to the antenna) compared to the other design with the Dicke switch in front. Radiometer performance was also tested in a multilayered phantom during alternating heating and radiometric reading. Empirical tests showed that for the configuration with Dicke switch first, the switch had to be locked in the reference position during application of microwave heating to avoid damage to the active components

  9. Protons and Psalmotoxin-1 reveal nonproton ligand stimulatory sites in chicken acid-sensing ion channel: Implication for simultaneous modulation in ASICs.

    PubMed

    Smith, Rachel N; Gonzales, Eric B

    2014-01-01

    Acid-sensing ion channels (ASICs) are proton-sensitive, sodium-selective channels expressed in the nervous system that sense changes in extracellular pH. These ion channels are sensitive to an increasing number of nonproton ligands that include natural venom peptides and guanidine compounds. In the case of chicken ASIC1, the spider toxin Psalmotoxin-1 (PcTx1) activates the channel, resulting in an inward current. Furthermore, a growing class of ligands containing a guanidine group has been identified that stimulate peripheral ASICs (ASIC3), but exert subtle influence on other ASIC subtypes. The effects of the guanidine compounds on cASIC1 have not been the focus of previous study. Here, we investigated the interaction of the guanidine compound 2-guanidine-4-methylquinazoline (GMQ) on cASIC1 proton activation and PcTx1 stimulation. Exposure of expressed cASIC1 to PcTx1 resulted in biphasic currents consisting of a transient peak followed by an irreversible cASIC1 PcTx1 persistent current. This cASIC1 PcTx1 persistent current may be the result of locking the cASIC1 protein into a desensitized transition state. The guanidine compound GMQ increased the apparent affinity of protons on cASIC1 and decreased the half-maximal constant of the cASIC1 steady-state desensitization profile. Furthermore, GMQ stimulated the cASIC1 PcTx1 persistent current in a concentration-dependent manner, which resulted in a non-desensitizing inward current. Our data suggests that GMQ may have multiple sites within cASIC1 and may act as a "molecular wedge" that forces the PcTx1-desensitized ASIC into an open state. Our findings indicate that guanidine compounds, such as GMQ, may alter acid-sensing ion channel activity in combination with other stimuli, and that additional ASIC subtypes (along with ASIC3) may serve to sense and mediate signals from multiple stimuli.

  10. Neural networks in front-end processing and control

    SciTech Connect

    Lister, J.B.; Schnurrenberger, H.; Staeheli, N.; Stockhammer, N.; Duperrex, P.A.; Moret, J.M. )

    1992-04-01

    Research into neural networks has gained a large following in recent years. In spite of the long term timescale of this Artificial Intelligence research, the tools which the community is developing can already find useful applications to real practical problems in experimental research. One of the main advantages of the parallel algorithms being developed in AI is the structural simplicity of the required hardware implementation, and the simple nature of the calculations involved. This makes these techniques ideal for problems in which both speed and data volume reduction are important, the case for most front-end processing tasks. In this paper the authors illustrate the use of a particular neural network known as the Multi-Layer Perceptron as a method for solving several different tasks, all drawn from the field of Tokamak research. The authors also briefly discuss the use of the Multi-Layer Perceptron as a non-linear controller in a feedback loop. The authors outline the type of problem which can be usefully addressed by these techniques, even before the large-scale parallel processing hardware currently under development becomes cheaply available. The authors also present some of the difficulties encountered in applying these networks.

  11. Front-end electronics and trigger systems - status and challenges

    SciTech Connect

    Spieler, Helmuth G; Spieler, Helmuth G

    2007-08-21

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not provide the required electronic noise at lower power, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described.

  12. Front-end electronics for the Muon Portal project

    NASA Astrophysics Data System (ADS)

    Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M. C.; Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D. G.; Fallica, G.; Valvo, G.

    2016-10-01

    The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.

  13. Nonproton ligand sensing domain is required for paradoxical stimulation of acid-sensing ion channel 3 (ASIC3) channels by amiloride.

    PubMed

    Li, Wei-Guang; Yu, Ye; Huang, Chen; Cao, Hui; Xu, Tian-Le

    2011-12-09

    Acid-sensing ion channels (ASICs), which belong to the epithelial sodium channel/degenerin family, are activated by extracellular protons and are inhibited by amiloride (AMI), an important pharmacological tool for studying all known members of epithelial sodium channel/degenerin. In this study, we reported that AMI paradoxically opened homomeric ASIC3 and heteromeric ASIC3 plus ASIC1b channels at neutral pH and synergistically enhanced channel activation induced by mild acidosis (pH 7.2 to 6.8). The characteristic profile of AMI stimulation of ASIC3 channels was reminiscent of the channel activation by the newly identified nonproton ligand, 2-guanidine-4-methylquinazoline. Using site-directed mutagenesis, we showed that ASIC3 activation by AMI, but not its inhibitory effect, was dependent on the integrity of the nonproton ligand sensing domain in ASIC3 channels. Moreover, the structure-activity relationship study demonstrated the differential requirement of the 5-amino group in AMI for the stimulation or inhibition effect, strengthening the different interactions within ASIC3 channels that confer the paradoxical actions of AMI. Furthermore, using covalent modification analyses, we provided strong evidence supporting the nonproton ligand sensing domain is required for the stimulation of ASIC3 channels by AMI. Finally, we showed that AMI causes pain-related behaviors in an ASIC3-dependent manner. These data reinforce the idea that ASICs can sense nonproton ligands in addition to protons. The results also indicate caution in the use of AMI for studying ASIC physiology and in the development of AMI-derived ASIC inhibitors for treating pain syndromes.

  14. Preliminary validation results of an ASIC for the readout and control of near-infrared large array detectors

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Meier, Dirk; Otnes Berge, Hans Kristian; Øya, Petter; Steenari, David; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar

    2015-06-01

    In this paper we present initial test results of the Near Infrared Readout and Controller ASIC (NIRCA), designed for large area image sensors under contract from the European Space Agency (ESA) and the Norwegian Space Center. The ASIC is designed to read out image sensors based on mercury cadmium telluride (HgCdTe, or MCT) operating down to 77 K. IDEAS has developed, designed and initiated testing of NIRCA with promising results, showing complete functionality of all ASIC sub-components. The ASIC generates programmable digital signals to clock out the contents of an image array and to amplify, digitize and transfer the resulting pixel charge. The digital signals can be programmed into the ASIC during run-time and allows for windowing and custom readout schemes. The clocked out voltages are amplified by programmable gain amplifiers and digitized by 12-bit, 3-Msps successive approximation register (SAR) analogue-to-digital converters (ADC). Digitized data is encoded using 8-bit to 10-bit encoding and transferred over LVDS to the readout system. The ASIC will give European researchers access to high spectral sensitivity, very low noise and radiation hardened readout electronics for astronomy and Earth observation missions operating at 77 K and room temperature. The versatility of the chip makes the architecture a possible candidate for other research areas, or defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  15. An ASIC memory buffer controller for a high speed disk system

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.; Campbell, Steve

    1993-01-01

    The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

  16. MIL-STD-1553 remote terminal design using ASIC megacell technology

    NASA Astrophysics Data System (ADS)

    Jordan, Anthony F.

    In the early development of MIL-STD-1553, board level implementations of remote terminals, bus controllers, and monitors were the norm. As technology progressed, hybrid solutions followed by monolithic solutions became the preferred solution of avionics design engineers implementing MIL-STD-1553 interfaces. Recent advances in ASIC technology allows the integration of complete MIL-STD-1553 interface into a silicon substrate along with a host microprocessor, memory, and support logic. The benefits of such a solution include reduced board space, increased flexibility, and higher reliability. A device with similar attributes was designed by Rockwell International, Rocketdyne Division, and manufactured by United Technologies Microelectronics Center (UTMC) for use on Space Station Freedom. This paper outlines the development and functionality of the ASIC device.

  17. Studies of the high rate coincidence timing response of the STiC and TOFPET ASICs for the SAFIR PET scanner

    NASA Astrophysics Data System (ADS)

    Becker, R.; Casella, C.; Corrodi, S.; Dissertori, G.; Fischer, J.; Howard, A.; Ito, M.; Lustermann, W.

    2016-12-01

    The proposed SAFIR PET detector will measure positron electron annihilations at injected activities up to 500 MBq in a mouse or rat. The system is required to have the best possible timing resolution in order to remove accidental coincidences (randoms) and maximise the image quality for short time frames allowing the possibility of 4-D kinetic modelling of simultaneous PET and MRI for the first time. Two different ASICs, TOFPET and STiC, have been investigated with LYSO crystal scintillators coupled to SiPM detectors and using 18F sources up to 480 MBq. Timing responses are very encouraging with a coincidence time resolution of ~100 ps measured at low activities, degrading to 130 ps at the foreseen scanner maximum event rate. Sensitivities for single event rates and coincidences are measured and compared with Geant4 Monte Carlo simulations.

  18. Optimization and performance of H2RG detectors and SIDECAR ASICs for SWIMS

    NASA Astrophysics Data System (ADS)

    Todo, Soya; Tateuchi, Ken; Motohara, Kentaro; Konishi, Masahiro; Takahashi, Hidenori; Kitagawa, Yutaro; Kato, Natsuko M.

    2014-07-01

    SWIMS (Simultaneous-color Wide-field Infrared Multi-object Spectrograph) is one of the first-generation instru- ments for the University of Tokyo Atacama Observatory 6.5-m telescope which is now under construction in northern Chile. This instrument incorporates 4 (and maximum 8 in future) HgCdTe HAWAII-2RG detectors, from which images are acquired by SIDECAR ASICs. Characterization and validation of performances of these detectors are carried out using a test dewar at 80K using liquid nitrogen. Bias voltages such as reset level and substrate level and reference voltages are optimized to minimize readout noise with keeping output levels within proper range for ADC inputs. ADU-electron conversion gain gc is measured by photon-transfer method, incorporating IPC (Inter-Pixel Capacitance) correction. IPC coefficient is measured to be about 1.4%, which result in overestimation of gc by about 13%. After this correction, gc is measured to be about 2:4 e-=ADU with normal preamplifier gain setting in the ASICs. Correlated double sampling (CDS) readout noise is about 16 e- rms, and is reduced to about 4 e- rms by Multi Fowler sampling. The noise is different by 30% at most between channels of the ASIC. We also separate noise sources into those come from detector pixels, from a at cable between the detector and the ASIC, and from preamps and from ADCs, and found that the detector pixels are the major sources of readout noise. Fitting of linearity curve is also obtained. The next step is to study the effects of driving multiple detectors to the performances and to install the detectors into SWIMS.

  19. Large dynamic range 64-channel ASIC for CZT or CdTe detectors

    NASA Astrophysics Data System (ADS)

    Glasser, F.; Villard, P.; Rostaing, J. P.; Accensi, M.; Baffert, N.; Girard, J. L.

    2003-08-01

    We present a customized 64-channel ASIC, named ALIX, developed in a 0.8 μm CMOS technology. This circuit is dedicated to measure charges from semi-conductor X-ray detectors like Cadmium Zinc Telluride (CZT) or Cadmium Telluride CdTe. The specificity of ALIX is to be able to measure charges over a very large dynamic range (from 10 fC to 3 nC), and to store eight measurements in a very short time (from every 250 ns to a few ms). Up to eight images are stored inside the ASIC and each image can be read out in 64 μs. A new acquisition sequence can then be started. Two analog readouts are available, one for the X-ray signal and one for the offset and afterglow measurement in case of pulsed X-rays. The outputs are converted into digital values by two off-chip 14 bits Analog-to-Digital Converters (ADC). A first version of ALIX has been tested with CZT and CdTe detectors under high-energy pulsed X-ray photons (20 MeV, 60 ns pulses every 250 ns). We will present the different results of linearity and signal-to-noise ratio. A second version of ALIX has been designed with some corrections. Electrical tests performed on 85 ASICS showed that the corrections were successful. We are now able to integrate them behind a 64×32 pixels 1 mm pitch CZT detector. Such an ASIC could also be used for strip detectors where a large dynamic range and a fast response are necessary.

  20. Performance Trade-Off Analysis Comparing Different Front-End Configurations for a Digital X-ray Imager.

    PubMed

    Kuhls-Gilcrist, Andrew; Jain, Amit; Bednarek, Daniel R; Rudin, Stephen

    2010-10-30

    Performance of indirect digital x-ray imagers is typically limited by the front-end components. Present x-ray-to-light converting phosphors significantly reduce detector resolution due to stochastic blurring and k-fluorescent x-ray reabsorption. Thinner phosphors improve resolution at the cost of lowering quantum detection efficiency (QDE) and increasing Swank noise. Magnifying fiber optic tapers (FOTs) are commonly used to increase the field-of-view of small sensor imagers, such as CMOS, CCD, or electron-multiplying CCD (EMCCD) based detectors, which results in a reduction in detector sensitivity and further reduces the MTF. We investigate performance trade-offs for different front-end configurations coupled to an EMCCD sensor with 8 μm pixels. Six different columnar structured CsI(Tl) scintillators with thicknesses of 100, 200, 350, 500, and 1000 μm type high-light (HL) and a 350 μm type high-resolution (HR) (Hamamatsu) and four different FOTs with magnification ratios (M) of 1, 2.5, 3.3, and 4 were studied using the RQA5 x-ray spectrum. The relative signal of the different scintillators largely followed the relative QDE, indicating their light output per absorbed x-ray was similar, with the type HR CsI emitting 57% of the type HL. The efficiency of the FOTs was inversely proportional to M(2) with the M = 1 FOT transmitting 87% of the incident light. At 5 (10) cycles/mm, the CsI MTF was 0.38 (0.22), 0.33 (0.17), 0.37 (0.19), 0.23 (0.09), 0.19 (0.08), and 0.09 (0.03) for the 100, 200, 350HR, 350, 500, and 1000 μm CsI, respectively and the FOT MTF was 0.89 (0.84), 0.80 (0.72), 0.70 (0.60), and 0.69 (0.37) for M = 1, 2.5, 3.3, and 4, respectively. The 1000, 500, and 350HR μm CsI had the highest DQE for low, medium, and high spatial frequency ranges of 0 to 1.6, 1.6 to 4.5, and 4.5 to 10 cycles/mm, respectively. Larger FOT M resulted in a reduction in DQE. Quantifying performance of different front-end configurations will enable optimal selection of components

  1. Development of a front end ASIC for Dark Matter directional detection with MIMAC

    NASA Astrophysics Data System (ADS)

    Richer, J. P.; Bosson, G.; Bourrion, O.; Grignon, C.; Guillaudin, O.; Mayet, F.; Santos, D.

    2010-08-01

    A front end ASIC (BiCMOS-SiGe 0.35μm) has been developed within the framework of the MIMAC detector project, which aims at directional detection of non-baryonic Dark Matter. This search strategy requires 3D reconstruction of low energy (a few keV) tracks with a gaseous μTPC. The development of this front end ASIC is a key point of the project, allowing the 3D track reconstruction. Each ASIC monitors 16 strips of pixels with charge preamplifiers and their time over threshold is provided in real time by current discriminators via two serializing LVDS links working at 320 MHz. The charge is summed over the 16 strips and provided via a shaper. These specifications have been chosen in order to build an auto triggered electronics. An acquisition board and the related software were developed in order to validate this methodology on a prototype chamber. The prototype detector presents an anode where 2×96 strips of pixels are monitored.

  2. 4 pi direction sensitive gamma imager with RENA-3 readout ASIC

    NASA Astrophysics Data System (ADS)

    Du, Yanfeng; Li, Wen; Yanoff, Brian; Gordon, Jeffrey; Castleberry, Donald

    2007-09-01

    A 4π direction-sensitive gamma imager is presented, using a 1 cm 3 3D CZT detector from Yinnel Tech and the RENA-3 readout ASIC from NOVA R&D. The measured readout system electronic noise is around 4-5 keV FWHM for all anode channels. The measured timing resolution between two channels within a single ASIC is around 10 ns and the resolution is 30 ns between two separate ASIC chips. After 3D material non-uniformity and charge trapping corrections, the measured single-pixel-event energy resolution is around 1% for Cs-137 at 662 keV using a 1 cm 3 CZT detector from Yinnel Tech with an 8 x 8 anode pixel array at 1.15 mm pitch. The energy resolution for two pixel events is 2.9%. A 10 uCi Cs-137 point source was moved around the detector to test the image reconstruction algorithms and demonstrate the source direction detection capability. Accurate source locations were reconstructed with around 200 two-pixel events within a total energy window +/-10 keV around the 662 keV full energy peak. The angular resolution FWHM at four of the five positions tested was between 0.05-0.07 steradians.

  3. Plasmon-assisted optical vias for photonic ASICS

    DOEpatents

    Skogen, Erik J.; Vawter, Gregory A.; Tauke-Pedretti, Anna

    2017-03-21

    The present invention relates to optical vias to optically connect multilevel optical circuits. In one example, the optical via includes a surface plasmon polariton waveguide, and a first optical waveguide formed on a first substrate is coupled to a second optical waveguide formed on a second substrate by the surface plasmon polariton waveguide. In some embodiments, the first optical waveguide includes a transition region configured to convert light from an optical mode to a surface plasmon polariton mode or from a surface plasmon polariton mode to an optical mode.

  4. Magnet Misalignment Studies for the Front-end of the Neutrino Factory

    SciTech Connect

    Prior, G.; Efthymiopoulos, I.; Stratakis, D.; Neuffer, D.; Snopok, P.; Rogers, C.

    2013-06-01

    In the Neutrino Factory front-end the muon beam coming from the interaction of a high-power (4 MW) proton beam on a mercury jet target is transformed through a buncher, a phase rotator and an ionization cooling channel before entering the downstream acceleration system. The muon front-end channel is densely packed with solenoid magnets, normal conducting radio-frequency cavities and absorber windows for the cooling section. The tolerance to the misalignment of the different components has to be determined in order on one hand to set the limits beyond which the performance of the front-end channel would be degraded; on the other hand to optimize the design and assembly of the front-end cells such that the component alignment can be checked and corrected for where crucial for the performance of the channel. In this paper we show the results of some of the simulations of the front-end channel performance where the magnetic field direction has been altered compared to the baseline.

  5. Control and Interlocking System for Bending Magnet Front-end at Indus-2

    NASA Astrophysics Data System (ADS)

    Kane, Sanjeev R.; Garg, Chander Kant; Nandedkar, R. V.

    2007-01-01

    We present control and interlock system developed for Indus-2 bending magnet front-end. The paper describes in detail the control of various signals associated with the front-end and the interlocking scheme implemented for the installed front-end. The number of signals associated with each front-end is ˜ 75. A control system is designed for monitoring temperature, pressure, airflow, water flow and control of vacuum gauges, fast shutter, water cooled shutter, safety shutter, pneumatic gate valves, sputter ion pump power supplies, beam position monitor etc. Two independent signals are generated for critical components that are used for software interlock and hard-wired interlock. The front-end control system is VME based and window 2000/XP workstation as an operator console. The CPU used is Motorola 68000-processor board of the VME bus having OS-9 real time operating system. One VME crate serves a cluster of 2-3 front ends. The communication between the VME and the workstation is linked over RS232 serial communication. The sputter ion power supplies are connected over isolated RS485 network. Critical protection features are implemented so that no single failure can render the system unsafe. This is implemented by providing two independent chains of protection (1) Hard wired in which relay logic is used and (2) Software. A Graphical User Interface (GUI) is developed using Lab view Version 7.0.

  6. An 8.4-GHz dual-maser front-end system for Parkes reimplementation

    NASA Astrophysics Data System (ADS)

    Trowbridge, D. L.; Loreman, J. R.; Brunzie, T. J.; Quinn, R.

    1990-02-01

    An 8.4-GHz front-end system consisting of a feedhorn, a waveguide feed assembly, dual masers, and downconverters was reimplemented at Parkes as part of the Parkes Canberra Telemetry Array for the Voyager Neptune encounter. The front-end system was originally assembled by the European Space Agency and installed on the Parkes antenna for the Giotto project. It was also used on a time-sharing basis by the Deep Space Network as part of the Parkes Canberra Telemetry Array to enhance the data return from the Voyager Uranus encounter. At the conclusion of these projects in 1986, part of the system was then shipped to JPL on loan for reimplementation at Parkes for the Voyager Neptune encounter. New design and implementation required to make the system operable at Parkes included new microwave front-end control cabinets, closed-cycle refrigeration monitor system, noise-adding radiometer system, front-end controller assembly, X81 local oscillator multiplier, and refurbishment of the original dual 8.4-GHz traveling-wave masers and waveguide feed system. The front-end system met all requirements during the encounter and was disassembled in October 1989 and returned to JPL.

  7. Muscle IL1β Drives Ischemic Myalgia via ASIC3-Mediated Sensory Neuron Sensitization

    PubMed Central

    Ross, Jessica L.; Queme, Luis F.; Cohen, Elysia R.; Green, Kathryn J.; Lu, Peilin; Shank, Aaron T.; An, Suzie; Hudgins, Renita C.

    2016-01-01

    Musculoskeletal pain is a significantly common clinical complaint. Although it is known that muscles are quite sensitive to alterations in blood flow/oxygenation and a number of muscle pain disorders are based in problems of peripheral perfusion, the mechanisms by which ischemic-like conditions generate myalgia remain unclear. We found, using a multidisciplinary experimental approach, that ischemia and reperfusion injury (I/R) in male Swiss Webster mice altered ongoing and evoked pain-related behaviors in addition to activity levels through enhanced muscle interleukin-1 beta (IL1β)/IL1 receptor signaling to group III/IV muscle afferents. Peripheral sensitization depended on acid-sensing ion channels (ASICs) because treatment of sensory afferents in vitro with IL1β-upregulated ASIC3 in single cells, and nerve-specific knock-down of ASIC3 recapitulated the results of inhibiting the enhanced IL1β/IL1r1 signaling after I/R, which was also found to regulate afferent sensitization and pain-related behaviors. This suggests that targeting muscle IL1β signaling may be a potential analgesic therapy for ischemic myalgia. SIGNIFICANCE STATEMENT Here, we have described a novel pathway whereby increased inflammation within the muscle tissue during ischemia/reperfusion injury sensitizes group III and IV muscle afferents via upregulation of acid-sensing ion channel 3 (ASIC3), leading not only to alterations in mechanical and chemical responsiveness in individual afferents, but also to pain-related behavioral changes. Furthermore, these I/R-induced changes can be prevented using an afferent-specific siRNA knock-down strategy targeting either ASIC3 or the upstream mediator of its expression, interleukin 1 receptor 1. Therefore, this knowledge may contribute to the development of alternative therapeutics for muscle pain and may be especially relevant to pain caused by issues of peripheral circulation, which is commonly observed in disorders such as complex regional pain syndrome

  8. A low noise CMOS RF front-end for UWB 6-9 GHz applications

    NASA Astrophysics Data System (ADS)

    Feng, Zhou; Ting, Gao; Fei, Lan; Wei, Li; Ning, Li; Junyan, Ren

    2010-11-01

    An integrated fully differential ultra-wideband CMOS RF front-end for 6-9 GHz is presented. A resistive feedback low noise amplifier and a gain controllable IQ merged folded quadrature mixer are integrated as the RF front-end. The ESD protected chip is fabricated in a TSMC 0.13 μm RF CMOS process and achieves a maximum voltage gain of 23-26 dB and a minimum voltage gain of 16-19 dB, an averaged total noise figure of 3.3-4.6 dB while operating in the high gain mode and an in-band IIP3 of -12.6 dBm while in the low gain mode. This RF front-end consumes 17 mA from a 1.2 V supply voltage.

  9. Trends in the design of front-end systems for room temperature solid state detectors

    SciTech Connect

    Manfredi, Pier F.; Re, Valerio

    2003-10-07

    The paper discusses the present trends in the design of low-noise front-end systems for room temperature semiconductor detectors. The technological advancement provided by submicron CMOS and BiCMOS processes is examined from several points of view. The noise performances are a fundamental issue in most detector applications and suitable attention is devoted to them for the purpose of judging whether or not the present processes supersede the solutions featuring a field-effect transistor as a front-end element. However, other considerations are also important in judging how well a monolithic technology suits the front-end design. Among them, the way a technology lends itself to the realization of additional functions, for instance, the charge reset in a charge-sensitive loop or the time-variant filters featuring the special weighting functions that may be requested in some applications of CdTe or CZT detectors.

  10. An ECG recording front-end with continuous-time level-crossing sampling.

    PubMed

    Li, Yongjia; Mansano, Andre L; Yuan, Yuan; Zhao, Duan; Serdijn, Wouter A

    2014-10-01

    An ECG recording front-end with a continuous- time asynchronous level-crossing analog-to-digital converter (LC-ADC) is proposed. The system is a voltage and current mixed-mode system, which comprises a low noise amplifier (LNA), a programmable voltage-to-current converter (PVCC) as a programmable gain amplifier (PGA) and an LC-ADC with calibration DACs and an RC oscillator. The LNA shows an input referred noise of 3.77 μVrms over 0.06 Hz-950 Hz bandwidth. The total harmonic distortion (THD) of the LNA is 0.15% for a 10 mVPP input. The ECG front-end consumes 8.49 μW from a 1 V supply and achieves an ENOB up to 8 bits. The core area of the proposed front-end is 690 ×710 μm2, fabricated in a 0.18 μm CMOS technology.

  11. SEMICONDUCTOR INTEGRATED CIRCUITS Design of an analog front-end for ambulatory biopotential measurement systems

    NASA Astrophysics Data System (ADS)

    Jiazhen, Wang; Jun, Xu; Lirong, Zheng; Junyan, Ren

    2010-10-01

    A continuously tunable gain and bandwidth analog front-end for ambulatory biopotential measurement systems is presented. The front-end circuit is capable of amplifying and conditioning different biosignals. To optimize the power consumption and simplify the system architecture, the front-end only adopts two-stage amplifiers. In addition, careful design eliminates the need for chopping circuits. The input-referred noise of the system is only 1.19 μVrms (0.48-2000 Hz). The chip is fabricated via a SMIC 0.18 μm CMOS process. Although the power consumption is only 32.1 μW under a 3 V voltage supply, test results show that the chip can successfully extract biopotential signals.

  12. Custom ASIC development for high-speed Viterbi decoding

    NASA Astrophysics Data System (ADS)

    Miller, S. P.; Becker, N.; Johnson, P. N.

    A high-speed, emitter-coupled logic (ECL) gate array which greatly facilitates the implementation of very-high-speed Viterbi algorithm processors has been developed. These high-speed Viterbi decoders were incorporated into two bandwidth-efficient, jointly optimized coded modulation systems with baseband information rates of 140 and 200 Mb/s. The 200-Mb/s system was developed for NASA under the advanced modulation technology development program. The octal phase shift keying (8PSK) modulation technique used in these systems requires symbol rates of 60 and 75 Msymbol/s. The gate array device also has the potential for use in similar systems with symbol rates in excess of 100 Msymbol/s. Some details of the coded modulation systems that require the implementation of high-speed Viterbi processors are provided to demonstrate current practical applications and the need for this processing capability. The specific gate array design is described in conjunction with the performance goals and measured parameters of the completed device. Performance measurements obtained from high-speed coded modulation systems that use the gate array are also presented to show the performance obtained.

  13. Flight test of 4-Hz and 30-Hz Omega receiver front-end

    NASA Technical Reports Server (NTRS)

    Wright, L.

    1976-01-01

    In-flight information was gathered on two Omega receiver analog modules, one having a 4-Hz bandwidth and the other a 30-Hz bandwidth. The Mini-O receiver was also monitored. An improved signal-to-noise characteristic of the narrower bandwidth front-end with negligible loss in dynamic range indicates that the 4-Hz front-end is the more desirable for the prototype Omega receivers. The Mini-O receiver was found to function quite satisfactorily on its second test flight, and has a very real potential for a low-cost, low-power, compact and light-weight Omega receiver.

  14. Safe operating conditions for NSLS-II Storage Ring Frontends commissioning

    SciTech Connect

    Seletskiy, S.; Amundsen, C.; Ha, K.; Hussein, A.

    2015-04-02

    The NSLS-II Storage Ring Frontends are designed to safely accept the synchrotron radiation fan produced by respective insertion device when the electron beam orbit through the ID is locked inside the predefined Active Interlock Envelope. The Active Interlock is getting enabled at a particular beam current known as AI safe current limit. Below such current the beam orbit can be anywhere within the limits of the SR beam acceptance. During the FE commissioning the beam orbit is getting intentionally disturbed in the particular ID. In this paper we explore safe operating conditions for the Frontends commissioning.

  15. Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

    NASA Astrophysics Data System (ADS)

    Unno, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.; Sato, Kz.; Sato, Kj.; Iwabuchi, S.; Suzuki, J.

    2017-01-01

    We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n+-in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

  16. Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging

    NASA Astrophysics Data System (ADS)

    Ballabriga, R.; Alozy, J.; Campbell, M.; Frojdh, E.; Heijne, E. H. M.; Koenig, T.; Llopart, X.; Marchal, J.; Pennicard, D.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.; Zuber, M.

    2016-01-01

    Semiconductor detector readout chips with pulse processing electronics have made possible spectroscopic X-ray imaging, bringing an improvement in the overall image quality and, in the case of medical imaging, a reduction in the X-ray dose delivered to the patient. In this contribution we review the state of the art in semiconductor-detector readout ASICs for spectroscopic X-ray imaging with emphasis on hybrid pixel detector technology. We discuss how some of the key challenges of the technology (such as dealing with high fluxes, maintaining spectral fidelity, power consumption density) are addressed by the various ASICs. In order to understand the fundamental limits of the technology, the physics of the interaction of radiation with the semiconductor detector and the process of signal induction in the input electrodes of the readout circuit are described. Simulations of the process of signal induction are presented that reveal the importance of making use of the small pixel effect to minimize the impact of the slow motion of holes and hole trapping in the induced signal in high-Z sensor materials. This can contribute to preserve fidelity in the measured spectrum with relatively short values of the shaper peaking time. Simulations also show, on the other hand, the distortion in the energy spectrum due to charge sharing and fluorescence photons when the pixel pitch is decreased. However, using recent measurements from the Medipix3 ASIC, we demonstrate that the spectroscopic information contained in the incoming photon beam can be recovered by the implementation in hardware of an algorithm whereby the signal from a single photon is reconstructed and allocated to the pixel with the largest deposition.

  17. Selective inhibition of ASIC1a confers functional and morphological neuroprotection following traumatic spinal cord injury

    PubMed Central

    Koehn, Liam M.; Noor, Natassya M.; Dong, Qing; Er, Sing-Yan; Rash, Lachlan D.; King, Glenn F.; Dziegielewska, Katarzyna M.; Saunders, Norman R.; Habgood, Mark D.

    2016-01-01

    Tissue loss after spinal trauma is biphasic, with initial mechanical/haemorrhagic damage at the time of impact being followed by gradual secondary expansion into adjacent, previously unaffected tissue. Limiting the extent of this secondary expansion of tissue damage has the potential to preserve greater residual spinal cord function in patients. The acute tissue hypoxia resulting from spinal cord injury (SCI) activates acid-sensing ion channel 1a (ASIC1a). We surmised that antagonism of this channel should provide neuroprotection and functional preservation after SCI. We show that systemic administration of the spider-venom peptide PcTx1, a selective inhibitor of ASIC1a, improves locomotor function in adult Sprague Dawley rats after thoracic SCI. The degree of functional improvement correlated with the degree of tissue preservation in descending white matter tracts involved in hind limb locomotor function. Transcriptomic analysis suggests that PcTx1-induced preservation of spinal cord tissue does not result from a reduction in apoptosis, with no evidence of down-regulation of key genes involved in either the intrinsic or extrinsic apoptotic pathways. We also demonstrate that trauma-induced disruption of blood-spinal cord barrier function persists for at least 4 days post-injury for compounds up to 10 kDa in size, whereas barrier function is restored for larger molecules within a few hours. This temporary loss of barrier function provides a “ treatment window” through which systemically administered drugs have unrestricted access to spinal tissue in and around the sites of trauma. Taken together, our data provide evidence to support the use of ASIC1a inhibitors as a therapeutic treatment for SCI. This study also emphasizes the importance of objectively grading the functional severity of initial injuries (even when using standardized impacts) and we describe a simple scoring system based on hind limb function that could be adopted in future studies. PMID:28105306

  18. An introduction to future truly wearable medical devices--from application to ASIC.

    PubMed

    Casson, Alexander J; Logesparan, Lojini; Rodriguez-Villegas, Esther

    2010-01-01

    This talk will provide an introduction to the "Towards future truly wearable medical devices: from application to ASIC" mini-symposium. For user comfort and acceptance long term physiological sensors must be discrete, comfortable and easy to use. These requirements place stringent limits on all aspects of the system design: from the overall application aim, to power generation issues, to low power electronic design techniques. For successful devices design issues in all of these areas must be solved simultaneously. The work here presents an overview and introduction to these topics.

  19. A 64ch readout module for PPD/MPPC/SiPM using EASIROC ASIC

    NASA Astrophysics Data System (ADS)

    Nakamura, Isamu; Ishijima, N.; Hanagaki, K.; Yoshimura, K.; Nakai, Y.; Ueno, K.

    2015-07-01

    A readout module for PPD/MPPC/GAPD/SiPM is developed using EASIROC ASIC. The module can handle 64 PPDs and has on-board bias power supply, ADC for energy measurement, 1 ns TDC on FPGA as well as 64ch Logic output for external trigger. Controls and data transfer are through SiTCP technology implemented in FPGA. The module has NIM format for convenience, but can be operated without crate with 5 V AC/DC converter. Basic performance of production module was tested and the results are presented in the poster.

  20. MATRIX: a 15 ps resistive interpolation TDC ASIC based on a novel regular structure

    NASA Astrophysics Data System (ADS)

    Mauricio, J.; Gascón, D.; Ciaglia, D.; Gómez, S.; Fernández, G.; Sanuy, A.

    2016-12-01

    This paper presents a 4-channel TDC ASIC with the following features: 15-ps LSB (9.34 ps after calibration), 10-ps jitter, < 4-ps time resolution, up to 10 MHz of sustained input rate per channel, 45 mW of power consumption and very low area (910×215 μm2) in a commercial 180 nm technology. The main contribution of this work is the novel design of the clock interpolation circuitry based on a resistive interpolation mesh circuit (patented), a two-dimensional regular structure with very good properties in terms of power consumption, area and low process variability.

  1. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  2. An asynchronous data acquisition ASIC with a data-push architecture

    NASA Astrophysics Data System (ADS)

    Mani, S.; Burlingame, E.; Bloom, P.; Glenn, S.; Holbrook, B.; Hopman, P.; Lin, F.; Rojas, S.

    1995-02-01

    We report on a digital circuit for data acquisition that has been developed for high energy physics applications. Its function is to receive asynchronous voltage pulses, time-stamp them individually and transmit them sequentially on an external bus. A 16-channel design has been fabricated as an application specific integrated circuit (ASIC) using the HP 1.2 μm double-metal, single-polysilicon process. Test results made on prototype chips indicate that the circuit performs within specifications for an operating clock frequency of 25 MHz and a working environment temperature of 0°C to 40°C.

  3. Performance and Calibration of H2RG Detectors and SIDECAR ASICs for the RATIR Camera

    NASA Technical Reports Server (NTRS)

    Fox, Ori D.; Kutyrev, Alexander S.; Rapchun, David A.; Klein, Christopher R.; Butler, Nathaniel R.; Bloom, Josh; de Diego, Jos A.; Simn Farah, Alejandro D.; Gehrels, Neil A.; Georgiev, Leonid; Gonzlez-Hernandez, J. Jess; Lee, William H.; Loose, Markus; Lotkin, Gennadiy; Moseley, Samuel H.; Prochaska, J. Xavier; Ramirez-Ruiz, Enrico; Richer, Michael G.; Robinson, Frederick D.; Romn-Zuniga, Carols; Samuel, Mathew V.; Sparr, Leroy M.; Watson, Alan M.

    2012-01-01

    The Reionization And Transient Infra,.Red (RATIR) camera has been built for rapid Gamma,.Ray Burst (GRE) followup and will provide simultaneous optical and infrared photometric capabilities. The infrared portion of this camera incorporates two Teledyne HgCdTe HAWAII-2RG detectors, controlled by Teledyne's SIDECAR ASICs. While other ground-based systems have used the SIDECAR before, this system also utilizes Teledyne's JADE2 interface card and IDE development environment. Together, this setup comprises Teledyne's Development Kit, which is a bundled solution that can be efficiently integrated into future ground-based systems. In this presentation, we characterize the system's read noise, dark current, and conversion gain.

  4. Operational Studies of Cadmium Zinc Telluride Microstrip Detectors using SVX ASIC Electronics

    NASA Astrophysics Data System (ADS)

    Krizmanic, John; Barbier, L. M.; Barthelmy, S.; Bartlett, L.; Birsa, F.; Gehrels, N.; Hanchak, C.; Kurczynski, P.; Odom, J.; Parsons, A.; Palmer, D.; Sheppard, D.; Snodgrass, S.; Stahle, C. M.; Teegarden, B.; Tueller, J.

    1997-04-01

    We have been investigating the operational properties of cadmium zinc telluride (CZT) microstrip detectors by using SVX ASIC readout electronics. This research is in conjunction with the development of a CZT-based, next generation gamma-ray telescope for use in the gamma-ray Burst ArcSecond Imaging and Spectroscopy (BASIS) experiment. CZT microstrip detectors with 128 channels and 100 micron strip pitch have been fabricated and were interfaced to SVX electronics at Goddard Space Flight Center. Experimental results involving position sensing, spectroscopy, and CZT operational properties will be presented.

  5. ASIC1a mediates the drug resistance of human hepatocellular carcinoma via the Ca2+/PI3-kinase/AKT signaling pathway

    PubMed Central

    Zhang, Yihao; Zhang, Ting; Wu, Chao; Xia, Quan; Xu, Dujuan

    2017-01-01

    Chemotherapy is the main treatment method of patients with advanced liver cancer. However, drug resistance is a serious problem in the treatment of hepatocellular carcinoma (HCC). Acid sensing ion channel 1a (ASIC1a) is a H+-gated cation channel; it mediates tumor cell migration and invasion, which suggests that it is involved in the development of malignant tumors. Therefore, we studied the relationship between ASIC1a and drug resistance in human hepatocellular carcinoma. In our study, we found that ASIC1a is highly expressed in human HCC tissue, and that its levels were significantly increased in resistant HCC cells Bel7402/FU and HepG2/ADM. Inhibiting the activity of ASIC1a enhances the chemosensitivity of Bel7402/FU and HepG2/ADM cells. The overexpression of ASIC1a contributed to drug resistance in Bel7402 and HepG2 cells, whereas knockdown of ASIC1a overcame drug resistance in Bel7402/FU and HepG2/ADM cells. We further demonstrated that ASIC1a mediated calcium influx, which resulted in the activation of PI3K/AKT signaling and increased drug resistance. These data suggest that ASIC1a/Ca2+/PI3K/AKT signaling represents a novel pathway that regulates drug resistance, thus offering a potential target for chemotherapy of HCC. PMID:27918554

  6. Front-End Types. Automotive Mechanics. Steering & Suspension. Instructor's Guide [and] Student Guide.

    ERIC Educational Resources Information Center

    Spignesi, B.

    This instructional package, one in a series of individualized instructional units on automotive steering and suspension, consists of a student guide and an instructor guide dealing with automobile front-end types. Covered in the module are three common types of passenger car front suspension systems and their major components as well as two types…

  7. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 40 Protection of Environment 10 2013-07-01 2013-07-01 false Batch front-end process vents-monitoring equipment. 63.489 Section 63.489 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... installed in the gas stream immediately before and after the catalyst bed. (2) Where a flare is used,...

  8. Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan

    SciTech Connect

    Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.; Keller, Daniel T.

    2015-09-16

    The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.

  9. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins...) of this section. Compliance may be based on either organic HAP or TOC. (1) For each batch front-end process vent, reduce organic HAP emissions using a flare. (i) The owner or operator of the...

  10. Testing and Feedback Effects on Front-End Control over Later Retrieval

    ERIC Educational Resources Information Center

    Thomas, Ruthann C.; McDaniel, Mark A.

    2013-01-01

    In 2 experiments, we explored differences in cognitive control at retrieval on a final test to better understand the mechanisms underlying the powerful boost in recall of previously tested information. Memory retrieval can be enhanced by front-end control processes that regulate the scope of retrieval or by later processes that monitor retrieval…

  11. A sub-mW fully-integrated pulse oximeter front-end.

    PubMed

    Glaros, Konstantinos N; Drakakis, Emmanuel M

    2013-06-01

    This paper presents the implementation of the first fully integrated pulse oximeter front-end with a power consumption lower than 1 mW. This is enabled by system- and block-level noise optimisation, also detailed in the manuscript. The proposed design features an analogue feedback loop that enables fast and accurate regulation of the detected photocurrent level and a serial-to-parallel interface allowing for extensive programmability of several operation parameters. The front-end was fabricated in the AMS 0.35 μm technology and occupies an area of 1.35 mm(2). Extensive measured results, both electrical and physiological from human subjects are reported, demonstrating an estimated SNR of 39 dB and ability to detect 2% changes in SpO2, similar to commercial pulse oximeters. This is despite the constrained power consumption which amounts to 0.31 mW for the LEDs and 0.53 mW for the rest of the front-end from a 3.3 V supply. Statistical results from 20 chips verify good matching across the Red and Infrared channels of the front-end and the accurate operation of the proposed analogue feedback loop.

  12. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... ducted to a halogen reduction device that reduces overall emissions of hydrogen halides and halogens by at least 99 percent before discharge to the atmosphere. (2) A halogen reduction device may be used to reduce the halogen atom mass emission rate to less than 3,750 kg/yr for batch front-end process vents...

  13. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... ducted to a halogen reduction device that reduces overall emissions of hydrogen halides and halogens by at least 99 percent before discharge to the atmosphere. (2) A halogen reduction device may be used to reduce the halogen atom mass emission rate to less than 3,750 kg/yr for batch front-end process vents...

  14. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... ducted to a halogen reduction device that reduces overall emissions of hydrogen halides and halogens by at least 99 percent before discharge to the atmosphere. (2) A halogen reduction device may be used to reduce the halogen atom mass emission rate to less than 3,750 kg/yr for batch front-end process vents...

  15. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ...-monitoring equipment. 63.489 Section 63.489 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... § 63.489 Batch front-end process vents—monitoring equipment. (a) General requirements. Each owner or... comply with the requirements in § 63.487(a)(2) or § 63.487(b)(2) shall install the monitoring...

  16. Radiation hardness improvement of analog front-end microelectronic devices for particle accelerator

    NASA Astrophysics Data System (ADS)

    Miroshnichenko, A. G.; Rodin, A. S.; Bakerenkov, A. S.; Felitsyn, V. A.

    2016-10-01

    Series of schematic techniques for increasing radiation hardness of the current mirrors is developed. These techniques can be used for the design of analog front-end microelectronic devices based on the operational amplifiers. The circuit simulation of radiation degradation of current transmission coefficients was performed for various circuit solutions in LTSpice software.

  17. Experimental demonstration of a scalable transmitter frontend technique in IMDD-OFDMA-PON upstream scheme

    NASA Astrophysics Data System (ADS)

    Ju, Cheng; Liu, Na; Wang, Dongdong; Zhang, Zhiguo; Chen, Xue

    2016-11-01

    Scalable transmitter frontend scheme is proposed to reduce the sampling rate of digital-to-analog converter (DAC) and the complexity of digital signal processing (DSP) in intensity modulation and direct detection (IMDD) OFDMA-PON upstream scenarios. The hardware cost of each ONU is substantially decreased. The feasibility of the proposed scheme is experimentally demonstrated.

  18. Development of a low-noise readout ASIC for Silicon Drift Detectors in high energy resolution X-ray spectrometry

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Levin, V.; Malankin, E.; Shumikhin, V.

    2017-03-01

    ASIC with a low-noise readout channel for Silicon Drift Detectors in high energy resolution X-ray spectrometry was designed and prototyped in the AMS 350 nm CMOS process via Europractice as a miniASIC. For the analog readout channel tests there was used the detector module SDD-10-130-PTW LTplus-ic (PNDetector GmbH). The measured energy resolution of this module with the designed readout channel: 200 eV (FWHM) at 55Fe, -16 °C, 1 kcps and a peaking time of 8 μs.

  19. PACIFIC: A 64-channel ASIC for scintillating fiber tracking in LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Gascon, D.; Chanal, H.; Comerma, A.; Gomez, S.; Han, X.; Mazorra, J.; Mauricio, J.; Pillet, N.; Yengui, F.; Vandaele, R.

    2015-04-01

    The LHCb detector will be upgraded during the next LHC shutdown in 2018/19 [1]. The tracker system will have a major overhaul. Its components will be replaced with new technologies in order to cope with the increased hit occupancy and radiation environment. Here we describe a detector made of scintillating fibers read out by silicon photomultipliers (SiPM), with a view to its application for this upgrade. This technology has been shown to achieve high efficiency and spatial resolution, but its integration within a LHCb experiment presents new challenges. This article gives an overview of the R&D status of the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC) chip implemented in a 130 nm CMOS technology. The PACIFIC chip is a 64-channel ASIC which can be connected to a SiPM without the need of any external component. It includes analog signal processing and digitization. The first stage is a current conveyor followed by a tunable fast shaper (≈10 ns) and a gated integrator. The digitization is performed using a 3 threshold non-linear flash ADC operating at 40 MHz. The PACIFIC chip has the ability to cope with different SiPM suppliers with a power consumption below 8 mW per channel and it is radiation-tolerant. Lastly, simulation and test results show the proper read out of the SiPMs with the PACIFIC chip.

  20. An extremely low power voltage reference with high PSRR for power-aware ASICs

    NASA Astrophysics Data System (ADS)

    Jihai, Duan; Dongyu, Deng; Weilin, Xu; Baolin, Wei

    2015-09-01

    An extremely low power voltage reference without resistors is presented for power-aware ASICs. In order to reduce the power dissipation, an Oguey current reference source is used to reduce the static current; a cascode current mirror is used to increase the power supply rejection ratio (PSRR) and reduce the line sensitivity of the circuit. The voltage reference is fabricated in SMIC 0.18-μm CMOS process. The measured results for the voltage reference demonstrate that the temperature coefficient of the voltage is 66 ppm/°C in a range from 25 to 100 °C. The line sensitivity is 0.9% in a supply voltage range of 1.8 to 3.3 V, and PSRR is -49 dB at 100 Hz. The power dissipation is 200 nW. The chip area is 0.01 mm2. The circuit can be used as an elementary circuit block for power-aware ASICs. Project supported by the National Natural Science Foundation of China (Nos. 61161003, 61264001, 61166004) and the Guangxi Natural Science Foundation (No. 2013GXNSFAA019333).

  1. Performance of CATIROC: ASIC for smart readout of large photomultiplier arrays

    NASA Astrophysics Data System (ADS)

    Blin, S.; Callier, S.; Conforti Di Lorenzo, S.; Dulucq, F.; De La Taille, C.; Martin-Chassard, G.; Seguin-Moreau, N.

    2017-03-01

    CATIROC (Charge And Time Integrated Read Out Chip) is a complete read-out chip manufactured in AustriaMicroSystem (AMS) SiGe 0.35 μm technology, designed to read arrays of 16 photomultipliers (PMTs). It is an upgraded version of PARISROC2 [1] designed in 2010 in the context of the PMm2 (square meter PhotoMultiplier) project [2]. CATIROC is a SoC (System on Chip) that processes analog signals up to the digitization and sparsification to reduce the cost and cable number. The ASIC is composed of 16 independent channels that work in triggerless mode, auto-triggering on the single photo-electron. It provides a charge measurement up to 400 photoelectrons (70 pC) on two scales of 10 bits and a timing information with an accuracy of 200 ps rms. The ASIC was sent for fabrication in February 2015 and then received in September 2015. It is a good candidate for two Chinese projects (LHAASO and JUNO). The architecture and the measurements will be detailed in the paper.

  2. Multiplexed detection of cardiac biomarkers in serum with nanowire arrays using readout ASIC.

    PubMed

    Zhang, Guo-Jun; Chai, Kevin Tshun Chuan; Luo, Henry Zhan Hong; Huang, Joon Min; Tay, Ignatius Guang Kai; Lim, Andy Eu-Jin; Je, Minkyu

    2012-05-15

    Early detection of cardiac biomarkers for diagnosis of heart attack is the key to saving lives. Conventional method of detection like the enzyme-linked immunosorbent assay (ELISA) is time consuming and low in sensitivity. Here, we present a label-free detection system consisting of an array of silicon nanowire sensors and an interface readout application specific integrated circuit (ASIC). This system provides a rapid solution that is highly sensitive and is able to perform direct simultaneous-multiplexed detection of cardiac biomarkers in serum. Nanowire sensor arrays were demonstrated to have the required selectivity and sensitivity to perform multiplexed detection of 100 fg/ml troponin T, creatine kinase MM, and creatine kinase MB in serum. A good correlation between measurements from a probe station and the readout ASIC was obtained. Our detection system is expected to address the existing limitations in cardiac health management that are currently imposed by the conventional testing platform, and opens up possibilities in the development of a miniaturized device for point-of-care diagnostic applications.

  3. Low-Power, 8-Channel EEG Recorder and Seizure Detector ASIC for a Subdermal Implantable System.

    PubMed

    Do Valle, Bruno G; Cash, Sydney S; Sodini, Charles G

    2016-04-20

    EEG remains the mainstay test for the diagnosis and treatment of patients with epilepsy. Unfortunately, ambulatory EEG systems are far from ideal for patients who have infrequent seizures. These systems only last up to 3 days and if a seizure is not captured during the recordings, a definite diagnosis of the patient's condition cannot be given. This work aims to address this need by proposing a subdermal implantable, eight-channel EEG recorder and seizure detector that has two modes of operation: diagnosis and seizure counting. In the diagnosis mode, EEG is continuously recorded until a number of seizures are recorded. In the seizure counting mode, the system uses a low-power algorithm to track the number of seizures a patient has, providing doctors with a reliable count to help determine medication efficacy or other clinical endpoint. An ASIC that implements the EEG recording and seizure detection algorithm was designed and fabricated in a 0.18 μm CMOS process. The ASIC includes eight EEG channels and is designed to minimize the system's power and size. The result is a power-efficient analog front end that requires 2.75 μW per channel in diagnosis mode and 0.84 μW per channel in seizure counting mode. Both modes have an input referred noise of approximately 1.1 μVrms.

  4. Low-Power, 8-Channel EEG Recorder and Seizure Detector ASIC for a Subdermal Implantable System.

    PubMed

    Do Valle, Bruno G; Cash, Sydney S; Sodini, Charles G

    2016-12-01

    EEG remains the mainstay test for the diagnosis and treatment of patients with epilepsy. Unfortunately, ambulatory EEG systems are far from ideal for patients who have infrequent seizures. These systems only last up to 3 days and if a seizure is not captured during the recordings, a definite diagnosis of the patient's condition cannot be given. This work aims to address this need by proposing a subdermal implantable, eight-channel EEG recorder and seizure detector that has two modes of operation: diagnosis and seizure counting. In the diagnosis mode, EEG is continuously recorded until a number of seizures are recorded. In the seizure counting mode, the system uses a low-power algorithm to track the number of seizures a patient has, providing doctors with a reliable count to help determine medication efficacy or other clinical endpoint. An ASIC that implements the EEG recording and seizure detection algorithm was designed and fabricated in a 0.18 μm CMOS process. The ASIC includes eight EEG channels and is designed to minimize the system's power and size. The result is a power-efficient analog front end that requires 2.75 μW per channel in diagnosis mode and 0.84 μW per channel in seizure counting mode. Both modes have an input referred noise of approximately 1.1 μVrms.

  5. High Resolution Photon Timing with MCP-PMTs: A Comparison of a Commercial Constant Fraction Discriminator (CFD) with the ASIC-based Waveform Digitizers TARGET and WaveCatcher

    SciTech Connect

    Breton, D.; Delagnes, E.; Maalmi, J.; Nishimura, K.; Ruckman, L.L.; Varner, G.; Va'vra, J.; /SLAC

    2011-07-14

    There is a considerable interest to develop new time-of-flight detectors using, for example, micro-channel-plate photodetectors (MCP-PMTs). The question we pose in this paper is if new waveform digitizer ASICs, such as the WaveCatcher and TARGET, operating with a sampling rate of 2-3 GSa/s can compete with 1GHz BW CFD/TDC/ADC electronics. We have performed a series of measurements with these waveform digitizers coupled to MCP-PMTs operating at low gain and with a signal equivalent to {approx}40 photoelectrons. The tests were done with a laser diode on detectors operating under the same condition used previously in SLAC and Fermilab beam tests. Our test results indicate that one can achieve similar resolution with both methods. Although the commercial CFD-based electronics does exist and performs very well, it is difficult to implement on a very large scale, and therefore the custom electronics is needed. In addition, the analog delay line requirement makes it very difficult to incorporate CFD discriminators in ASIC designs.

  6. Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

    SciTech Connect

    Ericson, M.N.; Allen, M.D.; Boissevain, J.

    1997-11-01

    Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, timing, data format, and communication rates will be discussed in detail. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling, and FPGA implementation and programming will be presented.

  7. Mitigating RF Front-End Nonlinearity of Sensor Nodes to Enhance Spectrum Sensing

    PubMed Central

    Hu, Lin; Ma, Hong; Zhang, Hua; Zhao, Wen

    2016-01-01

    The cognitive radio wireless sensor network (CR-WSN) has gained worldwide attention in recent years for its potential applications. Reliable spectrum sensing is the premise for opportunistic access to sensor nodes. However, as a result of the radio frequency (RF) front-end nonlinearity of sensor nodes, distortion products can easily degrade the spectrum sensing performance by causing false alarms and degrading the detection probability. Given the limitations of the widely-used adaptive interference cancellation (AIC) algorithm, this paper develops several details to avoid these limitations and form a new mitigation architecture to alleviate nonlinear distortions. To demonstrate the efficiency of the proposed algorithm, verification tests for both simulations and actual RF front-end measurements are presented and discussed. The obtained results show that distortions can be suppressed significantly, thus improving the reliability of spectrum sensing. Moreover, compared to AIC, the proposed algorithm clearly shows better performance, especially at the band edges of the interferer signal. PMID:27897992

  8. The PRISMA hyperspectral imaging spectrometer: detectors and front-end electronics

    NASA Astrophysics Data System (ADS)

    Camerini, Massimo; Mancini, Mauro; Fossati, Enrico; Battazza, Fabrizio; Formaro, Roberto

    2013-10-01

    Two detectors, SWIR and VNIR, and relevant front-end electronics were developed in the frame of the PRISMA(Precursore Iperspettrale della Missione Applicativa) project, an hyperspectral instrument for the earth observation. The two detectors were of the MCT type and, in particular, the VNIR was realized by Sofradir by using the CZT(Cadmium Zinc Telluride substrate of the PV diodes) substrate removal to obtain the sensitivity in the visible spectral range. The use of the same ROIC permitted to design an unique front-end electronics. Two test campaigns were carried out: by Sofradir, only on the detectors, and by Selex ES, by using the PRISMA flight electronics. This latter tests demonstrated that was possible to obtain the same detector performance, with respect of those ones obtained by a ground setup, with a flight hardware in terms of noise, linearity and thermal stability.

  9. Microwave integrated circuit radiometer front-ends for the Push Broom Microwave Radiometer

    NASA Technical Reports Server (NTRS)

    Harrington, R. F.; Hearn, C. P.

    1982-01-01

    Microwave integrated circuit front-ends for the L-band, S-band and C-band stepped frequency null-balanced noise-injection Dicke-switched radiometer to be installed in the NASA Langley airborne prototype Push Broom Microwave Radiometer (PBMR) are described. These front-ends were developed for the fixed frequency of 1.413 GHz and the variable frequencies of 1.8-2.8 GHz and 3.8-5.8 GHz. Measurements of the noise temperature of these units were made at 55.8 C, and the results of these tests are given. While the overall performance was reasonable, improvements need to be made in circuit losses and noise temperatures, which in the case of the C-band were from 1000 to 1850 K instead of the 500 K specified. Further development of the prototypes is underway to improve performance and extend the frequency range.

  10. Development and Demonstration of a Magnesium-Intensive Vehicle Front-End Substructure

    SciTech Connect

    Logan, Stephen D.; Forsmark, Joy H.; Osborne, Richard

    2016-07-01

    This project is the final phase (designated Phase III) of an extensive, nine-year effort with the objectives of developing a knowledge base and enabling technologies for the design, fabrication and performance evaluation of magnesium-intensive automotive front-end substructures intended to partially or completely replace all-steel comparators, providing a weight savings approaching 50% of the baseline. Benefits of extensive vehicle weight reduction in terms of fuel economy increase, extended vehicle range, vehicle performance and commensurate reductions in greenhouse gas emissions are well known. An exemplary vehicle substructure considered by the project is illustrated in Figure 1, along with the exterior vehicle appearance. This unibody front-end “substructure” is one physical objective of the ultimate design and engineering aspects established at the outset of the larger collective effort.

  11. Very Low-Power Consumption Analog Pulse Processing ASIC for Semiconductor Radiation Detectors

    SciTech Connect

    Wessendorf, K.O.; Lund, J.C.; Brunett, B.A.; Laguna, G.R.; Clements, J.W.

    1999-08-23

    We describe a very-low power consumption circuit for processing the pulses from a semiconductor radiation detector. The circuit was designed for use with a cadmium zinc telluride (CZT) detector for unattended monitoring of stored nuclear materials. The device is intended to be battery powered and operate at low duty-cycles over a long period of time. This system will provide adequate performance for medium resolution gamma-ray pulse-height spectroscopy applications. The circuit incorporates the functions of a charge sensitive preamplifier, shaping amplifier, and peak sample and hold circuit. An application specific integrated circuit (ASIC) version of the design has been designed, built and tested. With the exception of the input field effect transistor (FET), the circuit is constructed using bipolar components. In this paper the design philosophy and measured performance characteristics of the circuit are described.

  12. Scalable Sensor Data Processor: A Multi-Core Payload Data Processor ASIC

    NASA Astrophysics Data System (ADS)

    Berrojo, L.; Moreno, R.; Regada, R.; Garcia, E.; Trautner, R.; Rauwerda, G.; Sunesen, K.; He, Y.; Redant, S.; Thys, G.; Andersson, J.; Habinc, S.

    2015-09-01

    The Scalable Sensor Data Processor (SSDP) project, under ESA contract and with TAS-E as prime contractor, targets the development of a multi-core ASIC for payload data processing to be used, among other terrestrial and space application areas, in future scientific and exploration missions with harsh radiation environments. The SSDP is a mixed-signal heterogeneous multi-core System-on-Chip (SoC). It combines GPP and NoC-based DSP subsystems with on-chip ADCs and several standard space I/Fs to make a flexible, configurable and scalable device. The NoC comprises two state-of-the-art fixed point Xentium® DSP processors, providing the device with high data processing capabilities.

  13. Capturing a failure of an ASIC in-situ, using infrared radiometry and image processing software

    NASA Technical Reports Server (NTRS)

    Ruiz, Ronald P.

    2003-01-01

    Failures in electronic devices can sometimes be tricky to locate-especially if they are buried inside radiation-shielded containers designed to work in outer space. Such was the case with a malfunctioning ASIC (Application Specific Integrated Circuit) that was drawing excessive power at a specific temperature during temperature cycle testing. To analyze the failure, infrared radiometry (thermography) was used in combination with image processing software to locate precisely where the power was being dissipated at the moment the failure took place. The IR imaging software was used to make the image of the target and background, appear as unity. As testing proceeded and the failure mode was reached, temperature changes revealed the precise location of the fault. The results gave the design engineers the information they needed to fix the problem. This paper describes the techniques and equipment used to accomplish this failure analysis.

  14. Characterization of the first prototype of the ALICE SAMPA ASIC for LHC Run 3 and beyond

    NASA Astrophysics Data System (ADS)

    Tambave, G.; Engeseth, K. P.; Velure, A.

    2017-03-01

    A Large Ion Collider Experiment (ALICE) at the Large Hadron Collider (LHC) is planing to upgrade its Time Projection Chamber (TPC) due to the expected higher Pb-Pb collision-rates in the next running period (Run 3) of the LHC starting in 2020. In the upgraded TPC, Gas Electron Multiplier (GEM) chambers and continuous readout system will replace Multi-Wire Proportional (MWP) chambers and conventional triggered readout. In the continuous readout, GEM signals will be processed using a 32 channel SAMPA ASIC. The first version of the SAMPA (MPW1) was delivered in 2014 and the production of final version is in progress. In this paper, the test results obtained for charge injection to the device using pulse generator as well as GEM detector prototype are reported.

  15. The next generation Front-End Controller for the Phase-I Upgrade of the CMS Hadron Calorimeters

    NASA Astrophysics Data System (ADS)

    Costanza, F.; Behrens, U.; Campbell, A.; Karakaya, T.; Martens, I.; Melzer-Pellmann, I. A.; Sahin, M. O.

    2017-03-01

    The next generation Front-End Controller (ngFEC) is the system responsible for slow and fast control within the Phase-I Upgrade of the CMS Hadron Calorimeters. It is based on the FC7, a μTCA compatible Advanced Mezzanine Card developed at CERN and built around the Xilinx Kintex®-7 FPGA. The ngFEC decodes the 40.0788 MHz LHC clock and the synchronization signals received from the backplane and distributes them to the front-end electronics through six GBT links. The latency of the fast control signals is fixed across power cycles. Even if the direct link to a front-end module is broken, a redundancy scheme ensures a successful communication using the link to the neighboring front-end module. Thanks to the ngFEC all front-end modules can be remotely programmed using the JTAG standard protocol. The CCM server software interfaces the ngFEC to the Detector Control System which constantly monitors voltages and temperatures on the front-end electronics. This document reviews the characteristics and the development status of the ngFEC.

  16. Digital front-end electronics for a tagged neutron inspection system

    SciTech Connect

    Cester, D.; Stevanato, L.; Viesti, G.; Nebbia, G.

    2013-04-19

    In this paper, we shall present a simple VME front-end system that employs the FADC CAEN V1720 8- channel 12-bit 250-MS/s digitizer. This system produces coincidence spectra between the trigger particle and other detectors and it replaces the traditional technique of chaining analog electronics. Tests have been performed using a pulser working at different frequencies as well as employing a {sup 252}Cf source in concert with an array of detectors.

  17. Characterization of HAWAII-2RG detector and SIDECAR ASIC for the Euclid mission at ESA

    NASA Astrophysics Data System (ADS)

    Crouzet, P.-E.; ter Haar, J.; de Wit, F.; Beaufort, T.; Butler, B.; Smit, H.; van der Luijt, C.; Martin, D.

    2012-07-01

    In the frame work of the European Space Agency's Cosmic Vision program, the Euclid mission has the objective to map the geometry of the Dark Universe. Galaxies and clusters of galaxies will be observed in the visible and near-infrared wavelengths by an imaging and spectroscopic channel. For the Near Infrared Spectrometer instrument (NISP), the state-of-the-art HAWAII-2RG detectors will be used, associated with the SIDECAR ASIC readout electronic which will perform the image frame acquisitions. To characterize and validate the performance of these detectors, a test bench has been designed, tested and validated. This publication will present preliminary measurements on dark current, read noise, conversion gain and power consumption, In summary, the following results have been obtained in our system: dark current of 0.014 e-/s/pixel at 82K; readout noise of 23 e- for a single CDS pair and 5.4e- for a Fowler(32); a total electric power consumption of 203 mW in LVDS (excluding I/O power) mode. The SIDECAR ASIC has also been characterized separately at room temperature. Two references voltages, VPreAmpRef1 and VrefMain, used to adjust the offset of the pre-amp DAC has been studied. The reset voltage, Vreset, was measured to have a root mean square stability of 22μV over 15 minutes and a root mean square stability value of 24μV over a 15 hours measurement period. An offset between set value and measured value of around 60mV for low set voltages has been noticed. The behavior of VPreAmpRef1 and VrefMain with a adjustable external input voltage has been conducted in order to tune these two biases to cover the desired input range with the best linearity.

  18. Science Enabling ASICs and FEEs for the JUICE and JEO Missions

    NASA Technical Reports Server (NTRS)

    Paschalidis, Nicholas; Sittler, Ed; Cooper, John; Christian, Eric; Moore, Tom

    2011-01-01

    A family of science enabling radiation hard Application Specific Integrated Circuits (ASICs), Front End Electronics (FEEs) and Event Processing Systems, with flight heritage on many NASA missions, is presented. These technologies play an important role in the miniaturization of instruments -and spacecraft systems- at the same time increasing performance and reducing power. The technologies target time of flight, position sensing, and energy measurements as well as standard housekeeping and telemetry functions for particle and fields instruments, but find applications in other instrument categories too. More specifically the technologies include: the TOF chip, 1D and 2D Delay Lines with MCP detectors, for high precision fast and low power time of flight and position sensing; the Energy chip for multichannel SSD readout with time over threshold and standard voltage read out for TDC and ADC digitization; Fast multi channel read out chip with commandable thresholds; the TRIO chip for multiplexed ADC and housekeeping etc. It should be mentioned that the ASICs include basic trigger capabilities to enable random event processing in a heavy background of penetrators and UV foreground. Typical instruments include time of flight versus energy and look angle particle analyzers such as: plasma composition, energetic particle, neutral atom imaging as well as fast plasma and deltaE/E ion/electron telescopes. Flight missions include: Cassini/LEMMS, IMAGE/HENA, MESSENGER/EPPS/MLA/X-ray/MLA, STEREO, PLUTO-NH/PEPSSI/LORI, IBEX-Lo, JUNO/JEDI, RBSP/RBSPICE, MMS/HPCA/EPD, SO/SIS. Given the proven capability on heavy radiation missions such as JUNO, MMS and RBSB, as well diverse long duration missions such as MESSENGER, PLUTO and Cassini, it is expected that these technologies will play an important role in the particle and fields (at least) instruments on the upcoming JUICE and JEO missions.

  19. Design methodology: edgeless 3D ASICs with complex in-pixel processing for pixel detectors

    SciTech Connect

    Fahim Farah, Fahim Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman

    2015-08-28

    The design methodology for the development of 3D integrated edgeless pixel detectors with in-pixel processing using Electronic Design Automation (EDA) tools is presented. A large area 3 tier 3D detector with one sensor layer and two ASIC layers containing one analog and one digital tier, is built for x-ray photon time of arrival measurement and imaging. A full custom analog pixel is 65μm x 65μm. It is connected to a sensor pixel of the same size on one side, and on the other side it has approximately 40 connections to the digital pixel. A 32 x 32 edgeless array without any peripheral functional blocks constitutes a sub-chip. The sub-chip is an indivisible unit, which is further arranged in a 6 x 6 array to create the entire 1.248cm x 1.248cm ASIC. Each chip has 720 bump-bond I/O connections, on the back of the digital tier to the ceramic PCB. All the analog tier power and biasing is conveyed through the digital tier from the PCB. The assembly has no peripheral functional blocks, and hence the active area extends to the edge of the detector. This was achieved by using a few flavors of almost identical analog pixels (minimal variation in layout) to allow for peripheral biasing blocks to be placed within pixels. The 1024 pixels within a digital sub-chip array have a variety of full custom, semi-custom and automated timing driven functional blocks placed together. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout. The methodology uses the Cadence design platform, however it is not limited to this tool.

  20. Wireless miniature implantable devices and ASICs for monitoring, treatment, and study of glaucoma and cardiac disease

    NASA Astrophysics Data System (ADS)

    Chow, Eric Y.

    Glaucoma affects about 65 million people and is the second leading cause of blindness in the world. Although the condition is irreversible and incurable, early detection is vital to slowing and even stopping the progression of the disease. Our work focuses on the design, fabrication, and assembly of a continuous active glaucoma intraocular pressure (IOP) monitor that provides clinicians with the necessary data to more accurately diagnose and treat patients. Major benefits of an active monitoring device include the potential to develop a closed-loop treatment system and to operate independently for extended periods of time. The fully wireless operation uses gigahertzfrequency electromagnetic wave propagation, which allows for an orientation independent transfer of power and data over reasonable distances. Our system is comprised of a MEMS capacitive sensor, capacitive power storage array, ASIC, and monopole antenna assembled into a biocompatible liquid crystal polymer (LCP) package. We have performed in vivo trials on rabbits, both chronic and acute, to validate system functionality, fully wireless feasibility, and biocompatibility. Heart failure (HF) affects approximately 2% of the adult population in developed countries and 6-10% of people over the age of 65. Continuous monitoring of blood pressure, flow, and chemistry from a minimally invasive device can serve as a diagnostic and early-warning system for cardiac health. We developed a miniaturized system attached to the outer surface of an FDA approved stent, used as both the antenna for wireless telemetry/powering and structural support. The system comprises of a MEMS pressure sensor, ASIC for the sensor interface and wireless capabilities, LCP substrate, and FDA approved stent. In vivo studies on pigs validated functionality and fully wireless operation and demonstrate the feasibility of a stent-based wireless implant for continuous monitoring of blood pressure as well as other parameters including oxygen, flow

  1. Intelligent front-end sample preparation tool using acoustic streaming.

    SciTech Connect

    Cooley, Erika J.; McClain, Jaime L.; Murton, Jaclyn K.; Edwards, Thayne L.; Achyuthan, Komandoor E.; Branch, Darren W.; Clem, Paul Gilbert; Anderson, John Mueller; James, Conrad D.; Smith, Gennifer; Kotulski, Joseph Daniel

    2009-09-01

    We have successfully developed a nucleic acid extraction system based on a microacoustic lysis array coupled to an integrated nucleic acid extraction system all on a single cartridge. The microacoustic lysing array is based on 36{sup o} Y cut lithium niobate, which couples bulk acoustic waves (BAW) into the microchannels. The microchannels were fabricated using Mylar laminates and fused silica to form acoustic-fluidic interface cartridges. The transducer array consists of four active elements directed for cell lysis and one optional BAW element for mixing on the cartridge. The lysis system was modeled using one dimensional (1D) transmission line and two dimensional (2D) FEM models. For input powers required to lyse cells, the flow rate dictated the temperature change across the lysing region. From the computational models, a flow rate of 10 {micro}L/min produced a temperature rise of 23.2 C and only 6.7 C when flowing at 60 {micro}L/min. The measured temperature changes were 5 C less than the model. The computational models also permitted optimization of the acoustic coupling to the microchannel region and revealed the potential impact of thermal effects if not controlled. Using E. coli, we achieved a lysing efficacy of 49.9 {+-} 29.92 % based on a cell viability assay with a 757.2 % increase in ATP release within 20 seconds of acoustic exposure. A bench-top lysing system required 15-20 minutes operating up to 58 Watts to achieve the same level of cell lysis. We demonstrate that active mixing on the cartridge was critical to maximize binding and release of nucleic acid to the magnetic beads. Using a sol-gel silica bead matrix filled microchannel the extraction efficacy was 40%. The cartridge based magnetic bead system had an extraction efficiency of 19.2%. For an electric field based method that used Nafion films, a nucleic acid extraction efficiency of 66.3 % was achieved at 6 volts DC. For the flow rates we tested (10-50 {micro}L/min), the nucleic acid extraction

  2. Performance of the NA62 LAV front-end electronics

    NASA Astrophysics Data System (ADS)

    Antonelli, A.; Corradi, G.; Gonnella, F.; Moulson, M.; Paglia, C.; Raggi, M.; Spadaro, T.; Tagnani, D.; Ambrosino, F.; Di Filippo, D.; Massarotti, P.; Napolitano, M.; Costantini, F.; Fantechi, R.; Mannelli, I.; Raffaelli, F.; Leonardi, E.; Palladino, V.; Valente, P.

    2013-01-01

    The NA62 experiment [1] will measure the BR(K+→π+νbar nu) to within about 10%. To reject the dominant background from final state photons, the large-angle vetoes (LAVs) must detect particles with better than 1 ns time resolution and 10% energy resolution over a very large energy range. A low threshold, large dynamic range, Time-over-threshold based solution has been developed for the LAV front end electronics. Our custom 32 channel 9U board uses a pair of low threshold discriminators for each channel to produce LVDS logic signals. The achieved time resolution obtained in laboratory, coupled to an HPTDC based readout board, is ~ 150 ps.

  3. The Front-End System For MARE In Milano

    NASA Astrophysics Data System (ADS)

    Arnaboldi, Claudio; Pessina, Gianluigi

    2009-12-01

    The first phase of MARE consists of 72 μ-bolometers composed each of a crystal of AgReO4 readout by Si thermistors. The spread in the thermistor characteristics and bolometer thermal coupling leads to different energy conversion gains and optimum operating points of the detectors. Detector biasing levels and voltage gains are completely remote-adjustable by the front end system developed, the subject of this paper, achieving the same signal range at the input of the DAQ system. The front end consists of a cold buffer stage, a second pseudo differential stage followed by a gain stage, an antialiasing filter, and a battery powered detector biasing set up. The DAQ system can be used to set all necessary parameters of the electronics remotely, by writing to a μ-controller located on each board. Fiber optics are used for the serial communication between the DAQ and the front end. To suppress interference noise during normal operation, the clocked devices of the front end are maintained in sleep-mode, except during the set-up phase of the experiment. An automatic DC detector characterization procedure is used to establish the optimum operating point of every detector of the array. A very low noise level has been achieved: about 3nV/□Hz at 1 Hz and 1 nV/□Hz for the white component, high frequencies.

  4. Characterization of a front-end electronics for the monitoring and control of hadrontherapy beams

    NASA Astrophysics Data System (ADS)

    La Rosa, A.; Donetti, M.; Borri, M.; Rivero, F.; Attili, A.; Bourhaleb, F.; Cirio, R.; Garella, M. A.; Giordanengo, S.; Givehchi, N.; Mazza, G.; Marchetto, F.; Pardo, J.; Pecka, A.; Peroni, C.

    2008-02-01

    An integrated 64-channel device for the read-out of parallel plate pixel and strip ionization detectors has been developed by the INFN and University of Torino. The detectors will be used for the monitoring and control of hadrontherapy beams. The ASIC has been designed in CMOS 0.8 μm technology and it is based on a current-to-frequency converter followed by a synchronous counter. In this paper, we present a detailed characterization of the device done with 113 chips.

  5. Multipurpose Test Structures and Process Characterization using 0.13 μm CMOS: The CHAMP ASIC

    NASA Astrophysics Data System (ADS)

    Cooney, Michael; Andrew, Matt; Nishimura, Kurtis; Ruckman, Larry; Varner, Gary; Grabas, Hervé; Oberla, Eric; Genat, Jean-Francois; Large Area Picosecond Photodetector Collaboration

    The University of Hawaii (UH) in collaboration with the University of Chicago (UC) submitted a test Application Specific Integrated Circuit (ASIC), the Chicago-Hawaii ASIC MultiPurpose (CHAMP), composed of a number of discrete test elements in a 0.13 μm CMOS process. This paper describes the structures submitted by UH and UC. Hawaii designs include high speed flip-flops, voltage controlled ring oscillators and delay lines, an Low Voltage Differential Signal (LVDS) receiver, a set of four 64-cell waveform samplers with shared input, an analog storage and comparator structure, as well as a 12-bit Digital to Analog Converter (DAC). The Chicago designs include voltage controlled delay lines, delay locked loops, voltage controlled ring oscillators, transmission lines, and resistors. Each of the structures will be described, with simulation and test results presented.

  6. Development of New European VLIW Space DSP ASICS, IP Cores and Related Software via ESA Contracts in 2015 and Beyond

    NASA Astrophysics Data System (ADS)

    Trautner, R.

    2015-09-01

    European space industry needs a new generation of payload data processors in order to cope with in-creasing payload data processing requirements. ESA has defined a roadmap for the development of future payload processor hardware which is being implemented. A key part of this roadmap addresses the development of VLIW Digital Signal Processor (DSP) ASICs, IP cores and associated software. In this paper, we first present an overview of the ESA roadmap and the key development routes. We recapitulate the activities that have created the technology base for the ongoing DSP development, and present the ASIC development and several accompanying activities that will lead to the availability of a new space qualified DSP - the Scalable Sensor Data Processor (SSDP) - in the near future. We then present the expected future evolution of this technology area, and summarize the corresponding ESA roadmap part on VLIW DSPs and related IP and software.

  7. Design of Microwave Front-End Narrowband Filter and Limiter Components

    NASA Astrophysics Data System (ADS)

    Cross, Lee W.

    This dissertation proposes three novel bandpass filter structures to protect systems exposed to damaging levels of electromagnetic (EM) radiation from intentional and unintentional high-power microwave (HPM) sources. This is of interest because many commercial microwave communications and sensor systems are unprotected from high power levels. Novel technologies to harden front-end components must maintain existing system performance and cost. The proposed concepts all use low-cost printed circuit board (PCB) fabrication to create compact solutions that support high integration. The first proposed filter achieves size reduction of 46% using a technology that is suitable for low-loss, narrowband filters that can handle high power levels. This is accomplished by reducing a substrate-integrated waveguide (SIW) loaded evanescent-mode bandpass filter to a half-mode SIW (HMSIW) structure. Demonstrated third-order SIW and HMSIW filters have 1.7 GHz center frequency and 0.2 GHz bandwidth. Simulation and measurements of the filters utilizing combline resonators prove the underlying principles. The second proposed device combines a traditional microstrip bent hairpin filter with encapsulated gas plasma elements to create a filter-limiter: a novel narrowband filter with integral HPM limiter behavior. An equivalent circuit model is presented for the ac coupled plasma-shell components used in this dissertation, and parameter values were extracted from measured results and EM simulation. The theory of operation of the proposed filter-limiter was experimentally validated and key predictions were demonstrated including two modes of operation in the on state: a constant output power mode and constant attenuation mode at high power. A third-order filter-limiter with center frequency of 870 MHz was demonstrated. It operates passively from incident microwave energy, and can be primed with an external voltage source to reduce both limiter turn-on threshold power and output power

  8. A Radiation Hard Multi-Channel Digitizer ASIC for Operation in the Harsh Jovian Environment

    NASA Technical Reports Server (NTRS)

    Aslam, Shahid; Aslam, S.; Akturk, A.; Quilligan, G.

    2011-01-01

    ultimately impact the surface of Europa after the mission is completed. The current JEO mission concept includes a range of instruments on the payload, to monitor dynamic phenomena (such as Io's volcanoes and Jupiters atmosphere), map the Jovian magnetosphere and its interactions with the Galilean satellites, and characterize water oceans beneath the ice shells of Europa and Ganymede. The payload includes a low mass (3.7 Kg) and low power (< 5 W) Thermal Instrument (TI) concept for measuring possible warm thermal anomalies on Europa s cold surface caused by recent (< 10,000 years) eruptive activity. Regions of anomalously high heat flow will be identified by thermal mapping using a nadir pointing, push-broom filter radiometer that provides far-IR imagery in two broad band spectral wavelength regions, 8-20 m and 20-100 m, for surface temperature measurements with better than a 2 K accuracy and a spatial resolution of 250 m/pixel obtained from a 100 Km orbit. The temperature accuracy permits a search for elevated temperatures when combined with albedo information. The spatial resolution is sufficient to resolve Europa's larger cracks and ridge axial valleys. In order to accomplish the thermal mapping, the TI uses sensitive thermopile arrays that are readout by a custom designed low-noise Multi-Channel Digitizer (MCD) ASIC that resides very close to the thermopile linear array outputs. Both the thermopile array and the MCD ASIC will need to show full functionality within the harsh Jovian radiation environment, operating at cryogenic temperatures, typically 150 K to 170 K. In the following, a radiation mitigation strategy together with a low risk Radiation-Hardened-By-Design (RHBD) methodology using commercial foundry processes is given for the design and manufacture of a MCD ASIC that will meet this challenge.

  9. Results of radiation test of the cathode front-end board for CMS endcap muon chambers

    NASA Astrophysics Data System (ADS)

    Breedon, R.; Bylsma, B.; Durkin, L. S.; Gilmore, J.; Gu, J.; Hauser, J.; Holbrook, B.; Kim, C. L.; Ling, T. Y.; von der Mey, M.; Murray, P.; Rush, C. J.; Santiard, J. C.; Tripathi, M.

    2001-10-01

    After a brief overview of the CMS EMU electronics system, results on radiation induced single event effects, total ionization dose and displacement effects will be reported. These results are obtained by irradiating the components on electronics boards with 63 MeV protons and 1 MeV neutrons. During the proton irradiation, the electronics board was fully under power, all components on the board were active and the data were read out in the same way as designed for CMS. No deterioration of analog performance for each of the three CMOS ASICs on the tested board was observed, up to a dose of 10 krad. Each of the tested FPGAs survived beyond the dose of 30 krad. No single event latch-up was detected for the CMOS ASICs up to a proton fluence of 2×10 12 cm-2. Single Event Upsets (SEU) in FPGAs were detected and their cross-sections measured. SEU mitigation with triple module redundancy and voting was implemented and tested.

  10. Feed array metrology and correction layer for large antenna systems in ASIC mixed signal technology

    NASA Astrophysics Data System (ADS)

    Centureli, F.; Scotti, G.; Tommasino, P.; Trifiletti, A.; Romano, F.; Cimmino, R.; Saitto, A.

    2014-08-01

    The paper deals with a possible use of the feed array present in a large antenna system, as a layer for measuring the antenna performance with a self-test procedure and a possible way to correct residual errors of the Antenna geometry and of the antenna distortions. Focus has been concentrated on a few key critical elements of a possible feed array metrology program. In particular, a preliminary contribution to the design and development of the feed array from one side, and the subsystem dedicated to antenna distortion monitoring and control from the other, have been chosen as the first areas of investigation. Scalability and flexibility principles and synergic approach with other coexistent technologies have been assumed of paramount importance to ensure ease of integrated operation and therefore allowing in principle increased performance and efficiency. The concept is based on the use of an existing feed array grid to measure antenna distortion with respect to the nominal configuration. Measured data are then processed to develop a multilayer strategy to control the mechanical movable devices (when existing) and to adjust the residual fine errors through a software controlled phase adjustment of the existing phase shifter The signal from the feed array is converted passing through a FPGA/ASIC level to digital data channels. The kind of those typically used for the scientific experiments. One additional channel is used for monitoring the antenna distortion status. These data are processed to define the best correction strategy, based on a software managed control system capable of operating at three different levels of the antenna system: reflector rotation layer, sub reflector rotation and translation layer (assuming the possibility of controlling a Stewart machine), phase shifter of the phased array layer. The project is at present in the design phase, a few elements necessary for a sound software design of the control subsystem have been developed at a

  11. Development of a CdTe pixel detector with a window comparator ASIC for high energy X-ray applications

    NASA Astrophysics Data System (ADS)

    Hirono, T.; Toyokawa, H.; Furukawa, Y.; Honma, T.; Ikeda, H.; Kawase, M.; Koganezawa, T.; Ohata, T.; Sato, M.; Sato, G.; Takagaki, M.; Takahashi, T.; Watanabe, S.

    2011-09-01

    We have developed a photon-counting-type CdTe pixel detector (SP8-01). SP8-01 was designed as a prototype of a high-energy X-ray imaging detector for experiments using synchrotron radiation. SP8-01 has a CdTe sensor of 500 μm thickness, which has an absorption efficiency of almost 100% up to 50 keV and 45% even at 100 keV. A full-custom application specific integrated circuit (ASIC) was designed as a readout circuit of SP8-01, which is equipped with a window-type discriminator. The upper discriminator realizes a low-background measurement, because X-ray beams from the monochromator contain higher-order components beside the fundamental X-rays in general. ASIC chips were fabricated with a TSMC 0.25 μm CMOS process, and CdTe sensors were bump-bonded to the ASIC chips by a gold-stud bonding technique. Beam tests were performed at SPring-8. SP8-01 detected X-rays up to 120 keV. The capability of SP8-01 as an imaging detector for high-energy X-ray synchrotron radiation was evaluated with its performance characteristics.

  12. Test systems of the STS-XYTER2 ASIC: from wafer-level to in-system verification

    NASA Astrophysics Data System (ADS)

    Kasinski, Krzysztof; Zubrzycka, Weronika

    2016-09-01

    The STS/MUCH-XYTER2 ASIC is a full-size prototype chip for the Silicon Tracking System (STS) and Muon Chamber (MUCH) detectors in the new fixed-target experiment Compressed Baryonic Matter (CBM) at FAIR-center, Darmstadt, Germany. The STS assembly includes more than 14000 ASICs. The complicated, time-consuming, multi-step assembly process of the detector building blocks and tight quality assurance requirements impose several intermediate testing to be performed for verifying crucial assembly steps (e.g. custom microcable tab-bonding before wire-bonding to the PCB) and - if necessary - identifying channels or modules for rework. The chip supports the multi-level testing with different probing / contact methods (wafer probe-card, pogo-probes, in-system tests). A huge number of ASICs to be tested restricts the number and kind of tests possible to be performed within a reasonable time. The proposed architectures of test stand equipment and a brief summary of methodologies are presented in this paper.

  13. Cognitive Cellular Systems: A New Challenge on the RF Analog Frontend

    NASA Astrophysics Data System (ADS)

    Varga, Gabor; Schrey, Moritz; Subbiah, Iyappan; Ashok, Arun; Heinen, Stefan

    2016-07-01

    Cognitive Cellular Systems are seen today as one of the most promising ways of moving forward solving or at least easing the still worsening situation of congested spectrum caused by the growing number of users and the expectation of higher data transfer rates. As the intelligence of a Cognitive Radio system is located in the digital domain - the Cognitive Engine and associated layers - extensive research has been ongoing in that domain since Mitola published his idea in 1999. Since, a big progress has been made in the domain of architectures and algorithms making systems more efficient and highly flexible. The pace of this progress, however, is going to be impeded by hard requirements on the received and transmitted signal quality, introducing ultimate challenges on the performance of the RF analog frontend, such as in-band local oscillator harmonics, ultra low sensitivity and ultra high linearity. The RF frontend is thus likely to become the limiting technical factor in the true realization of a Cognitive Cellular System. Based on short recapitulations of the most crucial issues in RF analog design for Cognitive Systems, this article will point out why those mechanisms become responsible for the limitation of the overall performance particularly in a broadband Cognitive Cellular System. Furthermore, as part of a possible solution to ease the situation, system design of a high intermediate frequency (IF) to UHF frequency converter for cognitive radios is discussed and the performance of such a converter analyzed as a proof of concept. In addition to successfully tackling some of the challenges, such a high-IF converter enables white space operation for existing commercial devices by acting as frequency converter. From detailed measurements, the capabilities in both physical layer and application layer performance of a high-IF frontend developed out of off-the-shelf components is explained and is shown to provide negligible degradation to the commercial device

  14. A miniaturized HTS microwave receiver front-end subsystem for radar and communication applications

    NASA Astrophysics Data System (ADS)

    Bian, Yongbo; Guo, Jin; Gao, Changzheng; Li, Chunguang; Li, Hong; Wang, Jia; Cui, Bin; He, Xiaofeng; Li, Chao; Li, Na; Li, Guoqiang; Zhang, Qiang; Zhang, Xueqiang; Meng, Jibao; He, Yusheng

    2010-08-01

    This paper presents a miniaturized high performance high temperature superconducting (HTS) microwave receiver front-end subsystem, which uses a mini stirling cryocooler to cool a high selective HTS filter and a low noise amplifier (LNA). The HTS filter was miniaturized by using specially designed compact resonators and fabricating with double-sided YBCO films on LAO substrate which has a relatively high permittivity. The LNA was specially designed to work at cryogenic temperature with noise figure of 0.27 dB at 71 K. The mini cryocooler, which is widely used in infrared detectors, has a smaller size (60 mm × 80 mm × 100 mm) and a lighter weight (340 g) than the stirling cryocoolers commonly used in other HTS filter subsystem. The whole front-end subsystem, including a HTS filter, a LNA, a cryocooler and the vacuum chamber, has a size of only φ120 mm × 175 mm and a weight of only 3.3 kg. The microwave devices inside the subsystem are working at 71.8 K with a consumed cooling power of 0.325 W. The center frequency of this subsystem is 925.2 MHz and the bandwidth is 2.7 MHz (which is a fractional bandwidth of 0.2%), with the gain of 19.75 dB at center frequency and the return loss better than -18.11 dB in the pass band. The stop band rejection is more than 60 dB and the skirt slope is exceeding 120 dB MHz -1. The noise figure of this subsystem is less than 0.8 dB. This front-end subsystem can be used in radars and communication systems conveniently due to it’s compact size and light weight.

  15. Development of ATLAS Liquid Argon Calorimeter front-end electronics for the HL-LHC

    NASA Astrophysics Data System (ADS)

    Liu, T.

    2017-01-01

    The high-luminosity phase of the Large Hadron Collider will provide 5–7 times greater luminosities than assumed in the original detector design. An improved trigger system requires an upgrade of the readout electronics of the ATLAS Liquid Argon Calorimeter. Concepts for the future readout of the 182,500 calorimeter cells at 40–80 MHz and 16-bit dynamic range and the developments of radiation-tolerant, low-noise, low-power, and high-bandwidth front-end electronic components, including preamplifiers and shapers, 14-bit ADCs, and 10-Gb/s laser diode array drivers, are presented in this paper.

  16. THz semiconductor-based front-end receiver technology for space applications

    NASA Technical Reports Server (NTRS)

    Mehdi, Imran; Siegel, Peter

    2004-01-01

    Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.

  17. Characterization of front-end electronics for CZT based handheld radioisotope identifier

    NASA Astrophysics Data System (ADS)

    Lombigit, L.; Rahman, Nur Aira Abd; Mohamad, Glam Hadzir Patai; Ibrahim, Maslina Mohd; Yussup, Nolida; Yazid, Khairiah; Jaafar, Zainudin

    2016-01-01

    A radioisotope identifier device based on large volume Co-planar grid CZT detector is current under development at Malaysian Nuclear Agency. This device is planned to be used for in-situ identification of radioisotopes based on their unique energies. This work reports on electronics testing performed on the front-end electronics (FEE) analog section comprising charge sensitive preamplifier-pulse shaping amplifier chain. This test involves measurement of charge sensitivity, pulse parameters and electronics noise. This report also present some preliminary results on the spectral measurement obtained from gamma emitting radioisotopes.

  18. Characterization of front-end electronics for CZT based handheld radioisotope identifier

    SciTech Connect

    Lombigit, L.; Rahman, Nur Aira Abd; Mohamad, Glam Hadzir Patai; Ibrahim, Maslina Mohd; Yussup, Nolida; Yazid, Khairiah; Jaafar, Zainudin

    2016-01-22

    A radioisotope identifier device based on large volume Co-planar grid CZT detector is current under development at Malaysian Nuclear Agency. This device is planned to be used for in-situ identification of radioisotopes based on their unique energies. This work reports on electronics testing performed on the front-end electronics (FEE) analog section comprising charge sensitive preamplifier-pulse shaping amplifier chain. This test involves measurement of charge sensitivity, pulse parameters and electronics noise. This report also present some preliminary results on the spectral measurement obtained from gamma emitting radioisotopes.

  19. Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation

    NASA Astrophysics Data System (ADS)

    Schmatz, M. L.; Jongerius, R.; Dittmann, G.; Anghel, A.; Engbersen, T.; van Lunteren, J.; Buchmann, P.

    2014-05-01

    The Square Kilometre Array (SKA) is a future radio telescope, currently being designed by the worldwide radio-astronomy community. During the first of two construction phases, more than 250,000 antennas will be deployed, clustered in aperture-array stations. The antennas will generate 2.5 Pb/s of data, which needs to be processed in real time. For the processing stages from A/D conversion to central correlation, we propose an ASIC solution using only three chip architectures. The architecture is scalable - additional chips support additional antennas or beams - and versatile - it can relocate its receiver band within a range of a few MHz up to 4GHz. This flexibility makes it applicable to both SKA phases 1 and 2. The proposed chips implement an antenna and station processor for 289 antennas with a power consumption on the order of 600W and a correlator, including corner turn, for 911 stations on the order of 90 kW.

  20. Circuit design and simulation of a transmit beamforming ASIC for high-frequency ultrasonic imaging systems.

    PubMed

    Athanasopoulos, Georgios I; Carey, Stephen J; Hatfield, John V

    2011-07-01

    This paper describes the design of a programmable transmit beamformer application-specific integrated circuit (ASIC) with 8 channels for ultrasound imaging systems. The system uses a 20-MHz reference clock. A digital delay-locked loop (DLL) was designed with 50 variable delay elements, each of which provides a clock with different phase from a single reference. Two phase detectors compare the phase difference of the reference clock with the feedback clock, adjusting the delay of the delay elements to bring the feedback clock signal in phase with the reference clock signal. Two independent control voltages for the delay elements ensure that the mark space ratio of the pulses remain at 50%. By combining a 10- bit asynchronous counter with the delays from the DLL, each channel can be programmed to give a maximum time delay of 51 μs with 1 ns resolution. It can also give bursts of up to 64 pulses. Finally, for a single pulse, it can adjust the pulse width between 9 ns and 100 ns by controlling the current flowing through a capacitor in a one-shot circuit, for use with 40-MHz and 5-MHz transducers, respectively.

  1. Bile acids potentiate proton-activated currents in Xenopus laevis oocytes expressing human acid-sensing ion channel (ASIC1a).

    PubMed

    Ilyaskin, Alexandr V; Diakov, Alexei; Korbmacher, Christoph; Haerteis, Silke

    2017-02-01

    Acid-sensing ion channels (ASICs) are nonvoltage-gated sodium channels transiently activated by extracellular protons and belong to the epithelial sodium channel (ENaC)/Degenerin (DEG) family of ion channels. Bile acids have been shown to activate two members of this family, the bile acid-sensitive ion channel (BASIC) and ENaC. To investigate whether bile acids also modulate ASIC function, human ASIC1a was heterologously expressed in Xenopus laevis oocytes. Exposing oocytes to tauro-conjugated cholic (t-CA), deoxycholic (t-DCA), and chenodeoxycholic (t-CDCA) acid at pH 7.4 did not activate ASIC1a-mediated whole-cell currents. However, in ASIC1a expressing oocytes the whole-cell currents elicited by pH 5.5 were significantly increased in the presence of these bile acids. Single-channel recordings in outside-out patches confirmed that t-DCA enhanced the stimulatory effect of pH 5.5 on ASIC1a channel activity. Interestingly, t-DCA reduced single-channel current amplitude by ~15% which suggests an interaction of t-DCA with a region close to the channel pore. Molecular docking predicted binding of bile acids to the pore region near the degenerin site (G433) in the open conformation of the channel. Site-directed mutagenesis demonstrated that the amino acid residue G433 is critically involved in the potentiating effect of bile acids on ASIC1a activation by protons.

  2. PAR-2 activation enhances weak acid-induced ATP release through TRPV1 and ASIC sensitization in human esophageal epithelial cells.

    PubMed

    Wu, Liping; Oshima, Tadayuki; Shan, Jing; Sei, Hiroo; Tomita, Toshihiko; Ohda, Yoshio; Fukui, Hirokazu; Watari, Jiro; Miwa, Hiroto

    2015-10-15

    Esophageal visceral hypersensitivity has been proposed to be the pathogenesis of heartburn sensation in nonerosive reflux disease. Protease-activated receptor-2 (PAR-2) is expressed in human esophageal epithelial cells and is believed to play a role in inflammation and sensation. PAR-2 activation may modulate these responses through adenosine triphosphate (ATP) release, which is involved in transduction of sensation and pain. The transient receptor potential vanilloid receptor 1 (TRPV1) and acid-sensing ion channels (ASICs) are both acid-sensitive nociceptors. However, the interaction among these molecules and the mechanisms of heartburn sensation are still not clear. We therefore examined whether ATP release in human esophageal epithelial cells in response to acid is modulated by TRPV1 and ASICs and whether PAR-2 activation influences the sensitivity of TRPV1 and ASICs. Weak acid (pH 5) stimulated the release of ATP from primary human esophageal epithelial cells (HEECs). This effect was significantly reduced after pretreatment with 5-iodoresiniferatoxin (IRTX), a TRPV1-specific antagonist, or with amiloride, a nonselective ASIC blocker. TRPV1 and ASIC3 small interfering RNA (siRNA) transfection also decreased weak acid-induced ATP release. Pretreatment of HEECs with trypsin, tryptase, or a PAR-2 agonist enhanced weak acid-induced ATP release. Trypsin treatment led to the phosphorylation of TRPV1. Acid-induced ATP release enhancement by trypsin was partially blocked by IRTX, amiloride, or a PAR-2 antagonist. Conversely, acid-induced ATP release was augmented by PAR-2 activation through TRPV1 and ASICs. These findings suggested that the pathophysiology of heartburn sensation or esophageal hypersensitivity may be associated with the activation of PAR-2, TRPV1, and ASICs.

  3. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Alessio, F.; Caplan, C.; Gaspar, C.; Jacobsson, R.; Wyllie, K.

    2015-02-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well.

  4. Estimation of radiation effects in the front-end electronics of an ILC electromagnetic calorimeter

    NASA Astrophysics Data System (ADS)

    Bartsch, V.; Postranecky, M.; Targett-Adams, C.; Warren, M.; Wing, M.

    2008-08-01

    The front-end electronics of the electromagnetic calorimeter of an International Linear Collider detector are situated in a radiation environment. This requires the effect of the radiation on the performance of the electronics, specifically FPGAs, to be examined. In this paper we study the flux, particle spectra and deposited doses at the front-end electronics of the electromagnetic calorimeter of a detector at the ILC. We also study the occupancy of the electromagnetic calorimeter. These estimates are compared with measurements, e.g. of the radiation damage of FPGAs, done elsewhere. The outcome of the study shows that the radiation doses and the annual flux is low enough to allow today's FPGAs to operate. The Single Event Upset rate, however, lies between 14 min and 12 h depending on the FPGA used and therefore needs to be considered in the design of the data acquisition system of the electromagnetic calorimeter. The occupancy is about 0.002 per bunch train not taking into account the effect of noise which depends on the choice of the detector.

  5. A compact dual-band RF front-end and board design for vehicular platforms

    NASA Astrophysics Data System (ADS)

    Sharawi, Mohammad S.; Aloi, Daniel N.

    2012-03-01

    Modern vehicular platforms include several wireless systems that provide navigation, entertainment and road side assistance, among other services. These systems operate at different frequency bands and thus careful system-level design should be followed to minimise the interference between them. In this study, we present a compact dual-band RF front-end module for global positioning system (GPS) operating in the L1-band (1574.42-1576.42 MHz) and satellite digital audio radio system (SDARS) operating in the S-band (2320-2345 MHz). The module provides more than 26 dB of measured gain in both bands and low noise figure values of 0.9 and 1.2 dB in SDARS and GPS bands, respectively. The front-end has interference suppression capability from the advanced mobile phone system and personal communication service cellular bands. The module is designed on a low-cost FR-4 substrate material and occupies a small size of 62 × 29 × 1.3 mm3. It dissipates 235 mW in the SDARS section and 100 mW in the GPS section. Three prototypes have been built to verify a repeatable performance.

  6. Ultra-high contrast frontend for high peak power fs-lasers at 1030 nm.

    PubMed

    Liebetrau, Hartmut; Hornung, Marco; Seidel, Andreas; Hellwing, Marco; Kessler, Alexander; Keppler, Sebastian; Schorcht, Frank; Hein, Joachim; Kaluza, Malte C

    2014-10-06

    We present the results from a new frontend within a double-chirped pulse amplification architecture (DCPA) utilizing crossed-polarized wave generation (XPW) for generating ultra-high contrast, 150 μJ-level, femtosecond seed pulses at 1030 nm. These pulses are used in the high energy class diode-pumped laser system Polaris at the Helmholtz Institute in Jena. Within this frontend, laser pulses from a 75 MHz oscillator-pulse train are extracted at a repetition rate of 1 Hz, temporally stretched, amplified and then recompressed reaching a pulse energy of 2 mJ, a bandwidth of 12 nm and 112 fs pulse duration at a center wavelength of 1030 nm. These pulses are temporally filtered via XPW in a holographic-cut BaF₂ crystal, resulting in 150 μJ pulse energy with an efficiency of 13 %. Due to this non-linear filtering, the relative intensity of the amplified spontaneous emission preceding the main pulse is suppressed to 2×10⁻¹³. This is, to the best of our knowledge, the lowest value achieved in a high peak power laser system operating at 1030 nm center wavelength.

  7. Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation

    SciTech Connect

    Conrad, Ryan C.; Keller, Daniel T.; Morris, Scott J.; Smith, Leon E.

    2015-07-01

    The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, a technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.

  8. An implantable neurostimulator with an integrated high-voltage inductive power-recovery frontend

    NASA Astrophysics Data System (ADS)

    Yuan, Wang; Xu, Zhang; Ming, Liu; Peng, Li; Hongda, Chen

    2014-10-01

    This paper present a highly-integrated neurostimulator with an on-chip inductive power-recovery frontend and high-voltage stimulus generator. In particular, the power-recovery frontend includes a high-voltage full-wave rectifier (up to 100 V AC input), high-voltage series regulators (24/5 V outputs) and a linear regulator (1.8/3.3 V output) with bandgap voltage reference. With the high voltage output of the series regulator, the proposed neurostimulator could deliver a considerably large current in high electrode-tissue contact impedance. This neurostimulator has been fabricated in a CSMC 1 μm 5/40/700 V BCD process and the total silicon area including pads is 5.8 mm2. Preliminary tests are successful as the neurostimulator shows good stability under a 13.56 MHz AC supply. Compared to previously reported works, our design has advantages of a wide induced voltage range (26-100 V), high output voltage (up to 24 V) and high-level integration, which are suitable for implantable neurostimulators.

  9. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management

    PubMed Central

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-01-01

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm2), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip. PMID:26610497

  10. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management.

    PubMed

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-11-19

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm²), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

  11. Integration of front-end electronics with GaAs pixel detectors: Experimental and feasibility analysis

    SciTech Connect

    Bertuccio, G.; Longoni, A.; De Geronimo, G.; Canali, C.; Lanzieri, C.; Nava, F.

    1999-08-01

    This work aims to study the feasibility of the integration, on the same chip, of GaAs pixel detectors and frontend electronics employing GaAs metal semiconductor FET`s (MESFET`s) or high electron mobility transistors (HEMT`s). The interest of fully integrated GaAs systems lies in X and {gamma}-ray spectroscopy and Imaging for scientific, industrial, and medical applications. The system design criteria and the prediction of the performance have been derived on the basis of recent experimental results on semi-insulating GaAs pixel detectors. Measurements of the relevant parameters of GaAs FET`s suitable for the stringent requirements of a specroscopy-grade frontend amplifier are analyzed. It is shown that an optimized GaAs integrated system can reach an electronic noise level below 100 electrons rms (<1 keV FWHM) even at room temperature. Some open problems regarding the detector-electronics integration are highlighted and discussed.

  12. CPRF/ZTH front-end torus design and fabrication status

    SciTech Connect

    Ballard, E.O.; Baker, C.; Gomez, T.; Prince, P.P.; Smith, R.L.

    1989-01-01

    Design of the ZTH front-end torus has been completed for a new generation Reversed Field Pinch (RFP) machine to be assembled at Los Alamos National Laboratory during FY 92. The Confinement Physics Research Facility (CPRF) houses the ZTH front-end. The ZTH torus consists of an Inconel 625 vacuum vessel supported by an external electrically conducting 304L stainless steel shell. Interspace support rings support the vacuum vessel to the shell and also provide accurate radial support for the interspace electrical diagnostics. The shell also supports 48 toroidal field coils that are mounted to the shell's external surface. The shell consists of an explosion bonded stainless steel-copper composite with water-cooling tube assemblies attached to the outer surface. The 0.135-in. thick copper is on the inside surface of the shell, and provides an electrically conducting path with the required electrical time constant of 50 ms. The shell plate will be formed to the required toroidal configuration, after which the poloidal and toroidal flanges will be welded to the structure and machined. The Inconel vacuum vessel consists of bellows segments, armor support rings, and diagnostic stations welded together to form the complete vacuum vessel assembly. The necessity for accurate positioning of the vacuum vessel within the shell requires that the shell and vacuum vessel be fabricated with major diameter tolerances within 0.050-in. true position of the nominal diameters of 188.0-in. and 188.820-in., respectively. 7 figs.

  13. Status and specifications of a Project X front-end accelerator test facility at Fermilab

    SciTech Connect

    Steimel, J.; Webber, R.; Madrak, R.; Wildman, D.; Pasquinelli, R.; Evans-Peoples, E.; /Fermilab

    2011-03-01

    This paper describes the construction and operational status of an accelerator test facility for Project X. The purpose of this facility is for Project X component development activities that benefit from beam tests and any development activities that require 325 MHz or 650 MHz RF power. It presently includes an H- beam line, a 325 MHz superconducting cavity test facility, a 325 MHz (pulsed) RF power source, and a 650 MHz (CW) RF power source. The paper also discusses some specific Project X components that will be tested in the facility. Fermilab's future involves new facilities to advance the intensity frontier. In the early 2000's, the vision was a pulsed, superconducting, 8 GeV linac capable of injecting directly into the Fermilab Main Injector. Prototyping the front-end of such a machine started in 2005 under a program named the High Intensity Neutrino Source (HINS). While the HINS test facility was being constructed, the concept of a new, more versatile accelerator for the intensity frontier, now called Project X, was forming. This accelerator comprises a 3 GeV CW superconducting linac with an associated experimental program, followed by a pulsed 8 GeV superconducting linac to feed the Main Injector synchrotron. The CW Project X design is now the model for Fermilab's future intensity frontier program. Although CW operation is incompatible with the original HINS front-end design, the installation remains useful for development and testing many Project X components.

  14. The Majorana low-noise low-background front-end electronics

    SciTech Connect

    Abgrall, N.; Aguayo, E.; Avignone, III, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y. -D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, II, D. G.; Poon, A. W.P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G.H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C. -H.; Yumatov, V.

    2015-03-24

    The Majorana Demonstrator will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope ⁷⁶Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the Majorana Demonstrator is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the ⁷⁶Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low-background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the Majorana Demonstrator. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.

  15. Characterization of RF front-ends by long-tail pulse response

    NASA Astrophysics Data System (ADS)

    Mazzaro, Gregory J.; Ranney, Kenneth I.

    2010-04-01

    The recognition of unauthorized communications devices at the entry-point of a secure location is one way to guard against the compromise of sensitive information by wireless transmission. Such recognition may be achieved by backscatter x-ray and millimeter-wave imaging; however, implementation of these systems is expensive, and the ability to image the contours of the human body has raised privacy concerns. In this paper, we present a cheaper and less-invasive radio-frequency (RF) alternative for recognizing wireless communications devices. Characterization of the device-under-test (DUT) is accomplished using a stepped-frequency radar waveform. Single-frequency pulses excite resonance in the device's RF front-end. Microsecond periods of zero-signal are placed between each frequency transition to listen for the resonance. The stepped-frequency transmission is swept through known communications bands. Reception of a long-tail decay response between active pulses indicates the presence of a narrowband filter and implies the presence of a front-end circuit. The frequency of the received resonance identifies its communications band. In this work, cellular-band and handheld-radio filters are characterized.

  16. The Majorana low-noise low-background front-end electronics

    DOE PAGES

    Abgrall, N.; Aguayo, E.; Avignone, III, F. T.; ...

    2015-03-24

    The Majorana Demonstrator will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope ⁷⁶Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the Majorana Demonstrator is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the ⁷⁶Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low-background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the Majorana Demonstrator. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less

  17. Multichannel analog front-end and analog-to-digital converter ICs for silicon photomultipliers

    NASA Astrophysics Data System (ADS)

    Bocharov, Y. I.; Butuzov, V. A.

    2016-10-01

    Integrated circuit (IC) of multichannel analog front-end and a mixed-signal chip of multichannel analog-to-digital converter are presented. A chipset of these two ICs is intended for readout, analog preprocessing and analog to digital conversion of silicon photomultiplier array signals. The number of channels of the analog front-end IC as well as the types of their input stages depends on the application. The current test version of the chip contains three current-input channels and three voltage-input channels. Each of the channels includes a programmable pre-amplifier, integrator with baseline-holder, code-controlled amplifier, amplitude discriminator, two programmable timers, pulse-shaping low-pass filter, peak detector, and an output buffer with baseline tuning circuitry. The analog IC has code-configurable architecture. The mixed-signal IC includes nine main channels and one auxiliary channel, containing 10-bit analog-to-digital converter in each channel. It also has a buffer memory and a voltage reference. The chip features low power consumption, which is less than 0.5 mW per channel at a sampling rate of 100 kHz. Both ICs are implemented in 0.35 μm CMOS technology.

  18. A Method for Activation of Endogenous Acid-sensing Ion Channel 1a (ASIC1a) in the Nervous System with High Spatial and Temporal Precision

    PubMed Central

    Li, Tianbo; Yang, Youshan; Canessa, Cecilia M.

    2014-01-01

    Protons activate acid-sensing ion channel 1a (ASIC1a) in the central nervous system (CNS) although the impact of such activation on brain outputs remains elusive. Progress elucidating the functional roles of ASIC1a in the CNS has been hindered by technical difficulties of achieving acidification with spatial and temporal precision. We have implemented a method to control optically the opening of ASIC1a in brain slices and also in awake animals. The light-driven H+ pump ArchT was expressed in astrocytes of mouse cortex by injection of adenoviral vectors containing a strong and astrocyte-specific promoter. Illumination with amber light acidified the surrounding interstitium and led to activation of endogenous ASIC1a channels and firing of action potentials in neurons localized in close proximity to ArchT-expressing astrocytes. We conclude that this optogenetic method offers a minimally invasive approach that enables examining the biological consequences of ASIC1a currents in any structure of the CNS and in the modulation of animal behaviors. PMID:24727474

  19. MUSIC: An 8 channel readout ASIC for SiPM arrays

    NASA Astrophysics Data System (ADS)

    Gómez, Sergio; Gascón, David; Fernández, Gerard; Sanuy, Andreu; Mauricio, Joan; Graciani, Ricardo; Sanchez, David

    2016-04-01

    This paper presents an 8 channel ASIC for SiPM anode readout based on a novel low input impedance current conveyor (under patent1). This Multiple Use SiPM Integrated Circuit (MUSIC) has been designed to serve several purposes, including, for instance, the readout of SiPM arrays for some of the Cherenkov Telescope Array (CTA) cameras. The current division scheme at the very front end part of the circuit splits the input current into differently scaled copies which are connected to independent current mirrors. The circuit contains a tunable pole zero cancellation of the SiPM recovery time constant to deal with sensors from different manufacturers. Decay times up to 100 ns are supported covering most of the available SiPM devices in the market. MUSIC offers three main features: (1) differential output of the sum of the individual input channels; (2) 8 individual single ended analog outputs and; (3) 8 individual binary outputs. The digital outputs encode the amount of collected charge in the duration of the digital signal using a time over threshold technique. For each individual channel, the user must select the analog or digital output. Each functionality, the signal sum and the 8 A/D outputs, include a selectable dual-gain configuration. Moreover, the signal sum implements dual-gain output providing a 15 bit dynamic range. Full die simulation results of the MUSIC designed using AMS 0.35 µm SiGe technology are presented: total die size of 9 mm2, 500 MHz bandwidth for channel sum and 150 MHz bandwidth for A/D channels, low input impedance (≍32 Ω), single photon output pulse width at half maximum (FWHM) between 5 and 10 ns and with a power consumption of ≍ 30 mW/ch plus ≍ 200 mW for the 8 ch sum. Encapsulated prototype samples of the MUSIC are expected by March 2016.

  20. ASIC for high-speed-gating and free running operation of SPADs

    NASA Astrophysics Data System (ADS)

    Rochas, Alexis; Guillaume-Gentil, Christophe; Gautier, Jean-Daniel; Pauchard, Alexandre; Ribordy, Gregoire; Zbinden, Hugo; Leblebici, Yusuf; Monat, Laurent

    2007-05-01

    Single photon detection at telecom wavelengths is of importance in many industrial applications ranging from quantum cryptography, quantum optics, optical time domain reflectometry, non-invasive testing of VLSI circuits, eye-safe LIDAR to laser ranging. In practical applications, the combination of an InGaAs/InP APD with an appropriate electronic circuit still stands as the best solution in comparison with emerging technologies such as superconducting single photon detectors, MCP-PMTs for the near IR or up-conversion technique. An ASIC dedicated to the operation of InGaAs/InP APDs in both gated mode and free-running mode is presented. The 1.6mm2 chip is fabricated in a CMOS technology. It combines a gate generator, a voltage limiter, a fast comparator, a precise timing circuit for the gate signal processing and an output stage. A pulse amplitude of up to +7V can be achieved, which allows the operation of commercially available APDs at a single photon detection probability larger than 25% at 1.55μm. The avalanche quenching process is extremely fast, thus reducing the afterpulsing effects. The packaging of the diode in close proximity with the quenching circuit enables high speed gating at frequencies larger than 10MHz. The reduced connection lengths combined with impedance adaptation technique provide excellent gate quality, free of oscillations or bumps. The excess bias voltage is thus constant over the gate width leading to a stable single photon detection probability and timing resolution. The CMOS integration guarantees long-term stability, reliability and compactness.

  1. Non-ideal effects of MOS capacitor in a switched capacitor waveform recorder ASIC

    NASA Astrophysics Data System (ADS)

    Zhang, Hong-Yan; Deng, Zhi; Liu, Yi-Nong

    2016-07-01

    SCAs (Switched Capacitor Arrays) have a wide range of uses, especially in high energy physics, nuclear science and astrophysics experiments. This paper presents a method of using a MOS capacitor as a sampling capacitor to gain larger capacitance with small capacitor area in SCA design. It studies the non-ideal effects of the MOS capacitor and comes up with ways to reduce these adverse effects. A prototype SCA ASIC which uses a MOS capacitor to store the samples has been designed and tested to verify this method. The SCA integrates 32 channels and each has 64 cells and a readout amplifier. The stored voltage is converted to a pair of differential currents (±4 mA max) and multiplexed to the output. All the functionalities have been verified. The power consumption is less than 2 mW/ch. The INL of all the cells in one channel are better than 0.39%. The equivalent input noise of the SCA has been tested to be 2.2 mV with 625 kHz full-scale sine wave as input, sampling at 40 MSPS (Mega-samples per Second) and reading out at 5 MHz. The effective resolution is 8.8 bits considering 1 V dynamic range. The maximum sampling rate reaches up to 50 MSPS and readout rate of 15 MHz to keep noise smaller than 2.5 mV. The test results validate the feasibility of the MOS capacitor. Supported by National Natural Science Foundation of China (11375100), Strategic Pioneer Program on Space Sciences, Chinese Academy of Sciences (XDA04060606-06) and State Key Laboratory of Particle Detection and Electronics

  2. Development of a low noise readout ASIC for CZT detectors for gamma-ray spectroscopy applications

    NASA Astrophysics Data System (ADS)

    Luo, J.; Deng, Z.; Wang, G.; Li, H.; Liu, Y.

    2012-08-01

    A multi-channel readout ASIC for pixelated CZT detectors has been developed for gamma-ray spectroscopy applications. Each channel consists of a low noise dual-stage charge sensitive amplifier (CSA), a CR-(RC)4 semi-Gaussian shaper and a class-AB output buffer. The equivalent noise charge (ENC) of input PMOS transistor is optimized for 5 pF input capacitance and 1 μs peaking time using gm/ID design methodology. The gain can be adjusted from 100 mV/fC to 400 mV/fC and the peaking time can be adjusted from 1 μs to 4 μs. A 16-channel chip has been designed and fabricated in 0.35 μm 2P4M CMOS technology. The test results show that the chip works well and fully satisfies the design specifications. The ENC was measured to be 72 e + 26 e/pF at 1 μs peaking time and 86 e + 20 e/pF at 4 μs peaking time. The non-uniformity of the channel gain and ENC was less than ±12% and ±11% respectively for 16 channels in one chip. The chip was also tested with a pixelated CZT detector at room temperature. The measured energy resolution at 59.5 keV photopeak of 241Am and 122 keV photopeak of 57Co were 4.5% FWHM and 2.8% FWHM for the central area pixels, respectively.

  3. Detector control and data acquisition for the wide field infrared survey telescope (WFIRST) with a custom ASIC

    NASA Astrophysics Data System (ADS)

    Smith, Brian; Loose, Markus; Alkire, Greg; Joshi, Atul; Kelly, Daniel; Siskind, Eric; Rossetti, Dino; Mah, Jonathan; Cheng, Edward; Miko, Laddawan; Luppino, Gerard; Culver, Harry; Wollack, Edward; Content, David

    2016-07-01

    The Wide-Field Infrared Survey Telescope (WFIRST) will have the largest near-IR focal plane ever flown by NASA, a total of 18 4K x 4K devices. The project has adopted a system-level approach to detector control and data acquisition where 1) control and processing intelligence is pushed into components closer to the detector to maximize signal integrity, 2) functions are performed at the highest allowable temperatures, and 3) the electronics are designed to ensure that the intrinsic detector noise is the limiting factor for system performance. For WFIRST, the detector arrays operate at 90 to 100 K, the detector control and data acquisition functions are performed by a custom ASIC at 150 to 180 K, and the main data processing electronics are at the ambient temperature of the spacecraft, notionally 300 K. The new ASIC is the main interface between the cryogenic detectors and the warm instrument electronics. Its single-chip design provides basic clocking for most types of hybrid detectors with CMOS ROICs. It includes a flexible but simple-to-program sequencer, with the option of microprocessor control for more elaborate readout schemes that may be data-dependent. All analog biases, digital clocks, and analog-to-digital conversion functions are incorporated and are connected to the nearby detectors with a short cable that can provide thermal isolation. The interface to the warm electronics is simple and robust through multiple LVDS channels. It also includes features that support parallel operation of multiple ASICs to control detectors that may have more capability or requirements than can be supported by a single chip.

  4. ChromAIX: a high-rate energy-resolving photon-counting ASIC for spectal computed tomography

    NASA Astrophysics Data System (ADS)

    Steadman, Roger; Herrmann, Christoph; Mülhens, Oliver; Maeding, Dale G.; Colley, James; Firlit, Ted; Luhta, Randy; Chappo, Marc; Harwood, Brian; Kosty, Doug

    2010-04-01

    In Computed Tomography applications a major opportunity has been identified in the exploitation of the spectral information inherently available due to the polychromatic emission of the X-ray tube. Current CT technology based on indirect-conversion and integrating-mode detection can be used to some extent to distinguish the two predominant physical causes of energy-dependent attenuation (photo-electric effect and Compton effect) by using dual-energy techniques, e.g. kVp switching, dual-source or detector stacking. Further improvements can be achieved by transitioning to direct-conversion technologies and counting-mode detection, which inherently exhibits a better signal-to-noise ratio. Further including energy discrimination, enables new applications, which are not feasible with dual-energy techniques, e.g. the possibility to discriminate K-edge features (contrast agents, e.g. Gadolinium) from the other contributions to the x-ray attenuation of a human body. The capability of providing energy-resolved information with more than two different measurements is referred to as Spectral CT. To study the feasibility of Spectral CT, an energy-resolving proprietary photon counting ASIC (ChromAIX) has been designed to provide high count-rate capabilities while offering energy discrimination. The ChromAIX ASIC consists of an arrangement of 4 by 16 pixels with an isotropic pitch of 300 μm. Each pixel contains a number of independent energy discriminators with their corresponding 12-bit counters with continuous read-out capability. Observed Poissonian count-rates exceeding 10 Mcps (corresponding to approximately 27 Mcps incident mean Poisson rate) have been experimentally validated through electrical characterization. The measured noise of 2.6 mVRMS (4 keV FWHM) adheres to specifications. The ChromAIX ASIC has been specifically designed to support direct-converting materials CdZnTe and CdTe.

  5. Detector Control and Data Acquisition for the Wide-Field Infrared Survey Telescope (WFIRST) with a Custom ASIC

    NASA Technical Reports Server (NTRS)

    Smith, Brian S.; Loose, Markus; Alkire, Greg; Joshi, Atul; Kelly, Daniel; Siskind, Eric; Rossetti, Dino; Mah, Jonathan; Cheng, Edward; Miko, Laddawan; Luppino, Gerard; Culver, Harry; Wollack, Edward; Content, David

    2016-01-01

    The Wide-Field Infrared Survey Telescope (WFIRST) will have the largest near-IR focal plane ever flown by NASA, a total of 18 4K x 4K devices. The project has adopted a system-level approach to detector control and data acquisition where 1) control and processing intelligence is pushed into components closer to the detector to maximize signal integrity, 2) functions are performed at the highest allowable temperatures, and 3) the electronics are designed to ensure that the intrinsic detector noise is the limiting factor for system performance. For WFIRST, the detector arrays operate at 90 to 100 K, the detector control and data acquisition functions are performed by a custom ASIC at 150 to 180 K, and the main data processing electronics are at the ambient temperature of the spacecraft, notionally approx.300 K. The new ASIC is the main interface between the cryogenic detectors and the warm instrument electronics. Its single-chip design provides basic clocking for most types of hybrid detectors with CMOS ROICs. It includes a flexible but simple-to-program sequencer, with the option of microprocessor control for more elaborate readout schemes that may be data-dependent. All analog biases, digital clocks, and analog-to-digital conversion functions are incorporated and are connected to the nearby detectors with a short cable that can provide thermal isolation. The interface to the warm electronics is simple and robust through multiple LVDS channels. It also includes features that support parallel operation of multiple ASICs to control detectors that may have more capability or requirements than can be supported by a single chip.

  6. How Front-End Loading Contributes to Creating and Sustaining the Theory-Practice Gap in Higher Education Programs

    ERIC Educational Resources Information Center

    Allen, Jeanne Maree

    2011-01-01

    In this paper, I show how Mead's theory of emergence can prove explanatory in how the theory-practice gap is co-created and sustained in "front-end loading" university programs. Taking teacher education as an exemplar, I argue that trainee teachers encounter different and oft-times conflicting environmental, social and cultural conditions in the…

  7. High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration

    ERIC Educational Resources Information Center

    Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.

    2010-01-01

    In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…

  8. 40 CFR 63.488 - Methods and procedures for batch front-end process vent group determination.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... Polymers and Resins § 63.488 Methods and procedures for batch front-end process vent group determination... be based on either organic HAP or TOC emissions. (1) The procedures specified in paragraphs (b... of product. (2) The annual uncontrolled organic HAP or TOC emissions and annual average batch...

  9. 40 CFR 63.490 - Batch front-end process vents-performance test methods and procedures to determine compliance.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... Pollutant Emissions: Group I Polymers and Resins § 63.490 Batch front-end process vents—performance test... may be based on either total organic HAP or TOC. For purposes of this paragraph (c), the term “batch... inlet sampling sites shall ensure the measurement of total organic HAP or TOC (minus methane and...

  10. The marine atmospheric boundary layer during the HyMeX-ASICS-MED campaign: characterization of coherent structures and impact on turbulent flux estimates

    NASA Astrophysics Data System (ADS)

    Brilouet, Pierre-Etienne; Canut, Guylaine; Durand, Pierre

    2015-04-01

    During winter, the North Western Mediterranean Sea is characterised by intense air-sea exchanges linked to regional strong winds (Mistral or Tramontana) which bring cold and dry continental air over a warmer sea. The HyMeX-ASICS-MED field campaign, devoted to intense sea-atmosphere exchange and deep oceanic convection analysis took place in the Gulf of Lion during winter 2013. The French ATR42 aircraft was operated to document the mean and turbulent structure of the atmospheric boundary layer (ABL) during strong wind conditions. The aircraft was equipped to measure turbulence fluctuations, thus allowing the computation of turbulence parameters. The flight strategy consisted of stacked horizontal legs oriented along and across the wind direction, in order to obtain information about the isotropy of the turbulent field and about coherent structures. Strong wind events were documented with 11 flights during which latent heat flux up to 600 W.m-2 were observed. The structure of the turbulent field is analysed through the integral length scale and the wavelength of the spectrum peak of the vertical velocity which represent the size of the large and the most energetic eddies, respectively. It reveals a stretching of turbulent eddies along the mean wind. This kind of organized structures plays a major role by modulating the transfers inside the ABL. In particular, this non-isotropic behaviour alters the flux estimates from along-wind samples. This last point is critical because surface and entrainment fluxes, deduced from extrapolation of the flux profiles, are essential parameters to characterise the coupling between air-sea exchanges and the ABL structure.

  11. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors.

    PubMed

    Tran, Trong-Hieu; Chao, Paul Chang-Po; Chien, Ping-Chieh

    2016-09-02

    This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an "MR reader" stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB) over the input range of 0.5-2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm², while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is -0.79-0.95 LSB while the differential non-linearity (DNL) is -0.68-0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement error is within

  12. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors

    PubMed Central

    Tran, Trong-Hieu; Chao, Paul Chang-Po; Chien, Ping-Chieh

    2016-01-01

    This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an “MR reader” stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB) over the input range of 0.5–2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm2, while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is −0.79–0.95 LSB while the differential non-linearity (DNL) is −0.68–0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement

  13. Leu85 in the beta1-beta2 linker of ASIC1 slows activation and decreases the apparent proton affinity by stabilizing a closed conformation.

    PubMed

    Li, Tianbo; Yang, Youshan; Canessa, Cecilia M

    2010-07-16

    Acid-sensing ion channels (ASICs) are proton-activated channels expressed in neurons of the central and peripheral nervous systems where they modulate neuronal activity in response to external increases in proton concentration. The size of ASIC1 currents evoked by a given local acidification is determined by the number of channels in the plasma membrane and by the apparent proton affinities for activation and steady-state desensitization of the channel. Thus, the magnitude of the pH drop and the value of the baseline pH both are functionally important. Recent characterization of ASIC1s from an increasing number of species has made evident that proton affinities of these channels vary across vertebrates. We found that in species with high baseline plasma pH, e.g. frog, shark, and fish, ASIC1 has high proton affinity compared with the mammalian channel. The beta1-beta2 linker in the extracellular domain, specifically by the substitution M85L, determines the interspecies differences in proton affinities and also the time course of ASIC1 macroscopic currents. The mechanism underlying these observations is a delay in channel opening after application of protons, most likely by stabilizing a closed conformation that decreases the apparent affinity to protons and also slows the rise and decay phases of the current. Together, the results suggest evolutionary adaptation of ASIC1 to match the value of the species-specific plasma pH. At the molecular level, adaptation is achieved by substitutions of nonionizable residues rather than by modification of the channel proton sensor.

  14. The role of the capsaicin receptor TRPV1 and acid-sensing ion channels (ASICS) in proton sensitivity of subpopulations of primary nociceptive neurons in rats and mice.

    PubMed

    Leffler, A; Mönter, B; Koltzenburg, M

    2006-05-12

    A local elevation of H+-ion concentrations often occurs in inflammation and usually evokes pain by excitation of primary nociceptive neurons. Expression patterns and functional properties of the capsaicin receptor and acid-sensing ion channels suggest that they may be the main molecular substrates underlying this proton sensitivity. Here, we asked how the capsaicin receptor TRPV1 and acid-sensing ion channels (ASICS) contribute to the proton response in subpopulations of nociceptive neurons from adult rats and mice (wildtype C57/Bl6, Balb/C and TRPV1-null). In cultured dorsal root ganglion neurons, whole cell patch clamp recordings showed that the majority of capsaicin-sensitive rat dorsal root ganglion neurons displayed large proton-evoked inward currents with transient ASIC-like properties. In contrast, the prevalence of ASIC-like currents was smaller in both mouse wildtype strains and more frequent in capsaicin-insensitive neurons. Transient ASIC-like currents were more frequent in both species among isolectin B4-negative neurons. A significantly reduced proton response was observed for dissociated dorsal root ganglion neurons in TRPV1 deficient mice. Unmyelinated, but not thin myelinated nociceptors recorded extracellularly from TRPV1-null mutants showed a profound reduction of proton sensitivity. Together these findings indicate that there are significant differences between rat and mouse in the contribution of TRPV1 and ASIC subunits to proton sensitivity of sensory neurons. In both species ASIC subunits are more prevalent in the isolectin B4-negative neurons, some of which may represent thin myelinated nociceptors. However, the main acid-sensor in isolectin B4-positive and isolectin B4-negative unmyelinated nociceptors in mice is TRPV1.

  15. DS Sentry: an acquisition ASIC for smart, micro-power sensing applications

    NASA Astrophysics Data System (ADS)

    Liobe, John; Fiscella, Mark; Moule, Eric; Balon, Mark; Bocko, Mark; Ignjatovic, Zeljko

    2011-06-01

    Unattended ground monitoring that combines seismic and acoustic information can be a highly valuable tool in intelligence gathering; however there are several prerequisites for this approach to be viable. The first is high sensitivity as well as the ability to discriminate real threats from noise and other spurious signals. By combining ground sensing with acoustic and image monitoring this requirement may be achieved. Moreover, the DS Sentry®provides innate spurious signal rejection by the "active-filtering" technique employed as well as embedding some basic statistical analysis. Another primary requirement is spatial and temporal coverage. The ideal is uninterrupted, long-term monitoring of an area. Therefore, sensors should be densely deployed and consume very little power. Furthermore, sensors must be inexpensive and easily deployed to allow dense placements in critical areas. The ADVIS DS Sentry®, which is a fully-custom integrated circuit that enables smart, micro-power monitoring of dynamic signals, is the foundation of the proposed system. The core premise behind this technology is the use of an ultra-low power front-end for active monitoring of dynamic signals in conjunction with a highresolution, Σ Δ-based analog-to-digital converter, which utilizes a novel noise rejection technique and is only employed when a potential threat has been detected. The DS Sentry® can be integrated with seismic accelerometers and microphones and user-programmed to continuously monitor for signals with specific signatures such as impacts, footsteps, excavation noise, vehicle-induced ground vibrations, or speech, while consuming only microwatts of power. This will enable up to several years of continuous monitoring on a single small battery while concurrently mitigating false threats.

  16. Characterizing the Noise Performance of the KPiX ASIC Readout Chip

    SciTech Connect

    Carman, Jerome Kyrias; /Cabrillo Coll. /SLAC

    2007-11-07

    AKPiX is a prototype front-end readout chip designed for the Silicon Detector Design Concept for the International Linear Collider (ILC). It is targeted at readout of the outer tracker and the silicon-tungsten calorimeter and is under consideration for the hadronic calorimeter and muon systems. This chip takes advantage of the ILC timing structure by implementing pulsed-power operation to reduce power and cooling requirements and buffered readout to minimize material. Successful implementation of this chip requires optimal noise performance, of which there are two measures. The first is the noise on the output signal, previously measured at 1500e{sup -}, which is much larger than the anticipated 500e{sup -}. The other is the noise on the trigger logic branch, which determines where thresholds must be set in order to eliminate noise hits, thus defining the smallest signals to which the chip can be sensitive. A test procedure has been developed to measure the noise in the trigger branch by scanning across the pedestal in trigger threshold and taking self-triggered data to measure the accept rate at each threshold. This technique measures the integral of the pedestal shape. Shifts in the pedestal mean from injection of known calibration charges are used to normalize the distribution in units of charge. The shape of the pedestal is fit well by a Gaussian, the width of which is determined to be 2480e{sup -}, far in excess of the expected noise. The variation of the noise as a function of several key parameters was studied, but no significant source has been clearly isolated. However, several problems have been identified that are being addressed or are under further investigation. Meanwhile, the techniques developed here will be critical in ultimately verifying the performance goals of the KPiX chip.

  17. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    NASA Technical Reports Server (NTRS)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  18. A new ATLAS pixel front-end IC for upgraded LHC luminosity

    NASA Astrophysics Data System (ADS)

    Barbero, M.; Arutinov, D.; Beccherle, R.; Darbo, G.; Ely, R.; Fougeron, D.; Garcia-Sciveres, M.; Gnani, D.; Hemperek, T.; Karagounis, M.; Kluit, R.; Kostioukhine, V.; Mekkaoui, A.; Menouni, M.; Schipper, J.-D.

    2009-06-01

    A new pixel Front-End (FE) IC is being developed in a 130 nm technology for use in the upgraded ATLAS pixel detector. The new pixel FE will be made of smaller pixels (50×250 μm vs. 50×400 μm for the present FE, FE-I3), a much improved active area over inactive area ratio, and a new analog pixel chain tuned for low power and new detector input capacitance. The higher luminosity for which this IC is tuned implies a complete redefinition of the digital architecture logic, which will not be based on End-of-Column data buffering but on local pixel logic and local pixel data storage. An overview of the new FE is given with particular emphasis on the new digital logic architecture and possible architecture variations.

  19. Front-end electronics for the tagger of the BGO-OD experiment

    NASA Astrophysics Data System (ADS)

    Messi, Francesco

    2013-08-01

    The BGO-OD experiment is intended for the systematic investigation of the photo-production of mesons off the nucleon. The experiment will use bremsstrahlung photons from an e- beam incident upon a thin radiator. The photon energy will be measured via the deflection of the electrons in the magnetic field of a photon tagger. The B-FrED is a 16 channel double-threshold discriminator and shaper board designed as Front-End Electronics for the new Tagger detector of the experiment. It is a 6U-VME form factor card. The analog input stage has 1.7 GHz bandwidth. The output stage provides two LVDS signals with an expected jitter of ∼ 8 ps with respect to the input signal. The threshold settings are managed by a micro-controller which is remotely accessible through Ethernet.

  20. Radiation damage testing of transistors for SSC front-end electronics

    SciTech Connect

    Dawson, J.; Ekenberg, T.; Stevens, A. ); Kraner, H.; Radeka, V.; Rescia, S. ); Kerns, S. . Dept. of Electrical Engineering)

    1990-01-01

    Over the ten year expected lifetime of a typical SSC detector operating at the design luminosity of 10{sup 33} cm{sup {minus}2}s{sup {minus}1}, the front-end electronics at large pseudorapidities may receive total doses as high as 20 MRad(Si) of ionizing radiation and 10{sup 16} neutrons/cm{sup 2}. Discrete JFETs and monolithic MOS and bipolar transistors have been irradiated at 10 MRad(Si) and 10{sup 14} neutrons/cm{sup 2}, and the effect on transfer characteristics and noise performance have been measured. All transistors were still functional after irradiation but suffered increased noise and the MOS transistors showed significant threshold shifts and increased leakage currents. 4 refs., 2 figs.

  1. Design and Fabrication of Safety Shutter for Indus-2 Synchrotron Front-ends

    SciTech Connect

    Raghuvanshi, V. K.; Dhamgaye, V.; Kumar, A.; Deb, S. K.

    2010-06-23

    This paper describes the design and fabrication of safety shutter for the Indus-2 synchrotron source on bending magnet front-ends. The purpose of the safety shutter is to absorb Bremsstrahlung radiation generated due to scattering of electron beam from residual gas ions and components of the storage ring. The safety shutter consists of a radiation absorber actuated inside a rectangular ultra high vacuum chamber by pneumatic actuator. A water-cooled copper block is mounted before the absorber block to protect it from the incident heat load due to synchrotron radiation. The top flanges of the chamber are made with rectangular knife edge sealing which is found to be better than wire seal at higher temperature. The physics aspect of safety shutter is designed using simulation code Electron Gamma Shower EGS-4 code.

  2. PDP-11 front-end for a VAX-11/780

    SciTech Connect

    Browne, M.J.; Granieri, C.; Sherden, D.J.; Weaver, L.J.

    1980-01-01

    An unpublicized feature of the VAX-11/780 is the provision for attaching a PDP-11 to the VAX UNIBUS Adapter. Doing this can give significantly improved I/O performance for applications which are limited by overhead in the VAX I/O driver rather than by the transfer speed of the UNIBUS itself. Such a system was implemented by using a PDP-11/04 as a front-end to a CAMAC data acquisition system. Both the PDP and the VAX have full access to the UNIBUS. That portion of the PDP address space that does not have UNIBUS memory can be mapped to buffers in the VAX memory; this approach allows the PDP to access VAX memory and to initiate DMA transfers directly to the VAX. The VAX also has full access to the PDP memory; a convenient means for developing and downloading the PDP software is thus provided. 5 figures.

  3. Low material budget microfabricated cooling devices for particle detectors and front-end electronics

    NASA Astrophysics Data System (ADS)

    Mapelli, A.; Catinaccio, A.; Daguin, J.; van Lintel, H.; Nuessle, G.; Petagna, P.; Renaud, P.

    2011-06-01

    Novel cooling systems with very low material budget are being fabricated and studied. They consist of silicon wafers in which microchannels are etched and closed by bonding another wafer. This cooling option is being considered for future HEP detectors of the sLHC and linear colliders. It is currently under investigation as an option for the cooling of the NA62 Gigatracker silicon pixel detector and its front-end electronics where the microfabricated cooling plate would stand directly in the beam. In this particular case, microchannel cooling meets both the very aggressive X 0 (0.15%) specifications and the anticipated 2 W/cm 2 power dissipation by the active electronics.

  4. Multi-channel front-end board for SiPM readout

    NASA Astrophysics Data System (ADS)

    Auger, M.; Ereditato, A.; Goeldi, D.; Kreslo, I.; Lorca, D.; Luethi, M.; von Rohr, C. Rudolf; Sinclair, J.; Weber, M. S.

    2016-10-01

    We describe a novel high-speed front-end electronic board (FEB) for interfacing an array of 32 Silicon Photo-multipliers (SiPM) with a computer. The FEB provides individually adjustable bias for the SiPMs, and performs low-noise analog signal amplification, conditioning and digitization. It provides event timing information accurate to 1.3 ns RMS. The signal-to-noise ratio of 12 is attained for the first photo-electron peak. The back-end data interface is realized on the basis of 100 Mbps Ethernet. The design allows daisy-chaining of up to 256 units into one network interface, thus enabling compact and efficient readout schemes for multi-channel scintillating detectors, using SiPMs as photo-sensors.

  5. Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology

    NASA Astrophysics Data System (ADS)

    Kleczek, Rafal

    2016-12-01

    The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e- for a detector capacitance CDET = 160 fF.

  6. ANALOG FRONT-END ELECTRONICS FOR BEAM POSITION MEASUREMENT ON THE BEAM HALO MEASUREMENT

    SciTech Connect

    R.B. SHURTER; T.J. COTE; J.D. GILPATRICK

    2001-06-01

    Enhancements have been made to the log-ratio analog front-end electronics based on the Analog Devices 8307 logarithmic amplifier as used on the LEDA accelerator. The dynamic range of greater than 85 dB, has been extended to nearly the full capability of the AD8307 from the previous design of approximately 65 dB through the addition of a 350 MHz band-pass filter, careful use of ground and power plane placement, signal routing, and power supply bypassing. Additionally, selection of high-isolation RF switches (55dB) has been an integral part of a new calibration technique, which is fully described in another paper submitted to this conference. Provision has also been made for insertion of a first-stage low-noise amplifier for using the circuit under low-signal conditions.

  7. Performance of a 2.5 THz Receiver Front-End for Spaceborne Applications

    NASA Technical Reports Server (NTRS)

    Gaidis, Michael C.; Pickett, H. M.; Siegel, P. H.; Smith, C. D.; Smith, R. P.; Martin, S. C.

    1999-01-01

    The OH radical plays a significant role in a great many of the known ozone destruction cycles, and has become the focus of an important radiometer development effort for NASA's Earth Observing System Chem I satellite, which will monitor and study many tropospheric and stratospheric gases and is scheduled for launch in 2002. Here we describe the design, fabrication, and testing of a receiver front end used to detect the OH signals at 2.5 THz. This is to be the first Terahertz heterodyne receiver to be flown in space. The challenges of producing the necessary high-performance mixers are numerous, but for this application, there is the added challenge of designing a robust receiver which can withstand the environmental extremes of a rocket launch and five years in space. The receiver front-end consists of the following components: a four-port dual-polarization diplexer, off-axis elliptical feed mirrors, mixers for horizontal and vertical polarization, support structures allowing simple and rugged alignment, low noise IF amplification from 7.7 to 21.1 GHz, and mixer DC bias circuitry. The front-end design, alignment, and operation will be covered in depth, followed by a discussion of the most recent results in receiver noise and dual-mode horn beam patterns. JPL MOMED mixers are employed, and have resulted in receiver noise temperatures of 14,500 K, DSB with LO frequency 2.522 GHz and IF of 12.8 GHz. Horn beam patterns correspond well with theory, with no significant sidelobes above the -25 dB level. Considering the high-quality beam of this receiver, these results are competitive with the best reported in the literature.

  8. The front-end chip of the SuperB SVT detector

    NASA Astrophysics Data System (ADS)

    Giorgi, F.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.; Ganaway, F.; Cenci, R.; Bombelli, L.; Citterio, M.; Coelli, S.; Fiorini, C.; Liberali, V.; Monti, M.; Nasri, B.; Neri, N.; Palombo, F.; Stabile, A.; Balestri, G.; Batignani, G.; Bernardelli, A.; Bettarini, S.; Bosi, F.; Casarosa, G.; Ceccanti, M.; Forti, F.; Giorgi, M. A.; Lusiani, A.; Mammini, P.; Morsani, F.; Oberhof, B.; Paoloni, E.; Perez, A.; Petragnani, G.; Profeti, A.; Rizzo, G.; Soldani, A.; Walsh, J.; Gaioni, L.; Manazza, A.; Quartieri, E.; Ratti, L.; Zucca, S.; Dalla Betta, G.-F.; Fontana, G.; Pancheri, L.; Povoli, M.; Verzellesi, G.; Bosisio, L.; Lanceri, L.; Rashevskaya, I.; Stella, C.; Vitale, L.

    2013-08-01

    The asymmetric e+e- collider SuperB is designed to deliver a high luminosity, greater than 1036cm-2s-1, with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%.

  9. Toward a fully integrated neurostimulator with inductive power recovery front-end.

    PubMed

    Mounaïm, Fayçal; Sawan, Mohamad

    2012-08-01

    In order to investigate new neurostimulation strategies for micturition recovery in spinal cord injured patients, custom implantable stimulators are required to carry-on chronic animal experiments. However, higher integration of the neurostimulator becomes increasingly necessary for miniaturization purposes, power consumption reduction, and for increasing the number of stimulation channels. As a first step towards total integration, we present in this paper the design of a highly-integrated neurostimulator that can be assembled on a 21-mm diameter printed circuit board. The prototype is based on three custom integrated circuits fabricated in High-Voltage (HV) CMOS technology, and a low-power small-scale commercially available FPGA. Using a step-down approach where the inductive voltage is left free up to 20 V, the inductive power and data recovery front-end is fully integrated. In particular, the front-end includes a bridge rectifier, a 20-V voltage limiter, an adjustable series regulator (5 to 12 V), a switched-capacitor step-down DC/DC converter (1:3, 1:2, or 2:3 ratio), as well as data recovery. Measurements show that the DC/DC converter achieves more than 86% power efficiency while providing around 3.9-V from a 12-V input at 1-mA load, 1:3 conversion ratio, and 50-kHz switching frequency. With such efficiency, the proposed step-down inductive power recovery topology is more advantageous than its conventional step-up counterpart. Experimental results confirm good overall functionality of the system.

  10. ChromAIX: Fast photon-counting ASIC for Spectral Computed Tomography

    NASA Astrophysics Data System (ADS)

    Steadman, Roger; Herrmann, Christoph; Mülhens, Oliver; Maeding, Dale G.

    2011-08-01

    X-ray attenuation properties of matter (i.e. human body in medical Computed Tomography) are energy and material dependent. This dependency is largely neglected in conventional CT techniques, which require the introduction of correction algorithms in order to prevent image artefacts. The exploitation of the inherent energy information contained in the X-ray spectrum allows distinguishing the two main physical causes of energy-dependent attenuation (photo-electric effect and Compton effect). Currently a number of methods exist that allow assessing the energy-dependent attenuation in conventional systems. These methods consist of using two distinct spectra (kVp switching or dual source) or of discriminating low and high energy photons by means of stacking two detectors. Further improvements can be achieved by transitioning to direct-conversion technologies and counting-mode detection, which inherently exhibits a better signal-to-noise ratio. Further including energy discrimination enables new applications, which are not feasible with dual-energy techniques, e.g. the possibility to discriminate K-edge features (contrast agents, e.g. gadolinium) from other contributions to the X-ray attenuation of a human body. The capability of providing energy-resolved information with two or more independent measurements is referred to as Spectral CT.A new proprietary photon-counting ASIC (ChromAIX) has been developed to provide high count-rate capabilities while offering energy discrimination. ChromAIX consists of a pixel array with an isotropic pitch of 300 μm. Each pixel contains independent discriminators that enable the possibility to discretize the incoming photons into a number of energy levels. Extensive electrical characterization has been carried out to assess the performance in terms of count-rate performance and noise. Observed rates exceed 10 Mcps/pixel (Poissonian, mean incoming rates >27 Mcps). The energy resolution is better than 4.1 keV FWHM and has been shown to be

  11. Respiratory virus infection up-regulates TRPV1, TRPA1 and ASICS3 receptors on airway cells.

    PubMed

    Omar, Shadia; Clarke, Rebecca; Abdullah, Haniah; Brady, Clare; Corry, John; Winter, Hanagh; Touzelet, Olivier; Power, Ultan F; Lundy, Fionnuala; McGarvey, Lorcan P A; Cosby, S Louise

    2017-01-01

    Receptors implicated in cough hypersensitivity are transient receptor potential vanilloid 1 (TRPV1), transient receptor potential cation channel, Subfamily A, Member 1 (TRPA1) and acid sensing ion channel receptor 3 (ASIC3). Respiratory viruses, such as respiratory syncytial virus (RSV) and measles virus (MV) may interact directly and/or indirectly with these receptors on sensory nerves and epithelial cells in the airways. We used in vitro models of sensory neurones (SHSY5Y or differentiated IMR-32 cells) and human bronchial epithelium (BEAS-2B cells) as well as primary human bronchial epithelial cells (PBEC) to study the effect of MV and RSV infection on receptor expression. Receptor mRNA and protein levels were examined by qPCR and flow cytometry, respectively, following infection or treatment with UV inactivated virus, virus-induced soluble factors or pelleted virus. Concentrations of a range of cytokines in resultant BEAS-2B and PBEC supernatants were determined by ELISA. Up-regulation of TRPV1, TRPA1 and ASICS3 expression occurred by 12 hours post-infection in each cell type. This was independent of replicating virus, within the same cell, as virus-induced soluble factors alone were sufficient to increase channel expression. IL-8 and IL-6 increased in infected cell supernatants. Antibodies against these factors inhibited TRP receptor up-regulation. Capsazepine treatment inhibited virus induced up-regulation of TRPV1 indicating that these receptors are targets for treating virus-induced cough.

  12. Histone Modifications in a Mouse Model of Early Adversities and Panic Disorder: Role for Asic1 and Neurodevelopmental Genes

    PubMed Central

    Cittaro, Davide; Lampis, Valentina; Luchetti, Alessandra; Coccurello, Roberto; Guffanti, Alessandro; Felsani, Armando; Moles, Anna; Stupka, Elia; D’ Amato, Francesca R.; Battaglia, Marco

    2016-01-01

    Hyperventilation following transient, CO2-induced acidosis is ubiquitous in mammals and heritable. In humans, respiratory and emotional hypersensitivity to CO2 marks separation anxiety and panic disorders, and is enhanced by early-life adversities. Mice exposed to the repeated cross-fostering paradigm (RCF) of interference with maternal environment show heightened separation anxiety and hyperventilation to 6% CO2-enriched air. Gene-environment interactions affect CO2 hypersensitivity in both humans and mice. We therefore hypothesised that epigenetic modifications and increased expression of genes involved in pH-detection could explain these relationships. Medullae oblongata of RCF- and normally-reared female outbred mice were assessed by ChIP-seq for H3Ac, H3K4me3, H3K27me3 histone modifications, and by SAGE for differential gene expression. Integration of multiple experiments by network analysis revealed an active component of 148 genes pointing to the mTOR signalling pathway and nociception. Among these genes, Asic1 showed heightened mRNA expression, coherent with RCF-mice’s respiratory hypersensitivity to CO2 and altered nociception. Functional enrichment and mRNA transcript analyses yielded a consistent picture of enhancement for several genes affecting chemoception, neurodevelopment, and emotionality. Particularly, results with Asic1 support recent human findings with panic and CO2 responses, and provide new perspectives on how early adversities and genes interplay to affect key components of panic and related disorders. PMID:27121911

  13. Respiratory virus infection up-regulates TRPV1, TRPA1 and ASICS3 receptors on airway cells

    PubMed Central

    Omar, Shadia; Clarke, Rebecca; Abdullah, Haniah; Brady, Clare; Corry, John; Winter, Hanagh; Touzelet, Olivier; Power, Ultan F.; Lundy, Fionnuala; McGarvey, Lorcan P. A.

    2017-01-01

    Receptors implicated in cough hypersensitivity are transient receptor potential vanilloid 1 (TRPV1), transient receptor potential cation channel, Subfamily A, Member 1 (TRPA1) and acid sensing ion channel receptor 3 (ASIC3). Respiratory viruses, such as respiratory syncytial virus (RSV) and measles virus (MV) may interact directly and/or indirectly with these receptors on sensory nerves and epithelial cells in the airways. We used in vitro models of sensory neurones (SHSY5Y or differentiated IMR-32 cells) and human bronchial epithelium (BEAS-2B cells) as well as primary human bronchial epithelial cells (PBEC) to study the effect of MV and RSV infection on receptor expression. Receptor mRNA and protein levels were examined by qPCR and flow cytometry, respectively, following infection or treatment with UV inactivated virus, virus-induced soluble factors or pelleted virus. Concentrations of a range of cytokines in resultant BEAS-2B and PBEC supernatants were determined by ELISA. Up-regulation of TRPV1, TRPA1 and ASICS3 expression occurred by 12 hours post-infection in each cell type. This was independent of replicating virus, within the same cell, as virus-induced soluble factors alone were sufficient to increase channel expression. IL-8 and IL-6 increased in infected cell supernatants. Antibodies against these factors inhibited TRP receptor up-regulation. Capsazepine treatment inhibited virus induced up-regulation of TRPV1 indicating that these receptors are targets for treating virus-induced cough. PMID:28187208

  14. Histone Modifications in a Mouse Model of Early Adversities and Panic Disorder: Role for Asic1 and Neurodevelopmental Genes.

    PubMed

    Cittaro, Davide; Lampis, Valentina; Luchetti, Alessandra; Coccurello, Roberto; Guffanti, Alessandro; Felsani, Armando; Moles, Anna; Stupka, Elia; D' Amato, Francesca R; Battaglia, Marco

    2016-04-28

    Hyperventilation following transient, CO2-induced acidosis is ubiquitous in mammals and heritable. In humans, respiratory and emotional hypersensitivity to CO2 marks separation anxiety and panic disorders, and is enhanced by early-life adversities. Mice exposed to the repeated cross-fostering paradigm (RCF) of interference with maternal environment show heightened separation anxiety and hyperventilation to 6% CO2-enriched air. Gene-environment interactions affect CO2 hypersensitivity in both humans and mice. We therefore hypothesised that epigenetic modifications and increased expression of genes involved in pH-detection could explain these relationships. Medullae oblongata of RCF- and normally-reared female outbred mice were assessed by ChIP-seq for H3Ac, H3K4me3, H3K27me3 histone modifications, and by SAGE for differential gene expression. Integration of multiple experiments by network analysis revealed an active component of 148 genes pointing to the mTOR signalling pathway and nociception. Among these genes, Asic1 showed heightened mRNA expression, coherent with RCF-mice's respiratory hypersensitivity to CO2 and altered nociception. Functional enrichment and mRNA transcript analyses yielded a consistent picture of enhancement for several genes affecting chemoception, neurodevelopment, and emotionality. Particularly, results with Asic1 support recent human findings with panic and CO2 responses, and provide new perspectives on how early adversities and genes interplay to affect key components of panic and related disorders.

  15. Development of CdTe pixel detectors combined with an aluminum Schottky diode sensor and photon-counting ASICs

    NASA Astrophysics Data System (ADS)

    Toyokawa, H.; Saji, C.; Kawase, M.; Wu, S.; Furukawa, Y.; Kajiwara, K.; Sato, M.; Hirono, T.; Shiro, A.; Shobu, T.; Suenaga, A.; Ikeda, H.

    2017-01-01

    We have been developing CdTe pixel detectors combined with a Schottky diode sensor and photon-counting ASICs. The hybrid pixel detector was designed with a pixel size of 200 μ m by 200 μm and an area of 19 mm by 20 mm or 38.2 mm by 40.2 mm. The photon-counting ASIC, SP8-04F10K, has a preamplifier, a shaper, 3-level window-type discriminators and a 24-bits counter in each pixel. The single-chip detector with 100 by 95 pixels successfully operated with a photon-counting mode selecting X-ray energy with the window comparator and stable operation was realized at 20 degrees C. We have performed a feasibility study for a white X-ray microbeam experiment. Laue diffraction patterns were measured during the scan of the irradiated position in a silicon steel sample. The grain boundaries were identified by using the differentials between adjacent images at each position.

  16. ASIC-based architecture for the real-time computation of 2D convolution with large kernel size

    NASA Astrophysics Data System (ADS)

    Shao, Rui; Zhong, Sheng; Yan, Luxin

    2015-12-01

    Bidimensional convolution is a low-level processing algorithm of interest in many areas, but its high computational cost constrains the size of the kernels, especially in real-time embedded systems. This paper presents a hardware architecture for the ASIC-based implementation of 2-D convolution with medium-large kernels. Aiming to improve the efficiency of storage resources on-chip, reducing off-chip bandwidth of these two issues, proposed construction of a data cache reuse. Multi-block SPRAM to cross cached images and the on-chip ping-pong operation takes full advantage of the data convolution calculation reuse, design a new ASIC data scheduling scheme and overall architecture. Experimental results show that the structure can achieve 40× 32 size of template real-time convolution operations, and improve the utilization of on-chip memory bandwidth and on-chip memory resources, the experimental results show that the structure satisfies the conditions to maximize data throughput output , reducing the need for off-chip memory bandwidth.

  17. TRPV1, ASICs and P2X2/3 expressed in bone cells simultaneously regulate bone metabolic markers in ovariectomized mice

    PubMed Central

    Kanaya, K.; Iba, K.; Dohke, T.; Okazaki, S.; Yamashita, T.

    2016-01-01

    Objectives: Nociceptors are expressed at peripheral terminals of neurons. Recent studies have shown that TRPV1, a nociceptor, is expressed in bone tissue and regulates bone metabolism. We have demonstrated that a TRPV1 antagonist improved pain-like behavior in ovariectomized (OVX) mice. The aim of this study was to determine whether nociceptors, including TRPV1, acid-sensing ion channel (ASIC) and P2X2/3 are expressed in bone cells, and to examine the effects of nociceptor antagonists on bone metabolism. Methods: The expression of nociceptors in femoral bone tissue and cultured bone marrow cells in OVX and sham-operated mice were examined. The effects of nociceptor antagonists on the up-regulated expression of bone metabolic markers, Runx2, Osterix, osteocalcin and RANKL, were also examined. Results: TRPV1, ASIC 2 and 3, and P2X2 and 3, were expressed in bone tissue and bone marrow cells, and the expression levels of ASIC1 and 2, and P2X2 were significantly increased in OVX mice in comparison with those in sham mice. Treatment with nociceptor antagonists significantly inhibited the expression of bone metabolic markers in OVX mice. Conclusion: An array of nociceptors, TRPV1, ASICs and P2X2/3, could simultaneously regulate not only increases in skeletal pain but also bone turnover in OVX mice. PMID:27282458

  18. Front-end receiver electronics for high-frequency monolithic CMUT-on-CMOS imaging arrays.

    PubMed

    Gurun, Gokce; Hasler, Paul; Degertekin, F

    2011-08-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for highfrequency intravascular ultrasound imaging. A custom 8-inch (20-cm) wafer is fabricated in a 0.35-μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and SNR. Low-noise and high-gain design of a transimpedance amplifier (TIA) optimized for a forward-looking volumetric-imaging CMUT array element is discussed as a challenging design example. Amplifier gain, bandwidth, dynamic range, and power consumption trade-offs are discussed in detail. With minimized parasitics provided by the CMUT-on-CMOS approach, the optimized TIA design achieves a 90 fA/√Hz input-referred current noise, which is less than the thermal-mechanical noise of the CMUT element. We show successful system operation with a pulseecho measurement. Transducer-noise-dominated detection in immersion is also demonstrated through output noise spectrum measurement of the integrated system at different CMUT bias voltages. A noise figure of 1.8 dB is obtained in the designed CMUT bandwidth of 10 to 20 MHz.

  19. Frontend Receiver Electronics for High Frequency Monolithic CMUT-on-CMOS Imaging Arrays

    PubMed Central

    Gurun, Gokce; Hasler, Paul; Degertekin, F. Levent

    2012-01-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for high-frequency intravascular ultrasound imaging. A custom 8-inch wafer is fabricated in a 0.35 μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and SNR. Low-noise and high-gain design of a transimpedance amplifier (TIA) optimized for a forward-looking volumetric-imaging CMUT array element is discussed as a challenging design example. Amplifier gain, bandwidth, dynamic range and power consumption trade-offs are discussed in detail. With minimized parasitics provided by the CMUT-on-CMOS approach, the optimized TIA design achieves a 90 fA/√Hz input referred current noise, which is less than the thermal-mechanical noise of the CMUT element. We show successful system operation with a pulse-echo measurement. Transducer noise-dominated detection in immersion is also demonstrated through output noise spectrum measurement of the integrated system at different CMUT bias voltages. A noise figure of 1.8 dB is obtained in the designed CMUT bandwidth of 10 MHz to 20 MHz. PMID:21859585

  20. Integrated front-end electronics in a detector compatible process: source-follower and charge-sensitive preamplifier configurations

    NASA Astrophysics Data System (ADS)

    Ratti, Lodovico; Manghisoni, Massimo; Re, Valerio; Speziali, Valeria

    2001-12-01

    This study is concerned with the simulation and design of low-noise front-end electronics monolithically integrated on the same high-resistivity substrate as multielectrode silicon detectors, in a process made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST) of Trento, Italy. The integrated front-end solutions described in this paper use N-channel JFETs as basic elements. The first one is based upon an all-NJFET charge preamplifier designed to match detector capacitances of a few picofarads and available in both a resistive and a non resistive feedback configuration. In the second solution, a single NJFET in the source-follower configuration is connected to the detector, while its source is wired to an external readout channel through an integrated capacitor.

  1. An Integrated Front-End Readout And Feature Extraction System for the BaBar Drift Chamber

    SciTech Connect

    Zhang, Jinlong; /Colorado U.

    2006-08-10

    The BABAR experiment has been operating at SLAC's PEP-II asymmetric B-Factory since 1999. The accelerator has achieved more than three times its original design luminosity of 3 x 10{sup 33} cm{sup -2} s{sup -1}, with plans for an additional factor of three in the next two years. To meet the experiment's performance requirements in the face of significantly higher trigger and background rates, the drift chamber's front-end readout system has been redesigned around the Xilinx Spartan 3 FPGA. The new system implements analysis and feature-extraction of digitized waveforms in the front-end, reducing the data bandwidth required by a factor of four.

  2. Development of a data management front-end for use with a LANDSAT-based information system

    NASA Technical Reports Server (NTRS)

    Turner, B. J.

    1982-01-01

    The development and implementation of a data management front-end system for use with a LANDSAT based information system that facilitates the processsing of both LANDSAT and ancillary data was examined. The final tasks, reported on here, involved; (1) the implementation of the VICAR image processing software system at Penn State and the development of a user-friendly front-end for this system; (2) the implementation of JPL-developed software based on VICAR, for mosaicking LANDSAT scenes; (3) the creation and storage of a mosiac of 1981 summer LANDSAT data for the entire state of Pennsylvania; (4) demonstrations of the defoliation assessment procedure for Perry and Centre Counties, and presentation of the results at the 1982 National Gypsy Moth Review Meeting, and (5) the training of Pennsylvania Bureau of Forestry personnel in the use of the defoliation analysis system.

  3. Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications.

    PubMed

    El-Desouki, Munir M; Qasim, Syed Manzoor; BenSaleh, Mohammed S; Deen, M Jamal

    2015-05-07

    The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN).

  4. A low power front-end architecture for SiPM readout with integrated ADC and multiplexed readout

    NASA Astrophysics Data System (ADS)

    Sacco, I.; Fischer, P.; Ritzert, M.; Peric, I.

    2013-01-01

    Silicon Photo-Multiplier (SiPM) detectors are becoming widely used for optical photon and, in conjunction with suited scintillators, for gamma detection in both medical imaging and particle physics experiments. The spatial resolution can be improved by using smaller SiPMs with a corresponding increase in front-end channels density. The timing resolution of the whole system is a function of the detector parameters and of the characteristics of the front-end electronics. We present a low power front-end readout architecture which allows reading out several SiPMs though a single line in order to maximize the number of SiPMs. The design offers good timing performance and includes a simple charge digitizer in every channel. Four different single-ended channel designs have been designed, submitted for fabrication and characterized electronically and with SiPMs. The timing performance is obtained by using a low input impedance, precise threshold setting of a leading edge discriminator and a programmable input dc potential to set the SiPM HV bias on a channel per channel basis. Programmable low- and high-pass filters should allow reducing baseline fluctuations and noise. A simple ADC is implemented by first integrating the signal current and then discharging it at a constant rate until the baseline is reached again. The current consumption of the single channel is typically less than 10 mA. The time and energy information are sent out on a single wire. In order to keep as low as possible the output cabling the signals from different channels can be multiplexed on the same cable. The processing of these signals (extraction of time, ADC amplitude determination and channel number decoding) is performed by an external FPGA. The overall architecture, the front-end designs, and measurements with SiPMs are presented.

  5. Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications

    PubMed Central

    El-Desouki, Munir M.; Qasim, Syed Manzoor; BenSaleh, Mohammed S.; Deen, M. Jamal

    2015-01-01

    The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN). PMID:25961380

  6. Workshop on physics at the first muon collider and front-end of a muon collider: A brief summary

    SciTech Connect

    Geer, S.

    1998-02-01

    In November 1997 a workshop was held at Fermilab to explore the physics potential of the first muon collider, and the physics potential of the accelerator complex at the `front-end` of the collider. An extensive physics program emerged from the workshop. This paper attempts to summarize this physics program and to identify the main conclusions from the workshop. 14 refs., 1 fig., 5 tabs.

  7. Neural recording front-end IC using action potential detection and analog buffer with digital delay for data compression.

    PubMed

    Liu, Lei; Yao, Lei; Zou, Xiaodan; Goh, Wang Ling; Je, Minkyu

    2013-01-01

    This paper presents a neural recording analog front-end IC intended for simultaneous neural recording with action potential (AP) detection for data compression in wireless multichannel neural implants. The proposed neural recording front-end IC detects the neural spikes and sends only the preserved AP information for wireless transmission in order to reduce the overall power consumption of the neural implant. The IC consists of a low-noise neural amplifier, an AP detection circuit and an analog buffer with digital delay. The neural amplifier makes use of a current-reuse technique to maximize the transconductance efficiency for attaining a good noise efficiency factor. The AP detection circuit uses an adaptive threshold voltage to generate an enable signal for the subsequent functional blocks. The analog buffer with digital delay is employed using a finite impulse response (FIR) filter which preserves the AP waveform before the enable signal as well as provides low-pass filtering. The neural recording front-end IC has been designed using standard CMOS 0.18-µm technology occupying a core area of 220 µm by 820 µm.

  8. Low Noise and Highly Linear Wideband CMOS RF Front-End for DVB-H Direct-Conversion Receiver

    NASA Astrophysics Data System (ADS)

    Nam, Ilku; Moon, Hyunwon; Woo, Doo Hyung

    In this paper, a wideband CMOS radio frequency (RF) front-end for digital video broadcasting-handheld (DVB-H) receiver is proposed. The RF front-end circuit is composed of a single-ended resistive feedback low noise amplifier (LNA), a single-to-differential amplifier, an I/Q down-conversion mixer with linearized transconductors employing third order intermodulation distortion cancellation, and a divide-by-two circuit with LO buffers. By employing a third order intermodulation (IMD3) cancellation technique and vertical NPN bipolar junction transistor (BJT) switching pair for an I/Q down-conversion mixer, the proposed RF front-end circuit has high linearity and low low-frequency noise performance. It is fabricated in a 0.18µm deep n-well CMOS technology and draws 12mA from a 1.8V supply voltage. It shows a voltage gain of 31dB, a noise figure (NF) lower than 2.6dB, and an IIP3 of -8dBm from 470MHz to 862MHz.

  9. A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Monteil, E.; Pacher, L.; Paternò, A.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2016-12-01

    This paper describes a readout ASIC prototype designed by CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64 × 64 matrix of 50 × 50 μ m2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.9% at 3 GHz/cm2 pixel rate, 1 MHz trigger rate with 12.5 μ s latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision and the analog dead-time is below 1%. IP-blocks (DAC, ADC, BandGap, SER, sLVS-TX/RX) and very front ends are silicon proven, irradiated to 600-800Mrad.

  10. A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Paternò, A.; Pacher, L.; Monteil, E.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2017-02-01

    This paper describes a readout ASIC prototype designed by the CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64×64 matrix of 50×50μm2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.5% at 3 GHz/cm2 pixel rate, trigger frequency of 1 MHz and 12.5μsec latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision, analog dead-time below 1%. The chip integrates for the first time many of the components developed by the collaboration in the past, including the Digital-to-Analog converters, Bandgap reference, Serializer, sLVS drivers, and analog Front Ends. Irradiation tests on these components proved their reliability up to 600 Mrad.

  11. ASIC or PIC? Implantable stimulators based on semi-custom CMOS technology or low-power microcontroller architecture.

    PubMed

    Salmons, S; Gunning, G T; Taylor, I; Grainger, S R; Hitchings, D J; Blackhurst, J; Jarvis, J C

    2001-01-01

    To gain a better understanding of the effects of chronic stimulation on mammalian muscles we needed to generate patterns of greater variety and complexity than simple constant-frequency or burst patterns. We describe here two approaches to the design of implantable neuromuscular stimulators that can satisfy these requirements. Devices of both types were developed and used in long-term experiments. The first device was based on a semi-custom Application Specific Integrated Circuit (ASIC). This approach has the advantage that the circuit can be completely tested at every stage of development and production, assuring a high degree of reliability. It has the drawback of inflexibility: the patterns are produced by state machines implemented in silicon, so each new set of patterns requires a fresh production run, which is costly and time-consuming. The second device was based on a commercial microcontroller (Microchip PIC16C84). The functionality of this type of circuit is specified in software rather than in silicon hardware, allowing a single device to be programmed for different functions. With the use of features designed to improve fault-tolerance we found this approach to be as reliable as that based on ASICs. The encapsulated devices can easily be accommodated subcutaneously on the flank of a rabbit and a recent version is small enough to implant into the peritoneal cavity of rats. The current devices are programmed with a predetermined set of 12 patterns before assembly; the desired pattern is selected after implantation with an electronic flash gun. The operating current drain is less than 40 microA.

  12. The front-end electronics of the LSPE-SWIPE experiment

    NASA Astrophysics Data System (ADS)

    Fontanelli, F.; Biasotti, M.; Bevilacqua, A.; Siccardi, F.

    2016-07-01

    The SWIPE detector of the Ballon Borne Mission LSPE (see e.g. the contribution of P. de Bernardis et al. in this conference) intends to measure the primordial 'B-mode' polarization of the Cosmic Microwave Background (CMB). For this scope microwave telescopes need sensitive cryogenic bolometers with an overall equivalent noise temperature in the nK range. The detector is a spiderweb bolometer based on transition edge sensor and followed by a SQUID to perform the signal readout. This contribution will concentrate on the design, description and first tests on the front-end electronics which processes the squid output (and controls it). The squid output is first amplified by a very low noise preamplifier based on a discrete JFET input differential architecture followed by a low noise CMOS operational amplifier. Equivalent input noise density is 0.6 nV/Hz and bandwidth extends up to at least 2 MHz. Both devices (JFET and CMOS amplifier) have been tested at liquid nitrogen. The second part of the contribution will discuss design and results of the control electronics, both the flux locked loop for the squid and the slow control chain to monitor and set up the system will be reviewed.

  13. Monolithically Integrated SiGe/Si PIN-HBT Front-End Transimpedance Photoreceivers

    NASA Technical Reports Server (NTRS)

    Rieh, J.-S.; Qasaimeh, O.; Klotzkin, D.; Lu, L.-H.; Katehi, L. P. B.; Yang, K.; Bhattacharya, P.; Croke, E. T.

    1997-01-01

    The demand for monolithically integrated photoreceivers based on Si-based technology keeps increasing as low cost and high reliability products are required for the expanding commercial market. Higher speed and wider operating frequency range are expected when SiGe/Si heterojunction is introduced to the circuit design. In this paper, a monolithic SiGe/Si PIN-HBT front-end transimpedance photoreceiver is demonstrated for the first time. For this purpose, mesa-type SiGe/Si PIN-HBT technology was developed. Fabricated HBTs exhibit f(sub max) of 34 GHz with DC gain of 25. SiGe/Si PIN photodiodes, which share base and collector layers of HBTs, demonstrate responsivity of 0.3 A/W at lambda=850 nm and bandwidth of 450 MHz. Based on these devices, single- and dual-feedback transimpedance amplifiers were fabricated and they exhibited the bandwidth of 3.2 GHz and 3.3 GHz with the transimpedance gain of 45.2 dB(Omega) and 47.4 dB(Omega) respectively. Monolithically integrated single-feedback PIN-HBT photoreceivers were implemented and the bandwidth was measured to be approx. 0.5 GHz, which is limited by the bandwidth of PIN photodiodes.

  14. A front-end readout Detector Board for the OpenPET electronics system.

    PubMed

    Choong, W-S; Abu-Nimeh, F; Moses, W W; Peng, Q; Vu, C Q; Wu, J-Y

    2015-08-01

    We present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. This digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.

  15. A front-end readout Detector Board for the OpenPET electronics system

    DOE PAGES

    Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.; ...

    2015-08-12

    Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, whichmore » allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.« less

  16. A front-end readout Detector Board for the OpenPET electronics system

    SciTech Connect

    Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.; Peng, Q.; Vu, C. Q.; Wu, J. -Y.

    2015-08-12

    Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.

  17. Simulation of InP-based monolithically integrated PIN-HEMT front-end optical receiver

    NASA Astrophysics Data System (ADS)

    Xie, Sheng; Chen, Chao; Bian, Jian-Tao

    2005-01-01

    Model is developed for the dc I-V characteristics and microwave small-signal parameters of the InP-based In0.52Al0.28As/In0.65Ga0.35As HEMT"s based on physical principles, and the effect of the extrinsic source and drain resistances has also been included. Using the parameters obtained by this model and the small-signal model of PIN detector, we simulated the transimpedance configurations with an inverter and a cascode input circuit of monolithically integrated PIN-HEMT front-end optical receiver. The results indicate that the cascode input stage can realize a smaller input capacitance than the inverter-type, so it has a wider bandwidth. In order to operate in 2.5Gb/s transmission system, the cascode input stage is applied and the parameters are optimized. The simulations reveal that the transimpedance gain is larger than 63.2dBΩ and the sensitivity is 30dBm when the bit rate is 2.5Gb/s. The results obtained in this paper provide a guideline for the fabrication of PIN-HEMT optical receiver.

  18. Off-line front-end safety control system for the SPES project at the LNL

    NASA Astrophysics Data System (ADS)

    Vasquez, J.; Andrighetto, A.; Costa, L.; Bassato, G.; Giacchini, M.

    2012-02-01

    The off-line front-end apparatus of the Selective Production of Exotic Species (SPES) project, developed at the Laboratori Nazionali di Legnaro (LNL) in Italy, involves a number of subsystems and procedures that are potentially dangerous for both human operators and equipments. Among the most potentially dangerous systems are: the high voltage power supply, the ion source complex power supplies, the target chamber handling mechanisms and the laser source. In order to prevent possible injuries to the operators and damages to the equipments, a safety interlock system and logic monitoring have been developed, tested and are now in operation. The solution is based on Schneider Electrics Preventa family safety modules with capability to control the power supplied to critical subsystems in conjunction with safety detectors for critical variable monitoring. Moreover, a Programmable Logic Controller (PLC),model BMXP342020 from the Schneider Electrics Modicon M340 family, is used to monitor the status of the system as well as to control the sequence of preestablished operations. With the aim to have a user friendly system, a Human Machine Interface (HMI) have been developed using a touch screen model XBTGT5330 from the Schneider Electrics Magelis family, driven by the PLC.

  19. A dual slope charge sampling analog front-end for a wireless neural recording system.

    PubMed

    Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit; Ghovanloo, Maysam

    2014-01-01

    This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.

  20. FPGA-Based Front-End Electronics for Positron Emission Tomography.

    PubMed

    Haselman, Michael; Dewitt, Don; McDougald, Wendy; Lewellen, Thomas K; Miyaoka, Robert; Hauck, Scott

    2009-02-22

    Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA's low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for positron emission tomography (PET) scanners. Our laboratory is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this next generation scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilizes to add significant signal processing power to produce higher resolution images. In this paper two such processes, sub-clock rate pulse timing and event localization, will be discussed in detail. We show that timing performed in the FPGA can achieve a resolution that is suitable for small-animal scanners, and will outperform the analog version given a low enough sampling period for the ADC. We will also show that the position of events in the scanner can be determined in real time using a statistical positioning based algorithm.

  1. A front-end readout Detector Board for the OpenPET electronics system

    NASA Astrophysics Data System (ADS)

    Choong, W.-S.; Abu-Nimeh, F.; Moses, W. W.; Peng, Q.; Vu, C. Q.; Wu, J.-Y.

    2015-08-01

    We present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is ``time stamped'' by a time-to-digital converter (TDC) implemented inside the FPGA . This digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.

  2. Advances in Front-end Enabling Technologies for Thermal Infrared ` THz Torch' Wireless Communications

    NASA Astrophysics Data System (ADS)

    Hu, Fangjing; Lucyszyn, Stepan

    2016-09-01

    The thermal (emitted) infrared frequency bands (typically 20-40 and 60-100 THz) are best known for remote sensing applications that include temperature measurement (e.g. non-contacting thermometers and thermography), night vision and surveillance (e.g. ubiquitous motion sensing and target acquisition). This unregulated part of the electromagnetic spectrum also offers commercial opportunities for the development of short-range secure communications. The ` THz Torch' concept, which fundamentally exploits engineered blackbody radiation by partitioning thermally generated spectral radiance into pre-defined frequency channels, was recently demonstrated by the authors. The thermal radiation within each channel can be independently pulse-modulated, transmitted and detected, to create a robust form of short-range secure communications within the thermal infrared. In this paper, recent progress in the front-end enabling technologies associated with the THz Torch concept is reported. Fundamental limitations of this technology are discussed; possible engineering solutions for further improving the performance of such thermal-based wireless links are proposed and verified either experimentally or through numerical simulations. By exploring a raft of enabling technologies, significant enhancements to both data rate and transmission range can be expected. With good engineering solutions, the THz Torch concept can exploit nineteenth century physics with twentieth century multiplexing schemes for low-cost twenty-first century ubiquitous applications in security and defence.

  3. The Front-End Electronics for the HADES RPC Wall (ESTRELA-FEE)

    NASA Astrophysics Data System (ADS)

    Belver, D.; Garzón, J. A.; Gil, A.; González-Díaz, D.; Koenig, W.; Lange, S.; Marín, J.; Montes, N.; Skott, P.; Traxler, M.; Zapata, M.

    2006-08-01

    A new front-end electronics (FEE) system for RPC timing measurements has been developed for the ESTRELA project, which is part of the upgrade of the HADES experiment at GSI. The RPCs will cover an area of 8 m 2 with 2048 electronic channels. The chain consists on 2 boards: a 4-channel daughterboard (DB) and a 32-channel motherboard (MB). The DB uses a fast 2 GHz amplifier that feeds a discriminator with a constant threshold and an operational amplifier for a charge measurement by a Time-Over-Threshold (ToT) method for the integrated signal (for a slewing correction). The MB is connected to 8 DB, and provides voltage regulation, DACs for signal thresholds and a trigger logic. The MB delivers the differential output signals to an external HPTDC chip. Results are presented for (a) narrow electronic test pulses and for (b) RPC signals from gamma photons, showing a timing jitter around 15 ps/channel (for pulses above 100 fC) and 30-40 ps/channel, respectively. Tests with coincidently firing channels reveal levels of cross-talk below a 1% for a threshold of 25 fC, with a degradation of the time resolution of 10 ps at most.

  4. Front-End electronics development for the new Resistive Plate Chamber detector of HADES

    NASA Astrophysics Data System (ADS)

    Gil, A.; Belver, D.; Cabanelas, P.; Díaz, J.; Garzón, J. A.; González-Díaz, D.; Koenig, W.; Lange, J. S.; Marín, J.; Montes, N.; Skott, P.; Traxler, M.

    2007-11-01

    In this paper we present the new RPC wall, which is being installed in the HADES detector at Darmstadt GSI. It consists of time-of-flight (TOF) detectors used for both particle identification and triggering. Resistive Plate Chamber (RPC) detectors are becoming widely used because of their excellent TOF capabilities and reduced cost. The wall will contain 1024 RPC modules, covering an active area of around 7 m2, replacing the old TOFino detector at the low polar angle region. The excellent TOF and good charge resolutions of the new detector will improve the time resolution to values better than 100 ps. The Front-End electronics for the readout of the RPC signals is implemented with two types of boards to satisfy the space constraints: the Daughterboards are small boards that amplify the low level signals from the detector and provide fast discriminators for time of flight measurements, as well as an integrator for charge measurements. The Motherboard provides stable DC voltages and a stable ground, threshold DACs for the discriminators, multiplicity trigger and impedance matched paths for transfer of time window signals that contain information about time and charge. These signals are sent to a custom TDC board that label each event and send data through Ethernet to be conveniently stored.

  5. Wide Dynamic Range Front-end Electronics for Beam Current and Position Measurement

    SciTech Connect

    Rawnsley, W. R.; Potter, R. J.; Verzilov, V. A.; Root, L.

    2006-11-20

    An Analog Devices log detector, AD8306, and a Digital Signal Processor (DSP), ADSP-21992, have been found useful for building wide dynamic range, accurate and inexpensive front-end electronics to measure and process the RF signals from TRIUMF's beam monitors. The high-precision log detector has a useful dynamic range of over 100 dB. The 160 MHz mixed-signal DSP is used to digitize the log detector output, linearize it via a lookup table, perform temperature compensation, and remove the variable duty cycle 1 kHz pulse structure of the beam. This approach has been applied to two types of devices in a 500 MeV proton beamline. The 0.1% DC to CW total current monitor is based on a capacitive pickup resonant at 46.11 MHz, the second harmonic of the bunch frequency. The DSP software provides low pass filtering, calculates the antilog of the data and passes the output to a CAMAC input register. The BPM electronics process data from inductive pickup loops. The DSP controls a GaAs switch which multiplexes signals from four adjacent pickups to a single log detector. The DSP performs difference-over-sum or log-ratio data analysis along with averaging over an arbitrary number of samples.

  6. CMS hadron calorimeter front-end upgrade for SLHC phase I

    SciTech Connect

    Whitmore, Juliana; /Fermilab

    2009-09-01

    We present an upgrade plan for the CMS HCAL detector. The HCAL upgrade is required for the increased luminosity (3 * 10E34) of SLHC Phase I which is targeted for 2014. A key aspect of the HCAL upgrade is to add longitudinal segmentation to improve background rejection, energy resolution, and electron isolation at the L1 trigger. The increased segmentation is achieved by replacing the hybrid photodiodes (HPDs) with silicon PMTs (SIPMs). We plan to instrument each fiber of the calorimeter with an SIPM (103,000 total). We will then electrically sum outputs from selected SIPMs to form the longitudinal readout segments. In addition to having more longitudinal information, the upgrade plans include a new custom ADC with matched sensitivity and timing information. The increased data volume requires higher speed transmitters and the additional power dissipation for the readout electronics requires better thermal design, since much of the on-detector infrastructure (front-end electronics crates, cooling pipes, optical fiber plant, etc.) will remain the same. We will report on the preliminary designs for these upgraded systems, along with performance requirements and initial design studies.

  7. A front-end readout Detector Board for the OpenPET electronics system

    PubMed Central

    Choong, W.-S.; Abu-Nimeh, F.; Moses, W.W.; Peng, Q.; Vu, C.Q.; Wu, J.-Y.

    2016-01-01

    We present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is “time stamped” by a time-to-digital converter (TDC) implemented inside the FPGA. This digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc. PMID:27134641

  8. Towards Optimal Filtering on ARM for ATLAS Tile Calorimeter Front-End Processing

    NASA Astrophysics Data System (ADS)

    Cox, Mitchell A.

    2015-10-01

    The Large Hadron Collider at CERN generates enormous amounts of raw data which presents a serious computing challenge. After planned upgrades in 2022, the data output from the ATLAS Tile Calorimeter will increase by 200 times to over 40 Tb/s. Advanced and characteristically expensive Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs) are currently used to process this quantity of data. It is proposed that a cost- effective, high data throughput Processing Unit (PU) can be developed by using several ARM System on Chips in a cluster configuration to allow aggregated processing performance and data throughput while maintaining minimal software design difficulty for the end-user. ARM is a cost effective and energy efficient alternative CPU architecture to the long established x86 architecture. This PU could be used for a variety of high-level algorithms on the high data throughput raw data. An Optimal Filtering algorithm has been implemented in C++ and several ARM platforms have been tested. Optimal Filtering is currently used in the ATLAS Tile Calorimeter front-end for basic energy reconstruction and is currently implemented on DSPs.

  9. Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.

    PubMed

    Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M

    2012-07-01

    There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.

  10. An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End

    PubMed Central

    Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

    2015-01-01

    An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP). PMID:27069422

  11. A front-end wafer-level microsystem packaging technique with micro-cap array

    NASA Astrophysics Data System (ADS)

    Chiang, Yuh-Min

    2002-09-01

    The back-end packaging process is the remaining challenge for the micromachining industry to commercialize microsystem technology (MST) devices at low cost. This dissertation presents a novel wafer level protection technique as a final step of the front-end fabrication process for MSTs. It facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array, which consists of an assortment of small caps micro-molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments during packaging. The micro-cap array is first constructed by a micromachining process with micro-molding technique, then sealed to the device wafer at wafer level. Epoxy-based wafer-level micro cap array has been successfully fabricated and showed good compatibility with conventional back-end packaging processes. An adhesive transfer technique was demonstrated to seal the micro cap array with a MEMS device wafer. No damage or gross leak was observed while wafer dicing or later during a gross leak test. Applications of the micro cap array are demonstrated on MEMS, microactuators fabricated using CRONOS MUMPS process. Depending on the application needs, the micro-molded cap can be designed and modified to facilitate additional component functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. Successful fabrication of a micro cap array comprised with microlenses can provide active functions as well as passive protection. An optical tweezer array could be one possibility for applications of a micro cap with microlenses. The micro cap itself could serve as micro well for DNA or bacteria amplification as well.

  12. Silicon Photomultipliers and front-end electronics performance for Cherenkov Telescope Array camera development

    NASA Astrophysics Data System (ADS)

    Ambrosi, G.; Bissaldi, E.; Giglietto, N.; Giordano, F.; Ionica, M.; Paoletti, R.; Rando, R.; Simone, D.; Vagelli, V.

    2017-02-01

    In the last few years a number of efforts have been undertaken to develop new technology related to Silicon Photomultipliers (SiPMs). These photosensors consist of an array of identical Avalanche Photodiodes operating in Geiger mode and connected in parallel to a single output. The Italian Institute of Nuclear Physics (INFN) is involved in the R&D program Progetto Premiale Telescopi CHErenkov made in Italy (TECHE.it) to develop photosensors for a SiPM based camera that will be part of the Cherenkov Telescope Array (CTA) observatory. In this framework tests are ongoing on innovative devices suitable to detect Cherenkov light in the blue and near-UV wavelength region, the so-called Near Ultra-Violet Silicon Photomultipliers (NUV SiPMs). The tests on photosensors produced by Fondazione Bruno Kessler (FBK) are revealing promising performance: low operating voltage, capability to detect very low intensity light down to a single photon and high Photo Detection Efficiency (PDE) in the range 390-410 nm. In particular the developed device is a High Density NUV-SiPM (NUV-HD SiPM) based on a micro-cell of 30 μm×30 μm and 6 mm×6 mm area. Tests on this detector in single-cell configuration and in a matrix arrangement have been done. At the same time front-end electronics based on the waveform sampling technique optimized for the new NUV-HD SIPMs is under study and development.

  13. Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

    PubMed Central

    Valente, Virgilio; Demosthenous, Andreas

    2016-01-01

    This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm2, is capable of an operational bandwidth of 8 MHz and a linear gain in the range between −6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μA. Each CR channel occupies an area of 0.21 mm2. The chip consumes between 530 μA and 690 μA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis. PMID:27463721

  14. An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End.

    PubMed

    Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

    2016-01-15

    An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm(2) and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP).

  15. Development of Formulations for a-SiC and Manganese CMP and Post-CMP Cleaning of Cobalt

    NASA Astrophysics Data System (ADS)

    Lagudu, Uma Rames Krishna

    We have investigated the chemical mechanical polishing (CMP) of amorphous SiC (a-SiC) and Mn and Post CMP cleaning of cobalt for various device applications. During the manufacture of copper interconnects using the damascene process the polishing of copper is followed by the polishing of the barrier material (Co, Mn, Ru and their alloys) and its post CMP cleaning. This is followed by the a-SiC hard mask CMP. Silicon carbide thin films, though of widespread use in microelectronic engineering, are difficult to process by CMP because of their hardness and chemical inertness. The earlier part of the SiC work discusses the development of slurries based on silica abrasives that resulted in high a-SiC removal rates (RRs). The ionic strength of the silica dispersion was found to play a significant role in enhancing material removal rate, while also providing very good post-polish surface-smoothness. For example, the addition of 50 mM potassium nitrate to a pH 8 aqueous slurry consisting of 10 wt % of silica abrasives and 1.47 M hydrogen peroxide increased the RR from about 150 nm/h to about 2100 nm/h. The role of ionic strength in obtaining such high RRs was investigated using surface zeta-potentials measurements and X-ray photoelectron spectroscopy (XPS). Evidently, hydrogen peroxide promoted the oxidation of Si and C to form weakly adhered species that were subsequently removed by the abrasive action of the silica particles. The effect of potassium nitrate in increasing material removal is attributed to the reduction in the electrostatic repulsion between the abrasive particles and the SiC surface because of screening of surface charges by the added electrolyte. We also show that transition metal compounds when used as additives to silica dispersions enhance a-SiC removal rates (RRs). Silica slurries containing potassium permanganate gave RRs as high as 2000 nm/h at pH 4. Addition of copper sulfate to this slurry further enhanced the RRs to ˜3500 nm/h at pH 6

  16. Development of a low-noise, 4th-order readout ASIC for CdZnTe detectors in gamma spectrometer applications

    NASA Astrophysics Data System (ADS)

    Wang, Jia; Su, Lin; Wei, Xiaomin; Zheng, Ran; Hu, Yann

    2016-09-01

    This paper presents an ASIC readout circuit development, which aims to achieve low noise. In order to compensate the leakage current and improve gain, a dual-stage CSA has been utilized. A 4th-order high-linearity shaper is proposed to obtain a Semi-Gaussian wave and further decrease the noise induced by the leakage current. The ASIC has been designed and fabricated in a standard commercial 2P4M 0.35 μm CMOS process. Die area of one channel is about 1190 μm×147 μm. The input charge range is 1.8 fC. The peaking time can be adjusted from 1 μs to 3 μs. Measured ENC is about 55e- (rms) at input capacitor of 0 F. The gain is 271 mV/fC at the peaking time of 1 μs.

  17. Single Event Effects Test Results for the Actel ProASIC Plus and Altera Stratix-II Field Programmable Gate Arrays

    NASA Technical Reports Server (NTRS)

    Allen, Gregory R.; Swift, Gary M.

    2006-01-01

    This work describes radiation testing of Actel's ProASIC Plus and Altera's Stratix-II FPGAs. The Actel Device Under Test (DUT) was a ProASIC Plus APA300-PQ208 nonvolatile, field reprogrammable device which is based on a 0.22micron flash-based LVCMOS technology. Limited investigation has taken place into flash based FPGA technologies, therefore this test served as a preliminary reference point for various SEE behaviors. The Altera DUT was a Stratix-II EP2S60F1020C4. Single Event Upset (SEU) and Single Event Latchup (SEL) were the focus of these studies. For the Actel, a latchup test was done at an effective LET of 75.0 MeV-sq cm/mg at room temperature, and no latchup was detected when irradiated to a total fluence of 1 x 10(exp 7) particles/sq cm. The Altera part was shown to latchup at room temperature.

  18. Sour Ageusia in Two Individuals Implicates Ion Channels of the ASIC and PKD Families in Human Sour Taste Perception at the Anterior Tongue

    PubMed Central

    Huque, Taufiqul; Cowart, Beverly J.; Dankulich-Nagrudny, Luba; Pribitkin, Edmund A.; Bayley, Douglas L.; Spielman, Andrew I.; Feldman, Roy S.; Mackler, Scott A.; Brand, Joseph G.

    2009-01-01

    Background The perception of sour taste in humans is incompletely understood at the receptor cell level. We report here on two patients with an acquired sour ageusia. Each patient was unresponsive to sour stimuli, but both showed normal responses to bitter, sweet, and salty stimuli. Methods and Findings Lingual fungiform papillae, containing taste cells, were obtained by biopsy from the two patients, and from three sour-normal individuals, and analyzed by RT-PCR. The following transcripts were undetectable in the patients, even after 50 cycles of amplification, but readily detectable in the sour-normal subjects: acid sensing ion channels (ASICs) 1a, 1β, 2a, 2b, and 3; and polycystic kidney disease (PKD) channels PKD1L3 and PKD2L1. Patients and sour-normals expressed the taste-related phospholipase C-β2, the δ-subunit of epithelial sodium channel (ENaC) and the bitter receptor T2R14, as well as β-actin. Genomic analysis of one patient, using buccal tissue, did not show absence of the genes for ASIC1a and PKD2L1. Immunohistochemistry of fungiform papillae from sour-normal subjects revealed labeling of taste bud cells by antibodies to ASICs 1a and 1β, PKD2L1, phospholipase C-β2, and δ-ENaC. An antibody to PKD1L3 labeled tissue outside taste bud cells. Conclusions These data suggest a role for ASICs and PKDs in human sour perception. This is the first report of sour ageusia in humans, and the very existence of such individuals (“natural knockouts”) suggests a cell lineage for sour that is independent of the other taste modalities. PMID:19812697

  19. Energy resolution and power consumption of Timepix detector for different detector settings and saturation of front-end electronics

    NASA Astrophysics Data System (ADS)

    Kroupa, M.; Hoang, S.; Stoffle, N.; Soukup, P.; Jakubek, J.; Pinsky, L. S.

    2014-05-01

    An ongoing research project in the area of radiation monitoring employing the Timepix technology from the CERN-based Medipix2 Collaboration profits greatly from optimizing the precision of the position and energy information obtained for the detected quanta. Wider applications of the Timepix technology as a radiation monitor also puts new demands on the precision and speed of the energy calibration. We compare the analog signal in pixel front-end electronics for different sources used during detector evaluation and energy calibration. We use the direct measurement of the analog signal from the pixel preamplifier and comparator to characterize pulse shape differences for different sources, e.g. internal test pulses, external test pulses, ionizing radiation, etc. and study their interchangeability. Accurate per-pixel energy calibration of the Timepix detector enables the direct measurement of the energy deposited by different types of ionizing radiation. The energy calibration process requires the application of a known charge to front-end electronics of each pixel. The small pixel size limits use of the radioactive sources. The 59.54 keV line from 241Am is commonly used as the highest point in calibration curve. The heavy ion dosimetry as encountered in the space radiation environment requires a considerable extrapolation to the energies in the MeV range. We have observed that for energies around and beyond 1 MeV the response of the Timepix's front-end electronics no longer follows the extrapolated calibration function. We have investigated this non-linearity and identified its source. We also propose both hardware and software solutions to suppress this effect. In this paper we show the impact on pixel calibration and the subsequent energy resolution for different detector settings as well as the resulting power consumptions. We discuss the parameter optimization for several different real-world applications.

  20. 10 to 40 GHz Superheterodyne Receiver Frontend in 0.13 µm SiGe BiCMOS Technology

    NASA Astrophysics Data System (ADS)

    Abdeen, Hebat-Allah Yehia; Yuan, Shuai; Schumacher, Hermann; Ziegler, Volker; Meusling, Askold; Feldle, Peter

    2017-03-01

    A fully integrated 10-40 GHz superheterodyne receiver frontend using a 40-46 GHz IF is presented. The frontend consists of a differential low noise amplifier, a fully differential mixer, a single-ended frequency quadrupler and a transformer-based balun followed by an amplifier to convert the quadrupler's single-ended output to a differential signal to drive the LO port of the mixer. The circuit is designed and fabricated in a 250 GHz fT SiGe BiCMOS technology. The chip was characterized on-wafer single-endedly. The frontend achieves a differential conversion gain of 17-20 dB and an input-referred 1 dB compression point of -16 to -20 dBm across the desired IF bandwidth.

  1. Custom single-photon avalanche diode with integrated front-end for parallel photon timing applications.

    PubMed

    Cammi, C; Panzeri, F; Gulinatti, A; Rech, I; Ghioni, M

    2012-03-01

    Emerged as a solid state alternative to photo multiplier tubes (PMTs), single-photon avalanche diodes (SPADs) are nowadays widely used in the field of single-photon timing applications. Custom technology SPADs assure remarkable performance, in particular a 10 counts/s dark count rate (DCR) at low temperature, a high photon detection efficiency (PDE) with a 50% peak at 550 nm and a 30 ps (full width at half maximum, FWHM) temporal resolution, even with large area devices, have been obtained. Over the past few years, the birth of novel techniques of analysis has led to the parallelization of the measurement systems and to a consequent increasing demand for the development of monolithic arrays of detectors. Unfortunately, the implementation of a multidimensional system is a challenging task from the electrical point of view; in particular, the avalanche current pick-up circuit, used to obtain the previously reported performance, has to be modified in order to enable high parallel temporal resolution, while minimizing the electrical crosstalk probability between channels. In the past, the problem has been solved by integrating the front-end electronics next to the photodetector, in order to reduce the parasitic capacitances and consequently the filtering action on the current signal of the SPAD, leading to an improvement of the timing jitter at higher threshold. This solution has been implemented by using standard complementary metal-oxide-semiconductor (CMOS) technologies, which, however, do not allow a complete control on the SPAD structure; for this reason the intrinsic performance of CMOS SPADs, such as DCR, PDE, and afterpulsing probability, are worse than those attainable with custom detectors. In this paper, we propose a pixel architecture, which enables the development of custom SPAD arrays in which every channel maintains the performance of the best single photodetector. The system relies on the integration of the timing signal pick-up circuit next to the

  2. Measurement of SEU cross sections in the CDF SVX3 ASIC using 63 MeV protons

    NASA Astrophysics Data System (ADS)

    Grim, G. P.; Bishai, M.; Gay, C.; Hill, C.; Nahn, S.; Pellett, D. E.; Pope, G.; Shepard, P. F.; Slaughter, A. J.; Webster, W. C., III

    2000-06-01

    The single event upset (SEU) cross section has been measured for 63 MeV protons incident on static memory cells in the CDF SVX3 pipelined silicon strip readout ASIC. The device was fabricated in the Honeywell 0.8 μm RICMOS IV bulk process, and contains a number of cells with minimum gate length transistors to control the mode of operation of the chip. Cross sections per cell of (4.4±1.8)×10 -16 cm2, (2.1±0.7)×10 -15 cm2, and (3.9±0.9)×10 -15 cm2 were measured for angles of incidence of 0°, 45°, and 80°, respectively, for cells with 0.8 μm gate length. The SVX3 SEU rate in Run II at the Fermilab Tevatron was estimated to be sufficiently low that it would not affect the performance of the CDF Silicon Tracker.

  3. ASICs Approach for the Implementation of a Symmetric Triangular Fuzzy Coprocessor and Its Application to Adaptive Filtering

    NASA Technical Reports Server (NTRS)

    Starks, Scott; Abdel-Hafeez, Saleh; Usevitch, Bryan

    1997-01-01

    This paper discusses the implementation of a fuzzy logic system using an ASICs design approach. The approach is based upon combining the inherent advantages of symmetric triangular membership functions and fuzzy singleton sets to obtain a novel structure for fuzzy logic system application development. The resulting structure utilizes a fuzzy static RAM to store the rule-base and the end-points of the triangular membership functions. This provides advantages over other approaches in which all sampled values of membership functions for all universes must be stored. The fuzzy coprocessor structure implements the fuzzification and defuzzification processes through a two-stage parallel pipeline architecture which is capable of executing complex fuzzy computations in less than 0.55us with an accuracy of more than 95%, thus making it suitable for a wide range of applications. Using the approach presented in this paper, a fuzzy logic rule-base can be directly downloaded via a host processor to an onchip rule-base memory with a size of 64 words. The fuzzy coprocessor's design supports up to 49 rules for seven fuzzy membership functions associated with each of the chip's two input variables. This feature allows designers to create fuzzy logic systems without the need for additional on-board memory. Finally, the paper reports on simulation studies that were conducted for several adaptive filter applications using the least mean squared adaptive algorithm for adjusting the knowledge rule-base.

  4. Design Implementation and Testing of a VLSI High Performance ASIC for Extracting the Phase of a Complex Signal

    NASA Astrophysics Data System (ADS)

    Altmeyer, Ronald C.

    2002-09-01

    This thesis documents the research, circuit design, and simulation testing of a VLSI (Very Large Scale Integration) ASIC which extracts phase angle information from a complex sampled signal using the arctangent relationship: (phi=tan/-1 (Q/1). Specifically, the circuit will convert the In-Phase and Quadrature terms into their corresponding phase angle. The design specifications were to implement the design in CMOS (Complementary Metal Oxide Semiconductors) technology with a minimum transistor count and ability to operate at a clock frequency of 700 MHz. Research on the arctangent function was performed to determine mathematical calculation methods and the CORDIC method was chosen to achieve the stated design specifications. MATLAB simulations were used to calculate and verify accuracy and to implement Quine-McClusky logic minimization. T-SPICE netlists were generated and simulations were run to determine transistor and circuit electrical operation and timing. Finally, overall circuit logic functionality of all possible input combinations was completed using a VHDL (VHSIC(Very High Speed Integrated Circuit) Hardware Description Language) simulation program.

  5. The Giga Bit Transceiver based Expandable Front-End (GEFE)—a new radiation tolerant acquisition system for beam instrumentation

    NASA Astrophysics Data System (ADS)

    Barros Marin, M.; Boccardi, A.; Donat Godichal, C.; Gonzalez, J. L.; Lefevre, T.; Levens, T.; Szuk, B.

    2016-02-01

    The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multi-purpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.

  6. An Ultra Low Power and Variation Tolerant GEN2 RFID Tag Front-End with Novel Clock-Free Decoder

    NASA Astrophysics Data System (ADS)

    Kim, Sung-Jin; Cho, Minchang; Cho, Seonghwan

    In this paper, an ultra low power analog front-end for EPCglobal Class 1 Generation 2 RFID tag is presented. The proposed RFID tag removes the need for high frequency clock and counters used in conventional tags, which are the most power hungry blocks. The proposed clock-free decoder employs an analog integrator with an adaptive current source that provides a uniform decoding margin regardless of the data rate and a link frequency extractor based on a relaxation oscillator that generates frequency used for backscattering. A dual supply voltage scheme is also employed to increase the power efficiency of the tag. In order to improve the tolerance of the proposed circuit to environmental variations, a self-calibration circuit is proposed. The proposed RFID analog front-end circuit is designed and simulated in 0.25µm CMOS, which shows that the power consumption is reduced by an order magnitude compared to the conventional RFID tags, without losing immunity to environmental variations.

  7. Enabling compact MMIC-based frontends for millimeter-wave imaging radar and radiometry at 94 and 210 GHz

    NASA Astrophysics Data System (ADS)

    Kallfass, Ingmar; Tessmann, Axel; Leuther, Arnulf; Kuri, Michael; Riessle, Markus; Zink, Martin; Massler, Hermann; Schlechtweg, Michael; Ambacher, Oliver

    2008-10-01

    We report on MMIC-based analog frontend components for imaging radar and radiometry at high millimeter-wave frequencies. The MMICs are realized in our metamorphic HEMT technology. In W-band, the focus is on analog frontends with multi-pixel capability. A compact four-channel receiver module based on four single-chip heterodyne receiver MMICs achieves a noise figure of 4.2 dB and a conversion gain of 7 dB. A W-band five-to-one switch MMIC with less than 3.5 dB insertion loss addresses four antenna ports and uses an integrated reference termination for pixel normalization. Both components operate in a frequency range from 75 to 100 GHz, making them suitable for broadband imaging systems with high geometrical resolution. After an overview of MMIC amplifier performance over the entire millimeter-wave frequency range, we present a chip set for imaging radar at 210 GHz, comprising linear and frequency-translating circuits.

  8. A SAR-ADC using unit bridge capacitor and with calibration for the front-end electronics of PET imaging

    NASA Astrophysics Data System (ADS)

    Liu, Wei; Wei, Tingcun; Li, Bo; Yang, Lifeng; Xue, Feifei; Hu, Yongcai

    2016-05-01

    This paper presents a 12-bit 1 MS/s successive approximation register-analog to digital converter (SAR-ADC) for the 32-channel front-end electronics of CZT-based PET imaging system. To reduce the capacitance mismatch, instead of the fractional capacitor, the unit capacitor is used as the bridge capacitor in the split-capacitor digital to analog converter (DAC) circuit. In addition, in order to eliminate the periodical DNL errors of -1 LSB which often exists in the SAR-ADC using the charge-redistributed DAC, a calibration algorithm is proposed and verified by the experiments. The proposed 12-bit 1 MS/s SAR-ADC is designed and implemented using a 0.35 μm CMOS technology, it occupies only an active area of 986×956 μm2. The measurement results show that, at the power supply of 3.3/5.0 V and the sampling rate of 1 MS/s, the ADC with calibration has a signal-to-noise-and-distortion ratio (SINAD) of 67.98 dB, the power dissipation of 5 mW, and a figure of merit (FOM) of 2.44 pJ/conv.-step. This ADC is with the features of high accuracy, low power and small layout area, it is especially suitable to the one-chip integration of the front-end readout electronics.

  9. Real time access to commercial microwave link data: Details of the data acquisition software, the database and its web frontend

    NASA Astrophysics Data System (ADS)

    Keis, Felix; Chwala, Christian; Kunstmann, Harald

    2015-04-01

    Using commercial microwave link networks for precipitation estimation has become popular in the last years. Acquiring the necessary data from the network operators is however still difficult. Usually, data is provided to researches with large temporal delay and at irregular basis. Driven by the demand to facilitate this data accessibility, a custom acquisition software for microwave links has been developed in joint cooperation with our industry partner Ericsson. It is capable of recording data from a great number of microwave links simultaneously and of forwarding the data instantaneously to a newly established KIT-internal database. It makes use of the Simple Network Management Protocol (SNMP) and collects the transmitter and receiver power levels via asynchronous SNMP requests. The software is currently in its first operational test phase, recording data from several hundred Ericsson microwave links in southern Germany. Furthermore the software is used to acquire data with 1 Hz temporal resolution from four microwave links operated by the skiing resort in Garmisch-Partenkirchen. For convenient accessibility of this amount of data we have developed a web frontend for the emerging microwave link database. It provides dynamic real time visualization and basic processing of the recorded transmitter and receiver power levels. Here we will present details of the custom data acquisition software with focus on the design of the KIT microwave link database and on the specifically developed web frontend.

  10. A pipelined multiranging integrator and encoder ASIC for fast digitization of photomultiplier tube signals

    SciTech Connect

    Yarema, R.J.; Foster, G.W.; Hoff, J.; Sarraj, M.; Zimmerman, T.

    1992-05-01

    A new full custom chip is being designed using the Orbit 2 micron BiCMOS'' process to provide a wide range fast digital readout of Photomultiplier Tubes. The goal is to obtain a digitized PMT signal with a 18--20 bit dynamic range and 8 bits of accuracy in a floating point number format every 16 ns. The chip is DC coupled to a PMT and uses a four-way gated integrator and encoder to form a 4 bit binary number which is the exponent of the floating point number. Simultaneous processing of the PMT signal on binary weighted scales provides a pipelined analog signal to a single FADC which generates the floating point number mantissa. The current state of development of this new chip and results from several test chips are presented in this paper. 3 refs.

  11. A pipelined multiranging integrator and encoder ASIC for fast digitization of photomultiplier tube signals

    SciTech Connect

    Yarema, R.J.; Foster, G.W.; Hoff, J.; Sarraj, M.; Zimmerman, T.

    1992-05-01

    A new full custom chip is being designed using the Orbit 2 micron ``BiCMOS`` process to provide a wide range fast digital readout of Photomultiplier Tubes. The goal is to obtain a digitized PMT signal with a 18--20 bit dynamic range and 8 bits of accuracy in a floating point number format every 16 ns. The chip is DC coupled to a PMT and uses a four-way gated integrator and encoder to form a 4 bit binary number which is the exponent of the floating point number. Simultaneous processing of the PMT signal on binary weighted scales provides a pipelined analog signal to a single FADC which generates the floating point number mantissa. The current state of development of this new chip and results from several test chips are presented in this paper. 3 refs.

  12. Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

    PubMed

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

    2014-02-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

  13. Single-Chip CMUT-on-CMOS Front-End System for Real-Time Volumetric IVUS and ICE Imaging

    PubMed Central

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F. Levent

    2014-01-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of CMUT arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-µm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single-chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex-vivo chicken heart sample. The measured axial and lateral point resolutions are 92 µm and 251 µm, respectively. We successfully acquired volumetric imaging data from the ex-vivo chicken heart with 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce real-time volumetric images with image quality and speed suitable for catheter based clinical applications. PMID:24474131

  14. Dynamics of the Northwestern Mediterranean during the HyMeX/ASICS Experiment: A PV-Perspective

    NASA Astrophysics Data System (ADS)

    Giordani, H.

    2015-12-01

    Mode water formation has long been treated as a buoyancy flux problem, however this approach fails to explain the spatial distribution and variability of dense water in the Northwestern Mediterranean. This paper proposes to adopt a PV-perspective (PV: Potential Vorticity) rather than the usual surface flux approach to identify the processes of dense water formation during the HyMeX/ASICS experiment. The PV-budget was diagnosed from an ocean simulation performed with the NEMO-WMED36 ocean model (1/36°-resolution), driven in surface by the hourly air-sea fluxes from the AROME-WMED forecasts model (2.5km-resolution) during winter 2012-2013. If a large part of dense water is produced at the centre of the cyclonic gyre, a significant production of dense water (rho>29 kg/m3) is also found along the rim of the cyclonic gyre where the current (North Current) and gradients of density are strong. The spatial distribution of dense waters is well collocated with the PV-destruction associated with the surface frictional and buoyancy PV-fluxes. This suggests that surface PV destructions by winds are sources of destratification and are the relevant forcings of dense water formation. The negative PV created around the gyre forces a cross-front ageostrophic circulation which subducts subsurface low-PV into interior and obducts high-PV from the thermocline to the surface. The horizontal and vertical advections associated with the 3D ageostrophic circulation in the frontal region are positive and plays a role of PV-refueling destroyed by surface winds. Finally eddies formed by baroclinic instability are expulsed from the cyclonic gyre and transport the low-PV produced in the frontal region towards the centre of the gyre. This non-local process contributes to destratify the convection area.

  15. Combined, but not individual, blockade of ASIC3, P2X, and EP4 receptors attenuates the exercise pressor reflex in rats with freely perfused hindlimb muscles.

    PubMed

    Stone, Audrey J; Copp, Steven W; Kim, Joyce S; Kaufman, Marc P

    2015-12-01

    In healthy humans, tests of the hypothesis that lactic acid, PGE2, or ATP plays a role in evoking the exercise pressor reflex proved controversial. The findings in humans resembled ours in decerebrate rats that individual blockade of the receptors to lactic acid, PGE2, and ATP had only small effects on the exercise pressor reflex provided that the muscles were freely perfused. This similarity between humans and rats prompted us to test the hypothesis that in rats with freely perfused muscles combined receptor blockade is required to attenuate the exercise pressor reflex. We first compared the reflex before and after injecting either PPADS (10 mg/kg), a P2X receptor antagonist, APETx2 (100 μg/kg), an activating acid-sensing ion channel 3 (ASIC) channel antagonist, or L161982 (2 μg/kg), an EP4 receptor antagonist, into the arterial supply of the hindlimb of decerebrated rats. We then examined the effects of combined blockade of P2X receptors, ASIC3 channels, and EP4 receptors on the exercise pressor reflex using the same doses, intra-arterial route, and time course of antagonist injections as those used for individual blockade. We found that neither PPADS (n = 5), APETx2 (n = 6), nor L161982 (n = 6) attenuated the reflex. In contrast, combined blockade of these receptors (n = 7) attenuated the peak (↓27%, P < 0.019) and integrated (↓48%, P < 0.004) pressor components of the reflex. Combined blockade injected intravenously had no effect on the reflex. We conclude that combined blockade of P2X receptors, ASIC3 channels, and EP4 receptors on the endings of thin fiber muscle afferents is required to attenuate the exercise pressor reflex in rats with freely perfused hindlimbs.

  16. Pion Production from 5-15 GeV Beam for the Neutrino Factory Front-End Study

    SciTech Connect

    Prior, Gersende

    2010-03-30

    For the neutrino factory front-end study, the production of pions from a proton beam of 5-8 and 14 GeV kinetic energy on a Hg jet target has been simulated. The pion yields for two versions of the MARS15 code and two different field configurations have been compared. The particles have also been tracked from the target position down to the end of the cooling channel using the ICOOL code and the neutrino factory baseline lattice. The momentum-angle region of pions producing muons that survived until the end of the cooling channel has been compared with the region covered by HARP data and the number of pions/muons as a function of the incoming beam energy is also reported.

  17. WNA's worldwide overview on front-end nuclear fuel cycle growth and health, safety and environmental issues.

    PubMed

    Saint-Pierre, Sylvain; Kidd, Steve

    2011-01-01

    This paper presents the WNA's worldwide nuclear industry overview on the anticipated growth of the front-end nuclear fuel cycle from uranium mining to conversion and enrichment, and on the related key health, safety, and environmental (HSE) issues and challenges. It also puts an emphasis on uranium mining in new producing countries with insufficiently developed regulatory regimes that pose greater HSE concerns. It introduces the new WNA policy on uranium mining: Sustaining Global Best Practices in Uranium Mining and Processing-Principles for Managing Radiation, Health and Safety and the Environment, which is an outgrowth of an International Atomic Energy Agency (IAEA) cooperation project that closely involved industry and governmental experts in uranium mining from around the world.

  18. Ion-source and LEBT issues with the front-end systems for the Spallation Neutron Source

    SciTech Connect

    Keller, R.; Cheng, D.; DiGennaro, R.; Gough, R.A.; Greer, J.; Leung, K.N.; Ratti, A.; Reijonen, J.; Thomae, R.W.; Schenkel, T.; Staples, J.W.; Yourd, R.; Aleksandrov, A.; Stockli, M.P.; Welton, R.W.

    2001-09-01

    The Front-End Systems (FES) of the Spallation Neutron Source (SNS) project are being built by Berkeley Lab and will deliver a pulsed 40-mA H{sup -} ion beam at 2.5 MeV energy to the subsequent Drift-Tube Linac. The FES accelerator components comprise an rf driven, volume-production, cesium-enhanced, multi-cusp Ion Source; an electrostatic Low-Energy Beam Transport (LEBT) that includes provisions for transverse focusing, steering, and beam chopping; an RFQ accelerator; and a Medium-Energy Beam Transport (MEBT) line. The challenges for Ion Source and LEBT design are the generation of a plasma suitable for creating the required high H{sup -} ion density, lifetime of the rf antenna at 6% duty factor, removal of the parasitic electron population from the extracted negative ions, and emittance conservation. The paper discusses these issues in detail and highlights key experimental results obtained so far.

  19. Exploiting jump-resonance hysteresis in silicon auditory front-ends for extracting speaker discriminative formant trajectories.

    PubMed

    Aono, Kenji; Shaga, Ravi K; Chakrabartty, Shantanu

    2013-08-01

    Jump-resonance is a phenomenon observed in non-linear circuits where the amplitude of the output signal exhibits an abrupt jump when the frequency of the input signal is varied. For [Formula: see text] filters used in the design of analog auditory front-ends (AFEs), jump-resonance is generally considered to be undesirable and several techniques have been proposed in literature to avoid or alleviate this artifact. In this paper we explore the use of jump-resonance based hysteresis in [Formula: see text] band-pass filters for encoding speech formant trajectories. Using prototypes of silicon AFEs fabricated in a 0.5 μm CMOS process, we demonstrate the benefits of the proposed approach for extracting speaker discriminative features. These benefits are validated using speaker recognition experiments where consistent improvements in equal-error-rates (EERs) are achieved using the jump-resonance based features as compared to conventional features.

  20. Front-end electronics and data acquisition system for a multi-wire 3D gas tracker

    NASA Astrophysics Data System (ADS)

    Łojek, K.; Rozpȩdzik, D.; Bodek, K.; Perkowski, M.; Severijns, N.

    2015-12-01

    This paper presents the design and implementation of the front-end electronics and the data acquisition (DAQ) system for readout of multi-wire drift chambers (MWDC). Apart of the conventional drift time measurement the system delivers the hit position along the wire utilizing the charge division technique. The system consists of preamplifiers, and analog and digital boards sending data to a back-end computer via an Ethernet interface. The data logging software formats the received data and enables an easy access to the data analysis software. The use of specially designed preamplifiers and peak detectors allows the charge-division readout of the low resistance signal wire. The implication of the charge-division circuitry onto the drift time measurement was studied and the overall performance of the electronic system was evaluated in dedicated off-line tests.

  1. Participation of peripheral TRPV1, TRPV4, TRPA1 and ASIC in a magnesium sulfate-induced local pain model in rat.

    PubMed

    Srebro, Dragana; Vučković, Sonja; Prostran, Milica

    2016-12-17

    We previously showed that magnesium sulfate (MS) has systemic antinociceptive and local peripheral pronociceptive effects. The role of transient receptor potential (TRP) channels and acid-sensing ion channels (ASICs) in the mechanism of action of MS has not been investigated in detail. The aim of this study was to explore the participation of TRP channels in the pronociceptive action of MS in rats after its intraplantar injection. The paw withdrawal threshold (PWT) to mechanical stimuli was measured by the electronic von Frey test. Drugs that were tested were either co-administered with an isotonic pH-unadjusted or pH-adjusted solution of MS intraplantarily, or to the contralateral paw to exclude systemic effects. We found that the subcutaneous administration of both pH-adjusted (7.4) and pH-unadjusted (about 6.0) isotonic (6.2% w/v in water) solutions of MS induce the pain at the injection site. The pH-unadjusted MS solution-induced mechanical hyperalgesia decreased in a dose-dependent manner as a consequence of co-injection of capsazepine, a selective TRPV1 antagonist (20, 100 and 500pmol/paw), RN-1734, a selective TRPV4 antagonist (1.55, 3.1 and 6.2μmol/paw), HC-030031, a selective TRPA1 antagonist (5.6, 28.1 and 140nmol/paw), and amiloride hydrochloride, a non-selective ASIC inhibitor (0.83, 2.5 and 7.55μmol/paw). In pH-adjusted MS-induced hyperalgesia, the highest doses of TRPV1, TRPV4 and TRPA1 antagonists displayed effects that were, respectively, either similar, less pronounced or delayed in comparison to the effect induced by administration of the pH-unadjusted MS solution; the ASIC antagonist did not have any effect. These results suggest that the MS-induced local peripheral mechanical hyperalgesia is mediated via modulation of the activity of peripheral TRPV1, TRPV4, TRPA1 and ASICs. Specific local inhibition of TRP channels represents a novel approach to treating local injection-related pain.

  2. Design of a new front-end electronics test-bench for the upgraded ATLAS detector's Tile Calorimeter

    NASA Astrophysics Data System (ADS)

    Kureba, C. O.; Govender, M.; Hofsajer, I.; Ruan, X.; Sandrock, C.; Spoor, M.

    2015-10-01

    The year 2022 has been scheduled to see an upgrade of the Large Hadron Collider (LHC), in order to increase its instantaneous luminosity. The High Luminosity LHC, also referred to as the upgrade Phase-II, means an inevitable complete re-design of the read-out electronics in the Tile Calorimeter (TileCal) of the A Toroidal LHC Apparatus (ATLAS) detector. Here, the new read-out architecture is expected to have the front-end electronics transmit fully digitized information of the detector to the back-end electronics system. Fully digitized signals will allow more sophisticated reconstruction algorithms which will contribute to the required improved triggers at high pile-up. In Phase II, the current Mobile Drawer Integrity ChecKing (MobiDICK) test-bench will be replaced by the next generation test-bench for the TileCal superdrawers, the new Prometeo (A Portable ReadOut ModulE for Tilecal ElectrOnics). Prometeo is a portable, high-throughput electronic system for full certification of the front-end electronics of the ATLAS TileCal. It is designed to interface to the fast links and perform a series of tests on the data to assess the certification of the electronics. The Prometeo's prototype is being assembled by the University of the Witwatersrand and installed at CERN for further developing, tuning and tests. This article describes the overall design of the new Prometeo, and how it fits into the TileCal electronics upgrade.

  3. Helix coupling

    DOEpatents

    Ginell, William S.

    1989-04-25

    A coupling for connecting helix members in series, which consists of a pair of U-shaped elements, one of which is attached to each helix end with the "U" sections of the elements interlocked. The coupling is particularly beneficial for interconnecting helical Nitinol elements utilized in thermal actuators or engines. Each coupling half is attached to the associated helix at two points, thereby providing axial load while being easily removed from the helix, and reusable.

  4. Helix coupling

    DOEpatents

    Ginell, W.S.

    1982-03-17

    A coupling for connecting helix members in series, which consists of a pair of U-shaped elements, one of which is attached to each helix end with the U sections of the elements interlocked. The coupling is particularly beneficial for interconnecting helical Nitinol elements utilized in thermal actuators or engines. Each coupling half is attached to the associated helix at two points, thereby providing axial load while being easily removed from the helix, and reusable.

  5. Analysis and Quantification of Coupling Mechanisms of External Signal Perturbations on Silicon Detectors for Particle Physics Experiments

    NASA Astrophysics Data System (ADS)

    Arteche, F.; Rivetta, C.; Iglesias, M.; Echeverria, I.

    2016-05-01

    Silicon detectors have been used in astrophysics satellites and particle detectors for high energy physics (HEP) experiments. For HEP applications, EMC studies have been conducted in silicon detectors to characterize the impact of external noise on the system. They have shown that problems associated with the new generation of silicon detectors are related with interferences generated by the power supplies and auxiliary equipment connected to the device. Characterization of these interferences along with the coupling and their propagation into the susceptible front-end circuits is required for a successful integration of these systems. This paper presents the analysis of the sensitivity curves and coupling mechanisms between the noise and the front-end electronics that have been observed during the characterization of two silicon detector prototypes: the CMS-Silicon tracker detector (CMS-ST) and Silicon Vertex Detector (Belle II-SVD). As a result of these studies, it is possible to identify critical elements in prototypes to take corrective actions in the design and improve the front-end electronics performance.

  6. The RS685012 Polymorphism of ACCN2, the Human Ortholog of Murine Acid-Sensing Ion Channel (ASIC1) Gene, is Highly Represented in Patients with Panic Disorder.

    PubMed

    Gugliandolo, Agnese; Gangemi, Chiara; Caccamo, Daniela; Currò, Monica; Pandolfo, Gianluca; Quattrone, Diego; Crucitti, Manuela; Zoccali, Rocco Antonio; Bruno, Antonio; Muscatello, Maria Rosaria Anna

    2016-03-01

    Panic disorder (PD) is a disabling anxiety disorder that is characterized by unexpected, recurrent panic attacks, associated with fear of dying and worrying about possible future attacks or other behavioral changes as a consequence of the attacks. The acid-sensing ion channels (ASICs) are a family of proton-sensing channels expressed throughout the nervous system. Their activity is linked to a variety of behaviors including fear, anxiety, pain, depression, learning, and memory. The human analog of ASIC1a is the amiloride-sensitive cation channel 2 (ACCN2). Adenosine A2A receptors are suggested to play an important role in different brain circuits and pathways involved in anxiety reactions. In this work we aimed to evaluate the distribution of ACCN2 rs685012 and ADORA2A rs2298383 polymorphisms in PD patients compared with healthy subjects. We found no association between ADORA2A polymorphism and PD. Instead, the C mutated allele for ACCN2 rs685012 polymorphism was significantly more frequent in patients than in controls. On the contrary, the TT homozygous wild-type genotype and also the ACCN2 TT/ADORA2A CT diplotype were significantly more represented in controls. These results are suggestive for a role of ACCN2 rs685012 polymorphism in PD development in Caucasian people.

  7. Sea anemone peptide with uncommon β-hairpin structure inhibits acid-sensing ion channel 3 (ASIC3) and reveals analgesic activity.

    PubMed

    Osmakov, Dmitry I; Kozlov, Sergey A; Andreev, Yaroslav A; Koshelev, Sergey G; Sanamyan, Nadezhda P; Sanamyan, Karen E; Dyachenko, Igor A; Bondarenko, Dmitry A; Murashev, Arkadii N; Mineev, Konstantin S; Arseniev, Alexander S; Grishin, Eugene V

    2013-08-09

    Three novel peptides were isolated from the venom of the sea anemone Urticina grebelnyi. All of them are 29 amino acid peptides cross-linked by two disulfide bridges, with a primary structure similar to other sea anemone peptides belonging to structural group 9a. The structure of the gene encoding the shared precursor protein of the identified peptides was determined. One peptide, π-AnmTX Ugr 9a-1 (short name Ugr 9-1), produced a reversible inhibition effect on both the transient and the sustained current of human ASIC3 channels expressed in Xenopus laevis oocytes. It completely blocked the transient component (IC50 10 ± 0.6 μM) and partially (48 ± 2%) inhibited the amplitude of the sustained component (IC50 1.44 ± 0.19 μM). Using in vivo tests in mice, Ugr 9-1 significantly reversed inflammatory and acid-induced pain. The other two novel peptides, AnmTX Ugr 9a-2 (Ugr 9-2) and AnmTX Ugr 9a-3 (Ugr 9-3), did not inhibit the ASIC3 current. NMR spectroscopy revealed that Ugr 9-1 has an uncommon spatial structure, stabilized by two S-S bridges, with three classical β-turns and twisted β-hairpin without interstrand disulfide bonds. This is a novel peptide spatial structure that we propose to name boundless β-hairpin.

  8. 4D ICE: A 2D Array Transducer with Integrated ASIC in a 10 Fr Catheter for Real-Time 3D Intracardiac Echocardiography.

    PubMed

    Wildes, Douglas; Lee, Warren; Haider, Bruno; Cogan, Scott; Sundaresan, Krishnakumar; Mills, David; Yetter, Christopher; Hart, Patrick; Haun, Christopher; Concepcion, Mikael; Kirkhorn, Johan; Bitoun, Marc

    2016-10-12

    We developed a 2.5 x 6.6 mm 2D array transducer with integrated transmit/receive ASIC for 4D ICE (real-time 3D IntraCardiac Echocardiography) applications. The ASIC and transducer design were optimized so that the high voltage transmit, low-voltage TGC (time-gain control) and preamp, subaperture beamformer, and digital control circuits for each transducer element all fit within the 0.019 mm2 area of the element. The transducer assembly was deployed in a 10 Fr (3.3 mm diameter) catheter, integrated with a GE Vivid1 E9 ultrasound imaging system, and evaluated in three pre-clinical studies. 2D image quality and imaging modes were comparable to commercial 2D ICE catheters. The 4D field of view was at least 90° x 60° x 8 cm and could be imaged at 30 volumes/sec, sufficient to visualize cardiac anatomy and other diagnostic and therapy catheters. 4D ICE should significantly reduce X-ray fluoroscopy use and dose during electrophysiology (EP) ablation procedures. 4D ICE may be able to replace trans-esophageal echocardiography (TEE), and the associated risks and costs of general anesthesia, for guidance of some structural heart procedures.

  9. Nonadiabatic Coupling

    NASA Astrophysics Data System (ADS)

    Kryachko, Eugene S.

    The general features of the nonadiabatic coupling and its relation to molecular properties are surveyed. Some consequences of the [`]equation of motion', formally expressing a [`]smoothness' of a given molecular property within the diabatic basis, are demonstrated. A particular emphasis is made on the relation between a [`]smoothness' of the electronic dipole moment and the generalized Mulliken-Hush formula for the diabatic electronic coupling.

  10. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

    NASA Astrophysics Data System (ADS)

    Anderson, J.; Bauer, K.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Dönszelmann, M.; Francis, D.; Guest, D.; Gorini, B.; Joos, M.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Panduro Vazquez, W.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Whiteson, D.; Wu, W.; Zhang, J.

    2016-12-01

    The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.

  11. Full-Scale Testing of the Ambient Pressure, Acid-Dissolution Front-End Process for the Current 99Mo Recovery Processes

    SciTech Connect

    Jerden, James L.; Bailey, James; Hafenrichter, Lohman; Vandegrift, George F.

    2013-01-31

    The Global Threat Reduction Initiative (GTRI) Conversion Program is actively developing technologies for converting civilian facilities that use high enriched uranium (HEU) to low enriched uranium (LEU) fuels and targets. The conversion of conventional HEU targets to LEU for the production of 99Mo production requires approximately five times the uranium in a target to maintain the 99Mo yield on a per-target basis. Under GTRI, Argonne National Laboratory (Argonne) is developing two frontend options for current 99Mo production processes to allow the use of LEU-foil targets. In both processes, the aim is to produce a frontend product that is compatible with current 99Mo purification operations and will provide the same or a higher yield of 99Mo for the same number of irradiated targets. The two frontend processes under development as part of this project are (1) the dissolution of irradiated LEU foil (up to 250 g in a single batch) and nickel fission recoil barrier in nitric acid at ambient pressure; and (2) the electrochemical dissolution of LEU foil in series of steps that produces an alkaline (basic) solution feed for 99Mo purification. This report describes results from performance tests and design optimization of the ambient pressure, nitric-acid-dissolver system. The design, fabrication, and performance test planning for this system are described in more detail in previous reports (Jerden et al. 2011a,b, 2012). Full-scale demonstrations of both of the frontend processes using irradiated uranium foils are planned to be performed at Oak Ridge National Laboratory this fiscal year.

  12. Measurement of the front-end dead-time of the LHCb muon detector and evaluation of its contribution to the muon detection inefficiency

    NASA Astrophysics Data System (ADS)

    Anderlini, L.; Anelli, M.; Archilli, F.; Auriemma, G.; Baldini, W.; Bencivenni, G.; Bizzeti, A.; Bocci, V.; Bondar, N.; Bonivento, W.; Bochin, B.; Bozzi, C.; Brundu, D.; Cadeddu, S.; Campana, P.; Carboni, G.; Cardini, A.; Carletti, M.; Casu, L.; Chubykin, A.; Ciambrone, P.; Dané, E.; De Simone, P.; Falabella, A.; Felici, G.; Fiore, M.; Fontana, M.; Fresch, P.; Furfaro, E.; Graziani, G.; Kashchuk, A.; Kotriakhova, S.; Lai, A.; Lanfranchi, G.; Loi, A.; Maev, O.; Manca, G.; Martellotti, G.; Neustroev, P.; Oldeman, R. G. C.; Palutan, M.; Passaleva, G.; Penso, G.; Pinci, D.; Polycarpo, E.; Saitta, B.; Santacesaria, R.; Santimaria, M.; Santovetti, E.; Saputi, A.; Sarti, A.; Satriano, C.; Satta, A.; Schmidt, B.; Schneider, T.; Sciascia, B.; Sciubba, A.; Siddi, B. G.; Tellarini, G.; Vacca, C.; Vazquez-Gomez, R.; Vecchi, S.; Veltri, M.; Vorobyev, A.

    2016-04-01

    A method is described which allows to deduce the dead-time of the front-end electronics of the LHCb muon detector from a series of measurements performed at different luminosities at a bunch-crossing rate of 20 MHz. The measured values of the dead-time range from ~ 70 ns to ~ 100 ns. These results allow to estimate the performance of the muon detector at the future bunch-crossing rate of 40 MHz and at higher luminosity.

  13. A technical description of enhancements to the front-end user interface for the Worldwide Household Goods Information System for Transportation Modernization (WHIST-MOD)

    SciTech Connect

    Loftis, J.P.; Spears, P.M. ); James, T.L. )

    1990-08-01

    The Directorate of Personal Property of the Military Traffic Management Command (MTMC) asked Oak Ridge National Laboratory (ORNL) to design a decision support system, the Worldwide Household Goods Information System for Transportation Modernization. This decision support system will automate tasks and provide analysis tools for evaluating the Personal Property Program, predicting impacts to the program, and planning modifications to the program to meet the evolving needs of military service members and the transportation industry. The system designed by ORNL consists of three application modules: system dictionary applications, data acquisition and administration applications, and user applications. The user applications module is divided into two phases: the data selection front-end interface and the postprocessing back-end interface. This paper describes the prototyped front-end interface using ORACLE SQL*Forms, part of the ORACLE Relational Database Management System (RDBMS) toolset. The focus of this paper is a discussion of the need for enhancements to the initial design of the interface and the coding techniques used to prototype the enhancements. These enhancements make the front-end interface more flexible and easier to use by giving users options for identifying data to be used by the back-end interface. This report is based on in-depth interviews of MTMC staff, prototype meetings with the users, and the research and design work conducted at ORNL.

  14. Development of a flight qualified 100 x 100 mm MCP UV detector using advanced cross strip anodes and associated ASIC electronics

    NASA Astrophysics Data System (ADS)

    Vallerga, John; McPhate, Jason; Tremsin, Anton; Siegmund, Oswald; Raffanti, Rick; Cumming, Harley; Seljak, Andrej; Virta, Vihtori; Varner, Gary

    2016-07-01

    Photon counting microchannel plate (MCP) imagers have been the detector of choice for most UV astronomical missions over the last three decades (e.g. EUVE, FUSE, COS on Hubble etc.) and been mentioned for instruments on future large telescopes in space such as LUVOIR14. Using cross strip anodes, improvements in the MCP laboratory readout technology have resulted in better spatial resolution (x10), temporal resolution (x 1000) and output event rate (x100), all the while operating at lower gain (x10) resulting in lower high voltage requirements and longer MCP lifetimes. A crossed strip anode MCP readout starts with a set of orthogonal conducting strips (e.g. 80 x 80), typically spaced at a 635 micron pitch onto which charge clouds from MCP amplified events land. Each strip has its own charge sensitive amplifier that is sampled continuously by a dedicated analog to digital converter (ADC). All of the ADC digital output lines are fed into a field programmable gate array (FGPA) which can detect charge events landing on the strips, measure the peak amplitudes of those charge events and calculate their spatial centroid along with their time of arrival (X,Y,T) and pass this information to a downstream computer. Laboratory versions of these electronics have demonstrated < 20 microns FWHM spatial resolution, count rates on the order of 2 MHz, and temporal resolution of 1ns. In 2012 our group at U.C. Berkeley, along with our partners at the U. Hawaii, received a NASA Strategic Astrophysics Technology (SAT) grant to raise the TRL of a cross strip detector from 4 to 6 by replacing most of the 19" rack mounted, high powered electronics with application specific integrated circuits (ASICs) which will lower the power, mass, and volume requirements of the detector electronics. We were also tasked to design and fabricate a "standard" 50mm square active area MCP detector incorporating these electronics that can be environmentally qualified for flight (temperature, vacuum, vibration

  15. A multifunctional switched-capacitor programmable gain amplifier for high-definition video analog front-ends

    NASA Astrophysics Data System (ADS)

    Hong, Zhang; Jie, Zhang; Mudan, Zhang; Xue, Li; Jun, Cheng

    2015-03-01

    A multifunctional programmable gain amplifier (PGA) that provides gain and offset adjusting abilities for high-definition video analog front-ends (AFE) is presented. With a switched-capacitor structure, the PGA also acts as a sample and holder of the analog-to-digital converter (ADC) in the AFE to reduce the power consumption and chip area of the whole AFE. Furthermore, the PGA converts the single-ended video signal into differential signal for the following ADC to reject common-mode noise and interferences. The 9-bit digital-to-analog converter (DAC) for gain and offset adjusting is embedded into the switched capacitor networks of the PGA. A video AFE integrated circuit based on the proposed PGA is fabricated in a 0.18-μm process. Simulation and measurement results show that the PGA achieves a gain control range of 0.90 to 2.34 and an offset control range of -220 to 220 mV while consuming 10.1 mA from a 1.8 V power supply. Project supported by the National Natural Science Foundation of China (No. 61106027), and the Science and Technology Project of Shanxi Province (No. 2014K05-14).

  16. The front-end electronics for the 1.8-kchannel SiPM tracking plane in the NEW detector

    NASA Astrophysics Data System (ADS)

    Rodríguez, J.; Toledo, J.; Esteve, R.; Lorca, D.; Monrabal, F.

    2015-01-01

    NEW is the first phase of NEXT-100 experiment, an experiment aimed at searching for neutrinoless double-beta decay. NEXT technology combines an excellent energy resolution with tracking capabilities thanks to a combination of optical sensors, PMTs for the energy measurement and SiPMs for topology reconstruction. Those two tools result in one of the highest background rejection potentials in the field. This work describes the tracking plane that will be constructed for the NEW detector which consists of close to 1800 sensors with a 1-cm pitch arranged in twenty-eight 64-SiPM boards. Then it focuses in the development of the electronics needed to read the 1800 channels with a front-end board that includes per-channel differential transimpedance input amplifier, gated integrator, automatic offset voltage compensation and 12-bit ADC. Finally, a description of how the FPGA buffers data, carries out zero suppression and sends data to the DAQ interface using CERN RD-51 SRS's DTCC link specification complements the description of the electronics of the NEW detector tracking plane.

  17. New x-ray pink-beam profile monitor system for the SPring-8 beamline front-end

    NASA Astrophysics Data System (ADS)

    Takahashi, Sunao; Kudo, Togo; Sano, Mutsumi; Watanabe, Atsuo; Tajiri, Hiroo

    2016-08-01

    A new beam profile monitoring system for the small X-ray beam exiting from the SPring-8 front-end was developed and tested at BL13XU. This system is intended as a screen monitor and also as a position monitor even at beam currents of 100 mA by using photoluminescence of a chemical vapor deposition-grown diamond film. To cope with the challenge that the spatial distribution of the photoluminescence in the vertical direction is too flat to detect the beam centroid within a limited narrow aperture, a filter was installed that absorbs the fundamental harmonic concentrated in the beam center, which resulted in "de-flattening" of the vertical distribution. For the measurement, the filter crossed the photon beam vertically at high speed to withstand the intense heat flux of the undulator pink-beam. A transient thermal analysis, which can simulate the movement of the irradiation position with time, was conducted to determine the appropriate configuration and the required moving speed of the filter to avoid accidental melting. In a demonstration experiment, the vertically separated beam profile could be successfully observed for a 0.8 × 0.8 mm2 beam shaped by an XY slit and with a fundamental energy of 18.48 keV. The vertical beam centroid could be detected with a resolution of less than 0.1 mm.

  18. Analysis and design of a 1.8-2.7 GHz tunable 8-band TDD LTE receiver front-end

    NASA Astrophysics Data System (ADS)

    Xiao, Wang; Yuji, Wang; Weiwei, Wang; Xuegui, Chang; Na, Yan; Xi, Tan; Hao, Min

    2011-05-01

    This paper describes the analysis and design of a 0.13 μm CMOS tunable receiver front-end that supports 8 TDD LTE bands, covering the 1.8-2.7 GHz frequency band and supporting the 5/10/15/20 MHz bandwidth and QPSK/16QAM/64QAM modulation schemes. The novel zero-IF receiver core consists of a tunable narrowband variable gain low-noise amplifier (LNA), a current commutating passive down-conversion mixer with a 2nd order low pass trans-impedance amplifier, an LO divider, a rough gain step variable gain pre-amplifier, a tunable 4th order Chebyshev channel select active-RC low pass filter with cutoff frequency calibration circuit and a fine gain step variable gain amplifier. The LNA can be tuned by reconfiguring the output parallel LC tank to the responding frequency band, eliminating the fixed center frequency multiple LNA array for a multi-mode receiver. The large various gain range and bandwidth of the analog baseband can also be tuned by digital configuration to satisfy the specification requirement of various bandwidth and modulation schemes. The test chip is implemented in an SMIC 0.13 μm 1P8M CMOS process. The full receiver achieves 4.6 dB NF, -14.5 dBm out of band IIP3, 30-94 dB gain range and consumes 54 mA with a 1.2 V power supply.

  19. A High-Speed Adaptively-Biased Current-to-Current Front-End for SSPM Arrays

    NASA Astrophysics Data System (ADS)

    Zheng, Bob; Walder, Jean-Pierre; Lippe, Henrik vonder; Moses, William; Janecek, Martin

    Solid-state photomultiplier (SSPM) arrays are an interesting technology for use in PET detector modules due to their low cost, high compactness, insensitivity to magnetic fields, and sub-nanosecond timing resolution. However, the large intrinsic capacitance of SSPM arrays results in RC time constants that can severely degrade the response time, which leads to a trade-off between array size and speed. Instead, we propose a front-end that utilizes an adaptively biased current-to-current converter that minimizes the resistance seen by the SSPM array, thus preserving the timing resolution for both large and small arrays. This enables the use of large SSPM arrays with resistive networks, which creates position information and minimizes the number of outputs for compatibility with general PET multiplexing schemes. By tuning the bias of the feedback amplifier, the chip allows for precise control of the close-loop gain, ensuring stability and fast operation from loads as small as 50pF to loads as large as 1nF. The chip has 16 input channels, and 4 outputs capable of driving 100 n loads. The power consumption is 12mW per channel and 360mW for the entire chip. The chip has been designed and fabricated in an AMS 0.35um high-voltage technology, and demonstrates a fast rise-time response and low noise performances.

  20. Performances of the Front-End Electronics for the HADES RPC TOF wall on a 12C beam

    NASA Astrophysics Data System (ADS)

    Belver, D.; Cabanelas, P.; Castro, E.; Díaz, J.; Garzón, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.; Zapata, M.

    2009-05-01

    A Front-End Electronics (FEE) chain for timing accurate measurements has been developed for the RPC wall upgrade of the High-Acceptance DiElectron Spectrometer (HADES). The wall will cover an area of around 8 m with 1122 RPC cells (2244 electronic channels). The FEE chain consists of two boards: a four-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a discriminator. The time and the charge information are encoded in the leading and the trailing edge (by a charge to width method) of an LVDS signal. Each MBO houses up to eight DBOs providing them regulated voltage supply, threshold values via DACs, test signals and collection of their trigger outputs. The MBO delivers LVDS signals to a time-to-digital converter readout board (TRB) based on HPTDC for data acquisition. In this work, we present the performance of the FEE measured using: (a) narrow electronic test pulses and (b) real signals read out in a fully instrumented RPC sextant installed in its final position at the HADES. The detector was exposed to particles coming from reactions of a 12C beam on Be and Nb targets at 2 GeV/A kinetic energy. Results for the whole electronic chain (DBO+MBO+TRB) show a timing jitter of around 40 ps/channel for pulses above 100 fC and 80 ps/channel for beam data taken with the RPC.

  1. Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors

    NASA Astrophysics Data System (ADS)

    Gaioni, Luigi; Manghisoni, Massimo; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

    2011-09-01

    In future high energy physics experiments (HEP), readout integrated circuits for vertexing and tracking applications will be implemented by means of CMOS devices belonging to processes with minimum feature size in the 100 nm span. In these nanoscale technologies the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. This paper is concerned with the study of the analog properties, in particular in terms of noise performance and radiation hardness, of MOSFET devices belonging to a 65 nm CMOS low power technology. The behavior of the 1/ f and white noise terms is studied as a function of the main device parameters before and after exposure to 10 keV X-rays and 60Co γ-rays. A prototype chip designed in a 65 nm CMOS process including deep n-well MAPS structures and a fast front-end conceived for the readout of high-resistivity pixel sensors will be introduced.

  2. Front-end chip for Silicon Photomultiplier detectors with pico-second Time-of-Flight resolution

    NASA Astrophysics Data System (ADS)

    Stankova, V.; Briggl, K.; Chen, H.; Gil, A.; Harion, T.; Munwes, Y.; Shen, W.; Schultz-Coulon, H.-C.

    2016-07-01

    A mixed-mode readout Application Specific Integrated Circuit (STIC3) has been developed for high precision timing measurements with Silicon Photomultipliers (SiPM) for medical imaging and particle physics applications. The STiC3 is a 64-channel chip, with fully differential analog front-end for cross-talk and electronic noise immunity. The time and charge information from the SiPM signals are encrypted into two time stamps generated by integrated Time to Digital Converter (TDC) modules with 50 ps time binning. The TDC data is stored in an internal memory and transferred to a PC via a 160 MBit/s serial link using an 8/10 bit encoding. The chip provides an input bias tuning in a range of 0-900 mV to compensate the breakdown voltage variation of individual SiPMs. The TDC jitter together with the digital part is around 37 ps. A Coincidence Time Resolution (CTR) of 213.6 ps FWHM has been obtained with 3.1 × 3.1 × 15m2 LYSO:Ce scintillator crystals and Hamamatsu SiPM matrices (S12643-050CN(X)). Characterization measurements with the chip and its integration into the external plate of the EndoTOFPET-US prototype are presented.

  3. FLEXIBLE COUPLING

    DOEpatents

    Babelay, E.F.

    1962-02-13

    A flexible shaft coupling for operation at speeds in excess of 14,000 rpm is designed which requires no lubrication. A driving sleeve member and a driven sleeve member are placed in concentric spaced relationship. A torque force is transmitted to the driven member from the driving member through a plurality of nylon balls symmetrically disposed between the spaced sleeves. The balls extend into races and recesses within the respective sleeve members. The sleeve members have a suitable clearance therebetween and the balls have a suitable radial clearance during operation of the coupling to provide a relatively loose coupling. These clearances accommodate for both parallel and/or angular misalignments and avoid metal-tometal contact between the sleeve members during operation. Thus, no lubrication is needed, and a minimum of vibrations is transmitted between the sleeve members. (AEC)

  4. Prosthesis coupling

    NASA Technical Reports Server (NTRS)

    Reswick, J. B.; Mooney, V.; Bright, C. W.; Owens, L. J. (Inventor)

    1979-01-01

    A coupling for use in an apparatus for connecting a prosthesis to the bone of a stump of an amputated limb is described which permits a bio-compatible carbon sleeve forming a part of the prosthesis connector to float so as to prevent disturbing the skin seal around the carbon sleeve. The coupling includes a flexible member interposed between a socket that is inserted within an intermedullary cavity of the bone and the sleeve. A lock pin is carried by the prosthesis and has a stem portion which is adapted to be coaxially disposed and slideably within the tubular female socket for securing the prosthesis to the stump. The skin around the percutaneous carbon sleeve is able to move as a result of the flexing coupling so as to reduce stresses caused by changes in the stump shape and/or movement between the bone and the flesh portion of the stump.

  5. The Human Ortholog of Acid-Sensing Ion Channel Gene ASIC1a Is Associated With Panic Disorder And Amygdala Structure And Function

    PubMed Central

    Smoller, Jordan W.; Gallagher, Patience J.; Duncan, Laramie E.; McGrath, Lauren M.; Haddad, Stephen A.; Holmes, Avram.; Wolf, Aaron B.; Hilker, Sidney; Block, Stefanie R.; Weill, Sydney; Young, Sarah; Choi, Eun Young; Rosenbaum, Jerrold F.; Biederman, Joseph; Faraone, Stephen V.; Roffman, Joshua; Manfro, Gisele G.; Blaya, Carolina; Hirshfeld-Becker, Dina R.; Stein, Murray B.; Van Ameringen, Michael; Tolin, David F.; Otto, Michael W.; Pollack, Mark H.; Simon, Naomi M.; Buckner, Randy L.; Ongur, Dost; Cohen, Bruce M.

    2014-01-01

    Background Individuals with panic disorder (PD) exhibit a hypersensitivity to inhaled carbon dioxide (CO2), possibly reflecting a lowered threshold for sensing signals of suffocation. Animal studies have shown that CO2-mediated fear behavior depends on chemosensing of acidosis in the amygdala via the acid sensing ion channel ASIC1a. We examined whether the human ortholog of the ASIC1a gene, ACCN2, is associated with the presence of PD and with amygdala structure and function. Methods We conducted a case-control analysis (N=414 PD cases, 846 healthy controls) of ACCN2single nucleotide polymorphisms (SNPs) and PD. We then tested whether variants showing significant association with PD are also associated with amygdala volume (n=1,048) and/or task-evoked reactivity to emotional stimuli (n=103) in healthy individuals. Results Two SNPs at the ACCN2 locus showed evidence of association with PD: rs685012 (OR=1.32, gene-wise corrected p=0.011) and rs10875995 (OR=1.26, gene-wise corrected p=0.046). The association appeared to be stronger when early-onset (age ≤ 20) PD cases and when cases with prominent respiratory symptoms were compared to controls. The PD risk allele at rs10875995 was associated with increased amygdala volume (p=0.035), as well as task-evoked amygdala reactivity to fearful and angry faces (p=0.0048). Conclusions Genetic variation at ACCN2 appears to be associated with PD and with amygdala phenotypes that have been linked to anxiety proneness. These results support the possibility that modulation of acid-sensing ion channels may have therapeutic potential for PD. PMID:24529281

  6. Low-cost high-manufacturability and thermal stability optical front-end for 10-Gb ethernet applications

    NASA Astrophysics Data System (ADS)

    Lee, Shin-Ge; Lee, Chun-Hsing; Liao, Li-Chun; Tsai, Cheng-Hung; Chen, Chih-Li; Huang, Min-Fa; Hsu, Chih-Hao; Cheng, Fu-Yi; Kao, Min-Sheng; Wang, Chiung-Hung

    2004-05-01

    With the drastic expansion of internet usage, the demand of 10Gb/s transmission optoelectronic devices for local-area-network (LAN) and storage-area-network (SAN) are increasing. The key issues of these applications are to improve cost, manufacturability and reliability of optoelectronic devices in high speed transmission. The authors have demonstrated extremely low cost, high manufacturability and thermal stability optical fron-end for 10Gb/s Ethernet applications in this paper. High performance and high sensitivity of 10Gb/s transmitter optical sub-assembly (TOSA) and receiver optical sub-assembly (ROSA) with TO-Can packages are discussed and demonstrated to overcome the critical points in high speed applications, respectively. Moreover, 10km interconnection of 10Gb/s optical front-end without isolated elements inside are also proved to be error free at 10.3125Gb/s. In order to improve the signal integrity and manufacturability of 10Gb/s OSA in small form factor transceiver modules assembly, the authors also integrate high speed flex board and OSA package to extend the signal path, and to minimize the effect of crosstalk in modules. Furthermore, the integration of flex board and OSA package more release the difficulties in conjuunction OSA and electrical sub-assembly (ESA) in module to fulfill the request of 10Gb/s transeivers' Multi-Source Agreement (MSA). The performance of temperature stabilized TOSA over wide case temperature range is also experimented. The optical eye diagram of 10Gb/s TOSA developed in this study showing excellent eye quality passing 10Gb/s Ethernet mask test between 0°C to 85°C.

  7. A RF receiver frontend for SC-UWB in a 0.18-μm CMOS process

    NASA Astrophysics Data System (ADS)

    Rui, Guo; Haiying, Zhang

    2012-12-01

    A radio frequency (RF) receiver frontend for single-carrier ultra-wideband (SC-UWB) is presented. The front end employs direct-conversion architecture, and consists of a differential low noise amplifier (LNA), a quadrature mixer, and two intermediate frequency (IF) amplifiers. The proposed LNA employs source inductively degenerated topology. First, the expression of input impedance matching bandwidth in terms of gate-source capacitance, resonant frequency and target S11 is given. Then, a noise figure optimization strategy under gain and power constraints is proposed, with consideration of the integrated gate inductor, the bond-wire inductance, and its variation. The LNA utilizes two stages with different resonant frequencies to acquire flat gain over the 7.1-8.1 GHz frequency band, and has two gain modes to obtain a higher receiver dynamic range. The mixer uses a double balanced Gilbert structure. The front end is fabricated in a TSMC 0.18-μm RF CMOS process and occupies an area of 1.43 mm2. In high and low gain modes, the measured maximum conversion gain are 42 dB and 22 dB, input 1 dB compression points are -40 dBm and -20 dBm, and S11 is better than -18 dB and -14.5 dB. The 3 dB IF bandwidth is more than 500 MHz. The double sideband noise figure is 4.7 dB in high gain mode. The total power consumption is 65 mW from a 1.8 V supply.

  8. Stand-alone front-end system for high- frequency, high-frame-rate coded excitation ultrasonic imaging.

    PubMed

    Park, Jinhyoung; Hu, Changhong; Shung, K Kirk

    2011-12-01

    A stand-alone front-end system for high-frequency coded excitation imaging was implemented to achieve a wider dynamic range. The system included an arbitrary waveform amplifier, an arbitrary waveform generator, an analog receiver, a motor position interpreter, a motor controller and power supplies. The digitized arbitrary waveforms at a sampling rate of 150 MHz could be programmed and converted to an analog signal. The pulse was subsequently amplified to excite an ultrasound transducer, and the maximum output voltage level achieved was 120 V(pp). The bandwidth of the arbitrary waveform amplifier was from 1 to 70 MHz. The noise figure of the preamplifier was less than 7.7 dB and the bandwidth was 95 MHz. Phantoms and biological tissues were imaged at a frame rate as high as 68 frames per second (fps) to evaluate the performance of the system. During the measurement, 40-MHz lithium niobate (LiNbO(3)) single-element lightweight (<;0.28 g) transducers were utilized. The wire target measure- ment showed that the -6-dB axial resolution of a chirp-coded excitation was 50 μm and lateral resolution was 120 μm. The echo signal-to-noise ratios were found to be 54 and 65 dB for the short burst and coded excitation, respectively. The contrast resolution in a sphere phantom study was estimated to be 24 dB for the chirp-coded excitation and 15 dB for the short burst modes. In an in vivo study, zebrafish and mouse hearts were imaged. Boundaries of the zebrafish heart in the image could be differentiated because of the low-noise operation of the implemented system. In mouse heart images, valves and chambers could be readily visualized with the coded excitation.

  9. Design of millimeter-wave MEMS-based reconfigurable front-end circuits using the standard CMOS technology

    NASA Astrophysics Data System (ADS)

    Chang, Chia-Chan; Hsieh, Sheng-Chi; Chen, Chien-Hsun; Huang, Chin-Yen; Yao, Chun-Han; Lin, Chun-Chi

    2011-12-01

    This paper describes the designs of three reconfigurable CMOS-MEMS front-end components for V-/W-band applications. The suspended MEMS structure is released through post-CMOS micromachining. To achieve circuit reconfigurability, dual-state and multi-state fishbone-beam-drive actuators are proposed herein. The reconfigurable bandstop is fabricated in a 0.35 µm CMOS process with the chip size of 0.765 × 0.98 mm2, showing that the stop-band frequency can be switched from 60 to 50 GHz with 40 V actuation voltage. The measured isolation is better than 38 dB at 60 GHz and 34 dB at 50 GHz, respectively. The bandpass filter-integrated single-pole single-throw switch, using the 0.18 µm CMOS process, demonstrates that insertion loss and return loss are better than 6.2 and 15 dB from 88 to 100 GHz in the on-state, and isolation is better than 21 dB in the off-state with an actuation voltage of 51 V. The chip size is 0.7 × 1.04 mm2. The third component is a reconfigurable slot antenna fabricated in a 0.18 µm CMOS process with the chip size of 1.2 × 1.2 mm2. By utilizing the multi-state actuators, the frequencies of this antenna can be switched to 43, 47, 50.5, 54, 57.5 GHz with return loss better than 20 dB. Those circuits demonstrate good RF performance and are relatively compact by employing several size miniaturizing techniques, thereby enabling a great potential for the future single-chip transceiver.

  10. Development and evaluation of a comprehensive clinical decision support taxonomy: comparison of front-end tools in commercial and internally developed electronic health record systems

    PubMed Central

    Sittig, Dean F; Ash, Joan S; Feblowitz, Joshua; Meltzer, Seth; McMullen, Carmit; Guappone, Ken; Carpenter, Jim; Richardson, Joshua; Simonaitis, Linas; Evans, R Scott; Nichol, W Paul; Middleton, Blackford

    2011-01-01

    Background Clinical decision support (CDS) is a valuable tool for improving healthcare quality and lowering costs. However, there is no comprehensive taxonomy of types of CDS and there has been limited research on the availability of various CDS tools across current electronic health record (EHR) systems. Objective To develop and validate a taxonomy of front-end CDS tools and to assess support for these tools in major commercial and internally developed EHRs. Study design and methods We used a modified Delphi approach with a panel of 11 decision support experts to develop a taxonomy of 53 front-end CDS tools. Based on this taxonomy, a survey on CDS tools was sent to a purposive sample of commercial EHR vendors (n=9) and leading healthcare institutions with internally developed state-of-the-art EHRs (n=4). Results Responses were received from all healthcare institutions and 7 of 9 EHR vendors (response rate: 85%). All 53 types of CDS tools identified in the taxonomy were found in at least one surveyed EHR system, but only 8 functions were present in all EHRs. Medication dosing support and order facilitators were the most commonly available classes of decision support, while expert systems (eg, diagnostic decision support, ventilator management suggestions) were the least common. Conclusion We developed and validated a comprehensive taxonomy of front-end CDS tools. A subsequent survey of commercial EHR vendors and leading healthcare institutions revealed a small core set of common CDS tools, but identified significant variability in the remainder of clinical decision support content. PMID:21415065

  11. Tubular Coupling

    NASA Technical Reports Server (NTRS)

    Rosenbaum, Bernard J. (Inventor)

    2000-01-01

    A system for coupling a vascular overflow graft or cannula to a heart pump. A pump pipe outlet is provided with an external tapered surface which receives the end of a compressible connula. An annular compression ring with a tapered internal bore surface is arranged about the cannula with the tapered internal surface in a facing relationship to the external tapered surface. The angle of inclination of the tapered surfaces is converging such that the spacing between the tapered surfaces decreases from one end of the external tapered surface to the other end thereby providing a clamping action of the tapered surface on a cannula which increases as a function of the length of cannula segment between the tapered surfaces. The annular compression ring is disposed within a tubular locking nut which threadedly couples to the pump and provides a compression force for urging the annular ring onto the cannula between the tapered surfaces. The nut has a threaded connection to the pump body. The threaded coupling to the pump body provides a compression force for the annular ring. The annular ring has an annular enclosure space in which excess cannula material from the compression between the tapered surfaces to "bunch up" in the space and serve as an enlarged annular ring segment to assist holding the cannula in place. The clamped cannula provides a seamless joint connection to the pump pipe outlet where the clamping force is uniformly applied to the cannula because of self alignment of the tapered surfaces. The nut can be easily disconnected to replace the pump if necessary.

  12. The roles of acid-sensing ion channel 1a and ovarian cancer G protein-coupled receptor 1 on passive Mg2+ transport across intestinal epithelium-like Caco-2 monolayers.

    PubMed

    Thongon, Narongrit; Ketkeaw, Pattamaporn; Nuekchob, Chanin

    2014-03-01

    Intestinal passive Mg(2+) absorption, which is vital for normal Mg(2+) homeostasis, has been shown to be regulated by luminal proton. We aimed to study the regulatory role of intestinal acid sensors in paracellular passive Mg(2+) transport. Omeprazole enhanced the expressions of acid-sensing ion channel 1a (ASIC1a), ovarian cancer G protein-coupled receptor 1 (OGR1), and transient receptor potential vanilloid 4 in Caco-2 cells. It also inhibited passive Mg(2+) transport across Caco-2 monolayers. The expression and activation of OGR1 resulted in the stimulation of passive Mg(2+) transport via phospholipase C- and protein kinase C-dependent pathways. ASIC1a activation, on the other hand, enhanced apical HCO3 (-) secretion that led, at least in part, by a Ca(2+)-dependent pathway to an inhibition of paracellular Mg(2+) absorption. Our results provided supporting evidence for the roles of OGR1 and ASIC1a in the regulation of intestinal passive Mg(2+) absorption.

  13. A synchronous analog very front-end in 65 nm CMOS with local fast ToT encoding for pixel detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Monteil, E.; Pacher, L.; Paternò, A.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Rotondo, F.; Leng, C.; Chai, J.

    2017-03-01

    This work describes the design, in 65 nm CMOS, of a very compact, low power, low threshold synchronous analog front-end for pixel detectors at HL-LHC . Threshold trimming is avoided using offset compensation techniques. Fast ToT encoding is possible, as the comparator can be turned into a Local Oscillator up to several hundreds MHz. Two small prototypes have been submitted and tested; a X-ray irradiation up to 600 Mrad has been performed. Detailed results in terms of gain, noise, ToT and threshold dispersion are presented. This design will be part of the CHIPIX65 demonstrator and of the RD53A chip.

  14. Band-1 receiver front-end cartridges for Atacama Large Millimeter/submillimeter Array (ALMA): design and development toward production

    NASA Astrophysics Data System (ADS)

    Hwang, Yuh-Jing; Chiong, Chau-Ching; Huang, Yau-De; Huang, Chi-Den; Liu, Ching-Tang; Kuo, Yue-Fang; Weng, Shou-Hsien; Ho, Chin-Ting; Chiang, Po-Han; Wu, Hsiao-Ling; Chang, Chih-Cheng; Jian, Shou-Ting; Lee, Chien-Feng; Lee, Yi-Wei; Pospieszalski, Marian; Henke, Doug; Finger, Ricardo; Tapia, Valeria; Gonzalez, Alvaro

    2016-07-01

    The ALMA Band-1 receiver front-end prototype cold and warm cartridge assemblies, including the system and key components for ALMA Band-1 receivers have been developed and two sets of prototype cartridge were fully tested. The measured aperture efficiency for the cold receiver is above the 80% specification except for a few frequency points. Based on the cryogenically cooled broadband low-noise amplifiers provided by NRAO, the receiver noise temperature can be as low as 15 - 32K for pol-0 and 17 - 30K for pol-1. Other key testing items are also measured. The receiver beam pattern is measured, the results is well fit to the simulation and design. The pointing error extracted from the measured beam pattern indicates the error is 0.1 degree along azimuth and 0.15 degree along elevation, which is well fit to the specification (smaller than 0.4 degree). The equivalent hot load temperature for 5% gain compression is 492 - 4583K, which well fit to the specification of 5% with 373K input thermal load. The image band suppression is higher than 30 dB typically and the worst case is higher than 20 dB for 34GHz RF signal and 38GHz LO signal, which is all higher than 7 dB required specification. The cross talk between orthogonal polarization is smaller than -85 dB based on present prototype LO. The amplitude stability is below 2.0 x 10-7 , which is fit to the specification of 4.0 x 10-7 for timescales in the range of 0.05 s ≤ T ≤ 100 s. The signal path phase stability measured is smaller than 5 fs, which is smaller than 22 fs for Long term (delay drift) 20 s ≤ T < 300 sec. The IF output phase variation is smaller than 3.5° rms typically, and the specification is less than 4.5° rms. The measured IF output power level is -28 to -30.5 dBm with 300K input load. The measured IF output power flatness is less than 5.6 dB for 2GHz window, and 1.3dB for 31MHz window. The first batch of prototype cartridges will be installed on site for further commissioning on July of 2017.

  15. Thermoacoustic couple

    DOEpatents

    Wheatley, J.C.; Swift, G.W.; Migliori, A.

    1983-10-04

    An apparatus and method for determining acoustic power density level and its direction in a fluid using a single sensor are disclosed. The preferred embodiment of the apparatus, which is termed a thermoacoustic couple, consists of a stack of thin, spaced apart polymeric plates, selected ones of which include multiple bimetallic thermocouple junctions positioned along opposite end edges thereof. The thermocouple junctions are connected in series in the nature of a thermopile, and are arranged so as to be responsive to small temperature differences between the opposite edges of the plates. The magnitude of the temperature difference, as represented by the magnitude of the electrical potential difference generated by the thermopile, is found to be directly related to the level of acoustic power density in the gas.

  16. Dark coupling

    SciTech Connect

    Gavela, M.B.; Hernández, D.; Honorez, L. Lopez; Mena, O.; Rigolin, S. E-mail: d.hernandez@uam.es E-mail: omena@ific.uv.es

    2009-07-01

    The two dark sectors of the universe—dark matter and dark energy—may interact with each other. Background and linear density perturbation evolution equations are developed for a generic coupling. We then establish the general conditions necessary to obtain models free from non-adiabatic instabilities. As an application, we consider a viable universe in which the interaction strength is proportional to the dark energy density. The scenario does not exhibit ''phantom crossing'' and is free from instabilities, including early ones. A sizeable interaction strength is compatible with combined WMAP, HST, SN, LSS and H(z) data. Neutrino mass and/or cosmic curvature are allowed to be larger than in non-interacting models. Our analysis sheds light as well on unstable scenarios previously proposed.

  17. A 55-dB SNDR, 2.2-mW double chopper-stabilized analog front-end for a thermopile sensor

    NASA Astrophysics Data System (ADS)

    Chengying, Chen; Xiaoyu, Hu; Jun, Fan; Yong, Hei

    2014-05-01

    A double chopper-stabilized analog front-end (DCS-AFE) circuit for a thermopile sensor is presented, which includes a closed-loop front-end amplifier and a 2nd-order 1 bit quantization sigma—delta modulator. The amplifier with a closed-loop structure ensures the gain stability against the temperature. Moreover, by adopting the chopper-stabilized technique both for the amplifier and 2nd-order 1-bit quantization sigma—delta modulator, the low-frequency 1/f noise and offset is reduced and high resolution is achieved. The AFE is implemented in the SMIC 0.18 μm 1P6M CMOS process. The measurement results show that in a 3.3 V power supply, 1 Hz input frequency and 3KHz clock frequency, the peak signal-to-noise and distortion ratio (SNDR) is 55.4 dB, the effective number of bits (ENOB) is 8.92 bit, and in the range of -20 to 85 degrees, the detection resolution is 0.2 degree.

  18. A 16 GHz silicon-based monolithic balanced photodetector with on-chip capacitors for 25 Gbaud front-end receivers.

    PubMed

    Hai, Mohammed Shafiqul; Sakib, Meer Nazmus; Liboiron-Ladouceur, Odile

    2013-12-30

    In this paper, a Germanium-on-Silicon balanced photodetector (BPD) with integrated biasing capacitors is demonstrated for highly compact monolithic 100 Gb/s coherent receivers or 25 Gbaud front-end receivers for differential or quadrature phase shift keying. The balanced photodetector has a bandwidth of approximately 16.2 GHz at a reverse bias of -4.5 V. The balanced photodetector exhibits a common mode rejection ratio (CMRR) of 30 dB. For balanced detection of return-to-zero (RZ) differential phase shift keying (DPSK) signal, the photodetector has a sensitivity of -6.95 dBm at the BER of 10(-12). For non-return-to-zero (NRZ) on off keying (OOK) signal, the measured BER is 1.0 × 10(-12) for a received power of -1.65 dBm at 25 Gb/s and 9.9 × 10(-5) for -0.34 dBm at 30 Gb/s. The total footprint area of the monolithic front-end receiver is less than 1 mm(2). The BPD is packaged onto a ceramic substrate with two DC and one RF connectors exhibits a bandwidth of 15.9 GHz.

  19. TOFPET2: a high-performance ASIC for time and amplitude measurements of SiPM signals in time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Di Francesco, A.; Bugalho, R.; Oliveira, L.; Pacher, L.; Rivetti, A.; Rolo, M.; Silva, J. C.; Silva, R.; Varela, J.

    2016-03-01

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with 320 pF capacitance the circuit has 24 (30) dB SNR, 75(39) ps r.m.s. resolution, and 4(8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  20. Morphological study of lipid vesicles in presence of amphotericin B via modification of the microfluidic CellASIC platform and LED illumination microscopy

    NASA Astrophysics Data System (ADS)

    Genova, J.; Decheva-Zarkova, M.; Pavlič, J. I.

    2016-02-01

    Giant lipid vesicles (liposomes) are the simplest model of the biological cell and can be easily formed from natural or synthetic lipid species with controlled composition and properties. This is the reason why they are the preferred objects for various scientific investigations. Amphotericin B (AmB) is a membrane active drug, used for treatment of systemic fungal infections. In this work we studied the morphological behavior of giant SOPC vesicles in asymmetrical presence of amphotericin B antibiotic in the vicinity of the lipid membrane. The visualization of the vesicles was carried out via inverted phase contrast microscopy. The illumination source was modified in a way that tungsten light bulb was replaced by 10 W white LED chip. All the experiments were performed using CellASIC ONIX Microfluidic Platform. The setup has been modified thus opening new opportunities for a variety of experimental realizations. The performed morphological studies showed strong and irreversible effect on the vesicle shape at the presence of amphotericin B in concentration 10-5 g/l in the outer for the liposome's membrane solution. At concentration 10-3 g/l AmB the effect was less visible and in 15-20 minutes the vesicles regained its initial spherical shape.

  1. Front-end Evaluation as Part of a Comprehensive Approach to Inform the Development of a New Climate Exhibit at NCAR

    NASA Astrophysics Data System (ADS)

    Ristvey, J. D., Jr.; Brinkworth, C.; Hatheway, B.; Williams, V.

    2015-12-01

    In an era of discord in public views of climate change, communicating atmospheric and related sciences to the public at a large research facility like the National Center for Atmospheric Research (NCAR) can be a daunting challenge yet one that is filled with many possibilities. The University Corporation for Atmospheric Research (UCAR) Center for Science Education (SciEd) is responsible for education and outreach activities at UCAR, including the exhibits program. Over 90,000 people visit the NCAR Mesa Lab each year to enjoy a number of exhibits that showcase our community's research. The current climate exhibit is twelve years old, and with advances in our understanding of climate science and exhibit design, SciEd staff are developing a new exhibit that is as cutting edge as the research conducted at NCAR. Based on listening sessions with NCAR scientists, the following big ideas for the exhibit emerged: How the climate system works The climate system is changing How scientists study our climate Regional impacts Solutions The goal of the new climate exhibit is to reach people using a variety of learning styles, including offerings for visitors who learn by doing, as well as providing informative text and images (Hatheway, 2014). Developers and evaluators are working together to conduct front-end, formative, and summative evaluations to understand of the needs of our visitors and collect ongoing data to inform development. The purpose of the front-end evaluation, conducted in the summer of 2014 was to develop informed data-driven strategies to move forward with exhibit design. The evaluation results to be shared in this session include: The demographics and behaviors of visitors Trends in visitors' experiences Visitor input on exhibit design (Williams and Tarsi, 2014). In this presentation, we will share the results, significance, and application of the front-end evaluation as part of a comprehensive approach to study both how we convey information about climate

  2. Proof of concept of an imaging system demonstrator for PET applications with SiPM

    NASA Astrophysics Data System (ADS)

    Morrocchi, Matteo; Marcatili, Sara; Belcari, Nicola; Giuseppina Bisogni, Maria; Collazuol, Gianmaria; Ambrosi, Giovanni; Santoni, Cristiano; Corsi, Francesco; Foresta, Maurizio; Marzocca, Cristoforo; Matarrese, Gianvito; Sportelli, Giancarlo; Guerra, Pedro; Santos, Andres; Del Guerra, Alberto

    2013-08-01

    A PET imaging system demonstrator based on LYSO crystal arrays coupled to SiPM matrices is under construction at the University and INFN of Pisa. Two SiPM matrices, composed of 8×8 SiPM pixels, and 1,5 mm pitch, have been coupled one to one to a LYSO crystals array and read out by a custom electronics system. front-end ASICs were used to read 8 channels of each matrix. Data from each front-end were multiplexed and sent to a DAQ board for the digital conversion; a motherboard collects the data and communicates with a host computer through a USB port for the storage and off-line data processing. In this paper we show the first preliminary tomographic image of a point-like radioactive source acquired with part of the two detection heads in time coincidence.

  3. Coupling strength versus coupling impact in nonidentical bidirectionally coupled dynamics

    NASA Astrophysics Data System (ADS)

    Laiou, Petroula; Andrzejak, Ralph G.

    2017-01-01

    The understanding of interacting dynamics is important for the characterization of real-world networks. In general, real-world networks are heterogeneous in the sense that each node of the network is a dynamics with different properties. For coupled nonidentical dynamics symmetric interactions are not straightforwardly defined from the coupling strength values. Thus, a challenging issue is whether we can define a symmetric interaction in this asymmetric setting. To address this problem we introduce the notion of the coupling impact. The coupling impact considers not only the coupling strength but also the energy of the individual dynamics, which is conveyed via the coupling. To illustrate this concept, we follow a data-driven approach by analyzing signals from pairs of coupled model dynamics using two different connectivity measures. We find that the coupling impact, but not the coupling strength, correctly detects a symmetric interaction between pairs of coupled dynamics regardless of their degree of asymmetry. Therefore, this approach allows us to reveal the real impact that one dynamics has on the other and hence to define symmetric interactions in pairs of nonidentical dynamics.

  4. Breakup of loosely bound nuclei at intermediate energies for nuclear astrophysics and the development of a position sensitive microstrip detector system and its readout electronics using ASICs technologies

    SciTech Connect

    Bertulani, Carlos A.

    2016-01-12

    The work performed under this grant has led to the development of a detection system that will be used to measure reaction rates for proton or neutron capture reactions at stellar energies on radioactive ions far from stability. The reaction rates are needed to better understand the physics of nucleosynthesis in explosive stellar processes such as supernovae and x-ray burst events. The radioactive ions will be produced at the Radioactive Ion Beam Facility (RIBF) at RIKEN near Tokyo, Japan. During the course of this work, the group involved in this project has expanded by several institutions in Europe and Japan and now involves collaborators from the U.S., Japan, Hungary, Romania, Germany, Spain, Italy, China, and South Korea. As part of the project, a novel design based on large-area silicon detectors has been built and tested. The work has involved mechanical construction of a special purpose vacuum chamber, with a precision mounting system for the silicon detectors, development of a new ASICs readout system that has applications with a wide variety of silicon detector systems, and the development of a data acquisition system that is integrated into the computer system being used at RIBF. The parts noted above that are needed to carry out the research program are completed and ready for installation. Several approved experiments that will use this system will be carried out in the near future. The experimental work has been delayed due to a large increase in the cost and availability of electrical power for RIBF that occurred following the massive earthquake and tsunami that hit Japan in the spring of 2011. Another component of the research carried out with this grant involved developing the theoretical tools that are required to extract the information from the experiments that is needed to determine the stellar reaction rates. The tools developed through this part of the work will be made freely available for general use.

  5. A Monolithically Integrated Receiver Front-End Comprising Ion-Implanted Lateral Interdigitated InGaAs Pin And Inp JFET Devices

    NASA Astrophysics Data System (ADS)

    Lee, W. S.; Kitching, S. A.; Bland, S. W.

    1989-11-01

    An optical receiver front-end consisting of a lateral interdigitated InGaAs PIN photodetector integrated with an InP JFET amplifier has been fabricated by selective ion implantation. The lateral interdigitated InGaAs PlN is integrated here for the first time. The advantages of the lateral detector structure are its inherently low capacitance and the simplification of the InGaAs material growth requirement to a single layer. A quasi-planar integration approach has been developed in conjunction with a two-level metallisation interconnect scheme employing polyimide as the inter-level dielectric. An optical sensitivity of -29 dBm has been measured at 560 Mbit/s and 1.3 µm wavelength.

  6. The 3rd generation Front-End cards of the Pierre Auger surface detectors: Test results and performance in the field

    NASA Astrophysics Data System (ADS)

    Szadkowski, Z.; Bäcker, T.; Becker, K.-H.; Buchholz, P.; Fleck, I.; Kampert, K.-H.; Rammes, M.; Rautenberg, J.; Taşcău, O.

    2009-07-01

    The surface detector array of the Pierre Auger Observatory comprises 1600 water Cherenkov detectors distributed over an area of 3000 km2. The Cherenkov light is detected by three 9-in. photo-multiplier tubes from which the signals of the anode and last dynode are digitized by 10 bit 40 MHz FADCs. An Altera Cyclone FPGA is employed to generate different local triggers and to handle the data transfer to a communication board. After briefly discussing the design of the cards we present an autonomous test-bench, which has been set up in order to test the large number of boards prior to installation in the field. The qualification procedure and the results obtained in the laboratory are presented. Up to three years of operation in the field demonstrate a very good performance and reliability of the Front-End cards.

  7. Size distribution of airborne particulate matter emitted by the front-end processing of municipal solid waste feed material for large-scale anaerobic digesters

    SciTech Connect

    Gerrish, H.P.; Narasimhan, R.; Daly, E.L. Jr.; Sengupta, S.; Nemerow, N.L.; Wong, K.V.

    1984-07-01

    A 100-ton/day proof-of-concept facility has been constructed in Pompano Beach, Florida, to examine the feasibility of producing methane-rich gas from the anaerobic digestion of municipal solid waste. One of the possible environmental impacts is from the particulate matter emitted into the atmosphere by the secondary shredding and conveying of light fraction feed material to the digesters. It has been found that the amount of particulate matter emitted into the atmosphere by the front-end processing is an order of magnitude higher when the plant is operating compared to when it is not operating. It has been found that the particle size distribution is bimodal both when the plant is operating as well as when it is not operating. Particle concentrations of episodic nature were found in July 1981 which were four times the concentration found during normal plant operation.

  8. Front-end technologies for robust ASR in reverberant environments—spectral enhancement-based dereverberation and auditory modulation filterbank features

    NASA Astrophysics Data System (ADS)

    Xiong, Feifei; Meyer, Bernd T.; Moritz, Niko; Rehr, Robert; Anemüller, Jörn; Gerkmann, Timo; Doclo, Simon; Goetze, Stefan

    2015-12-01

    This paper presents extended techniques aiming at the improvement of automatic speech recognition (ASR) in single-channel scenarios in the context of the REVERB (REverberant Voice Enhancement and Recognition Benchmark) challenge. The focus is laid on the development and analysis of ASR front-end technologies covering speech enhancement and feature extraction. Speech enhancement is performed using a joint noise reduction and dereverberation system in the spectral domain based on estimates of the noise and late reverberation power spectral densities (PSDs). To obtain reliable estimates of the PSDs—even in acoustic conditions with positive direct-to-reverberation energy ratios (DRRs)—we adopt the statistical model of the room impulse response explicitly incorporating DRRs, as well in combination with a novel proposed joint estimator for the reverberation time T 60 and the DRR. The feature extraction approach is inspired by processing strategies of the auditory system, where an amplitude modulation filterbank is applied to extract the temporal modulation information. These techniques were shown to improve the REVERB baseline in our previous work. Here, we investigate if similar improvements are obtained when using a state-of-the-art ASR framework, and to what extent the results depend on the specific architecture of the back-end. Apart from conventional Gaussian mixture model (GMM)-hidden Markov model (HMM) back-ends, we consider subspace GMM (SGMM)-HMMs as well as deep neural networks in a hybrid system. The speech enhancement algorithm is found to be helpful in almost all conditions, with the exception of deep learning systems in matched training-test conditions. The auditory feature type improves the baseline for all system architectures. The relative word error rate reduction achieved by combining our front-end techniques with current back-ends is 52.7% on average with the REVERB evaluation test set compared to our original REVERB result.

  9. From the sequence to the conformation of the unabridged transmembrane domains TM1 and TM2 of the cASIC1a ion channel - a parallel tempering approach.

    PubMed

    Pietra, Francesco

    2015-03-01

    This work was devised to unravel, along replica-exchange molecular-dynamics (REMD) simulations, the conformation in solution of the TM1 and TM2 transmembrane domains of the homotrimeric cASIC1a ion channel. This includes the head of TM1 and tail of TM2 that had previously defied X-ray diffraction analysis in the crystal. The structure of the open-channel complex of cASIC1a with psalmotoxin 1 (PcTx1) was chosen here as a basis, although, to make the simulations affordable, the procedure was limited to the missing portions, including a few adjacent α-helical turns. The latter were held fixed during the simulations. Reassembling the whole subunit, by superimposition of the fixed portions, resulted in diving of both TM1 and TM2 as continuous α-helices into the cytoplasm. At completion of this work, it appeared, from similar X-ray diffraction studies, that TM2 for both the complex of cASIC1a with the coral snake MitTx toxin, and the isolated desensitized ion channel, is discontinuous, with the triad G443-A444-S445 taking an extended, belt-like conformation. In this way, a filter ring against hydrated ions is formed by G443 in the trimer. Our REMD examination of this complex revealed a strong resistance by G443, and only that residue, to take dihedral-angle values compatible with an α-helical conformation. This suggests that the flexibility of glycine alone does not explain formation of the extended, belt-like conformation of the triad G443-A444-S445. This also requires cooperation in the trimer.

  10. Test results of a self-triggering silicon strip detector readout chip

    NASA Astrophysics Data System (ADS)

    Kasiński, Krzysztof; Szczygieł, Robert; Czermak, Adam

    2009-08-01

    The n-XYter integrated circuit (ASIC) was designed in a CMOS 0.35 μm technology, as a 128-channel, data-driven silicon detector readout chip and became a prototype readout chip for several experiments at the Facility for Antiproton and Ion Research (FAIR). The details of the circuit architecture have already been published [C. Schmidt, et al., in: Proceedings of the Topical Workshop on Electronics for Particle Physics, Prague, Czech Republic, 03-07 September 2007; A. Brogna, et al., Nucl. Instr. and Meth. A 568 (2006) 301]. In this paper we present test results on discriminator threshold spread and its correction, analogue front-end gain measurements and calibration of the time-stamp circuitry. The measurements were performed using on-chip test pulses. The ASIC was connected to a 1 cm long, 100 μm pitch, AC-coupled silicon strip detector (SSD).

  11. Breakup of loosely bound nuclei at intermediate energies for nuclear astrophysics and the development of a position sensitive microstrip detector system and its readout electronics using ASICs technologies

    SciTech Connect

    Tribble, Robert E.; Sobotka, Lee G.; Blackmon, Jeff C.; Bertulani, Carlos A.

    2015-12-29

    The work performed under this grant has led to the development of a detection system that will be used to measure reaction rates for proton or neutron capture reactions at stellar energies on radioactive ions far from stability. The reaction rates are needed to better understand the physics of nucleosynthesis in explosive stellar processes such as supernovae and x-ray burst events. The radioactive ions will be produced at the Radioactive Ion Beam Facility (RIBF) at RIKEN near Tokyo, Japan. During the course of this work, the group involved in this project has expanded by several institutions in Europe and Japan and now involves collaborators from the U.S., Japan, Hungary, Romania, Germany, Spain, Italy, China, and South Korea. As part of the project, a novel design based on large-area silicon detectors has been built and tested and the performance characterized in a series of tests using particle beams with a variety of atomic numbers at the Cyclotron Institute of Texas A&M University and the Heavy Ion Medical Accelerator in Chiba facility (HIMAC) in Chiba, Japan. The work has involved mechanical construction of a special purpose vacuum chamber, with a precision mounting system for the silicon detectors, development of a new ASICs readout system that has applications with a wide variety of silicon detector systems, and the development of a data acquisition system that is integrated into the computer system being used at RIBF. The parts noted above that are needed to carry out the research program are completed and ready for installation. Several approved experiments that will use this system will be carried out in the near future. The experimental work has been delayed due to a large increase in the cost and availability of electrical power for RIBF that occurred following the massive earthquake and tsunami that hit Japan in the spring of 2011. Another component of the research carried out with this grant involved developing the theoretical tools that are required

  12. Couple communication in stepfamilies.

    PubMed

    Halford, Kim; Nicholson, Jan; Sanders, Matthew

    2007-12-01

    Effective communication is assumed to help sustain couple relationships and is a key focus of most relationship education programs. We assessed couple problem-solving communication in 65 stepfamily and 52 first-time-marrying couples, with each group stratified into high risk and low risk for relationship problems based on family-of-origin experiences. Relative to partners in first-time couples, partners in stepfamily couples were less positive, less negative, and more likely to withdraw from discussion. Risk was associated with communication in first-time but not stepfamily couples. Stepfamily couples do not exhibit the negative communication evident in high-risk first-time-marrying couples, and available relationship education programs that focus on reducing negative communication are unlikely to meet the needs of stepfamilies.

  13. Design and Implementation of an Electronic Front-End Based on Square Wave Excitation for Ultrasonic Torsional Guided Wave Viscosity Sensor

    PubMed Central

    Rabani, Amir

    2016-01-01

    The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications. PMID:27754324

  14. Design and evaluation of wide-range and low-power analog front-end enabling body-implanted devices to monitor charge injection properties

    NASA Astrophysics Data System (ADS)

    Ito, Keita; Uno, Shoma; Goto, Tatsuya; Takezawa, Yoshiki; Harashima, Takuya; Morikawa, Takumi; Nishino, Satoru; Kino, Hisashi; Kiyoyama, Koji; Tanaka, Tetsu

    2017-04-01

    For safe electrical stimulation with body-implanted devices, the degradation of stimulus electrodes must be considered because it causes the unexpected electrolysis of water and the destruction of tissues. To monitor the charge injection property (CIP) of stimulus electrodes while these devices are implanted, we have proposed a charge injection monitoring system (CIMS). CIMS can safely read out voltages produced by a biphasic current pulse to a stimulus electrode and CIP is calculated from waveforms of the acquired voltages. In this paper, we describe a wide-range and low-power analog front-end (AFE) for CIMS that has variable gain-frequency characteristics and low-power analog-to-digital (A/D) conversion to adjust to the degradation of stimulus electrodes. The designed AFE was fabricated with 0.18 µm CMOS technology and achieved a valuable gain of 20–60 dB, an upper cutoff frequency of 0.2–10 kHz, and low-power interleaving A/D conversion. In addition, we successfully measured the CIP of stimulus electrodes for body-implanted devices using CIMS.

  15. Towards the development of a wearable Electrical Impedance Tomography system: A study about the suitability of a low power bioimpedance front-end.

    PubMed

    Menolotto, Matteo; Rossi, Stefano; Dario, Paolo; Della Torre, Luigi

    2015-01-01

    Wearable systems for remote monitoring of physiological parameter are ready to evolve towards wearable imaging systems. The Electrical Impedance Tomography (EIT) allows the non-invasive investigation of the internal body structure. The characteristics of this low-resolution and low-cost technique match perfectly with the concept of a wearable imaging device. On the other hand low power consumption, which is a mandatory requirement for wearable systems, is not usually discussed for standard EIT applications. In this work a previously developed low power architecture for a wearable bioimpedance sensor is applied to EIT acquisition and reconstruction, to evaluate the impact on the image of the limited signal to noise ratio (SNR), caused by low power design. Some anatomical models of the chest, with increasing geometric complexity, were developed, in order to evaluate and calibrate, through simulations, the parameters of the reconstruction algorithms provided by Electrical Impedance Diffuse Optical Reconstruction Software (EIDORS) project. The simulation results were compared with experimental measurements taken with our bioimpedance device on a phantom reproducing chest tissues properties. The comparison was both qualitative and quantitative through the application of suitable figures of merit; in this way the impact of the noise of the low power front-end on the image quality was assessed. The comparison between simulation and measurement results demonstrated that, despite the limited SNR, the device is accurate enough to be used for the development of an EIT based imaging wearable system.

  16. Design of a 12-bit 1 MS/s SAR-ADC for front-end readout of 32-channel CZT detector imaging system

    NASA Astrophysics Data System (ADS)

    Liu, Wei; Wei, Tingcun; Li, Bo; Guo, Panjie; Hu, Yongcai

    2015-06-01

    A 12-bit 1MS/s SAR-ADC for the front-end readout of a 32-channel CZT detector imaging system is presented. In order to improve the performances of the ADC, several techniques are proposed. First, a novel offset cancellation method for comparator is proposed, in which no any capacitor is introduced in the signal pathway, thus it has faster operation speed than traditional one. Second, the architecture of unit capacitor array is adopted in the charge-redistribution DAC to reduce the capacitor mismatch. Third, the radiation-hardened ability is enhanced through circuit and layout design. The prototype chip was fabricated using a TSMC 0.35 um 2P4M CMOS process. At a 3.3/5 V power supply, the proposed SAR-ADC achieves 67.64 dB SINAD at 1MS/s, consumes 10 mW power and occupies a core area of 1180×1080 um2.

  17. A 0.18 micrometer CMOS Thermopile Readout ASIC Immune to 50 MRAD Total Ionizing Dose (SI) and Single Event Latchup to 174MeV-cm(exp 2)/mg

    NASA Technical Reports Server (NTRS)

    Quilligan, Gerard T.; Aslam, Shahid; Lakew, Brook; DuMonthier, Jeffery J.; Katz, Richard B.; Kleyner, Igor

    2014-01-01

    Radiation hardened by design (RHBD) techniques allow commercial CMOS circuits to operate in high total ionizing dose and particle fluence environments. Our radiation hard multi-channel digitizer (MCD) ASIC (Figure 1) is a versatile analog system on a chip (SoC) fabricated in 180nm CMOS. It provides 18 chopper stabilized amplifier channels, a 16- bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The MCD was evaluated at Goddard Space Flight Center and Texas A&M University's radiation effects facilities and found to be immune to single event latchup (SEL) and total ionizing dose (TID) at 174 MeV-cm(exp 2)/mg and 50 Mrad (Si) respectively.

  18. Response reactions: equilibrium coupling.

    PubMed

    Hoffmann, Eufrozina A; Nagypal, Istvan

    2006-06-01

    It is pointed out and illustrated in the present paper that if a homogeneous multiple equilibrium system containing k components and q species is composed of the reactants actually taken and their reactions contain only k + 1 species, then we have a unique representation with (q - k) stoichiometrically independent reactions (SIRs). We define these as coupling reactions. All the other possible combinations with k + 1 species are the coupled reactions that are in equilibrium when the (q - k) SIRs are in equilibrium. The response of the equilibrium state for perturbation is determined by the coupling and coupled equilibria. Depending on the circumstances and the actual thermodynamic data, the effect of coupled equilibria may overtake the effect of the coupling ones, leading to phenomena that are in apparent contradiction with Le Chatelier's principle.

  19. Three tooth kinematic coupling

    DOEpatents

    Hale, Layton C.

    2000-01-01

    A three tooth kinematic coupling based on having three theoretical line contacts formed by mating teeth rather than six theoretical point contacts. The geometry requires one coupling half to have curved teeth and the other coupling half to have flat teeth. Each coupling half has a relieved center portion which does not effect the kinematics, but in the limit as the face width approaches zero, three line contacts become six point contacts. As a result of having line contact, a three tooth coupling has greater load capacity and stiffness. The kinematic coupling has application for use in precision fixturing for tools or workpieces, and as a registration device for a work or tool changer or for optics in various products.

  20. The front-end electronics and slow control of large area SiPM for the SST-1M camera developed for the CTA experiment

    NASA Astrophysics Data System (ADS)

    Aguilar, J. A.; Bilnik, W.; Borkowski, J.; Cadoux, F.; Christov, A.; della Volpe, D.; Favre, Y.; Heller, M.; Kasperek, J.; Lyard, E.; Marszałek, A.; Moderski, R.; Montaruli, T.; Porcelli, A.; Prandini, E.; Rajda, P.; Rameez, M.; Schioppa, E.; Troyano Pujadas, I.; Ziȩtara, K.; Błocki, J.; Bogacz, L.; Bulik, T.; Curyło, M.; Dyrda, M.; Frankowski, A.; Grudniki, Ł.; Grudzińska, M.; Idźkowski, B.; Jamrozy, M.; Janiak, M.; Lalik, K.; Mach, E.; Mandat, D.; Michałowski, J.; Neronov, A.; Niemiec, J.; Ostrowski, M.; Paśsko, P.; Pech, M.; Schovanek, P.; Seweryn, K.; Skowron, K.; Sliusar, V.; Sowiński, M.; Stawarz, Ł.; Stodulska, M.; Stodulski, M.; Toscano, S.; Walter, R.; Wiȩcek, M.; Zagdański, A.; Żychowski, P.

    2016-09-01

    The single mirror Small Size Telescope (SST-1M) is one of the proposed designs for the smallest type of telescopes, SSTs that will compose the Cherenkov Telescope Array (CTA). The SST-1M camera will use Silicon PhotoMultipliers (SiPM) which are nowadays commonly used in High Energy Physics experiments and many imaging applications. However the unique pixel shape and size have required a dedicated development by the University of Geneva and Hamamatsu. The resulting sensor has a surface of ∼94 mm2 and a total capacitance of ∼3.4 nF. These unique characteristics, combined with the stringent requirements of the CTA project on timing and charge resolution have led the University of Geneva to develop custom front-end electronics. The preamplifier stage has been tailored in order to optimize the signal shape using measurement campaigns and electronic simulation of the sensor. A dedicated trans-impedance pre-amplifier topology is used resulting in a power consumption of 400 mW per pixel and a pulse width < 30 ns. The measurements that have led to the choice of the different components and the resulting performance are detailed in this paper. The slow control electronics was designed to provide the bias voltage with 6.7 mV precision and to correct for temperature variation with a forward feedback compensation with 0.17 °C resolution. It is fully configurable and can be monitored using CANbus interface. The architecture and the characterization of the various elements are presented.