Step buffer layer of Al0.25Ga0.75N/Al0.08Ga0.92N on P-InAlN gate normally-off high electron mobility transistors

NASA Astrophysics Data System (ADS)

Shrestha, Niraj M.; Li, Yiming; Chang, E. Y.

2016-07-01

Normally-off AlGaN/GaN high electron mobility transistors (HEMTs) are indispensable devices for power electronics as they can greatly simplify circuit designs in a cost-effective way. In this work, the electrical characteristics of p-type InAlN gate normally-off AlGaN/GaN HEMTs with a step buffer layer of Al0.25Ga0.75N/Al0.1Ga0.9N is studied numerically. Our device simulation shows that a p-InAlN gate with a step buffer layer allows the transistor to possess normally-off behavior with high drain current and high breakdown voltage simultaneously. The gate modulation by the p-InAlN gate and the induced holes appearing beneath the gate at the GaN/Al0.25Ga0.75N interface is because a hole appearing in the p-InAlN layer can effectively vary the threshold voltage positively. The estimated threshold voltage of the normally-off HEMTs explored is 2.5 V at a drain bias of 25 V, which is 220% higher than the conventional p-AlGaN normally-off AlGaN/GaN gate injection transistor (GIT). Concurrently, the maximum current density of the explored HEMT at a drain bias of 10 V slightly decreases by about 7% (from 240 to 223 mA mm-1). At a drain bias of 15 V, the current density reached 263 mA mm-1. The explored structure is promising owing to tunable positive threshold voltage and the maintenance of similar current density; notably, its breakdown voltage significantly increases by 36% (from 800 V, GIT, to 1086 V). The engineering findings of this study indicate that novel p-InAlN for both the gate and the step buffer layer can feature a high threshold voltage, large current density and high operating voltage for advanced AlGaN/GaN HEMT devices.

Comparative influence study of gate-formation structuring on Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors

NASA Astrophysics Data System (ADS)

Hsu, M. K.; Chiu, S. Y.; Wu, C. H.; Guo, D. F.; Lour, W. S.

2008-12-01

Pseudomorphic Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors (DH-HEMTs) fabricated with different gate-formation structures of a single-recess gate (SRG), a double-recess gate (DRG) and a field-plate gate (FPG) were comparatively investigated. FPG devices show the best breakdown characteristics among these devices due to great reduction in the peak electric field between the drain and gate electrodes. The measured gate-drain breakdown voltages defined at a 1 mA mm-1 reverse gate-drain current density were -15.3, -19.1 and -26.0 V for SRG, DRG and FPG devices, respectively. No significant differences in their room-temperature common-source current-voltage characteristics were observed. However, FPG devices exhibit threshold voltages being the least sensitive to temperature. Threshold voltages as a function of temperature indicate a threshold-voltage variation as low as -0.97 mV K-1 for FPG devices. According to the 2.4 GHz load-pull power measurement at VDS = 3.0 V and VGS = -0.5 V, the saturated output power (POUT), power gain (GP) and maximum power-added efficiency (PAE) were 10.3 dBm/13.2 dB/36.6%, 11.2 dBm/13.1 dB/39.7% and 13.06 dBm/12.8 dB/47.3%, respectively, for SRG, DRG and FPG devices with a pi-gate in class AB operation. When the FPG device is biased at a VDS of 10 V, the saturated power density is more than 600 mW mm-1.

An “ohmic-first” self-terminating gate-recess technique for normally-off Al2O3/GaN MOSFET

NASA Astrophysics Data System (ADS)

Wang, Hongyue; Wang, Jinyan; Li, Mengjun; He, Yandong; Wang, Maojun; Yu, Min; Wu, Wengang; Zhou, Yang; Dai, Gang

2018-04-01

In this article, an ohmic-first AlGaN/GaN self-terminating gate-recess etching technique was demonstrated where ohmic contact formation is ahead of gate-recess-etching/gate-dielectric-deposition (GRE/GDD) process. The ohmic contact exhibits few degradations after the self-terminating gate-recess process. Besides, when comparing with that using the conventional fabrication process, the fabricated device using the ohmic-first fabrication process shows a better gate dielectric quality in terms of more than 3 orders lower forward gate leakage current, more than twice higher reverse breakdown voltage as well as better stability. Based on this proposed technique, the normally-off Al2O3/GaN MOSFET exhibits a threshold voltage (V th) of ˜1.8 V, a maximum drain current of ˜328 mA/mm, a forward gate leakage current of ˜10-6 A/mm and an off-state breakdown voltage of 218 V at room temperature. Meanwhile, high temperature characteristics of the device was also evaluated and small variations (˜7.6%) of the threshold voltage was confirmed up to 300 °C.

Investigation of the novel attributes in double recessed gate SiC MESFETs at drain side

NASA Astrophysics Data System (ADS)

Orouji, Ali A.; Razavi, S. M.; Ebrahim Hosseini, Seyed; Amini Moghadam, Hamid

2011-11-01

In this paper, the potential impact of drain side-double recessed gate (DS-DRG) on silicon carbide (SiC)-based metal semiconductor field effect transistors (MESFETs) is studied. We investigate the device performance focusing on breakdown voltage, threshold voltage, drain current and dc output conductance with two-dimensional and two-carrier device simulation. Our simulation results demonstrate that the channel thickness under the gate in the drain side is an important factor in the breakdown voltage. Also, the positive shift in the threshold voltage for the DS-DRG structure is larger in comparison with that for the source side-double recessed gate (SS-DRG) SiC MESFET. The saturated drain current for the DS-DRG structure is larger compared to that for the SS-DRG structure. The maximum dc output conductance in the DS-DRG structure is smaller than that in the SS-DRG structure.

Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors

NASA Astrophysics Data System (ADS)

Tsao, Yu-Ching; Chang, Ting-Chang; Chen, Hua-Mao; Chen, Bo-Wei; Chiang, Hsiao-Cheng; Chen, Guan-Fu; Chien, Yu-Chieh; Tai, Ya-Hsiang; Hung, Yu-Ju; Huang, Shin-Ping; Yang, Chung-Yi; Chou, Wu-Ching

2017-01-01

This work demonstrates the generation of abnormal capacitance for amorphous indium-gallium-zinc oxide (a-InGaZnO4) thin-film transistors after being subjected to negative bias stress under ultraviolet light illumination stress (NBIS). At various operation frequencies, there are two-step tendencies in their capacitance-voltage curves. When gate bias is smaller than threshold voltage, the measured capacitance is dominated by interface defects. Conversely, the measured capacitance is dominated by oxygen vacancies when gate bias is larger than threshold voltage. The impact of these interface defects and oxygen vacancies on capacitance-voltage curves is verified by TCAD simulation software.

Investigation of AlGaN/GaN HEMTs degradation with gate pulse stressing at cryogenic temperature

NASA Astrophysics Data System (ADS)

Wang, Ning; Wang, Hui; Lin, Xinpeng; Qi, Yongle; Duan, Tianli; Jiang, Lingli; Iervolino, Elina; Cheng, Kai; Yu, Hongyu

2017-09-01

Degradation on DC characteristics of AlGaN/GaN high electron mobility transistors (HEMTs) after applying pulsed gate stress at cryogenic temperatures is presented in this paper. The nitrogen vacancy near to the AlGaN/GaN interface leads to threshold voltage of stress-free sample shifting positively at low temperature. The anomalous behavior of threshold voltage variation (decrease first and then increase) under gate stressing as compared to stress-free sample is observed when lowing temperature. This can be correlated with the pre-existing electron traps in SiNX layer or at SiNX/AlGaN interface which can be de-activated and the captured electrons inject back to channel with lowering temperature, which counterbalances the influence of nitrogen vacancy on threshold voltage shift.

Ionizing radiation detector

DOEpatents

Thacker, Louis H.

1990-01-01

An ionizing radiation detector is provided which is based on the principle of analog electronic integration of radiation sensor currents in the sub-pico to nano ampere range between fixed voltage switching thresholds with automatic voltage reversal each time the appropriate threshold is reached. The thresholds are provided by a first NAND gate Schmitt trigger which is coupled with a second NAND gate Schmitt trigger operating in an alternate switching state from the first gate to turn either a visible or audible indicating device on and off in response to the gate switching rate which is indicative of the level of radiation being sensed. The detector can be configured as a small, personal radiation dosimeter which is simple to operate and responsive over a dynamic range of at least 0.01 to 1000 R/hr.

Experimental investigation on On-Off current ratio behavior near onset voltage for a pentacene based organic thin film transistor

NASA Astrophysics Data System (ADS)

Amrani, Aumeur El; Es-saghiri, Abdeljabbar; Boufounas, El-Mahjoub; Lucas, Bruno

2018-06-01

The performance of a pentacene based organic thin film transistor (OTFT) with polymethylmethacrylate as a dielectric insulator and indium tin oxide based electrical gate is investigated. On the one hand, we showed that the threshold voltage increases with gate voltage, and on the other hand that it decreases with drain voltage. Thus, we noticed that the onset voltage shifts toward positive voltage values with the drain voltage increase. In addition, threshold-onset differential voltage (TODV) is proposed as an original approach to estimate an averaged carrier density in pentacene. Indeed, a value of about 4.5 × 1016 cm-3 is reached at relatively high gate voltage of -50 V; this value is in good agreement with that reported in literature with other technique measurements. However, at a low applied gate voltage, the averaged pentacene carrier density remains two orders of magnitude lower; it is of about 2.8 × 1014 cm-3 and remains similar to that obtained from space charge limited current approach for low applied bias voltage of about 2.2 × 1014 cm-3. Furthermore, high IOn/IOff and IOn/IOnset current ratios of 5 × 106 and 7.5 × 107 are reported for lower drain voltage, respectively. The investigated OTFTs also showed good electrical performance including carrier mobility increasing with gate voltage; mobility values of 4.5 × 10-2 cm2 V-1 s-1 and of 4.25 × 10-2 cm2 V-1 s-1 are reached for linear and saturation regimes, respectively. These results remain enough interesting since current modulation ratio exceeds a value of 107 that is a quite important requirement than high mobility for some particular logic gate applications.

Gate length variation effect on performance of gate-first self-aligned In₀.₅₃Ga₀.₄₇As MOSFET.

PubMed

Mohd Razip Wee, Mohd F; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y

2013-01-01

A multi-gate n-type In₀.₅₃Ga₀.₄₇As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm(2)/Vs are achieved for the gate length and width of 0.2 µm and 30 µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10(-8) A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared.

Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET

PubMed Central

Mohd Razip Wee, Mohd F.; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y.

2013-01-01

A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm2/Vs are achieved for the gate length and width of 0.2 µm and 30µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10−8 A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared. PMID:24367548

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

NASA Astrophysics Data System (ADS)

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-09-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec.

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

PubMed Central

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-01-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec. PMID:27641430

Temperature-dependent degradation mechanisms of threshold voltage in La2O3-gated n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Ming-Tsong; Hsu, De-Cheng; Juan, Pi-Chun; Wang, Y. L.; Lee, Joseph Ya-min

2010-09-01

Metal-oxide-semiconductor capacitors and n-channel metal-oxide-semiconductor field-effect transistors with La2O3 gate dielectric were fabricated. The positive bias temperature instability was studied. The degradation of threshold voltage (ΔVT) showed an exponential dependence on the stress time in the temperature range from 25 to 75 °C. The degradation of subthreshold slope (ΔS) and gate leakage (IG) with stress voltage was also measured. The degradation of VT is attributed to the oxide trap charges Qot. The extracted activation energy of 0.2 eV is related to a degradation dominated by the release of atomic hydrogen in La2O3 thin films.

Threshold Voltage Instability in A-Si:H TFTS and the Implications for Flexible Displays and Circuits

DTIC Science & Technology

2008-12-01

and negative gate voltages with and without elevated drain voltages for FDC TFTs. Extending techniques used to localize hot electron degradation...in MOSFETs, experiments in our lab have localized the degradation of a-Si:H to the gate dielectric/a-Si:H channel interface [Shringarpure, et al...saturation, increased drain source current measured with the source and drain reversed indicates localization of ΔVth to the gate dielectric/amorphous

Limitations of threshold voltage engineering of AlGaN/GaN heterostructures by dielectric interface charge density and manipulation by oxygen plasma surface treatments

NASA Astrophysics Data System (ADS)

Lükens, G.; Yacoub, H.; Kalisch, H.; Vescan, A.

2016-05-01

The interface charge density between the gate dielectric and an AlGaN/GaN heterostructure has a significant impact on the absolute value and stability of the threshold voltage Vth of metal-insulator-semiconductor (MIS) heterostructure field effect transistor. It is shown that a dry-etching step (as typically necessary for normally off devices engineered by gate-recessing) before the Al2O3 gate dielectric deposition introduces a high positive interface charge density. Its origin is most likely donor-type trap states shifting Vth to large negative values, which is detrimental for normally off devices. We investigate the influence of oxygen plasma annealing techniques of the dry-etched AlGaN/GaN surface by capacitance-voltage measurements and demonstrate that the positive interface charge density can be effectively compensated. Furthermore, only a low Vth hysteresis is observable making this approach suitable for threshold voltage engineering. Analysis of the electrostatics in the investigated MIS structures reveals that the maximum Vth shift to positive voltages achievable is fundamentally limited by the onset of accumulation of holes at the dielectric/barrier interface. In the case of the Al2O3/Al0.26Ga0.74N/GaN material system, this maximum threshold voltage shift is limited to 2.3 V.

Low-voltage electric-double-layer paper transistors gated by microporous SiO2 processed at room temperature

NASA Astrophysics Data System (ADS)

Sun, Jia; Wan, Qing; Lu, Aixia; Jiang, Jie

2009-11-01

Battery drivable low-voltage SnO2-based paper thin-film transistors with a near-zero threshold voltage (Vth=0.06 V) gated by microporous SiO2 dielectric with electric-double-layer (EDL) effect are fabricated at room temperature. The operating voltage is found to be as low as 1.5 V due to the huge gate specific capacitance (1.34 μF/cm2 at 40 Hz) related to EDL formation. The subthreshold gate voltage swing and current on/off ratio is found to be 82 mV/decade and 2.0×105, respectively. The electron field-effect mobility is estimated to be 47.3 cm2/V s based on the measured gate specific capacitance at 40 Hz.

Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

NASA Astrophysics Data System (ADS)

Tang, Lan-Feng; Yu, Guang; Lu, Hai; Wu, Chen-Fei; Qian, Hui-Min; Zhou, Dong; Zhang, Rong; Zheng, You-Dou; Huang, Xiao-Ming

2015-08-01

The influence of white light illumination on the stability of an amorphous InGaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed. Project supported by the State Key Program for Basic Research of China (Grant Nos. 2011CB301900 and 2011CB922100) and the Priority Academic Program Development of Jiangsu Higher Education Institutions, China.

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

NASA Technical Reports Server (NTRS)

Toshishige, Yamada; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

The electrical performance and gate bias stability of an amorphous InGaZnO thin-film transistor with HfO2 high-k dielectrics

NASA Astrophysics Data System (ADS)

Wang, Ruo Zheng; Wu, Sheng Li; Li, Xin Yu; Zhang, Jin Tao

2017-07-01

In this study, we set out to fabricate an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with SiNx/HfO2/SiNx (SHS) sandwiched dielectrics. The J-V and C-V of this SHS film were extracted by the Au/p-Si/SHS/Ti structure. At room temperature the a-IGZO with SHS dielectrics showed the following electrical properties: a threshold voltage of 2.9 V, a subthreshold slope of 0.35 V/decade, an on/off current ratio of 3.5 × 107, and a mobility of 12.8 cm2 V-1 s-1. Finally, we tested the influence of gate bias stress on the TFT, and the result showed that the threshold voltage shifted to a positive voltage when applying a positive gate voltage to the TFT.

Transmission and reflection of charge-density wave packets in a quantum Hall edge controlled by a metal gate

NASA Astrophysics Data System (ADS)

Matsuura, Masahiro; Mano, Takaaki; Noda, Takeshi; Shibata, Naokazu; Hotta, Masahiro; Yusa, Go

2018-02-01

Quantum energy teleportation (QET) is a proposed protocol related to quantum vacuum. The edge channels in a quantum Hall system are well suited for the experimental verification of QET. For this purpose, we examine a charge-density wave packet excited and detected by capacitively coupled front gate electrodes. We observe the waveform of the charge packet, which is proportional to the time derivative of the applied square voltage wave. Further, we study the transmission and reflection behaviors of the charge-density wave packet by applying a voltage to another front gate electrode to control the path of the edge state. We show that the threshold voltages where the dominant direction is switched in either transmission or reflection for dense and sparse wave packets are different from the threshold voltage where the current stops flowing in an equilibrium state.

Top-gate organic depletion and inversion transistors with doped channel and injection contact

NASA Astrophysics Data System (ADS)

Liu, Xuhai; Kasemann, Daniel; Leo, Karl

2015-03-01

Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

DOE Office of Scientific and Technical Information (OSTI.GOV)

Niang, K. M.; Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk; Barquinha, P. M. C.

Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 10{sup 7} s{sup −1}. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys.more » 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.« less

A CMOS matrix for extracting MOSFET parameters before and after irradiation

NASA Technical Reports Server (NTRS)

Blaes, B. R.; Buehler, M. G.; Lin, Y.-S.; Hicks, K. A.

1988-01-01

An addressable matrix of 16 n- and 16 p-MOSFETs was designed to extract the dc MOSFET parameters for all dc gate bias conditions before and after irradiation. The matrix contains four sets of MOSFETs, each with four different geometries that can be biased independently. Thus the worst-case bias scenarios can be determined. The MOSFET matrix was fabricated at a silicon foundry using a radiation-soft CMOS p-well LOCOS process. Co-60 irradiation results for the n-MOSFETs showed a threshold-voltage shift of -3 mV/krad(Si), whereas the p-MOSFETs showed a shift of 21 mV/krad(Si). The worst-case threshold-voltage shift occurred for the n-MOSFETs, with a gate bias of 5 V during the anneal. For the p-MOSFETs, biasing did not affect the shift in the threshold voltage. A parasitic MOSFET dominated the leakage of the n-MOSFET biased with 5 V on the gate during irradiation. Co-60 test results for other parameters are also presented.

Scaling properties of ballistic nano-transistors

PubMed Central

2011-01-01

Recently, we have suggested a scale-invariant model for a nano-transistor. In agreement with experiments a close-to-linear thresh-old trace was found in the calculated ID - VD-traces separating the regimes of classically allowed transport and tunneling transport. In this conference contribution, the relevant physical quantities in our model and its range of applicability are discussed in more detail. Extending the temperature range of our studies it is shown that a close-to-linear thresh-old trace results at room temperatures as well. In qualitative agreement with the experiments the ID - VG-traces for small drain voltages show thermally activated transport below the threshold gate voltage. In contrast, at large drain voltages the gate-voltage dependence is weaker. As can be expected in our relatively simple model, the theoretical drain current is larger than the experimental one by a little less than a decade. PMID:21711899

Interfacial fields in organic field-effect transistors and sensors

NASA Astrophysics Data System (ADS)

Dawidczyk, Thomas J.

Organic electronics are currently being commercialized and present a viable alternative to conventional electronics. These organic materials offer the ability to chemically manipulate the molecule, allowing for more facile mass processing techniques, which in turn reduces the cost. One application where organic semiconductors (OSCs) are being investigated is sensors. This work evaluates an assortment of n- and p-channel semiconductors as organic field-effect transistor (OFET) sensors. The sensor responses to dinitrotoluene (DNT) vapor and solid along with trinitrotoluene (TNT) solid were studied. Different semiconductor materials give different magnitude and direction of electrical current response upon exposure to DNT. Additional OFET parameters---mobility and threshold voltage---further refine the response to the DNT with each OFET sensor requiring a certain gate voltage for an optimized response to the vapor. The pattern of responses has sufficient diversity to distinguish DNT from other vapors. To effectively use these OFET sensors in a circuit, the threshold voltage needs to be tuned for each transistor to increase the efficiency of the circuit and maximize the sensor response. The threshold voltage can be altered by embedding charges into the dielectric layer of the OFET. To study the quantity and energy of charges needed to alter the threshold voltage, charge carriers were injected into polystyrene (PS) and investigated with scanning Kelvin probe microscopy (SKPM) and thermally stimulated discharge current (TSDC). Lateral heterojunctions of pentacene/PS were scanned using SKPM, effectively observing polarization along a side view of a lateral nonvolatile organic field-effect transistor dielectric interface. TSDC was used to observe charge migration out of PS films and to estimate the trap energy level inside the PS, using the initial rise method. The process was further refined to create lateral heterojunctions that were actual working OFETs, consisting of a PS or poly (3-trifluoro)styrene (F-PS) gate dielectric and a pentacene OSC. The charge storage inside the dielectric was visualized with SKPM, correlated to a threshold voltage shift in the transistor operation, and related to bias stress as well. The SKPM method allows the dielectric/OSC interface of the OFET to be visualized without any alteration of the OFET. Furthermore, this technique allows for the observation of charge distribution between the two dielectric interfaces, PS and F-PS. The SKPM is used to visualize the charge from conventional gate biasing and also as a result of embedding charges deliberately into the dielectric to shift the threshold voltage. Conventional gate biasing shows considerable residual charge in the PS dielectric, which results in gate bias stress. Gate bias stress is one of the major hurdles left in the commercialization of OFETs. To prevent this bias stress, additives of different energy levels were inserted into the dielectric to limit the gate bias stress. Additionally, the dielectrics were pre-charged to try and prevent further bias stress. Neither pre-charging the dielectric or the addition of additive has been used in gate bias prevention, but both methods offer improved resistance to gate bias stress, and help to further refine the dielectric design.

Temperature dependence of DC transport characteristics for a two-dimensional electron gas in an undoped Si/SiGe heterostructure

NASA Astrophysics Data System (ADS)

Chou, Kuan-Yu; Hsu, Nai-Wen; Su, Yi-Hsin; Chou, Chung-Tao; Chiu, Po-Yuan; Chuang, Yen; Li, Jiun-Yun

2018-02-01

We investigate DC characteristics of a two-dimensional electron gas (2DEG) in an undoped Si/SiGe heterostructure and its temperature dependence. An insulated-gate field-effect transistor was fabricated, and transfer characteristics were measured at 4 K-300 K. At low temperatures (T < 45 K), source electrons are injected into the buried 2DEG channel first and drain current increases with the gate voltage. By increasing the gate voltage further, the current saturates followed by a negative transconductance observed, which can be attributed to electron tunneling from the buried channel to the surface channel. Finally, the drain current is saturated again at large gate biases due to parallel conduction of buried and surface channels. By increasing the temperature, an abrupt increase in threshold voltage is observed at T ˜ 45 K and it is speculated that negatively charged impurities at the Al2O3/Si interface are responsible for the threshold voltage shift. At T > 45 K, the current saturation and negative transconductance disappear and the device acts as a normal transistor.

Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

NASA Astrophysics Data System (ADS)

Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

2017-12-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

Stable indium oxide thin-film transistors with fast threshold voltage recovery

NASA Astrophysics Data System (ADS)

Vygranenko, Yuriy; Wang, Kai; Nathan, Arokia

2007-12-01

Stable thin-film transistors (TFTs) with semiconducting indium oxide channel and silicon dioxide gate dielectric were fabricated by reactive ion beam assisted evaporation and plasma-enhanced chemical vapor deposition. The field-effect mobility is 3.3cm2/Vs, along with an on/off current ratio of 106, and subthreshold slope of 0.5V/decade. When subject to long-term gate bias stress, the TFTs show fast recovery of the threshold voltage (VT) when relaxed without annealing, suggesting that charge trapping at the interface and/or in the bulk gate dielectric to be the dominant mechanism underlying VT instability. Device performance and stability make indium oxide TFTs promising for display applications.

Upsets in Erased Floating Gate Cells With High-Energy Protons

DOE PAGES

Gerardin, S.; Bagatin, M.; Paccagnella, A.; ...

2017-01-01

We discuss upsets in erased floating gate cells, due to large threshold voltage shifts, using statistical distributions collected on a large number of memory cells. The spread in the neutral threshold voltage appears to be too low to quantitatively explain the experimental observations in terms of simple charge loss, at least in SLC devices. The possibility that memories exposed to high energy protons and heavy ions exhibit negative charge transfer between programmed and erased cells is investigated, although the analysis does not provide conclusive support to this hypothesis.

A theoretical approach to study the optical sensitivity of a MESFET

NASA Astrophysics Data System (ADS)

Dutta, Sutanu

2018-05-01

A theoretical model to study the optical sensitivity of a metal-semiconductor field effect transistor has been proposed for a relatively high drain field. An analytical expression of drain current of the device has been derived for a MESFET under optical illumination considering field dependent mobility of electrons across the channel. The variation of drain current with and without optical illumination has been studied with drain and gate voltages. The optical sensitivity of the drain current has been studied for different biasing conditions and gate lengths. In addition, the shift in threshold voltage of a MESFET under optical illumination is determined and optical sensitivity of the device in terms of its threshold voltage has been studied.

Pseudo-diode based on protonic/electronic hybrid oxide transistor

NASA Astrophysics Data System (ADS)

Fu, Yang Ming; Liu, Yang Hui; Zhu, Li Qiang; Xiao, Hui; Song, An Ran

2018-01-01

Current rectification behavior has been proved to be essential in modern electronics. Here, a pseudo-diode is proposed based on protonic/electronic hybrid indium-gallium-zinc oxide electric-double-layer (EDL) transistor. The oxide EDL transistors are fabricated by using phosphorous silicate glass (PSG) based proton conducting electrolyte as gate dielectric. A diode operation mode is established on the transistor, originating from field configurable proton fluxes within the PSG electrolyte. Current rectification ratios have been modulated to values ranged between ˜4 and ˜50 000 with gate electrode biased at voltages ranged between -0.7 V and 0.1 V. Interestingly, the proposed pseudo-diode also exhibits field reconfigurable threshold voltages. When the gate is biased at -0.5 V and 0.3 V, threshold voltages are set to ˜-1.3 V and -0.55 V, respectively. The proposed pseudo-diode may find potential applications in brain-inspired platforms and low-power portable systems.

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2015-08-12

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Pentacene-based low voltage organic field-effect transistors with anodized Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Jeong, Yeon Taek; Dodabalapur, Ananth

2007-11-01

Pentacene-based low voltage organic field-effect transistors were realized using an anodized Ta2O5 gate dielectric. The Ta2O5 gate dielectric layer with a surface roughness of 1.3Å was obtained by anodizing an e-beam evaporated Ta film. The device exhibited values of saturation mobility, threshold voltage, and Ion/Ioff ratio of 0.45cm2/Vs, 0.56V, and 7.5×101, respectively. The gate leakage current was reduced by more than 70% with a hexamethyldisilazane (HMDS) treatment on the Ta2O5 layer. The HMDS treatment also resulted in enhanced mobility values and a larger pentacene grain size.

Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan

High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio andmore » good memory retention.« less

Observation of electric potential in organic thin-film transistor by bias-applied hard X-ray photoemission spectroscopy

NASA Astrophysics Data System (ADS)

Watanabe, Takeshi; Tada, Keisuke; Yasuno, Satoshi; Oji, Hiroshi; Yoshimoto, Noriyuki; Hirosawa, Ichiro

2016-03-01

The effect of gate voltage on electric potential in a pentacene (PEN) layer was studied by hard X-ray photoelectron spectroscopy under a bias voltage. It was observed that applying a negative gate voltage substantially increases the width of a C 1s peak. This suggested that injected and accumulated carriers in an organic thin film transistor channel modified the potential depth profile in PEN. It was also observed that the C 1s kinetic energy tends to increase monotonically with threshold voltage.

Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

PubMed

Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

2014-12-24

We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

On the physical operation and optimization of the p-GaN gate in normally-off GaN HEMT devices

NASA Astrophysics Data System (ADS)

Efthymiou, L.; Longobardi, G.; Camuso, G.; Chien, T.; Chen, M.; Udrea, F.

2017-03-01

In this study, an investigation is undertaken to determine the effect of gate design parameters on the on-state characteristics (threshold voltage and gate turn-on voltage) of pGaN/AlGaN/GaN high electron mobility transistors (HEMTs). Design parameters considered are pGaN doping and gate metal work function. The analysis considers the effects of variations on these parameters using a TCAD model matched with experimental results. A better understanding of the underlying physics governing the operation of these devices is achieved with a view to enable better optimization of such gate designs.

Biophysical mechanism of spike threshold dependence on the rate of rise of the membrane potential by sodium channel inactivation or subthreshold axonal potassium current

PubMed Central

Wester, Jason C.

2013-01-01

Spike threshold filters incoming inputs and thus gates activity flow through neuronal networks. Threshold is variable, and in many types of neurons there is a relationship between the threshold voltage and the rate of rise of the membrane potential (dVm/dt) leading to the spike. In primary sensory cortex this relationship enhances the sensitivity of neurons to a particular stimulus feature. While Na+ channel inactivation may contribute to this relationship, recent evidence indicates that K+ currents located in the spike initiation zone are crucial. Here we used a simple Hodgkin-Huxley biophysical model to systematically investigate the role of K+ and Na+ current parameters (activation voltages and kinetics) in regulating spike threshold as a function of dVm/dt. Threshold was determined empirically and not estimated from the shape of the Vm prior to a spike. This allowed us to investigate intrinsic currents and values of gating variables at the precise voltage threshold. We found that Na+ inactivation is sufficient to produce the relationship provided it occurs at hyperpolarized voltages combined with slow kinetics. Alternatively, hyperpolarization of the K+ current activation voltage, even in the absence of Na+ inactivation, is also sufficient to produce the relationship. This hyperpolarized shift of K+ activation allows an outward current prior to spike initiation to antagonize the Na+ inward current such that it becomes self-sustaining at a more depolarized voltage. Our simulations demonstrate parameter constraints on Na+ inactivation and the biophysical mechanism by which an outward current regulates spike threshold as a function of dVm/dt. PMID:23344915

Effects of trap-assisted tunneling on gate-induced drain leakage in silicon-germanium channel p-type FET for scaled supply voltages

NASA Astrophysics Data System (ADS)

Tiwari, Vishal A.; Divakaruni, Rama; Hook, Terence B.; Nair, Deleep R.

2016-04-01

Silicon-germanium is considered as an alternative channel material to silicon p-type FET (pFET) for the development of energy efficient high performance transistors for 28 nm and beyond in a high-k metal gate technology because of its lower threshold voltage and higher mobility. However, gate-induced drain leakage (GIDL) is a concern for high threshold voltage device design because of tunneling at reduced bandgap. In this work, the trap-assisted tunneling and band-to-band tunneling (BTBT) effects on GIDL is analyzed and modeled for SiGe pFETs. Experimental results and Monte Carlo simulation results reveal that the pre-halo germanium pre-amorphization implant used to contain the short channel effects contribute to GIDL at the drain sidewall in addition to GIDL due to BTBT in SiGe devices. The results are validated by comparing the experimental observations with the numerical simulation and a set of calibrated models are used to describe the GIDL mechanisms for various drain and gate bias.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Won Lee, Sang; Suh, Dongseok, E-mail: energy.suh@skku.edu; Department of Energy Science and Department of Physics, Sungkyunkwan University, Suwon 440-746

A prior requirement of any developed transistor for practical use is the stability test. Random network carbon nanotube-thin film transistor (CNT-TFT) was fabricated on SiO{sub 2}/Si. Gate bias stress stability was investigated with various passivation layers of HfO{sub 2} and Al{sub 2}O{sub 3}. Compared to the threshold voltage shift without passivation layer, the measured values in the presence of passivation layers were reduced independent of gate bias polarity except HfO{sub 2} under positive gate bias stress (PGBS). Al{sub 2}O{sub 3} capping layer was found to be the best passivation layer to prevent ambient gas adsorption, while gas adsorption on HfO{submore » 2} layer was unavoidable, inducing surface charges to increase threshold voltage shift in particular for PGBS. This high performance in the gate bias stress test of CNT-TFT even superior to that of amorphous silicon opens potential applications to active TFT industry for soft electronics.« less

A Substrate Bias Effect on Recovery of the Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Han, Chang-Wook; Han, Min-Koo; Choi, Nack-Bong; Kim, Chang-Dong; Kim, Ki-Yong; Chung, In-Jae

2007-07-01

Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) were fabricated on a flexible stainless-steel (SS) substrate. The stability of the a-Si:H TFT is a key issue for active matrix organic light-emitting diodes (AMOLEDs). The drain current decreases because of the threshold voltage shift (Δ VTH) during OLED driving. A negative voltage at a floated gate can be induced by a negative substrate bias through a capacitor between the substrate and the gate electrode without additional circuits. The negative voltage biased at the SS substrate can recover Δ VTH and reduced drain current of the driving TFT. The VTH of the TFT increased by 2.3 V under a gate bias of +15 V and a drain bias of +15 V at 65 °C applied for 3,500 s. The VTH decreased by -2.3 V and the drain current recovered 97% of its initial value under a substrate bias of -23 V at 65 °C applied for 3,500 s.

Variable-Threshold Threshold Elements,

DTIC Science & Technology

A threshold element is a mathematical model of certain types of logic gates and of a biological neuron. Much work has been done on the subject of... threshold elements with fixed thresholds; this study concerns itself with elements in which the threshold may be varied, variable- threshold threshold ...elements. Physical realizations include resistor-transistor elements, in which the threshold is simply a voltage. Variation of the threshold causes the

Low-Temperature-Processed Zinc Oxide Thin-Film Transistors Fabricated by Plasma-Assisted Atomic Layer Deposition

NASA Astrophysics Data System (ADS)

Kawamura, Yumi; Tani, Mai; Hattori, Nozomu; Miyatake, Naomasa; Horita, Masahiro; Ishikawa, Yasuaki; Uraoka, Yukiharu

2012-02-01

We investigated zinc oxide (ZnO) thin films prepared by plasma assisted atomic layer deposition (PA-ALD), and thin-film transistors (TFTs) with the ALD ZnO channel layer for application to next-generation displays. We deposited the ZnO channel layer by PA-ALD at 100 or 300 °C, and fabricated TFTs. The transfer characteristic of the 300 °C-deposited ZnO TFT exhibited high mobility (5.7 cm2 V-1 s-1), although the threshold voltage largely shifted toward the negative (-16 V). Furthermore, we deposited Al2O3 thin film as a gate insulator by PA-ALD at 100 °C for the low-temperature TFT fabrication process. In the case of ZnO TFTs with the Al2O3 gate insulator, the shift of the threshold voltage improved (-0.1 V). This improvement of the negative shift seems to be due to the negative charges of the Al2O3 film deposited by PA-ALD. On the basis of the experimental results, we confirmed that the threshold voltage of ZnO TFTs is controlled by PA-ALD for the deposition of the gate insulator.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device andmore » thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.« less

Reduced distribution of threshold voltage shift in double layer NiSi2 nanocrystals for nano-floating gate memory applications.

PubMed

Choi, Sungjin; Lee, Junhyuk; Kim, Donghyoun; Oh, Seulki; Song, Wangyu; Choi, Seonjun; Choi, Eunsuk; Lee, Seung-Beck

2011-12-01

We report on the fabrication and capacitance-voltage characteristics of double layer nickel-silicide nanocrystals with Si3N4 interlayer tunnel barrier for nano-floating gate memory applications. Compared with devices using SiO2 interlayer, the use of Si3N4 interlayer separation reduced the average size (4 nm) and distribution (+/- 2.5 nm) of NiSi2 nanocrystal (NC) charge traps by more than 50% and giving a two fold increase in NC density to 2.3 x 10(12) cm(-2). The increased density and reduced NC size distribution resulted in a significantly decrease in the distribution of the device C-V characteristics. For each program voltage, the distribution of the shift in the threshold voltage was reduced by more than 50% on average to less than 0.7 V demonstrating possible multi-level-cell operation.

Optimizing MOS-gated thyristor using voltage-based equivalent circuit model for designing steep-subthreshold-slope PN-body-tied silicon-on-insulator FET

NASA Astrophysics Data System (ADS)

Ueda, Daiki; Takeuchi, Kiyoshi; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

A new circuit model that provides a clear guide on designing a MOS-gated thyristor (MGT) is reported. MGT plays a significant role in achieving a steep subthreshold slope of a PN-body tied silicon-on-insulator (SOI) FET (PNBTFET), which is an SOI MOSFET merged with an MGT. The effects of design parameters on MGT and the proposed equivalent circuit model are examined to determine how to regulate the voltage response of MGT and how to suppress power dissipation. It is demonstrated that MGT with low threshold voltages, small hysteresis widths, and small power dissipation can be designed by tuning design parameters. The temperature dependence of MGT is also examined, and it is confirmed that hysteresis width decreases with the average threshold voltage kept nearly constant as temperature rises. The equivalent circuit model can be conveniently used to design low-power PNBTFET.

Low-voltage organic strain sensor on plastic using polymer/high- K inorganic hybrid gate dielectrics

NASA Astrophysics Data System (ADS)

Jung, Soyoun; Ji, Taeksoo; Varadan, Vijay K.

2007-12-01

In this paper, gate-induced pentacene semiconductor strain sensors based on hybrid-gate dielectrics using poly-vinylphenol (PVP) and high-K inorganic, Ta IIO 5 are fabricated on flexible substrates, polyethylene naphthalate (PEN). The Ta IIO 5 gate dielectric layer is combined with a thin PVP layer to obtain very smooth and hydrophobic surfaces which improve the molecular structures of pentacene films. The PVP-Ta IIO 5 hybrid-gate dielectric films exhibit a high dielectric capacitance and low leakage current. The sensors adopting thin film transistor (TFT)-like structures show a significantly reduced operating voltage (~6V), and good device characteristics with a field-effect mobility of 1.89 cm2/V•s, a threshold voltage of -0.5 V, and an on/off ratio of 10 3. The strain sensor, one of the practical applications in large-area organic electronics, was characterized with different bending radii of 50, 40, 30, and 20 mm. The sensor output signals were significantly improved with low-operating voltages.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

New design of a passive type RADFET reader for enhanced sensitivity

NASA Astrophysics Data System (ADS)

Lee, Dae-Hee

2016-07-01

We present a new design of a passive type RADFET reader with enhanced radiation sensitivity. Using a electostatic plate, we have applied a static electric field to the gate voltage, which impacts a positive biasing on the p-type MOSFET. The resultant effect shows that 1.8 times of radiation sensitivity increased when we measured the threshold voltage shift of the RADFET exposed to 30 krad irradiation. We discuss further about the characteristic changes of a RADFET according to the positive biasing on the gate voltage.

SONOS Nonvolatile Memory Cell Programming Characteristics

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

Performance analysis of SiGe double-gate N-MOSFET

NASA Astrophysics Data System (ADS)

Singh, A.; Kapoor, D.; Sharma, R.

2017-04-01

The major purpose of this paper is to find an alternative configuration that not only minimizes the limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET. The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool. Moreover, we have designed its structure and studied both {I}{{d}}{-}{V}{{g}} characteristics for different voltages namely 0.05, 0.1, 0.5, 0.8, 1 and 1.5 V and {I}{{d}}{-}{V}{{d}} characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.

Study of mechanism of stress-induced threshold voltage shift and recovery in top-gate amorphous-InGaZnO4 thin-film transistors with source- and drain-offsets

NASA Astrophysics Data System (ADS)

Mativenga, Mallory; Kang, Dong Han; Lee, Ung Gi; Jang, Jin

2012-09-01

Bias instability of top-gate amorphous-indium-gallium-zinc-oxide thin-film transistors with source- and drain-offsets is reported. Positive and negative gate bias-stress (VG_STRESS) respectively induce reversible negative threshold-voltage shift (ΔVTH) and reduction in on-current. Migration of positive charges towards the offsets lowers the local resistance of the offsets, resulting in the abnormal negative ΔVTH under positive VG_STRESS. The reduction in on-current under negative VG_STRESS is due to increase in resistance of the offsets when positive charges migrate away from the offsets. Appropriate drain and source bias-stresses applied simultaneously with VG_STRESS either suppress or enhance the instability, verifying lateral ion migration to be the instability mechanism.

Hysteresis-Free Carbon Nanotube Field-Effect Transistors.

PubMed

Park, Rebecca S; Hills, Gage; Sohn, Joon; Mitra, Subhasish; Shulaker, Max M; Wong, H-S Philip

2017-05-23

While carbon nanotube (CNT) field-effect transistors (CNFETs) promise high-performance and energy-efficient digital systems, large hysteresis degrades these potential CNFET benefits. As hysteresis is caused by traps surrounding the CNTs, previous works have shown that clean interfaces that are free of traps are important to minimize hysteresis. Our previous findings on the sources and physics of hysteresis in CNFETs enabled us to understand the influence of gate dielectric scaling on hysteresis. To begin with, we validate through simulations how scaling the gate dielectric thickness results in greater-than-expected benefits in reducing hysteresis. Leveraging this insight, we experimentally demonstrate reducing hysteresis to <0.5% of the gate-source voltage sweep range using a very large-scale integration compatible and solid-state technology, simply by fabricating CNFETs with a thin effective oxide thickness of 1.6 nm. However, even with negligible hysteresis, large subthreshold swing is still observed in the CNFETs with multiple CNTs per transistor. We show that the cause of large subthreshold swing is due to threshold voltage variation between individual CNTs. We also show that the source of this threshold voltage variation is not explained solely by variations in CNT diameters (as is often ascribed). Rather, other factors unrelated to the CNTs themselves (i.e., process variations, random fixed charges at interfaces) are a significant factor in CNT threshold voltage variations and thus need to be further improved.

Application of pentacene thin-film transistors with controlled threshold voltages to enhancement/depletion inverters

NASA Astrophysics Data System (ADS)

Takahashi, Hajime; Hanafusa, Yuki; Kimura, Yoshinari; Kitamura, Masatoshi

2018-03-01

Oxygen plasma treatment has been carried out to control the threshold voltage in organic thin-film transistors (TFTs) having a SiO2 gate dielectric prepared by rf sputtering. The threshold voltage linearly changed in the range of -3.7 to 3.1 V with the increase in plasma treatment time. Although the amount of change is smaller than that for organic TFTs having thermally grown SiO2, the tendency of the change was similar to that for thermally grown SiO2. To realize different plasma treatment times on the same substrate, a certain region on the SiO2 surface was selected using a shadow mask, and was treated with oxygen plasma. Using the process, organic TFTs with negative threshold voltages and those with positive threshold voltages were fabricated on the same substrate. As a result, enhancement/depletion inverters consisting of the organic TFTs operated at supply voltages of 5 to 15 V.

Protonic/electronic hybrid oxide transistor gated by chitosan and its full-swing low voltage inverter applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chao, Jin Yu; Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201; Zhu, Li Qiang, E-mail: lqzhu@nimte.ac.cn

Modulation of charge carrier density in condensed materials based on ionic/electronic interaction has attracted much attention. Here, protonic/electronic hybrid indium-zinc-oxide (IZO) transistors gated by chitosan based electrolyte were obtained. The chitosan-based electrolyte illustrates a high proton conductivity and an extremely strong proton gating behavior. The transistor illustrates good electrical performances at a low operating voltage of ∼1.0 V such as on/off ratio of ∼3 × 10{sup 7}, subthreshold swing of ∼65 mV/dec, threshold voltage of ∼0.3 V, and mobility of ∼7 cm{sup 2}/V s. Good positive gate bias stress stabilities are obtained. Furthermore, a low voltage driven resistor-loaded inverter was built by using an IZO transistor inmore » series with a load resistor, exhibiting a linear relationship between the voltage gain and the supplied voltage. The inverter is also used for decreasing noises of input signals. The protonic/electronic hybrid IZO transistors have potential applications in biochemical sensors and portable electronics.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Le, Son Phuong; Ui, Toshimasa; Nguyen, Tuan Quy

Using aluminum titanium oxide (AlTiO, an alloy of Al{sub 2}O{sub 3} and TiO{sub 2}) as a high-k gate insulator, we fabricated and investigated AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. From current low-frequency noise (LFN) characterization, we find Lorentzian spectra near the threshold voltage, in addition to 1/f spectra for the well-above-threshold regime. The Lorentzian spectra are attributed to electron trapping/detrapping with two specific time constants, ∼25 ms and ∼3 ms, which are independent of the gate length and the gate voltage, corresponding to two trap level depths of 0.5–0.7 eV with a 0.06 eV difference in the AlTiO insulator. In addition, gate leakage currents aremore » analyzed and attributed to the Poole-Frenkel mechanism due to traps in the AlTiO insulator, where the extracted trap level depth is consistent with the Lorentzian LFN.« less

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

[Protective effect of Uncaria rhynchophylla total alkaloids pretreatment on hippocampal neurons after acute hypoxia].

PubMed

Liu, Wei; Zhang, Zhao-qin; Zhao, Xiao-min; Gao, Yun-sheng

2006-05-01

To investigate the effect of Uncaria rhynchophylla total alkaloids (RTA) pretreatment on the voltage-gated sodium currents of the rat hippocampal neurons after acute hypoxia. Primary cultured hippocampal neurons were divided into RTA pre-treated and non-pretreated groups. Patch clamp whole-cell recording was used to compare the voltage-gated sodium current amplitude and threshold with those before hypoxia. After acute hypoxia, sodium current amplitude was significantly decreased and its threshold was upside. RTA pretreatment could inhibit the reduction of sodium current amplitude. RTA pretreatment alleviates the acute hypoxia-induced change of sodium currents, which may be one of the mechanisms for protective effect of RTA on cells.

Bias stress instability of double-gate a-IGZO TFTs on polyimide substrate

NASA Astrophysics Data System (ADS)

Cho, Won-Ju; Ahn, Min-Ju

2017-09-01

In this study, flexible double-gate thin-film transistor (TFT)-based amorphous indium-galliumzinc- oxide (a-IGZO) was fabricated on a polyimide substrate. Double-gate operation with connected front and back gates was compared with a single-gate operation. As a result, the double-gate a- IGZO TFT exhibited enhanced electrical characteristics as well as improved long-term reliability. Under positive- and negative-bias temperature stress, the threshold voltage shift of the double-gate operation was much smaller than that of the single-gate operation.

Response of pMOS dosemeters on gamma-ray irradiation during its re-use.

PubMed

Pejovic, Milic M; Pejovic, Momcilo M; Jaksic, Aleksandar B

2013-08-01

Response of pMOS dosemeters during two successive irradiations with gamma-ray irradiation to a dose of 35 Gy and annealing at room and elevated temperature has been studied. The response was followed on the basis of threshold voltage shift, determined from transfer characteristics, as a function of absorbed dose or annealing time. It was shown that the threshold voltage shifts during first and second irradiation for the gate bias during irradiation of 5 and 2.5 V insignificantly differ although complete fading was not achieved after the first cycle of annealing. In order to analyse the defects formed in oxide and at the interface during irradiation and annealing, which are responsible for threshold voltage shift, midgap and charge-pumping techniques were used. It was shown that during first irradiation and annealing a dominant influence to threshold voltage shift is made by fixed oxide traps, while at the beginning of the second annealing cycle, threshold voltage shift is a consequence of both fixed oxide traps and slow switching traps.

Low-Voltage InGaZnO Thin Film Transistors with Small Sub-Threshold Swing.

PubMed

Cheng, C H; Chou, K I; Hsu, H H

2015-02-01

We demonstrate a low-voltage driven, indium-gallium-zinc oxide thin-film transistor using high-κ LaAlO3 gate dielectric. A low VT of 0.42 V, very small sub-threshold swing of 68 mV/dec, field-effect mobility of 4.1 cm2/Ns and low operation voltage of 1.4 V were reached simultaneously in LaAlO3/IGZO TFT device. This low-power and small SS TFT has the potential for fast switching speed and low power applications.

Compact universal logic gates realized using quantization of current in nanodevices.

PubMed

Zhang, Wancheng; Wu, Nan-Jian; Yang, Fuhua

2007-12-12

This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

PubMed

Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

2016-08-10

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Optimal Dynamic Sub-Threshold Technique for Extreme Low Power Consumption for VLSI

NASA Technical Reports Server (NTRS)

Duong, Tuan A.

2012-01-01

For miniaturization of electronics systems, power consumption plays a key role in the realm of constraints. Considering the very large scale integration (VLSI) design aspect, as transistor feature size is decreased to 50 nm and below, there is sizable increase in the number of transistors as more functional building blocks are embedded in the same chip. However, the consequent increase in power consumption (dynamic and leakage) will serve as a key constraint to inhibit the advantages of transistor feature size reduction. Power consumption can be reduced by minimizing the voltage supply (for dynamic power consumption) and/or increasing threshold voltage (V(sub th), for reducing leakage power). When the feature size of the transistor is reduced, supply voltage (V(sub dd)) and threshold voltage (V(sub th)) are also reduced accordingly; then, the leakage current becomes a bigger factor of the total power consumption. To maintain low power consumption, operation of electronics at sub-threshold levels can be a potentially strong contender; however, there are two obstacles to be faced: more leakage current per transistor will cause more leakage power consumption, and slow response time when the transistor is operated in weak inversion region. To enable low power consumption and yet obtain high performance, the CMOS (complementary metal oxide semiconductor) transistor as a basic element is viewed and controlled as a four-terminal device: source, drain, gate, and body, as differentiated from the traditional approach with three terminals: i.e., source and body, drain, and gate. This technique features multiple voltage sources to supply the dynamic control, and uses dynamic control to enable low-threshold voltage when the channel (N or P) is active, for speed response enhancement and high threshold voltage, and when the transistor channel (N or P) is inactive, to reduce the leakage current for low-leakage power consumption.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium-gallium-zinc oxide gate stack.

PubMed

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-20

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10 4 ). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium–gallium–zinc oxide gate stack

NASA Astrophysics Data System (ADS)

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-01

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium–gallium–zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>104). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

Stability study of solution-processed zinc tin oxide thin-film transistors

NASA Astrophysics Data System (ADS)

Zhang, Xue; Ndabakuranye, Jean Pierre; Kim, Dong Wook; Choi, Jong Sun; Park, Jaehoon

2015-11-01

In this study, the environmental dependence of the electrical stability of solution-processed n-channel zinc tin oxide (ZTO) thin-film transistors (TFTs) is reported. Under a prolonged negative gate bias stress, a negative shift in threshold voltage occurs in atmospheric air, whereas a negligible positive shift in threshold voltage occurs under vacuum. In the positive bias-stress experiments, a positive shift in threshold voltage was invariably observed both in atmospheric air and under vacuum. In this study, the negative gate-bias-stress-induced instability in atmospheric air is explained through an internal potential in the ZTO semiconductor, which can be generated owing to the interplay between H2O molecules and majority carrier electrons at the surface of the ZTO film. The positive bias-stress-induced instability is ascribed to electron-trapping phenomenon in and around the TFT channel region, which can be further augmented in the presence of air O2 molecules. These results suggest that the interaction between majority carriers and air molecules will have crucial implications for a reliable operation of solution-processed ZTO TFTs. [Figure not available: see fulltext.

Performance analysis and simulation of vertical gallium nitride nanowire transistors

NASA Astrophysics Data System (ADS)

Witzigmann, Bernd; Yu, Feng; Frank, Kristian; Strempel, Klaas; Fatahilah, Muhammad Fahlesa; Schumacher, Hans Werner; Wasisto, Hutomo Suryo; Römer, Friedhard; Waag, Andreas

2018-06-01

Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device. He joined Bell Laboratories, Murray Hill, NJ, as a Technical Staff Member. In October 2001, he joined the Optical Access and Transport Division, Agere Systems, Alhambra, CA. In 2004, he was appointed an Assistant Professor at ETH Zurich,. Since 2008, at the University of Kassel, Kassel, Germany, and he has been a Professor the Head of the Computational Electronics and Photonics Group, and co-director of CINSaT since 2010. His research interests include computational optoelectronics, process and device design of semiconductor photonic devices, microwave components, and electromagnetics modeling for nanophotonics. Dr. Witzigmann is a senior member of the SPIE and IEEE.

Direct electronic probing of biological complexes formation

NASA Astrophysics Data System (ADS)

Macchia, Eleonora; Magliulo, Maria; Manoli, Kyriaki; Giordano, Francesco; Palazzo, Gerardo; Torsi, Luisa

2014-10-01

Functional bio-interlayer organic field - effect transistors (FBI-OFET), embedding streptavidin, avidin and neutravidin as bio-recognition element, have been studied to probe the electronic properties of protein complexes. The threshold voltage control has been achieved modifying the SiO2 gate diaelectric surface by means of the deposition of an interlayer of bio-recognition elements. A threshold voltage shift with respect to the unmodified dielectric surface toward more negative potential values has been found for the three different proteins, in agreement with their isoelectric points. The relative responses in terms of source - drain current, mobility and threshold voltage upon exposure to biotin of the FBI-OFET devices have been compared for the three bio-recognition elements.

Mutation of I696 and W697 in the TRP box of vanilloid receptor subtype I modulates allosteric channel activation.

PubMed

Gregorio-Teruel, Lucia; Valente, Pierluigi; González-Ros, José Manuel; Fernández-Ballester, Gregorio; Ferrer-Montiel, Antonio

2014-03-01

The transient receptor potential vanilloid receptor subtype I (TRPV1) channel acts as a polymodal sensory receptor gated by chemical and physical stimuli. Like other TRP channels, TRPV1 contains in its C terminus a short, conserved domain called the TRP box, which is necessary for channel gating. Substitution of two TRP box residues-I696 and W697-with Ala markedly affects TRPV1's response to all activating stimuli, which indicates that these two residues play a crucial role in channel gating. We systematically replaced I696 and W697 with 18 native l-amino acids (excluding cysteine) and evaluated the effect on voltage- and capsaicin-dependent gating. Mutation of I696 decreased channel activation by either voltage or capsaicin; furthermore, gating was only observed with substitution of hydrophobic amino acids. Substitution of W697 with any of the 18 amino acids abolished gating in response to depolarization alone, shifting the threshold to unreachable voltages, but not capsaicin-mediated gating. Moreover, vanilloid-activated responses of W697X mutants showed voltage-dependent gating along with a strong voltage-independent component. Analysis of the data using an allosteric model of activation indicates that mutation of I696 and W697 primarily affects the allosteric coupling constants of the ligand and voltage sensors to the channel pore. Together, our findings substantiate the notion that inter- and/or intrasubunit interactions at the level of the TRP box are critical for efficient coupling of stimulus sensing and gate opening. Perturbation of these interactions markedly reduces the efficacy and potency of the activating stimuli. Furthermore, our results identify these interactions as potential sites for pharmacological intervention.

Fabrication of amorphous InGaZnO thin-film transistor with solution processed SrZrO3 gate insulator

NASA Astrophysics Data System (ADS)

Takahashi, Takanori; Oikawa, Kento; Hoga, Takeshi; Uraoka, Yukiharu; Uchiyama, Kiyoshi

2017-10-01

In this paper, we describe a method of fabrication of thin film transistors (TFTs) with high dielectric constant (high-k) gate insulator by a solution deposition. We chose a solution processed SrZrO3 as a gate insulator material, which possesses a high dielectric constant of 21 with smooth surface. The IGZO-TFT with solution processed SrZrO3 showed good switching property and enough saturation features, i.e. field effect mobility of 1.7cm2/Vs, threshold voltage of 4.8V, sub-threshold swing of 147mV/decade, and on/off ratio of 2.3×107. Comparing to the TFTs with conventional SiO2 gate insulator, the sub-threshold swing was improved by smooth surface and high field effect due to the high dielectric constant of SrZrO3. These results clearly showed that use of solution processed high-k SrZrO3 gate insulator could improve sub-threshold swing. In addition, the residual carbon originated from organic precursors makes TFT performances degraded.

Threshold voltage tuning in AlGaN/GaN HFETs with p-type Cu2O gate synthesized by magnetron reactive sputtering

NASA Astrophysics Data System (ADS)

Wang, Lei; Li, Liuan; Xie, Tian; Wang, Xinzhi; Liu, Xinke; Ao, Jin-Ping

2018-04-01

In present study, copper oxide films were prepared at different sputtering powers (10-100 W) using magnetron reactive sputtering. The crystalline structure, surface morphologies, composition, and optical band gap of the as-grown films are dependent on sputtering power. As the sputtering power decreasing from 100 to 10 W, the composition of films changed from CuO to quasi Cu2O domination. Moreover, when the sputtering power is 10 W, a relative high hole carrier density and high-surface-quality quasi Cu2O thin film can be achieved. AlGaN/GaN HFETs were fabricated with the optimized p-type quasi Cu2O film as gate electrode, the threshold voltage of the device shows a 0.55 V positive shift, meanwhile, a lower gate leakage current, a higher ON/OFF drain current ratio of ∼108, a higher electron mobility (1465 cm2/Vs), and a lower subthreshold slope of 74 mV/dec are also achieved, compared with the typical Ni/Au-gated HFETs. Therefore, Cu2O have a great potential to develop high performance p-type gate AlGaN/GaN HFETs.

Bias-stress characterization of solution-processed organic field-effect transistor based on highly ordered liquid crystals

NASA Astrophysics Data System (ADS)

Kunii, M.; Iino, H.; Hanna, J.

2017-06-01

Bias-stress effects in solution-processed, 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-10) field effect transistors (FETs) are studied under negative and positive direct current bias. The bottom gate, bottom contact polycrystalline Ph-BTBT-10 FET with a hybrid gate dielectric of polystyrene and SiO2 shows high field effect mobility as well as a steep subthreshold slope when fabricated with a highly ordered smectic E liquid crystalline (SmE) film as a precursor. Negative gate bias-stress causes negative threshold voltage shift (ΔVth) for Ph-BTBT-10 FET in ambient air, but ΔVth rapidly decreases as the gate bias decreases and approaches to near zero when the gate bias goes down to 9 V in amplitude. In contrast, positive gate bias-stress causes negligible ΔVth even with a relatively high bias voltage. These results conclude that Ph-BTBT-10 FET has excellent bias-stress stability in ambient air in the range of low to moderate operating voltages.

Electrical characteristic fluctuation of 16-nm-gate high-κ/metal gate bulk FinFET devices in the presence of random interface traps

NASA Astrophysics Data System (ADS)

Hsu, Sheng-Chia; Li, Yiming

2014-11-01

In this work, we study the impact of random interface traps (RITs) at the interface of SiO x /Si on the electrical characteristic of 16-nm-gate high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices. Under the same threshold voltage, the effects of RIT position and number on the degradation of electrical characteristics are clarified with respect to different levels of RIT density of state ( D it). The variability of the off-state current ( I off) and drain-induced barrier lowering (DIBL) will be severely affected by RITs with high D it varying from 5 × 1012 to 5 × 1013 eV-1 cm-2 owing to significant threshold voltage ( V th) fluctuation. The results of this study indicate that if the level of D it is lower than 1 × 1012 eV-1 cm-2, the normalized variability of the on-state current, I off, V th, DIBL, and subthreshold swing is within 5%.

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr. (Inventor)

2002-01-01

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause the voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. The method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr. (Inventor)

2002-01-01

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause tile voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. A method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Tunneling contact IGZO TFTs with reduced saturation voltages

NASA Astrophysics Data System (ADS)

Wang, Longyan; Sun, Yin; Zhang, Xintong; Zhang, Lining; Zhang, Shengdong; Chan, Mansun

2017-04-01

We report a tunneling contact indium-gallium-zinc oxide (IGZO) thin film transistor (TFT) with a graphene interlayer technique in this paper. A Schottky junction is realized between a metal and IGZO with a graphene interlayer, leading to a quantum tunneling of the TFT transport in saturation regions. This tunneling contact enables a significant reduction in the saturation drain voltage Vdsat compared to that of the thermionic emission TFTs, which is usually equal to the gate voltage minus their threshold voltages. Measured temperature independences of the subthreshold swing confirm a transition from the thermionic emission to quantum tunneling transports depending on the gate bias voltages in the proposed device. The tunneling contact TFTs with the graphene interlayer have implications to reduce the power consumptions of certain applications such as the active matrix OLED display.

Effects of plasma-induced charging damage on random telegraph noise in metal-oxide-semiconductor field-effect transistors with SiO2 and high-k gate dielectrics

NASA Astrophysics Data System (ADS)

Kamei, Masayuki; Takao, Yoshinori; Eriguchi, Koji; Ono, Kouichi

2014-01-01

We clarified in this study how plasma-induced charging damage (PCD) affects the so-called “random telegraph noise (RTN)” — a principal concern in designing ultimately scaled large-scale integrated circuits (LSIs). Metal-oxide-semiconductor field-effect transistors (MOSFETs) with SiO2 and high-k gate dielectric were exposed to an inductively coupled plasma (ICP) with Ar gas. Drain current vs gate voltage (Ids-Vg) characteristics were obtained before and after the ICP plasma exposure for the same device. Then, the time evolution of Ids fluctuation defined as Ids/μIds was measured, where μIds is the mean Ids. This value corresponds to an RTN feature, and RTN was obtained under various gate voltages (Vg) by a customized measurement technique. We focused on the statistical distribution width of (Ids/μIds), δ(Ids/μIds), in order to clarify the effects of PCD on RTN. δ(Ids/μIds) was increased by PCD for both MOSFETs with the SiO2 and high-k gate dielectrics, suggesting that RTN can be used as a measure of PCD, i.e., a distribution width increase directly indicates the presence of PCD. The dependence of δ(Ids/μIds) on the overdrive voltage Vg-Vth, where Vth is the threshold voltage, was investigated by the present technique. It was confirmed that δ(Ids/μIds) increased with a decrease in the overdrive voltage for MOSFETs with the SiO2 and high-k gate dielectrics. The presence of created carrier trap sites with PCD was characterized by the time constants for carrier capture and emission. The threshold voltage shift (ΔVth) induced by PCD was also evaluated and compared with the RTN change, to correlate the RTN increase with ΔVth induced by PCD. Although the estimated time constants exhibited complex behaviors due to the nature of trap sites created by PCD, δ(Ids/μIds) showed a straightforward tendency in accordance with the amount of PCD. These findings provide an in-depth understanding of plasma-induced RTN characteristic changes in future MOSFETs.

Increase in the Random Dopant Induced Threshold Fluctuations and Lowering in Sub 100 nm MOSFETs Due to Quantum Effects: A 3-D Density-Gradient Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Brown, A. R.; Davies, J. H.; Saini, S.

2000-01-01

In this paper we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub 100 nm MOSFETs. The simulations have been performed using a 3-D implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantisation but also the lateral confinement effects related to current filamentation in the 'valleys' of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides.

Impact of SiNx capping on the formation of source/drain contact for In-Ga-Zn-O thin film transistor with self-aligned gate

NASA Astrophysics Data System (ADS)

Oh, Himchan; Pi, Jae-Eun; Hwang, Chi-Sun; Kwon, Oh-Sang

2017-12-01

Self-aligned gate structures are preferred for faster operation and scaling down of thin film transistors by reducing the overlapped region between source/drain and gate electrodes. Doping on source/drain regions is essential to fabricate such a self-aligned gate thin film transistor. For oxide semiconductors such as In-Ga-Zn-O, SiNx capping readily increases their carrier concentration. We report that the SiNx deposition temperature and thickness significantly affect the device properties, including threshold voltage, field effect mobility, and contact resistance. The reason for these variations in device characteristics mainly comes from the extension of the doped region to the gated area after the SiNx capping step. Analyses on capacitance-voltage and transfer length characteristics support this idea.

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistors

NASA Technical Reports Server (NTRS)

Yamada, Toshishige; Biegel, Bryan (Technical Monitor)

2002-01-01

The threshold voltages of a carbon nanotube (CNT) field-effect transistor (FET) are derived and compared with those of the metal oxide-semiconductor (MOS) FETs. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, which is the CNT diameter direction, and this makes the CNTFET characteristics quite different from those in MOSFETs. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and it is shown that the familiar relations are still valid because of the macroscopic number of states available in the CNTs. This is in sharp contrast to the cases of quantum dots. Using these relations, we derive an inversion threshold voltage V(sub Ti) and an accumulation threshold voltage V(sub Ta) as a function of the Fermi level E(sub F) in the channel, where E(sub F) is a measure of channel doping. V(sub Ti) of the CNTFETs has a much stronger dependence than that of MOSFETs, while V(sub Ta)s of both CNTFETs and MOSFETs depend quite weakly on E(sub F) with the same functional form. This means the transition from normally-off mode to normally-on mode is much sharper in CNTFETs as the doping increases, and this property has to be taken into account in circuit design.

ZnO thin-film transistors with a polymeric gate insulator built on a polyethersulfone substrate

NASA Astrophysics Data System (ADS)

Hyung, Gun Woo; Park, Jaehoon; Koo, Ja Ryong; Choi, Kyung Min; Kwon, Sang Jik; Cho, Eou Sik; Kim, Yong Seog; Kim, Young Kwan

2012-03-01

Zinc oxide (ZnO) thin-film transistors (TFTs) with a cross-linked poly(vinyl alcohol) (c-PVA) insulator are fabricated on a polyethersulfone substrate. The ZnO film, formed by atomic layer deposition, shows a polycrystalline hexagonal structure with a band gap energy of about 3.37 eV. The fabricated ZnO TFT exhibits a field-effect mobility of 0.38 cm2/Vs and a threshold voltage of 0.2 V. The hysteresis of the device is mainly caused by trapped electrons at the c-PVA/ZnO interface, whereas the positive threshold voltage shift occurs as a consequence of constant positive gate bias stress after 5000 s due to an electron injection from the ZnO film into the c-PVA insulator.

Toward Quantifying the Electrostatic Transduction Mechanism in Carbon Nanotube Biomolecular Sensors

NASA Astrophysics Data System (ADS)

Lerner, Mitchell; Kybert, Nicholas; Mendoza, Ryan; Dailey, Jennifer; Johnson, A. T. Charlie

2013-03-01

Despite the great promise of carbon nanotube field-effect transistors (CNT FETs) for applications in chemical and biochemical detection, a quantitative understanding of sensor responses is lacking. To explore the role of electrostatics in sensor transduction, experiments were conducted with a set of similar compounds designed to adsorb onto the CNT FET via a pyrene linker group and take on a set of known charge states under ambient conditions. Acidic and basic species were observed to induce threshold voltage shifts of opposite sign, consistent with gating of the CNT FET by local charges due to protonation or deprotonation of the pyrene compounds by interfacial water. The magnitude of the gate voltage shift was controlled by the distance between the charged group and the CNT. Additionally, functionalization with an uncharged pyrene compound showed a threshold shift ascribed to its molecular dipole moment. This work illustrates a method for producing CNT FETs with controlled values of the turnoff gate voltage, and more generally, these results will inform the development of quantitative models for the response of CNT FET chemical and biochemical sensors. As an example, the results of an experiment detecting biomarkers of Lyme disease will be discussed in the context of this model.

Effect of Oxide Interface Roughness on the Threshold Voltage Fluctuations in Decanano MOSFETs with Ultrathin Gate Oxides

NASA Technical Reports Server (NTRS)

Asenov, Asen; Kaya, S.

2000-01-01

In this paper we use the Density Gradient (DG) simulation approach to study, in 3-D, the effect of local oxide thickness fluctuations on the threshold voltage of decanano MOSFETs on a statistical scale. The random 2-D surfaces used to represent the interface are constructed using the standard assumptions for the auto-correlation function of the interface. The importance of the Quantum Mechanical effects when studying oxide thickness fluctuations are illustrated in several simulation examples.

Unraveling the mechanism of ultraviolet-induced optical gating in Zn1-x Mg x O nanocrystal solid solution field effect transistors

NASA Astrophysics Data System (ADS)

Kim, Youngjun; Cho, Seongeun; Park, Byoungnam

2018-03-01

We report ultraviolet (UV)-induced optical gating in a Zn1-x Mg x O nanocrystal solid solution (NCSS) field effect transistor (FET) through a systematic study in which UV-induced charge transport properties are probed as a function of Mg composition. Change in the electrical properties of Zn1-x Mg x O NCSS associated with electronic traps is investigated by field effect-modulated current-voltage characteristic curves in the dark and under illumination. Under UV illumination, significant threshold voltage shift to a more negative value in an n-channel Zn1-x Mg x O NCSS FET is observed. Importantly, as the Mg composition increases, the effect of UV illumination on the threshold voltage shift is alleviated. We found that threshold voltage shift as a function of Mg composition in the dark and under illumination is due to difference in the deep trap density in the Zn1-x Mg x O NCSS. This is supported by Mg composition dependent photoluminescence intensity in the visible range and reduced FET mobility with Mg addition. The presence of the deep traps and the corresponding trap energy levels in the Zn1-x Mg x O NCSS are ensured by photoelectron spectroscopy in air.

2D Quantum Transport Modeling in Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Modeling Proton Irradiation in AlGaN/GaN HEMTs: Understanding the Increase of Critical Voltage

NASA Astrophysics Data System (ADS)

Patrick, Erin; Law, Mark E.; Liu, Lu; Cuervo, Camilo Velez; Xi, Yuyin; Ren, Fan; Pearton, Stephen J.

2013-12-01

A combination of TRIM and FLOODS models the effect of radiation damage on AlGaN/GaN HEMTs. While excellent fits are obtained for threshold voltage shift, the models do not fully explain the increased reliability observed experimentally. In short, the addition of negatively-charged traps in the GaN buffer layer does not significantly change the electric field at the gate edges at radiation fluence levels seen in this study. We propose that negative trapped charge at the nitride/AlGaN interface actually produces the virtual-gate effect that results in decreasing the magnitude of the electric field at the gate edges and thus the increase in critical voltage. Simulation results including nitride interface charge show significant changes in electric field profiles while the I-V device characteristics do not change.

Tuning the threshold voltage of carbon nanotube transistors by n-type molecular doping for robust and flexible complementary circuits

PubMed Central

Wang, Huiliang; Wei, Peng; Li, Yaoxuan; Han, Jeff; Lee, Hye Ryoung; Naab, Benjamin D.; Liu, Nan; Wang, Chenggong; Adijanto, Eric; Tee, Benjamin C.-K.; Morishita, Satoshi; Li, Qiaochu; Gao, Yongli; Cui, Yi; Bao, Zhenan

2014-01-01

Tuning the threshold voltage of a transistor is crucial for realizing robust digital circuits. For silicon transistors, the threshold voltage can be accurately controlled by doping. However, it remains challenging to tune the threshold voltage of single-wall nanotube (SWNT) thin-film transistors. Here, we report a facile method to controllably n-dope SWNTs using 1H-benzoimidazole derivatives processed via either solution coating or vacuum deposition. The threshold voltages of our polythiophene-sorted SWNT thin-film transistors can be tuned accurately and continuously over a wide range. Photoelectron spectroscopy measurements confirmed that the SWNT Fermi level shifted to the conduction band edge with increasing doping concentration. Using this doping approach, we proceeded to fabricate SWNT complementary inverters by inkjet printing of the dopants. We observed an unprecedented noise margin of 28 V at VDD = 80 V (70% of 1/2VDD) and a gain of 85. Additionally, robust SWNT complementary metal−oxide−semiconductor inverter (noise margin 72% of 1/2VDD) and logic gates with rail-to-rail output voltage swing and subnanowatt power consumption were fabricated onto a highly flexible substrate. PMID:24639537

Reduction of gate leakage current on AlGaN/GaN high electron mobility transistors by electron-beam irradiation.

PubMed

Oh, S K; Song, C G; Jang, T; Kim, Kwang-Choong; Jo, Y J; Kwak, J S

2013-03-01

This study examined the effect of electron-beam (E-beam) irradiation on the AIGaN/GaN HEMTs for the reduction of gate leakage. After E-beam irradiation, the gate leakage current significantly decreased from 2.68 x 10(-8) A to 4.69 x 10(-9) A at a drain voltage of 10 V. The maximum drain current density of the AIGaN/GaN HEMTs with E-beam irradiation increased 14%, and the threshold voltage exhibited a negative shift, when compared to that of the AIGaN/GaN HEMTs before E-beam irradiation. These results strongly suggest that the reduction of gate leakage current resulted from neutralization nitrogen vacancies and removing of oxygen impurities.

Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

2012-02-01

Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

SNW 2000 Proceedings. Oxide Thickness Variation Induced Threshold Voltage Fluctuations in Decanano MOSFETs: a 3D Density Gradient Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen; Kaya, S.; Davies, J. H.; Saini, S.

2000-01-01

We use the density gradient (DG) simulation approach to study, in 3D, the effect of local oxide thickness fluctuations on the threshold voltage of decanano MOSFETs in a statistical manner. A description of the reconstruction procedure for the random 2D surfaces representing the 'atomistic' Si-SiO2 interface variations is presented. The procedure is based on power spectrum synthesis in the Fourier domain and can include either Gaussian or exponential spectra. The simulations show that threshold voltage variations induced by oxide thickness fluctuation become significant when the gate length of the devices become comparable to the correlation length of the fluctuations. The extent of quantum corrections in the simulations with respect to the classical case and the dependence of threshold variations on the oxide thickness are examined.

Influence of gate recess on the electronic characteristics of β-Ga2O3 MOSFETs

NASA Astrophysics Data System (ADS)

Lv, Yuanjie; Mo, Jianghui; Song, Xubo; He, Zezhao; Wang, Yuangang; Tan, Xin; Zhou, Xingye; Gu, Guodong; Guo, Hongyu; Feng, Zhihong

2018-05-01

Gallium oxide (Ga2O3) metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with gate recess depths of 110 nm and 220 nm, respectively. The gate recess was formed by dry plasma etching with Cr metal as the mask. The fabricated devices with a 25-nm HfO2 gate dielectric both showed a low off-state drain current of about 1.8 × 10-10 A/mm. The effects of recess depth on the electronic characteristics of Ga2O3 MOSFETs were investigated. Upon increasing the recess depth from 110 nm to 220 nm, the saturated drain current decreased from 20.7 mA/mm to 2.6 mA/mm, while the threshold voltage moved increased to +3 V. Moreover, the breakdown voltage increased from 122 V to 190 V. This is mainly because the inverted-trapezoidal gate played the role of a gate-field plate, which suppressed the peak electric field close to the gate.

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

Using in-process measurements of open-gate structures to evaluate threshold voltage of normally-off GaN-based high electron mobility transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hou, Bin; Ma, Xiao-Hua, E-mail: xhma@xidian.edu.cn, E-mail: yhao@xidian.edu.cn; Chen, Wei-Wei

The parameters of open-gate structures treated with different etching time were monitored during the gate recess process, and their impacts on the threshold voltage (V{sub th}) of final fabricated AlGaN/GaN high electron mobility transistors (HEMTs) based on open-gate structures were discussed in this paper. It is found that V{sub th} can exceed 0 V when channel resistance in the recessed region (R{sub on-open}) increases over ∼275 Ω mm, maximum current (I{sub Dmax}) decreases below ∼29 mA/mm, or recessed barrier thickness (t{sub RB}) is below ∼7.5 nm. In addition, t{sub RB} obtained by atomic force microscopy measurements and C-V measurements are also compared. Finally,more » theoretical common criteria based on the experimental results of this work for t{sub RB} and R{sub on-open} were established to evaluate the V{sub th} of a regular normally-off AlGaN/GaN HEMTs. The results indicate that these parameters of open-gate structure can be utilized to achieve normally-off HEMTs with controllable V{sub th}.« less

Mobility overestimation due to gated contacts in organic field-effect transistors

PubMed Central

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Hot-Electron-Induced Device Degradation during Gate-Induced Drain Leakage Stress

NASA Astrophysics Data System (ADS)

Kim, Kwang-Soo; Han, Chang-Hoon; Lee, Jun-Ki; Kim, Dong-Soo; Kim, Hyong-Joon; Shin, Joong-Shik; Lee, Hea-Beoum; Choi, Byoung-Deog

2012-11-01

We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.

Field-induced strain degradation of AlGaN/GaN high electron mobility transistors on a nanometer scale

NASA Astrophysics Data System (ADS)

Lin, Chung-Han; Doutt, D. R.; Mishra, U. K.; Merz, T. A.; Brillson, L. J.

2010-11-01

Nanoscale Kelvin probe force microscopy and depth-resolved cathodoluminescence spectroscopy reveal an electronic defect evolution inside operating AlGaN/GaN high electron mobility transistors with degradation under electric-field-induced stress. Off-state electrical stress results in micron-scale areas within the extrinsic drain expanding and decreasing in electric potential, midgap defects increasing by orders-of-magnitude at the AlGaN layer, and local Fermi levels lowering as gate-drain voltages increase above a characteristic stress threshold. The pronounced onset of defect formation, Fermi level movement, and transistor degradation at the threshold gate-drain voltage of J. A. del Alamo and J. Joh [Microelectron. Reliab. 49, 1200 (2009)] is consistent with crystal deformation and supports the inverse piezoelectric model of high electron mobility transistor degradation.

The operation of 0.35 μm partially depleted SOI CMOS technology in extreme environments

NASA Astrophysics Data System (ADS)

Li, Ying; Niu, Guofu; Cressler, John D.; Patel, Jagdish; Liu, S. T.; Reed, Robert A.; Mojarradi, Mohammad M.; Blalock, Benjamin J.

2003-06-01

We evaluate the usefulness of partially depleted SOI CMOS devices fabricated in a 0.35 μm technology on UNIBOND material for electronics applications requiring robust operation under extreme environment conditions consisting of low and/or high temperature, and under substantial radiation exposure. The threshold voltage, effective mobility, and the impact ionization parameters were determined across temperature for both the nFETs and the pFETs. The radiation response was characterized using threshold voltage shifts of both the front-gate and back-gate transistors. These results suggest that this 0.35 μm partially depleted SOI CMOS technology is suitable for operation across a wide range of extreme environment conditions consisting of: cryogenic temperatures down to 86 K, elevated temperatures up to 573 K, and under radiation exposure to 1.3 Mrad(Si) total dose.

Effects of various gate materials on electrical degradation of a-Si:H TFT in industrial display application

NASA Astrophysics Data System (ADS)

Ho, Ching-Yuan; Chang, Yaw-Jen

2016-02-01

Both aluminum (Al) and copper (Cu), acting as transmission lines in the hydrogenated amorphous silicon of a thin film transistor (a-Si:H TFT), were studied to investigate electrical degradation including electron-migration (EM) and threshold voltage (Vt) stability and recovery performance. Under long-term current stress, the Cu material exhibited excellent resistance to EM properties, but a passivated SiNx crack was observed due to fast heat conductivity. By applying electrical stress on the gate and drain for 5 × 104 s, the power-law time dependency of the threshold voltage shift (ΔVt) indicated that the defective state creation dominated the TFT device's instability. The presence of drain stress increased the overall ΔVt because the high longitudinal field induced impact ionization and then, enhanced hot-carrier-induced electron trapping within the gate SiNx dielectric. An annealing effect prompted a stressed a-Si:H TFT back to virgin status. This study proposes better ΔVt stability and excellent resistance against electron-migration in a Cu gate device which can be considered as a candidate for a transmission line on prolonged TFT applications.

Low voltage operation of IGZO thin film transistors enabled by ultrathin Al2O3 gate dielectric

NASA Astrophysics Data System (ADS)

Ma, Pengfei; Du, Lulu; Wang, Yiming; Jiang, Ran; Xin, Qian; Li, Yuxiang; Song, Aimin

2018-01-01

An ultrathin, 5 nm, Al2O3 film grown by atomic-layer deposition was used as a gate dielectric for amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The Al2O3 layer showed a low surface roughness of 0.15 nm, a low leakage current, and a high breakdown voltage of 6 V. In particular, a very high gate capacitance of 720 nF/cm2 was achieved, making it possible for the a-IGZO TFTs to not only operate at a low voltage of 1 V but also exhibit desirable properties including a low threshold voltage of 0.3 V, a small subthreshold swing of 100 mV/decade, and a high on/off current ratio of 1.2 × 107. Furthermore, even under an ultralow operation voltage of 0.6 V, well-behaved transistor characteristics were still observed with an on/off ratio as high as 3 × 106. The electron transport through the Al2O3 layer has also been analyzed, indicating the Fowler-Nordheim tunneling mechanism.

Electrostatic modulation of periodic potentials in a two-dimensional electron gas: From antidot lattice to quantum dot lattice

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goswami, Srijit; Aamir, Mohammed Ali; Shamim, Saquib

2013-12-04

We use a dual gated device structure to introduce a gate-tuneable periodic potential in a GaAs/AlGaAs two dimensional electron gas (2DEG). Using only a suitable choice of gate voltages we can controllably alter the potential landscape of the bare 2DEG, inducing either a periodic array of antidots or quantum dots. Antidots are artificial scattering centers, and therefore allow for a study of electron dynamics. In particular, we show that the thermovoltage of an antidot lattice is particularly sensitive to the relative positions of the Fermi level and the antidot potential. A quantum dot lattice, on the other hand, provides themore » opportunity to study correlated electron physics. We find that its current-voltage characteristics display a voltage threshold, as well as a power law scaling, indicative of collective Coulomb blockade in a disordered background.« less

Non-linear Membrane Properties in Entorhinal Cortical Stellate Cells Reduce Modulation of Input-Output Responses by Voltage Fluctuations

PubMed Central

Fernandez, Fernando R.; Malerba, Paola; White, John A.

2015-01-01

The presence of voltage fluctuations arising from synaptic activity is a critical component in models of gain control, neuronal output gating, and spike rate coding. The degree to which individual neuronal input-output functions are modulated by voltage fluctuations, however, is not well established across different cortical areas. Additionally, the extent and mechanisms of input-output modulation through fluctuations have been explored largely in simplified models of spike generation, and with limited consideration for the role of non-linear and voltage-dependent membrane properties. To address these issues, we studied fluctuation-based modulation of input-output responses in medial entorhinal cortical (MEC) stellate cells of rats, which express strong sub-threshold non-linear membrane properties. Using in vitro recordings, dynamic clamp and modeling, we show that the modulation of input-output responses by random voltage fluctuations in stellate cells is significantly limited. In stellate cells, a voltage-dependent increase in membrane resistance at sub-threshold voltages mediated by Na+ conductance activation limits the ability of fluctuations to elicit spikes. Similarly, in exponential leaky integrate-and-fire models using a shallow voltage-dependence for the exponential term that matches stellate cell membrane properties, a low degree of fluctuation-based modulation of input-output responses can be attained. These results demonstrate that fluctuation-based modulation of input-output responses is not a universal feature of neurons and can be significantly limited by subthreshold voltage-gated conductances. PMID:25909971

Non-linear Membrane Properties in Entorhinal Cortical Stellate Cells Reduce Modulation of Input-Output Responses by Voltage Fluctuations.

PubMed

Fernandez, Fernando R; Malerba, Paola; White, John A

2015-04-01

The presence of voltage fluctuations arising from synaptic activity is a critical component in models of gain control, neuronal output gating, and spike rate coding. The degree to which individual neuronal input-output functions are modulated by voltage fluctuations, however, is not well established across different cortical areas. Additionally, the extent and mechanisms of input-output modulation through fluctuations have been explored largely in simplified models of spike generation, and with limited consideration for the role of non-linear and voltage-dependent membrane properties. To address these issues, we studied fluctuation-based modulation of input-output responses in medial entorhinal cortical (MEC) stellate cells of rats, which express strong sub-threshold non-linear membrane properties. Using in vitro recordings, dynamic clamp and modeling, we show that the modulation of input-output responses by random voltage fluctuations in stellate cells is significantly limited. In stellate cells, a voltage-dependent increase in membrane resistance at sub-threshold voltages mediated by Na+ conductance activation limits the ability of fluctuations to elicit spikes. Similarly, in exponential leaky integrate-and-fire models using a shallow voltage-dependence for the exponential term that matches stellate cell membrane properties, a low degree of fluctuation-based modulation of input-output responses can be attained. These results demonstrate that fluctuation-based modulation of input-output responses is not a universal feature of neurons and can be significantly limited by subthreshold voltage-gated conductances.

Fabrication of quantum dots in undoped Si/Si 0.8Ge 0.2 heterostructures using a single metal-gate layer

DOE PAGES

Lu, T. M.; Gamble, J. K.; Muller, R. P.; ...

2016-08-01

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for their potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30%. Here, we report the fabrication and low-temperature characterization of quantum dots in the Si/Si 0.8Ge 0.2 heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 μm increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratiomore » used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. Furthermore, the device uses only a single metal-gate layer, greatly simplifying device design and fabrication.« less

Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

NASA Astrophysics Data System (ADS)

Lagger, P.; Steinschifter, P.; Reiner, M.; Stadtmüller, M.; Denifl, G.; Naumann, A.; Müller, J.; Wilde, L.; Sundqvist, J.; Pogany, D.; Ostermaier, C.

2014-07-01

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔVth, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness tD and barrier thickness tB, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔNit, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔNit is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

A 190 mV start-up and 59.2% efficiency CMOS gate boosting voltage doubler charge pump in 0.18 µm standard CMOS process for energy harvesting

NASA Astrophysics Data System (ADS)

Yoshida, Minori; Miyaji, Kousuke

2018-04-01

A start-up charge pump circuit for an extremely low input voltage (V IN) is proposed and demonstrated. The proposed circuit uses an inverter level shifter to generate a 2V IN voltage swing to the gate of both main NMOS and PMOS power transistors in a charge pump to reduce the channel resistance. The proposed circuit is fully implemented in a standard 0.18 µm CMOS process, and the measurement result shows that a minimum input voltage of 190 mV is achieved and output power increases by 181% compared with the conventional forward-body-bias scheme at a 300 mV input voltage. The proposed scheme achieves a maximum efficiency of 59.2% when the input voltage is 390 mV and the output current is 320 nA. The proposed circuit is suitable as a start-up circuit in ultralow power energy harvesting power management applications to boost-up from below threshold voltage.

Origin of threshold voltage fluctuation caused by ion implantation to source and drain extensions of silicon-on-insulator triple-gate fin-type field-effect transistors using three-dimensional process and device simulations

NASA Astrophysics Data System (ADS)

Tsutsumi, Toshiyuki

2018-06-01

The threshold voltage (V th) fluctuation induced by ion implantation (I/I) in the source and drain extensions (SDEs) of a silicon-on-insulator (SOI) triple-gate (Tri-Gate) fin-type field-effect transistor (FinFET) was analyzed by both three-dimensional (3D) process and device simulations collaboratively. The origin of the V th fluctuation induced by the SDE I/I is basically a variation of a bottleneck barrier height (BBH) due to implanted arsenic (As+) ions. In particular, a very low and broad V th distribution in the saturation region is due to percolative conduction in addition to the BBH variation. Moreover, it is surprisingly found that the V th fluctuation is mostly characterized by the BBH of only a top surface center line of a Si fin of the device. Our collaborative approach by 3D process and device simulations is dispensable for the accurate investigation of variability-tolerant devices. The obtained results are beneficial for the research and development of such future devices.

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

PubMed

Yoon, Changjoon; Jeon, Youngin; Yun, Junggwon; Kim, Sangsig

2012-01-01

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Rectification of graphene self-switching diodes: First-principles study

NASA Astrophysics Data System (ADS)

Ghaziasadi, Hassan; Jamasb, Shahriar; Nayebi, Payman; Fouladian, Majid

2018-05-01

The first principles calculations based on self-consistent charge density functional tight-binding have performed to investigate the electrical properties and rectification behavior of the graphene self-switching diodes (GSSD). The devices contained two structures called CG-GSSD and DG-GSSD which have metallic or semiconductor gates depending on their side gates have a single or double hydrogen edge functionalized. We have relaxed the devices and calculated I-V curves, transmission spectrums and maximum rectification ratios. We found that the DG-MSM devices are more favorable and more stable. Also, the DG-MSM devices have better maximum rectification ratios and current. Moreover, by changing the side gates widths and behaviors from semiconductor to metal, the threshold voltages under forward bias changed from +1.2 V to +0.3 V. Also, the maximum currents are obtained from 1.12 μA to 10.50 μA. Finally, the MSM and SSS type of all devices have minimum and maximum values of voltage threshold and maximum rectification ratios, but the 769-DG devices don't obey this rule.

Low-voltage all-inorganic perovskite quantum dot transistor memory

NASA Astrophysics Data System (ADS)

Chen, Zhiliang; Zhang, Yating; Zhang, Heng; Yu, Yu; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Che, Yongli; Jin, Lufan; Li, Yifan; Li, Qingyan; Dai, Haitao; Yang, Junbo; Yao, Jianquan

2018-05-01

An all-inorganic cesium lead halide quantum dot (QD) based Au nanoparticle (NP) floating-gate memory with a solution processed layer-by-layer method is demonstrated. Easy synthesis at room temperature and excellent stability make all-inorganic CsPbBr3 perovskite QDs suitable as a semiconductor layer in low voltage nonvolatile transistor memory. The bipolarity of QDs has both electrons and holes stored in the Au NP floating gate, resulting in bidirectional shifts of initial threshold voltage according to the applied programing and erasing pulses. Under low operation voltage (±5 V), the memory achieved a great memory window (˜2.4 V), long retention time (>105 s), and stable endurance properties after 200 cycles. So the proposed memory device based on CsPbBr3 perovskite QDs has a great potential in the flash memory market.

Contributions of adaptation currents to dynamic spike threshold on slow timescales: Biophysical insights from conductance-based models

NASA Astrophysics Data System (ADS)

Yi, Guosheng; Wang, Jiang; Wei, Xile; Deng, Bin; Li, Huiyan; Che, Yanqiu

2017-06-01

Spike-frequency adaptation (SFA) mediated by various adaptation currents, such as voltage-gated K+ current (IM), Ca2+-gated K+ current (IAHP), or Na+-activated K+ current (IKNa), exists in many types of neurons, which has been shown to effectively shape their information transmission properties on slow timescales. Here we use conductance-based models to investigate how the activation of three adaptation currents regulates the threshold voltage for action potential (AP) initiation during the course of SFA. It is observed that the spike threshold gets depolarized and the rate of membrane depolarization (dV/dt) preceding AP is reduced as adaptation currents reduce firing rate. It is indicated that the presence of inhibitory adaptation currents enables the neuron to generate a dynamic threshold inversely correlated with preceding dV/dt on slower timescales than fast dynamics of AP generation. By analyzing the interactions of ionic currents at subthreshold potentials, we find that the activation of adaptation currents increase the outward level of net membrane current prior to AP initiation, which antagonizes inward Na+ to result in a depolarized threshold and lower dV/dt from one AP to the next. Our simulations demonstrate that the threshold dynamics on slow timescales is a secondary effect caused by the activation of adaptation currents. These findings have provided a biophysical interpretation of the relationship between adaptation currents and spike threshold.

Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

NASA Astrophysics Data System (ADS)

Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.

2018-05-01

We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

High-temperature performance of MoS2 thin-film transistors: Direct current and pulse current-voltage characteristics

NASA Astrophysics Data System (ADS)

Jiang, C.; Rumyantsev, S. L.; Samnakay, R.; Shur, M. S.; Balandin, A. A.

2015-02-01

We report on fabrication of MoS2 thin-film transistors (TFTs) and experimental investigations of their high-temperature current-voltage characteristics. The measurements show that MoS2 devices remain functional to temperatures of at least as high as 500 K. The temperature increase results in decreased threshold voltage and mobility. The comparison of the direct current (DC) and pulse measurements shows that the direct current sub-linear and super-linear output characteristics of MoS2 thin-films devices result from the Joule heating and the interplay of the threshold voltage and mobility temperature dependences. At temperatures above 450 K, a kink in the drain current occurs at zero gate voltage irrespective of the threshold voltage value. This intriguing phenomenon, referred to as a "memory step," was attributed to the slow relaxation processes in thin films similar to those in graphene and electron glasses. The fabricated MoS2 thin-film transistors demonstrated stable operation after two months of aging. The obtained results suggest new applications for MoS2 thin-film transistors in extreme-temperature electronics and sensors.

Ambipolar nonvolatile memory based on a quantum-dot transistor with a nanoscale floating gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Che, Yongli; Zhang, Yating, E-mail: yating@tju.edu.cn; Song, Xiaoxian

2016-07-04

Using only solution processing methods, we developed ambipolar quantum-dot (QD) transistor floating-gate memory (FGM) that uses Au nanoparticles as a floating gate. Because of the bipolarity of the active channel of PbSe QDs, the memory could easily trap holes or electrons in the floating gate by programming/erasing (P/E) operations, which could shift the threshold voltage both up and down. As a result, the memory exhibited good programmable memory characteristics: a large memory window (ΔV{sub th} ∼ 15 V) and a long retention time (>10{sup 5 }s). The magnitude of ΔV{sub th} depended on both P/E voltages and the bias voltage (V{sub DS}): ΔV{sub th}more » was a cubic function to V{sub P/E} and linearly depended on V{sub DS}. Therefore, this FGM based on a QD transistor is a promising alternative to its inorganic counterparts owing to its advantages of bipolarity, high mobility, low cost, and large-area production.« less

Effects of negative gate-bias stress on the performance of solution-processed zinc-oxide transistors

NASA Astrophysics Data System (ADS)

Kim, Dongwook; Lee, Woo-Sub; Shin, Hyunji; Choi, Jong Sun; Zhang, Xue; Park, Jaehoon; Hwang, Jaeeun; Kim, Hongdoo; Bae, Jin-Hyuk

2014-08-01

We studied the effects of negative gate-bias stress on the electrical characteristics of top-contact zinc-oxide (ZnO) thin-film transistors (TFTs), which were fabricated by spin coating a ZnO solution onto a silicon-nitride gate dielectric layer. The negative gate-bias stress caused characteristic degradations in the on-state currents and the field-effect mobility of the fabricated ZnO TFTs. Additionally, a decrease in the off-state currents and a positive shift in the threshold voltage occurred with increasing stress time. These results indicate that the negative gate-bias stress caused an injection of electrons into the gate dielectric, thereby deteriorating the TFT's performance.

Effect of Al-diffusion-induced positive flatband voltage shift on the electrical characteristics of Al-incorporated high-k metal-oxide-semiconductor field-effective transistor

NASA Astrophysics Data System (ADS)

Wang, Wenwu; Akiyama, Koji; Mizubayashi, Wataru; Nabatame, Toshihide; Ota, Hiroyuki; Toriumi, Akira

2009-03-01

We systematically studied what effect Al diffusion from high-k dielectrics had on the flatband voltage (Vfb) of Al-incorporated high-k gate stacks. An anomalous positive shift fin Vfb with the decreasing equivalent oxide thickness (EOT) of high-k gate stacks is reported. As the SiO2 interfacial layer is aggressively thinned in Al-incorporated HfxAl1-xOy gate stacks with a metal-gate electrode, the Vfb first lies on the well known linear Vfb-EOT plot and deviates toward the positive-voltage direction (Vfb roll-up), followed by shifting toward negative voltage (Vfb roll-off). We demonstrated that the Vfb roll-up behavior remarkably decreases the threshold voltage (Vth) of p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs), and does not cause severe degradation in the characteristics of hole mobility. The Vfb roll-up behavior, which is independent of gate materials but strongly dependent on high-k dielectrics, was ascribed to variations in fixed charges near the SiO2/Si interface, which are caused by Al diffusion from HfxAl1-xOy through SiO2 to the SiO2/Si interface. These results indicate that anomalous positive shift in Vfb, i.e., Vfb roll-up, should be taken into consideration in quantitatively adjusting Vfb in thin EOT regions and that it could be used to further tune Vth in p-MOSFETs.

0.5 V 5.8 GHz highly linear current-reuse voltage-controlled oscillator with back-gate tuning technique

NASA Astrophysics Data System (ADS)

Ikeda, Sho; Lee, Sang-Yeop; Ito, Hiroyuki; Ishihara, Noboru; Masu, Kazuya

2015-04-01

In this paper, we present a voltage-controlled oscillator (VCO), which achieves highly linear frequency tuning under a low supply voltage of 0.5 V. To obtain the linear frequency tuning of a VCO, the high linearity of the threshold voltage of a varactor versus its back-gate voltage is utilized. This enables the linear capacitance tuning of the varactor; thus, a highly linear VCO can be achieved. In addition, to decrease the power consumption of the VCO, a current-reuse structure is employed as a cross-coupled pair. The proposed VCO was fabricated using a 65 nm Si complementary metal oxide semiconductor (CMOS) process. It shows the ratio of the maximum VCO gain (KVCO) to the minimum one to be 1.28. The dc power consumption is 0.33 mW at a supply voltage of 0.5 V. The measured phase noise at 10 MHz offset is -123 dBc/Hz at an output frequency of 5.8 GHz.

A high-efficiency low-voltage CMOS rectifier for harvesting energy in implantable devices.

PubMed

Hashemi, S Saeid; Sawan, Mohamad; Savaria, Yvon

2012-08-01

We present, in this paper, a new full-wave CMOS rectifier dedicated for wirelessly-powered low-voltage biomedical implants. It uses bootstrapped capacitors to reduce the effective threshold voltage of selected MOS switches. It achieves a significant increase in its overall power efficiency and low voltage-drop. Therefore, the rectifier is good for applications with low-voltage power supplies and large load current. The rectifier topology does not require complex circuit design. The highest voltages available in the circuit are used to drive the gates of selected transistors in order to reduce leakage current and to lower their channel on-resistance, while having high transconductance. The proposed rectifier was fabricated using the standard TSMC 0.18 μm CMOS process. When connected to a sinusoidal source of 3.3 V peak amplitude, it allows improving the overall power efficiency by 11% compared to the best recently published results given by a gate cross-coupled-based structure.

Advanced p-MOSFET Ionizing-Radiation Dosimeter

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.

1994-01-01

Circuit measures total dose of ionizing radiation in terms of shift in threshold gate voltage of doped-channel metal oxide/semiconductor field-effect transistor (p-MOSFET). Drain current set at temperature-independent point to increase accuracy in determination of radiation dose.

Characteristics of enhanced-mode AlGaN/GaN MIS HEMTs for millimeter wave applications

NASA Astrophysics Data System (ADS)

Lee, Jong-Min; Ahn, Ho-Kyun; Jung, Hyun-Wook; Shin, Min Jeong; Lim, Jong-Won

2017-09-01

In this paper, an enhanced-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT) was developed by using 4-inch GaN HEMT process. We designed and fabricated Emode HEMTs and characterized device performance. To estimate the possibility of application for millimeter wave applications, we focused on the high frequency performance and power characteristics. To shift the threshold voltage of HEMTs we applied the Al2O3 insulator to the gate structure and adopted the gate recess technique. To increase the frequency performance the e-beam lithography technique was used to define the 0.15 um gate length. To evaluate the dc and high frequency performance, electrical characterization was performed. The threshold voltage was measured to be positive value by linear extrapolation from the transfer curve. The device leakage current is comparable to that of the depletion mode device. The current gain cut-off frequency and the maximum oscillation frequency of the E-mode device with a total gate width of 150 um were 55 GHz and 168 GHz, respectively. To confirm the power performance for mm-wave applications the load-pull test was performed. The measured power density of 2.32 W/mm was achieved at frequencies of 28 and 30 GHz.

Highly Stable, Dual-Gated MoS2 Transistors Encapsulated by Hexagonal Boron Nitride with Gate-Controllable Contact, Resistance, and Threshold Voltage.

PubMed

Lee, Gwan-Hyoung; Cui, Xu; Kim, Young Duck; Arefe, Ghidewon; Zhang, Xian; Lee, Chul-Ho; Ye, Fan; Watanabe, Kenji; Taniguchi, Takashi; Kim, Philip; Hone, James

2015-07-28

Emerging two-dimensional (2D) semiconductors such as molybdenum disulfide (MoS2) have been intensively studied because of their novel properties for advanced electronics and optoelectronics. However, 2D materials are by nature sensitive to environmental influences, such as temperature, humidity, adsorbates, and trapped charges in neighboring dielectrics. Therefore, it is crucial to develop device architectures that provide both high performance and long-term stability. Here we report high performance of dual-gated van der Waals (vdW) heterostructure devices in which MoS2 layers are fully encapsulated by hexagonal boron nitride (hBN) and contacts are formed using graphene. The hBN-encapsulation provides excellent protection from environmental factors, resulting in highly stable device performance, even at elevated temperatures. Our measurements also reveal high-quality electrical contacts and reduced hysteresis, leading to high two-terminal carrier mobility (33-151 cm(2) V(-1) s(-1)) and low subthreshold swing (80 mV/dec) at room temperature. Furthermore, adjustment of graphene Fermi level and use of dual gates enable us to separately control contact resistance and threshold voltage. This novel vdW heterostructure device opens up a new way toward fabrication of stable, high-performance devices based on 2D materials.

Photocurrent Suppression of Transparent Organic Thin Film Transistors

NASA Astrophysics Data System (ADS)

Chuang, Chiao-Shun; Tsai, Shu-Ting; Lin, Yung-Sheng; Chen, Fang-Chung; Shieh, Hang-Ping D.

2007-12-01

Organic thin-film transistors (OTFTs) with high transmittance and low photosensitivity have been demonstrated. By using titanium dioxide nanoparticles as the additives in the polymer gate insulators, the level of device photoresponse has been reduced. The device shows simultaneously a high transparence and a minimal threshold voltage shift under white light illumination. It is inferred that the localized energy levels deep in the energy gap of pentacene behave as the recombination centers, enhancing substantially the recombination process in the conducting channel of the OTFTs. Therefore, the electron trapping is relieved and the shift of threshold voltage is reduced upon illumination.

Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

NASA Astrophysics Data System (ADS)

Wang, Kai; Ou, Hai; Chen, Jun

2015-06-01

Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

Review of mixer design for low voltage - low power applications

NASA Astrophysics Data System (ADS)

Nurulain, D.; Musa, F. A. S.; Isa, M. Mohamad; Ahmad, N.; Kasjoo, S. R.

2017-09-01

A mixer is used in almost all radio frequency (RF) or microwave systems for frequency translation. Nowadays, the increase market demand encouraged the industry to deliver circuit designs to create proficient and convenient equipment with very low power (LP) consumption and low voltage (LV) supply in both digital and analogue circuits. This paper focused on different Complementary Metal Oxide Semiconductor (CMOS) design topologies for LV and LP mixer design. Floating Gate Metal Oxide Semiconductor (FGMOS) is an alternative technology to replace CMOS due to their high ability for LV and LP applications. FGMOS only required a few transistors per gate and can have a shift in threshold voltage (VTH) to increase the LP and LV performances as compared to CMOS, which makes an attractive option to replace CMOS.

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Divalent cations potentiate TRPV1 channel by lowering the heat activation threshold

PubMed Central

Cao, Xu; Ma, Linlin; Yang, Fan

2014-01-01

Transient receptor potential vanilloid type 1 (TRPV1) channel responds to a wide spectrum of physical and chemical stimuli. In doing so, it serves as a polymodal cellular sensor for temperature change and pain. Many chemicals are known to strongly potentiate TRPV1 activation, though how this is achieved remains unclear. In this study we investigated the molecular mechanism underlying the gating effects of divalent cations Mg2+ and Ba2+. Using a combination of fluorescence imaging and patch-clamp analysis, we found that these cations potentiate TRPV1 gating by most likely promoting the heat activation process. Mg2+ substantially lowers the activation threshold temperature; as a result, a significant fraction of channels are heat-activated at room temperature. Although Mg2+ also potentiates capsaicin- and voltage-dependent activation, these processes were found either to be not required (in the case of capsaicin) or insufficient (in the case of voltage) to mediate the activating effect. In support of a selective effect on heat activation, Mg2+ and Ba2+ cause a Ca2+-independent desensitization that specifically prevents heat-induced channel activation but does not prevent capsaicin-induced activation. These results can be satisfactorily explained within an allosteric gating framework in which divalent cations strongly promote the heat-dependent conformational change or its coupling to channel activation, which is further coupled to the voltage- and capsaicin-dependent processes. PMID:24344247

Charge injection from gate electrode by simultaneous stress of optical and electrical biases in HfInZnO amorphous oxide thin film transistor

NASA Astrophysics Data System (ADS)

Kwon, Dae Woong; Kim, Jang Hyun; Chang, Ji Soo; Kim, Sang Wan; Sun, Min-Chul; Kim, Garam; Kim, Hyun Woo; Park, Jae Chul; Song, Ihun; Kim, Chang Jung; Jung, U. In; Park, Byung-Gook

2010-11-01

A comprehensive study is done regarding stabilities under simultaneous stress of light and dc-bias in amorphous hafnium-indium-zinc-oxide thin film transistors. The positive threshold voltage (Vth) shift is observed after negative gate bias and light stress, and it is completely different from widely accepted phenomenon which explains that negative-bias stress results in Vth shift in the left direction by bias-induced hole-trapping. Gate current measurement is performed to explain the unusual positive Vth shift under simultaneous application of light and negative gate bias. As a result, it is clearly found that the positive Vth shift is derived from electron injection from gate electrode to gate insulator.

Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

NASA Astrophysics Data System (ADS)

Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

2017-11-01

Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

NASA Astrophysics Data System (ADS)

Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

2014-01-01

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

AlGaN/GaN high electron mobility transistors with selective area grown p-GaN gates

NASA Astrophysics Data System (ADS)

Yuliang, Huang; Lian, Zhang; Zhe, Cheng; Yun, Zhang; Yujie, Ai; Yongbing, Zhao; Hongxi, Lu; Junxi, Wang; Jinmin, Li

2016-11-01

We report a selective area growth (SAG) method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors (HEMTs) by metal-organic chemical vapor deposition. Compared with Schottky gate HEMTs, the SAG p-GaN gate HEMTs show more positive threshold voltage (V th) and better gate control ability. The influence of Cp2Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied. With the increasing Cp2Mg from 0.16 μmol/min to 0.20 μmol/min, the V th raises from -0.67 V to -0.37 V. The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm. The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage. Project supported by the National Natural Sciences Foundation of China (Nos. 61376090, 61306008) and the National High Technology Program of China (No. 2014AA032606).

Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Tian-Li, E-mail: Tian-Li.Wu@imec.be; Groeseneken, Guido; Department of Electrical Engineering, KU Leuven, Leuven

2015-08-31

In this paper, three electrical techniques (frequency dependent conductance analysis, AC transconductance (AC-g{sub m}), and positive gate bias stress) were used to evaluate three different gate dielectrics (Plasma-Enhanced Atomic Layer Deposition Si{sub 3}N{sub 4}, Rapid Thermal Chemical Vapor Deposition Si{sub 3}N{sub 4}, and Atomic Layer Deposition (ALD) Al{sub 2}O{sub 3}) for AlGaN/GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors. From these measurements, the interface state density (D{sub it}), the amount of border traps, and the threshold voltage (V{sub TH}) shift during a positive gate bias stress can be obtained. The results show that the V{sub TH} shift during a positive gate bias stress ismore » highly correlated to not only interface states but also border traps in the dielectric. A physical model is proposed describing that electrons can be trapped by both interface states and border traps. Therefore, in order to minimize the V{sub TH} shift during a positive gate bias stress, the gate dielectric needs to have a lower interface state density and less border traps. However, the results also show that the commonly used frequency dependent conductance analysis technique to extract D{sub it} needs to be cautiously used since the resulting value might be influenced by the border traps and, vice versa, i.e., the g{sub m} dispersion commonly attributed to border traps might be influenced by interface states.« less

Interplay between low threshold voltage-gated K+ channels and synaptic inhibition in neurons of the chicken nucleus laminaris along its frequency axis

PubMed Central

Hamlet, William R.; Liu, Yu-Wei; Tang, Zheng-Quan; Lu, Yong

2014-01-01

Central auditory neurons that localize sound in horizontal space have specialized intrinsic and synaptic cellular mechanisms to tightly control the threshold and timing for action potential generation. However, the critical interplay between intrinsic voltage-gated conductances and extrinsic synaptic conductances in determining neuronal output are not well understood. In chicken, neurons in the nucleus laminaris (NL) encode sound location using interaural time difference (ITD) as a cue. Along the tonotopic axis of NL, there exist robust differences among low, middle, and high frequency (LF, MF, and HF, respectively) neurons in a variety of neuronal properties such as low threshold voltage-gated K+ (LTK) channels and depolarizing inhibition. This establishes NL as an ideal model to examine the interactions between LTK currents and synaptic inhibition across the tonotopic axis. Using whole-cell patch clamp recordings prepared from chicken embryos (E17–E18), we found that LTK currents were larger in MF and HF neurons than in LF neurons. Kinetic analysis revealed that LTK currents in MF neurons activated at lower voltages than in LF and HF neurons, whereas the inactivation of the currents was similar across the tonotopic axis. Surprisingly, blockade of LTK currents using dendrotoxin-I (DTX) tended to broaden the duration and increase the amplitude of the depolarizing inhibitory postsynaptic potentials (IPSPs) in NL neurons without dependence on coding frequency regions. Analyses of the effects of DTX on inhibitory postsynaptic currents led us to interpret this unexpected observation as a result of primarily postsynaptic effects of LTK currents on MF and HF neurons, and combined presynaptic and postsynaptic effects in LF neurons. Furthermore, DTX transferred subthreshold IPSPs to spikes. Taken together, the results suggest a critical role for LTK currents in regulating inhibitory synaptic strength in ITD-coding neurons at various frequencies. PMID:24904297

Interplay between low threshold voltage-gated K(+) channels and synaptic inhibition in neurons of the chicken nucleus laminaris along its frequency axis.

PubMed

Hamlet, William R; Liu, Yu-Wei; Tang, Zheng-Quan; Lu, Yong

2014-01-01

Central auditory neurons that localize sound in horizontal space have specialized intrinsic and synaptic cellular mechanisms to tightly control the threshold and timing for action potential generation. However, the critical interplay between intrinsic voltage-gated conductances and extrinsic synaptic conductances in determining neuronal output are not well understood. In chicken, neurons in the nucleus laminaris (NL) encode sound location using interaural time difference (ITD) as a cue. Along the tonotopic axis of NL, there exist robust differences among low, middle, and high frequency (LF, MF, and HF, respectively) neurons in a variety of neuronal properties such as low threshold voltage-gated K(+) (LTK) channels and depolarizing inhibition. This establishes NL as an ideal model to examine the interactions between LTK currents and synaptic inhibition across the tonotopic axis. Using whole-cell patch clamp recordings prepared from chicken embryos (E17-E18), we found that LTK currents were larger in MF and HF neurons than in LF neurons. Kinetic analysis revealed that LTK currents in MF neurons activated at lower voltages than in LF and HF neurons, whereas the inactivation of the currents was similar across the tonotopic axis. Surprisingly, blockade of LTK currents using dendrotoxin-I (DTX) tended to broaden the duration and increase the amplitude of the depolarizing inhibitory postsynaptic potentials (IPSPs) in NL neurons without dependence on coding frequency regions. Analyses of the effects of DTX on inhibitory postsynaptic currents led us to interpret this unexpected observation as a result of primarily postsynaptic effects of LTK currents on MF and HF neurons, and combined presynaptic and postsynaptic effects in LF neurons. Furthermore, DTX transferred subthreshold IPSPs to spikes. Taken together, the results suggest a critical role for LTK currents in regulating inhibitory synaptic strength in ITD-coding neurons at various frequencies.

Characterization of SiO2/SiC interface states and channel mobility from MOSFET characteristics including variable-range hopping at cryogenic temperature

NASA Astrophysics Data System (ADS)

Yoshioka, Hironori; Hirata, Kazuto

2018-04-01

The characteristics of SiC MOSFETs (drain current vs. gate voltage) were measured at 0.14-350 K and analyzed considering variable-range hopping conduction through interface states. The total interface state density was determined to be 5.4×1012 cm-2 from the additional shift in the threshold gate voltage with a temperature change. The wave-function size of interface states was determined from the temperature dependence of the measured hopping current and was comparable to the theoretical value. The channel mobility was approximately 100 cm2V-1s-1 and was almost independent of temperature.

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors

PubMed Central

2013-01-01

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric. PMID:23294730

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

PubMed

Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

2013-01-08

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

Gate bias stress stability under light irradiation for indium zinc oxide thin-film transistors based on anodic aluminium oxide gate dielectrics

NASA Astrophysics Data System (ADS)

Li, Min; Lan, Linfeng; Xu, Miao; Wang, Lei; Xu, Hua; Luo, Dongxiang; Zou, Jianhua; Tao, Hong; Yao, Rihui; Peng, Junbiao

2011-11-01

Thin-film transistors (TFTs) using indium zinc oxide as the active layer and anodic aluminium oxide (Al2O3) as the gate dielectric layer were fabricated. The device showed an electron mobility of as high as 10.1 cm2 V-1 s-1, an on/off current ratio of as high as ~108, and a turn-on voltage (Von) of only -0.5 V. Furthermore, this kind of TFTs was very stable under positive bias illumination stress. However, when the device experienced negative bias illumination stress, the threshold voltage shifted to the positive direction. It was found that the instability under negative bias illumination stress (NBIS) was due to the electrons from the Al gate trapping into the Al2O3 dielectric when exposed to the illuminated light. Using a stacked structure of Al2O3/SiO2 dielectrics, the device became more stable under NBIS.

The effects of electric field and gate bias pulse on the migration and stability of ionized oxygen vacancies in amorphous In–Ga–Zn–O thin film transistors

PubMed Central

Oh, Young Jun; Noh, Hyeon-Kyun; Chang, Kee Joo

2015-01-01

Oxygen vacancies have been considered as the origin of threshold voltage instability under negative bias illumination stress in amorphous oxide thin film transistors. Here we report the results of first-principles molecular dynamics simulations for the drift motion of oxygen vacancies. We show that oxygen vacancies, which are initially ionized by trapping photoexcited hole carriers, can easily migrate under an external electric field. Thus, accumulated hole traps near the channel/dielectric interface cause negative shift of the threshold voltage, supporting the oxygen vacancy model. In addition, we find that ionized oxygen vacancies easily recover their neutral defect configurations by capturing electrons when the Fermi level increases. Our results are in good agreement with the experimental observation that applying a positive gate bias pulse of short duration eliminates hole traps and thus leads to the recovery of device stability from persistent photoconductivity. PMID:27877799

Accurate evaluation of fast threshold voltage shift for SiC MOS devices under various gate bias stress conditions

NASA Astrophysics Data System (ADS)

Sometani, Mitsuru; Okamoto, Mitsuo; Hatakeyama, Tetsuo; Iwahashi, Yohei; Hayashi, Mariko; Okamoto, Dai; Yano, Hiroshi; Harada, Shinsuke; Yonezawa, Yoshiyuki; Okumura, Hajime

2018-04-01

We investigated methods of measuring the threshold voltage (V th) shift of 4H-silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) under positive DC, negative DC, and AC gate bias stresses. A fast measurement method for V th shift under both positive and negative DC stresses revealed the existence of an extremely large V th shift in the short-stress-time region. We then examined the effect of fast V th shifts on drain current (I d) changes within a pulse under AC operation. The fast V th shifts were suppressed by nitridation. However, the I d change within one pulse occurred even in commercially available SiC MOSFETs. The correlation between I d changes within one pulse and V th shifts measured by a conventional method is weak. Thus, a fast and in situ measurement method is indispensable for the accurate evaluation of I d changes under AC operation.

2D modeling based comprehensive analysis of short channel effects in DMG strained VSTB FET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Sarkar, Subir Kumar

2018-06-01

The paper aims to develop two dimensional analytical model of the proposed dual material (DM) Vertical Super Thin Body (VSTB) strained Field Effect Transistor (FET) with focus on its short channel behaviour in nanometer regime. Electrostatic potential across gate/channel and dielectric wall/channel interface is derived by solving 2D Poisson's equation with parabolic approximation method by applying appropriate boundary conditions. Threshold voltage is then calculated by using the criteria of minimum surface potential considering both gate and dielectric wall side potential. Performance analysis of the present structure is demonstrated in terms of potential, electric field, threshold voltage characteristics and subthreshold behaviour by varying various device parameters and applied biases. Effect of application of strain in channel is further explored to establish the superiority of the proposed device in comparison to conventional VSTB FET counterpart. All analytical results are compared with Silvaco ATLAS device simulated data to substantiate the accuracy of our derived model.

Visible-light-induced instability in amorphous metal-oxide based TFTs for transparent electronics

NASA Astrophysics Data System (ADS)

Ha, Tae-Jun

2014-10-01

We investigate the origin of visible-light-induced instability in amorphous metal-oxide based thin film transistors (oxide-TFTs) for transparent electronics by exploring the shift in threshold voltage (Vth). A large hysteresis window in amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs possessing large optical band-gap (≈3 eV) was observed in a visible-light illuminated condition whereas no hysteresis window was shown in a dark measuring condition. We also report the instability caused by photo irradiation and prolonged gate bias stress in oxide-TFTs. Larger Vth shift was observed after photo-induced stress combined with a negative gate bias than the sum of that after only illumination stress and only negative gate bias stress. Such results can be explained by trapped charges at the interface of semiconductor/dielectric and/or in the gate dielectric which play a role in a screen effect on the electric field applied by gate voltage, for which we propose that the localized-states-assisted transitions by visible-light absorption can be responsible.

Field-effect transistors as electrically controllable nonlinear rectifiers for the characterization of terahertz pulses

NASA Astrophysics Data System (ADS)

Lisauskas, Alvydas; Ikamas, Kestutis; Massabeau, Sylvain; Bauer, Maris; ČibiraitÄ--, DovilÄ--; Matukas, Jonas; Mangeney, Juliette; Mittendorff, Martin; Winnerl, Stephan; Krozer, Viktor; Roskos, Hartmut G.

2018-05-01

We propose to exploit rectification in field-effect transistors as an electrically controllable higher-order nonlinear phenomenon for the convenient monitoring of the temporal characteristics of THz pulses, for example, by autocorrelation measurements. This option arises because of the existence of a gate-bias-controlled super-linear response at sub-threshold operation conditions when the devices are subjected to THz radiation. We present measurements for different antenna-coupled transistor-based THz detectors (TeraFETs) employing (i) AlGaN/GaN high-electron-mobility and (ii) silicon CMOS field-effect transistors and show that the super-linear behavior in the sub-threshold bias regime is a universal phenomenon to be expected if the amplitude of the high-frequency voltage oscillations exceeds the thermal voltage. The effect is also employed as a tool for the direct determination of the speed of the intrinsic TeraFET response which allows us to avoid limitations set by the read-out circuitry. In particular, we show that the build-up time of the intrinsic rectification signal of a patch-antenna-coupled CMOS detector changes from 20 ps in the deep sub-threshold voltage regime to below 12 ps in the vicinity of the threshold voltage.

A SONOS device with a separated charge trapping layer for improvement of charge injection

NASA Astrophysics Data System (ADS)

Ahn, Jae-Hyuk; Moon, Dong-Il; Ko, Seung-Won; Kim, Chang-Hoon; Kim, Jee-Yeon; Kim, Moon-Seok; Seol, Myeong-Lok; Moon, Joon-Bae; Choi, Ji-Min; Oh, Jae-Sub; Choi, Sung-Jin; Choi, Yang-Kyu

2017-03-01

A charge trapping layer that is separated from the primary gate dielectric is implemented on a FinFET SONOS structure. By virtue of the reduced effective oxide thickness of the primary gate dielectric, a strong gate-to-channel coupling is obtained and thus short-channel effects in the proposed device are effectively suppressed. Moreover, a high program/erase speed and a large shift in the threshold voltage are achieved due to the improved charge injection by the reduced effective oxide thickness. The proposed structure has potential for use in high speed flash memory.

Extended-gate organic field-effect transistor for the detection of histamine in water

NASA Astrophysics Data System (ADS)

Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

2015-04-01

As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

Planarized thick copper gate polycrystalline silicon thin film transistors for ultra-large AMOLED displays

NASA Astrophysics Data System (ADS)

Yun, Seung Jae; Lee, Yong Woo; Son, Se Wan; Byun, Chang Woo; Reddy, A. Mallikarjuna; Joo, Seung Ki

2012-08-01

A planarized thick copper (Cu) gate low temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) is fabricated for ultra-large active-matrix organic light-emitting diode (AMOLED) displays. We introduce a damascene and chemical mechanical polishing process to embed a planarized Cu gate of 500 nm thickness into a trench and Si3N4/SiO2 multilayer gate insulator, to prevent the Cu gate from diffusing into the silicon (Si) layer at 550°C, and metal-induced lateral crystallization (MILC) technology to crystallize the amorphous Si layer. A poly-Si TFT with planarized thick Cu gate exhibits a field effect mobility of 5 cm2/Vs and a threshold voltage of -9 V, and a subthreshold swing (S) of 1.4 V/dec.

Hot-Carrier Immunity of Polycrystalline Silicon Thin Film Transistors Using Silicon Oxynitride Gate Dielectric Formed with Plasma-Enhanced Chemical Vapor Deposition

NASA Astrophysics Data System (ADS)

Kunii, Masafumi

2009-11-01

An analysis is presented of the hot-carrier degradation in a polycrystalline silicon (poly-Si) thin film transistor (TFT) with a silicon oxynitride gate dielectric formed with plasma-enhanced chemical vapor deposition. An introduction of silicon oxynitride into a gate dielectric significantly improves hot-carrier immunity even under the severe stressing mode of drain avalanche hot carriers. To compensate the initial negative shift of threshold voltage for TFTs with a silicon oxynitride gate dielectric, high-pressure water vapor annealing (HWA) is applied. A comparison of TFTs with and without HWA reveals that the improvement in hot-carrier immunity is mainly attributed to the introduction of Si≡N bonds into a gate dielectric.

Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

NASA Astrophysics Data System (ADS)

Liyana, V. P.; Stephania, A. M.; Shiju, K.; Predeep, P.

2015-06-01

Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (VT), on-off ratio (Ion/Ioff) and their comparative analysis is reported.

The Development of III-V Semiconductor MOSFETs for Future CMOS Applications

NASA Astrophysics Data System (ADS)

Greene, Andrew M.

Alternative channel materials with superior transport properties over conventional strained silicon are required for supply voltage scaling in low power complementary metal-oxide-semiconductor (CMOS) integrated circuits. Group III-V compound semiconductor systems offer a potential solution due to their high carrier mobility, low carrier effective mass and large injection velocity. The enhancement in transistor drive current at a lower overdrive voltage allows for the scaling of supply voltage while maintaining high switching performance. This thesis focuses on overcoming several material and processing challenges associated with III-V semiconductor development including a low thermal processing budget, high interface trap state density (Dit), low resistance source/drain contacts and growth on lattice mismatched substrates. Non-planar In0.53Ga0.47As FinFETs were developed using both "gate-first" and "gate-last" fabrication methods for n-channel MOSFETs. Electron beam lithography and anisotropic plasma etching processes were optimized to create highly scaled fins with near vertical sidewalls. Plasma damage was removed using a wet etch process and improvements in gate efficiency were characterized on MOS capacitor structures. A two-step, selective removal of the pre-grown n+ contact layer was developed for "gate-last" recess etching. The final In0.53Ga 0.47As FinFET devices demonstrated an ION = 70 mA/mm, I ON/IOFF ratio = 15,700 and sub-threshold swing = 210 mV/dec. Bulk GaSb and strained In0.36Ga0.64Sb quantum well (QW) heterostructures were developed for p-channel MOSFETs. Dit was reduced to 2 - 3 x 1012 cm-2eV-1 using an InAs surface layer, (NH4)2S passivation and atomic layer deposition (ALD) of Al2O3. A self-aligned "gate-first" In0.36Ga0.64Sb MOSFET fabrication process was invented using a "T-shaped" electron beam resist patterning stack and intermetallic source/drain contacts. Ni contacts annealed at 300°C demonstrated an ION = 166 mA/mm, ION/IOFF ratio = 1,500 and sub-threshold swing = 340 mV/dec. Split C-V measurements were used to extract an effective channel mobility of muh* = 300 cm2/Vs at Ns = 2 x 1012 cm -2. "Gate-last" MOSFETs grown with an epitaxial p + contact layer were fabricated using selective gate-recess etching techniques. A parasitic "n-channel" limited ION/I OFF ratio and sub-threshold swing, most likely due to effects from the InAs surface layer.

Cycle of charge carrier states with formation and extinction of a floating gate in an ambipolar tetracyanoquaterthienoquinoid-based field-effect transistor

NASA Astrophysics Data System (ADS)

Itoh, Takuro; Toyota, Taro; Higuchi, Hiroyuki; Matsushita, Michio M.; Suzuki, Kentaro; Sugawara, Tadashi

2017-03-01

A tetracyanoquaterthienoquinoid (TCT4Q)-based field effect transistor is characterized by the ambipolar transfer characteristics and the facile shift of the threshold voltage induced by the bias stress. The trapping and detrapping kinetics of charge carriers was investigated in detail by the temperature dependence of the decay of source-drain current (ISD). We found a repeatable formation of a molecular floating gate is derived from a 'charge carrier-and-gate' cycle comprising four stages, trapping of mobile carriers, formation of a floating gate, induction of oppositely charged mobile carriers, and recombination between mobile and trapped carriers to restore the initial state.

A normally-off fully AlGaN HEMT with high breakdown voltage and figure of merit for power switch applications

NASA Astrophysics Data System (ADS)

Ebrahimi, Behzad; Asad, Mohsen

2015-07-01

In this paper, we propose a fully AlGaN high electron mobility (HEMT) in which the gate electrode, the barrier and the channel are all AlGaN. The p-type AlGaN gate facilitates the normally-off operation to be compatible with the state-of-the-art power amplifiers. In addition, the AlGaN channel increases the breakdown voltage (VBR) to 598 V due to the higher breakdown field of AlGaN compared to GaN. To assess the efficiency of the proposed structure, its characteristics are compared with the conventional and recently proposed structures. The two-dimensional device simulation results show that the proposed structure has the highest threshold voltage (Vth) and the VBR with the moderately low ON-resistance (RON). These features lead to the highest figure of merit (2.49 × 1012) among the structures which is 83%, 59%, 47% and 49% more than those of the conventional, with a field plate, AlGaN gate and AlGaN channel structures, respectively.

Performance improvement of doped TFET by using plasma formation concept

NASA Astrophysics Data System (ADS)

Soni, Deepak; Sharma, Dheeraj; Yadav, Shivendra; Aslam, Mohd.; Sharma, Neeraj

2018-01-01

Formation of abrupt doping profile at tunneling junction for the nanoscale tunnel field effect transistor (TFET) is a critical issue for attaining improved electrical behaviour. The realization of abrupt doping profile is more difficult in the case of physically doped TFETs due to material solubility limit. In this concern, we propose a novel design of TFET. For this, P+ (source)-I (channel)-N (drain) type structure has been considered, wherein a metal electrode is deposited over the source region. In addition to this, a negative voltage is applied to the source electrode (SE). It induces the surface plasma layer of holes in the source region, which is responsible for steepness in the bands at source/channel junction and provides the advantage of higher doping in source region without any addition of the physical impurity. The proposed modification is helpful for achieving steeper band bending at the source/channel interface, which enables higher tunneling generation rate of charge carriers at this interface and overcomes the issue of low ON-state current. Thus, the proposed device shows the increment of 2 decades in drain current and 252 mV reduction in threshold voltage compared with conventional device. The optimization of spacer length (LSG) between source/gate (LSG) and applied negative voltage (Vpg) over source electrode have been performed to obtain optimum drain current and threshold voltage (Vth). Further, for the suppression of ambipolar current, drain region is kept lightly doped, which reduces the ambipolar current up to level of Off state current. Moreover, in the proposed device gate electrode is underlapped for improving RF performance. It also reduces gate to drain capacitances (Cgd) and increases cut-off-frequency (fT), fmax, GBP, TFP. In addition to these, linearity analysis has been performed to validate the applicability of the device.

A Novel Threshold Voltage Defined Multiplexer for Interconnect Camouflaging

DTIC Science & Technology

2017-03-01

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Two dimensional analytical model for a reconfigurable field effect transistor

NASA Astrophysics Data System (ADS)

Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

2018-02-01

This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

2D Quantum Mechanical Study of Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, B.; Kwak, Dochan (Technical Monitor)

2000-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. We present the results of our simulations of MIT 25, 50 and 90 nm "well-tempered" MOSFETs and compare them to those of classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. Surprisingly, the self-consistent potential profile shows lower injection barrier in the channel in quantum case. These results are qualitatively consistent with ID Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and subthreshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Effects of drain bias on the statistical variation of double-gate tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Choi, Woo Young

2017-04-01

The effects of drain bias on the statistical variation of double-gate (DG) tunnel field-effect transistors (TFETs) are discussed in comparison with DG metal-oxide-semiconductor FETs (MOSFETs). Statistical variation corresponds to the variation of threshold voltage (V th), subthreshold swing (SS), and drain-induced barrier thinning (DIBT). The unique statistical variation characteristics of DG TFETs and DG MOSFETs with the variation of drain bias are analyzed by using full three-dimensional technology computer-aided design (TCAD) simulation in terms of the three dominant variation sources: line-edge roughness (LER), random dopant fluctuation (RDF) and workfunction variation (WFV). It is observed than DG TFETs suffer from less severe statistical variation as drain voltage increases unlike DG MOSFETs.

Quantum Corrections to the 'Atomistic' MOSFET Simulations

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Kaya, S.; Balasubramaniam, R.

2000-01-01

We have introduced in a simple and efficient manner quantum mechanical corrections in our 3D 'atomistic' MOSFET simulator using the density gradient formalism. We have studied in comparison with classical simulations the effect of the quantum mechanical corrections on the simulation of random dopant induced threshold voltage fluctuations, the effect of the single charge trapping on interface states and the effect of the oxide thickness fluctuations in decanano MOSFETs with ultrathin gate oxides. The introduction of quantum corrections enhances the threshold voltage fluctuations but does not affect significantly the amplitude of the random telegraph noise associated with single carrier trapping. The importance of the quantum corrections for proper simulation of oxide thickness fluctuation effects has also been demonstrated.

Organic field-effect transistor with octadecyltrichlorosilane (OTS) self-assembled monolayers on gate oxide: effect of OTS quality

NASA Astrophysics Data System (ADS)

Devynck, M.; Tardy, P.; Wantz, G.; Nicolas, Y.; Hirsch, L.

2011-12-01

The effect of OTS (octadecyltrichlorosilane) Self-Assembled Monolayer (SAM) grafted on SiO2 gate dielectric of pentacene-based OFETs (organic field-effect transistors) is investigated. A significant improvement of the charge mobility (μ), up to 0.74 cm2/V s, is reached thanks to OTS treatment. However, in spite of improved performances, several drawbacks, such as an increase in mobility dispersion, substantial hysteresis in IDS-VG characteristics and high threshold voltages (VT), are observed. Changing solvent and deposition method turns out to have no significant effect on the mobility dispersion. A more accurate approach on the evolution of the mobility and the threshold voltage dispersion with OTS storage time highlights the effect of the OTS solution aging. Even if no difference is evidenced in the surface energy and roughness of the OTS layer, electrical characteristics exhibit considerable deterioration with OTS solution storage time. Using an "aged" OTS solution, opened under air, kept under argon and distilled before use, results in an increase of the IDS-VG hysteresis as well as in VT and in mobility dispersion. In comparison, fresh-OTS-based OFETs present a very low hysteresis, a threshold voltage close to 0 and a much lower mobility dispersion. It is demonstrated that aged OTS solutions contain impurities that are not removed by distillation process, which leads to a less densely packed layer causing interfacial charge traps thus deteriorated performances.

Temporal and voltage stress stability of high performance indium-zinc-oxide thin film transistors

NASA Astrophysics Data System (ADS)

Song, Yang; Katsman, Alexander; Butcher, Amy L.; Paine, David C.; Zaslavsky, Alexander

2017-10-01

Thin film transistors (TFTs) based on transparent oxide semiconductors, such as indium zinc oxide (IZO), are of interest due to their improved characteristics compared to traditional a-Si TFTs. Previously, we reported on top-gated IZO TFTs with an in-situ formed HfO2 gate insulator and IZO active channel, showing high performance: on/off ratio of ∼107, threshold voltage VT near zero, extracted low-field mobility μ0 = 95 cm2/V·s, and near-perfect subthreshold slope at 62 mV/decade. Since device stability is essential for technological applications, in this paper we report on the temporal and voltage stress stability of IZO TFTs. Our devices exhibit a small negative VT shift as they age, consistent with an increasing carrier density resulting from an increasing oxygen vacancy concentration in the channel. Under gate bias stress, freshly annealed TFTs show a negative VT shift during negative VG gate bias stress, while aged (>1 week) TFTs show a positive VT shift during negative VG stress. This indicates two competing mechanisms, which we identify as the field-enhanced generation of oxygen vacancies and the field-assisted migration of oxygen vacancies, respectively. A simplified kinetic model of the vacancy concentration evolution in the IZO channel under electrical stress is provided.

GaAs-based optoelectronic neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H. (Inventor); Kim, Jae H. (Inventor); Psaltis, Demetri (Inventor)

1993-01-01

An integrated, optoelectronic, variable thresholding neuron implemented monolithically in GaAs integrated circuit and exhibiting high differential optical gain and low power consumption is presented. Two alternative embodiments each comprise an LED monolithically integrated with a detector and two transistors. One of the transistors is responsive to a bias voltage applied to its gate for varying the threshold of the neuron. One embodiment is implemented as an LED monolithically integrated with a double heterojunction bipolar phototransistor (detector) and two metal semiconductor field effect transistors (MESFET's) on a single GaAs substrate and another embodiment is implemented as an LED monolithically integrated with three MESFET's (one of which is an optical FET detector) on a single GaAs substrate. The first noted embodiment exhibits a differential optical gain of 6 and an optical switching energy of 10 pJ. The second embodiment has a differential optical gain of 80 and an optical switching energy of 38 pJ. Power consumption is 2.4 and 1.8 mW, respectively. Input 'light' power needed to turn on the LED is 2 micro-W and 54 nW, respectively. In both embodiments the detector is in series with a biasing MESFET and saturates the other MESFET upon detecting light above a threshold level. The saturated MESFET turns on the LED. Voltage applied to the biasing MESFET gate controls the threshold.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Modeling of Sonos Memory Cell Erase Cycle

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer.

PubMed

Dao, Toan Thanh; Sakai, Heisuke; Nguyen, Hai Thanh; Ohkubo, Kei; Fukuzumi, Shunichi; Murata, Hideyuki

2016-07-20

We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.

Low-frequency noise reduction in vertical MOSFETs having tunable threshold voltage fabricated with 60 nm CMOS technology on 300 mm wafer process

NASA Astrophysics Data System (ADS)

Imamoto, Takuya; Ma, Yitao; Muraguchi, Masakazu; Endoh, Tetsuo

2015-04-01

In this paper, DC and low-frequency noise (LFN) characteristics have been investigated with actual measurement data in both n- and p-type vertical MOSFETs (V-MOSFETs) for the first time. The V-MOSFETs which was fabricated on 300 mm bulk silicon wafer process have realized excellent DC performance and a significant reduction of flicker (1/f) noise. The measurement results show that the fabricated V-MOSFETs with 60 nm silicon pillar and 100 nm gate length achieve excellent steep sub-threshold swing (69 mV/decade for n-type and 66 mV/decade for p-type), good on-current (281 µA/µm for n-type 149 µA/µm for p-type), low off-leakage current (28.1 pA/µm for n-type and 79.6 pA/µm for p-type), and excellent on-off ratio (1 × 107 for n-type and 2 × 106 for p-type). In addition, it is demonstrated that our fabricated V-MOSFETs can control the threshold voltage (Vth) by changing the channel doping condition, which is the useful and low-cost technique as it has been widely used in the conventional bulk planar MOSFET. This result indicates that V-MOSFETs can control Vth more finely and flexibly by the combined the use of the doping technique with other techniques such as work function engineering of metal-gate. Moreover, it is also shown that V-MOSFETs can suppress 1/f noise (L\\text{gate}WS\\text{Id}/I\\text{d}2 of 10-13-10-11 µm2/Hz for n-type and 10-12-10-10 µm2/Hz for p-type) to one or two order lower level than previously reported nanowire type MOSFET, FinFET, Tri-Gate, and planar MOSFETs. The results have also proved that both DC and 1/f noise performances are independent from the bias voltage which is applied to substrate or well layer. Therefore, it is verified that V-MOSFETs can eliminate the effects from substrate or well layer, which always adversely affects the circuit performances due to this serial connection.

Electrical Properties of Ultrathin Hf-Ti-O Higher k Gate Dielectric Films and Their Application in ETSOI MOSFET.

PubMed

Xiong, Yuhua; Chen, Xiaoqiang; Wei, Feng; Du, Jun; Zhao, Hongbin; Tang, Zhaoyun; Tang, Bo; Wang, Wenwu; Yan, Jiang

2016-12-01

Ultrathin Hf-Ti-O higher k gate dielectric films (~2.55 nm) have been prepared by atomic layer deposition. Their electrical properties and application in ETSOI (fully depleted extremely thin SOI) PMOSFETs were studied. It is found that at the Ti concentration of Ti/(Ti + Hf) ~9.4%, low equivalent gate oxide thickness (EOT) of ~0.69 nm and acceptable gate leakage current density of 0.61 A/cm 2 @ (V fb  - 1)V could be obtained. The conduction mechanism through the gate dielectric is dominated by the F-N tunneling in the gate voltage range of -0.5 to -2 V. Under the same physical thickness and process flow, lower EOT and higher I on /I off ratio could be obtained while using Hf-Ti-O as gate dielectric compared with HfO 2 . With Hf-Ti-O as gate dielectric, two ETSOI PMOSFETs with gate width/gate length (W/L) of 0.5 μm/25 nm and 3 μm/40 nm show good performances such as high I on , I on /I off ratio in the magnitude of 10 5 , and peak transconductance, as well as suitable threshold voltage (-0.3~-0.2 V). Particularly, ETSOI PMOSFETs show superior short-channel control capacity with DIBL <82 mV/V and subthreshold swing <70 mV/decade.

Synaptic transistor with a reversible and analog conductance modulation using a Pt/HfOx/n-IGZO memcapacitor

NASA Astrophysics Data System (ADS)

Yang, Paul; Kim, Hyung Jun; Zheng, Hong; Beom, Geon Won; Park, Jong-Sung; Kang, Chi Jung; Yoon, Tae-Sik

2017-06-01

A synaptic transistor emulating the biological synaptic motion is demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-indium-gallium-zinc-oxide (IGZO) memcapacitor. First, the metal-oxide-semiconductor (MOS) capacitor with Pt/HfOx/n-IGZO structure exhibits analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements. When a positive voltage is applied repeatedly to the Pt electrode, the accumulation capacitance increases gradually and sequentially. The depletion capacitance also increases consequently. The capacitances are restored by repeatedly applying a negative voltage, confirming the reversible memcapacitance. The analog and reversible memcapacitance emulates the potentiation and depression synaptic motions. The synaptic thin-film transistor (TFT) with this memcapacitor also shows the synaptic motion with gradually increasing drain current by repeatedly applying the positive gate and drain voltages and reversibly decreasing one by applying the negative voltages, representing synaptic weight modulation. The reversible and analog conductance change in the transistor at both the voltage sweep and pulse operations is obtained through the memcapacitance and threshold voltage shift at the same time. These results demonstrate the synaptic transistor operations with a MOS memcapacitor gate stack consisting of Pt/HfOx/n-IGZO.

Synaptic transistor with a reversible and analog conductance modulation using a Pt/HfOx/n-IGZO memcapacitor.

PubMed

Yang, Paul; Jun Kim, Hyung; Zheng, Hong; Won Beom, Geon; Park, Jong-Sung; Jung Kang, Chi; Yoon, Tae-Sik

2017-06-02

A synaptic transistor emulating the biological synaptic motion is demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-indium-gallium-zinc-oxide (IGZO) memcapacitor. First, the metal-oxide-semiconductor (MOS) capacitor with Pt/HfOx/n-IGZO structure exhibits analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements. When a positive voltage is applied repeatedly to the Pt electrode, the accumulation capacitance increases gradually and sequentially. The depletion capacitance also increases consequently. The capacitances are restored by repeatedly applying a negative voltage, confirming the reversible memcapacitance. The analog and reversible memcapacitance emulates the potentiation and depression synaptic motions. The synaptic thin-film transistor (TFT) with this memcapacitor also shows the synaptic motion with gradually increasing drain current by repeatedly applying the positive gate and drain voltages and reversibly decreasing one by applying the negative voltages, representing synaptic weight modulation. The reversible and analog conductance change in the transistor at both the voltage sweep and pulse operations is obtained through the memcapacitance and threshold voltage shift at the same time. These results demonstrate the synaptic transistor operations with a MOS memcapacitor gate stack consisting of Pt/HfOx/n-IGZO.

Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

NASA Astrophysics Data System (ADS)

Khound, Sagarika; Sarma, Ranjit

2018-01-01

We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

Nanocrystal floating gate memory with solution-processed indium-zinc-tin-oxide channel and colloidal silver nanocrystals

NASA Astrophysics Data System (ADS)

Hu, Quanli; Ha, Sang-Hyub; Lee, Hyun Ho; Yoon, Tae-Sik

2011-12-01

A nanocrystal (NC) floating gate memory with solution-processed indium-zinc-tin-oxide (IZTO) channel and silver (Ag) NCs embedded in thin gate dielectric layer (SiO2(30 nm)/Al2O3(3 nm)) was fabricated. Both the IZTO channel and colloidal Ag NC layers were prepared by spin-coating and subsequent annealing, and dip-coating process, respectively. A threshold voltage shift up to ~0.9 V, corresponding to the electron density of 6.5 × 1011 cm-2, at gate pulsing <=10 V was achieved by the charging of high density NCs. These results present the successful non-volatile memory characteristics of an oxide-semiconductor transistor fabricated through solution processes.

AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors using Sc2O3 as the gate oxide and surface passivation

NASA Astrophysics Data System (ADS)

Mehandru, R.; Luo, B.; Kim, J.; Ren, F.; Gila, B. P.; Onstine, A. H.; Abernathy, C. R.; Pearton, S. J.; Gotthold, D.; Birkhahn, R.; Peres, B.; Fitch, R.; Gillespie, J.; Jenkins, T.; Sewell, J.; Via, D.; Crespo, A.

2003-04-01

We demonstrated that Sc2O3 thin films deposited by plasma-assisted molecular-beam epitaxy can be used simultaneously as a gate oxide and as a surface passivation layer on AlGaN/GaN high electron mobility transistors (HEMTs). The maximum drain source current, IDS, reaches a value of over 0.8 A/mm and is ˜40% higher on Sc2O3/AlGaN/GaN transistors relative to conventional HEMTs fabricated on the same wafer. The metal-oxide-semiconductor HEMTs (MOS-HEMTs) threshold voltage is in good agreement with the theoretical value, indicating that Sc2O3 retains a low surface state density on the AlGaN/GaN structures and effectively eliminates the collapse in drain current seen in unpassivated devices. The MOS-HEMTs can be modulated to +6 V of gate voltage. In particular, Sc2O3 is a very promising candidate as a gate dielectric and surface passivant because it is more stable on GaN than is MgO.

Measuring Input Thresholds on an Existing Board

NASA Technical Reports Server (NTRS)

Kuperman, Igor; Gutrich, Daniel G.; Berkun, Andrew C.

2011-01-01

A critical PECL (positive emitter-coupled logic) interface to Xilinx interface needed to be changed on an existing flight board. The new Xilinx input interface used a CMOS (complementary metal-oxide semiconductor) type of input, and the driver could meet its thresholds typically, but not in worst-case, according to the data sheet. The previous interface had been based on comparison with an external reference, but the CMOS input is based on comparison with an internal divider from the power supply. A way to measure what the exact input threshold was for this device for 64 inputs on a flight board was needed. The measurement technique allowed an accurate measurement of the voltage required to switch a Xilinx input from high to low for each of the 64 lines, while only probing two of them. Directly driving an external voltage was considered too risky, and tests done on any other unit could not be used to qualify the flight board. The two lines directly probed gave an absolute voltage threshold calibration, while data collected on the remaining 62 lines without probing gave relative measurements that could be used to identify any outliers. The PECL interface was forced to a long-period square wave by driving a saturated square wave into the ADC (analog to digital converter). The active pull-down circuit was turned off, causing each line to rise rapidly and fall slowly according to the input s weak pull-down circuitry. The fall time shows up as a change in the pulse width of the signal ready by the Xilinx. This change in pulse width is a function of capacitance, pulldown current, and input threshold. Capacitance was known from the different trace lengths, plus a gate input capacitance, which is the same for all inputs. The pull-down current is the same for all inputs including the two that are probed directly. The data was combined, and the Excel solver tool was used to find input thresholds for the 62 lines. This was repeated over different supply voltages and temperatures to show that the interface had voltage margin under all worst case conditions. Gate input thresholds are normally measured at the manufacturer when the device is on a chip tester. A key function of this machine was duplicated on an existing flight board with no modifications to the nets to be tested, with the exception of changes in the FPGA program.

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chun, Minkyu; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr

We investigated the effects of top gate voltage (V{sub TG}) and temperature (in the range of 25 to 70 {sup o}C) on dual-gate (DG) back-channel-etched (BCE) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) characteristics. The increment of V{sub TG} from -20V to +20V, decreases the threshold voltage (V{sub TH}) from 19.6V to 3.8V and increases the electron density to 8.8 x 10{sup 18}cm{sup −3}. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on V{sub TG}. At V{sub TG} of 20V, the mobility decreases from 19.1 to 15.4 cm{sup 2}/V ⋅ s with increasingmore » temperature, showing a metallic conduction. On the other hand, at V{sub TG} of - 20V, the mobility increases from 6.4 to 7.5cm{sup 2}/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.« less

Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

PubMed

Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

2015-01-14

Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

An extensive investigation of work function modulated trapezoidal recessed channel MOSFET

NASA Astrophysics Data System (ADS)

Lenka, Annada Shankar; Mishra, Sikha; Mishra, Satyaranjan; Bhanja, Urmila; Mishra, Guru Prasad

2017-11-01

The concept of silicon on insulator (SOI) and grooved gate help to lessen the short channel effects (SCEs). Again the work function modulation along the metal gate gives a better drain current due to the uniform electric field along the channel. So all these concepts are combined and used in the proposed MOSFET structure for more improved performance. In this work, trapezoidal recessed channel silicon on insulator (TRC-SOI) MOSFET and work function modulated trapezoidal recessed channel silicon on insulator (WFM-TRC-SOI) MOSFET are compared with DC and RF parameters and later linearity of both the devices is tested. An analytical model is formulated by using a 2-D Poisson's equation and develops a compact equation for threshold voltage using minimum surface potential. In this work we analyze the effect of negative junction depth and the corner angle on various device parameters such as minimum surface potential, sub-threshold slope (SS), drain induced barrier lowering (DIBL) and threshold voltage. The analysis interprets that the switching performance of WFM-TRC-SOI MOSFET surpasses TRC-SOI MOSFET in terms of high Ion/Ioff ratio and also the proposed structure can minimize the short channel effects (SCEs) in RF application. The validity of proposed model has been verified with simulation result performed on Sentaurus TCAD device simulator.

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

NASA Astrophysics Data System (ADS)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

High-performance enhancement-mode Al2O3/InAlGaN/GaN MOS high-electron mobility transistors with a self-aligned gate recessing technology

NASA Astrophysics Data System (ADS)

Zhang, Kai; Kong, Cen; Zhou, Jianjun; Kong, Yuechan; Chen, Tangsheng

2017-02-01

The paper reports high-performance enhancement-mode MOS high-electron mobility transistors (MOS-HEMTs) based on a quaternary InAlGaN barrier. Self-aligned gate technology is used for gate recessing, dielectric deposition, and gate electrode formation. An improved digital recessing process is developed, and an Al2O3 gate dielectric grown with O2 plasma is used. Compared to results with AlGaN barrier, the fabricated E-mode MOS-HEMT with InAlGaN barrier delivers a record output current density of 1.7 A/mm with a threshold voltage (V TH) of 1.5 V, and a small on-resistance (R on) of 2.0 Ω·mm. Excellent V TH hysteresis and greatly improved gate leakage characteristics are also demonstrated.

Efficient III-Nitride MIS-HEMT devices with high-κ gate dielectric for high-power switching boost converter circuits

NASA Astrophysics Data System (ADS)

Mohanbabu, A.; Mohankumar, N.; Godwin Raj, D.; Sarkar, Partha; Saha, Samar K.

2017-03-01

The paper reports the results of a systematic theoretical study on efficient recessed-gate, double-heterostructure, and normally-OFF metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs), HfAlOx/AlGaN on Al2O3 substrate. In device architecture, a thin AlGaN layer is used in the AlGaN graded barrier MIS-HEMTs that offers an excellent enhancement-mode device operation with threshold voltage higher than 5.3 V and drain current above 0.64 A/mm along with high on-current/off-current ratio over 107 and subthreshold slope less than 73 mV/dec. In addition, a high OFF-state breakdown voltage of 1200 V is achieved for a device with a gate-to-drain distance and field-plate length of 15 μm and 5.3 μm, respectively at a drain current of 1 mA/mm with a zero gate bias, and the substrate grounded. The numerical device simulation results show that in comparison to a conventional AlGaN/GaN MIS-HEMT of similar design, a graded barrier MIS-HEMT device exhibits a better interface property, remarkable suppression of leakage current, and a significant improvement of breakdown voltage for HfAlOx gate dielectric. Finally, the benefit of HfAlOx graded-barrier AlGaN MIS-HEMTs based switching devices is evaluated on an ultra-low-loss converter circuit.

Quantum Mechanical Study of Nanoscale MOSFET

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

The steady state characteristics of MOSFETS that are of practical Interest are the drive current, off-current, dope of drain current versus drain voltage, and threshold voltage. In this section, we show that quantum mechanical simulations yield significantly different results from drift-diffusion based methods. These differences arise because of the following quantum mechanical features: (I) polysilicon gate depletion in a manner opposite to the classical case (II) dependence of the resonant levels in the channel on the gate voltage, (III) tunneling of charge across the gate oxide and from source to drain, (IV) quasi-ballistic flow of electrons. Conclusions dI/dV versus V does not increase in a manner commensurate with the increase in number of subbands. - The increase in dI/dV with bias is much smaller then the increase in the number of subbands - a consequence of bragg reflection. Our calculations show an increase in transmission with length of contact, as seen in experiments. It is desirable for molecular electronics applications to have a small contact area, yet large coupling. In this case, the circumferential dependence of the nanotube wave function dictates: - Transmission in armchair tubes saturates around unity - Transmission in zigzag tubes saturates at two.

Extended Solution Gate OFET-based Biosensor for Label-free Glial Fibrillary Acidic Protein Detection with Polyethylene Glycol-Containing Bioreceptor Layer.

PubMed

Song, Jian; Dailey, Jennifer; Li, Hui; Jang, Hyun-June; Zhang, Pengfei; Wang, Jeff Tza-Huei; Everett, Allen D; Katz, Howard E

2017-05-25

A novel organic field effect transistor (OFET) -based biosensor is described for label-free glial fibrillary acidic protein (GFAP) detection. We report the first use of an extended solution gate structure where the sensing area and the organic semiconductor are separated, and a reference electrode is not needed. Different molecular weight polyethylene glycols (PEGs) are mixed into the bio-receptor layer to help extend the Debye screening length. The drain current change was significantly increased with the help of higher molecular weight PEGs, as they are known to reduce the dielectric constant. We also investigated the sensing performance under different gate voltage (V g ). The sensitivity increased after we decreased V g from -5 V to -2 V, because the lower V g is much closer to the OFET threshold voltage and the influence of attached negatively charged proteins become more apparent. Finally, the selectivity experiments toward different interferents were performed. The stability and selectivity are promising for clinical applications.

Electron Doping of Ultrathin Black Phosphorus with Cu Adatoms.

PubMed

Koenig, Steven P; Doganov, Rostislav A; Seixas, Leandro; Carvalho, Alexandra; Tan, Jun You; Watanabe, Kenji; Taniguchi, Takashi; Yakovlev, Nikolai; Castro Neto, Antonio H; Özyilmaz, Barbaros

2016-04-13

Few-layer black phosphorus is a monatomic two-dimensional crystal with a direct band gap that has high carrier mobility for both holes and electrons. Similarly to other layered atomic crystals, like graphene or layered transition metal dichalcogenides, the transport behavior of few-layer black phosphorus is sensitive to surface impurities, adsorbates, and adatoms. Here we study the effect of Cu adatoms onto few-layer black phosphorus by characterizing few-layer black phosphorus field effect devices and by performing first-principles calculations. We find that the addition of Cu adatoms can be used to controllably n-dope few layer black phosphorus, thereby lowering the threshold voltage for n-type conduction without degrading the transport properties. We demonstrate a scalable 2D material-based complementary inverter which utilizes a boron nitride gate dielectric, a graphite gate, and a single bP crystal for both the p- and n-channels. The inverter operates at matched input and output voltages, exhibits a gain of 46, and does not require different contact metals or local electrostatic gating.

Fabrication and Characteristics of Pentacene/Vanadium Pentoxide Field-Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Minagawa, M.; Nakai, K.; Baba, A.

2011-12-23

Organic field-effect transistors (OFETs) were fabricated using pentacene thin layer, and the effects of inserted Lewis-acid thin layers on electrical properties were investigated. The OFETs have active layers of pentacene and vanadium pentoxide (V{sub 2}O{sub 5}) as a Lewis-acid layer. Typical source-drain current (I{sub DS}) vs. source-drain voltage (V{sub DS}) curves were observed under negative gate voltages (V{sub G}S) application, and the shift of the threshold voltage for FET driving (V{sub t}) to positive side was also observed by V{sub 2}O{sub 5} layer insertion, that is, -2.5 V for device with V{sub 2}O{sub 5} layer and -5.7 V for devicemore » without V{sub 2}O{sub 5} layer. It was thought that charge transfer (CT) complexes which were formed at the interface between pentacene and V{sub 2}O{sub 5} layer were dissociated by the applied gate voltage, and the generated holes seem to contribute to drain current and the apparent V{sub t} improvement.« less

Action potentials and ion conductances in wild-type and CALHM1-knockout type II taste cells

PubMed Central

Saung, Wint Thu; Foskett, J. Kevin

2017-01-01

Taste bud type II cells fire action potentials in response to tastants, triggering nonvesicular ATP release to gustatory neurons via voltage-gated CALHM1-associated ion channels. Whereas CALHM1 regulates mouse cortical neuron excitability, its roles in regulating type II cell excitability are unknown. In this study, we compared membrane conductances and action potentials in single identified TRPM5-GFP-expressing circumvallate papillae type II cells acutely isolated from wild-type (WT) and Calhm1 knockout (KO) mice. The activation kinetics of large voltage-gated outward currents were accelerated in cells from Calhm1 KO mice, and their associated nonselective tail currents, previously shown to be highly correlated with ATP release, were completely absent in Calhm1 KO cells, suggesting that CALHM1 contributes to all of these currents. Calhm1 deletion did not significantly alter resting membrane potential or input resistance, the amplitudes and kinetics of Na+ currents either estimated from action potentials or recorded from steady-state voltage pulses, or action potential threshold, overshoot peak, afterhyperpolarization, and firing frequency. However, Calhm1 deletion reduced the half-widths of action potentials and accelerated the deactivation kinetics of transient outward currents, suggesting that the CALHM1-associated conductance becomes activated during the repolarization phase of action potentials. NEW & NOTEWORTHY CALHM1 is an essential ion channel component of the ATP neurotransmitter release mechanism in type II taste bud cells. Its contribution to type II cell resting membrane properties and excitability is unknown. Nonselective voltage-gated currents, previously associated with ATP release, were absent in cells lacking CALHM1. Calhm1 deletion was without effects on resting membrane properties or voltage-gated Na+ and K+ channels but contributed modestly to the kinetics of action potentials. PMID:28202574

Action potentials and ion conductances in wild-type and CALHM1-knockout type II taste cells.

PubMed

Ma, Zhongming; Saung, Wint Thu; Foskett, J Kevin

2017-05-01

Taste bud type II cells fire action potentials in response to tastants, triggering nonvesicular ATP release to gustatory neurons via voltage-gated CALHM1-associated ion channels. Whereas CALHM1 regulates mouse cortical neuron excitability, its roles in regulating type II cell excitability are unknown. In this study, we compared membrane conductances and action potentials in single identified TRPM5-GFP-expressing circumvallate papillae type II cells acutely isolated from wild-type (WT) and Calhm1 knockout (KO) mice. The activation kinetics of large voltage-gated outward currents were accelerated in cells from Calhm1 KO mice, and their associated nonselective tail currents, previously shown to be highly correlated with ATP release, were completely absent in Calhm1 KO cells, suggesting that CALHM1 contributes to all of these currents. Calhm1 deletion did not significantly alter resting membrane potential or input resistance, the amplitudes and kinetics of Na + currents either estimated from action potentials or recorded from steady-state voltage pulses, or action potential threshold, overshoot peak, afterhyperpolarization, and firing frequency. However, Calhm1 deletion reduced the half-widths of action potentials and accelerated the deactivation kinetics of transient outward currents, suggesting that the CALHM1-associated conductance becomes activated during the repolarization phase of action potentials. NEW & NOTEWORTHY CALHM1 is an essential ion channel component of the ATP neurotransmitter release mechanism in type II taste bud cells. Its contribution to type II cell resting membrane properties and excitability is unknown. Nonselective voltage-gated currents, previously associated with ATP release, were absent in cells lacking CALHM1. Calhm1 deletion was without effects on resting membrane properties or voltage-gated Na + and K + channels but contributed modestly to the kinetics of action potentials. Copyright © 2017 the American Physiological Society.

Excitatory Post-Synaptic Potential Mimicked in Indium-Zinc-Oxide Synaptic Transistors Gated by Methyl Cellulose Solid Electrolyte

PubMed Central

Guo, Liqiang; Wen, Juan; Ding, Jianning; Wan, Changjin; Cheng, Guanggui

2016-01-01

The excitatory postsynaptic potential (EPSP) of biological synapses is mimicked in indium-zinc-oxide synaptic transistors gated by methyl cellulose solid electrolyte. These synaptic transistors show excellent electrical performance at an operating voltage of 0.8 V, Ion/off ratio of 2.5 × 106, and mobility of 38.4 cm2/Vs. After this device is connected to a resistance of 4 MΩ in series, it exhibits excellent characteristics as an inverter. A threshold potential of 0.3 V is achieved by changing the gate pulse amplitude, width, or number, which is analogous to biological EPSP. PMID:27924838

Anomalous bias-stress-induced unstable phenomena of InZnO thin-film transistors using Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Xu, Wangying; Dai, Mingzhi; Liang, Lingyan; Liu, Zhimin; Sun, Xilian; Wan, Qing; Cao, Hongtao

2012-05-01

InZnO thin-film transistors using high-κ Ta2O5 gate dielectric are presented and analysed. The large capacitance coupling effect of amorphous Ta2O5 results in fabricated devices with good electrical properties. However, an anomalous negative threshold voltage (Vth) shift under positive bias stress is observed. It is suggested that electron detrapping from the high-κ Ta2O5 dielectric to the gate electrode is responsible for this Vth shift, which is supported both by the logarithmical dependence of the Vth change on the duration of the bias stress and device simulation extracted trapped charges involved.

Blending effect of 6,13-bis(triisopropylsilylethynyl) pentacene-graphene composite layers for flexible thin film transistors with a polymer gate dielectric.

PubMed

Basu, Sarbani; Adriyanto, Feri; Wang, Yeong-Her

2014-02-28

Solution processible poly(4-vinylphenol) is employed as a transistor dielectric material for low cost processing on flexible substrates at low temperatures. A 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene-graphene hybrid semiconductor is drop cast to fabricate bottom-gate and bottom-contact field-effect transistor devices on flexible and glass substrates under an ambient air environment. A few layers of graphene flakes increase the area in the conduction channel, and form bridge connections between the crystalline regions of the semiconductor layer which can change the surface morphology of TIPS pentacene films. The TIPS pentacene-graphene hybrid semiconductor-based organic thin film transistors (OTFTs) cross-linked with a poly(4-vinylphenol) gate dielectric exhibit an effective field-effect mobility of 0.076 cm(2) V(-1) s(-1) and a threshold voltage of -0.7 V at V(gs) = -40 V. By contrast, typical TIPS pentacene shows four times lower mobility of 0.019 cm(2) V(-1) s(-1) and a threshold voltage of 5 V. The graphene/TIPS pentacene hybrids presented in this paper can enhance the electrical characteristics of OTFTs due to their high crystallinity, uniform large-grain distribution, and effective reduction of crystal misorientation of the organic semiconductor layer, as confirmed by x-ray diffraction spectroscopy, atomic force microscopy, and optical microscopy studies.

Energetic mapping of oxide traps in MoS2 field-effect transistors

NASA Astrophysics Data System (ADS)

Illarionov, Yury Yu; Knobloch, Theresia; Waltl, Michael; Rzepa, Gerhard; Pospischil, Andreas; Polyushkin, Dmitry K.; Furchi, Marco M.; Mueller, Thomas; Grasser, Tibor

2017-06-01

The performance of MoS2 transistors is strongly affected by charge trapping in oxide traps with very broad distributions of time constants. These defects degrade the mobility and additionally lead to the hysteresis of the gate transfer characteristics, which presents a crucial performance and reliability issue for these new technologies. Here we perform a detailed study of the hysteresis in double-gated MoS2 FETs and show that this issue is nothing else than a combination of threshold voltage shifts resulting from positive and negative bias-temperature instabilities. While these instabilities are well known from silicon devices, they are even more important in 2D devices given the considerably larger defect densities. Most importantly, the magnitudes of these threshold voltage shifts depend strongly on the density and energetic alignment of the active oxide traps. Based on this, we introduce the incremental hysteresis sweep method which allows for an accurate mapping of these defects and extract their energy distributions from simulations. By applying our method to analyze the impact of oxide traps situated in the Al2O3 top gate of several devices, we confirm its versatility. Since all 2D devices investigated so far suffer from a similar hysteresis behavior, the incremental hysteresis sweep method provides a unique and powerful way for the detailed characterization of their defect bands.

High-performance pentacene OTFT by incorporating Ti in LaON gate dielectric

NASA Astrophysics Data System (ADS)

Ma, Y. X.; Han, C. Y.; Tang, W. M.; Lai, P. T.

2017-07-01

Pentacene organic thin-film transistors (OTFT) using high-k LaTiON gate dielectric with different Ti contents are investigated. The LaxTi(1-x)ON films (with x = 1, 0.87, 0.76, and 0.67) are deposited by reactive sputtering followed by an annealing in N2 at 200 °C. The OTFT with La0.87Ti0.13ON can achieve a high carrier mobility of 2.6 cm2/V.s, a small threshold voltage of -1.5 V, a small sub-threshold swing of 0.07 V/dec, and a small hysteresis of 0.17 V. AFM and X-ray photoelectron spectroscopy reveal that Ti can suppress the hygroscopicity of La oxide to achieve a smoother dielectric surface, which can result in larger pentacene grains and thus higher carrier mobility. All the devices show a clockwise hysteresis because both the LaOH formation and Ti incorporation can generate acceptor-like traps in the gate dielectric.

Growth of IZO/IGZO dual-active-layer for low-voltage-drive and high-mobility thin film transistors based on an ALD grown Al2O3 gate insulator

NASA Astrophysics Data System (ADS)

Ding, Xingwei; Zhang, Hao; Ding, He; Zhang, Jianhua; Huang, Chuanxin; Shi, Weimin; Li, Jun; Jiang, Xueyin; Zhang, Zhilin

2014-12-01

We successfully integrated the high-performance oxide thin film transistors with novel IZO/IGZO dual-active-layers. The results showed that dual-active-layer (IZO/IGZO) TFTs, compared with single active layer IGZO TFTs and IZO TFTs, exhibited the excellent performances; specifically, a high field effect mobility of 14.4 cm2/Vs, a suitable threshold voltage of 0.8 V, a high on/off ratio of more than 107, a steep sub-threshold swing of 0.13 V/dec, and a substantially small threshold voltage shift of 0.51 V after temperature stress from 293 K to 353 K. In order to understand the superior performance, the density-of-states (DOS) were investigated based on the temperature-dependent transfer curves. The superior electric properties were attributed to the smaller DOS and higher carrier concentration. The proposed IZO/IGZO-TFT in this paper can be used as driving devices in the next-generation flat panel displays.

Wide memory window in graphene oxide charge storage nodes

NASA Astrophysics Data System (ADS)

Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping

2010-04-01

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

Scaling behavior of fully spin-coated TFT

NASA Astrophysics Data System (ADS)

Mondal, Sandip; Kumar, Arvind; Rao, K. S. R. Koteswara; Venkataraman, V.

2017-05-01

We studied channel scaling behavior of fully spin coated, low temperature solution processed thin film transistor (TFT) fabricated on p++ - Si (˜1021 cm-3) as bottom gate. The solution processed, spin coated 40 nm thick amorphous Indium Gallium Zinc Oxide (a-IGZO) and 50 nm thick amorphous zirconium di-oxide (a-ZrO2) has been used as channel and low leakage dielectric at 350°C respectively. The channel scaling effect of the TFT with different width/length ratio (W/L= 2.5, 5 and 15) for same channel length (L = 10 μm) has been demonstrated. The lowest threshold voltage (Vth) is 6.25 V for the W/L=50/10. The maximum field effect mobility (μFE) has been found to be 0.123 cm2/Vs from W/L of 50/10 with the drain to source voltage (VD) of 10V and 20V gate to source voltage (VG). We also demonstrated that there is no contact resistance effect on the mobility of the fully sol-gel spin coated TFT.

High-performance, low-operating voltage, and solution-processable organic field-effect transistor with silk fibroin as the gate dielectric

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shi, Leilei; Xu, Xinjun, E-mail: xuxj@mater.ustb.edu.cn, E-mail: lidong@mater.ustb.edu.cn; Ma, Mingchao

2014-01-13

We report the use of silk fibroin as the gate dielectric material in solution-processed organic field-effect transistors (OFETs) with poly(3-hexylthiophene) (P3HT) as the semiconducting layer. Such OFETs exhibit a low threshold of −0.77 V and a low-operating voltage (0 to −3 V) compatible with the voltage level commonly-used in current electronic industry. The carrier mobility of such OFETs is as high as 0.21 cm{sup 2} V{sup −1} s{sup −1} in the saturation regime, comparable to the best value of P3HT-based OFETs with dielectric layer that is not solution-processed. The high-performance of this kind of OFET is related with the high contentmore » of β strands in fibroin dielectric which leads to an array of fibers in a highly ordered structure, thus reducing the trapping sites at the semiconductor/dielectric interface.« less

Distinct pH regulation of slow and rapid anion channels at the plasma membrane of Arabidopsis thaliana hypocotyl cells.

PubMed

Colcombet, Jean; Lelièvre, Françoise; Thomine, Sébastien; Barbier-Brygoo, Hélène; Frachisse, Jean-Marie

2005-07-01

Variations in both intracellular and extracellular pH are known to be involved in a wealth of physiological responses. Using the patch-clamp technique on Arabidopsis hypocotyl cells, it is shown that rapid-type and slow-type anion channels at the plasma membrane are both regulated by pH via distinct mechanisms. Modifications of pH modulate the voltage-dependent gating of the rapid channel. While intracellular alkalinization facilitates channel activation by shifting the voltage gate towards negative potentials, extracellular alkalinization shifts the activation threshold to more positive potentials, away from physiological resting membrane potentials. By contrast, pH modulates slow anion channel activity in a voltage-independent manner. Intracellular acidification and extracellular alkalinization increase slow anion channel currents. The possible role of these distinct modulations in physiological processes involving anion efflux and modulation of extracellular and/or intracellular pH, such as elicitor and ABA signalling, are discussed.

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Kim, Hyeongnam; Nath, Digbijoy; Rajan, Siddharth; Lu, Wu

2013-01-01

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/ p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al0.2Ga0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al0.3Ga0.7N/GaN channel/Al0.2Ga0.8N/ p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80- μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al0.3GaN0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.

Electrical Characterization of Semiconductor and Dielectric Materials with a Non-Damaging FastGateTM Probe

NASA Astrophysics Data System (ADS)

Robert, Hillard; William, Howland; Bryan, Snyder

2002-03-01

Determination of the electrical properties of semiconductor materials and dielectrics is highly desirable since these correlate best to final device performance. The properties of SiO2 and high k dielectrics such as Equivalent Oxide Thickness(EOT), Interface Trap Density(Dit), Oxide Effective Charge(Neff), Flatband Voltage Hysteresis(Delta Vfb), Threshold Voltage(VT) and, bulk properties such as carrier density profile and channel dose are all important parameters that require monitoring during front end processing. Conventional methods for determining these parameters involve the manufacturing of polysilicon or metal gate MOS capacitors and subsequent measurements of capacitance-voltage(CV) and/or current-voltage(IV). These conventional techniques are time consuming and can introduce changes to the materials being monitored. Also, equivalent circuit effects resulting from excessive leakage current, series resistance and stray inductance can introduce large errors in the measured results. In this paper, a new method is discussed that provides rapid determination of these critical parameters and is robust against equivalent circuit errors. This technique uses a small diameter(30 micron), elastically deformed probe to form a gate for MOSCAP CV and IV and can be used to measure either monitor wafers or test areas within scribe lines on product wafers. It allows for measurements of dielectrics thinner than 10 Angstroms. A detailed description and applications such as high k dielectrics, will be presented.

Current-voltage characteristics in organic field-effect transistors. Effect of interface dipoles

NASA Astrophysics Data System (ADS)

Sworakowski, Juliusz

2015-07-01

The role of polar molecules present at dielectric/semiconductor interfaces of organic field-effect transistors (OFETs) has been assessed employing the electrostatic model put forward in a recently published paper (Sworakowski et al., 2014). The interface dipoles create dipolar traps in the surface region of the semiconductor, their depths decreasing with the distance from the interface. This feature results in appearance of mobility gradients in the direction perpendicular to the dielectric/semiconductor interface, manifesting themselves in modification of the shapes of current-voltage characteristics. The effect may account for differences in carrier mobilities determined from the same experimental data using methods scanning different ranges of channel thicknesses (e.g., transconductances vs. transfer characteristics), differences between turn-on voltages and threshold voltages, and gate voltage dependence of mobility.

Zinc Oxide Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Fortunato, E.; Barquinha, P.; Pimentel, A.; Gonçalves, A.; Marques, A.; Pereira, L.; Martins, R.

ZnO thin film transistors (ZnO-TFT) have been fabricated by rf magnetron sputtering at room temperature with a bottom-gate configuration. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 21 V, a field effect mobility of 20 cm2/Vs, a gate voltage swing of 1.24 V/decade and an on/off ratio of 2×105. The ZnO-TFT present an average optical transmission (including the glass substrate) of 80 % in the visible part of the spectrum. The combination of transparency, high channel mobility and room temperature processing makes the ZnO-TFT a very promising low cost optoelectronic device for the next generation of invisible and flexible electronics. Moreover, the processing technology used to fabricate this device is relatively simple and it is compatible with inexpensive plastic/flexible substrate technology.

Dependence of electrical and time stress in organic field effect transistor with low temperature forming gas treated Al2O3 gate dielectrics.

PubMed

Lee, Sunwoo; Chung, Keum Jee; Park, In-Sung; Ahn, Jinho

2009-12-01

We report the characteristics of the organic field effect transistor (OFET) after electrical and time stress. Aluminum oxide (Al2O3) was used as a gate dielectric layer. The surface of the gate oxide layer was treated with hydrogen (H2) and nitrogen (N2) mixed gas to minimize the dangling bond at the interface layer of gate oxide. According to the two stress parameters of electrical and time stress, threshold voltage shift was observed. In particular, the mobility and subthreshold swing of OFET were significantly decreased due to hole carrier localization and degradation of the channel layer between gate oxide and pentacene by electrical stress. Electrical stress is a more critical factor in the degradation of mobility than time stress caused by H2O and O2 in the air.

Gate line edge roughness amplitude and frequency variation effects on intra die MOS device characteristics

NASA Astrophysics Data System (ADS)

Hamadeh, Emad; Gunther, Norman G.; Niemann, Darrell; Rahman, Mahmud

2006-06-01

Random fluctuations in fabrication process outcomes such as gate line edge roughness (LER) give rise to corresponding fluctuations in scaled down MOS device characteristics. A thermodynamic-variational model is presented to study the effects of LER on threshold voltage and capacitance of sub-50 nm MOS devices. Conceptually, we treat the geometric definition of the MOS devices on a die as consisting of a collection of gates. In turn, each of these gates has an area, A, and a perimeter, P, defined by nominally straight lines subject to random process outcomes producing roughness. We treat roughness as being deviations from straightness consisting of both transverse amplitude and longitudinal wavelength each having lognormal distribution. We obtain closed-form expressions for variance of threshold voltage ( Vth), and device capacitance ( C) at Onset of Strong Inversion (OSI) for a small device. Using our variational model, we characterized the device electrical properties such as σ and σC in terms of the statistical parameters of the roughness amplitude and spatial frequency, i.e., inverse roughness wavelength. We then verified our model with numerical analysis of Vth roll-off for small devices and σ due to dopant fluctuation. Our model was also benchmarked against TCAD of σ as a function of LER. We then extended our analysis to predict variations in σ and σC versus average LER spatial frequency and amplitude, and oxide-thickness. Given the intuitive expectation that LER of very short wavelengths must also have small amplitude, we have investigated the case in which the amplitude mean is inversely related to the frequency mean. We compare with the situation in which amplitude and frequency mean are unrelated. Given also that the gate perimeter may consist of different LER signature for each side, we have extended our analysis to the case when the LER statistical difference between gate sides is moderate, as well as when it is significantly large.

Through thick and thin: tuning the threshold voltage in organic field-effect transistors.

PubMed

Martínez Hardigree, Josué F; Katz, Howard E

2014-04-15

Organic semiconductors (OSCs) constitute a class of organic materials containing densely packed, overlapping conjugated molecular moieties that enable charge carrier transport. Their unique optical, electrical, and magnetic properties have been investigated for use in next-generation electronic devices, from roll-up displays and radiofrequency identification (RFID) to biological sensors. The organic field-effect transistor (OFET) is the key active element for many of these applications, but the high values, poor definition, and long-term instability of the threshold voltage (V(T)) in OFETs remain barriers to realization of their full potential because the power and control circuitry necessary to compensate for overvoltages and drifting set points decrease OFET practicality. The drifting phenomenon has been widely observed and generally termed "bias stress." Research on the mechanisms responsible for this poor V(T) control has revealed a strong dependence on the physical order and chemical makeup of the interfaces between OSCs and adjacent materials in the OFET architecture. In this Account, we review the state of the art for tuning OFET performance via chemical designs and physical processes that manipulate V(T). This parameter gets to the heart of OFET operation, as it determines the voltage regimes where OFETs are either ON or OFF, the basis for the logical function of the devices. One obvious way to decrease the magnitude and variability of V(T) is to work with thinner and higher permittivity gate dielectrics. From the perspective of interfacial engineering, we evaluate various methods that we and others have developed, from electrostatic poling of gate dielectrics to molecular design of substituted alkyl chains. Corona charging of dielectric surfaces, a method for charging the surface of an insulating material using a constant high-voltage field, is a brute force means of shifting the effective gate voltage applied to a gate dielectric. A gentler and more direct method is to apply surface voltage to dielectric interfaces by direct contact or postprocess biasing; these methods could also be adapted for high throughput printing sequences. Dielectric hydrophobicity is an important chemical property determining the stability of the surface charges. Functional organic monolayers applied to dielectrics, using the surface attachment chemistry made available from "self-assembled" monolayer chemistry, provide local electric fields without any biasing process at all. To the extent that the monolayer molecules can be printed, these are also suitable for high throughput processes. Finally, we briefly consider V(T) control in the context of device integration and reliability, such as the role of contact resistance in affecting this parameter.

Analytical model for the threshold voltage of III-V nanowire transistors including quantum effects

NASA Astrophysics Data System (ADS)

Marin, E. G.; Ruiz, F. G.; Tienda-Luna, I. M.; Godoy, A.; Gámiz, F.

2014-02-01

In this work we propose an analytical model for the threshold voltage (VT) of III-V cylindrical nanowires, that takes into consideration the two dimensional quantum confinement of the carriers, the Fermi-Dirac statistics, the wave-function penetration into the gate insulator and the non-parabolicity of the conduction band structure. A simple expression for VT is obtained assuming some suitable approximations. The model results are compared to those of a 2D self consistent Schrödinger-Poisson solver, demonstrating a good fit for different III-V materials, insulator thicknesses and nanowire sizes with diameter down to 5 nm. The VT dependence on the confinement effective mass is discussed. The different contributions to VT are analyzed showing significant variations among different III-V materials.

Modeling and analysis of sub-surface leakage current in nano-MOSFET under cutoff regime

NASA Astrophysics Data System (ADS)

Swami, Yashu; Rai, Sanjeev

2017-02-01

The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in nano-MOSFET circuits as threshold voltage, channel length, and gate oxide thickness are scaled down to nano-meter range. Precise leakage current valuation and meticulous modeling of the same at nano-meter technology scale is an increasingly a critical work in designing the low power nano-MOSFET circuits. We present a specific compact model for sub-threshold regime leakage current in bulk driven nano-MOSFETs. The proposed logical model is instigated and executed into the latest updated PTM bulk nano-MOSFET model and is found to be in decent accord with technology-CAD simulation data. This paper also reviews various transistor intrinsic leakage mechanisms for nano-MOSFET exclusively in weak inversion, like drain-induced barricade lowering (DIBL), gate-induced drain leakage (GIDL), gate oxide tunneling (GOT) leakage etc. The root cause of the sub-surface leakage current is mainly due to the nano-scale short channel length causing source-drain coupling even in sub-threshold domain. Consequences leading to carriers triumphing the barricade between the source and drain. The enhanced model effectively considers the following parameter dependence in the account for better-quality value-added results like drain-to-source bias (VDS), gate-to-source bias (VGS), channel length (LG), source/drain junction depth (Xj), bulk doping concentration (NBULK), and operating temperature (Top).

Event-driven charge-coupled device design and applications therefor

NASA Technical Reports Server (NTRS)

Doty, John P. (Inventor); Ricker, Jr., George R. (Inventor); Burke, Barry E. (Inventor); Prigozhin, Gregory Y. (Inventor)

2005-01-01

An event-driven X-ray CCD imager device uses a floating-gate amplifier or other non-destructive readout device to non-destructively sense a charge level in a charge packet associated with a pixel. The output of the floating-gate amplifier is used to identify each pixel that has a charge level above a predetermined threshold. If the charge level is above a predetermined threshold the charge in the triggering charge packet and in the charge packets from neighboring pixels need to be measured accurately. A charge delay register is included in the event-driven X-ray CCD imager device to enable recovery of the charge packets from neighboring pixels for accurate measurement. When a charge packet reaches the end of the charge delay register, control logic either dumps the charge packet, or steers the charge packet to a charge FIFO to preserve it if the charge packet is determined to be a packet that needs accurate measurement. A floating-diffusion amplifier or other low-noise output stage device, which converts charge level to a voltage level with high precision, provides final measurement of the charge packets. The voltage level is eventually digitized by a high linearity ADC.

A novel double gate MOSFET by symmetrical insulator packets with improved short channel effects

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2018-03-01

In this article, we study a novel double-gate SOI MOSFET structure incorporating insulator packets (IPs) at the junction between channel and source/drain (S/D) ends. The proposed MOSFET has great strength in inhibiting short channel effects and OFF-state current that are the main problems compared with conventional one due to the significant suppressed penetrations of both the lateral electric field and the carrier diffusion from the S/D into the channel. Improvement of the hot electron reliability, the ON to OFF drain current ratio, drain-induced barrier lowering, gate-induced drain leakage and threshold voltage over conventional double-gate SOI MOSFETs, i.e. without IPs, is displayed with the simulation results. This study is believed to improve the CMOS device reliability and is suitable for the low-power very-large-scale integration circuits.

An ionic liquid-gated polymer thin film transistor with exceptionally low "on" resistance

NASA Astrophysics Data System (ADS)

Algarni, Saud A.; Althagafi, Talal M.; Smith, Patrick J.; Grell, Martin

2014-05-01

We report the ionic liquid (IL) gating of a solution processed semiconducting polymer, poly(2,5-bis(3-hexadecylthiophen-2-yl)thieno[3,2-b]thiophene) (PBTTT). IL gating relies on the poor solubility of PBTTT, which requires hot chlorinated benzenes for solution processing. PBTTT, thus, resists dissolution even in IL, which otherwise rapidly dissolves semiconducting polymers. The resulting organic thin film transistors (OTFTs) display low threshold, very high carrier mobility (>3 cm2/Vs), and deliver high currents (in the order of 1 mA) at low operational voltages. Such OTFTs are interesting both practically, for the addressing of current-driven devices (e.g., organic LEDs), and for the study of charge transport in semiconducting polymers at very high carrier density.

Nitrogen anion doping as a strategy to suppress negative gate-bias illumination instability of ZnSnO thin film transistor

NASA Astrophysics Data System (ADS)

Li, Jun; Fu, Yi-Zhou; Huang, Chuan-Xin; Zhang, Jian-Hua; Jiang, Xue-Yin; Zhang, Zhi-Lin

2016-04-01

This work presents a strategy of nitrogen anion doping to suppress negative gate-bias illumination instability. The electrical performance and negative gate-bias illumination stability of the ZnSnON thin film transistors (TFTs) are investigated. Compared with ZnSnO-TFT, ZnSnON-TFT has a 53% decrease in the threshold voltage shift under negative bias illumination stress and electrical performance also progresses obviously. The stability improvement of ZnSnON-TFT is attributed to the reduction in ionized oxygen vacancy defects and the photodesorption of oxygen-related molecules. It suggests that anion doping can provide an effective solution to the adverse tradeoff between field effect mobility and negative bias illumination stability.

Dynamics of action potential initiation in the GABAergic thalamic reticular nucleus in vivo.

PubMed

Muñoz, Fabián; Fuentealba, Pablo

2012-01-01

Understanding the neural mechanisms of action potential generation is critical to establish the way neural circuits generate and coordinate activity. Accordingly, we investigated the dynamics of action potential initiation in the GABAergic thalamic reticular nucleus (TRN) using in vivo intracellular recordings in cats in order to preserve anatomically-intact axo-dendritic distributions and naturally-occurring spatiotemporal patterns of synaptic activity in this structure that regulates the thalamic relay to neocortex. We found a wide operational range of voltage thresholds for action potentials, mostly due to intrinsic voltage-gated conductances and not synaptic activity driven by network oscillations. Varying levels of synchronous synaptic inputs produced fast rates of membrane potential depolarization preceding the action potential onset that were associated with lower thresholds and increased excitability, consistent with TRN neurons performing as coincidence detectors. On the other hand the presence of action potentials preceding any given spike was associated with more depolarized thresholds. The phase-plane trajectory of the action potential showed somato-dendritic propagation, but no obvious axon initial segment component, prominent in other neuronal classes and allegedly responsible for the high onset speed. Overall, our results suggest that TRN neurons could flexibly integrate synaptic inputs to discharge action potentials over wide voltage ranges, and perform as coincidence detectors and temporal integrators, supported by a dynamic action potential threshold.

Improved performance of nanoscale junctionless tunnel field-effect transistor based on gate engineering approach

NASA Astrophysics Data System (ADS)

Molaei Imen Abadi, Rouzbeh; Sedigh Ziabari, Seyed Ali

2016-11-01

In this paper, a first qualitative study on the performance characteristics of dual-work function gate junctionless TFET (DWG-JLTFET) on the basis of energy band profile modulation is investigated. A dual-work function gate technique is used in a JLTFET in order to create a downward band bending on the source side similar to PNPN structure. Compared with the single-work function gate junctionless TFET (SWG-JLTFET), the numerical simulation results demonstrated that the DWG-JLTFET simultaneously optimizes the ON-state current, the OFF-state leakage current, and the threshold voltage and also improves average subthreshold slope. It is illustrated that if appropriate work functions are selected for the gate materials on the source side and the drain side, the JLTFET exhibits a considerably improved performance. Furthermore, the optimization design of the tunnel gate length ( L Tun) for the proposed DWG-JLTFET is studied. All the simulations are done in Silvaco TCAD for a channel length of 20 nm using the nonlocal band-to-band tunneling (BTBT) model.

Deletion of cytosolic gating ring decreases gate and voltage sensor coupling in BK channels.

PubMed

Zhang, Guohui; Geng, Yanyan; Jin, Yakang; Shi, Jingyi; McFarland, Kelli; Magleby, Karl L; Salkoff, Lawrence; Cui, Jianmin

2017-03-06

Large conductance Ca 2+ -activated K + channels (BK channels) gate open in response to both membrane voltage and intracellular Ca 2+ The channel is formed by a central pore-gate domain (PGD), which spans the membrane, plus transmembrane voltage sensors and a cytoplasmic gating ring that acts as a Ca 2+ sensor. How these voltage and Ca 2+ sensors influence the common activation gate, and interact with each other, is unclear. A previous study showed that a BK channel core lacking the entire cytoplasmic gating ring (Core-MT) was devoid of Ca 2+ activation but retained voltage sensitivity (Budelli et al. 2013. Proc. Natl. Acad. Sci. USA http://dx.doi.org/10.1073/pnas.1313433110). In this study, we measure voltage sensor activation and pore opening in this Core-MT channel over a wide range of voltages. We record gating currents and find that voltage sensor activation in this truncated channel is similar to WT but that the coupling between voltage sensor activation and gating of the pore is reduced. These results suggest that the gating ring, in addition to being the Ca 2+ sensor, enhances the effective coupling between voltage sensors and the PGD. We also find that removal of the gating ring alters modulation of the channels by the BK channel's β1 and β2 subunits. © 2017 Zhang et al.

Deletion of cytosolic gating ring decreases gate and voltage sensor coupling in BK channels

PubMed Central

Zhang, Guohui; Shi, Jingyi; McFarland, Kelli; Magleby, Karl L.; Salkoff, Lawrence

2017-01-01

Large conductance Ca2+-activated K+ channels (BK channels) gate open in response to both membrane voltage and intracellular Ca2+. The channel is formed by a central pore-gate domain (PGD), which spans the membrane, plus transmembrane voltage sensors and a cytoplasmic gating ring that acts as a Ca2+ sensor. How these voltage and Ca2+ sensors influence the common activation gate, and interact with each other, is unclear. A previous study showed that a BK channel core lacking the entire cytoplasmic gating ring (Core-MT) was devoid of Ca2+ activation but retained voltage sensitivity (Budelli et al. 2013. Proc. Natl. Acad. Sci. USA. http://dx.doi.org/10.1073/pnas.1313433110). In this study, we measure voltage sensor activation and pore opening in this Core-MT channel over a wide range of voltages. We record gating currents and find that voltage sensor activation in this truncated channel is similar to WT but that the coupling between voltage sensor activation and gating of the pore is reduced. These results suggest that the gating ring, in addition to being the Ca2+ sensor, enhances the effective coupling between voltage sensors and the PGD. We also find that removal of the gating ring alters modulation of the channels by the BK channel’s β1 and β2 subunits. PMID:28196879

High performance n-channel thin-film transistors with an amorphous phase C60 film on plastic substrate

NASA Astrophysics Data System (ADS)

Na, Jong H.; Kitamura, M.; Arakawa, Y.

2007-11-01

We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.

Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

NASA Astrophysics Data System (ADS)

Ashenafi, Emeshaw

Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse-with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon-on-ferroelectric-insulator field effect transistor (SOFFET). In both of the designs, the ability to control the threshold voltage via bias voltage at the back gate makes both devices more flexible for sleep transistors design than a bulk MOSFET. The proposed approaches simplify the design complexity, reduce the chip area, eliminate the voltage drop by sleep transistor, and improve power dissipation. In addition, the design provides a dynamically controlled Vt for times when the circuit needs to be in a sleep or switching mode.

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains

PubMed Central

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de la Peña, Pilar; Tomczak, Adam P.; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A.

2015-01-01

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4–S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4–S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules. PMID:25818916

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains.

PubMed

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de la Peña, Pilar; Tomczak, Adam P; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A

2015-03-30

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4-S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4-S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules.

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains

NASA Astrophysics Data System (ADS)

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de La Peña, Pilar; Tomczak, Adam P.; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A.

2015-03-01

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4-S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4-S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules.

Modulation of voltage-gated channel currents by harmaline and harmane.

PubMed

Splettstoesser, Frank; Bonnet, Udo; Wiemann, Martin; Bingmann, Dieter; Büsselberg, Dietrich

2005-01-01

Harmala alkaloids are endogenous substances, which are involved in neurodegenerative disorders such as M. Parkinson, but some of them also have neuroprotective effects in the nervous system. While several sites of action at the cellular level (e.g. benzodiazepine receptors, 5-HT and GABA(A) receptors) have been identified, there is no report on how harmala alkaloids interact with voltage-gated membrane channels. The aim of this study was to investigate the effects of harmaline and harmane on voltage-activated calcium- (I(Ca(V))), sodium- (I(Na(V))) and potassium (I(K(V)))-channel currents, using the whole-cell patch-clamp method with cultured dorsal root ganglion neurones of 3-week-old rats. Currents were elicited by voltage steps from the holding potential to different command potentials. Harmaline and harmane reduced I(Ca(V)), I(Na(V)) and I(K(V)) concentration-dependent (10-500 microM) over the voltage range tested. I(Ca(V)) was reduced with an IC(50) of 100.6 microM for harmaline and by a significantly lower concentration of 75.8 microM (P<0.001, t-test) for harmane. The Hill coefficient was close to 1. Threshold concentration was around 10 microM for both substances. The steady state of inhibition of I(Ca(V)) by harmaline or harmane was reached within several minutes. The action was not use-dependent and at least partly reversible. It was mainly due to a reduction in the sustained calcium channel current (I(Ca(L+N))), while the transient voltage-gated calcium channel current (I(Ca(T))) was only partially affected. We conclude that harmaline and harmane are modulators of I(Ca(V)) in vitro. This might be related to their neuroprotective effects.

Modulation of voltage-gated channel currents by harmaline and harmane

PubMed Central

Splettstoesser, Frank; Bonnet, Udo; Wiemann, Martin; Bingmann, Dieter; Büsselberg, Dietrich

2004-01-01

Harmala alkaloids are endogenous substances, which are involved in neurodegenerative disorders such as M. Parkinson, but some of them also have neuroprotective effects in the nervous system. While several sites of action at the cellular level (e.g. benzodiazepine receptors, 5-HT and GABAA receptors) have been identified, there is no report on how harmala alkaloids interact with voltage-gated membrane channels. The aim of this study was to investigate the effects of harmaline and harmane on voltage-activated calcium- (ICa(V)), sodium- (INa(V)) and potassium (IK(V))-channel currents, using the whole-cell patch-clamp method with cultured dorsal root ganglion neurones of 3-week-old rats. Currents were elicited by voltage steps from the holding potential to different command potentials. Harmaline and harmane reduced ICa(V), INa(V) and IK(V) concentration-dependent (10–500 μM) over the voltage range tested. ICa(V) was reduced with an IC50 of 100.6 μM for harmaline and by a significantly lower concentration of 75.8 μM (P<0.001, t-test) for harmane. The Hill coefficient was close to 1. Threshold concentration was around 10 μM for both substances. The steady state of inhibition of ICa(V) by harmaline or harmane was reached within several minutes. The action was not use dependent and at least partly reversible. It was mainly due to a reduction in the sustained calcium channel current (ICa(L+N)), while the transient voltage-gated calcium channel current (ICa(T)) was only partially affected. We conclude that harmaline and harmane are modulators of ICa(V) in vitro. This might be related to their neuroprotective effects. PMID:15644868

Solution-processable alumina: PVP nanocomposite dielectric layer for high-performance organic thin-film transistors

NASA Astrophysics Data System (ADS)

Lin, Hui; Kong, Xiao; Li, Yiran; Kuang, Peng; Tao, Silu

2018-03-01

In this article, we have investigated the effect of nanocomposite gate dielectric layer built by alumina (Al2O3) and poly(4-vinyphenol) (PVP) with solution method which could enhance the dielectric capability and decrease the surface polarity. Then, we used modify layer to optimize the surface morphology of dielectric layer to further improve the insulation capability, and finally we fabricated the high-performance and low-voltage organic thin-film transistors by using this nanocomposite dielectric layer. The result shows that the devices with Al2O3:10%PVP dielectric layer with a modified layer exhibited a mobility of 0.49 cm2/Vs, I on/Ioff ratio of 7.8 × 104, threshold voltage of - 1.2 V, sub-threshold swing of 0.3 V/dec, and operating voltage as low as - 4 V. The improvement of devices performance was owing to the good insulation capability, appropriate capacitance of dielectric layer, and preferable interface contact, smaller crystalline size of active layer.

Effect of substrate thinning on the electronic transport characteristics of AlGaN/GaN HEMTs

NASA Astrophysics Data System (ADS)

Zhu, Hui; Meng, Xiao; Zheng, Xiang; Yang, Ying; Feng, Shiwei; Zhang, Yamin; Guo, Chunsheng

2018-07-01

We studied how substrate thinning affected the electronic transport characteristics of AlGaN/GaN HEMTs. By thinning their sapphire substrate from 460 μm to 80 μm, we varied the residual stress in these HEMTs. The thinned sample showed decreased drain-source current and occurrence of kink effect. Furthermore, shown by current transient measurements and time constant analysis, the detrapping behaviors of trap states shifted toward a larger time constant, and the detrapping behavior under the gate and in the gate-drain access region showed increased amplitude. By using pulsed current-voltage measurements, the thinned sample showed a positive shift of the threshold voltage, a decrease in peak transconductance, and an aggravation in current collapse, as compared with the thick one. The degradation of electrical behavior were associated with the structural degradation, as confirmed by the increase of pit density on the thinned sample surface.

Gate voltage dependent 1/f noise variance model based on physical noise generation mechanisms in n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Arai, Yukiko; Aoki, Hitoshi; Abe, Fumitaka; Todoroki, Shunichiro; Khatami, Ramin; Kazumi, Masaki; Totsuka, Takuya; Wang, Taifeng; Kobayashi, Haruo

2015-04-01

1/f noise is one of the most important characteristics for designing analog/RF circuits including operational amplifiers and oscillators. We have analyzed and developed a novel 1/f noise model in the strong inversion, saturation, and sub-threshold regions based on SPICE2 type model used in any public metal-oxide-semiconductor field-effect transistor (MOSFET) models developed by the University of California, Berkeley. Our model contains two noise generation mechanisms that are mobility and interface trap number fluctuations. Noise variability dependent on gate voltage is also newly implemented in our model. The proposed model has been implemented in BSIM4 model of a SPICE3 compatible circuit simulator. Parameters of the proposed model are extracted with 1/f noise measurements for simulation verifications. The simulation results show excellent agreements between measurement and simulations.

Graphene barristor, a triode device with a gate-controlled Schottky barrier.

PubMed

Yang, Heejun; Heo, Jinseong; Park, Seongjun; Song, Hyun Jae; Seo, David H; Byun, Kyung-Eun; Kim, Philip; Yoo, InKyeong; Chung, Hyun-Jong; Kim, Kinam

2012-06-01

Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 10(5)) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier's height to be tuned to 0.2 electron volt by adjusting graphene's work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.

Voltage Sensor Inactivation in Potassium Channels

PubMed Central

Bähring, Robert; Barghaan, Jan; Westermeier, Regina; Wollberg, Jessica

2012-01-01

In voltage-gated potassium (Kv) channels membrane depolarization causes movement of a voltage sensor domain. This conformational change of the protein is transmitted to the pore domain and eventually leads to pore opening. However, the voltage sensor domain may interact with two distinct gates in the pore domain: the activation gate (A-gate), involving the cytoplasmic S6 bundle crossing, and the pore gate (P-gate), located externally in the selectivity filter. How the voltage sensor moves and how tightly it interacts with these two gates on its way to adopt a relaxed conformation when the membrane is depolarized may critically determine the mode of Kv channel inactivation. In certain Kv channels, voltage sensor movement leads to a tight interaction with the P-gate, which may cause conformational changes that render the selectivity filter non-conductive (“P/C-type inactivation”). Other Kv channels may preferably undergo inactivation from pre-open closed-states during voltage sensor movement, because the voltage sensor temporarily uncouples from the A-gate. For this behavior, known as “preferential” closed-state inactivation, we introduce the term “A/C-type inactivation”. Mechanistically, P/C- and A/C-type inactivation represent two forms of “voltage sensor inactivation.” PMID:22654758

Nonlinear distortion analysis for single heterojunction GaAs HEMT with frequency and temperature

NASA Astrophysics Data System (ADS)

Alim, Mohammad A.; Ali, Mayahsa M.; Rezazadeh, Ali A.

2018-07-01

Nonlinearity analysis using two-tone intermodulation distortion (IMD) technique for 0.5 μm gate-length AlGaAs/GaAs based high electron mobility transistor have been investigated based on biasing conditions, input power, frequency and temperature. The outcomes indicate a significant modification on the output IMD power and as well as the minimum distortion level. The input IMD power effects the output current and subsequently the threshold voltage reduces, resulting to an increment in the output IMD power. Both frequency and temperature reduces the magnitude of the output IMDs. In addition, the threshold voltage response with temperature alters the notch point of the nonlinear output IMD’s accordingly. The aforementioned investigation will help the circuit designers to evaluate the best biasing option in terms of minimum distortion, maximum gain for future design optimizations.

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

NASA Astrophysics Data System (ADS)

Zaidi, Z. H.; Lee, K. B.; Roberts, J. W.; Guiney, I.; Qian, H.; Jiang, S.; Cheong, J. S.; Li, P.; Wallis, D. J.; Humphreys, C. J.; Chalker, P. R.; Houston, P. A.

2018-05-01

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

Anomalous threshold voltage change by 2 MeV electron irradiation at 100 °C in deep submicron metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Hayama, K.; Ohyama, H.; Simoen, E.; Rafí, J. M.; Mercha, A.; Claeys, C.

2004-04-01

The degradation of the electrical properties of deep submicron metal-oxide-semiconductor field-effect transistors (MOSFETs) by 2 MeV electron irradiation at high temperatures was studied. The irradiation temperatures were 30, 100, 150 and 200 °C, and the fluence was fixed at 1015e/cm2. For most experimental conditions, the threshold voltage (VT) is observed to reduce in absolute value both for n- and p-MOSFETs. This reduction is most pronounced at 100 °C, as at this irradiation temperature, the radiation-induced density of interface traps is highest. It is proposed that hydrogen neutralization of the dopants in the substrate plays a key role, whereby the hydrogen is released from the gate by the 2 MeV electrons.

Voltage-Dependent Gating of hERG Potassium Channels

PubMed Central

Cheng, Yen May; Claydon, Tom W.

2012-01-01

The mechanisms by which voltage-gated channels sense changes in membrane voltage and energetically couple this with opening of the ion conducting pore has been the source of significant interest. In voltage-gated potassium (Kv) channels, much of our knowledge in this area comes from Shaker-type channels, for which voltage-dependent gating is quite rapid. In these channels, activation and deactivation are associated with rapid reconfiguration of the voltage-sensing domain unit that is electromechanically coupled, via the S4–S5 linker helix, to the rate-limiting opening of an intracellular pore gate. However, fast voltage-dependent gating kinetics are not typical of all Kv channels, such as Kv11.1 (human ether-à-go-go related gene, hERG), which activates and deactivates very slowly. Compared to Shaker channels, our understanding of the mechanisms underlying slow hERG gating is much poorer. Here, we present a comparative review of the structure–function relationships underlying activation and deactivation gating in Shaker and hERG channels, with a focus on the roles of the voltage-sensing domain and the S4–S5 linker that couples voltage sensor movements to the pore. Measurements of gating current kinetics and fluorimetric analysis of voltage sensor movement are consistent with models suggesting that the hERG activation pathway contains a voltage independent step, which limits voltage sensor transitions. Constraints upon hERG voltage sensor movement may result from loose packing of the S4 helices and additional intra-voltage sensor counter-charge interactions. More recent data suggest that key amino acid differences in the hERG voltage-sensing unit and S4–S5 linker, relative to fast activating Shaker-type Kv channels, may also contribute to the increased stability of the resting state of the voltage sensor. PMID:22586397

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

NASA Astrophysics Data System (ADS)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

High-Performance Flexible Single-Crystalline Silicon Nanomembrane Thin-Film Transistors with High- k Nb2O5-Bi2O3-MgO Ceramics as Gate Dielectric on a Plastic Substrate.

PubMed

Qin, Guoxuan; Zhang, Yibo; Lan, Kuibo; Li, Lingxia; Ma, Jianguo; Yu, Shihui

2018-04-18

A novel method of fabricating flexible thin-film transistor based on single-crystalline Si nanomembrane (SiNM) with high- k Nb 2 O 5 -Bi 2 O 3 -MgO (BMN) ceramic gate dielectric on a plastic substrate is demonstrated in this paper. SiNMs are successfully transferred to a flexible polyethylene terephthalate substrate, which has been plated with indium-tin-oxide (ITO) conductive layer and high- k BMN ceramic gate dielectric layer by room-temperature magnetron sputtering. The BMN ceramic gate dielectric layer demonstrates as high as ∼109 dielectric constant, with only dozens of pA current leakage. The Si-BMN-ITO heterostructure has only ∼nA leakage current at the applied voltage of 3 V. The transistor is shown to work at a high current on/off ratio of above 10 4 , and the threshold voltage is ∼1.3 V, with over 200 cm 2 /(V s) effective channel electron mobility. Bending tests have been conducted and show that the flexible transistors have good tolerance on mechanical bending strains. These characteristics indicate that the flexible single-crystalline SiNM transistors with BMN ceramics as gate dielectric have great potential for applications in high-performance integrated flexible circuit.

Process dependency on threshold voltage of GaN MOSFET on AlGaN/GaN heterostructure

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Jiang, Ying; Miyashita, Takahiro; Motoyama, Shin-ichi; Li, Liuan; Wang, Dejun; Ohno, Yasuo; Ao, Jin-Ping

2014-09-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with recessed gate on AlGaN/GaN heterostructure are reported in which the drain and source ohmic contacts were fabricated on the AlGaN/GaN heterostructure and the electron channel was formed on the GaN buffer layer by removing the AlGaN barrier layer. Negative threshold voltages were commonly observed in all devices. To investigate the reasons of the negative threshold voltages, different oxide thickness, etching gas and bias power of inductively-coupled plasma (ICP) system were utilized in the fabrication process of the GaN MOSFETs. It is found that positive charges of around 1 × 1012 q/cm2 exist near the interface at the just threshold condition in both silane- and tetraethylorthosilicate (TEOS)-based devices. It is also found that the threshold voltages do not obviously change with the different etching gas (SiCl4, BCl3 and two-step etching of SiCl4/Cl2) at the same ICP bias power level (20-25 W) and will become deeper when higher bias power is used in the dry recess process which may be related to the much serious ion bombardment damage. Furthermore, X-ray photoelectron spectroscopy (XPS) experiments were done to investigate the surface conditions. It is found that N 1s peaks become lower with higher bias power of the dry etching process. Also, silicon contamination was found and could be removed by HNO3/HF solution. It indicates that the nitrogen vacancies are mainly responsible for the negative threshold voltages rather than the silicon contamination. It demonstrates that optimization of the ICP recess conditions and improvement of the surface condition are still necessary to realize enhancement-mode GaN MOSFETs on AlGaN/GaN heterostructure.

An ultra low energy biomedical signal processing system operating at near-threshold.

PubMed

Hulzink, J; Konijnenburg, M; Ashouei, M; Breeschoten, A; Berset, T; Huisken, J; Stuyt, J; de Groot, H; Barat, F; David, J; Van Ginderdeuren, J

2011-12-01

This paper presents a voltage-scalable digital signal processing system designed for the use in a wireless sensor node (WSN) for ambulatory monitoring of biomedical signals. To fulfill the requirements of ambulatory monitoring, power consumption, which directly translates to the WSN battery lifetime and size, must be kept as low as possible. The proposed processing platform is an event-driven system with resources to run applications with different degrees of complexity in an energy-aware way. The architecture uses effective system partitioning to enable duty cycling, single instruction multiple data (SIMD) instructions, power gating, voltage scaling, multiple clock domains, multiple voltage domains, and extensive clock gating. It provides an alternative processing platform where the power and performance can be scaled to adapt to the application need. A case study on a continuous wavelet transform (CWT)-based heart-beat detection shows that the platform not only preserves the sensitivity and positive predictivity of the algorithm but also achieves the lowest energy/sample for ElectroCardioGram (ECG) heart-beat detection publicly reported today.

Total Ionizing Dose Effects in MOS Oxides and Devices

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; McLean, F. B.

2003-01-01

The development of military and space electronics technology has traditionally been heavily influenced by the commercial semiconductor industry. The development of MOS technology, and particularly CMOS technology, as dominant commercial technologies has occurred entirely within the lifetime of the NSREC. For this reason, it is not surprising that the study of radiation interactions with MOS materials, devices and circuits has been a major theme of this conference for most of its history. The basic radiation problem in a MOS transistor is illustrated. The application of an appropriate gate voltage causes a conducting channel to form between the source and drain, so that current flows when the device is turned on. In Fig. lb, the effect of ionizing radiation is illustrated. Radiation-induced trapped charge has built up in the gate oxide, which causes a shift in the threshold voltage (that is, a change in the voltage which must be applied to turn the device on). If this shift is large enough, the device cannot be turned off, even at zero volts applied, and the device is said to have failed by going depletion mode.

Determination of prospective displacement-based gate threshold for respiratory-gated radiation delivery from retrospective phase-based gate threshold selected at 4D CT simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vedam, S.; Archambault, L.; Starkschall, G.

2007-11-15

Four-dimensional (4D) computed tomography (CT) imaging has found increasing importance in the localization of tumor and surrounding normal structures throughout the respiratory cycle. Based on such tumor motion information, it is possible to identify the appropriate phase interval for respiratory gated treatment planning and delivery. Such a gating phase interval is determined retrospectively based on tumor motion from internal tumor displacement. However, respiratory-gated treatment is delivered prospectively based on motion determined predominantly from an external monitor. Therefore, the simulation gate threshold determined from the retrospective phase interval selected for gating at 4D CT simulation may not correspond to the deliverymore » gate threshold that is determined from the prospective external monitor displacement at treatment delivery. The purpose of the present work is to establish a relationship between the thresholds for respiratory gating determined at CT simulation and treatment delivery, respectively. One hundred fifty external respiratory motion traces, from 90 patients, with and without audio-visual biofeedback, are analyzed. Two respiratory phase intervals, 40%-60% and 30%-70%, are chosen for respiratory gating from the 4D CT-derived tumor motion trajectory. From residual tumor displacements within each such gating phase interval, a simulation gate threshold is defined based on (a) the average and (b) the maximum respiratory displacement within the phase interval. The duty cycle for prospective gated delivery is estimated from the proportion of external monitor displacement data points within both the selected phase interval and the simulation gate threshold. The delivery gate threshold is then determined iteratively to match the above determined duty cycle. The magnitude of the difference between such gate thresholds determined at simulation and treatment delivery is quantified in each case. Phantom motion tests yielded coincidence of simulation and delivery gate thresholds to within 0.3%. For patient data analysis, differences between simulation and delivery gate thresholds are reported as a fraction of the total respiratory motion range. For the smaller phase interval, the differences between simulation and delivery gate thresholds are 8{+-}11% and 14{+-}21% with and without audio-visual biofeedback, respectively, when the simulation gate threshold is determined based on the mean respiratory displacement within the 40%-60% gating phase interval. For the longer phase interval, corresponding differences are 4{+-}7% and 8{+-}15% with and without audio-visual biofeedback, respectively. Alternatively, when the simulation gate threshold is determined based on the maximum average respiratory displacement within the gating phase interval, greater differences between simulation and delivery gate thresholds are observed. A relationship between retrospective simulation gate threshold and prospective delivery gate threshold for respiratory gating is established and validated for regular and nonregular respiratory motion. Using this relationship, the delivery gate threshold can be reliably estimated at the time of 4D CT simulation, thereby improving the accuracy and efficiency of respiratory-gated radiation delivery.« less

Determination of prospective displacement-based gate threshold for respiratory-gated radiation delivery from retrospective phase-based gate threshold selected at 4D CT simulation.

PubMed

Vedam, S; Archambault, L; Starkschall, G; Mohan, R; Beddar, S

2007-11-01

Four-dimensional (4D) computed tomography (CT) imaging has found increasing importance in the localization of tumor and surrounding normal structures throughout the respiratory cycle. Based on such tumor motion information, it is possible to identify the appropriate phase interval for respiratory gated treatment planning and delivery. Such a gating phase interval is determined retrospectively based on tumor motion from internal tumor displacement. However, respiratory-gated treatment is delivered prospectively based on motion determined predominantly from an external monitor. Therefore, the simulation gate threshold determined from the retrospective phase interval selected for gating at 4D CT simulation may not correspond to the delivery gate threshold that is determined from the prospective external monitor displacement at treatment delivery. The purpose of the present work is to establish a relationship between the thresholds for respiratory gating determined at CT simulation and treatment delivery, respectively. One hundred fifty external respiratory motion traces, from 90 patients, with and without audio-visual biofeedback, are analyzed. Two respiratory phase intervals, 40%-60% and 30%-70%, are chosen for respiratory gating from the 4D CT-derived tumor motion trajectory. From residual tumor displacements within each such gating phase interval, a simulation gate threshold is defined based on (a) the average and (b) the maximum respiratory displacement within the phase interval. The duty cycle for prospective gated delivery is estimated from the proportion of external monitor displacement data points within both the selected phase interval and the simulation gate threshold. The delivery gate threshold is then determined iteratively to match the above determined duty cycle. The magnitude of the difference between such gate thresholds determined at simulation and treatment delivery is quantified in each case. Phantom motion tests yielded coincidence of simulation and delivery gate thresholds to within 0.3%. For patient data analysis, differences between simulation and delivery gate thresholds are reported as a fraction of the total respiratory motion range. For the smaller phase interval, the differences between simulation and delivery gate thresholds are 8 +/- 11% and 14 +/- 21% with and without audio-visual biofeedback, respectively, when the simulation gate threshold is determined based on the mean respiratory displacement within the 40%-60% gating phase interval. For the longer phase interval, corresponding differences are 4 +/- 7% and 8 +/- 15% with and without audiovisual biofeedback, respectively. Alternatively, when the simulation gate threshold is determined based on the maximum average respiratory displacement within the gating phase interval, greater differences between simulation and delivery gate thresholds are observed. A relationship between retrospective simulation gate threshold and prospective delivery gate threshold for respiratory gating is established and validated for regular and nonregular respiratory motion. Using this relationship, the delivery gate threshold can be reliably estimated at the time of 4D CT simulation, thereby improving the accuracy and efficiency of respiratory-gated radiation delivery.

Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

NASA Astrophysics Data System (ADS)

Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir

2013-11-01

This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.

Nanocomposites of polyimide and mixed oxide nanoparticles for high performance nanohybrid gate dielectrics in flexible thin film transistors

NASA Astrophysics Data System (ADS)

Kim, Ju Hyun; Hwang, Byeong-Ung; Kim, Do-Il; Kim, Jin Soo; Seol, Young Gug; Kim, Tae Woong; Lee, Nae-Eung

2017-05-01

Organic gate dielectrics in thin film transistors (TFTs) for flexible display have advantages of high flexibility yet have the disadvantage of low dielectric constant (low- k). To supplement low- k characteristics of organic gate dielectrics, an organic/inorganic nanocomposite insulator loaded with high- k inorganic oxide nanoparticles (NPs) has been investigated but high loading of high- k NPs in polymer matrix is essential. Herein, compositing of over-coated polyimide (PI) on self-assembled (SA) layer of mixed HfO2 and ZrO2 NPs as inorganic fillers was used to make dielectric constant higher and leakage characteristics lower. A flexible TFT with lower the threshold voltage and high current on/off ratio could be fabricated by using the hybrid gate dielectric structure of the nanocomposite with SA layer of mixed NPs on ultrathin atomic-layer deposited Al2O3. [Figure not available: see fulltext.

Low-voltage operation of Si-based ferroelectric field effect transistors using organic ferroelectrics, poly(vinylidene fluoride-trifluoroethylene), as a gate dielectric

NASA Astrophysics Data System (ADS)

Miyata, Yusuke; Yoshimura, Takeshi; Ashida, Atsushi; Fujimura, Norifumi

2016-04-01

Si-based metal-ferroelectric-semiconductor (MFS) capacitors have been fabricated using poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as a ferroelectric gate. The pinhole-free P(VDF-TrFE) thin films with high resistivity were able to be prepared by spin-coating directly onto hydrogen-terminated Si. The capacitance-voltage (C-V) characteristics of the ferroelectric gate field effect transistor (FeFET) using this MFS structure clearly show butterfly-shaped hysteresis originating from the ferroelectricity, indicating carrier modulation on the Si surface at gate voltages below 2 V. The drain current-gate voltage (I D-V G) characteristics also show counterclockwise hysteresis at gate voltages below 5 V. This is the first report on the low-voltage operation of a Si-based FeFET using P(VDF-TrFE) as a gate dielectric. This organic gate FeFET without any insulator layer at the ferroelectric/Si interface should be one of the promising devices for overcoming the critical issues of the FeFET, such as depolarization field and a decrease in the gate voltage.

Unusual instability mode of transparent all oxide thin film transistor under dynamic bias condition

NASA Astrophysics Data System (ADS)

Oh, Himchan; Hwang, Chi-Sun; Pi, Jae-Eun; Ki Ryu, Min; Ko Park, Sang-Hee; Yong Chu, Hye

2013-09-01

We report a degradation behavior of fully transparent oxide thin film transistor under dynamic bias stress which is the condition similar to actual pixel switching operation in active matrix display. After the stress test, drain current increased while the threshold voltage was almost unchanged. We found that shortening of effective channel length is leading cause of increase in drain current. Electrons activate the neutral donor defects by colliding with them during short gate-on period. These ionized donors are stabilized during the subsequent gate-off period due to electron depletion. This local increase in doping density reduces the channel length.

A common pathway for charge transport through voltage-sensing domains.

PubMed

Chanda, Baron; Bezanilla, Francisco

2008-02-07

Voltage-gated ion channels derive their voltage sensitivity from the movement of specific charged residues in response to a change in transmembrane potential. Several studies on mechanisms of voltage sensing in ion channels support the idea that these gating charges move through a well-defined permeation pathway. This gating pathway in a voltage-gated ion channel can also be mutated to transport free cations, including protons. The recent discovery of proton channels with sequence homology to the voltage-sensing domains suggests that evolution has perhaps exploited the same gating pathway to generate a bona fide voltage-dependent proton transporter. Here we will discuss implications of these findings on the mechanisms underlying charge (and ion) transport by voltage-sensing domains.

Molecular basis of the interaction between gating modifier spider toxins and the voltage sensor of voltage-gated ion channels

NASA Astrophysics Data System (ADS)

Lau, Carus H. Y.; King, Glenn F.; Mobli, Mehdi

2016-09-01

Voltage-sensor domains (VSDs) are modular transmembrane domains of voltage-gated ion channels that respond to changes in membrane potential by undergoing conformational changes that are coupled to gating of the ion-conducting pore. Most spider-venom peptides function as gating modifiers by binding to the VSDs of voltage-gated channels and trapping them in a closed or open state. To understand the molecular basis underlying this mode of action, we used nuclear magnetic resonance to delineate the atomic details of the interaction between the VSD of the voltage-gated potassium channel KvAP and the spider-venom peptide VSTx1. Our data reveal that the toxin interacts with residues in an aqueous cleft formed between the extracellular S1-S2 and S3-S4 loops of the VSD whilst maintaining lipid interactions in the gaps formed between the S1-S4 and S2-S3 helices. The resulting network of interactions increases the energetic barrier to the conformational changes required for channel gating, and we propose that this is the mechanism by which gating modifier toxins inhibit voltage-gated ion channels.

Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chun, Minkyu; Um, Jae Gwang; Park, Min Sang

We report the abnormal behavior of the threshold voltage (V{sub TH}) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (V{sub TG}), while bottom gate bias (V{sub BG}) is less effect than V{sub TG}. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of Inmore » metal diffusion to the top SiO{sub 2}/a-IGZO and also the existence of large amount of In{sup +} under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH{sup −} at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of V{sub TG} both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.« less

Hysteresis in voltage-gated channels.

PubMed

Villalba-Galea, Carlos A

2017-03-04

Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels.

High-mobility solution-processed copper phthalocyanine-based organic field-effect transistors.

PubMed

Chaure, Nandu B; Cammidge, Andrew N; Chambrier, Isabelle; Cook, Michael J; Cain, Markys G; Murphy, Craig E; Pal, Chandana; Ray, Asim K

2011-04-01

Solution-processed films of 1,4,8,11,15,18,22,25-octakis(hexyl) copper phthalocyanine (CuPc 6 ) were utilized as an active semiconducting layer in the fabrication of organic field-effect transistors (OFETs) in the bottom-gate configurations using chemical vapour deposited silicon dioxide (SiO 2 ) as gate dielectrics. The surface treatment of the gate dielectric with a self-assembled monolayer of octadecyltrichlorosilane (OTS) resulted in values of 4×10 -2 cm 2 V -1 s -1 and 10 6 for saturation mobility and on/off current ratio, respectively. This improvement was accompanied by a shift in the threshold voltage from 3 V for untreated devices to -2 V for OTS treated devices. The trap density at the interface between the gate dielectric and semiconductor decreased by about one order of magnitude after the surface treatment. The transistors with the OTS treated gate dielectrics were more stable over a 30-day period in air than untreated ones.

High-mobility solution-processed copper phthalocyanine-based organic field-effect transistors

PubMed Central

Chaure, Nandu B; Cammidge, Andrew N; Chambrier, Isabelle; Cook, Michael J; Cain, Markys G; Murphy, Craig E; Pal, Chandana; Ray, Asim K

2011-01-01

Solution-processed films of 1,4,8,11,15,18,22,25-octakis(hexyl) copper phthalocyanine (CuPc6) were utilized as an active semiconducting layer in the fabrication of organic field-effect transistors (OFETs) in the bottom-gate configurations using chemical vapour deposited silicon dioxide (SiO2) as gate dielectrics. The surface treatment of the gate dielectric with a self-assembled monolayer of octadecyltrichlorosilane (OTS) resulted in values of 4×10−2 cm2 V−1 s−1 and 106 for saturation mobility and on/off current ratio, respectively. This improvement was accompanied by a shift in the threshold voltage from 3 V for untreated devices to -2 V for OTS treated devices. The trap density at the interface between the gate dielectric and semiconductor decreased by about one order of magnitude after the surface treatment. The transistors with the OTS treated gate dielectrics were more stable over a 30-day period in air than untreated ones. PMID:27877383

Device optimization and scaling properties of a gate-on-germanium source tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Chattopadhyay, Avik; Mallik, Abhijit; Omura, Yasuhisa

2015-06-01

A gate-on-germanium source (GoGeS) tunnel field-effect transistor (TFET) shows great promise for low-power (sub-0.5 V) applications. A detailed investigation, with the help of a numerical device simulator, on the effects of variation in different structural parameters of a GoGeS TFET on its electrical performance is reported in this paper. Structural parameters such as κ-value of the gate dielectric, length and κ-value of the spacer, and doping concentrations of both the substrate and source are considered. A low-κ symmetric spacer and a high-κ gate dielectric are found to yield better device performance. The substrate doping influences only the p-i-n leakage floor. The source doping is found to significantly affect performance parameters such as OFF-state current, ON-state current and subthreshold swing, in addition to a threshold voltage shift. Results of the investigation on the gate length scaling of such devices are also reported in this paper.

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

NASA Astrophysics Data System (ADS)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

Transient sodium current at subthreshold voltages: activation by EPSP waveforms

PubMed Central

Carter, Brett C.; Giessel, Andrew J.; Sabatini, Bernardo L.; Bean, Bruce P.

2012-01-01

Summary Tetrodotoxin (TTX)-sensitive sodium channels carry large transient currents during action potentials and also “persistent” sodium current, a non-inactivating TTX-sensitive current present at subthreshold voltages. We examined gating of subthreshold sodium current in dissociated cerebellar Purkinje neurons and hippocampal CA1 neurons, studied at 37 °C with near-physiological ionic conditions. Unexpectedly, in both cell types small voltage steps at subthreshold voltages activated a substantial component of transient sodium current as well as persistent current. Subthreshold EPSP-like waveforms also activated a large component of transient sodium current, but IPSP-like waveforms engaged primarily persistent sodium current with only a small additional transient component. Activation of transient as well as persistent sodium current at subthreshold voltages produces amplification of EPSPs that is sensitive to the rate of depolarization and can help account for the dependence of spike threshold on depolarization rate, as previously observed in vivo. PMID:22998875

Molecular basis of ancestral vertebrate electroreception

PubMed Central

Bellono, Nicholas W.; Leitch, Duncan B.; Julius, David

2017-01-01

Elasmobranch fishes, including sharks, rays, and skates, use specialized electrosensory organs called Ampullae of Lorenzini to detect extremely small changes in environmental electric fields. Electrosensory cells within these ampullae are able to discriminate and respond to minute changes in environmental voltage gradients through an as-yet unknown mechanism. Here we show that the voltage-gated calcium channel CaV1.3 and big conductance calcium-activated potassium (BK) channel are preferentially expressed by electrosensory cells in little skate (Leucoraja erinacea) and functionally couple to mediate electrosensory cell membrane voltage oscillations, which are important in the detection of specific, weak electrical signals. Both channels exhibit unique properties compared with their mammalian orthologues to support electrosensory functions: structural adaptations in CaV1.3 mediate a low voltage threshold for activation, while alterations in BK support specifically tuned voltage oscillations. These findings reveal a molecular basis of electroreception and demonstrate how discrete evolutionary changes in ion channel structure facilitate sensory adaptation. PMID:28264196

X-Ray Lithographic Research: A Collection of NRL Contributions.

DTIC Science & Technology

1987-08-24

were studied threshold voltage I ( ,). conductance v,). conductance slope (slope of the k,, ,s gate , ,.oltage plot) and subthreshold swing factor (S...target interaction Resist Sensitivity which was sometimes present in the Technical Demonstration, would not be a factor in a dedi- cated laser system...representative irradiances are tabu- lated. Recent x-ray emission studies are cited, with commentary on the need for further mea- surement. Advances

Middle Electrode in a Vertical Transistor Structure Using an Sn Layer by Thermal Evaporation

NASA Astrophysics Data System (ADS)

Nogueira, Gabriel Leonardo; da Silva Ozório, Maiza; da Silva, Marcelo Marques; Morais, Rogério Miranda; Alves, Neri

2018-05-01

We report a process for performing the middle electrode for a vertical field effect transistor (VOFET) by the evaporation of a tin (Sn) layer. Bare aluminum oxide (Al2O3), obtained by anodization, and Al2O3 covered with a polymethylmethacrylate (PMMA) layer were used as the gate dielectric. We measured the electrical resistance of Sn while the evaporation was carried out to find the best condition to prepare the middle electrode, that is, good lateral conduction associated with openings that give permeability to the electric field in a vertical direction. This process showed that 55 nm Sn thick is suitable for use in a VOFET, being easier to achieve optimal thickness when the Sn is evaporated onto PMMA than onto bare Al2O3. The addition of a PMMA layer on the Al2O3 surface modifies the morphology of the Sn layer, resulting in a lowering of the threshold voltage. The values of threshold voltage and electric field, VTH = - 8 V and ETH = 354.5 MV/m respectively, were calculated using an Al2O3 film 20 nm thick covered with a 14 nm PMMA layer as gate dielectric, while for bare Al2O3 these values were VTH = - 10 V and ETH = 500 MV/m.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Jun; Zhang, Zhi-Lin; Key Laboratory of Advanced Display and System Applications, Ministry of Education, Shanghai University, Shanghai 200072

RF magnetron sputtered HfInZnO film and atomic layer deposition (ALD) Al{sub 2}O{sub 3} film were employed for thin film transistors (TFTs) as channel layer and gate insulator, respectively. To achieve HfInZnO-TFT with high performance and good bias stability, the thickness of HfInZnO active layer was optimized. The performance of HfInZnO-TFTs was found to be thickness dependent. As the HfInZnO active layer got thicker, the leakage current greatly increased from 1.73 × 10{sup −12} to 2.54 × 10{sup −8} A, the threshold voltage decreased from 7.4 to −4.7 V, while the subthreshold swing varied from 0.41 to 1.07 V/decade. Overall, themore » HfInZnO film showed superior performance, such as saturation mobility of 6.4 cm{sup 2}/V s, threshold voltage of 4.2 V, subthreshold swing of 0.43 V/decade, on/off current ratio of 3 × 10{sup 7} and V{sub th} shift of 3.6 V under V{sub GS}= 10 V for 7200 s. The results demonstrate the possibility of fabricating TFTs using HfInZnO film as active layer and using ALD Al{sub 2}O{sub 3} as gate insulator.« less

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

NASA Astrophysics Data System (ADS)

Afzalian, Aryan; Colinge, Jean-Pierre; Flandre, Denis

2011-05-01

A new concept of nanoscale MOSFET, the Gate Modulated Resonant Tunneling Transistor (RT-FET), is presented and modeled using 3D Non-Equilibrium Green's Function simulations enlightening the main physical mechanisms. Owing to the additional tunnel barriers and the related longitudinal confinement present in the device, the density of state is reduced in its off-state, while remaining comparable in its on-state, to that of a MOS transistor without barriers. The RT-FET thus features both a lower RT-limited off-current and a faster increase of the current with V G, i.e. an improved slope characteristic, and hence an improved Ion/ Ioff ratio. Such improvement of the slope can happen in subthreshold regime, and therefore lead to subthreshold slope below the kT/q limit. In addition, faster increase of current and improved slope occur above threshold and lead to high thermionic on-current and significant Ion/ Ioff ratio improvement, even with threshold voltage below 0.2 V and supply voltage V dd of a few hundreds of mV as critically needed for future technology nodes. Finally RT-FETs are intrinsically immune to source-drain tunneling and are therefore promising candidate for extending the roadmap below 10 nm.

Dynamics of Action Potential Initiation in the GABAergic Thalamic Reticular Nucleus In Vivo

PubMed Central

Muñoz, Fabián; Fuentealba, Pablo

2012-01-01

Understanding the neural mechanisms of action potential generation is critical to establish the way neural circuits generate and coordinate activity. Accordingly, we investigated the dynamics of action potential initiation in the GABAergic thalamic reticular nucleus (TRN) using in vivo intracellular recordings in cats in order to preserve anatomically-intact axo-dendritic distributions and naturally-occurring spatiotemporal patterns of synaptic activity in this structure that regulates the thalamic relay to neocortex. We found a wide operational range of voltage thresholds for action potentials, mostly due to intrinsic voltage-gated conductances and not synaptic activity driven by network oscillations. Varying levels of synchronous synaptic inputs produced fast rates of membrane potential depolarization preceding the action potential onset that were associated with lower thresholds and increased excitability, consistent with TRN neurons performing as coincidence detectors. On the other hand the presence of action potentials preceding any given spike was associated with more depolarized thresholds. The phase-plane trajectory of the action potential showed somato-dendritic propagation, but no obvious axon initial segment component, prominent in other neuronal classes and allegedly responsible for the high onset speed. Overall, our results suggest that TRN neurons could flexibly integrate synaptic inputs to discharge action potentials over wide voltage ranges, and perform as coincidence detectors and temporal integrators, supported by a dynamic action potential threshold. PMID:22279567

Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu Shiyang; Nakajima, Anri; Ohashi, Takuo

2005-12-01

The interface trap generation ({delta}N{sub it}) and fixed oxide charge buildup ({delta}N{sub ot}) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current-current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for {delta}N{sub it} and {delta}N{sub ot}. At the earlier stress times, {delta}N{sub it} dominates the threshold voltage shift ({delta}V{sub th}) and {delta}N{sub ot} is negligible. With increasing stress time, the rate of increase of {delta}N{sub it} decreases continuously, showing a saturating trend for longer stress times, while {delta}N{submore » ot} still has a power-law dependence on stress time so that the relative contribution of {delta}N{sub ot} increases. The thermal activation energy of {delta}N{sub it} and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.« less

Charged Residues at the First Transmembrane Region Contribute to the Voltage Dependence of the Slow Gate of Connexins.

PubMed

Pinto, Bernardo I; García, Isaac E; Pupo, Amaury; Retamal, Mauricio A; Martínez, Agustín D; Latorre, Ramón; González, Carlos

2016-07-22

Connexins (Cxs) are a family of membrane-spanning proteins that form gap junction channels and hemichannels. Connexin-based channels exhibit two distinct voltage-dependent gating mechanisms termed slow and fast gating. Residues located at the C terminus of the first transmembrane segment (TM-1) are important structural components of the slow gate. Here, we determined the role of the charged residues at the end of TM-1 in voltage sensing in Cx26, Cx46, and Cx50. Conductance/voltage curves obtained from tail currents together with kinetics analysis reveal that the fast and slow gates of Cx26 involves the movement of two and four charges across the electric field, respectively. Primary sequence alignment of different Cxs shows the presence of well conserved glutamate residues in the C terminus of TM-1; only Cx26 contains a lysine in that position (lysine 41). Neutralization of lysine 41 in Cx26 increases the voltage dependence of the slow gate. Swapping of lysine 41 with glutamate 42 maintains the voltage dependence. In Cx46, neutralization of negative charges or addition of a positive charge in the Cx26 equivalent region reduced the slow gate voltage dependence. In Cx50, the addition of a glutamate in the same region decreased the voltage dependence, and the neutralization of a negative charge increased it. These results indicate that the charges at the end of TM-1 are part of the slow gate voltage sensor in Cxs. The fact that Cx42, which has no charge in this region, still presents voltage-dependent slow gating suggests that charges still unidentified also contribute to the slow gate voltage sensitivity. © 2016 by The American Society for Biochemistry and Molecular Biology, Inc.

Charged Residues at the First Transmembrane Region Contribute to the Voltage Dependence of the Slow Gate of Connexins*

PubMed Central

Pinto, Bernardo I.; García, Isaac E.; Pupo, Amaury; Retamal, Mauricio A.; Martínez, Agustín D.; Latorre, Ramón; González, Carlos

2016-01-01

Connexins (Cxs) are a family of membrane-spanning proteins that form gap junction channels and hemichannels. Connexin-based channels exhibit two distinct voltage-dependent gating mechanisms termed slow and fast gating. Residues located at the C terminus of the first transmembrane segment (TM-1) are important structural components of the slow gate. Here, we determined the role of the charged residues at the end of TM-1 in voltage sensing in Cx26, Cx46, and Cx50. Conductance/voltage curves obtained from tail currents together with kinetics analysis reveal that the fast and slow gates of Cx26 involves the movement of two and four charges across the electric field, respectively. Primary sequence alignment of different Cxs shows the presence of well conserved glutamate residues in the C terminus of TM-1; only Cx26 contains a lysine in that position (lysine 41). Neutralization of lysine 41 in Cx26 increases the voltage dependence of the slow gate. Swapping of lysine 41 with glutamate 42 maintains the voltage dependence. In Cx46, neutralization of negative charges or addition of a positive charge in the Cx26 equivalent region reduced the slow gate voltage dependence. In Cx50, the addition of a glutamate in the same region decreased the voltage dependence, and the neutralization of a negative charge increased it. These results indicate that the charges at the end of TM-1 are part of the slow gate voltage sensor in Cxs. The fact that Cx42, which has no charge in this region, still presents voltage-dependent slow gating suggests that charges still unidentified also contribute to the slow gate voltage sensitivity. PMID:27143357

A two-qubit logic gate in silicon.

PubMed

Veldhorst, M; Yang, C H; Hwang, J C C; Huang, W; Dehollain, J P; Muhonen, J T; Simmons, S; Laucht, A; Hudson, F E; Itoh, K M; Morello, A; Dzurak, A S

2015-10-15

Quantum computation requires qubits that can be coupled in a scalable manner, together with universal and high-fidelity one- and two-qubit logic gates. Many physical realizations of qubits exist, including single photons, trapped ions, superconducting circuits, single defects or atoms in diamond and silicon, and semiconductor quantum dots, with single-qubit fidelities that exceed the stringent thresholds required for fault-tolerant quantum computing. Despite this, high-fidelity two-qubit gates in the solid state that can be manufactured using standard lithographic techniques have so far been limited to superconducting qubits, owing to the difficulties of coupling qubits and dephasing in semiconductor systems. Here we present a two-qubit logic gate, which uses single spins in isotopically enriched silicon and is realized by performing single- and two-qubit operations in a quantum dot system using the exchange interaction, as envisaged in the Loss-DiVincenzo proposal. We realize CNOT gates via controlled-phase operations combined with single-qubit operations. Direct gate-voltage control provides single-qubit addressability, together with a switchable exchange interaction that is used in the two-qubit controlled-phase gate. By independently reading out both qubits, we measure clear anticorrelations in the two-spin probabilities of the CNOT gate.

Hysteresis in voltage-gated channels

PubMed Central

2017-01-01

ABSTRACT Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels. PMID:27689426

Beyond voltage-gated ion channels: Voltage-operated membrane proteins and cellular processes.

PubMed

Zhang, Jianping; Chen, Xingjuan; Xue, Yucong; Gamper, Nikita; Zhang, Xuan

2018-04-18

Voltage-gated ion channels were believed to be the only voltage-sensitive proteins in excitable (and some non-excitable) cells for a long time. Emerging evidence indicates that the voltage-operated model is shared by some other transmembrane proteins expressed in both excitable and non-excitable cells. In this review, we summarize current knowledge about voltage-operated proteins, which are not classic voltage-gated ion channels as well as the voltage-dependent processes in cells for which single voltage-sensitive proteins have yet to be identified. Particularly, we will focus on the following. (1) Voltage-sensitive phosphoinositide phosphatases (VSP) with four transmembrane segments homologous to the voltage sensor domain (VSD) of voltage-gated ion channels; VSPs are the first family of proteins, other than the voltage-gated ion channels, for which there is sufficient evidence for the existence of the VSD domain; (2) Voltage-gated proton channels comprising of a single voltage-sensing domain and lacking an identified pore domain; (3) G protein coupled receptors (GPCRs) that mediate the depolarization-evoked potentiation of Ca 2+ mobilization; (4) Plasma membrane (PM) depolarization-induced but Ca 2+ -independent exocytosis in neurons. (5) Voltage-dependent metabolism of phosphatidylinositol 4,5-bisphosphate (PtdIns[4,5]P 2 , PIP 2 ) in the PM. These recent discoveries expand our understanding of voltage-operated processes within cellular membranes. © 2018 Wiley Periodicals, Inc.

Tunnel magnetoresistance for coherent spin-flip processes on an interacting quantum dot.

PubMed

Rudziński, W

2009-01-28

Spin-polarized electronic tunneling through a quantum dot coupled to ferromagnetic electrodes is investigated within a nonequilibrium Green function approach. An interplay between coherent intradot spin-flip transitions, tunneling processes and Coulomb correlations on the dot is studied for current-voltage characteristics of the tunneling junction in parallel and antiparallel magnetic configurations of the leads. It is found that due to the spin-flip processes electric current in the antiparallel configuration tends to the current characteristics in the parallel configuration, thus giving rise to suppression of the tunnel magnetoresistance (TMR) between the threshold bias voltages at which the dot energy level becomes active in tunneling. Also, the effect of a negative differential conductance in symmetrical junctions, splitting of the conductance peaks, significant modulation of TMR peaks around the threshold bias voltages as well as suppression of the diode-like behavior in asymmetrical junctions is discussed in the context of coherent intradot spin-flip transitions. It is also shown that TMR may be inverted at selected gate voltages, which qualitatively reproduces the TMR behavior predicted recently for temperatures in the Kondo regime, and observed experimentally beyond the Kondo regime for a semiconductor InAs quantum dot coupled to nickel electrodes.

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

NASA Astrophysics Data System (ADS)

Idris, M. I.; Weng, M. H.; Chan, H.-K.; Murphy, A. E.; Clark, D. T.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

2016-12-01

In this paper, the effect of inclusion of phosphorous (at a concentration below 1%) on the high temperature characteristics (up to 300 °C) of the SiO2/SiC interface is investigated. Capacitance-voltage measurements taken for a range of frequencies have been utilized to extract parameters including flatband voltage, threshold voltage, effective oxide charge, and interface state density. The variation of these parameters with temperature has been investigated for bias sweeps in opposing directions and a comparison made between phosphorous doped and as-grown oxides. At room temperature, the effective oxide charge for SiO2 may be reduced by the phosphorous termination of dangling bonds at the interface. However, at high temperatures, the effective charge in the phosphorous doped oxide remains unstable and effects such as flatband voltage shift and threshold voltage shift dominate the characteristics. The instability in these characteristics was found to result from the trapped charges in the oxide (±1012 cm-3) or near interface traps at the interface of the gate oxide and the semiconductor (1012-1013 cm-2 eV-1). Hence, the performance enhancements observed for phosphorous doped oxides are not realised in devices operated at elevated temperatures.

Insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor devices with Al2O3 or AlTiO gate dielectrics

NASA Astrophysics Data System (ADS)

Le, Son Phuong; Nguyen, Duong Dai; Suzuki, Toshi-kazu

2018-01-01

We have investigated insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor (MIS) devices with Al2O3 or AlTiO (an alloy of Al2O3 and TiO2) gate dielectrics obtained by atomic layer deposition on AlGaN. Analyzing insulator-thickness dependences of threshold voltages for the MIS devices, we evaluated positive interface fixed charges, whose density at the AlTiO/AlGaN interface is significantly lower than that at the Al2O3/AlGaN interface. This and a higher dielectric constant of AlTiO lead to rather shallower threshold voltages for the AlTiO gate dielectric than for Al2O3. The lower interface fixed charge density also leads to the fact that the two-dimensional electron concentration is a decreasing function of the insulator thickness for AlTiO, whereas being an increasing function for Al2O3. Moreover, we discuss the relationship between the interface fixed charges and interface states. From the conductance method, it is shown that the interface state densities are very similar at the Al2O3/AlGaN and AlTiO/AlGaN interfaces. Therefore, we consider that the lower AlTiO/AlGaN interface fixed charge density is not owing to electrons trapped at deep interface states compensating the positive fixed charges and can be attributed to a lower density of oxygen-related interface donors.

Voltage gating of mechanosensitive PIEZO channels.

PubMed

Moroni, Mirko; Servin-Vences, M Rocio; Fleischer, Raluca; Sánchez-Carranza, Oscar; Lewin, Gary R

2018-03-15

Mechanosensitive PIEZO ion channels are evolutionarily conserved proteins whose presence is critical for normal physiology in multicellular organisms. Here we show that, in addition to mechanical stimuli, PIEZO channels are also powerfully modulated by voltage and can even switch to a purely voltage-gated mode. Mutations that cause human diseases, such as xerocytosis, profoundly shift voltage sensitivity of PIEZO1 channels toward the resting membrane potential and strongly promote voltage gating. Voltage modulation may be explained by the presence of an inactivation gate in the pore, the opening of which is promoted by outward permeation. Older invertebrate (fly) and vertebrate (fish) PIEZO proteins are also voltage sensitive, but voltage gating is a much more prominent feature of these older channels. We propose that the voltage sensitivity of PIEZO channels is a deep property co-opted to add a regulatory mechanism for PIEZO activation in widely different cellular contexts.

Voltage-Dependent Gating: Novel Insights from KCNQ1 Channels

PubMed Central

Cui, Jianmin

2016-01-01

Gating of voltage-dependent cation channels involves three general molecular processes: voltage sensor activation, sensor-pore coupling, and pore opening. KCNQ1 is a voltage-gated potassium (Kv) channel whose distinctive properties have provided novel insights on fundamental principles of voltage-dependent gating. 1) Similar to other Kv channels, KCNQ1 voltage sensor activation undergoes two resolvable steps; but, unique to KCNQ1, the pore opens at both the intermediate and activated state of voltage sensor activation. The voltage sensor-pore coupling differs in the intermediate-open and the activated-open states, resulting in changes of open pore properties during voltage sensor activation. 2) The voltage sensor-pore coupling and pore opening require the membrane lipid PIP2 and intracellular ATP, respectively, as cofactors, thus voltage-dependent gating is dependent on multiple stimuli, including the binding of intracellular signaling molecules. These mechanisms underlie the extraordinary KCNE1 subunit modification of the KCNQ1 channel and have significant physiological implications. PMID:26745405

Attenuated effect of tungsten carbide nanoparticles on voltage-gated sodium current of hippocampal CA1 pyramidal neurons.

PubMed

Shan, Dehong; Xie, Yongling; Ren, Guogang; Yang, Zhuo

2013-02-01

Nanomaterials and relevant products are now being widely used in the world, and their safety becomes a great concern for the general public. Tungsten carbide nanoparticles (nano-WC) are widely used in metallurgy, aeronautics and astronautics, however our knowledge regarding the influence of nano-WC on neurons is still lacking. The aim of this study was to investigate the impact of nano-WC on tetrodotoxin (TTX)-sensitive voltage-activated sodium current (I(Na)) of hippocampal CA1 pyramidal neurons. Results showed that acute exposure of nano-WC attenuated the peak amplitudes of I(Na) in a concentration-dependent manner. The minimal effective concentration was 10(-5)g/ml. The exposure of nano-WC significantly decreased current amplitudes of the current-voltage curves of I(Na) from -50 to+50 mV, shifted the steady-state activation and inactivation curves of I(Na) negatively and delayed the recovery of I(Na) from inactivation state. After exposure to nano-WC, the peak amplitudes, overshoots and the V-thresholds of action potentials (APs) were markedly reduced. These results suggested that exposure of nano-WC could influence some characteristics of APs evoked from the hippocampal CA1 neurons by modifying the kinetics of voltage-gated sodium channels (VGSCs). Copyright © 2012 Elsevier Ltd. All rights reserved.

Voltage-Boosting Driver For Switching Regulator

NASA Technical Reports Server (NTRS)

Trump, Ronald C.

1990-01-01

Driver circuit assures availability of 10- to 15-V gate-to-source voltage needed to turn on n-channel metal oxide/semiconductor field-effect transistor (MOSFET) acting as switch in switching voltage regulator. Includes voltage-boosting circuit efficiently providing gate voltage 10 to 15 V above supply voltage. Contains no exotic parts and does not require additional power supply. Consists of NAND gate and dual voltage booster operating in conjunction with pulse-width modulator part of regulator.

GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

2015-04-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

A novel thin-film transistor with step gate-overlapped lightly doped drain and raised source/drain design

NASA Astrophysics Data System (ADS)

Chien, Feng-Tso; Chen, Jian-Liang; Chen, Chien-Ming; Chen, Chii-Wen; Cheng, Ching-Hwa; Chiu, Hsien-Chin

2017-11-01

In this paper, a novel step gate-overlapped lightly doped drain (GOLDD) with raised source/drain (RSD) structure (SGORSD) is proposed for TFT electronic device application. The new SGORSD structure could obtain a low electric field at channel near the drain side owing to a step GOLDD design. Compared to the conventional device, the SGORSD TFT exhibits a better kink effect and higher breakdown performance due to the reduced drain electric field (D-EF). In addition, the leakage current also can be suppressed. Moreover, the device stability, such as the threshold voltage shift and drain current degradation under a high gate bias, is improved by the design of SGORSD structure. Therefore, this novel step GOLDD structure can be a promising design to be used in active-matrix flat panel electronics.

Threshold voltage variation depending on single grain boundary and stored charges in an adjacent cell for vertical silicon–oxide–nitride–oxide–silicon NAND flash memory

NASA Astrophysics Data System (ADS)

Oh, Hyeongwan; Kim, Jiwon; Baek, Rock-Hyun; Lee, Jeong-Soo

2018-04-01

The effects of single grain boundary (SGB) position and stored electron charges in an adjacent cell in silicon–oxide–nitride–oxide–silicon (SONOS) structures on the variations of threshold voltage (V th) were investigated using technology computer-aided design (TCAD) simulation. As the bit line voltage increases, the SGB position causing the maximum V th variation was shifted from the center to the source side in the channel, owing to the drain-induced grain barrier lowering effect. When the SGB is located in the spacer region, the potential interaction from both the SGB and the stored electron charges in the adjacent cell becomes significant and thus resulting in larger V th variation. In contrast, when the SGB is located at the center of the channel, the peak position of potential barrier is shifted to the center, so that the influence of the adjacent cell is diminished. As the gate length is scaled down to 20 nm, the influence of stored charges in adjacent cells becomes significant, resulting in larger V th variations.

Pado, a fluorescent protein with proton channel activity can optically monitor membrane potential, intracellular pH, and map gap junctions.

PubMed

Kang, Bok Eum; Baker, Bradley J

2016-04-04

An in silico search strategy was developed to identify potential voltage-sensing domains (VSD) for the development of genetically encoded voltage indicators (GEVIs). Using a conserved charge distribution in the S2 α-helix, a single in silico search yielded most voltage-sensing proteins including voltage-gated potassium channels, voltage-gated calcium channels, voltage-gated sodium channels, voltage-gated proton channels, and voltage-sensing phosphatases from organisms ranging from mammals to bacteria and plants. A GEVI utilizing the VSD from a voltage-gated proton channel identified from that search was able to optically report changes in membrane potential. In addition this sensor was capable of manipulating the internal pH while simultaneously reporting that change optically since it maintains the voltage-gated proton channel activity of the VSD. Biophysical characterization of this GEVI, Pado, demonstrated that the voltage-dependent signal was distinct from the pH-dependent signal and was dependent on the movement of the S4 α-helix. Further investigation into the mechanism of the voltage-dependent optical signal revealed that inhibiting the dimerization of the fluorescent protein greatly reduced the optical signal. Dimerization of the FP thereby enabled the movement of the S4 α-helix to mediate a fluorescent response.

Pado, a fluorescent protein with proton channel activity can optically monitor membrane potential, intracellular pH, and map gap junctions

PubMed Central

Kang, Bok Eum; Baker, Bradley J.

2016-01-01

An in silico search strategy was developed to identify potential voltage-sensing domains (VSD) for the development of genetically encoded voltage indicators (GEVIs). Using a conserved charge distribution in the S2 α-helix, a single in silico search yielded most voltage-sensing proteins including voltage-gated potassium channels, voltage-gated calcium channels, voltage-gated sodium channels, voltage-gated proton channels, and voltage-sensing phosphatases from organisms ranging from mammals to bacteria and plants. A GEVI utilizing the VSD from a voltage-gated proton channel identified from that search was able to optically report changes in membrane potential. In addition this sensor was capable of manipulating the internal pH while simultaneously reporting that change optically since it maintains the voltage-gated proton channel activity of the VSD. Biophysical characterization of this GEVI, Pado, demonstrated that the voltage-dependent signal was distinct from the pH-dependent signal and was dependent on the movement of the S4 α-helix. Further investigation into the mechanism of the voltage-dependent optical signal revealed that inhibiting the dimerization of the fluorescent protein greatly reduced the optical signal. Dimerization of the FP thereby enabled the movement of the S4 α-helix to mediate a fluorescent response. PMID:27040905

Dual-gate polysilicon nanoribbon biosensors enable high sensitivity detection of proteins.

PubMed

Zeimpekis, I; Sun, K; Hu, C; Ditshego, N M J; Thomas, O; de Planque, M R R; Chong, H M H; Morgan, H; Ashburn, P

2016-04-22

We demonstrate the advantages of dual-gate polysilicon nanoribbon biosensors with a comprehensive evaluation of different measurement schemes for pH and protein sensing. In particular, we compare the detection of voltage and current changes when top- and bottom-gate bias is applied. Measurements of pH show that a large voltage shift of 491 mV pH(-1) is obtained in the subthreshold region when the top-gate is kept at a fixed potential and the bottom-gate is varied (voltage sweep). This is an improvement of 16 times over the 30 mV pH(-1) measured using a top-gate sweep with the bottom-gate at a fixed potential. A similar large voltage shift of 175 mV is obtained when the protein avidin is sensed using a bottom-gate sweep. This is an improvement of 20 times compared with the 8.8 mV achieved from a top-gate sweep. Current measurements using bottom-gate sweeps do not deliver the same signal amplification as when using bottom-gate sweeps to measure voltage shifts. Thus, for detecting a small signal change on protein binding, it is advantageous to employ a double-gate transistor and to measure a voltage shift using a bottom-gate sweep. For top-gate sweeps, the use of a dual-gate transistor enables the current sensitivity to be enhanced by applying a negative bias to the bottom-gate to reduce the carrier concentration in the nanoribbon. For pH measurements, the current sensitivity increases from 65% to 149% and for avidin sensing it increases from 1.4% to 2.5%.

Dual-gate polysilicon nanoribbon biosensors enable high sensitivity detection of proteins

NASA Astrophysics Data System (ADS)

Zeimpekis, I.; Sun, K.; Hu, C.; Ditshego, N. M. J.; Thomas, O.; de Planque, M. R. R.; Chong, H. M. H.; Morgan, H.; Ashburn, P.

2016-04-01

We demonstrate the advantages of dual-gate polysilicon nanoribbon biosensors with a comprehensive evaluation of different measurement schemes for pH and protein sensing. In particular, we compare the detection of voltage and current changes when top- and bottom-gate bias is applied. Measurements of pH show that a large voltage shift of 491 mV pH-1 is obtained in the subthreshold region when the top-gate is kept at a fixed potential and the bottom-gate is varied (voltage sweep). This is an improvement of 16 times over the 30 mV pH-1 measured using a top-gate sweep with the bottom-gate at a fixed potential. A similar large voltage shift of 175 mV is obtained when the protein avidin is sensed using a bottom-gate sweep. This is an improvement of 20 times compared with the 8.8 mV achieved from a top-gate sweep. Current measurements using bottom-gate sweeps do not deliver the same signal amplification as when using bottom-gate sweeps to measure voltage shifts. Thus, for detecting a small signal change on protein binding, it is advantageous to employ a double-gate transistor and to measure a voltage shift using a bottom-gate sweep. For top-gate sweeps, the use of a dual-gate transistor enables the current sensitivity to be enhanced by applying a negative bias to the bottom-gate to reduce the carrier concentration in the nanoribbon. For pH measurements, the current sensitivity increases from 65% to 149% and for avidin sensing it increases from 1.4% to 2.5%.

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE PAGES

King, M. P.; Wu, X.; Eller, Manfred; ...

2016-12-07

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

Analysis of TID process, geometry, and bias condition dependence in 14-nm FinFETs and implications for RF and SRAM performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

King, M. P.; Wu, X.; Eller, Manfred

Here, total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high-Vth transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and Vth, while the low-Vth transistors exhibitmore » a larger change in off-state leakage current. The “worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state (Vgs = Vdd). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low-Vth transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.« less

ZnO thin film transistor immunosensor with high sensitivity and selectivity

NASA Astrophysics Data System (ADS)

Reyes, Pavel Ivanoff; Ku, Chieh-Jen; Duan, Ziqing; Lu, Yicheng; Solanki, Aniruddh; Lee, Ki-Bum

2011-04-01

A zinc oxide thin film transistor-based immunosensor (ZnO-bioTFT) is presented. The back-gate TFT has an on-off ratio of 108 and a threshold voltage of 4.25 V. The ZnO channel surface is biofunctionalized with primary monoclonal antibodies that selectively bind with epidermal growth factor receptor (EGFR). Detection of the antibody-antigen reaction is achieved through channel carrier modulation via pseudo double-gating field effect caused by the biochemical reaction. The sensitivity of 10 fM detection of pure EGFR proteins is achieved. The ZnO-bioTFT immunosensor also enables selectively detecting 10 fM of EGFR in a 5 mg/ml goat serum solution containing various other proteins.

Maximizing the value of gate capacitance in field-effect devices using an organic interface layer

NASA Astrophysics Data System (ADS)

Kwok, H. L.

2015-12-01

Past research has confirmed the existence of negative capacitance in organics such as tris (8-Hydroxyquinoline) Aluminum (Alq3). This work explored using such an organic interface layer to enhance the channel voltage in the field-effect transistor (FET) thereby lowering the sub-threshold swing. In particular, if the values of the positive and negative gate capacitances are approximately equal, the composite negative capacitance will increase by orders of magnitude. One concern is the upper frequency limit (∼100 Hz) over which negative capacitance has been observed. Nonetheless, this frequency limit can be raised to kHz when the organic layer is subjected to a DC bias.

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

The low threshold voltage n-type silicon transistors based on a polymer/silica nanocomposite gate dielectric: The effect of annealing temperatures on their operation

NASA Astrophysics Data System (ADS)

Hashemi, Adeleh; Bahari, Ali; Ghasemi, Shahram

2017-09-01

In this work, povidone/silica nanocomposite dielectric layers were deposited on the n-type Si (100) substrates for application in n-type silicon field-effect transistors (FET). Thermogravimetric analysis (TGA) indicated that strong chemical interactions between polymer and silica nanoparticles were created. In order to examine the effect of annealing temperatures on chemical interactions and nanostructure properties, annealing process was done at 423-513 K. Atomic force microscopy (AFM) images show the very smooth surfaces with very low surface roughness (0.038-0.088 nm). The Si2p and C1s core level photoemission spectra were deconvoluted to the chemical environments of Si and C atoms respectively. The obtained results of deconvoluted X-ray photoelectron spectroscopy (XPS) spectra revealed a high percentage of silanol hydrogen bonds in the sample which was not annealed. These bonds were inversed to stronger covalence bonds (siloxan bonds) at annealing temperature of 423 K. By further addition of temperature, siloxan bonds were shifted to lower binding energy of about 1 eV and their intensity were abated at annealing temperature of 513 K. The electrical characteristics were extracted from current-Voltage (I-V) and capacitance-voltage (C-V) measurements in metal-insulator-semiconductor (MIS) structure. The all n-type Si transistors showed very low threshold voltages (-0.24 to 1 V). The formation of the strongest cross-linking at nanostructure of dielectric film annealed at 423 K caused resulted in an un-trapped path for the transport of charge carriers yielding the lowest threshold voltage (0.08 V) and the highest electron mobility (45.01 cm2/V s) for its FET. By increasing the annealing temperature (473 and 513 K) on the nanocomposite dielectric films, the values of the average surface roughness, the capacitance and the FET threshold voltage increased and the value of FET electron field-effect mobility decreased.

A microwave field-driven transistor-like skyrmionic device with the microwave current-assisted skyrmion creation

NASA Astrophysics Data System (ADS)

Xia, Jing; Huang, Yangqi; Zhang, Xichao; Kang, Wang; Zheng, Chentian; Liu, Xiaoxi; Zhao, Weisheng; Zhou, Yan

2017-10-01

Magnetic skyrmion is a topologically protected domain-wall structure at nanoscale, which could serve as a basic building block for advanced spintronic devices. Here, we propose a microwave field-driven skyrmionic device with the transistor-like function, where the motion of a skyrmion in a voltage-gated ferromagnetic nanotrack is studied by micromagnetic simulations. It is demonstrated that the microwave field can drive the motion of a skyrmion by exciting the propagating spin waves, and the skyrmion motion can be governed by a gate voltage. We also investigate the microwave current-assisted creation of a skyrmion to facilitate the operation of the transistor-like skyrmionic device on the source terminal. It is found that the microwave current with an appropriate frequency can reduce the threshold current density required for the creation of a skyrmion from the ferromagnetic background. The proposed transistor-like skyrmionic device operated with the microwave field and current could be useful for building future skyrmion-based circuits.

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

Effect of gate voltage polarity on the ionic liquid gating behavior of NdNiO 3/NdGaO 3 heterostructures

DOE PAGES

Dong, Yongqi; Xu, Haoran; Luo, Zhenlin; ...

2017-05-16

The effect of gate voltage polarity on the behavior of NdNiO 3 epitaxial thin films during ionic liquid gating is studied using in situ synchrotron X-ray techniques. We show that while negative biases have no discernible effect on the structure or composition of the films, large positive gate voltages result in the injection of a large concentration of oxygen vacancies (similar to 3%) and pronounced lattice expansion (0.17%) in addition to a 1000-fold increase in sheet resistance at room temperature. Despite the creation of large defect densities, the heterostructures exhibit a largely reversible switching behavior when sufficient time is providedmore » for the vacancies to migrate in and out of the thin film surface. The results confirm that electrostatic gating takes place at negative gate voltages for p-type complex oxides while positive voltages favor the electrochemical reduction of Ni 3+. Switching between positive and negative gate voltages therefore involves a combination of electronic and ionic doping processes that may be utilized in future electrochemical transistors.« less

Vertical architecture for enhancement mode power transistors based on GaN nanowires

NASA Astrophysics Data System (ADS)

Yu, F.; Rümmler, D.; Hartmann, J.; Caccamo, L.; Schimpke, T.; Strassburg, M.; Gad, A. E.; Bakin, A.; Wehmann, H.-H.; Witzigmann, B.; Wasisto, H. S.; Waag, A.

2016-05-01

The demonstration of vertical GaN wrap-around gated field-effect transistors using GaN nanowires is reported. The nanowires with smooth a-plane sidewalls have hexagonal geometry made by top-down etching. A 7-nanowire transistor exhibits enhancement mode operation with threshold voltage of 1.2 V, on/off current ratio as high as 108, and subthreshold slope as small as 68 mV/dec. Although there is space charge limited current behavior at small source-drain voltages (Vds), the drain current (Id) and transconductance (gm) reach up to 314 mA/mm and 125 mS/mm, respectively, when normalized with hexagonal nanowire circumference. The measured breakdown voltage is around 140 V. This vertical approach provides a way to next-generation GaN-based power devices.

High-mobility and low-operating voltage organic thin film transistor with epoxy based siloxane binder as the gate dielectric

NASA Astrophysics Data System (ADS)

Tewari, Amit; Gandla, Srinivas; Pininti, Anil Reddy; Karuppasamy, K.; Böhm, Siva; Bhattacharyya, Arup R.; McNeill, Christopher R.; Gupta, Dipti

2015-09-01

This paper reports the fabrication of pentacene-based organic thin-film transistors using a dielectric material, Dynasylan ®SIVO110. The devices exhibit excellent performance characterized by a low threshold voltage of -1.4 V (operating voltage: 0 to -4 V) together with a mobility of 1.9 cm2 V-1s-1. These results are promising because it uses only a single layer of dielectric without performing any intermediate treatment. The reason is attributed to the high charge storage capacity of the dielectric (κ ˜ 20.02), a low interfacial trap density (2.56 × 1011cm-2), and favorable pentacene film morphology consisting of large and interconnected grains having an average size of 234 nm.

Action potentials in primary osteoblasts and in the MG-63 osteoblast-like cell line.

PubMed

Pangalos, Maria; Bintig, Willem; Schlingmann, Barbara; Feyerabend, Frank; Witte, Frank; Begandt, Daniela; Heisterkamp, Alexander; Ngezahayo, Anaclet

2011-06-01

Whole-cell patch-clamp analysis revealed a resting membrane potential of -60 mV in primary osteoblasts and in the MG-63 osteoblast-like cells. Depolarization-induced action potentials were characterized by duration of 60 ms, a minimal peak-to-peak distance of 180 ms, a threshold value of -20 mV and a repolarization between the spikes to -45 mV. Expressed channels were characterized by application of voltage pulses between -150 mV and 90 mV in 10 mV steps, from a holding potential of -40 mV. Voltages below -60 mV induced an inward current. Depolarizing voltages above -30 mV evoked two currents: (a) a fast activated and inactivated inward current at voltages between -30 and 30 mV, and (b) a delayed-activated outward current that was induced by voltages above -30 mV. Electrophysiological and pharmacological parameters indicated that hyperpolarization activated strongly rectifying K(+) (K(ir)) channels, whereas depolarization activated tetrodotoxin sensitive voltage gated Na(+) (Na(v)) channels as well as delayed, slowly activated, non-inactivating, and tetraethylammonium sensitive voltage gated K(+) (K(v)) channels. In addition, RT-PCR showed expression of Na(v)1.3, Na(v)1.4, Na(v)1.5, Na(v)1.6, Na(v)1.7, and K(ir)2.1, K(ir)2.3, and K(ir)2.4 as well as K(v)2.1. We conclude that osteoblasts express channels that allow firing of action potentials.

Increase the threshold voltage of high voltage GaN transistors by low temperature atomic hydrogen treatment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Erofeev, E. V., E-mail: erofeev@micran.ru; Fedin, I. V.; Kutkov, I. V.

High-electron-mobility transistors (HEMTs) based on AlGaN/GaN epitaxial heterostructures are a promising element base for the fabrication of high voltage electronic devices of the next generation. This is caused by both the high mobility of charge carriers in the transistor channel and the high electric strength of the material, which makes it possible to attain high breakdown voltages. For use in high-power switches, normally off-mode GaN transistors operating under enhancement conditions are required. To fabricate normally off GaN transistors, one most frequently uses a subgate region based on magnesium-doped p-GaN. However, optimization of the p-GaN epitaxial-layer thickness and the doping levelmore » makes it possible to attain a threshold voltage of GaN transistors close to V{sub th} = +2 V. In this study, it is shown that the use of low temperature treatment in an atomic hydrogen flow for the p-GaN-based subgate region before the deposition of gate-metallization layers makes it possible to increase the transistor threshold voltage to V{sub th} = +3.5 V. The effects under observation can be caused by the formation of a dipole layer on the p-GaN surface induced by the effect of atomic hydrogen. The heat treatment of hydrogen-treated GaN transistors in a nitrogen environment at a temperature of T = 250°C for 12 h reveals no degradation of the transistor’s electrical parameters, which can be caused by the formation of a thermally stable dipole layer at the metal/p-GaN interface as a result of hydrogenation.« less

Activity of Palythoa caribaeorum Venom on Voltage-Gated Ion Channels in Mammalian Superior Cervical Ganglion Neurons.

PubMed

Lazcano-Pérez, Fernando; Castro, Héctor; Arenas, Isabel; García, David E; González-Muñoz, Ricardo; Arreguín-Espinosa, Roberto

2016-05-05

The Zoanthids are an order of cnidarians whose venoms and toxins have been poorly studied. Palythoa caribaeorum is a zoanthid commonly found around the Mexican coastline. In this study, we tested the activity of P. caribaeorum venom on voltage-gated sodium channel (NaV1.7), voltage-gated calcium channel (CaV2.2), the A-type transient outward (IA) and delayed rectifier (IDR) currents of KV channels of the superior cervical ganglion (SCG) neurons of the rat. These results showed that the venom reversibly delays the inactivation process of voltage-gated sodium channels and inhibits voltage-gated calcium and potassium channels in this mammalian model. The compounds responsible for these effects seem to be low molecular weight peptides. Together, these results provide evidence for the potential use of zoanthids as a novel source of cnidarian toxins active on voltage-gated ion channels.

Activity of Palythoa caribaeorum Venom on Voltage-Gated Ion Channels in Mammalian Superior Cervical Ganglion Neurons

PubMed Central

Lazcano-Pérez, Fernando; Castro, Héctor; Arenas, Isabel; García, David E.; González-Muñoz, Ricardo; Arreguín-Espinosa, Roberto

2016-01-01

The Zoanthids are an order of cnidarians whose venoms and toxins have been poorly studied. Palythoa caribaeorum is a zoanthid commonly found around the Mexican coastline. In this study, we tested the activity of P. caribaeorum venom on voltage-gated sodium channel (NaV1.7), voltage-gated calcium channel (CaV2.2), the A-type transient outward (IA) and delayed rectifier (IDR) currents of KV channels of the superior cervical ganglion (SCG) neurons of the rat. These results showed that the venom reversibly delays the inactivation process of voltage-gated sodium channels and inhibits voltage-gated calcium and potassium channels in this mammalian model. The compounds responsible for these effects seem to be low molecular weight peptides. Together, these results provide evidence for the potential use of zoanthids as a novel source of cnidarian toxins active on voltage-gated ion channels. PMID:27164140

A localized interaction surface for voltage-sensing domains on the pore domain of a K+ channel.

PubMed

Li-Smerin, Y; Hackos, D H; Swartz, K J

2000-02-01

Voltage-gated K+ channels contain a central pore domain and four surrounding voltage-sensing domains. How and where changes in the structure of the voltage-sensing domains couple to the pore domain so as to gate ion conduction is not understood. The crystal structure of KcsA, a bacterial K+ channel homologous to the pore domain of voltage-gated K+ channels, provides a starting point for addressing this question. Guided by this structure, we used tryptophan-scanning mutagenesis on the transmembrane shell of the pore domain in the Shaker voltage-gated K+ channel to localize potential protein-protein and protein-lipid interfaces. Some mutants cause only minor changes in gating and when mapped onto the KcsA structure cluster away from the interface between pore domain subunits. In contrast, mutants producing large changes in gating tend to cluster near this interface. These results imply that voltage-sensing domains interact with localized regions near the interface between adjacent pore domain subunits.

Gating transitions in the selectivity filter region of a sodium channel are coupled to the domain IV voltage sensor.

PubMed

Capes, Deborah L; Arcisio-Miranda, Manoel; Jarecki, Brian W; French, Robert J; Chanda, Baron

2012-02-14

Voltage-dependent ion channels are crucial for generation and propagation of electrical activity in biological systems. The primary mechanism for voltage transduction in these proteins involves the movement of a voltage-sensing domain (D), which opens a gate located on the cytoplasmic side. A distinct conformational change in the selectivity filter near the extracellular side has been implicated in slow inactivation gating, which is important for spike frequency adaptation in neural circuits. However, it remains an open question whether gating transitions in the selectivity filter region are also actuated by voltage sensors. Here, we examine conformational coupling between each of the four voltage sensors and the outer pore of a eukaryotic voltage-dependent sodium channel. The voltage sensors of these sodium channels are not structurally symmetric and exhibit functional specialization. To track the conformational rearrangements of individual voltage-sensing domains, we recorded domain-specific gating pore currents. Our data show that, of the four voltage sensors, only the domain IV voltage sensor is coupled to the conformation of the selectivity filter region of the sodium channel. Trapping the outer pore in a particular conformation with a high-affinity toxin or disulphide crossbridge impedes the return of this voltage sensor to its resting conformation. Our findings directly establish that, in addition to the canonical electromechanical coupling between voltage sensor and inner pore gates of a sodium channel, gating transitions in the selectivity filter region are also coupled to the movement of a voltage sensor. Furthermore, our results also imply that the voltage sensor of domain IV is unique in this linkage and in the ability to initiate slow inactivation in sodium channels.

Conformational changes in the M2 muscarinic receptor induced by membrane voltage and agonist binding

PubMed Central

Navarro-Polanco, Ricardo A; Galindo, Eloy G Moreno; Ferrer-Villada, Tania; Arias, Marcelo; Rigby, J Ryan; Sánchez-Chapula, José A; Tristani-Firouzi, Martin

2011-01-01

Abstract The ability to sense transmembrane voltage is a central feature of many membrane proteins, most notably voltage-gated ion channels. Gating current measurements provide valuable information on protein conformational changes induced by voltage. The recent observation that muscarinic G-protein-coupled receptors (GPCRs) generate gating currents confirms their intrinsic capacity to sense the membrane electrical field. Here, we studied the effect of voltage on agonist activation of M2 muscarinic receptors (M2R) in atrial myocytes and how agonist binding alters M2R gating currents. Membrane depolarization decreased the potency of acetylcholine (ACh), but increased the potency and efficacy of pilocarpine (Pilo), as measured by ACh-activated K+ current, IKACh. Voltage-induced conformational changes in M2R were modified in a ligand-selective manner: ACh reduced gating charge displacement while Pilo increased the amount of charge displaced. Thus, these ligands manifest opposite voltage-dependent IKACh modulation and exert opposite effects on M2R gating charge displacement. Finally, mutations in the putative ligand binding site perturbed the movement of the M2R voltage sensor. Our data suggest that changes in voltage induce conformational changes in the ligand binding site that alter the agonist–receptor interaction in a ligand-dependent manner. Voltage-dependent GPCR modulation has important implications for cellular signalling in excitable tissues. Gating current measurement allows for the tracking of subtle conformational changes in the receptor that accompany agonist binding and changes in membrane voltage. PMID:21282291

Quantitative Determination on Ionic-Liquid-Gating Control of Interfacial Magnetism

DOE PAGES

Zhao, Shishun; Zhou, Ziyao; Peng, Bin; ...

2017-03-03

Ionic-liquid gating on a functional thin film with a low voltage has drawn a lot of attention due to rich chemical, electronic, and magnetic phenomena at the interface. A key challenge in quantitative determination of voltage-controlled magnetic anisotropy (VCMA) in Au/[DEME] +[TFSI] -/Co field-effect transistor heterostructures is addressed. The magnetic anisotropy change as response to the gating voltage is precisely detected by in situ electron spin resonance measurements. Furthermore, a reversible change of magnetic anisotropy up to 219 Oe is achieved with a low gating voltage of 1.5 V at room temperature, corresponding to a record high VCMA coefficient ofmore » ≈146 Oe V -1. Two gating effects, the electrostatic doping and electrochemical reaction, are distinguished at various gating voltage regions, as confirmed by X-ray photoelectron spectroscopy and atomic force microscopy experiments. Our work shows a unique ionic-liquid-gating system for strong interfacial magnetoelectric coupling with many practical advantages, paving the way toward ion-liquid-gating spintronic/electronic devices.« less

Quantitative Determination on Ionic-Liquid-Gating Control of Interfacial Magnetism

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhao, Shishun; Zhou, Ziyao; Peng, Bin

Ionic-liquid gating on a functional thin film with a low voltage has drawn a lot of attention due to rich chemical, electronic, and magnetic phenomena at the interface. A key challenge in quantitative determination of voltage-controlled magnetic anisotropy (VCMA) in Au/[DEME] +[TFSI] -/Co field-effect transistor heterostructures is addressed. The magnetic anisotropy change as response to the gating voltage is precisely detected by in situ electron spin resonance measurements. Furthermore, a reversible change of magnetic anisotropy up to 219 Oe is achieved with a low gating voltage of 1.5 V at room temperature, corresponding to a record high VCMA coefficient ofmore » ≈146 Oe V -1. Two gating effects, the electrostatic doping and electrochemical reaction, are distinguished at various gating voltage regions, as confirmed by X-ray photoelectron spectroscopy and atomic force microscopy experiments. Our work shows a unique ionic-liquid-gating system for strong interfacial magnetoelectric coupling with many practical advantages, paving the way toward ion-liquid-gating spintronic/electronic devices.« less

Performance evaluation of bottom gate ZnO based thin film transistors with different W/L ratios for UV sensing

NASA Astrophysics Data System (ADS)

Varma, Tarun; Periasamy, C.; Boolchandani, Dharmendar

2018-02-01

In this paper, we report the simulation, fabrication and characterisation of UV photo-detectors with bottom gate ZnO Thin Film Transistors (TFTs), grown on silicon at room temperature using RF magnetron sputtering process. The static performance of these detectors have been explored by varying the channel lengths (6 μm and 12 μm). The fabricated devices show low leakage currents with threshold voltages of 1.18 & 2.33 V, sub-threshold swings of 13.5 & 12.8 V/dec for channel lengths of 6 μm and 12 μm TFT, respectively. They also exhibit superior electrical characteristics with an ON-OFF ratio of the order of 3. The detector was also tested for device stability, with the transfer characteristics of the TFTs, which got deteriorated mainly by the negative bias-stress. The TFTs were further tested for UV detector applications and found to exhibit good photo-response.

Analysis of stability improvement in ZnO thin film transistor with dual-gate structure under negative bias stress

NASA Astrophysics Data System (ADS)

Yun, Ho-Jin; Kim, Young-Su; Jeong, Kwang-Seok; Kim, Yu-Mi; Yang, Seung-dong; Lee, Hi-Deok; Lee, Ga-Won

2014-01-01

In this study, we fabricated dual-gate zinc oxide thin film transistors (ZnO TFTs) without additional processes and analyzed their stability characteristics under a negative gate bias stress (NBS) by comparison with conventional bottom-gate structures. The dual-gate device shows superior electrical parameters, such as subthreshold swing (SS) and on/off current ratio. NBS of VGS = -20 V with VDS = 0 was applied, resulting in a negative threshold voltage (Vth) shift. After applying stress for 1000 s, the Vth shift is 0.60 V in a dual-gate ZnO TFT, while the Vth shift is 2.52 V in a bottom-gate ZnO TFT. The stress immunity of the dual-gate device is caused by the change in field distribution in the ZnO channel by adding another gate as the technology computer aided design (TCAD) simulation shows. Additionally, in flicker noise analysis, a lower noise level with a different mechanism is observed in the dual-gate structure. This can be explained by the top side of the ZnO film having a larger crystal and fewer grain boundaries than the bottom side, which is revealed by the enhanced SS and XRD results. Therefore, the improved stability of the dual-gate ZnO TFT is greatly related to the E-field cancellation effect and crystal quality of the ZnO film.

Frequency-Stable Ionic-Type Hybrid Gate Dielectrics for High Mobility Solution-Processed Metal-Oxide Thin-Film Transistors

PubMed Central

Heo, Jae Sang; Choi, Seungbeom; Jo, Jeong-Wan; Kang, Jingu; Park, Ho-Hyun; Kim, Yong-Hoon; Park, Sung Kyu

2017-01-01

In this paper, we demonstrate high mobility solution-processed metal-oxide thin-film transistors (TFTs) by using a high-frequency-stable ionic-type hybrid gate dielectric (HGD). The HGD gate dielectric, a blend of sol-gel aluminum oxide (AlOx) and poly(4-vinylphenol) (PVP), exhibited high dielectric constant (ε~8.15) and high-frequency-stable characteristics (1 MHz). Using the ionic-type HGD as a gate dielectric layer, an minimal electron-double-layer (EDL) can be formed at the gate dielectric/InOx interface, enhancing the field-effect mobility of the TFTs. Particularly, using the ionic-type HGD gate dielectrics annealed at 350 °C, InOx TFTs having an average field-effect mobility of 16.1 cm2/Vs were achieved (maximum mobility of 24 cm2/Vs). Furthermore, the ionic-type HGD gate dielectrics can be processed at a low temperature of 150 °C, which may enable their applications in low-thermal-budget plastic and elastomeric substrates. In addition, we systematically studied the operational stability of the InOx TFTs using the HGD gate dielectric, and it was observed that the HGD gate dielectric effectively suppressed the negative threshold voltage shift during the negative-illumination-bias stress possibly owing to the recombination of hole carriers injected in the gate dielectric with the negatively charged ionic species in the HGD gate dielectric. PMID:28772972

Gating of the designed trimeric/tetrameric voltage-gated H+ channel

PubMed Central

Fujiwara, Yuichiro; Kurokawa, Tatsuki; Takeshita, Kohei; Nakagawa, Atsushi; Larsson, H Peter; Okamura, Yasushi

2013-01-01

The voltage-gated H+ channel functions as a dimer, a configuration that is different from standard tetrameric voltage-gated channels. Each channel protomer has its own permeation pathway. The C-terminal coiled-coil domain has been shown to be necessary for both dimerization and cooperative gating in the two channel protomers. Here we report the gating cooperativity in trimeric and tetrameric Hv channels engineered by altering the hydrophobic core sequence of the coiled-coil assembly domain. Trimeric and tetrameric channels exhibited more rapid and less sigmoidal kinetics of activation of H+ permeation than dimeric channels, suggesting that some channel protomers in trimers and tetramers failed to produce gating cooperativity observed in wild-type dimers. Multimerization of trimer and tetramer channels were confirmed by the biochemical analysis of proteins, including crystallography. These findings indicate that the voltage-gated H+ channel is optimally designed as a dimeric channel on a solid foundation of the sequence pattern of the coiled-coil core, with efficient cooperative gating that ensures sustained and steep voltage-dependent H+ conductance in blood cells. PMID:23165764

MEMS Gate Structures for Electric Propulsion Applications

DTIC Science & Technology

2006-07-12

distance between gates of dual gate system V = grid voltage Dsheath = sheath thickness Va = anode voltage E = electric field Vemitter = emitter voltage Es...minutes. A hot pressed boron nitride target (4N) in the hexagonal phase (h- BN) was sputtered in a RF magnetron sputtering gun. To promote the nucleation...and nanoFETs. This paper concludes with a discussion on using MEMS gates for dual -grid electron field emission applications. II. Gate Design I I

Enhanced Performance of Gate-First p-Channel Metal-Insulator-Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

NASA Astrophysics Data System (ADS)

Kitano, Naomu; Horie, Shinya; Arimura, Hiroaki; Kawahara, Takaaki; Sakashita, Shinsuke; Nishida, Yukio; Yugami, Jiro; Minami, Takashi; Kosuda, Motomu; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2007-12-01

We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (Vth) were realized by reducing the carbon impurity in the gate stacks and improving the Vth stability against thermal treatment. As a result, we obtained superior current drivability (Ion = 350 μA/μm at Ioff = 200 pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

Charge movement in gating-locked HCN channels reveals weak coupling of voltage sensors and gate.

PubMed

Ryu, Sujung; Yellen, Gary

2012-11-01

HCN (hyperpolarization-activated cyclic nucleotide gated) pacemaker channels have an architecture similar to that of voltage-gated K(+) channels, but they open with the opposite voltage dependence. HCN channels use essentially the same positively charged voltage sensors and intracellular activation gates as K(+) channels, but apparently these two components are coupled differently. In this study, we examine the energetics of coupling between the voltage sensor and the pore by using cysteine mutant channels for which low concentrations of Cd(2+) ions freeze the open-closed gating machinery but still allow the sensors to move. We were able to lock mutant channels either into open or into closed states by the application of Cd(2+) and measure the effect on voltage sensor movement. Cd(2+) did not immobilize the gating charge, as expected for strict coupling, but rather it produced shifts in the voltage dependence of voltage sensor charge movement, consistent with its effect of confining transitions to either closed or open states. From the magnitude of the Cd(2+)-induced shifts, we estimate that each voltage sensor produces a roughly three- to sevenfold effect on the open-closed equilibrium, corresponding to a coupling energy of ∼1.3-2 kT per sensor. Such coupling is not only opposite in sign to the coupling in K(+) channels, but also much weaker.

Polarization engineered enhancement mode GaN HEMT: Design and investigation

NASA Astrophysics Data System (ADS)

Verma, Sumit; Loan, Sajad A.; Alharbi, Abdullah G.

2018-07-01

In this paper, we propose and perform the experimentally calibrated simulation of a novel structure of a GaN/AlGaN high electron mobility transistor (HEMT). The novelty of the structure is the realization of enhancement mode operation by employing polarization engineering approach. In the proposed polarization engineered HEMT (PE-HEMT) a buried Aluminum Nitride (AlN) box is employed in the GaN layer just below the gate. The AlN box creates a two-dimensional hole gas (2DHG) at the GaN/AlN interface, which creates a conduction band barrier in the path of the already existing two-dimensional electron gas (2DEG) at GaN/AlGaN. Therefore, there is no direct path between the source and drain regions at zero gate voltage due to the barrier created by AIN and the device is initially OFF, an enhancement mode operation. A two dimensional (2D) calibrated simulation study of proposed PE-HEMT shows that the device has a threshold voltage (Vth) of 2.3 V. The PE-HEMT also reduces the electron spillover and thus improves the breakdown voltage by 108% as compared to conventional HEMT. The thermal analysis of the GaN PE-HEMT shows that a hot zone occurs on the drain side gate edge. It has been observed that the drain current in the PE-HEMT structure can be improved by 157% by using AlN heat sink.

Radiation Effects on Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, D. N.; Guertin, S.; Swift, G. M.; Johnston, A. H.

1998-01-01

Flash memories have evolved very rapidly in recent ears. New design techniques such as multilevel storage have been proposed to increase storage density, and are now available commercially. Threshold voltage distributions for single- and three-level technologies are compared. In order to implement this technology special circuitry must be added to allow the amount of charge stored in the floating gate to be controlled within narrow limits during the writing and also to detect the different amounts of charge during reading.

Two-dimensional analytical model of double-gate tunnel FETs with interface trapped charges including effects of channel mobile charge carriers

NASA Astrophysics Data System (ADS)

Xu, Huifang; Dai, Yuehua

2017-02-01

A two-dimensional analytical model of double-gate (DG) tunneling field-effect transistors (TFETs) with interface trapped charges is proposed in this paper. The influence of the channel mobile charges on the potential profile is also taken into account in order to improve the accuracy of the models. On the basis of potential profile, the electric field is derived and the expression for the drain current is obtained by integrating the BTBT generation rate. The model can be used to study the impact of interface trapped charges on the surface potential, the shortest tunneling length, the drain current and the threshold voltage for varying interface trapped charge densities, length of damaged region as well as the structural parameters of the DG TFET and can also be utilized to design the charge trapped memory devices based on TFET. The biggest advantage of this model is that it is more accurate, and in its expression there are no fitting parameters with small calculating amount. Very good agreements for both the potential, drain current and threshold voltage are observed between the model calculations and the simulated results. Project supported by the National Natural Science Foundation of China (No. 61376106), the University Natural Science Research Key Project of Anhui Province (No. KJ2016A169), and the Introduced Talents Project of Anhui Science and Technology University.

Fingerprinted circuits and methods of making and identifying the same

NASA Technical Reports Server (NTRS)

Ferguson, Michael Ian (Inventor)

2011-01-01

A circuit having a fingerprint for identification of a particular instantiation of the circuit is disclosed. The circuit may include a plurality of digital circuits or gates. Each of the digital circuits or gates is responsive to a configuration voltage applied to its analog input for controlling whether or not the digital circuit or gate performs its intended digital function and each of the digital circuits or gates transitioning between its functional state and its at least one other state when the configuration voltage equals a boundary voltage. The boundary voltage varies between different instantiations of the circuit for a majority of the digital circuits or gates and these differing boundary voltages serving to identify (or fingerprint) different instantiations of the same circuit.

Fingerprinted circuits and methods of making and identifying the same

NASA Technical Reports Server (NTRS)

Ferguson, Michael Ian (Inventor)

2012-01-01

A circuit having a fingerprint for identification of a particular instantiation of the circuit is disclosed. The circuit may include a plurality of digital circuits or gates. Each of the digital circuits or gates is responsive to a configuration voltage applied to its analog input for controlling whether or not the digital circuit or gate performs its intended digital function and each of the digital circuits or gates transitioning between its functional state and its at least one other state when the configuration voltage equals a boundary voltage. The boundary voltage varies between different instantiations of the circuit for a majority of the digital circuits or gates and these differing boundary voltages serving to identify (or fingerprint) different instantiations of the same circuit.

Charge carrier mobility in thin films of organic semiconductors by the gated van der Pauw method

PubMed Central

Rolin, Cedric; Kang, Enpu; Lee, Jeong-Hwan; Borghs, Gustaaf; Heremans, Paul; Genoe, Jan

2017-01-01

Thin film transistors based on high-mobility organic semiconductors are prone to contact problems that complicate the interpretation of their electrical characteristics and the extraction of important material parameters such as the charge carrier mobility. Here we report on the gated van der Pauw method for the simple and accurate determination of the electrical characteristics of thin semiconducting films, independently from contact effects. We test our method on thin films of seven high-mobility organic semiconductors of both polarities: device fabrication is fully compatible with common transistor process flows and device measurements deliver consistent and precise values for the charge carrier mobility and threshold voltage in the high-charge carrier density regime that is representative of transistor operation. The gated van der Pauw method is broadly applicable to thin films of semiconductors and enables a simple and clean parameter extraction independent from contact effects. PMID:28397852

A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Edward Namkyu; Shin, Yong Hyeon; Yun, Ilgu, E-mail: iyun@yonsei.ac.kr

2014-11-07

A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulationmore » results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.« less

Vacancy-fluorine complexes and their impact on the properties of metal-oxide transistors with high-k gate dielectrics studied using monoenergetic positron beams

NASA Astrophysics Data System (ADS)

Uedono, A.; Inumiya, S.; Matsuki, T.; Aoyama, T.; Nara, Y.; Ishibashi, S.; Ohdaira, T.; Suzuki, R.; Miyazaki, S.; Yamada, K.

2007-09-01

Vacancy-fluorine complexes in metal-oxide semiconductors (MOS) with high-k gate dielectrics were studied using a positron annihilation technique. F+ ions were implanted into Si substrates before the deposition of gate dielectrics (HfSiON). The shift of threshold voltage (Vth) in MOS capacitors and an increase in Fermi level position below the HfSiON/Si interface were observed after F+ implantation. Doppler broadening spectra of the annihilation radiation and positron lifetimes were measured before and after HfSiON fabrication processes. From a comparison between Doppler broadening spectra and those obtained by first-principles calculation, the major defect species in Si substrates after annealing treatment (1050 °C, 5 s) was identified as vacancy-fluorine complexes (V3F2). The origin of the Vth shift in the MOS capacitors was attributed to V3F2 located in channel regions.

Modeling and simulation of enhancement mode p-GaN Gate AlGaN/GaN HEMT for RF circuit switch applications

NASA Astrophysics Data System (ADS)

Panda, D. K.; Lenka, T. R.

2017-06-01

An enhancement mode p-GaN gate AlGaN/GaN HEMT is proposed and a physics based virtual source charge model with Landauer approach for electron transport has been developed using Verilog-A and simulated using Cadence Spectre, in order to predict device characteristics such as threshold voltage, drain current and gate capacitance. The drain current model incorporates important physical effects such as velocity saturation, short channel effects like DIBL (drain induced barrier lowering), channel length modulation (CLM), and mobility degradation due to self-heating. The predicted I d-V ds, I d-V gs, and C-V characteristics show an excellent agreement with the experimental data for both drain current and capacitance which validate the model. The developed model was then utilized to design and simulate a single-pole single-throw (SPST) RF switch.

Structure of the voltage-gated K⁺ channel Eag1 reveals an alternative voltage sensing mechanism.

PubMed

Whicher, Jonathan R; MacKinnon, Roderick

2016-08-12

Voltage-gated potassium (K(v)) channels are gated by the movement of the transmembrane voltage sensor, which is coupled, through the helical S4-S5 linker, to the potassium pore. We determined the single-particle cryo-electron microscopy structure of mammalian K(v)10.1, or Eag1, bound to the channel inhibitor calmodulin, at 3.78 angstrom resolution. Unlike previous K(v) structures, the S4-S5 linker of Eag1 is a five-residue loop and the transmembrane segments are not domain swapped, which suggest an alternative mechanism of voltage-dependent gating. Additionally, the structure and position of the S4-S5 linker allow calmodulin to bind to the intracellular domains and to close the potassium pore, independent of voltage-sensor position. The structure reveals an alternative gating mechanism for K(v) channels and provides a template to further understand the gating properties of Eag1 and related channels. Copyright © 2016, American Association for the Advancement of Science.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tournadre, Grégoire de, E-mail: gregoire.de-tournadre@univ-reims.fr; Reisdorffer, Frédéric; Simonetti, Olivier

A scanning surface potential measurement technique suited for thin-film devices operating under high voltages is reported. A commercial atomic force microscope has been customized to enable a feedback-controlled and secure surface potential measurement based on phase-shift detection under ambient conditions. Measurements of the local potential profile along the channel of bottom-gate organic thin-film transistors (TFTs) are shown to be useful to disentangle the contributions from the channel and contacts to the device performance. Intrinsic contact current-voltage characteristics have been measured on bottom-gate, top-contact (staggered) TFTs based on the small-molecule semiconductor dinaphtho[2,3-b:2′,3-f]thieno[3,2-b]thiophene (DNTT) and on bottom-gate, bottom-contact (coplanar) TFTs based onmore » the semiconducting polymer polytriarylamine (PTAA). Injection has been found to be linear in the staggered DNTT TFTs and nonlinear in the coplanar PTAA TFTs. In both types of TFT, the injection efficiency has been found to improve with increasing gate bias in the accumulation regime. Contact resistances as low as 130 Ω cm have been measured in the DNTT TFTs. A method that eliminates the influence of bias-stress-induced threshold-voltage shifts when measuring the local charge-carrier mobility in the channel is also introduced, and intrinsic channel mobilities of 1.5 cm{sup 2} V{sup −1} s{sup −1} and 1.1 × 10{sup −3} cm{sup 2} V{sup −1} s{sup −1} have been determined for DNTT and PTAA. In both semiconductors, the mobility has been found to be constant with respect to the gate bias. Despite its simplicity, the Kelvin probe force microscopy method reported here provides robust and accurate surface potential measurements on thin-film devices under operation and thus paves the way towards more extensive studies of particular interest in emerging fields of solid-state electronics.« less

Room-Temperature-Processed Flexible Amorphous InGaZnO Thin Film Transistor.

PubMed

Xiao, Xiang; Zhang, Letao; Shao, Yang; Zhou, Xiaoliang; He, Hongyu; Zhang, Shengdong

2017-12-13

A room-temperature flexible amorphous indium-gallium-zinc oxide thin film transistor (a-IGZO TFT) technology is developed on plastic substrates, in which both the gate dielectric and passivation layers of the TFTs are formed by an anodic oxidation (anodization) technique. While the gate dielectric Al 2 O 3 is grown with a conventional anodization on an Al:Nd gate electrode, the channel passivation layer Al 2 O 3 is formed using a localized anodization technique. The anodized Al 2 O 3 passivation layer shows a superior passivation effect to that of PECVD SiO 2 . The room-temperature-processed flexible a-IGZO TFT exhibits a field-effect mobility of 7.5 cm 2 /V·s, a subthreshold swing of 0.44 V/dec, an on-off ratio of 3.1 × 10 8 , and an acceptable gate-bias stability with threshold voltage shifts of 2.65 and -1.09 V under positive gate-bias stress and negative gate-bias stress, respectively. Bending and fatigue tests confirm that the flexible a-IGZO TFT also has a good mechanical reliability, with electrical performances remaining consistent up to a strain of 0.76% as well as after 1200 cycles of fatigue testing.

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

NASA Astrophysics Data System (ADS)

Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

2014-10-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

Design and simulation of a novel E-mode GaN MIS-HEMT based on a cascode connection for suppression of electric field under gate and improvement of reliability

NASA Astrophysics Data System (ADS)

Li, Weiyi; Zhang, Zhili; Fu, Kai; Yu, Guohao; Zhang, Xiaodong; Sun, Shichuang; Song, Liang; Hao, Ronghui; Fan, Yaming; Cai, Yong; Zhang, Baoshun

2017-07-01

We proposed a novel AlGaN/GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT) with a dual-gate structure and carried out the detailed numerical simulation of device operation using Silvaco Atlas. The dual-gate device is based on a cascode connection of an E-mode and a D-mode gate. The simulation results show that electric field under the gate is decreased by more than 70% compared to that of the conventional E-mode MIS-HEMTs (from 2.83 MV/cm decreased to 0.83 MV/cm). Thus, with the discussion of ionized trap density, the proposed dual-gate structure can highly improve electric field-related reliability, such as, threshold voltage stability. In addition, compared with HEMT with field plate structure, the proposed structure exhibits a simplified fabrication process and a more effective suppression of high electric field. Project supported by the Key Technologies Support Program of Jiangsu Province (No. BE2013002-2) and the National Key Scientific Instrument and Equipment Development Projects of China (No. 2013YQ470767).

Gate engineered heterostructure junctionless TFET with Gaussian doping profile for ambipolar suppression and electrical performance improvement

NASA Astrophysics Data System (ADS)

Aghandeh, Hadi; Sedigh Ziabari, Seyed Ali

2017-11-01

This study investigates a junctionless tunnel field-effect transistor with a dual material gate and a heterostructure channel/source interface (DMG-H-JLTFET). We find that using the heterostructure interface improves device behavior by reducing the tunneling barrier width at the channel/source interface. Simultaneously, the dual material gate structure decreases ambipolar current by increasing the tunneling barrier width at the drain/channel interface. The performance of the device is analyzed based on the energy band diagram at on, off, and ambipolar states. Numerical simulations demonstrate improvements in ION, IOFF, ION/IOFF, subthreshold slope (SS), transconductance and cut-off frequency and suppressed ambipolar behavior. Next, the workfunction optimization of dual material gate is studied. It is found that if appropriate workfunctions are selected for tunnel and auxiliary gates, the JLTFET exhibits considerably improved performance. We then study the influence of Gaussian doping distribution at the drain and the channel on the ambipolar performance of the device and find that a Gaussian doping profile and a dual material gate structure remarkably reduce ambipolar current. Gaussian doped DMG-H-JLTFET, also exhibits enhanced IOFF, ION/IOFF, SS and a low threshold voltage without degrading IOFF.

Gating currents from Kv7 channels carrying neuronal hyperexcitability mutations in the voltage-sensing domain.

PubMed

Miceli, Francesco; Vargas, Ernesto; Bezanilla, Francisco; Taglialatela, Maurizio

2012-03-21

Changes in voltage-dependent gating represent a common pathogenetic mechanism for genetically inherited channelopathies, such as benign familial neonatal seizures or peripheral nerve hyperexcitability caused by mutations in neuronal K(v)7.2 channels. Mutation-induced changes in channel voltage dependence are most often inferred from macroscopic current measurements, a technique unable to provide a detailed assessment of the structural rearrangements underlying channel gating behavior; by contrast, gating currents directly measure voltage-sensor displacement during voltage-dependent gating. In this work, we describe macroscopic and gating current measurements, together with molecular modeling and molecular-dynamics simulations, from channels carrying mutations responsible for benign familial neonatal seizures and/or peripheral nerve hyperexcitability; K(v)7.4 channels, highly related to K(v)7.2 channels both functionally and structurally, were used for these experiments. The data obtained showed that mutations affecting charged residues located in the more distal portion of S(4) decrease the stability of the open state and the active voltage-sensing domain configuration but do not directly participate in voltage sensing, whereas mutations affecting a residue (R4) located more proximally in S(4) caused activation of gating-pore currents at depolarized potentials. These results reveal that distinct molecular mechanisms underlie the altered gating behavior of channels carrying disease-causing mutations at different voltage-sensing domain locations, thereby expanding our current view of the pathogenesis of neuronal hyperexcitability diseases. Copyright © 2012 Biophysical Society. Published by Elsevier Inc. All rights reserved.

LOGIC NETS, THEIR CHARACTERIZATION, RELIABILITY, AND EFFICIENT SYNTHESIS.

DTIC Science & Technology

The report consists of two parts. The first discusses a problem in the dual-support approach to network synthesis using threshold gates, gives new...asymptotic results on the number of threshold gates and the size of threshold gate networks, and summarizes the work in threshold logic supported by...this contract, including programs to facilitate experimentation in the design of networks of threshold gates. The second summarizes CDL1 - Computer

Room temperature operation of electro-optical bistability in the edge-emitting tunneling-collector transistor laser

NASA Astrophysics Data System (ADS)

Feng, M.; Holonyak, N.; Wang, C. Y.

2017-09-01

Optical bistable devices are fundamental to digital photonics as building blocks of switches, logic gates, and memories in future computer systems. Here, we demonstrate both optical and electrical bistability and capability for switching in a single transistor operated at room temperature. The electro-optical hysteresis is explained by the interaction of electron-hole (e-h) generation and recombination dynamics with the cavity photon modulation in different switching paths. The switch-UP and switch-DOWN threshold voltages are determined by the rate difference of photon generation at the base quantum-well and the photon absorption via intra-cavity photon-assisted tunneling controlled by the collector voltage. Thus, the transistor laser electro-optical bistable switching is programmable with base current and collector voltage, and the basis for high speed optical logic processors.

Charge retention characteristics of silicide-induced crystallized polycrystalline silicon floating gate thin-film transistors for active matrix organic light-emitting diode.

PubMed

Park, Jae Hyo; Son, Se Wan; Byun, Chang Woo; Kim, Hyung Yoon; Joo, So Na; Lee, Yong Woo; Yun, Seung Jae; Joo, Seung Ki

2013-10-01

In this work, non-volatile memory thin-film transistor (NVM-TFT) was fabricated by nickel silicide-induced laterally crystallized (SILC) polycrystalline silicon (poly-Si) as the active layer. The nickel seed silicide-induced crystallized (SIC) poly-Si was used as storage layer which is embedded in the gate insulator. The novel unit pixel of active matrix organic light-emitting diode (AMOLED) using NVM-TFT is proposed and investigated the electrical and optical performance. The threshold voltage shift showed 17.2 V and the high reliability of retention characteristic was demonstrated until 10 years. The retention time can modulate the recharge refresh time of the unit pixel of AMOLED up to 5000 sec.

Voltage controlled spintronic devices for logic applications

DOEpatents

You, Chun-Yeol; Bader, Samuel D.

2001-01-01

A reprogrammable logic gate comprising first and second voltage-controlled rotation transistors. Each transistor comprises three ferromagnetic layers with a spacer and insulating layer between the first and second ferromagnetic layers and an additional insulating layer between the second and third ferromagnetic layers. The third ferromagnetic layer of each transistor is connected to each other, and a constant external voltage source is applied to the second ferromagnetic layer of the first transistor. As input voltages are applied to the first ferromagnetic layer of each transistor, the relative directions of magnetization of the ferromagnetic layers and the magnitude of the external voltage determines the output voltage of the gate. By altering these parameters, the logic gate is capable of behaving as AND, OR, NAND, or NOR gates.

The effects of piracetam and its novel peptide analogue GVS-111 on neuronal voltage-gated calcium and potassium channels.

PubMed

Solntseva, E I; Bukanova, J V; Ostrovskaya, R U; Gudasheva, T A; Voronina, T A; Skrebitsky, V G

1997-07-01

1. With the use of the two-microelectrode voltage-clamp method, three types of voltage-activated ionic currents were examined in isolated neurons of the snail Helix pomatia: high-threshold Ca2+ current (ICa), high-threshold Ca(2+)-dependent K+ current (IK(Ca)) and high-threshold K+ current independent of Ca2+ (IK(V)). 2. The effect of bath application of the nootropics piracetam and a novel piracetam peptide analog, ethyl ester of N-phenyl-acetyl-L-prolyl-glycine (GVS-111), on these three types of voltage-activated ionic currents was studied. 3. In more than half of the tested cells, ICa was resistant to both piracetam and GVS-111. In the rest of the cells, ICa decreased 19 +/- 7% with 2 mM of piracetam and 39 +/- 14% with 2 microM of GVS-111. 4. IK(V) in almost all cells tested was resistant to piracetam at concentrations up to 2 mM. However, IK(V) in two-thirds of the cells was sensitive to GVS-111, being suppressed 49 +/- 18% with 1 microM GVS-111. 5. IK(Ca) appeared to be the most sensitive current of those studied to both piracetam and GVS-111. Piracetam at 1 mM and GVS-111 at 0.1 microM decreased the amplitude of IK(Ca) in most of the cells examined by 49 +/- 19% and 69 +/- 24%, respectively. 6. The results suggest that piracetam and GVS-111 suppression of voltage-activated calcium and potassium currents of the neuronal membrane may regulate (both up and down) Ca2+ influx into neurons.

Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kiazadeh, Asal; Universidade do Algarve, FCT, 8000-139 Faro; Gomes, Henrique L.

The impact of a parylene top-coating layer on the illumination and bias stress instabilities of indium-gallium-zinc oxide thin-film transistors (TFTs) is presented and discussed. The parylene coating substantially reduces the threshold voltage shift caused by continuous application of a gate bias and light exposure. The operational stability improves by 75%, and the light induced instability is reduced by 35%. The operational stability is quantified by fitting the threshold voltage shift with a stretched exponential model. Storage time as long as 7 months does not cause any measurable degradation on the electrical performance. It is proposed that parylene plays not onlymore » the role of an encapsulation layer but also of a defect passivation on the top semiconductor surface. It is also reported that depletion-mode TFTs are less sensitive to light induced instabilities. This is attributed to a defect neutralization process in the presence of free electrons.« less

1.5-V-threshold-voltage Schottky barrier normally-off AlGaN/GaN high-electron-mobility transistors with f T/f max of 41/125 GHz

NASA Astrophysics Data System (ADS)

Hou, Bin; Ma, Xiaohua; Yang, Ling; Zhu, Jiejie; Zhu, Qing; Chen, Lixiang; Mi, Minhan; Zhang, Hengshuang; Zhang, Meng; Zhang, Peng; Zhou, Xiaowei; Hao, Yue

2017-07-01

In this paper, a normally-off AlGaN/GaN high-electron-mobility transistors (HEMT) fabricated using inductively coupled plasma (ICP) CF4 plasma recessing and an implantation technique is reported. A gate-to-channel distance of ˜10 nm and an equivalent negative fluorine sheet charge density of -1.21 × 1013 cm-2 extracted using a simple threshold voltage (V th) analytical model result in a high V th of 1.5 V, a peak transconductance of 356 mS/mm, and a subthreshold slope of 133 mV/decade. A small degradation of channel mobility leads to a high RF performance with f T/f max of 41/125 GHz, resulting in a record high f T × L g product of 10.66 GHz·µm among Schottky barrier AlGaN/GaN normally-off HEMTs with V th exceeding 1 V, to the best of our knowledge.

Doped bottom-contact organic field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Shiyi; Billig, Paul; Al-Shadeedi, Akram; Kaphle, Vikash; Lüssem, Björn

2018-07-01

The influence of doping on doped bottom-gate bottom-contact organic field-effect transistors (OFETs) is discussed. It is shown that the inclusion of a doped layer at the dielectric/organic semiconductor layer leads to a significant reduction in the contact resistances and a fine control of the threshold voltage. Through varying the thickness of the doped layer, a linear shift of threshold voltage V T from ‑3.1 to ‑0.22 V is observed for increasing thickness of doped layer. Meanwhile, the contact resistance at the source and drain electrode is reduced from 138.8 MΩ at V GS = ‑10 V for 3 nm to 0.3 MΩ for 7 nm thick doped layers. Furthermore, an increase of charge mobility is observed for increasing thickness of doped layer. Overall, it is shown that doping can minimize injection barriers in bottom-contact OFETs with channel lengths in the micro-meter regime, which has the potential to increase the performance of this technology further.

Redundancy Technology With A Focused Ion Beam

NASA Astrophysics Data System (ADS)

Komano, Haruki; Hashimoto, Kazuhiko; Takigawa, Tadahiro

1989-08-01

Fuse cutting with a focused ion beam to activate redundancy circuits is proposed. In order to verify its potential usefulness, experiments have been performed. Fuse-cutting time was evaluated using aluminum fuses with a thin passivation layer, which are difficult to cut by conventional laser-beam technology due to the material's high reflectivity. The fuse width and thickness were 2 and 0.8 μm, respectively. The fuse was cut in 5 seconds with a 30 keV focused ion beam of 0.3 A/cm2 current density. Since the fuses used in DRAMs will be smaller, their cutting time will become shorter by scanning an ion beam on narrower areas. Moreover, it can be shortened by increasing current density. Fuses for redundancy technology in 256 k CMOS SRAMs were cut with a focused ion beam. The operation of the memories was checked with a memory tester. It was confirmed that memories which had failure cells operated normally after focused-ion-beam fuse-cutting. Focused ion beam irradiation effects upon a device have been studied. When a 30 keV gallium focused ion beam was irradiated near the gate of MOSFETs, a threshold voltage shift was not observed at an ion dose of 0.3 C/cm2 which corresponded to the ion dose in cutting a fuse. However, when irradiated on the gate, a threshold voltage shift was observed at ion doses of more than 8 x 10-4 C/cm2. The voltage shift was caused by the charge of ions within the passivation layer. It is necessary at least not to irradiate a focused ion beam on a device in cutting fuses. It is concluded that the focused-ion-beam method will be advantageous for future redundancy technology application.

Grafting voltage and pharmacological sensitivity in potassium channels.

PubMed

Lan, Xi; Fan, Chunyan; Ji, Wei; Tian, Fuyun; Xu, Tao; Gao, Zhaobing

2016-08-01

A classical voltage-gated ion channel consists of four voltage-sensing domains (VSDs). However, the roles of each VSD in the channels remain elusive. We developed a GVTDT (Graft VSD To Dimeric TASK3 channels that lack endogenous VSDs) strategy to produce voltage-gated channels with a reduced number of VSDs. TASK3 channels exhibit a high host tolerance to VSDs of various voltage-gated ion channels without interfering with the intrinsic properties of the TASK3 selectivity filter. The constructed channels, exemplified by the channels grafted with one or two VSDs from Kv7.1 channels, exhibit classical voltage sensitivity, including voltage-dependent opening and closing. Furthermore, the grafted Kv7.1 VSD transfers the potentiation activity of benzbromarone, an activator that acts on the VSDs of the donor channels, to the constructed channels. Our study indicates that one VSD is sufficient to voltage-dependently gate the pore and provides new insight into the roles of VSDs.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

PubMed

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-15

Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2

NASA Astrophysics Data System (ADS)

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-01

Top-gated and bottom-gated transistors with multilayer MoS2 channel fully encapsulated by stacked Al2O3/HfO2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on–off current ratio of 108, high field-effect mobility of 102 cm2 V‑1 s‑1, and low subthreshold swing of 93 mV dec–1. Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10‑3–10‑2 V MV–1 cm–1 after 6 MV cm‑1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS2 channel fully encapsulated by stacked Al2O3/HfO2 is a promising way to fabricate high-performance ML MoS2 field-effect transistors for practical electron device applications.

Photolithographically Patterned TiO2 Films for Electrolyte-Gated Transistors.

PubMed

Valitova, Irina; Kumar, Prajwal; Meng, Xiang; Soavi, Francesca; Santato, Clara; Cicoira, Fabio

2016-06-15

Metal oxides constitute a class of materials whose properties cover the entire range from insulators to semiconductors to metals. Most metal oxides are abundant and accessible at moderate cost. Metal oxides are widely investigated as channel materials in transistors, including electrolyte-gated transistors, where the charge carrier density can be modulated by orders of magnitude upon application of relatively low electrical bias (2 V). Electrolyte gating offers the opportunity to envisage new applications in flexible and printed electronics as well as to improve our current understanding of fundamental processes in electronic materials, e.g. insulator/metal transitions. In this work, we employ photolithographically patterned TiO2 films as channels for electrolyte-gated transistors. TiO2 stands out for its biocompatibility and wide use in sensing, electrochromics, photovoltaics and photocatalysis. We fabricated TiO2 electrolyte-gated transistors using an original unconventional parylene-based patterning technique. By using a combination of electrochemical and charge carrier transport measurements we demonstrated that patterning improves the performance of electrolyte-gated TiO2 transistors with respect to their unpatterned counterparts. Patterned electrolyte-gated (EG) TiO2 transistors show threshold voltages of about 0.9 V, ON/OFF ratios as high as 1 × 10(5), and electron mobility above 1 cm(2)/(V s).

Improved organic thin-film transistor performance using novel self-assembled monolayers

NASA Astrophysics Data System (ADS)

McDowell, M.; Hill, I. G.; McDermott, J. E.; Bernasek, S. L.; Schwartz, J.

2006-02-01

Pentacene-based organic thin-film transistors have been fabricated using a phosphonate-linked anthracene self-assembled monolayer as a buffer between the silicon dioxide gate dielectric and the active pentacene channel region. Vast improvements in the subthreshold slope and threshold voltage are observed compared to control devices fabricated without the buffer. Both observations are consistent with a greatly reduced density of charge trapping states at the semiconductor-dielectric interface effected by introduction of the self-assembled monolayer.

ISITE: Automatic Circuit Synthesis for Double-Metal CMOS VLSI (Very Large Scale Integrated) Circuits

DTIC Science & Technology

1989-12-01

rows and columns should be minimized. There are two methodologies for achieving this objective, namely, logic minimization to I I I 15 I A B C D E T...type and N-type polysilicon (Figure 2.5( b )) and interconnecting the gates with metal at a later I processing step. The two layers of aluminum available...polysiliconI ...... .. ... .. .. . .. ... .. ... .. I N polysilicon Iii~~iiiiiiii~~iiiiii (a) ( b ) 3 Figure 2.5. Controlling the Threshold Voltage in

Combine Flash-Based FPGA TID and Long-Term Retention Reliabilities Through VT Shift

NASA Astrophysics Data System (ADS)

Wang, Jih-Jong; Rezzak, Nadia; Dsilva, Durwyn; Xue, Fengliang; Samiee, Salim; Singaraju, Pavan; Jia, James; Nguyen, Victor; Hawley, Frank; Hamdy, Esmat

2016-08-01

Reliability test results of data retention and total ionizing dose (TID) in 65 nm Flash-based field programmable gate array (FPGA) are presented. Long-chain inverter design is recommended for reliability evaluation because it is the worst case design for both effects. Based on preliminary test data, both issues are unified and modeled by one natural decay equation. The relative contributions of TID induced threshold-voltage shift and retention mechanisms are evaluated by analyzing test data.

An All Oxide-Based Imperceptible Thin-Film Transistor with Humidity Sensing Properties

PubMed Central

Kim, Kyung Su; Ahn, Cheol Hyoun; Kang, Won Jun; Cho, Sung Woon; Jung, Sung Hyeon; Yoon, Dae Ho; Cho, Hyung Koun

2017-01-01

We have examined the effects of oxygen content and thickness in sputtered InSnO (ITO) electrodes, especially for the application of imperceptible amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs) in humidity sensors. The imperceptible a-IGZO TFT with 50-nm ITO electrodes deposited at Ar:O2 = 29:0.3 exhibited good electrical performances with Vth of −0.23 V, SS of 0.34 V/dec, µFE of 7.86 cm2/V∙s, on/off ratio of 8.8 × 107, and has no degradation for bending stress up to a 3.5-mm curvature. The imperceptible oxide TFT sensors showed the highest sensitivity for the low and wide gate bias of −1~2 V under a wide range of relative humidity (40–90%) at drain voltage 1 V, resulting in low power consumption by the sensors. Exposure to water vapor led to a negative shift in the threshold voltage (or current enhancement), and an increase in relative humidity induced continuous threshold voltage shift. In particular, compared to conventional resistor-type sensors, the imperceptible oxide TFT sensors exhibited extremely high sensitivity from a current amplification of >103. PMID:28772888

An All Oxide-Based Imperceptible Thin-Film Transistor with Humidity Sensing Properties.

PubMed

Kim, Kyung Su; Ahn, Cheol Hyoun; Kang, Won Jun; Cho, Sung Woon; Jung, Sung Hyeon; Yoon, Dae Ho; Cho, Hyung Koun

2017-05-13

We have examined the effects of oxygen content and thickness in sputtered InSnO (ITO) electrodes, especially for the application of imperceptible amorphous-InGaZnO ( a -IGZO) thin-film transistors (TFTs) in humidity sensors. The imperceptible a -IGZO TFT with 50-nm ITO electrodes deposited at Ar:O₂ = 29:0.3 exhibited good electrical performances with V th of -0.23 V, SS of 0.34 V/dec, µ FE of 7.86 cm²/V∙s, on/off ratio of 8.8 × 10⁷, and has no degradation for bending stress up to a 3.5-mm curvature. The imperceptible oxide TFT sensors showed the highest sensitivity for the low and wide gate bias of -1~2 V under a wide range of relative humidity (40-90%) at drain voltage 1 V, resulting in low power consumption by the sensors. Exposure to water vapor led to a negative shift in the threshold voltage (or current enhancement), and an increase in relative humidity induced continuous threshold voltage shift. In particular, compared to conventional resistor-type sensors, the imperceptible oxide TFT sensors exhibited extremely high sensitivity from a current amplification of >10³.

Heterojunction fully depleted SOI-TFET with oxide/source overlap

NASA Astrophysics Data System (ADS)

Chander, Sweta; Bhowmick, B.; Baishya, S.

2015-10-01

In this work, a hetero-junction fully depleted (FD) Silicon-on-Insulator (SOI) Tunnel Field Effect Transistor (TFET) nanostructure with oxide overlap on the Germanium-source region is proposed. Investigations using Synopsys Technology Computer Aided Design (TCAD) simulation tools reveal that the simple oxide overlap on the Germanium-source region increases the tunneling area as well as the tunneling current without degrading the band-to-band tunneling (BTBT) and improves the device performance. More importantly, the improvement is independent of gate overlap. Simulation study shows improvement in ON current, subthreshold swing (SS), OFF current, ION/IOFF ration, threshold voltage and transconductance. The proposed device with hafnium oxide (HfO2)/Aluminium Nitride (AlN) stack dielectric material offers an average subthreshold swing of 22 mV/decade and high ION/IOFF ratio (∼1010) at VDS = 0.4 V. Compared to conventional TFET, the Miller capacitance of the device shows the enhanced performance. The impact of the drain voltage variation on different parameters such as threshold voltage, subthreshold swing, transconductance, and ION/IOFF ration are also found to be satisfactory. From fabrication point of view also it is easy to utilize the existing CMOS process flows to fabricate the proposed device.

Crystalline ZrTiO{sub 4} gated p-metal–oxide–semiconductor field effect transistors with sub-nm equivalent oxide thickness featuring good electrical characteristics and reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Chao-Yi; Hsieh, Ching-Heng; Lee, Ching-Wei

2015-02-02

ZrTiO{sub 4} crystallized in orthorhombic (o-) phase was stacked with an amorphous Yb{sub 2}O{sub 3} interfacial layer as the gate dielectric for Si-based p-MOSFETs. With thermal annealing after gate electrode, the gate stack with equivalent oxide thickness (EOT) of 0.82 nm achieves high dielectric quality by showing a low interface trap density (D{sub it}) of 2.75 × 10{sup 11 }cm{sup −2}eV{sup −1} near the midgap and low oxide traps. Crystallization of ZrTiO{sub 4} and post metal annealing are also proven to introduce very limited amount of metal induced gap states or interfacial dipole. The p-MOSFETs exhibit good sub-threshold swing of 75 mV/dec which is ascribedmore » to the low D{sub it} value and small EOT. Owing to the Y{sub 2}O{sub 3} interfacial layer and smooth interface with Si substrate that, respectively, suppress phonon and surface roughness scattering, the p-MOSFETs also display high hole mobility of 49 cm{sup 2}/V-s at 1 MV/cm. In addition, I{sub on}/I{sub off} ratio larger than 10{sup 6} is also observed. From the reliability evaluation by negative bias temperature instability test, after stressing with an electric field of −10 MV/cm at 85 °C for 1000 s, satisfactory threshold voltage shift of 12 mV and sub-threshold swing degradation of 3% were obtained. With these promising characteristics, the Yb{sub 2}O{sub 3}/o-ZrTiO{sub 4} gate stack holds the great potential for next-generation electronics.« less

Atomic layer deposited TaCy metal gates: Impact on microstructure, electrical properties, and work function on HfO2 high-k dielectrics

NASA Astrophysics Data System (ADS)

Triyoso, D. H.; Gregory, R.; Schaeffer, J. K.; Werho, D.; Li, D.; Marcus, S.; Wilk, G. D.

2007-11-01

TaCy has been reported to have the appropriate work function for negative metal-oxide semiconductor metal in high-k metal-oxide field-effect transistors. As device size continues to shrink, a conformal deposition for metal gate electrodes is needed. In this work, we report on the development and characterization of a novel TaCy process by atomic layer deposition (ALD). Detailed physical properties of TaCy films are studied using ellipsometry, a four-point probe, Rutherford backscattering spectrometry (RBS), x-ray photoelectron spectroscopy (XPS), and x-ray diffraction (XRD). RBS and XPS analysis indicate that TaCy films are near-stoichiometric, nitrogen free, and have low oxygen impurities. Powder XRD spectra showed that ALD films have a cubic microstructure. XPS carbon bonding studies revealed that little or no glassy carbon is present in the bulk of the film. Excellent electrical properties are obtained using ALD TaCy as a metal gate electrode. Well-behaved capacitance-voltage characteristics with ALD HfO2 gate dielectrics are demonstrated for TaCy thicknesses of 50, 100, and 250 Å. A low fixed charge (˜2-4×10-11 cm-2) is observed for all ALD HfO2/ALD TaCy devices. Increasing the thickness of ALD TaCy results in a decrease in work function (4.77 to 4.54 eV) and lower threshold voltages.

Inrush Current Suppression Circuit and Method for Controlling When a Load May Be Fully Energized

NASA Technical Reports Server (NTRS)

Schwerman, Paul (Inventor)

2017-01-01

A circuit and method for controlling when a load may be fully energized includes directing electrical current through a current limiting resistor that has a first terminal connected to a source terminal of a field effect transistor (FET), and a second terminal connected to a drain terminal of the FET. The gate voltage magnitude on a gate terminal of the FET is varied, whereby current flow through the FET is increased while current flow through the current limiting resistor is simultaneously decreased. A determination is made as to when the gate voltage magnitude on the gate terminal is equal to or exceeds a predetermined reference voltage magnitude, and the load is enabled to be fully energized when the gate voltage magnitude is equal to or exceeds the predetermined reference voltage magnitude.

Analysis and Modeling of Fullerene Single Electron Transistor Based on Quantum Dot Arrays at Room Temperature

NASA Astrophysics Data System (ADS)

Khadem Hosseini, Vahideh; Ahmadi, Mohammad Taghi; Ismail, Razali

2018-05-01

The single electron transistor (SET) as a fast electronic device is a candidate for future nanoscale circuits because of its low energy consumption, small size and simplified circuit. It consists of source and drain electrodes with a quantum dot (QD) located between them. Moreover, it operates based on the Coulomb blockade (CB) effect. It occurs when the charging energy is greater than the thermal energy. Consequently, this condition limits SET operation at cryogenic temperatures. Hence, using QD arrays can overcome this temperature limitation in SET which can therefore work at room temperature but QD arrays increase the threshold voltage with is an undesirable effect. In this research, fullerene as a zero-dimensional material with unique properties such as quantum capacitance and high critical temperature has been selected for the material of the QDs. Moreover, the current of a fullerene QD array SET has been modeled and its threshold voltage is also compared with a silicon QD array SET. The results show that the threshold voltage of fullerene SET is lower than the silicon one. Furthermore, the comparison study shows that homogeneous linear QD arrays have a lower CB range and better operation than a ring QD array SET. Moreover, the effect of the number of QDs in a QD array SET is investigated. The result confirms that the number of QDs can directly affect the CB range. Moreover, the desired current can be achieved by controlling the applied gate voltage and island diameters in a QD array SET.

Voltage-sensing domain of voltage-gated proton channel Hv1 shares mechanism of block with pore domains.

PubMed

Hong, Liang; Pathak, Medha M; Kim, Iris H; Ta, Dennis; Tombola, Francesco

2013-01-23

Voltage-gated sodium, potassium, and calcium channels are made of a pore domain (PD) controlled by four voltage-sensing domains (VSDs). The PD contains the ion permeation pathway and the activation gate located on the intracellular side of the membrane. A large number of small molecules are known to inhibit the PD by acting as open channel blockers. The voltage-gated proton channel Hv1 is made of two VSDs and lacks the PD. The location of the activation gate in the VSD is unknown and open channel blockers for VSDs have not yet been identified. Here, we describe a class of small molecules which act as open channel blockers on the Hv1 VSD and find that a highly conserved phenylalanine in the charge transfer center of the VSD plays a key role in blocker binding. We then use one of the blockers to show that Hv1 contains two intracellular and allosterically coupled gates. Copyright © 2013 Elsevier Inc. All rights reserved.

Organic thin film transistors using a liquid crystalline palladium phthalocyanine as active layer

NASA Astrophysics Data System (ADS)

Jiménez Tejada, Juan A.; Lopez-Varo, Pilar; Chaure, Nandu B.; Chambrier, Isabelle; Cammidge, Andrew N.; Cook, Michael J.; Jafari-Fini, Ali; Ray, Asim K.

2018-03-01

70 nm thick solution-processed films of a palladium phthalocyanine (PdPc6) derivative bearing eight hexyl (-C6H13) chains at non-peripheral positions have been employed as active layers in the fabrication of bottom-gate bottom-contact organic thin film transistors (OTFTs) deposited on highly doped p-type Si (110) substrates with SiO2 gate dielectric. The dependence of the transistor electrical performance upon the mesophase behavior of the PdPc6 films has been investigated by measuring the output and transfer characteristics of the OTFT having its active layer ex situ vacuum annealed at temperatures between 500 °C and 200 °C. A clear correlation between the annealing temperature and the threshold voltage and carrier mobility of the transistors, and the transition temperatures extracted from the differential scanning calorimetric curves for bulk materials has been established. This direct relation has been obtained by means of a compact electrical model in which the contact effects are taken into account. The precise determination of the contact-voltage drain-current curves allows for obtaining such a relation.

Normally-off p-GaN/AlGaN/GaN high electron mobility transistors using hydrogen plasma treatment

NASA Astrophysics Data System (ADS)

Hao, Ronghui; Fu, Kai; Yu, Guohao; Li, Weiyi; Yuan, Jie; Song, Liang; Zhang, Zhili; Sun, Shichuang; Li, Xiajun; Cai, Yong; Zhang, Xinping; Zhang, Baoshun

2016-10-01

In this letter, we report a method by introducing hydrogen plasma treatment to realize normally-off p-GaN/AlGaN/GaN HEMT devices. Instead of using etching technology, hydrogen plasma was adopted to compensate holes in the p-GaN above the two dimensional electron gas (2DEG) channel to release electrons in the 2DEG channel and form high-resistivity area to reduce leakage current and increase gate control capability. The fabricated p-GaN/AlGaN/GaN HEMT exhibits normally-off operation with a threshold voltage of 1.75 V, a subthreshold swing of 90 mV/dec, a maximum transconductance of 73.1 mS/mm, an ON/OFF ratio of 1 × 107, a breakdown voltage of 393 V, and a maximum drain current density of 188 mA/mm at a gate bias of 6 V. The comparison of the two processes of hydrogen plasma treatment and p-GaN etching has also been made in this work.

EFFECTS OF SUBSCUTE EXPOSURE TO NANOMOLAR CONCENTRATIONS OF METHYLMERCURY ON VOLTAGE-GATES SODIUM AND CALCIUM CURRENTS IN PC12 CELLS.

EPA Science Inventory

Methylmercury (CH3Hg+) alters the function of voltage-gated Na+ and Ca2+ channels in neuronal preparations following acute, in vitro, exposure. Because the developing nervous system is particularly sensitive to CH3Hg+ neurotoxicity, effects on voltage-gated Na+ (INa) and Ca2+ (IC...

Side-gate modulation effects on high-quality BN-Graphene-BN nanoribbon capacitors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Yang; Chen, Xiaolong; Ye, Weiguang

High-quality BN-Graphene-BN nanoribbon capacitors with double side-gates of graphene have been experimentally realized. The double side-gates can effectively modulate the electronic properties of graphene nanoribbon capacitors. By applying anti-symmetric side-gate voltages, we observed significant upward shifting and flattening of the V-shaped capacitance curve near the charge neutrality point. Symmetric side-gate voltages, however, only resulted in tilted upward shifting along the opposite direction of applied gate voltages. These modulation effects followed the behavior of graphene nanoribbons predicted theoretically for metallic side-gate modulation. The negative quantum capacitance phenomenon predicted by numerical simulations for graphene nanoribbons modulated by graphene side-gates was not observed,more » possibly due to the weakened interactions between the graphene nanoribbon and side-gate electrodes caused by the Ga{sup +} beam etching process.« less

Influence of gate width on gate-channel carrier mobility in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Yang, Ming; Ji, Qizheng; Gao, Zhiliang; Zhang, Shufeng; Lin, Zhaojun; Yuan, Yafei; Song, Bo; Mei, Gaofeng; Lu, Ziwei; He, Jihao

2017-11-01

For the fabricated AlGaN/GaN heterostructure field-effect transistors (HFETs) with different gate widths, the gate-channel carrier mobility is experimentally obtained from the measured current-voltage and capacitance-voltage curves. Under each gate voltage, the mobility gets lower with gate width increasing. Analysis shows that the phenomenon results from the polarization Coulomb field (PCF) scattering, which originates from the irregularly distributed polarization charges at the AlGaN/GaN interface. The device with a larger gate width is with a larger PCF scattering potential and a stronger PCF scattering intensity. As a function of gate width, PCF scattering potential shows a same trend with the mobility variation. And the theoretically calculated mobility values fits well with the experimentally obtained values. Varying gate widths will be a new perspective for the improvement of device characteristics by modulating the gate-channel carrier mobility.

Improvement of Self-Heating of Indium Gallium Zinc Aluminum Oxide Thin-Film Transistors Using Al2O3 Barrier Layer

NASA Astrophysics Data System (ADS)

Jian, Li-Yi; Lee, Hsin-Ying; Lin, Yung-Hao; Lee, Ching-Ting

2018-02-01

To study the self-heating effect, aluminum oxide (Al2O3) barrier layers of various thicknesses have been inserted between the channel layer and insulator layer in bottom-gate-type indium gallium zinc aluminum oxide (IGZAO) thin-film transistors (TFTs). Each IGZAO channel layer was deposited on indium tin oxide (ITO)-coated glass substrate by using a magnetron radiofrequency cosputtering system with dual targets composed of indium gallium zinc oxide (IGZO) and Al. The 3 s orbital of Al cation provided an extra transport pathway and widened the conduction-band bottom, thus increasing the electron mobility of the IGZAO films. The Al-O bonds were able to sustain the oxygen stability of the IGZAO films. The self-heating behavior of the resulting IGZAO TFTs was studied by Hall measurements on the IGZAO films as well as the electrical performance of the IGZAO TFTs with Al2O3 barrier layers of various thicknesses at different temperatures. IGZAO TFTs with 50-nm-thick Al2O3 barrier layer were stressed by positive gate bias stress (PGBS, at gate-source voltage V GS = 5 V and drain-source voltage V DS = 0 V); at V GS = 5 V and V DS = 10 V, the threshold voltage shifts were 0.04 V and 0.2 V, respectively, much smaller than for the other IGZAO TFTs without Al2O3 barrier layer, which shifted by 0.2 V and 1.0 V when stressed under the same conditions.

Direct Interaction between the Voltage Sensors Produces Cooperative Sustained Deactivation in Voltage-gated H+ Channel Dimers*

PubMed Central

Okuda, Hiroko; Yonezawa, Yasushige; Takano, Yu; Okamura, Yasushi; Fujiwara, Yuichiro

2016-01-01

The voltage-gated H+ channel (Hv) is a voltage sensor domain-like protein consisting of four transmembrane segments (S1–S4). The native Hv structure is a homodimer, with the two channel subunits functioning cooperatively. Here we show that the two voltage sensor S4 helices within the dimer directly cooperate via a π-stacking interaction between Trp residues at the middle of each segment. Scanning mutagenesis showed that Trp situated around the original position provides the slow gating kinetics characteristic of the dimer's cooperativity. Analyses of the Trp mutation on the dimeric and monomeric channel backgrounds and analyses with tandem channel constructs suggested that the two Trp residues within the dimer are functionally coupled during Hv deactivation but are less so during activation. Molecular dynamics simulation also showed direct π-stacking of the two Trp residues. These results provide new insight into the cooperative function of voltage-gated channels, where adjacent voltage sensor helices make direct physical contact and work as a single unit according to the gating process. PMID:26755722

Stabilization of the Activated hERG Channel Voltage Sensor by Depolarization Involves the S4-S5 Linker.

PubMed

Thouta, Samrat; Hull, Christina M; Shi, Yu Patrick; Sergeev, Valentine; Young, James; Cheng, Yen M; Claydon, Thomas W

2017-01-24

Slow deactivation of hERG channels is critical for preventing cardiac arrhythmia yet the mechanistic basis for the slow gating transition is unclear. Here, we characterized the temporal sequence of events leading to voltage sensor stabilization upon membrane depolarization. Progressive increase in step depolarization duration slowed voltage-sensor return in a biphasic manner (τ fast = 34 ms, τ slow  = 2.5 s). The faster phase of voltage-sensor return slowing correlated with the kinetics of pore opening. The slower component occurred over durations that exceeded channel activation and was consistent with voltage sensor relaxation. The S4-S5 linker mutation, G546L, impeded the faster phase of voltage sensor stabilization without attenuating the slower phase, suggesting that the S4-S5 linker is important for communications between the pore gate and the voltage sensor during deactivation. These data also demonstrate that the mechanisms of pore gate-opening-induced and relaxation-induced voltage-sensor stabilization are separable. Deletion of the distal N-terminus (Δ2-135) accelerated off-gating current, but did not influence the relative contribution of either mechanism of stabilization of the voltage sensor. Lastly, we characterized mode-shift behavior in hERG channels, which results from stabilization of activated channel states. The apparent mode-shift depended greatly on recording conditions. By measuring slow activation and deactivation at steady state we found the "true" mode-shift to be ∼15 mV. Interestingly, the "true" mode-shift of gating currents was ∼40 mV, much greater than that of the pore gate. This demonstrates that voltage sensor return is less energetically favorable upon repolarization than pore gate closure. We interpret this to indicate that stabilization of the activated voltage sensor limits the return of hERG channels to rest. The data suggest that this stabilization occurs as a result of reconfiguration of the pore gate upon opening by a mechanism that is influenced by the S4-S5 linker, and by a separable voltage-sensor intrinsic relaxation mechanism. Copyright © 2017 Biophysical Society. Published by Elsevier Inc. All rights reserved.

Effect of nanocomposite gate-dielectric properties on pentacene microstructure and field-effect transistor characteristics.

PubMed

Lee, Wen-Hsi; Wang, Chun-Chieh

2010-02-01

In this study, the effect of surface energy and roughness of the nanocomposite gate dielectric on pentacene morphology and electrical properties of pentacene OTFT are reported. Nanoparticles TiO2 were added in the polyimide matrix to form a nanocomposite which has a significantly different surface characteristic from polyimide, leading to a discrepancy in the structural properties of pentacene growth. A growth mode of pentacene deposited on the nanocomposite is proposed to explain successfully the effect of surface properties of nanocomposite gate dielectric such as surface energy and roughness on the pentacene morphology and electrical properties of OTFT. To obtain the lower surface energy and smoother surface of nanocomposite gate dielectric that is responsible for the desired crystalline, microstructure of pentacene and electrical properties of device, a bottom contact OTFT-pentacene deposited on the double-layer nanocomposite gate dielectric consisting of top smoothing layer of the neat polyimide and bottom layer of (PI+ nano-TiO2 particles) nanocomposite has been successfully demonstrated to exhibit very promising performance including high current on to off ratio of about 6 x 10(5), threshold voltage of -10 V and moderately high filed mobility of 0.15 cm2V(-1)s(-1).

Signaling complexes of voltage-gated calcium channels

PubMed Central

Turner, Ray W; Anderson, Dustin

2011-01-01

Voltage-gated calcium channels are key mediators of depolarization induced calcium entry into electrically excitable cells. There is increasing evidence that voltage-gated calcium channels, like many other types of ionic channels, do not operate in isolation, but instead form complexes with signaling molecules, G protein coupled receptors, and other types of ion channels. Furthermore, there appears to be bidirectional signaling within these protein complexes, thus allowing not only for efficient translation of calcium signals into cellular responses, but also for tight control of calcium entry per se. In this review, we will focus predominantly on signaling complexes between G protein-coupled receptors and high voltage activated calcium channels, and on complexes of voltage-gated calcium channels and members of the potassium channel superfamily. PMID:21832880

Interpreting anomalies observed in oxide semiconductor TFTs under negative and positive bias stress

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jin, Jong Woo; Nathan, Arokia, E-mail: an299@cam.ac.uk; Barquinha, Pedro

2016-08-15

Oxide semiconductor thin-film transistors can show anomalous behavior under bias stress. Two types of anomalies are discussed in this paper. The first is the shift in threshold voltage (V{sub TH}) in a direction opposite to the applied bias stress, and highly dependent on gate dielectric material. We attribute this to charge trapping/detrapping and charge migration within the gate dielectric. We emphasize the fundamental difference between trapping/detrapping events occurring at the semiconductor/dielectric interface and those occurring at gate/dielectric interface, and show that charge migration is essential to explain the first anomaly. We model charge migration in terms of the non-instantaneous polarizationmore » density. The second type of anomaly is negative V{sub TH} shift under high positive bias stress, with logarithmic evolution in time. This can be argued as electron-donating reactions involving H{sub 2}O molecules or derived species, with a reaction rate exponentially accelerated by positive gate bias and exponentially decreased by the number of reactions already occurred.« less

Gate insulator effects on the electrical performance of ZnO thin film transistor on a polyethersulphone substrate.

PubMed

Lee, Jae-Kyu; Choi, Duck-Kyun

2012-07-01

Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.

Ether-à-go-go family voltage-gated K+ channels evolved in an ancestral metazoan and functionally diversified in a cnidarian-bilaterian ancestor.

PubMed

Li, Xiaofan; Martinson, Alexandra S; Layden, Michael J; Diatta, Fortunay H; Sberna, Anna P; Simmons, David K; Martindale, Mark Q; Jegla, Timothy J

2015-02-15

We examined the evolutionary origins of the ether-à-go-go (EAG) family of voltage-gated K(+) channels, which have a strong influence on the excitability of neurons. The bilaterian EAG family comprises three gene subfamilies (Eag, Erg and Elk) distinguished by sequence conservation and functional properties. Searches of genome sequence indicate that EAG channels are metazoan specific, appearing first in ctenophores. However, phylogenetic analysis including two EAG family channels from the ctenophore Mnemiopsis leidyi indicates that the diversification of the Eag, Erg and Elk gene subfamilies occurred in a cnidarian/bilaterian ancestor after divergence from ctenophores. Erg channel function is highly conserved between cnidarians and mammals. Here we show that Eag and Elk channels from the sea anemone Nematostella vectensis (NvEag and NvElk) also share high functional conservation with mammalian channels. NvEag, like bilaterian Eag channels, has rapid kinetics, whereas NvElk activates at extremely hyperpolarized voltages, which is characteristic of Elk channels. Potent inhibition of voltage activation by extracellular protons is conserved between mammalian and Nematostella EAG channels. However, characteristic inhibition of voltage activation by Mg(2+) in Eag channels and Ca(2+) in Erg channels is reduced in Nematostella because of mutation of a highly conserved aspartate residue in the voltage sensor. This mutation may preserve sub-threshold activation of Nematostella Eag and Erg channels in a high divalent cation environment. mRNA in situ hybridization of EAG channels in Nematostella suggests that they are differentially expressed in distinct cell types. Most notable is the expression of NvEag in cnidocytes, a cnidarian-specific stinging cell thought to be a neuronal subtype. © 2015. Published by The Company of Biologists Ltd.

Modulation of voltage- and Ca2+-dependent gating of CaV1.3 L-type calcium channels by alternative splicing of a C-terminal regulatory domain.

PubMed

Singh, Anamika; Gebhart, Mathias; Fritsch, Reinhard; Sinnegger-Brauns, Martina J; Poggiani, Chiara; Hoda, Jean-Charles; Engel, Jutta; Romanin, Christoph; Striessnig, Jörg; Koschak, Alexandra

2008-07-25

Low voltage activation of Ca(V)1.3 L-type Ca(2+) channels controls excitability in sensory cells and central neurons as well as sinoatrial node pacemaking. Ca(V)1.3-mediated pacemaking determines neuronal vulnerability of dopaminergic striatal neurons affected in Parkinson disease. We have previously found that in Ca(V)1.4 L-type Ca(2+) channels, activation, voltage, and calcium-dependent inactivation are controlled by an intrinsic distal C-terminal modulator. Because alternative splicing in the Ca(V)1.3 alpha1 subunit C terminus gives rise to a long (Ca(V)1.3(42)) and a short form (Ca(V)1.3(42A)), we investigated if a C-terminal modulatory mechanism also controls Ca(V)1.3 gating. The biophysical properties of both splice variants were compared after heterologous expression together with beta3 and alpha2delta1 subunits in HEK-293 cells. Activation of calcium current through Ca(V)1.3(42A) channels was more pronounced at negative voltages, and inactivation was faster because of enhanced calcium-dependent inactivation. By investigating several Ca(V)1.3 channel truncations, we restricted the modulator activity to the last 116 amino acids of the C terminus. The resulting Ca(V)1.3(DeltaC116) channels showed gating properties similar to Ca(V)1.3(42A) that were reverted by co-expression of the corresponding C-terminal peptide C(116). Fluorescence resonance energy transfer experiments confirmed an intramolecular protein interaction in the C terminus of Ca(V)1.3 channels that also modulates calmodulin binding. These experiments revealed a novel mechanism of channel modulation enabling cells to tightly control Ca(V)1.3 channel activity by alternative splicing. The absence of the C-terminal modulator in short splice forms facilitates Ca(V)1.3 channel activation at lower voltages expected to favor Ca(V)1.3 activity at threshold voltages as required for modulation of neuronal firing behavior and sinoatrial node pacemaking.

Monolithic integration of a vertical cavity surface emitting laser and a metal semiconductor field effect transistor

NASA Astrophysics Data System (ADS)

Yang, Y. J.; Dziura, T. G.; Bardin, T.; Wang, S. C.; Fernandez, R.; Liao, Andrew S. H.

1993-02-01

Monolithic integration of a vertical cavity surface emitting laser (VCSEL) and a metal semiconductor field effect transistor (MESFET) is reported for the first time. The epitaxial layers for both GaAs VCSELs and MESFETs are grown on an n-type GaAs substrate by molecular-beam epitaxy at the same time. The VCSELs with a 10-micron diam active region exhibit an average threshold current (Ith) of 6 mA and a continuous wave (CW) maximum power of 1.1 mW. The MESFETs with a 3-micron gate length have a transconductance of 50 mS/mm. The laser output is modulated by the gate voltage of the MESFETs and exhibits an optical/electrical conversion factor of 0.5 mW/V.

Cytoplasmic Domains and Voltage-Dependent Potassium Channel Gating

PubMed Central

Barros, Francisco; Domínguez, Pedro; de la Peña, Pilar

2012-01-01

The basic architecture of the voltage-dependent K+ channels (Kv channels) corresponds to a transmembrane protein core in which the permeation pore, the voltage-sensing components and the gating machinery (cytoplasmic facing gate and sensor–gate coupler) reside. Usually, large protein tails are attached to this core, hanging toward the inside of the cell. These cytoplasmic regions are essential for normal channel function and, due to their accessibility to the cytoplasmic environment, constitute obvious targets for cell-physiological control of channel behavior. Here we review the present knowledge about the molecular organization of these intracellular channel regions and their role in both setting and controlling Kv voltage-dependent gating properties. This includes the influence that they exert on Kv rapid/N-type inactivation and on activation/deactivation gating of Shaker-like and eag-type Kv channels. Some illustrative examples about the relevance of these cytoplasmic domains determining the possibilities for modulation of Kv channel gating by cellular components are also considered. PMID:22470342

High-performance SEGISFET pH Sensor using the structure of double-gate a-IGZO TFTs with engineered gate oxides

NASA Astrophysics Data System (ADS)

Pyo, Ju-Young; Cho, Won-Ju

2017-03-01

In this paper, we propose a high-performance separative extended gate ion-sensitive field-effect transistor (SEGISFET) that consists of a tin dioxide (SnO2) SEG sensing part and a double-gate structure amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with tantalum pentoxide/silicon dioxide (Ta2O5/SiO2)-engineered top-gate oxide. To increase sensitivity, we maximized the capacitive coupling ratio by applying high-k dielectric at the top-gate oxide layer. As an engineered top-gate oxide, a stack of 25 nm-thick Ta2O5 and 10 nm-thick SiO2 layers was found to simultaneously satisfy a small equivalent oxide thickness (˜17.14 nm), a low leakage current, and a stable interfacial property. The threshold-voltage instability, which is a fundamental issue in a-IGZO TFTs, was improved by low-temperature post-deposition annealing (˜87 °C) using microwave irradiation. The double-gate structure a-IGZO TFTs with engineered top-gate oxide exhibited high mobility, small subthreshold swing, high drive current, and larger on/off current ratio. The a-IGZO SEGISFETs with a dual-gate sensing mode showed a pH sensitivity of 649.04 mV pH-1, which is far beyond the Nernst limit. The non-ideal behavior of ISFETs, hysteresis, and drift effect also improved. These results show that the double-gate structure a-IGZO TFTs with engineered top-gate oxide can be a good candidate for cheap and disposable SEGISFET sensors.

Gating mechanism of Kv11.1 (hERG) K+ channels without covalent connection between voltage sensor and pore domains.

PubMed

de la Peña, Pilar; Domínguez, Pedro; Barros, Francisco

2018-03-01

Kv11.1 (hERG, KCNH2) is a voltage-gated potassium channel crucial in setting the cardiac rhythm and the electrical behaviour of several non-cardiac cell types. Voltage-dependent gating of Kv11.1 can be reconstructed from non-covalently linked voltage sensing and pore modules (split channels), challenging classical views of voltage-dependent channel activation based on a S4-S5 linker acting as a rigid mechanical lever to open the gate. Progressive displacement of the split position from the end to the beginning of the S4-S5 linker induces an increasing negative shift in activation voltage dependence, a reduced z g value and a more negative ΔG 0 for current activation, an almost complete abolition of the activation time course sigmoid shape and a slowing of the voltage-dependent deactivation. Channels disconnected at the S4-S5 linker near the S4 helix show a destabilization of the closed state(s). Furthermore, the isochronal ion current mode shift magnitude is clearly reduced in the different splits. Interestingly, the progressive modifications of voltage dependence activation gating by changing the split position are accompanied by a shift in the voltage-dependent availability to a methanethiosulfonate reagent of a Cys introduced at the upper S4 helix. Our data demonstrate for the first time that alterations in the covalent connection between the voltage sensor and the pore domains impact on the structural reorganizations of the voltage sensor domain. Also, they support the hypothesis that the S4-S5 linker integrates signals coming from other cytoplasmic domains that constitute either an important component or a crucial regulator of the gating machinery in Kv11.1 and other KCNH channels.

Low voltage operation of GaN vertical nanowire MOSFET

NASA Astrophysics Data System (ADS)

Son, Dong-Hyeok; Jo, Young-Woo; Seo, Jae Hwa; Won, Chul-Ho; Im, Ki-Sik; Lee, Yong Soo; Jang, Hwan Soo; Kim, Dae-Hyun; Kang, In Man; Lee, Jung-Hee

2018-07-01

GaN gate-all-around (GAA) vertical nanowire MOSFET (VNWMOSFET) with channel length of 300 nm and diameter of 120 nm, the narrowest GaN-based vertical nanowire transistor ever achieved from the top-down approach, was fabricated by utilizing anisotropic side-wall wet etching in TMAH solution and photoresist etch-back process. The VNWMOSFET exhibited output characteristics with very low saturation drain voltage of less than 0.5 V, which is hardly observed from the wide bandgap-based devices. Simulation results indicated that the narrow diameter of the VNWMOSFET with relatively short channel length is responsible for the low voltage operation. The VNWMOSFET also demonstrated normally-off mode with threshold voltage (VTH) of 0.7 V, extremely low leakage current of ∼10-14 A, low drain-induced barrier lowering (DIBL) of 125 mV/V, and subthreshold swing (SS) of 66-122 mV/decade. The GaN GAA VNWMOSFET with narrow channel diameter investigated in this work would be promising for new low voltage logic application. He has been a Professor with the School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu, Korea, since 1993

Multiple pore conformations driven by asynchronous movements of voltage sensors in a eukaryotic sodium channel

PubMed Central

Goldschen-Ohm, Marcel P.; Capes, Deborah L.; Oelstrom, Kevin M.; Chanda, Baron

2013-01-01

Voltage-dependent Na+ channels are crucial for electrical signalling in excitable cells. Membrane depolarization initiates asynchronous movements in four non-identical voltage-sensing domains of the Na+ channel. It remains unclear to what extent this structural asymmetry influences pore gating as compared with outwardly rectifying K+ channels, where channel opening results from a final concerted transition of symmetric pore gates. Here we combine single channel recordings, cysteine accessibility and voltage clamp fluorimetry to probe the relationships between voltage sensors and pore conformations in an inactivation deficient Nav1.4 channel. We observe three distinct conductance levels such that DI-III voltage sensor activation is kinetically correlated with formation of a fully open pore, whereas DIV voltage sensor movement underlies formation of a distinct subconducting pore conformation preceding inactivation in wild-type channels. Our experiments reveal that pore gating in sodium channels involves multiple transitions driven by asynchronous movements of voltage sensors. These findings shed new light on the mechanism of coupling between activation and fast inactivation in voltage-gated sodium channels. PMID:23322038

Chiral tunneling modulated by a time-periodic potential on the surface states of a topological insulator

PubMed Central

Li, Yuan; Jalil, Mansoor B. A.; Tan, S. G.; Zhao, W.; Bai, R.; Zhou, G. H.

2014-01-01

Time-periodic perturbation can be used to modify the transport properties of the surface states of topological insulators, specifically their chiral tunneling property. Using the scattering matrix method, we study the tunneling transmission of the surface states of a topological insulator under the influence of a time-dependent potential and finite gate bias voltage. It is found that perfect transmission is obtained for electrons which are injected normally into the time-periodic potential region in the absence of any bias voltage. However, this signature of Klein tunneling is destroyed when a bias voltage is applied, with the transmission probability of normally incident electrons decreasing with increasing gate bias voltage. Likewise, the overall conductance of the system decreases significantly when a gate bias voltage is applied. The characteristic left-handed helicity of the transmitted spin polarization is also broken by the finite gate bias voltage. In addition, the time-dependent potential modifies the large-angle transmission profile, which exhibits an oscillatory or resonance-like behavior. Finally, time-dependent transport modes (with oscillating potential in the THz frequency) can result in enhanced overall conductance, irrespective of the presence or absence of the gate bias voltage. PMID:24713634

Organic Field Effect Transistor Using Amorphous Fluoropolymer as Gate Insulating Film

NASA Astrophysics Data System (ADS)

Kitajima, Yosuke; Kojima, Kenzo; Mizutani, Teruyoshi; Ochiai, Shizuyasu

Organic field effect transistors are fabricated by the active layer of Regioregular poly (3-hexylthiophene-2,5-diy)(P3HT) thin film. CYTOP thin film made from Amorphous Fluoropolymer and fabricated by spin-coating is adopted to a gate dielectric layer on Polyethylenenaphthalate (PEN) thin film that is the substrate of an organic field effect transistor. The surface morphology and molecular orientation of P3HT thin films is observed by atomic force microscope (AFM) and X-Ray diffractometer (XRD). Grains are observed on the CYTOP thin film via an AFM image and the P3HT molecule is oriented perpendicularly on the CYTOP thin film. Based on the performance of the organic field effect transistor, the carrier mobility is 0.092 cm2/Vs, the ON/OFF ratio is 7, and the threshold voltage is -12 V. The ON/OFF ratio is relatively low and to improve On/Off ratio, the CYTOP/Polyimide double gate insulating layer is adopted to OFET.

Effects of vacuum rapid thermal annealing on the electrical characteristics of amorphous indium gallium zinc oxide thin films

NASA Astrophysics Data System (ADS)

Lee, Hyun-Woo; Cho, Won-Ju

2018-01-01

We investigated the effects of vacuum rapid thermal annealing (RTA) on the electrical characteristics of amorphous indium gallium zinc oxide (a-IGZO) thin films. The a-IGZO films deposited by radiofrequency sputtering were subjected to vacuum annealing under various temperature and pressure conditions with the RTA system. The carrier concentration was evaluated by Hall measurement; the electron concentration of the a-IGZO film increased and the resistivity decreased as the RTA temperature increased under vacuum conditions. In a-IGZO thin-film transistors (TFTs) with a bottom-gate top-contact structure, the threshold voltage decreased and the leakage current increased as the vacuum RTA temperature increased. As the annealing pressure decreased, the threshold voltage decreased, and the leakage current increased. X-ray photoelectron spectroscopy indicated changes in the lattice oxygen and oxygen vacancies of the a-IGZO films after vacuum RTA. At higher annealing temperatures, the lattice oxygen decreased and oxygen vacancies increased, which suggests that oxygen was diffused out in a reduced pressure atmosphere. The formation of oxygen vacancies increased the electron concentration, which consequently increased the conductivity of the a-IGZO films and reduced the threshold voltage of the TFTs. The results showed that the oxygen vacancies and electron concentrations of the a-IGZO thin films changed with the vacuum RTA conditions and that high-temperature RTA treatment at low pressure converted the IGZO thin film to a conductor.

Contribution of Sialic Acid to the Voltage Dependence of Sodium Channel Gating

PubMed Central

Bennett, Eric; Urcan, Mary S.; Tinkle, Sally S.; Koszowski, Adam G.; Levinson, Simon R.

1997-01-01

A potential role for sialic acid in the voltage-dependent gating of rat skeletal muscle sodium channels (rSkM1) was investigated using Chinese hamster ovary (CHO) cells stably transfected with rSkM1. Changes in the voltage dependence of channel gating were observed after enzymatic (neuraminidase) removal of sialic acid from cells expressing rSkM1 and through the expression of rSkM1 in a sialylation-deficient cell line (lec2). The steady-state half-activation voltages (Va) of channels under each condition of reduced sialylation were ∼10 mV more depolarized than control channels. The voltage dependence of the time constants of channel activation and inactivation were also shifted in the same direction and by a similar magnitude. In addition, recombinant deletion of likely glycosylation sites from the rSkM1 sequence resulted in mutant channels that gated at voltages up to 10 mV more positive than wild-type channels. Thus three independent means of reducing channel sialylation show very similar effects on the voltage dependence of channel gating. Finally, steady-state activation voltages for channels subjected to reduced sialylation conditions were much less sensitive to the effects of external calcium than those measured under control conditions, indicating that sialic acid directly contributes to the negative surface potential. These results are consistent with an electrostatic mechanism by which external, negatively charged sialic acid residues on rSkM1 alter the electric field sensed by channel gating elements. PMID:9089440

Transport Properties of Anatase-TiO2 Polycrystalline-Thin-Film Field-Effect Transistors with Electrolyte Gate Layers

NASA Astrophysics Data System (ADS)

Horita, Ryohei; Ohtani, Kyosuke; Kai, Takahiro; Murao, Yusuke; Nishida, Hiroya; Toya, Taku; Seo, Kentaro; Sakai, Mio; Okuda, Tetsuji

2013-11-01

We have fabricated anatase-TiO2 polycrystalline-thin-film field-effect transistors (FETs) with poly(vinyl alcohol) (PVA), ion-liquid (IL), and ion-gel (IG) gate layers, and have tried to improve the response to gate voltage by varying the concentration of mobile ions in these electrolyte gate layers. The increase in the concentration of mobile ions by doping NaOH into the PVA gate layer or reducing the gelator in the IG gate layer markedly increases the drain-source current and reduces the driving gate voltage, which show that the mobile ions in the PVA, IL, and IG gate layers cause the formation of electric double layers (EDLs), which act as nanogap capacitors. In these TiO2-EDL-FETs, the slow formation of EDLs and the oxidation reaction at the interface between the surface of the TiO2 film and the electrolytes cause unideal FET properties. In the optimized IL and IG TiO2-EDL-FETs, the driving gate voltage is less than 1 V and the ON/OFF ratios of the transfer characteristics are about 1×104 at RT, and the nearly metallic state is realized at the interface purely by applying a gate voltage.

Voltage-Gated Sodium Channels: Evolutionary History and Distinctive Sequence Features.

PubMed

Kasimova, M A; Granata, D; Carnevale, V

2016-01-01

Voltage-gated sodium channels (Nav) are responsible for the rising phase of the action potential. Their role in electrical signal transmission is so relevant that their emergence is believed to be one of the crucial factors enabling development of nervous system. The presence of voltage-gated sodium-selective channels in bacteria (BacNav) has raised questions concerning the evolutionary history of the ones in animals. Here we review some of the milestones in the field of Nav phylogenetic analysis and discuss some of the most important sequence features that distinguish these channels from voltage-gated potassium channels and transient receptor potential channels. Copyright © 2016 Elsevier Inc. All rights reserved.

Redox regulation of neuronal voltage-gated calcium channels.

PubMed

Todorovic, Slobodan M; Jevtovic-Todorovic, Vesna

2014-08-20

Voltage-gated calcium channels are ubiquitously expressed in neurons and are key regulators of cellular excitability and synaptic transmitter release. There is accumulating evidence that multiple subtypes of voltage-gated calcium channels may be regulated by oxidation and reduction. However, the redox mechanisms involved in the regulation of channel function are not well understood. Several studies have established that both T-type and high-voltage-activated subtypes of voltage-gated calcium channel can be redox-regulated. This article reviews different mechanisms that can be involved in redox regulation of calcium channel function and their implication in neuronal function, particularly in pain pathways and thalamic oscillation. A current critical issue in the field is to decipher precise mechanisms of calcium channel modulation via redox reactions. In this review we discuss covalent post-translational modification via oxidation of cysteine molecules and chelation of trace metals, and reactions involving nitric oxide-related molecules and free radicals. Improved understanding of the roles of redox-based reactions in regulation of voltage-gated calcium channels may lead to improved understanding of novel redox mechanisms in physiological and pathological processes. Identification of redox mechanisms and sites on voltage-gated calcium channel may allow development of novel and specific ion channel therapies for unmet medical needs. Thus, it may be possible to regulate the redox state of these channels in treatment of pathological process such as epilepsy and neuropathic pain.

Mapping of Residues Forming the Voltage Sensor of the Voltage-Dependent Anion-Selective Channel

NASA Astrophysics Data System (ADS)

Thomas, Lorie; Blachly-Dyson, Elizabeth; Colombini, Marco; Forte, Michael

1993-06-01

Voltage-gated ion-channel proteins contain "voltage-sensing" domains that drive the conformational transitions between open and closed states in response to changes in transmembrane voltage. We have used site-directed mutagenesis to identify residues affecting the voltage sensitivity of a mitochondrial channel, the voltage-dependent anion-selective channel (VDAC). Although charge changes at many sites had no effect, at other sites substitutions that increased positive charge also increased the steepness of voltage dependance and substitutions that decreased positive charge decreased voltage dependance by an appropriate amount. In contrast to the plasma membrane K^+ and Na^+ channels, these residues are distributed over large parts of the VDAC protein. These results have been used to define the conformational transitions that accompany voltage gating of an ion channel. This gating mechanism requires the movement of large portions of the VDAC protein through the membrane.

Engineering of a genetically encodable fluorescent voltage sensor exploiting fast Ci-VSP voltage-sensing movements.

PubMed

Lundby, Alicia; Mutoh, Hiroki; Dimitrov, Dimitar; Akemann, Walther; Knöpfel, Thomas

2008-06-25

Ci-VSP contains a voltage-sensing domain (VSD) homologous to that of voltage-gated potassium channels. Using charge displacement ('gating' current) measurements we show that voltage-sensing movements of this VSD can occur within 1 ms in mammalian membranes. Our analysis lead to development of a genetically encodable fluorescent protein voltage sensor (VSFP) in which the fast, voltage-dependent conformational changes of the Ci-VSP voltage sensor are transduced to similarly fast fluorescence read-outs.

Benzonatate inhibition of voltage-gated sodium currents.

PubMed

Evans, M Steven; Maglinger, G Benton; Fletcher, Anita M; Johnson, Stephen R

2016-02-01

Benzonatate was FDA-approved in 1958 as an antitussive. Its mechanism of action is thought to be anesthesia of vagal sensory nerve fibers that mediate cough. Vagal sensory neurons highly express the Nav1.7 subtype of voltage-gated sodium channels, and inhibition of this channel inhibits the cough reflex. Local anesthetics inhibit voltage-gated sodium channels, but there are no reports of whether benzonatate affects these channels. Our hypothesis is that benzonatate inhibits Nav1.7 voltage-gated sodium channels. We used whole cell voltage clamp recording to test the effects of benzonatate on voltage-gated sodium (Na(+)) currents in two murine cell lines, catecholamine A differentiated (CAD) cells, which express primarily Nav1.7, and N1E-115, which express primarily Nav1.3. We found that, like local anesthetics, benzonatate strongly and reversibly inhibits voltage-gated Na(+) channels. Benzonatate causes both tonic and phasic inhibition. It has greater effects on channel inactivation than on activation, and its potency is much greater at depolarized potentials, indicating inactivated-state-specific effects. Na(+) currents in CAD cells and N1E-115 cells are similarly affected, indicating that benzonatate is not Na(+) channel subtype-specific. Benzonatate is a mixture of polyethoxy esters of 4-(butylamino) benzoic acid having varying degrees of hydrophobicity. We found that Na(+) currents are inhibited most potently by a benzonatate fraction containing the 9-ethoxy component. Detectable effects of benzonatate occur at concentrations as low as 0.3 μM, which has been reported in humans. We conclude that benzonatate has local anesthetic-like effects on voltage-gated sodium channels, including Nav1.7, which is a possible mechanism for cough suppression by the drug. Copyright © 2015 Elsevier Ltd. All rights reserved.

The Voltage-Sensing Domain of K(v)7.2 Channels as a Molecular Target for Epilepsy-Causing Mutations and Anticonvulsants.

PubMed

Miceli, Francesco; Soldovieri, Maria Virginia; Iannotti, Fabio Arturo; Barrese, Vincenzo; Ambrosino, Paolo; Martire, Maria; Cilio, Maria Roberta; Taglialatela, Maurizio

2011-01-01

Understanding the molecular mechanisms underlying voltage-dependent gating in voltage-gated ion channels (VGICs) has been a major effort over the last decades. In recent years, changes in the gating process have emerged as common denominators for several genetically determined channelopathies affecting heart rhythm (arrhythmias), neuronal excitability (epilepsy, pain), or skeletal muscle contraction (periodic paralysis). Moreover, gating changes appear as the main molecular mechanism by which several natural toxins from a variety of species affect ion channel function. In this work, we describe the pathophysiological and pharmacological relevance of the gating process in voltage-gated K(+) channels encoded by the K(v)7 gene family. After reviewing the current knowledge on the molecular mechanisms and on the structural models of voltage-dependent gating in VGICs, we describe the physiological relevance of these channels, with particular emphasis on those formed by K(v)7.2-K(v)7.5 subunits having a well-established role in controlling neuronal excitability in humans. In fact, genetically determined alterations in K(v)7.2 and K(v)7.3 genes are responsible for benign familial neonatal convulsions, a rare seizure disorder affecting newborns, and the pharmacological activation of K(v)7.2/3 channels can exert antiepileptic activity in humans. Both mutation-triggered channel dysfunction and drug-induced channel activation can occur by impeding or facilitating, respectively, channel sensitivity to membrane voltage and can affect overlapping molecular sites within the voltage-sensing domain of these channels. Thus, understanding the molecular steps involved in voltage-sensing in K(v)7 channels will allow to better define the pathogenesis of rare human epilepsy, and to design innovative pharmacological strategies for the treatment of epilepsies and, possibly, other human diseases characterized by neuronal hyperexcitability.

The Voltage-Sensing Domain of Kv7.2 Channels as a Molecular Target for Epilepsy-Causing Mutations and Anticonvulsants

PubMed Central

Miceli, Francesco; Soldovieri, Maria Virginia; Iannotti, Fabio Arturo; Barrese, Vincenzo; Ambrosino, Paolo; Martire, Maria; Cilio, Maria Roberta; Taglialatela, Maurizio

2010-01-01

Understanding the molecular mechanisms underlying voltage-dependent gating in voltage-gated ion channels (VGICs) has been a major effort over the last decades. In recent years, changes in the gating process have emerged as common denominators for several genetically determined channelopathies affecting heart rhythm (arrhythmias), neuronal excitability (epilepsy, pain), or skeletal muscle contraction (periodic paralysis). Moreover, gating changes appear as the main molecular mechanism by which several natural toxins from a variety of species affect ion channel function. In this work, we describe the pathophysiological and pharmacological relevance of the gating process in voltage-gated K+ channels encoded by the Kv7 gene family. After reviewing the current knowledge on the molecular mechanisms and on the structural models of voltage-dependent gating in VGICs, we describe the physiological relevance of these channels, with particular emphasis on those formed by Kv7.2–Kv7.5 subunits having a well-established role in controlling neuronal excitability in humans. In fact, genetically determined alterations in Kv7.2 and Kv7.3 genes are responsible for benign familial neonatal convulsions, a rare seizure disorder affecting newborns, and the pharmacological activation of Kv7.2/3 channels can exert antiepileptic activity in humans. Both mutation-triggered channel dysfunction and drug-induced channel activation can occur by impeding or facilitating, respectively, channel sensitivity to membrane voltage and can affect overlapping molecular sites within the voltage-sensing domain of these channels. Thus, understanding the molecular steps involved in voltage-sensing in Kv7 channels will allow to better define the pathogenesis of rare human epilepsy, and to design innovative pharmacological strategies for the treatment of epilepsies and, possibly, other human diseases characterized by neuronal hyperexcitability. PMID:21687499

Voltage-Gated Potassium Channels: A Structural Examination of Selectivity and Gating

PubMed Central

Kim, Dorothy M.; Nimigean, Crina M.

2016-01-01

Voltage-gated potassium channels play a fundamental role in the generation and propagation of the action potential. The discovery of these channels began with predictions made by early pioneers, and has culminated in their extensive functional and structural characterization by electrophysiological, spectroscopic, and crystallographic studies. With the aid of a variety of crystal structures of these channels, a highly detailed picture emerges of how the voltage-sensing domain reports changes in the membrane electric field and couples this to conformational changes in the activation gate. In addition, high-resolution structural and functional studies of K+ channel pores, such as KcsA and MthK, offer a comprehensive picture on how selectivity is achieved in K+ channels. Here, we illustrate the remarkable features of voltage-gated potassium channels and explain the mechanisms used by these machines with experimental data. PMID:27141052

TH-CD-201-12: Preliminary Evaluation of Organic Field Effect Transistors as Radiation Detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Syme, A; Lin, H; Rubio-Sanchez, J

Purpose: To fabricate organic field effect transistors (OFETs) and evaluate their performance before and after exposure to ionizing radiation. To determine if OFETs have potential to function as radiation dosimeters. Methods: OFETs were fabricated on both Si/SiO{sub 2} wafers and flexible polymer substrates using standard processing techniques. Pentacene was used as the organic semiconductor material and the devices were fabricated in a bottom gate configuration. Devices were irradiated using an orthovoltage treatment unit (120 kVp x-rays). Threshold voltage values were measured with the devices in saturation mode and quantified as a function of cumulative dose. Current-voltage characteristics of the devicesmore » were measured using a Keithley 2614 SourceMeter SMU Instrument. The devices were connected to the reader but unpowered during irradiations. Results: Devices fabricated on Si/SiO2 wafers demonstrated excellent linearity (R{sup 2} > 0.997) with threshold voltages that ranged between 15 and 36 V. Devices fabricated on a flexible polymer substrate had substantially smaller threshold voltages (∼ 4 – 8 V) and slightly worse linearity (R{sup 2} > 0.98). The devices demonstrated excellent stability in I–V characteristics over a large number (>2000) cycles. Conclusion: OFETs have demonstrated excellent potential in radiation dosimetry applications. A key advantage of these devices is their composition, which can be substantially more tissue-equivalent at low photon energies relative to many other types of radiation detector. In addition, fabrication of organic electronics can employ techniques that are faster, simpler and cheaper than conventional silicon-based devices. These results support further development of organic electronic devices for radiation detection purposes. Funding Support, Disclosures, and Conflict of Interest: This work was funded by the Natural Sciences and Engineering Research Council of Canada.« less

Oxidative Modulation of Voltage-Gated Potassium Channels

PubMed Central

Sahoo, Nirakar; Hoshi, Toshinori

2014-01-01

Abstract Significance: Voltage-gated K+ channels are a large family of K+-selective ion channel protein complexes that open on membrane depolarization. These K+ channels are expressed in diverse tissues and their function is vital for numerous physiological processes, in particular of neurons and muscle cells. Potentially reversible oxidative regulation of voltage-gated K+ channels by reactive species such as reactive oxygen species (ROS) represents a contributing mechanism of normal cellular plasticity and may play important roles in diverse pathologies including neurodegenerative diseases. Recent Advances: Studies using various protocols of oxidative modification, site-directed mutagenesis, and structural and kinetic modeling provide a broader phenomenology and emerging mechanistic insights. Critical Issues: Physicochemical mechanisms of the functional consequences of oxidative modifications of voltage-gated K+ channels are only beginning to be revealed. In vivo documentation of oxidative modifications of specific amino-acid residues of various voltage-gated K+ channel proteins, including the target specificity issue, is largely absent. Future Directions: High-resolution chemical and proteomic analysis of ion channel proteins with respect to oxidative modification combined with ongoing studies on channel structure and function will provide a better understanding of how the function of voltage-gated K+ channels is tuned by ROS and the corresponding reducing enzymes to meet cellular needs. Antioxid. Redox Signal. 21, 933–952. PMID:24040918

Proline Scan of the hERG Channel S6 Helix Reveals the Location of the Intracellular Pore Gate

PubMed Central

Thouta, Samrat; Sokolov, Stanislav; Abe, Yuki; Clark, Sheldon J.; Cheng, Yen M.; Claydon, Tom W.

2014-01-01

In Shaker-like channels, the activation gate is formed at the bundle crossing by the convergence of the inner S6 helices near a conserved proline-valine-proline motif, which introduces a kink that allows for electromechanical coupling with voltage sensor motions via the S4-S5 linker. Human ether-a-go-go-related gene (hERG) channels lack the proline-valine-proline motif and the location of the intracellular pore gate and how it is coupled to S4 movement is less clear. Here, we show that proline substitutions within the S6 of hERG perturbed pore gate closure, trapping channels in the open state. Performing a proline scan of the inner S6 helix, from Ile655 to Tyr667 revealed that gate perturbation occurred with proximal (I655P-Q664P), but not distal (R665P-Y667P) substitutions, suggesting that Gln664 marks the position of the intracellular gate in hERG channels. Using voltage-clamp fluorimetry and gating current analysis, we demonstrate that proline substitutions trap the activation gate open by disrupting the coupling between the voltage-sensing unit and the pore of the channel. We characterize voltage sensor movement in one such trapped-open mutant channel and demonstrate the kinetics of what we interpret to be intrinsic hERG voltage sensor movement. PMID:24606930

Further characterization of the effect of ethanol on voltage-gated Ca(2+) channel function in developing CA3 hippocampal pyramidal neurons.

PubMed

Morton, Russell A; Valenzuela, C Fernando

2016-02-15

Developmental ethanol exposure damages the hippocampus, a brain region involved in learning and memory. Alterations in synaptic transmission and plasticity may play a role in this effect of ethanol. We previously reported that acute and repeated exposure to ethanol during the third trimester-equivalent inhibits long-term potentiation of GABAA receptor-dependent synaptic currents in CA3 pyramidal neurons through a mechanism that depends on retrograde release of brain-derived neurotrophic factor driven by activation of voltage-gated Ca(2+) channels (Zucca and Valenzuela, 2010). We found evidence indicating that voltage-gated Ca(2+) channels are inhibited in the presence of ethanol, an effect that may play a role in its mechanism of action. Here, we further investigated the acute effect of ethanol on the function of voltage-gated Ca(2+) channels in CA3 pyramidal neurons using Ca(2+) imaging techniques. These experiments revealed that acute ethanol exposure inhibits voltage-gated Ca(2+) channels both in somatic and proximal dendritic compartments. To investigate the long-term consequences of ethanol on voltage-gated Ca(2+) channels, we used patch-clamp electrophysiological techniques to assess the function of L-type voltage-gated Ca(2+) channels during and following ten days of vapor ethanol exposure. During ethanol withdrawal periods, the function of these channels was not significantly affected by vapor chamber exposure. Taken together with our previous findings, our results suggest that 3(rd) trimester-equivalent ethanol exposure transiently inhibits L-type voltage-gated Ca(2+) channel function in CA3 pyramidal neurons and that compensatory mechanisms restore their function during ethanol withdrawal. Transient inhibition of these channels by ethanol may be, in part, responsible for the hippocampal abnormalities associated with developmental exposure to this agent. Copyright © 2015 Elsevier B.V. All rights reserved.

Mechanism of Electromechanical Coupling in Voltage-Gated Potassium Channels

PubMed Central

Blunck, Rikard; Batulan, Zarah

2012-01-01

Voltage-gated ion channels play a central role in the generation of action potentials in the nervous system. They are selective for one type of ion – sodium, calcium, or potassium. Voltage-gated ion channels are composed of a central pore that allows ions to pass through the membrane and four peripheral voltage sensing domains that respond to changes in the membrane potential. Upon depolarization, voltage sensors in voltage-gated potassium channels (Kv) undergo conformational changes driven by positive charges in the S4 segment and aided by pairwise electrostatic interactions with the surrounding voltage sensor. Structure-function relations of Kv channels have been investigated in detail, and the resulting models on the movement of the voltage sensors now converge to a consensus; the S4 segment undergoes a combined movement of rotation, tilt, and vertical displacement in order to bring 3–4e+ each through the electric field focused in this region. Nevertheless, the mechanism by which the voltage sensor movement leads to pore opening, the electromechanical coupling, is still not fully understood. Thus, recently, electromechanical coupling in different Kv channels has been investigated with a multitude of techniques including electrophysiology, 3D crystal structures, fluorescence spectroscopy, and molecular dynamics simulations. Evidently, the S4–S5 linker, the covalent link between the voltage sensor and pore, plays a crucial role. The linker transfers the energy from the voltage sensor movement to the pore domain via an interaction with the S6 C-termini, which are pulled open during gating. In addition, other contact regions have been proposed. This review aims to provide (i) an in-depth comparison of the molecular mechanisms of electromechanical coupling in different Kv channels; (ii) insight as to how the voltage sensor and pore domain influence one another; and (iii) theoretical predictions on the movement of the cytosolic face of the Kv channels during gating. PMID:22988442

Mechanisms of pyrethroid insecticide-induced stimulation of calcium influx in neocortical neurons

EPA Science Inventory

Pyrethroid insecticides bind to voltage-gated sodium channels (VGSCs) and modify their gating kinetics, thereby disrupting neuronal function. Pyrethroids have also been reported to alter the function of other channel types, including activation of voltage-gated Ca2+ calcium chann...

Structure of a eukaryotic cyclic nucleotide-gated channel

PubMed Central

Li, Minghui; Zhou, Xiaoyuan; Wang, Shu; Michailidis, Ioannis; Gong, Ye; Su, Deyuan; Li, Huan; Li, Xueming; Yang, Jian

2018-01-01

Summary Cyclic nucleotide-gated (CNG) channels are essential for vision and olfaction. They belong to the voltage-gated ion channel superfamily but their activities are controlled by intracellular cyclic nucleotides instead of transmembrane voltage. Here we report a 3.5 Å-resolution single-particle electron cryomicroscopy structure of a CNG channel from C. elegans in the cGMP-bound open state. The channel has an unusual voltage-sensor-like domain (VSLD), accounting for its deficient voltage dependence. A C-terminal linker connecting S6 and the cyclic nucleotide-binding domain interacts directly with both the VSLD and pore domain, forming a gating ring that couples conformational changes triggered by cyclic nucleotide binding to the gate. The selectivity filter is lined by the carboxylate side chains of a functionally important glutamate and three rings of backbone carbonyls. This structure provides a new framework for understanding mechanisms of ion permeation, gating and channelopathy of CNG channels and cyclic nucleotide modulation of related channels. PMID:28099415

Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin

We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down tomore » the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.« less

Designing hybrid gate dielectric for fully printing high-performance carbon nanotube thin film transistors

NASA Astrophysics Data System (ADS)

Li, Qian; Li, Shilong; Yang, Dehua; Su, Wei; Wang, Yanchun; Zhou, Weiya; Liu, Huaping; Xie, Sishen

2017-10-01

The electrical characteristics of carbon nanotube (CNT) thin-film transistors (TFTs) strongly depend on the properties of the gate dielectric that is in direct contact with the semiconducting CNT channel materials. Here, we systematically investigated the dielectric effects on the electrical characteristics of fully printed semiconducting CNT-TFTs by introducing the organic dielectrics of poly(methyl methacrylate) (PMMA) and octadecyltrichlorosilane (OTS) to modify SiO2 dielectric. The results showed that the organic-modified SiO2 dielectric formed a favorable interface for the efficient charge transport in s-SWCNT-TFTs. Compared to single-layer SiO2 dielectric, the use of organic-inorganic hybrid bilayer dielectrics dramatically improved the performances of SWCNT-TFTs such as mobility, threshold voltage, hysteresis and on/off ratio due to the suppress of charge scattering, gate leakage current and charge trapping. The transport mechanism is related that the dielectric with few charge trapping provided efficient percolation pathways for charge carriers, while reduced the charge scattering. High density of charge traps which could directly act as physical transport barriers and significantly restrict the charge carrier transport and, thus, result in decreased mobile carriers and low device performance. Moreover, the gate leakage phenomenon is caused by conduction through charge traps. So, as a component of TFTs, the gate dielectric is of crucial importance to the manufacture of high quality TFTs from the aspects of affecting the gate leakage current and device operation voltage, as well as the charge carrier transport. Interestingly, the OTS-modified SiO2 allows to directly print horizontally aligned CNT film, and the corresponding devices exhibited a higher mobility than that of the devices with the hybrid PMMA/SiO2 dielectric although the thickness of OTS layer is only ˜2.5 nm. Our present result may provide key guidance for the further development of printed nanomaterial electronics.

Accurate analytical modeling of junctionless DG-MOSFET by green's function approach

NASA Astrophysics Data System (ADS)

Nandi, Ashutosh; Pandey, Nilesh

2017-11-01

An accurate analytical model of Junctionless double gate MOSFET (JL-DG-MOSFET) in the subthreshold regime of operation is developed in this work using green's function approach. The approach considers 2-D mixed boundary conditions and multi-zone techniques to provide an exact analytical solution to 2-D Poisson's equation. The Fourier coefficients are calculated correctly to derive the potential equations that are further used to model the channel current and subthreshold slope of the device. The threshold voltage roll-off is computed from parallel shifts of Ids-Vgs curves between the long channel and short-channel devices. It is observed that the green's function approach of solving 2-D Poisson's equation in both oxide and silicon region can accurately predict channel potential, subthreshold current (Isub), threshold voltage (Vt) roll-off and subthreshold slope (SS) of both long & short channel devices designed with different doping concentrations and higher as well as lower tsi/tox ratio. All the analytical model results are verified through comparisons with TCAD Sentaurus simulation results. It is observed that the model matches quite well with TCAD device simulations.

Field Effect Transistors Based on Composite Films of Poly(4-vinylphenol) with ZnO Nanoparticles

NASA Astrophysics Data System (ADS)

Boughias, Ouiza; Belkaid, Mohammed Said; Zirmi, Rachid; Trigaud, Thierry; Ratier, Bernard; Ayoub, Nouh

2018-04-01

In order to adjust the characteristic of pentacene thin film transistor, we modified the dielectric properties of the gate insulator, poly(4-vinylphenol), or PVP. PVP is an organic polymer with a low dielectric constant, limiting the performance of organic thin film transistors (OTFTs). To increase the dielectric constant of PVP, a controlled amount of ZnO nanoparticles was homogeneously dispersed in a dielectric layer. The effect of the concentration of ZnO on the relative permittivity of PVP was measured using impedance spectroscopy and it has been demonstrated that the permittivity increases from 3.6 to 5.5 with no percolation phenomenon even at a concentration of 50 vol.%. The performance of OTFTs in terms of charge carrier mobility, threshold voltage and linkage current was evaluated. The results indicate a dramatic increase in both the field effect mobility and the linkage current by a factor of 10. It has been demonstrated that the threshold voltage can be adjusted. It shifts from 8 to 0 when the volume concentration of ZnO varied from 0 vol.% to 50 vol.%.

Modeling drain current of indium zinc oxide thin film transistors prepared by solution deposition technique

NASA Astrophysics Data System (ADS)

Qiang, Lei; Liang, Xiaoci; Cai, Guangshuo; Pei, Yanli; Yao, Ruohe; Wang, Gang

2018-06-01

Indium zinc oxide (IZO) thin film transistor (TFT) deposited by solution method is of considerable technological interest as it is a key component for the fabrication of flexible and cheap transparent electronic devices. To obtain a principal understanding of physical properties of solution-processed IZO TFT, a new drain current model that account for the charge transport is proposed. The formulation is developed by incorporating the effect of gate voltage on mobility and threshold voltage with the carrier charges. It is demonstrated that in IZO TFTs the below threshold regime should be divided into two sections: EC - EF > 3kT and EC - EF ≤ 3kT, where kT is the thermal energy, EF and EC represent the Fermi level and the conduction band edge, respectively. Additionally, in order to describe conduction mechanisms more accurately, the extended mobility edge model is conjoined, which can also get rid of the complicated and lengthy computations. The good agreement between measured and calculated results confirms the efficiency of this model for the design of integrated large-area thin film circuits.

Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

NASA Astrophysics Data System (ADS)

Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

2017-02-01

This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

Stability of amorphous silicon thin film transistors and circuits

NASA Astrophysics Data System (ADS)

Liu, Ting

Hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) have been widely used for the active-matrix addressing of flat panel displays, optical scanners and sensors. Extending the application of the a-Si TFTs from switches to current sources, which requires continuous operation such as for active-matrix organic light-emitting-diode (AMOLED) pixels, makes stability a critical issue. This thesis first presents a two-stage model for the stability characterization and reliable lifetime prediction for highly stable a-Si TFTs under low gate-field stress. Two stages of the threshold voltage shift are identified from the decrease of the drain saturation current under low-gate field. The first initial stage dominates up to hours or days near room temperature. It can be characterized with a stretched-exponential model, with the underlying physical mechanism of charge trapping in the gate dielectric. The second stage dominates in the long term and then saturates. It corresponds to the breaking of weak bonds in the amorphous silicon. It can be modeled with a "unified stretched exponential fit," in which a thermalization energy is used to unify experimental measurements of drain current decay at different temperatures into a single curve. Two groups of experiments were conducted to reduce the drain current instability of a-Si TFTs under prolonged gate bias. Deposition conditions for the silicon nitride (SiNx) gate insulator and the a-Si channel layer were varied, and TFTs were fabricated with all reactive ion etching steps, or with all wet etching steps, the latter in a new process. The two-stage model that unites charge trapping in the SiNx gate dielectric and defect generation in the a-Si channel was used to interpret the experimental results. We identified the optimal substrate temperature, gas flow ratios, and RF deposition power densities. The stability of the a-Si channel depends also on the deposition conditions for the underlying SiNx gate insulator. TFTs made with wet etching are more stable than TFTs made with reactive ion etching. Combining the various improvements raised the extrapolated 50% decay time of the drain current of back channel passivated dry-etched TFTs under continuous operation at 20°C from 3.3 x 104 sec (9.2 hours) to 4.4 x 107 sec (1.4 years). The 50% lifetime can be further improved by ˜2 times through wet etching process. Two assumptions in the two-stage model were revisited. First, the distribution of the gap state density in a-Si was obtained with the field-effect technique. The redistribution of the gap state density after low-gate field stress supports the idea that defect creation in a-Si dominates in the long term. Second, the drain-bias dependence of drain current degradation was measured and modeled. The unified stretched exponential was validated for a-Si TFTs operating in saturation. Finally, a new 3-TFT voltage-programmed pixel circuit with an in-pixel current source is presented. This circuit is largely insensitive to the TFT threshold voltage shift. The fabricated pixel circuit provides organic light-emitting diode (OLED) currents ranging from 25 nA to 2.9 microA, an on/off ratio of 116 at typical quarter graphics display resolution (QVGA) display timing. The overall conclusion of this thesis research is that the operating life of a-Si TFTs can be quite long, and that these transistors can expect to find yet more applications in large area electronics.

Current-voltage characteristics influenced by the nanochannel diameter and surface charge density in a fluidic field-effect-transistor.

PubMed

Singh, Kunwar Pal; Guo, Chunlei

2017-06-21

The nanochannel diameter and surface charge density have a significant impact on current-voltage characteristics in a nanofluidic transistor. We have simulated the effect of the channel diameter and surface charge density on current-voltage characteristics of a fluidic nanochannel with positive surface charge on its walls and a gate electrode on its surface. Anion depletion/enrichment leads to a decrease/increase in ion current with gate potential. The ion current tends to increase linearly with gate potential for narrow channels at high surface charge densities and narrow channels are more effective to control the ion current at high surface charge densities. The current-voltage characteristics are highly nonlinear for wide channels at low surface charge densities and they show different regions of current change with gate potential. The ion current decreases with gate potential after attaining a peak value for wide channels at low values of surface charge densities. At low surface charge densities, the ion current can be controlled by a narrow range of gate potentials for wide channels. The current change with source drain voltage shows ohmic, limiting and overlimiting regions.

Two-Dimensional Quantum Model of a Nanotransistor

NASA Technical Reports Server (NTRS)

Govindan, T. R.; Biegel, B.; Svizhenko, A.; Anantram, M. P.

2009-01-01

A mathematical model, and software to implement the model, have been devised to enable numerical simulation of the transport of electric charge in, and the resulting electrical performance characteristics of, a nanotransistor [in particular, a metal oxide/semiconductor field-effect transistor (MOSFET) having a channel length of the order of tens of nanometers] in which the overall device geometry, including the doping profiles and the injection of charge from the source, gate, and drain contacts, are approximated as being two-dimensional. The model and software constitute a computational framework for quantitatively exploring such device-physics issues as those of source-drain and gate leakage currents, drain-induced barrier lowering, and threshold voltage shift due to quantization. The model and software can also be used as means of studying the accuracy of quantum corrections to other semiclassical models.

Trap States of the Oxide Thin Film Transistor

NASA Astrophysics Data System (ADS)

Yu, Kyeong Min; Yuh, Jin Tae; Park, Sang Hee Ko; Ryu, Min Ki; Yun, Eui Jung; Bae, Byung Seong

2013-10-01

We investigated the temperature dependent recovery of the threshold voltage shift observed in both ZnO and indium gallium zinc oxide (IGZO) thin film transistors (TFTs) after application of gate bias and light illumination. Two types of recovery were observed for both the ZnO and IGZO TFTs; low temperature recovery (below 110 °C) which is attributed to the trapped charge and high temperature recovery (over 110 °C) which is related to the annihilation of trap states generated during stresses. From a comparison study of the recovery rate with the analysis of hydrogen diffusion isochronal annealing, a similar behavior was observed for both TFT recovery and hydrogen diffusion. This result suggests that hydrogen plays an important role in the generation and annihilation of trap states in oxide TFTs under gate bias or light illumination stresses.

CMOS-compatible batch processing of monolayer MoS2 MOSFETs

NASA Astrophysics Data System (ADS)

Xiong, Kuanchen; Kim, Hyun; Marstell, Roderick J.; Göritz, Alexander; Wipf, Christian; Li, Lei; Park, Ji-Hoon; Luo, Xi; Wietstruck, Matthias; Madjar, Asher; Strandwitz, Nicholas C.; Kaynak, Mehmet; Lee, Young Hee; Hwang, James C. M.

2018-04-01

Thousands of high-performance 2D metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on wafer-scale chemical vapor deposited MoS2 with fully-CMOS-compatible processes such as photolithography and aluminum metallurgy. The yield was greater than 50% in terms of effective gate control with less-than-10 V threshold voltage, even for MOSFETs having deep-submicron gate length. The large number of fabricated MOSFETs allowed statistics to be gathered and the main yield limiter to be attributed to the weak adhesion between the transferred MoS2 and the substrate. With cut-off frequencies approaching the gigahertz range, the performances of the MOSFETs were comparable to that of state-of-the-art MoS2 MOSFETs, whether the MoS2 was grown by a thin-film process or exfoliated from a bulk crystal.

Analytical modeling of trilayer graphene nanoribbon Schottky-barrier FET for high-speed switching applications.

PubMed

Rahmani, Meisam; Ahmadi, Mohammad Taghi; Abadi, Hediyeh Karimi Feiz; Saeidmanesh, Mehdi; Akbari, Elnaz; Ismail, Razali

2013-01-30

Recent development of trilayer graphene nanoribbon Schottky-barrier field-effect transistors (FETs) will be governed by transistor electrostatics and quantum effects that impose scaling limits like those of Si metal-oxide-semiconductor field-effect transistors. The current-voltage characteristic of a Schottky-barrier FET has been studied as a function of physical parameters such as effective mass, graphene nanoribbon length, gate insulator thickness, and electrical parameters such as Schottky barrier height and applied bias voltage. In this paper, the scaling behaviors of a Schottky-barrier FET using trilayer graphene nanoribbon are studied and analytically modeled. A novel analytical method is also presented for describing a switch in a Schottky-contact double-gate trilayer graphene nanoribbon FET. In the proposed model, different stacking arrangements of trilayer graphene nanoribbon are assumed as metal and semiconductor contacts to form a Schottky transistor. Based on this assumption, an analytical model and numerical solution of the junction current-voltage are presented in which the applied bias voltage and channel length dependence characteristics are highlighted. The model is then compared with other types of transistors. The developed model can assist in comprehending experiments involving graphene nanoribbon Schottky-barrier FETs. It is demonstrated that the proposed structure exhibits negligible short-channel effects, an improved on-current, realistic threshold voltage, and opposite subthreshold slope and meets the International Technology Roadmap for Semiconductors near-term guidelines. Finally, the results showed that there is a fast transient between on-off states. In other words, the suggested model can be used as a high-speed switch where the value of subthreshold slope is small and thus leads to less power consumption.

Comparison of gate and drain current detection of hydrogen at room temperature with AlGaN /GaN high electron mobility transistors

NASA Astrophysics Data System (ADS)

Wang, Hung-Ta; Kang, B. S.; Ren, F.; Fitch, R. C.; Gillespie, J. K.; Moser, N.; Jessen, G.; Jenkins, T.; Dettmer, R.; Via, D.; Crespo, A.; Gila, B. P.; Abernathy, C. R.; Pearton, S. J.

2005-10-01

Pt-gated AlGaN /GaN high electron mobility transistors can be used as room-temperature hydrogen gas sensors at hydrogen concentrations as low as 100ppm. A comparison of the changes in drain and gate current-voltage (I-V) characteristics with the introduction of 500ppm H2 into the measurement ambient shows that monitoring the change in drain-source current provides a wider gate voltage operation range for maximum detection sensitivity and higher total current change than measuring the change in gate current. However, over a narrow gate voltage range, the relative sensitivity of detection by monitoring the gate current changes is up to an order of magnitude larger than that of drain-source current changes. In both cases, the changes are fully reversible in <2-3min at 25°C upon removal of the hydrogen from the ambient.

Redox Regulation of Neuronal Voltage-Gated Calcium Channels

PubMed Central

Jevtovic-Todorovic, Vesna

2014-01-01

Abstract Significance: Voltage-gated calcium channels are ubiquitously expressed in neurons and are key regulators of cellular excitability and synaptic transmitter release. There is accumulating evidence that multiple subtypes of voltage-gated calcium channels may be regulated by oxidation and reduction. However, the redox mechanisms involved in the regulation of channel function are not well understood. Recent Advances: Several studies have established that both T-type and high-voltage-activated subtypes of voltage-gated calcium channel can be redox-regulated. This article reviews different mechanisms that can be involved in redox regulation of calcium channel function and their implication in neuronal function, particularly in pain pathways and thalamic oscillation. Critical Issues: A current critical issue in the field is to decipher precise mechanisms of calcium channel modulation via redox reactions. In this review we discuss covalent post-translational modification via oxidation of cysteine molecules and chelation of trace metals, and reactions involving nitric oxide-related molecules and free radicals. Improved understanding of the roles of redox-based reactions in regulation of voltage-gated calcium channels may lead to improved understanding of novel redox mechanisms in physiological and pathological processes. Future Directions: Identification of redox mechanisms and sites on voltage-gated calcium channel may allow development of novel and specific ion channel therapies for unmet medical needs. Thus, it may be possible to regulate the redox state of these channels in treatment of pathological process such as epilepsy and neuropathic pain. Antioxid. Redox Signal. 21, 880–891. PMID:24161125

Gating of Connexin Channels by transjunctional-voltage: Conformations and models of open and closed states.

PubMed

Bargiello, Thaddeus A; Oh, Seunghoon; Tang, Qingxiu; Bargiello, Nicholas K; Dowd, Terry L; Kwon, Taekyung

2018-01-01

Voltage is an important physiologic regulator of channels formed by the connexin gene family. Connexins are unique among ion channels in that both plasma membrane inserted hemichannels (undocked hemichannels) and intercellular channels (aggregates of which form gap junctions) have important physiological roles. The hemichannel is the fundamental unit of gap junction voltage-gating. Each hemichannel displays two distinct voltage-gating mechanisms that are primarily sensitive to a voltage gradient formed along the length of the channel pore (the transjunctional voltage) rather than sensitivity to the absolute membrane potential (V m or V i-o ). These transjunctional voltage dependent processes have been termed V j - or fast-gating and loop- or slow-gating. Understanding the mechanism of voltage-gating, defined as the sequence of voltage-driven transitions that connect open and closed states, first and foremost requires atomic resolution models of the end states. Although ion channels formed by connexins were among the first to be characterized structurally by electron microscopy and x-ray diffraction in the early 1980's, subsequent progress has been slow. Much of the current understanding of the structure-function relations of connexin channels is based on two crystal structures of Cx26 gap junction channels. Refinement of crystal structure by all-atom molecular dynamics and incorporation of charge changing protein modifications has resulted in an atomic model of the open state that arguably corresponds to the physiologic open state. Obtaining validated atomic models of voltage-dependent closed states is more challenging, as there are currently no methods to solve protein structure while a stable voltage gradient is applied across the length of an oriented channel. It is widely believed that the best approach to solve the atomic structure of a voltage-gated closed ion channel is to apply different but complementary experimental and computational methods and to use the resulting information to derive a consensus atomic structure that is then subjected to rigorous validation. In this paper, we summarize our efforts to obtain and validate atomic models of the open and voltage-driven closed states of undocked connexin hemichannels. This article is part of a Special Issue entitled: Gap Junction Proteins edited by Jean Claude Herve. Copyright © 2017 Elsevier B.V. All rights reserved.

The voltage-sensing domain of a phosphatase gates the pore of a potassium channel.

PubMed

Arrigoni, Cristina; Schroeder, Indra; Romani, Giulia; Van Etten, James L; Thiel, Gerhard; Moroni, Anna

2013-03-01

The modular architecture of voltage-gated K(+) (Kv) channels suggests that they resulted from the fusion of a voltage-sensing domain (VSD) to a pore module. Here, we show that the VSD of Ciona intestinalis phosphatase (Ci-VSP) fused to the viral channel Kcv creates Kv(Synth1), a functional voltage-gated, outwardly rectifying K(+) channel. Kv(Synth1) displays the summed features of its individual components: pore properties of Kcv (selectivity and filter gating) and voltage dependence of Ci-VSP (V(1/2) = +56 mV; z of ~1), including the depolarization-induced mode shift. The degree of outward rectification of the channel is critically dependent on the length of the linker more than on its amino acid composition. This highlights a mechanistic role of the linker in transmitting the movement of the sensor to the pore and shows that electromechanical coupling can occur without coevolution of the two domains.

Calcium Homeostasis and Cone Signaling Are Regulated by Interactions between Calcium Stores and Plasma Membrane Ion Channels

PubMed Central

Bartoletti, Theodore M.; Huang, Wei; Akopian, Abram; Thoreson, Wallace B.; Krizaj, David

2009-01-01

Calcium is a messenger ion that controls all aspects of cone photoreceptor function, including synaptic release. The dynamic range of the cone output extends beyond the activation threshold for voltage-operated calcium entry, suggesting another calcium influx mechanism operates in cones hyperpolarized by light. We have used optical imaging and whole-cell voltage clamp to measure the contribution of store-operated Ca2+ entry (SOCE) to Ca2+ homeostasis and its role in regulation of neurotransmission at cone synapses. Mn2+ quenching of Fura-2 revealed sustained divalent cation entry in hyperpolarized cones. Ca2+ influx into cone inner segments was potentiated by hyperpolarization, facilitated by depletion of intracellular Ca2+ stores, unaffected by pharmacological manipulation of voltage-operated or cyclic nucleotide-gated Ca2+ channels and suppressed by lanthanides, 2-APB, MRS 1845 and SKF 96365. However, cation influx through store-operated channels crossed the threshold for activation of voltage-operated Ca2+ entry in a subset of cones, indicating that the operating range of inner segment signals is set by interactions between store- and voltage-operated Ca2+ channels. Exposure to MRS 1845 resulted in ∼40% reduction of light-evoked postsynaptic currents in photopic horizontal cells without affecting the light responses or voltage-operated Ca2+ currents in simultaneously recorded cones. The spatial pattern of store-operated calcium entry in cones matched immunolocalization of the store-operated sensor STIM1. These findings show that store-operated channels regulate spatial and temporal properties of Ca2+ homeostasis in vertebrate cones and demonstrate their role in generation of sustained excitatory signals across the first retinal synapse. PMID:19696927

Mapping of voltage sensor positions in resting and inactivated mammalian sodium channels by LRET

PubMed Central

Kubota, Tomoya; Durek, Thomas; Dang, Bobo; Finol-Urdaneta, Rocio K.; Craik, David J.; Kent, Stephen B. H.; French, Robert J.; Bezanilla, Francisco; Correa, Ana M.

2017-01-01

Voltage-gated sodium channels (Navs) play crucial roles in excitable cells. Although vertebrate Nav function has been extensively studied, the detailed structural basis for voltage-dependent gating mechanisms remain obscure. We have assessed the structural changes of the Nav voltage sensor domain using lanthanide-based resonance energy transfer (LRET) between the rat skeletal muscle voltage-gated sodium channel (Nav1.4) and fluorescently labeled Nav1.4-targeting toxins. We generated donor constructs with genetically encoded lanthanide-binding tags (LBTs) inserted at the extracellular end of the S4 segment of each domain (with a single LBT per construct). Three different Bodipy-labeled, Nav1.4-targeting toxins were synthesized as acceptors: β-scorpion toxin (Ts1)-Bodipy, KIIIA-Bodipy, and GIIIA-Bodipy analogs. Functional Nav-LBT channels expressed in Xenopus oocytes were voltage-clamped, and distinct LRET signals were obtained in the resting and slow inactivated states. Intramolecular distances computed from the LRET signals define a geometrical map of Nav1.4 with the bound toxins, and reveal voltage-dependent structural changes related to channel gating. PMID:28202723

Mapping of voltage sensor positions in resting and inactivated mammalian sodium channels by LRET.

PubMed

Kubota, Tomoya; Durek, Thomas; Dang, Bobo; Finol-Urdaneta, Rocio K; Craik, David J; Kent, Stephen B H; French, Robert J; Bezanilla, Francisco; Correa, Ana M

2017-03-07

Voltage-gated sodium channels (Navs) play crucial roles in excitable cells. Although vertebrate Nav function has been extensively studied, the detailed structural basis for voltage-dependent gating mechanisms remain obscure. We have assessed the structural changes of the Nav voltage sensor domain using lanthanide-based resonance energy transfer (LRET) between the rat skeletal muscle voltage-gated sodium channel (Nav1.4) and fluorescently labeled Nav1.4-targeting toxins. We generated donor constructs with genetically encoded lanthanide-binding tags (LBTs) inserted at the extracellular end of the S4 segment of each domain (with a single LBT per construct). Three different Bodipy-labeled, Nav1.4-targeting toxins were synthesized as acceptors: β-scorpion toxin (Ts1)-Bodipy, KIIIA-Bodipy, and GIIIA-Bodipy analogs. Functional Nav-LBT channels expressed in Xenopus oocytes were voltage-clamped, and distinct LRET signals were obtained in the resting and slow inactivated states. Intramolecular distances computed from the LRET signals define a geometrical map of Nav1.4 with the bound toxins, and reveal voltage-dependent structural changes related to channel gating.

High voltage MOSFET switching circuit

DOEpatents

McEwan, Thomas E.

1994-01-01

The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

Device and material characterization and analytic modeling of amorphous silicon thin film transistors

NASA Astrophysics Data System (ADS)

Slade, Holly Claudia

Hydrogenated amorphous silicon thin film transistors (TFTs) are now well-established as switching elements for a variety of applications in the lucrative electronics market, such as active matrix liquid crystal displays, two-dimensional imagers, and position-sensitive radiation detectors. These applications necessitate the development of accurate characterization and simulation tools. The main goal of this work is the development of a semi- empirical, analytical model for the DC and AC operation of an amorphous silicon TFT for use in a manufacturing facility to improve yield and maintain process control. The model is physically-based, in order that the parameters scale with gate length and can be easily related back to the material and device properties. To accomplish this, extensive experimental data and 2D simulations are used to observe and quantify non- crystalline effects in the TFTs. In particular, due to the disorder in the amorphous network, localized energy states exist throughout the band gap and affect all regimes of TFT operation. These localized states trap most of the free charge, causing a gate-bias-dependent field effect mobility above threshold, a power-law dependence of the current on gate bias below threshold, very low leakage currents, and severe frequency dispersion of the TFT gate capacitance. Additional investigations of TFT instabilities reveal the importance of changes in the density of states and/or back channel conduction due to bias and thermal stress. In the above threshold regime, the model is similar to the crystalline MOSFET model, considering the drift component of free charge. This approach uses the field effect mobility to take into account the trap states and must utilize the correct definition of threshold voltage. In the below threshold regime, the density of deep states is taken into account. The leakage current is modeled empirically, and the parameters are temperature dependent to 150oC. The capacitance of the TFT can be modeled using a transmission line model, which is implemented using a small signal circuit with access resistors in series with the source and drain capacitances. This correctly reproduces the frequency dispersion in the TFT. Automatic parameter extraction routines are provided and are used to test the robustness of the model on a variety of devices from different research laboratories. The results demonstrate excellent agreement, showing that the model is suitable for device design, scaling, and implementation in the manufacturing process.

Optimized expression and purification of NavAb provide the structural insight into the voltage dependence.

PubMed

Irie, Katsumasa; Haga, Yukari; Shimomura, Takushi; Fujiyoshi, Yoshinori

2018-01-01

Voltage-gated sodium channels are crucial for electro-signalling in living systems. Analysis of the molecular mechanism requires both fine electrophysiological evaluation and high-resolution channel structures. Here, we optimized a dual expression system of NavAb, which is a well-established standard of prokaryotic voltage-gated sodium channels, for E. coli and insect cells using a single plasmid vector to analyse high-resolution protein structures and measure large ionic currents. Using this expression system, we evaluated the voltage dependence and determined the crystal structures of NavAb wild-type and two mutants, E32Q and N49K, whose voltage dependence were positively shifted and essential interactions were lost in voltage sensor domain. The structural and functional comparison elucidated the molecular mechanisms of the voltage dependence of prokaryotic voltage-gated sodium channels. © 2017 Federation of European Biochemical Societies.

Simulating the Activation of Voltage Sensing Domain for a Voltage-Gated Sodium Channel Using Polarizable Force Field.

PubMed

Sun, Rui-Ning; Gong, Haipeng

2017-03-02

Voltage-gated sodium (Na V ) channels play vital roles in the signal transduction of excitable cells. Upon activation of a Na V channel, the change of transmembrane voltage triggers conformational change of the voltage sensing domain, which then elicits opening of the pore domain and thus allows an influx of Na + ions. Description of this process with atomistic details is in urgent demand. In this work, we simulated the partial activation process of the voltage sensing domain of a prokaryotic Na V channel using a polarizable force field. We not only observed the conformational change of the voltage sensing domain from resting to preactive state, but also rigorously estimated the free energy profile along the identified reaction pathway. Comparison with the control simulation using an additive force field indicates that voltage-gating thermodynamics of Na V channels may be inaccurately described without considering the electrostatic polarization effect.

Differential effect of brief electrical stimulation on voltage-gated potassium channels

PubMed Central

Al Abed, Amr; Buskila, Yossi; Dokos, Socrates; Lovell, Nigel H.; Morley, John W.

2017-01-01

Electrical stimulation of neuronal tissue is a promising strategy to treat a variety of neurological disorders. The mechanism of neuronal activation by external electrical stimulation is governed by voltage-gated ion channels. This stimulus, typically brief in nature, leads to membrane potential depolarization, which increases ion flow across the membrane by increasing the open probability of these voltage-gated channels. In spiking neurons, it is activation of voltage-gated sodium channels (NaV channels) that leads to action potential generation. However, several other types of voltage-gated channels are expressed that also respond to electrical stimulation. In this study, we examine the response of voltage-gated potassium channels (KV channels) to brief electrical stimulation by whole cell patch-clamp electrophysiology and computational modeling. We show that nonspiking amacrine neurons of the retina exhibit a large variety of responses to stimulation, driven by different KV-channel subtypes. Computational modeling reveals substantial differences in the response of specific KV-channel subtypes that is dependent on channel kinetics. This suggests that the expression levels of different KV-channel subtypes in retinal neurons are a crucial predictor of the response that can be obtained. These data expand our knowledge of the mechanisms of neuronal activation and suggest that KV-channel expression is an important determinant of the sensitivity of neurons to electrical stimulation. NEW & NOTEWORTHY This paper describes the response of various voltage-gated potassium channels (KV channels) to brief electrical stimulation, such as is applied during prosthetic electrical stimulation. We show that the pattern of response greatly varies between KV channel subtypes depending on activation and inactivation kinetics of each channel. Our data suggest that problems encountered when artificially stimulating neurons such as cessation in firing at high frequencies, or “fading,” may be attributed to KV-channel activation. PMID:28202576

Transport properties of two-dimensional metal-phthalocyanine junctions: An ab initio study

NASA Astrophysics Data System (ADS)

Liu, Shuang-Long; Wang, Yun-Peng; Li, Xiang-Guo; Cheng, Hai-Ping

We study two dimensional (2D) electronic/spintronic junctions made of metal-organic frameworks via first-principles simulation. The system consists of two Mn-phthalocyanine leads and a Ni-phthalocyanine center. A 2D Mn phthalocyanine sheet is ferromagnetic half metal and a 2D Ni phthalocyanine sheet is nonmagnetic semiconductor. Our results show that this system has a large tunnel magnetic resistance. The transmission coefficient at Fermi energy decays exponentially with the length of the central region which is not surprising. However, the transmission of the junction can be tuned using gate voltage by up to two orders of magnitude. The origin of the change lies in the mode matching between the lead and the center electronic states. Moreover, the threshold gate voltage varies with the length of the center region which provides a way of engineering the transport properties. Finally, we combine non-equilibrium Green's function and Boltzmann transport equation to compute conductance of the junction. This work was supported by the US Department of Energy (DOE), Office of Basic Energy Sciences (BES), under Contract No. DE-FG02-02ER45995. Computations were done using the utilities of NERSC and University of Florida Research Computing.

Surface properties of SiO2 with and without H2O2 treatment as gate dielectrics for pentacene thin-film transistor applications

NASA Astrophysics Data System (ADS)

Hung, Cheng-Chun; Lin, Yow-Jon

2018-01-01

The effect of H2O2 treatment on the surface properties of SiO2 is studied. H2O2 treatment leads to the formation of Si(sbnd OH)x at the SiO2 surface that serves to reduce the number of trap states, inducing the shift of the Fermi level toward the conduction band minimum. H2O2 treatment also leads to a noticeable reduction in the value of the SiO2 capacitance per unit area. The effect of SiO2 layers with H2O2 treatment on the behavior of carrier transports for the pentacene/SiO2-based organic thin-film transistor (OTFT) is also studied. Experimental identification confirms that the shift of the threshold voltage towards negative gate-source voltages is due to the reduced number of trap states in SiO2 near the pentacene/SiO2 interface. The existence of a hydrogenated layer between pentacene and SiO2 leads to a change in the pentacene-SiO2 interaction, increasing the value of the carrier mobility.

Light-Triggered Ternary Device and Inverter Based on Heterojunction of van der Waals Materials.

PubMed

Shim, Jaewoo; Jo, Seo-Hyeon; Kim, Minwoo; Song, Young Jae; Kim, Jeehwan; Park, Jin-Hong

2017-06-27

Multivalued logic (MVL) devices/circuits have received considerable attention because the binary logic used in current Si complementary metal-oxide-semiconductor (CMOS) technology cannot handle the predicted information throughputs and energy demands of the future. To realize MVL, the conventional transistor platform needs to be redesigned to have two or more distinctive threshold voltages (V TH s). Here, we report a finding: the photoinduced drain current in graphene/WSe 2 heterojunction transistors unusually decreases with increasing gate voltage under illumination, which we refer to as the light-induced negative differential transconductance (L-NDT) phenomenon. We also prove that such L-NDT phenomenon in specific bias ranges originates from a variable potential barrier at a graphene/WSe 2 junction due to a gate-controllable graphene electrode. This finding allows us to conceive graphene/WSe 2 -based MVL logic circuits by using the I D -V G characteristics with two distinctive V TH s. Based on this finding, we further demonstrate a light-triggered ternary inverter circuit with three stable logical states (ΔV out of each state <0.05 V). Our study offers the pathway to substantialize MVL systems.

Modeling, Fabrication, and Analysis of Vertical Conduction Gallium Nitride Fin MOSFET

NASA Astrophysics Data System (ADS)

Tahhan, Maher Bishara

Gallium Nitride has seen much interest in the field of electronics due to its large bandgap and high mobility. In the field of power electronics, this combination leads to a low on-resistance for a given breakdown voltage. To take full advantage of this, vertical conduction transistors in GaN can give high breakdown voltages independent of chip area, leading to transistors with nominally low on resistance with high breakdown at a low cost. Acknowledging this, a vertical transistor design is presented with a small footprint area. This design utilizes a fin structure as a double gated insulated MESFET with electrons flowing from the top of the fin downward. The transistor's characteristics and design is initially explored via simulation and modelling. In this modelling, it is found that the narrow dimension of the fin must be sub-micron to allow for the device to be turned off with no leakage current and have a positive threshold voltage. Several process modules are developed and integrated to fabricate the device. A smooth vertical etch leaving low damage to the surfaces is demonstrated and characterized, preventing micromasking during the GaN dry etch. Methods of removing damage from the dry etch are tested, including regrowth and wet etching. Several hard masks were developed to be used in conjunction with this GaN etch for various requirements of the process, such as material constraints and self-aligning a metal contact. Multiple techniques are tested to deposit and pattern the gate oxide and metal to ensure good contact with the channel without causing unwanted shorts. To achieve small fin dimensions, a self-aligned transistor process flow is presented allowing for smaller critical dimensions at increased fabrication tolerances by avoiding the use of lithographic steps that require alignments to very high accuracy. In the case of the device design presented, the fins are lithographically defined at the limit of i-line stepper system. From this single lithography, the sources are formed, fins are etched, and the gate insulator and metal are deposited. The first functional fabricated devices are presented, but exhibit a few differences from the model. A threshold voltage of -6 V, was measured, with an ID of 5 kA/cm2 at 3 V, and Ron of 0.6 mO/cm 2. The current is limited by the Schottky nature of the top contacts and show a turn-on voltage as a result. These measurements are comparable to recently published GaN fin MOSFET data, whose devices were defined by e-beam lithography. This dissertation work sought to show that a vertical conduction fin MOSFET can be fabricated on GaN. Furthermore, it aimed to provide a self-aligned process that does not require e-beam lithography. With further development, such devices can be designed to hold large voltages while maintaining a small footprint.

Reliability Design for Neutron Induced Single-Event Burnout of IGBT

NASA Astrophysics Data System (ADS)

Shoji, Tomoyuki; Nishida, Shuichi; Ohnishi, Toyokazu; Fujikawa, Touma; Nose, Noboru; Hamada, Kimimori; Ishiko, Masayasu

Single-event burnout (SEB) caused by cosmic ray neutrons leads to catastrophic failures in insulated gate bipolar transistors (IGBTs). It was found experimentally that the incident neutron induced SEB failure rate increases as a function of the applied collector voltage. Moreover, the failure rate increased sharply with an increase in the applied collector voltage when the voltage exceeded a certain threshold value (SEB cutoff voltage). In this paper, transient device simulation results indicate that impact ionization at the n-drift/n+ buffer boundary is a crucially important factor in the turning-on of the parasitic pnp transistor, and eventually latch-up of the parasitic thyristor causes SEB. In addition, the device parameter dependency of the SEB cutoff voltage was analytically derived from the latch-up condition of the parasitic thyristor. As a result, it was confirmed that reducing the current gain of the parasitic transistor, such as by increasing the n-drift region thickness d was effective in increasing the SEB cutoff voltage. Furthermore, `white' neutron-irradiation experiments demonstrated that suppressing the inherent parasitic thyristor action leads to an improvement of the SEB cutoff voltage. It was confirmed that current gain optimization of the parasitic transistor is a crucial factor for establishing highly reliable design against chance failures.

Voltage-sensing domain mode shift is coupled to the activation gate by the N-terminal tail of hERG channels.

PubMed

Tan, Peter S; Perry, Matthew D; Ng, Chai Ann; Vandenberg, Jamie I; Hill, Adam P

2012-09-01

Human ether-a-go-go-related gene (hERG) potassium channels exhibit unique gating kinetics characterized by unusually slow activation and deactivation. The N terminus of the channel, which contains an amphipathic helix and an unstructured tail, has been shown to be involved in regulation of this slow deactivation. However, the mechanism of how this occurs and the connection between voltage-sensing domain (VSD) return and closing of the gate are unclear. To examine this relationship, we have used voltage-clamp fluorometry to simultaneously measure VSD motion and gate closure in N-terminally truncated constructs. We report that mode shifting of the hERG VSD results in a corresponding shift in the voltage-dependent equilibrium of channel closing and that at negative potentials, coupling of the mode-shifted VSD to the gate defines the rate of channel closure. Deletion of the first 25 aa from the N terminus of hERG does not alter mode shifting of the VSD but uncouples the shift from closure of the cytoplasmic gate. Based on these observations, we propose the N-terminal tail as an adaptor that couples voltage sensor return to gate closure to define slow deactivation gating in hERG channels. Furthermore, because the mode shift occurs on a time scale relevant to the cardiac action potential, we suggest a physiological role for this phenomenon in maximizing current flow through hERG channels during repolarization.

Voltage-dependent gating and gating charge measurements in the Kv1.2 potassium channel

PubMed Central

Ishida, Itzel G.; Rangel-Yescas, Gisela E.; Carrasco-Zanini, Julia

2015-01-01

Much has been learned about the voltage sensors of ion channels since the x-ray structure of the mammalian voltage-gated potassium channel Kv1.2 was published in 2005. High resolution structural data of a Kv channel enabled the structural interpretation of numerous electrophysiological findings collected in various ion channels, most notably Shaker, and permitted the development of meticulous computational simulations of the activation mechanism. The fundamental premise for the structural interpretation of functional measurements from Shaker is that this channel and Kv1.2 have the same characteristics, such that correlation of data from both channels would be a trivial task. We tested these assumptions by measuring Kv1.2 voltage-dependent gating and charge per channel. We found that the Kv1.2 gating charge is near 10 elementary charges (eo), ∼25% less than the well-established 13–14 eo in Shaker. Next, we neutralized positive residues in the Kv1.2 S4 transmembrane segment to investigate the cause of the reduction of the gating charge and found that, whereas replacing R1 with glutamine decreased voltage sensitivity to ∼50% of the wild-type channel value, mutation of the subsequent arginines had a much smaller effect. These data are in marked contrast to the effects of charge neutralization in Shaker, where removal of the first four basic residues reduces the gating charge by roughly the same amount. In light of these differences, we propose that the voltage-sensing domains (VSDs) of Kv1.2 and Shaker might undergo the same physical movement, but the septum that separates the aqueous crevices in the VSD of Kv1.2 might be thicker than Shaker’s, accounting for the smaller Kv1.2 gating charge. PMID:25779871

Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology

NASA Astrophysics Data System (ADS)

Athanasiou, Sotirios; Legrand, Charles-Alexandre; Cristoloveanu, Sorin; Galy, Philippe

2017-02-01

We propose a novel ESD protection device (GDNMOS: Gated Diode merged NMOS) fabricated with 28 nm UTBB FD-SOI high-k metal gate technology. By modifying the combination of the diode and transistor gate stacks, the robustness of the device is optimized, achieving a maximum breakdown voltage (VBR) of 4.9 V. In addition, modifications of the gate length modulate the trigger voltage (Vt1) with a minimum value of 3.5 V. Variable electrostatic doping (gate-induced) in diode and transistor body enables reconfigurable operation. A lower doping of the base enhances the bipolar gain, leading to thyristor behavior. This innovative architecture demonstrates excellent capability for high-voltage protection while maintaining a latch-up free behavior.

Coaxially gated in-wire thin-film transistors made by template assembly.

PubMed

Kovtyukhova, Nina I; Kelley, Brian K; Mallouk, Thomas E

2004-10-13

Nanowire field effect transistors were prepared by a wet chemical template replication method using anodic aluminum oxide membranes. The membrane pores were first lined with a thin SiO2 layer by the surface sol-gel method. Au, CdS (or CdSe), and Au wire segments were then sequentially electrodeposited within the pores, and the resulting nanowires were released by dissolution of the membrane. Electrofluidic alignment of these nanowires between source and drain leads and evaporation of gold over the central CdS (CdSe) stripe affords a "wrap-around gate" structure. At VDS = -2 V, the Au/CdS/Au devices had an ON/OFF current ratio of 103, a threshold voltage of 2.4 V, and a subthreshold slope of 2.2 V/decade. A 3-fold decrease in the subthreshold slope relative to that of planar nanocrystalline CdSe devices can be attributed to coaxial gating. The control of dimensions afforded by template synthesis should make it possible to reduce the gate dielectric thickness, channel length, and diameter of the semiconductor segment to sublithographic dimensions while retaining the simplicity of the wet chemical synthetic method.

Amorphous silicon thin-film transistor active-matrix for reflective cholesteric liquid crystal displays

NASA Astrophysics Data System (ADS)

Nahm, Jeong-Yeop

Reflective cholesteric liquid crystal displays (Ch-LCDs) have advantages, such as, high brightness, low power consumption, and wide viewing angle, since they do not need any polarizer, color filter, and backlight. Furthermore, due to their bistability Ch-LCDs can retain their images virtually forever without additional power consumption. But conventional passive-matrix addressing of Ch-LCDs allows only a slow image updating speed. Active-matrix addressing should allow fast image updating or video-rate operation. However, because the threshold voltage of cholesteric, liquid crystal is high (>20V), the switching devices for active-matrix addressing should satisfy required characteristics even under high bias conditions. In order to investigate the applicability of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) for the switching devices of active-matrix (AM) Ch-LCDs, the characteristics of conventional and gate offset high voltage a-Si:H TTFs were examined under high bias conditions. And it was concluded that high OFF-current of conventional a-Si:H TFTs and low ON-current of gate offset high voltage a-Si:H TFTs were main problems for reflective AM Ch-LCD applications. In order to improve the TFT characteristics under high bias conditions, we propose two new a-Si:H TFT structures called gate planarized (GP) and buried field plate (BFP) high voltage a-Si:H TFTs. Firstly, in the GP a-Si:H TFTs, we used a thick spin-coated benzocyclobutene (BCB) layer beneath a thin hydrogenated amorphous silicon nitride (a-SiNx:H) layer for gate insulator. The GP a-Si:H TFT showed normal TFT characteristic up to VGS = VDS = ˜100 V without any device failure. But TFT ON-current of GP a-Si:H TFT was reduced due to the introduction of the thick low dielectric BCB layer. Secondly, in the BFP a-Si:H TFT, an offset region and a buried field plate were introduced between the drain/source and gate electrodes to reduce the electric field in the pinch-off region. For this BFP a-Si:H TFT, a low OFF-current (1.04 pA) and a high ON/OFF-current ratio (5.68 x 106) up to VGS = VDS = ˜30 V were obtained. Based on our a-Si:H TFTs studies, we designed an a-Si:H TFT active-matrix panel and fabricated the AM Ch-LCDs either by optimizing a-Si:H TFT processing or adopting the GP a-Si:H TFT technology. The fabricated a-Si:H TFT active-matrix panels can be operated at the voltage of 50 and 60V, applied to the data and gate lines, respectively. With the a-Si:H TFT active-matrix panels, the AM Ch-LCDs were fabricated and operated with the frame rate of 60 Hz and the maximum contrast ratio of ˜30.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Camel Gate Field Effect Transistors.

DTIC Science & Technology

1983-01-01

CAMFETs can be designed to yield relatively voltage independent transconductances, large for- * ward turn-on voltages, and large gate-drain breakdown...doping. The FATFET area is 4.6 x 10- 4 cm2. I.- . - . . - , - 36 80 * Camel Gate U_-- Eperimental 60 * -Theoretical % Schottky Gate ~--Experimental CL 4...in the design of other devices. Finally, a comparative study of the reliabil- ities of CAMFETs, JFETs, and MESFETs should be attempted. 43 VII

LOGIC OF CONTROLLED THRESHOLD DEVICES.

DTIC Science & Technology

The synthesis of threshold logic circuits from several points of view is presented. The first approach is applicable to resistor-transistor networks...in which the outputs are tied to a common collector resistor. In general, fewer threshold logic gates than NOR gates connected to a common collector...network to realize a specified function such that the failure of any but the output gate can be compensated for by a change in the threshold level (and

Direct Evidence of Conformational Changes Associated with Voltage Gating in a Voltage Sensor Protein by Time-Resolved X-ray/Neutron Interferometry

PubMed Central

2015-01-01

The voltage sensor domain (VSD) of voltage-gated cation (e.g., Na+, K+) channels central to neurological signal transmission can function as a distinct module. When linked to an otherwise voltage-insensitive, ion-selective membrane pore, the VSD imparts voltage sensitivity to the channel. Proteins homologous with the VSD have recently been found to function themselves as voltage-gated proton channels or to impart voltage sensitivity to enzymes. Determining the conformational changes associated with voltage gating in the VSD itself in the absence of a pore domain thereby gains importance. We report the direct measurement of changes in the scattering-length density (SLD) profile of the VSD protein, vectorially oriented within a reconstituted phospholipid bilayer membrane, as a function of the transmembrane electric potential by time-resolved X-ray and neutron interferometry. The changes in the experimental SLD profiles for both polarizing and depolarizing potentials with respect to zero potential were found to extend over the entire length of the isolated VSD’s profile structure. The characteristics of the changes observed were in qualitative agreement with molecular dynamics simulations of a related membrane system, suggesting an initial interpretation of these changes in terms of the VSD’s atomic-level 3-D structure. PMID:24697545

Modulation of BK channel voltage gating by different auxiliary β subunits

PubMed Central

Contreras, Gustavo F.; Neely, Alan; Alvarez, Osvaldo; Gonzalez, Carlos; Latorre, Ramon

2012-01-01

Calcium- and voltage-activated potassium channels (BK) are regulated by a multiplicity of signals. The prevailing view is that different BK gating mechanisms converge to determine channel opening and that these gating mechanisms are allosterically coupled. In most instances the pore forming α subunit of BK is associated with one of four alternative β subunits that appear to target specific gating mechanisms to regulate the channel activity. In particular, β1 stabilizes the active configuration of the BK voltage sensor having a large effect on BK Ca2+ sensitivity. To determine the extent to which β subunits regulate the BK voltage sensor, we measured gating currents induced by the pore-forming BK α subunit alone and with the different β subunits expressed in Xenopus oocytes (β1, β2IR, β3b, and β4). We found that β1, β2, and β4 stabilize the BK voltage sensor in the active conformation. β3 has no effect on voltage sensor equilibrium. In addition, β4 decreases the apparent number of charges per voltage sensor. The decrease in the charge associated with the voltage sensor in α β4 channels explains most of their biophysical properties. For channels composed of the α subunit alone, gating charge increases slowly with pulse duration as expected if a significant fraction of this charge develops with a time course comparable to that of K+ current activation. In the presence of β1, β2, and β4 this slow component develops in advance of and much more rapidly than ion current activation, suggesting that BK channel opening proceeds in two steps. PMID:23112204

A new mechanism of voltage-dependent gating exposed by KV10.1 channels interrupted between voltage sensor and pore.

PubMed

Tomczak, Adam P; Fernández-Trillo, Jorge; Bharill, Shashank; Papp, Ferenc; Panyi, Gyorgy; Stühmer, Walter; Isacoff, Ehud Y; Pardo, Luis A

2017-05-01

Voltage-gated ion channels couple transmembrane potential changes to ion flow. Conformational changes in the voltage-sensing domain (VSD) of the channel are thought to be transmitted to the pore domain (PD) through an α-helical linker between them (S4-S5 linker). However, our recent work on channels disrupted in the S4-S5 linker has challenged this interpretation for the KCNH family. Furthermore, a recent single-particle cryo-electron microscopy structure of K V 10.1 revealed that the S4-S5 linker is a short loop in this KCNH family member, confirming the need for an alternative gating model. Here we use "split" channels made by expression of VSD and PD as separate fragments to investigate the mechanism of gating in K V 10.1. We find that disruption of the covalent connection within the S4 helix compromises the ability of channels to close at negative voltage, whereas disconnecting the S4-S5 linker from S5 slows down activation and deactivation kinetics. Surprisingly, voltage-clamp fluorometry and MTS accessibility assays show that the motion of the S4 voltage sensor is virtually unaffected when VSD and PD are not covalently bound. Finally, experiments using constitutively open PD mutants suggest that the presence of the VSD is structurally important for the conducting conformation of the pore. Collectively, our observations offer partial support to the gating model that assumes that an inward motion of the C-terminal S4 helix, rather than the S4-S5 linker, closes the channel gate, while also suggesting that control of the pore by the voltage sensor involves more than one mechanism. © 2017 Tomczak et al.

A new mechanism of voltage-dependent gating exposed by KV10.1 channels interrupted between voltage sensor and pore

PubMed Central

Fernández-Trillo, Jorge; Bharill, Shashank; Panyi, Gyorgy; Stühmer, Walter; Isacoff, Ehud Y.

2017-01-01

Voltage-gated ion channels couple transmembrane potential changes to ion flow. Conformational changes in the voltage-sensing domain (VSD) of the channel are thought to be transmitted to the pore domain (PD) through an α-helical linker between them (S4–S5 linker). However, our recent work on channels disrupted in the S4–S5 linker has challenged this interpretation for the KCNH family. Furthermore, a recent single-particle cryo-electron microscopy structure of KV10.1 revealed that the S4–S5 linker is a short loop in this KCNH family member, confirming the need for an alternative gating model. Here we use “split” channels made by expression of VSD and PD as separate fragments to investigate the mechanism of gating in KV10.1. We find that disruption of the covalent connection within the S4 helix compromises the ability of channels to close at negative voltage, whereas disconnecting the S4–S5 linker from S5 slows down activation and deactivation kinetics. Surprisingly, voltage-clamp fluorometry and MTS accessibility assays show that the motion of the S4 voltage sensor is virtually unaffected when VSD and PD are not covalently bound. Finally, experiments using constitutively open PD mutants suggest that the presence of the VSD is structurally important for the conducting conformation of the pore. Collectively, our observations offer partial support to the gating model that assumes that an inward motion of the C-terminal S4 helix, rather than the S4–S5 linker, closes the channel gate, while also suggesting that control of the pore by the voltage sensor involves more than one mechanism. PMID:28360219

Top and Split Gating Control of the Electrical Characteristics of a Two-dimensional Electron Gas in a LaAlO3/SrTiO3 Perovskite

NASA Astrophysics Data System (ADS)

Kwak, Yongsu; Song, Jonghyun; Kim, Jihwan; Kim, Jinhee

2018-04-01

A top gate field effect transistor was fabricated using polymethyl methacrylate (PMMA) as a gate insulator on a LaAlO3 (LAO)/SrTiO3 (STO) hetero-interface. It showed n-type behavior, and a depletion mode was observed at low temperature. The electronic properties of the 2-dimensional electron gas at the LAO/STO hetero-interface were not changed by covering LAO with PMMA following the Au top gate electrode. A split gate device was also fabricated to construct depletion mode by using a narrow constriction between the LAO/STO conduction interface. The depletion mode, as well as superconducting critical current, could be controlled by applying a split gate voltage. Noticeably, the superconducting critical current tended to decrease with decreasing the split gate voltage and finally became zero. These results indicate that a weak-linked Josephson junction can be constructed and destroyed by split gating. This observation opens the possibility of gate-voltage-adjustable quantum devices.

High voltage MOSFET switching circuit

DOEpatents

McEwan, T.E.

1994-07-26

The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

Analysis of low-offset CTIA amplifier for small-size-pixel infrared focal plane array

NASA Astrophysics Data System (ADS)

Zhang, Xue; Huang, Zhangcheng; Shao, Xiumei

2014-11-01

The design of input stage amplifier becomes more and more difficult as the expansion of format arrays and reduction of pixel size. A design method of low-offset amplifier based on 0.18-μm process used in small-size pixel is analyzed in order to decrease the dark signal of extended wavelength InGaAs infrared focal plane arrays (IRFPA). Based on an example of a cascode operational amplifier (op-amp), the relationship between input offset voltage and size of each transistor is discussed through theoretical analysis and Monte Carlo simulation. The results indicate that input transistors and load transistors have great influence on the input offset voltage while common-gate transistors are negligible. Furthermore, the offset voltage begins to increase slightly when the width and length of transistors decrease along with the diminution of pixel size, and raises rapidly when the size is smaller than a proximate threshold value. The offset voltage of preamplifiers with differential architecture and single-shared architecture in small pitch pixel are studied. After optimization under same conditions, simulation results show that single-shared architecture has smaller offset voltage than differential architecture.

Transparently wrap-gated semiconductor nanowire arrays for studies of gate-controlled photoluminescence

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nylund, Gustav; Storm, Kristian; Torstensson, Henrik

2013-12-04

We present a technique to measure gate-controlled photoluminescence (PL) on arrays of semiconductor nanowire (NW) capacitors using a transparent film of Indium-Tin-Oxide (ITO) wrapping around the nanowires as the gate electrode. By tuning the wrap-gate voltage, it is possible to increase the PL peak intensity of an array of undoped InP NWs by more than an order of magnitude. The fine structure of the PL spectrum reveals three subpeaks whose relative peak intensities change with gate voltage. We interpret this as gate-controlled state-filling of luminescing quantum dot segments formed by zincblende stacking faults in the mainly wurtzite NW crystal structure.

Molecular Interactions between Tarantula Toxins and Low-Voltage-Activated Calcium Channels

PubMed Central

Salari, Autoosa; Vega, Benjamin S.; Milescu, Lorin S.; Milescu, Mirela

2016-01-01

Few gating-modifier toxins have been reported to target low-voltage-activated (LVA) calcium channels, and the structural basis of toxin sensitivity remains incompletely understood. Studies of voltage-gated potassium (Kv) channels have identified the S3b–S4 “paddle motif,” which moves at the protein-lipid interface to drive channel opening, as the target for these amphipathic neurotoxins. Voltage-gated calcium (Cav) channels contain four homologous voltage sensor domains, suggesting multiple toxin binding sites. We show here that the S3–S4 segments within Cav3.1 can be transplanted into Kv2.1 to examine their individual contributions to voltage sensing and pharmacology. With these results, we now have a more complete picture of the conserved nature of the paddle motif in all three major voltage-gated ion channel types (Kv, Nav, and Cav). When screened with tarantula toxins, the four paddle sequences display distinct toxin binding properties, demonstrating that gating-modifier toxins can bind to Cav channels in a domain specific fashion. Domain III was the most commonly and strongly targeted, and mutagenesis revealed an acidic residue that is important for toxin binding. We also measured the lipid partitioning strength of all toxins tested and observed a positive correlation with their inhibition of Cav3.1, suggesting a key role for membrane partitioning. PMID:27045173

An electrostatic potassium channel opener targeting the final voltage sensor transition

PubMed Central

Börjesson, Sara I.

2011-01-01

Free polyunsaturated fatty acids (PUFAs) modulate the voltage dependence of voltage-gated ion channels. As an important consequence thereof, PUFAs can suppress epileptic seizures and cardiac arrhythmia. However, molecular details for the interaction between PUFA and ion channels are not well understood. In this study, we have localized the site of action for PUFAs on the voltage-gated Shaker K channel by introducing positive charges on the channel surface, which potentiated the PUFA effect. Furthermore, we found that PUFA mainly affects the final voltage sensor movement, which is closely linked to channel opening, and that specific charges at the extracellular end of the voltage sensor are critical for the PUFA effect. Because different voltage-gated K channels have different charge profiles, this implies channel-specific PUFA effects. The identified site and the pharmacological mechanism will potentially be very useful in future drug design of small-molecule compounds specifically targeting neuronal and cardiac excitability. PMID:21624947

C-terminus-mediated voltage gating of Arabidopsis guard cell anion channel QUAC1.

PubMed

Mumm, Patrick; Imes, Dennis; Martinoia, Enrico; Al-Rasheid, Khaled A S; Geiger, Dietmar; Marten, Irene; Hedrich, Rainer

2013-09-01

Anion transporters in plants play a fundamental role in volume regulation and signaling. Currently, two plasma membrane-located anion channel families—SLAC/SLAH and ALMT—are known. Among the ALMT family, the root-expressed ALuminium-activated Malate Transporter 1 was identified by comparison of aluminum-tolerant and Al(3+)-sensitive wheat cultivars and was subsequently shown to mediate voltage-independent malate currents. In contrast, ALMT12/QUAC1 (QUickly activating Anion Channel1) is expressed in guard cells transporting malate in an Al(3+)-insensitive and highly voltage-dependent manner. So far, no information is available about the structure and mechanism of voltage-dependent gating with the QUAC1 channel protein. Here, we analyzed gating of QUAC1-type currents in the plasma membrane of guard cells and QUAC1-expressing oocytes revealing similar voltage dependencies and activation–deactivation kinetics. In the heterologous expression system, QUAC1 was electrophysiologically characterized at increasing extra- and intracellular malate concentrations. Thereby, malate additively stimulated the voltage-dependent QUAC1 activity. In search of structural determinants of the gating process, we could not identify transmembrane domains common for voltage-sensitive channels. However, site-directed mutations and deletions at the C-terminus of QUAC1 resulted in altered voltage-dependent channel activity. Interestingly, the replacement of a single glutamate residue, which is conserved in ALMT channels from different clades, by an alanine disrupted QUAC1 activity. Together with C- and N-terminal tagging, these results indicate that the cytosolic C-terminus is involved in the voltage-dependent gating mechanism of QUAC1.

ADAPTIVE THRESHOLD LOGIC.

DTIC Science & Technology

The design and construction of a 16 variable threshold logic gate with adaptable weights is described. The operating characteristics of tape wound...and sizes as well as for the 16 input adaptive threshold logic gate. (Author)

2-D Modeling of Nanoscale MOSFETs: Non-Equilibrium Green's Function Approach

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Electron-electron interaction is treated within Hartree approximation by solving NEGF and Poisson equations self-consistently. For the calculations presented here, parallelization is performed by distributing the solution of NEGF equations to various processors, energy wise. We present simulation of the "benchmark" MIT 25nm and 90nm MOSFETs and compare our results to those from the drift-diffusion simulator and the quantum-corrected results available. In the 25nm MOSFET, the channel length is less than ten times the electron wavelength, and the electron scattering time is comparable to its transit time. Our main results are: (1) Simulated drain subthreshold current characteristics are shown, where the potential profiles are calculated self-consistently by the corresponding simulation methods. The current predicted by our quantum simulation has smaller subthreshold slope of the Vg dependence which results in higher threshold voltage. (2) When gate oxide thickness is less than 2 nm, gate oxide leakage is a primary factor which determines off-current of a MOSFET (3) Using our 2-D NEGF simulator, we found several ways to drastically decrease oxide leakage current without compromising drive current. (4) Quantum mechanically calculated electron density is much smaller than the background doping density in the poly silicon gate region near oxide interface. This creates an additional effective gate voltage. Different ways to. include this effect approximately will be discussed.

Evolutionarily conserved intracellular gate of voltage-dependent sodium channels

NASA Astrophysics Data System (ADS)

Oelstrom, Kevin; Goldschen-Ohm, Marcel P.; Holmgren, Miguel; Chanda, Baron

2014-03-01

Members of the voltage-gated ion channel superfamily (VGIC) regulate ion flux and generate electrical signals in excitable cells by opening and closing pore gates. The location of the gate in voltage-gated sodium channels, a founding member of this superfamily, remains unresolved. Here we explore the chemical modification rates of introduced cysteines along the S6 helix of domain IV in an inactivation-removed background. We find that state-dependent accessibility is demarcated by an S6 hydrophobic residue; substituted cysteines above this site are not modified by charged thiol reagents when the channel is closed. These accessibilities are consistent with those inferred from open- and closed-state structures of prokaryotic sodium channels. Our findings suggest that an intracellular gate composed of a ring of hydrophobic residues is not only responsible for regulating access to the pore of sodium channels, but is also a conserved feature within canonical members of the VGIC superfamily.

Breathing of voltage dependent anion channel as revealed by the fractal property of its gating

NASA Astrophysics Data System (ADS)

Manna, Smarajit; Banerjee, Jyotirmoy; Ghosh, Subhendu

2007-12-01

The gating of voltage dependent anion channel (VDAC) depends on the movement of voltage sensors in the transmembrane region, but the actual mechanism is still not well understood. With a view to understand the phenomenon we have analyzed the current recordings of VDAC in lipid bilayer membrane (BLM) and found that the data show self-similarity and fractal characteristics. We look for the microscopic and molecular basis of fractal behavior of gating of VDAC. A model describing the oscillatory dynamics of voltage sensors of VDAC in the transmembrane region under applied potential has been proposed which gives rise to the aforesaid fractal behavior.

Operational stability of solution-processed indium-oxide thin-film transistors: Environmental condition and electrical stress

NASA Astrophysics Data System (ADS)

Baang, Sungkeun; Lee, Hyeonju; Zhang, Xue; Park, Jaehoon; Kim, Won-Pyo; Ko, Young-Woong; Piao, Shang Hao; Choi, Hyoung Jin; Kwon, Jin-Hyuk; Bae, Jin-Hyuk

2018-01-01

We investigate the operational stability of bottom-gate/top-contact-structured indium-oxide (In2O3) thin-film transistors (TFTs) in atmospheric air and under vacuum. Based on the thermogravimetric analysis of the In2O3 precursor solution, we utilize a thermal annealing process at 400 °C for 40 min to prepare the In2O3 films. The results of X-ray photoemission spectroscopy and field-emission scanning electron microscopy show that the electron is the majority carrier in the In2O3 semiconductor film prepared by a spin-coating method and that the film has a polycrystalline morphology with grain boundaries. The fabricated In2O3 TFTs operate in an n-type enhancement mode. When constant drain and gate voltages are applied, these TFTs in atmospheric air exhibit a more acute decay in the drain currents with time compared to that observed under vacuum. In the positive gate-bias stress experiments, a decrease in the field-effect mobility and a positive shift in the threshold voltage are invariably observed both in atmospheric air and under vacuum, but such characteristic variations are also found to be more pronounced for the atmospheric-air case. These results are explained in terms of the electron-trapping phenomenon at the grain boundaries in the In2O3 semiconductor, as well as the electrostatic interactions between electrons and polar water molecules.

Hydrophobic interactions between the voltage sensor and pore mediate inactivation in Kv11.1 channels

PubMed Central

Perry, Matthew D.; Wong, Sophia; Ng, Chai Ann

2013-01-01

Kv11.1 channels are critical for the maintenance of a normal heart rhythm. The flow of potassium ions through these channels is controlled by two voltage-regulated gates, termed “activation” and “inactivation,” located at opposite ends of the pore. Crucially in Kv11.1 channels, inactivation gating occurs much more rapidly, and over a distinct range of voltages, compared with activation gating. Although it is clear that the fourth transmembrane segments (S4), within each subunit of the tetrameric channel, are important for controlling the opening and closing of the activation gate, their role during inactivation gating is much less clear. Here, we use rate equilibrium free energy relationship (REFER) analysis to probe the contribution of the S4 “voltage-sensor” helix during inactivation of Kv11.1 channels. Contrary to the important role that charged residues play during activation gating, it is the hydrophobic residues (Leu529, Leu530, Leu532, and Val535) that are the key molecular determinants of inactivation gating. Within the context of an interconnected multi-domain model of Kv11.1 inactivation gating, our REFER analysis indicates that the S4 helix and the S4–S5 linker undergo a conformational rearrangement shortly after that of the S5 helix and S5P linker, but before the S6 helix. Combining REFER analysis with double mutant cycle analysis, we provide evidence for a hydrophobic interaction between residues on the S4 and S5 helices. Based on a Kv11.1 channel homology model, we propose that this hydrophobic interaction forms the basis of an intersubunit coupling between the voltage sensor and pore domain that is an important mediator of inactivation gating. PMID:23980196

Unfolding of a Temperature-Sensitive Domain Controls Voltage-Gated Channel Activation.

PubMed

Arrigoni, Cristina; Rohaim, Ahmed; Shaya, David; Findeisen, Felix; Stein, Richard A; Nurva, Shailika Reddy; Mishra, Smriti; Mchaourab, Hassane S; Minor, Daniel L

2016-02-25

Voltage-gated ion channels (VGICs) are outfitted with diverse cytoplasmic domains that impact function. To examine how such elements may affect VGIC behavior, we addressed how the bacterial voltage-gated sodium channel (BacNa(V)) C-terminal cytoplasmic domain (CTD) affects function. Our studies show that the BacNa(V) CTD exerts a profound influence on gating through a temperature-dependent unfolding transition in a discrete cytoplasmic domain, the neck domain, proximal to the pore. Structural and functional studies establish that the BacNa(V) CTD comprises a bi-partite four-helix bundle that bears an unusual hydrophilic core whose integrity is central to the unfolding mechanism and that couples directly to the channel activation gate. Together, our findings define a general principle for how the widespread four-helix bundle cytoplasmic domain architecture can control VGIC responses, uncover a mechanism underlying the diverse BacNa(V) voltage dependencies, and demonstrate that a discrete domain can encode the temperature-dependent response of a channel. Copyright © 2016 Elsevier Inc. All rights reserved.

Unfolding of a temperature-sensitive domain controls voltage-gated channel activation

PubMed Central

Arrigoni, Cristina; Rohaim, Ahmed; Shaya, David; Findeisen, Felix; Stein, Richard A.; Nurva, Shailika Reddy; Mishra, Smriti; Mchaourab, Hassane S.; Minor, Daniel L.

2016-01-01

Voltage-gated ion channels (VGICs) are outfitted with diverse cytoplasmic domains that impact function. To examine how such elements may affect VGIC behavior, we addressed how the bacterial voltage-gated sodium channel (BacNaV) C-terminal cytoplasmic domain (CTD) affects function. Our studies show that the BacNaV CTD exerts a profound influence on gating through a temperature-dependent unfolding transition in a discrete cytoplasmic domain, the neck domain, proximal to the pore. Structural and functional studies establish that the BacNaV CTD comprises a bi-partite four-helix bundle that bears an unusual hydrophilic core whose integrity is central to the unfolding mechanism and that couples directly to the channel activation gate. Together, our findings define a general principle for how the widespread four-helix bundle cytoplasmic domain architecture can control VGIC responses, uncover a mechanism underlying the diverse BacNaV voltage dependencies, and demonstrate that a discrete domain can encode the temperature dependent response of a channel. PMID:26919429

Characterization of high-dose and high-energy implanted gate and source diode and analysis of lateral spreading of p gate profile in high voltage SiC static induction transistors

NASA Astrophysics Data System (ADS)

Onose, Hidekatsu; Kobayashi, Yutaka; Onuki, Jin

2017-03-01

The effect of the p gate dose on the characteristics of the gate-source diode in SiC static induction transistors (SIT) was investigated. It was found that a dose of 1.5 × 1014 cm-2 yields a pn junction breakdown voltage higher than 60 V and good forward characteristics. A normally on SiC SIT was fabricated and demonstrated. A blocking voltage higher than 2.0 kV at a gate-source voltage of -50 V and on-resistance of 70 mΩ cm2 were obtained. Device simulations were performed to investigate the effect of the lateral spreading. By comparing the measured I-V curves with simulation results, the lateral spreading factor was estimated to be about 0.5. The lateral spreading detrimentally affected the electrical properties of the SIT made using implantations at energies higher than 1 MeV.

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed Central

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc. PMID:26039589

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc.

A Non-canonical Voltage-Sensing Mechanism Controls Gating in K2P K(+) Channels.

PubMed

Schewe, Marcus; Nematian-Ardestani, Ehsan; Sun, Han; Musinszki, Marianne; Cordeiro, Sönke; Bucci, Giovanna; de Groot, Bert L; Tucker, Stephen J; Rapedius, Markus; Baukrowitz, Thomas

2016-02-25

Two-pore domain (K2P) K(+) channels are major regulators of excitability that endow cells with an outwardly rectifying background "leak" conductance. In some K2P channels, strong voltage-dependent activation has been observed, but the mechanism remains unresolved because they lack a canonical voltage-sensing domain. Here, we show voltage-dependent gating is common to most K2P channels and that this voltage sensitivity originates from the movement of three to four ions into the high electric field of an inactive selectivity filter. Overall, this ion-flux gating mechanism generates a one-way "check valve" within the filter because outward movement of K(+) induces filter opening, whereas inward movement promotes inactivation. Furthermore, many physiological stimuli switch off this flux gating mode to convert K2P channels into a leak conductance. These findings provide insight into the functional plasticity of a K(+)-selective filter and also refine our understanding of K2P channels and the mechanisms by which ion channels can sense voltage. Copyright © 2016 The Authors. Published by Elsevier Inc. All rights reserved.

Microscopic origin of gating current fluctuations in a potassium channel voltage sensor.

PubMed

Freites, J Alfredo; Schow, Eric V; White, Stephen H; Tobias, Douglas J

2012-06-06

Voltage-dependent ion channels open and close in response to changes in membrane electrical potential due to the motion of their voltage-sensing domains (VSDs). VSD charge displacements within the membrane electric field are observed in electrophysiology experiments as gating currents preceding ionic conduction. The elementary charge motions that give rise to the gating current cannot be observed directly, but appear as discrete current pulses that generate fluctuations in gating current measurements. Here we report direct observation of gating-charge displacements in an atomistic molecular dynamics simulation of the isolated VSD from the KvAP channel in a hydrated lipid bilayer on the timescale (10-μs) expected for elementary gating charge transitions. The results reveal that gating-charge displacements are associated with the water-catalyzed rearrangement of salt bridges between the S4 arginines and a set of conserved acidic side chains on the S1-S3 transmembrane segments in the hydrated interior of the VSD. Copyright © 2012 Biophysical Society. Published by Elsevier Inc. All rights reserved.

New PMOS LTPS TFT pixel for AMOLED to suppress the hysteresis effect on OLED current by employing a reset voltage driving

NASA Astrophysics Data System (ADS)

Lee, Jae-Hoon; Park, Sang-Geun; Han, Sang-Myeon; Han, Min-Koo; Park, Kee-Chan

2008-03-01

New PMOS LTPS (low temperature polycrystalline silicon)-thin film transistor (TFT) pixel circuit, which can suppress an OLED current error caused by the hysteresis of LTPS-TFT for active matrix organic light emitting diode (AMOLED) display, is proposed and fabricated. The proposed pixel circuit employs a reset voltage driving so that the sweep direction of gate voltage in the current driving TFT is not altered by the gate voltage in the previous frame. Our experimental results show that OLED current error of the proposed pixel is successfully suppressed because a reset voltage can enable the starting gate voltage for a desired one not to be varied, while that of the conventional 2-TFT pixel exceeds over 15% due to the hysteresis of LTPS-TFT.

Nano-Transistor Modeling: Two Dimensional Green's Function Method

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

Two quantum mechanical effects that impact the operation of nanoscale transistors are inversion layer energy quantization and ballistic transport. While the qualitative effects of these features are reasonably understood, a comprehensive study of device physics in two dimensions is lacking. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL (Drain Induced Barrier Lowering), and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI).

Compact modeling of nanoscale triple-gate junctionless transistors covering drift-diffusion to quasi-ballistic carrier transport

NASA Astrophysics Data System (ADS)

Oproglidis, T. A.; Karatsori, T. A.; Barraud, S.; Ghibaudo, G.; Dimitriadis, C. A.

2018-04-01

In this work, we extend our analytical compact model for nanoscale junctionless triple-gate (JL TG) MOSFETs, capturing carrier transport from drift-diffusion to quasi-ballistic regime. This is based on a simple formulation of the low-field mobility extracted from experimental data using the Y-function method, taking into account the ballistic carrier motion and an increased carrier scattering in process-induced defects near the source/drain regions. The case of a Schottky junction in non-ideal ohmic contact at the drain side was also taken into account by modifying the threshold voltage and ideality factor of the JL transistor. The model is validated with experimental data for n-channel JL TG MOSFETs with channel length varying from 95 down to 25 nm. It can be easily implemented as a compact model for use in Spice circuit simulators.

Study of the enhancement-mode AlGaN/GaN high electron mobility transistor with split floating gates

NASA Astrophysics Data System (ADS)

Wang, Hui; Wang, Ning; Jiang, Ling-Li; Zhao, Hai-Yue; Lin, Xin-Peng; Yu, Hong-Yu

2017-11-01

In this work, the charge storage based split floating gates (FGs) enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) are studied. The simulation results reveal that under certain density of two dimensional electron gas, the variation tendency of the threshold voltage (Vth) with the variation of the blocking dielectric thickness depends on the FG charge density. It is found that when the length sum and isolating spacing sum of the FGs both remain unchanged, the Vth shall decrease with the increasing FGs number but maintaining the device as E-mode. It is also reported that for the FGs HEMT, the failure of a FG will lead to the decrease of Vth as well as the increase of drain current, and the failure probability can be improved significantly with the increase of FGs number.

Influences of Gate Bias and Light Stresses on Device Characteristics of High-Energy Electron-Beam-Irradiated Indium Gallium Zinc Oxide Based Thin Film Transistors

NASA Astrophysics Data System (ADS)

Yu, Kyeong Min; Moon, Hye Ji; Ryu, Min Ki; Cho, Kyoung Ik; Yun, Eui-Jung; Bae, Byung Seong

2012-09-01

Under white light illumination, amorphous indium-gallium-zinc oxide (a-IGZO)-based thin-film transistors (TFTs) showed a large negative shift of threshold voltage of more than -15 V depending on the process conditions. We investigated the influences of both gate bias and white light illumination on device properties of IGZO-based TFTs untreated and treated with high-energy electron beam irradiation (HEEBI). The TFTs were treated with HEEBI in air at room temperature (RT), electron beam energy of 0.8 MeV, and a dose of 1×1014 electrons/cm2. The HEEBI-treated TFTs showed an improved stability under negative bias illumination stress (NBIS) and positive bias illumination stress (PBIS) compared with non-HEEBI-treated TFTs, suggesting that the acceptor-like defects might be generated by HEEBI treatment near the valence band edge.

Oxide Semiconductor-Based Flexible Organic/Inorganic Hybrid Thin-Film Transistors Fabricated on Polydimethylsiloxane Elastomer.

PubMed

Jung, Soon-Won; Choi, Jeong-Seon; Park, Jung Ho; Koo, Jae Bon; Park, Chan Woo; Na, Bock Soon; Oh, Ji-Young; Lim, Sang Chul; Lee, Sang Seok; Chu, Hye Yong

2016-03-01

We demonstrate flexible organic/inorganic hybrid thin-film transistors (TFTs) on a polydimethysilox- ane (PDMS) elastomer substrate. The active channel and gate insulator of the hybrid TFT are composed of In-Ga-Zn-O (IGZO) and blends of poly(vinylidene fluoride-trifluoroethylene) [P(VDF- TrFE)] with poly(methyl methacrylate) (PMMA), respectively. It has been confirmed that the fabri- cated TFT display excellent characteristics: the recorded field-effect mobility, sub-threshold voltage swing, and I(on)/I(off) ratio were approximately 0.35 cm2 V(-1) s(-1), 1.5 V/decade, and 10(4), respectively. These characteristics did not experience any degradation at a bending radius of 15 mm. These results correspond to the first demonstration of a hybrid-type TFT using an organic gate insulator/oxide semiconducting active channel structure fabricated on PDMS elastomer, and demonstrate the feasibility of a promising device in a flexible electronic system.

Impact of random discrete dopant in extension induced fluctuation in gate-source/drain underlap FinFET

NASA Astrophysics Data System (ADS)

Wang, Yijiao; Huang, Peng; Xin, Zheng; Zeng, Lang; Liu, Xiaoyan; Du, Gang; Kang, Jinfeng

2014-01-01

In this work, three dimensional technology computer-aided design (TCAD) simulations are performed to investigate the impact of random discrete dopant (RDD) including extension induced fluctuation in 14 nm silicon-on-insulator (SOI) gate-source/drain (G-S/D) underlap fin field effect transistor (FinFET). To fully understand the RDD impact in extension, RDD effect is evaluated in channel and extension separately and together. The statistical variability of FinFET performance parameters including threshold voltage (Vth), subthreshold slope (SS), drain induced barrier lowering (DIBL), drive current (Ion), and leakage current (Ioff) are analyzed. The results indicate that RDD in extension can lead to substantial variability, especially for SS, DIBL, and Ion and should be taken into account together with that in channel to get an accurate estimation on RDF. Meanwhile, higher doping concentration of extension region is suggested from the perspective of overall variability control.

Recovery of damage in rad-hard MOS devices during and after irradiation by electrons, protons, alphas, and gamma rays

NASA Technical Reports Server (NTRS)

Brucker, G. J.; Van Gunten, O.; Stassinopoulos, E. G.; Shapiro, P.; August, L. S.; Jordan, T. M.

1983-01-01

This paper reports on the recovery properties of rad-hard MOS devices during and after irradiation by electrons, protons, alphas, and gamma rays. The results indicated that complex recovery properties controlled the damage sensitivities of the tested parts. The results also indicated that damage sensitivities depended on dose rate, total dose, supply bias, gate bias, transistor type, radiation source, and particle energy. The complex nature of these dependencies make interpretation of LSI device performance in space (exposure to entire electron and proton spectra) difficult, if not impossible, without respective ground tests and analyses. Complete recovery of n-channel shifts was observed, in some cases within hours after irradiation, with equilibrium values of threshold voltages greater than their pre-irradiation values. This effect depended on total dose, radiation source, and gate bias during exposure. In contrast, the p-channel shifts recovered only 20 percent within 30 days after irradiation.

Light-induced hysteresis and recovery behaviors in photochemically activated solution-processed metal-oxide thin-film transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jo, Jeong-Wan; Park, Sung Kyu, E-mail: yhkim76@skku.edu, E-mail: skpark@cau.ac.kr; Kim, Yong-Hoon, E-mail: yhkim76@skku.edu, E-mail: skpark@cau.ac.kr

2014-07-28

In this report, photo-induced hysteresis, threshold voltage (V{sub T}) shift, and recovery behaviors in photochemically activated solution-processed indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are investigated. It was observed that a white light illumination caused negative V{sub T} shift along with creation of clockwise hysteresis in electrical characteristics which can be attributed to photo-generated doubly ionized oxygen vacancies at the semiconductor/gate dielectric interface. More importantly, the photochemically activated IGZO TFTs showed much reduced overall V{sub T} shift compared to thermally annealed TFTs. Reduced number of donor-like interface states creation under light illumination and more facile neutralization of ionized oxygen vacancies bymore » electron capture under positive gate potential are claimed to be the origin of the less V{sub T} shift in photochemically activated TFTs.« less

Solution-processed p-type copper(I) thiocyanate (CuSCN) for low-voltage flexible thin-film transistors and integrated inverter circuits

NASA Astrophysics Data System (ADS)

Petti, Luisa; Pattanasattayavong, Pichaya; Lin, Yen-Hung; Münzenrieder, Niko; Cantarella, Giuseppe; Yaacobi-Gross, Nir; Yan, Feng; Tröster, Gerhard; Anthopoulos, Thomas D.

2017-03-01

We report on low operating voltage thin-film transistors (TFTs) and integrated inverters based on copper(I) thiocyanate (CuSCN) layers processed from solution at low temperature on free-standing plastic foils. As-fabricated coplanar bottom-gate and staggered top-gate TFTs exhibit hole-transporting characteristics with average mobility values of 0.0016 cm2 V-1 s-1 and 0.013 cm2 V-1 s-1, respectively, current on/off ratio in the range 102-104, and maximum operating voltages between -3.5 and -10 V, depending on the gate dielectric employed. The promising TFT characteristics enable fabrication of unipolar NOT gates on flexible free-standing plastic substrates with voltage gain of 3.4 at voltages as low as -3.5 V. Importantly, discrete CuSCN transistors and integrated logic inverters remain fully functional even when mechanically bent to a tensile radius of 4 mm, demonstrating the potential of the technology for flexible electronics.

The isolated voltage sensing domain of the Shaker potassium channel forms a voltage-gated cation channel.

PubMed

Zhao, Juan; Blunck, Rikard

2016-10-06

Domains in macromolecular complexes are often considered structurally and functionally conserved while energetically coupled to each other. In the modular voltage-gated ion channels the central ion-conducting pore is surrounded by four voltage sensing domains (VSDs). Here, the energetic coupling is mediated by interactions between the S4-S5 linker, covalently linking the domains, and the proximal C-terminus. In order to characterize the intrinsic gating of the voltage sensing domain in the absence of the pore domain, the Shaker Kv channel was truncated after the fourth transmembrane helix S4 (Shaker-iVSD). Shaker-iVSD showed significantly altered gating kinetics and formed a cation-selective ion channel with a strong preference for protons. Ion conduction in Shaker-iVSD developed despite identical primary sequence, indicating an allosteric influence of the pore domain. Shaker-iVSD also displays pronounced 'relaxation'. Closing of the pore correlates with entry into relaxation suggesting that the two processes are energetically related.

Structural Mechanism of Voltage-Dependent Gating in an Isolated Voltage-Sensing Domain

PubMed Central

Li, Qufei; Wanderling, Sherry; Paduch, Marcin; Medovoy, David; Singharoy, Abhishek; McGreevy, Ryan; Villalba-Galea, Carlos; Hulse, Raymond E.; Roux, Benoit; Schulten, Klaus; Kossiakoff, Anthony; Perozo, Eduardo

2014-01-01

SUMMARY The transduction of transmembrane electric fields into protein motion plays an essential role in the generation and propagation of cellular signals. Voltage-sensing domains (VSD) carry out these functions through reorientations of S4 helix with discrete gating charges. Here, crystal structures of the VSD from Ci-VSP were determined in both, active (Up) and resting (Down) conformations. The S4 undergoes a ~5 Å displacement along its main axis accompanied by a ~60o rotation, consistent with the helix-screw gating mechanism. This movement is stabilized by a change in countercharge partners in helices S1 and S3, generating an estimated net charge transfer of ~1 eo. Gating charges move relative to a “hydrophobic gasket” that electrically divides intra and extracellular compartments. EPR spectroscopy confirms the limited nature of S4 movement in a membrane environment. These results provide an explicit mechanism for voltage sensing and set the basis for electromechanical coupling in voltage-dependent cellular activities. PMID:24487958

The voltage-sensing domain of a phosphatase gates the pore of a potassium channel

PubMed Central

Arrigoni, Cristina; Schroeder, Indra; Romani, Giulia; Van Etten, James L.; Thiel, Gerhard

2013-01-01

The modular architecture of voltage-gated K+ (Kv) channels suggests that they resulted from the fusion of a voltage-sensing domain (VSD) to a pore module. Here, we show that the VSD of Ciona intestinalis phosphatase (Ci-VSP) fused to the viral channel Kcv creates KvSynth1, a functional voltage-gated, outwardly rectifying K+ channel. KvSynth1 displays the summed features of its individual components: pore properties of Kcv (selectivity and filter gating) and voltage dependence of Ci-VSP (V1/2 = +56 mV; z of ∼1), including the depolarization-induced mode shift. The degree of outward rectification of the channel is critically dependent on the length of the linker more than on its amino acid composition. This highlights a mechanistic role of the linker in transmitting the movement of the sensor to the pore and shows that electromechanical coupling can occur without coevolution of the two domains. PMID:23440279

Voltage-dependent K+ channel gating and voltage sensor toxin sensitivity depend on the mechanical state of the lipid membrane.

PubMed

Schmidt, Daniel; MacKinnon, Roderick

2008-12-09

Voltage-dependent K(+) (Kv) channels underlie action potentials through gating conformational changes that are driven by membrane voltage. In this study of the paddle chimera Kv channel, we demonstrate that the rate of channel opening, the voltage dependence of the open probability, and the maximum achievable open probability depend on the lipid membrane environment. The activity of the voltage sensor toxin VsTx1, which interferes with voltage-dependent gating by partitioning into the membrane and binding to the channel, also depends on the membrane. Membrane environmental factors that influence channel function are divisible into two general categories: lipid compositional and mechanical state. The mechanical state can have a surprisingly large effect on the function of a voltage-dependent K(+) channel, including its pharmacological interaction with voltage sensor toxins. The dependence of VSTx1 activity on the mechanical state of the membrane leads us to hypothesize that voltage sensor toxins exert their effect by perturbing the interaction forces that exist between the channel and the membrane.

Voltage-dependent K+ channel gating and voltage sensor toxin sensitivity depend on the mechanical state of the lipid membrane

PubMed Central

Schmidt, Daniel; MacKinnon, Roderick

2008-01-01

Voltage-dependent K+ (Kv) channels underlie action potentials through gating conformational changes that are driven by membrane voltage. In this study of the paddle chimera Kv channel, we demonstrate that the rate of channel opening, the voltage dependence of the open probability, and the maximum achievable open probability depend on the lipid membrane environment. The activity of the voltage sensor toxin VsTx1, which interferes with voltage-dependent gating by partitioning into the membrane and binding to the channel, also depends on the membrane. Membrane environmental factors that influence channel function are divisible into two general categories: lipid compositional and mechanical state. The mechanical state can have a surprisingly large effect on the function of a voltage-dependent K+ channel, including its pharmacological interaction with voltage sensor toxins. The dependence of VSTx1 activity on the mechanical state of the membrane leads us to hypothesize that voltage sensor toxins exert their effect by perturbing the interaction forces that exist between the channel and the membrane. PMID:19050073

Outward Rectification of Voltage-Gated K+ Channels Evolved at Least Twice in Life History

PubMed Central

Riedelsberger, Janin; Dreyer, Ingo; Gonzalez, Wendy

2015-01-01

Voltage-gated potassium (K+) channels are present in all living systems. Despite high structural similarities in the transmembrane domains (TMD), this K+ channel type segregates into at least two main functional categories—hyperpolarization-activated, inward-rectifying (Kin) and depolarization-activated, outward-rectifying (Kout) channels. Voltage-gated K+ channels sense the membrane voltage via a voltage-sensing domain that is connected to the conduction pathway of the channel. It has been shown that the voltage-sensing mechanism is the same in Kin and Kout channels, but its performance results in opposite pore conformations. It is not known how the different coupling of voltage-sensor and pore is implemented. Here, we studied sequence and structural data of voltage-gated K+ channels from animals and plants with emphasis on the property of opposite rectification. We identified structural hotspots that alone allow already the distinction between Kin and Kout channels. Among them is a loop between TMD S5 and the pore that is very short in animal Kout, longer in plant and animal Kin and the longest in plant Kout channels. In combination with further structural and phylogenetic analyses this finding suggests that outward-rectification evolved twice and independently in the animal and plant kingdom. PMID:26356684

Outward Rectification of Voltage-Gated K+ Channels Evolved at Least Twice in Life History.

PubMed

Riedelsberger, Janin; Dreyer, Ingo; Gonzalez, Wendy

2015-01-01

Voltage-gated potassium (K+) channels are present in all living systems. Despite high structural similarities in the transmembrane domains (TMD), this K+ channel type segregates into at least two main functional categories-hyperpolarization-activated, inward-rectifying (Kin) and depolarization-activated, outward-rectifying (Kout) channels. Voltage-gated K+ channels sense the membrane voltage via a voltage-sensing domain that is connected to the conduction pathway of the channel. It has been shown that the voltage-sensing mechanism is the same in Kin and Kout channels, but its performance results in opposite pore conformations. It is not known how the different coupling of voltage-sensor and pore is implemented. Here, we studied sequence and structural data of voltage-gated K+ channels from animals and plants with emphasis on the property of opposite rectification. We identified structural hotspots that alone allow already the distinction between Kin and Kout channels. Among them is a loop between TMD S5 and the pore that is very short in animal Kout, longer in plant and animal Kin and the longest in plant Kout channels. In combination with further structural and phylogenetic analyses this finding suggests that outward-rectification evolved twice and independently in the animal and plant kingdom.

MULTIPLIER CIRCUIT

DOEpatents

Thomas, R.E.

1959-01-20

An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

Optimization of a Solution-Processed SiO2 Gate Insulator by Plasma Treatment for Zinc Oxide Thin Film Transistors.

PubMed

Jeong, Yesul; Pearson, Christopher; Kim, Hyun-Gwan; Park, Man-Young; Kim, Hongdoo; Do, Lee-Mi; Petty, Michael C

2016-01-27

We report on the optimization of the plasma treatment conditions for a solution-processed silicon dioxide gate insulator for application in zinc oxide thin film transistors (TFTs). The SiO2 layer was formed by spin coating a perhydropolysilazane (PHPS) precursor. This thin film was subsequently thermally annealed, followed by exposure to an oxygen plasma, to form an insulating (leakage current density of ∼10(-7) A/cm(2)) SiO2 layer. Optimized ZnO TFTs (40 W plasma treatment of the gate insulator for 10 s) possessed a carrier mobility of 3.2 cm(2)/(V s), an on/off ratio of ∼10(7), a threshold voltage of -1.3 V, and a subthreshold swing of 0.2 V/decade. In addition, long-term exposure (150 min) of the pre-annealed PHPS to the oxygen plasma enabled the maximum processing temperature to be reduced from 180 to 150 °C. The resulting ZnO TFT exhibited a carrier mobility of 1.3 cm(2)/(V s) and on/off ratio of ∼10(7).

Electric bistability induced by incorporating self-assembled monolayers/aggregated clusters of azobenzene derivatives in pentacene-based thin-film transistors.

PubMed

Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai

2012-10-24

Composite films of pentacene and a series of azobenzene derivatives are prepared and used as the active channel material in top-contact, bottom-gate field-effect transistors. The transistors exhibit high field-effect mobility as well as large I-V hysteresis as a function of the gate bias history. The azobenzene moieties, incorporated either in the form of self-assembled monolayer or discrete multilayer clusters at the dielectric surface, result in electric bistability of the pentacene-based transistor either by photoexcitation or gate biasing. The direction of threshold voltage shifts, size of hysteresis, response time, and retention characteristics all strongly depend on the substituent on the benzene ring. The results show that introducing a monolayer of azobenzene moieties results in formation of charge carrier traps responsible for slower switching between the bistable states and longer retention time. With clusters of azobenzene moieties as the trap sites, the switching is faster but the retention is shorter. Detailed film structure analyses and correlation with the transistor/memory properties of these devices are provided.

Modeling of static electrical properties in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Minari, Takeo; Tsukagoshi, Kazuhito; Gwoziecki, Romain; Coppard, Romain; Benwadih, Mohamed; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-07-01

A modeling of organic field-effect transistors' (OFETs') electrical characteristics is presented. This model is based on a one-dimensional (1-D) Poisson's equation solution that solves the potential profile in the organic semiconducting film. Most importantly, it demonstrates that, due to the common open-surface configuration used in organic transistors, the conduction occurs in the film volume below threshold. This is because the potential at the free surface is not fixed to zero but rather rises also with the gate bias. The tail of carrier concentration at the free surface is therefore significantly modulated by the gate bias, which partially explains the gate-voltage dependent contact resistance. At the same time in the so-called subthreshold region, we observe a clear charge trapping from the difference between C-V and I-V measurements; hence a traps study by numerical simulation is also performed. By combining the analytical modeling and the traps analysis, the questions on the C-V and I-V characteristics are answered. Finally, the combined results obtained with traps fit well the experimental data in both pentacene and bis(triisopropylsilylethynyl)-pentacene OFETs.

Current transport mechanisms in mercury cadmium telluride diode

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gopal, Vishnu, E-mail: vishnu-46@yahoo.com, E-mail: wdhu@mail.sitp.ac.cn; Li, Qing; He, Jiale

This paper reports the results of modelling of the current-voltage characteristics (I-V) of a planar mid-wave Mercury Cadmium Telluride photodiode in a gate controlled diode experiment. It is reported that the diode exhibits nearly ideal I-V characteristics under the optimum surface potential leading to the minimal surface leakage current. Deviations from the optimum surface potential lead to non ideal I–V characteristics, indicating a strong relationship between the ideality factor of the diode with its surface leakage current. Diode's I–V characteristics have been modelled over a range of gate voltages from −9 V to −2 V. This range of gate voltages includes accumulation,more » flat band, and depletion and inversion conditions below the gate structure of the diode. It is shown that the I–V characteristics of the diode can be very well described by (i) thermal diffusion current, (ii) ohmic shunt current, (iii) photo-current due to background illumination, and (iv) excess current that grows by the process of avalanche multiplication in the gate voltage range from −3 V to −5 V that corresponds to the optimum surface potential. Outside the optimum gate voltage range, the origin of the excess current of the diode is associated with its high surface leakage currents. It is reported that the ohmic shunt current model applies to small surface leakage currents. The higher surface leakage currents exhibit a nonlinear shunt behaviour. It is also shown that the observed zero-bias dynamic resistance of the diode over the entire gate voltage range is the sum of ohmic shunt resistance and estimated zero-bias dynamic resistance of the diode from its thermal saturation current.« less

Molecular Targets for Antiepileptic Drug Development

PubMed Central

Meldrum, Brian S.; Rogawski, Michael A.

2007-01-01

Summary This review considers how recent advances in the physiology of ion channels and other potential molecular targets, in conjunction with new information on the genetics of idiopathic epilepsies, can be applied to the search for improved antiepileptic drugs (AEDs). Marketed AEDs predominantly target voltage-gated cation channels (the α subunits of voltage-gated Na+ channels and also T-type voltage-gated Ca2+ channels) or influence GABA-mediated inhibition. Recently, α2–δ voltage-gated Ca2+ channel subunits and the SV2A synaptic vesicle protein have been recognized as likely targets. Genetic studies of familial idiopathic epilepsies have identified numerous genes associated with diverse epilepsy syndromes, including genes encoding Na+ channels and GABAA receptors, which are known AED targets. A strategy based on genes associated with epilepsy in animal models and humans suggests other potential AED targets, including various voltage-gated Ca2+ channel subunits and auxiliary proteins, A- or M-type voltage-gated K+ channels, and ionotropic glutamate receptors. Recent progress in ion channel research brought about by molecular cloning of the channel subunit proteins and studies in epilepsy models suggest additional targets, including G-protein-coupled receptors, such as GABAB and metabotropic glutamate receptors; hyperpolarization-activated cyclic nucleotide-gated cation (HCN) channel subunits, responsible for hyperpolarization-activated current Ih; connexins, which make up gap junctions; and neurotransmitter transporters, particularly plasma membrane and vesicular transporters for GABA and glutamate. New information from the structural characterization of ion channels, along with better understanding of ion channel function, may allow for more selective targeting. For example, Na+ channels underlying persistent Na+ currents or GABAA receptor isoforms responsible for tonic (extrasynaptic) currents represent attractive targets. The growing understanding of the pathophysiology of epilepsy and the structural and functional characterization of the molecular targets provide many opportunities to create improved epilepsy therapies. PMID:17199015

Floating-gate memory based on an organic metal-insulator-semiconductor capacitor

NASA Astrophysics Data System (ADS)

William, S.; Mabrook, M. F.; Taylor, D. M.

2009-08-01

A floating gate memory element is described which incorporates an evaporated gold film embedded in the gate dielectric of a metal-insulator-semiconductor capacitor based on poly(3-hexylthiophene). On exceeding a critical amplitude in the voltage sweep, hysteresis is observed in the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of the device. The anticlockwise hysteresis in C-V is consistent with strong electron trapping during the positive cycle but little hole trapping during the negative cycle. We argue that the clockwise hysteresis observed in the negative cycle of the I-V plot, arises from leakage of trapped holes through the underlying insulator to the control gate.

The cooperative voltage sensor motion that gates a potassium channel.

PubMed

Pathak, Medha; Kurtz, Lisa; Tombola, Francesco; Isacoff, Ehud

2005-01-01

The four arginine-rich S4 helices of a voltage-gated channel move outward through the membrane in response to depolarization, opening and closing gates to generate a transient ionic current. Coupling of voltage sensing to gating was originally thought to operate with the S4s moving independently from an inward/resting to an outward/activated conformation, so that when all four S4s are activated, the gates are driven to open or closed. However, S4 has also been found to influence the cooperative opening step (Smith-Maxwell et al., 1998a), suggesting a more complex mechanism of coupling. Using fluorescence to monitor structural rearrangements in a Shaker channel mutant, the ILT channel (Ledwell and Aldrich, 1999), that energetically isolates the steps of activation from the cooperative opening step, we find that opening is accompanied by a previously unknown and cooperative movement of S4. This gating motion of S4 appears to be coupled to the internal S6 gate and to two forms of slow inactivation. Our results suggest that S4 plays a direct role in gating. While large transmembrane rearrangements of S4 may be required to unlock the gating machinery, as proposed before, it appears to be the gating motion of S4 that drives the gates to open and close.

The Cooperative Voltage Sensor Motion that Gates a Potassium Channel

PubMed Central

Pathak, Medha; Kurtz, Lisa; Tombola, Francesco; Isacoff, Ehud

2005-01-01

The four arginine-rich S4 helices of a voltage-gated channel move outward through the membrane in response to depolarization, opening and closing gates to generate a transient ionic current. Coupling of voltage sensing to gating was originally thought to operate with the S4s moving independently from an inward/resting to an outward/activated conformation, so that when all four S4s are activated, the gates are driven to open or closed. However, S4 has also been found to influence the cooperative opening step (Smith-Maxwell et al., 1998a), suggesting a more complex mechanism of coupling. Using fluorescence to monitor structural rearrangements in a Shaker channel mutant, the ILT channel (Ledwell and Aldrich, 1999), that energetically isolates the steps of activation from the cooperative opening step, we find that opening is accompanied by a previously unknown and cooperative movement of S4. This gating motion of S4 appears to be coupled to the internal S6 gate and to two forms of slow inactivation. Our results suggest that S4 plays a direct role in gating. While large transmembrane rearrangements of S4 may be required to unlock the gating machinery, as proposed before, it appears to be the gating motion of S4 that drives the gates to open and close. PMID:15623895

Timing discriminator using leading-edge extrapolation

DOEpatents

Gottschalk, Bernard

1983-01-01

A discriminator circuit to recover timing information from slow-rising pulses by means of an output trailing edge, a fixed time after the starting corner of the input pulse, which is nearly independent of risetime and threshold setting. This apparatus comprises means for comparing pulses with a threshold voltage; a capacitor to be charged at a certain rate when the input signal is one-third threshold voltage, and at a lower rate when the input signal is two-thirds threshold voltage; current-generating means for charging the capacitor; means for comparing voltage capacitor with a bias voltage; a flip-flop to be set when the input pulse reaches threshold voltage and reset when capacitor voltage reaches the bias voltage; and a clamping means for discharging the capacitor when the input signal returns below one-third threshold voltage.

Actions and Mechanisms of Polyunsaturated Fatty Acids on Voltage-Gated Ion Channels.

PubMed

Elinder, Fredrik; Liin, Sara I

2017-01-01

Polyunsaturated fatty acids (PUFAs) act on most ion channels, thereby having significant physiological and pharmacological effects. In this review we summarize data from numerous PUFAs on voltage-gated ion channels containing one or several voltage-sensor domains, such as voltage-gated sodium (Na V ), potassium (K V ), calcium (Ca V ), and proton (H V ) channels, as well as calcium-activated potassium (K Ca ), and transient receptor potential (TRP) channels. Some effects of fatty acids appear to be channel specific, whereas others seem to be more general. Common features for the fatty acids to act on the ion channels are at least two double bonds in cis geometry and a charged carboxyl group. In total we identify and label five different sites for the PUFAs. PUFA site 1 : The intracellular cavity. Binding of PUFA reduces the current, sometimes as a time-dependent block, inducing an apparent inactivation. PUFA site 2 : The extracellular entrance to the pore. Binding leads to a block of the channel. PUFA site 3 : The intracellular gate. Binding to this site can bend the gate open and increase the current. PUFA site 4 : The interface between the extracellular leaflet of the lipid bilayer and the voltage-sensor domain. Binding to this site leads to an opening of the channel via an electrostatic attraction between the negatively charged PUFA and the positively charged voltage sensor. PUFA site 5 : The interface between the extracellular leaflet of the lipid bilayer and the pore domain. Binding to this site affects slow inactivation. This mapping of functional PUFA sites can form the basis for physiological and pharmacological modifications of voltage-gated ion channels.

Actions and Mechanisms of Polyunsaturated Fatty Acids on Voltage-Gated Ion Channels

PubMed Central

Elinder, Fredrik; Liin, Sara I.

2017-01-01

Polyunsaturated fatty acids (PUFAs) act on most ion channels, thereby having significant physiological and pharmacological effects. In this review we summarize data from numerous PUFAs on voltage-gated ion channels containing one or several voltage-sensor domains, such as voltage-gated sodium (NaV), potassium (KV), calcium (CaV), and proton (HV) channels, as well as calcium-activated potassium (KCa), and transient receptor potential (TRP) channels. Some effects of fatty acids appear to be channel specific, whereas others seem to be more general. Common features for the fatty acids to act on the ion channels are at least two double bonds in cis geometry and a charged carboxyl group. In total we identify and label five different sites for the PUFAs. PUFA site 1: The intracellular cavity. Binding of PUFA reduces the current, sometimes as a time-dependent block, inducing an apparent inactivation. PUFA site 2: The extracellular entrance to the pore. Binding leads to a block of the channel. PUFA site 3: The intracellular gate. Binding to this site can bend the gate open and increase the current. PUFA site 4: The interface between the extracellular leaflet of the lipid bilayer and the voltage-sensor domain. Binding to this site leads to an opening of the channel via an electrostatic attraction between the negatively charged PUFA and the positively charged voltage sensor. PUFA site 5: The interface between the extracellular leaflet of the lipid bilayer and the pore domain. Binding to this site affects slow inactivation. This mapping of functional PUFA sites can form the basis for physiological and pharmacological modifications of voltage-gated ion channels. PMID:28220076

Effect of electrical coupling on ionic current and synaptic potential measurements.

PubMed

Rabbah, Pascale; Golowasch, Jorge; Nadim, Farzan

2005-07-01

Recent studies have found electrical coupling to be more ubiquitous than previously thought, and coupling through gap junctions is known to play a crucial role in neuronal function and network output. In particular, current spread through gap junctions may affect the activation of voltage-dependent conductances as well as chemical synaptic release. Using voltage-clamp recordings of two strongly electrically coupled neurons of the lobster stomatogastric ganglion and conductance-based models of these neurons, we identified effects of electrical coupling on the measurement of leak and voltage-gated outward currents, as well as synaptic potentials. Experimental measurements showed that both leak and voltage-gated outward currents are recruited by gap junctions from neurons coupled to the clamped cell. Nevertheless, in spite of the strong coupling between these neurons, the errors made in estimating voltage-gated conductance parameters were relatively minor (<10%). Thus in many cases isolation of coupled neurons may not be required if a small degree of measurement error of the voltage-gated currents or the synaptic potentials is acceptable. Modeling results show, however, that such errors may be as high as 20% if the gap-junction position is near the recording site or as high as 90% when measuring smaller voltage-gated ionic currents. Paradoxically, improved space clamp increases the errors arising from electrical coupling because voltage control across gap junctions is poor for even the highest realistic coupling conductances. Furthermore, the common procedure of leak subtraction can add an extra error to the conductance measurement, the sign of which depends on the maximal conductance.

Differential effect of brief electrical stimulation on voltage-gated potassium channels.

PubMed

Cameron, Morven A; Al Abed, Amr; Buskila, Yossi; Dokos, Socrates; Lovell, Nigel H; Morley, John W

2017-05-01

Electrical stimulation of neuronal tissue is a promising strategy to treat a variety of neurological disorders. The mechanism of neuronal activation by external electrical stimulation is governed by voltage-gated ion channels. This stimulus, typically brief in nature, leads to membrane potential depolarization, which increases ion flow across the membrane by increasing the open probability of these voltage-gated channels. In spiking neurons, it is activation of voltage-gated sodium channels (Na V channels) that leads to action potential generation. However, several other types of voltage-gated channels are expressed that also respond to electrical stimulation. In this study, we examine the response of voltage-gated potassium channels (K V channels) to brief electrical stimulation by whole cell patch-clamp electrophysiology and computational modeling. We show that nonspiking amacrine neurons of the retina exhibit a large variety of responses to stimulation, driven by different K V -channel subtypes. Computational modeling reveals substantial differences in the response of specific K V -channel subtypes that is dependent on channel kinetics. This suggests that the expression levels of different K V -channel subtypes in retinal neurons are a crucial predictor of the response that can be obtained. These data expand our knowledge of the mechanisms of neuronal activation and suggest that K V -channel expression is an important determinant of the sensitivity of neurons to electrical stimulation. NEW & NOTEWORTHY This paper describes the response of various voltage-gated potassium channels (K V channels) to brief electrical stimulation, such as is applied during prosthetic electrical stimulation. We show that the pattern of response greatly varies between K V channel subtypes depending on activation and inactivation kinetics of each channel. Our data suggest that problems encountered when artificially stimulating neurons such as cessation in firing at high frequencies, or "fading," may be attributed to K V -channel activation. Copyright © 2017 the American Physiological Society.

Highly tunable local gate controlled complementary graphene device performing as inverter and voltage controlled resistor.

PubMed

Kim, Wonjae; Riikonen, Juha; Li, Changfeng; Chen, Ya; Lipsanen, Harri

2013-10-04

Using single-layer CVD graphene, a complementary field effect transistor (FET) device is fabricated on the top of separated back-gates. The local back-gate control of the transistors, which operate with low bias at room temperature, enables highly tunable device characteristics due to separate control over electrostatic doping of the channels. Local back-gating allows control of the doping level independently of the supply voltage, which enables device operation with very low VDD. Controllable characteristics also allow the compensation of variation in the unintentional doping typically observed in CVD graphene. Moreover, both p-n and n-p configurations of FETs can be achieved by electrostatic doping using the local back-gate. Therefore, the device operation can also be switched from inverter to voltage controlled resistor, opening new possibilities in using graphene in logic circuitry.

Low voltage-driven oxide phototransistors with fast recovery, high signal-to-noise ratio, and high responsivity fabricated via a simple defect-generating process

PubMed Central

Yun, Myeong Gu; Kim, Ye Kyun; Ahn, Cheol Hyoun; Cho, Sung Woon; Kang, Won Jun; Cho, Hyung Koun; Kim, Yong-Hoon

2016-01-01

We have demonstrated that photo-thin film transistors (photo-TFTs) fabricated via a simple defect-generating process could achieve fast recovery, a high signal to noise (S/N) ratio, and high sensitivity. The photo-TFTs are inverted-staggered bottom-gate type indium-gallium-zinc-oxide (IGZO) TFTs fabricated using atomic layer deposition (ALD)-derived Al2O3 gate insulators. The surfaces of the Al2O3 gate insulators are damaged by ion bombardment during the deposition of the IGZO channel layers by sputtering and the damage results in the hysteresis behavior of the photo-TFTs. The hysteresis loops broaden as the deposition power density increases. This implies that we can easily control the amount of the interface trap sites and/or trap sites in the gate insulator near the interface. The photo-TFTs with large hysteresis-related defects have high S/N ratio and fast recovery in spite of the low operation voltages including a drain voltage of 1 V, positive gate bias pulse voltage of 3 V, and gate voltage pulse width of 3 V (0 to 3 V). In addition, through the hysteresis-related defect-generating process, we have achieved a high responsivity since the bulk defects that can be photo-excited and eject electrons also increase with increasing deposition power density. PMID:27553518

Single-channel kinetics of BK (Slo1) channels

PubMed Central

Geng, Yanyan; Magleby, Karl L.

2014-01-01

Single-channel kinetics has proven a powerful tool to reveal information about the gating mechanisms that control the opening and closing of ion channels. This introductory review focuses on the gating of large conductance Ca2+- and voltage-activated K+ (BK or Slo1) channels at the single-channel level. It starts with single-channel current records and progresses to presentation and analysis of single-channel data and the development of gating mechanisms in terms of discrete state Markov (DSM) models. The DSM models are formulated in terms of the tetrameric modular structure of BK channels, consisting of a central transmembrane pore-gate domain (PGD) attached to four surrounding transmembrane voltage sensing domains (VSD) and a large intracellular cytosolic domain (CTD), also referred to as the gating ring. The modular structure and data analysis shows that the Ca2+ and voltage dependent gating considered separately can each be approximated by 10-state two-tiered models with five closed states on the upper tier and five open states on the lower tier. The modular structure and joint Ca2+ and voltage dependent gating are consistent with a 50 state two-tiered model with 25 closed states on the upper tier and 25 open states on the lower tier. Adding an additional tier of brief closed (flicker states) to the 10-state or 50-state models improved the description of the gating. For fixed experimental conditions a channel would gate in only a subset of the potential number of states. The detected number of states and the correlations between adjacent interval durations are consistent with the tiered models. The examined models can account for the single-channel kinetics and the bursting behavior of gating. Ca2+ and voltage activate BK channels by predominantly increasing the effective opening rate of the channel with a smaller decrease in the effective closing rate. Ca2+ and depolarization thus activate by mainly destabilizing the closed states. PMID:25653620

Ciguatoxins: Cyclic Polyether Modulators of Voltage-gated Iion Channel Function

PubMed Central

Nicholson, Graham M.; Lewis, Richard J.

2006-01-01

Ciguatoxins are cyclic polyether toxins, derived from marine dinoflagellates, which are responsible for the symptoms of ciguatera poisoning. Ingestion of tropical and subtropical fin fish contaminated by ciguatoxins results in an illness characterised by neurological, cardiovascular and gastrointestinal disorders. The pharmacology of ciguatoxins is characterised by their ability to cause persistent activation of voltage-gated sodium channels, to increase neuronal excitability and neurotransmitter release, to impair synaptic vesicle recycling, and to cause cell swelling. It is these effects, in combination with an action to block voltage-gated potassium channels at high doses, which are believed to underlie the complex of symptoms associated with ciguatera. This review examines the sources, structures and pharmacology of ciguatoxins. In particular, attention is placed on their cellular modes of actions to modulate voltage-gated ion channels and other Na+-dependent mechanisms in numerous cell types and to current approaches for detection and treatment of ciguatera.

[Human calcium channelopathies. Voltage-gated Ca(2+) channels in etiology, pathogenesis, and pharmacotherapy of neurologic disorders].

PubMed

Weiergräber, M; Hescheler, J; Schneider, T

2008-04-01

Voltage-gated calcium channels are key components in a variety of physiological processes. Within the last decade an increasing number of voltage-gated Ca(2+) channelopathies in both humans and animal models has been described, most of which are related to the neurologic and muscular system. In humans, mutations were found in L-type Ca(v)1.2 and Ca(v)1.4 Ca(2+) channels as well as the non-L-type Ca(v)2.1 and T-type Ca(v)3.2 channels, resulting in altered electrophysiologic properties. Based on their widespread distribution within the CNS, voltage-gated calcium channels are of particular importance in the etiology and pathogenesis of various forms of epilepsy and neuropsychiatric disorders. In this review we characterise the different human Ca(2+) channelopathies known so far, further illuminating basic pathophysiologic mechanisms and clinical aspects.