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Sample records for insulated gate field

  1. Ambipolar organic field-effect transistor using gate insulator hysteresis

    NASA Astrophysics Data System (ADS)

    Mizuno, Eriko; Taniguchi, Masateru; Kawai, Tomoji

    2005-04-01

    An organic field-effect transistor based on a copper-phthalocyanine and cyanoethylpullulan gate insulator showed ambipolar operation using gate insulator hysteresis, which appeared at less than 1mHz. The gate insulator possesses spontaneous polarization of 1.6μC/cm2 and a coercive electric field of 50kV/cm. After poling in an effort to obtain a large amount of accumulated charge, the field-effect mobilities of the hole and electron were 4.1×10-3 and 3.5×10-6cm2/Vs, respectively. The on/off ratio at VSG=±10V was 6×104 for the p type and 70 for the n type.

  2. Low voltage vertical organic field-effect transistor with polyvinyl alcohol as gate insulator

    NASA Astrophysics Data System (ADS)

    Rossi, Lucieli; Seidel, Keli F.; Machado, Wagner S.; Hümmelgen, Ivo A.

    2011-11-01

    We report the preparation of low gate leakage current organic field effect transistors in vertical architecture using polyvinyl alcohol as gate insulator and C60 fullerene as n-type semiconductor in devices with gate, source, and drain electrodes of Al. Intermediate electrode and top electrode operate, respectively, as source and drain, or vice-versa, depending on polarity. In these devices the intermediate electrode (source or drain) is permeable to the electric field produced by the gate so that increased drain current is obtained at either increasingly negative gate voltage when the source is the intermediate electrode or increasingly positive gate voltage when the drain is the intermediate electrode.

  3. Radiation tolerant silicon nitride insulated gate field effect transistors

    NASA Technical Reports Server (NTRS)

    Newman, P. A.

    1969-01-01

    Metal-Insulated-Semiconductor Field Effect Transistor /MISFET/ device uses a silicon nitride passivation layer over a thin silicon oxide layer to enhance the radiation tolerance. It is useful in electronic systems exposed to space radiation environment or the effects of nuclear weapons.

  4. Negative transconductance in double-gate germanium-on-insulator field effect transistors

    NASA Astrophysics Data System (ADS)

    Zaslavsky, A.; Soliveres, S.; Le Royer, C.; Cristoloveanu, S.; Clavelier, L.; Deleonibus, S.

    2007-10-01

    Transport in double-gate (DG) transistors offers unusual properties due to the coupling between the two channels. We report on room-temperature negative transconductance in germanium-on-insulator DG transistors in the subthreshold regime. The effect is due to the coupling between conducting channels, analogous to the velocity modulation transistor (VMT). Unlike the VMT, our effect can be induced by either of the gates and arises not from a difference in the channel mobilities but from partial electric field screening at low channel densities combined with the density dependence of mobility. The negative transconductance becomes weaker as gate length LG is reduced.

  5. H-terminated diamond field effect transistor with ferroelectric gate insulator

    SciTech Connect

    Karaya, Ryota; Furuichi, Hiroki; Nakajima, Takashi; Tokuda, Norio; Kawae, Takeshi

    2016-06-13

    An H-terminated diamond field-effect-transistor (FET) with a ferroelectric vinylidene fluoride (VDF)-trifluoroethylene (TrFE) copolymer gate insulator was fabricated. The VDF-TrFE film was deposited on the H-terminated diamond by the spin-coating method and low-temperature annealing was performed to suppress processing damage to the H-terminated diamond surface channel layer. The fabricated FET structure showed the typical properties of depletion-type p-channel FET and showed clear saturation of the drain current with a maximum value of 50 mA/mm. The drain current versus gate voltage curves of the proposed FET showed clockwise hysteresis loops due to the ferroelectricity of the VDF-TrFE gate insulator, and the memory window width was 19 V, when the gate voltage was swept from 20 to −20 V. The maximum on/off current ratio and the linear mobility were 10{sup 8} and 398 cm{sup 2}/V s, respectively. In addition, we modulated the drain current of the fabricated FET structure via the remnant polarization of the VDF-TrFE gate and obtained an on/off current ratio of 10{sup 3} without applying a DC gate voltage.

  6. SINGLE CRYSTAL CADMIUM SULFIDE AND CADMIUM SELENIDE INSULATED-GATE FIELD-EFFECT TRIODES.

    DTIC Science & Technology

    Insulated-gate field-effect triodes were fabricated on single crystal cadmium sulfide and cadmium selenide . Both bulk crystals and platelets were...used for single crystal samples. Chromium and aluminum were found to make low impedance contacts to cadmium sulfide and cadmium selenide . The...polycrystalline cadmium sulfide and cadmium selenide IGFET’s. The characteristics of the fabricated devices were unstable with respect to time and temperature

  7. B-doped diamond field-effect transistor with ferroelectric vinylidene fluoride–trifluoroethylene gate insulator

    NASA Astrophysics Data System (ADS)

    Karaya, Ryota; Baba, Ikki; Mori, Yosuke; Matsumoto, Tsubasa; Nakajima, Takashi; Tokuda, Norio; Kawae, Takeshi

    2017-10-01

    A B-doped diamond field-effect transistor (FET) with a ferroelectric vinylidene fluoride–trifluoroethylene (VDF–TrFE) copolymer gate insulator was fabricated. The VDF–TrFE film deposited on the B-doped diamond showed good insulating and ferroelectric properties. Also, a Pt/VDF–TrFE/B-doped diamond layered structure showed ideal behavior as a metal–ferroelectric–semiconductor (MFS) capacitor, and the memory window width was 11 V, when the gate voltage was swept from 20 to ‑20 V. The fabricated MFS-type FET structure showed the typical properties of a depletion-type p-channel FET and a maximum drain current density of 0.87 mA/mm at room temperature. The drain current versus gate voltage curves of the proposed FET showed a clockwise hysteresis loop owing to the ferroelectricity of the VDF–TrFE gate insulator. In addition, we demonstrated the logic inverter with the MFS-type diamond FET coupled with a load resistor, and obtained the inversion behavior of the input signal and a maximum gain of 18.4 for the present circuit.

  8. Germanium Metal - Insulator - Semiconductor Field Effect Transistors Utilizing a Germanium Nitride Gate Insulator.

    NASA Astrophysics Data System (ADS)

    Rosenberg, James Jordan

    The work presented in this thesis provides new information on three distinct but related topics. Firstly, it describes a technique for growing thin films of germanium nitride on germanium--a previously unexplored semiconductor -insulator system. Secondly, it describes electrical measurements made on metal-Ge(,3)N(,4)-Ge capacitors which demonstrate that this metal-insulator-semiconductor (MIS) system is of high quality. Thirdly, it describes a process by which n-channel germanium metal-insulator-semiconductor field effect transistors (MISFETs) have been fabricated. The motivations for exploring this new MIS system (e.g. basic physics of germanium inversion layers, higher performance MISFETs, etc.) are also described. The growth technique described here and the films produced by it possess several distinct advantages over previous methods of obtaining insulating films on germanium. The growth technique itself is simple. It involves no elaborate or expensive equipment, and is essentially identical in its execution (although not in its chemical process) to conventional techniques for obtaining an insulator on silicon (i.e. thermal oxidation of silicon). The film growth technique yields very reproducible results (in terms of film thickness and refractive index) from wafer to wafer. The physical properties of the film itself are also attractive. It is far more chemically stable than germanium oxide, and is quite process compatible. It is resistant to many chemicals encountered in typical processing cycles, but also can be readily patterned in hot phosphoric acid, which does not appreciably attack germanium. Electrical measurements on MIS capacitors indicate that the density of fast states at the germanium-germanium nitride interface is quite low. The interface state density is less than or equal to 1 x 10('11)/cm('2)-eV from midgap to within 0.15 eV of the conduction band edge, as determined by variable frequency capacitance measurements. The MISFETs fabricated for this

  9. Gate Tunable Relativistic Mass and Berry's phase in Topological Insulator Nanoribbon Field Effect Devices

    PubMed Central

    Jauregui, Luis A.; Pettes, Michael T.; Rokhinson, Leonid P.; Shi, Li; Chen, Yong P.

    2015-01-01

    Transport due to spin-helical massless Dirac fermion surface state is of paramount importance to realize various new physical phenomena in topological insulators, ranging from quantum anomalous Hall effect to Majorana fermions. However, one of the most important hallmarks of topological surface states, the Dirac linear band dispersion, has been difficult to reveal directly in transport measurements. Here we report experiments on Bi2Te3 nanoribbon ambipolar field effect devices on high-κ SrTiO3 substrates, where we achieve a gate-tuned bulk metal-insulator transition and the topological transport regime with substantial surface state conduction. In this regime, we report two unambiguous transport evidences for gate-tunable Dirac fermions through π Berry's phase in Shubnikov-de Haas oscillations and effective mass proportional to the Fermi momentum, indicating linear energy-momentum dispersion. We also measure a gate-tunable weak anti-localization (WAL) with 2 coherent conduction channels (indicating 2 decoupled surfaces) near the charge neutrality point, and a transition to weak localization (indicating a collapse of the Berry's phase) when the Fermi energy approaches the bulk conduction band. The gate-tunable Dirac fermion topological surface states pave the way towards a variety of topological electronic devices. PMID:25677703

  10. Field effect transistor with HfO2/Parylene-C bilayer hybrid gate insulator

    NASA Astrophysics Data System (ADS)

    Kumar, Neeraj; Kito, Ai; Inoue, Isao

    2015-03-01

    We have investigated the electric field control of the carrier density and the mobility at the surface of SrTiO3, a well known transition-metal oxide, in a field effect transistor (FET) geometry. We have used a Parylene-C (8 nm)/HfO2 (20 nm) double-layer gate insulator (GI), which can be a potential candidate for a solid state GI for the future Mott FETs. So far, only examples of the Mott FET used liquid electrolyte or ferroelectric oxides for the GI. However, possible electrochemical reaction at the interface causes damage to the surface of the Mott insulator. Thus, an alternative GI has been highly desired. We observed that even an ultra thin Parylene-C layer is effective for keeping the channel surface clean and free from oxygen vacancies. The 8 nm Parylene-C film has a relatively low resistance and consequentially its capacitance does not dominate the total capacitance of the Parylene-C/HfO2 GI. The breakdown gate voltage at 300 K is usually more than 10 V (~ 3.4 MV/cm). At gate voltage of 3 V the carrier density measured by the Hall effect is about 3 ×1013 cm-2, competent to cause the Mott transition. Moreover, the field effect mobility reaches in the range of 10 cm2/Vs indicating the Parylene-C passivated surface is actually very clean.

  11. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    NASA Astrophysics Data System (ADS)

    Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

    2014-10-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

  12. Plasma Deposited SiO2 for Planar Self-Aligned Gate Metal-Insulator-Semiconductor Field Effect Transistors on Semi-Insulating InP

    NASA Technical Reports Server (NTRS)

    Tabory, Charles N.; Young, Paul G.; Smith, Edwyn D.; Alterovitz, Samuel A.

    1994-01-01

    Metal-insulator-semiconductor (MIS) field effect transistors were fabricated on InP substrates using a planar self-aligned gate process. A 700-1000 A gate insulator of Si02 doped with phosphorus was deposited by a direct plasma enhanced chemical vapor deposition at 400 mTorr, 275 C, 5 W, and power density of 8.5 MW/sq cm. High frequency capacitance-voltage measurements were taken on MIS capacitors which have been subjected to a 700 C anneal and an interface state density of lxl0(exp 11)/eV/cq cm was found. Current-voltage measurements of the capacitors show a breakdown voltage of 107 V/cm and a insulator resistivity of 10(exp 14) omega cm. Transistors were fabricated on semi-insulating InP using a standard planar self-aligned gate process in which the gate insulator was subjected to an ion implantation activation anneal of 700 C. MIS field effect transistors gave a maximum extrinsic transconductance of 23 mS/mm for a gate length of 3 microns. The drain current drift saturated at 87.5% of the initial current, while reaching to within 1% of the saturated value after only 1x10(exp 3). This is the first reported viable planar InP self-aligned gate transistor process reported to date.

  13. Demonstration of large field effect in topological insulator films via a high-κ back gate

    SciTech Connect

    Wang, C. Y.; Lin, H. Y.; Yang, S. R.; Chen, K. H. M.; Kwo, J. E-mail: raynien@phys.nthu.edu.tw; Lin, Y. H.; Chen, K. H.; Young, L. B.; Cheng, C. K.; Fanchiang, Y. T.; Hong, M. E-mail: raynien@phys.nthu.edu.tw; Tseng, S. C.

    2016-05-16

    The spintronics applications long anticipated for topological insulators (TIs) has been hampered due to the presence of high density intrinsic defects in the bulk states. In this work we demonstrate the back-gating effect on TIs by integrating Bi{sub 2}Se{sub 3} films 6–10 quintuple layer (QL) thick with amorphous high-κ oxides of Al{sub 2}O{sub 3} and Y{sub 2}O{sub 3}. Large gating effect of tuning the Fermi level E{sub F} to very close to the band gap was observed, with an applied bias of an order of magnitude smaller than those of the SiO{sub 2} back gate, and the modulation of film resistance can reach as high as 1200%. The dependence of the gating effect on the TI film thickness was investigated, and ΔN{sub 2D}/ΔV{sub g} varies with TI film thickness as ∼t{sup −0.75}. To enhance the gating effect, a Y{sub 2}O{sub 3} layer thickness 4 nm was inserted into Al{sub 2}O{sub 3} gate stack to increase the total κ value to 13.2. A 1.4 times stronger gating effect is observed, and the increment of induced carrier numbers is in good agreement with additional charges accumulated in the higher κ oxides. Moreover, we have reduced the intrinsic carrier concentration in the TI film by doping Te to Bi{sub 2}Se{sub 3} to form Bi{sub 2}Te{sub x}Se{sub 1−x}. The observation of a mixed state of ambipolar field that both electrons and holes are present indicates that we have tuned the E{sub F} very close to the Dirac Point. These results have demonstrated that our capability of gating TIs with high-κ back gate to pave the way to spin devices of tunable E{sub F} for dissipationless spintronics based on well-established semiconductor technology.

  14. Plasma-deposited germanium nitride gate insulators for indium phosphide metal-insulator-semiconductor field-effect transistors

    NASA Technical Reports Server (NTRS)

    Johnson, Gregory A.; Kapoor, Vik J.

    1991-01-01

    Plasma-deposited germanium nitride was investigated for the first time as a possible gate insulator for InP compound semiconductor metal-insulator-semiconductor FET (MISFET) technology. The germanium nitride films were successfully deposited in a capacitively coupled parallel plate reactor at 13.56 MHz operation using GeH4/N2/NH3 and GeH4/N2 mixtures as reactant gases. The former process produced better quality films with enhanced uniformity, increased deposition rates, and increased resistivity. The breakdown field strength of the films was greater than 10 to the 6th V/cm. Auger electron spectroscopy did not indicate significant chemical composition differences between the two processes. For MISFETs with 2-micron channel lengths fabricated on InP, the device transconductance and threshold voltage for the GeH4/N2/NH3 process were 17 mS/mm and -3.6 V, respectively. The drain-source breakdown voltages were greater than 10 V.

  15. Plasma-deposited germanium nitride gate insulators for indium phosphide metal-insulator-semiconductor field-effect transistors

    NASA Technical Reports Server (NTRS)

    Johnson, Gregory A.; Kapoor, Vik J.

    1991-01-01

    Plasma-deposited germanium nitride was investigated for the first time as a possible gate insulator for InP compound semiconductor metal-insulator-semiconductor FET (MISFET) technology. The germanium nitride films were successfully deposited in a capacitively coupled parallel plate reactor at 13.56 MHz operation using GeH4/N2/NH3 and GeH4/N2 mixtures as reactant gases. The former process produced better quality films with enhanced uniformity, increased deposition rates, and increased resistivity. The breakdown field strength of the films was greater than 10 to the 6th V/cm. Auger electron spectroscopy did not indicate significant chemical composition differences between the two processes. For MISFETs with 2-micron channel lengths fabricated on InP, the device transconductance and threshold voltage for the GeH4/N2/NH3 process were 17 mS/mm and -3.6 V, respectively. The drain-source breakdown voltages were greater than 10 V.

  16. Organic Field Effect Transistor Using Amorphous Fluoropolymer as Gate Insulating Film

    NASA Astrophysics Data System (ADS)

    Kitajima, Yosuke; Kojima, Kenzo; Mizutani, Teruyoshi; Ochiai, Shizuyasu

    Organic field effect transistors are fabricated by the active layer of Regioregular poly (3-hexylthiophene-2,5-diy)(P3HT) thin film. CYTOP thin film made from Amorphous Fluoropolymer and fabricated by spin-coating is adopted to a gate dielectric layer on Polyethylenenaphthalate (PEN) thin film that is the substrate of an organic field effect transistor. The surface morphology and molecular orientation of P3HT thin films is observed by atomic force microscope (AFM) and X-Ray diffractometer (XRD). Grains are observed on the CYTOP thin film via an AFM image and the P3HT molecule is oriented perpendicularly on the CYTOP thin film. Based on the performance of the organic field effect transistor, the carrier mobility is 0.092 cm2/Vs, the ON/OFF ratio is 7, and the threshold voltage is -12 V. The ON/OFF ratio is relatively low and to improve On/Off ratio, the CYTOP/Polyimide double gate insulating layer is adopted to OFET.

  17. Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric-Insulator Interface Conduction

    NASA Astrophysics Data System (ADS)

    Lee, Bong Yeon; Minami, Takaki; Kanashima, Takeshi; Okuyama, Masanori

    2006-11-01

    A new type of ferroelectric gate field-effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. The channel region of the FET is composed of a Pt/insulator HfO2/ferroelectric Pb(Zr0.52Ti0.48)O3 (PZT)/Pt/TiO2/SiO2/Si multilayer, and the source and drain areas are formed at the interface of the PZT and HfO2 films. Drain current versus gate voltage characteristics show a clockwise hysteresis loop similar to that for a conventional p-channel transistor. The FET shows that the on/off ratio of the conduction current is within 105 to 106 and that the off-state current is about 10-10 A.

  18. Normally-off AlGaN/GaN-on-Si metal-insulator-semiconductor heterojunction field-effect transistor with nitrogen-incorporated silicon oxide gate insulator

    NASA Astrophysics Data System (ADS)

    Roh, Seung-Hyun; Eom, Su-Keun; Choi, Gwang-Ho; Kang, Myoung-Jin; Kim, Dong-Hwan; Hwang, Il-Hwan; Seo, Kwang-Seok; Lee, Jae-Gil; Byun, Young-Chul; Cha, Ho-Young

    2017-08-01

    We have developed a nitrogen-incorporated silicon oxide (SiOxNy) deposition process using plasma enhanced atomic layer deposition (PEALD) for the gate insulator of recessed-gate Al-GaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. The SiOxNy film deposited on a recessed GaN surface exhibited a breakdown field of 13.2 MV/cm and a conduction band offset of 3.37 eV, which are the highest values reported for GaN MIS structures to the best of our knowledge. The fabricated normally-off transistor exhibited very promising characteristics such as a threshold voltage of 2.2 V, a maximum drain current density of 428 mA/mm, and a breakdown voltage of 928 V.

  19. Silicon dioxide with a silicon interfacial layer as an insulating gate for highly stable indium phosphide metal-insulator-semiconductor field effect transistors

    NASA Technical Reports Server (NTRS)

    Kapoor, V. J.; Shokrani, M.

    1991-01-01

    A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution X-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2-V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3 percent in 10,000 sec, as compared to 15-18 percent drift in 10,000 sec for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/mm gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24 percent power added efficiency.

  20. Silicon dioxide with a silicon interfacial layer as an insulating gate for highly stable indium phosphide metal-insulator-semiconductor field effect transistors

    NASA Technical Reports Server (NTRS)

    Kapoor, V. J.; Shokrani, M.

    1991-01-01

    A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution X-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2-V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3 percent in 10,000 sec, as compared to 15-18 percent drift in 10,000 sec for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/mm gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24 percent power added efficiency.

  1. Advanced insulated gate bipolar transistor gate drive

    DOEpatents

    Short, James Evans; West, Shawn Michael; Fabean, Robert J.

    2009-08-04

    A gate drive for an insulated gate bipolar transistor (IGBT) includes a control and protection module coupled to a collector terminal of the IGBT, an optical communications module coupled to the control and protection module, a power supply module coupled to the control and protection module and an output power stage module with inputs coupled to the power supply module and the control and protection module, and outputs coupled to a gate terminal and an emitter terminal of the IGBT. The optical communications module is configured to send control signals to the control and protection module. The power supply module is configured to distribute inputted power to the control and protection module. The control and protection module outputs on/off, soft turn-off and/or soft turn-on signals to the output power stage module, which, in turn, supplies a current based on the signal(s) from the control and protection module for charging or discharging an input capacitance of the IGBT.

  2. Topological insulator state in gated bilayer silicene

    NASA Astrophysics Data System (ADS)

    Zhang, Ming-Ming; Xu, Lei; Zhang, Jun

    2015-11-01

    We investigate the topological insulator state of gated bilayer silicene in the presence of extrinsic Rashba spin-orbit (SO) coupling. The system exhibits a band insulator (BI) phase for small Rashba SO coupling, and then translate to a strong topological insulator (TI) phase with both spin and valley filtered at large Rashba SO coupling. The strong TI phase is robust in the presence of intrinsic SO and intrinsic Rashba SO couplings. When a titled electric field is introduced, the in-plane component of the electric field gives rise to an interlayer Rashba SO coupling, and the system turns to a BI phase no matter how large the Rashab SO coupling and bias voltage are. This will provide potential application in nanoelectronics based on silicene.

  3. High drain current density and reduced gate leakage current in channel-doped AlGaN /GaN heterostructure field-effect transistors with Al2O3/Si3N4 gate insulator

    NASA Astrophysics Data System (ADS)

    Maeda, Narihiko; Wang, Chengxin; Enoki, Takatomo; Makimoto, Toshiki; Tawara, Takehiko

    2005-08-01

    Channel-doped AlGaN /GaN heterostructure field-effect transistors (HFETs) with metal-insulator-semiconductor (MIS) structures have been fabricated to obtain the high drain current density and reduced gate leakage current. A thin bilayer dielectric of Al2O3(4nm)/Si3N4(1nm) was used as the gate insulator, to simultaneously take advantage of the high-quality interface between Si3N4 and AlGaN, and high resistivity and a high dielectric constant of Al2O3. A MIS HFET with a gate length of 1.5μm has exhibited a record high drain current density of 1.87A/mm at a gate voltage (Vg) of +3V, which is ascribed to a high applicable Vg and a very high two-dimensional electron gas (2DEG) density of 2.6×1013cm-2 in the doped channel. The gate leakage current was reduced by two or three orders of magnitude, compared with that in normal HFETs without a gate insulator. The transconductance (gm) was 168mS/mm, which is high in the category of the MIS structure. Channel-doped MIS HFETs fabricated have thus been proved to exhibit the high current density, reduced gate leakage current, and relatively high transconductance, hence, promising for high-power applications.

  4. Single Electron Gating of Topological Insulators.

    PubMed

    Sessi, Paolo; Bathon, Thomas; Kokh, Konstantin Aleksandrovich; Tereshchenko, Oleg Evgenievich; Bode, Matthias

    2016-12-01

    The effective gating of topological insulators is demonstrated, through the coupling of molecules to their surface. By using electric fields, they allow for dynamic control of the interface charge state by adding or removing single electrons. This process creates a robust transconductance bistability resembling a single-electron transistor. These findings make hybrid molecule/topological interfaces functional elements while at the same time pushing miniaturization to its ultimate limit. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. New Analytical Model for Short-Channel Fully Depleted Dual-Material-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Te-Kuang Chiang,

    2010-07-01

    Using the exact solution of the two-dimensional Poisson equation, a new analytical model comprising two-dimensional potential and threshold voltage for short-channel fully depleted dual-material-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. The model shows that the minimum acceptable channel length can be sustained while repressing the short-channel effects if a thin gate oxide and a thin silicon body are employed in the device. Moreover, by increasing the ratio of the screen gate length to control gate length, the threshold voltage roll-off can be more effectively reduced. The model is verified by the close agreement of its results with those of a numerical simulation using the device simulator MEDICI. The model not only offers an insight into the device physics but is also an efficient model for circuit simulation.

  6. Persistent optical gating of a topological insulator

    PubMed Central

    Yeats, Andrew L.; Pan, Yu; Richardella, Anthony; Mintun, Peter J.; Samarth, Nitin; Awschalom, David D.

    2015-01-01

    The spin-polarized surface states of topological insulators (TIs) are attractive for applications in spintronics and quantum computing. A central challenge with these materials is to reliably tune the chemical potential of their electrons with respect to the Dirac point and the bulk bands. We demonstrate persistent, bidirectional optical control of the chemical potential of (Bi,Sb)2Te3 thin films grown on SrTiO3. By optically modulating a space-charge layer in the SrTiO3 substrates, we induce a persistent field effect in the TI films comparable to electrostatic gating techniques but without additional materials or processing. This enables us to optically pattern arbitrarily shaped p- and n-type regions in a TI, which we subsequently image with scanning photocurrent microscopy. The ability to optically write and erase mesoscopic electronic structures in a TI may aid in the investigation of the unique properties of the topological insulating phase. The gating effect also generalizes to other thin-film materials, suggesting that these phenomena could provide optical control of chemical potential in a wide range of ultrathin electronic systems. PMID:26601300

  7. Silicon-on-insulator-based high-voltage, high-temperature integrated circuit gate driver for silicon carbide-based power field effect transistors

    SciTech Connect

    Tolbert, Leon M; Huque, Mohammad A; Blalock, Benjamin J; Islam, Syed K

    2010-01-01

    Silicon carbide (SiC)-based field effect transistors (FETs) are gaining popularity as switching elements in power electronic circuits designed for high-temperature environments like hybrid electric vehicle, aircraft, well logging, geothermal power generation etc. Like any other power switches, SiC-based power devices also need gate driver circuits to interface them with the logic units. The placement of the gate driver circuit next to the power switch is optimal for minimising system complexity. Successful operation of the gate driver circuit in a harsh environment, especially with minimal or no heat sink and without liquid cooling, can increase the power-to-volume ratio as well as the power-to-weight ratio for power conversion modules such as a DC-DC converter, inverter etc. A silicon-on-insulator (SOI)-based high-voltage, high-temperature integrated circuit (IC) gate driver for SiC power FETs has been designed and fabricated using a commercially available 0.8--m, 2-poly and 3-metal bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) process. The prototype circuit-s maximum gate drive supply can be 40-V with peak 2.3-A sourcing/sinking current driving capability. Owing to the wide driving range, this gate driver IC can be used to drive a wide variety of SiC FET switches (both normally OFF metal oxide semiconductor field effect transistor (MOSFET) and normally ON junction field effect transistor (JFET)). The switching frequency is 20-kHz and the duty cycle can be varied from 0 to 100-. The circuit has been successfully tested with SiC power MOSFETs and JFETs without any heat sink and cooling mechanism. During these tests, SiC switches were kept at room temperature and ambient temperature of the driver circuit was increased to 200-C. The circuit underwent numerous temperature cycles with negligible performance degradation.

  8. A New Analytical Subthreshold Behavior Model for Single-Halo, Dual-Material Gate Silicon-on-Insulator Metal Oxide Semiconductor Field Effect Transistor

    NASA Astrophysics Data System (ADS)

    Chiang, Te-Kuang

    2008-11-01

    On the basis of the exact solution of the two-dimensional Poisson equation, a new analytical subthreshold behavior model consisting of the two-dimensional potential, threshold voltage, and subthreshold current for the single-halo, dual-material gate (SHDMG) silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) is developed. The model is verified by the good agreement with a numerical simulation using the device simulator MEDICI. The model not only offers a physical insight into device physics but is also an efficient device model for the circuit simulation.

  9. High Electron Mobility Ge n-Channel Metal-Insulator-Semiconductor Field-Effect Transistors Fabricated by the Gate-Last Process with the Solid Source Diffusion Technique

    NASA Astrophysics Data System (ADS)

    Maeda, Tatsuro; Morita, Yukinori; Takagi, Shinichi

    2010-06-01

    We fabricate high-k/Ge n-channel metal-insulator-semiconductor field-effect transistors (MISFETs) by the gate-last process with the thermal solid source diffusion to achieve both of high quality source/drain (S/D) and gate stack. The n+/p junction formed by solid source diffusion technique of Sb dopant shows the excellent diode characteristics of ˜1.5×105 on/off ratio between +1 and -1 V and the quite low reverse current density of ˜4.1×10-4 A/cm2 at +1 V after the fabrication of high-k/Ge n-channel MISFETs that enable us to observe well-behaved transistor performances. The extracted electron mobility with the peak of 891 cm2/(V.s) is high enough to be superior to the Si universal electron mobility especially in low Eeff.

  10. Numerical investigation of temperature field Induced by dual wavelength lasers in sub-microsecond laser annealing technology for insulated gate bipolar transistor

    NASA Astrophysics Data System (ADS)

    Cui, GuoDong; Ma, Mingying; Wang, Fan; Sun, Gang; Lan, Yanping; Xu, Wen

    2015-07-01

    To enhance the performance of the Insulated Gate Bipolar Transistor (IGBT), sub-microsecond laser annealing (LA) is propitious to achieve maximal dopant activation with minimal diffusion. In this work, two different lasers are used as annealing resource: a continuous 808 nm laser with larger spot is applied to preheat the wafer and another sub-microsecond pulsed 527 nm laser is responsible to activate the dopant. To optimize the system's performance, a physical model is presented to predict the thermal effect of two laser fields interacting on wafer. Using the Finite-Element method (FEM), we numerically investigate the temperature field induced by lasers in detail. The process window corresponding to the lasers is also acquired which can satisfy the requirements of the IGBT's annealing.

  11. Heavy ion induced permanent damage in MNOS gate insulators

    NASA Astrophysics Data System (ADS)

    Pickel, J. C.; Blandford, J. T., Jr.; Waskiewicz, A. E.; Strahan, V. H., Jr.

    1985-12-01

    Heavy-ion-induced permanent damage in MNOS gate insulators has been investigated using a Cf252 fission source. The electric field and ion LET thresholds for onset of the damage has been characterized. The results are consistent with a thermal runaway mechanism in the silicon nitride layer initiated by a single heavy ion and leading to a permanent high conductivity path through the dielectric layers.

  12. Electrical performance of silicon-on-insulator field-effect transistors with multiple top-gate organic layers in electrolyte solution.

    PubMed

    Khamaisi, Bassam; Vaknin, Oshri; Shaya, Oren; Ashkenasy, Nurit

    2010-08-24

    The utilization of field-effect transistor (FET) devices in biosensing applications have been extensively studied in recent years. Qualitative and quantitative understanding of the contribution of the organic layers constructed on the device gate, and the electrolyte media, on the behavior of the device is thus crucial. In this work we analyze the contribution of different organic layers on the pH sensitivity, threshold voltage, and gain of a silicon-on-insulator based FET device. We further monitor how these properties change as function of the electrolyte screening length. Our results show that in addition to electrostatic effects, changes in the amphoteric nature of the surface also affect the device threshold voltage. These effects were found to be additive for the first (3-aminopropyl)trimethoxysilane linker layer and second biotin receptor layer. For the top streptavidin protein layer, these two effects cancel each other. The number and nature of amphoteric groups on the surface, which changes upon the formation of the layers, was shown also to affect the pH sensitivity of the device. The pH sensitivity reduces with the construction of the first two layers. However, after the formation of the streptavidin protein layer, the protein's multiple charged side chains induce an increase in the sensitivity at low ionic strengths. Furthermore, the organic layers were found to influence the device gain due to their dielectric properties, reducing the gain with the successive construction of each layer. These results demonstrate the multilevel influence of organic layers on the behavior of the FET devices.

  13. Evaluation of nanocomposite gate insulators for flexible organic thin-film transistors.

    PubMed

    Kim, Jin Soo; Cho, Sung Won; Kim, Ii; Hwang, Byeong Ung; Seol, Young Gug; Kim, Tae Woong; Lee, Nae-Eung

    2014-11-01

    To develop physically flexible electronics, high performance and mechanical stability of component materials and devices are required. For a flexible display, a backplane with flexible thin-film transistors (TFTs) must be developed. Gate insulating materials with excellent electrical and mechanical properties are highly important to the development of flexible TFTs. We investigated nanocomposite gate dielectrics composed of polyimide (PI) because of their superior thermal stability, as well as different inorganic HfO2, TiO2, and Al2O3 nanoparticles with high dielectric constants. Nanocomposite gate dielectrics of HfO2 nanoparticles and PI lowered leakage current density and increased the relative dielectric constant compared to PI solely because of a high degree of dispersion. Pentacene TFTs with HfO2 nanocomposite gate insulators also showed higher field-effect mobility (μ), smaller subthreshold swing, and an enhanced on/off current ratio (I(on/off)) compared to those of the PI gate dielectric. In addition, mechanical cyclic bending tests involving bending cycles of 2 x 10(5) time sat a bending radius of 5 mm showed improvement in electrical stability of nanocomposite gate insulators with a change in leakage current density of nanocomposite gate insulators below 30%.

  14. A scheme for a topological insulator field effect transistor

    NASA Astrophysics Data System (ADS)

    Vali, Mehran; Dideban, Daryoosh; Moezi, Negin

    2015-05-01

    We propose a scheme for a topological insulator field effect transistor. The idea is based on the gate voltage control of the Dirac fermions in a ferromagnetic topological insulator channel with perpendicular magnetization connecting to two metallic topological insulator leads. Our theoretical analysis shows that the proposed device displays a switching effect with high on/off current ratio and a negative differential conductance with a good peak to valley ratio.

  15. Chemically gated electronic structure of a superconducting doped topological insulator system

    NASA Astrophysics Data System (ADS)

    Wray, L. A.; Xu, S.; Neupane, M.; Fedorov, A. V.; Hor, Y. S.; Cava, R. J.; Hasan, M. Z.

    2013-07-01

    Angle resolved photoemission spectroscopy is used to observe changes in the electronic structure of bulk-doped topological insulator CuxBi2Se3 as additional copper atoms are deposited onto the cleaved crystal surface. Carrier density and surface-normal electrical field strength near the crystal surface are estimated to consider the effect of chemical surface gating on atypical superconducting properties associated with topological insulator order, such as the dynamics of theoretically predicted Majorana Fermion vortices.

  16. Gas insulated transmission line with insulators having field controlling recesses

    DOEpatents

    Cookson, Alan H.; Pederson, Bjorn O.

    1984-01-01

    A gas insulated transmission line having a novel insulator for supporting an inner conductor concentrically within an outer sheath. The insulator has a recess contiguous with the periphery of one of the outer and inner conductors. The recess is disposed to a depth equal to an optimum gap for the dielectric insulating fluid used for the high voltage insulation or alternately disposed to a large depth so as to reduce the field at the critical conductor/insulator interface.

  17. Atomistic characterization of SAM coatings as gate insulators in Si-based FET devices

    SciTech Connect

    Gala, F.; Zollo, G.

    2014-06-19

    Many nano-material systems are currently under consideration as possible candidates for gate dielectric insulators in both metal-oxide-semiconductor (MOSFET) and organic (OFET) field-effect transistors. In this contribution, the possibility of employing self-assembled monolayers (SAMs) of hydroxylated octadecyltrichlorosilane (OTS) chains on a (111) Si substrate as gate dielectrics is discussed; in particular ab initio theoretical simulations have been employed to study the structural properties, work function modifications, and the insulating properties of OTS thin film coatings on Si substrates.

  18. Positive-bias gate-controlled metal–insulator transition in ultrathin VO2 channels with TiO2 gate dielectrics

    PubMed Central

    Yajima, Takeaki; Nishimura, Tomonori; Toriumi, Akira

    2015-01-01

    The next generation of electronics is likely to incorporate various functional materials, including those exhibiting ferroelectricity, ferromagnetism and metal–insulator transitions. Metal–insulator transitions can be controlled by electron doping, and so incorporating such a material in transistor channels will enable us to significantly modulate transistor current. However, such gate-controlled metal–insulator transitions have been challenging because of the limited number of electrons accumulated by gate dielectrics, or possible electrochemical reaction in ionic liquid gate. Here we achieve a positive-bias gate-controlled metal–insulator transition near the transition temperature. A significant number of electrons were accumulated via a high-permittivity TiO2 gate dielectric with subnanometre equivalent oxide thickness in the inverse-Schottky-gate geometry. An abrupt transition in the VO2 channel is further exploited, leading to a significant current modulation far beyond the capacitive coupling. This solid-state operation enables us to discuss the electrostatic mechanism as well as the collective nature of gate-controlled metal–insulator transitions, paving the pathway for developing functional field effect transistors. PMID:26657761

  19. Positive-bias gate-controlled metal-insulator transition in ultrathin VO2 channels with TiO2 gate dielectrics.

    PubMed

    Yajima, Takeaki; Nishimura, Tomonori; Toriumi, Akira

    2015-12-14

    The next generation of electronics is likely to incorporate various functional materials, including those exhibiting ferroelectricity, ferromagnetism and metal-insulator transitions. Metal-insulator transitions can be controlled by electron doping, and so incorporating such a material in transistor channels will enable us to significantly modulate transistor current. However, such gate-controlled metal-insulator transitions have been challenging because of the limited number of electrons accumulated by gate dielectrics, or possible electrochemical reaction in ionic liquid gate. Here we achieve a positive-bias gate-controlled metal-insulator transition near the transition temperature. A significant number of electrons were accumulated via a high-permittivity TiO2 gate dielectric with subnanometre equivalent oxide thickness in the inverse-Schottky-gate geometry. An abrupt transition in the VO2 channel is further exploited, leading to a significant current modulation far beyond the capacitive coupling. This solid-state operation enables us to discuss the electrostatic mechanism as well as the collective nature of gate-controlled metal-insulator transitions, paving the pathway for developing functional field effect transistors.

  20. Compositionally-graded In(x)Al(1-x)As (x less than or equal to 0.52) quasi-insulator for heterojunction gated field-effect transistor applications

    NASA Astrophysics Data System (ADS)

    Lee, Phang-Zong

    1991-05-01

    This work is an experimental investigation of a new quasi-insulator structure intended for constructing large dynamic range, high linearity, heterojunction insulated gate field-effect transistors (HIGFETs) on InP substrates. This type of device was found to have great potential in broadband, large signal applications in long-wavelength optical and ultra-high-speed microwave telecommunications. To achieve this goal, the quasi-insulator must be able to provide the highest possible Schottky barrier height, highest possible conduction-band offset (for n-channel device), and good interface properties. Thus the focus of this dissertation is on the characterization of the electrical properties of the new quasi-insulator. The heterojunction system chosen for this study consists of an undoped, charge-depleted In(x)Al(1-x)As(x less than 0.52) as a quasi-insulator on a Si-doped n-In(0.53)Ga(0.47)As semiconducting channel layer. These layers are grown on InP substrates by means of molecular beam epitaxy (MBE) technique. A study of lattice-matched and strained n-isotype (N-n junction) In(x)Al(1-x)As(x less than 0.52)/In(0.53)Ga(0.47)As heterojunctions (HJs) using capacitance-voltage (C-V) profiling technique suggests that their conduction-band offsets (Delta(E)(sub c)) can be increased by an increase of the AIAs molar concentration of In(x)Al(1-x)As. The variation of Delta(E)(sub c) as a function of aluminum molar fraction is also derived throughout this investigation. C-V measurements performed on a metal-insulator-semiconductor (MIS) structure are used as a tool to characterize the interface properties of the In(x)Al(1-x)As(x less than 0.52)/In(0.53)Ga(0.47)As heterojunctions (HJs). Experimental data obtained from this measurement suggests that a possible deterioration of interface properties may occur at the HJ made of a single layer of uniformly strained In(x)Al(1-x)As(x less than 0.52) and In(0.53)Ga(0.47)As. A lattice-matched In(0.52)Al(0.48)As gate buffer layer is then

  1. Very low and broad threshold voltage fluctuation caused by ion implantation to silicon-on-insulator triple-gate fin-type field effect transistor using three-dimensional process and device simulations

    NASA Astrophysics Data System (ADS)

    Tsutsumi, Toshiyuki

    2017-06-01

    The threshold voltage (V th) fluctuation induced by the ion implantation to the source and drain extensions (SDE) of a silicon-on-insulator (SOI) triple-gate (tri-gate) fin-type field-effect transistor (FinFET) was analyzed for the first time with the use of realistic positional information of discretely doped ions by both three-dimensional (3D) process and device simulations. Interestingly, it was found that the V th fluctuation induced by SDE ion implantation has a very low and broad distribution on the low-V th side even in the case of a robust device structure such as SOI tri-gate FinFET. Furthermore, for the first time, it was quantitatively demonstrated using a proposed cluster percolation model that the origin of the very low and broad V th fluctuation is the conductive percolation among unintentionally doped ions in the channel region of the device. These results would contribute to the realization of robust transistors.

  2. Magnetic gating of a 2D topological insulator

    NASA Astrophysics Data System (ADS)

    Dang, Xiaoqian; Burton, J. D.; Tsymbal, Evgeny Y.

    2016-09-01

    Deterministic control of transport properties through manipulation of spin states is one of the paradigms of spintronics. Topological insulators offer a new playground for exploring interesting spin-dependent phenomena. Here, we consider a ferromagnetic ‘gate’ representing a magnetic adatom coupled to the topologically protected edge state of a two-dimensional (2D) topological insulator to modulate the electron transmission of the edge state. Due to the locked spin and wave vector of the transport electrons the transmission across the magnetic gate depends on the mutual orientation of the adatom magnetic moment and the current. If the Fermi energy matches an exchange-split bound state of the adatom, the electron transmission can be blocked due to the full back scattering of the incident wave. This antiresonance behavior is controlled by the adatom magnetic moment orientation so that the transmission of the edge state can be changed from 1 to 0. Expanding this consideration to a ferromagnetic gate representing a 1D chain of atoms shows a possibility to control the spin-dependent current of a strip of a 2D topological insulator by magnetization orientation of the ferromagnetic gate.

  3. Carrier mobility characteristics of (100), (110), and (551) oriented atomically flattened Si surfaces for fin structure design of multi-gate metal-insulator-silicon field-effect transistors

    NASA Astrophysics Data System (ADS)

    Kuroda, Rihito; Nakao, Yukihisa; Teramoto, Akinobu; Sugawa, Shigetoshi; Ohmi, Tadahiro

    2014-01-01

    This paper reports on the carrier mobility characteristics of (100), (110), and (551) oriented atomically flattened Si surfaces for the fin structure design of multi-gate metal-insulator-silicon FETs (MuGFETs). At the atomic scale flatness level, the hole mobility is sensitive at the relatively high effective electric field region around 1 MV/cm and the hole mobility improvement is more than the that of electron. On the flattened (551) surface, both electron and hole mobility values are higher than those of the (110) surface. The mobility-based MuGFET assessment on speed and noise margin is proposed, and its result indicates that the (551) facet (100) top surfaces fin type has the best figure-of-merit of all the investigated combinations of fin types at the intermediate facet height to top surface width ratio of 1.2 to 7.5.

  4. A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch

    NASA Astrophysics Data System (ADS)

    Luo, Xiao-Rong; Wang, Qi; Yao, Guo-Liang; Wang, Yuan-Gang; Lei, Tian-Fei; Wang, Pei; Jiang, Yong-Heng; Zhou, Kun; Zhang, Bo

    2013-02-01

    A high voltage (> 600 V) integrable silicon-on-insulator (SOI) trench-type lateral insulated gate bipolar transistor (LIGBT) with a reduced cell-pitch is proposed. The LIGBT features multiple trenches (MTs): two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX). Firstly, the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si. Secondly, oxide trenches bring in multi-directional depletion, leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field (RESURF) effect. Both increase the breakdown voltage (BV). Thirdly, oxide trenches fold the drift region around the oxide trenches, leading to a reduced cell-pitch. Finally, the oxide trenches enhance the conductivity modulation, resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop (Von). The oxide trenches cause a low anode—cathode capacitance, which increases the switching speed and reduces the turn-off energy loss (Eoff). The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm, a Von of 1.03 V at 100 A/cm-2, a turn-off time of 250 ns and Eoff of 4.1×10-3 mJ. The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits, simplifying the fabrication processes.

  5. Modelling and extraction procedure for gate insulator and fringing gate capacitance components of an MIS structure

    NASA Astrophysics Data System (ADS)

    Tinoco, J. C.; Martinez-Lopez, A. G.; Lezama, G.; Mendoza-Barrera, C.; Cerdeira, A.; Estrada, M.

    2016-07-01

    CMOS technology has been guided by the continuous reduction of MOS transistors used to fabricate integrated circuits. Additionally, the use of high-k dielectrics as well as a metal gate electrode have promoted the development of nanometric MOS transistors. Under this scenario, the proper modelling of the gate capacitance, with the aim of adequately evaluating the dielectric film thickness, becomes challenging for nanometric metal-insulator-semiconductor (MIS) structures due to the presence of extrinsic fringing capacitance components which affect the total gate capacitance. In this contribution, a complete intrinsic-extrinsic model for gate capacitance under accumulation of an MIS structure, together with an extraction procedure in order to independently determine the different capacitance components, is presented. ATLAS finite element simulation has been used to validate the proposed methodology.

  6. Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module

    DTIC Science & Technology

    2015-02-01

    Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module by Gregory K Ovrebo ARL-TR-7210...ARL-TR-7210 February 2015 Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module Gregory K...TYPE Final 3. DATES COVERED (From - To) 07/2013–09/2013 4. TITLE AND SUBTITLE Thermal Simulation of Switching Pulses in an Insulated Gate

  7. High on/off current ratio in ballistic CNTFETs based on tuning the gate insulator parameters for different ambient temperatures

    NASA Astrophysics Data System (ADS)

    Shirazi, Shaahin G.; Mirzakuchaki, Sattar

    2013-11-01

    A theoretical study is presented on the on/off current ratio limits for a ballistic coaxially-gated carbon nanotube field effect transistor (CNTFET) with highly doped source/drain regions. Based on changes in gate insulator dielectric constant and thickness, the current ratio has been estimated at different ambient temperatures. Decreasing the gate insulator thickness after a certain value around 3 nm causes the current ratio to degrade drastically. Although the higher dielectric constant values have a fair effect on current ratio, this effect could be suppressed when the device with a low gate insulator thickness works at a low ambient temperature. The simulation results also show that the temperature drastically degrades the current ratio value; whereas in a certain range of ambient temperature, tuning the values of gate insulator thickness and dielectric constant could be very helpful. In this way, the optimum values of gate insulator thickness and dielectric constant are identified to offer the highest on/off current ratio of the device.

  8. Gas-controlled dynamic vacuum insulation with gas gate

    DOEpatents

    Benson, David K.; Potter, Thomas F.

    1994-06-07

    Disclosed is a dynamic vacuum insulation comprising sidewalls enclosing an evacuated chamber and gas control means for releasing hydrogen gas into a chamber to increase gas molecule conduction of heat across the chamber and retrieving hydrogen gas from the chamber. The gas control means includes a metal hydride that absorbs and retains hydrogen gas at cooler temperatures and releases hydrogen gas at hotter temperatures; a hydride heating means for selectively heating the metal hydride to temperatures high enough to release hydrogen gas from the metal hydride; and gate means positioned between the metal hydride and the chamber for selectively allowing hydrogen to flow or not to flow between said metal hydride and said chamber.

  9. Gas-controlled dynamic vacuum insulation with gas gate

    DOEpatents

    Benson, D.K.; Potter, T.F.

    1994-06-07

    Disclosed is a dynamic vacuum insulation comprising sidewalls enclosing an evacuated chamber and gas control means for releasing hydrogen gas into a chamber to increase gas molecule conduction of heat across the chamber and retrieving hydrogen gas from the chamber. The gas control means includes a metal hydride that absorbs and retains hydrogen gas at cooler temperatures and releases hydrogen gas at hotter temperatures; a hydride heating means for selectively heating the metal hydride to temperatures high enough to release hydrogen gas from the metal hydride; and gate means positioned between the metal hydride and the chamber for selectively allowing hydrogen to flow or not to flow between said metal hydride and said chamber. 25 figs.

  10. Gate-to-body tunneling current model for silicon-on-insulator MOSFETs

    NASA Astrophysics Data System (ADS)

    Wu, Qing-Qing; Chen, Jing; Luo, Jie-Xin; Lü, Kai; Yu, Tao; Chai, Zhan; Wang, Xi

    2013-10-01

    A gate-to-body tunneling current model for silicon-on-insulator (SOI) devices is simulated. As verified by the measured data, the model, considering both gate voltage and drain voltage dependence as well as image force-induced barrier low effect, provides a better prediction of the tunneling current and gate-induced floating body effect than the BSIMSOI4 model. A delayed gate-induced floating body effect is also predicted by the model.

  11. Monte Carlo simulation of double gate silicon on insulator devices operated as velocity modulation transistors

    NASA Astrophysics Data System (ADS)

    Sampedro, C.; Gamiz, F.; Godoy, A.; Prunnila, M.; Ahopelto, J.

    2005-05-01

    We used an ensemble Monte Carlo simulator to study both the dc and transient behavior of a double gate silicon-on-insulator transistor (DGSOI) operated as a velocity modulation transistor (VMT) and as a conventional field effect transistor (FET). Operated as a VMT, the DGSOI transistor provides switching times shorter than 1ps regardless of the channel length, with a significant current modulation factor at room temperature. The same device operated as a FET provides much longer switching times which, in addition, increase with the channel length.

  12. Method for disclosing invisible physical properties in metal-ferroelectric-insulator-semiconductor gate stacks

    NASA Astrophysics Data System (ADS)

    Sakai, Shigeki; Zhang, Wei; Takahashi, Mitsue

    2017-04-01

    In metal-ferroelectric-insulator-semiconductor gate stacks of ferroelectric-gate field effect transistors (FeFETs), it is impossible to directly obtain curves of polarization versus electric field (P f-E f) in the ferroelectric layer. The P f-E f behavior is not simple, i.e. the P f-E f curves are hysteretic and nonlinear, and the hysteresis curve width depends on the electric field scan amplitude. Unless the P f-E f relation is known, the field E f strength cannot be solved when the voltage is applied between the gate meal and the semiconductor substrate, and thus P f-E f cannot be obtained after all. In this paper, the method for disclosing the relationships among the polarization peak-to-peak amplitude (2P mm_av), the electric field peak-to-peak amplitude (2E mm_av), and the memory window (E w) in units of the electric field is presented. To get P mm_av versus E mm_av, FeFETs with different ferroelectric-layer thicknesses should be prepared. Knowing such essential physical parameters is helpful and in many cases enough to quantitatively understand the behavior of FeFETs. The method is applied to three groups. The first one consists of SrBi2Ta2O9-based FeFETs. The second and third ones consist of Ca x Sr1-x Bi2Ta2O9-based FeFETs made by two kinds of annealing. The method can clearly differentiate the characters of the three groups. By applying the method, ferroelectric relationships among P mm_av, E mm_av, and E w are well classified in the three groups according to the difference of the material kinds and the annealing conditions. The method also evaluates equivalent oxide thickness (EOT) of a dual layer of a deposited high-k insulator and a thermally-grown SiO2-like interfacial layer (IL). The IL thickness calculated by the method is consistent with cross-sectional image of the FeFETs observed by a transmission electron microscope. The method successfully discloses individual characteristics of the ferroelectric and the insulator layers hidden in the gate stack

  13. Electrical Probing of Inherent Spin Polarization in a Topological Insulator with Electrical Gating

    NASA Astrophysics Data System (ADS)

    Lee, Joon Sue; Richardella, Anthony; Samarth, Nitin

    2015-03-01

    The hallmark of a time-reversal symmetry protected three-dimensional topological insulator is the helically spin-textured surface state. Although electrical detection of spin polarization in topological insulators has been demonstrated very recently, there have not been any electrical measurements to demonstrate the entire mapping of the spin polarization throughout the surface state. We report the electrical probing of the spin-polarized surface state using a magnetic tunnel junction as a spin detector while the chemical potential of a topological insulator (Bi,Sb)2Te3 is tuned by back gating. Hysteretic spin signals were observed as the magnetization of the detector ferromagnet (permalloy) switches with in-plane magnetic field. Changing the direction of bias current through the topological insulator channel flips the direction of the spin polarization, resulting in the reverse of sign of the detected spin signals. We demonstrate the control of the Fermi energy, which has importance not only in further understanding of the spin-momentum locking in the surface state but also in possible electrical tuning of the spin polarization for potential spin-based devices. Supported by C-SPIN & DARPA/SRC.

  14. Quantum Dot Channel (QDC) FETs with Wraparound II-VI Gate Insulators: Numerical Simulations

    NASA Astrophysics Data System (ADS)

    Jain, F.; Lingalugari, M.; Kondo, J.; Mirdha, P.; Suarez, E.; Chandy, J.; Heller, E.

    2016-11-01

    This paper presents simulations predicting the feasibility of 9-nm wraparound quantum dot channel (QDC) field-effect transistors (FETs). In particular, II-VI lattice-matched layers which reduce the density of interface states, serving as top (tunnel gate), side, and bottom gate insulators, have been simulated. Quantum simulations show FET operation with voltage swing of ~0.2 V. Incorporation of cladded quantum dots, such as SiO x -Si and GeO x -Ge, under the gate tunnel oxide results in electrical transport in one or more quantum dot layers which form a quantum dot superlattice (QDSL). Long-channel QDC FETs have experimental multistate drain current ( I D)-gate voltage ( V G) and drain current ( I D)-drain voltage ( V D) characteristics, which can be attributed to the manifestation of extremely narrow energy minibands formed in the QDSL. An approach for modeling the multistate I D- V G characteristics is reported. The multistate characteristics of QDC FETs permit design of compact two-bit multivalued logic circuits.

  15. Characterization of insulated-gate bipolar transistor temperature on insulating, heat-spreading polycrystalline diamond substrate

    NASA Astrophysics Data System (ADS)

    Umezawa, Hitoshi; Shikata, Shin-ichi; Kato, Yukako; Mokuno, Yoshiaki; Seki, Akinori; Suzuki, Hiroshi; Bessho, Takeshi

    2017-01-01

    Polycrystalline diamond films have been utilized as direct bonding aluminum (DBA) substrates to improve cooling efficiency. A diamond film with a high quality factor was characterized by Raman spectroscopy and showed a high thermal conductivity of more than 1800 W m-1 K-1 and a low leakage current, even at an applied bias of 3 kV, because of the suppression of electrical conduction through the grain boundaries. The operating temperatures of Insulated-gate bipolar transistors (IGBTs) on diamond DBAs were 20-28% lower than those on AlN DBAs. The thermal resistivity of the diamond DBA module was 0.32 °C/W. The uniformity of the temperature distribution on a diamond DBA was excellent.

  16. Characterization and modeling of the power Insulated Gate Bipolar Transistor

    SciTech Connect

    Hefner, A.R.

    1987-01-01

    The power Insulated Gate Bipolar Transistor (IGBT) is a new switching device designed to overcome the high on-state loss of the power MOSFET. The IGBT behaves as a bipolar transistor which is supplied base current by a MOSFET. The bipolar transistor of the IBGT has a wide base with the base contact at the collector edge of the base and is operated with its base in high-level injection. Because of this, the traditional bipolar transistor models are not adequate for the IBGT and the new model developed in this dissertation must be used. The new model is developed using ambipolar transport and does not assume the quasi-static condition for the transient analysis. The new IBGT model is used to describe measurements for extracting the essential physical device parameters of the model. With these extracted parameters, the new IGBT model consistently describes the measured electrical characteristics of IGBTs with different base lifetimes. The important electrical characteristics of the IGBT are the on-state I-V characteristics, the steady-state saturation current, and the switching transient current and voltage waveforms. The transient waveforms are examined in detail for constant anode voltage switching, clamped inductive load switching, and series resistor, inductor load switching.

  17. Accessing Rashba states in electrostatically gated topological insulator devices

    NASA Astrophysics Data System (ADS)

    Banerjee, Abhishek; Sundaresh, Ananthesh; Majhi, Kunjalata; Ganesan, R.; Anil Kumar, P. S.

    2016-12-01

    We study the low temperature electrical transport in gated BiSbTe1.25Se1.75/hexagonal-Boron Nitride van der Waals heterostructure devices. Our experiments indicate the presence of Rashba spin-split states confined to the sample surface. While such states have been observed previously in photo-emission spectroscopy and STM experiments, it has not been possible to unambiguously detect them by electrical means and their transport properties remain mostly unknown. We show that these states support high mobility conduction with Hall effect mobilities ˜2000 to 3000 cm2/V-s that are paradoxically much larger than the mobilities of the topological surface states ˜300 cm2/V-s at T = 2 K. The spin-split nature of these states is confirmed by magneto-resistance measurements that reveal multi-channel weak anti-localization. Our work shows that Rashba spin split states can be electrically accessed in Topological insulators paving the way for future spintronic applications.

  18. Oleyl group-functionalized insulating gate transistors for measuring extracellular pH of floating cells

    PubMed Central

    Imaizumi, Yuki; Goda, Tatsuro; Toya, Yutaro; Matsumoto, Akira; Miyahara, Yuji

    2016-01-01

    Abstract The extracellular ionic microenvironment has a close relationship to biological activities such as by cellular respiration, cancer development, and immune response. A system composed of ion-sensitive field-effect transistors (ISFET), cells, and program-controlled fluidics has enabled the acquisition of real-time information about the integrity of the cell membrane via pH measurement. Here we aimed to extend this system toward floating cells such as T lymphocytes for investigating complement activation and pharmacokinetics through alternations in the plasma membrane integrity. We functionalized the surface of tantalum oxide gate insulator of ISFET with oleyl-tethered phosphonic acid for interacting with the plasma membranes of floating cells without affecting the cell signaling. The surface modification was characterized by X-ray photoelectron spectroscopy and water contact angle measurements. The Nernst response of −37.8 mV/pH was obtained for the surface-modified ISFET at 37 °C. The oleyl group-functionalized gate insulator successfully captured Jurkat T cells in a fluidic condition without acute cytotoxicity. The system was able to record the time course of pH changes at the cells/ISFET interface during the process of instant addition and withdrawal of ammonium chloride. Further, the plasma membrane injury of floating cells after exposure by detergent Triton™ X-100 was successfully determined using the modified ISFET with enhanced sensitivity as compared with conventional hemolysis assays. PMID:27877886

  19. Modeling and estimation of process-induced stress in the nanowire field-effect-transistors (NW-FETs) on Insulator-on-Silicon substrates with high-k gate-dielectrics

    NASA Astrophysics Data System (ADS)

    Chatterjee, Sulagna; Chattopadhyay, Sanatan

    2016-10-01

    An analytical model including the simultaneous impact of lattice and thermo-elastic constant mismatch-induced stress in nanowires on Insulator-on-Silicon substrate is developed. It is used to calibrate the finite-element based software, ANSYS, which is subsequently employed to estimate process-induced stress in the sequential steps of NW-FET fabrication. The model considers crystal structures and orientations for both the nanowires and substrates. In-plane stress components along nanowire-axis are estimated for different radii and fractions of insertion. Nature of longitudinal stress is observed to change when inserted fraction of nanowires is changed. Effect of various high-k gate-dielectrics is also investigated. A longitudinal tensile stress of 2.4 GPa and compressive stress of 1.89 GPa have been obtained for NW-FETs with 1/4th and 3/4th insertions with La2O3 and TiO2 as the gate-dielectrics, respectively. Therefore, it is possible to achieve comparable values of electron and hole mobility in NW-FETs by judiciously choosing gate-dielectrics and fractional insertion of the nanowires.

  20. Engineered Ceramic Insulators for High Field Magnets

    NASA Astrophysics Data System (ADS)

    Rice, J. A.

    2006-03-01

    High field magnet coils made from brittle A15 superconductors need to be rigidly contained by their support structure but yet be electrically insulated from it. Current insulators (end shoes, pole pieces, spacers, mandrels, etc.) are often made from coated metallic shapes that satisfy the mechanical and thermal requirements but are electrically unreliable. The insulating coating on the metal core too often chips or flakes, causing electrical shorts. Any replacement insulator materials must manage the thermal expansion mismatch to control the stress within the coil enabling the achievement of ultimate magnet performance. A novel ceramic insulator has been developed that eliminates the potential for shorting while maintaining high structural integrity and thermal performance. The insulator composition can be engineered to provide a thermal expansion that matches the coil expansion, minimizing detrimental stress on the superconductor. These ceramic insulators are capable of surviving high temperature heat treatments and are radiation resistant. The material can withstand high mechanical loads generated during magnet operation. These more robust insulators will lower the magnet production costs, which will help enable future devices to be constructed within budgetary restrictions.

  1. Gate-tuned superconductor-insulator transition in (Li,Fe)OHFeSe

    NASA Astrophysics Data System (ADS)

    Lei, B.; Xiang, Z. J.; Lu, X. F.; Wang, N. Z.; Chang, J. R.; Shang, C.; Zhang, A. M.; Zhang, Q. M.; Luo, X. G.; Wu, T.; Sun, Z.; Chen, X. H.

    2016-02-01

    The antiferromagnetic (AFM) insulator-superconductor transition has always been a center of interest in the underlying physics of unconventional superconductors. However, in the family of iron-based high-Tc superconductors, no intrinsic superconductor-insulator transition has been confirmed so far. Here, we report a first-order transition from superconductor to AFM insulator with a strong charge doping induced by ionic gating in the thin flakes of single crystal (Li,Fe)OHFeSe. The superconducting transition temperature (Tc) is continuously enhanced with electron doping by ionic gating up to a maximum Tc of 43 K, and a striking superconductor-insulator transition occurs just at the verge of optimal doping with highest Tc. A phase diagram of temperature-gating voltage with the superconductor-insulator transition is mapped out, indicating that the superconductor-insulator transition is a common feature for unconventional superconductivity. These results help to uncover the underlying physics of iron-based superconductivity as well as the universal mechanism of high-Tc superconductivity. Our finding also suggests that the gate-controlled strong charge doping makes it possible to explore novel states of matter in a way beyond traditional methods.

  2. Protected gates for topological quantum field theories

    NASA Astrophysics Data System (ADS)

    Beverland, Michael E.; Buerschaper, Oliver; Koenig, Robert; Pastawski, Fernando; Preskill, John; Sijher, Sumit

    2016-02-01

    We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.

  3. Protected gates for topological quantum field theories

    SciTech Connect

    Beverland, Michael E.; Pastawski, Fernando; Preskill, John; Buerschaper, Oliver; Koenig, Robert; Sijher, Sumit

    2016-02-15

    We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.

  4. A high-conductivity insulated gate bipolar transistor with Schottky hole barrier contact

    NASA Astrophysics Data System (ADS)

    Mengxuan, Jiang; John, Shen Z.; Jun, Wang; Xin, Yin; Zhikang, Shuai; Jiang, Lu

    2016-02-01

    This letter proposes a high-conductivity insulated gate bipolar transistor (HC-IGBT) with Schottky contact formed on the p-base, which forms a hole barrier at the p-base side to enhance the conductivity modulation effect. TCAD simulation shows that the HC-IGBT provides a current density increase by 53% and turn-off losses decrease by 27% when compared to a conventional field-stop IGBT (FS-IGBT). Hence, the proposed IGBT exhibits superior electrical performance for high-efficiency power electronic systems. Project supported by the National High Technology Research and Development Program of China (No. 2014AA052601) and the National Natural Science Foundation of China (No. 51277060).

  5. Tuning the metal-insulator crossover and magnetism in SrRuO3 by ionic gating

    PubMed Central

    Yi, Hee Taek; Gao, Bin; Xie, Wei; Cheong, Sang-Wook; Podzorov, Vitaly

    2014-01-01

    Reversible control of charge transport and magnetic properties without degradation is a key for device applications of transition metal oxides. Chemical doping during the growth of transition metal oxides can result in large changes in physical properties, but in most of the cases irreversibility is an inevitable constraint. Here we report a reversible control of charge transport, metal-insulator crossover and magnetism in field-effect devices based on ionically gated archetypal oxide system - SrRuO3. In these thin-film devices, the metal-insulator crossover temperature and the onset of magnetoresistance can be continuously and reversibly tuned in the range 90–250 K and 70–100 K, respectively, by application of a small gate voltage. We infer that a reversible diffusion of oxygen ions in the oxide lattice dominates the response of these materials to the gate electric field. These findings provide critical insights into both the understanding of ionically gated oxides and the development of novel applications. PMID:25308251

  6. Tuning the metal-insulator crossover and magnetism in SrRuO3 by ionic gating

    DOE PAGES

    Yi, Hee Taek; Gao, Bin; Xie, Wei; ...

    2014-10-13

    Reversible control of charge transport and magnetic properties without degradation is a key for device applications of transition metal oxides. Chemical doping during the growth of transition metal oxides can result in large changes in physical properties, but in most of the cases irreversibility is an inevitable constraint. We report a reversible control of charge transport, metal-insulator crossover and magnetism in field-effect devices based on ionically gated archetypal oxide system - SrRuO3. In these thin-film devices, the metal-insulator crossover temperature and the onset of magnetoresistance can be continuously and reversibly tuned in the range 90–250 K and 70–100 K, respectively,more » by application of a small gate voltage. We infer that a reversible diffusion of oxygen ions in the oxide lattice dominates the response of these materials to the gate electric field. These findings provide critical insights into both the understanding of ionically gated oxides and the development of novel applications.« less

  7. Tuning the metal-insulator crossover and magnetism in SrRuO3 by ionic gating

    SciTech Connect

    Yi, Hee Taek; Gao, Bin; Xie, Wei; Cheong, Sang -Wook; Podzorov, Vitaly

    2014-10-13

    Reversible control of charge transport and magnetic properties without degradation is a key for device applications of transition metal oxides. Chemical doping during the growth of transition metal oxides can result in large changes in physical properties, but in most of the cases irreversibility is an inevitable constraint. We report a reversible control of charge transport, metal-insulator crossover and magnetism in field-effect devices based on ionically gated archetypal oxide system - SrRuO3. In these thin-film devices, the metal-insulator crossover temperature and the onset of magnetoresistance can be continuously and reversibly tuned in the range 90–250 K and 70–100 K, respectively, by application of a small gate voltage. We infer that a reversible diffusion of oxygen ions in the oxide lattice dominates the response of these materials to the gate electric field. These findings provide critical insights into both the understanding of ionically gated oxides and the development of novel applications.

  8. Floating-Gate Type Organic Memory with Organic Insulator Thin Film of Plasma Polymerized Methyl Methacrylate

    NASA Astrophysics Data System (ADS)

    Kim, Hee-sung; Lee, Boong-Joo; Kim, Gun-Su; Shin, Paik-Kyun

    2013-02-01

    To fabricate organic memory device by entirely dry process, plasma polymerized methyl methacrylate (ppMMA) thin films were prepared and they were used as both tunneling layer and gate insulator layer in a floating-gate type organic memory device. The ppMMA thin films were prepared with inductively coupled plasma (ICP) source combined with stabilized monomer vapor control. The ppMMA gate insulator thin film revealed dielectric constant of 3.75 and low leakage current of smaller than 10-9 A/cm. The floating-gate type organic memory device showed promising memory characteristics such as memory window value of 12 V and retention time of over 2 h, where 60 V of writing voltage and -30 V of erasing voltage were applied, respectively.

  9. Combined gate-tunable Josephson junctions and normal state transport in Bi2Te3 topological insulator thin films

    NASA Astrophysics Data System (ADS)

    Ngabonziza, Prosper; Stehno, Martin, P.; Myoren, Hiroaki; Brinkman, Alexander

    In recent years, extensive efforts have been made to improve the coupling between topological insulators and s-wave superconductors in topological insulator Josephson devices (TIJDs). Despite significant progress, essential questions remain open such as the bulk contribution to the Josephson critical current or the existence (and number) of 4 π -periodic bound states (Majoranas) in TIJDs. To address these issues, we fabricated Nb/Bi2Te3/Nb Josephson junctions alongside Hall bar devices on MBE-grown Bi2Te3 topological insulator thin films. Using the SrTiO3 [111] substrate as a gate dielectric, we tuned the carrier density electrostatically and measured the Josephson supercurrent and the normal state transport properties of our thin film devices. We identify three gate voltage ranges with distinct behavior: A region of intermediate gate bias where the measured quantities change rapidly with the applied electric field, and two saturation regions for large bias of either polarity. We discuss carrier distribution and band alignment in the material as well as implications for the effective Josephson coupling in TIJDs. This work is financially supported by the Dutch Foundation for Fundamental Research on Matter (FOM), the Netherlands Organization for Scientific Research (NWO), and by the European Research Council (ERC).

  10. Soft-switching performance analysis of the clustered insulated gate bipolar transistor (CIGBT)

    NASA Astrophysics Data System (ADS)

    Nicholls, Jonathan Christopher

    The use of Insulated Gate Bipolar Transistors (IGBT) have enabled better switching performance than the Metal Oxide Semiconductor Field effect Transistor (MOSFET) in medium to high power applications due to their lower on-state power loss and higher current densities. This current research focuses on the Clustered Insulated Gate Bipolar Transistor (CIGBT) whilst being operated under soft-switching regimes. The CIGBT is a MOS gated thyristor device that exhibits a unique self-clamping feature that protects cathode cells from high anode voltages under all operating conditions. The self-clamping feature also enables current saturation at high gate biases and provides low switching losses. Its low on-state voltage and high voltage blocking capabilities make the CIGBT suitable as a contender to the IGBT in medium to high power switching applications. For the first time, the CIGBT has been operated under soft-switching regimes and transient over-voltages at turn-on have been witnessed which have been found to be associated with a number of factors.. The internal dynamics of the CIGBT have been analysed using 2D numerical simulations and it has been shown that a major influence on the peak voltage is the P well spacing within the CIGBT structure. For example, Small adjacent P well spacings within the device results in an inability for the CIGBT to switch iv on correctly. Further to this, implant concentrations of the n well region during device fabrication can also affect the turn-on transients. Despite this, the CIGBT has been experimental analysed under soft-switching conditions and found to outperform the IGBT by 12% and 27% for on-state voltage drop and total energy losses respectively. Turn off current bumps have been seen whilst switching the device in zero voltage and zero current switching mode of operation and the internal dynamics have been analysed to show the influence upon the current at turn off. Preliminary results on the Trench CIGBT (TCIGBT) under soft

  11. Surface modification of a polyimide gate insulator with an yttrium oxide interlayer for aqueous-solution-processed ZnO thin-film transistors.

    PubMed

    Jang, Kwang-Suk; Wee, Duyoung; Kim, Yun Ho; Kim, Jinsoo; Ahn, Taek; Ka, Jae-Won; Yi, Mi Hye

    2013-06-11

    We report a simple approach to modify the surface of a polyimide gate insulator with an yttrium oxide interlayer for aqueous-solution-processed ZnO thin-film transistors. It is expected that the yttrium oxide interlayer will provide a surface that is more chemically compatible with the ZnO semiconductor than is bare polyimde. The field-effect mobility and the on/off current ratio of the ZnO TFT with the YOx/polyimide gate insulator were 0.456 cm(2)/V·s and 2.12 × 10(6), respectively, whereas the ZnO TFT with the polyimide gate insulator was inactive.

  12. Improved interfacial and electrical properties of vanadyl-phthalocyanine metal-insulator-semiconductor devices with silicon nitride as gate insulator

    SciTech Connect

    Wang, Lijuan Song, Xiaofeng; Liu, Xin; Zhang, Long; Li, Yiping; Yan, Donghang

    2013-12-09

    We have investigated the interfacial and electrical properties of vanadyl-phthalocyanine (VOPc) metal-insulator-semiconductor devices by the measurement of capacitance and conductance. The devices have been fabricated on ordered para-sexiphenyl (p-6P) layer with silicon nitride (SiN{sub x}) as gate insulator. The VOPc/p-6P/SiN{sub x} devices have shown a negligible hysteresis, low series resistance, and high operated frequency. Bulk traps have been distinguished from interface traps by two loss peaks in conductance measurement. Trap densities and distribution of trap energy level have been obtained. The improved properties indicate that VOPc/ p-6P devices with SiN{sub x} insulator hold a great promise of application in flexible displays.

  13. All-optical logic gates in plasmonic metal-insulator-metal nanowaveguide with slot cavity resonator

    NASA Astrophysics Data System (ADS)

    Dolatabady, Alireza; Granpayeh, Nosrat

    2017-04-01

    We demonstrate the compact all-optical logic XOR and OR gates in subwavelength plasmonic metal-insulator-metal waveguides with slot cavity resonators, especially for telecommunication wavelengths, with an extinction ratio of 25 dB, which can provide nanoscale logic integrated circuits. The gates behavior is based on suppression or enhancement of resonant modes in a slot cavity resonator induced by a change in position of input ports. The performance of the gates is discussed analytically and verified by the numerical method of finite-difference time-domain (FDTD).

  14. Radiation hardening of MOS devices by boron. [for stabilizing gate threshold potential of field effect device

    NASA Technical Reports Server (NTRS)

    Danchenko, V. (Inventor)

    1974-01-01

    A technique is described for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device with a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. The boron is introduced within a layer of the oxide of about 100 A-300 A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 to the 18th power atoms/cu cm. The technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations.

  15. Giant reversible, facet-dependent, structural changes in a correlated-electron insulator induced by ionic liquid gating

    PubMed Central

    Jeong, Jaewoo; Aetukuri, Nagaphani B.; Passarello, Donata; Conradson, Steven D.; Samant, Mahesh G.; Parkin, Stuart S. P.

    2015-01-01

    The use of electric fields to alter the conductivity of correlated electron oxides is a powerful tool to probe their fundamental nature as well as for the possibility of developing novel electronic devices. Vanadium dioxide (VO2) is an archetypical correlated electron system that displays a temperature-controlled insulating to metal phase transition near room temperature. Recently, ionic liquid gating, which allows for very high electric fields, has been shown to induce a metallic state to low temperatures in the insulating phase of epitaxially grown thin films of VO2. Surprisingly, the entire film becomes electrically conducting. Here, we show, from in situ synchrotron X-ray diffraction and absorption experiments, that the whole film undergoes giant, structural changes on gating in which the lattice expands by up to ∼3% near room temperature, in contrast to the 10 times smaller (∼0.3%) contraction when the system is thermally metallized. Remarkably, these structural changes are fully reversible on reverse gating. Moreover, we find these structural changes and the concomitant metallization are highly dependent on the VO2 crystal facet, which we relate to the ease of electric-field–induced motion of oxygen ions along chains of edge-sharing VO6 octahedra that exist along the (rutile) c axis. PMID:25583517

  16. Development and characterization of ultrathin hafnium titanates as high permittivity gate insulators

    NASA Astrophysics Data System (ADS)

    Li, Min

    High permittivity or high-kappa materials are being developed for use as gate insulators for future ultrascaled metal oxide semiconductor field effect transistors (MOSFETs). Hafnium containing compounds are the leading candidates. Due to its moderate permittivity, however, it is difficult to achieve HfO2 gate structures with an EOT well below 1.0 nm. One approach to increase HfO2 permittivity is combining it with a very high-kappa material, such as TiO2. In this thesis, we systematically studied the electrical and physical characteristics of high-kappa hafnium titanates films as gate insulators. A series of HfxTi1-xO2 films with well-controlled composition were deposited using an MOCVD system. The physical properties of the films were analyzed using a variety of characterization techniques. X-ray micro diffraction indicates that the Ti-rich thin film is more immune to crystallization. TEM analysis showed that the thick stoichiometric HfTiO 4 film has an orthorhombic structure and large anisotropic grains. The C-V curves from the devices with the hafnium titanates films displayed relatively low hysteresis. In a certain composition range, the interfacial layer (IL) EOT and permittivity of HfxTi1-x O2 increases linearly with increasing Ti. The charge is negative for HfxTi1-xO2/IL and positive for Si/IL interface, and the magnitude increases as Hf increases. For ultra-thin films (less than 2 nm EOT), the leakage current increases with increasing HE Moreover, the Hf-rich sample has weaker temperature dependence of the current. In the MOSFET devices with the hafnium titanates films, normal transistor characteristics were observed, also electron mobility degradation. Next, we investigated the effects that different pre-deposition surface treatments, including HF dipping, NH3 surface nitridation, and HfO2 deposition, have on the electrical properties of hafnium titanates. Surface nitridation shows stronger effect than the thin HfO2 layer. The nitrided samples displayed a

  17. Dual-gated topological insulator thin-film device for efficient Fermi-level tuning.

    PubMed

    Yang, Fan; Taskin, A A; Sasaki, Satoshi; Segawa, Kouji; Ohno, Yasuhide; Matsumoto, Kazuhiko; Ando, Yoichi

    2015-04-28

    Observations of novel quantum phenomena expected for three-dimensional topological insulators (TIs) often require fabrications of thin-film devices and tuning of the Fermi level across the Dirac point. Since thin films have both top and bottom surfaces, an effective control of the surface chemical potential requires dual gating. However, a reliable dual-gating technique for TI thin films has not yet been developed. Here we report a comprehensive method to fabricate a dual-gated TI device and demonstrate tuning of the chemical potential of both surfaces across the Dirac points. The most important part of our method is the recipe for safely detaching high-quality, bulk-insulating (Bi(1-x)Sb(x))2Te3 thin films from sapphire substrates and transferring them to Si/SiO2 wafers that allow back gating. Fabrication of an efficient top gate by low-temperature deposition of a SiN(x) dielectric complements the procedure. Our dual-gated devices are shown to be effective in tuning the chemical potential in a wide range encompassing the Dirac points on both surfaces.

  18. An analysis of the temperature dependence of the gate current in complementary heterojunction field-effect transistors

    NASA Technical Reports Server (NTRS)

    Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.

    1992-01-01

    The temperature dependence of the gate current versus the gate voltage in complementary heterojunction field-effect transistors (CHFET's) is examined. An analysis indicates that the gate conduction is due to a combination of thermionic emission, thermionic-field emission, and conduction through a temperature-activated resistance. The thermionic-field emission is consistent with tunneling through the AlGaAs insulator. The activation energy of the resistance is consistent with the ionization energy associated with the DX center in the AlGaAs. Methods reducing the gate current are discussed.

  19. Total ionizing dose effects in multiple-gate field-effect transistor

    NASA Astrophysics Data System (ADS)

    Gaillardin, Marc; Marcandella, Claude; Martinez, Martial; Raine, Mélanie; Paillet, Philippe; Duhamel, Olivier; Richard, Nicolas

    2017-08-01

    This paper focuses on total ionizing dose (TID) effects induced in multiple-gate field-effect transistors. The impact of device architecture, geometry and scaling on the TID response of multiple-gate transistors is reviewed in both bulk and silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technologies. These innovating devices exhibit specific ionizing dose responses which strongly depend on their three-dimensional nature. Their TID responses may look like the one usually observed in planar two-dimensional bulk or SOI transistors, but multiple-gate devices can also behave like any other CMOS device.

  20. Quantum transport of two-species Dirac fermions in dual-gated three-dimensional topological insulators

    SciTech Connect

    Xu, Yang; Miotkowski, Ireneusz; Chen, Yong P.

    2016-05-04

    Topological insulators are a novel class of quantum matter with a gapped insulating bulk, yet gapless spin-helical Dirac fermion conducting surface states. Here, we report local and non-local electrical and magneto transport measurements in dual-gated BiSbTeSe2 thin film topological insulator devices, with conduction dominated by the spatially separated top and bottom surfaces, each hosting a single species of Dirac fermions with independent gate control over the carrier type and density. We observe many intriguing quantum transport phenomena in such a fully tunable two-species topological Dirac gas, including a zero-magnetic-field minimum conductivity close to twice the conductance quantum at the double Dirac point, a series of ambipolar two-component half-integer Dirac quantum Hall states and an electron-hole total filling factor zero state (with a zero-Hall plateau), exhibiting dissipationless (chiral) and dissipative (non-chiral) edge conduction, respectively. As a result, such a system paves the way to explore rich physics, ranging from topological magnetoelectric effects to exciton condensation.

  1. Quantum transport of two-species Dirac fermions in dual-gated three-dimensional topological insulators.

    PubMed

    Xu, Yang; Miotkowski, Ireneusz; Chen, Yong P

    2016-05-04

    Topological insulators are a novel class of quantum matter with a gapped insulating bulk, yet gapless spin-helical Dirac fermion conducting surface states. Here, we report local and non-local electrical and magneto transport measurements in dual-gated BiSbTeSe2 thin film topological insulator devices, with conduction dominated by the spatially separated top and bottom surfaces, each hosting a single species of Dirac fermions with independent gate control over the carrier type and density. We observe many intriguing quantum transport phenomena in such a fully tunable two-species topological Dirac gas, including a zero-magnetic-field minimum conductivity close to twice the conductance quantum at the double Dirac point, a series of ambipolar two-component half-integer Dirac quantum Hall states and an electron-hole total filling factor zero state (with a zero-Hall plateau), exhibiting dissipationless (chiral) and dissipative (non-chiral) edge conduction, respectively. Such a system paves the way to explore rich physics, ranging from topological magnetoelectric effects to exciton condensation.

  2. Quantum transport of two-species Dirac fermions in dual-gated three-dimensional topological insulators

    DOE PAGES

    Xu, Yang; Miotkowski, Ireneusz; Chen, Yong P.

    2016-05-04

    Topological insulators are a novel class of quantum matter with a gapped insulating bulk, yet gapless spin-helical Dirac fermion conducting surface states. Here, we report local and non-local electrical and magneto transport measurements in dual-gated BiSbTeSe2 thin film topological insulator devices, with conduction dominated by the spatially separated top and bottom surfaces, each hosting a single species of Dirac fermions with independent gate control over the carrier type and density. We observe many intriguing quantum transport phenomena in such a fully tunable two-species topological Dirac gas, including a zero-magnetic-field minimum conductivity close to twice the conductance quantum at the doublemore » Dirac point, a series of ambipolar two-component half-integer Dirac quantum Hall states and an electron-hole total filling factor zero state (with a zero-Hall plateau), exhibiting dissipationless (chiral) and dissipative (non-chiral) edge conduction, respectively. As a result, such a system paves the way to explore rich physics, ranging from topological magnetoelectric effects to exciton condensation.« less

  3. Quantum transport of two-species Dirac fermions in dual-gated three-dimensional topological insulators

    NASA Astrophysics Data System (ADS)

    Xu, Yang; Miotkowski, Ireneusz; Chen, Yong P.

    2016-05-01

    Topological insulators are a novel class of quantum matter with a gapped insulating bulk, yet gapless spin-helical Dirac fermion conducting surface states. Here, we report local and non-local electrical and magneto transport measurements in dual-gated BiSbTeSe2 thin film topological insulator devices, with conduction dominated by the spatially separated top and bottom surfaces, each hosting a single species of Dirac fermions with independent gate control over the carrier type and density. We observe many intriguing quantum transport phenomena in such a fully tunable two-species topological Dirac gas, including a zero-magnetic-field minimum conductivity close to twice the conductance quantum at the double Dirac point, a series of ambipolar two-component half-integer Dirac quantum Hall states and an electron-hole total filling factor zero state (with a zero-Hall plateau), exhibiting dissipationless (chiral) and dissipative (non-chiral) edge conduction, respectively. Such a system paves the way to explore rich physics, ranging from topological magnetoelectric effects to exciton condensation.

  4. Gate insulator effects on the electrical performance of ZnO thin film transistor on a polyethersulphone substrate.

    PubMed

    Lee, Jae-Kyu; Choi, Duck-Kyun

    2012-07-01

    Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.

  5. Electric-field-induced superconductivity in an insulator.

    PubMed

    Ueno, K; Nakamura, S; Shimotani, H; Ohtomo, A; Kimura, N; Nojima, T; Aoki, H; Iwasa, Y; Kawasaki, M

    2008-11-01

    Electric field control of charge carrier density has long been a key technology to tune the physical properties of condensed matter, exploring the modern semiconductor industry. One of the big challenges is to increase the maximum attainable carrier density so that we can induce superconductivity in field-effect-transistor geometry. However, such experiments have so far been limited to modulation of the critical temperature in originally conducting samples because of dielectric breakdown. Here we report electric-field-induced superconductivity in an insulator by using an electric-double-layer gating in an organic electrolyte. Sheet carrier density was enhanced from zero to 10(14) cm(-2) by applying a gate voltage of up to 3.5 V to a pristine SrTiO(3) single-crystal channel. A two-dimensional superconducting state emerged below a critical temperature of 0.4 K, comparable to the maximum value for chemically doped bulk crystals, indicating this method as promising for searching for unprecedented superconducting states.

  6. Effect of aspect ratio on forward voltage drop in trench insulated gate bipolar transistor

    NASA Astrophysics Data System (ADS)

    Moon, Jin-Woo; Choi, Yearn-Ik; Chung, Sang-Koo

    2005-05-01

    An analytical model for the carrier density at the accumulation layer of TIGBT (Trench Insulated Gate Transistor) is presented in terms of the aspect ratio with the influence of the depth of the trench gate below the P base taken into account. Based on the model, analytic expressions for the potential drop on the drift region are derived using a linear dependence of the carrier density on the aspect ratio. The analytical results for the forward voltage drop show a good agreement with the numerical simulations using MEDICI.

  7. Novel trench gate field stop IGBT with trench shorted anode

    NASA Astrophysics Data System (ADS)

    Xudong, Chen; Jianbing, Cheng; Guobing, Teng; Houdong, Guo

    2016-05-01

    A novel trench field stop (FS) insulated gate bipolar transistor (IGBT) with a trench shorted anode (TSA) is proposed. By introducing a trench shorted anode, the TSA-FS-IGBT can obviously improve the breakdown voltage. As the simulation results show, the breakdown voltage is improved by a factor of 19.5% with a lower leakage current compared with the conventional FS-IGBT. The turn off time of the proposed structure is 50% lower than the conventional one with less than 9% voltage drop increased at a current density of 150 A/cm2. Additionally, there is no snapback observed. As a result, the TSA-FS-IGBT has a better trade-off relationship between the turn off loss and forward drop. Project supported by the National Natural Science Foundation of China (No. 61274080) and the Postdoctoral Science Foundation of China (No. 2013M541585).

  8. Extremely large, gate tunable spin Hall angle in 3D Topological Insulator pn junction

    NASA Astrophysics Data System (ADS)

    Habib, K. M. Masum; Sajjad, Redwan; Ghosh, Avik

    2015-03-01

    The band structure of the surface states of a three dimensional Topological Insulator (3D TI) is similar to that of graphene featuring massless Dirac Fermions. We show that due to this similarity, the chiral tunneling of electron in a graphene pn junction also appears in 3D TI. Electrons with very small incident angle (modes) are allowed to transmit through a TI pn junction (TIPNJ) due to the chiral tunneling. The rest of the electrons are reflected. As a result, the charge current in a TIPNJ is suppressed. Due to the spin momentum locking, all the small angle modes are spin-down states. Therefore, the transmitted end of the TIPNJ becomes highly spin polarized. On the other hand, the spin of the reflected electron is flipped due to spin momentum locking. This enhances the spin current at the injection end. Thus, the interplay between the chiral tunneling and spin momentum locking reduces the charge current but enhances the spin current at the same time, leading to an extremely large (~20) spin Hall angle. Since the chiral tunneling can be controlled by an external electric field, the spin Hall angle is gate tunable. The spin current generated by a TIPNJ can be used for energy-efficient switching of nanoscaled ferromagnets, which is an essential part of spintronic devices. This work is supported by the NRI INDEX center.

  9. Characterization of Chemical Trends in Magnetically Doped, Electrically Gated Topological Insulator Thin Films

    NASA Astrophysics Data System (ADS)

    Richardella, Anthony; Kandala, Abhinav; Lee, Joon Sue; Fraleigh, Robbie; Samarth, Nitin; Liu, Minhao; Ong, Nai Phuan; Tao, Jing

    2014-03-01

    Interfacing topological insulators (TIs) with magnetism breaks time reversal symmetry and opens a gap in the surface states at the Dirac point. This results in novel phenomena, such as the recently reported quantized conductance at zero applied external magnetic field due to the quantum anomalous Hall effect (QAHE) in Cr doped (BixSb1-x)2 Te3 [C-Z. Chang, et al., Science 340, 167 (2013)]. We have studied magnetically doped (BixSb1-x)2 Te3 thin films grown by MBE on SrTiO3(111) (STO) substrates using Cr, Fe and Mn as magnetic dopants and as a function of the Bi and Sb composition. These films are carefully characterized by XRD, AFM, SQUID magnetometry and TEM. The chemical composition is determined using SIMS, RBS and XRF. Low temperature transport shows a large gate-tunable Hall effect in Cr doped samples and systematically varying longitudinal magneto-conductance as the Fermi energy is tuned through the Dirac point. The origin of ferromagnetism and its dependence on the chemical potential, chemical composition and sample thickness is discussed. Funded by DARPA and ARO-MURI.

  10. Electric field-induced superconducting transition of insulating FeSe thin film at 35 K.

    PubMed

    Hanzawa, Kota; Sato, Hikaru; Hiramatsu, Hidenori; Kamiya, Toshio; Hosono, Hideo

    2016-04-12

    It is thought that strong electron correlation in an insulating parent phase would enhance a critical temperature (Tc) of superconductivity in a doped phase via enhancement of the binding energy of a Cooper pair as known in high-Tc cuprates. To induce a superconductor transition in an insulating phase, injection of a high density of carriers is needed (e.g., by impurity doping). An electric double-layer transistor (EDLT) with an ionic liquid gate insulator enables such a field-induced transition to be investigated and is expected to result in a high Tc because it is free from deterioration in structure and carrier transport that are in general caused by conventional carrier doping (e.g., chemical substitution). Here, for insulating epitaxial thin films (∼10 nm thick) of FeSe, we report a high Tc of 35 K, which is 4× higher than that of bulk FeSe, using an EDLT under application of a gate bias of +5.5 V. Hall effect measurements under the gate bias suggest that highly accumulated electron carrier in the channel, whose area density is estimated to be 1.4 × 10(15) cm(-2) (the average volume density of 1.7 × 10(21) cm(-3)), is the origin of the high-Tc superconductivity. This result demonstrates that EDLTs are useful tools to explore the ultimate Tc for insulating parent materials.

  11. Electric field-induced superconducting transition of insulating FeSe thin film at 35 K

    PubMed Central

    Hanzawa, Kota; Sato, Hikaru; Hiramatsu, Hidenori; Kamiya, Toshio; Hosono, Hideo

    2016-01-01

    It is thought that strong electron correlation in an insulating parent phase would enhance a critical temperature (Tc) of superconductivity in a doped phase via enhancement of the binding energy of a Cooper pair as known in high-Tc cuprates. To induce a superconductor transition in an insulating phase, injection of a high density of carriers is needed (e.g., by impurity doping). An electric double-layer transistor (EDLT) with an ionic liquid gate insulator enables such a field-induced transition to be investigated and is expected to result in a high Tc because it is free from deterioration in structure and carrier transport that are in general caused by conventional carrier doping (e.g., chemical substitution). Here, for insulating epitaxial thin films (∼10 nm thick) of FeSe, we report a high Tc of 35 K, which is 4× higher than that of bulk FeSe, using an EDLT under application of a gate bias of +5.5 V. Hall effect measurements under the gate bias suggest that highly accumulated electron carrier in the channel, whose area density is estimated to be 1.4 × 1015 cm–2 (the average volume density of 1.7 × 1021 cm–3), is the origin of the high-Tc superconductivity. This result demonstrates that EDLTs are useful tools to explore the ultimate Tc for insulating parent materials. PMID:27035956

  12. Electric field-induced superconducting transition of insulating FeSe thin film at 35 K

    NASA Astrophysics Data System (ADS)

    Hanzawa, Kota; Sato, Hikaru; Hiramatsu, Hidenori; Kamiya, Toshio; Hosono, Hideo

    2016-04-01

    It is thought that strong electron correlation in an insulating parent phase would enhance a critical temperature (Tc) of superconductivity in a doped phase via enhancement of the binding energy of a Cooper pair as known in high-Tc cuprates. To induce a superconductor transition in an insulating phase, injection of a high density of carriers is needed (e.g., by impurity doping). An electric double-layer transistor (EDLT) with an ionic liquid gate insulator enables such a field-induced transition to be investigated and is expected to result in a high Tc because it is free from deterioration in structure and carrier transport that are in general caused by conventional carrier doping (e.g., chemical substitution). Here, for insulating epitaxial thin films (∼10 nm thick) of FeSe, we report a high Tc of 35 K, which is 4× higher than that of bulk FeSe, using an EDLT under application of a gate bias of +5.5 V. Hall effect measurements under the gate bias suggest that highly accumulated electron carrier in the channel, whose area density is estimated to be 1.4 × 1015 cm-2 (the average volume density of 1.7 × 1021 cm-3), is the origin of the high-Tc superconductivity. This result demonstrates that EDLTs are useful tools to explore the ultimate Tc for insulating parent materials.

  13. Topological insulator in a helicoidal magnetization field

    NASA Astrophysics Data System (ADS)

    Stagraczyński, S.; Chotorlishvili, L.; Dugaev, V. K.; Jia, C.-L.; Ernst, A.; Komnik, A.; Berakdar, J.

    2016-11-01

    A key feature of topological insulators is the robustness of the electron energy spectrum. At a surface of a topological insulator, the Dirac point is protected by the characteristic symmetry of the system. The breaking of the symmetry opens a gap in the energy spectrum. Therefore, topological insulators are very sensitive to magnetic fields, which can open a gap in the electronic spectrum. Concerning "internal" magnetic effects, for example, the situation with doped magnetic impurities, is not trivial. A single magnetic impurity is not enough to open the band gap, while in the case of a ferromagnetic chain of deposited magnetic impurities the Dirac point is lifted. However, a much more interesting case is when localized magnetic impurities form a chiral spin order. Our first principle density functional theory calculations have shown that this is the case for Fe deposited on the surface of a Bi2Se3 topological insulator. But not only magnetic impurities can form a chiral helicoidal spin texture. An alternative way is to use chiral multiferroics (prototype material is LiCu2O2 ) that induce a proximity effect. The theoretical approach we present here is valid for both cases. We observed that opposite to a ferromagnetically ordered case, a chiral spin order does not destroy the Dirac point. We also observed that the energy gap appears at the edges of the new Brillouin zone. Another interesting result concerns the spin dynamics. We derived an equation for the spin density dynamics with a spin current and relaxation terms. We have shown that the motion of the conductance electron generates a magnetic torque and exerts a certain force on the helicoidal texture.

  14. A dual-gate and dielectric-inserted lateral trench insulated gate bipolar transistor on a silicon-on-insulator substrate

    NASA Astrophysics Data System (ADS)

    Fu, Qiang; Zhang, Bo; Luo, Xiao-Rong; Li, Zhao-Ji

    2013-07-01

    In this paper, a novel dual-gate and dielectric-inserted lateral trench insulated gate bipolar transistor (DGDI LTIGBT) structure, which features a double extended trench gate and a dielectric inserted in the drift region, is proposed and discussed. The device can not only decrease the specific on-resistance Ron,sp, but also simultaneously improve the temperature performance. Simulation results show that the proposed LTIGBT achieves an ultra-low on-state voltage drop of 1.31 V at 700 A·cm-2 with a small half-cell pitch of 10.5 μm, a specific on-resistance Ron,sp of 187 mΩ·mm2, and a high breakdown voltage of 250 V. The on-state voltage drop of the DGDI LTIGBT is 18% less than that of the DI LTIGBT and 30.3% less than that of the conventional LTIGBT. The proposed LTIGBT exhibits a good positive temperature coefficient for safety paralleling to handling larger currents and enhances the short-circuit capability while maintaining a low self-heating effect. Furthermore, it also shows a better tradeoff between the specific on-resistance and the turnoff loss, although it has a longer turnoff delay time.

  15. Micromachined mold-type double-gated metal field emitters

    NASA Astrophysics Data System (ADS)

    Lee, Yongjae; Kang, Seokho; Chun, Kukjin

    1997-12-01

    Electron field emitters with double gates were fabricated using micromachining technology and the effect of the electric potential of the focusing gate (or second gate) was experimentally evaluated. The molybdenum field emission tip was made by filling a cusplike mold formed when a conformal film was deposited on the hole-trench that had been patterned on stacked metals and dielectric layers. The hole-trench was patterned by electron beam lithography and reactive ion etching. Each field emitter has a 0960-1317/7/4/009/img1 diameter extraction gate (or first gate) and a 0960-1317/7/4/009/img2 diameter focusing gate (or second gate). To make a path for the emitted electrons, silicon bulk was etched anisotropically in KOH and EDP (ethylene-diamine pyrocatechol) solution successively. The I - V characteristics and anode current change due to the focusing gate potential were measured.

  16. Quantum and Classical Magnetoresistance in Ambipolar Topological Insulator Transistors with Gate-tunable Bulk and Surface Conduction

    PubMed Central

    Tian, Jifa; Chang, Cuizu; Cao, Helin; He, Ke; Ma, Xucun; Xue, Qikun; Chen, Yong P.

    2014-01-01

    Weak antilocalization (WAL) and linear magnetoresistance (LMR) are two most commonly observed magnetoresistance (MR) phenomena in topological insulators (TIs) and often attributed to the Dirac topological surface states (TSS). However, ambiguities exist because these phenomena could also come from bulk states (often carrying significant conduction in many TIs) and are observable even in non-TI materials. Here, we demonstrate back-gated ambipolar TI field-effect transistors in (Bi0.04Sb0.96)2Te3 thin films grown by molecular beam epitaxy on SrTiO3(111), exhibiting a large carrier density tunability (by nearly 2 orders of magnitude) and a metal-insulator transition in the bulk (allowing switching off the bulk conduction). Tuning the Fermi level from bulk band to TSS strongly enhances both the WAL (increasing the number of quantum coherent channels from one to peak around two) and LMR (increasing its slope by up to 10 times). The SS-enhanced LMR is accompanied by a strongly nonlinear Hall effect, suggesting important roles of charge inhomogeneity (and a related classical LMR), although existing models of LMR cannot capture all aspects of our data. Our systematic gate and temperature dependent magnetotransport studies provide deeper insights into the nature of both MR phenomena and reveal differences between bulk and TSS transport in TI related materials. PMID:24810663

  17. Quantum transport of two-species Dirac fermions in dual-gated three-dimensional topological insulators

    NASA Astrophysics Data System (ADS)

    Xu, Yang; Miotkowski, Ireneusz; Chen, Yong P.

    Topological insulators (TI) are a novel class of quantum matter with a gapped insulating bulk yet gapless spin helical Dirac fermion conducting surface states. Here, we report local and non-local electrical and magneto transport measurements in dual-gated BiSbTeSe2 thin film TI devices, with conduction dominated by the spatially separated top and bottom surfaces, each hosting a single species of Dirac fermions with independent gate control over the carrier type and density. We observe many intriguing quantum transport phenomena in such a fully-tunable two-species topological Dirac gas, including a zero-magnetic-field minimum conductivity of 4e2 / h at the double Dirac point, a series of ambipolar two-component ''half-integer'' Dirac quantum Hall states and an electron-hole total filling factor ν=0 state (with a zero-Hall plateau), exhibiting dissipationless (chiral) and dissipative (non-chiral) edge conduction respectively. Such a system paves the way to explore rich physics ranging from topological magnetoelectric effects to exciton condensation. DARPA MESO program.

  18. Study of carbon nanotube field effect transistors performance based on changes in gate parameters.

    PubMed

    Shirazi, Shaahin G; Mirzakuchaki, Sattar

    2011-12-01

    Carbon nanotubes are known as an interesting material to be used in the next generations of electronic technology, especially at nano regime. Nowadays, carbon nanotube field effect transistor or CNTFET is one of the promising devices for future electronic applications. A CNTFET which uses carbon nanotube as channel or source/drain region is the most promising candidate for replacing the current silicon transistor technology. The study of modern manufacturing approach and impact of device parameters on its performance is one of the important research fields in nanoelectronics. In this paper we study some aspects of changes in gate parameters at different channel diameters. This paper shows that for small values of diameter, increasing the dielectric constant of gate insulator doesn't help to improve the performance as value of dielectric constant of gate insulator reaches a certain amount. Also, increasing the oxide thickness of gate insulator doesn't always decrease transistor performance. For high diameter values, increasing the thickness up to a certain value improves the transistor performance.

  19. Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs)

    NASA Astrophysics Data System (ADS)

    Choi, Woo Young; Lee, Hyun Kook

    2016-06-01

    The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

  20. Field calibration of submerged sluice gates in irrigation canals

    USDA-ARS?s Scientific Manuscript database

    Four rectangular sluice gates were calibrated for submerged-flow conditions using nearly 16,000 field-measured data points on Canal B of the B-XII irrigation scheme in Lebrija, Spain. Water depth and gate opening values were measured using acoustic sensors at each of the gate structures, and the dat...

  1. The 6.5 kV clustered insulated gate bipolar transistor in homogeneous base technology

    NASA Astrophysics Data System (ADS)

    Luther-King, N.; Sweet, M.; Spulber, O.; Vershinin, K.; Ngw, C. K.; Bose, S. C.; De Souza, M. M.; Sankara Narayanan, E. M.

    2001-01-01

    The aim of this paper is to evaluate the performance of a new power semiconductor device called the clustered insulated gate bipolar transistor (CIGBT) in the homogeneous base (HB) technology for high power applications. The CIGBT belongs to a new family of MOS controlled power devices with thyristor mode of operation in the on-state and current saturation characteristics even at high gate biases. The saturation characteristics are achieved through a unique 'self-clamping' phenomenon at a predetermined anode voltage. This inherent feature enables a wide FBSOA and low loss during switching. Our detailed analysis of the CIGBT using a 2-D mixed device-circuit simulation tool indicates that 525 μm of lightly doped silicon is adequate to block 6.5 kV in the HB technology. The thin substrate improves the trade-off between conduction and switching losses even further. With an on-state voltage drop as low as 2 V at 30 A cm -2 and 3.1 V at 100 A cm -2 the device is able to turn off under inductive switching conditions at a 3 kV line voltage, with significantly low energy losses in comparison to an optimised homogeneous base insulated gate bipolar transistor (HB-IGBT). Further, the device shows good short circuit withstand capability and its positive temperature coefficient of the forward voltage drop eases parallel integration.

  2. Electrostatic fields in hybrid heterojunctions: Field-effect transistor, topological insulator, & thermoelectronic application

    NASA Astrophysics Data System (ADS)

    Ireland, Robert Matthew

    Organic semiconductors (OSC) are still surging in popularity for sustainable electronic devices, especially since they can perform as well as amorphous and polycrystalline silicon materials. Although OSCs have processing advantages that give rise to novel opportunities compared to inorganic semiconductors (ISCs), devices usually require inorganic materials for highly conductive connections or other functionality. Significantly, OSCs can be used to tune or modify the behavior of inorganic semiconductors (ISCs) by exploiting the junction between two semiconductors (a heterojunction). The possible creation of stable interfaces between ISCs and OSCs provides a practically limitless range of functionalities. Broadly, my goal is to study interfaces between OSCs and ISCs (hybrid heterojunctions) by testing devices of different configurations and altering the internal fields systematically, as well as with the aid of electron- and force-microscopy, and photoelectron spectroscopy. This thesis contains three major sections based around nascent, relevant applications: field-effect transistors, topological insulators, and thermoelectrics. First I study the effects of combining tellurium thin-films with OSC layers in field-effect transistors, where the organic acts both as a substrate modification layer and electrostatic gate. Secondly, I use electron withdrawing OSCs as gating materials for modifying Bi2Se3 in order to realize fundamental topological insulator behavior. Thirdly, I develop polymer-particle composites, including doping of the polymers and stabilization of inorganic particles with an electronic density of states that supports good thermoelectric behavior. We show that OSCs can undeniably be used to significantly modify properties of ISCs, namely tellurium, bismuth selenide, and organometallic compounds. I will first discuss the interfacial fields intrinsic to each heterojunction or device structure. Then I implement an additional electrostatic gate as part of the

  3. Local Ambipolar Graphene Field Effect Transistors via Metal Side Gates

    NASA Astrophysics Data System (ADS)

    Tian, Jifa; Jauregui, Luis; Lopez, Gabriel; Cao, Helin; Chen, Yong

    2010-03-01

    We fabricated local graphene field effect transistors (FET) based on metal side gates. The characteristic ambipolar field effect of graphene device was observed by sweeping only the voltage of a local metal side gate. The local charge neutrality point of the side-gate graphene FET can be tuned in a large voltage range from positive to negative by a second side gate. Furthermore, we observed that the field effect due to the side gate can be appreciably weakened by electrically grounding the back gate compared to floating the back gate. The experimental results can be well explained by electrostatic simulation using COMSOL. Our technique offers a simple method for local tuning of charge density of graphene nanodevices while avoiding coating graphene surface with dielectrics, which may cause contamination and degradation of graphene.

  4. Quantum Dot Channel (QDC) Field Effect Transistors (FETs) and Floating Gate Nonvolatile Memory Cells

    NASA Astrophysics Data System (ADS)

    Kondo, J.; Lingalugari, M.; Chan, P.-Y.; Heller, E.; Jain, F.

    2015-09-01

    This paper presents silicon quantum dot channel (QDC) field effect transistors (FETs) and floating gate nonvolatile memory structures. The QDC-FET operation is explained by carrier transport in narrow mini-energy bands which are manifested in an array of SiO x -cladded silicon quantum dot layers. For nonvolatile memory structures, simulations of electron charge densities in the floating quantum dot layers are presented. Experimental threshold voltage shift in I D- V G characteristics is presented after the `Write' cycle. The QDC-FETs and nonvolatile memory due to improved threshold voltage variations by incorporating the lattice-matched II-VI layer as the gate insulator.

  5. Insulator to metal transition in WO3 induced by electrolyte gating

    DOE PAGES

    Leng, X.; Pereiro, J.; Strle, J.; ...

    2017-07-03

    Tungsten oxide and its associated bronzes (compounds of tungsten oxide and an alkali metal) are well known for their interesting optical and electrical characteristics. We have modified the transport properties of thin WO3 films by electrolyte gating using both ionic liquids and polymer electrolytes. We are able to tune the resistivity of the gated film by more than five orders of magnitude, and a clear insulator-to-metal transition is observed. To clarify the doping mechanism, we have performed a series of incisive operando experiments, ruling out both a purely electronic effect (charge accumulation near the interface) and oxygen-related mechanisms. We proposemore » instead that hydrogen intercalation is responsible for doping WO3 into a highly conductive ground state and provide evidence that it can be described as a dense polaronic gas.« less

  6. Output characteristics of insulated gate bipolar transistor modules and improvement with substrate control

    NASA Astrophysics Data System (ADS)

    Lazarus, M. J.; Smith, I.; Jones, L. L.; Finney, A. D.

    1988-10-01

    Improved (constant current) output characteristics of the insulated gate bipolar transistor are theoretically attainable by reducing the minority carrier diffusion length, but the improvements are only observable in practice with low duty cycle or cold (isothermal) curve tracer characteristics. The self-heating of continuously operated transistors increases the output slope conductance in practical applications, and this is shown quantitatively to be in agreement with temperature-dependent theory. The desirable feature of a high output slope resistance of such a MOS-bipolar power device can be adjusted in a controllable manner by application of substrate (body) feedback to a MOSFET driver. This method, which avoids interference with the input impedance of the control gate, has been tested using discrete components in order to demonstrate the feasibility for an integrated power module.

  7. Versatile sputtering technology for Al2O3 gate insulators on graphene.

    PubMed

    Friedemann, Miriam; Woszczyna, Mirosław; Müller, André; Wundrack, Stefan; Dziomba, Thorsten; Weimann, Thomas; Ahlers, Franz J

    2012-04-01

    We report a novel, sputtering-based fabrication method of Al2O3 gate insulators on graphene. Electrical performance of dual-gated mono- and bilayer exfoliated graphene devices is presented. Sputtered Al2O3 layers possess comparable quality to oxides obtained by atomic layer deposition with respect to a high relative dielectric constant of about 8, as well as low-hysteresis performance and high breakdown voltage. We observe a moderate carrier mobility of about 1000 cm(2) V(-1) s(-1) in monolayer graphene and 350 cm(2) V(-1) s(-1) in bilayer graphene, respectively. The mobility decrease can be attributed to the resonant scattering on atomic-scale defects, likely originating from the Al precursor layer evaporated prior to sputtering.

  8. Retention and switching kinetics of protonated gate field effect transistors

    SciTech Connect

    DEVINE,R.A.B.; HERRERA,GILBERT V.

    2000-05-23

    The switching and memory retention time has been measured in 50 {micro}m gatelength pseudo-non-volatile memory MOSFETS containing, protonated 40 nm gate oxides. Times of the order of 3.3 seconds are observed for fields of 3 MV cm{sup {minus}1}. The retention time with protons placed either at the gate oxide/substrate or gate oxide/gate electrode interfaces is found to better than 96{percent} after 5,000 seconds. Measurement of the time dependence of the source-drain current during switching provides clear evidence for the presence of dispersive proton transport through the gate oxide.

  9. Retention and Switching Kinetics of Protonated Gate Field Effect Transistors

    SciTech Connect

    DEVINE,R.A.B.; HERRERA,GILBERT V.

    2000-06-27

    The switching and memory retention time has been measured in 50 {micro}m gatelength pseudo-non-volatile memory MOSFETs containing, protonated 40 nm gate oxides. Times of the order of 3.3 seconds are observed for fields of 3 MV cm{sup {minus}1}. The retention time with protons placed either at the gate oxide/substrate or gate oxide/gate electrode interfaces is found to better than 96% after 5,000 seconds. Measurement of the time dependence of the source-drain current during switching provides clear evidence for the presence of dispersive proton transport through the gate oxide.

  10. Topological Field Theory of Time-Reversal Invariant Insulators

    SciTech Connect

    Qi, Xiao-Liang; Hughes, Taylor; Zhang, Shou-Cheng; /Stanford U., Phys. Dept.

    2010-03-19

    We show that the fundamental time reversal invariant (TRI) insulator exists in 4 + 1 dimensions, where the effective field theory is described by the 4 + 1 dimensional Chern-Simons theory and the topological properties of the electronic structure is classified by the second Chern number. These topological properties are the natural generalizations of the time reversal breaking (TRB) quantum Hall insulator in 2 + 1 dimensions. The TRI quantum spin Hall insulator in 2 + 1 dimensions and the topological insulator in 3 + 1 dimension can be obtained as descendants from the fundamental TRI insulator in 4 + 1 dimensions through a dimensional reduction procedure. The effective topological field theory, and the Z{sub 2} topological classification for the TRI insulators in 2+1 and 3+1 dimensions are naturally obtained from this procedure. All physically measurable topological response functions of the TRI insulators are completely described by the effective topological field theory. Our effective topological field theory predicts a number of novel and measurable phenomena, the most striking of which is the topological magneto-electric effect, where an electric field generates a magnetic field in the same direction, with an universal constant of proportionality quantized in odd multiples of the fine structure constant {alpha} = e{sup 2}/hc. Finally, we present a general classification of all topological insulators in various dimensions, and describe them in terms of a unified topological Chern-Simons field theory in phase space.

  11. Ultra-High Voltage 4H-SiC Bi-Directional Insulated Gate Bipolar Transistors

    NASA Astrophysics Data System (ADS)

    Chowdhury, Sauvik

    4H- Silicon Carbide (4H-SiC) is an attractive material for power semiconductor devices due to its large bandgap, high critical electric field and high thermal conductivity compared to Silicon (Si). For ultra-high voltage applications (BV > 10 kV), 4H-SiC Insulated Gate Bipolar Transistors (IGBTs) are favored over unipolar transistors due to lower conduction losses. With improvements in SiC materials and processing technology, promising results have been demonstrated in the area of conventional unidirectional 4H-SiC IGBTs, with breakdown voltage ratings up to 27 kV. This research presents the experimental demonstration of the world's first high voltage bi-directional power transistors in 4H-SiC. Traditionally, four (two IGBTs and two diodes) or two (two reverse blocking IGBTs) semiconductor devices are necessary to yield a bidirectional switch. With a monolithically integrated bidirectional switch as presented here, the number of semiconductor devices is reduced to only one, which results in increased reliability and reduced cost of the overall system. Additionally, by using the unique dual gate operation of BD-IGBTs, switching losses can be reduced to a small fraction of that in conventional IGBTs, resulting in increased efficiency. First, the performance limits of SiC IGBTs are calculated by using analytical methods. The performance benefits of SiC IGBTs over SiC unipolar devices and Si IGBTs are quantified. Numerical simulations are used to optimize the unit cell and edge termination structures for a 15 kV SiC BD-IGBT. The effect of different device parameters on BD-IGBT static and switching performance are quantified. Second, the process technology necessary for the fabrication of high voltage SiC BD-IGBTs is optimized. The effect of different process steps on parameters such as breakdown voltage, carrier lifetime, gate oxide reliability, SiO2-SiC interface charge density is quantified. A carrier lifetime enhancement process has been optimized for lightly doped

  12. Modelling and Realization of a Water-Gated Field Effect Transistor (WG-FET) Using 16-nm-Thick Mono-Si Film.

    PubMed

    Sonmez, Bedri Gurkan; Ertop, Ozan; Mutlu, Senol

    2017-09-22

    We introduced a novel water-gated field effect transistor (WG-FET) which uses 16-nm-thick mono-Si film as active layer. WG-FET devices use electrical double layer (EDL) as gate insulator and operate under 1 V without causing any electrochemical reactions. Performance parameters based on voltage distribution on EDL are extracted and current-voltage relations are modelled. Both probe- and planar-gate WG-FETs with insulated and uninsulated source-drain electrodes are simulated, fabricated and tested. Best on/off ratios are measured for probe-gate devices as 23,000 A/A and 85,000 A/A with insulated and uninsulated source-drain electrodes, respectively. Planar-gate devices with source-drain insulation had inferior on/off ratio of 1,100 A/A with 600 μm gate distance and it decreased to 45 A/A when gate distance is increased to 3000 μm. Without source-drain electrode insulation, proper transistor operation is not obtained with planar-gate devices. All measurement results were in agreement with theoretical models. WG-FET is a promising device platform for microfluidic applications where sensors and read-out circuits can be integrated at transistor level.

  13. Switching a normal insulator into a topological insulator via electric field with application to phosphorene.

    PubMed

    Liu, Qihang; Zhang, Xiuwen; Abdalla, L B; Fazzio, Adalberto; Zunger, Alex

    2015-02-11

    The study of topological insulators has generally involved search of materials that have this property as an innate quality, distinct from normal insulators. Here we focus on the possibility of converting a normal insulator into a topological one by application of an external electric field that shifts different bands by different energies and induces a specific band inversion, which leads to a topological state. Phosphorene is a two-dimensional (2D) material that can be isolated through mechanical exfoliation from layered black phosphorus, but unlike graphene and silicene, single-layer phosphorene has a large band gap (1.5-2.2 eV). Thus, it was unsuspected to exhibit band inversion and the ensuing topological insulator behavior. Using first-principles calculations with applied perpendicular electric field F⊥ on few-layer phosphorene we predict a continuous transition from the normal insulator to a topological insulator and eventually to a metal as a function of F⊥. The tuning of topological behavior with electric field would lead to spin-separated, gapless edge states, that is, quantum spin Hall effect. This finding opens the possibility of converting normal insulating materials into topological ones via electric field and making a multifunctional "field effect topological transistor" that could manipulate simultaneously both spin and charge carrier. We use our results to formulate some design principles for looking for other 2D materials that could have such an electrical-induced topological transition.

  14. Electric-field control of spin-orbit torque in a magnetically doped topological insulator

    NASA Astrophysics Data System (ADS)

    Fan, Yabin; Kou, Xufeng; Upadhyaya, Pramey; Shao, Qiming; Pan, Lei; Lang, Murong; Che, Xiaoyu; Tang, Jianshi; Montazeri, Mohammad; Murata, Koichi; Chang, Li-Te; Akyol, Mustafa; Yu, Guoqiang; Nie, Tianxiao; Wong, Kin L.; Liu, Jun; Wang, Yong; Tserkovnyak, Yaroslav; Wang, Kang L.

    2016-04-01

    Electric-field manipulation of magnetic order has proved of both fundamental and technological importance in spintronic devices. So far, electric-field control of ferromagnetism, magnetization and magnetic anisotropy has been explored in various magnetic materials, but the efficient electric-field control of spin-orbit torque (SOT) still remains elusive. Here, we report the effective electric-field control of a giant SOT in a Cr-doped topological insulator (TI) thin film using a top-gate field-effect transistor structure. The SOT strength can be modulated by a factor of four within the accessible gate voltage range, and it shows strong correlation with the spin-polarized surface current in the film. Furthermore, we demonstrate the magnetization switching by scanning gate voltage with constant current and in-plane magnetic field applied in the film. The effective electric-field control of SOT and the giant spin-torque efficiency in Cr-doped TI may lead to the development of energy-efficient gate-controlled spin-torque devices compatible with modern field-effect semiconductor technologies.

  15. Reliability analysis of charge plasma based double material gate oxide (DMGO) SiGe-on-insulator (SGOI) MOSFET

    NASA Astrophysics Data System (ADS)

    Pradhan, K. P.; Sahu, P. K.; Singh, D.; Artola, L.; Mohapatra, S. K.

    2015-09-01

    A novel device named charge plasma based doping less double material gate oxide (DMGO) silicon-germanium on insulator (SGOI) double gate (DG) MOSFET is proposed for the first time. The fundamental objective in this work is to modify the channel potential, electric field and electron velocity for improving leakage current, transconductance (gm) and transconductance generation factor (TGF). Using 2-D simulation, we exhibit that the DMGO-SGOI MOSFET shows higher electron velocity at source side and lower electric field at drain side as compare to ultra-thin body (UTB) DG MOSFET. On the other hand DMGO-SGOI MOSFET demonstrates a significant improvement in gm and TGF in comparison to UTB-DG MOSFET. This work also evaluates the existence of a biasing point i.e. zero temperature coefficient (ZTC) bias point, where the device parameters become independent of temperature. The impact of operating temperature (T) on above said various performance metrics are also subjected to extensive analysis. This further validates the reliability of charge plasma DMGO SGOI MOSFET and its application opportunities involved in designing analog/RF circuits for a wide range of temperature applications.

  16. Characterization of a self-built field-plate gate on InGaP/InGaAs heterojunction doped-channel field-effect transistors

    NASA Astrophysics Data System (ADS)

    Chen, H. R.; Hsu, M. K.; Chiu, S. Y.; Chen, W. T.; Guo, D. F.; Lour, W. S.

    2007-03-01

    Heterojunction doped-channel field-effect transistors (HDCFETs) with a self-built field-plate gate formation were fabricated and proposed in this work. Arrangement of Schottky metal across a step undercut between the Schottky barrier and the insulator-like layer is the key process to produce a self-built field-plate gate. A controllably reduced gate length and a self-built field plate were simultaneously formed. Effects of gate-metal length, field-plate length and insulator thickness on HDCFET performance were also investigated. Simulated results reveal that higher currents, lower electric fields, better device linearity and larger output power are expected by offsetting the Schottky metal towards the drain side. A HDCFET with gate-metal length of 0.4 µm, field-plate length of 0.6 µm and insulator thickness of 120 nm was successfully fabricated for comparison to that with a 1 µm traditional planar gate. Current density (451 mA mm-1), transconductance (225 mS mm-1), breakdown voltages (VBD(DS)/VBD(GD) = 22/-25.5 V), gate-voltage swing (2.24 V), unity current-gain and power-gain frequencies (ft/fmax = 17.2/32 GHz) are improved as compared to those of a 1 µm gate device without field plates. At 1.8 GHz and VDS of 4.0 V, maximum power-added efficiency of 36% with output power of 13.9 dBm and power gain of 8.7 dB was obtained. Saturated output power and linear power gain are 316 mW mm-1 and 13 dB, respectively.

  17. Excavationless Exterior Foundation Insulation Field Study

    SciTech Connect

    Schirber, T.; Mosiman, G.; Ojczyk, C.

    2014-09-01

    Building science research supports installing exterior (soil side) foundation insulation as the optimal method to enhance the hygrothermal performance of new homes. With exterior foundation insulation, water management strategies are maximized while insulating the basement space and ensuring a more even temperature at the foundation wall. However, such an approach can be very costly and disruptive when applied to an existing home, requiring deep excavation around the entire house. The NorthernSTAR Building America Partnership team implemented an innovative, minimally invasive foundation insulation upgrade technique on an existing home. The approach consisted of using hydrovac excavation technology combined with liquid insulating foam. The team was able to excavate a continuous 4 inches wide by 4 feet to 5 feet deep trench around the entire house, 128 linear feet, except for one small part under the stoop that was obstructed with concrete debris. The combination pressure washer and vacuum extraction technology also enabled the elimination of large trenches and soil stockpiles normally produced by backhoe excavation. The resulting trench was filled with liquid insulating foam, which also served as a water-control layer of the assembly. The insulation was brought above grade using a liquid foam/rigid foam hybrid system and terminated at the top of the rim joist. Cost savings over the traditional excavation process ranged from 23% to 50%. The excavationless process could result in even greater savings since replacement of building structures, exterior features, utility meters, and landscaping would be minimal or non-existent in an excavationless process.

  18. Excavationless Exterior Foundation Insulation Field Study

    SciTech Connect

    Schirber, T.; Mosiman, G.; Ojczyk, C.

    2014-10-01

    Building science research supports installing exterior (soil side) foundation insulation as the optimal method to enhance the hygrothermal performance of new homes. With exterior foundation insulation, water management strategies are maximized while insulating the basement space and ensuring a more even temperature at the foundation wall. However, such an approach can be very costly and disruptive when applied to an existing home, requiring deep excavation around the entire house. The NorthernSTAR Building America Partnership team implemented an innovative, minimally invasive foundation insulation upgrade technique on an existing home. The approach consisted of using hydrovac excavation technology combined with a liquid insulating foam. The team was able to excavate a continuous 4" wide by 4' to 5' deep trench around the entire house, 128 linear feet, except for one small part under the stoop that was obstructed with concrete debris. The combination pressure washer and vacuum extraction technology also enabled the elimination of large trenches and soil stockpiles normally produced by backhoe excavation. The resulting trench was filled with liquid insulating foam, which also served as a water-control layer of the assembly. The insulation was brought above grade using a liquid foam/rigid foam hybrid system and terminated at the top of the rim joist. Cost savings over the traditional excavation process ranged from 23% to 50%. The excavationless process could result in even greater savings since replacement of building structures, exterior features, utility meters, and landscaping would be minimal or non-existent in an excavationless process.

  19. Gate bias symmetry dependency of electron mobility and prospect of velocity modulation in double-gate silicon-on-insulator transistors

    NASA Astrophysics Data System (ADS)

    Prunnila, M.; Ahopelto, J.; Henttinen, K.; Gamiz, F.

    2004-11-01

    We report on detailed room-temperature transport properties of a 17nm thick double-gate silicon-on-insulator (DGSOI) transistor. We find that when the electron gas is transferred between the top and the bottom of the silicon-on-insulator (SOI) layer by changing the gate bias symmetry (i.e., applying the gate biases in a push-pull fashion), while keeping the carrier density constant the maximum mobility occurs when the electron gas symmetrically occupies the whole SOI slab. The observed mobility behavior is the fingerprint of volume inversion/accumulation. This gate bias symmetry dependency of the mobility suggests that DGSOI devices intrinsically can be operated in a velocity modulation transistor (VMT) mode. In the experimental gate bias window, the maximum velocity/mobility modulation is ˜40%. The VMT transconductance exceeds conventional single-gate transconductance when electron density is above ˜5.3×1016m-2. Improvements of the observed VMT operation in thin DGSOI devices are discussed.

  20. Colossal magnetoresistance in a Mott insulator via magnetic field-driven insulator-metal transition

    DOE PAGES

    Zhu, M.; Peng, J.; Zou, T.; ...

    2016-05-25

    Here, we present a new type of colossal magnetoresistance (CMR) arising from an anomalous collapse of the Mott insulating state via a modest magnetic field in a bilayer ruthenate, Ti-doped Ca3Ru2O7. Such an insulator-metal transition is accompanied by changes in both lattice and magnetic structures. Our findings have important implications because a magnetic field usually stabilizes the insulating ground state in a Mott-Hubbard system, thus calling for a deeper theoretical study to reexamine the magnetic field tuning of Mott systems with magnetic and electronic instabilities and spin-lattice-charge coupling. This study further provides a model approach to search for CMR systemsmore » other than manganites, such as Mott insulators in the vicinity of the boundary between competing phases.« less

  1. Colossal magnetoresistance in a Mott insulator via magnetic field-driven insulator-metal transition

    SciTech Connect

    Zhu, M.; Peng, J.; Zou, T.; Prokes, K.; Mahanti, S. D.; Hong, Tao; Mao, Z. Q.; Liu, G. Q.; Ke, X.

    2016-05-25

    Here, we present a new type of colossal magnetoresistance (CMR) arising from an anomalous collapse of the Mott insulating state via a modest magnetic field in a bilayer ruthenate, Ti-doped Ca3Ru2O7. Such an insulator-metal transition is accompanied by changes in both lattice and magnetic structures. Our findings have important implications because a magnetic field usually stabilizes the insulating ground state in a Mott-Hubbard system, thus calling for a deeper theoretical study to reexamine the magnetic field tuning of Mott systems with magnetic and electronic instabilities and spin-lattice-charge coupling. This study further provides a model approach to search for CMR systems other than manganites, such as Mott insulators in the vicinity of the boundary between competing phases.

  2. Colossal magnetoresistance in a Mott insulator via magnetic field-driven insulator-metal transition

    SciTech Connect

    Zhu, M.; Peng, J.; Zou, T.; Prokes, K.; Mahanti, S. D.; Hong, Tao; Mao, Z. Q.; Liu, G. Q.; Ke, X.

    2016-05-25

    Here, we present a new type of colossal magnetoresistance (CMR) arising from an anomalous collapse of the Mott insulating state via a modest magnetic field in a bilayer ruthenate, Ti-doped Ca3Ru2O7. Such an insulator-metal transition is accompanied by changes in both lattice and magnetic structures. Our findings have important implications because a magnetic field usually stabilizes the insulating ground state in a Mott-Hubbard system, thus calling for a deeper theoretical study to reexamine the magnetic field tuning of Mott systems with magnetic and electronic instabilities and spin-lattice-charge coupling. This study further provides a model approach to search for CMR systems other than manganites, such as Mott insulators in the vicinity of the boundary between competing phases.

  3. Design and analysis of polarization independent all-optical logic gates in silicon-on-insulator photonic crystal

    NASA Astrophysics Data System (ADS)

    Rani, Preeti; Kalra, Yogita; Sinha, R. K.

    2016-09-01

    In this paper, we have reported design and analysis of polarization independent all optical logic gates in silicon-on-insulator photonic crystal consisting of two dimensional honeycomb lattices with two different air holes exhibiting photonic band gap for both TE and TM mode in the optical communication window. The proposed structures perform as an AND optical logic gate and all the optical logic gates based on the phenomenon of interference. The response period and bit rate for TE and TM polarizations at a wavelength of 1.55 μm show improved results as reported earlier.

  4. Positive charge trapping phenomenon in n-channel thin-film transistors with amorphous alumina gate insulators

    NASA Astrophysics Data System (ADS)

    Daus, Alwin; Vogt, Christian; Münzenrieder, Niko; Petti, Luisa; Knobelspies, Stefan; Cantarella, Giuseppe; Luisier, Mathieu; Salvatore, Giovanni A.; Tröster, Gerhard

    2016-12-01

    In this work, we investigate the charge trapping behavior in InGaZnO4 (IGZO) thin-film transistors with amorphous Al2O3 (alumina) gate insulators. For thicknesses ≤10 nm, we observe a positive charge generation at intrinsic defects inside the Al2O3, which is initiated by quantum-mechanical tunneling of electrons from the semiconductor through the Al2O3 layer. Consequently, the drain current shows a counter-clockwise hysteresis. Furthermore, the de-trapping through resonant tunneling causes a drastic subthreshold swing reduction. We report a minimum value of 19 mV/dec at room temperature, which is far below the fundamental limit of standard field-effect transistors. Additionally, we study the thickness dependence for Al2O3 layers with thicknesses of 5, 10, and 20 nm. The comparison of two different gate metals shows an enhanced tunneling current and an enhanced positive charge generation for Cu compared to Cr.

  5. Microscopic signature of insulator-to-metal transition in highly doped semicrystalline conducting polymers in ionic-liquid-gated transistors

    SciTech Connect

    Tanaka, Hisaaki Nishio, Satoshi; Ito, Hiroshi; Kuroda, Shin-ichi

    2015-12-14

    Electronic state of charge carriers, in particular, in highly doped regions, in thin-film transistors of a semicrystalline conducting polymer poly(2,5-bis(3-alkylthiophene-2-yl)thieno[3,2-b]thiophene), has been studied by using field-induced electron spin resonance (ESR) spectroscopy. By adopting an ionic-liquid gate insulator, a gate-controlled reversible electrochemical hole-doping of the polymer backbone is achieved, as confirmed from the change of the optical absorption spectra. The edge-on molecular orientation in the pristine film is maintained even after the electrochemical doping, which is clarified from the angular dependence of the g value. As the doping level increases, spin 1/2 polarons transform into spinless bipolarons, which is demonstrated from the spin-charge relation showing a spin concentration peak around 1%, contrasting to the monotonic increase in the charge concentration. At high doping levels, a drastic change in the linewidth anisotropy due to the generation of conduction electrons is observed, indicating the onset of metallic state, which is also supported by the temperature dependence of the spin susceptibility and the ESR linewidth. Our results suggest that semicrystalline conducting polymers become metallic with retaining their molecular orientational order, when appropriate doping methods are chosen.

  6. Insulated gate and surface passivation structures for GaN-based power transistors

    NASA Astrophysics Data System (ADS)

    Yatabe, Zenji; Asubar, Joel T.; Hashizume, Tamotsu

    2016-10-01

    Recent years have witnessed GaN-based devices delivering their promise of unprecedented power and frequency levels and demonstrating their capability as an able replacement for Si-based devices. High-electron-mobility transistors (HEMTs), a key representative architecture of GaN-based devices, are well-suited for high-power and high frequency device applications, owing to highly desirable III-nitride physical properties. However, these devices are still hounded by issues not previously encountered in their more established Si- and GaAs-based devices counterparts. Metal-insulator-semiconductor (MIS) structures are usually employed with varying degrees of success in sidestepping the major problematic issues such as excessive leakage current and current instability. While different insulator materials have been applied to GaN-based transistors, the properties of insulator/III-N interfaces are still not fully understood. This is mainly due to the difficulty of characterizing insulator/AlGaN interfaces in a MIS HEMT because of the two resulting interfaces: insulator/AlGaN and AlGaN/GaN, making the potential modulation rather complicated. Although there have been many reports of low interface-trap densities in HEMT MIS capacitors, several papers have incorrectly evaluated their capacitance-voltage (C-V) characteristics. A HEMT MIS structure typically shows a 2-step C-V behavior. However, several groups reported C-V curves without the characteristic step at the forward bias regime, which is likely to the high-density states at the insulator/AlGaN interface impeding the potential control of the AlGaN surface by the gate bias. In this review paper, first we describe critical issues and problems including leakage current, current collapse and threshold voltage instability in AlGaN/GaN HEMTs. Then we present interface properties, focusing on interface states, of GaN MIS systems using oxides, nitrides and high-κ dielectrics. Next, the properties of a variety of AlGaN/GaN MIS

  7. Organic ferroelectric gate field-effect transistor memory using high-mobility rubrene thin film

    NASA Astrophysics Data System (ADS)

    Kanashima, Takeshi; Katsura, Yuu; Okuyama, Masanori

    2014-01-01

    An organic ferroelectric gate field-effect transistor (FET) memory has been fabricated using an organic semiconductor of rubrene thin film with a high mobility and a gate insulating layer of poly(vinylidene fluoride-tetrafluoroethylene) [P(VDF-TeFE)] thin film. A rubrene thin-film sheet was grown by physical vapor transport (PVT), and placed onto a spin-coated P(VDF-TeFE) thin-film layer, and Au source and drain electrodes were formed on this rubrene thin film. A hysteresis loop of the drain current-gate voltage (ID-VG) characteristic has been clearly observed in the ferroelectric gate FET, and is caused by the ferroelectricity. The maximum drain current is 1.5 × 10-6 A, which is about two orders of magnitude larger than that of the P(VDF-TeFE) gate FET using a pentacene thin film. Moreover, the mobility of this organic ferroelectric gate FET using rubrene thin film is 0.71 cm2 V-1 s-1, which is 35 times larger than that of the FET with pentacene thin film.

  8. Analysis of the dynamic avalanche of punch through insulated gate bipolar transistor (PT-IGBT)

    NASA Astrophysics Data System (ADS)

    Lefranc, P.; Planson, D.; Morel, H.; Bergogne, D.

    2009-09-01

    In the paper proposed here, we are studying the dynamic avalanche from experimental results first, dynamic avalanche is identified on a punch through insulated gate bipolar transistor (PT-IGBT) module 1200 V-300 A from Mitsubishi. Secondly, the phenomenon is analysed thanks to simple solid state devices equations. Numerical simulations are used to confirm experimental results. Simulation results allows us locating the active area of the dynamic avalanche during turn-off under over-current conditions. A PT-IGBT cell is described with MEDICI™, a finite element simulator. A mixed-mode simulation is performed thanks to MEDICI™ and SPICE™. The circuit simulated here is a buck topology with an inductive load. Finally, a thermal analysis is performed to estimate temperature increase due to dynamic avalanche.

  9. Quantum perfect crossed Andreev reflection in top-gated quantum anomalous Hall insulator-superconductor junctions

    NASA Astrophysics Data System (ADS)

    Zhang, Ying-Tao; Hou, Zhe; Xie, X. C.; Sun, Qing-Feng

    2017-06-01

    We investigate the quantum tunneling and Andreev reflection in a top-gated quantum anomalous Hall insulator proximity coupled with a superconductor junction. A quantized perfect crossed Andreev reflection with its coefficient being integer 1 is obtained and all other scattering processes (the normal reflection, normal tunneling, and local Andreev reflection) are completely suppressed when the topological superconductor phase with Chern number N =1 is realized. This perfect crossed Andreev reflection originates from the tunneling of the chiral Majorana edge states, and the phase of tunneling amplitude only being 0 and π plays a decisive role. Furthermore, because of the chiral characteristic of the Majorana edge states, the perfect crossed Andreev reflection is robust against the disorder and can work in a wide range of system parameters.

  10. Gate-Variable Mid-Infrared Optical Transitions in a (Bi1-xSbx)2Te3 Topological Insulator.

    PubMed

    Whitney, William S; Brar, Victor W; Ou, Yunbo; Shao, Yinming; Davoyan, Artur R; Basov, D N; He, Ke; Xue, Qi-Kun; Atwater, Harry A

    2017-01-11

    We report mid-infrared spectroscopy measurements of ultrathin, electrostatically gated (Bi1-xSbx)2Te3 topological insulator films in which we observe several percent modulation of transmittance and reflectance as gating shifts the Fermi level. Infrared transmittance measurements of gated films were enabled by use of an epitaxial lift-off method for large-area transfer of topological insulator films from infrared-absorbing SrTiO3 growth substrates to thermal oxidized silicon substrates. We combine these optical experiments with transport measurements and angle-resolved photoemission spectroscopy to identify the observed spectral modulation as a gate-driven transfer of spectral weight between both bulk and 2D topological surface channels and interband and intraband channels. We develop a model for the complex permittivity of gated (Bi1-xSbx)2Te3 and find a good match to our experimental data. These results open the path for layered topological insulator materials as a new candidate for tunable, ultrathin infrared optics and highlight the possibility of switching topological optoelectronic phenomena between bulk and spin-polarized surface regimes.

  11. Metallization of Epitaxial VO2 Films by Ionic Liquid Gating through Initially Insulating TiO2 Layers.

    PubMed

    Passarello, Donata; Altendorf, Simone G; Jeong, Jaewoo; Samant, Mahesh G; Parkin, Stuart S P

    2016-09-14

    Ionic liquid gating has been shown to metallize initially insulating layers formed from several different oxide materials. Of these vanadium dioxide (VO2) is of especial interest because it itself is metallic at temperatures above its metal-insulator transition. Recent studies have shown that the mechanism of ionic liquid gated induced metallization is entirely distinct from that of the thermally driven metal-insulator transition and is derived from oxygen migration through volume channels along the (001) direction of the rutile structure of VO2. Here we show that it is possible to metallize the entire volume of 10 nm thick layers of VO2 buried under layers of rutile titanium dioxide (TiO2) up to 10 nm thick. Key to this process is the alignment of volume channels in the respective oxide layers, which have the same rutile structure with clamped in-plane lattice constants. The metallization of the VO2 layers is accompanied by large structural expansions of up to ∼6.5% in the out-of-plane direction, but the structure of the TiO2 layer is hardly affected by gating. The TiO2 layers become weakly conducting during the gating process, but in contrast to the VO2 layers, the conductivity disappears on exposure to air. Indeed, even after air exposure, X-ray photoelectron spectroscopy studies show that the VO2 films have a reduced oxygen content after metallization. Ionic liquid gating of the VO2 films through initially insulating TiO2 layers is not consistent with conventional models that have assumed the gate induced carriers are of electrostatic origin.

  12. Gate Tunable Infrared Optical Response of (Bi1-xSbx)2 Te3 Topological Insulators

    NASA Astrophysics Data System (ADS)

    Whitney, William; Brar, Victor; Ou, Yunbo; He, Ke; Xue, Qi-Kun; Atwater, Harry

    The electronic properties of topological insulators - narrow band-gap semiconductors that exhibit insulating bulk and semimetallic Dirac surface states - have been the subject of intense study over the past several years. The optical and optoelectronic behavior of these materials, however, remain widely uncharacterized. It has previously been shown that electrostatic gating can be used to tune the Fermi level in the Dirac semimetal graphene, modifying interband transitions and free carrier absorption. We report here experiments that demonstrate electronic control of the optical properties of 5-20 nm thick (Bi1-xSbx)2 Te3 films grown by Van der Waals epitaxy and transferred to silicon dioxide on silicon via an epitaxial lift off process. We find that infrared transmission and reflection from 3 to 10 microns are consistent with modulation of free-carrier absorption and bulk interband transitions in (Bi1-xSbx)2 Te3. We discuss transport results as well as the contributions that bulk and topological surface electronic transitions make to the optical response of these materials.

  13. Ambipolar field effect in the ternary topological insulator (Bi(x)Sb(1-x))2Te3 by composition tuning.

    PubMed

    Kong, Desheng; Chen, Yulin; Cha, Judy J; Zhang, Qianfan; Analytis, James G; Lai, Keji; Liu, Zhongkai; Hong, Seung Sae; Koski, Kristie J; Mo, Sung-Kwan; Hussain, Zahid; Fisher, Ian R; Shen, Zhi-Xun; Cui, Yi

    2011-10-02

    Topological insulators exhibit a bulk energy gap and spin-polarized surface states that lead to unique electronic properties, with potential applications in spintronics and quantum information processing. However, transport measurements have typically been dominated by residual bulk charge carriers originating from crystal defects or environmental doping, and these mask the contribution of surface carriers to charge transport in these materials. Controlling bulk carriers in current topological insulator materials, such as the binary sesquichalcogenides Bi2Te3, Sb2Te3 and Bi2Se3, has been explored extensively by means of material doping and electrical gating, but limited progress has been made to achieve nanostructures with low bulk conductivity for electronic device applications. Here we demonstrate that the ternary sesquichalcogenide (Bi(x)Sb(1-x))2Te3 is a tunable topological insulator system. By tuning the ratio of bismuth to antimony, we are able to reduce the bulk carrier density by over two orders of magnitude, while maintaining the topological insulator properties. As a result, we observe a clear ambipolar gating effect in (Bi(x)Sb(1-x))2Te3 nanoplate field-effect transistor devices, similar to that observed in graphene field-effect transistor devices. The manipulation of carrier type and density in topological insulator nanostructures demonstrated here paves the way for the implementation of topological insulators in nanoelectronics and spintronics.

  14. Electron beam assisted field evaporation of insulating nanowires/tubes

    SciTech Connect

    Blanchard, N. P. Niguès, A.; Choueib, M.; Perisanu, S.; Ayari, A.; Poncharal, P.; Purcell, S. T.; Siria, A.; Vincent, P.

    2015-05-11

    We demonstrate field evaporation of insulating materials, specifically BN nanotubes and undoped Si nanowires, assisted by a convergent electron beam. Electron irradiation leads to positive charging at the nano-object's apex and to an important increase of the local electric field thus inducing field evaporation. Experiments performed both in a transmission electron microscope and in a scanning electron microscope are presented. This technique permits the selective evaporation of individual nanowires in complex materials. Electron assisted field evaporation could be an interesting alternative or complementary to laser induced field desorption used in atom probe tomography of insulating materials.

  15. High temperature study of flexible silicon-on-insulator fin field-effect transistors

    SciTech Connect

    Diab, Amer; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Hussain, Muhammad M.

    2014-09-29

    We report high temperature electrical transport characteristics of a flexible version of the semiconductor industry's most advanced architecture: fin field-effect transistor on silicon-on-insulator with sub-20 nm fins and high-κ/metal gate stacks. Characterization from room to high temperature (150 °C) was completed to determine temperature dependence of drain current (I{sub ds}), gate leakage current (I{sub gs}), transconductance (g{sub m}), and extracted low-field mobility (μ{sub 0}). Mobility degradation with temperature is mainly caused by phonon scattering. The other device characteristics show insignificant difference at high temperature which proves the suitability of inorganic flexible electronics with advanced device architecture.

  16. Remote phonon scattering in field-effect transistors with a high κ insulating layer

    NASA Astrophysics Data System (ADS)

    Laikhtman, B.; Solomon, P. M.

    2008-01-01

    In this paper a remote phonon scattering of channel electrons in a field-effect transistor (FET) with a high dielectric constant (κ) insulator in between the gate and the channel is studied theoretically. The spectrum of phonons confined in the high κ layer and its modification by the gate screening is investigated. Only two phonon modes of five participate in the remote electron-phonon scattering. The gate suppresses one of the modes but increases scattering by the other. Numerical results for the channel mobility limited only by remote phonon scattering were obtained for a Si FET with a HfO2 layer and a SiO2 layer in between the channel and metallic gate. A surprising result is the reduction of the mobility compared to the case when the gate screening is absent. The dependence of the mobility on the widths of HfO2 and interfacial SiO2 layers on channel concentration and temperature was studied. The accuracy of the calculations based on the Boltzmann equation is discussed. Finally, a comparison of our results with available experimental data leads to the conclusion that the remote phonon scattering is not the dominating scattering mechanism.

  17. Protected gates for topological quantum field theories

    NASA Astrophysics Data System (ADS)

    Koenig, Robert

    2015-03-01

    We give restrictions on the locality-preserving unitary automorphisms U, which are protected gates, for topologically ordered systems. For arbitrary anyon models, we show that such unitaries only generate a finite group, and hence do not provide universality. For abelian anyon models, we find that the logical action of U is contained in a proper subgroup of the generalized Clifford group. In the case D(?2), which describes Kitaev's toric code, this represents a tightening of statement previously obtained within the stabilizer framework (PRL 110:170503). For non-abelian models, we find that such automorphisms are very limited: for example, there is no non-trivial gate for Fibonacci anyons. For Ising anyons, protected gates are elements of the Pauli group. These results are derived by relating such automorphisms to symmetries of the underlying anyon model: protected gates realize automorphisms of the Verlinde algebra. We additionally use the compatibility with basis changes to characterize the logical action. This is joint work with M. Beverland, F. Pastawski, J. Preskill and S. Sijher.

  18. Plasmonic response of partially gated field effect transistors

    NASA Astrophysics Data System (ADS)

    Rudin, S.; Rupper, G.; Reed, M. L.; Shur, M.

    2016-09-01

    Electron density oscillations in the transistor channels - plasma waves in the two-dimensional electron gas - determine the high frequency device response. Plasmonic field effect transistors have emerged as very sensitive, tunable, and extremely fast detectors of THz radiation. They have been implemented using silicon (CMOS), AlGaAs/InGaAs HEMTs, and AlGaAs/InGaAs HEMTs, with the HEMTs shown to operate more efficiently at higher THz frequencies. These HEMTs have both gated and ungated sections of the device channel between the source and drain, and the photovoltaic regime of operation requires an asymmetric gate placement in the device channel. The interactions of the plasma waves in the gated and ungated channel regions strongly affect the overall response and have been investigated in numerous publications. This work addresses a new aspect of such interaction - the effect of the relative position of the gated and ungated section. We show this previously unexplored effect plays a dominant role in determining the response. The results of the numerical simulation based on the solution of the complete system of the hydrodynamic equations describing the electron fluid in the device channel show that the inverse response frequency could be approximated by the sum of the gated plasmon transit time in the gated section of the device, the ungated plasmon transit time in the ungated section of the device between the gate and the drain, and the RC gate-to-source constant. Here R and C are the resistance and capacitance of the gate to source section. Hence, the highest speed is achieved when the gate is as close to the source as possible. This suggests a novel plasmonic detector design, where the gate and source electrode overlap, which is shown to have a superior frequency response for the same distance between the source and the drain.

  19. Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor

    NASA Astrophysics Data System (ADS)

    Madan, Jaya; Gupta, R. S.; Chaujar, Rishu

    2015-09-01

    In this work, an analytical drain current model for gate dielectric engineered (hetero dielectric)-dual material gate-gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been developed. Parabolic approximation has been used to solve the two-dimensional (2D) Poisson equation with appropriate boundary conditions and continuity equations to evaluate analytical expressions for surface potential, electric field, tunneling barrier width and drain current. Further, the analog performance of the device is studied for three high-k dielectrics (Si3N4, HfO2, and ZrO2), and it has been investigated that the problem of lower ION, can be overcome by using the hetero-gate architecture. Moreover, the impact of scaling the gate oxide thickness and bias variations has also been studied. The HD-DMG-GAA-TFET shows an enhanced ION of the order of 10-4 A. The effectiveness of the proposed model is validated by comparing it with ATLAS device simulations.

  20. Field test of an alternative longwall gate road design

    SciTech Connect

    Cox, R.M.; Vandergrift, T.L.; McDonnell, J.P.

    1994-01-01

    The US Bureau of Mines (USBM) MULSIM/ML modeling technique has been used to analyze anticipated stress distributions for a proposed alternative longwall gate road design for a western Colorado coal mine. The model analyses indicated that the alternative gate road design would reduce stresses in the headgate entry. To test the validity of the alternative gate road design under actual mining conditions, a test section of the alternative system was incorporated into a subsequent set of gate roads developed at the mine. The alternative gate road test section was instrumented with borehole pressure cells, as part of an ongoing USBM research project to monitor ground pressure changes as longwall mining progressed. During the excavation of the adjacent longwall panels, the behavior of the alternative gate road system was monitored continuously using the USBM computer-assisted Ground Control Management System. During these field tests, the alternative gate road system was first monitored and evaluated as a headgate, and later monitored and evaluated as a tailgate. The results of the field tests confirmed the validity of using the MULSIM/NL modeling technique to evaluate mine designs.

  1. Investigating compositional effects of atomic layer deposition ternary dielectric Ti-Al-O on metal-insulator-semiconductor heterojunction capacitor structure for gate insulation of InAlN/GaN and AlGaN/GaN

    SciTech Connect

    Colon, Albert; Stan, Liliana; Divan, Ralu; Shi, Junxia

    2016-11-01

    Gate insulation/surface passivation in AlGaN/GaN and InAlN/GaN heterojunction field-effect transistors is a major concern for passivation of surface traps and reduction of gate leakage current. However, finding the most appropriate gate dielectric materials is challenging and often involves a compromise of the required properties such as dielectric constant, conduction/valence band-offsets, or thermal stability. Creating a ternary compound such as Ti-Al-O and tailoring its composition may result in a reasonably good gate material in terms of the said properties. To date, there is limited knowledge of the performance of ternary dielectric compounds on AlGaN/GaN and even less on InAlN/GaN. To approach this problem, the authors fabricated metal-insulator-semiconductor heterojunction (MISH) capacitors with ternary dielectrics Ti-Al-O of various compositions, deposited by atomic layer deposition (ALD). The film deposition was achieved by alternating cycles of TiO2 and Al2O3 using different ratios of ALD cycles. TiO2 was also deposited as a reference sample. The electrical characterization of the MISH capacitors shows an overall better performance of ternary compounds compared to the pure TiO2. The gate leakage current density decreases with increasing Al content, being similar to 2-3 orders of magnitude lower for a TiO2:Al2O3 cycle ratio of 2:1. Although the dielectric constant has the highest value of 79 for TiO2 and decreases with increasing the number of Al2O3 cycles, it is maintaining a relatively high value compared to an Al2O3 film. Capacitance voltage sweeps were also measured in order to characterize the interface trap density. A decreasing trend in the interface trap density was found while increasing Al content in the film. In conclusion, our study reveals that the desired high-kappa properties of TiO2 can be adequately maintained while improving other insulator performance factors. The ternary compounds may be an excellent choice as a gate material for both

  2. Back-gated InGaAs-on-insulator lateral N+NN+ MOSFET: Fabrication and typical conduction mechanisms

    NASA Astrophysics Data System (ADS)

    Park, H. J.; Pirro, L.; Czornomaz, L.; Ionica, I.; Bawedin, M.; Djara, V.; Deshpande, V.; Cristoloveanu, S.

    2017-02-01

    Back-gated InGaAs-on-insulator lateral N+NN+ MOSFETs are successfully fabricated by direct wafer bonding and selective epitaxial regrowth. These devices were characterized using a revisited pseudo-MOSFET configuration. Two different transport mechanisms are evidenced: volume conduction in the undepleted region of the film and surface conduction at the interface between InGaAs and buried insulator. We propose extraction techniques for the volume mobility and interface mobility. The impact of film thickness, channel width, and length is evaluated. Additional measurements reveal the variation of the transistor parameters at low temperature and under externally applied uniaxial tensile strain.

  3. Interdigitated Extended Gate Field Effect Transistor Without Reference Electrode

    NASA Astrophysics Data System (ADS)

    Ali, Ghusoon M.

    2017-02-01

    An interdigitated extended gate field effect transistor (IEGFET) has been proposed as a modified pH sensor structure of an extended gate field effect transistor (EGFET). The reference electrode and the extended gate in the conventional device have been replaced by a single interdigitated extended gate. A metal-semiconductor-metal interdigitated extended gate containing two multi-finger Ni electrodes based on zinc oxide (ZnO) thin film as a pH-sensitive membrane. ZnO thin film was grown on a p-type Si (100) substrate by the sol-gel technique. The fabricated extended gate is connected to a commercial metal-oxide-semiconductor field-effect transistor device in CD4007UB. The experimental data show that this structure has real time and linear pH voltage and current sensitivities in a concentration range between pH 4 and 11. The voltage and current sensitivities are found to be about 22.4 mV/pH and 45 μA/pH, respectively. Reference electrode elimination makes the IEGFET device simple to fabricate, easy to carry out the measurements, needing a small volume of solution to test and suitable for disposable biosensor applications. Furthermore, this uncomplicated structure could be extended to fabricate multiple ions microsensors and lab-on-chip devices.

  4. Solvent Effects on the Transient Characteristics of Liquid-Gate Field Effect Transistors with Silicon Substrate

    NASA Astrophysics Data System (ADS)

    Yanase, Takashi; Hasegawa, Tetsuya; Nagahama, Taro; Shimada, Toshihiro

    2012-11-01

    The transient characteristics of electric double layer (EDL) gated field-effect transistors with Si as an active semiconductor were studied using various electrolyte solutions of LiBF4 by applying a step-function voltage to determine the optimum electrolyte for semiconductor circuits using EDLs. The tR, determined by EDL dynamics in the present experiment, was minimum as a function of the kind of solvent used owing to the competing effects of the EDL thickness and viscosity. The responses of the electrolyte solutions with various solvents at the same concentration were classified into three categories on the basis of tR: slow response of a complex-forming solvent, intermediate response of protic solvents, and fast response of nonprotic solvents. The best response time was 55 µs when a 1.0 M acetonitrile solution was used as the liquid-gate insulator.

  5. Structured-gate organic field-effect transistors

    NASA Astrophysics Data System (ADS)

    Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

    2012-06-01

    We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

  6. Gate control of ferromagnetic insulating phase in lightly-doped La0.875Sr0.125MnO3-δ film

    NASA Astrophysics Data System (ADS)

    Kuang, H.; Wang, J.; Hu, F. X.; Zhao, Y. Y.; Liu, Y.; Wu, R. R.; Sun, J. R.; Shen, B. G.

    2016-02-01

    The electric field effect on the lightly doped La0.875Sr0.125MnO3-δ (LSMO) thin film in electric double-layer transistors was investigated by measuring transport properties of the film under various gate voltages. It was found that the positive gate bias leads to an increase of the charge-orbital ordering (COO) transition temperature and a decrease of the Curie temperature TC, indicating the suppression of ferromagnetic metal (FMM) phases and preference of COO/ferromagnetic insulator (FMI) with the hole depletion by gate bias. Such different electric field effects can be ascribed to the weakening of the ferromagnetic interaction and enhancement of Jahn-Teller (JT) distortion caused by the transformation of JT inactive Mn4+-ions to JT active Mn3+-ions. Moreover, a step-like increase in the high temperature region of the ρ-T curve, which is related to the transition of cooperative JT distortion, was found to develop with increasing the positive bias, indicating that the cooperative JT distorted phase is stabilized by the depletion of holes in LSMO film. These results demonstrate that the modulation of holes via electric field strongly affects the balance between energy gains of different interactions and thus produce different effects on the competing FMI, FMM, and cooperative JT distorted phases in LSMO film.

  7. Gallium Arsenide Field Effect Transistors with Semi-Insulated Gates.

    DTIC Science & Technology

    1977-09-01

    Zo \\ ‘ \\ I t LA 4’ N — 0N N N N (‘-1 — — (w9p) pappy -J~MOd 56 - . - LI -V_~~~~~~ - -~~~~~~~~~~~~ - V- —- VV ~~ V~~~~~ -V -~~~~ - - - - - - - V

  8. Electrolyte-gated charge transport in molecularly linked gold nanoparticle films: The transition from a Mott insulator to an exotic metal with strong electron-electron interactions

    NASA Astrophysics Data System (ADS)

    Tie, M.; Dhirani, A.-A.

    2016-09-01

    Strong electron-electron interactions experienced by electrons as they delocalize are widely believed to play a key role in a range of remarkable phenomena such as high Tc superconductivity, colossal magnetoresistance, and others. Strongly correlated electrons are often described by the Hubbard model, which is the simplest description of a correlated system and captures important gross features of phase diagrams of strongly correlated materials. However, open challenges in this field include experimentally mapping correlated electron phenomena beyond those captured by the Hubbard model, and extending the model accordingly. Here we use electrolyte gating to study a metal-insulator transition (MIT) in a new class of strongly correlated material, namely, nanostructured materials, using 1,4-butanedithiol-linked Au nanoparticle films (NPFs) as an example. Electrolyte gating provides a means for tuning the chemical potential of the materials over a wide range, without significantly modifying film morphology. On the insulating side of the transition, we observe Efros-Shklovskii variable range hopping and a soft Coulomb gap, evidencing the importance of Coulomb barriers. On the metallic side of the transition, we observe signatures of strong disorder mediated electron-electron correlations. Gating films near MIT also reveal a zero-bias conductance peak, which we attribute to a resonance at the Fermi level predicted by the Hubbard and Anderson impurity models when electrons delocalize and experience strong Coulomb electron-electron interactions. This study shows that by enabling large changes in carrier density, electrolyte gating of Au NPFs is a powerful means for tuning through the Hubbard MIT in NPFs. By revealing the range of behaviours that strongly correlated electrons can exhibit, this platform can guide the development of an improved understanding of correlated materials.

  9. Compact Modeling of Floating-Base Effect in Injection-Enhanced Insulated-Gate Bipolar Transistor Based on Potential Modification by Accumulated Charge

    NASA Astrophysics Data System (ADS)

    Yamamoto, Takao; Miyake, Masataka; Miura-Mattausch, Mitiko

    2013-04-01

    We have developed a compact model of the injection-enhanced insulated-gate bipolar transistor (IGBT) applicable for circuit optimization. The main development is modeling the hole accumulation in the floating-base region. It is demonstrated that the observed negative gate capacitance is well reproduced with the developed model.

  10. A Field-effect Transistor based on Two-dimensional Topological Insulators

    NASA Astrophysics Data System (ADS)

    Vandenberghe, William; Fischetti, Massimo

    2015-03-01

    Monolayer tin functionalized with iodine (iodostannanane) is a two-dimensional topological insulator and iodostannanane ribbons have a very high mobility when the Fermi level is in the bandgap. For wide ribbons, the mobility and the conductivity decrease by several orders of magnitude when the Fermi level is in the conduction or valence band. We show how this property can be exploited to make a topological-insulator field-effect transistor (TIFET) by gating the iodostannanane. We simulate the TIFETs electrical characteristics invoking a drift-diffusion like approximation and introducing a simplified model for the conductivity of the topological insulator. The TIFET is shown to have input and output characteristics similar to those of conventional field-effect transistors with an on/off ratio exceeding three orders of magnitude. Furthermore, the on-current is very high enabling high-speed operation and the amount charge in the channel is small making TIFETs interesting for low-power applications. We acknowledge the support of Nanoelectronics Research Initiative's (NRI's) Southwest Academy of Nanoelectronics (SWAN).

  11. Improved compact model for double-gate tunnel field-effect transistors by the rigorous consideration of gate fringing field

    NASA Astrophysics Data System (ADS)

    Kim, Sangwan; Choi, Woo Young

    2017-08-01

    In this work, the accuracy of a compact current-voltage (I-V) model for double-gate n-channel tunnel field-effect transistors (TFETs) is improve by considering outer and inner gate fringing field effects. The refined model is benchmarked against technology computer-aided design (TCAD) device simulations and compared against a previously published compact model. The normalized root-mean-square error for current in the linear region of operation (i.e., for 0.05 V drain voltage) is reduced from ˜593 to ˜5%.

  12. Dynamical Axion Field in a Magnetic Topological Insulator Superlattice

    NASA Astrophysics Data System (ADS)

    Wang, Jing; Lian, Biao; Zhang, Shou-Cheng

    We propose that the dynamical axion field can be realized in a magnetic topological insulator superlattice or a topological paramagnetic insulator. The magnetic fluctuations of these systems produce a pseudoscalar field which has an axionic coupling to the electromagnetic field, and thus it gives a condensed-matter realization of the axion electrodynamics. Compared to the previously proposed dynamical axion materials where a long range antiferromagnetic order is required, the systems proposed here have the advantage that only an uniform magnetization or a paramagnetic state is needed for the dynamic axion. We further propose several experiments to detect such a dynamical axion field. This work is supported by the US Department of Energy, Office of Basic Energy Sciences, Division of Materials Sciences and Engineering, under Contract No. DE-AC02-76SF00515.

  13. Solution-derived SiO2 gate insulator formed by CO2 laser annealing for polycrystalline silicon thin-film transistors

    NASA Astrophysics Data System (ADS)

    Hishitani, Daisuke; Horita, Masahiro; Ishikawa, Yasuaki; Ikenoue, Hiroshi; Uraoka, Yukiharu

    2017-05-01

    The formation of perhydropolysilazane (PHPS)-based SiO2 films by CO2 laser annealing is proposed. Irradiation with a CO2 laser with optimum fluence transformed a prebaked PHPS film into a SiO2 film with uniform composition in the thickness direction. Polycrystalline silicon thin-film transistors (poly-Si TFTs) with a SiO2 film as the gate insulator were fabricated. When the SiO2 film was formed by CO2 laser annealing (CO2LA) at the optimum fluence of 20 mJ/cm2, the film had fewer OH groups which was one-twentieth that of the furnace annealed PHPS film and one-hundredth that of the SiO2 film deposited by plasma-enhanced chemical vapor deposition (PECVD) using tetraethyl orthosilicate (TEOS). The resulting TFTs using PHPS showed a clear transistor operation with a field-effect mobility of 37.9 ± 1.2 cm2 V-1 s-1, a threshold voltage of 9.8 ± 0.2 V, and a subthreshold swing of 0.76 ± 0.02 V/decade. The characteristics of such TFTs were as good as those of a poly-Si TFT with a SiO2 gate insulator prepared by PECVD using TEOS.

  14. Golden Gate Park, Chalet Recreation Field, Bounded by John F. ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    Golden Gate Park, Chalet Recreation Field, Bounded by John F. Kennedy Drive to the north and east, former Richmond-Sunset Sewage Treatment Plant to the south, and the Old Railroad Trail to the west, San Francisco, San Francisco County, CA

  15. Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor

    SciTech Connect

    Liu, J. W.; Liao, M. Y.; Imura, M.; Watanabe, E.; Oosato, H.; Koide, Y.

    2014-08-25

    A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO{sub 3} layer and a thin atomic-layer-deposited Al{sub 2}O{sub 3} buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be −40.7 mA·mm{sup −1}, 13.2 ± 0.1 mS·mm{sup −1}, and −3.1 ± 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to −10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages.

  16. High-transconductance graphene solution-gated field effect transistors

    NASA Astrophysics Data System (ADS)

    Hess, L. H.; Hauf, M. V.; Seifert, M.; Speck, F.; Seyller, T.; Stutzmann, M.; Sharp, I. D.; Garrido, J. A.

    2011-07-01

    In this work, we report on the electronic properties of solution-gated field effect transistors (SGFETs) fabricated using large-area graphene. Devices prepared both with epitaxially grown graphene on SiC as well as with chemical vapor deposition grown graphene on Cu exhibit high transconductances, which are a consequence of the high mobility of charge carriers in graphene and the large capacitance at the graphene/water interface. The performance of graphene SGFETs, in terms of gate sensitivity, is compared to other SGFET technologies and found to be clearly superior, confirming the potential of graphene SGFETs for sensing applications in electrolytic environments.

  17. Effects of Sulfide Passivation on the Performance of GaAs MISFETs with Photo-CVD Grown P3N5 Gate Insulators

    NASA Astrophysics Data System (ADS)

    Jeong, Yoon-Ha; Choi, Ki-Hwan; Jo, Seong-Kue; Kang, Bongkoo

    1995-02-01

    Accumulation-mode and depletion-mode GaAs metal-insulator-semiconductor field-effect transistors (MISEETs), with sulfur-treatment and a photochemical vapor-deposited- P3N5 gate insulator, have been successfully fabricated. The devices have good linearity, low hysteresis in current-voltage characteristics, and the instability of the current less than 22 percent for the period of 1.0-1.0×104 s. The effective electron mobility and extrinsic transconductance of the FETs at room temperature are about 1300 cm2/V·s and 1.41 mS/mm for the accumulation-mode, and about 4500 cm2/V·s and 4 mS/mm for the depletion-mode, respectively. Capacitance-voltage (C-V) characteristics and Auger electron spectroscopy (AES) analysis for different sulfur-treatment conditions are discussed. The atomic concentration ratios of sulfur and oxygen to arsenide on GaAs surfaces and GaAs metal-insulator-semiconductor (MIS) interface properties are critically dependent on sulfur pretreatment conditions, and the optimum sulfur-treatment temperature is determined to be about 40° C. The minimum density of interface trap states for an Al/P3N5/GaAs MIS diode with the optimized surface treatment is about 4.3×1010 cm-2 eV-1.

  18. In–Ga–Zn–O thin film transistor with HfO{sub 2} gate insulator prepared using various O{sub 2}/(Ar + O{sub 2}) gas ratios

    SciTech Connect

    Jo, Young Je; Lee, In-Hwan; Kwak, Joon Seop

    2012-10-15

    We have investigated the effect of the deposition of an HfO{sub 2} thin film as a gate insulator with different O{sub 2}/(Ar + O{sub 2}) gas ratios using RF magnetron sputtering. The HfO{sub 2} thin film affected the device performance of amorphous indium–gallium–zinc oxide transistors. The performance of the fabricated transistors improved monotonously with increasing O{sub 2}/(Ar + O{sub 2}) gas ratio: at a ratio of 0.35, the field effect mobility of the amorphous InGaZnO thin film transistors was improved to 7.54 cm{sup 2}/(V s). Compared to those prepared with an O{sub 2}/(Ar + O{sub 2}) gas ratio of 0.05, the field effect mobility of the amorphous InGaZnO thin film transistors was increased to 1.64 cm{sup 2}/(V s) at a ratio of 0.35. This enhancement in the field effect mobility was attributed to the reduction of the root mean square roughness of the gate insulator layer, which might result from the trap states and surface scattering of the gate insulator layer at the lower O{sub 2}/(Ar + O{sub 2}) gas ratio.

  19. AlN/GaN Metal Insulator Semiconductor Field Effect Transistor on Sapphire Substrate

    NASA Astrophysics Data System (ADS)

    Seo, Sanghyun; Ghose, Kaustav; Zhao, Guang Yuan; Pavlidis, Dimitris

    AlN/GaN Metal Insulator Semiconductor Field Effect Transistors (MISFETs) were designed, simulated and fabricated. DC, S-parameter and power measurements were also performed. Drift-diffusion simulations using DESSIS compared AlN/GaN MISFETs and Al32Ga68N/GaN Heterostructure FETs (HFETs) with the same geometries. The simulation results show the advantages of AlN/GaN MISFETs in terms of higher saturation current, lower gate leakage and higher transconductance than AlGaN/GaN HFETs. First results from fabricated AlN/GaN devices with 1μm gate length and 200μm gate width showed a maximum drain current density of ˜380mA/mm and a peak extrinsic transconductance of 85mS/mm. S-parameter measurements showed that currentgain cutoff frequency (fT) and maximum oscillation frequency (fmax) were 5.85GHz and 10.57GHz, respectively. Power characteristics were measured at 2GHz and showed output power density of 850mW/mm with 23.8% PAE at VDS=15V. To the authors knowledge this is the first report of a systematic study of AlN/GaN MISFETs addressing their physical modeling and experimental high-frequency characteristics including the power performance.

  20. Topological BF field theory description of topological insulators

    SciTech Connect

    Cho, Gil Young; Moore, Joel E.

    2011-06-15

    Research Highlights: > We show that a BF theory is the effective theory of 2D and 3D topological insulators. > The non-gauge-invariance of the bulk theory yields surface terms for a bosonized Dirac fermion. > The 'axion' term in electromagnetism is correctly obtained from gapped surfaces. > Generalizations to possible fractional phases are discussed in closing. - Abstract: Topological phases of matter are described universally by topological field theories in the same way that symmetry-breaking phases of matter are described by Landau-Ginzburg field theories. We propose that topological insulators in two and three dimensions are described by a version of abelian BF theory. For the two-dimensional topological insulator or quantum spin Hall state, this description is essentially equivalent to a pair of Chern-Simons theories, consistent with the realization of this phase as paired integer quantum Hall effect states. The BF description can be motivated from the local excitations produced when a {pi} flux is threaded through this state. For the three-dimensional topological insulator, the BF description is less obvious but quite versatile: it contains a gapless surface Dirac fermion when time-reversal-symmetry is preserved and yields 'axion electrodynamics', i.e., an electromagnetic E . B term, when time-reversal symmetry is broken and the surfaces are gapped. Just as changing the coefficients and charges of 2D Chern-Simons theory allows one to obtain fractional quantum Hall states starting from integer states, BF theory could also describe (at a macroscopic level) fractional 3D topological insulators with fractional statistics of point-like and line-like objects.

  1. High-performance GaN metal-insulator-semiconductor ultraviolet photodetectors using gallium oxide as gate layer.

    PubMed

    Lee, Ming-Lun; Mue, T S; Huang, F W; Yang, J H; Sheu, J K

    2011-06-20

    In this study, gallium nitride (GaN)-based metal-insulator-semiconductor (MIS) ultraviolet (UV) photodetectors (PDs) with a gallium oxide (GaO(x)) gate layer formed by alternating current bias-assisted photoelectrochemical oxidation of n-GaN are presented. By introducing the GaO(x) gate layer to the GaN MIS UV PDs, the leakage current is reduced and a much larger UV-to-visible rejection ratio (R(UV/vis)) of spectral responsivity is achieved. In addition, a bias-dependent spectral response results in marked increase of the R(UV/vis) with bias voltage up to ~10(5). The bias-dependent responsivity suggests the possible existence of internal gain in of the GaN MIS PDs.

  2. Metal-oxide assisted surface treatment of polyimide gate insulators for high-performance organic thin-film transistors.

    PubMed

    Kim, Sohee; Ha, Taewook; Yoo, Sungmi; Ka, Jae-Won; Kim, Jinsoo; Won, Jong Chan; Choi, Dong Hoon; Jang, Kwang-Suk; Kim, Yun Ho

    2017-06-14

    We developed a facile method for treating polyimide-based organic gate insulator (OGI) surfaces with self-assembled monolayers (SAMs) by introducing metal-oxide interlayers, called the metal-oxide assisted SAM treatment (MAST). To create sites for surface modification with SAM materials on polyimide-based OGI (KPI) surfaces, the metal-oxide interlayer, here amorphous alumina (α-Al2O3), was deposited on the KPI gate insulator using spin-coating via a rapid sol-gel reaction, providing an excellent template for the formation of a high-quality SAM with phosphonic acid anchor groups. The SAM of octadecylphosphonic acid (ODPA) was successfully treated by spin-coating onto the α-Al2O3-deposited KPI film. After the surface treatment by ODPA/α-Al2O3, the surface energy of the KPI thin film was remarkably decreased and the molecular compatibility of the film with an organic semiconductor (OSC), 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-C10), was increased. Ph-BTBT-C10 molecules were uniformly deposited on the treated gate insulator surface and grown with high crystallinity, as confirmed by atomic force microscopy (AFM) and X-ray diffraction (XRD) analysis. The mobility of Ph-BTBT-C10 thin-film transistors (TFTs) was approximately doubled, from 0.56 ± 0.05 cm(2) V(-1) s(-1) to 1.26 ± 0.06 cm(2) V(-1) s(-1), after the surface treatment. The surface treatment of α-Al2O3 and ODPA significantly decreased the threshold voltage from -21.2 V to -8.3 V by reducing the trap sites in the OGI and improving the interfacial properties with the OSC. We suggest that the MAST method for OGIs can be applied to various OGI materials lacking reactive sites using SAMs. It may provide a new platform for the surface treatment of OGIs, similar to that of conventional SiO2 gate insulators.

  3. Unified analytical threshold voltage model for non-uniformly doped dual metal gate fully depleted silicon-on-insulator MOSFETs

    NASA Astrophysics Data System (ADS)

    Rao, Rathnamala; Katti, Guruprasad; Havaldar, Dnyanesh S.; DasGupta, Nandita; DasGupta, Amitava

    2009-03-01

    The paper describes the unified analytical threshold voltage model for non-uniformly doped, dual metal gate (DMG) fully depleted silicon-on-insulator (FDSOI) MOSFETs based on the solution of 2D Poisson's equation. 2D Poisson's equation is solved analytically for appropriate boundary conditions using separation of variables technique. The solution is then extended to obtain the threshold voltage of the FDSOI MOSFET. The model is able to handle any kind of non-uniform doping, viz. vertical, lateral as well as laterally asymetric channel (LAC) profile in the SOI film in addition to the DMG structure. The analytical results are validated with the numerical simulations using the device simulator MEDICI.

  4. Design and theoretical investigation of a silicon-on-insulator based electro-optical logic gate device

    NASA Astrophysics Data System (ADS)

    Li, Lei; Qi, Zhipeng; Hu, Guohua; Yun, Binfeng; Zhong, Yuan; Cui, Yiping

    2016-10-01

    A compact electro-optical "NOR" logic gate device based on silicon-on-insulator (SOI) platform is proposed and investigated theoretically. By introducing a hook-type waveguide, the signal could be coupled between the bus and hook-type waveguide to form an optical circuit and realize NOR logic gate. We can easily realize the NOR logical function by the voltage applied on the coupling components. The numerical simulation shows that a high coupling efficiency of more than 99% is obtained at the wavelength of 1550 nm, and the footprint of our device is smaller than 90 μm2. In addition, the response time of the proposed NOR logic gate is 3 ns with a switching voltage of 1.8 V. Moreover, it is demonstrated that such NOR logic gate device could obtain an extinction ratio of 21.8 dB. Thus, it has great potential to achieve high speed response, low power consumption, and small footprint, which fulfill the demands of next-generation on-chip computer multiplex processors.

  5. Metrology solutions for high performance germanium multi-gate field-effect transistors using optical scatterometry

    NASA Astrophysics Data System (ADS)

    Chin, Hock-Chun; Ling, Moh-Lung; Liu, Bin; Zhang, Xingui; Li, Jie; Liu, Yongdong; Hu, Jiangtao; Yeo, Yee-Chia

    2013-04-01

    In this work, we report the first demonstration of scatterometry Optical Critical Dimension (OCD) characterization on advanced Ge Multi-Gate Field-Effect Transistor (MuGFET) or FinFET formed on a Germanium-on-Insulator (GeOI) substrate. Two critical process steps in the Ge MuGFET process flow were investigated, i.e. after Ge Fin formation, and after TaN gate stack etching process. All key process variations in the test structures were successfully monitored by the floating or fitting parameters in the OCD models. In addition, excellent static repeatability, with 3σ lower than 0.12 nm, was also achieved. The measurement results from OCD were also compared with both Scanning Electron Microscopy (SEM) and Transmission Electron Microscopy (TEM) measurements. Excellent correlation with both SEM and TEM was achieved by employing OCD characterization, confirming scatterometry OCD as a promising metrology technique for next generation multi-gate transistor with an advanced channel material.

  6. Insulation.

    ERIC Educational Resources Information Center

    Rhea, Dennis

    This instructional unit is one of 10 developed by students on various energy-related areas that deals specifically with insulation. Its objective is for the student to be able to determine insulation needs of new or existing structures, select type to use, use installation techniques, calculate costs, and apply safety factors. Some topics covered…

  7. Insulation.

    ERIC Educational Resources Information Center

    Rhea, Dennis

    This instructional unit is one of 10 developed by students on various energy-related areas that deals specifically with insulation. Its objective is for the student to be able to determine insulation needs of new or existing structures, select type to use, use installation techniques, calculate costs, and apply safety factors. Some topics covered…

  8. Open Heisenberg chain under boundary fields: A magnonic logic gate

    NASA Astrophysics Data System (ADS)

    Landi, Gabriel T.; Karevski, Dragi

    2015-05-01

    We study the spin transport in the quantum Heisenberg spin chain subject to boundary magnetic fields and driven out of equilibrium by Lindblad dissipators. An exact solution is given in terms of matrix product states, which allows us to calculate exactly the spin current for any chain size. It is found that the system undergoes a discontinuous spin-valve-like quantum phase transition from ballistic to subdiffusive spin current, depending on the value of the boundary fields. Thus, the chain behaves as an extremely sensitive magnonic logic gate operating with the boundary fields as the base element.

  9. Field-Programmable Gate Array (FPGA) Emulation for Computer Architecture

    DTIC Science & Technology

    2009-08-01

    architecture model execution FDIV floating-point division FPGA field programmable gate array GB giga-bytes GPU graphics processing unit I/O...less time. For example, SPEC CPU 2006 offers two input sizes per benchmark: test run and reference run. The test run of the full suite took 6... CPU 2000 suite [25]. However, this manual approach is time consuming and it is unclear how representative it is of the original workload. 6

  10. Imperfect two-dimensional topological insulator field-effect transistors

    PubMed Central

    Vandenberghe, William G.; Fischetti, Massimo V.

    2017-01-01

    To overcome the challenge of using two-dimensional materials for nanoelectronic devices, we propose two-dimensional topological insulator field-effect transistors that switch based on the modulation of scattering. We model transistors made of two-dimensional topological insulator ribbons accounting for scattering with phonons and imperfections. In the on-state, the Fermi level lies in the bulk bandgap and the electrons travel ballistically through the topologically protected edge states even in the presence of imperfections. In the off-state the Fermi level moves into the bandgap and electrons suffer from severe back-scattering. An off-current more than two-orders below the on-current is demonstrated and a high on-current is maintained even in the presence of imperfections. At low drain-source bias, the output characteristics are like those of conventional field-effect transistors, at large drain-source bias negative differential resistance is revealed. Complementary n- and p-type devices can be made enabling high-performance and low-power electronic circuits using imperfect two-dimensional topological insulators. PMID:28106059

  11. Imperfect two-dimensional topological insulator field-effect transistors

    NASA Astrophysics Data System (ADS)

    Vandenberghe, William G.; Fischetti, Massimo V.

    2017-01-01

    To overcome the challenge of using two-dimensional materials for nanoelectronic devices, we propose two-dimensional topological insulator field-effect transistors that switch based on the modulation of scattering. We model transistors made of two-dimensional topological insulator ribbons accounting for scattering with phonons and imperfections. In the on-state, the Fermi level lies in the bulk bandgap and the electrons travel ballistically through the topologically protected edge states even in the presence of imperfections. In the off-state the Fermi level moves into the bandgap and electrons suffer from severe back-scattering. An off-current more than two-orders below the on-current is demonstrated and a high on-current is maintained even in the presence of imperfections. At low drain-source bias, the output characteristics are like those of conventional field-effect transistors, at large drain-source bias negative differential resistance is revealed. Complementary n- and p-type devices can be made enabling high-performance and low-power electronic circuits using imperfect two-dimensional topological insulators.

  12. Imperfect two-dimensional topological insulator field-effect transistors.

    PubMed

    Vandenberghe, William G; Fischetti, Massimo V

    2017-01-20

    To overcome the challenge of using two-dimensional materials for nanoelectronic devices, we propose two-dimensional topological insulator field-effect transistors that switch based on the modulation of scattering. We model transistors made of two-dimensional topological insulator ribbons accounting for scattering with phonons and imperfections. In the on-state, the Fermi level lies in the bulk bandgap and the electrons travel ballistically through the topologically protected edge states even in the presence of imperfections. In the off-state the Fermi level moves into the bandgap and electrons suffer from severe back-scattering. An off-current more than two-orders below the on-current is demonstrated and a high on-current is maintained even in the presence of imperfections. At low drain-source bias, the output characteristics are like those of conventional field-effect transistors, at large drain-source bias negative differential resistance is revealed. Complementary n- and p-type devices can be made enabling high-performance and low-power electronic circuits using imperfect two-dimensional topological insulators.

  13. Structural advantages of silicon-on-insulator FETs over FinFETs in steep subthreshold-swing operation in ferroelectric-gate FETs

    NASA Astrophysics Data System (ADS)

    Ota, Hiroyuki; Migita, Shinji; Hattori, Junichi; Fukuda, Koichi; Toriumi, Akira

    2017-04-01

    In this paper, we discuss the subthreshold operation of fully depleted silicon-on-insulator FETs (SOI-FETs) and FinFETs, with embedded ferroelectric negative-capacitance gate insulators, using technology computer-aided design simulations. SOI-FETs with ultrathin buried-oxide layers and appropriate workfunctions for bottom electrodes are found to be more preferable to attain steep subthreshold swings lesser than 60 mV/decade, because SOI-FETs can effectively enable a voltage drop in the ferroelectric layer, even though the degree of matching of the depletion capacitance and the ferroelectric gate insulator capacitance is almost the same in SOI-FETs and FinFETs. These results give a novel insight into how the subthreshold swing can be improved in ferroelectric-gate MOSFETs.

  14. Oxygen Displacement in Cuprates under IonicLiquid Field-Effect Gating

    SciTech Connect

    Dubuis, Guy; Yacoby, Yizhak; Zhou, Hua; He, Xi; Bollinger, Anthony T.; Pavuna, Davor; Pindak, Ron; Bozovic, Ivan

    2016-08-15

    We studied structural changes in a 5 unit cell thick La1.96Sr0.04CuO4 film, epitaxially grown on a LaSrAlO4 substrate with a single unit cell buffer layer, when ultra-high electric fields were induced in the film by applying a gate voltage between the film and an ionic liquid in contact with it. Measuring the diffraction intensity along the substrate-defined Bragg rods and analyzing the results using a phase retrieval method we obtained the three-dimensional electron density in the film, buffer layer, and topmost atomic layers of the substrate under different applied gate voltages. The main structural observations were: (i) there were no structural changes when the voltage was negative, holes were injected into the film making it more metallic and screening the electric field; (ii) when the voltage was positive, the film was depleted of holes becoming more insulating, the electric field extended throughout the film, the partial surface monolayer became disordered, and planar oxygen atoms were displaced towards the sample surface; (iii) the changes in surface disorder and the oxygen displacements were both reversed when a negative voltage was applied; and (iv) the c-axis lattice constant of the film did not change in spite of the displacement of planar oxygen atoms.

  15. Oxygen Displacement in Cuprates under IonicLiquid Field-Effect Gating

    DOE PAGES

    Dubuis, Guy; Yacoby, Yizhak; Zhou, Hua; ...

    2016-08-15

    We studied structural changes in a 5 unit cell thick La1.96Sr0.04CuO4 film, epitaxially grown on a LaSrAlO4 substrate with a single unit cell buffer layer, when ultra-high electric fields were induced in the film by applying a gate voltage between the film and an ionic liquid in contact with it. Measuring the diffraction intensity along the substrate-defined Bragg rods and analyzing the results using a phase retrieval method we obtained the three-dimensional electron density in the film, buffer layer, and topmost atomic layers of the substrate under different applied gate voltages. The main structural observations were: (i) there were nomore » structural changes when the voltage was negative, holes were injected into the film making it more metallic and screening the electric field; (ii) when the voltage was positive, the film was depleted of holes becoming more insulating, the electric field extended throughout the film, the partial surface monolayer became disordered, and planar oxygen atoms were displaced towards the sample surface; (iii) the changes in surface disorder and the oxygen displacements were both reversed when a negative voltage was applied; and (iv) the c-axis lattice constant of the film did not change in spite of the displacement of planar oxygen atoms.« less

  16. Oxygen Displacement in Cuprates under Ionic Liquid Field-Effect Gating.

    PubMed

    Dubuis, Guy; Yacoby, Yizhak; Zhou, Hua; He, Xi; Bollinger, Anthony T; Pavuna, Davor; Pindak, Ron; Božović, Ivan

    2016-08-31

    We studied structural changes in a 5 unit cell thick La1.96Sr0.04CuO4 film, epitaxially grown on a LaSrAlO4 substrate with a single unit cell buffer layer, when ultra-high electric fields were induced in the film by applying a gate voltage between the film (ground) and an ionic liquid in contact with it. Measuring the diffraction intensity along the substrate-defined Bragg rods and analyzing the results using a phase retrieval method we obtained the three-dimensional electron density in the film, buffer layer, and topmost atomic layers of the substrate under different applied gate voltages. The main structural observations were: (i) there were no structural changes when the voltage was negative, holes were injected into the film making it more metallic and screening the electric field; (ii) when the voltage was positive, the film was depleted of holes becoming more insulating, the electric field extended throughout the film, the partial surface monolayer became disordered, and equatorial oxygen atoms were displaced towards the surface; (iii) the changes in surface disorder and the oxygen displacements were both reversed when a negative voltage was applied; and (iv) the c-axis lattice constant of the film did not change in spite of the displacement of equatorial oxygen atoms.

  17. Facile fabrication of electrolyte-gated single-crystalline cuprous oxide nanowire field-effect transistors

    NASA Astrophysics Data System (ADS)

    Stoesser, Anna; von Seggern, Falk; Purohit, Suneeti; Nasr, Babak; Kruk, Robert; Dehm, Simone; Wang, Di; Hahn, Horst; Dasgupta, Subho

    2016-10-01

    Oxide semiconductors are considered to be one of the forefront candidates for the new generation, high-performance electronics. However, one of the major limitations for oxide electronics is the scarcity of an equally good hole-conducting semiconductor, which can provide identical performance for the p-type metal oxide semiconductor field-effect transistors as compared to their electron conducting counterparts. In this quest, here we present a bulk synthesis method for single crystalline cuprous oxide (Cu2O) nanowires, their chemical and morphological characterization and suitability as active channel material in electrolyte-gated, low-power, field-effect transistors (FETs) for portable and flexible logic circuits. The bulk synthesis method used in the present study includes two steps: namely hydrothermal synthesis of the nanowires and the removal of the surface organic contaminants. The surface treated nanowires are then dispersed on a receiver substrate where the passive electrodes are structured, followed by printing of a composite solid polymer electrolyte (CSPE), chosen as the gate insulator. The characteristic electrical properties of individual nanowire FETs are found to be quite interesting including accumulation-mode operation and field-effect mobility of 0.15 cm2 V-1 s-1.

  18. Oxygen Displacement in Cuprates under Ionic Liquid Field-Effect Gating

    NASA Astrophysics Data System (ADS)

    Dubuis, Guy; Yacoby, Yizhak; Zhou, Hua; He, Xi; Bollinger, Anthony T.; Pavuna, Davor; Pindak, Ron; Božović, Ivan

    2016-08-01

    We studied structural changes in a 5 unit cell thick La1.96Sr0.04CuO4 film, epitaxially grown on a LaSrAlO4 substrate with a single unit cell buffer layer, when ultra-high electric fields were induced in the film by applying a gate voltage between the film (ground) and an ionic liquid in contact with it. Measuring the diffraction intensity along the substrate-defined Bragg rods and analyzing the results using a phase retrieval method we obtained the three-dimensional electron density in the film, buffer layer, and topmost atomic layers of the substrate under different applied gate voltages. The main structural observations were: (i) there were no structural changes when the voltage was negative, holes were injected into the film making it more metallic and screening the electric field; (ii) when the voltage was positive, the film was depleted of holes becoming more insulating, the electric field extended throughout the film, the partial surface monolayer became disordered, and equatorial oxygen atoms were displaced towards the surface; (iii) the changes in surface disorder and the oxygen displacements were both reversed when a negative voltage was applied; and (iv) the c-axis lattice constant of the film did not change in spite of the displacement of equatorial oxygen atoms.

  19. Oxygen Displacement in Cuprates under Ionic Liquid Field-Effect Gating

    PubMed Central

    Dubuis, Guy; Yacoby, Yizhak; Zhou, Hua; He, Xi; Bollinger, Anthony T.; Pavuna, Davor; Pindak, Ron; Božović, Ivan

    2016-01-01

    We studied structural changes in a 5 unit cell thick La1.96Sr0.04CuO4 film, epitaxially grown on a LaSrAlO4 substrate with a single unit cell buffer layer, when ultra-high electric fields were induced in the film by applying a gate voltage between the film (ground) and an ionic liquid in contact with it. Measuring the diffraction intensity along the substrate-defined Bragg rods and analyzing the results using a phase retrieval method we obtained the three-dimensional electron density in the film, buffer layer, and topmost atomic layers of the substrate under different applied gate voltages. The main structural observations were: (i) there were no structural changes when the voltage was negative, holes were injected into the film making it more metallic and screening the electric field; (ii) when the voltage was positive, the film was depleted of holes becoming more insulating, the electric field extended throughout the film, the partial surface monolayer became disordered, and equatorial oxygen atoms were displaced towards the surface; (iii) the changes in surface disorder and the oxygen displacements were both reversed when a negative voltage was applied; and (iv) the c-axis lattice constant of the film did not change in spite of the displacement of equatorial oxygen atoms. PMID:27578237

  20. Investigation of negative bias temperature instability dependence on fin width of silicon-on-insulator-fin-based field effect transistors

    SciTech Connect

    Young, Chadwin D. Wang, Zhe; Neugroschel, Arnost; Majumdar, Kausik; Matthews, Ken; Hobbs, Chris

    2015-01-21

    The fin width dependence of negative bias temperature instability (NBTI) of double-gate, fin-based p-type Field Effect Transistors (FinFETs) fabricated on silicon-on-insulator (SOI) wafers was investigated. The NBTI degradation increased as the fin width narrowed. To investigate this phenomenon, simulations of pre-stress conditions were employed to determine any differences in gate oxide field, fin band bending, and electric field profile as a function of the fin width. The simulation results were similar at a given gate stress bias, regardless of the fin width, although the threshold voltage was found to increase with decreasing fin width. Thus, the NBTI fin width dependence could not be explained from the pre-stress conditions. Different physics-based degradation models were evaluated using specific fin-based device structures with different biasing schemes to ascertain an appropriate model that best explains the measured NBTI dependence. A plausible cause is an accumulation of electrons that tunnel from the gate during stress into the floating SOI fin body. As the fin narrows, the sidewall device channel moves in closer proximity to the stored electrons, thereby inducing more band bending at the fin/dielectric interface, resulting in a higher electric field and hole concentration in this region during stress, which leads to more degradation. The data obtained in this work provide direct experimental proof of the effect of electron accumulation on the threshold voltage stability in FinFETs.

  1. Investigation of negative bias temperature instability dependence on fin width of silicon-on-insulator-fin-based field effect transistors

    NASA Astrophysics Data System (ADS)

    Young, Chadwin D.; Neugroschel, Arnost; Majumdar, Kausik; Matthews, Ken; Wang, Zhe; Hobbs, Chris

    2015-01-01

    The fin width dependence of negative bias temperature instability (NBTI) of double-gate, fin-based p-type Field Effect Transistors (FinFETs) fabricated on silicon-on-insulator (SOI) wafers was investigated. The NBTI degradation increased as the fin width narrowed. To investigate this phenomenon, simulations of pre-stress conditions were employed to determine any differences in gate oxide field, fin band bending, and electric field profile as a function of the fin width. The simulation results were similar at a given gate stress bias, regardless of the fin width, although the threshold voltage was found to increase with decreasing fin width. Thus, the NBTI fin width dependence could not be explained from the pre-stress conditions. Different physics-based degradation models were evaluated using specific fin-based device structures with different biasing schemes to ascertain an appropriate model that best explains the measured NBTI dependence. A plausible cause is an accumulation of electrons that tunnel from the gate during stress into the floating SOI fin body. As the fin narrows, the sidewall device channel moves in closer proximity to the stored electrons, thereby inducing more band bending at the fin/dielectric interface, resulting in a higher electric field and hole concentration in this region during stress, which leads to more degradation. The data obtained in this work provide direct experimental proof of the effect of electron accumulation on the threshold voltage stability in FinFETs.

  2. An Analytical Model for Silicon-on-Insulator Reduced Surface Field Devices with Semi-Insulating Polycrystalline Silicon Shielding Layer

    NASA Astrophysics Data System (ADS)

    Ho, Chi-Hon; Liao, Chien-Nan; Chien, Feng-Tso; Tsai, Yao-Tsung

    2008-07-01

    An analytical model is presented to determine the potential and electric field distribution along the semiconductor surface of new silicon-on-insulator (SOI) reduced surface field (RESURF) device. The SOI structure is characterized by a semi-insulating polycrystalline silicon (SIPOS) layer inserted between a silicon layer and a buried oxide. An improvement in the breakdown voltage due to the presence of the SIPOS shielding layer is demonstrated. Numerical simulations using medici are shown to support the analytical model.

  3. Poly(4-vinylphenol) gate insulator with cross-linking using a rapid low-power microwave induction heating scheme for organic thin-film-transistors

    NASA Astrophysics Data System (ADS)

    Fan, Ching-Lin; Shang, Ming-Chi; Hsia, Mao-Yuan; Wang, Shea-Jue; Huang, Bohr-Ran; Lee, Win-Der

    2016-03-01

    A Microwave-Induction Heating (MIH) scheme is proposed for the poly(4-vinylphenol) (PVP) gate insulator cross-linking process to replace the traditional oven heating cross-linking process. The cross-linking time is significantly decreased from 1 h to 5 min by heating the metal below the PVP layer using microwave irradiation. The necessary microwave power was substantially reduced to about 50 W by decreasing the chamber pressure. The MIH scheme is a good candidate to replace traditional thermal heating for cross-linking of PVP as the gate insulator for organic thin-film-transistors.

  4. Low-frequency noise in AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors

    SciTech Connect

    Le, Son Phuong; Ui, Toshimasa; Nguyen, Tuan Quy; Shih, Hong-An; Suzuki, Toshi-kazu

    2016-05-28

    Using aluminum titanium oxide (AlTiO, an alloy of Al{sub 2}O{sub 3} and TiO{sub 2}) as a high-k gate insulator, we fabricated and investigated AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. From current low-frequency noise (LFN) characterization, we find Lorentzian spectra near the threshold voltage, in addition to 1/f spectra for the well-above-threshold regime. The Lorentzian spectra are attributed to electron trapping/detrapping with two specific time constants, ∼25 ms and ∼3 ms, which are independent of the gate length and the gate voltage, corresponding to two trap level depths of 0.5–0.7 eV with a 0.06 eV difference in the AlTiO insulator. In addition, gate leakage currents are analyzed and attributed to the Poole-Frenkel mechanism due to traps in the AlTiO insulator, where the extracted trap level depth is consistent with the Lorentzian LFN.

  5. Total Ionizing Dose Response of Multiple-Gate Nanowire Field Effect Transistors

    NASA Astrophysics Data System (ADS)

    Gaillardin, M.; Marcandella, C.; Martinez, M.; Duhamel, O.; Lagutere, T.; Paillet, P.; Raine, M.; Richard, N.; Andrieu, F.; Barraud, S.; Vinet, M.

    2017-08-01

    This paper investigates the total ionizing dose (TID) response of nanoscaled field-effect transistors (FET) made of silicon multiple-gate nanowire (NW). The NWFET architecture relies on its remarkable electrostatic properties to push “silicon”-based technologies much deeper into device scaling than present FinFETs. However, as commonly observed when a new device or technology concept is proposed, such as shallow trench isolation and silicon-on-insulator or FinFET, TID effects reveal unexpected behaviors that can permanently modify pristine device electrical characteristics. This is why this paper discusses the impact of several parameters including the NWFET design and the transistor's type to get thorough insights into the NWFET TID behavior.

  6. A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive

    SciTech Connect

    Wang, Zhiqiang; Shi, Xiaojie; Tolbert, Leon M.; Wang, Fei Fred; Liang, Zhenxian; Costinett, Daniel; Blalock, Benjamin J.

    2014-04-30

    Here we present a board-level integrated silicon carbide (SiC) MOSFET power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200°C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225°C.

  7. A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive

    DOE PAGES

    Wang, Zhiqiang; Shi, Xiaojie; Tolbert, Leon M.; ...

    2014-04-30

    Here we present a board-level integrated silicon carbide (SiC) MOSFET power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200°C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate drivermore » and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225°C.« less

  8. Surface modification of polyimide gate insulators for solution-processed 2,7-didecyl[1]benzothieno[3,2-b][1]benzothiophene (C10-BTBT) thin-film transistors.

    PubMed

    Jang, Kwang-Suk; Kim, Won Soo; Won, Jong-Myung; Kim, Yun-Ho; Myung, Sung; Ka, Jae-Won; Kim, Jinsoo; Ahn, Taek; Yi, Mi Hye

    2013-01-21

    The surface property of a polyimide gate insulator was successfully modified with an n-octadecyl side-chain. Alkyl chain-grafted poly(amic acid), the polyimide precursor, was synthesized using the diamine comonomer with an alkyl side-chain. By adding a base catalyst to the poly(amic acid) coating solution, the imidization temperature of the spin-coated film could be reduced to 200 °C. The 350 nm-thick polyimide film had a dielectric constant of 3.3 at 10 kHz and a leakage current density of less than 8.7 × 10(-10) A cm(-2), while biased from 0 to 100 V. To investigate the potential of the alkyl chain-grafted polyimide film as a gate insulator for solution-processed organic thin-film transistors (TFTs), we fabricated C(10)-BTBT TFTs. C(10)-BTBT was deposited on the alkyl chain-grafted polyimide gate insulator by spin-coating, forming a well-ordered crystal structure. The field-effect mobility and the on/off current ratio of the TFT device were measured to be 0.20-0.56 cm(2) V(-1) s(-1) and >10(5), respectively.

  9. A novel quantum field approach to photoexcited insulators

    NASA Astrophysics Data System (ADS)

    Klotins, E.

    2016-07-01

    In order to predict optical properties of insulating materials under intensive laser excitation, we generalized methods of quantum electrodynamics, allowing us to simulate excitation of electrons and holes, interacting with each other and acoustic phonons. The prototypical model considers a two-band dielectric material characterized by the dispersion relations for electron and hole states. We developed a universal description of excited electrons, holes and acoustic phonons within joint quantum kinetics formalism. Illustrative solutions for the quasiparticle birth-annihilation operators, applicable at short laser pulses at 0 K, are obtained by the transition from the macroscopic description to the quantum field formalism.

  10. Low-voltage operation of Si-based ferroelectric field effect transistors using organic ferroelectrics, poly(vinylidene fluoride-trifluoroethylene), as a gate dielectric

    NASA Astrophysics Data System (ADS)

    Miyata, Yusuke; Yoshimura, Takeshi; Ashida, Atsushi; Fujimura, Norifumi

    2016-04-01

    Si-based metal-ferroelectric-semiconductor (MFS) capacitors have been fabricated using poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as a ferroelectric gate. The pinhole-free P(VDF-TrFE) thin films with high resistivity were able to be prepared by spin-coating directly onto hydrogen-terminated Si. The capacitance-voltage (C-V) characteristics of the ferroelectric gate field effect transistor (FeFET) using this MFS structure clearly show butterfly-shaped hysteresis originating from the ferroelectricity, indicating carrier modulation on the Si surface at gate voltages below 2 V. The drain current-gate voltage (I D-V G) characteristics also show counterclockwise hysteresis at gate voltages below 5 V. This is the first report on the low-voltage operation of a Si-based FeFET using P(VDF-TrFE) as a gate dielectric. This organic gate FeFET without any insulator layer at the ferroelectric/Si interface should be one of the promising devices for overcoming the critical issues of the FeFET, such as depolarization field and a decrease in the gate voltage.

  11. Inversion gate capacitance of undoped single-gate and double-gate field-effect transistor geometries in the extreme quantum limit

    SciTech Connect

    Majumdar, Amlan

    2015-05-28

    We present first-principle analytical derivations and numerically modeled data to show that the gate capacitance per unit gate area C{sub G} of extremely thin undoped-channel single-gate and double-gate field-effect transistor geometries in the extreme quantum limit with single-subband occupancy can be written as 1/C{sub G} = 1/C{sub OX} + N{sub G}/C{sub DOS} + N{sub G}/ηC{sub WF}, where N{sub G} is the number of gates, C{sub OX} is the oxide capacitance per unit area, C{sub DOS} is the density-of-states capacitance per unit area, C{sub WF} is the wave function spreading capacitance per unit area, and η is a constant on the order of 1.

  12. Driving a Superconductor to Insulator Transition with Random Gauge Fields

    PubMed Central

    Nguyen, H. Q.; Hollen, S. M.; Shainline, J.; Xu, J. M.; Valles, J. M.

    2016-01-01

    Typically the disorder that alters the interference of particle waves to produce Anderson localization is potential scattering from randomly placed impurities. Here we show that disorder in the form of random gauge fields that act directly on particle phases can also drive localization. We present evidence of a superfluid bose glass to insulator transition at a critical level of this gauge field disorder in a nano-patterned array of amorphous Bi islands. This transition shows signs of metallic transport near the critical point characterized by a resistance , indicative of a quantum phase transition. The critical disorder depends on interisland coupling in agreement with recent Quantum Monte Carlo simulations. We discuss how this disorder tuned SIT differs from the common frustration tuned SIT that also occurs in magnetic fields. Its discovery enables new high fidelity comparisons between theoretical and experimental studies of disorder effects on quantum critical systems. PMID:27901081

  13. Driving a Superconductor to Insulator Transition with Random Gauge Fields

    NASA Astrophysics Data System (ADS)

    Nguyen, H. Q.; Hollen, S. M.; Shainline, J.; Xu, J. M.; Valles, J. M.

    2016-11-01

    Typically the disorder that alters the interference of particle waves to produce Anderson localization is potential scattering from randomly placed impurities. Here we show that disorder in the form of random gauge fields that act directly on particle phases can also drive localization. We present evidence of a superfluid bose glass to insulator transition at a critical level of this gauge field disorder in a nano-patterned array of amorphous Bi islands. This transition shows signs of metallic transport near the critical point characterized by a resistance , indicative of a quantum phase transition. The critical disorder depends on interisland coupling in agreement with recent Quantum Monte Carlo simulations. We discuss how this disorder tuned SIT differs from the common frustration tuned SIT that also occurs in magnetic fields. Its discovery enables new high fidelity comparisons between theoretical and experimental studies of disorder effects on quantum critical systems.

  14. Driving a Superconductor to Insulator Transition with Random Gauge Fields.

    PubMed

    Nguyen, H Q; Hollen, S M; Shainline, J; Xu, J M; Valles, J M

    2016-11-30

    Typically the disorder that alters the interference of particle waves to produce Anderson localization is potential scattering from randomly placed impurities. Here we show that disorder in the form of random gauge fields that act directly on particle phases can also drive localization. We present evidence of a superfluid bose glass to insulator transition at a critical level of this gauge field disorder in a nano-patterned array of amorphous Bi islands. This transition shows signs of metallic transport near the critical point characterized by a resistance , indicative of a quantum phase transition. The critical disorder depends on interisland coupling in agreement with recent Quantum Monte Carlo simulations. We discuss how this disorder tuned SIT differs from the common frustration tuned SIT that also occurs in magnetic fields. Its discovery enables new high fidelity comparisons between theoretical and experimental studies of disorder effects on quantum critical systems.

  15. Amorphous Indium Gallium Zinc Oxide Semiconductor Thin Film Transistors Using O2 Plasma Treatment on the SiNx Gate Insulator

    NASA Astrophysics Data System (ADS)

    Kim, Woong-Sun; Moon, Yeon-Keon; Lee, Sih; Kang, Byung-Woo; Kim, Kyung-Taek; Lee, Je-Hun; Kim, Joo-Han; Ahn, Byung-Du; Park, Jong-Wan

    2010-08-01

    In this study, we investigated the role of processing parameters on the electrical characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) fabricated using DC magnetron sputtering at room temperature. Processing parameters including the oxygen partial pressure, annealing temperature, and channel thickness have a great influence on TFT performance and better devices are obtained at a low oxygen partial pressure, annealing at 200 °C, and a low channel thickness. We attempted to improve the a-IGZO TFT performance and stability under a gate bias stress using O2 plasma treatment. With an O2 plasma treated gate insulator, remarkable properties including excellent bias stability as well as a field effect mobility (µFE) of 11.5 cm2 V-1 s-1, a subthreshold swing (S) of 0.59 V/decade, a turn-on voltage (VON) of -1.3 V, and an on/off current ratio (ION/IOFF) of 105 were achieved.

  16. Electrophoretic-like gating used to control metal-insulator transitions in electronically phase separated manganite wires.

    PubMed

    Guo, Hangwen; Noh, Joo H; Dong, Shuai; Rack, Philip D; Gai, Zheng; Xu, Xiaoshan; Dagotto, Elbio; Shen, Jian; Ward, T Zac

    2013-08-14

    Electronically phase separated manganite wires are found to exhibit controllable metal-insulator transitions under local electric fields. The switching characteristics are shown to be fully reversible, polarity independent, and highly resistant to thermal breakdown caused by repeated cycling. It is further demonstrated that multiple discrete resistive states can be accessed in a single wire. The results conform to a phenomenological model in which the inherent nanoscale insulating and metallic domains are rearranged through electrophoretic-like processes to open and close percolation channels.

  17. Controlling the metal insulator transition using the ferroelectric field effect in rare earth nickelates

    NASA Astrophysics Data System (ADS)

    Marshall, Matthew; Disa, Ankit; Kumah, Divine; Chen, Hanghui; Ismail-Beigi, Sohrab; Walker, Fred; Ahn, Charles

    2013-03-01

    A ferroelectric field effect transistor (FE-FET) modulates conductivity in a non-volatile manner by electrostatically accumulating and depleting charge carriers at the interface between a conducting channel and ferroelectric gate. The rare earth nickelate LaNiO3 is metallic in bulk, while other rare earth nickelates, such as NdNiO3, exhibit metal-insulator transitions and anti-ferromagnetic behavior in the bulk. Here, we show that by coupling the ferroelectric polarization of Pb0.8Zr0.2TiO3 (PZT) to the carriers in a nickelate, we can dynamically induce a metal- insulator transition in ultra-thin films of LaNiO3, and induce large changes in the MIT transition temperature in NdNiO3. Density functional theory is used to determine changes in the physical and electronic Ni-O-Ni bond angle of the nickelate at the interface between PZT and LaNiO3. The effect of the ferroelectric polarization is to decrease the Ni-O-Ni bond angle from 180 degrees and increase the carrier effective mass. Related to this change in electronic structure, we observe a change in resistivity of approximately 80% at room temperature for an ultra-thin 3 unit cell thick film of LaNiO3. Work supported by FENA and the NSF under MRSEC DMR 1119826.

  18. Self-aligned-gate AlGaN/GaN heterostructure field-effect transistor with titanium nitride gate

    NASA Astrophysics Data System (ADS)

    Zhang, Jia-Qi; Wang, Lei; Li, Liu-An; Wang, Qing-Peng; Jiang, Ying; Zhu, Hui-Chao; Ao, Jin-Ping

    2016-08-01

    Self-aligned-gate heterostructure field-effect transistor (HFET) is fabricated using a wet-etching method. Titanium nitride (TiN) is one kind of thermal stable material which can be used as the gate electrode. A Ti/Au cap layer is fixed on the gate and acts as an etching mask. Then the T-shaped gate is automatically formed through over-etching the TiN layer in 30% H2O2 solution at 95 °C. After treating the ohmic region with an inductively coupled plasma (ICP) method, an Al layer is sputtered as an ohmic electrode. The ohmic contact resistance is approximately 0.3 Ω·mm after annealing at a low-temperature of 575 °C in N2 ambient for 1 min. The TiN gate leakage current is only 10-8 A after the low-temperature ohmic process. The access region length of the self-aligned-gate (SAG) HFET was reduced from 2 μm to 0.3 μm compared with that of the gate-first HFET. The output current density and transconductance of the device which has the same gate length and width are also increased.

  19. Enhanced Miller plateau characteristics of a 4H-SiC insulated-gate bipolar transistor in the presence of interface traps

    NASA Astrophysics Data System (ADS)

    Navarro, Dondee; Tone, Akihiro; Kikuchihara, Hideyuki; Morikawa, Yoji; Miura-Mattausch, Mitiko

    2017-04-01

    Miller plateau characteristics of a 4H-SiC insulated-gate bipolar transistor (IGBT) is investigated during a gate voltage turn-on under the presence of interface carrier traps at the MOSFET gate oxide. The plateau, which is observed in the device gate-emitter voltage, increased with respect to both height and length. The plateau height is mainly determined by the density increase of trap states, which also causes slow charging of the gate capacitance in the overlap region that results in a longer plateau length. The shallow trap states contribute mainly to the plateau increase. It is observed that the switching loss at turn-on can increase by more than 60% due mainly to the carrier traps at the shallow trap states.

  20. The Use of Ferroelectrics and Dipeptides as Insulators in Organic Field-Effect Transistor Devices

    NASA Astrophysics Data System (ADS)

    Knotts, Grant

    While the electrical transport characteristics of organic electronic devices are generally inferior to their inorganic counterparts, organic materials offer many advantages over inorganics. The materials used in organic devices can often be deposited using cheap and simple processing techniques such as spincoating, inkjet printing, or roll-to-roll processing; allow for large-scale, flexible devices; and can have the added benefits of being transparent or biodegradable. In this manuscript, we examine the role of solvents in the performance of pentacene-based devices using the ferroelectric copolymer polyvinylidene fluoride-trifluoroethylene (PVDF-TrFe) as a gate insulating layer. High dipole moment solvents, such as dimethyl sulfoxide, used to dissolve the copolymer for spincoating increase the charge carrier mobility in field-effect transistors (FETs) by nearly an order of magnitude as compared to lower dipole moment solvents. The polarization in Al/PVDF-TrFe/Au metal-ferroelectric-metal devices also shows an increase in remnant polarization of 20% in the sample using dimethyl sulfoxide as the solvent for the ferroelectric. Interestingly, at low applied electric fields of 100 MV/m a remnant polarization is seen in the high dipole moment device that is nearly 3.5 times larger than the value observed in the lower dipole moment samples, suggesting that the degree of dipolar order is higher at low operating voltages for the high dipole moment device. We will also discuss the use of peptide-based nanostructures derived from natural amino acids as building blocks for biocompatible devices. These peptides can be used in a bottom-up process without the need for expensive lithography. Thin films of L,L-diphenylalanine micro/nanostructures (FF-MNSs) were used as the dielectric layer in pentacene-based FETs and metal-insulator-semiconductor diodes both in bottom-gate and top-gate structures. It is demonstrated that the FFMNSs can be functionalized for detection of enzyme

  1. Inhomogeneous field induced magnetoelectric effect in Mott insulators

    SciTech Connect

    Boulaevskii, Lev N; Batista, Cristian D

    2008-01-01

    We consider a Mott insulator like HoMnO{sub 3} whose magnetic lattice is geometrically frustrated and comprises a 3D array of triangular layers with magnetic moments ordered in a 120{sup o} structure. We show that the effect of a uniform magnetic field gradient, {gradient}H, is to redistribute the electronic charge of the magnetically ordered phase leading to a unfirom electric field gradient. The resulting voltage difference between the crystal edges is proportional to the square of the crystal thickness, or inter-edge distance, L. It can reach values of several volts for |{gradient}H| {approx} 0.01 T/cm and L {approx_equal} 1mm, as long as the crystal is free of antiferromagnetic domain walls.

  2. Experimental Observation of a Metal-insulator Transition in 2D at Zero Magnetic Field

    NASA Astrophysics Data System (ADS)

    Kravchenko, S. V.

    1996-03-01

    The scaling theory of Abrahams et al. ^1 has had considerable success in describing many features of metal-insulator transitions. Within this theory, which was developed for non-interacting electrons, no such transition is possible in two-dimensional electron systems (2DES) in the absence of a magnetic field. However, we show experimentally that an ultra-high-mobility 2DES on the surface of silicon does exhibit the signature of a true metal-insulator phase transition at zero magnetic field at a critical electron density n_c ~10^11 cm-2. The energy of electron-electron interactions, ignored in the scaling theory,^1 is the dominant parameter in this 2DES. The resistivity, ρ, is empirically found to scale near the critical point both with temperature T and electric field E so that it can be represented by the form ρ(T,n_s)=ρ(T/T_0(n_s)) as Earrow0 or ρ(E,n_s)=ρ(E/E_0(n_s)) as Tarrow0. At the transition, the resistivity is close to 3h/e^2. Both scaling parameters, T0 and E_0, show power law behavior at the critical point. This is characteristic of a true phase transition and strongly resembles, in particular, the superconductor-insulator transition in disordered thin films,^2 as well as the transition between quantum Hall liquid and insulator.^3 Many high-mobility samples from two different sources (Institute for Metrological Service, Russia, and Siemens AG, Germany) with different oxide thicknesses and gate materials have been studied and similar results were found. Work done in collaboration with J. E. Furneaux, Whitney Mason, V. M. Pudalov, and M. D'Iorio, supported by NSF. ^1 E. Abrahams, P. W. Anderson, D. C. Licciardello, and T. V. Ramakrishnan, Phys. Rev. Lett. 42, 673 (1979). ^2 Y. Liu, K. A. McGreer, B. Nease, D. B. Haviland, G. Martinez, J. W. Halley, and A. M. Goldman, Phys. Rev. Lett. 67, 2068 (1991). ^3 T. Wang, K. P. Clark, G. F. Spencer, A. M. Mack, and W. P. Kirk, Phys. Rev. Lett. 72, 709 (1994).

  3. A 65-kV insulated gate bipolar transistor switch applied in damped AC voltages partial discharge detection system.

    PubMed

    Jiang, J; Ma, G M; Luo, D P; Li, C R; Li, Q M; Wang, W

    2014-02-01

    Damped AC voltages detection system (DAC) is a productive way to detect the faults in power cables. To solve the problems of large volume, complicated structure and electromagnetic interference in existing switches, this paper developed a compact solid state switch based on electromagnetic trigger, which is suitable for DAC test system. Synchronous electromagnetic trigger of 32 Insulated Gate Bipolar Transistors (IGBTs) in series was realized by the topological structure of single line based on pulse width modulation control technology. In this way, external extension was easily achieved. Electromagnetic trigger and resistor-capacitor-diode snubber circuit were optimized to reduce the switch turn-on time and circular layout. Epoxy encapsulating was chosen to enhance the level of partial discharge initial voltage (PDIV). The combination of synchronous trigger and power supply is proposed to reduce the switch volume. Moreover, we have overcome the drawback of the electromagnetic interference and improved the detection sensitivity of DAC by using capacitor storage energy to maintain IGBT gate driving voltage. The experimental results demonstrated that the solid-state switch, with compact size, whose turn-on time was less than 400 ns and PDIV was more than 65 kV, was able to meet the actual demands of 35 kV DAC test system.

  4. A 65-kV insulated gate bipolar transistor switch applied in damped AC voltages partial discharge detection system

    NASA Astrophysics Data System (ADS)

    Jiang, J.; Ma, G. M.; Luo, D. P.; Li, C. R.; Li, Q. M.; Wang, W.

    2014-02-01

    Damped AC voltages detection system (DAC) is a productive way to detect the faults in power cables. To solve the problems of large volume, complicated structure and electromagnetic interference in existing switches, this paper developed a compact solid state switch based on electromagnetic trigger, which is suitable for DAC test system. Synchronous electromagnetic trigger of 32 Insulated Gate Bipolar Transistors (IGBTs) in series was realized by the topological structure of single line based on pulse width modulation control technology. In this way, external extension was easily achieved. Electromagnetic trigger and resistor-capacitor-diode snubber circuit were optimized to reduce the switch turn-on time and circular layout. Epoxy encapsulating was chosen to enhance the level of partial discharge initial voltage (PDIV). The combination of synchronous trigger and power supply is proposed to reduce the switch volume. Moreover, we have overcome the drawback of the electromagnetic interference and improved the detection sensitivity of DAC by using capacitor storage energy to maintain IGBT gate driving voltage. The experimental results demonstrated that the solid-state switch, with compact size, whose turn-on time was less than 400 ns and PDIV was more than 65 kV, was able to meet the actual demands of 35 kV DAC test system.

  5. Electric field-induced transport modulation in VO2 FETs with high-k oxide/organic parylene-C hybrid gate dielectric

    NASA Astrophysics Data System (ADS)

    Wei, Tingting; Kanki, Teruo; Fujiwara, Kohei; Chikanari, Masashi; Tanaka, Hidekazu

    2016-02-01

    We report on the observation of reversible and immediate resistance switching by high-k oxide Ta2O5/organic parylene-C hybrid dielectric-gated VO2 thin films. Resistance change ratios at various temperatures in the insulating regime were demonstrated to occur in the vicinity of phase transition temperature. We also found an asymmetric hole-electron carrier modulation related to the suppression of phase transition temperature. The results in this research provide a possibility for clarifying the origin of metal-insulator transition in VO2 through the electrostatic field-induced transport modulation.

  6. Electric field-induced transport modulation in VO{sub 2} FETs with high-k oxide/organic parylene-C hybrid gate dielectric

    SciTech Connect

    Wei, Tingting; Kanki, Teruo E-mail: h-tanaka@sanken.osaka-u.ac.jp; Chikanari, Masashi; Tanaka, Hidekazu E-mail: h-tanaka@sanken.osaka-u.ac.jp; Fujiwara, Kohei

    2016-02-01

    We report on the observation of reversible and immediate resistance switching by high-k oxide Ta{sub 2}O{sub 5}/organic parylene-C hybrid dielectric-gated VO{sub 2} thin films. Resistance change ratios at various temperatures in the insulating regime were demonstrated to occur in the vicinity of phase transition temperature. We also found an asymmetric hole-electron carrier modulation related to the suppression of phase transition temperature. The results in this research provide a possibility for clarifying the origin of metal-insulator transition in VO{sub 2} through the electrostatic field-induced transport modulation.

  7. Field evaluation of 69-kV outdoor Polysil reg sign insulators

    SciTech Connect

    Richenbacher, A.G. )

    1990-03-01

    This report, together with previous interim reports, documents and summarizes the field performance of 69 kV Polysil{reg sign} insulators during the field trial period from January, 1983 to December, 1988. These insulators were manufactured for the Electric Power Research Institute by Lindsey Industries in 1979. A description of the insulator development and manufacturing process is contained in the EPRI Final Report EL1281-1. Following their manufacture, the insulators were delivered, in the form of test racks of 17 Polysil{reg sign} insulators and one porcelain insulator, to twelve United States utilities and the Instituto de Investigaciones Electricas (IIE) in Mexico. These racks were subsequently installed and energized at twenty-five test sites during the latter half of 1979 and early 1980 by the project participants for the purpose of analyzing the outdoor field performance of these insulators and comparing the relative effect on performance of variations in composition, coating, electrical grading method, and shape represented by individual insulators within the test racks. This report documents the effects of the various Polysil{reg sign} insulator parameters on electrical performance in the field over a specific period of 6 years. However, the insulators had been energized for approximately 3 years prior to the initiation of this project and, although specific performance data is not available for that time period, the overall effects of field exposure for that additional time period (total of 9 years) are seen in the results of this report. 3 refs., 23 figs., 9 tabs.

  8. Gate direct-tunnelling and hot-carrier-induced hysteresis effect in partially depleted silicon-on-insulator floating-body MOSFETs

    NASA Astrophysics Data System (ADS)

    Zhou, Jianhua; Pang, Albert; Zou, Shichang

    2011-02-01

    The hysteresis effect in the output characteristics of partially depleted (PD) silicon-on-insulator (SOI) floating-body MOSFETs with an ultra-thin gate oxide is studied taking account of both gate direct-tunnelling and impact ionization-induced hot-carrier mechanisms. It is proposed that hole tunnelling from valence band (HVB) for floating-body PD SOI n-MOSFETs, electron tunnelling from conduction band (ECB) for floating-body PD SOI p-MOSFETs and impact-ionization-induced hot carriers are the main causes of the hysteresis effect. Meanwhile, body-contact structures of T-gate and H-gate PD SOI MOSFETs are also studied under floating-body configurations. It is found that the influence of the converse poly-gate on the body-contact side on gate direct-tunnelling cannot be neglected in view of floating-body potential variation. Based on the measurement results, the hysteresis can be suppressed using T-gate and H-gate PD SOI MOSFETs with floating-body configurations.

  9. Side-gate graphene field-effect transistors with high transconductance

    NASA Astrophysics Data System (ADS)

    Hähnlein, B.; Händel, B.; Pezoldt, J.; Töpfer, H.; Granzner, R.; Schwierz, F.

    2012-08-01

    We have fabricated epitaxial side-gate graphene field-effect transistors (FETs) with high transconductance. A side-gate graphene FET with 55 × 60 nm2 active channel dimensions and a lateral gate-channel separation of 95 nm showing a high transconductance of 590 mS/mm is presented. An estimation of the electrostatic gate-channel capacitance of epitaxial side-gate graphene FETs shows that it is in the same order as the electrostatic gate capacitance of common top-gate graphene MOSFETs justifying the high transconductances of our devices. The results of the present paper demonstrate the potential of the side-gate architecture for graphene transistors.

  10. Leakage and field emission in side-gate graphene field effect transistors

    NASA Astrophysics Data System (ADS)

    Di Bartolomeo, A.; Giubileo, F.; Iemmo, L.; Romeo, F.; Russo, S.; Unal, S.; Passacantando, M.; Grossi, V.; Cucolo, A. M.

    2016-07-01

    We fabricate planar graphene field-effect transistors with self-aligned side-gate at 100 nm from the 500 nm wide graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1 V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO2/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO2 up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at higher voltages. We report a field-emission current density as high as 1 μA/μm between graphene flakes. These findings are important for the miniaturization of atomically thin devices.

  11. Resistance modulation in VO2 nanowires induced by an electric field via air-gap gates

    NASA Astrophysics Data System (ADS)

    Kanki, Teruo; Chikanari, Masashi; Wei, Tingting; Tanaka, Hidekazu; The Institute of Scientific; Industrial Research Team

    Vanadium dioxide (VO2) shows huge resistance change with metal-insulator transition (MIT) at around room temperature. Controlling of the MIT by applying an electric field is a topical ongoing research toward the realization of Mott transistor. In this study, we have successfully switched channel resistance of VO2 nano-wire channels by a pure electrostatic field effect using a side-gate-type field-effect transistor (SG-FET) viaair gap and found that single crystalline VO2 nanowires and the channels with narrower width enhance transport modulation rate. The rate of change in resistance ((R0-R)/R, where R0 and R is the resistance of VO2 channel with off state and on state gate voltage (VG) , respectively) was 0.42 % at VG = 30 V in in-plane poly-crystalline VO2 channels on Al2O3(0001) substrates, while the rate in single crystalline channels on TiO2 (001) substrates was 3.84 %, which was 9 times higher than that using the poly-crystalline channels. With reducing wire width from 3000 nm to 400 nm of VO2 on TiO2 (001) substrate, furthermore, resistance modulation ratio enhanced from 0.67 % to 3.84 %. This change can not be explained by a simple free-electron model. In this presentation, we will compare the electronic properties between in-plane polycrystalline VO2 on Al2O3 (0001) and single crystalline VO2 on TiO2 (001) substrates, and show experimental data in detail..

  12. Three-terminal field effect switches probing the electrically triggered Metal-Insulator Transition in Vanadium dioxide

    NASA Astrophysics Data System (ADS)

    Gopalakrishnan, Gokul; Ko, Changhyun; Ruzmetov, Dmitry; Narayanamurti, Venkatesh; Ramanathan, Shriram

    2010-03-01

    Electrostatic control of the Metal-Insulator Transition (MIT) in correlated oxides is valuable, both as a probe of the nature of the phase transition, as well as being a critical aspect of novel switching devices based on Mott insulators. Of much recent interest among this class of materials, is vanadium dioxide (VO2), a correlated semiconductor which exhibits a thermally induced MIT close to room temperature, and has also been shown to undergo an ultra-fast switching of conductivity by optical and electrical means. Among many of the experiments demonstrating an electrically triggered transition, however, the attendant phenomenon of Joule heating in the current channel raises questions about the triggering mechanism. To carefully address this issue, we explore the fabrication of three terminal field-effect devices, in which the resistance of a VO2 based channel may be modulated by a gate electric field in the absence of any significant current induced heating. In this talk we present details of the fabrication, the technical challenges involved in implementing them, and results of gated I-V measurements performed on these devices along with our interpretation of the observed effects.

  13. Gate-tunable electronic transport in topological insulator Bi2Te3 thin films synthesized by metal-organic chemical vapor deposition

    NASA Astrophysics Data System (ADS)

    Cao, Helin; Venkatasubramanian, Rama; Pierce, Jonathan; Wu, Tai-Lung; Tian, Jifa; Childres, Isaac; Chen, Yong

    2012-02-01

    Topological insulator is a new state of matter with a nominally insulating gap in the bulk and non-trivial metallic states on the surface. One of the proto-type topological insulator materials, Bi2Te3, can be synthesized in the form of high quality, wafer scale thin films by metal-organic chemical vapor deposition (MOCVD). Here we present an experimental study of Bi2Te3 thin films with thickness ranging from a few nm's to 1 μm synthesized by MOCVD on semi-insulating GaAs (001) substrates. Hall bar shaped devices using atomic layer deposition (ALD) high-k Al2O3 or HfO2 as gate dielectric have been fabricated. We have measured the magneto-transport (including both Rxx, 4-terminal longitudinal resistance, and Rxy, the Hall resistance) at various temperatures and gate voltages to probe the possible transport signatures of the topological surface states. We have also studied gate-tunable weak anti-localization in Rxx(B) for ultra-thin films.

  14. Evolutionary Based Techniques for Fault Tolerant Field Programmable Gate Arrays

    NASA Technical Reports Server (NTRS)

    Larchev, Gregory V.; Lohn, Jason D.

    2006-01-01

    The use of SRAM-based Field Programmable Gate Arrays (FPGAs) is becoming more and more prevalent in space applications. Commercial-grade FPGAs are potentially susceptible to permanently debilitating Single-Event Latchups (SELs). Repair methods based on Evolutionary Algorithms may be applied to FPGA circuits to enable successful fault recovery. This paper presents the experimental results of applying such methods to repair four commonly used circuits (quadrature decoder, 3-by-3-bit multiplier, 3-by-3-bit adder, 440-7 decoder) into which a number of simulated faults have been introduced. The results suggest that evolutionary repair techniques can improve the process of fault recovery when used instead of or as a supplement to Triple Modular Redundancy (TMR), which is currently the predominant method for mitigating FPGA faults.

  15. Encapsulated gate-all-around InAs nanowire field-effect transistors

    SciTech Connect

    Sasaki, Satoshi Tateno, Kouta; Zhang, Guoqiang; Suominen, Henri; Harada, Yuichi; Saito, Shiro; Fujiwara, Akira; Sogawa, Tetsuomi; Muraki, Koji

    2013-11-18

    We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric.

  16. High K Oxide Insulated Gate Group III Nitride-Based FETs

    DTIC Science & Technology

    2014-03-21

    AND ADDRESS(ES) Kansas State University 2 Fairchild Hall Manhattan , KS 66506-1103 3. DATES COVERED (From - To) 04/05/2009-03/20/2014 5a. CONTRACT...NUMBER 5b. GRANT NUMBER N00014-09-1-1160 5c. PROGRAM ELEMENT NUMBER 5d. PROJECT NUMBER 09PRE09471-00 5e. TASK NUMBER 5f. WORK UNIT NUMBER 9...results indicate the promising potential of incorporation gate dielectric in future GaN devices. This project supported two students who completed

  17. Spatially Uniform Thin-Film Formation of Polymeric Organic Semiconductors on Lyophobic Gate Insulator Surfaces by Self-Assisted Flow-Coating.

    PubMed

    Bulgarevich, Kirill; Sakamoto, Kenji; Minari, Takeo; Yasuda, Takeshi; Miki, Kazushi

    2017-02-22

    Surface hydrophobization by self-assembled monolayer formation is a powerful technique for improving the performance of organic field-effect transistors (OFETs). However, organic thin-film formation on such a surface by solution processing often fails due to the repellent property of the surface against common organic solvents. Here, a scalable unidirectional coating technique that can solve this problem, named self-assisted flow-coating, is reported. Producing a specially designed lyophobic-lyophilic pattern on the lyophobic surface enables organic thin-film formation in the lyophobic surface areas by flow-coating. To demonstrate the usefulness of this technique, OFET arrays with an active layer of poly(2,5-bis(3-hexadecylthiophene-2-yl)thieno[3,2-b]thiophene) are fabricated. The ideal transfer curves without hysteresis behavior are obtained for all OFETs. The average field-effect hole mobility in the saturation regime is 0.273 and 0.221 cm(2)·V(-1)·s(-1) for the OFETs with the channels parallel and perpendicular to the flow-coating direction, respectively, and the device-to-device variation is less than 3% for each OFET set. Very small device-to-device variation is also obtained for the on-state current, threshold voltage, and subthreshold swing. These results indicate that the self-assisted flow-coating is a promising coating technique to form spatially uniform thin films of polymeric organic semiconductors on lyophobic gate insulator surfaces.

  18. Top-gated field-effect LaAlO{sub 3}/SrTiO{sub 3} devices made by ion-irradiation

    SciTech Connect

    Hurand, S.; Jouan, A.; Feuillet-Palma, C.; Singh, G.; Malnou, M.; Lesueur, J.; Bergeal, N.; Lesne, E.; Reyren, N.; Barthélémy, A.; Bibes, M.; Villegas, J. E.; Ulysse, C.; Pannetier-Lecoeur, M.

    2016-02-01

    We present a method to fabricate top-gated field-effect devices in a LaAlO{sub 3}/SrTiO{sub 3} two-dimensional electron gas (2-DEG). Prior to the gate deposition, the realisation of micron size conducting channels in the 2-DEG is achieved by an ion-irradiation with high-energy oxygen ions. After identifying the ion fluence as the key parameter that determines the electrical transport properties of the channels, we demonstrate the field-effect operation. At low temperature, the normal state resistance and the superconducting T{sub c} can be tuned over a wide range by a top-gate voltage without any leakage. A superconductor-to-insulator quantum phase transition is observed for a strong depletion of the 2-DEG.

  19. Control of Subthreshold Characteristics of Narrow-Channel Silicon-on-Insulator n-Type Metal-Oxide-Semiconductor Transistor with Additional Side Gate Electrodes

    NASA Astrophysics Data System (ADS)

    Okuyama, Kiyoshi; Yoshikawa, Koji; Sunami, Hideo

    2007-04-01

    A silicon-on-insulator (SOI) n-type metal-oxide-semiconductor (MOS) transistor with additional side gate electrodes is fabricated and its subthreshold characteristics are discussed. Since its device structure provides independent biasing to gates, flexible device-characteristic control for the respective device is expected. The key fabrication process is the formation of transistor gates. Additional side gate electrodes are formed by reactive ion etching (RIE) with a SiO2-covered top gate as an etching mask. Subthreshold characteristics are improved by negative side-gate biasing. In addition, the side-gate voltage VSG required to decrease off-leakage current by one decade is around 100 mV. Since the sidewall oxide thickness is chosen to be 5 nm, which is the same as the top-oxide thickness, rather sensitive subthreshold-characteristic control compared with that of biasing through a thick buried-oxide layer is achieved in response to performance requirement. In the viewpoint of stand-by-power suppression, these provide a certain controllability to a circuit operation.

  20. Investigation of field induced trapping on floating gates

    NASA Technical Reports Server (NTRS)

    Gosney, W. M.

    1975-01-01

    The development of a technology for building electrically alterable read only memories (EAROMs) or reprogrammable read only memories (RPROMs) using a single level metal gate p channel MOS process with all conventional processing steps is outlined. Nonvolatile storage of data is achieved by the use of charged floating gate electrodes. The floating gates are charged by avalanche injection of hot electrodes through gate oxide, and discharged by avalanche injection of hot holes through gate oxide. Three extra diffusion and patterning steps are all that is required to convert a standard p channel MOS process into a nonvolatile memory process. For identification, this nonvolatile memory technology was given the descriptive acronym DIFMOS which stands for Dual Injector, Floating gate MOS.

  1. Characterization of SiO2/SiNx gate insulators for graphene based nanoelectromechanical systems

    NASA Astrophysics Data System (ADS)

    Tóvári, E.; Csontos, M.; Kriváchy, T.; Fürjes, P.; Csonka, S.

    2014-09-01

    The structural and magnetotransport characterization of graphene nanodevices exfoliated onto Si/SiO2/SiNx heterostructures are presented. Improved visibility of the deposited flakes is achieved by optimal tuning of the dielectric film thicknesses. The conductance of single layer graphene Hall-bar nanostructures utilizing SiO2/SiNx gate dielectrics were characterized in the quantum Hall regime. Our results highlight that, while exhibiting better mechanical and chemical stability, the effect of non-stoichiometric SiNx on the charge carrier mobility of graphene is comparable to that of SiO2, demonstrating the merits of SiNx as an ideal material platform for graphene based nanoelectromechanical applications.

  2. III-V-semiconductor-on-insulator n-channel metal-insulator-semiconductor field-effect transistors with buried Al2O3 layers and sulfur passivation: Reduction in carrier scattering at the bottom interface

    NASA Astrophysics Data System (ADS)

    Yokoyama, Masafumi; Yasuda, Tetsuji; Takagi, Hideki; Miyata, Noriyuki; Urabe, Yuji; Ishii, Hiroyuki; Yamada, Hisashi; Fukuhara, Noboru; Hata, Masahiko; Sugiyama, Masakazu; Nakano, Yoshiaki; Takenaka, Mitsuru; Takagi, Shinichi

    2010-04-01

    We have developed III-V-semiconductor-on-insulator (III-V-OI) structures on Si wafers with excellent bottom interfaces between In0.53Ga0.47As-OI channel layers and atomic-layer-deposited Al2O3 (ALD-Al2O3) buried oxides (BOXs). A surface activated bonding process and the sulfur passivation pretreatment have realized the excellent In0.53Ga0.47As-OI/ALD-Al2O3 BOX bottom interface properties. As a result, the III-V-OI n-channel metal-insulator-semiconductor field-effect transistors under the back-gate configuration showed the peak mobility of 1800 cm2/V s and the higher electron mobility than the Si universal one even in the high effective electric field range because of the reduction in the surface roughness and fixed charges.

  3. A study on III-nitride recessed-gate field-effect transistors using a remote-oxygen-plasma treatment

    NASA Astrophysics Data System (ADS)

    Lee, Y.-C.; Kao, T.-T.; Shen, S.-C.

    2015-04-01

    We report a comparative study of the device performance of III-nitride (III-N) heterojunction field-effect transistors (HFETs) and metal-insulator-semiconductor field-effect transistors (MISFETs). The influence of a remote-oxygen-plasma treatment was investigated. The plasma-treated recessed-gate HFETs and MISFETs show normally-off characteristics with higher peak transconductance, lower sub-threshold slope, smaller hysteresis. An on-off ratio greater than 2.2E11 with a significant suppression of gate leakage can be achieved in plasma-treated III-N MISFETs. A drain current transient measurement was performed to analyze the traps in these devices and possible origins of these traps are studied. Six traps with characteristic time constants (τ) ranging from 180 s to 3 ms are identified in both HFETs and MISFETs, in addition to a trap which is associated with the ALD-grown gate dielectrics for the MISFETs. The results suggest that improved device performance in these plasma-treated III-N FETs is attributed to the reduced trap states with τ < 400 ms, which are located on III-N surfaces. The slower traps (τ > 2 s) cannot be reduced by the plasma treatment and are related to the oxygen and carbon impurities and the buffer traps in the bulk semiconductors.

  4. Assessment of performance potential of MoS{sub 2}-based topological insulator field-effect transistors

    SciTech Connect

    Liu, Leitao; Guo, Jing

    2015-09-28

    It was suggested that single-layer MoS{sub 2} at the 1T′ phase is a topological insulator whose electronic structure can be modulated by a vertical electric field for field-effect transistor (FET) applications [X. Qian, J. Liu, L. Fu, and J. Li, Science 346, 1344 (2014)]. In this work, performance potential of FETs based on vertical field modulation of the topological edge states is assessed by using quantum transport device simulations. To perform efficient device simulations, a phenomenological Hamiltonian is first proposed and validated to capture the effects of electric fields. Because the ON-state conductance is determined by transport through gapless edge states with a long scattering mean free path and the OFF-state conductance by transport through the gapped bulk states, the ON/OFF ratio is sensitive to the channel length, which is different from conventional FETs. Although a high vertical electric field is required to modulate the topological edge state, a reasonably small subthreshold swing of 131 mV/dec can still be achieved for a practical value of the gate insulator thickness.

  5. Response delay caused by dielectric relaxation of polymer insulators for organic transistors and resolution method

    NASA Astrophysics Data System (ADS)

    Suemori, Kouji; Kamata, Toshihide

    2012-08-01

    We investigated the effect of dielectric relaxation in polymer gate insulators on the device characteristics of organic field effect transistors. Dielectric relaxation of polymer gate insulators caused an increase in drain current (ID) in a period starting immediately after the application of the gate voltage (VG) and lasting several milliseconds. This induced an apparent delay in the response of ID. Based on the observed results, we suggested an ideal gate insulator to achieve organic field effect transistors that have a fast response and high performance.

  6. Gate control of percolative conduction in strongly correlated manganite films.

    PubMed

    Hatano, Takafumi; Sheng, Zhigao; Nakamura, Masao; Nakano, Masaki; Kawasaki, Masashi; Iwasa, Yoshihiro; Tokura, Yoshinori

    2014-05-01

    Gate control of percolative conduction in a phase-separated manganite system is demonstrated in a field-effect transistor geometry, resulting in ambipolar switching from a metallic state to an insulating state.

  7. Critical regime for the insulator-metal transition in highly ordered conjugated polymers gated with ionic liquid

    NASA Astrophysics Data System (ADS)

    Ito, Hiroshi; Harada, Tomonori; Tanaka, Hisaaki; Kuroda, Shin-ichi

    2016-03-01

    We report the room-temperature and low-temperature transport properties of a poly(2,5-bis(3-hexadecylthiophene-2-yl)thieno[3,2-b]thiophene) (PBTTT) film gated with an ionic liquid based on 1-ethyl-3-methylimidazolium bis(trifluoromethanesulfonyl)imide at different annealing temperatures of the PBTTT film. By annealing the film up to 235 °C and subsequently cooling it, we observed a ribbonlike structure, as reported. For the 235-°C-annealed (ribbon phase) film, we could apply a higher voltage without any decrease in the channel conductivity than for the 180-°C-annealed (terrace phase) film. As a result, a charge mobility as high as 10 cm2 V-1 s-1 was achieved for the ribbon-phase film. The power-law behavior of the temperature dependence of the electrical conductivity at low temperatures, indicating the critical regime for the insulator-metal transition, was observed. The ribbon-phase film exhibits an even weaker temperature dependence with a smaller exponent of β = 0.10 than the terrace-phase film.

  8. Compact all-optical interferometric logic gates based on one-dimensional metal-insulator-metal structures

    NASA Astrophysics Data System (ADS)

    Bian, Yusheng; Gong, Qihuang

    2014-02-01

    The whole set of fundamental all-optical logic gates is realized theoretically using a multi-channel configuration based on one-dimensional (1D) metal-insulator-metal (MIM) structures by leveraging the linear interference between surface plasmon polariton modes. The working principle and conditions for different logic functions are analyzed and demonstrated numerically by means of the finite element method. In contrast to most of the previous studies that require more than one type of configuration to achieve different logic functions, a single geometry with fixed physical dimensions can realize all fundamental functions in our case studies. It is shown that by switching the optical signals to different input channels, the presented device can realize simple logic functions such as OR, AND and XOR. By adding signal in the control channel, more functions including NOT, XNOR, NAND and NOR can be implemented. For these considered logic functions, high intensity contrast ratios between Boolean logic states "1" and "0" can be achieved at the telecom wavelength. The presented all-optical logic device is simple, compact and efficient. Moreover, the proposed scheme can be applied to many other nano-photonic logic devices as well, thereby potentially offering useful guidelines for their designs and further applications in on-chip optical computing and optical interconnection networks.

  9. Superconducting and Insulating Phases of Disordered FeSe Thin Films in a Magnetic Field

    NASA Astrophysics Data System (ADS)

    Schneider, R.; Zaitsev, A. G.; Fuchs, D.; von Löhneysen, H.

    2015-01-01

    The temperature-dependent electronic transport on the superconducting and insulating sides of the superconductor-insulator transition in disordered quasi-two-dimensional textured FeSe thin films is reported. The transition is driven by a perpendicular magnetic field applied to a film with its thickness close to the critical thickness of the thickness-, i.e., disorder-induced transition. The resistance in the superconducting phase might be dominated by thermally assisted flux flow, and in the phase diagram a metallic phase might intervene between the superconducting and insulating state at very low temperatures. In the insulating phase, weak insulating behavior is observed that can be described by weak localization theory of bosons, thus supporting the bosonic description of the superconductor-insulator transition in FeSe thin films.

  10. Low field magnetoresistance in a 2D topological insulator based on wide HgTe quantum well

    NASA Astrophysics Data System (ADS)

    Olshanetsky, E. B.; Kvon, Z. D.; Gusev, G. M.; Mikhailov, N. N.; Dvoretsky, S. A.

    2016-09-01

    Low field magnetoresistance is experimentally studied in a two-dimensional topological insulator (TI) in both diffusive and quasiballistic samples fabricated on top of a wide (14 nm) HgTe quantum well. In all cases a pronounced quasi-linear positive magnetoresistance is observed similar to that found previously in diffusive samples based on a narrow (8 nm) HgTe well. The experimental results are compared with the main existing theoretical models based on different types of disorder: sample edge roughness, nonmagnetic disorder in an otherwise coherent TI and metallic puddles due to locally trapped charges that act like local gate on the sample. The quasiballistic samples with resistance close to the expected quantized values also show a positive low-field magnetoresistance but with a pronounced admixture of mesoscopic effects.

  11. Electric-field control of spin-orbit torque in magnetically doped topological insulators

    NASA Astrophysics Data System (ADS)

    Fan, Yabin; Shao, Qiming; Kou, Xufeng; Upadhyaya, Pramey; Wang, Kang

    Recent advances of spin-orbit torques (SOTs) generated by topological insulators (TIs) have drawn increasing interest to the spin-momentum locking feature of TIs' surface states, which can potentially provide a very efficient means to generate SOTs for spintronic applications. In this presentation, we will show the magnetization switching through current-induced giant SOT in both TI/Cr-doped TI bilayer and uniformly Cr-doped TI films In particular, we show that the current-induced SOT has significant contribution from the spin-momentum locked surface states of TIs. We find that the spin torque efficiency is in general three orders of magnitude larger than those reported in heavy metal/ferromagnetic heterostructures. In the second part, we will present the electric-field control of the giant SOT in magnetically doped TIs, which suggests promising gate-controlled spin-torque device applications. The giant SOT and efficient current-induced magnetization switching exhibited by the magnetic TIs may lead to innovative spintronic applications such as ultralow power dissipation memory and logic devices. We acknowledge the supports from DARPA, FAME, SHINES and ARO programs.

  12. Switching characteristics of a 4H-SiC insulated-gate bipolar transistor with interface defects up to the nonquasi-static regime

    NASA Astrophysics Data System (ADS)

    Pesic, Iliya; Navarro, Dondee; Fujinaga, Masato; Furui, Yoshiharu; Miura-Mattausch, Mitiko

    2015-04-01

    The switching characteristics of a trench-type 4H-SiC insulated-gate bipolar transistor (IGBT) device with interface defects are analyzed up to the nonquasi-static (NQS) switching regime using reported interface density measurements and device simulation. Collector current degradation characterized by threshold voltage shift to higher gate voltages and reduction of current magnitude due to carrier trapping are observed under quasi-static (QS) simulation condition. At slow switching of the gate voltage, carrier trapping causes a hump in the transient current at the start of conduction. At very fast switching, the current hump is limited by the NQS effect which results to a reduced switching efficiency and increased on-resistance.

  13. A New 600 V Punch Through-Insulated Gate Bipolar Transistor with the Monolithic Fault Protection Circuit Using the Floating p-Well Voltage Detection

    NASA Astrophysics Data System (ADS)

    Ji, In-Hwan; Jeon, Byung-Chul; Choi, Young-Hwan; Ha, Min-Woo; Han, Min-Koo

    2006-10-01

    A new fault sensing scheme of the insulated gate bipolar transistor (IGBT) employing the floating p-well, which detects the over-voltage of the floating p-well under the short circuit fault condition, is proposed and implemented by fabricating the main IGBT and gate voltage pull-down circuit using the widely used planar IGBT process. The floating p-well structure also improves the avalanche energy of IGBT in addition to detecting the fault signal. The detection of fault and gate voltage pull-down operation is achieved by the proposed fault protection scheme employing the floating p-well voltage detection. The proposed fault protection circuit was measured under the hard switching fault (HSF) and fault under load (FUL) conditions. The normal switching behavior of the main IGBT with the proposed protection circuit was also investigated under inductive load switching conditions.

  14. Start Up Application Concerns with Field Programmable Gate Arrays (FPGAs)

    NASA Technical Reports Server (NTRS)

    Katz, Richard B.

    1999-01-01

    This note is being published to improve the visibility of this subject, as we continue to see problems surface in designs, as well as to add additional information to the previously published note for design engineers. The original application note focused on designing systems with no single point failures using Actel Field Programmable Gate Arrays (FPGAs) for critical applications. Included in that note were the basic principles of operation of the Actel FPGA and a discussion of potential single-point failures. The note also discussed the issue of startup transients for that class of device. It is unfortunate that we continue to see some design problems using these devices. This note will focus on the startup properties of certain electronic components, in general, and current Actel FPGAs, in particular. Devices that are "power-on friendly" are currently being developed by Actel, as a variant of the new SX series of FPGAs. In the ideal world, electronic components would behave much differently than they do in the real world, The chain, of course, starts with the power supply. Ideally, the voltage will immediately rise to a stable V(sub cc) level, of course, it does not. Aside from practical design considerations, inrush current limits of certain capacitors must be observed and the power supply's output may be intentionally slew rate limited to prevent a large current spike on the system power bus. In any event, power supply rise time may range from less than I msec to 100 msec or more.

  15. Infrared light gated MoS₂ field effect transistor.

    PubMed

    Fang, Huajing; Lin, Ziyuan; Wang, Xinsheng; Tang, Chun-Yin; Chen, Yan; Zhang, Fan; Chai, Yang; Li, Qiang; Yan, Qingfeng; Chan, H L W; Dai, Ji-Yan

    2015-12-14

    Molybdenum disulfide (MoS₂) as a promising 2D material has attracted extensive attentions due to its unique physical, optical and electrical properties. In this work, we demonstrate an infrared (IR) light gated MoS₂ transistor through a device composed of MoS₂ monolayer and a ferroelectric single crystal Pb(Mg(1/3)Nb(2/3))O₃-PbTiO₃ (PMN-PT). With a monolayer MoS₂ onto the top surface of (111) PMN-PT crystal, the drain current of MoS₂ channel can be modulated with infrared illumination and this modulation process is reversible. Thus, the transistor can work as a new kind of IR photodetector with a high IR responsivity of 114%/Wcm⁻². The IR response of MoS₂ transistor is attributed to the polarization change of PMN-PT single crystal induced by the pyroelectric effect which results in a field effect. Our result promises the application of MoS₂ 2D material in infrared optoelectronic devices. Combining with the intrinsic photocurrent feature of MoS₂ in the visible range, the MoS₂ on ferroelectric single crystal may be sensitive to a broadband wavelength of light.

  16. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.

    PubMed

    Rigante, Sara; Scarbolo, Paolo; Wipf, Mathias; Stoop, Ralph L; Bedner, Kristine; Buitrago, Elizabeth; Bazigos, Antonios; Bouvet, Didier; Calame, Michel; Schönenberger, Christian; Ionescu, Adrian M

    2015-05-26

    Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technology, instead of bulk MOSFETs, raise new opportunities and questions about the most suitable device architectures for sensing integrated circuits. In this work, we propose pH and ion sensors exploiting FinFETs fabricated on bulk silicon by a fully CMOS compatible approach, as an alternative to the widely investigated silicon nanowires on silicon-on-insulator substrates. We also provide an analytical insight of the concept of sensitivity for the electronic integration of sensors. N-channel fully depleted FinFETs with critical dimensions on the order of 20 nm and HfO2 as a high-k gate insulator have been developed and characterized, showing excellent electrical properties, subthreshold swing, SS ∼ 70 mV/dec, and on-to-off current ratio, Ion/Ioff ∼ 10(6), at room temperature. The same FinFET architecture is validated as a highly sensitive, stable, and reproducible pH sensor. An intrinsic sensitivity close to the Nernst limit, S = 57 mV/pH, is achieved. The pH response in terms of output current reaches Sout = 60%. Long-term measurements have been performed over 4.5 days with a resulting drift in time δVth/δt = 0.10 mV/h. Finally, we show the capability to reproduce experimental data with an extended three-dimensional commercial finite element analysis simulator, in both dry and wet environments, which is useful for future advanced sensor design and optimization.

  17. Electrolyte gate dependent high-frequency measurement of graphene field-effect transistor for sensing applications

    NASA Astrophysics Data System (ADS)

    Fu, W.; El Abbassi, M.; Hasler, T.; Jung, M.; Steinacher, M.; Calame, M.; Schönenberger, C.; Puebla-Hellmann, G.; Hellmüller, S.; Ihn, T.; Wallraff, A.

    2014-01-01

    We performed radiofrequency (RF) reflectometry measurements at 2-4 GHz on electrolyte-gated graphene field-effect transistors, utilizing a tunable stub-matching circuit for impedance matching. We demonstrate that the gate voltage dependent RF resistivity of graphene can be deduced, even in the presence of the electrolyte which is in direct contact with the graphene layer. The RF resistivity is found to be consistent with its DC counterpart in the full gate voltage range. Furthermore, in order to access the potential of high-frequency sensing for applications, we demonstrate time-dependent gating in solution with nanosecond time resolution.

  18. Threshold voltage model of junctionless cylindrical surrounding gate MOSFETs including fringing field effects

    NASA Astrophysics Data System (ADS)

    Gupta, Santosh Kumar

    2015-12-01

    2D Analytical model of the body center potential (BCP) in short channel junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs is developed using evanescent mode analysis (EMA). This model also incorporates the gate bias dependent inner and outer fringing capacitances due to the gate-source/drain fringing fields. The developed model provides results in good agreement with simulated results for variations of different physical parameters of JLCSG MOSFET viz. gate length, channel radius, doping concentration, and oxide thickness. Using the BCP, an analytical model for the threshold voltage has been derived and validated against results obtained from 3D device simulator.

  19. Use of a hard mask for formation of gate and dielectric via nanofilament field emission devices

    DOEpatents

    Morse, Jeffrey D.; Contolini, Robert J.

    2001-01-01

    A process for fabricating a nanofilament field emission device in which a via in a dielectric layer is self-aligned to gate metal via structure located on top of the dielectric layer. By the use of a hard mask layer located on top of the gate metal layer, inert to the etch chemistry for the gate metal layer, and in which a via is formed by the pattern from etched nuclear tracks in a trackable material, a via is formed by the hard mask will eliminate any erosion of the gate metal layer during the dielectric via etch. Also, the hard mask layer will protect the gate metal layer while the gate structure is etched back from the edge of the dielectric via, if such is desired. This method provides more tolerance for the electroplating of a nanofilament in the dielectric via and sharpening of the nanofilament.

  20. Field test of an alternative longwall gate road design. Report of investigations/1994

    SciTech Connect

    Cox, R.M.; Vandergrift, T.L.; McDonnell, J.P.

    1994-01-01

    The field test has confirmed the validity of the new alternative gate road system under actual mining conditions. Field observations indicated that the alternative gate road design significantly improved tailgate roadway stability under existing ground conditions. Field measurements support the results of the model analyses that suggested that reversing the gate road pillar arrangement would shift the higher abutment loads toward the gob of the previous panel and away from the tailgate of the current panel, thus reducing ground pressures and improving tailgate ground conditions.

  1. Leakage and field emission in side-gate graphene field effect transistors

    SciTech Connect

    Di Bartolomeo, A. Iemmo, L.; Romeo, F.; Cucolo, A. M.; Giubileo, F.; Russo, S.; Unal, S.; Passacantando, M.; Grossi, V.

    2016-07-11

    We fabricate planar graphene field-effect transistors with self-aligned side-gate at 100 nm from the 500 nm wide graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1 V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO{sub 2}/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO{sub 2} up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at higher voltages. We report a field-emission current density as high as 1 μA/μm between graphene flakes. These findings are important for the miniaturization of atomically thin devices.

  2. On the high-field transport and its temperature dependence in deca-nanometer fully depleted silicon-on-insulator field-effect-transistor

    NASA Astrophysics Data System (ADS)

    Kobayashi, Masaharu; Cai, Jin; Haensch, Wilfried

    2011-08-01

    Low-temperature characterization has been performed on fully depleted silicon-on-insulator (FDSOI) field-effect-transistor (FET) with gate length (Lg) down to 25 nm to clarify transport mechanisms that determine device performance in deca-nanometer scale. Linear drain current of FDSOI FET follows Lg-1 scaling down to 25 nm Lg, where mobility dominates, while saturation drain current largely deviates from Lg-1 scaling. Temperature dependence of effective source velocity at high drain voltage (Vds) is weaker than that at low Vds in short Lg and is consistent with that of saturation velocity. Drift velocity measurement revealed velocity overshooting behavior at high lateral field, indicating further Lg scaling benefit.

  3. Technologies for suppressing charge-traps in novel p-channel Field-MOSFET with thick gate oxide

    NASA Astrophysics Data System (ADS)

    Miyoshi, Tomoyuki; Oshima, Takayuki; Noguchi, Junji

    2015-05-01

    High voltage laterally diffused MOS (LDMOS) FETs are widely used in analog applications. A Field-MOSFET with a thick gate oxide is one of the best ways of achieving a simpler design and smaller circuit footprint for high-voltage analog circuits. This paper focuses on an approach to improving the reliability of p-channel Field-MOSFETs. By introducing a fluorine implantation process and terminating fluorine at the LOCOS bird’s beak, the gate oxide breakdown voltage could be raised to 350 V at a high-slew rate and the negative bias temperature instability (NBTI) shift could be kept to within 15% over a product’s lifetime. By controlling the amount of charge in the insulating layer through improving the interlayer dielectric (ILD) deposition processes, a higher BVDSS of 370 V and 10-year tolerability of 300 V were obtained with an assisted reduced surface electric field (RESURF) effect. These techniques can supply an efficient solution for ensuring reliable high-performance applications.

  4. Organic gate dielectrics for tetracene field effect transistors

    NASA Astrophysics Data System (ADS)

    Bertolazzi, Simone

    Over the last three decades, thin films of organic semiconductors (OS) have been the object of intense research. These films can be used in a wide variety of new-generation optoelectronic devices, such as Organic Light Emitting Diodes (OLED), Organic Field Effect Transistors (OFET) and photovoltaic cells. Recently, vacuum sublimed tetracene films were used to realize the first Organic Light Emitting Field Effect Transistor (OLEFET), which integrates in a single device the current modulation function of a FET with the light generation capability of a LED. The demonstration of OLEFETs is not straightforward. First of all, an efficient integration of optical and electronic functionalities requires the use of a semiconductor with both efficient electroluminescence and good charge transport properties. Secondly, an ambipolar charge transport has to be achieved to produce high performance OLEFETs. Within this context, controlling the dielectric substrate surface chemistry has proven to be an efficient strategy, since it contributes to avoid the suppression of the electron transport induced by the electronic trap states at the dielectric/semiconductor interface. At the same time, the modification of the chemical and physical nature of the dielectric substrate influences the morphology/structure of the organic thin-films, in turn influencing the final device performance. In this work, polycrystalline tetracene thin films - to be incorporated in OLEFETs - were vacuum sublimed on different organic dielectric substrates, including polymers (parylene C, polymethylmethacrylate, polystyrene) and self-assembled monolayers of hexamethyldisilazane (HMDS) and octadecyltrichlorosilane (OTS). The scope of the work was indeed to shed light on the role of the organic dielectric surface in influencing the charge transport properties of tetracene OLEFETs. The tetracene deposition rate was 3.5 A/s, the substrates were kept at room temperature and the pressure inside the vacuum chamber was

  5. Flat Panel Light Source with Lateral Gate Structure Based on SiC Nanowire Field Emitters

    PubMed Central

    Youh, Meng-Jey; Tseng, Chun-Lung; Jhuang, Meng-Han; Chiu, Sheng-Cheng; Huang, Li-Hu; Gong, Jyun-An; Li, Yuan-Yao

    2015-01-01

    A field-emission light source with high luminance, excellent luminance uniformity, and tunable luminance characteristics with a novel lateral-gate structure is demonstrated. The lateral-gate triode structure comprises SiC nanowire emitters on a Ag cathode electrode and a pair of Ag gate electrodes placed laterally on both sides of the cathode. The simple and cost-effective screen printing technique is employed to pattern the lateral-gates and cathode structure on soda lime glass. The area coverage of the screen-printed cathode and gates on the glass substrate (area: 6 × 8 cm2) is in the range of 2.04% – 4.74% depending on the set of cathode-gate electrodes on the substrate. The lateral-gate structure with its small area coverage exhibits a two-dimensional luminance pattern with high brightness and good luminance uniformity. A maximum luminance of 10952 cd/cm2 and a luminance uniformity of >90% can be achieved with a gate voltage of 500 V and an anode voltage of 4000 V, with an anode current of 1.44 mA and current leakage to the gate from the cathode of about 10%. PMID:26042359

  6. Semi-flexible gas-insulated transmission line using electric field stress shields

    DOEpatents

    Cookson, A.H.; Dale, S.J.; Bolin, P.C.

    1982-12-28

    A gas-insulated transmission line includes an outer sheath, an inner conductor, an insulating gas electrically insulating the inner conductor from the outer sheath, and insulating supports insulatably supporting the inner conductor within the outer sheath. The inner conductor is provided with flexibility by use of main conductor sections which are joined together through a conductor hub section and flexible flexing elements. Stress shields are provided to control the electric field at the locations of the conductor hub sections where the insulating supports are contacting the inner conductor. The flexing elements and the stress shields may also be utilized in connection with a plug and socket arrangement for providing electrical connection between main conductor sections. 10 figs.

  7. Semi-flexible gas-insulated transmission line using electric field stress shields

    DOEpatents

    Cookson, Alan H.; Dale, Steinar J.; Bolin, Philip C.

    1982-12-28

    A gas-insulated transmission line includes an outer sheath, an inner conductor, an insulating gas electrically insulating the inner conductor from the outer sheath, and insulating supports insulatably supporting the inner conductor within the outer sheath. The inner conductor is provided with flexibility by use of main conductor sections which are joined together through a conductor hub section and flexible flexing elements. Stress shields are provided to control the electric field at the locations of the conductor hub sections where the insulating supports are contacting the inner conductor. The flexing elements and the stress shields may also be utilized in connection with a plug and socket arrangement for providing electrical connection between main conductor sections.

  8. Optimization of a Solution-Processed SiO2 Gate Insulator by Plasma Treatment for Zinc Oxide Thin Film Transistors.

    PubMed

    Jeong, Yesul; Pearson, Christopher; Kim, Hyun-Gwan; Park, Man-Young; Kim, Hongdoo; Do, Lee-Mi; Petty, Michael C

    2016-01-27

    We report on the optimization of the plasma treatment conditions for a solution-processed silicon dioxide gate insulator for application in zinc oxide thin film transistors (TFTs). The SiO2 layer was formed by spin coating a perhydropolysilazane (PHPS) precursor. This thin film was subsequently thermally annealed, followed by exposure to an oxygen plasma, to form an insulating (leakage current density of ∼10(-7) A/cm(2)) SiO2 layer. Optimized ZnO TFTs (40 W plasma treatment of the gate insulator for 10 s) possessed a carrier mobility of 3.2 cm(2)/(V s), an on/off ratio of ∼10(7), a threshold voltage of -1.3 V, and a subthreshold swing of 0.2 V/decade. In addition, long-term exposure (150 min) of the pre-annealed PHPS to the oxygen plasma enabled the maximum processing temperature to be reduced from 180 to 150 °C. The resulting ZnO TFT exhibited a carrier mobility of 1.3 cm(2)/(V s) and on/off ratio of ∼10(7).

  9. Field-effect transistor replaces bulky transformer in analog-gate circuit

    NASA Technical Reports Server (NTRS)

    1965-01-01

    Metal-oxide semiconductor field-effect transistor /MOSFET/ analog-gate circuit adapts well to integrated circuits. It provides better system isolation than a transformer, while size and weight are appreciably reduced.

  10. High performance thin film transistor (flex-TFT) with textured nanostructure ZnO film channel fabricated by exploiting electric double layer gate insulator

    NASA Astrophysics Data System (ADS)

    Ghimire, Rishi Ram; Raychaudhuri, A. K.

    2017-01-01

    We report a flexible thin film transistor (flex-TFT) fabricated on a commonly available polyimide (Kapton®) tape with a channel of highly textured nanocrystalline ZnO film grown by pulsed laser deposition. The flex-TFT with an electric double layer (EDL) gate insulator shows a low threshold for operation (Vth ≤ 1 V), an ON/OFF ratio reaching ≈107 and a subthreshold swing ≈75 mV/dec. The superior performance is enabled by a high saturation mobility (μs ≈ 70 cm2/V s) of the highly textured nanocrystalline channel. The low Vth arises from large charge density (≈1014/cm2) induced into the channel by EDL gate insulator. The large charge density induced by the EDL gate dielectric also enhances the Hall mobility in the film and brings down the sheet resistance by nearly 2 orders, which leads to large ON/OFF ratio. The flex-TFT operation can be sustained with reproducibility when the TFT is bent down to a radius of curvature ≈2 cm.

  11. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    PubMed

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-04

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

  12. Flexible gas insulated transmission line having regions of reduced electric field

    DOEpatents

    Cookson, Alan H.; Fischer, William H.; Yoon, Kue H.; Meyer, Jeffry R.

    1983-01-01

    A gas insulated transmission line having radially flexible field control means for reducing the electric field along the periphery of the inner conductor at predetermined locations wherein the support insulators are located. The radially flexible field control means of the invention includes several structural variations of the inner conductor, wherein careful controlling of the length to depth of surface depressions produces regions of reduced electric field. Several embodiments of the invention dispose a flexible connector at the predetermined location along the inner conductor where the surface depressions that control the reduced electric field are located.

  13. Stark shift and field ionization of arsenic donors in {sup 28}Si-silicon-on-insulator structures

    SciTech Connect

    Lo, C. C. Morton, J. J. L.; Simmons, S.; Lo Nardo, R.; Weis, C. D.; Schenkel, T.; Tyryshkin, A. M.; Lyon, S. A.; Meijer, J.; Rogalla, D.; Bokor, J.

    2014-05-12

    We develop an efficient back gate for silicon-on-insulator (SOI) devices operating at cryogenic temperatures and measure the quadratic hyperfine Stark shift parameter of arsenic donors in isotopically purified {sup 28}Si-SOI layers using such structures. The back gate is implemented using MeV ion implantation through the SOI layer forming a metallic electrode in the handle wafer, enabling large and uniform electric fields up to 2 V/μm to be applied across the SOI layer. Utilizing this structure, we measure the Stark shift parameters of arsenic donors embedded in the {sup 28}Si-SOI layer and find a contact hyperfine Stark parameter of η{sub a} = −1.9 ± 0.7 × 10{sup −3} μm{sup 2}/V{sup 2}. We also demonstrate electric-field driven dopant ionization in the SOI device layer, measured by electron spin resonance.

  14. An insulated gate bipolar transistor with surface n-type barrier

    NASA Astrophysics Data System (ADS)

    Mengxuan, Jiang; John, Shen Z.; Jun, Wang; Zhikang, Shuai; Xin, Yin; Bingbing, Sun; Linyuan, Liao

    2015-12-01

    This letter proposes a novel IGBT structure with an n-type barrier (NB-IGBT) formed on the silicon surface to enhance the conductivity modulation effect with a relatively simple fabrication process. TCAD simulation indicates that the NB-IGBT offers a current density 49% higher and turn-off losses 25% lower than a conventional field-stop IGBT (FS-IGBT) with a similar breakdown voltage, turn-off time and avalanche energy. Furthermore, the NB-IGBT exhibits extremely large transconductance, which is favorable to turn-on and turn-off. Therefore, the proposed IGBT offers an attractive option for high-voltage and large-power electronics applications. Project supported by the National High Technology Research and Development Program of China (No. 2014AA052601) and the National Natural Science Foundation of China (No. 51277060).

  15. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    SciTech Connect

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong

    2014-10-20

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  16. Design and fabrication of carbon nanotube field-emission cathode with coaxial gate and ballast resistor.

    PubMed

    Sun, Yonghai; Yeow, John T W; Jaffray, David A

    2013-10-25

    A low density vertically aligned carbon nanotube-based field-emission cathode with a ballast resistor and coaxial gate is designed and fabricated. The ballast resistor can overcome the non-uniformity of the local field-enhancement factor at the emitter apex. The self-aligned fabrication process of the coaxial gate can avoid the effects of emitter tip misalignment and height non-uniformity. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Development of Gate and Base Drive Using SiC Junction Field Effect Transistors

    DTIC Science & Technology

    2008-05-01

    Development of Gate and Base Drive Using SiC Junction Field Effect Transistors by Timothy E. Griffin ARL-TR-4475 May 2008...Development of Gate and Base Drive Using SiC Junction Field Effect Transistors Timothy E. Griffin Sensors and Electron Devices...Effect Transistors 5c. PROGRAM ELEMENT NUMBER 5d. PROJECT NUMBER 5e. TASK NUMBER 6. AUTHOR(S) Timothy E. Griffin 5f. WORK UNIT NUMBER

  18. High mobility field effect transistor based on BaSnO{sub 3} with Al{sub 2}O{sub 3} gate oxide

    SciTech Connect

    Park, Chulkwon; Kim, Useong; Ju, Chan Jong; Park, Ji Sung; Kim, Young Mo; Char, Kookrin

    2014-11-17

    We fabricated an n-type accumulation-mode field effect transistor based on BaSnO{sub 3} transparent perovskite semiconductor, taking advantage of its high mobility and oxygen stability. We used the conventional metal-insulator-semiconductor structures: (In,Sn){sub 2}O{sub 3} as the source, drain, and gate electrodes, Al{sub 2}O{sub 3} as the gate insulator, and La-doped BaSnO{sub 3} as the semiconducting channel. The Al{sub 2}O{sub 3} gate oxide was deposited by atomic layer deposition technique. At room temperature, we achieved the field effect mobility value of 17.8 cm{sup 2}/Vs and the I{sub on}/I{sub off} ratio value higher than 10{sup 5} for V{sub DS} = 1 V. These values are higher than those previously reported on other perovskite oxides, in spite of the large density of threading dislocations in the BaSnO{sub 3} on SrTiO{sub 3} substrates. However, a relatively large subthreshold swing value was found, which we attribute to the large density of charge traps in the Al{sub 2}O{sub 3} as well as the threading dislocations.

  19. O3-sourced atomic layer deposition of high quality Al2O3 gate dielectric for normally-off GaN metal-insulator-semiconductor high-electron-mobility transistors

    NASA Astrophysics Data System (ADS)

    Huang, Sen; Liu, Xinyu; Wei, Ke; Liu, Guoguo; Wang, Xinhua; Sun, Bing; Yang, Xuelin; Shen, Bo; Liu, Cheng; Liu, Shenghou; Hua, Mengyuan; Yang, Shu; Chen, Kevin J.

    2015-01-01

    High quality Al2O3 film grown by atomic layer deposition (ALD), with ozone (O3) as oxygen source, is demonstrated for fabrication of normally-off AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). Significant suppression of Al-O-H and Al-Al bonds in ALD-Al2O3 has been realized by substituting conventional H2O source with O3. A high dielectric breakdown E-field of 8.5 MV/cm and good TDDB behavior are achieved in a gate dielectric stack consisting of 13-nm O3-Al2O3 and 2-nm H2O-Al2O3 interfacial layer on recessed GaN. By using this 15-nm gate dielectric and a high-temperature gate-recess technique, the density of positive bulk/interface charges in normally-off AlGaN/GaN MIS-HEMTs is remarkably suppressed to as low as 0.9 × 1012 cm-2, contributing to the realization of normally-off operation with a high threshold voltage of +1.6 V and a low specific ON-resistance RON,sp of 0.49 mΩ cm2.

  20. Fabrication of Ta2O5/GeNx gate insulator stack for Ge metal-insulator-semiconductor structures by electron-cyclotron-resonance plasma nitridation and sputtering deposition techniques

    NASA Astrophysics Data System (ADS)

    Otani, Yohei; Itayama, Yasuhiro; Tanaka, Takuo; Fukuda, Yukio; Toyota, Hiroshi; Ono, Toshiro; Mitsui, Minoru; Nakagawa, Kiyokazu

    2007-04-01

    The authors have fabricated germanium (Ge) metal-insulator-semiconductor (MIS) structures with a 7-nm-thick tantalum pentaoxide (Ta2O5)/2-nm-thick germanium nitride (GeNx) gate insulator stack by electron-cyclotron-resonance plasma nitridation and sputtering deposition. They found that pure GeNx ultrathin layers can be formed by the direct plasma nitridation of the Ge surface without substrate heating. X-ray photoelectron spectroscopy revealed no oxidation of the GeNx layer after the Ta2O5 sputtering deposition. The fabricated MIS capacitor with a capacitance equivalent thickness of 4.3nm showed excellent leakage current characteristics. The interface trap density obtained by the modified conductance method was 4×1011cm-2eV-1 at the midgap.

  1. Liquid crystal-gated-organic field-effect transistors with in-plane drain-source-gate electrode structure.

    PubMed

    Seo, Jooyeok; Nam, Sungho; Jeong, Jaehoon; Lee, Chulyeon; Kim, Hwajeong; Kim, Youngkyoo

    2015-01-14

    We report planar liquid crystal-gated-organic field-effect transistors (LC-g-OFETs) with a simple in-plane drain-source-gate electrode structure, which can be cost-effectively prepared by typical photolithography/etching processes. The LC-g-OFET devices were fabricated by forming the LC layer (4-cyano-4'-pentylbiphenyl, 5CB) on top of the channel layer (poly(3-hexylthiophene), P3HT) that was spin-coated on the patterned indium-tin oxide (ITO)-coated glass substrates. The LC-g-OFET devices showed p-type transistor characteristics, while a current saturation behavior in the output curves was achieved for the 50-150 nm-thick P3HT (channel) layers. A prospective on/off ratio (>1 × 10(3)) was obtained regardless of the P3HT thickness, whereas the resulting hole mobility (0.5-1.1 cm(2)/(V s)) at a linear regime was dependent on the P3HT thickness. The tilted ordering of 5CB at the LC-P3HT interfaces, which is induced by the gate electric field, has been proposed as a core point of working mechanism for the present LC-g-OFETs.

  2. Induced fields, charges and currents on a lineman engaged in transmission-line insulator washing

    SciTech Connect

    Abdel-Salam, M.; El-Mohandes, M.T.; Alghamdi, A.S.

    1995-12-31

    This paper is aimed to calculate the distribution of the field, induced charges and currents on a lineman engaged in transmission-line insulator washing. The method of analysis is based on the charge simulation technique. The lineman is modeled by small sphere for the head and a large sphere for the body. For simplicity, the tower is chosen of the duct type and the insulator of the suspension type. The transmission-line conductor is simulated by finite and semi-infinite line charges to account for the nonuniform distribution of conductor charge resulting from the suspension insulator and the supporting tower. As the purity of the washing water is high, the water spray is simulated by a thin conducting stick extending between the column insulator and the lineman sitting on the crossarm of the tower. This represents a three-dimensional field problem and care has been devoted in the choice of the number and coordinates of charges simulating the tower, the insulator, the conductor, the water spray and the lineman. The induced currents increase as the lineman approaches the insulator with the suspended line conductor. These currents are higher than those for insulated lineman and may exceed the safe limits.

  3. The Substrate is a pH-Controlled Second Gate of Electrolyte-Gated Organic Field-Effect Transistor.

    PubMed

    Di Lauro, Michele; Casalini, Stefano; Berto, Marcello; Campana, Alessandra; Cramer, Tobias; Murgia, Mauro; Geoghegan, Mark; Bortolotti, Carlo A; Biscarini, Fabio

    2016-11-23

    Electrolyte-gated organic field-effect transistors (EGOFETs), based on ultrathin pentacene films on quartz, were operated with electrolyte solutions whose pH was systematically changed. Transistor parameters exhibit nonmonotonic variation versus pH, which cannot be accounted for by capacitive coupling through the Debye-Helmholtz layer. The data were fitted with an analytical model of the accumulated charge in the EGOFET, where Langmuir adsorption was introduced to describe the pH-dependent charge buildup at the quartz surface. The model provides an excellent fit to the threshold voltage and transfer characteristics as a function of the pH, which demonstrates that quartz acts as a second gate controlled by pH and is mostly effective from neutral to alkaline pH. The effective capacitance of the device is always greater than the capacitance of the electrolyte, thus highlighting the role of the substrate as an important active element for amplification of the transistor response.

  4. Environmentally stable flexible metal-insulator-metal capacitors using zirconium-silicate and hafnium-silicate thin film composite materials as gate dielectrics.

    PubMed

    Meena, Jagan Singh; Chu, Min-Ching; Wu, Chung-Shu; Ravipati, Srikanth; Ko, Fu-Hsiang

    2011-08-01

    Fully flexible metal-insulator-metal (MIM) capacitors fabricated on 25 microm thin polyimide (PI) substrates via the surface sol-gel process using 10-nm-thick zirconium-silicate (ZrSixOy) and hafnium-silicate (HfSimOn) films as gate dielectrics. The surface morphology of the ZrSixOy and HfSimOn films were investigated using atomic force microscopy and scanning electron microscopy, which confirmed that continuous and crack-free surface growth had occurred on the PI. Both the films treated with oxygen (O2) plasma and annealing (ca. 250 degrees C) consisted of amorphous phase; confirmed by X-ray diffraction. We employed X-ray photoelectron spectroscopy (XPS) at high resolution to examine the chemical composition of the films subjected to various treatment conditions. The shift of the XPS peaks towards higher binding energy revealed the O2 plasma-pretreatment followed by annealing was the most effective process to the surface oxidation at relatively low-temperature, for further passivate the grease traps and making dielectric films thermally stable. The ZrSixOy and HfSimOn films in sandwich-like MIM configuration on the PI substrates exhibited the low leakage current densities of 7.1 x 10(-9) and 8.4 x 10(-9) A/cm2 at applied electric field of 10 MV/cm and maximum capacitance densities of 7.5 and 5.3 fF/microm2 at 1 MHz, respectively. In addition, the ZrSixOy and HfSimOn films in MIM capacitors showed the estimated dielectric constants of 8.2 and 6.0, respectively. Prior to use of flexible MIM capacitors in advanced flexible electronic devices; the reliability test was studied by applying day-dependent leakage current density measurements up to 30 days. These films of silicate-surfactant mesostructured materials have special interest to be used as gate dielectrics in future for flexible metal-oxide-semiconductor devices.

  5. Enhancement-mode Ga2O3 wrap-gate fin field-effect transistors on native (100) β-Ga2O3 substrate with high breakdown voltage

    NASA Astrophysics Data System (ADS)

    Chabak, Kelson D.; Moser, Neil; Green, Andrew J.; Walker, Dennis E.; Tetlak, Stephen E.; Heller, Eric; Crespo, Antonio; Fitch, Robert; McCandless, Jonathan P.; Leedy, Kevin; Baldini, Michele; Wagner, Gunter; Galazka, Zbigniew; Li, Xiuling; Jessen, Gregg

    2016-11-01

    Sn-doped gallium oxide (Ga2O3) wrap-gate fin-array field-effect transistors (finFETs) were formed by top-down BCl3 plasma etching on a native semi-insulating Mg-doped (100) β-Ga2O3 substrate. The fin channels have a triangular cross-section and are approximately 300 nm wide and 200 nm tall. FinFETs, with 20 nm Al2O3 gate dielectric and ˜2 μm wrap-gate, demonstrate normally-off operation with a threshold voltage between 0 and +1 V during high-voltage operation. The ION/IOFF ratio is greater than 105 and is mainly limited by high on-resistance that can be significantly improved. At VG = 0, a finFET with 21 μm gate-drain spacing achieved a three-terminal breakdown voltage exceeding 600 V without a field-plate.

  6. Gate controlled electronic transport in monolayer MoS{sub 2} field effect transistor

    SciTech Connect

    Zhou, Y. F.; Wang, B.; Yu, Y. J.; Wei, Y. D. E-mail: jianwang@hku.hk; Xian, H. M.; Wang, J. E-mail: jianwang@hku.hk

    2015-03-14

    The electronic spin and valley transport properties of a monolayer MoS{sub 2} are investigated using the non-equilibrium Green's function formalism combined with density functional theory. Due to the presence of strong Rashba spin orbit interaction (RSOI), the electronic valence bands of monolayer MoS{sub 2} are split into spin up and spin down Zeeman-like texture near the two inequivalent vertices K and K′ of the first Brillouin zone. When the gate voltage is applied in the scattering region, an additional strong RSOI is induced which generates an effective magnetic field. As a result, electron spin precession occurs along the effective magnetic field, which is controlled by the gate voltage. This, in turn, causes the oscillation of conductance as a function of the magnitude of the gate voltage and the length of the gate region. This current modulation due to the spin precession shows the essential feature of the long sought Datta-Das field effect transistor (FET). From our results, the oscillation periods for the gate voltage and gate length are found to be approximately 2.2 V and 20.03a{sub B} (a{sub B} is Bohr radius), respectively. These observations can be understood by a simple spin precessing model and indicate that the electron behaviors in monolayer MoS{sub 2} FET are both spin and valley related and can easily be controlled by the gate.

  7. Influence of line-edge roughness on multiple-gate tunnel field-effect transistors

    NASA Astrophysics Data System (ADS)

    Choi, Woo Young

    2017-04-01

    The influence of fin-line-edge roughness (fin-LER) and gate-LER on multiple-gate (MG) tunnel field-effect transistors (TFETs) has been investigated compared with MG MOSFETs by using full three-dimensional technology computer-aided design (TCAD) simulation. From simulation results, two interesting results have been observed. First, MG TFETs show much less severe gate-LER than MG MOSFETs, which means that only fin-LER can be considered when evaluating the total LER of MG TFETs. Second, TFETs show ∼3× more LER improvement than MOSFETs when their structures are changed from double-gate (DG) to triple-gate (TG) ones. Our findings provide the useful design guidelines of variation-tolerant TFETs.

  8. Effect of Polymer Gate Dielectrics on Charge Transport in Carbon Nanotube Network Transistors: Low-k Insulator for Favorable Active Interface.

    PubMed

    Lee, Seung-Hoon; Xu, Yong; Khim, Dongyoon; Park, Won-Tae; Kim, Dong-Yu; Noh, Yong-Young

    2016-11-30

    Charge transport in carbon nanotube network transistors strongly depends on the properties of the gate dielectric that is in direct contact with the semiconducting carbon nanotubes. In this work, we investigate the dielectric effects on charge transport in polymer-sorted semiconducting single-walled carbon nanotube field-effect transistors (s-SWNT-FETs) by using three different polymer insulators: A low-permittivity (εr) fluoropolymer (CYTOP, εr = 1.8), poly(methyl methacrylate) (PMMA, εr = 3.3), and a high-εr ferroelectric relaxor [P(VDF-TrFE-CTFE), εr = 14.2]. The s-SWNT-FETs with polymer dielectrics show typical ambipolar charge transport with high ON/OFF ratios (up to ∼10(5)) and mobilities (hole mobility up to 6.77 cm(2) V(-1) s(-1) for CYTOP). The s-SWNT-FET with the lowest-k dielectric, CYTOP, exhibits the highest mobility owing to formation of a favorable interface for charge transport, which is confirmed by the lowest activation energies, evaluated by the fluctuation-induced tunneling model (FIT) and the traditional Arrhenius model (EaFIT = 60.2 meV and EaArr = 10 meV). The operational stability of the devices showed a good agreement with the activation energies trend (drain current decay ∼14%, threshold voltage shift ∼0.26 V in p-type regime of CYTOP devices). The poor performance in high-εr devices is accounted for by a large energetic disorder caused by the randomly oriented dipoles in high-k dielectrics. In conclusion, the low-k dielectric forms a favorable interface with s-SWNTs for efficient charge transport in s-SWNT-FETs.

  9. Long Term Field Test of Polymer Insulator on 77kV Transmission Line

    NASA Astrophysics Data System (ADS)

    Tanaka, Nobuya; Kuroyagi, Toshiyuki; Niihara, Sadao

    As an anti-Vandalism measure, polymer insulator which is light and shows good performance in contamination withstand voltage is already adopted to many new power transmission lines mainly in U.S.A. However, it is said that aging deterioration is promoted by ultraviolet rays, ozone, leakage current and partial discharge because polymer insulator is made of organic materials. It is important that we seize the characteristics of aging deterioration to maintain power transmission lines. As polymer insulator for power transmission lines is more expensive than ceramic one, it is scarely used in Japan, and there is no data in the field. In this study, we installed polymer insulator to 77kV power transmission line and carried out field test for nine years from 1997 to 2006 and investigated electrical and mechanical characteristics of them.

  10. Fabrication of a metal-oxide-semiconductor-type capacitive microtip array using SiO2 or HfO2 gate insulators

    NASA Astrophysics Data System (ADS)

    Kim, Kyung-Min; Choi, Byung Joon; Kim, Seong Keun; Hwang, Cheol Seong

    2004-11-01

    Capacitive tip arrays having a metal-insulator-semiconductor capacitor structure were fabricated using thermally oxidized SiO2 or atomic-layer-deposited HfO2 gate dielectric films for their application to scanning-probe-array-type memory devices. The SiO2 film showed a nonuniform thickness distribution over the flat and tip areas of the arrays owing to the different oxidation speeds of the flat and tip Si surfaces. This resulted in a smaller sensing margin of the device. However, the high-dielectric HfO2 film showed not only a higher capacitance value but also a more uniform growth behavior over the whole area, which would result in a better device performance. The capacitance-voltage characteristics of both devices coincide well with the simulation results based on conventional metal-insulator-semiconductor theories.

  11. Effect of nitrogen incorporation into Al-based gate insulators in AlON/AlGaN/GaN metal-oxide-semiconductor structures

    NASA Astrophysics Data System (ADS)

    Asahara, Ryohei; Nozaki, Mikito; Yamada, Takahiro; Ito, Joyo; Nakazawa, Satoshi; Ishida, Masahiro; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2016-10-01

    The superior physical and electrical properties of aluminum oxynitride (AlON) gate dielectrics on AlGaN/GaN substrates in terms of thermal stability, reliability, and interface quality were demonstrated by direct AlON deposition and subsequent annealing. Nitrogen incorporation into alumina was proven to be beneficial both for suppressing intermixing at the insulator/AlGaN interface and reducing the number of electrical defects in Al2O3 films. Consequently, we achieved high-quality AlON/AlGaN/GaN metal-oxide-semiconductor capacitors with improved stability against charge injection and a reduced interface state density as low as 1.2 × 1011 cm-2 eV-1. The impact of nitrogen incorporation into the insulator will be discussed on the basis of experimental findings.

  12. Moffett Field Funnel and Gate TCE Treatment System: Interpretation of Field Performance using Reactive Transport Modeling

    SciTech Connect

    Yabusaki, Steven B.; Cantrell, Kirk J.; Sass, B. M.

    2001-06-30

    A multicomponent reactive transport simulator was used to understand the behavior of chemical components, including TCE and cis-1,2-DCE, in groundwater transported through the pilot-scale funnel and gate chemical treatment system at Moffett Field, California. Field observations indicated that zero-valent iron emplaced in the gate to effect the destruction of chlorinated hydrocarbons also resulted in increases in pH and hydrocarbons, as well as decreases in EH, alkalinity, dissolved O2 and CO2, and major ions (i.e., Ca, Mg, Cl, sulfate, nitrate). Of concern are chemical transformations that may reduce the effectiveness or longevity of the iron cell and/or create secondary contaminants. A coupled model of transport and reaction processes was developed to account for mobile and immobile components undergoing equilibrium and kinetic reactions including TCE degradation, parallel iron dissolution reactions, precipitation of secondary minerals, and complexation reactions. The model reproduced solution chemistry observed in the iron cell using reaction parameters from the literature and laboratory studies. Mineral precipitation in the iron zone, which is critical to correctly predicting the aqueous concentrations, was predicted to account for up to 3 percent additional mineral volume annually. Interplay between rates of transport and rates of reaction in the field was key to understanding system behavior.

  13. Impact of gate leakage considerations in tunnel field effect transistor design

    NASA Astrophysics Data System (ADS)

    Chaturvedi, Poornendu; Jagadesh Kumar, M.

    2014-07-01

    In this paper, we have presented the impact of the gate leakage through thin gate dielectrics (SiO2 and high-\\k{appa} gate dielectric) on the subthreshold characteristics of the tunnel field effect transistors (TFET) for a low operating voltage of 0.5 V. Using calibrated two-dimensional simulations it is shown that even for such a low operating voltage, the gate leakage substantially degrades several subthreshold parameters of the TFET such as the off-state current, minimum subthreshold swing and average subthreshold swing. While the drain-offset as well as the short-gate are effective methods for reducing the gate leakage, we show that if the gate tunneling leakage is not considered, even for these two methods, the overall TFET off-state current will be significantly underestimated. Our results demonstrate the need to carefully account for the gate leakage in the design of TFETs just as it is done for the conventional nanoscale MOSFETs.

  14. Gate-control efficiency and interface state density evaluated from capacitance-frequency-temperature mapping for GaN-based metal-insulator-semiconductor devices

    SciTech Connect

    Shih, Hong-An; Kudo, Masahiro; Suzuki, Toshi-kazu

    2014-11-14

    We present an analysis method for GaN-based metal-insulator-semiconductor (MIS) devices by using capacitance-frequency-temperature (C-f-T) mapping to evaluate the gate-control efficiency and the interface state density, both exhibiting correlations with the linear-region intrinsic transconductance. The effectiveness of the method was exemplified by application to AlN/AlGaN/GaN MIS devices to elucidate the properties of AlN-AlGaN interfaces depending on their formation processes. Using the C-f-T mapping, we extract the gate-bias-dependent activation energy with its derivative giving the gate-control efficiency, from which we evaluate the AlN-AlGaN interface state density through the Lehovec equivalent circuit in the DC limit. It is shown that the gate-control efficiency and the interface state density have correlations with the linear-region intrinsic transconductance, all depending on the interface formation processes. In addition, we give characterization of the AlN-AlGaN interfaces by using X-ray photoelectron spectroscopy, in relation with the results of the analysis.

  15. Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol) for the Gate Insulator of Pentacene-Based Thin-Film Transistors.

    PubMed

    Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran

    2017-07-03

    In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W).

  16. Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol) for the Gate Insulator of Pentacene-Based Thin-Film Transistors

    PubMed Central

    Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran

    2017-01-01

    In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W). PMID:28773101

  17. A Novel Gate Electrode Structure for Reduction of Gate Resistance of Sub-0.1 µm RF/Mixed-Signal Metal Oxide Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Nagase, Hirokazu; Tanabe, Akira; Umeda, Kyoko; Watanabe, Takashi; Hayashi, Yoshihiro

    2009-04-01

    To reduce noise and enhance gain for scaled-down metal oxide semiconductor field-effect transistors (MOSFETs), a novel gate electrode structure “direct finger contact (DFC)” is proposed. The DFC structure reduces the gate electrode resistance by 40%. NF50 (noise figure when the input impedance is 50 Ω) is reduced by 4% with the gate length L = 48 nm, the gate width Wfinger =1 µm, and the number of finger N =20. This structure is suitable for low-noise sub-0.1 µm RF/mixed-signal system on chips (SoCs).

  18. Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors

    PubMed Central

    Mao, Ling-Feng; Ning, Huansheng; Huo, Zong-Liang; Wang, Jin-Yan

    2015-01-01

    A new physical model of the gate controlled Schottky barrier height (SBH) lowering in top-gated graphene field-effect transistors (GFETs) under saturation bias condition is proposed based on the energy conservation equation with the balance assumption. The theoretical prediction of the SBH lowering agrees well with the experimental data reported in literatures. The reduction of the SBH increases with the increasing of gate voltage and relative dielectric constant of the gate oxide, while it decreases with the increasing of oxide thickness, channel length and acceptor density. The magnitude of the reduction is slightly enhanced under high drain voltage. Moreover, it is found that the gate oxide materials with large relative dielectric constant (>20) have a significant effect on the gate controlled SBH lowering, implying that the energy relaxation of channel electrons should be taken into account for modeling SBH in GFETs. PMID:26674338

  19. Meta-gated channel for the discrete control of electromagnetic fields

    NASA Astrophysics Data System (ADS)

    Yang, Rui; Wang, Hui; Shi, Ayuan; Zhang, Aofang; Wang, Jing; Gao, Dongxing; Lei, Zhenya; Hu, Bowei

    2016-08-01

    We demonstrate the meta-gate controlled wave propagation through multiple metallic plates with properly devised sub-wavelength defect apertures. Different from using gradient refractive-index meta-materials or phase-discontinuity meta-surfaces to produce the discrepancy between the incident angle and the refractive angle, our technique redirects electromagnetic fields by setting-up discrete transmission gateways between adjacent meta-gates and creates the perfect channels for the wave propagation. Electromagnetic fields can be assigned in the response of the driving frequency of meta-gates with extraordinary transmissions and propagate simply relying on their pre-set locations as illustrated by the meta-gate guided electromagnetic fields travelling in the paths of the Silk-Road and the contour line of Xi'an city where the Silk-Road starts. The meta-gate concept, offering the feasibility of the discrete control of electromagnetic fields with gating routes, may pave an alternative way for precisely transmitting of signals and efficiently sharing of resource in the communication.

  20. Field Programmable Gate Array Control of Power Systems in Graduate Student Laboratories

    DTIC Science & Technology

    2008-03-01

    Transistor kHz Kilohertz LUT Lookup Table LPF Lowpass Filter NPS Naval Postgraduate School OPAMP Operational Amplifier PCB Printed Circuit...VSC employing three parallel-connected half- bridges with an Insulated Gate Bipolar Transistor (IGBT) diode brake for protection; a MEMECTM Virtex-4...T 2 0 T 2 2 T 2 1 T 2 1 T 2 2 T Sector II Sector I pnn pnn ppn ppn ppp nnn nnn npn npn ppn ppn ppp nnn nnn 4 0 T 4 0 T 2 0 T 2 1 T 2 2 T 2 2 T 2 1 T 4

  1. A carbon nanotube field effect transistor with a suspended nanotube gate.

    PubMed

    Tarakanov, Yury A; Kinaret, Jari M

    2007-08-01

    We investigate theoretically field effect transistors based on single-walled carbon nanotubes (CNTFET) and explore two device geometries with suspended multiwalled carbon nanotubes (MWNT) functioning as gate electrodes. In the two geometries, a doubly or singly clamped MWNT is electrostatically deflected toward the transistor channel, allowing for a variable gate coupling and leading to, for instance, a superior subthreshold slope. We suggest that the proposed designs can be used as nanoelectromechanical switches and as detectors of mechanical motion on the nanoscale.

  2. Gate-induced carrier delocalization in quantum dot field effect transistors.

    PubMed

    Turk, Michael E; Choi, Ji-Hyuk; Oh, Soong Ju; Fafarman, Aaron T; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R; Kikkawa, James M

    2014-10-08

    We study gate-controlled, low-temperature resistance and magnetotransport in indium-doped CdSe quantum dot field effect transistors. We show that using the gate to accumulate electrons in the quantum dot channel increases the "localization product" (localization length times dielectric constant) describing transport at the Fermi level, as expected for Fermi level changes near a mobility edge. Our measurements suggest that the localization length increases to significantly greater than the quantum dot diameter.

  3. Self-Aligned ALD AlOx T-gate Insulator for Gate Leakage Current Suppression in SiNx-Passivated AlGaN/GaN HEMTs

    DTIC Science & Technology

    2010-01-01

    blanket-deposited between the source and drain, as has been demonstrated by Ye et al. [21]. Similiarly, Saadat and co-workers have used ALD-deposited HfOx...been reported previously by Saadat et al. [22] and noted to be indicative of slow trapping centers in the oxide and at the oxide/semiconductor...gate dielectric. Appl Phys Lett 2005;86:063501–3. [22] Saadat OI, Chung JW, Piner EL, Palacios T. Gate-first AlGaN/GaN HEMT technology for high-frequency

  4. Field-Driven Mott Gap Collapse and Resistive Switch in Correlated Insulators

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Amaricci, A.; Capone, M.; Fabrizio, M.

    2016-10-01

    Mott insulators are "unsuccessful metals" in which Coulomb repulsion prevents charge conduction despite a metal-like concentration of conduction electrons. The possibility to unlock the frozen carriers with an electric field offers tantalizing prospects of realizing new Mott-based microelectronic devices. Here we unveil how such unlocking happens in a simple model that shows the coexistence of a stable Mott insulator and a metastable metal. Considering a slab subject to a linear potential drop, we find, by means of the dynamical mean-field theory, that the electric breakdown of the Mott insulator occurs via a first-order insulator-to-metal transition characterized by an abrupt gap collapse in sharp contrast to the standard Zener breakdown. The switch on of conduction is due to the field-driven stabilization of the metastable metallic phase. Outside the region of insulator-metal coexistence, the electric breakdown occurs through a more conventional quantum tunneling across the Hubbard bands tilted by the field. Our findings rationalize recent experimental observations and may offer a guideline for future technological research.

  5. Thirty-Day-Long Data Retention in Ferroelectric-Gate Field-Effect Transistors with HfO2 Buffer Layers

    NASA Astrophysics Data System (ADS)

    Takahashi, Kazuhiro; Aizawa, Koji; Park, Byung-Eun; Ishiwara, Hiroshi

    2005-08-01

    Metal-ferroelectric-insulator-semiconductor (MFIS) diodes and p-channel MFIS field-effect transistors (FETs) were fabricated and their electrical properties were characterized. These MFIS structures were formed using HfO2 as an insulating buffer layer, and SrBi2Ta2O9 (SBT) and (Bi,La)4Ti3O12 (BLT) as ferroelectric films. HfO2 buffer layers of about 8 nm physical thickness were deposited by ultrahigh-vacuum (UHV) electron-beam evaporation, then ferroelectric films of about 400 nm thickness were deposited by sol-gel spin coating. The fabricated p-channel MFIS-FETs with the SBT/HfO2 gate structure exhibited a drain current on/off ratio larger than 103 even after 30 days had elapsed. It was also found that the degradation of ferroelectricity was not pronounced even after applying 2.2× 1011 bipolar pulses.

  6. Tuning phase transitions in FeSe thin flakes by field-effect transistor with solid ion conductor as the gate dielectric

    NASA Astrophysics Data System (ADS)

    Lei, B.; Wang, N. Z.; Shang, C.; Meng, F. B.; Ma, L. K.; Luo, X. G.; Wu, T.; Sun, Z.; Wang, Y.; Jiang, Z.; Mao, B. H.; Liu, Z.; Yu, Y. J.; Zhang, Y. B.; Chen, X. H.

    2017-01-01

    We have developed a field-effect transistor (FET) device using a solid ion conductor (SIC) as the gate dielectric, which can tune the carrier density of FeSe by driving lithium ions in and out of the FeSe thin flakes and consequently control the physical properties and phase transitions. A dome-shaped superconducting phase diagram was mapped out with increasing Li content, with Tc˜46.6 K for optimal doping, and an insulating phase was reached at the extremely overdoped regime. Our study suggests that, by using a solid ion conductor as the gate dielectric, the SIC-FET device is able to induce much higher carrier doping in the bulk, suit many surface-sensitive experimental probes, and stabilize structural phases that are inaccessible in ordinary conditions.

  7. Field-Induced Reversible Phase Manipulation in Metal-Insulator Transition using Scanning Tunneling Microscopy

    NASA Astrophysics Data System (ADS)

    Park, Se Jun

    2005-03-01

    Reversible electronic switching between insulating and metallic phases is a novel idea that may allow new types of field effect devices feasible.^1 Here we demonstrate the reversible manipulation between metallic and insulating phases in two-dimensional In nanowire arrays on Si(111) surface near the metal-insulator transition temperature (Tc). The electronic switching of phases was induced by local electric field applied by the probe tip of a scanning tunneling microscope. The field-dependent hysteresis behavior was also observed in tip height measurements as a function of the sample bias, under the constraint of constant tunneling current. A model including the intrinsic bi-stability of the nanometer-scale domains of In nanowire arrays will be discussed. ^1C. Ahn, J. Triscone, J. Mannhart, Nature 6952, 1015 (2003)

  8. Field programmable gate arrays: Evaluation report for space-flight application

    NASA Technical Reports Server (NTRS)

    Sandoe, Mike; Davarpanah, Mike; Soliman, Kamal; Suszko, Steven; Mackey, Susan

    1992-01-01

    Field Programmable Gate Arrays commonly called FPGA's are the newer generation of field programmable devices and offer more flexibility in the logic modules they incorporate and in how they are interconnected. The flexibility, the number of logic building blocks available, and the high gate densities achievable are why users find FPGA's attractive. These attributes are important in reducing product development costs and shortening the development cycle. The aerospace community is interested in incorporating this new generation of field programmable technology in space applications. To this end, a consortium was formed to evaluate the quality, reliability, and radiation performance of FPGA's. This report presents the test results on FPGA parts provided by ACTEL Corporation.

  9. Additional-Body Effects in a Self-Aligned Deca-Nanometer Ultrathin-Body and Buried Oxide Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistor: A Three-Dimensional Simulation Study

    NASA Astrophysics Data System (ADS)

    Lin, Jyi-Tsong; Eng, Yi-Chuen; Chen, Cheng-Hsin; Fan, Yi-Hsuan

    2011-11-01

    In this paper, we numerically investigate the additional-body effects (ABEs) created by the isolation-last fabrication process of a self-aligned deca-nanometer ultrathin-body and buried oxide (UTBB) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET). The reasons for the device's new electrical characteristics are also explained in detail. The additional silicon body volumes of the UTBB SOI MOSFET are found to improve the subthreshold swing and the on/off current ratio. The additional body has a negative effect, however, upon both the gate leakage current and the total gate capacitance, when compared with a standard UTBB SOI MOSFET.

  10. Static electric field in one-dimensional insulators without boundaries

    NASA Astrophysics Data System (ADS)

    Chen, Kuang-Ting; Lee, Patrick A.

    2011-09-01

    In this brief report, we show that in a one-dimensional insulating system with periodic boundary conditions, the coefficient of the θ term in the effective theory is not only determined by the topological index ∫i∑α∈occukα(∂)/(∂k)ukαdk. Specifically, the relative position between the electronic orbitals and the ions also alters the coefficient, as one would expect when one identifies -eθ/2π as the polarization. This resolves a paradox when we apply our previous result to the Su-Shreiffer-Heeger model, where the two ground states related by a lattice translation have θ differed by π. We also show that the static dielectric screening is the same with or without boundaries, in contrast to comments made in our previous paper.

  11. Insights into operation of planar tri-gate tunnel field effect transistor for dynamic memory application

    NASA Astrophysics Data System (ADS)

    Navlakha, Nupur; Kranti, Abhinav

    2017-07-01

    Insights into device physics and operation through the control of energy barriers are presented for a planar tri-gate Tunnel Field Effect Transistor (TFET) based dynamic memory. The architecture consists of a double gate (G1) at the source side and a single gate (G2) at the drain end of the silicon film. Dual gates (G1) effectively enhance the tunneling based read mechanism through the enhanced coupling and improved electrostatic control over the channel. The single gate (G2) controls the holes in the potential barrier induced through the proper selection of bias and workfunction. The results indicate that the planar tri-gate achieves optimum performance evaluated in terms of two composite metrics (M1 and M2), namely, product of (i) Sense Margin (SM) and Retention Time (RT) i.e., M1 = SM × RT and (ii) Sense Margin and Current Ratio (CR) i.e., M2 = SM × CR. The regulation of barriers created by the gates (G1 and G2) through the optimal use of device parameters leads to better performance metrics, with significant improvement at scaled lengths as compared to other tunneling based dynamic memory architectures. The investigation shows that lengths of G1, G2 and lateral spacing can be scaled down to 25 nm, 50 nm, and 30 nm, respectively, while achieving reasonable values for (M1, M2). The work demonstrates a systematic approach to showcase the advancement in TFET based Dynamic Random Access Memory (DRAM) through the use of planar tri-gate topology at a lower bias value. The concept, design, and operation of planar tri-gate architecture provide valuable viewpoints for TFET based DRAM.

  12. Field evaporation of insulators and semiconductors: Theoretical insights for ZnO.

    PubMed

    Karahka, Markus; Kreuzer, H J

    2015-12-01

    We look at the new challenges associated with Atom Probe Tomography of insulators and semiconductors with regard to local fields inside and on the surface of such materials. The theoretical discovery that in high fields the band gap in these materials is drastically reduced to the point where at the evaporation field strength it vanishes will be crucial in our discussion. To understand Atom Probe results on the field evaporation of insulators and semiconductors we use density functional theory on ZnO clusters to follow the structural and electronic changes during field evaporation and to obtain potential energy curves, HOMO-LUMO gaps, field distributions, desorption pathways and fragments, dielectric constants, and polarizabilities. We also examine the effects of electric field reversal on the evaporation of ZnO and compare the results with Si.

  13. 100-nm-size ferroelectric-gate field-effect transistor with 108-cycle endurance

    NASA Astrophysics Data System (ADS)

    Van Hai, Le; Takahashi, Mitsue; Zhang, Wei; Sakai, Shigeki

    2015-08-01

    The fabrication process of 100-nm-size ferroelectric-gate field-effect transistors (FeFETs) with high endurance was reported. The FeFETs had Pt/Sr0.8Ca0.2Bi2Ta2O9 (SCBT)/HfO2/Si stacks where the Pt gate length was 100 nm. The FeFETs were successfully fabricated by integrating many technologies such as fine patterning of etching masks by electron-beam lithography, precise anisotropic etching of the gate stacks, well-controlled ion implantation for gate-self-aligned sources and drains, and the sidewall-cover process that we had developed. Good performances of the FeFETs were characterized by the endurance of 108 program-and-erase cycles with negligible threshold-voltage shift and good drain-current retention for 3.98 × 105 s.

  14. Enhancement of Dimension Uniformity of Wet-Etched Thick Insulator Holes in Triode Carbon Nanotube Field-Emission Display Devices

    NASA Astrophysics Data System (ADS)

    Wei, Hsiao-Fen; Hsiue, Ging-Ho; Liu, Chin-Yh; Chen, Kuo-Feng

    2008-12-01

    A triode structure carbon nanotube field-emission display was fabricated using the thick-film process. The critical dimensional uniformity of wet-etched thick insulator holes was enhanced by changing the wet etching mechanism from vertical dip-etching to horizontal spray-etching. The profile of the insulator holes fabricated using the new etcher was similar to anisotropic. After optimizing the operation conditions of the new etcher, the dimensional uniformity of the insulator holes increased to 97.7%. The optimal concentration of etchant was 2.2 wt % for achieving the least side etching of the insulator holes. The carbon nanotube paste was pattern-printed into the insulator holes. The uniform size of the insulator holes implied that the carbon nanotube distribution was similarly among the insulator holes. This result showed an improved uniform field emission image over the panel from 59 to 83.85%.

  15. Thermal Performance of Cryogenic Piping Multilayer Insulation in Actual Field Installations

    NASA Technical Reports Server (NTRS)

    Fesmire, J.; Augustnynowicz, S.; Thompson, K. (Technical Monitor)

    2002-01-01

    A standardized way of comparing the thermal performance of different pipelines in different sizes is needed. Vendor data for vacuum-insulated piping are typically given in heat leak rate per unit length (W/m) for a specific diameter pipeline. An overall k-value for actual field installations (k(sub oafi)) is therefore proposed as a more generalized measure for thermal performance comparison and design calculation. The k(sub oafi) provides a direct correspondence to the k-values reported for insulation materials and illustrates the large difference between ideal multilayer insulation (MLI) and actual MLI performance. In this experimental research study, a section of insulated piping was tested under cryogenic vacuum conditions, including simulated spacers and bending. Several different insulation systems were tested using a 1-meter-long cylindrical cryostat test apparatus. The simulated spacers tests showed significant degradation in the thermal performance of a given insulation system. An 18-meter-long pipeline test apparatus is now in operation at the Cryogenics Test Laboratory, NASA Kennedy Space Center, for conducting liquid nitrogen thermal performance tests.

  16. Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

    PubMed

    Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

    2017-06-28

    β-gallium oxide (β-Ga2O3) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga2O3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga2O3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

  17. Electron valence-band tunneling-induced Lorentzian noise in deep submicron silicon-on-insulator metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Lukyanchikova, N. B.; Petrichuk, M. V.; Garbar, N.; Mercha, A.; Simoen, E.; Claeys, C.

    2003-10-01

    In this article, the impact of several electrical and technological parameters on a particular type of Lorentzian noise, occurring in deep submicron silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors with an ultrathin gate dielectric is described and a semi-empirical model is proposed that captures the main features of the experimental behavior. It is shown that the noise takes place in both n- and p-channel partially depleted SOI transistors. The excess Lorentzians are also found in the n-channel fully depleted devices studied, whereby the noise plateau amplitude [SI(0)] increases for a more negative back-gate bias, putting the back interface into stronger accumulation. The dependence of the characteristic time constant τ and SI(0) on transistor length, drain, front- and back-gate bias is reported, where from a first-order model is derived. The latter is based on the idea that the excess Lorentzian noise originates from filtered shot noise induced by majority carriers, that are injected in the floating body of the transistors by electron valence-band tunneling across the ultrathin (2.5 nm) gate oxide.

  18. Insulator-metal transitions induced by electric field and photoirradiation in organic Mott insulator deuterated κ-(BEDT-TTF)2Cu[N(CN)2]Br.

    PubMed

    Sabeth, Farzana; Iimori, Toshifumi; Ohta, Nobuhiro

    2012-04-25

    The Mott insulator-metal transition induced by an external stimulus such as electric field, pressure, chemical doping, or photoirradiation has received considerable attention because of the potential use in new optoelectronic functional devices. Here we report an abrupt Mott insulator-metal transition observed as a current jump in a molecular-based Mott insulator, namely, deuterated κ-(BEDT-TTF)(2)Cu[N(CN)(2)]Br, where BEDT-TTF = bis(ethylenedithio)tetrathiafulvalene, upon application of a pulsed voltage of certain magnitude (threshold voltage). Furthermore, the threshold voltage needed for the transition is shown to be reduced by photoirradiation. Thus, the Mott insulator-metal transition can be controlled by a combination of an external electric field and photoirradiation.

  19. DNA manipulation by means of insulator-based dielectrophoresis employing direct current electric fields.

    PubMed

    Gallo-Villanueva, Roberto C; Rodríguez-López, Carlos E; Díaz-de-la-Garza, Rocío I; Reyes-Betanzo, Claudia; Lapizco-Encinas, Blanca H

    2009-12-01

    Electrokinetic techniques offer a great potential for biological particle manipulation. Among these, dielectrophoresis (DEP) has been successfully utilized for the concentration of bioparticles. Traditionally, DEP is performed employing microelectrodes, an approach with attractive characteristics but expensive due to microelectrode fabrication costs. An alternative is insulator-based DEP, a method where non-uniform electric fields are created with arrays of insulating structures. This study presents the concentration of linear DNA particles (pET28b) employing a microchannel, with an array of cylindrical insulating structures and direct current electric fields. Results showed manipulation of DNA particles with a combination of electroosmotic, electrophoretic, and dielectrophoretic forces. Employing suspending media with conductivity of 104 muS/cm and pH of 11.15, under applied fields between 500 and 1500 V/cm, DNA particles were observed to be immobilized due to negative dielectrophoretic trapping. The observation of DNA aggregates that occurred at higher applied fields, and dispersed once the field was removed is also included. Finally, concentration factors varying from 8 to 24 times the feed concentration were measured at 2000 V/cm after concentration time-periods of 20-40 s. The results presented here demonstrate the potential of insulator-based DEP for DNA concentration, and open the possibility for fast DNA manipulation for laboratory and large-scale applications.

  20. Interplay between Rashba interaction and electromagnetic field in the edge states of a two-dimensional topological insulator

    NASA Astrophysics Data System (ADS)

    Dolcini, Fabrizio

    2017-02-01

    The effects of Rashba interaction and electromagnetic field on the edge states of a two-dimensional topological insulator are investigated in a nonperturbative way. We show that the electron dynamics is equivalent to a problem of massless Dirac fermions propagating with an inhomogeneous velocity, enhanced by the Rashba profile with respect to the bare Fermi value vF. Despite the inelastic and time-reversal breaking processes induced by the electromagnetic field, no backscattering occurs without interaction. The photoexcited electron densities are explicitly obtained in terms of the electric field and the Rashba interaction, and are shown to fulfill generalized chiral anomaly equations. The case of a Gaussian electromagnetic pulse is analyzed in detail. When the photoexcitation occurs far from the Rashba region, the latter effectively acts as a "superluminal gate" boosting the photoexcited wave packet outside the light-cone determined by vF. In contrast, for an electric pulse overlapping the Rashba region, the emerging wave packets are squeezed in a manner that depends on the overlap area. The electron-electron interaction effects are also discussed, for both intraspin and interspin density-density coupling. The results suggest that Rashba interaction, often considered as an unwanted disorder effect, may be exploited to tailor the shape and the propagation time of photoexcited spin-polarized wave packets.

  1. Large field-of-view range-gated laser imaging based on image fusion

    NASA Astrophysics Data System (ADS)

    Ren, Pengdao; Wang, Xinwei; Sun, Liang; You, Ruirong; Lei, Pingshun; Zhou, Yan

    2016-11-01

    Laser range-gated imaging has great potentials in remote night surveillance with far detection distance and high resolution, even if under bad weather conditions such as fog, snow and rain. However, the field of view (FOV) is smaller than large objects like buildings, towers and mountains, thus only parts of targets are observed in one single frame, so that it is difficult for targets identification. Apparently, large FOV is beneficial to solve the problem, but the detection range is not available due to low illumination density in a large field of illumination matching with the FOV. Therefore, a large field-of-view range-gated laser imaging is proposed based on image fusion in this paper. Especially an image fusion algorithm has been developed for low contrast images. First of all, an infrared laser range-gated system is established to acquire gate images with small FOV for three different scenarios at night. Then the proposed image fusion algorithm is used for generating panoramas for the three groups of images respectively. Compared with raw images directly obtained by the imaging system, the fused images have a larger FOV with more detail target information. The experimental results demonstrate that the proposed image fusion algorithm is effective to expand the FOV of range-gated imaging.

  2. Strain Gated Bilayer Molybdenum Disulfide Field Effect Transistor with Edge Contacts

    PubMed Central

    Chai, Yu; Su, Shanshan; Yan, Dong; Ozkan, Mihrimah; Lake, Roger; Ozkan, Cengiz S.

    2017-01-01

    Silicon nitride stress capping layer is an industry proven technique for increasing electron mobility and drive currents in n-channel silicon MOSFETs. Herein, the strain induced by silicon nitride is firstly characterized through the changes in photoluminescence and Raman spectra of a bare bilayer MoS2 (Molybdenum disulfide). To make an analogy of the strain-gated silicon MOSFET, strain is exerted to a bilayer MoS2 field effect transistor (FET) through deposition of a silicon nitride stress liner that warps both the gate and the source-drain area. Helium plasma etched MoS2 layers for edge contacts. Current on/off ratio and other performance metrics are measured and compared as the FETs evolve from back-gated, to top-gated and finally, to strain-gated configurations. While the indirect band gap of bilayer MoS2 at 0% strain is 1.25 eV, the band gap decreases as the tensile strain increases on an average of ~100 meV per 1% tensile strain, and the decrease in band gap is mainly due to lowering the conduction band at K point. Comparing top- and strain-gated structures, we find a 58% increase in electron mobility and 46% increase in on-current magnitude, signalling a benign effect of tensile strain on the carrier transport properties of MoS2. PMID:28186113

  3. Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.

    2006-01-01

    Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

  4. Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

    2005-01-01

    Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

  5. Strain Gated Bilayer Molybdenum Disulfide Field Effect Transistor with Edge Contacts.

    PubMed

    Chai, Yu; Su, Shanshan; Yan, Dong; Ozkan, Mihrimah; Lake, Roger; Ozkan, Cengiz S

    2017-02-10

    Silicon nitride stress capping layer is an industry proven technique for increasing electron mobility and drive currents in n-channel silicon MOSFETs. Herein, the strain induced by silicon nitride is firstly characterized through the changes in photoluminescence and Raman spectra of a bare bilayer MoS2 (Molybdenum disulfide). To make an analogy of the strain-gated silicon MOSFET, strain is exerted to a bilayer MoS2 field effect transistor (FET) through deposition of a silicon nitride stress liner that warps both the gate and the source-drain area. Helium plasma etched MoS2 layers for edge contacts. Current on/off ratio and other performance metrics are measured and compared as the FETs evolve from back-gated, to top-gated and finally, to strain-gated configurations. While the indirect band gap of bilayer MoS2 at 0% strain is 1.25 eV, the band gap decreases as the tensile strain increases on an average of ~100 meV per 1% tensile strain, and the decrease in band gap is mainly due to lowering the conduction band at K point. Comparing top- and strain-gated structures, we find a 58% increase in electron mobility and 46% increase in on-current magnitude, signalling a benign effect of tensile strain on the carrier transport properties of MoS2.

  6. Strain Gated Bilayer Molybdenum Disulfide Field Effect Transistor with Edge Contacts

    NASA Astrophysics Data System (ADS)

    Chai, Yu; Su, Shanshan; Yan, Dong; Ozkan, Mihrimah; Lake, Roger; Ozkan, Cengiz S.

    2017-02-01

    Silicon nitride stress capping layer is an industry proven technique for increasing electron mobility and drive currents in n-channel silicon MOSFETs. Herein, the strain induced by silicon nitride is firstly characterized through the changes in photoluminescence and Raman spectra of a bare bilayer MoS2 (Molybdenum disulfide). To make an analogy of the strain-gated silicon MOSFET, strain is exerted to a bilayer MoS2 field effect transistor (FET) through deposition of a silicon nitride stress liner that warps both the gate and the source-drain area. Helium plasma etched MoS2 layers for edge contacts. Current on/off ratio and other performance metrics are measured and compared as the FETs evolve from back-gated, to top-gated and finally, to strain-gated configurations. While the indirect band gap of bilayer MoS2 at 0% strain is 1.25 eV, the band gap decreases as the tensile strain increases on an average of ~100 meV per 1% tensile strain, and the decrease in band gap is mainly due to lowering the conduction band at K point. Comparing top- and strain-gated structures, we find a 58% increase in electron mobility and 46% increase in on-current magnitude, signalling a benign effect of tensile strain on the carrier transport properties of MoS2.

  7. Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

    2005-01-01

    Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

  8. Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

    NASA Astrophysics Data System (ADS)

    Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Park, Sang-Hee Ko; Choi, Kyung Cheol

    2016-05-01

    We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al2O3, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔVth) was 0 V even after a PBS time (tstress) of 3000 s under a gate voltage (VG) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔVth value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔVth values resulting from PBS quantitatively, the average oxide charge trap density (NT) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher NT resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of NT near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

  9. Electric Field-Induced Skyrmion Crystals via Charged Monopoles in Insulating Helimagets

    NASA Astrophysics Data System (ADS)

    Watanabe, Haruki; Vishwanath, Ashvin

    2016-06-01

    Electrons propagating in a magnetically ordered medium experience an additional gauge field associated with the Berry phase of their spin following the local magnetic texture. In contrast to the usual electromagnetic field, this gauge field admits monopole excitations, corresponding to hedgehog defects of the magnetic order. In an insulator, these hedgehogs carry a well-defined electric charge allowing for them to be controlled by electric fields. One particularly robust mechanism that contributes to the charge is the orbital magnetoelectric effect, captured by a θ angle, which leads to a charge of eθ/2π on hedgehogs. This is a direct consequence of the Witten effect for magnetic monopoles in a θ medium. A physical consequence is that external electric fields can induce skyrmion crystal phases in insulating helimagnets.

  10. Terahertz-field-induced insulator-to-metal transition in vanadium dioxide metamaterial.

    PubMed

    Liu, Mengkun; Hwang, Harold Y; Tao, Hu; Strikwerda, Andrew C; Fan, Kebin; Keiser, George R; Sternbach, Aaron J; West, Kevin G; Kittiwatanakul, Salinporn; Lu, Jiwei; Wolf, Stuart A; Omenetto, Fiorenzo G; Zhang, Xin; Nelson, Keith A; Averitt, Richard D

    2012-07-19

    Electron-electron interactions can render an otherwise conducting material insulating, with the insulator-metal phase transition in correlated-electron materials being the canonical macroscopic manifestation of the competition between charge-carrier itinerancy and localization. The transition can arise from underlying microscopic interactions among the charge, lattice, orbital and spin degrees of freedom, the complexity of which leads to multiple phase-transition pathways. For example, in many transition metal oxides, the insulator-metal transition has been achieved with external stimuli, including temperature, light, electric field, mechanical strain or magnetic field. Vanadium dioxide is particularly intriguing because both the lattice and on-site Coulomb repulsion contribute to the insulator-to-metal transition at 340 K (ref. 8). Thus, although the precise microscopic origin of the phase transition remains elusive, vanadium dioxide serves as a testbed for correlated-electron phase-transition dynamics. Here we report the observation of an insulator-metal transition in vanadium dioxide induced by a terahertz electric field. This is achieved using metamaterial-enhanced picosecond, high-field terahertz pulses to reduce the Coulomb-induced potential barrier for carrier transport. A nonlinear metamaterial response is observed through the phase transition, demonstrating that high-field terahertz pulses provide alternative pathways to induce collective electronic and structural rearrangements. The metamaterial resonators play a dual role, providing sub-wavelength field enhancement that locally drives the nonlinear response, and global sensitivity to the local changes, thereby enabling macroscopic observation of the dynamics. This methodology provides a powerful platform to investigate low-energy dynamics in condensed matter and, further, demonstrates that integration of metamaterials with complex matter is a viable pathway to realize functional nonlinear

  11. A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

    SciTech Connect

    Dumitru, L. M.; Manoli, K.; Magliulo, M.; Torsi, L.; Ligonzo, T.; Palazzo, G.

    2015-01-01

    A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.

  12. Utilizing self-assembled-monolayer-based gate dielectrics to fabricate molybdenum disulfide field-effect transistors

    SciTech Connect

    Kawanago, Takamasa Oda, Shunri

    2016-01-25

    In this study, we apply self-assembled-monolayer (SAM)-based gate dielectrics to the fabrication of molybdenum disulfide (MoS{sub 2}) field-effect transistors. A simple fabrication process involving the selective formation of a SAM on metal oxides in conjunction with the dry transfer of MoS{sub 2} flakes was established. A subthreshold slope (SS) of 69 mV/dec and no hysteresis were demonstrated with the ultrathin SAM-based gate dielectrics accompanied by a low gate leakage current. The small SS and no hysteresis indicate the superior interfacial properties of the MoS{sub 2}/SAM structure. Cross-sectional transmission electron microscopy revealed a sharp and abrupt interface of the MoS{sub 2}/SAM structure. The SAM-based gate dielectrics are found to be applicable to the fabrication of low-voltage MoS{sub 2} field-effect transistors and can also be extended to various layered semiconductor materials. This study opens up intriguing possibilities of SAM-based gate dielectrics in functional electronic devices.

  13. Characterizing featureless Mott insulating state by quasiparticle interference: A dynamical mean field theory view

    NASA Astrophysics Data System (ADS)

    Mukherjee, Shantanu; Lee, Wei-Cheng

    2015-12-01

    The quasiparticle interferences (QPIs) of the featureless Mott insulators are investigated by a T -matrix formalism implemented with the dynamical mean field theory (T -DMFT). In the Mott insulating state, due to the singularity at zero frequency in the real part of the electron self-energy [Re Σ (ω )˜η /ω ] predicted by DMFT, where η can be considered as the "order parameter" for the Mott insulating state, QPIs are completely washed out at small bias voltages. However, a further analysis shows that Re Σ (ω ) serves as an energy-dependent chemical potential shift. As a result, the effective bias voltage seen by the system is e V'=e V -Re Σ (e V ) , which leads to a critical bias voltage e Vc˜√{η } satisfying e V'=0 if and only if η is nonzero. Consequently, the same QPI patterns produced by the noninteracting Fermi surfaces appear at this critical bias voltage e Vc in the Mott insulating state. We propose that this reentry of noninteracting QPI patterns at e Vc could serve as an experimental signature of the Mott insulating state, and the order parameter can be experimentally measured as η ˜(eVc) 2 .

  14. Modeling SiO2 Ion Impurities Aging in Insulated Gate Power Devices Under Temperature and Voltage Stress

    DTIC Science & Technology

    2010-10-01

    parasitic capacitance over time. Figure 7 shows the model of the power MOSFET with the relevant parasitic elements during switch on process. The (a...implies that for the same S:  0 )(1 x o ox So G d K V   (8) Finally, computing the capacitance for a nonideal MOSFET /IGBT os to... MOSFETs and IGBTs have similar gate structure as describe earlier, the gate parasitic capacitance , that has been modeled and tested, would have similar

  15. Ferroelectric/Dielectric Double Gate Insulator Spin-Coated Using Barium Titanate Nanocrystals for an Indium Oxide Nanocrystal-Based Thin-Film Transistor.

    PubMed

    Pham, Hien Thu; Yang, Jin Ho; Lee, Don-Sung; Lee, Byoung Hun; Jeong, Hyun-Dam

    2016-03-23

    Barium titanate nanocrystals (BT NCs) were prepared under solvothermal conditions at 200 °C for 24 h. The shape of the BT NCs was tuned from nanodot to nanocube upon changing the polarity of the alcohol solvent, varying the nanosize in the range of 14-22 nm. Oleic acid-passivated NCs showed good solubility in a nonpolar solvent. The effect of size and shape of the BT NCs on the ferroelectric properties was also studied. The maximum polarization value of 7.2 μC/cm(2) was obtained for the BT-5 NC thin film. Dielectric measurements of the films showed comparable dielectric constant values of BT NCs over 1-100 kHz without significant loss. Furthermore, the bottom gate In2O3 NC thin film transistors exhibited outstanding device performance with a field-effect mobility of 11.1 cm(2) V(-1) s(-1) at a low applied gate voltage with BT-5 NC/SiO2 as the gate dielectric. The low-density trapped state was observed at the interface between the In2O3 NC semiconductor and the BT-5 NCs/SiO2 dielectric film. Furthermore, compensation of the applied gate field by an electric dipole-induced dipole field within the BT-5 NC film was also observed.

  16. O{sub 3}-sourced atomic layer deposition of high quality Al{sub 2}O{sub 3} gate dielectric for normally-off GaN metal-insulator-semiconductor high-electron-mobility transistors

    SciTech Connect

    Huang, Sen; Liu, Xinyu Wei, Ke; Liu, Guoguo; Wang, Xinhua; Sun, Bing; Yang, Xuelin; Shen, Bo; Liu, Cheng; Liu, Shenghou; Hua, Mengyuan; Yang, Shu; Chen, Kevin J.

    2015-01-19

    High quality Al{sub 2}O{sub 3} film grown by atomic layer deposition (ALD), with ozone (O{sub 3}) as oxygen source, is demonstrated for fabrication of normally-off AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). Significant suppression of Al–O–H and Al–Al bonds in ALD-Al{sub 2}O{sub 3} has been realized by substituting conventional H{sub 2}O source with O{sub 3}. A high dielectric breakdown E-field of 8.5 MV/cm and good TDDB behavior are achieved in a gate dielectric stack consisting of 13-nm O{sub 3}-Al{sub 2}O{sub 3} and 2-nm H{sub 2}O-Al{sub 2}O{sub 3} interfacial layer on recessed GaN. By using this 15-nm gate dielectric and a high-temperature gate-recess technique, the density of positive bulk/interface charges in normally-off AlGaN/GaN MIS-HEMTs is remarkably suppressed to as low as 0.9 × 10{sup 12 }cm{sup −2}, contributing to the realization of normally-off operation with a high threshold voltage of +1.6 V and a low specific ON-resistance R{sub ON,sp} of 0.49 mΩ cm{sup 2}.

  17. Investigation of 4H-SiC insulated-gate bipolar transistor turn-off performance for achieving low power loss

    NASA Astrophysics Data System (ADS)

    Navarro, Dondee; Pesic, Iliya; Morikawa, Yoji; Furui, Yoshiharu; Miura-Mattausch, Mitiko

    2016-04-01

    The dynamic characteristics of a 4H-SiC insulated-gate bipolar transistor (IGBT) at pulse switching is investigated by incorporating reported measurements of the interface defect density to device simulation. Different trap features such as energy states and trap time constants are investigated to determine the influence of traps on circuit performance. The capture cross-section parameter used in the simulation depicts the probability of traps to trap/detrap carriers which relates to the carrier trap time constant. It is demonstrated that trapped carriers from the on-state condition cause enhanced generation current during the off-state condition, which give rise to undesired leakage current in addition to the threshold voltage shift previously reported. The device power dissipation is increased by a factor of 100 due to the defects.

  18. The high temperature DC characteristics of a high voltage lateral insulated-gate bipolar transistors with NPN anode in junction isolation technology

    NASA Astrophysics Data System (ADS)

    Tsai, Ying-Chieh; Gong, Jeng; Chan, Wing-Chor; Wu, Shyi-Yuan; Lien, Chenhsin

    2017-06-01

    The high temperature DC characteristics of a high-voltage bulk Si lateral insulated-gate bipolar transistor in junction isolation (JI-LIGBT) technology is studied intensively in this paper. The current density distribution in the off-state at different temperatures of three types of device structure is compared. By using the Quasi-vertical DMOSFET (QVDMOS or multi-channel, MC) structure, the electron injection from the channel into the n-drift region is significantly enhanced, and the current density is improved. In addition, by extending the p-top layer to the NPN anode not only improves the breakdown voltage but also reduces the substrate current as well as ensures high temperature stability.

  19. Systems and methods for detecting a failure event in a field programmable gate array

    NASA Technical Reports Server (NTRS)

    Ng, Tak-Kwong (Inventor); Herath, Jeffrey A. (Inventor)

    2009-01-01

    An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh operation in the FPGA. The method also includes reading an outcome value from the signature memory.

  20. Measurement of transverse emittance and coherence of double-gate field emitter array cathodes

    NASA Astrophysics Data System (ADS)

    Tsujino, Soichiro; Das Kanungo, Prat; Monshipouri, Mahta; Lee, Chiwon; Miller, R. J. Dwayne

    2016-12-01

    Achieving small transverse beam emittance is important for high brightness cathodes for free electron lasers and electron diffraction and imaging experiments. Double-gate field emitter arrays with on-chip focussing electrode, operating with electrical switching or near infrared laser excitation, have been studied as cathodes that are competitive with photocathodes excited by ultraviolet lasers, but the experimental demonstration of the low emittance has been elusive. Here we demonstrate this for a field emitter array with an optimized double-gate structure by directly measuring the beam characteristics. Further we show the successful application of the double-gate field emitter array to observe the low-energy electron beam diffraction from suspended graphene in minimal setup. The observed low emittance and long coherence length are in good agreement with theory. These results demonstrate that our all-metal double-gate field emitters are highly promising for applications that demand extremely low-electron bunch-phase space volume and large transverse coherence.

  1. Measurement of transverse emittance and coherence of double-gate field emitter array cathodes

    PubMed Central

    Tsujino, Soichiro; Das Kanungo, Prat; Monshipouri, Mahta; Lee, Chiwon; Miller, R.J. Dwayne

    2016-01-01

    Achieving small transverse beam emittance is important for high brightness cathodes for free electron lasers and electron diffraction and imaging experiments. Double-gate field emitter arrays with on-chip focussing electrode, operating with electrical switching or near infrared laser excitation, have been studied as cathodes that are competitive with photocathodes excited by ultraviolet lasers, but the experimental demonstration of the low emittance has been elusive. Here we demonstrate this for a field emitter array with an optimized double-gate structure by directly measuring the beam characteristics. Further we show the successful application of the double-gate field emitter array to observe the low-energy electron beam diffraction from suspended graphene in minimal setup. The observed low emittance and long coherence length are in good agreement with theory. These results demonstrate that our all-metal double-gate field emitters are highly promising for applications that demand extremely low-electron bunch-phase space volume and large transverse coherence. PMID:28008918

  2. An Undergraduate Course and Laboratory in Digital Signal Processing with Field Programmable Gate Arrays

    ERIC Educational Resources Information Center

    Meyer-Base, U.; Vera, A.; Meyer-Base, A.; Pattichis, M. S.; Perry, R. J.

    2010-01-01

    In this paper, an innovative educational approach to introducing undergraduates to both digital signal processing (DSP) and field programmable gate array (FPGA)-based design in a one-semester course and laboratory is described. While both DSP and FPGA-based courses are currently present in different curricula, this integrated approach reduces the…

  3. Electrolyte-gated organic field-effect transistor for selective reversible ion detection.

    PubMed

    Schmoltner, Kerstin; Kofler, Johannes; Klug, Andreas; List-Kratochvil, Emil J W

    2013-12-17

    An ion-sensitive electrolyte-gated organic field-effect transistor for selective and reversible detection of sodium (Na(+) ) down to 10(-6) M is presented. The inherent low voltage - high current operation of these transistors in combination with a state-of-the-art ion-selective membrane proves to be a novel, versatile modular sensor platform.

  4. RHrFPGA Radiation-Hardened Re-programmable Field-Programmable Gate Array

    NASA Technical Reports Server (NTRS)

    Sanders, A. B.; LaBel, K. A.; McCabe, J. F.; Gardner, G. A.; Lintz, J.; Ross, C.; Golke, K.; Burns, B.; Carts, M. A.; Kim, H. S.

    2004-01-01

    Viewgraphs on the development of the Radiation-Hardened Re-programmable Field-Programmable Gate Array (RHrFPGA) are presented. The topics include: 1) Radiation Test Suite; 2) Testing Interface; 3) Test Configuration; 4) Facilities; 5) Test Programs; 6) Test Procedure; and 7) Test Results. A summary of heavy ion and proton testing is also included.

  5. Field-programmable gate array based locking circuit for external cavity diode laser frequency stabilization.

    PubMed

    Schwettmann, Arne; Sedlacek, Jonathon; Shaffer, James P

    2011-10-01

    We present a locking circuit for external cavity diode lasers implemented on a field-programmable gate array (FPGA). The main advantages over traditional non-FPGA-based locking circuits are rapid reconfigurability without any soldering and a friendly user interface. We characterize the lock quality by measuring the linewidth of a locked laser using electromagnetically induced transparency in a Rb vapor cell.

  6. RHrFPGA Radiation-Hardened Re-programmable Field-Programmable Gate Array

    NASA Technical Reports Server (NTRS)

    Sanders, A. B.; LaBel, K. A.; McCabe, J. F.; Gardner, G. A.; Lintz, J.; Ross, C.; Golke, K.; Burns, B.; Carts, M. A.; Kim, H. S.

    2004-01-01

    Viewgraphs on the development of the Radiation-Hardened Re-programmable Field-Programmable Gate Array (RHrFPGA) are presented. The topics include: 1) Radiation Test Suite; 2) Testing Interface; 3) Test Configuration; 4) Facilities; 5) Test Programs; 6) Test Procedure; and 7) Test Results. A summary of heavy ion and proton testing is also included.

  7. Photon-number discrimination using a semiconductor quantum dot, optically gated, field-effect transistor

    NASA Astrophysics Data System (ADS)

    Gansen, Eric J.; Rowe, Mary A.; Greene, Marion B.; Rosenberg, Danna; Harvey, Todd E.; Su, Mark Y.; Nam, Sae Woo; Mirin, Richard P.

    2007-09-01

    We demonstrate photon-number discrimination using a novel semiconductor detector that utilizes a layer of self-assembled InGaAs quantum dots (QDs) as an optically addressable floating gate in a GaAs/AlGaAs δ-doped field-effect transistor. When the QDOGFET (quantum dot, optically gated, field-effect transistor) is illuminated, the internal gate field directs the holes generated in the dedicated absorption layer of the structure to the QDs, where they are trapped. The positively charged holes are confined to the dots and screen the internal gate field, causing a persistent change in the channel current that is proportional to the total number of holes trapped in the QD ensemble. We use highly attenuated laser pulses to characterize the response of the QDOGFET cooled to 4 K. We demonstrate that different photon-number states produce well resolved changes in the channel current, where the responses of the detector reflect the Poisson statistics of the laser light. For a mean photon number of 1.1, we show that decision regions can be defined such that the QDOGFET determines the number (0, 1, 2, or >=3) of detected photons with a probability of accuracy >=83 % in a single-shot measurement.

  8. An Undergraduate Course and Laboratory in Digital Signal Processing with Field Programmable Gate Arrays

    ERIC Educational Resources Information Center

    Meyer-Base, U.; Vera, A.; Meyer-Base, A.; Pattichis, M. S.; Perry, R. J.

    2010-01-01

    In this paper, an innovative educational approach to introducing undergraduates to both digital signal processing (DSP) and field programmable gate array (FPGA)-based design in a one-semester course and laboratory is described. While both DSP and FPGA-based courses are currently present in different curricula, this integrated approach reduces the…

  9. Absence of a magnetic field driven metal-insulator transition in WTe{sub 2}.

    SciTech Connect

    Wang, Y. L.; Thoutam, L. R.; Xiao, Z. L.; Hu, J.; Das, S.; Mao, Z. Q.; Wei, J.; Divan, R.; Luican-Mayer, A.; Crabtree, G. W.; Kwok, W. K.

    2015-11-03

    A hallmark of materials with extremely large magnetoresistance (XMR) is the transformative ‘turn-on’ temperature behavior: when the applied magnetic field H is above certain value, the resistivity versus temperature ρ(T) curve shows a minimum at a field dependent temperature T*, which was seemingly interpreted as a magnetic field driven metal-insulator transition. Here, we demonstrate that ρ(T) curves with ubiquitous turn-on behavior in the newly discovered XMR material WTe2 can be scaled as MR ~ (H/ρ0)m with m ≈ 2 and ρ0 being the resistivity at zero-field. We obtained experimentally and also derived from the observed scaling the magnetic field dependence of the turn-on temperature T* ~ (H-Hc)ν with ν ≈ 1/2, which was earlier used as evidence for a predicted metal-insulator transition. The scaling also leads to a simple quantitative expression for the resistivity ρ* ≈ 2ρ0 at the onset of the XMR behavior, which fits the data remarkably well. These results evidently exclude the possible existence of a magnetic field driven metal-insulator transition in WTe2. This work resolves the origin of the turn-on behavior observed in several XMR materials and also provides a general route for a quantitative understanding of the temperature dependence of MR in both XMR and non-XMR materials.

  10. Extended-gate organic field-effect transistor for the detection of histamine in water

    NASA Astrophysics Data System (ADS)

    Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

    2015-04-01

    As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

  11. Scanning Kelvin probe microscopy on organic field-effect transistors during gate bias stress

    NASA Astrophysics Data System (ADS)

    Mathijssen, S. G. J.; Cölle, M.; Mank, A. J. G.; Kemerink, M.; Bobbert, P. A.; de Leeuw, D. M.

    2007-05-01

    The reliability of organic field-effect transistors is studied using both transport and scanning Kelvin probe microscopy measurements. A direct correlation between the current and potential of a p-type transistor is demonstrated. During gate bias stress, a decrease in current is observed, that is correlated with the increased curvature of the potential profile. After gate bias stress, the potential changes consistently in all operating regimes: the potential profile gets more convex, in accordance with the simultaneously observed shift in threshold voltage. The changes of the potential are attributed to positive immobile charges, which contribute to the potential, but not to the current.

  12. Anderson Insulators in Self-Assembled Gold Nanoparticles Thin Films: Single Electron Hopping between Charge Puddles Originated from Disorder.

    PubMed

    Jiang, Cheng-Wei; Ni, I-Chih; Hsieh, Yun-Lien; Tzeng, Shien-Der; Wu, Cen-Shawn; Kuo, Watson

    2017-06-12

    The Anderson insulating states in Au nanoparticle assembly are identified and studied under the application of magnetic fields and gate voltages. When the inter-nanoparticle tunneling resistance is smaller than the quantum resistance, the system showing zero Mott gap can be insulating at very low temperature. In contrast to Mott insulators, Anderson insulators exhibit great negative magnetoresistance, inferring charge delocalization in a strong magnetic field. When probed by the electrodes spaced by ~200 nm, they also exhibit interesting gate-modulated current similar to the multi-dot single electron transistors. These results reveal the formation of charge puddles due to the interplay of disorder and quantum interference at low temperatures.

  13. Design and fabrication of high-performance diamond triple-gate field-effect transistors

    PubMed Central

    Liu, Jiangwei; Ohsato, Hirotaka; Wang, Xi; Liao, Meiyong; Koide, Yasuo

    2016-01-01

    The lack of large-area single-crystal diamond wafers has led us to downscale diamond electronic devices. Here, we design and fabricate a hydrogenated diamond (H-diamond) triple-gate metal-oxide-semiconductor field-effect transistor (MOSFET) to extend device downscaling and increase device output current. The device’s electrical properties are compared with those of planar-type MOSFETs, which are fabricated simultaneously on the same substrate. The triple-gate MOSFET’s output current (174.2 mA mm−1) is much higher than that of the planar-type device (45.2 mA mm−1), and the on/off ratio and subthreshold swing are more than 108 and as low as 110 mV dec−1, respectively. The fabrication of these H-diamond triple-gate MOSFETs will drive diamond electronic device development forward towards practical applications. PMID:27708372

  14. Design Architecture of field-effect transistor with back gate electrode for biosensor application

    NASA Astrophysics Data System (ADS)

    Fathil, M. F. M.; Arshad, M. K. Md.; Hashim, U.; Ruslinda, A. R.; Gopinath, Subash C. B.; M. Nuzaihan M., N.; Ayub, R. M.; Adzhri, R.; Zaki, M.; Azman, A. H.

    2016-07-01

    This paper presents the preparation method of photolithography chrome mask design used in fabrication process of field-effect transistor with back gate biasing based biosensor. Initially, the chrome masks are designed by studying the process flow of the biosensor fabrication, followed by drawing of the actual chrome mask using the AutoCAD software. The overall width and length of the device is optimized at 16 mm and 16 mm, respectively. Fabrication processes of the biosensor required five chrome masks, which included source and drain formation mask, the back gate area formation mask, electrode formation mask, front gate area formation mask, and passivation area formation mask. The complete chrome masks design will be sent for chrome mask fabrication and for future use in biosensor fabrication.

  15. Design and fabrication of high-performance diamond triple-gate field-effect transistors

    NASA Astrophysics Data System (ADS)

    Liu, Jiangwei; Ohsato, Hirotaka; Wang, Xi; Liao, Meiyong; Koide, Yasuo

    2016-10-01

    The lack of large-area single-crystal diamond wafers has led us to downscale diamond electronic devices. Here, we design and fabricate a hydrogenated diamond (H-diamond) triple-gate metal-oxide-semiconductor field-effect transistor (MOSFET) to extend device downscaling and increase device output current. The device’s electrical properties are compared with those of planar-type MOSFETs, which are fabricated simultaneously on the same substrate. The triple-gate MOSFET’s output current (174.2 mA mm-1) is much higher than that of the planar-type device (45.2 mA mm-1), and the on/off ratio and subthreshold swing are more than 108 and as low as 110 mV dec-1, respectively. The fabrication of these H-diamond triple-gate MOSFETs will drive diamond electronic device development forward towards practical applications.

  16. Tuning the threshold voltage in electrolyte-gated organic field-effect transistors

    PubMed Central

    Kergoat, Loïg; Herlogsson, Lars; Piro, Benoit; Pham, Minh Chau; Horowitz, Gilles; Crispin, Xavier; Berggren, Magnus

    2012-01-01

    Low-voltage organic field-effect transistors (OFETs) promise for low power consumption logic circuits. To enhance the efficiency of the logic circuits, the control of the threshold voltage of the transistors are based on is crucial. We report the systematic control of the threshold voltage of electrolyte-gated OFETs by using various gate metals. The influence of the work function of the metal is investigated in metal-electrolyte-organic semiconductor diodes and electrolyte-gated OFETs. A good correlation is found between the flat-band potential and the threshold voltage. The possibility to tune the threshold voltage over half the potential range applied and to obtain depletion-like (positive threshold voltage) and enhancement (negative threshold voltage) transistors is of great interest when integrating these transistors in logic circuits. The combination of a depletion-like and enhancement transistor leads to a clear improvement of the noise margins in depleted-load unipolar inverters. PMID:22586088

  17. Lateral energy band profile modulation in tunnel field effect transistors based on gate structure engineering

    NASA Astrophysics Data System (ADS)

    Cui, Ning; Liang, Renrong; Wang, Jing; Xu, Jun

    2012-06-01

    Choosing novel materials and structures is important for enhancing the on-state current in tunnel field-effect transistors (TFETs). In this paper, we reveal that the on-state performance of TFETs is mainly determined by the energy band profile of the channel. According to this interpretation, we present a new concept of energy band profile modulation (BPM) achieved with gate structure engineering. It is believed that this approach can be used to suppress the ambipolar effect. Based on this method, a Si TFET device with a symmetrical tri-material-gate (TMG) structure is proposed. Two-dimensional numerical simulations demonstrated that the special band profile in this device can boost on-state performance, and it also suppresses the off-state current induced by the ambipolar effect. These unique advantages are maintained over a wide range of gate lengths and supply voltages. The BPM concept can serve as a guideline for improving the performance of nanoscale TFET devices.

  18. Coupling between electrolyte and organic semiconductor in electrolyte-gated organic field effect transistors (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Biscarini, Fabio; Di Lauro, Michele; Berto, Marcello; Bortolotti, Carlo A.; Geerts, Yves H.; Vuillaume, Dominique

    2016-11-01

    Organic field effect transistors (OFET) operated in aqueous environments are emerging as ultra-sensitive biosensors and transducers of electrical and electrochemical signals from a biological environment. Their applications range from detection of biomarkers in bodily fluids to implants for bidirectional communication with the central nervous system. They can be used in diagnostics, advanced treatments and theranostics. Several OFET layouts have been demonstrated to be effective in aqueous operations, which are distinguished either by their architecture or by the respective mechanism of doping by the ions in the electrolyte solution. In this work we discuss the unification of the seemingly different architectures, such as electrolyte-gated OFET (EGOFET), organic electrochemical transistor (OECT) and dual-gate ion-sensing FET. We first demonstrate that these architectures give rise to the frequency-dependent response of a synapstor (synapse-like transistor), with enhanced or depressed modulation of the output current depending on the frequency of the time-dependent gate voltage. This behavior that was reported for OFETs with embedded metal nanoparticles shows the existence of a capacitive coupling through an equivalent network of RC elements. Upon the systematic change of ions in the electrolyte and the morphology of the charge transport layer, we show how the time scale of the synapstor is changed. We finally show how the substrate plays effectively the role of a second bottom gate, whose potential is actually fixed by the pH/composition of the electrolyte and the gate voltage applied.

  19. Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen

    2009-01-01

    Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

  20. Graphene field-effect transistor array with integrated electrolytic gates scaled to 200 mm

    NASA Astrophysics Data System (ADS)

    Vieira, N. C. S.; Borme, J.; Machado, G., Jr.; Cerqueira, F.; Freitas, P. P.; Zucolotto, V.; Peres, N. M. R.; Alpuim, P.

    2016-03-01

    Ten years have passed since the beginning of graphene research. In this period we have witnessed breakthroughs both in fundamental and applied research. However, the development of graphene devices for mass production has not yet reached the same level of progress. The architecture of graphene field-effect transistors (FET) has not significantly changed, and the integration of devices at the wafer scale has generally not been sought. Currently, whenever an electrolyte-gated FET (EGFET) is used, an external, cumbersome, out-of-plane gate electrode is required. Here, an alternative architecture for graphene EGFET is presented. In this architecture, source, drain, and gate are in the same plane, eliminating the need for an external gate electrode and the use of an additional reservoir to confine the electrolyte inside the transistor active zone. This planar structure with an integrated gate allows for wafer-scale fabrication of high-performance graphene EGFETs, with carrier mobility up to 1800 cm2 V-1 s-1. As a proof-of principle, a chemical sensor was achieved. It is shown that the sensor can discriminate between saline solutions of different concentrations. The proposed architecture will facilitate the mass production of graphene sensors, materializing the potential of previous achievements in fundamental and applied graphene research.

  1. Normally-off HfO2-gated diamond field effect transistors

    NASA Astrophysics Data System (ADS)

    Liu, J. W.; Liao, M. Y.; Imura, M.; Koide, Y.

    2013-08-01

    A normally-off hydrogenated-diamond (H-diamond) field effect transistor (FET) using a HfO2 gate oxide is demonstrated. The HfO2 gate oxide has a bilayer structure which is fabricated by a sputter-deposition (SD) technique on a thin buffer layer prepared by an atomic layer deposition (ALD) technique. The role of the ALD-HfO2 is found to prevent deterioration of the H-diamond surface by the SD process. The leakage current density of the SD-HfO2/ALD-HfO2/H-diamond structure is smaller than 1.1 × 10-4 A cm-2 at gate voltages from -9.0 to 2.0 V. The capacitance-voltage characteristic shows that fixed and trapped charge densities are low enough to operate the FET. The HfO2-gated FET has p-type channel and complete normally-off characteristics. The drain-source current maximum, threshold voltage, extrinsic transconductance maximum, and effective mobility of the FET with gate length of 4 μm are -37.6 mA mm-1, -1.3 ± 0.1 V, 11.2 ± 0.1 mS mm-1, and 38.7 ± 0.5 cm2 V-1 s-1, respectively.

  2. Inhomogeneous screening of gate electric field by interface states in graphene FETs

    NASA Astrophysics Data System (ADS)

    Singh, Anil Kumar; Gupta, Anjan Kumar

    2017-09-01

    The electronic states at graphene-SiO2 interface and their inhomogeneity is investigated using the back-gate-voltage dependence of local tunnel spectra acquired with a scanning tunneling microscope. The conductance spectra show two, or occasionally three, minima that evolve along the bias-voltage axis with the back gate voltage. This evolution is modeled using tip-gating and interface states. The energy dependent interface states’ density, Dit(E) , required to model the back-gate evolution of the minima, is found to have significant inhomogeneity in its energy-width. A broad Dit(E) leads to an effect similar to a reduction in the Fermi velocity while the narrow Dit(E) leads to the pinning of the Fermi energy close to the Dirac point, as observed in some places, due to enhanced screening of the gate electric field by the narrow Dit(E) . Finally, this also demonstrates STM as a tool to probe the density of interface states in various 2D Dirac materials.

  3. Polarizing Oxygen Vacancies in Insulating Metal Oxides under a High Electric Field

    NASA Astrophysics Data System (ADS)

    Youssef, Mostafa; Van Vliet, Krystyn J.; Yildiz, Bilge

    2017-09-01

    We demonstrate a thermodynamic formulation to quantify defect formation energetics in an insulator under a high electric field. As a model system, we analyzed neutral oxygen vacancies (color centers) in alkaline-earth-metal binary oxides using density functional theory, Berry phase calculations, and maximally localized Wannier functions. The work of polarization lowers the field-dependent electric Gibbs energy of formation of this defect. This is attributed mainly to the ease of polarizing the two electrons trapped in the vacant site, and secondarily to the defect induced reduction in bond stiffness and softening of phonon modes. The formulation and analysis have implications for understanding the behavior of insulating oxides in electronic, magnetic, catalytic, and electrocaloric devices under a high electric field.

  4. High fluence swift heavy ion structure modification of the SiO2/Si interface and gate insulator in 65 nm MOSFETs

    NASA Astrophysics Data System (ADS)

    Ma, Yao; Gao, Bo; Gong, Min; Willis, Maureen; Yang, Zhimei; Guan, Mingyue; Li, Yun

    2017-04-01

    In this work, a study of the structure modification, induced by high fluence swift heavy ion radiation, of the SiO2/Si structures and gate oxide interface in commercial 65 nm MOSFETs is performed. A key and novel point in this study is the specific use of the transmission electron microscopy (TEM) technique instead of the conventional atomic force microscope (AFM) or scanning electron microscope (SEM) techniques which are typically performed following the chemical etching of the sample to observe the changes in the structure. Using this method we show that after radiation, the appearance of a clearly visible thin layer between the SiO2 and Si is observed presenting as a variation in the TEM intensity at the interface of the two materials. Through measuring the EDX line scans we reveal that the Si:O ratio changed and that this change can be attributed to the migration of the Si towards interface after the Si-O bond is destroyed by the swift heavy ions. For the 65 nm MOSFET sample, the silicon substrate, the SiON insulator and the poly-silicon gate interfaces become blurred under the same irradiation conditions.

  5. A compact, short-pulse laser for near-field, range-gated imaging

    SciTech Connect

    Zutavern, F.J.; Helgeson, W.D.; Loubriel, G.M.; Yates, G.J.; Gallegos, R.A.; McDonald, T.E.

    1996-12-31

    This paper describes a compact laser, which produces high power, wide-angle emission for a near-field, range-gated, imaging system. The optical pulses are produced by a 100 element laser diode array (LDA) which is pulsed with a GaAs, photoconductive semiconductor switch (PCSS). The LDA generates 100 ps long, gain-switched, optical pulses at 904 nm when it is driven with 3 ns, 400 A, electrical pulses from a high gain PCSS. Gain switching is facilitated with this many lasers by using a low impedance circuit to drive an array of lasers, which are connected electrically in series. The total optical energy produced per pulse is 10 microjoules corresponding to a total peak power of 100 kW. The entire laser system, including prime power (a nine volt battery), pulse charging, PCSS, and LDA, is the size of a small, hand-held flashlight. System lifetime, which is presently limited by the high gain PCSS, is an active area of research and development. Present limitations and potential improvements will be discussed. The complete range-gated imaging system is based on complementary technologies: high speed optical gating with intensified charge coupled devices (ICCD) developed at Los Alamos National Laboratory (LANL) and high gain, PCSS-driven LDAs developed at Sandia National Laboratories (SNL). The system is designed for use in highly scattering media such as turbid water or extremely dense fog or smoke. The short optical pulses from the laser and high speed gating of the ICCD are synchronized to eliminate the back-scattered light from outside the depth of the field of view (FOV) which may be as short as a few centimeters. A high speed photodiode can be used to trigger the intensifier gate and set the range-gated FOV precisely on the target. The ICCD and other aspects of the imaging system are discussed in a separate paper.

  6. Friability of spray-applied fireproofing and thermal insulations: field evaluation of prototype test devices

    SciTech Connect

    Rossiter, W.J.; Roberts, W.E.; Mathey, R.G.

    1989-03-01

    The report describes results of the third and final phase of a study conducted for the General Services Administration (GSA) to develop a field-test method to measure the friability of spray-applied fireproofing and thermal-insulation materials. Field tests were conducted on 17 fibrous and 2 cementitious spray-applied materials to assess surface and bulk compression/shear, indentation, abrasion, and impact properties. The tests were performed using prototype devices developed in an earlier phase of the study. As expected, the field specimens displayed varying response to dislodgment or indentation in the tests. The field tests confirmed that the goal of the study had been achieved.

  7. Supplement analysis for Greenville Gate access to Kirschbaum Field at Lawrence Livermore National Laboratory

    SciTech Connect

    1997-12-05

    The National Ignition Facility (NIF) Program proposes to provide additional access to the Kirschbaum Field construction laydown area. This additional access would alleviate traffic congestion at the East Gate entrance to Lawrence Livermore National Laboratory (LLNL) from Greenville Road during periods of heavy construction for the NIF. The new access would be located along the northeastern boundary of LLNL, about 305 m (1,000 ft) north of the East Gate entrance. The access road would extend from Greenville Road to the Kirschbaum Field construction laydown area and would traverse an existing storm water drainage channel. Two culverts, side by side, and a compacted road base would be installed across the channel. The security fence that runs parallel to Greenville Road would be modified to accommodate this new entrance and a vehicle gate would be installed at the entrance of Kirschbaum Field. The exiting shoulder along Greenville Road would be converted into a new turn lane for trucks entering the new gate. This analysis evaluates the impacts of constructing the Kirschbaum Field bridge and access gate at a different location than was analyzed in the NIF Project specific Analysis in the Final Programmatic environmental Impact Statement for Stockpile Stewardship and Management (SS and M PEIS) published in September 1996 (DOE/EIS-0236) and the Record of Decision published on December 19, 1996. Issues of concern addressed in this supplement analysis include potential impacts to wetlands downstream of the access bridge, potential impacts to the California red-legged frog (Rana aurora draytonii) listed as threatened on the federal listing pursuant to the Endangered Species Act of 1974, and potential impacts on the 100-yr floodplain along the Arroyo Las Positas.

  8. Effects of HfO2/Al2O3 gate stacks on electrical performance of planar In x Ga1- x As tunneling field-effect transistors

    NASA Astrophysics Data System (ADS)

    Ahn, Dae-Hwan; Yoon, Sang-Hee; Takenaka, Mitsuru; Takagi, Shinichi

    2017-08-01

    We study the impact of gate stacks on the electrical characteristics of Zn-diffused source In x Ga1- x As tunneling field-effect transistors (TFETs) with Al2O3 or HfO2/Al2O3 gate insulators. Ta and W gate electrodes are compared in terms of the interface trap density (D it) of InGaAs MOS interfaces. It is found that D it is lower at the W/HfO2/Al2O3 InGaAs MOS interface than at the Ta/HfO2/Al2O3 interface. The In0.53Ga0.47As TFET with a W/HfO2 (2.7 nm)/Al2O3 (0.3 nm) gate stack of 1.4-nm-thick capacitance equivalent thickness (CET) has a steep minimum subthreshold swing (SS) of 57 mV/dec, which is attributed to the thin CET and low D it. Also, the In0.53Ga0.47As (2.6 nm)/In0.67Ga0.33As (3.2 nm)/In0.53Ga0.47As (96.5 nm) quantum-well (QW) TFET supplemented with this 1.4-nm-thick CET gate stack exhibits a steeper minimum SS of 54 mV/dec and a higher on-current (I on) than those of the In0.53Ga0.47As TFET.

  9. In-plane magneto-plasmons in grating gated double quantum well field effect transistors.

    SciTech Connect

    Simmons, Jerry Alvon; Wanke, Michael Clement; Peralta, Xomalin G.; Lilly, Michael Patrick; Allen, S. James; Reno, John Louis; Burke, Peter J.; Eisenstein, James Philip

    2003-06-01

    Coupled double quantum well field-effect transistors with a grating gate exhibit a terahertz ({approx}600 GHz) photoconductive response that resonates with standing two dimensional plasma oscillations under the gate and may be the basis for developing a fast, tunable terahertz detector. The application of a precisely aligned in-plane magnetic field produces no detectable change in the device DC conductance but produces a dramatic inversion, growth of the terahertz photoconductive response and frequency shift of the standing plasmon resonances. The frequency shift can be described by a significant mass increase produced by the in-plane field. The mass increase is substantially larger than that calculated from a single well and we presume that a proper treatment of the coupled double quantum well may resolve this discrepancy.

  10. Attosecond x-ray source generation from two-color polarized gating plasmonic field enhancement

    SciTech Connect

    Feng, Liqiang; Yuan, Minghu; Chu, Tianshu

    2013-12-15

    The plasmonic field enhancement from the vicinity of metallic nanostructures as well as the polarization gating technique has been utilized to the generation of the high order harmonic and the single attosecond x-ray source. Through numerical solution of the time-dependent Schrödinger equation, for moderate the inhomogeneity and the polarized angle of the two fields, we find that not only the harmonic plateau has been extended and enhanced but also the single short quantum path has been selected to contribute to the harmonic. As a result, a series of 50 as pulses around the extreme ultraviolet and the x-ray regions have been obtained. Furthermore, by investigating the other parameters effects on the harmonic emission, we find that this two-color polarized gating plasmonic field enhancement scheme can also be achieved by the multi-cycle pulses, which is much better for experimental realization.

  11. Modeling PCM-Enhanced Insulation System and Benchmarking EnergyPlus against Controlled Field Data

    SciTech Connect

    Shrestha, Som S; Miller, William A; Stovall, Therese K; Desjarlais, Andre Omer; Childs, Kenneth W; Porter, Wallace D; Bhandari, Mahabir S; Coley, Steven J

    2011-01-01

    Phase-change materials (PCM) used in building envelopes appear to be a promising technology to reduce energy consumption and reduce/shift peak load. However, due to complexity in modeling the dynamic behavior of PCMs, current modeling tools either lack an accurate way of predicting the performance and impact of PCMs in buildings or validation of predicted or measured performance is not available. This paper presents a model of a PCM-enhanced dynamic-insulation system in EnergyPlus (E+) and compares the simulation results against field-measured data. Laboratory tests to evaluate thermal properties and to characterize the PCM and PCM-enhanced cellulose insulation system are also presented in this paper. Results indicate that the predicted daily average heat flux through walls from the E+ simulation was within 9% of field measured data. Future analysis will allow us to predict annual energy savings from the use of PCM in buildings.

  12. Magnetization Process of the Kondo Insulator YbB12 in Ultrahigh Magnetic Fields

    NASA Astrophysics Data System (ADS)

    Terashima, Taku T.; Ikeda, Akihiko; Matsuda, Yasuhiro H.; Kondo, Akihiro; Kindo, Koichi; Iga, Fumitoshi

    2017-05-01

    The magnetization process of the Kondo insulator YbB12 has been unveiled in ultrahigh magnetic fields of up to 120 T at 4.2 K. We have found a novel metamagnetic transition at Bc2 = 102 T in addition to the previously known transition at Bc1 = 55 T. It has also been observed that the magnetization tends to saturate at around 112 T. Within the rigid band model, the two-energy-gap structure in the density of states (DOS) explains the successive two-step metamagnetism as a result of the Zeeman effect of the DOS. The metamagnetic transition at Bc1 occurs along with an insulator-metal transition and the field-induced phase is expected to be a heavy fermion metallic state. The Kondo effect can weaken at the second transition of Bc2, as theoretically found in the successive two-metamagnetic-transition process in the Kondo semimetal CeNiSn.

  13. Controlled microparticle manipulation employing low frequency alternating electric fields in an array of insulators.

    PubMed

    Baylon-Cardiel, Javier L; Jesús-Pérez, Nadia M; Chávez-Santoscoy, Ana V; Lapizco-Encinas, Blanca H

    2010-12-07

    Low frequency alternating current insulator-based dielectrophoresis is a novel technique that allows for highly controlled manipulation of particles. By varying the shape of an AC voltage applied across a microchannel containing an array of insulating cylindrical structures it was possible to concentrate and immobilize microparticles in bands; and then, move the bands of particles to a different location. Mathematical modeling was performed to analyze the distribution of the electric field and electric field gradient as function of the shape of the AC applied potential, employing frequencies in the 0.2-1.25 Hz range. Three different signals were tested: sinusoidal, half sinusoidal and sawtooth. Experimental results demonstrated that this novel dielectrophoretic mode allows highly controlled particle manipulation.

  14. Chiral magnetism and spin liquid Mott insulators induced by synthetic gauge fields

    NASA Astrophysics Data System (ADS)

    Paramekanti, Arun; Hickey, Ciaran; Cincio, Lukasz; Papic, Zlatko; Vellat-Sadashivan, Arun; Sohal, Ramanjit

    2016-05-01

    Recent experiments using Raman-assisted tunneling or lattice-shaking have realized synthetic gauge fields and optical lattice bands with nontrivial band topology. Here we examine the effect of particle interactions in such bands, focussing on two-component fermions with local Hubbard repulsion. We show that interactions can drive the integer quantum Hall insulator into Mott insulating states which possess noncoplanar chiral magnetic textures and even chiral spin liquids with many-body topological order. We establish our results using a combination of mean field theory, strong coupling expansions, numerical exact diagonalization and DMRG methods. We also discuss possible signatures of such non-coplanar orders in Bragg scattering and noise measurements.

  15. Electric field strength at and near the cathode edge in a magnetically insulated coaxial diode

    NASA Astrophysics Data System (ADS)

    Belomyttsev, S. Ya.; Romanchenko, I. V.; Rostov, V. V.

    2008-03-01

    For an annular cathode in a coaxial diode it has been shown that the averaged electric field strength at the end face of the cathode, En, depends on the edge thickness h as E_n ∝ {1 sqrt h }} . It has been found that the field strength varies with distance from the edge approximately as ∝ {1 {sqrt r }} . The problem of the electric field strength at the edge of the cathode in a magnetically insulated coaxial diode has been solved for the case where the cathode emissivity is limited with the use of a model assuming a given internal resistance of the voltage source.

  16. High-performance ZnO nanowire field-effect transistor with forming gas treated SiO{sub 2} gate dielectrics

    SciTech Connect

    Qian, Haolei; Wang, Yewu E-mail: phyjsha@zju.edu.cn; Fang, Yanjun; Gu, Lin; Lu, Ren; Sha, Jian E-mail: phyjsha@zju.edu.cn

    2015-04-28

    The SiO{sub 2} films thermally grown on Si wafer have been annealed in forming atmosphere (N{sub 2}:H{sub 2} = 9:1) prior to use as gate insulators in ZnO nanowire field effect transistors (ZnO NW-FETs). Without the annealing process, ZnO NW-FETs exhibit very poor performance, and most of them even cannot be depleted under a high gate voltage of −100 V; however, with the annealing process in forming atmosphere, the device characteristics can be significantly improved, exhibiting a large turn on-off ratio of ∼10{sup 4} and a low sub-threshold swing ∼1 V/decade. The pre-annealing treatment of SiO{sub 2} (300 nm)/p-Si in N{sub 2}/H{sub 2} ambient may significantly reduce the number of non-bridging oxygen atoms, which blocks the interaction between ZnO nanowires and SiO{sub 2} surface, and finally enhances the electrical characteristics of the back-gated ZnO NW-FETs. In addition, the FET electrode fabrication process introduced in this paper is much simpler than the traditional photo-lithography and lift-off method, which has potential applications in future device fabrication.

  17. Electric Field-induced Resistance Switching in VO2 Channels using Hybrid Gate Dielectric of High- k Ta2O5/Organic material Parylene-C

    NASA Astrophysics Data System (ADS)

    Wei, Tingting; Kanki, Teruo; Fujiwara, Kohei; Chikanari, Masashi; Tanaka, Hidekazu

    Electrostatic approach utilizing field-effect transistor (FET) with correlated electron materials provides an avenue to realize the novel devices (Mott-transistor) and to clarify condensed matter physics. In this study, we have prepared Mott-transistors using vanadium dioxide (VO2) channels and employed hybrid gate dielectric consisted of high- k material Ta2O5 and organic polymer parylene-C to trigger carrier transport modulation in VO2. Obvious resistance modulations were observed in insulating regime through time-dependent resistance measurement at varied square-shaped gate bias (VG) . Contrasting to the hysteretic response in electric double layer transistor (EDLT), an abrupt resistance switching in less than of 2-second-interval enables us to attribute such immediate modulation to pure electrostatic effect. Moreover, the maximum of resistance change was identified to appear around phase transition temperature (TMI) , which confirmed the disordered heterogeneous regime at TMI. Taking advantage of systematic modulation using VO2-based devices, we demonstrated the pronounced shifts of TMI by gate bias. Another fascinating behavior on asymmetric drop in TMI by hole-electron carrier doping was observed.

  18. Change in carrier type in high-k gate carbon nanotube field-effect transistors by interface fixed charges.

    PubMed

    Moriyama, N; Ohno, Y; Kitamura, T; Kishimoto, S; Mizutani, T

    2010-04-23

    We study the phenomenon of change in carrier type in carbon nanotube field-effect transistors (CNFETs) caused by the atomic layer deposition (ALD) of a HfO(2) gate insulator. When a HfO(2) layer is deposited on a CNFET, the type of carrier changes from p-type to n-type. The so-obtained n-type device has good performance and stability in air. The conductivity of such a device with a channel length of 0.7 microm is 11% of the quantum conductance 4e(2)/h. The contact resistance for electron current is estimated to be 14 kOmega. The n-type conduction of this CNFET is maintained for more than 100 days. The change in carrier type is attributed to positive fixed charges introduced at the interface between the HfO(2) and SiO(2) layers. We also propose a novel technique to control the type of conduction by utilizing interface fixed charges; this technique is compatible with Si CMOS process technology.

  19. Field-effect control of superconductivity and Rashba spin-orbit coupling in top-gated LaAlO3/SrTiO3 devices

    PubMed Central

    Hurand, S.; Jouan, A.; Feuillet-Palma, C.; Singh, G.; Biscaras, J.; Lesne, E.; Reyren, N.; Barthélémy, A.; Bibes, M.; Villegas, J. E.; Ulysse, C.; Lafosse, X.; Pannetier-Lecoeur, M.; Caprara, S.; Grilli, M.; Lesueur, J.; Bergeal, N.

    2015-01-01

    The recent development in the fabrication of artificial oxide heterostructures opens new avenues in the field of quantum materials by enabling the manipulation of the charge, spin and orbital degrees of freedom. In this context, the discovery of two-dimensional electron gases (2-DEGs) at LaAlO3/SrTiO3 interfaces, which exhibit both superconductivity and strong Rashba spin-orbit coupling (SOC), represents a major breakthrough. Here, we report on the realisation of a field-effect LaAlO3/SrTiO3 device, whose physical properties, including superconductivity and SOC, can be tuned over a wide range by a top-gate voltage. We derive a phase diagram, which emphasises a field-effect-induced superconductor-to-insulator quantum phase transition. Magneto-transport measurements show that the Rashba coupling constant increases linearly with the interfacial electric field. Our results pave the way for the realisation of mesoscopic devices, where these two properties can be manipulated on a local scale by means of top-gates. PMID:26244916

  20. Performance of AlGaN/GaN MISHFET using dual-purpose thin Al2O3 layer for surface protection and gate insulator

    NASA Astrophysics Data System (ADS)

    Kim, Do-Kywn; Sindhuri, V.; Jo, Young-Woo; Kim, Dong-Seok; Kang, Hee-Sung; Lee, Jun-Hyeok; Lee, Yong Soo; Bae, Youngho; Hahm, Sung-Ho; Lee, Jung-Hee

    2014-10-01

    In this work, we have investigated a role of a thin Al2O3 layer in AlGaN/GaN MISHFET by characterizing the variation of the sheet resistance of the 2DEG channel layer. The Al2O3 layer, varying the thickness from 0 to 10 nm, was utilized as the gate insulator of the device as well as the surface protection layer during RTP for ohmic contact formation. After RTP, the 2DEG channel layer without the Al2O3 layer was rapidly degraded by increasing the sheet resistance of the layer to 1360 Ω/□ from the sheet resistance of 400 Ω/□ of the as-grown sample. The degradation was still observed even when 1.5 nm-thick Al2O3 layer was used. However, the sheet resistances of the devices remained constant with slightly decreased value from that of the as-grown sample when the thickness is larger than 3 nm, which indicates that the 3 nm-thick Al2O3 layer well protects the AlGaN surface above the 2DEG channel during RTP. The slight decrease in sheet resistance is probably because some acceptor-like states existing at AlGaN surface become neutralized and hence the 2DEG density increases. The Al2O3 layer was not removed for proceeding the fabrication of AlGaN/GaN MISHFET, but rather used as a gate dielectric, which simplifies the device fabrication eliminating the additional deposition steps for the gate dielectric. The threshold voltage of the device, investigated in this work, was increased to the negative direction with increasing the thickness of Al2O3 layers while the transconductance was decreased. The best performances were obtained from the device with 8 nm-thick Al2O3 layer, exhibiting very low gate leakage current of 10-9 A/mm with subthreshold swing (SS) of 80 mV/dec and very high Ion/Ioff ratio (>9 orders).

  1. Sub-10 nm transparent all-around-gated ambipolar ionic field effect transistor

    NASA Astrophysics Data System (ADS)

    Lee, Seung-Hyun; Lee, Hyomin; Jin, Tianguang; Park, Sungmin; Yoon, Byung Jun; Sung, Gun Yong; Kim, Ki-Bum; Kim, Sung Jae

    2014-12-01

    In this paper, we developed a versatile ionic field effect transistor (IFET) which has an ambipolar function for manipulating molecules regardless of their polarity and can be operated at a wide range of electrolytic concentrations (10-5 M-1 M). The IFET has circular nanochannels radially covered by gate electrodes, called ``all-around-gate'', with an aluminum oxide (Al2O3) oxide layer of a near-zero surface charge. Experimental and numerical validations were conducted for characterizing the IFET. We found that the versatility originated from the zero-charge density of the oxide layer and all-around-gate structure which increased the efficiency of the gate effect 5 times higher than a previously developed planar-gate by capacitance calculations. Our numerical model adapted Poisson-Nernst-Planck-Stokes (PNPS) formulations with additional nonlinear constraints of a fringing field effect and a counter-ion condensation and the experimental and numerical results were well matched. The device can control the transportation of ions at concentrations up to 1 M electrolyte which resembles a backflow of a shale gas extraction process. Furthermore, while traditional IFETs can manipulate either positively or negatively charged species depending on the inherently large surface charge of oxide layer, the presenting device and mechanism provide effective means to control the motion of both negatively and positively charged molecules which is important in biomolecule transport through nanochannels, medical diagnosis system and point-of-care system, etc.In this paper, we developed a versatile ionic field effect transistor (IFET) which has an ambipolar function for manipulating molecules regardless of their polarity and can be operated at a wide range of electrolytic concentrations (10-5 M-1 M). The IFET has circular nanochannels radially covered by gate electrodes, called ``all-around-gate'', with an aluminum oxide (Al2O3) oxide layer of a near-zero surface charge. Experimental and

  2. Photon-number-discriminating detection using a quantum-dot, optically gated, field-effect transistor

    NASA Astrophysics Data System (ADS)

    Gansen, E. J.; Rowe, M. A.; Greene, M. B.; Rosenberg, D.; Harvey, T. E.; Su, M. Y.; Hadfield, R. H.; Nam, S. W.; Mirin, R. P.

    2007-10-01

    Detectors with the capability to directly measure the photon number of a pulse of light enable linear optics quantum computing, affect the security of quantum communications, and can be used to characterize and herald non-classical states of light. Here, we demonstrate the photon-number-resolving capabilities of a quantum-dot, optically gated, field-effect transistor that uses quantum dots as optically addressable floating gates in a GaAs/Al0.2Ga0.8As δ-doped field-effect transistor. When the active area of the detector is illuminated, photo-generated carriers trapped by quantum dots screen the gate field, causing a persistent change in the channel current that is proportional to the number of confined carriers. Using weak laser pulses, we show that discrete numbers of trapped carriers produce well resolved changes in the channel current. We demonstrate that for a mean photon number of 1.1, decision regions can be defined such that the field-effect transistor determines the number of detected photons with a probability of accuracy greater than 83%.

  3. Stable Low-Voltage Operation Top-Gate Organic Field-Effect Transistors on Cellulose Nanocrystal Substrates

    Treesearch

    Cheng-Yin Wang; Canek Fuentes-Hernandez; Jen-Chieh Liu; Amir Dindar; Sangmoo Choi; Jeffrey P. Youngblood; Robert J. Moon; Bernard Kippelen

    2015-01-01

    We report on the performance and the characterization of top-gate organic field-effect transistors (OFETs), comprising a bilayer gate dielectric of CYTOP/ Al2O3 and a solution-processed semiconductor layer made of a blend of TIPS-pentacene:PTAA, fabricated on recyclable cellulose nanocrystal−glycerol (CNC/glycerol...

  4. Neutron production using a pyroelectric driven target coupled with a gated field ionization source

    SciTech Connect

    Ellsworth, J. L.; Tang, V.; Falabella, S.; Naranjo, B.; Putterman, S.

    2013-04-19

    A palm sized, portable neutron source would be useful for widespread implementation of detection systems for shielded, special nuclear material. We present progress towards the development of the components for an ultracompact neutron generator using a pulsed, meso-scale field ionization source, a deuterated (or tritiated) titanium target driven by a negative high voltage lithium tantalate crystal. Neutron production from integrated tests using an ion source with a single, biased tungsten tip and a 3 Multiplication-Sign 1 cm, vacuum insulated crystal with a plastic deuterated target are presented. Component testing of the ion source with a single tip produces up to 3 nA of current. Dielectric insulation of the lithium tantalate crystals appears to reduce flashover, which should improve the robustness. The field emission losses from a 3 cm diameter crystal with a plastic target and 6 cm diameter crystal with a metal target are compared.

  5. The Effects of ’Normal’ Annealing Cycles During IGFET Fabrication on Initial and Radiation Induced Gate Insulator Defects

    DTIC Science & Technology

    1989-07-13

    indicated that the " extrinsic " defects arc localized near, but not at, the Si/SiO 2 interface. It is shown that if the insulator thi-kness is separated into...three regions; (1) a region above the extrinsic defect volume in whichAVT is linear in t 9 (2) a region containing all of the extrinsic defects in...which CV is quadratic in t , and (3) a region below the extrinsic defect volume close to the S SiO 2 interface in which .V T=0, then theV T vs. t data

  6. Low-voltage organic field-effect transistors and inverters enabled by ultrathin cross-linked polymers as gate dielectrics.

    PubMed

    Yoon, Myung-Han; Yan, He; Facchetti, Antonio; Marks, Tobin J

    2005-07-27

    The quest for high-performance organic thin-film transistor (OTFT) gate dielectrics is of intense current interest. Beyond having excellent insulating properties, such materials must meet other stringent requirements for optimum OTFT function: efficient low-temperature solution fabrication, mechanical flexibility, and compatibility with diverse gate materials and organic semiconductors. The OTFTs should function at low biases to minimize power consumption, hence the dielectric must exhibit large gate capacitance. We report the realization of new spin-coatable, ultrathin (<20 nm) cross-linked polymer blends exhibiting excellent insulating properties (leakage current densities approximately 10(-)(8) Acm(-)(2)), large capacitances (up to approximately 300 nF cm(-)(2)), and enabling low-voltage OTFT functions. These dielectrics exhibit good uniformity over areas approximately 150 cm(2), are insoluble in common solvents, can be patterned using standard microelectronic etching methodologies, and adhere to/are compatible with n(+)-Si, ITO, and Al gates, and with a wide range of p- and n-type semiconductors. Using these dielectrics, complementary invertors have been fabricated which function at 2 V.

  7. Sensing small neurotransmitter-enzyme interaction with nanoporous gated ion-sensitive field effect transistors.

    PubMed

    Kisner, Alexandre; Stockmann, Regina; Jansen, Michael; Yegin, Ugur; Offenhäusser, Andreas; Kubota, Lauro Tatsuo; Mourzina, Yulia

    2012-01-15

    Ion-sensitive field effect transistors with gates having a high density of nanopores were fabricated and employed to sense the neurotransmitter dopamine with high selectivity and detectability at micromolar range. The nanoporous structure of the gates was produced by applying a relatively simple anodizing process, which yielded a porous alumina layer with pores exhibiting a mean diameter ranging from 20 to 35 nm. Gate-source voltages of the transistors demonstrated a pH-dependence that was linear over a wide range and could be understood as changes in surface charges during protonation and deprotonation. The large surface area provided by the pores allowed the physical immobilization of tyrosinase, which is an enzyme that oxidizes dopamine, on the gates of the transistors, and thus, changes the acid-base behavior on their surfaces. Concentration-dependent dopamine interacting with immobilized tyrosinase showed a linear dependence into a physiological range of interest for dopamine concentration in the changes of gate-source voltages. In comparison with previous approaches, a response time relatively fast for detecting dopamine was obtained. Additionally, selectivity assays for other neurotransmitters that are abundantly found in the brain were examined. These results demonstrate that the nanoporous structure of ion-sensitive field effect transistors can easily be used to immobilize specific enzyme that can readily and selectively detect small neurotransmitter molecule based on its acid-base interaction with the receptor. Therefore, it could serve as a technology platform for molecular studies of neurotransmitter-enzyme binding and drugs screening. Copyright © 2011 Elsevier B.V. All rights reserved.

  8. Space charge effects on the current-voltage characteristics of gated field emitter arrays

    NASA Astrophysics Data System (ADS)

    Jensen, K. L.; Kodis, M. A.; Murphy, R. A.; Zaidman, E. G.

    1997-07-01

    Microfabricated field emitter arrays (FEAs) can provide the very high electron current densities required for rf amplifier applications, typically on the order of 100 A/cm2. Determining the dependence of emission current on gate voltage is important for the prediction of emitter performance for device applications. Field emitters use high applied fields to extract current, and therefore, unlike thermionic emitters, the current densities can exceed 103A/cm2 when averaged over an array. At such high current densities, space charge effects (i.e., the influence of charge between cathode and collector on emission) affect the emission process or initiate conditions which can lead to failure mechanisms for field emitters. A simple model of a field emitter will be used to calculate the one-dimensional space charge effects on the emission characteristics by examining two components: charge between the gate and anode, which leads to Child's law, and charge within the FEA unit cell, which gives rise to a field suppression effect which can exist for a single field emitter. The predictions of the analytical model are compared with recent experimental measurements designed to assess space charge effects and predict the onset of gate current. It is shown that negative convexity on a Fowler-Nordheim plot of Ianode(Vgate) data can be explained in terms of field depression at the emitter tip in addition to reflection of electrons by a virtual cathode created when the anode field is insufficient to extract all of the current; in particular, the effects present within the unit cell constitute a newly described effect.

  9. Male short-tailed field voles (Microtus agrestis) build better insulated nests than females.

    PubMed

    Redman, P; Selman, C; Speakman, J R

    1999-12-01

    Nest construction is an extremely widespread behaviour. In small endotherms the nest serves primarily to provide insulation, and thereby retard heat loss of the constructor, or its offspring. In arctic and temperate regions many small mammals build nests to protect themselves from low ambient temperatures. We measured the physical properties of nests built by short-tailed field voles Microtus agrestis that were kept in captivity under cold conditions. The most important factor influencing nest insulation was nest wall thickness; however, nests with thick walls also contained more nesting material. Insulative capacity of the nest did not reach an asymptote up to nests containing 20 g of material. Nest insulation was not correlated with resting metabolic rate, body mass or body composition of the vole that constructed the nest. However, nests built by males had greater insulation than those made by females; males also had significantly lower food intake rates when compared to females with nests. No significant difference was observed in either fat mass or whole animal thermal conductance between males and females. Thermal conductance did increase significantly with increasing body mass, although not with resting metabolic rate. Voles with nests for prolonged periods had lower food intakes than voles without nests. The absolute saving averaged 1.9 g and was independent of body mass. This was a 28% saving on intake for a 22-g vole but only an 18% saving for a 40-g individual. When voles had nests for short periods they used the energy they saved to reduce food intake and increase body mass.

  10. Side-by-Side Field Evaluation of Highly Insulating Windows in the PNNL Lab Homes

    SciTech Connect

    Widder, Sarah H.; Parker, Graham B.; Baechler, Michael C.; Bauman, Nathan N.

    2012-08-01

    To examine the energy, air leakage, and thermal performance of highly insulating windows, a field evaluation was undertaken in a matched pair of all-electric, factory-built “Lab Homes” located on the Pacific Northwest National Laboratory (PNNL) campus in Richland, Washington. The “baseline” Lab Home B was retrofitted with “standard” double-pane clear aluminum-frame slider windows and patio doors, while the “experimental” Lab Home A was retrofitted with Jeld-Wen® triple-pane vinyl-frame slider windows and patio doors with a U-factor of 0.2 and solar heat gain coefficient of 0.19. To assess the window, the building shell air leakage, energy use, and interior temperatures of each home were compared during the 2012 winter heating and summer cooling seasons. The measured energy savings in Lab Home B averaged 5,821 watt-hours per day (Wh/day) during the heating season and 6,518 Wh/day during the cooling season. The overall whole-house energy savings of Lab Home B compared to Lab Home A are 11.6% ± 1.53% for the heating season and 18.4 ± 2.06% for the cooling season for identical occupancy conditions with no window coverings deployed. Extrapolating these energy savings numbers based on typical average heating degree days and cooling degree days per year yields an estimated annual energy savings of 12.2%, or 1,784 kWh/yr. The data suggest that highly insulating windows are an effective energy-saving measure that should be considered for high-performance new homes and in existing retrofits. However, the cost effectiveness of the measure, as determined by the simple payback period, suggests that highly insulating window costs continue to make windows difficult to justify on a cost basis alone. Additional reductions in costs via improvements in manufacturing and/or market penetration that continue to drive down costs will make highly insulating windows much more viable as a cost-effective energy efficiency measure. This study also illustrates that highly

  11. Electron emission properties of gated silicon field emitter arrays driven by laser pulses

    NASA Astrophysics Data System (ADS)

    Shimawaki, Hidetaka; Nagao, Masayoshi; Neo, Yoichiro; Mimura, Hidenori; Wakaya, Fujio; Takai, Mikio

    2016-10-01

    We report optically modulated electron emission from gated p-type silicon field emitter arrays (Si-FEAs). The device's "volcano" structure is designed to control the photoexcitation of electrons by transmitting light through the small gate aperture, thereby minimizing the photogeneration of slow diffusion carriers outside the depletion region in the tip. Compared to that in the dark, the emission current was enhanced by more than three orders of magnitude in the high field region when irradiated with blue laser pulses. Results from the time-resolved measurements of photoassisted electron emission showed that these possess the same response as the laser pulse with no discernible delay. These results indicate that the volcano device structure is effective at eliminating the generation of diffusion carriers and that a fully optimized FEA is promising as a photocathode for producing high-speed modulated electron beams.

  12. Extended Gate Field-Effect Transistor Biosensors for Point-Of-Care Testing of Uric Acid.

    PubMed

    Guan, Weihua; Reed, Mark A

    2017-01-01

    An enzyme-free redox potential sensor using off-chip extended-gate field effect transistor (EGFET) with a ferrocenyl-alkanethiol modified gold electrode has been used to quantify uric acid concentration in human serum and urine. Hexacyanoferrate (II) and (III) ions are used as redox reagent. The potentiometric sensor measures the interface potential on the ferrocene immobilized gold electrode, which is modulated by the redox reaction between uric acid and hexacyanoferrate ions. The device shows a near Nernstian response to uric acid and is highly specific to uric acid in human serum and urine. The interference that comes from glucose, bilirubin, ascorbic acid, and hemoglobin is negligible in the normal concentration range of these interferents. The sensor also exhibits excellent long term reliability and is regenerative. This extended gate field effect transistor based sensor is promising for point-of-care detection of uric acid due to the small size, low cost, and low sample volume consumption.

  13. Ionic-Liquid Gated Bilayer MoS2 Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Madusanka Perera, Meeghage; Chuang, Hsun-Jen; Lin, Ming-Wei; Chamlagain, Bhim; Tan, Xuebin; Ming-Cheng Cheng, Mark; Zhou, Zhixian

    2012-10-01

    We report the electrical characterization of ionic-liquid-gated bilayer MoS2 field-effect transistors. An On-Off current ratio greater than 10^6 is achieved for hole transport, while that for electron transport exceeds 10^8. The subthreshold swing of our bilayer MoS2 devices reaches as low as 47 mV/dec at 230 K, approaching the theoretical limit. We also demonstrate that 1) the extrinsic mobility of back-gated MoS2 field-effect transistors is largely limited by the contact resistance; and 2) the extremely large electrical-double-layer capacitance of ionic liquid significantly reduces the Schottky contact barrier leading up to three orders of magnitude mobility increase for electron transport.

  14. Numerical correction of coherence gate in full-field swept-source interference microscopy.

    PubMed

    Grebenyuk, Anton A; Ryabukho, Vladimir P

    2012-07-01

    A big problem in low-coherence interference microscopy is the degradation of the coherence signal caused by shift of the angular and temporal spectrum gates. It limits the depth of field in confocal optical coherence microscopy and degrades images of sample inner structure in most interference microscopy techniques. To overcome this problem we propose numerical correction of the coherence gate in application to full-field swept-source interference microscopy. The proposed technique allows three-dimensional sample imaging without mechanical movement of the microscope components and is also capable of determining separately the geometrical thickness and the refractive index of the sample layers, when the sample contains a transversal pattern. The applicability of the proposed technique is verified with numerical simulation.

  15. Giant tunable magnetoresistance of electrically gated graphene ribbon with lateral interface under magnetic field

    NASA Astrophysics Data System (ADS)

    Kadigrobov, A. M.

    2017-01-01

    Quantum dynamics and kinetics of electrically gated graphene ribbons with lateral n-p and n-p-n junctions under magnetic field are investigated. It is shown that the snake-like states [C. W. J. Beenakker, Rev. Mod. Phys. 80, 1337 (2008)] of quasiparticles skipping along the n-p interface do not manifest themselves in the main semi-classical part of the ribbon conductance. Giant oscillations of the conductance of a ribbon with an n-p-n junction are predicted and analytically calculated. Depending on the number of junctions inside the ribbon its magneto-resistance may be controllably changed by 50%-90% by an extremely small change of the magnetic field or the gate voltage.

  16. Optical holonomic single quantum gates with a geometric spin under a zero field

    NASA Astrophysics Data System (ADS)

    Sekiguchi, Yuhei; Niikura, Naeko; Kuroiwa, Ryota; Kano, Hiroki; Kosaka, Hideo

    2017-04-01

    The realization of fast fault-tolerant quantum gates on a single spin is the core requirement for solid-state quantum-information processing. As polarized light shows geometric interference, spin coherence is also geometrically controlled with light via the spin-orbit interaction. Here, we show that a geometric spin in a degenerate subspace of a spin-1 electronic system under a zero field in a nitrogen vacancy centre in diamond allows implementation of optical non-adiabatic holonomic quantum gates. The geometric spin under quasi-resonant light exposure undergoes a cyclic evolution in the spin-orbit space, and acquires a geometric phase or holonomy that results in rotations about an arbitrary axis by any angle defined by the light polarization and detuning. This enables universal holonomic quantum gates with a single operation. We demonstrate a complete set of Pauli quantum gates using the geometric spin preparation and readout techniques. The new scheme opens a path to holonomic quantum computers and repeaters.

  17. Extended-Gate Metal Oxide Semiconductor Field Effect Transistor-Based Biosensor for Detection of Deoxynivalenol

    NASA Astrophysics Data System (ADS)

    Kwon, Insu; Lee, Hee-Ho; Choi, Jinhyeon; Shin, Jang-Kyoo; Seo, Sang-Ho; Choi, Sung-Wook; Chun, Hyang Sook

    2011-06-01

    In this work, we present an extended-gate metal oxide semiconductor field effect transistor (MOSFET)-based biosensor for the detection of deoxynivalenol using a null-balancing circuit. An extended-gate MOSFET-based biosensor was fabricated by a standard complementary metal oxide semiconductor (CMOS) process and its characteristics were measured. A null-balancing circuit was used to measure the output voltage of the sensor directly, instead of measuring the drain current of the sensor. Au was used as the gate metal, which has a chemical affinity with thiol, which leads to the immobilization of a self-assembled monolayer (SAM) of mercaptohexadecanoic acid (MHDA). The SAM was used to immobilize the anti-deoxynivalenol antibody. The carboxyl group of the SAM was bound to the anti-deoxynivalenol antibody. The anti-deoxynivalenol antibody and deoxynivalenol were bound by their antigen-antibody reaction. The measurements were performed in phosphate buffered saline (PBS; pH 7.4) solution. A standard Ag/AgCl electrode was employed as a reference electrode. The bindings of a SAM, anti-deoxynivalenol antibody, and deoxynivalenol caused a variation in the output voltage of the extended-gate MOSFET-based biosensor. Surface plasmon resonance (SPR) measurement was performed to verify the interaction among the SAM, deoxynivalenol-antibody, and deoxynivalenol.

  18. Tunnel field-effect transistor with asymmetric gate dielectric and body thickness

    NASA Astrophysics Data System (ADS)

    Kwon, Dae Woong; Park, Byung-Gook

    2017-04-01

    Tunnel field-effect transistor (TFET) with asymmetric gate dielectric and body thickness (TFETAsy) is proposed. The TFETAsy not only reduces the tunneling resistance by using the thinner source-side gate dielectric and body, but also suppresses the ambipolar current (I ambipolar) and the degradation of alternating current (AC) switching performances with the thicker drain-side gate dielectric and body. Technology computer aided design process and device/circuit simulations are performed to verify the validity of the TFETAsy in terms of fabrication process and electrical characteristics. From the simulation results, it is revealed that the thinner source-side gate dielectric and body can be simply formed by oxide wet-etching after the selective oxidation of the source-side body. Moreover, the thinner source-side SiGe body can be also formed by using Ge condensation process instead of the oxidation. Additionally, it is confirmed that the TFETAsy has higher on-current, steeper subthreshold swing, lower I ambipolar and improved AC switching characteristics as compared to those of conventional TFET with symmetric structure.

  19. Label-free detection of interleukin-6 using electrolyte gated organic field effect transistors.

    PubMed

    Diacci, Chiara; Berto, Marcello; Di Lauro, Michele; Bianchini, Elena; Pinti, Marcello; Simon, Daniel T; Biscarini, Fabio; Bortolotti, Carlo A

    2017-09-27

    Cytokines are small proteins that play fundamental roles in inflammatory processes in the human body. In particular, interleukin (IL)-6 is a multifunctional cytokine, whose increased levels are associated with infection, cancer, and inflammation. The quantification of IL-6 is therefore of primary importance in early stages of inflammation and in chronic diseases, but standard techniques are expensive, time-consuming, and usually rely on fluorescent or radioactive labels. Organic electronic devices and, in particular, organic field-effect transistors (OFETs) have been proposed in the recent years as novel platforms for label-free protein detection, exploiting as sensing unit surface-immobilized antibodies or aptamers. Here, the authors report two electrolyte-gated OFETs biosensors for IL-6 detection, featuring monoclonal antibodies and peptide aptamers adsorbed at the gate. Both strategies yield biosensors that can work on a wide range of IL-6 concentrations and exhibit a remarkable limit of detection of 1 pM. Eventually, electrolyte gated OFETs responses have been used to extract and compare the binding thermodynamics between the sensing moiety, immobilized at the gate electrode, and IL-6.

  20. Ion-selective electrolyte-gated field-effect transistors: prerequisites for proper functioning

    NASA Astrophysics Data System (ADS)

    Kofler, Johannes; Schmoltner, Kerstin; List-Kratochvil, Emil J. W.

    2014-10-01

    Electrolyte-gated organic field-effect transistors (EGOFETs) used as transducers and amplifiers in potentiometric sensors have recently attracted a significant amount of scientific interest. For that reason, the fundamental prerequisites to achieve a proper potentiometric signal amplification and transduction are examined. First, polarizable as well as non-polarizable semiconductor- and gate-electrolyte- interface combinations are investigated by normal pulse voltammetry. The results of these measurements are correlated with the corresponding transistor characteristics, clarifying the functional principle of EGOFETs and the requirements for high signal amplification. In addition to a good electrical performance, the EGOFET-transducers should also be compatible with the targeted sensing application. Accordingly, the influence of different gate materials and electrolytes on the sensing abilities, are discussed. Even though all physical requirements are met, EGOFETs typically exhibit irreversible degradation, if the gate potential exceeds a certain level. For that reason, EGOFETs have to be operated using a constant source-drain operation mode which is presented by means of an H+ (pH) sensitive ion-sensor.

  1. Porphyrin-silicon hybrid field-effect transistor with individually addressable top-gate structure.

    PubMed

    Seol, Myeong-Lok; Choi, Sung-Jin; Kim, Chang-Hoon; Moon, Dong-Il; Choi, Yang-Kyu

    2012-01-24

    A conductance-controllable hybrid device that utilizes the photoinduced charge transfer behavior of a porphyrin in a field-effect transistor (FET) with a nanogap is proposed and analyzed. A conventional metal-oxide-semiconductor (MOS) structure is modified to form a nanogap in which the porphyrin can be embedded. The conductance of an inversion channel is controlled by the negatively charged, optically activated porphyrin molecules. The proposed nanogap-formed MOSFET structure solves the conventional dilemma that a top-gate cannot be used for an organic-inorganic hybrid device because the top-gate blocks an entire area of a channel where organic material should be immobilized. The top-gate structure has much practicality compared with the back-gate structure because each device can be controlled individually. Furthermore, the device is highly compatible with the chip-based integrated system because the fabrication process follows the standard complementary metal-oxide-semiconductor (CMOS) technology. The charge transfer mechanisms between silicon and porphyrin are analyzed using devices with different doping polarities and geometrical parameters. The results show that the influence of the negative charge of the porphyrin in the device is reversed when opposite doping polarities are used. The device characteristics can be comprehensively evaluated using the energy band diagram analysis and simulation. The possible application of the proposed device for nonvolatile memory is demonstrated using the optical charging and electrical discharging behavior of the porphyrins.

  2. Intense terahertz field effects on photoexcited carrier dynamics in gated graphene

    NASA Astrophysics Data System (ADS)

    Hafez, Hassan A.; Lévesque, Pierre L.; Al-Naib, Ibraheem; Dignam, Marc M.; Chai, Xin; Choubak, Saman; Desjardins, Patrick; Martel, Richard; Ozaki, Tsuneyuki

    2015-12-01

    We study nonlinear effects of intense terahertz (THz) field on photoexcited carrier dynamics in gated monolayer graphene. By employing optical-pump/intense-THz-probe spectroscopy on lightly doped graphene, we observe a crossover from negative to positive photo-induced THz differential transmission as the THz probe field is increased. We attribute this qualitative change in the response to a crossover from a regime where the photo-induced increase in the carrier density dominates the differential response to one where a THz-field-induced increase in the scattering rate dominates.

  3. Monte Carlo study of the electrothermal phenomenon in silicon-on-insulator and silicon-germanium-on-insulator metal-oxide field-effect transistors

    NASA Astrophysics Data System (ADS)

    Sadi, Toufik; Kelsall, Robert W.

    2010-03-01

    Self-heating effects are investigated in silicon-on-insulator (SOI), silicon-germanium-on-insulator (SGOI), and strained-silicon-directly-on-insulator (SSDOI) metal-oxide field-effect transistors (MOSFETs), using a Monte Carlo simulator self-consistently coupled with the solution of the heat diffusion equation. Although the influence of thermal effects is in general higher in these structures, as compared to bulk Si MOSFETs, its impact is much more important in SGOI and SSDOI FET structures incorporating ultrathin Si channels, with SGOI FETs giving the worst thermal performance. A study of the dependence of the extent of self-heating on the buried-oxide thickness is also performed, showing that this parameter is important in designing SOI structures with better thermal management.

  4. NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

    NASA Technical Reports Server (NTRS)

    Berg, Melanie; Label, Kenneth; Campola, Michael; Pellish, Jonathan

    2017-01-01

    This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.

  5. Characterization of Hardening by Design Techniques on Commercial, Small Feature Sized Field-Programmable Gate Arrays

    DTIC Science & Technology

    2009-03-01

    AFIT/GE/ENG/09-43 CHARACTERIZATION OF HARDENING BY DESIGN TECHNIQUES ON COMMERCIAL, SMALL FEATURE SIZED FIELD-PROGRAMMABLE GATE ARRAYS THESIS...The purpose of which is to determine the radiation effects and characterize the improvements of various hardening by design techniques. The...Distributed RAM memory elements that are loaded both with ECC and non-error corrected data. The circuit is designed to check for errors in memory data, stuck

  6. Implementing a Microcontroller Watchdog with a Field-Programmable Gate Array (FPGA)

    NASA Technical Reports Server (NTRS)

    Straka, Bartholomew

    2013-01-01

    Reliability is crucial to safety. Redundancy of important system components greatly enhances reliability and hence safety. Field-Programmable Gate Arrays (FPGAs) are useful for monitoring systems and handling the logic necessary to keep them running with minimal interruption when individual components fail. A complete microcontroller watchdog with logic for failure handling can be implemented in a hardware description language (HDL.). HDL-based designs are vendor-independent and can be used on many FPGAs with low overhead.

  7. Electrolyte-gated organic field-effect transistor sensors based on supported biotinylated phospholipid bilayer.

    PubMed

    Magliulo, Maria; Mallardi, Antonia; Mulla, Mohammad Yusuf; Cotrone, Serafina; Pistillo, Bianca Rita; Favia, Pietro; Vikholm-Lundin, Inger; Palazzo, Gerardo; Torsi, Luisa

    2013-04-11

    Anchored, biotinylated phospholipids forming the capturing layers in an electrolyte-gated organic field-effect transistor (EGOFET) allow label-free electronic specific detection at a concentration level of 10 nM in a high ionic strength solution. The sensing mechanism is based on a clear capacitive effect across the PL layers involving the charges of the target molecules. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. Synchronization in coupled Ikeda delay systems. Experimental observations using Field Programmable Gate Arrays

    NASA Astrophysics Data System (ADS)

    Valli, D.; Muthuswamy, B.; Banerjee, S.; Ariffin, M. R. K.; Wahab, A. W. A.; Ganesan, K.; Subramaniam, C. K.; Kurths, J.

    2014-06-01

    In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches - one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA).

  9. Magnetic-Field-Induced Insulator-Conductor Transition in SU(2) Quenched Lattice Gauge Theory

    SciTech Connect

    Buividovich, P.V.; Kharzeev, D.; Chernodub, M.N., Kalaydzhyan, T., Luschevskaya, E.V., and M.I. Polikarpov

    2010-09-24

    We study the correlator of two vector currents in quenched SU(2) lattice gauge theory with a chirally invariant lattice Dirac operator with a constant external magnetic field. It is found that in the confinement phase the correlator of the components of the current parallel to the magnetic field decays much slower than in the absence of a magnetic field, while for other components the correlation length slightly decreases. We apply the maximal entropy method to extract the corresponding spectral function. In the limit of zero frequency this spectral function yields the electric conductivity of quenched theory. We find that in the confinement phase the external magnetic field induces nonzero electric conductivity along the direction of the field, transforming the system from an insulator into an anisotropic conductor. In the deconfinement phase the conductivity does not exhibit any sizable dependence on the magnetic field.

  10. A simple laser locking system based on a field-programmable gate array

    SciTech Connect

    Jørgensen, N. B.; Birkmose, D.; Trelborg, K.; Wacker, L.; Winter, N.; Hilliard, A. J.; Arlt, J. J.; Bason, M. G.

    2016-07-15

    Frequency stabilization of laser light is crucial in both scientific and industrial applications. Technological developments now allow analog laser stabilization systems to be replaced with digital electronics such as field-programmable gate arrays, which have recently been utilized to develop such locking systems. We have developed a frequency stabilization system based on a field-programmable gate array, with emphasis on hardware simplicity, which offers a user-friendly alternative to commercial and previous home-built solutions. Frequency modulation, lock-in detection, and a proportional-integral-derivative controller are programmed on the field-programmable gate array and only minimal additional components are required to frequency stabilize a laser. The locking system is administered from a host-computer which provides comprehensive, long-distance control through a versatile interface. Various measurements were performed to characterize the system. The linewidth of the locked laser was measured to be 0.7 ± 0.1 MHz with a settling time of 10 ms. The system can thus fully match laser systems currently in use for atom trapping and cooling applications.

  11. A simple laser locking system based on a field-programmable gate array

    NASA Astrophysics Data System (ADS)

    Jørgensen, N. B.; Birkmose, D.; Trelborg, K.; Wacker, L.; Winter, N.; Hilliard, A. J.; Bason, M. G.; Arlt, J. J.

    2016-07-01

    Frequency stabilization of laser light is crucial in both scientific and industrial applications. Technological developments now allow analog laser stabilization systems to be replaced with digital electronics such as field-programmable gate arrays, which have recently been utilized to develop such locking systems. We have developed a frequency stabilization system based on a field-programmable gate array, with emphasis on hardware simplicity, which offers a user-friendly alternative to commercial and previous home-built solutions. Frequency modulation, lock-in detection, and a proportional-integral-derivative controller are programmed on the field-programmable gate array and only minimal additional components are required to frequency stabilize a laser. The locking system is administered from a host-computer which provides comprehensive, long-distance control through a versatile interface. Various measurements were performed to characterize the system. The linewidth of the locked laser was measured to be 0.7 ± 0.1 MHz with a settling time of 10 ms. The system can thus fully match laser systems currently in use for atom trapping and cooling applications.

  12. Substrate-affected instability in accumulation-mode InP metal-insulator-semiconductor field-effect transistor

    SciTech Connect

    Lee, P.Z.; Chang, H.L.; Meiners, L.G.

    1988-06-15

    The mechanism for drain current drift in accumulation-type InP metal-insulator-semiconductor field-effect transistor has in the past several years been attributed to oxide traps, interface states, and bulk traps. In this study we have found that deep levels in the semi-insulating InP substrate material can in some cases dominate the current drift of the accumulation-mode metal-insultor-semiconductor field-effect transistor. Iron, which is a deep-level acceptor, when present in large concentrations in semi-insulating InP substrate material, appears to provide poor transistor properties and a large long-term current drift.

  13. Field Testing of an Unvented Roof with Fibrous Insulation, Tiles, and Vapor Diffusion Venting

    SciTech Connect

    Ueno, K.; Lstiburek, J. W.

    2016-02-01

    This research is a test implementation of an unvented tile roof assembly in a hot-humid climate (Orlando, FL; Zone 2A), insulated with air permeable insulation (netted and blown fiberglass). Given the localized moisture accumulation and failures seen in previous unvented roof field work, it was theorized that a 'diffusion vent' (water vapor open, but air barrier 'closed') at the highest points in the roof assembly might allow for the wintertime release of moisture, to safe levels. The 'diffusion vent' is an open slot at the ridge and hips, covered with a water-resistant but vapor open (500+ perm) air barrier membrane. As a control comparison, one portion of the roof was constructed as a typical unvented roof (self-adhered membrane at ridge). The data collected to date indicate that the diffusion vent roof shows greater moisture safety than the conventional, unvented roof design.

  14. Composite fermions and the field-tuned superconductor-insulator transition

    NASA Astrophysics Data System (ADS)

    Raghu, Srinivas; Mulligan, Michael

    In several two-dimensional films that exhibit a magnetic field-tuned superconductor to insulator transition (SIT), stable metallic phases have been observed. Building on the `dirty boson' description of the SIT, we suggest that the metallic region is analogous to the composite Fermi liquid observed about half-filled Landau levels of the two-dimensional electron gas. The composite fermions here are mobile vortices attached to one flux quantum of an emergent gauge field. The composite vortex liquid is a 2D non-Fermi liquid metal, which we argue is stable to weak quenched disorder. We describe several experimental consequences of the emergent composite vortex liquid.

  15. Composite fermions and the field-tuned superconductor-insulator transition

    NASA Astrophysics Data System (ADS)

    Mulligan, Michael; Raghu, S.

    2016-05-01

    In several two-dimensional films that exhibit a magnetic field-tuned superconductor to insulator transition (SIT), stable metallic phases have been observed. Building on the `dirty boson' description of the SIT, we suggest that the metallic region is analogous to the composite Fermi liquid observed about half-filled Landau levels of the two-dimensional electron gas. The composite fermions here are mobile vortices attached to one flux quantum of an emergent gauge field. The composite vortex liquid is a 2D non-Fermi liquid metal, which we argue is stable to weak quenched disorder. We describe several experimental consequences of the emergent composite vortex liquid.

  16. Dual field effects in electrolyte-gated spinel ferrite: electrostatic carrier doping and redox reactions

    PubMed Central

    Ichimura, Takashi; Fujiwara, Kohei; Tanaka, Hidekazu

    2014-01-01

    Controlling the electronic properties of functional oxide materials via external electric fields has attracted increasing attention as a key technology for next-generation electronics. For transition-metal oxides with metallic carrier densities, the electric-field effect with ionic liquid electrolytes has been widely used because of the enormous carrier doping capabilities. The gate-induced redox reactions revealed by recent investigations have, however, highlighted the complex nature of the electric-field effect. Here, we use the gate-induced conductance modulation of spinel ZnxFe3−xO4 to demonstrate the dual contributions of volatile and non-volatile field effects arising from electronic carrier doping and redox reactions. These two contributions are found to change in opposite senses depending on the Zn content x; virtual electronic and chemical field effects are observed at appropriate Zn compositions. The tuning of field-effect characteristics via composition engineering should be extremely useful for fabricating high-performance oxide field-effect devices. PMID:25056718

  17. Fabrication and characterization of a charge-biased CMOS-MEMS resonant gate field effect transistor

    NASA Astrophysics Data System (ADS)

    Chin, C. H.; Li, C. S.; Li, M. H.; Wang, Y. L.; Li, S. S.

    2014-09-01

    A high-frequency charge-biased CMOS-MEMS resonant gate field effect transistor (RGFET) composed of a metal-oxide composite resonant-gate structure and an FET transducer has been demonstrated utilizing the TSMC 0.35 μm CMOS technology with Q > 1700 and a signal-to-feedthrough ratio greater than 35 dB under a direct two-port measurement configuration. As compared to the conventional capacitive-type MEMS resonators, the proposed CMOS-MEMS RGFET features an inherent transconductance gain (gm) offered by the FET transduction capable of enhancing the motional signal of the resonator and relaxing the impedance mismatch issue to its succeeding electronics or 50 Ω-based test facilities. In this work, we design a clamped-clamped beam resonant-gate structure right above a floating gate FET transducer as a high-Q building block through a maskless post-CMOS process to combine merits from the large capacitive transduction areas of the large-width beam resonator and the high gain of the underneath FET. An analytical model is also provided to simulate the behavior of the charge-biased RGFET; the theoretical prediction is in good agreement with the experimental results. Thanks to the deep-submicrometer gap spacing enabled by the post-CMOS polysilicon release process, the proposed resonator under a purely capacitive transduction already attains motional impedance less than 10 kΩ, a record-low value among CMOS-MEMS capacitive resonators. To go one step further, the motional signal of the proposed RGFET is greatly enhanced through the FET transduction. Such a strong transmission and a sharp phase transition across 0° pave a way for future RGFET-type oscillators in RF and sensor applications. A time-elapsed characterization of the charge leakage rate for the floating gate is also carried out.

  18. Highly stable organic field-effect transistors with engineered gate dielectrics (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Kippelen, Bernard; Wang, Cheng-Yin; Fuentes-Hernandez, Canek; Yun, Minseong; Singh, Ankit K.; Dindar, Amir; Choi, Sangmoo; Graham, Samuel

    2016-11-01

    Organic field-effect transistors (OFETs) have the potential to lead to low-cost flexible displays, wearable electronics, and sensors. While recent efforts have focused greatly on improving the maximum charge mobility that can be achieved in such devices, studies about the stability and reliability of such high performance devices are relatively scarce. In this talk, we will discuss the results of recent studies aimed at improving the stability of OFETs under operation and their shelf lifetime. In particular, we will focus on device architectures where the gate dielectric is engineered to act simultaneously as an environmental barrier layer. In the past, our group had demonstrated solution-processed top-gate OFETs using TIPS-pentacene and PTAA blends as a semiconductor layer with a bilayer gate dielectric layer of CYTOP/Al2O3, where the oxide layer was fabricated by atomic layer deposition, ALD. Such devices displayed high operational stability with little degradation after 20,000 on/off scan cycles or continuous operation (24 h), and high environmental stability when kept in air for more than 2 years, with unchanged carrier mobility. Using this stable device geometry, simple circuits and sensors operating in aqueous conditions were demonstrated. However, the Al2O3 layer was found to degrade due to corrosion under prolonged exposure in aqueous solutions. In this talk, we will report on the use of a nanolaminate (NL) composed of Al2O3 and HfO2 by ALD to replace the Al2O3 single layer in the bilayer gate dielectric use in top-gate OFETs. Such OFETs were found to operate under harsh condition such as immersion in water at 95 °C. This work was funded by the Department of Energy (DOE) through the Bay Area Photovoltaics Consortium (BAPVC) under Award Number DE-EE0004946.

  19. Effect of annealing temperature of Bi1.5Zn1.0Nb1.5O7 gate insulator on performance of ZnO based thin film transistors

    NASA Astrophysics Data System (ADS)

    Wei, Ye; Wei, Ren; Peng, Shi; Zhuangde, Jiang

    2016-07-01

    The bottom-gate structure ZnO based thin film transistors (ZnO-TFTs) using Bi1.5Zn1.0Nb1.5O7 (BZN) thin films as gate insulator were fabricated on Pt/SiO2/Si substrate by radio frequency magnetic sputtering. We investigated the effect of annealing temperature at 300, 400, and 500 °C on the performance of BZN thin films and ZnO-TFTs. XRD measurement confirmed that BZN thin films were amorphous in nature. BZN thin films annealed at 400 °C obtain the high capacitance density of 249 nF/cm2, high dielectric constant of 71, and low leakage current density of 10-7 A/cm2 on/off current ratio and field effect mobility of ZnO-TFTs annealed at 400 °C are approximately one order of magnitude and two times, respectively higher than that of ZnO-TFTs annealed at 300 °C. When the annealing temperature is 400 °C, the electrical performance of ZnO-TFTs is enhanced remarkably. Devices obtain a low sub-threshold swing of 470 mV/dec and surface states density of 3.21 × 1012cm-2. Project supported by the National Natural Science Foundation of China (Nos. 51332003, 51202184), the International Science & Technology Cooperation Program of China (Nos. 2010DFB13640, 2011DFA51880), and the “111 Project” of China (No. B14040).

  20. Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

    SciTech Connect

    Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Choi, Kyung Cheol E-mail: kyungcc@kaist.ac.kr; Park, Sang-Hee Ko E-mail: kyungcc@kaist.ac.kr

    2016-05-02

    We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al{sub 2}O{sub 3}, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV{sub th}) was 0 V even after a PBS time (t{sub stress}) of 3000 s under a gate voltage (V{sub G}) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV{sub th} value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV{sub th} values resulting from PBS quantitatively, the average oxide charge trap density (N{sub T}) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N{sub T} resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N{sub T} near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

  1. Interface trap of p-type gate integrated AlGaN/GaN heterostructure field effect transistors

    NASA Astrophysics Data System (ADS)

    Kim, Kyu Sang

    2017-09-01

    In this work, the impact of trap states at the p-(Al)GaN/AlGaN interface has been investigated for the normally-off mode p-(Al)GaN/AlGaN/GaN heterostructure field-effect transistors (HFETs) by means of frequency dependent conductance. From the current-voltage (I-V) measurement, it was found that the p-AlGaN gate integrated device has higher drain current and lower gate leakage current compared to the p-GaN gate integrated device. We obtained the interface trap density and the characteristic time constant for the p-type gate integrated HFETs under the forward gate voltage of up to 6 V. As a result, the interface trap density (characteristic time constant) of the p-GaN gate device was lower (longer) than that of the p-AlGaN. Furthermore, it was analyzed that the trap state energy level of the p-GaN gate device was located at the shallow level relative to the p-AlGaN gate device, which accounts for different gate leakage current of each devices.

  2. Characterization of SiO{sub 2}/SiN{sub x} gate insulators for graphene based nanoelectromechanical systems

    SciTech Connect

    Tóvári, E.; Csontos, M. Kriváchy, T.; Csonka, S.; Fürjes, P.

    2014-09-22

    The structural and magnetotransport characterization of graphene nanodevices exfoliated onto Si/SiO{sub 2}/SiN{sub x} heterostructures are presented. Improved visibility of the deposited flakes is achieved by optimal tuning of the dielectric film thicknesses. The conductance of single layer graphene Hall-bar nanostructures utilizing SiO{sub 2}/SiN{sub x} gate dielectrics were characterized in the quantum Hall regime. Our results highlight that, while exhibiting better mechanical and chemical stability, the effect of non-stoichiometric SiN{sub x} on the charge carrier mobility of graphene is comparable to that of SiO{sub 2}, demonstrating the merits of SiN{sub x} as an ideal material platform for graphene based nanoelectromechanical applications.

  3. Two-dimensional analytical model for hetero-junction double-gate tunnel field-effect transistor with a stacked gate-oxide structure

    NASA Astrophysics Data System (ADS)

    Xu, Hui Fang; Gui Guan, Bang

    2017-05-01

    A two-dimensional analytical model for hetero-junction double-gate tunnel FETs (DG TFETs) with a stacked gate-oxide structure is proposed in this paper. The effects of both the channel mobile charges and source/drain depletion regions on the channel potential profile are considered for the higher accuracy of the proposed model. Poisson’s equation is solved using the superposition principle and Fourier series solution to model the channel potential. The band-to-band tunneling generation rate is expressed as a function of the channel electric field derived from the channel potential and then integrated analytically to derive the drain current of the hetero-junction DG TFETs with a stacked gate-oxide structure using the shortest tunneling path. The effects of device parameters on the channel potential, drain current, and transconductance are investigated. Very good agreements are observed between the model calculations and the simulated results.

  4. Novel process for widening memory window of sub-200 nm ferroelectric-gate field-effect transistor by ferroelectric coating the gate-stack sidewall

    NASA Astrophysics Data System (ADS)

    Van Hai, Le; Takahashi, Mitsue; Zhang, Wei; Sakai, Shigeki

    2015-01-01

    Ferroelectric-gate field-effect transistors (FeFETs) with metallurgical-gate lengths of 140 nm, 160 nm and 190 nm were successfully fabricated using a novel fabrication process. The gate stacks of the FeFETs were Pt/Sr0.8Ca0.2Bi2Ta2O9(SCBT)/HfO2/Si. Key to the process was covering the as-etched gate-stack sidewalls with SCBT precursor films and annealing altogether. The FeFETs which underwent the novel process showed larger memory windows than those without the process by about 0.5 V at scanned gate-voltages of 1 ± 5 V. Endurances of the FeFETs made by the novel process were measured up to 109 cycles with good separations of the on- and off-states. The endurance pulses were 1 ± 5 V with 2 μs period. Good data-retentions of them were also demonstrated which were measured for at least 6.5 days.

  5. Rydberg-interaction gates via adiabatic passage and phase control of driving fields

    NASA Astrophysics Data System (ADS)

    Wu, Huaizhi; Huang, Xi-Rong; Hu, Chang-Sheng; Yang, Zhen-Biao; Zheng, Shi-Biao

    2017-08-01

    In this paper we propose two theoretical schemes for implementation of quantum phase gates by engineering the phase-sensitive dark state of two atoms subjected to Rydberg-Rydberg interaction. Combining the conventional adiabatic techniques and currently developed approaches of phase control, a feasible proposal for implementation of a geometric phase gate is presented, where the conditional phase shift (Berry phase) is achieved by adiabatically and cyclically changing the parameters of the driving fields. Here we find that the geometric phase acquired is related to the way how the relative phase is modulated. In the second scheme, the system Hamiltonian is adiabatically changed in a noncyclic manner, so that the acquired conditional phase is not a Berry phase. A detailed analysis of the experimental feasibility and the effect of decoherence is also given. The proposed schemes provide new perspectives for adiabatic manipulation of interacting Rydberg systems with tailored phase modulation.

  6. A novel Tunneling Graphene Nano Ribbon Field Effect Transistor with dual material gate: Numerical studies

    NASA Astrophysics Data System (ADS)

    Ghoreishi, Seyed Saleh; Saghafi, Kamyar; Yousefi, Reza; Moravvej-farshi, Mohammad Kazem

    2016-09-01

    In this work, we present Dual Material Gate Tunneling Graphene Nano-Ribbon Field Effect Transistors (DMG-T-GNRFET) mainly to suppress the am-bipolar current with assumption that sub-threshold swing which is one of the important characteristics of tunneling transistors must not be degraded. In the proposed structure, dual material gates with different work functions are used. Our investigations are based on numerical simulations which self-consistently solves the 2D Poisson based on an atomistic mode-space approach and Schrodinger equations, within the Non-Equilibrium Green's (NEGF). The proposed device shows lower off-current and on-off ratio becomes 5order of magnitude greater than the conventional device. Also two different short channel effects: Drain Induced Barrier Shortening (DIBS) and hot-electron effect are improved in the proposed device compare to the main structure.

  7. Numerical Computation of Electric Field and Potential Along Silicone Rubber Insulators Under Contaminated and Dry Band Conditions

    NASA Astrophysics Data System (ADS)

    Arshad; Nekahi, A.; McMeekin, S. G.; Farzaneh, M.

    2016-09-01

    Electrical field distribution along the insulator surface is considered one of the important parameters for the performance evaluation of outdoor insulators. In this paper numerical simulations were carried out to investigate the electric field and potential distribution along silicone rubber insulators under various polluted and dry band conditions. Simulations were performed using commercially available simulation package Comsol Multiphysics based on the finite element method. Various pollution severity levels were simulated by changing the conductivity of pollution layer. Dry bands of 2 cm width were inserted at the high voltage end, ground end, middle part, shed, sheath, and at the junction of shed and sheath to investigate the effect of dry band location and width on electric field and potential distribution. Partial pollution conditions were simulated by applying pollution layer on the top and bottom surface respectively. It was observed from the simulation results that electric field intensity was higher at the metal electrode ends and at the junction of dry bands. Simulation results showed that potential distribution is nonlinear in the case of clean and partially polluted insulator and linear for uniform pollution layer. Dry band formation effect both potential and electric field distribution. Power dissipated along the insulator surface and the resultant heat generation was also studied. The results of this study could be useful in the selection of polymeric insulators for contaminated environments.

  8. Cluster mean-field signature of entanglement entropy in bosonic superfluid-insulator transitions

    NASA Astrophysics Data System (ADS)

    Zhang, Li; Qin, Xizhou; Ke, Yongguan; Lee, Chaohong

    2016-08-01

    Entanglement entropy (EE), a fundamental concept in quantum information for characterizing entanglement, has been extensively employed to explore quantum phase transitions (QPTs). Although the conventional single-site mean-field (MF) approach successfully predicts the emergence of QPTs, it fails to include any entanglement. Here, in the framework of a cluster MF treatment, we extract the signature of EE in bosonic superfluid-insulator (SI) transitions. We consider a trimerized Kagomé lattice of interacting bosons, in which each trimer is treated as a cluster, and implement the cluster MF treatment by decoupling all intertrimer hopping. In addition to superfluid and integer insulator phases, we find that fractional insulator phases appear when the tunneling is dominated by the intratrimer part. To quantify the residual bipartite entanglement in a cluster, we calculate the second-order Rényi entropy, which can be experimentally measured by quantum interference of many-body twins. The second-order Rényi entropy itself is continuous everywhere, however, the continuousness of its first-order derivative breaks down at the phase boundary. This means that the bosonic SI transitions can still be efficiently captured by the residual entanglement in our cluster MF treatment. Besides to the bosonic SI transitions, our cluster MF treatment may also be used to capture the signature of EE for other QPTs in quantum superlattice models.

  9. Hybridization and Field Driven Phase Transitions in Hexagonally Warped Topological Insulators

    NASA Astrophysics Data System (ADS)

    Menon, Anirudha; Chowdhury, Debashree; Basu, Banasri

    2016-09-01

    In this paper, we discuss the role of material parameters and external field effects on a thin film topological insulator(TI) in the context of quantum phase transition (QPT). First, we consider an in-plane tilted magnetic field and determine the band structure of the surface states as a function of the tilt angle. We show that the presence of either a hybridization term or hexagonal warping or a combination of both leads to a semi-metal to insulator phase transition which is facilitated by their 𝒫𝒯 symmetry breaking character. We then note that while the introduction of an electric field does not allow for this QPT since it does not break 𝒫𝒯 symmetry, it can be used in conjunction with a tunneling element to reach a phase transition efficiently. The corresponding critical point is then nontrivially dependent on the electric field, which is pointed out here. Then, we demonstrate that including a hexagonal warping term leads to an immediate 𝒫𝒯 symmetry violating QPT.

  10. A Low Temperature, Solution-Processed Poly(4-vinylphenol), YO(x) Nanoparticle Composite/Polysilazane Bi-Layer Gate Insulator for ZnO Thin Film Transistor.

    PubMed

    Shin, Hyeonwoo; Kang, Chan-Mo; Chae, Hyunsik; Kim, Hyun-Gwan; Baek, Kyu-Ha; Choi, Hyoung Jin; Park, Man-Young; Do, Lee-Mi; Lee, Changhee

    2016-03-01

    Low temperature, solution-processed metal oxide thin film transistors (MEOTFTs) have been widely investigated for application in low-cost, transparent, and flexible electronics. To enlarge the application area, solution-processed gate insulators (GI) have been investigated in recent years. We investigated the effects of the organic/inorganic bi-layer GI to ZnO thin film transistors (TFTs). PVP, YO(x) nanoparticle composite, and polysilazane bi-layer showed low leakage current (-10(-8) A/cm2 in 2 MV), which are applicable in low temperature processed MEOTFTs. Polysilazane was used as an interlayer between ZnO and PVP, YO(x) nanoparticle composite as a good charge transport interface with ZnO. By applying the PVP, YO(x), nanoparticle composite/polysilazane bi-layer structure to ZnO TFTs, we successfully suppressed the off current (I(off)) to -10(-11) and fabricated good MEOTFTs in 180 degrees C.

  11. Epitaxial growth and characterization of thick multi-layer 4H-SiC for very high-voltage insulated gate bipolar transistors

    NASA Astrophysics Data System (ADS)

    Miyazawa, Tetsuya; Nakayama, Koji; Tanaka, Atsushi; Asano, Katsunori; Ji, Shi-yang; Kojima, Kazutoshi; Ishida, Yuuki; Tsuchida, Hidekazu

    2015-08-01

    Techniques to fabricate thick multi-layer 4H-SiC epitaxial wafers were studied for very high-voltage p- and n-channel insulated gate bipolar transistors (IGBTs). Multi-layer epitaxial growth, including a thick p- drift layer (˜180 μm), was performed on a 4H-SiC n+ substrate to form a p-IGBT structure. For an n-IGBT structure, an inverted growth process was employed, in which a thick n- drift layer (˜180 μm) and a thick p++ injector layer (>55 μm) were epitaxially grown. The epitaxial growth conditions were modified to attain a low defect density, a low doping concentration, and a long carrier lifetime in the drift layers. Reduction of the forward voltage drop was attempted by using carrier lifetime enhancement processes, specifically, carbon ion implantation/annealing and thermal oxidation/annealing or hydrogen annealing. Simple PiN diodes were fabricated to demonstrate the effective conductivity modulation in the thick drift layers. The forward voltage drops of the PiN diodes with the p- and n-IGBT structures promise to obtain the extremely low-loss and very high-voltage IGBTs. The change in wafer shape during the processing of the very thick multi-layer 4H-SiC is also discussed.

  12. Effects of gate insulator using high pressure annealing on the characteristics of solid phase crystallized polycrystalline silicon thin-film transistors

    NASA Astrophysics Data System (ADS)

    Kim, Moojin; Jin, GuangHai

    2009-04-01

    The oxidizing ambient was built using high pressure H2O vapor at 550 °C. For the solid phase crystallization (SPC) polycrystalline silicon (poly-Si) that is annealed for 1 h at 2 MPa, the oxide thickness is about 150 Å. The oxide layer is approximately 90 Å above the original surface of the poly-Si and 60 Å below the original surface. The oxide layer is used as the first gate insulator layer of thin-film transistors (TFTs). The heating at 550 °C with 2 MPa H2O vapor increased the carrier mobility from 17.6 cm2/V s of the conventional SPC process to 30.4 cm2/V s, and it reduced the absolute value of the threshold voltage (Vth) from 4.13 to 3.62 V. The subthreshold swing also decreased from 0.72 to 0.60 V/decade. This improvement is attributed mainly to the reduction in defect density at the oxide/poly-Si interface and in the poly-Si film by the high pressure annealing (HPA) process. Since the realization of excellent performance at the oxide/poly-Si interface and in poly-Si depends on the defect density, the poly-Si having the thermal oxide formed by a combined process of SPC and HPA may be well suited for fabrication of poly-Si TFTs for flat panel displays such as active matrix organic light emitting diodes.

  13. Field Evaluation of Highly Insulating Windows in the Lab Homes: Winter Experiment

    SciTech Connect

    Parker, Graham B.; Widder, Sarah H.; Bauman, Nathan N.

    2012-06-01

    This field evaluation of highly insulating windows was undertaken in a matched pair of 'Lab Homes' located on the Pacific Northwest National Laboratory (PNNL) campus during the 2012 winter heating season. Improving the insulation and solar heat gain characteristics of a home's windows has the potential to significantly improve the home's building envelope and overall thermal performance by reducing heat loss (in the winter), and cooling loss and solar heat gain (in the summer) through the windows. A high quality installation and/or window retrofit will also minimize or reduce air leakage through the window cavity and thus also contribute to reduced heat loss in the winter and cooling loss in the summer. These improvements all contribute to decreasing overall annual home energy use. Occupant comfort (non-quantifiable) can also be increased by minimizing or eliminating the cold 'draft' (temperature) many residents experience at or near window surfaces that are at a noticeably lower temperature than the room air temperature. Lastly, although not measured in this experiment, highly insulating windows (triple-pane in this experiment) also have the potential to significantly reduce the noise transmittance through windows compared to standard double-pane windows. The metered data taken in the Lab Homes and data analysis presented here represent 70 days of data taken during the 2012 heating season. As such, the savings from highly insulating windows in the experimental home (Lab Home B) compared to the standard double-pane clear glass windows in the baseline home (Lab Home A) are only a portion of the energy savings expected from a year-long experiment that would include a cooling season. The cooling season experiment will take place in the homes in the summer of 2012, and results of that experiment will be reported in a subsequent report available to all stakeholders.

  14. Role of deposition and annealing of the top gate dielectric in a-IGZO TFT-based dual-gate ion-sensitive field-effect transistors

    NASA Astrophysics Data System (ADS)

    Kumar, Narendra; Sutradhar, Moitri; Kumar, Jitendra; Panda, Siddhartha

    2017-03-01

    The deposition of the top gate dielectric in thin film transistor (TFT)-based dual-gate ion-sensitive field-effect transistors (DG ISFETs) is critical, and expected not to affect the bottom gate TFT characteristics, while providing a higher pH sensitive surface and efficient capacitive coupling between the gates. Amorphous Ta2O5, in addition to having good sensing properties, possesses a high dielectric constant of ˜25 making it well suited as the top gate dielectric in a DG ISFET by providing higher capacitive coupling (ratio of C top/C bottom) leading to higher amplification. To avoid damage of the a-IGZO channel reported to be caused by plasma exposure, deposition of Ta2O5 by e-beam evaporation followed by annealing was investigated in this work to obtain sensitivity over the Nernst limit. The deteriorated bottom gate TFT characteristics, indicated by an increase in the channel conductance, confirmed that plasma exposure is not the sole contributor to the changes. Oxygen vacancies at the Ta2O5/a-IGZO interface, which emerged during processing, increased the channel conductivity, became filled by optimum annealing in oxygen at 400 °C for 1 h, which was confirmed by an x-ray photoelectron spectroscopy depth profiling analysis. The obtained pH sensitivity of the TFT-based DG ISFET was 402 mV pH-1, which is about 6.8 times the Nernst limit (59 mV pH-1). The concept of capacitive coupling was also demonstrated by simulating an a-IGZO-based DG TFT structure. Here, the exposure of the top gate dielectric to the electrolyte without applying any top gate bias led to changes in the measured threshold voltage of the bottom gate TFT, and this obviated the requirement of a reference electrode needed in conventional ISFETs and other reported DG ISFETs. These devices, with high sensitivities and requiring low volumes (˜2 μl) of analyte solution, could be potential candidates for utilization as chemical sensors and biosensors.

  15. Fabrication of aligned nanofibers by electric-field-controlled electrospinning: insulating-block method

    NASA Astrophysics Data System (ADS)

    Hwang, Wontae; Pang, Changhyun; Chae, Heeyeop

    2016-10-01

    Aligned nanofiber arrays and mats were fabricated with an electrospinning process by manipulating the electric field. The electric field was modified by insulating blocks (IBs) that were installed between the nozzle and the substrate as guiding elements to control the trajectory of the electrospinning jet flow. Simulation results showed that the electric field was deformed near the IBs, resulting in confinement of the electrospinning jet between the blocks. The balance of the electric field in the vertical direction and the repulsive force by space charges in the confined electrified jet stream was attributed to the aligned motion of the jet. Aligned arrays of 200 nm thick polyethylene oxide nanofibers were obtained, exhibiting wave-shaped and cross patterns as well as rectilinear patterns. In addition, 40 μm thick quasi-aligned carbon-nanofiber mats with anisotropic electrical property were also attained by this method.

  16. Fabrication of aligned nanofibers by electric-field-controlled electrospinning: insulating-block method.

    PubMed

    Hwang, Wontae; Pang, Changhyun; Chae, Heeyeop

    2016-10-28

    Aligned nanofiber arrays and mats were fabricated with an electrospinning process by manipulating the electric field. The electric field was modified by insulating blocks (IBs) that were installed between the nozzle and the substrate as guiding elements to control the trajectory of the electrospinning jet flow. Simulation results showed that the electric field was deformed near the IBs, resulting in confinement of the electrospinning jet between the blocks. The balance of the electric field in the vertical direction and the repulsive force by space charges in the confined electrified jet stream was attributed to the aligned motion of the jet. Aligned arrays of 200 nm thick polyethylene oxide nanofibers were obtained, exhibiting wave-shaped and cross patterns as well as rectilinear patterns. In addition, 40 μm thick quasi-aligned carbon-nanofiber mats with anisotropic electrical property were also attained by this method.

  17. Electrostatic Gating of Ultrathin Films

    NASA Astrophysics Data System (ADS)

    Goldman, A. M.

    2014-07-01

    Electrostatic gating of ultrathin films can be used to modify electronic and magnetic properties of materials by effecting controlled alterations of carrier concentration while, in principle, not changing the level of disorder. As such, electrostatic gating can facilitate the development of novel devices and can serve as a means of exploring the fundamental properties of materials in a manner far simpler than is possible with the conventional approach of chemical doping. The entire phase diagram of a compound can be traversed by changing the gate voltage. In this review, we survey results involving conventional field effect devices as well as more recent progress, which has involved structures that rely on electrochemical configurations such as electric double-layer transistors. We emphasize progress involving thin films of oxide materials such as high-temperature superconductors, magnetic oxides, and oxides that undergo metal-insulator transitions.

  18. Physiologically gated microbeam radiation using a field emission x-ray source array

    SciTech Connect

    Chtcheprov, Pavel E-mail: zhou@email.unc.edu; Burk, Laurel; Inscoe, Christina; Ger, Rachel; Hadsell, Michael; Lu, Jianping; Yuan, Hong; Zhang, Lei; Chang, Sha; Zhou, Otto E-mail: zhou@email.unc.edu

    2014-08-15

    Purpose: Microbeam radiation therapy (MRT) uses narrow planes of high dose radiation beams to treat cancerous tumors. This experimental therapy method based on synchrotron radiation has been shown to spare normal tissue at up to 1000 Gy of peak entrance dose while still being effective in tumor eradication and extending the lifetime of tumor-bearing small animal models. Motion during treatment can lead to significant movement of microbeam positions resulting in broader beam width and lower peak to valley dose ratio (PVDR), which reduces the effectiveness of MRT. Recently, the authors have demonstrated the feasibility of generating microbeam radiation for small animal treatment using a carbon nanotube (CNT) x-ray source array. The purpose of this study is to incorporate physiological gating to the CNT microbeam irradiator to minimize motion-induced microbeam blurring. Methods: The CNT field emission x-ray source array with a narrow line focal track was operated at 160 kVp. The x-ray radiation was collimated to a single 280 μm wide microbeam at entrance. The microbeam beam pattern was recorded using EBT2 Gafchromic{sup ©} films. For the feasibility study, a strip of EBT2 film was attached to an oscillating mechanical phantom mimicking mouse chest respiratory motion. The servo arm was put against a pressure sensor to monitor the motion. The film was irradiated with three microbeams under gated and nongated conditions and the full width at half maximums and PVDRs were compared. An in vivo study was also performed with adult male athymic mice. The liver was chosen as the target organ for proof of concept due to its large motion during respiration compared to other organs. The mouse was immobilized in a specialized mouse bed and anesthetized using isoflurane. A pressure sensor was attached to a mouse's chest to monitor its respiration. The output signal triggered the electron extraction voltage of the field emission source such that x-ray was generated only during a

  19. Physiologically gated microbeam radiation using a field emission x-ray source array.

    PubMed

    Chtcheprov, Pavel; Burk, Laurel; Yuan, Hong; Inscoe, Christina; Ger, Rachel; Hadsell, Michael; Lu, Jianping; Zhang, Lei; Chang, Sha; Zhou, Otto

    2014-08-01

    Microbeam radiation therapy (MRT) uses narrow planes of high dose radiation beams to treat cancerous tumors. This experimental therapy method based on synchrotron radiation has been shown to spare normal tissue at up to 1000 Gy of peak entrance dose while still being effective in tumor eradication and extending the lifetime of tumor-bearing small animal models. Motion during treatment can lead to significant movement of microbeam positions resulting in broader beam width and lower peak to valley dose ratio (PVDR), which reduces the effectiveness of MRT. Recently, the authors have demonstrated the feasibility of generating microbeam radiation for small animal treatment using a carbon nanotube (CNT) x-ray source array. The purpose of this study is to incorporate physiological gating to the CNT microbeam irradiator to minimize motion-induced microbeam blurring. The CNT field emission x-ray source array with a narrow line focal track was operated at 160 kVp. The x-ray radiation was collimated to a single 280 μm wide microbeam at entrance. The microbeam beam pattern was recorded using EBT2 Gafchromic(©) films. For the feasibility study, a strip of EBT2 film was attached to an oscillating mechanical phantom mimicking mouse chest respiratory motion. The servo arm was put against a pressure sensor to monitor the motion. The film was irradiated with three microbeams under gated and nongated conditions and the full width at half maximums and PVDRs were compared. An in vivo study was also performed with adult male athymic mice. The liver was chosen as the target organ for proof of concept due to its large motion during respiration compared to other organs. The mouse was immobilized in a specialized mouse bed and anesthetized using isoflurane. A pressure sensor was attached to a mouse's chest to monitor its respiration. The output signal triggered the electron extraction voltage of the field emission source such that x-ray was generated only during a portion of the mouse

  20. Linear kink effect Lorentzians in the noise spectra of n- and p-channel fin field-effect transistors processed in standard and strained silicon-on-insulator substrates

    NASA Astrophysics Data System (ADS)

    Lukyanchikova, N.; Garbar, N.; Kudina, V.; Smolanka, A.; Claeys, C.; Simoen, E.

    2009-06-01

    The Lorentzian-like noise induced by Electron Valence Band (EVB) tunneling has been investigated in n- and p-channel multiple-gate field-effect transistors (MuGFETs), processed on silicon-on-insulator (SOI) and strained SOI (sSOI) substrates. The effect has been studied for different back-gate and front-gate biases and as a function of the device geometry. Similar as for wide fully depleted SOI transistors, this type of excess low-frequency noise is found when the back gate is biased in accumulation. However, it is shown that the characteristic time constant of the Lorentzian cannot be modeled assuming a uniform EVB tunneling current across the gate area of the MuGFETs. This indicates an impact of the three-dimensional nature of the device architecture on the so-called linear kink effects. In addition, it is demonstrated that the tensile strain in sSOI MuGFETs also yields a change in the Lorentzian parameters, associated with changes in the EVB tunneling current.

  1. Magnetic field tuning of an excitonic insulator between the weak and strong coupling regimes in quantum limit graphite [Tunable excitonic insulator in quantum limit graphite

    DOE PAGES

    Zhu, Zengwei; McDonald, R. D.; Shekhter, A.; ...

    2017-05-04

    Here, the excitonic insulator phase has long been predicted to form in proximity to a band gap opening in the underlying band structure. The character of the pairing is conjectured to crossover from weak (BCS-like) to strong coupling (BEC-like) as the underlying band structure is tuned from the metallic to the insulating side of the gap opening. Here we report the high-magnetic field phase diagram of graphite to exhibit just such a crossover. By way of comprehensive angle-resolved magnetoresistance measurements, we demonstrate that the underlying band gap opening occurs inside the magnetic field-induced phase, paving the way for a systematicmore » study of the BCS-BEC-like crossover by means of conventional condensed matter probes.« less

  2. Holographic superconductor/insulator transition with logarithmic electromagnetic field in Gauss-Bonnet gravity

    NASA Astrophysics Data System (ADS)

    Jing, Jiliang; Pan, Qiyuan; Chen, Songbai

    2012-10-01

    The behaviors of the holographic superconductors/insulator transition are studied by introducing a charged scalar field coupled with a logarithmic electromagnetic field in both the Einstein-Gauss-Bonnet AdS black hole and soliton. For the Einstein-Gauss-Bonnet AdS black hole, we find that: i) the larger coupling parameter of logarithmic electrodynamic field b makes it easier for the scalar hair to be condensed; ii) the ratio of the gap frequency in conductivity ωg to the critical temperature Tc depends on both b and the Gauss-Bonnet constant α; and iii) the critical exponents are independent of the b and α. For the Einstein-Gauss-Bonnet AdS soliton, we show that the system is the insulator phase when the chemical potential μ is small, but there is a phase transition and the AdS soliton reaches the superconductor (or superfluid) phase when μ is larger than critical chemical potential. A special property should be noted is that the critical chemical potential is not changed by the coupling parameter b but depends on α.

  3. Touch sensors based on planar liquid crystal-gated-organic field-effect transistors

    NASA Astrophysics Data System (ADS)

    Seo, Jooyeok; Lee, Chulyeon; Han, Hyemi; Lee, Sooyong; Nam, Sungho; Kim, Hwajeong; Lee, Joon-Hyung; Park, Soo-Young; Kang, Inn-Kyu; Kim, Youngkyoo

    2014-09-01

    We report a tactile touch sensor based on a planar liquid crystal-gated-organic field-effect transistor (LC-g-OFET) structure. The LC-g-OFET touch sensors were fabricated by forming the 10 μm thick LC layer (4-cyano-4'-pentylbiphenyl - 5CB) on top of the 50 nm thick channel layer (poly(3-hexylthiophene) - P3HT) that is coated on the in-plane aligned drain/source/gate electrodes (indium-tin oxide - ITO). As an external physical stimulation to examine the tactile touch performance, a weak nitrogen flow (83.3 μl/s) was employed to stimulate the LC layer of the touch device. The LC-g-OFET device exhibited p-type transistor characteristics with a hole mobility of 1.5 cm2/Vs, but no sensing current by the nitrogen flow touch was measured at sufficiently high drain (VD) and gate (VG) voltages. However, a clear sensing current signal was detected at lower voltages, which was quite sensitive to the combination of VD and VG. The best voltage combination was VD = -0.2 V and VG = -1 V for the highest ratio of signal currents to base currents (i.e., signal-to-noise ratio). The change in the LC alignment upon the nitrogen flow touch was assigned as the mechanism for the present LC-g-OFET touch sensors.

  4. Effect of muscle contraction strength on gating of somatosensory magnetic fields.

    PubMed

    Sugawara, Kazuhiro; Onishi, Hideaki; Yamashiro, Koya; Kotan, Shinichi; Kojima, Sho; Miyaguchi, Shota; Tsubaki, Atsuhiro; Kirimoto, Hikari; Tamaki, Hiroyuki; Shirozu, Hiroshi; Kameyama, Shigeki

    2016-11-01

    Afferent somatosensory information is modulated before the afferent input arrives at the primary somatosensory cortex during voluntary movement. The aim of the present study was to clarify the effect of muscular contraction strength on somatosensory evoked fields (SEFs) during voluntary movement. In addition, we examined the differences in gating between innervated and non-innervated muscle during contraction. We investigated the changes in gating effect by muscular contraction strength and innervated and non-innervated muscles in human using 306-channel magnetoencephalography. SEFs were recorded following the right median nerve stimulation in a resting condition and during isometric muscular contractions from 10 % electromyographic activity (EMG), 20 and 30 % EMG of the right extensor indicis muscle and abductor pollicis brevis muscle. Our results showed that the equivalent current dipole (ECD) strength for P35m decreased with increasing strength of muscular contraction of the right abductor pollicis brevis muscle. However, changes were observed only at 30 % EMG contraction level of the right extensor indicis muscle, which was not innervated by the median nerve. There were no significant changes in the peak latencies and ECD locations of each component in all conditions. The ECD strength did not differ significantly for N20m and P60m regardless of the strength of muscular contraction and innervation. Therefore, we suggest that the gating of SEF waveforms following peripheral nerve stimulation was affected by the strength of muscular contraction and innervation of the contracting muscle.

  5. Ionic-Liquid Gated Few-layer MoS2 Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Perera, Meeghage; Lin, Ming-Wei; Chuang, Hsun-Jen; Chamlagain, Bhim; Wang, Chongyu; Tan, Xuebin; Cheng, Mark Ming-Cheng; Zhou, Zhixian

    2013-03-01

    We report the electrical characterization of ionic-liquid-gated bilayer and few-layer MoS2 field-effect transistors. The extrinsic mobility of our ionic-liquid-gated devices exceeds 70 cm2V-1S-1 at 250 K, which is 1-2 orders of magnitude higher than that measured in the Si back-gate configuration (without ionic liquid). These devices also show ambipolar behavior with a high ON-OFF current ratio of > 107 for electrons and > 106 for holes, and a near ideal subthreshold swing (SS) of ~ 50 mV/decade at 250 K for the electron channel. More significantly, we show that the mobility increases from ~ 100 cm2V-1S-1 at 180 K to ~ 220 cm2V-1S-1 at 77K as the temperature decreases following a μ ~ T-γ dependence with γ ~ 1, indicating that the intrinsic phonon-limited mobility can be achieved in few-layer MoS2 FETs. We attribute the enhanced device performance to the drastic reduction of the Schottky barrier width (thus higher tunneling efficiency) via highly efficient band bending at the MoS2/metal interface afforded by the extremely large electrical double layer capacitance of the ionic liquid. This work was supported by NSF (No. ECCS-1128297).

  6. Non-abelian gauge fields and topological insulators in shaken optical lattices.

    PubMed

    Hauke, Philipp; Tieleman, Olivier; Celi, Alessio; Olschläger, Christoph; Simonet, Juliette; Struck, Julian; Weinberg, Malte; Windpassinger, Patrick; Sengstock, Klaus; Lewenstein, Maciej; Eckardt, André

    2012-10-05

    Time-periodic driving like lattice shaking offers a low-demanding method to generate artificial gauge fields in optical lattices. We identify the relevant symmetries that have to be broken by the driving function for that purpose and demonstrate the power of this method by making concrete proposals for its application to two-dimensional lattice systems: We show how to tune frustration and how to create and control band touching points like Dirac cones in the shaken kagome lattice. We propose the realization of a topological and a quantum spin Hall insulator in a shaken spin-dependent hexagonal lattice. We describe how strong artificial magnetic fields can be achieved for example in a square lattice by employing superlattice modulation. Finally, exemplified on a shaken spin-dependent square lattice, we develop a method to create strong non-abelian gauge fields.

  7. Magnetic field induced metal-insulator transition in a kagome nanoribbon

    NASA Astrophysics Data System (ADS)

    Dey, Moumita; Maiti, Santanu K.; Karmakar, S. N.

    2011-11-01

    In the present work, we investigate two-terminal electron transport through a finite width kagome lattice nanoribbon in presence of a perpendicular magnetic field. We employ a simple tight-binding (T-B) Hamiltonian to describe the system and obtain the transmission properties by using Green's function technique within the framework of Landauer-Büttiker formalism. After presenting an analytical description of energy dispersion relation of a kagome nanoribbon in presence of the magnetic field, we investigate numerically the transmittance spectra together with the density of states and current-voltage characteristics. It is shown that for a specific value of the Fermi energy, the kagome network can exhibit a magnetic field induced metal-insulator transition, which is the central investigation of this communication. Our analysis may be inspiring in designing low-dimensional switching devices.

  8. Ultralow turnoff loss dual-gate SOI LIGBT with trench gate barrier and carrier stored layer

    NASA Astrophysics Data System (ADS)

    He, Yi-Tao; Qiao, Ming; Zhang, Bo

    2016-12-01

    A novel ultralow turnoff loss dual-gate silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-drift, and an n-type carrier stored (CS) layer beneath the p-well. In the on-state, the extra trench gate acts as a barrier, which increases the carrier density at the cathode side of n-drift region, resulting in a decrease of the on-state voltage drop (Von). In the off-state, due to the uniform carrier distribution and the assisted depletion effect induced by the extra trench gate, large number of carriers can be removed at the initial turnoff process, contributing to a low turnoff loss (Eoff). Moreover, owing to the dual-gate field plates and CS layer, the carrier density beneath the p-well can greatly increase, which further improves the tradeoff between Eoff and Von. Simulation results show that Eoff of the proposed SOI LIGBT can decrease by 77% compared with the conventional trench gate SOI LIGBT at the same Von of 1.1 V. Project supported by the National Natural Science Foundation of China (Grant Nos. 61376080 and 61674027) and the Natural Science Foundation of Guangdong Province, China (Grant Nos. 2014A030313736 and 2016A030311022).

  9. Electrolyte-gated graphene field-effect transistors for detecting pH and protein adsorption.

    PubMed

    Ohno, Yasuhide; Maehashi, Kenzo; Yamashiro, Yusuke; Matsumoto, Kazuhiko

    2009-09-01

    We investigated electrolyte-gated graphene field-effect transistors (GFETs) for electrical detecting pH and protein adsorptions. Nonfunctionalized single-layer graphene was used as a channel. GFETs immersed in an electrolyte showed transconductances 30 times higher than those in a vacuum and their conductances exhibited a direct linear increase with electrolyte pH, indicating their potential for use in pH sensor applications. We also attempted to direct surface-protein adsorption and showed that the conductance of GFETs increased with exposure to a protein at several hundred picomolar. The GFETs thus acted as highly sensitive electrical sensors for detecting pH and biomolecule concentrations.

  10. Architecture optimization of nanobridge-based field-programmable gate array and its evaluation

    NASA Astrophysics Data System (ADS)

    Bai, Xu; Sakamoto, Toshitsugu; Tsuji, Yukihide; Miyamura, Makoto; Morioka, Ayuka; Nebashi, Ryusuke; Tada, Munehiro; Banno, Naoki; Okamoto, Koichiro; Iguchi, Noriyuki; Hada, Hiromitsu; Sugibayashi, Tadahiko

    2017-04-01

    Logic cell architecture on nanobridge-based field-programmable gate array (NB-FPGA) is investigated in terms of cell area and signal delay. Area-delay product is minimized when the cluster size is 4 and the segment length is 4, because of small area and small capacitance of nanobridge (NB). 1.34× logic density improvement and 15% energy saving, compared to the previous NB-FPGA with cluster size = 2, are demonstrated by implementing an application of a lightweight block cipher.

  11. Reprogrammable field programmable gate array with integrated system for mitigating effects of single event upsets

    NASA Technical Reports Server (NTRS)

    Ng, Tak-kwong (Inventor); Herath, Jeffrey A. (Inventor)

    2010-01-01

    An integrated system mitigates the effects of a single event upset (SEU) on a reprogrammable field programmable gate array (RFPGA). The system includes (i) a RFPGA having an internal configuration memory, and (ii) a memory for storing a configuration associated with the RFPGA. Logic circuitry programmed into the RFPGA and coupled to the memory reloads a portion of the configuration from the memory into the RFPGA's internal configuration memory at predetermined times. Additional SEU mitigation can be provided by logic circuitry on the RFPGA that monitors and maintains synchronized operation of the RFPGA's digital clock managers.

  12. Note: The design of thin gap chamber simulation signal source based on field programmable gate array

    SciTech Connect

    Hu, Kun; Wang, Xu; Li, Feng; Jin, Ge; Lu, Houbing; Liang, Futian

    2015-01-15

    The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability.

  13. Qualification Strategies of Field Programmable Gate Arrays (FPGAs) for Space Application

    NASA Technical Reports Server (NTRS)

    Sheldon, Douglas; Schone, Harald

    2005-01-01

    This viewgraph document reviews the issue of using Field Programmable Gate Arrays (FPGAs) in Space Application, and the some of the strategies for qualifying the FPGA. Qualification and risk management of such complex systems requires new approaches. The paper presents a matrix approach to qualification has been presented that: - Complements historical specifications - Highlights the importance of device physics as a cornerstone to qualification. - Provides levels of risk management that expressly document trade offs. - Stresses the role of the FPGA vendor as team member in the development of modern spacecraft.

  14. Gap-gate field effect gas sensing device for chemical image generation

    NASA Astrophysics Data System (ADS)

    Filippini, D.; Lundström, I.; Uchida, H.

    2004-04-01

    A field effect chemically sensitive device, specially suited for the generation of scanning light pulse technique chemical images, is demonstrated. The present approach provides a complete separation between the required electrical biasing and chemical sensing functions inherently coupled in all previous systems. The concept is demonstrated by sensing hydrogen with insensitive biasing electrodes, composing a so-called gap gate, combined with discontinuous palladium clusters usually unsuitable for sensing in conventional arrangements. A simple one-dimensional model is used to explain the observed behavior.

  15. Hardware Implementation of a Lossless Image Compression Algorithm Using a Field Programmable Gate Array

    NASA Astrophysics Data System (ADS)

    Klimesh, M.; Stanton, V.; Watola, D.

    2000-10-01

    We describe a hardware implementation of a state-of-the-art lossless image compression algorithm. The algorithm is based on the LOCO-I (low complexity lossless compression for images) algorithm developed by Weinberger, Seroussi, and Sapiro, with modifications to lower the implementation complexity. In this setup, the compression itself is performed entirely in hardware using a field programmable gate array and a small amount of random access memory. The compression speed achieved is 1.33 Mpixels/second. Our algorithm yields about 15 percent better compression than the Rice algorithm.

  16. Threshold voltage control of electrolyte solution gate field-effect transistor by electrochemical oxidation

    NASA Astrophysics Data System (ADS)

    Naramura, Takuro; Inaba, Masafumi; Mizuno, Sho; Igarashi, Keisuke; Kida, Eriko; Mohd Sukri, Shaili Falina; Shintani, Yukihiro; Kawarada, Hiroshi

    2017-07-01

    Diamond electrolyte solution-gate-field effect transistors (SGFETs) are suitable for applications as chemical ion sensors because of their wide potential window and good physical and chemical stabilities. In this study, we fabricated an anodically oxidized diamond SGFET from a full hydrogen-terminated diamond SGFET and demonstrated control of the device threshold voltage by irreversible anodic oxidation. The applied anodic bias voltage (VAO) was varied gradually from low to high (1.1-1.7 V). As the anodic oxidation proceeded, the threshold voltage shifted to more negative values with no degradation of hole mobility. Thus, anodic oxidation is a useful method for controlling the threshold voltage of diamond SGFETs.

  17. Electric Double Layer Gate Field-Effect Transistors Based on Si

    NASA Astrophysics Data System (ADS)

    Takashi Yanase,; Toshihiro Shimada,; Tetsuya Hasegawa,

    2010-04-01

    Electric double layer field-effect transistors (EDL-FETs) were fabricated using single crystal Si wafer as the active semiconductor and various characteristics were studied including dynamic response against step-function gate bias. The static FET mobility was more than 100 cm2 V-1 s-1. The response time of the drain current was 20 μs for ionic liquid and 3 ms for poly(ethylene glycol) (PEG) solution of LiBF4. Unexpected fast response was observed at a certain “speed up bias” condition. This effect will be useful to switching circuits using EDL-FETs.

  18. Electric Double Layer Gate Field-Effect Transistors Based on Si

    NASA Astrophysics Data System (ADS)

    Yanase, Takashi; Shimada, Toshihiro; Hasegawa, Tetsuya

    2010-04-01

    Electric double layer field-effect transistors (EDL-FETs) were fabricated using single crystal Si wafer as the active semiconductor and various characteristics were studied including dynamic response against step-function gate bias. The static FET mobility was more than 100 cm2 V-1 s-1. The response time of the drain current was 20 µs for ionic liquid and 3 ms for poly(ethylene glycol) (PEG) solution of LiBF4. Unexpected fast response was observed at a certain “speed up bias” condition. This effect will be useful to switching circuits using EDL-FETs.

  19. A control system based on field programmable gate array for papermaking sewage treatment

    NASA Astrophysics Data System (ADS)

    Zhang, Zi Sheng; Xie, Chang; Qing Xiong, Yan; Liu, Zhi Qiang; Li, Qing

    2013-03-01

    A sewage treatment control system is designed to improve the efficiency of papermaking wastewater treatment system. The automation control system is based on Field Programmable Gate Array (FPGA), coded with Very-High-Speed Integrate Circuit Hardware Description Language (VHDL), compiled and simulated with Quartus. In order to ensure the stability of the data used in FPGA, the data is collected through temperature sensors, water level sensor and online PH measurement system. The automatic control system is more sensitive, and both the treatment efficiency and processing power are increased. This work provides a new method for sewage treatment control.

  20. Plasmon-controlled optimum gate bias for GaN heterostructure field-effect transistors

    NASA Astrophysics Data System (ADS)

    Šimukovič, A.; Matulionis, A.; Liberis, J.; Šermukšnis, E.; Sakalas, P.; Zhang, F.; Leach, J. H.; Avrutin, V.; Morkoç, H.

    2013-05-01

    Electron density-dependent dc, rf and power characteristics are investigated for nearly lattice-matched InAlN/AlN/GaN heterostructure field-effect transistors (HFETs). The best performance in respect to transconductance and cutoff frequency is demonstrated at the optimal gate bias of -8 V for the devices with electron sheet density of 3 × 1013 cm-2 (measured on Hall bars of as-grown heterostructures). The results are in fair agreement with the universal bias-density relation controlled by the plasmon-assisted ultrafast decay of nonequilibrium optical phonons launched by hot electrons.

  1. Self-Aligned Integrally Gated Nanofilament Field Emitter Cell and Array

    DTIC Science & Technology

    2001-03-09

    composed of carbon nanotubes , alternate nanofilaments may be nanowires composed of Si, Ge, SiC, GaAs, GaP, InAs, InP, ZnS, ZnSe, CdS, CdSe, MoS2 , WS2...integrally gated, self-aligned field emitter cell and array whose cathode is formed of a recently discovered class of materials of nanotubes and...nanotechnology have resulted in the creation of nanofilaments including nanotubes . One such example is carbon nanotubes . These nanotubes behave like

  2. High-resolution full-field spatial coherence gated optical tomography using monochromatic light source

    NASA Astrophysics Data System (ADS)

    Srivastava, Vishal; Nandy, Sreyankar; Singh Mehta, Dalip

    2013-09-01

    We demonstrate dispersion free, high-resolution full-field spatial coherence gated optical tomography using spatially incoherent monochromatic light source. Spatial coherence properties of light source were synthesized by means of combining a static diffuser and vibrating multi mode fiber bundle. Due to low spatial coherence of light source, the axial resolution of the system was achieved similar to that of conventional optical coherence tomography which utilizes low temporal coherence. Experimental results of fringe visibility versus optical path difference are presented for varying numerical apertures objective lenses. High resolution optically sectioned images of multilayer onion skin, and red blood cells are presented.

  3. Field programmable gate array-assigned complex-valued computation and its limits

    SciTech Connect

    Bernard-Schwarz, Maria; Zwick, Wolfgang; Klier, Jochen; Wenzel, Lothar; Gröschl, Martin

    2014-09-15

    We discuss how leveraging Field Programmable Gate Array (FPGA) technology as part of a high performance computing platform reduces latency to meet the demanding real time constraints of a quantum optics simulation. Implementations of complex-valued operations using fixed point numeric on a Virtex-5 FPGA compare favorably to more conventional solutions on a central processing unit. Our investigation explores the performance of multiple fixed point options along with a traditional 64 bits floating point version. With this information, the lowest execution times can be estimated. Relative error is examined to ensure simulation accuracy is maintained.

  4. Design and test of field programmable gate arrays in space applications

    NASA Technical Reports Server (NTRS)

    Mckerracher, Priscilla L.; Cain, Russel P.; Barnett, Jon C.; Green, William S.; Kinnison, James D.

    1992-01-01

    Field Programmable Gate Arrays (FPGAU's) offer substantial benefits in terms of flexibility and design integration. In addition to qualifying this device for space applications by establishing its reliability and evaluating its sensitivity to radiation, screening the programmed devices with Automatic Test Equipment (ATE) and functional burn-in presents an interesting challenge. This paper presents a review of the design, qualification, and screening cycle employed for FPGA designs in a space program, and demonstrates the need for close interaction between design and test engineers.

  5. Lossless Kerr-phase gate in a quantum-well system via tunneling interference effect for weak fields

    NASA Astrophysics Data System (ADS)

    Shi, Y. L.; Huang, Y. C.; Wu, J. X.; Zhu, C. J.; Xu, J. P.; Yang, Y. P.

    2015-06-01

    We examine a lossless Kerr-phase gate in a semiconductor quantum-well system via the tunneling interference effect for weak fields. We show that there exists a magic detuning for the signal field, at which the absorption or amplification for the probe field can be eliminated by increasing the tunneling interference effect. Simultaneously, the probe field will acquire a -π phase shift at the exit of the medium. We demonstrate with numerical simulations that a lossless Kerr-phase gate is achieved, which may result in many applications in information science and telecommunication.

  6. Very Low-Voltage Operation of Ionic Liquid-Gated n-Type Organic Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Uemura, Takafumi; Yamagishi, Masakazu; Ono, Shimpei; Takeya, Jun

    2010-01-01

    n-Type organic field-effect transistors are operated with high transconductance at very low gate voltage using ionic-liquid electrolyte for the gating layers. Tetracyanoquinodimethane single crystals and C60 thin films are respectively interfaced with ionic liquid of 1-ethyl-3-methyl-imidazolium bis(trifluoromethanesulfonyl)imide known for its low viscosity and high ionic conductivity, so that high-density electrons are rapidly accumulated in the semiconductor surfaces. The transistors are gated by high electric field confined to a molecular scale Helmholtz layer with the application of minimum gate voltages. The high-transconductance single-crystal device exhibits excellent air stability and the C60 thin-film transistor has realized the highest normalized transconductance among reported n-type organic transistors, together with remarkable improvement in threshold voltage as compared with that in conventional SiO2 devices.

  7. Thermal radiative near field transport between vanadium dioxide and silicon oxide across the metal insulator transition

    SciTech Connect

    Menges, F.; Spieser, M.; Riel, H.; Gotsmann, B.; Dittberner, M.; Novotny, L.; Passarello, D.; Parkin, S. S. P.

    2016-04-25

    The thermal radiative near field transport between vanadium dioxide and silicon oxide at submicron distances is expected to exhibit a strong dependence on the state of vanadium dioxide which undergoes a metal-insulator transition near room temperature. We report the measurement of near field thermal transport between a heated silicon oxide micro-sphere and a vanadium dioxide thin film on a titanium oxide (rutile) substrate. The temperatures of the 15 nm vanadium dioxide thin film varied to be below and above the metal-insulator-transition, and the sphere temperatures were varied in a range between 100 and 200 °C. The measurements were performed using a vacuum-based scanning thermal microscope with a cantilevered resistive thermal sensor. We observe a thermal conductivity per unit area between the sphere and the film with a distance dependence following a power law trend and a conductance contrast larger than 2 for the two different phase states of the film.

  8. All-Graphene Planar Self-Switching MISFEDs, Metal-Insulator-Semiconductor Field-Effect Diodes

    PubMed Central

    Al-Dirini, Feras; Hossain, Faruque M.; Nirmalathas, Ampalavanapillai; Skafidas, Efstratios

    2014-01-01

    Graphene normally behaves as a semimetal because it lacks a bandgap, but when it is patterned into nanoribbons a bandgap can be introduced. By varying the width of these nanoribbons this band gap can be tuned from semiconducting to metallic. This property allows metallic and semiconducting regions within a single Graphene monolayer, which can be used in realising two-dimensional (2D) planar Metal-Insulator-Semiconductor field effect devices. Based on this concept, we present a new class of nano-scale planar devices named Graphene Self-Switching MISFEDs (Metal-Insulator-Semiconductor Field-Effect Diodes), in which Graphene is used as the metal and the semiconductor concurrently. The presented devices exhibit excellent current-voltage characteristics while occupying an ultra-small area with sub-10 nm dimensions and an ultimate thinness of a single atom. Quantum mechanical simulation results, based on the Extended Huckel method and Nonequilibrium Green's Function Formalism, show that a Graphene Self-Switching MISFED with a channel as short as 5 nm can achieve forward-to-reverse current rectification ratios exceeding 5000. PMID:24496307

  9. Crystal field effect induced topological crystalline insulators in monolayer IV-VI semiconductors.

    PubMed

    Liu, Junwei; Qian, Xiaofeng; Fu, Liang

    2015-04-08

    Two-dimensional (2D) topological crystalline insulators (TCIs) were recently predicted in thin films of the SnTe class of IV-VI semiconductors, which can host metallic edge states protected by mirror symmetry. As thickness decreases, quantum confinement effect will increase and surpass the inverted gap below a critical thickness, turning TCIs into normal insulators. Surprisingly, based on first-principles calculations, here we demonstrate that (001) monolayers of rocksalt IV-VI semiconductors XY (X = Ge, Sn, Pb and Y = S, Se, Te) are 2D TCIs with the fundamental band gap as large as 260 meV in monolayer PbTe. This unexpected nontrivial topological phase stems from the strong crystal field effect in the monolayer, which lifts the degeneracy between p(x,y) and p(z) orbitals and leads to band inversion between cation pz and anion px,y orbitals. This crystal field effect induced topological phase offers a new strategy to find and design other atomically thin 2D topological materials.

  10. Metal-insulator-transition in SrTiO3 induced by argon bombardment combined with field effect

    SciTech Connect

    Xu, Jie; Zhu, Zhengyong; Zhao, Hengliang; Luo, Zhijiong

    2014-12-15

    By fabricating the Field-Effect-Transistors on argon bombardment SrTiO3 substrates, not only we have achieved one of the best mobility for Field-Effect-Transistors fabricated on SrTiO3, but also realized strong field induced Metal-Insulator-Transition. The critical sheet resistance for the Metal-Insulator-Transition is only 1/7 of the value obtained in the former experiments, indicating a different mechanism. Further study shows that the Metal-Insulator-Transition can be attributed to the oxygen vacancies formed after the bombardment becoming the electron donor under the electric field modulation, increasing SrTiO3 surface electron density and transforming the substrate into metallic state.

  11. The origin of excellent gate-bias stress stability in organic field-effect transistors employing fluorinated-polymer gate dielectrics.

    PubMed

    Kim, Jiye; Jang, Jaeyoung; Kim, Kyunghun; Kim, Haekyoung; Kim, Se Hyun; Park, Chan Eon

    2014-11-12

    Tuning of the energetic barriers to charge transfer at the semiconductor/dielectric interface in organic field-effect transistors (OFETs) is achieved by varying the dielectric functionality. Based on this, the correlation between the magnitude of the energy barrier and the gate-bias stress stability of the OFETs is demonstrated, and the origin of the excellent device stability of OFETs employing fluorinated dielectrics is revealed.

  12. Effect of H and OH desorption and diffusion on electronic structure in amorphous In-Ga-Zn-O metal-oxide-semiconductor diodes with various gate insulators

    NASA Astrophysics Data System (ADS)

    Hino, Aya; Morita, Shinya; Yasuno, Satoshi; Kishi, Tomoya; Hayashi, Kazushi; Kugimiya, Toshihiro

    2012-12-01

    Metal-oxide-semiconductor (MOS) diodes with various gate insulators (G/Is) were characterized by capacitance-voltage characteristics and isothermal capacitance transient spectroscopy (ICTS) to evaluate the effect of H and OH desorption and diffusion on the electronic structures in amorphous In-Ga-Zn-O (a-IGZO) thin films. The density and the distribution of the space charge were found to be varied depending on the nature of the G/I. In the case of thermally grown SiO2 (thermal SiO2) G/Is, a high space-charge region was observed near the a-IGZO and G/I interface. After thermal annealing, the space-charge density in the deeper region of the film decreased, whereas remained unchanged near the interface region. The ICTS spectra obtained from the MOS diodes with the thermal SiO2 G/Is consisted of two broad peaks at around 5 × 10-4 and 3 × 10-2 s before annealing, while one broad peak was observed at around 1 × 10-4 s at the interface and at around 1 × 10-3 s in the bulk after annealing. Further, the trap density was considerably high near the interface. In contrast, the space-charge density was high throughout the bulk region of the MOS diode when the G/I was deposited by chemical vapor deposition (CVD). The ICTS spectra from the MOS diodes with the CVD G/Is revealed the existence of continuously distributed trap states, suggesting formations of high-density tail states below the conduction band minimum. According to secondary ion mass spectroscopy analyses, desorption and outdiffusion of H and OH were clearly observed in the CVD G/I sample. These phenomena could introduce structural fluctuations in the a-IGZO films, resulting in the formation of the conduction band tail states. Thin-film transistors (TFTs) with the same gate structure as the MOS diodes were fabricated to correlate the electronic properties with the TFT performance, and it was found that TFTs with the CVD G/I showed a reduced saturation mobility. These results indicate that the electronic structures

  13. Electrically Tunable Energy Bandgap in Dual-Gated Ultra-Thin Black Phosphorus Field Effect Transistors

    NASA Astrophysics Data System (ADS)

    Yan, Shi-Li; Xie, Zhi-Jian; Chen, Jian-Hao; Taniguchi, Takashi; Watanabe, Kenji

    2017-03-01

    The energy bandgap is an intrinsic character of semiconductors, which largely determines their properties. The ability to continuously and reversibly tune the bandgap of a single device during real time operation is of great importance not only to device physics but also to technological applications. Here we demonstrate a widely tunable bandgap of few-layer black phosphorus (BP) by the application of vertical electric field in dual-gated BP field-effect transistors. A total bandgap reduction of 124 meV is observed when the electrical displacement field is increased from 0.10V/nm to 0.83V/nm. Our results suggest appealing potential for few-layer BP as a tunable bandgap material in infrared optoelectronics, thermoelectric power generation and thermal imaging.

  14. Producing spin-polarized photoelectrons by using the momentum gate in strong-field ionization experiments

    NASA Astrophysics Data System (ADS)

    Liu, Kunlong; Renziehausen, Klaus; Barth, Ingo

    2017-06-01

    The ionization of the prealigned nitric oxide molecule by strong circularly polarized laser fields is studied via theoretical simulations of the spin-resolved photoelectron momentum distributions by solving numerically the three-dimensional time-dependent Schrödinger equation. Due to the spin-orbit entanglement in the ground state of nitric oxide and the sensitivity of the tunnel ionization of its doubly degenerate valence 2 π± orbitals carrying opposite electron ring currents to the sense of the laser-field rotation, the momentum-resolved spin-polarized photoelectrons are produced. We show that the spin polarization exhibits strong dependence on the kinetic energy as well as the emitting angle of the photoelectron. In addition to the laser control, the momentum gate in strong-field experiments would enable full control of the spin polarization.

  15. Current conduction in junction gate field effect transistors. Ph.D. Thesis

    NASA Technical Reports Server (NTRS)

    Kim, C.

    1970-01-01

    The internal physical mechanism that governs the current conduction in junction-gate field effect transistors is studied. A numerical method of analyzing the devices with different length-to-width ratios and doping profiles is developed. This method takes into account the two dimensional character of the electric field and the field dependent mobility. Application of the method to various device models shows that the channel width and the carrier concentration in the conductive channel decrease with increasing drain-to-source voltage for conventional devices. It also shows larger differential drain conductances for shorter devices when the drift velocity is not saturated. The interaction of the source and the drain gives the carrier accumulation in the channel which leads to the space-charge-limited current flow. The important parameters for the space-charge-limited current flow are found to be the L/L sub DE ratio and the crossover voltage.

  16. Trap density probing on top-gate MoS₂ nanosheet field-effect transistors by photo-excited charge collection spectroscopy.

    PubMed

    Choi, Kyunghee; Raza, Syed Raza Ali; Lee, Hee Sung; Jeon, Pyo Jin; Pezeshki, Atiye; Min, Sung-Wook; Kim, Jin Sung; Yoon, Woojin; Ju, Sang-Yong; Lee, Kimoon; Im, Seongil

    2015-03-19

    Two-dimensional (2D) molybdenum disulfide (MoS₂) field-effect transistors (FETs) have been extensively studied, but most of the FETs with gate insulators have displayed negative threshold voltage values, which indicates the presence of interfacial traps both shallow and deep in energy level. Despite such interface trap issues, reports on trap densities in MoS₂ are quite limited. Here, we probed top-gate MoS₂ FETs with two- (2L), three- (3L), and four-layer (4L) MoS₂/dielectric interfaces to quantify deep-level interface trap densities by photo-excited charge collection spectroscopy (PECCS), and reported the result that deep-level trap densities over 10(12) cm(-2) may exist in the interface and bulk MoS₂ near the interface. Transfer curve hysteresis and PECCS measurements show that shallow traps and deep traps are not that different in density order from each other. We conclude that our PECCS analysis distinguishably provides valuable information on deep level interface/bulk trap densities in 2D-based FETs.

  17. Controlling chaos with magnetic field in semi-insulating GaAs

    SciTech Connect

    Oliveira, A. G. de; Ribeiro, G. M.; Moreira, M. V. B.; Gonzalez, J. C.; Silva, R. L. da; Rubinger, R. M.

    2007-10-15

    Chaos control has stimulated a large amount of work. We have studied the effect of an external parallel magnetic field on the low-frequency current oscillations observed on a molecular beam epitaxy GaAs sample grown at 265 deg. C, and we have shown that it can be efficiently used for chaos control. The study of the magnetoresistance indicates that the effect of the magnetic field on the charges of the hopping conduction mechanism induces changes in the low-frequency oscillations. Due to this, we have used the magnetic field to control chaos assessed through direct observation low-frequency oscillations, their attractors, and bifurcation diagrams. We also found that the magnetic field interferes indirectly with the Coulombian interaction between the free charges in the conduction band and the hopping carriers, as well as with the recombination mechanism of field enhanced trapping. Controlling the low-frequency oscillations in semi-insulating GaAs by means of an external magnetic field permits probing the interaction of the slow hopping carriers and the fast free carriers in the electric-field domains.

  18. G4-FETs as Universal and Programmable Logic Gates

    NASA Technical Reports Server (NTRS)

    Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin

    2007-01-01

    An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

  19. Poly(methyl methacrylate) as a self-assembled gate dielectric for graphene field-effect transistors

    SciTech Connect

    Sanne, A.; Movva, H. C. P.; Kang, S.; McClellan, C.; Corbet, C. M.; Banerjee, S. K.

    2014-02-24

    We investigate poly(methyl methacrylate) (PMMA) as a low thermal budget organic gate dielectric for graphene field effect-transistors (GFETs) based on a simple process flow. We show that high temperature baking steps above the glass transition temperature (∼130 °C) can leave a self-assembled, thin PMMA film on graphene, where we get a gate dielectric almost for “free” without additional atomic layer deposition type steps. Electrical characterization of GFETs with PMMA as a gate dielectric yields a dielectric constant of k = 3.0. GFETs with thinner PMMA dielectrics have a lower dielectric constant due to decreased polarization arising from neutralization of dipoles and charged carriers as baking temperatures increase. The leakage through PMMA gate dielectric increases with decreasing dielectric thickness and increasing electric field. Unlike conventional high-k gate dielectrics, such low-k organic gate dielectrics are potentially attractive for devices such as the proposed Bilayer pseudoSpin Field-Effect Transistor or flexible high speed graphene electronics.

  20. Effective exchange fields in spin-torque resonance of magnetic insulators

    NASA Astrophysics Data System (ADS)

    Chiba, Takahiro; Bauer, Gerrit E. W.; Takahashi, Saburo

    2016-02-01

    We report additional results on the spin-torque ferromagnetic resonance (ST-FMR) of a bilayer system made from a magnetic insulator such as Y3 Fe5 O12 (YIG) and a heavy normal metal such as Pt in terms of the interface spin-mixing conductance and including spin pumping. We analyze experimental ST-FMR spectra for out-of-plane and in-plane magnetization configurations in terms of an anisotropic imaginary part Gi of the mixing conductance (or interface effective field). The estimated ratio between imaginary and real parts Gi /Gr ≲ 0.3 is sensitive to an (unknown) phase shift between microwave current bias and associated Oersted field.

  1. Magnetic-field-modulated resonant tunneling in ferromagnetic-insulator-nonmagnetic junctions.

    PubMed

    Song, Yang; Dery, Hanan

    2014-07-25

    We present a theory for resonance-tunneling magnetoresistance (MR) in ferromagnetic-insulator-nonmagnetic junctions. The theory sheds light on many of the recent electrical spin injection experiments, suggesting that this MR effect rather than spin accumulation in the nonmagnetic channel corresponds to the electrically detected signal. We quantify the dependence of the tunnel current on the magnetic field by quantum rate equations derived from the Anderson impurity model, with the important addition of impurity spin interactions. Considering the on-site Coulomb correlation, the MR effect is caused by competition between the field, spin interactions, and coupling to the magnetic lead. By extending the theory, we present a basis for operation of novel nanometer-size memories.

  2. Simulation of Electric Field in Semi Insulating Au/CdTe/Au Detector under Flux

    SciTech Connect

    Franc, J.; James, R.; Grill, R.; Kubat, J.; Belas, E.; Hoschl, P.; Moravec, P.; Praus, P.

    2009-08-02

    We report our simulations on the profile of the electric field in semi insulating CdTe and CdZnTe with Au contacts under radiation flux. The type of the space charge and electric field distribution in the Au/CdTe/Au structure is at high fluxes result of a combined influence of charge formed due to band bending at the electrodes and from photo generated carriers, which are trapped at deep levels. Simultaneous solution of drift-diffusion and Poisson equations is used for the calculation. We show, that the space charge originating from trapped photo-carriers starts to dominate at fluxes 10{sup 15}-10{sup 16}cm{sup -2}s{sup -1}, when the influence of contacts starts to be negligible.

  3. Chiral Spin Liquids in Triangular-Lattice SU (N ) Fermionic Mott Insulators with Artificial Gauge Fields

    NASA Astrophysics Data System (ADS)

    Nataf, Pierre; Lajkó, Miklós; Wietek, Alexander; Penc, Karlo; Mila, Frédéric; Läuchli, Andreas M.

    2016-10-01

    We show that, in the presence of a π /2 artificial gauge field per plaquette, Mott insulating phases of ultracold fermions with SU (N ) symmetry and one particle per site generically possess an extended chiral phase with intrinsic topological order characterized by an approximate ground space of N low-lying singlets for periodic boundary conditions, and by chiral edge states described by the SU(N ) 1 Wess-Zumino-Novikov-Witten conformal field theory for open boundary conditions. This has been achieved by extensive exact diagonalizations for N between 3 and 9, and by a parton construction based on a set of N Gutzwiller projected fermionic wave functions with flux π /N per triangular plaquette. Experimental implications are briefly discussed.

  4. Fluorinated polyimide gate dielectrics for the advancing the electrical stability of organic field-effect transistors.

    PubMed

    Baek, Yonghwa; Lim, Sooman; Yoo, Eun Joo; Kim, Lae Ho; Kim, Haekyoung; Lee, Seung Woo; Kim, Se Hyun; Park, Chan Eon

    2014-09-10

    Organic field-effect transistors (OFETs) that operated with good electrical stability were prepared by synthesizing fluorinated polyimide (PI) gate dielectrics based on 6FDA-PDA-PDA PI and 6FDA-CF3Bz-PDA PI. 6FDA-PDA-PDA PI and 6FDA-CF3Bz-PDA PI contain 6 and 18 fluorine atoms per repeat unit, respectively. These fluorinated polymers provided smooth surface topographies and surface energies that decreased as the number of fluorine atoms in the polymer backbone increased. These properties led to a better crystalline morphology in the semiconductor film grown over their surfaces. The number of fluorine atoms in the PI backbone increased, the field-effect mobility improved, and the threshold voltage shifted toward positive values (from -0.38 to +2.21 V) in the OFETs with pentacene and triethylsilylethynyl anthradithiophene. In addition, the highly fluorinated polyimide dielectric showed negligible hysteresis and a notable gate bias stability under both a N2 environment and ambient air.

  5. Molecular gating of silicon nanowire field-effect transistors with nonpolar analytes.

    PubMed

    Paska, Yair; Stelzner, Thomas; Assad, Ossama; Tisch, Ulrike; Christiansen, Silke; Haick, Hossam

    2012-01-24

    Silicon nanowire field-effect transistors (Si NW FETs) have been used as powerful sensors for chemical and biological species. The detection of polar species has been attributed to variations in the electric field at the conduction channel due to molecular gating with polar molecules. However, the detection of nonpolar analytes with Si NW FETs has not been well understood to date. In this paper, we experimentally study the detection of nonpolar species and model the detection process based on changes in the carrier mobility, voltage threshold, off-current, off-voltage, and subthreshold swing of the Si NW FET. We attribute the detection of the nonpolar species to molecular gating, due to two indirect effects: (i) a change in the dielectric medium close to the Si NW surface and (ii) a change in the charged surface states at the functionality of the Si NW surface. The contribution of these two effects to the overall measured sensing signal is determined and discussed. The results provide a launching pad for real-world sensing applications, such as environmental monitoring, homeland security, food quality control, and medicine.

  6. Self-modulated field electron emitter: Gated device of integrated Si tip-on-nano-channel

    NASA Astrophysics Data System (ADS)

    Huang, Zhijun; Huang, Yifeng; Pan, Zhangxu; She, Juncong; Deng, Shaozhi; Chen, Jun; Xu, Ningsheng

    2016-12-01

    We report the featured gated field electron emission devices of Si nano-tips with individually integrated Si nano-channels and the interpretation of the related physics. A rational procedure was developed to fabricate the uniform integrated devices. The electrical and thermal conduction tests demonstrated that the Si nano-channel can limit both the current and heat flows. The integrated devices showed the specialties of self-enhancement and self-regulation. The heat resistance results in the heat accumulation at the tip-apex, inducing the thermally enhanced field electron emission. The self-regulated effect of the electrical resistance is benefit for impeding the current overloading and prevents the emitters from a catastrophic breakdown. The nano-channel-integrated Si nano-tip array exhibited emission current density up to 24.9 mA/cm2 at a gate voltage of 94 V, much higher than that of the Si nano-tip array without an integrated nano-channel.

  7. Gate field plate IGBT with trench accumulation layer for extreme injection enhancement

    NASA Astrophysics Data System (ADS)

    Xu, Xiaorui; Chen, Wanjun; Liu, Chao; Chen, Nan; Tao, Hong; Shi, Yijun; Ma, Yinchang; Zhou, Qi; Zhang, Bo

    2017-04-01

    A gate field plate IGBT (GFP-IGBT) with extreme injection enhancement is proposed and verified using TCAD simulations. The GFP-IGBT features a gate field plate (GFP) inserted into n-drift region directly and a tiny P-base region separated from the GFP. In the ON-state, the accumulation layer is formed near to not only the bottom but also the side of the trench, which enhances electron injection efficiency. And the tiny P-base region reduces the holes extracted by reverse-biased P-base/N-drift junction. Both the GFP and tiny P-base contribute to achieving extreme injection enhancement, leading to a low forward voltage drop. In the OFF-state, due to the low stored charges in N-buffer layer, GFP-IGBT shows a short current fall time, leading to a decrease of turn-off loss. The simulation results show that, compared with the conventional IGBT, the GFP-IGBT offers a forward voltage drop reduction of 25% or current fall time reduction of 89% (i.e. turn-off loss reduction of 53%), resulting in low power loss. The excellent device performance, coupled with a commercial IGBT-compatible fabrication process, makes the proposed GFP-IGBT a promising candidate for power switching applications.

  8. Mobility overestimation due to gated contacts in organic field-effect transistors

    PubMed Central

    Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

    2016-01-01

    Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

  9. Probing top-gated field effect transistor of reduced graphene oxide monolayer made by dielectrophoresis

    NASA Astrophysics Data System (ADS)

    Vasu, K. S.; Chakraborty, Biswanath; Sampath, S.; Sood, A. K.

    2010-08-01

    We demonstrate a top-gated field effect transistor made of a reduced graphene oxide (RGO) monolayer (graphene) by dielectrophoresis. The Raman spectrum of RGO flakes of typical size of 5 μm×5 μm shows a single 2D band at 2687 cm -1, characteristic of single-layer graphene. The two-probe current-voltage measurements of RGO flakes, deposited in between the patterned electrodes with a gap of 2.5 μm using ac dielectrophoresis, show ohmic behavior with a resistance of ˜37 kΩ. The temperature dependence of the resistance (R) of RGO measured between 305 K and 393 K yields a temperature coefficient of resistance [dR/dT]/R˜-9.5×10-4/K, the same as that of mechanically exfoliated single-layer graphene. The field-effect transistor action was obtained by electrochemical top-gating using a solid polymer electrolyte (PEO+LiClO 4) and Pt wire. The ambipolar nature of graphene flakes is observed up to a doping level of ˜6×1012/cm and carrier mobility of ˜50 cm 2/V s. The source-drain current characteristics show a tendency of current saturation at high source-drain voltage which is analyzed quantitatively by a diffusive transport model.

  10. Investigation of an anomalous hump in gate current after negative-bias temperature-instability in HfO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Ho, Szu-Han; Chang, Ting-Chang; Wu, Chi-Wei; Lo, Wen-Hung; Chen, Ching-En; Tsai, Jyun-Yu; Liu, Guan-Ru; Chen, Hua-Mao; Lu, Ying-Shin; Wang, Bin-Wei; Tseng, Tseung-Yuen; Cheng, Osbert; Huang, Cheng-Tung; Sze, Simon M.

    2013-01-01

    This Letter investigates a hump in gate current after negative-bias temperature-instability (NBTI) in HfO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors. Measuring gate current at initial through body floating and source/drain floating shows that hole current flows from source/drain. The fitting of gate current (Ig)-gate voltage (Vg) characteristic curves demonstrates that the Frenkel-Poole mechanism dominates the conduction. Next, by fitting the gate current after NBTI, in the order of Frenkel-Poole then tunneling, the Frenkel-Poole mechanism can be confirmed. These phenomena can be attributed to hole trapping in high-k bulk and the electric field formula Ehigh-k ɛhigh-k = Q + Esio2ɛsio2.

  11. Analysis of an anomalous hump in gate current after dynamic negative bias stress in HfxZr1-xO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Ho, Szu-Han; Chang, Ting-Chang; Wu, Chi-Wei; Lo, Wen-Hung; Chen, Ching-En; Tsai, Jyun-Yu; Luo, Hung-Ping; Tseng, Tseung-Yuen; Cheng, Osbert; Huang, Cheng-Tung; Sze, Simon M.

    2012-07-01

    This letter investigates a hump in gate current after dynamic negative bias stress (NBS) in HfxZr1-xO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors. By measuring gate current under initial through body floating and source/drain floating, it shows that hole current flows from source/drain. The fitting of gate current-gate voltage characteristic curve demonstrates that Frenkel-Poole mechanism dominates the conduction. Next, by fitting the gate current after dynamic NBS, in the order of Frenkel-Poole then tunneling, the Frenkel-Poole mechanism can be confirmed. These phenomena can be attributed to hole trapping in high-k bulk and the electric field formula Ehigh-k ɛhigh-k = Q + Esio2ɛsio2.

  12. A Full electric-field tuning of thermoelectric power in a dual-gated Bi-layer graphene device

    NASA Astrophysics Data System (ADS)

    Lee, Wei-Li; Wang, Chang-Ran; Lu, Wen-Sen; Hao, Lei; Lee, Ting-Kuo; Lin, Feng; Cheng, I.-Chun; Chen, Jiang-Zhang

    2012-02-01

    By using high quality microcrystals of hexagonal boron nitride as top gate dielectric, we fabricated dual-gated bilayer graphene devices. We demonstrate a full electric field tuning of thermoelectric power resulting from the opening of a band-gap by applying a perpendicular electric field on bilayer graphene. We uncover a large enhancement in thermoelectric power at low temperature. At 15 K, the thermoelectric power can be amplified by more than four-fold attaining a value of ˜ 50μV/K at a displacement field of 0.8 V/nm. Our result may open up a new possibility in thermoelectric application using graphene-based device.

  13. Field evaluation of 69-kV outdoor Polysil insulators. Final report

    SciTech Connect

    Richenbacher, A.G.

    1985-03-01

    After three years of exposure to widely varying climates and environments, Polysil (polymer concrete) 69-kV post-type insulators are still performing satisfactorily. In all test situations, Polysil insulators performed as well as - sometimes even surpassed - their porcelain counterparts. They also demonstrated potential for substantially reducing insulator costs.

  14. Prediction and Measurement of Temperature Fields in Silicon-on-Insulator Electronic Circuits

    DTIC Science & Technology

    1995-08-01

    1442-1447. Touloukian , Y. S., Powell, R. W., Ho, C. Y., and Klemens, P. G.. 1971), "Thermal Conductivity: Metallic Elements and Alloys ," in: Thermol... property or dimension = average temperature rise in of source and drain gate, K f = property or dimension = maximum interconnect temper- of fin...ature, K g = property or dimension = substrate temperature, K of gate = voltage drop along gate, V m = property or dimension = gate-source voltage

  15. Quantum logic gates from time-dependent global magnetic field in a system with constant exchange

    SciTech Connect

    Nenashev, A. V. Dvurechenskii, A. V.; Zinovieva, A. F.; Gornov, A. Yu.; Zarodnyuk, T. S.

    2015-03-21

    We propose a method that implements a universal set of one- and two-quantum-bit gates for quantum computation in a system of coupled electron pairs with constant non-diagonal exchange interaction. In our proposal, suppression of the exchange interaction is performed by the continual repetition of single-spin rotations. A small g-factor difference between the electrons allows for addressing qubits and avoiding strong magnetic field pulses. Numerical experiments were performed to show that, to implement the one- and two-qubit operations, it is sufficient to change the strength of the magnetic field by a few Gauss. This introduces one and then the other electron in a resonance. To determine the evolution of the two-qubit system, we use the algorithms of optimal control theory.

  16. Steep switching characteristics of single-gated feedback field-effect transistors

    NASA Astrophysics Data System (ADS)

    Kim, Minsuk; Kim, Yoonjoong; Lim, Doohyeok; Woo, Sola; Cho, Kyoungah; Kim, Sangsig

    2017-02-01

    In this study, we propose newly designed feedback field-effect transistors that utilize the positive feedback of charge carriers in single-gated silicon channels to achieve steep switching behaviors. The band diagram, I-V characteristics, subthreshold swing, and on/off current ratio are analyzed using a commercial device simulator. Our proposed feedback field-effect transistors exhibit subthreshold swings of less than 0.1 mV dec-1, an on/off current ratio of approximately 1011, and an on-current of approximately 10-4 A at room temperature, demonstrating that the switching characteristics are superior to those of other silicon-based devices. In addition, the device parameters that affect the device performance, hysteresis characteristics, and temperature-dependent device characteristics are discussed in detail.

  17. Realization of a quantum gate using gravitational search algorithm by perturbing three-dimensional harmonic oscillator with an electromagnetic field

    NASA Astrophysics Data System (ADS)

    Sharma, Navneet; Rawat, Tarun Kumar; Parthasarathy, Harish; Gautam, Kumar

    2016-06-01

    The aim of this paper is to design a current source obtained as a representation of p information symbols \\{I_k\\} so that the electromagnetic (EM) field generated interacts with a quantum atomic system producing after a fixed duration T a unitary gate U( T) that is as close as possible to a given unitary gate U_g. The design procedure involves calculating the EM field produced by \\{I_k\\} and hence the perturbing Hamiltonian produced by \\{I_k\\} finally resulting in the evolution operator produced by \\{I_k\\} up to cubic order based on the Dyson series expansion. The gate error energy is thus obtained as a cubic polynomial in \\{I_k\\} which is minimized using gravitational search algorithm. The signal to noise ratio (SNR) in the designed gate is higher as compared to that using quadratic Dyson series expansion. The SNR is calculated as the ratio of the Frobenius norm square of the desired gate to that of the desired gate error.

  18. Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

    NASA Astrophysics Data System (ADS)

    Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

    2017-04-01

    A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

  19. A Label-Free Immunosensor for IgG Based on an Extended-Gate Type Organic Field Effect Transistor

    PubMed Central

    Minamiki, Tsukuru; Minami, Tsuyoshi; Kurita, Ryoji; Niwa, Osamu; Wakida, Shin-ichi; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

    2014-01-01

    A novel biosensor for immunoglobulin G (IgG) detection based on an extended-gate type organic field effect transistor (OFET) has been developed that possesses an anti-IgG antibody on its extended-gate electrode and can be operated below 3 V. The titration results from the target IgG in the presence of a bovine serum albumin interferent, clearly exhibiting a negative shift in the OFET transfer curve with increasing IgG concentration. This is presumed to be due an interaction between target IgG and the immobilized anti-IgG antibody on the extended-gate electrode. As a result, a linear range from 0 to 10 µg/mL was achieved with a relatively low detection limit of 0.62 µg/mL (=4 nM). We believe that these results open up opportunities for applying extended-gate-type OFETs to immunosensing. PMID:28788216

  20. Touch sensors based on planar liquid crystal-gated-organic field-effect transistors

    SciTech Connect

    Seo, Jooyeok; Lee, Chulyeon; Han, Hyemi; Lee, Sooyong; Nam, Sungho; Kim, Youngkyoo; Kim, Hwajeong; Lee, Joon-Hyung; Park, Soo-Young; Kang, Inn-Kyu

    2014-09-15

    We report a tactile touch sensor based on a planar liquid crystal-gated-organic field-effect transistor (LC-g-OFET) structure. The LC-g-OFET touch sensors were fabricated by forming the 10 μm thick LC layer (4-cyano-4{sup ′}-pentylbiphenyl - 5CB) on top of the 50 nm thick channel layer (poly(3-hexylthiophene) - P3HT) that is coated on the in-plane aligned drain/source/gate electrodes (indium-tin oxide - ITO). As an external physical stimulation to examine the tactile touch performance, a weak nitrogen flow (83.3 μl/s) was employed to stimulate the LC layer of the touch device. The LC-g-OFET device exhibited p-type transistor characteristics with a hole mobility of 1.5 cm{sup 2}/Vs, but no sensing current by the nitrogen flow touch was measured at sufficiently high drain (V{sub D}) and gate (V{sub G}) voltages. However, a clear sensing current signal was detected at lower voltages, which was quite sensitive to the combination of V{sub D} and V{sub G}. The best voltage combination was V{sub D} = −0.2 V and V{sub G} = −1 V for the highest ratio of signal currents to base currents (i.e., signal-to-noise ratio). The change in the LC alignment upon the nitrogen flow touch was assigned as the mechanism for the present LC-g-OFET touch sensors.

  1. Nanocrystalline cellulose applied simultaneously as the gate dielectric and the substrate in flexible field effect transistors.

    PubMed

    Gaspar, D; Fernandes, S N; de Oliveira, A G; Fernandes, J G; Grey, P; Pontes, R V; Pereira, L; Martins, R; Godinho, M H; Fortunato, E

    2014-03-07

    Cotton-based nanocrystalline cellulose (NCC), also known as nanopaper, one of the major sources of renewable materials, is a promising substrate and component for producing low cost fully recyclable flexible paper electronic devices and systems due to its properties (lightweight, stiffness, non-toxicity, transparency, low thermal expansion, gas impermeability and improved mechanical properties).Here, we have demonstrated for the first time a thin transparent nanopaper-based field effect transistor (FET) where NCC is simultaneously used as the substrate and as the gate dielectric layer in an 'interstrate' structure, since the device is built on both sides of the NCC films; while the active channel layer is based on oxide amorphous semiconductors, the gate electrode is based on a transparent conductive oxide.Such hybrid FETs present excellent operating characteristics such as high channel saturation mobility (>7 cm(2) V (-1) s(-1)), drain-source current on/off modulation ratio higher than 10(5), enhancement n-type operation and subthreshold gate voltage swing of 2.11 V/decade. The NCC film FET characteristics have been measured in air ambient conditions and present good stability, after two weeks of being processed, without any type of encapsulation or passivation layer. The results obtained are comparable to ones produced for conventional cellulose paper, marking this out as a promising approach for attaining high-performance disposable electronics such as paper displays, smart labels, smart packaging, RFID (radio-frequency identification) and point-of-care systems for self-analysis in bioscience applications, among others.

  2. Nanocrystalline cellulose applied simultaneously as the gate dielectric and the substrate in flexible field effect transistors

    NASA Astrophysics Data System (ADS)

    Gaspar, D.; Fernandes, S. N.; de Oliveira, A. G.; Fernandes, J. G.; Grey, P.; Pontes, R. V.; Pereira, L.; Martins, R.; Godinho, M. H.; Fortunato, E.

    2014-03-01

    Cotton-based nanocrystalline cellulose (NCC), also known as nanopaper, one of the major sources of renewable materials, is a promising substrate and component for producing low cost fully recyclable flexible paper electronic devices and systems due to its properties (lightweight, stiffness, non-toxicity, transparency, low thermal expansion, gas impermeability and improved mechanical properties). Here, we have demonstrated for the first time a thin transparent nanopaper-based field effect transistor (FET) where NCC is simultaneously used as the substrate and as the gate dielectric layer in an ‘interstrate’ structure, since the device is built on both sides of the NCC films; while the active channel layer is based on oxide amorphous semiconductors, the gate electrode is based on a transparent conductive oxide. Such hybrid FETs present excellent operating characteristics such as high channel saturation mobility (>7 cm2 V -1 s-1), drain-source current on/off modulation ratio higher than 105, enhancement n-type operation and subthreshold gate voltage swing of 2.11 V/decade. The NCC film FET characteristics have been measured in air ambient conditions and present good stability, after two weeks of being processed, without any type of encapsulation or passivation layer. The results obtained are comparable to ones produced for conventional cellulose paper, marking this out as a promising approach for attaining high-performance disposable electronics such as paper displays, smart labels, smart packaging, RFID (radio-frequency identification) and point-of-care systems for self-analysis in bioscience applications, among others.

  3. Magnetic Field-Tuned Superconductor-Insulator Transition in One-Dimensional Arrays of Small Josephson Junctions

    NASA Astrophysics Data System (ADS)

    Kuo, Watson; Chen, C. D.

    2003-03-01

    We have studied experimentally the magnetic field induced superconductor-insulator quantum phase transition in one-dimensional arrays of small Josephson junctions. It is found that the critical magnetic field that separates the two phases corresponds to the onset of Coulomb blockade of Cooper pairs tunneling in the current-voltage characteristics. The resistance data are analyzed in the context of the superfluid-insulator transition in one dimension. Combining results from Haviland et. al.,2 we construct an experimental phase diagram using Josepshon coupling-to-charging energy ratio(EJ/ECP) and dissipation strength.

  4. Human aquaporin 4 gating dynamics in dc and ac electric fields: A molecular dynamics study

    NASA Astrophysics Data System (ADS)

    Garate, J.-A.; English, Niall J.; MacElroy, J. M. D.

    2011-02-01

    Water self-diffusion within human aquaporin 4 has been studied using molecular dynamics (MD) simulations in the absence and presence of external ac and dc electric fields. The computed diffusive (pd) and osmotic (pf) permeabilities under zero-field conditions are (0.718 ± 0.24) × 10-14 cm3 s-1 and (2.94 ± 0.47) × 10-14 cm3 s-1, respectively; our pf agrees with the experimental value of (1.50 ± 0.6) × 10-14 cm3 s-1. A gating mechanism has been proposed in which side-chain dynamics of residue H201, located in the selectivity filter, play an essential role. In addition, for nonequilibrium MD in external fields, it was found that water dipole orientation within the constriction region of the channel is affected by electric fields (e-fields) and that this governs the permeability. It was also found that the rate of side-chain flipping motion of residue H201 is increased in the presence of e-fields, which influences water conductivity further.

  5. High-Performance Wrap-Gated InGaAs Nanowire Field-Effect Transistors with Sputtered Dielectrics

    PubMed Central

    Shen, Li-Fan; Yip, SenPo; Yang, Zai-xing; Fang, Ming; Hung, TakFu; Pun, Edwin Y.B.; Ho, Johnny C.

    2015-01-01

    Although wrap-gated nanowire field-effect-transistors (NWFETs) have been explored as an ideal electronic device geometry for low-power and high-frequency applications, further performance enhancement and practical implementation are still suffering from electron scattering on nanowire surface/interface traps between the nanowire channel and gate dielectric as well as the complicated device fabrication scheme. Here, we report the development of high-performance wrap-gated InGaAs NWFETs using conventional sputtered Al2O3 layers as gate dielectrics, instead of the typically employed atomic layer deposited counterparts. Importantly, the surface chemical passivation of NW channels performed right before the dielectric deposition is found to significantly alleviate plasma induced defect traps on the NW channel. Utilizing this passivation, the wrap-gated device exhibits superior electrical performances: a high ION/IOFF ratio of ~2 × 106, an extremely low sub-threshold slope of 80 mV/decade and a peak field-effect electron mobility of ~1600 cm2/(Vs) at VDS = 0.1 V at room temperature, in which these values are even better than the ones of state-of-the-art NWFETs reported so far. By combining sputtering and pre-deposition chemical passivation to achieve high-quality gate dielectrics for wrap-gated NWFETs, the superior gate coupling and electrical performances have been achieved, confirming the effectiveness of our hybrid approach for future advanced electronic devices. PMID:26607169

  6. SUPERGLASS. Engineering field tests - Phase 3. Production, market planning, and product evaluation for a high-thermal-performance insulating glass design utilizing HEAT MIRROR transparent insulation. Final report

    SciTech Connect

    Tilford, C L

    1982-11-01

    HEAT MIRROR transparent window insulation consists of a clear polyester film two mils (.002'') thick with a thin, clear low-emissivity (.15) coating deposited on one side by state-of-the-art vacuum deposition processes. This neutral-colored invisible coating reflects long-wave infrared energy (heat). When mounted by being stretched with a 1/2'' air-gap on each side of the film, the resulting unit reduces heat loss by 60% compared to dual insulating glass. Southwall Corporation produces HEAT MIRROR transparent insulation and markets it to manufacturers of sealed insulating glass (I.G.) units and window and building manufacturers who make their own I.G. These companies build and sell the SUPERGLASS sealed glazing units. Units made and installed in buildings by six customers were visited. These units were located in many geographic regions, including the Pacific Northwest, Rocky Mountains, New England, Southeast, and West Coast. As much as could be obtained of their history was recorded, as was their current condition and performance. These units had been in place from two weeks to over a year. All of the units were performing thermally very well, as measured by taking temperature profiles through them and through adjacent conventional I.G. units. Some units had minor visual defects (attributed to I.G. assembly techniques) which are discussed in detail. Overall occupant acceptance was enthusiastically positive. In addition to saving energy, without compromise of optical quality or appearance, the product makes rooms with large glazing areas comfortable to be in in cold weather. All defects observed were present when built; there appears to be no in-field degradation of quality at this time.

  7. Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

    DOEpatents

    Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

    2001-01-01

    A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

  8. Giant Electroresistance in Edge Metal-Insulator-Metal Tunnel Junctions Induced by Ferroelectric Fringe Fields

    PubMed Central

    Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog

    2016-01-01

    An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475

  9. Strain and deformations engineered germanene bilayer double gate-field effect transistor by first principles

    NASA Astrophysics Data System (ADS)

    Meher Abhinav, E.; Chandrasekaran, Gopalakrishnan; Kasmir Raja, S. V.

    2017-10-01

    Germanene, silicene, stanene, phosphorene and graphene are some of single atomic materials with novel properties. In this paper, we explored bilayer germanene-based Double Gate-Field Effect Transistor (DG-FET) with various strains and deformations using Density Functional Theory (DFT) and Green's approach by first-principle calculations. The DG-FET of 1.6 nm width, 6 nm channel length (Lch) and HfO2 as gate dielectric has been modeled. For intrinsic deformation of germanene bilayer, we have enforced minute mechanical deformation of wrap and twist (5°) and ripple (0.5 Å) on germanene bilayer channel material. By using NEGF formalism, I-V Characteristics of various strains and deformation tailored DG-FET was calculated. Our results show that rough edge and single vacancy (5-9) in bilayer germanene diminishes the current around 47% and 58% respectively as compared with pristine bilayer germanene. In case of strain tailored bilayer DG-FET, multiple NDR regions were observed which can be utilized in building stable multiple logic states in digital circuits and high frequency oscillators using negative resistive techniques.

  10. Single trap dynamics in electrolyte-gated Si-nanowire field effect transistors

    SciTech Connect

    Pud, S.; Li, J.; Offenhäusser, A.; Vitusevich, S. A.; Gasparyan, F.; Petrychuk, M.

    2014-06-21

    Liquid-gated silicon nanowire (NW) field effect transistors (FETs) are fabricated and their transport and dynamic properties are investigated experimentally and theoretically. Random telegraph signal (RTS) fluctuations were registered in the nanolength channel FETs and used for the experimental and theoretical analysis of transport properties. The drain current and the carrier interaction processes with a single trap are analyzed using a quantum-mechanical evaluation of carrier distribution in the channel and also a classical evaluation. Both approaches are applied to treat the experimental data and to define an appropriate solution for describing the drain current behavior influenced by single trap resulting in RTS fluctuations in the Si NW FETs. It is shown that quantization and tunneling effects explain the behavior of the electron capture time on the single trap. Based on the experimental data, parameters of the single trap were determined. The trap is located at a distance of about 2 nm from the interface Si/SiO{sub 2} and has a repulsive character. The theory of dynamic processes in liquid-gated Si NW FET put forward here is in good agreement with experimental observations of transport in the structures and highlights the importance of quantization in carrier distribution for analyzing dynamic processes in the nanostructures.

  11. High performance tunnel field-effect transistor by gate and source engineering.

    PubMed

    Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

    2014-12-19

    As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

  12. Field Effect Modulation of Ion Transport in Silicon-On-Insulator Nanopores and Their Application as Nanoscale Coulter Counters

    NASA Astrophysics Data System (ADS)

    Joshi, Punarvasu

    In the last few years, significant advances in nanofabrication have allowed tailoring of structures and materials at a molecular level enabling nanofabrication with precise control of dimensions and organization at molecular length scales, a development leading to significant advances in nanoscale systems. Although, the direction of progress seems to follow the path of microelectronics, the fundamental physics in a nanoscale system changes more rapidly compared to microelectronics, as the size scale is decreased. The changes in length, area, and volume ratios due to reduction in size alter the relative influence of various physical effects determining the overall operation of a system in unexpected ways. One such category of nanofluidic structures demonstrating unique ionic and molecular transport characteristics are nanopores. Nanopores derive their unique transport characteristics from the electrostatic interaction of nanopore surface charge with aqueous ionic solutions. In this doctoral research cylindrical nanopores, in single and array configuration, were fabricated in silicon-on-insulator (SOI) using a combination of electron beam lithography (EBL) and reactive ion etching (RIE). The fabrication method presented is compatible with standard semiconductor foundries and allows fabrication of nanopores with desired geometries and precise dimensional control, providing near ideal and isolated physical modeling systems to study ion transport at the nanometer level. Ion transport through nanopores was characterized by measuring ionic conductances of arrays of nanopores of various diameters for a wide range of concentration of aqueous hydrochloric acid (HCl) ionic solutions. Measured ionic conductances demonstrated two distinct regimes based on surface charge interactions at low ionic concentrations and nanopore geometry at high ionic concentrations. Field effect modulation of ion transport through nanopore arrays, in a fashion similar to semiconductor transistors

  13. Electric-field-induced metal maintained by current of the Mott insulator Ca2RuO4

    PubMed Central

    Nakamura, Fumihiko; Sakaki, Mariko; Yamanaka, Yuya; Tamaru, Sho; Suzuki, Takashi; Maeno, Yoshiteru

    2013-01-01

    Recently, “application of electric field (E-field)” has received considerable attention as a new method to induce novel quantum phenomena since application of E-field can tune the electronic states directly with obvious scientific and industrial advantages over other turning methods. However, E-field-induced Mott transitions are rare and typically require high E-field and low temperature. Here we report that the multiband Mott insulator Ca2RuO4 shows unique insulator-metal switching induced by applying a dry-battery level voltage at room temperature. The threshold field Eth ~40 V/cm is much weaker than the Mott gap energy. Moreover, the switching is accompanied by a bulk structural transition. Perhaps the most peculiar of the present findings is that the induced metal can be maintained to low temperature by a weak current. PMID:23985626

  14. Electric-field-induced spin resonance in antiferromagnetic insulators: Inverse process of the dynamical chiral magnetic effect

    NASA Astrophysics Data System (ADS)

    Sekine, Akihiko; Chiba, Takahiro

    2016-06-01

    We propose a realization of the electric-field-induced antiferromagnetic resonance. We consider three-dimensional antiferromagnetic insulators with spin-orbit coupling characterized by the existence of a topological term called the θ term. By solving the Landau-Lifshitz-Gilbert equation in the presence of the θ term, we show that, in contrast to conventional methods using ac magnetic fields, the antiferromagnetic resonance state is realized by ac electric fields along with static magnetic fields. This mechanism can be understood as the inverse process of the dynamical chiral magnetic effect, an alternating current generation by magnetic fields. In other words, we propose a way to electrically induce the dynamical axion field in condensed matter. We discuss a possible experiment to observe our proposal, which utilizes the spin pumping from the antiferromagnetic insulator into a heavy metal contact.

  15. Electrode modulated capacitance-electric field nonlinearity in metal-insulator-metal capacitors

    NASA Astrophysics Data System (ADS)

    Austin, D. Z.; Holden, K. E. K.; Hinz, J.; Conley, J. F.

    2017-06-01

    Metals with low enthalpy of oxide formation (ΔHox) are used to examine the influence of the metal/dielectric interface, in the absence of a significant interfacial layer oxide (ILO), on the voltage nonlinearity of capacitance for metal-insulator-metal capacitors. For both atomic layer deposited Al2O3 and HfO2 dielectrics, Ag electrode devices show the lowest quadratic electric field coefficient of capacitance (αECC), followed in increasing order by Au, Pd, and Ni. The difference between the metals is greater for thinner dielectrics, which is consistent with increased influence of the interface. In addition, with decreasing dielectric thickness the quadratic voltage field coefficient of capacitance increases, whereas αECC decreases. It is proposed that the thickness dependencies are due to an interaction between vertical compression of the dielectric under an applied bias and the concomitant lateral expansion induced stress that is concentrated near the interface. Through this interaction, the metal interface inhibits lateral expansion of the dielectric resulting in a reduced αECC. Indeed, αECC is found to increase with the increasing lattice mismatch at the metal/dielectric interface, likely due to edge dislocations. Finally, Al, a high ΔHox metal, is found to fit the trend for Al2O3 but not for HfO2, due to the formation of a thin reduced-k ILO at the HfO2/Al interface. These results suggest that minimization of metal/dielectric lattice mismatch may be a route to ultra-low nonlinearity in highly scaled metal-insulator-metal devices.

  16. Metal insulator transition induced by the magnetic field in n-type GaSb

    NASA Astrophysics Data System (ADS)

    Ghezzi, C.; Magnanini, R.; Parisini, A.

    2005-10-01

    The metal-insulator (MI) transition induced by a magnetic field was evidenced for the first time in compensated n-type GaSb layers grown by molecular beam epitaxy. The free electron densities were in the low 10 16 cm -3 range or even slightly lower, so that the zero-field 3D electron gas was degenerate and, at the BMI magnetic field of the MI transition, it populates only the spin-split 0 (+) Landau level (extreme quantum limit). On the metallic side of the MI transition a T1/3 dependence of the conductivity was assumed to fit the low- T data and to estimate the BMI value, which resulted of 9.1 T in the purest sample. The MI transition manifests in a strong increase of the diagonal resistivity with the magnetic field, but not of the Hall coefficient, suggesting that the apparent electron density is practically constant, whereas the mobility varies strongly. The evidence of a maximum in the temperature dependence of the Hall coefficient has been explained through a two channels transport mechanism involving localized and extended states.

  17. Electric-field induced spin accumulation in the Landau level states of topological insulator thin films

    NASA Astrophysics Data System (ADS)

    Siu, Zhuo Bin; Chowdhury, Debashree; Basu, Banasri; Jalil, Mansoor B. A.

    2017-08-01

    A topological insulator (TI) thin film differs from the more typically studied thick TI system in that the former has both a top and a bottom surface where the states localized at both surfaces can couple to one other across the finite thickness. An out-of-plane magnetic field leads to the formation of discrete Landau level states in the system, whereas an in-plane magnetization breaks the angular momentum symmetry of the system. In this work, we study the spin accumulation induced by the application of an in-plane electric field to the TI thin film system where the Landau level states and inter-surface coupling are simultaneously present. We show, via Kubo formula calculations, that the in-plane spin accumulation perpendicular to the magnetization due to the electric field vanishes for a TI thin film with symmetric top and bottom surfaces. A finite in-plane spin accumulation perpendicular to both the electric field and magnetization emerges upon applying either a differential magnetization coupling or a potential difference between the two film surfaces. This spin accumulation results from the breaking of the antisymmetry of the spin accumulation around the k-space equal-energy contours.

  18. Impact of mechanical stress on gate tunneling currents of germanium and silicon p-type metal-oxide-semiconductor field-effect transistors and metal gate work function

    NASA Astrophysics Data System (ADS)

    Choi, Youn Sung; Numata, Toshinori; Nishida, Toshikazu; Harris, Rusty; Thompson, Scott E.

    2008-03-01

    Uniaxial four-point wafer bending stress-altered gate tunneling currents are measured for germanium (Ge)/silicon (Si) channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with HfO2/SiO2 gate dielectrics and TiN/P+ poly Si electrodes. Carrier separation is used to measure electron and hole currents. The strain-altered hole tunneling current from the p-type inversion layer of Ge is measured to be ˜4 times larger than that for the Si channel MOSFET, since the larger strain-induced valence band-edge splitting in Ge results in more hole repopulation into a subband with a smaller out-of-plane effective mass and a lower tunneling barrier height. The strain-altered electron tunneling current from the metal gate is measured and shown to change due to strain altering the metal work function as quantified by flatband voltage shift measurements of Si MOS capacitors with TaN electrodes.

  19. Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

    NASA Astrophysics Data System (ADS)

    Es-Sakhi, Azzedin D.

    Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

  20. High-Mobility Transparent SnO2 and ZnO-SnO2 Thin-Film Transistors with SiO2/Al2O3 Gate Insulators

    NASA Astrophysics Data System (ADS)

    Cheong, Woo-Seok; Yoon, Sung-Min; Hwang, Chi-Sun; Chu, Hye Yong

    2009-04-01

    Using a double-layered gate insulator [SiO2 (100 nm)/Al2O3 (10 nm)] and a dry-etching process for the channel layer, we could obtain high mobility top-gate SnO2 and ZnO-SnO2 (ZTO) transparent thin-film transistor (TTFT). After annealing at 300 °C, for 1 h in O2 ambient, the saturated mobility of SnO2 TTFT was 17.4 cm2 s-1 V-1, and that of ZTO TTFT was 50.4 cm2 s-1 V-1. Generally, both devices operated in the enhancement mode with a drain current on-off ratio of ˜106.